From 4e8a227c786b1358051079568efe607d1557f287 Mon Sep 17 00:00:00 2001
From: Eduardo Rodrigues <eduardomourar@users.noreply.github.com>
Date: Sun, 16 Apr 2023 21:56:06 +0200
Subject: [PATCH 01/49] feat: align wasi-http with component linker

---
 crates/wasi-http/src/bytestream.rs     |  88 ++++++
 crates/wasi-http/src/common/error.rs   | 140 ++++++++++
 crates/wasi-http/src/common/mod.rs     |   7 +
 crates/wasi-http/src/common/stream.rs  | 152 ++++++++++
 crates/wasi-http/src/common/table.rs   | 115 ++++++++
 crates/wasi-http/src/component_impl.rs |   4 +-
 crates/wasi-http/src/http_impl.rs      |  96 +++----
 crates/wasi-http/src/lib.rs            |   8 +-
 crates/wasi-http/src/streams_impl.rs   | 146 +++++-----
 crates/wasi-http/src/struct.rs         | 365 ++++++++++++++++++++-----
 crates/wasi-http/src/types_impl.rs     | 177 ++++++------
 11 files changed, 1009 insertions(+), 289 deletions(-)
 create mode 100644 crates/wasi-http/src/bytestream.rs
 create mode 100644 crates/wasi-http/src/common/error.rs
 create mode 100644 crates/wasi-http/src/common/mod.rs
 create mode 100644 crates/wasi-http/src/common/stream.rs
 create mode 100644 crates/wasi-http/src/common/table.rs

diff --git a/crates/wasi-http/src/bytestream.rs b/crates/wasi-http/src/bytestream.rs
new file mode 100644
index 000000000000..8107a1a86d49
--- /dev/null
+++ b/crates/wasi-http/src/bytestream.rs
@@ -0,0 +1,88 @@
+use crate::common::{Error, InputStream, OutputStream};
+use bytes::{Buf, BufMut, Bytes, BytesMut};
+use std::any::Any;
+use std::ops::{Deref, DerefMut};
+use std::vec::Vec;
+
+#[derive(Clone, Debug)]
+pub struct ByteStream(Bytes);
+
+impl ByteStream {
+    pub fn new() -> Self {
+        Self(Bytes::new())
+    }
+}
+
+impl InputStream for ByteStream {
+    fn as_any(&self) -> &dyn Any {
+        self
+    }
+
+    fn read(&mut self, buf: &mut [u8]) -> Result<(u64, bool), Error> {
+        let len = buf.len();
+        let mut s = BytesMut::from(self.0.as_ref());
+        let size = s.len();
+        if len == 0 || size == 0 {
+            Ok((0, true))
+        } else if size > len {
+            s.advance(len);
+            buf.copy_from_slice(&s);
+            Ok((len.try_into()?, false))
+        } else {
+            buf[..size].copy_from_slice(&s);
+            Ok((size.try_into()?, true))
+        }
+    }
+
+    fn readable(&self) -> Result<(), Error> {
+        Ok(())
+    }
+}
+
+impl OutputStream for ByteStream {
+    fn as_any(&self) -> &dyn Any {
+        self
+    }
+
+    fn write(&mut self, buf: &[u8]) -> Result<u64, Error> {
+        let data = &self.0;
+        let buf_len = buf.len();
+        let len = data.len() + buf_len;
+        if len > 0 {
+            let mut new = BytesMut::with_capacity(len);
+            new.put(Bytes::from(data.clone()));
+            new.put(buf);
+            self.0 = new.freeze().into();
+        }
+        Ok(buf_len.try_into()?)
+    }
+
+    fn writable(&self) -> Result<(), Error> {
+        Ok(())
+    }
+}
+
+impl From<Bytes> for ByteStream {
+    fn from(buf: Bytes) -> ByteStream {
+        ByteStream(buf)
+    }
+}
+
+impl From<Vec<u8>> for ByteStream {
+    fn from(vec: Vec<u8>) -> ByteStream {
+        ByteStream(Bytes::from(vec))
+    }
+}
+
+impl Deref for ByteStream {
+    type Target = Bytes;
+    fn deref(&self) -> &Bytes {
+        &self.0
+    }
+}
+
+impl DerefMut for ByteStream {
+    fn deref_mut(&mut self) -> &mut Bytes {
+        &mut self.0
+    }
+}
diff --git a/crates/wasi-http/src/common/error.rs b/crates/wasi-http/src/common/error.rs
new file mode 100644
index 000000000000..044ed425d179
--- /dev/null
+++ b/crates/wasi-http/src/common/error.rs
@@ -0,0 +1,140 @@
+// Based on:
+// https://github.com/bytecodealliance/preview2-prototyping/blob/083879cb955d7cc719eb7fa1b59c6096fcc97bbf/wasi-common/src/error.rs
+
+//! wasi-common uses an [`Error`] type which represents either a preview 1 [`Errno`] enum, on
+//! [`anyhow::Error`] for trapping execution.
+//!
+//! The user can construct an [`Error`] out of an [`Errno`] using the `From`/`Into` traits.
+//! They may also use [`Error::trap`] to construct an error that traps execution. The contents
+//! can be inspected with [`Error::downcast`] and [`Error::downcast_ref`]. Additional context
+//! can be provided with the [`Error::context`] method. This context is only observable with the
+//! `Display` and `Debug` impls of the error.
+
+use std::fmt;
+
+/// An error returned from the `proc_exit` host syscall.
+///
+/// Embedders can test if an error returned from wasm is this error, in which
+/// case it may signal a non-fatal trap.
+#[derive(Debug)]
+pub struct I32Exit(pub i32);
+
+impl fmt::Display for I32Exit {
+    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
+        write!(f, "Exited with i32 exit status {}", self.0)
+    }
+}
+
+impl std::error::Error for I32Exit {}
+
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum Errno {
+    Success,
+    Badf,
+    Exist,
+    Inval,
+    Noent,
+    Overflow,
+    Perm,
+}
+
+impl std::fmt::Display for Errno {
+    fn fmt(&self, f: &mut std::fmt::Formatter<'_>) -> std::fmt::Result {
+        <Self as std::fmt::Debug>::fmt(self, f)
+    }
+}
+
+impl std::error::Error for Errno {}
+
+#[derive(Debug)]
+pub struct Error {
+    inner: anyhow::Error,
+}
+
+impl std::fmt::Display for Error {
+    fn fmt(&self, f: &mut std::fmt::Formatter<'_>) -> std::fmt::Result {
+        self.inner.fmt(f)
+    }
+}
+
+impl std::error::Error for Error {
+    fn source(&self) -> Option<&(dyn std::error::Error + 'static)> {
+        self.inner.source()
+    }
+}
+
+impl Error {
+    pub fn trap(inner: anyhow::Error) -> Error {
+        Self { inner }
+    }
+    pub fn into(self) -> anyhow::Error {
+        self.inner
+    }
+    pub fn downcast(self) -> Result<Errno, anyhow::Error> {
+        self.inner.downcast()
+    }
+    pub fn downcast_ref(&self) -> Option<&Errno> {
+        self.inner.downcast_ref()
+    }
+    pub fn context(self, s: impl Into<String>) -> Self {
+        Self {
+            inner: self.inner.context(s.into()),
+        }
+    }
+}
+
+impl From<Errno> for Error {
+    fn from(abi: Errno) -> Error {
+        Error {
+            inner: anyhow::Error::from(abi),
+        }
+    }
+}
+
+pub trait ErrorExt {
+    fn not_found() -> Self;
+    fn badf() -> Self;
+    fn exist() -> Self;
+    fn invalid_argument() -> Self;
+    fn overflow() -> Self;
+    fn perm() -> Self;
+}
+
+impl ErrorExt for Error {
+    fn not_found() -> Self {
+        Errno::Noent.into()
+    }
+    fn badf() -> Self {
+        Errno::Badf.into()
+    }
+    fn exist() -> Self {
+        Errno::Exist.into()
+    }
+    fn invalid_argument() -> Self {
+        Errno::Inval.into()
+    }
+    fn overflow() -> Self {
+        Errno::Overflow.into()
+    }
+    fn perm() -> Self {
+        Errno::Perm.into()
+    }
+}
+
+impl From<std::io::Error> for Error {
+    fn from(err: std::io::Error) -> Error {
+        match err.kind() {
+            std::io::ErrorKind::NotFound => Errno::Noent.into(),
+            std::io::ErrorKind::PermissionDenied => Errno::Perm.into(),
+            std::io::ErrorKind::AlreadyExists => Errno::Exist.into(),
+            std::io::ErrorKind::InvalidInput => Errno::Inval.into(),
+            _ => Error::trap(anyhow::anyhow!(err).context("Unknown OS error")),
+        }
+    }
+}
+
+impl From<std::num::TryFromIntError> for Error {
+    fn from(_err: std::num::TryFromIntError) -> Error {
+        Errno::Overflow.into()
+    }
+}
diff --git a/crates/wasi-http/src/common/mod.rs b/crates/wasi-http/src/common/mod.rs
new file mode 100644
index 000000000000..79e5915c2cd7
--- /dev/null
+++ b/crates/wasi-http/src/common/mod.rs
@@ -0,0 +1,7 @@
+pub mod error;
+pub mod stream;
+pub mod table;
+
+pub use error::{Errno, Error, ErrorExt, I32Exit};
+pub use stream::{InputStream, OutputStream};
+pub use table::Table;
diff --git a/crates/wasi-http/src/common/stream.rs b/crates/wasi-http/src/common/stream.rs
new file mode 100644
index 000000000000..c4fe13c2a9d8
--- /dev/null
+++ b/crates/wasi-http/src/common/stream.rs
@@ -0,0 +1,152 @@
+use super::{Error, ErrorExt};
+use std::any::Any;
+
+/// An input bytestream.
+///
+/// This is "pseudo" because the real streams will be a type in wit, and
+/// built into the wit bindings, and will support async and type parameters.
+/// This pseudo-stream abstraction is synchronous and only supports bytes.
+pub trait InputStream: Send + Sync {
+    fn as_any(&self) -> &dyn Any;
+
+    /// Read bytes. On success, returns a pair holding the number of bytes read
+    /// and a flag indicating whether the end of the stream was reached.
+    fn read(&mut self, _buf: &mut [u8]) -> Result<(u64, bool), Error> {
+        Err(Error::badf())
+    }
+
+    /// Vectored-I/O form of `read`.
+    fn read_vectored<'a>(
+        &mut self,
+        _bufs: &mut [std::io::IoSliceMut<'a>],
+    ) -> Result<(u64, bool), Error> {
+        Err(Error::badf())
+    }
+
+    /// Test whether vectored I/O reads are known to be optimized in the
+    /// underlying implementation.
+    fn is_read_vectored(&self) -> bool {
+        false
+    }
+
+    /// Read bytes from a stream and discard them.
+    fn skip(&mut self, nelem: u64) -> Result<(u64, bool), Error> {
+        let mut nread = 0;
+        let mut saw_end = false;
+
+        // TODO: Optimize by reading more than one byte at a time.
+        for _ in 0..nelem {
+            let (num, end) = self.read(&mut [0])?;
+            nread += num;
+            if end {
+                saw_end = true;
+                break;
+            }
+        }
+
+        Ok((nread, saw_end))
+    }
+
+    /// Return the number of bytes that may be read without blocking.
+    fn num_ready_bytes(&self) -> Result<u64, Error> {
+        Ok(0)
+    }
+
+    /// Test whether this stream is readable.
+    fn readable(&self) -> Result<(), Error>;
+}
+
+/// An output bytestream.
+///
+/// This is "pseudo" because the real streams will be a type in wit, and
+/// built into the wit bindings, and will support async and type parameters.
+/// This pseudo-stream abstraction is synchronous and only supports bytes.
+pub trait OutputStream: Send + Sync {
+    fn as_any(&self) -> &dyn Any;
+
+    /// Write bytes. On success, returns the number of bytes written.
+    fn write(&mut self, _buf: &[u8]) -> Result<u64, Error> {
+        Err(Error::badf())
+    }
+
+    /// Vectored-I/O form of `write`.
+    fn write_vectored<'a>(&mut self, _bufs: &[std::io::IoSlice<'a>]) -> Result<u64, Error> {
+        Err(Error::badf())
+    }
+
+    /// Test whether vectored I/O writes are known to be optimized in the
+    /// underlying implementation.
+    fn is_write_vectored(&self) -> bool {
+        false
+    }
+
+    /// Transfer bytes directly from an input stream to an output stream.
+    fn splice(&mut self, src: &mut dyn InputStream, nelem: u64) -> Result<(u64, bool), Error> {
+        let mut nspliced = 0;
+        let mut saw_end = false;
+
+        // TODO: Optimize by splicing more than one byte at a time.
+        for _ in 0..nelem {
+            let mut buf = [0u8];
+            let (num, end) = src.read(&mut buf)?;
+            self.write(&buf)?;
+            nspliced += num;
+            if end {
+                saw_end = true;
+                break;
+            }
+        }
+
+        Ok((nspliced, saw_end))
+    }
+
+    /// Repeatedly write a byte to a stream.
+    fn write_zeroes(&mut self, nelem: u64) -> Result<u64, Error> {
+        let mut nwritten = 0;
+
+        // TODO: Optimize by writing more than one byte at a time.
+        for _ in 0..nelem {
+            let num = self.write(&[0])?;
+            if num == 0 {
+                break;
+            }
+            nwritten += num;
+        }
+
+        Ok(nwritten)
+    }
+
+    /// Test whether this stream is writeable.
+    fn writable(&self) -> Result<(), Error>;
+}
+
+pub trait TableStreamExt {
+    fn get_input_stream(&self, fd: u32) -> Result<&dyn InputStream, Error>;
+    fn get_input_stream_mut(&mut self, fd: u32) -> Result<&mut Box<dyn InputStream>, Error>;
+    fn delete_input_stream(&mut self, fd: u32) -> Result<(), Error>;
+
+    fn get_output_stream(&self, fd: u32) -> Result<&dyn OutputStream, Error>;
+    fn get_output_stream_mut(&mut self, fd: u32) -> Result<&mut Box<dyn OutputStream>, Error>;
+    fn delete_output_stream(&mut self, fd: u32) -> Result<(), Error>;
+}
+impl TableStreamExt for super::Table {
+    fn get_input_stream(&self, fd: u32) -> Result<&dyn InputStream, Error> {
+        self.get::<Box<dyn InputStream>>(fd).map(|f| f.as_ref())
+    }
+    fn get_input_stream_mut(&mut self, fd: u32) -> Result<&mut Box<dyn InputStream>, Error> {
+        self.get_mut::<Box<dyn InputStream>>(fd)
+    }
+    fn delete_input_stream(&mut self, fd: u32) -> Result<(), Error> {
+        self.delete::<Box<dyn InputStream>>(fd).map(|_old| ())
+    }
+
+    fn get_output_stream(&self, fd: u32) -> Result<&dyn OutputStream, Error> {
+        self.get::<Box<dyn OutputStream>>(fd).map(|f| f.as_ref())
+    }
+    fn get_output_stream_mut(&mut self, fd: u32) -> Result<&mut Box<dyn OutputStream>, Error> {
+        self.get_mut::<Box<dyn OutputStream>>(fd)
+    }
+    fn delete_output_stream(&mut self, fd: u32) -> Result<(), Error> {
+        self.delete::<Box<dyn OutputStream>>(fd).map(|_old| ())
+    }
+}
diff --git a/crates/wasi-http/src/common/table.rs b/crates/wasi-http/src/common/table.rs
new file mode 100644
index 000000000000..22b491e7561f
--- /dev/null
+++ b/crates/wasi-http/src/common/table.rs
@@ -0,0 +1,115 @@
+// Based on:
+// https://github.com/bytecodealliance/preview2-prototyping/blob/083879cb955d7cc719eb7fa1b59c6096fcc97bbf/wasi-common/src/table.rs
+
+use super::{Error, ErrorExt};
+use std::any::Any;
+use std::collections::HashMap;
+
+/// The `Table` type is designed to map u32 handles to resources. The table is now part of the
+/// public interface to a `WasiCtx` - it is reference counted so that it can be shared beyond a
+/// `WasiCtx` with other WASI proposals (e.g. `wasi-crypto` and `wasi-nn`) to manage their
+/// resources. Elements in the `Table` are `Any` typed.
+///
+/// The `Table` type is intended to model how the Interface Types concept of Resources is shaping
+/// up. Right now it is just an approximation.
+#[derive(Debug)]
+pub struct Table {
+    map: HashMap<u32, Box<dyn Any + Send + Sync>>,
+    next_key: u32,
+}
+
+impl Table {
+    /// Create an empty table. New insertions will begin at 3, above stdio.
+    pub fn new() -> Self {
+        Table {
+            map: HashMap::new(),
+            next_key: 3, // 0, 1 and 2 are reserved for stdio
+        }
+    }
+
+    /// Insert a resource at a certain index.
+    pub fn insert_at(&mut self, key: u32, a: Box<dyn Any + Send + Sync>) {
+        self.map.insert(key, a);
+    }
+
+    /// Insert a resource at the next available index.
+    pub fn push(&mut self, a: Box<dyn Any + Send + Sync>) -> Result<u32, Error> {
+        // NOTE: The performance of this new key calculation could be very bad once keys wrap
+        // around.
+        if self.map.len() == u32::MAX as usize {
+            return Err(Error::trap(anyhow::Error::msg("table has no free keys")));
+        }
+        loop {
+            let key = self.next_key;
+            self.next_key = self.next_key.wrapping_add(1);
+            if self.map.contains_key(&key) {
+                continue;
+            }
+            self.map.insert(key, a);
+            return Ok(key);
+        }
+    }
+
+    /// Check if the table has a resource at the given index.
+    pub fn contains_key(&self, key: u32) -> bool {
+        self.map.contains_key(&key)
+    }
+
+    /// Check if the resource at a given index can be downcast to a given type.
+    /// Note: this will always fail if the resource is already borrowed.
+    pub fn is<T: Any + Sized>(&self, key: u32) -> bool {
+        if let Some(r) = self.map.get(&key) {
+            r.is::<T>()
+        } else {
+            false
+        }
+    }
+
+    /// Get an immutable reference to a resource of a given type at a given index. Multiple
+    /// immutable references can be borrowed at any given time. Borrow failure
+    /// results in a trapping error.
+    pub fn get<T: Any + Sized>(&self, key: u32) -> Result<&T, Error> {
+        if let Some(r) = self.map.get(&key) {
+            r.downcast_ref::<T>()
+                .ok_or_else(|| Error::badf().context("element is a different type"))
+        } else {
+            Err(Error::badf().context("key not in table"))
+        }
+    }
+
+    /// Get a mutable reference to a resource of a given type at a given index. Only one mutable
+    /// reference can be borrowed at any given time. Borrow failure results in a trapping error.
+    pub fn get_mut<T: Any + Sized>(&mut self, key: u32) -> Result<&mut T, Error> {
+        if let Some(r) = self.map.get_mut(&key) {
+            r.downcast_mut::<T>()
+                .ok_or_else(|| Error::badf().context("element is a different type"))
+        } else {
+            Err(Error::badf().context("key not in table"))
+        }
+    }
+
+    /// Remove a resource at a given index from the table. Returns the resource
+    /// if it was present.
+    pub fn delete<T: Any + Sized>(&mut self, key: u32) -> Result<Option<T>, Error> {
+        self.map
+            .remove(&key)
+            .map(|r| {
+                r.downcast::<T>()
+                    .map(|r| *r)
+                    .map_err(|_| Error::badf().context("element is a different type"))
+            })
+            .transpose()
+    }
+
+    /// List immutable reference of resources of a given type.
+    pub fn list<T: Any + Sized>(&self) -> HashMap<u32, &T> {
+        let mut result: HashMap<u32, &T> = HashMap::new();
+        for (key, value) in self.map.iter() {
+            let _test = value.is::<T>();
+            if let Some(r) = value.downcast_ref::<T>() {
+                result.insert(*key, r);
+            }
+        }
+        result
+    }
+}
diff --git a/crates/wasi-http/src/component_impl.rs b/crates/wasi-http/src/component_impl.rs
index b0b27941c851..19593c18b6fe 100644
--- a/crates/wasi-http/src/component_impl.rs
+++ b/crates/wasi-http/src/component_impl.rs
@@ -1,7 +1,7 @@
-pub use crate::r#struct::WasiHttp;
 use crate::wasi::http::outgoing_handler::Host;
 use crate::wasi::http::types::{Error, Host as TypesHost, Method, RequestOptions, Scheme};
 use crate::wasi::io::streams::Host as StreamsHost;
+pub use crate::WasiHttpCtx;
 use anyhow::anyhow;
 use std::str;
 use std::vec::Vec;
@@ -105,7 +105,7 @@ fn u32_array_to_u8(arr: &[u32]) -> Vec<u8> {
 
 pub fn add_component_to_linker<T>(
     linker: &mut wasmtime::Linker<T>,
-    get_cx: impl Fn(&mut T) -> &mut WasiHttp + Send + Sync + Copy + 'static,
+    get_cx: impl Fn(&mut T) -> &mut WasiHttpCtx + Send + Sync + Copy + 'static,
 ) -> anyhow::Result<()> {
     linker.func_wrap(
         "wasi:http/outgoing-handler",
diff --git a/crates/wasi-http/src/http_impl.rs b/crates/wasi-http/src/http_impl.rs
index 239e54a68771..9551a0f4a555 100644
--- a/crates/wasi-http/src/http_impl.rs
+++ b/crates/wasi-http/src/http_impl.rs
@@ -1,14 +1,15 @@
-use crate::r#struct::{ActiveFuture, ActiveResponse};
-use crate::r#struct::{Stream, WasiHttp};
+use crate::bytestream::ByteStream;
+use crate::common::stream::{InputStream, OutputStream, TableStreamExt};
+use crate::r#struct::{ActiveFields, ActiveFuture, ActiveResponse, HttpResponse, TableExt};
 use crate::wasi::http::types::{FutureIncomingResponse, OutgoingRequest, RequestOptions, Scheme};
+pub use crate::WasiHttpCtx;
 #[cfg(not(any(target_arch = "riscv64", target_arch = "s390x")))]
 use anyhow::anyhow;
 use anyhow::bail;
-use bytes::{BufMut, Bytes, BytesMut};
-use http_body_util::{BodyExt, Full};
+use http_body::Body;
+use http_body_util::{BodyExt, Empty, Full};
 use hyper::Method;
 use hyper::Request;
-use std::collections::HashMap;
 #[cfg(not(any(target_arch = "riscv64", target_arch = "s390x")))]
 use std::sync::Arc;
 use std::time::Duration;
@@ -17,16 +18,22 @@ use tokio::time::timeout;
 #[cfg(not(any(target_arch = "riscv64", target_arch = "s390x")))]
 use tokio_rustls::rustls::{self, OwnedTrustAnchor};
 
-impl crate::wasi::http::outgoing_handler::Host for WasiHttp {
+fn convert(error: crate::common::Error) -> anyhow::Error {
+    // if let Some(errno) = error.downcast_ref() {
+    //     anyhow::Error::new(crate::types::Error::UnexpectedError(errno.to_string()))
+    // } else {
+    error.into()
+    // }
+}
+
+impl crate::wasi::http::outgoing_handler::Host for WasiHttpCtx {
     fn handle(
         &mut self,
         request_id: OutgoingRequest,
         options: Option<RequestOptions>,
     ) -> wasmtime::Result<FutureIncomingResponse> {
-        let future_id = self.future_id_base;
-        self.future_id_base = self.future_id_base + 1;
-        let future = ActiveFuture::new(future_id, request_id, options);
-        self.futures.insert(future_id, future);
+        let future = ActiveFuture::new(request_id, options);
+        let future_id = self.push_future(Box::new(future)).map_err(convert)?;
         Ok(future_id)
     }
 }
@@ -43,7 +50,7 @@ fn port_for_scheme(scheme: &Option<Scheme>) -> &str {
     }
 }
 
-impl WasiHttp {
+impl WasiHttpCtx {
     pub(crate) async fn handle_async(
         &mut self,
         request_id: OutgoingRequest,
@@ -64,12 +71,10 @@ impl WasiHttp {
         let between_bytes_timeout =
             Duration::from_millis(opts.between_bytes_timeout_ms.unwrap_or(600 * 1000).into());
 
-        let request = match self.requests.get(&request_id) {
-            Some(r) => r,
-            None => bail!("not found!"),
-        };
+        let table = self.table_mut();
+        let request = table.get_request(request_id).map_err(convert)?.clone();
 
-        let method = match &request.method {
+        let method = match request.method() {
             crate::wasi::http::types::Method::Get => Method::GET,
             crate::wasi::http::types::Method::Head => Method::HEAD,
             crate::wasi::http::types::Method::Post => Method::POST,
@@ -82,16 +87,16 @@ impl WasiHttp {
             crate::wasi::http::types::Method::Other(s) => bail!("unknown method {}", s),
         };
 
-        let scheme = match request.scheme.as_ref().unwrap_or(&Scheme::Https) {
+        let scheme = match request.scheme().as_ref().unwrap_or(&Scheme::Https) {
             Scheme::Http => "http://",
             Scheme::Https => "https://",
             Scheme::Other(s) => bail!("unsupported scheme {}", s),
         };
 
         // Largely adapted from https://hyper.rs/guides/1/client/basic/
-        let authority = match request.authority.find(":") {
-            Some(_) => request.authority.clone(),
-            None => request.authority.clone() + port_for_scheme(&request.scheme),
+        let authority = match request.authority().find(":") {
+            Some(_) => request.authority().to_owned(),
+            None => request.authority().to_owned() + port_for_scheme(request.scheme()),
         };
         let mut sender = if scheme == "https://" {
             #[cfg(not(any(target_arch = "riscv64", target_arch = "s390x")))]
@@ -152,50 +157,44 @@ impl WasiHttp {
             s
         };
 
-        let url = scheme.to_owned() + &request.authority + &request.path_with_query;
+        let url = scheme.to_owned() + &request.authority() + &request.path_with_query();
 
         let mut call = Request::builder()
             .method(method)
             .uri(url)
-            .header(hyper::header::HOST, request.authority.as_str());
+            .header(hyper::header::HOST, request.authority());
 
-        for (key, val) in request.headers.iter() {
+        for (key, val) in request.headers().iter() {
             for item in val {
                 call = call.header(key, item.clone());
             }
         }
 
-        let response_id = self.response_id_base;
-        self.response_id_base = self.response_id_base + 1;
-        let mut response = ActiveResponse::new(response_id);
-        let body = Full::<Bytes>::new(
-            self.streams
-                .get(&request.body)
-                .unwrap_or(&Stream::default())
-                .data
-                .clone()
-                .freeze(),
+        let mut response = ActiveResponse::new();
+        let body = Full::<&[u8]>::new(
+            &[],
+            // table
+            //     .get_output_stream(request.body().unwrap_or(0))
+            //     .unwrap_or(&ByteStream::new())
+            //     .clone()
+            //     .into(),
         );
         let t = timeout(first_bytes_timeout, sender.send_request(call.body(body)?)).await?;
         let mut res = t?;
         response.status = res.status().try_into()?;
         for (key, value) in res.headers().iter() {
-            let mut vec = std::vec::Vec::new();
+            let mut vec = Vec::new();
             vec.push(value.as_bytes().to_vec());
-            response
-                .response_headers
-                .insert(key.as_str().to_string(), vec);
+            response.headers().insert(key.as_str().to_string(), vec);
         }
-        let mut buf = BytesMut::new();
+        let mut buf: Vec<u8> = Vec::new();
         while let Some(next) = timeout(between_bytes_timeout, res.frame()).await? {
             let frame = next?;
             if let Some(chunk) = frame.data_ref() {
-                buf.put(chunk.clone());
+                buf.extend_from_slice(chunk);
             }
             if let Some(trailers) = frame.trailers_ref() {
-                response.trailers = self.fields_id_base;
-                self.fields_id_base += 1;
-                let mut map: HashMap<String, Vec<Vec<u8>>> = HashMap::new();
+                let mut map = ActiveFields::new();
                 for (name, value) in trailers.iter() {
                     let key = name.to_string();
                     match map.get_mut(&key) {
@@ -207,13 +206,16 @@ impl WasiHttp {
                         }
                     };
                 }
-                self.fields.insert(response.trailers, map);
+                let trailers = self.push_fields(Box::new(map)).map_err(convert)?;
+                response.set_trailers(trailers);
             }
         }
-        response.body = self.streams_id_base;
-        self.streams_id_base = self.streams_id_base + 1;
-        self.streams.insert(response.body, buf.freeze().into());
-        self.responses.insert(response_id, response);
+
+        let stream = self
+            .push_input_stream(Box::new(ByteStream::from(buf)))
+            .map_err(convert)?;
+        response.set_body(stream);
+        let response_id = self.push_response(Box::new(response)).map_err(convert)?;
         Ok(response_id)
     }
 }
diff --git a/crates/wasi-http/src/lib.rs b/crates/wasi-http/src/lib.rs
index ce5211ef8c17..3753fce5a5c0 100644
--- a/crates/wasi-http/src/lib.rs
+++ b/crates/wasi-http/src/lib.rs
@@ -1,8 +1,10 @@
 use crate::component_impl::add_component_to_linker;
-pub use crate::r#struct::WasiHttp;
+pub use crate::r#struct::WasiHttpCtx;
 
 wasmtime::component::bindgen!({ path: "wasi-http/wit", world: "proxy"});
 
+pub mod bytestream;
+pub mod common;
 pub mod component_impl;
 pub mod http_impl;
 pub mod streams_impl;
@@ -11,7 +13,7 @@ pub mod types_impl;
 
 pub fn add_to_component_linker<T>(
     linker: &mut wasmtime::component::Linker<T>,
-    get_cx: impl Fn(&mut T) -> &mut WasiHttp + Send + Sync + Copy + 'static,
+    get_cx: impl Fn(&mut T) -> &mut WasiHttpCtx + Send + Sync + Copy + 'static,
 ) -> anyhow::Result<()> {
     crate::wasi::http::outgoing_handler::add_to_linker(linker, get_cx)?;
     crate::wasi::http::types::add_to_linker(linker, get_cx)?;
@@ -21,7 +23,7 @@ pub fn add_to_component_linker<T>(
 
 pub fn add_to_linker<T>(
     linker: &mut wasmtime::Linker<T>,
-    get_cx: impl Fn(&mut T) -> &mut WasiHttp + Send + Sync + Copy + 'static,
+    get_cx: impl Fn(&mut T) -> &mut WasiHttpCtx + Send + Sync + Copy + 'static,
 ) -> anyhow::Result<()> {
     add_component_to_linker(linker, get_cx)
 }
diff --git a/crates/wasi-http/src/streams_impl.rs b/crates/wasi-http/src/streams_impl.rs
index 1df36d4b116b..a209d8cca716 100644
--- a/crates/wasi-http/src/streams_impl.rs
+++ b/crates/wasi-http/src/streams_impl.rs
@@ -1,31 +1,43 @@
-use crate::wasi::io::streams::{Host, InputStream, OutputStream, Pollable, StreamError};
-use crate::WasiHttp;
-use anyhow::{anyhow, bail};
+use crate::common::stream::TableStreamExt;
+use crate::wasi::io::streams::{InputStream, OutputStream, StreamError};
+use crate::wasi::poll::poll::Pollable;
+use crate::WasiHttpCtx;
+use anyhow::bail;
 use std::vec::Vec;
 
-impl Host for WasiHttp {
+fn convert(error: crate::common::Error) -> anyhow::Error {
+    // if let Some(errno) = error.downcast_ref() {
+    //     anyhow::Error::new(StreamError {})
+    // } else {
+    error.into()
+    // }
+}
+
+impl crate::wasi::io::streams::Host for WasiHttpCtx {
     fn read(
         &mut self,
         stream: InputStream,
         len: u64,
     ) -> wasmtime::Result<Result<(Vec<u8>, bool), StreamError>> {
-        let st = self
-            .streams
-            .get_mut(&stream)
-            .ok_or_else(|| anyhow!("stream not found: {stream}"))?;
-        if st.closed {
-            bail!("stream is dropped!");
-        }
-        let s = &mut st.data;
-        if len == 0 {
-            Ok(Ok((bytes::Bytes::new().to_vec(), s.len() > 0)))
-        } else if s.len() > len.try_into()? {
-            let result = s.split_to(len.try_into()?);
-            Ok(Ok((result.to_vec(), false)))
-        } else {
-            s.truncate(s.len());
-            Ok(Ok((s.clone().to_vec(), true)))
-        }
+        let s = self
+            .table_mut()
+            .get_input_stream_mut(stream)
+            .map_err(convert)?;
+        // if s.closed {
+        //     bail!("stream is dropped!");
+        // }
+
+        // Len could be any `u64` value, but we don't want to
+        // allocate too much up front, so make a wild guess
+        // of an upper bound for the buffer size.
+        let buffer_len = std::cmp::min(len, 0x400000) as _;
+        let mut buffer = vec![0; buffer_len];
+
+        let (bytes_read, end) = s.read(&mut buffer).map_err(convert)?;
+
+        buffer.truncate(bytes_read as usize);
+
+        Ok(Ok((buffer, end)))
     }
 
     fn skip(
@@ -33,24 +45,17 @@ impl Host for WasiHttp {
         stream: InputStream,
         len: u64,
     ) -> wasmtime::Result<Result<(u64, bool), StreamError>> {
-        let st = self
-            .streams
-            .get_mut(&stream)
-            .ok_or_else(|| anyhow!("stream not found: {stream}"))?;
-        if st.closed {
-            bail!("stream is dropped!");
-        }
-        let s = &mut st.data;
-        if len == 0 {
-            Ok(Ok((0, s.len() > 0)))
-        } else if s.len() > len.try_into()? {
-            s.truncate(len.try_into()?);
-            Ok(Ok((len, false)))
-        } else {
-            let bytes = s.len();
-            s.truncate(s.len());
-            Ok(Ok((bytes.try_into()?, true)))
-        }
+        let s = self
+            .table_mut()
+            .get_input_stream_mut(stream)
+            .map_err(convert)?;
+        // if s.closed {
+        //     bail!("stream is dropped!");
+        // }
+
+        let (bytes_skipped, end) = s.skip(len).map_err(convert)?;
+
+        Ok(Ok((bytes_skipped, end)))
     }
 
     fn subscribe_to_input_stream(&mut self, _this: InputStream) -> wasmtime::Result<Pollable> {
@@ -58,40 +63,48 @@ impl Host for WasiHttp {
     }
 
     fn drop_input_stream(&mut self, stream: InputStream) -> wasmtime::Result<()> {
-        let st = self
-            .streams
-            .get_mut(&stream)
-            .ok_or_else(|| anyhow!("stream not found: {stream}"))?;
-        st.closed = true;
+        // let st = self
+        //     .streams
+        //     .get_mut(&stream)
+        //     .ok_or_else(|| anyhow!("stream not found: {stream}"))?;
+        // st.closed = true;
+        self.table_mut()
+            .delete_input_stream(stream)
+            .map_err(convert)?;
         Ok(())
     }
 
     fn write(
         &mut self,
-        this: OutputStream,
+        stream: OutputStream,
         buf: Vec<u8>,
     ) -> wasmtime::Result<Result<u64, StreamError>> {
-        let len = buf.len();
-        let st = self.streams.entry(this).or_default();
-        if st.closed {
-            bail!("cannot write to closed stream");
-        }
-        st.data.extend_from_slice(buf.as_slice());
-        Ok(Ok(len.try_into()?))
+        let s = self
+            .table_mut()
+            .get_output_stream_mut(stream)
+            .map_err(convert)?;
+        // if s.closed {
+        //     bail!("cannot write to closed stream");
+        // }
+
+        let bytes_written = s.write(&buf).map_err(convert)?;
+
+        Ok(Ok(u64::try_from(bytes_written)?))
     }
 
     fn write_zeroes(
         &mut self,
-        this: OutputStream,
+        stream: OutputStream,
         len: u64,
     ) -> wasmtime::Result<Result<u64, StreamError>> {
-        let mut data = Vec::with_capacity(len.try_into()?);
-        let mut i = 0;
-        while i < len {
-            data.push(0);
-            i = i + 1;
-        }
-        self.write(this, data)
+        let s = self
+            .table_mut()
+            .get_output_stream_mut(stream)
+            .map_err(convert)?;
+
+        let bytes_written: u64 = s.write_zeroes(len).map_err(convert)?;
+
+        Ok(Ok(bytes_written))
     }
 
     fn splice(
@@ -116,11 +129,14 @@ impl Host for WasiHttp {
     }
 
     fn drop_output_stream(&mut self, stream: OutputStream) -> wasmtime::Result<()> {
-        let st = self
-            .streams
-            .get_mut(&stream)
-            .ok_or_else(|| anyhow!("stream not found: {stream}"))?;
-        st.closed = true;
+        // let st = self
+        //     .streams
+        //     .get_mut(&stream)
+        //     .ok_or_else(|| anyhow!("stream not found: {stream}"))?;
+        // st.closed = true;
+        self.table_mut()
+            .delete_output_stream(stream)
+            .map_err(convert)?;
         Ok(())
     }
 
diff --git a/crates/wasi-http/src/struct.rs b/crates/wasi-http/src/struct.rs
index d73fd7c6d562..7be25b463d0e 100644
--- a/crates/wasi-http/src/struct.rs
+++ b/crates/wasi-http/src/struct.rs
@@ -1,124 +1,341 @@
+//! Implements the base structure (i.e. [WasiHttpCtx]) that will provide the
+//! implementation of the wasi-http API.
+
+use crate::common::{Error, InputStream, OutputStream, Table};
 use crate::wasi::http::types::{Method, RequestOptions, Scheme};
-use bytes::{BufMut, Bytes, BytesMut};
+use std::any::Any;
 use std::collections::HashMap;
+use std::ops::{Deref, DerefMut};
 
-#[derive(Clone, Default)]
-pub struct Stream {
-    pub closed: bool,
-    pub data: BytesMut,
+/// Capture the state necessary for use in the wasi-http API implementation.
+pub struct WasiHttpCtx {
+    pub table: Table,
 }
 
-#[derive(Clone)]
-pub struct WasiHttp {
-    pub request_id_base: u32,
-    pub response_id_base: u32,
-    pub fields_id_base: u32,
-    pub streams_id_base: u32,
-    pub future_id_base: u32,
-    pub requests: HashMap<u32, ActiveRequest>,
-    pub responses: HashMap<u32, ActiveResponse>,
-    pub fields: HashMap<u32, HashMap<String, Vec<Vec<u8>>>>,
-    pub streams: HashMap<u32, Stream>,
-    pub futures: HashMap<u32, ActiveFuture>,
+impl WasiHttpCtx {
+    /// Make a new context from the default state.
+    pub fn new() -> Self {
+        Self {
+            table: Table::new(),
+        }
+    }
+
+    pub fn table(&self) -> &Table {
+        &self.table
+    }
+
+    pub fn table_mut(&mut self) -> &mut Table {
+        &mut self.table
+    }
+
+    pub fn insert_input_stream(&mut self, id: u32, stream: Box<dyn InputStream>) {
+        self.table_mut().insert_at(id, Box::new(stream));
+    }
+
+    pub fn push_input_stream(&mut self, stream: Box<dyn InputStream>) -> Result<u32, Error> {
+        self.table_mut().push(Box::new(stream))
+    }
+
+    pub fn insert_output_stream(&mut self, id: u32, stream: Box<dyn OutputStream>) {
+        self.table_mut().insert_at(id, Box::new(stream));
+    }
+
+    pub fn push_output_stream(&mut self, stream: Box<dyn OutputStream>) -> Result<u32, Error> {
+        self.table_mut().push(Box::new(stream))
+    }
+
+    pub fn push_request(&mut self, request: Box<dyn HttpRequest>) -> Result<u32, Error> {
+        self.table_mut().push(Box::new(request))
+    }
+
+    pub fn push_response(&mut self, response: Box<dyn HttpResponse>) -> Result<u32, Error> {
+        self.table_mut().push(Box::new(response))
+    }
+
+    pub fn push_future(&mut self, future: Box<ActiveFuture>) -> Result<u32, Error> {
+        self.table_mut().push(Box::new(future))
+    }
+
+    pub fn push_fields(&mut self, fields: Box<ActiveFields>) -> Result<u32, Error> {
+        self.table_mut().push(Box::new(fields))
+    }
+
+    pub fn set_stdin(&mut self, s: Box<dyn InputStream>) {
+        self.insert_input_stream(0, s);
+    }
+
+    pub fn set_stdout(&mut self, s: Box<dyn OutputStream>) {
+        self.insert_output_stream(1, s);
+    }
+
+    pub fn set_stderr(&mut self, s: Box<dyn OutputStream>) {
+        self.insert_output_stream(2, s);
+    }
 }
 
-#[derive(Clone)]
+pub type FieldsMap = HashMap<String, Vec<Vec<u8>>>;
+
+#[derive(Clone, Debug)]
 pub struct ActiveRequest {
-    pub id: u32,
-    pub active_request: bool,
+    pub active: bool,
     pub method: Method,
     pub scheme: Option<Scheme>,
     pub path_with_query: String,
     pub authority: String,
-    pub headers: HashMap<String, Vec<Vec<u8>>>,
-    pub body: u32,
+    pub headers: ActiveFields,
+    pub body: Option<u32>,
 }
 
-#[derive(Clone)]
-pub struct ActiveResponse {
-    pub id: u32,
-    pub active_response: bool,
-    pub status: u16,
-    pub body: u32,
-    pub response_headers: HashMap<String, Vec<Vec<u8>>>,
-    pub trailers: u32,
-}
+pub trait HttpRequest: Send + Sync {
+    fn new() -> Self
+    where
+        Self: Sized;
 
-#[derive(Clone)]
-pub struct ActiveFuture {
-    pub id: u32,
-    pub request_id: u32,
-    pub options: Option<RequestOptions>,
+    fn as_any(&self) -> &dyn Any;
+
+    fn method(&self) -> &Method;
+    fn scheme(&self) -> &Option<Scheme>;
+    fn path_with_query(&self) -> &str;
+    fn authority(&self) -> &str;
+    fn headers(&self) -> ActiveFields;
+    fn body(&self) -> Option<u32>;
+    fn set_body(&mut self, body: u32);
 }
 
-impl ActiveRequest {
-    pub fn new(id: u32) -> Self {
+impl HttpRequest for ActiveRequest {
+    fn new() -> Self {
         Self {
-            id,
-            active_request: false,
+            active: false,
             method: Method::Get,
             scheme: Some(Scheme::Http),
             path_with_query: "".to_string(),
             authority: "".to_string(),
-            headers: HashMap::new(),
-            body: 0,
+            headers: ActiveFields::new(),
+            body: None,
         }
     }
+
+    fn as_any(&self) -> &dyn Any {
+        self
+    }
+
+    fn method(&self) -> &Method {
+        &self.method
+    }
+
+    fn scheme(&self) -> &Option<Scheme> {
+        &self.scheme
+    }
+
+    fn path_with_query(&self) -> &str {
+        &self.path_with_query
+    }
+
+    fn authority(&self) -> &str {
+        &self.authority
+    }
+
+    fn headers(&self) -> ActiveFields {
+        self.headers.clone()
+    }
+
+    fn body(&self) -> Option<u32> {
+        self.body
+    }
+
+    fn set_body(&mut self, body: u32) {
+        self.body = Some(body);
+    }
+}
+
+#[derive(Clone, Debug)]
+pub struct ActiveResponse {
+    pub active: bool,
+    pub status: u16,
+    pub headers: ActiveFields,
+    pub body: Option<u32>,
+    pub trailers: Option<u32>,
 }
 
-impl ActiveResponse {
-    pub fn new(id: u32) -> Self {
+pub trait HttpResponse: Send + Sync {
+    fn new() -> Self
+    where
+        Self: Sized;
+
+    fn as_any(&self) -> &dyn Any;
+
+    fn status(&self) -> u16;
+    fn headers(&self) -> ActiveFields;
+    fn body(&self) -> Option<u32>;
+    fn set_body(&mut self, body: u32);
+    fn trailers(&self) -> Option<u32>;
+    fn set_trailers(&mut self, trailers: u32);
+}
+
+impl HttpResponse for ActiveResponse {
+    fn new() -> Self {
         Self {
-            id,
-            active_response: false,
+            active: false,
             status: 0,
-            body: 0,
-            response_headers: HashMap::new(),
-            trailers: 0,
+            headers: ActiveFields::new(),
+            body: None,
+            trailers: None,
         }
     }
+
+    fn as_any(&self) -> &dyn Any {
+        self
+    }
+
+    fn status(&self) -> u16 {
+        self.status
+    }
+
+    fn headers(&self) -> ActiveFields {
+        self.headers.clone()
+    }
+
+    fn body(&self) -> Option<u32> {
+        self.body
+    }
+
+    fn set_body(&mut self, body: u32) {
+        self.body = Some(body);
+    }
+
+    fn trailers(&self) -> Option<u32> {
+        self.trailers
+    }
+
+    fn set_trailers(&mut self, trailers: u32) {
+        self.trailers = Some(trailers);
+    }
+}
+
+#[derive(Clone)]
+pub struct ActiveFuture {
+    pub request_id: u32,
+    pub options: Option<RequestOptions>,
 }
 
 impl ActiveFuture {
-    pub fn new(id: u32, request_id: u32, options: Option<RequestOptions>) -> Self {
+    pub fn new(request_id: u32, options: Option<RequestOptions>) -> Self {
         Self {
-            id,
             request_id,
             options,
         }
     }
 }
 
-impl Stream {
+#[derive(Clone, Debug)]
+pub struct ActiveFields(HashMap<String, Vec<Vec<u8>>>);
+
+impl ActiveFields {
     pub fn new() -> Self {
-        Self::default()
+        Self(FieldsMap::new())
     }
 }
 
-impl From<Bytes> for Stream {
-    fn from(bytes: Bytes) -> Self {
-        let mut buf = BytesMut::with_capacity(bytes.len());
-        buf.put(bytes);
-        Self {
-            closed: false,
-            data: buf,
-        }
+pub trait HttpFields: Send + Sync {
+    fn as_any(&self) -> &dyn Any;
+}
+
+impl HttpFields for ActiveFields {
+    fn as_any(&self) -> &dyn Any {
+        self
     }
 }
 
-impl WasiHttp {
-    pub fn new() -> Self {
-        Self {
-            request_id_base: 1,
-            response_id_base: 1,
-            fields_id_base: 1,
-            streams_id_base: 1,
-            future_id_base: 1,
-            requests: HashMap::new(),
-            responses: HashMap::new(),
-            fields: HashMap::new(),
-            streams: HashMap::new(),
-            futures: HashMap::new(),
+impl Deref for ActiveFields {
+    type Target = FieldsMap;
+    fn deref(&self) -> &FieldsMap {
+        &self.0
+    }
+}
+
+impl DerefMut for ActiveFields {
+    fn deref_mut(&mut self) -> &mut FieldsMap {
+        &mut self.0
+    }
+}
+
+pub trait TableExt {
+    fn get_request(&self, id: u32) -> Result<&(dyn HttpRequest), Error>;
+    fn get_request_mut(&mut self, id: u32) -> Result<&mut Box<dyn HttpRequest>, Error>;
+    fn delete_request(&mut self, id: u32) -> Result<(), Error>;
+
+    fn get_response(&self, id: u32) -> Result<&dyn HttpResponse, Error>;
+    fn get_response_mut(&mut self, id: u32) -> Result<&mut Box<dyn HttpResponse>, Error>;
+    fn delete_response(&mut self, id: u32) -> Result<(), Error>;
+
+    fn get_future(&self, id: u32) -> Result<&ActiveFuture, Error>;
+    fn get_future_mut(&mut self, id: u32) -> Result<&mut Box<ActiveFuture>, Error>;
+    fn delete_future(&mut self, id: u32) -> Result<(), Error>;
+
+    fn get_fields(&self, id: u32) -> Result<&ActiveFields, Error>;
+    fn get_fields_mut(&mut self, id: u32) -> Result<&mut Box<ActiveFields>, Error>;
+    fn delete_fields(&mut self, id: u32) -> Result<(), Error>;
+
+    fn get_response_by_stream(&self, id: u32) -> Result<&dyn HttpResponse, Error>;
+}
+
+impl TableExt for crate::common::Table {
+    fn get_request(&self, id: u32) -> Result<&dyn HttpRequest, Error> {
+        self.get::<Box<dyn HttpRequest>>(id).map(|f| f.as_ref())
+    }
+    fn get_request_mut(&mut self, id: u32) -> Result<&mut Box<dyn HttpRequest>, Error> {
+        self.get_mut::<Box<dyn HttpRequest>>(id)
+    }
+    fn delete_request(&mut self, id: u32) -> Result<(), Error> {
+        self.delete::<Box<dyn HttpRequest>>(id).map(|_old| ())
+    }
+
+    fn get_response(&self, id: u32) -> Result<&dyn HttpResponse, Error> {
+        self.get::<Box<dyn HttpResponse>>(id).map(|f| f.as_ref())
+    }
+    fn get_response_mut(&mut self, id: u32) -> Result<&mut Box<dyn HttpResponse>, Error> {
+        self.get_mut::<Box<dyn HttpResponse>>(id)
+    }
+    fn delete_response(&mut self, id: u32) -> Result<(), Error> {
+        self.delete::<Box<dyn HttpResponse>>(id).map(|_old| ())
+    }
+
+    fn get_future(&self, id: u32) -> Result<&ActiveFuture, Error> {
+        self.get::<Box<ActiveFuture>>(id).map(|f| f.as_ref())
+    }
+    fn get_future_mut(&mut self, id: u32) -> Result<&mut Box<ActiveFuture>, Error> {
+        self.get_mut::<Box<ActiveFuture>>(id)
+    }
+    fn delete_future(&mut self, id: u32) -> Result<(), Error> {
+        self.delete::<Box<ActiveFuture>>(id).map(|_old| ())
+    }
+
+    fn get_fields(&self, id: u32) -> Result<&ActiveFields, Error> {
+        self.get::<Box<ActiveFields>>(id).map(|f| f.as_ref())
+    }
+    fn get_fields_mut(&mut self, id: u32) -> Result<&mut Box<ActiveFields>, Error> {
+        self.get_mut::<Box<ActiveFields>>(id)
+    }
+    fn delete_fields(&mut self, id: u32) -> Result<(), Error> {
+        self.delete::<Box<ActiveFields>>(id).map(|_old| ())
+    }
+
+    fn get_response_by_stream(&self, id: u32) -> Result<&dyn HttpResponse, Error> {
+        for value in self.list::<Box<dyn HttpResponse>>().into_values() {
+            if Some(id) == value.body() {
+                return Ok(value.as_ref());
+            }
         }
+        Err(Error::trap(anyhow::Error::msg("response not found")))
+    }
+}
+
+#[cfg(test)]
+mod test {
+    use super::*;
+
+    #[test]
+    fn instantiate() {
+        WasiHttpCtx::new().unwrap();
     }
 }
diff --git a/crates/wasi-http/src/types_impl.rs b/crates/wasi-http/src/types_impl.rs
index 5757acebf69a..25c2bc9ce391 100644
--- a/crates/wasi-http/src/types_impl.rs
+++ b/crates/wasi-http/src/types_impl.rs
@@ -1,39 +1,45 @@
-use crate::r#struct::{ActiveRequest, Stream};
+use crate::bytestream::ByteStream;
+use crate::common::stream::TableStreamExt;
+use crate::r#struct::{ActiveFields, ActiveRequest, HttpFields, HttpRequest, TableExt};
 use crate::wasi::http::types::{
-    Error, Fields, FutureIncomingResponse, Headers, Host, IncomingRequest, IncomingResponse,
+    Error, Fields, FutureIncomingResponse, Headers, IncomingRequest, IncomingResponse,
     IncomingStream, Method, OutgoingRequest, OutgoingResponse, OutgoingStream, ResponseOutparam,
     Scheme, StatusCode, Trailers,
 };
 use crate::wasi::poll::poll::Pollable;
-use crate::WasiHttp;
+use crate::WasiHttpCtx;
 use anyhow::{anyhow, bail};
-use std::collections::{hash_map::Entry, HashMap};
 use tokio::runtime::{Handle, Runtime};
 
-impl Host for WasiHttp {
+fn convert(error: crate::common::Error) -> anyhow::Error {
+    // if let Some(errno) = error.downcast_ref() {
+    //     Error::UnexpectedError(errno.to_string())
+    // } else {
+    error.into()
+    // }
+}
+
+impl crate::wasi::http::types::Host for WasiHttpCtx {
     fn drop_fields(&mut self, fields: Fields) -> wasmtime::Result<()> {
-        self.fields.remove(&fields);
+        self.table_mut().delete_fields(fields).map_err(convert)?;
         Ok(())
     }
     fn new_fields(&mut self, entries: Vec<(String, String)>) -> wasmtime::Result<Fields> {
-        let mut map = HashMap::new();
-        for item in entries.iter() {
+        let mut map = ActiveFields::new();
+        for (key, value) in entries.iter() {
             let mut vec = std::vec::Vec::new();
-            vec.push(item.1.clone().into_bytes());
-            map.insert(item.0.clone(), vec);
+            vec.push(value.clone().into_bytes());
+            map.insert(key.clone(), vec);
         }
 
-        let id = self.fields_id_base;
-        self.fields_id_base = id + 1;
-        self.fields.insert(id, map);
-
+        let id = self.push_fields(Box::new(map)).map_err(convert)?;
         Ok(id)
     }
     fn fields_get(&mut self, fields: Fields, name: String) -> wasmtime::Result<Vec<Vec<u8>>> {
         let res = self
-            .fields
-            .get(&fields)
-            .ok_or_else(|| anyhow!("fields not found: {fields}"))?
+            .table_mut()
+            .get_fields(fields)
+            .map_err(convert)?
             .get(&name)
             .ok_or_else(|| anyhow!("key not found: {name}"))?
             .clone();
@@ -45,18 +51,18 @@ impl Host for WasiHttp {
         name: String,
         value: Vec<Vec<u8>>,
     ) -> wasmtime::Result<()> {
-        match self.fields.get_mut(&fields) {
-            Some(m) => {
+        match self.table_mut().get_fields_mut(fields) {
+            Ok(m) => {
                 m.insert(name, value.clone());
                 Ok(())
             }
-            None => bail!("fields not found"),
+            Err(_) => bail!("fields not found"),
         }
     }
     fn fields_delete(&mut self, fields: Fields, name: String) -> wasmtime::Result<()> {
-        match self.fields.get_mut(&fields) {
-            Some(m) => m.remove(&name),
-            None => None,
+        match self.table_mut().get_fields_mut(fields) {
+            Ok(m) => m.remove(&name),
+            Err(_) => None,
         };
         Ok(())
     }
@@ -66,10 +72,7 @@ impl Host for WasiHttp {
         name: String,
         value: Vec<u8>,
     ) -> wasmtime::Result<()> {
-        let m = self
-            .fields
-            .get_mut(&fields)
-            .ok_or_else(|| anyhow!("unknown fields: {fields}"))?;
+        let m = self.table_mut().get_fields_mut(fields).map_err(convert)?;
         match m.get_mut(&name) {
             Some(v) => v.push(value),
             None => {
@@ -81,9 +84,9 @@ impl Host for WasiHttp {
         Ok(())
     }
     fn fields_entries(&mut self, fields: Fields) -> wasmtime::Result<Vec<(String, Vec<u8>)>> {
-        let field_map = match self.fields.get(&fields) {
-            Some(m) => m,
-            None => bail!("fields not found."),
+        let field_map = match self.table().get_fields(fields) {
+            Ok(m) => m.iter(),
+            Err(_) => bail!("fields not found."),
         };
         let mut result = Vec::new();
         for (name, value) in field_map {
@@ -92,26 +95,18 @@ impl Host for WasiHttp {
         Ok(result)
     }
     fn fields_clone(&mut self, fields: Fields) -> wasmtime::Result<Fields> {
-        let id = self.fields_id_base;
-        self.fields_id_base = self.fields_id_base + 1;
-
-        let m = self
-            .fields
-            .get(&fields)
-            .ok_or_else(|| anyhow!("fields not found: {fields}"))?;
-        self.fields.insert(id, m.clone());
+        let m = self.table().get_fields(fields).map_err(convert)?;
+        let id = self.push_fields(Box::new(m.clone())).map_err(convert)?;
         Ok(id)
     }
-    fn finish_incoming_stream(&mut self, s: IncomingStream) -> wasmtime::Result<Option<Trailers>> {
-        for (_, value) in self.responses.iter() {
-            if value.body == s {
-                return match value.trailers {
-                    0 => Ok(None),
-                    _ => Ok(Some(value.trailers)),
-                };
-            }
+    fn finish_incoming_stream(
+        &mut self,
+        stream: IncomingStream,
+    ) -> wasmtime::Result<Option<Trailers>> {
+        match self.table().get_response_by_stream(stream) {
+            Ok(response) => Ok(response.trailers()),
+            Err(_) => bail!("unknown stream!"),
         }
-        bail!("unknown stream!")
     }
     fn finish_outgoing_stream(
         &mut self,
@@ -124,10 +119,12 @@ impl Host for WasiHttp {
         bail!("unimplemented: drop_incoming_request")
     }
     fn drop_outgoing_request(&mut self, request: OutgoingRequest) -> wasmtime::Result<()> {
-        if let Entry::Occupied(e) = self.requests.entry(request) {
-            let r = e.remove();
-            self.streams.remove(&r.body);
-        }
+        // if let Entry::Occupied(e) = self.requests.entry(request) {
+        //     let r = e.remove();
+        //     self.streams.remove(&r.body);
+        // }
+        self.table_mut().delete_request(request).map_err(convert)?;
+
         Ok(())
     }
     fn incoming_request_method(&mut self, _request: IncomingRequest) -> wasmtime::Result<Method> {
@@ -168,35 +165,32 @@ impl Host for WasiHttp {
         authority: Option<String>,
         headers: Headers,
     ) -> wasmtime::Result<OutgoingRequest> {
-        let id = self.request_id_base;
-        self.request_id_base = self.request_id_base + 1;
-
-        let mut req = ActiveRequest::new(id);
+        let mut req = ActiveRequest::new();
         req.path_with_query = path_with_query.unwrap_or("".to_string());
         req.authority = authority.unwrap_or("".to_string());
         req.method = method;
-        req.headers = match self.fields.get(&headers) {
-            Some(h) => h.clone(),
-            None => bail!("headers not found."),
-        };
+        req.headers = self.table().get_fields(headers).map_err(convert)?.clone();
         req.scheme = scheme;
-        self.requests.insert(id, req);
+        let id = self.push_request(Box::new(req)).map_err(convert)?;
         Ok(id)
     }
     fn outgoing_request_write(
         &mut self,
         request: OutgoingRequest,
     ) -> wasmtime::Result<Result<OutgoingStream, ()>> {
-        let req = self
-            .requests
-            .get_mut(&request)
-            .ok_or_else(|| anyhow!("unknown request: {request}"))?;
-        if req.body == 0 {
-            req.body = self.streams_id_base;
-            self.streams_id_base = self.streams_id_base + 1;
-            self.streams.insert(req.body, Stream::default());
-        }
-        Ok(Ok(req.body))
+        let req = self.table().get_request(request).map_err(convert)?;
+        Ok(Ok(req.body().unwrap_or_else(|| {
+            let buf = ByteStream::new();
+            let new = self
+                .push_output_stream(Box::new(buf))
+                .expect("valid output stream");
+            let req = self
+                .table_mut()
+                .get_request_mut(request)
+                .expect("request to be found");
+            req.set_body(new);
+            new
+        })))
     }
     fn drop_response_outparam(&mut self, _response: ResponseOutparam) -> wasmtime::Result<()> {
         bail!("unimplemented: drop_response_outparam")
@@ -209,10 +203,13 @@ impl Host for WasiHttp {
         bail!("unimplemented: set_response_outparam")
     }
     fn drop_incoming_response(&mut self, response: IncomingResponse) -> wasmtime::Result<()> {
-        if let Entry::Occupied(e) = self.responses.entry(response) {
-            let r = e.remove();
-            self.streams.remove(&r.body);
-        }
+        // if let Entry::Occupied(e) = self.responses.entry(response) {
+        //     let r = e.remove();
+        //     self.streams.remove(&r.body);
+        // }
+        self.table_mut()
+            .delete_response(response)
+            .map_err(convert)?;
         Ok(())
     }
     fn drop_outgoing_response(&mut self, _response: OutgoingResponse) -> wasmtime::Result<()> {
@@ -222,36 +219,23 @@ impl Host for WasiHttp {
         &mut self,
         response: IncomingResponse,
     ) -> wasmtime::Result<StatusCode> {
-        let r = self
-            .responses
-            .get(&response)
-            .ok_or_else(|| anyhow!("response not found: {response}"))?;
-        Ok(r.status)
+        let r = self.table().get_response(response).map_err(convert)?;
+        Ok(r.status())
     }
     fn incoming_response_headers(
         &mut self,
         response: IncomingResponse,
     ) -> wasmtime::Result<Headers> {
-        let r = self
-            .responses
-            .get(&response)
-            .ok_or_else(|| anyhow!("response not found: {response}"))?;
-        let id = self.fields_id_base;
-        self.fields_id_base = self.fields_id_base + 1;
-
-        self.fields.insert(id, r.response_headers.clone());
+        let r = self.table().get_response(response).map_err(convert)?;
+        let id = self.push_fields(Box::new(r.headers())).map_err(convert)?;
         Ok(id)
     }
     fn incoming_response_consume(
         &mut self,
         response: IncomingResponse,
     ) -> wasmtime::Result<Result<IncomingStream, ()>> {
-        let r = self
-            .responses
-            .get(&response)
-            .ok_or_else(|| anyhow!("response not found: {response}"))?;
-
-        Ok(Ok(r.body))
+        let r = self.table().get_response(response).map_err(convert)?;
+        Ok(Ok(r.body().unwrap_or(0)))
     }
     fn new_outgoing_response(
         &mut self,
@@ -270,17 +254,14 @@ impl Host for WasiHttp {
         &mut self,
         future: FutureIncomingResponse,
     ) -> wasmtime::Result<()> {
-        self.futures.remove(&future);
+        self.table_mut().delete_future(future)?;
         Ok(())
     }
     fn future_incoming_response_get(
         &mut self,
         future: FutureIncomingResponse,
     ) -> wasmtime::Result<Option<Result<IncomingResponse, Error>>> {
-        let f = self
-            .futures
-            .get(&future)
-            .ok_or_else(|| anyhow!("future not found: {future}"))?;
+        let f = self.table().get_future(future).map_err(convert)?;
 
         let (handle, _runtime) = match Handle::try_current() {
             Ok(h) => (h, None),

From b3060d64464de893c1a1ad607c87f18100e2f6ef Mon Sep 17 00:00:00 2001
From: Eduardo Rodrigues <eduardomourar@users.noreply.github.com>
Date: Mon, 17 Apr 2023 09:57:53 +0200
Subject: [PATCH 02/49] feat(wasi-http): allow bidirectional stream

---
 crates/wasi-http/src/bytestream.rs    | 102 +++++++++++++++++++++++---
 crates/wasi-http/src/common/stream.rs |  22 ++++++
 crates/wasi-http/src/common/table.rs  |   1 -
 crates/wasi-http/src/http_impl.rs     |  16 ++--
 4 files changed, 120 insertions(+), 21 deletions(-)

diff --git a/crates/wasi-http/src/bytestream.rs b/crates/wasi-http/src/bytestream.rs
index 8107a1a86d49..ba0819695527 100644
--- a/crates/wasi-http/src/bytestream.rs
+++ b/crates/wasi-http/src/bytestream.rs
@@ -1,15 +1,39 @@
-use crate::common::{Error, InputStream, OutputStream};
+use crate::common::{Error, ErrorExt, InputStream, OutputStream};
 use bytes::{Buf, BufMut, Bytes, BytesMut};
 use std::any::Any;
 use std::ops::{Deref, DerefMut};
 use std::vec::Vec;
 
 #[derive(Clone, Debug)]
-pub struct ByteStream(Bytes);
+pub struct ByteStream {
+    inner: Bytes,
+    is_readable: bool,
+    is_writable: bool,
+}
 
 impl ByteStream {
     pub fn new() -> Self {
-        Self(Bytes::new())
+        Self {
+            inner: Bytes::new(),
+            is_readable: true,
+            is_writable: true,
+        }
+    }
+
+    pub fn new_readable() -> Self {
+        Self {
+            inner: Bytes::new(),
+            is_readable: true,
+            is_writable: false,
+        }
+    }
+
+    pub fn new_writable() -> Self {
+        Self {
+            inner: Bytes::new(),
+            is_readable: false,
+            is_writable: true,
+        }
     }
 }
 
@@ -20,7 +44,7 @@ impl InputStream for ByteStream {
 
     fn read(&mut self, buf: &mut [u8]) -> Result<(u64, bool), Error> {
         let len = buf.len();
-        let mut s = BytesMut::from(self.0.as_ref());
+        let mut s = BytesMut::from(self.inner.as_ref());
         let size = s.len();
         if len == 0 || size == 0 {
             Ok((0, true))
@@ -35,7 +59,19 @@ impl InputStream for ByteStream {
     }
 
     fn readable(&self) -> Result<(), Error> {
-        Ok(())
+        if self.is_readable {
+            Ok(())
+        } else {
+            Err(self::Error::badf().context("stream is not readable"))
+        }
+    }
+
+    fn writable(&self) -> Result<(), Error> {
+        if self.is_writable {
+            Ok(())
+        } else {
+            Err(self::Error::badf().context("stream is not writable"))
+        }
     }
 }
 
@@ -44,45 +80,87 @@ impl OutputStream for ByteStream {
         self
     }
 
+    fn read(&mut self, buf: &mut [u8]) -> Result<(u64, bool), Error> {
+        let len = buf.len();
+        let mut s = BytesMut::from(self.inner.as_ref());
+        let size = s.len();
+        if len == 0 || size == 0 {
+            Ok((0, true))
+        } else if size > len {
+            s.advance(len);
+            buf.copy_from_slice(&s);
+            Ok((len.try_into()?, false))
+        } else {
+            buf[..size].copy_from_slice(&s);
+            Ok((size.try_into()?, true))
+        }
+    }
+
     fn write(&mut self, buf: &[u8]) -> Result<u64, Error> {
-        let data = &self.0;
+        let data = &self.inner;
         let buf_len = buf.len();
         let len = data.len() + buf_len;
         if len > 0 {
             let mut new = BytesMut::with_capacity(len);
             new.put(Bytes::from(data.clone()));
             new.put(buf);
-            self.0 = new.freeze().into();
+            self.inner = new.freeze().into();
         }
         Ok(buf_len.try_into()?)
     }
 
+    fn readable(&self) -> Result<(), Error> {
+        if self.is_readable {
+            Ok(())
+        } else {
+            Err(self::Error::badf().context("stream is not readable"))
+        }
+    }
+
     fn writable(&self) -> Result<(), Error> {
-        Ok(())
+        if self.is_writable {
+            Ok(())
+        } else {
+            Err(self::Error::badf().context("stream is not writable"))
+        }
     }
 }
 
 impl From<Bytes> for ByteStream {
     fn from(buf: Bytes) -> ByteStream {
-        ByteStream(buf)
+        ByteStream {
+            inner: buf,
+            is_readable: true,
+            is_writable: true,
+        }
+    }
+}
+
+impl Into<Bytes> for ByteStream {
+    fn into(self) -> Bytes {
+        self.inner
     }
 }
 
 impl From<Vec<u8>> for ByteStream {
     fn from(vec: Vec<u8>) -> ByteStream {
-        ByteStream(Bytes::from(vec))
+        ByteStream {
+            inner: Bytes::from(vec),
+            is_readable: true,
+            is_writable: true,
+        }
     }
 }
 
 impl Deref for ByteStream {
     type Target = Bytes;
     fn deref(&self) -> &Bytes {
-        &self.0
+        &self.inner
     }
 }
 
 impl DerefMut for ByteStream {
     fn deref_mut(&mut self) -> &mut Bytes {
-        &mut self.0
+        &mut self.inner
     }
 }
diff --git a/crates/wasi-http/src/common/stream.rs b/crates/wasi-http/src/common/stream.rs
index c4fe13c2a9d8..6eb6afa18abc 100644
--- a/crates/wasi-http/src/common/stream.rs
+++ b/crates/wasi-http/src/common/stream.rs
@@ -54,6 +54,9 @@ pub trait InputStream: Send + Sync {
 
     /// Test whether this stream is readable.
     fn readable(&self) -> Result<(), Error>;
+
+    /// Test whether this stream is writeable.
+    fn writable(&self) -> Result<(), Error>;
 }
 
 /// An output bytestream.
@@ -80,6 +83,12 @@ pub trait OutputStream: Send + Sync {
         false
     }
 
+    /// Read bytes. On success, returns a pair holding the number of bytes read
+    /// and a flag indicating whether the end of the stream was reached.
+    fn read(&mut self, _buf: &mut [u8]) -> Result<(u64, bool), Error> {
+        Err(Error::badf())
+    }
+
     /// Transfer bytes directly from an input stream to an output stream.
     fn splice(&mut self, src: &mut dyn InputStream, nelem: u64) -> Result<(u64, bool), Error> {
         let mut nspliced = 0;
@@ -116,10 +125,23 @@ pub trait OutputStream: Send + Sync {
         Ok(nwritten)
     }
 
+    /// Test whether this stream is readable.
+    fn readable(&self) -> Result<(), Error>;
+
     /// Test whether this stream is writeable.
     fn writable(&self) -> Result<(), Error>;
 }
 
+impl<'a> TryInto<&'a [u8]> for &mut Box<dyn OutputStream> {
+    type Error = Error;
+
+    fn try_into(self) -> Result<&'a [u8], Self::Error> {
+        let buffer: &mut [u8] = &mut [];
+        self.readable().map(|_| self.read(buffer))?;
+        Ok(buffer)
+    }
+}
+
 pub trait TableStreamExt {
     fn get_input_stream(&self, fd: u32) -> Result<&dyn InputStream, Error>;
     fn get_input_stream_mut(&mut self, fd: u32) -> Result<&mut Box<dyn InputStream>, Error>;
diff --git a/crates/wasi-http/src/common/table.rs b/crates/wasi-http/src/common/table.rs
index 22b491e7561f..5269f3d1611c 100644
--- a/crates/wasi-http/src/common/table.rs
+++ b/crates/wasi-http/src/common/table.rs
@@ -105,7 +105,6 @@ impl Table {
     pub fn list<T: Any + Sized>(&self) -> HashMap<u32, &T> {
         let mut result: HashMap<u32, &T> = HashMap::new();
         for (key, value) in self.map.iter() {
-            let _test = value.is::<T>();
             if let Some(r) = value.downcast_ref::<T>() {
                 result.insert(*key, r);
             }
diff --git a/crates/wasi-http/src/http_impl.rs b/crates/wasi-http/src/http_impl.rs
index 9551a0f4a555..879a563f1fb3 100644
--- a/crates/wasi-http/src/http_impl.rs
+++ b/crates/wasi-http/src/http_impl.rs
@@ -6,6 +6,7 @@ pub use crate::WasiHttpCtx;
 #[cfg(not(any(target_arch = "riscv64", target_arch = "s390x")))]
 use anyhow::anyhow;
 use anyhow::bail;
+use bytes::Bytes;
 use http_body::Body;
 use http_body_util::{BodyExt, Empty, Full};
 use hyper::Method;
@@ -171,14 +172,13 @@ impl WasiHttpCtx {
         }
 
         let mut response = ActiveResponse::new();
-        let body = Full::<&[u8]>::new(
-            &[],
-            // table
-            //     .get_output_stream(request.body().unwrap_or(0))
-            //     .unwrap_or(&ByteStream::new())
-            //     .clone()
-            //     .into(),
-        );
+        let body = match request.body() {
+            Some(body) => {
+                let slice: &[u8] = table.get_output_stream_mut(body)?.try_into()?;
+                Full::<&[u8]>::new(slice.as_ref())
+            }
+            None => Full::<&[u8]>::default(),
+        };
         let t = timeout(first_bytes_timeout, sender.send_request(call.body(body)?)).await?;
         let mut res = t?;
         response.status = res.status().try_into()?;

From 4f6341f5e15b91acd39d3104b09553f9820a42b0 Mon Sep 17 00:00:00 2001
From: Eduardo Rodrigues <eduardomourar@users.noreply.github.com>
Date: Mon, 17 Apr 2023 12:17:13 +0200
Subject: [PATCH 03/49] feat(wasi-http): clean up children when dropping
 resource

---
 crates/wasi-http/src/common/stream.rs |  2 +-
 crates/wasi-http/src/http_impl.rs     | 19 ++++++++++------
 crates/wasi-http/src/struct.rs        | 30 ++++++++++++++++---------
 crates/wasi-http/src/types_impl.rs    | 32 ++++++++++++++++++++++++---
 4 files changed, 62 insertions(+), 21 deletions(-)

diff --git a/crates/wasi-http/src/common/stream.rs b/crates/wasi-http/src/common/stream.rs
index 6eb6afa18abc..3a7b9dab0afe 100644
--- a/crates/wasi-http/src/common/stream.rs
+++ b/crates/wasi-http/src/common/stream.rs
@@ -137,7 +137,7 @@ impl<'a> TryInto<&'a [u8]> for &mut Box<dyn OutputStream> {
 
     fn try_into(self) -> Result<&'a [u8], Self::Error> {
         let buffer: &mut [u8] = &mut [];
-        self.readable().map(|_| self.read(buffer))?;
+        let _ = self.readable().map(|_| self.read(buffer))?;
         Ok(buffer)
     }
 }
diff --git a/crates/wasi-http/src/http_impl.rs b/crates/wasi-http/src/http_impl.rs
index 879a563f1fb3..8263a6c59dc9 100644
--- a/crates/wasi-http/src/http_impl.rs
+++ b/crates/wasi-http/src/http_impl.rs
@@ -6,9 +6,7 @@ pub use crate::WasiHttpCtx;
 #[cfg(not(any(target_arch = "riscv64", target_arch = "s390x")))]
 use anyhow::anyhow;
 use anyhow::bail;
-use bytes::Bytes;
-use http_body::Body;
-use http_body_util::{BodyExt, Empty, Full};
+use http_body_util::{BodyExt, Full};
 use hyper::Method;
 use hyper::Request;
 #[cfg(not(any(target_arch = "riscv64", target_arch = "s390x")))]
@@ -165,9 +163,11 @@ impl WasiHttpCtx {
             .uri(url)
             .header(hyper::header::HOST, request.authority());
 
-        for (key, val) in request.headers().iter() {
-            for item in val {
-                call = call.header(key, item.clone());
+        if let Some(headers) = request.headers() {
+            for (key, val) in table.get_fields(headers)?.iter() {
+                for item in val {
+                    call = call.header(key, item.clone());
+                }
             }
         }
 
@@ -182,11 +182,16 @@ impl WasiHttpCtx {
         let t = timeout(first_bytes_timeout, sender.send_request(call.body(body)?)).await?;
         let mut res = t?;
         response.status = res.status().try_into()?;
+
+        let mut map = ActiveFields::new();
         for (key, value) in res.headers().iter() {
             let mut vec = Vec::new();
             vec.push(value.as_bytes().to_vec());
-            response.headers().insert(key.as_str().to_string(), vec);
+            map.insert(key.as_str().to_string(), vec);
         }
+        let headers = self.push_fields(Box::new(map)).map_err(convert)?;
+        response.set_headers(headers);
+
         let mut buf: Vec<u8> = Vec::new();
         while let Some(next) = timeout(between_bytes_timeout, res.frame()).await? {
             let frame = next?;
diff --git a/crates/wasi-http/src/struct.rs b/crates/wasi-http/src/struct.rs
index 7be25b463d0e..25335a1f554f 100644
--- a/crates/wasi-http/src/struct.rs
+++ b/crates/wasi-http/src/struct.rs
@@ -82,7 +82,7 @@ pub struct ActiveRequest {
     pub scheme: Option<Scheme>,
     pub path_with_query: String,
     pub authority: String,
-    pub headers: ActiveFields,
+    pub headers: Option<u32>,
     pub body: Option<u32>,
 }
 
@@ -97,7 +97,8 @@ pub trait HttpRequest: Send + Sync {
     fn scheme(&self) -> &Option<Scheme>;
     fn path_with_query(&self) -> &str;
     fn authority(&self) -> &str;
-    fn headers(&self) -> ActiveFields;
+    fn headers(&self) -> Option<u32>;
+    fn set_headers(&mut self, headers: u32);
     fn body(&self) -> Option<u32>;
     fn set_body(&mut self, body: u32);
 }
@@ -110,7 +111,7 @@ impl HttpRequest for ActiveRequest {
             scheme: Some(Scheme::Http),
             path_with_query: "".to_string(),
             authority: "".to_string(),
-            headers: ActiveFields::new(),
+            headers: None,
             body: None,
         }
     }
@@ -135,8 +136,12 @@ impl HttpRequest for ActiveRequest {
         &self.authority
     }
 
-    fn headers(&self) -> ActiveFields {
-        self.headers.clone()
+    fn headers(&self) -> Option<u32> {
+        self.headers
+    }
+
+    fn set_headers(&mut self, headers: u32) {
+        self.headers = Some(headers);
     }
 
     fn body(&self) -> Option<u32> {
@@ -152,7 +157,7 @@ impl HttpRequest for ActiveRequest {
 pub struct ActiveResponse {
     pub active: bool,
     pub status: u16,
-    pub headers: ActiveFields,
+    pub headers: Option<u32>,
     pub body: Option<u32>,
     pub trailers: Option<u32>,
 }
@@ -165,7 +170,8 @@ pub trait HttpResponse: Send + Sync {
     fn as_any(&self) -> &dyn Any;
 
     fn status(&self) -> u16;
-    fn headers(&self) -> ActiveFields;
+    fn headers(&self) -> Option<u32>;
+    fn set_headers(&mut self, headers: u32);
     fn body(&self) -> Option<u32>;
     fn set_body(&mut self, body: u32);
     fn trailers(&self) -> Option<u32>;
@@ -177,7 +183,7 @@ impl HttpResponse for ActiveResponse {
         Self {
             active: false,
             status: 0,
-            headers: ActiveFields::new(),
+            headers: None,
             body: None,
             trailers: None,
         }
@@ -191,8 +197,12 @@ impl HttpResponse for ActiveResponse {
         self.status
     }
 
-    fn headers(&self) -> ActiveFields {
-        self.headers.clone()
+    fn headers(&self) -> Option<u32> {
+        self.headers
+    }
+
+    fn set_headers(&mut self, headers: u32) {
+        self.headers = Some(headers);
     }
 
     fn body(&self) -> Option<u32> {
diff --git a/crates/wasi-http/src/types_impl.rs b/crates/wasi-http/src/types_impl.rs
index 25c2bc9ce391..583d468e1f62 100644
--- a/crates/wasi-http/src/types_impl.rs
+++ b/crates/wasi-http/src/types_impl.rs
@@ -123,6 +123,18 @@ impl crate::wasi::http::types::Host for WasiHttpCtx {
         //     let r = e.remove();
         //     self.streams.remove(&r.body);
         // }
+        let r = self.table().get_request(request).map_err(convert)?;
+
+        // Cleanup dependant resources
+        let body = r.body();
+        let headers = r.headers();
+        if let Some(b) = body {
+            self.drop_output_stream(b).unwrap_or_else(|_| ());
+        }
+        if let Some(h) = headers {
+            self.drop_fields(h).unwrap_or_else(|_| ());
+        }
+
         self.table_mut().delete_request(request).map_err(convert)?;
 
         Ok(())
@@ -169,7 +181,7 @@ impl crate::wasi::http::types::Host for WasiHttpCtx {
         req.path_with_query = path_with_query.unwrap_or("".to_string());
         req.authority = authority.unwrap_or("".to_string());
         req.method = method;
-        req.headers = self.table().get_fields(headers).map_err(convert)?.clone();
+        req.headers = Some(headers);
         req.scheme = scheme;
         let id = self.push_request(Box::new(req)).map_err(convert)?;
         Ok(id)
@@ -207,6 +219,21 @@ impl crate::wasi::http::types::Host for WasiHttpCtx {
         //     let r = e.remove();
         //     self.streams.remove(&r.body);
         // }
+        let r = self.table().get_response(response).map_err(convert)?;
+
+        // Cleanup dependant resources
+        let body = r.body();
+        let headers = r.headers();
+        if let Some(b) = body {
+            if let Some(trailers) = self.finish_incoming_stream(b)? {
+                self.drop_fields(trailers).unwrap_or_else(|_| ());
+            }
+            self.drop_input_stream(b).unwrap_or_else(|_| ());
+        }
+        if let Some(h) = headers {
+            self.drop_fields(h).unwrap_or_else(|_| ());
+        }
+
         self.table_mut()
             .delete_response(response)
             .map_err(convert)?;
@@ -227,8 +254,7 @@ impl crate::wasi::http::types::Host for WasiHttpCtx {
         response: IncomingResponse,
     ) -> wasmtime::Result<Headers> {
         let r = self.table().get_response(response).map_err(convert)?;
-        let id = self.push_fields(Box::new(r.headers())).map_err(convert)?;
-        Ok(id)
+        Ok(r.headers().unwrap_or(0))
     }
     fn incoming_response_consume(
         &mut self,

From 09fde0d9a59df1a380b31ebf9e73d56e72549713 Mon Sep 17 00:00:00 2001
From: Eduardo Rodrigues <eduardomourar@users.noreply.github.com>
Date: Mon, 17 Apr 2023 18:09:41 +0200
Subject: [PATCH 04/49] chore: update based on feedback

---
 crates/wasi-http/src/types_impl.rs | 11 +++++------
 1 file changed, 5 insertions(+), 6 deletions(-)

diff --git a/crates/wasi-http/src/types_impl.rs b/crates/wasi-http/src/types_impl.rs
index 583d468e1f62..5f51dca35479 100644
--- a/crates/wasi-http/src/types_impl.rs
+++ b/crates/wasi-http/src/types_impl.rs
@@ -26,10 +26,8 @@ impl crate::wasi::http::types::Host for WasiHttpCtx {
     }
     fn new_fields(&mut self, entries: Vec<(String, String)>) -> wasmtime::Result<Fields> {
         let mut map = ActiveFields::new();
-        for (key, value) in entries.iter() {
-            let mut vec = std::vec::Vec::new();
-            vec.push(value.clone().into_bytes());
-            map.insert(key.clone(), vec);
+        for (key, value) in entries {
+            map.insert(key, vec![value.clone().into_bytes()]);
         }
 
         let id = self.push_fields(Box::new(map)).map_err(convert)?;
@@ -191,7 +189,7 @@ impl crate::wasi::http::types::Host for WasiHttpCtx {
         request: OutgoingRequest,
     ) -> wasmtime::Result<Result<OutgoingStream, ()>> {
         let req = self.table().get_request(request).map_err(convert)?;
-        Ok(Ok(req.body().unwrap_or_else(|| {
+        let body = req.body().unwrap_or_else(|| {
             let buf = ByteStream::new();
             let new = self
                 .push_output_stream(Box::new(buf))
@@ -202,7 +200,8 @@ impl crate::wasi::http::types::Host for WasiHttpCtx {
                 .expect("request to be found");
             req.set_body(new);
             new
-        })))
+        });
+        Ok(Ok(body))
     }
     fn drop_response_outparam(&mut self, _response: ResponseOutparam) -> wasmtime::Result<()> {
         bail!("unimplemented: drop_response_outparam")

From feb5cf8949dc0dbb7bcf57f5cdbf6f73912c1db1 Mon Sep 17 00:00:00 2001
From: Eduardo Rodrigues <eduardomourar@users.noreply.github.com>
Date: Tue, 18 Apr 2023 10:52:20 +0200
Subject: [PATCH 05/49] chore: replace wasi http context references

---
 crates/test-programs/tests/wasi-http.rs | 6 +++---
 src/commands/run.rs                     | 6 +++---
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/crates/test-programs/tests/wasi-http.rs b/crates/test-programs/tests/wasi-http.rs
index e6a5480e7df8..55ed54dc8a0b 100644
--- a/crates/test-programs/tests/wasi-http.rs
+++ b/crates/test-programs/tests/wasi-http.rs
@@ -1,7 +1,7 @@
 #![cfg(all(feature = "test_programs", not(skip_wasi_http_tests)))]
 use wasmtime::{Config, Engine, Linker, Store};
 use wasmtime_wasi::{sync::WasiCtxBuilder, WasiCtx};
-use wasmtime_wasi_http::WasiHttp;
+use wasmtime_wasi_http::WasiHttpCtx;
 
 use http_body_util::combinators::BoxBody;
 use http_body_util::BodyExt;
@@ -69,7 +69,7 @@ pub fn run(name: &str) -> anyhow::Result<()> {
 
     struct Ctx {
         wasi: WasiCtx,
-        http: WasiHttp,
+        http: WasiHttpCtx,
     }
 
     wasmtime_wasi::sync::add_to_linker(&mut linker, |cx: &mut Ctx| &mut cx.wasi)?;
@@ -82,7 +82,7 @@ pub fn run(name: &str) -> anyhow::Result<()> {
         &ENGINE,
         Ctx {
             wasi,
-            http: WasiHttp::new(),
+            http: WasiHttpCtx::new(),
         },
     );
 
diff --git a/src/commands/run.rs b/src/commands/run.rs
index 8a124291a0d0..aa263f98b902 100644
--- a/src/commands/run.rs
+++ b/src/commands/run.rs
@@ -24,7 +24,7 @@ use wasmtime_wasi_nn::WasiNnCtx;
 use wasmtime_wasi_threads::WasiThreadsCtx;
 
 #[cfg(feature = "wasi-http")]
-use wasmtime_wasi_http::WasiHttp;
+use wasmtime_wasi_http::WasiHttpCtx;
 
 fn parse_env_var(s: &str) -> Result<(String, Option<String>)> {
     let mut parts = s.splitn(2, '=');
@@ -665,7 +665,7 @@ struct Host {
     #[cfg(feature = "wasi-threads")]
     wasi_threads: Option<Arc<WasiThreadsCtx<Host>>>,
     #[cfg(feature = "wasi-http")]
-    wasi_http: Option<WasiHttp>,
+    wasi_http: Option<WasiHttpCtx>,
     limits: StoreLimits,
     guest_profiler: Option<Arc<GuestProfiler>>,
 }
@@ -765,7 +765,7 @@ fn populate_with_wasi(
         }
         #[cfg(feature = "wasi-http")]
         {
-            let w_http = WasiHttp::new();
+            let w_http = WasiHttpCtx::new();
             wasmtime_wasi_http::add_to_linker(linker, |host: &mut Host| {
                 host.wasi_http.as_mut().unwrap()
             })?;

From 1d7fa1c6fb56216524baf5ad5266344e97654e68 Mon Sep 17 00:00:00 2001
From: Eduardo Rodrigues <eduardomourar@users.noreply.github.com>
Date: Tue, 18 Apr 2023 10:53:23 +0200
Subject: [PATCH 06/49] chore: fix logical issue with outgoing body stream

---
 crates/wasi-http/src/common/stream.rs | 24 +++++++++++++++++++-----
 crates/wasi-http/src/http_impl.rs     | 12 +++++-------
 2 files changed, 24 insertions(+), 12 deletions(-)

diff --git a/crates/wasi-http/src/common/stream.rs b/crates/wasi-http/src/common/stream.rs
index 3a7b9dab0afe..3562ce868f19 100644
--- a/crates/wasi-http/src/common/stream.rs
+++ b/crates/wasi-http/src/common/stream.rs
@@ -1,4 +1,5 @@
 use super::{Error, ErrorExt};
+use bytes::Bytes;
 use std::any::Any;
 
 /// An input bytestream.
@@ -132,13 +133,26 @@ pub trait OutputStream: Send + Sync {
     fn writable(&self) -> Result<(), Error>;
 }
 
-impl<'a> TryInto<&'a [u8]> for &mut Box<dyn OutputStream> {
+impl TryInto<Bytes> for &mut Box<dyn OutputStream> {
     type Error = Error;
 
-    fn try_into(self) -> Result<&'a [u8], Self::Error> {
-        let buffer: &mut [u8] = &mut [];
-        let _ = self.readable().map(|_| self.read(buffer))?;
-        Ok(buffer)
+    fn try_into(self) -> Result<Bytes, Self::Error> {
+        self.readable()?;
+        let mut buffer = Vec::new();
+        let mut eof = false;
+        while !eof {
+            let buffer_len = 0x400000;
+            let mut vec_buffer = vec![0; buffer_len];
+
+            let (bytes_read, end) = self.read(&mut vec_buffer)?;
+
+            let bytes_read = bytes_read as usize;
+            vec_buffer.truncate(bytes_read);
+
+            eof = end;
+            buffer.append(&mut vec_buffer);
+        }
+        Ok(Bytes::from(buffer))
     }
 }
 
diff --git a/crates/wasi-http/src/http_impl.rs b/crates/wasi-http/src/http_impl.rs
index 8263a6c59dc9..e7106529a45f 100644
--- a/crates/wasi-http/src/http_impl.rs
+++ b/crates/wasi-http/src/http_impl.rs
@@ -6,6 +6,7 @@ pub use crate::WasiHttpCtx;
 #[cfg(not(any(target_arch = "riscv64", target_arch = "s390x")))]
 use anyhow::anyhow;
 use anyhow::bail;
+use bytes::Bytes;
 use http_body_util::{BodyExt, Full};
 use hyper::Method;
 use hyper::Request;
@@ -172,13 +173,10 @@ impl WasiHttpCtx {
         }
 
         let mut response = ActiveResponse::new();
-        let body = match request.body() {
-            Some(body) => {
-                let slice: &[u8] = table.get_output_stream_mut(body)?.try_into()?;
-                Full::<&[u8]>::new(slice.as_ref())
-            }
-            None => Full::<&[u8]>::default(),
-        };
+        let body = Full::<Bytes>::new(match request.body() {
+            Some(body) => table.get_output_stream_mut(body)?.try_into()?,
+            None => Bytes::new(),
+        });
         let t = timeout(first_bytes_timeout, sender.send_request(call.body(body)?)).await?;
         let mut res = t?;
         response.status = res.status().try_into()?;

From 50228b106faa01494967de4bef302354bb5ff919 Mon Sep 17 00:00:00 2001
From: Eduardo Rodrigues <eduardomourar@users.noreply.github.com>
Date: Tue, 18 Apr 2023 17:21:15 +0200
Subject: [PATCH 07/49] chore: use thread-safe reference-counting pointer

---
 src/commands/run.rs | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/src/commands/run.rs b/src/commands/run.rs
index aa263f98b902..f9ef3ef560bd 100644
--- a/src/commands/run.rs
+++ b/src/commands/run.rs
@@ -665,7 +665,7 @@ struct Host {
     #[cfg(feature = "wasi-threads")]
     wasi_threads: Option<Arc<WasiThreadsCtx<Host>>>,
     #[cfg(feature = "wasi-http")]
-    wasi_http: Option<WasiHttpCtx>,
+    wasi_http: Option<Arc<WasiHttpCtx>>,
     limits: StoreLimits,
     guest_profiler: Option<Arc<GuestProfiler>>,
 }
@@ -765,11 +765,12 @@ fn populate_with_wasi(
         }
         #[cfg(feature = "wasi-http")]
         {
-            let w_http = WasiHttpCtx::new();
-            wasmtime_wasi_http::add_to_linker(linker, |host: &mut Host| {
-                host.wasi_http.as_mut().unwrap()
+            wasmtime_wasi_http::add_to_linker(linker, |host| {
+                // See documentation for wasi-crypto for why this is needed.
+                Arc::get_mut(host.wasi_http.as_mut().unwrap())
+                    .expect("wasi-http is not implemented with multi-threading support")
             })?;
-            store.data_mut().wasi_http = Some(w_http);
+            store.data_mut().wasi_http = Some(Arc::new(WasiHttpCtx::new()));
         }
     }
 

From 83bed058bd13de45fb868847302a0268fc77f015 Mon Sep 17 00:00:00 2001
From: Eduardo Rodrigues <eduardomourar@users.noreply.github.com>
Date: Thu, 27 Jul 2023 18:30:21 +0100
Subject: [PATCH 08/49] chore: cleanup resources using table

---
 crates/wasi-http/src/types_impl.rs | 16 +++++++++++-----
 1 file changed, 11 insertions(+), 5 deletions(-)

diff --git a/crates/wasi-http/src/types_impl.rs b/crates/wasi-http/src/types_impl.rs
index 5f51dca35479..dfacefabbff3 100644
--- a/crates/wasi-http/src/types_impl.rs
+++ b/crates/wasi-http/src/types_impl.rs
@@ -127,10 +127,12 @@ impl crate::wasi::http::types::Host for WasiHttpCtx {
         let body = r.body();
         let headers = r.headers();
         if let Some(b) = body {
-            self.drop_output_stream(b).unwrap_or_else(|_| ());
+            self.table_mut()
+                .delete_output_stream(b)
+                .unwrap_or_else(|_| ());
         }
         if let Some(h) = headers {
-            self.drop_fields(h).unwrap_or_else(|_| ());
+            self.table_mut().delete_fields(h).unwrap_or_else(|_| ());
         }
 
         self.table_mut().delete_request(request).map_err(convert)?;
@@ -225,12 +227,16 @@ impl crate::wasi::http::types::Host for WasiHttpCtx {
         let headers = r.headers();
         if let Some(b) = body {
             if let Some(trailers) = self.finish_incoming_stream(b)? {
-                self.drop_fields(trailers).unwrap_or_else(|_| ());
+                self.table_mut()
+                    .delete_fields(trailers)
+                    .unwrap_or_else(|_| ());
             }
-            self.drop_input_stream(b).unwrap_or_else(|_| ());
+            self.table_mut()
+                .delete_input_stream(b)
+                .unwrap_or_else(|_| ());
         }
         if let Some(h) = headers {
-            self.drop_fields(h).unwrap_or_else(|_| ());
+            self.table_mut().delete_fields(h).unwrap_or_else(|_| ());
         }
 
         self.table_mut()

From fb9aec9fc980392b9c460b9d60e9a2bf98e36fe2 Mon Sep 17 00:00:00 2001
From: Eduardo Rodrigues <eduardomourar@users.noreply.github.com>
Date: Thu, 3 Aug 2023 23:01:29 +0100
Subject: [PATCH 09/49] fix(wasi-preview1-component-adapter): sync command
 extended wit

---
 .../isle_generated_code/clif_lower.isle       |  1485 +
 .../codegen/isle_generated_code/clif_opt.isle |  1752 ++
 .../isle_generated_code/isle_aarch64.rs       | 16275 ++++++++++
 .../codegen/isle_generated_code/isle_opt.rs   |  6676 ++++
 .../isle_generated_code/isle_riscv64.rs       | 18461 +++++++++++
 .../codegen/isle_generated_code/isle_s390x.rs | 25403 ++++++++++++++++
 .../codegen/isle_generated_code/isle_x64.rs   | 20315 ++++++++++++
 7 files changed, 90367 insertions(+)
 create mode 100644 cranelift/codegen/isle_generated_code/clif_lower.isle
 create mode 100644 cranelift/codegen/isle_generated_code/clif_opt.isle
 create mode 100644 cranelift/codegen/isle_generated_code/isle_aarch64.rs
 create mode 100644 cranelift/codegen/isle_generated_code/isle_opt.rs
 create mode 100644 cranelift/codegen/isle_generated_code/isle_riscv64.rs
 create mode 100644 cranelift/codegen/isle_generated_code/isle_s390x.rs
 create mode 100644 cranelift/codegen/isle_generated_code/isle_x64.rs

diff --git a/cranelift/codegen/isle_generated_code/clif_lower.isle b/cranelift/codegen/isle_generated_code/clif_lower.isle
new file mode 100644
index 000000000000..412489b201d7
--- /dev/null
+++ b/cranelift/codegen/isle_generated_code/clif_lower.isle
@@ -0,0 +1,1485 @@
+;; GENERATED BY `gen_isle`. DO NOT EDIT!!!
+;;
+;; This ISLE file defines all the external type declarations for Cranelift's
+;; data structures that ISLE will process, such as `InstructionData` and
+;; `Opcode`.
+
+;;;; Extern type declarations for immediates ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+(type Constant (primitive Constant))
+(type DynamicStackSlot (primitive DynamicStackSlot))
+(type FuncRef (primitive FuncRef))
+(type GlobalValue (primitive GlobalValue))
+(type Ieee32 (primitive Ieee32))
+(type Ieee64 (primitive Ieee64))
+(type Imm64 (primitive Imm64))
+(type Immediate (primitive Immediate))
+(type JumpTable (primitive JumpTable))
+(type MemFlags (primitive MemFlags))
+(type Offset32 (primitive Offset32))
+(type SigRef (primitive SigRef))
+(type StackSlot (primitive StackSlot))
+(type Table (primitive Table))
+(type Uimm8 (primitive Uimm8))
+
+;;;; Enumerated Immediate: AtomicRmwOp ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+(type AtomicRmwOp extern
+    (enum
+        Add
+        And
+        Nand
+        Or
+        Smax
+        Smin
+        Sub
+        Umax
+        Umin
+        Xchg
+        Xor
+    )
+)
+
+;;;; Enumerated Immediate: FloatCC ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+(type FloatCC extern
+    (enum
+        Equal
+        GreaterThan
+        GreaterThanOrEqual
+        LessThan
+        LessThanOrEqual
+        NotEqual
+        Ordered
+        OrderedNotEqual
+        Unordered
+        UnorderedOrEqual
+        UnorderedOrGreaterThan
+        UnorderedOrGreaterThanOrEqual
+        UnorderedOrLessThan
+        UnorderedOrLessThanOrEqual
+    )
+)
+
+;;;; Enumerated Immediate: IntCC ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+(type IntCC extern
+    (enum
+        Equal
+        NotEqual
+        SignedGreaterThan
+        SignedGreaterThanOrEqual
+        SignedLessThan
+        SignedLessThanOrEqual
+        UnsignedGreaterThan
+        UnsignedGreaterThanOrEqual
+        UnsignedLessThan
+        UnsignedLessThanOrEqual
+    )
+)
+
+;;;; Enumerated Immediate: TrapCode ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+(type TrapCode extern
+    (enum
+        HeapOutOfBounds
+        IntegerDivisionByZero
+        IntegerOverflow
+        StackOverflow
+    )
+)
+
+;;;; Value Arrays ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+;; ISLE representation of `[Value; 2]`.
+(type ValueArray2 extern (enum))
+
+(decl value_array_2 (Value Value) ValueArray2)
+(extern constructor value_array_2 pack_value_array_2)
+(extern extractor infallible value_array_2 unpack_value_array_2)
+
+;; ISLE representation of `[Value; 3]`.
+(type ValueArray3 extern (enum))
+
+(decl value_array_3 (Value Value Value) ValueArray3)
+(extern constructor value_array_3 pack_value_array_3)
+(extern extractor infallible value_array_3 unpack_value_array_3)
+
+;;;; Block Arrays ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+;; ISLE representation of `[BlockCall; 2]`.
+(type BlockArray2 extern (enum))
+
+(decl block_array_2 (BlockCall BlockCall) BlockArray2)
+(extern constructor block_array_2 pack_block_array_2)
+(extern extractor infallible block_array_2 unpack_block_array_2)
+
+;;;; `Opcode` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+(type Opcode extern
+    (enum
+        Jump
+        Brif
+        BrTable
+        Debugtrap
+        Trap
+        Trapz
+        ResumableTrap
+        Trapnz
+        ResumableTrapnz
+        Return
+        Call
+        CallIndirect
+        ReturnCall
+        ReturnCallIndirect
+        FuncAddr
+        Splat
+        Swizzle
+        X86Pshufb
+        Insertlane
+        Extractlane
+        Smin
+        Umin
+        Smax
+        Umax
+        AvgRound
+        UaddSat
+        SaddSat
+        UsubSat
+        SsubSat
+        Load
+        Store
+        Uload8
+        Sload8
+        Istore8
+        Uload16
+        Sload16
+        Istore16
+        Uload32
+        Sload32
+        Istore32
+        Uload8x8
+        Sload8x8
+        Uload16x4
+        Sload16x4
+        Uload32x2
+        Sload32x2
+        StackLoad
+        StackStore
+        StackAddr
+        DynamicStackLoad
+        DynamicStackStore
+        DynamicStackAddr
+        GlobalValue
+        SymbolValue
+        TlsValue
+        GetPinnedReg
+        SetPinnedReg
+        GetFramePointer
+        GetStackPointer
+        GetReturnAddress
+        TableAddr
+        Iconst
+        F32const
+        F64const
+        Vconst
+        Shuffle
+        Null
+        Nop
+        Select
+        SelectSpectreGuard
+        Bitselect
+        X86Blendv
+        VanyTrue
+        VallTrue
+        VhighBits
+        Icmp
+        IcmpImm
+        Iadd
+        Isub
+        Ineg
+        Iabs
+        Imul
+        Umulhi
+        Smulhi
+        SqmulRoundSat
+        X86Pmulhrsw
+        Udiv
+        Sdiv
+        Urem
+        Srem
+        IaddImm
+        ImulImm
+        UdivImm
+        SdivImm
+        UremImm
+        SremImm
+        IrsubImm
+        IaddCin
+        IaddCarry
+        UaddOverflow
+        SaddOverflow
+        UsubOverflow
+        SsubOverflow
+        UmulOverflow
+        SmulOverflow
+        UaddOverflowTrap
+        IsubBin
+        IsubBorrow
+        Band
+        Bor
+        Bxor
+        Bnot
+        BandNot
+        BorNot
+        BxorNot
+        BandImm
+        BorImm
+        BxorImm
+        Rotl
+        Rotr
+        RotlImm
+        RotrImm
+        Ishl
+        Ushr
+        Sshr
+        IshlImm
+        UshrImm
+        SshrImm
+        Bitrev
+        Clz
+        Cls
+        Ctz
+        Bswap
+        Popcnt
+        Fcmp
+        Fadd
+        Fsub
+        Fmul
+        Fdiv
+        Sqrt
+        Fma
+        Fneg
+        Fabs
+        Fcopysign
+        Fmin
+        FminPseudo
+        Fmax
+        FmaxPseudo
+        Ceil
+        Floor
+        Trunc
+        Nearest
+        IsNull
+        IsInvalid
+        Bitcast
+        ScalarToVector
+        Bmask
+        Ireduce
+        Snarrow
+        Unarrow
+        Uunarrow
+        SwidenLow
+        SwidenHigh
+        UwidenLow
+        UwidenHigh
+        IaddPairwise
+        X86Pmaddubsw
+        Uextend
+        Sextend
+        Fpromote
+        Fdemote
+        Fvdemote
+        FvpromoteLow
+        FcvtToUint
+        FcvtToSint
+        FcvtToUintSat
+        FcvtToSintSat
+        X86Cvtt2dq
+        FcvtFromUint
+        FcvtFromSint
+        Isplit
+        Iconcat
+        AtomicRmw
+        AtomicCas
+        AtomicLoad
+        AtomicStore
+        Fence
+        ExtractVector
+    )
+)
+
+;;;; `InstructionData` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+(type InstructionData extern
+    (enum
+        (AtomicCas (opcode Opcode) (args ValueArray3) (flags MemFlags))
+        (AtomicRmw (opcode Opcode) (args ValueArray2) (flags MemFlags) (op AtomicRmwOp))
+        (Binary (opcode Opcode) (args ValueArray2))
+        (BinaryImm64 (opcode Opcode) (arg Value) (imm Imm64))
+        (BinaryImm8 (opcode Opcode) (arg Value) (imm Uimm8))
+        (BranchTable (opcode Opcode) (arg Value) (table JumpTable))
+        (Brif (opcode Opcode) (arg Value) (blocks BlockArray2))
+        (Call (opcode Opcode) (args ValueList) (func_ref FuncRef))
+        (CallIndirect (opcode Opcode) (args ValueList) (sig_ref SigRef))
+        (CondTrap (opcode Opcode) (arg Value) (code TrapCode))
+        (DynamicStackLoad (opcode Opcode) (dynamic_stack_slot DynamicStackSlot))
+        (DynamicStackStore (opcode Opcode) (arg Value) (dynamic_stack_slot DynamicStackSlot))
+        (FloatCompare (opcode Opcode) (args ValueArray2) (cond FloatCC))
+        (FuncAddr (opcode Opcode) (func_ref FuncRef))
+        (IntAddTrap (opcode Opcode) (args ValueArray2) (code TrapCode))
+        (IntCompare (opcode Opcode) (args ValueArray2) (cond IntCC))
+        (IntCompareImm (opcode Opcode) (arg Value) (cond IntCC) (imm Imm64))
+        (Jump (opcode Opcode) (destination BlockCall))
+        (Load (opcode Opcode) (arg Value) (flags MemFlags) (offset Offset32))
+        (LoadNoOffset (opcode Opcode) (arg Value) (flags MemFlags))
+        (MultiAry (opcode Opcode) (args ValueList))
+        (NullAry (opcode Opcode))
+        (Shuffle (opcode Opcode) (args ValueArray2) (imm Immediate))
+        (StackLoad (opcode Opcode) (stack_slot StackSlot) (offset Offset32))
+        (StackStore (opcode Opcode) (arg Value) (stack_slot StackSlot) (offset Offset32))
+        (Store (opcode Opcode) (args ValueArray2) (flags MemFlags) (offset Offset32))
+        (StoreNoOffset (opcode Opcode) (args ValueArray2) (flags MemFlags))
+        (TableAddr (opcode Opcode) (arg Value) (table Table) (offset Offset32))
+        (Ternary (opcode Opcode) (args ValueArray3))
+        (TernaryImm8 (opcode Opcode) (args ValueArray2) (imm Uimm8))
+        (Trap (opcode Opcode) (code TrapCode))
+        (Unary (opcode Opcode) (arg Value))
+        (UnaryConst (opcode Opcode) (constant_handle Constant))
+        (UnaryGlobalValue (opcode Opcode) (global_value GlobalValue))
+        (UnaryIeee32 (opcode Opcode) (imm Ieee32))
+        (UnaryIeee64 (opcode Opcode) (imm Ieee64))
+        (UnaryImm (opcode Opcode) (imm Imm64))
+    )
+)
+
+;;;; Extracting Opcode, Operands, and Immediates from `InstructionData` ;;;;;;;;
+
+(decl jump (BlockCall) Inst)
+(extractor
+    (jump block_call)
+    (inst_data (InstructionData.Jump (Opcode.Jump) block_call))
+)
+
+(decl brif (Value BlockCall BlockCall) Inst)
+(extractor
+    (brif c block_then block_else)
+    (inst_data (InstructionData.Brif (Opcode.Brif) c (block_array_2 block_then block_else)))
+)
+
+(decl br_table (Value JumpTable) Inst)
+(extractor
+    (br_table x JT)
+    (inst_data (InstructionData.BranchTable (Opcode.BrTable) x JT))
+)
+
+(decl debugtrap () Inst)
+(extractor
+    (debugtrap )
+    (inst_data (InstructionData.NullAry (Opcode.Debugtrap)))
+)
+
+(decl trap (TrapCode) Inst)
+(extractor
+    (trap code)
+    (inst_data (InstructionData.Trap (Opcode.Trap) code))
+)
+
+(decl trapz (Value TrapCode) Inst)
+(extractor
+    (trapz c code)
+    (inst_data (InstructionData.CondTrap (Opcode.Trapz) c code))
+)
+
+(decl resumable_trap (TrapCode) Inst)
+(extractor
+    (resumable_trap code)
+    (inst_data (InstructionData.Trap (Opcode.ResumableTrap) code))
+)
+
+(decl trapnz (Value TrapCode) Inst)
+(extractor
+    (trapnz c code)
+    (inst_data (InstructionData.CondTrap (Opcode.Trapnz) c code))
+)
+
+(decl resumable_trapnz (Value TrapCode) Inst)
+(extractor
+    (resumable_trapnz c code)
+    (inst_data (InstructionData.CondTrap (Opcode.ResumableTrapnz) c code))
+)
+
+(decl return (ValueSlice) Inst)
+(extractor
+    (return rvals)
+    (inst_data (InstructionData.MultiAry (Opcode.Return) (value_list_slice rvals)))
+)
+
+(decl call (FuncRef ValueSlice) Inst)
+(extractor
+    (call FN args)
+    (inst_data (InstructionData.Call (Opcode.Call) (value_list_slice args) FN))
+)
+
+(decl call_indirect (SigRef Value ValueSlice) Inst)
+(extractor
+    (call_indirect SIG callee args)
+    (inst_data (InstructionData.CallIndirect (Opcode.CallIndirect) (unwrap_head_value_list_1 callee args) SIG))
+)
+
+(decl return_call (FuncRef ValueSlice) Inst)
+(extractor
+    (return_call FN args)
+    (inst_data (InstructionData.Call (Opcode.ReturnCall) (value_list_slice args) FN))
+)
+
+(decl return_call_indirect (SigRef Value ValueSlice) Inst)
+(extractor
+    (return_call_indirect SIG callee args)
+    (inst_data (InstructionData.CallIndirect (Opcode.ReturnCallIndirect) (unwrap_head_value_list_1 callee args) SIG))
+)
+
+(decl func_addr (FuncRef) Inst)
+(extractor
+    (func_addr FN)
+    (inst_data (InstructionData.FuncAddr (Opcode.FuncAddr) FN))
+)
+
+(decl splat (Value) Inst)
+(extractor
+    (splat x)
+    (inst_data (InstructionData.Unary (Opcode.Splat) x))
+)
+
+(decl swizzle (Value Value) Inst)
+(extractor
+    (swizzle x y)
+    (inst_data (InstructionData.Binary (Opcode.Swizzle) (value_array_2 x y)))
+)
+
+(decl x86_pshufb (Value Value) Inst)
+(extractor
+    (x86_pshufb x y)
+    (inst_data (InstructionData.Binary (Opcode.X86Pshufb) (value_array_2 x y)))
+)
+
+(decl insertlane (Value Value Uimm8) Inst)
+(extractor
+    (insertlane x y Idx)
+    (inst_data (InstructionData.TernaryImm8 (Opcode.Insertlane) (value_array_2 x y) Idx))
+)
+
+(decl extractlane (Value Uimm8) Inst)
+(extractor
+    (extractlane x Idx)
+    (inst_data (InstructionData.BinaryImm8 (Opcode.Extractlane) x Idx))
+)
+
+(decl smin (Value Value) Inst)
+(extractor
+    (smin x y)
+    (inst_data (InstructionData.Binary (Opcode.Smin) (value_array_2 x y)))
+)
+
+(decl umin (Value Value) Inst)
+(extractor
+    (umin x y)
+    (inst_data (InstructionData.Binary (Opcode.Umin) (value_array_2 x y)))
+)
+
+(decl smax (Value Value) Inst)
+(extractor
+    (smax x y)
+    (inst_data (InstructionData.Binary (Opcode.Smax) (value_array_2 x y)))
+)
+
+(decl umax (Value Value) Inst)
+(extractor
+    (umax x y)
+    (inst_data (InstructionData.Binary (Opcode.Umax) (value_array_2 x y)))
+)
+
+(decl avg_round (Value Value) Inst)
+(extractor
+    (avg_round x y)
+    (inst_data (InstructionData.Binary (Opcode.AvgRound) (value_array_2 x y)))
+)
+
+(decl uadd_sat (Value Value) Inst)
+(extractor
+    (uadd_sat x y)
+    (inst_data (InstructionData.Binary (Opcode.UaddSat) (value_array_2 x y)))
+)
+
+(decl sadd_sat (Value Value) Inst)
+(extractor
+    (sadd_sat x y)
+    (inst_data (InstructionData.Binary (Opcode.SaddSat) (value_array_2 x y)))
+)
+
+(decl usub_sat (Value Value) Inst)
+(extractor
+    (usub_sat x y)
+    (inst_data (InstructionData.Binary (Opcode.UsubSat) (value_array_2 x y)))
+)
+
+(decl ssub_sat (Value Value) Inst)
+(extractor
+    (ssub_sat x y)
+    (inst_data (InstructionData.Binary (Opcode.SsubSat) (value_array_2 x y)))
+)
+
+(decl load (MemFlags Value Offset32) Inst)
+(extractor
+    (load MemFlags p Offset)
+    (inst_data (InstructionData.Load (Opcode.Load) p MemFlags Offset))
+)
+
+(decl store (MemFlags Value Value Offset32) Inst)
+(extractor
+    (store MemFlags x p Offset)
+    (inst_data (InstructionData.Store (Opcode.Store) (value_array_2 x p) MemFlags Offset))
+)
+
+(decl uload8 (MemFlags Value Offset32) Inst)
+(extractor
+    (uload8 MemFlags p Offset)
+    (inst_data (InstructionData.Load (Opcode.Uload8) p MemFlags Offset))
+)
+
+(decl sload8 (MemFlags Value Offset32) Inst)
+(extractor
+    (sload8 MemFlags p Offset)
+    (inst_data (InstructionData.Load (Opcode.Sload8) p MemFlags Offset))
+)
+
+(decl istore8 (MemFlags Value Value Offset32) Inst)
+(extractor
+    (istore8 MemFlags x p Offset)
+    (inst_data (InstructionData.Store (Opcode.Istore8) (value_array_2 x p) MemFlags Offset))
+)
+
+(decl uload16 (MemFlags Value Offset32) Inst)
+(extractor
+    (uload16 MemFlags p Offset)
+    (inst_data (InstructionData.Load (Opcode.Uload16) p MemFlags Offset))
+)
+
+(decl sload16 (MemFlags Value Offset32) Inst)
+(extractor
+    (sload16 MemFlags p Offset)
+    (inst_data (InstructionData.Load (Opcode.Sload16) p MemFlags Offset))
+)
+
+(decl istore16 (MemFlags Value Value Offset32) Inst)
+(extractor
+    (istore16 MemFlags x p Offset)
+    (inst_data (InstructionData.Store (Opcode.Istore16) (value_array_2 x p) MemFlags Offset))
+)
+
+(decl uload32 (MemFlags Value Offset32) Inst)
+(extractor
+    (uload32 MemFlags p Offset)
+    (inst_data (InstructionData.Load (Opcode.Uload32) p MemFlags Offset))
+)
+
+(decl sload32 (MemFlags Value Offset32) Inst)
+(extractor
+    (sload32 MemFlags p Offset)
+    (inst_data (InstructionData.Load (Opcode.Sload32) p MemFlags Offset))
+)
+
+(decl istore32 (MemFlags Value Value Offset32) Inst)
+(extractor
+    (istore32 MemFlags x p Offset)
+    (inst_data (InstructionData.Store (Opcode.Istore32) (value_array_2 x p) MemFlags Offset))
+)
+
+(decl uload8x8 (MemFlags Value Offset32) Inst)
+(extractor
+    (uload8x8 MemFlags p Offset)
+    (inst_data (InstructionData.Load (Opcode.Uload8x8) p MemFlags Offset))
+)
+
+(decl sload8x8 (MemFlags Value Offset32) Inst)
+(extractor
+    (sload8x8 MemFlags p Offset)
+    (inst_data (InstructionData.Load (Opcode.Sload8x8) p MemFlags Offset))
+)
+
+(decl uload16x4 (MemFlags Value Offset32) Inst)
+(extractor
+    (uload16x4 MemFlags p Offset)
+    (inst_data (InstructionData.Load (Opcode.Uload16x4) p MemFlags Offset))
+)
+
+(decl sload16x4 (MemFlags Value Offset32) Inst)
+(extractor
+    (sload16x4 MemFlags p Offset)
+    (inst_data (InstructionData.Load (Opcode.Sload16x4) p MemFlags Offset))
+)
+
+(decl uload32x2 (MemFlags Value Offset32) Inst)
+(extractor
+    (uload32x2 MemFlags p Offset)
+    (inst_data (InstructionData.Load (Opcode.Uload32x2) p MemFlags Offset))
+)
+
+(decl sload32x2 (MemFlags Value Offset32) Inst)
+(extractor
+    (sload32x2 MemFlags p Offset)
+    (inst_data (InstructionData.Load (Opcode.Sload32x2) p MemFlags Offset))
+)
+
+(decl stack_load (StackSlot Offset32) Inst)
+(extractor
+    (stack_load SS Offset)
+    (inst_data (InstructionData.StackLoad (Opcode.StackLoad) SS Offset))
+)
+
+(decl stack_store (Value StackSlot Offset32) Inst)
+(extractor
+    (stack_store x SS Offset)
+    (inst_data (InstructionData.StackStore (Opcode.StackStore) x SS Offset))
+)
+
+(decl stack_addr (StackSlot Offset32) Inst)
+(extractor
+    (stack_addr SS Offset)
+    (inst_data (InstructionData.StackLoad (Opcode.StackAddr) SS Offset))
+)
+
+(decl dynamic_stack_load (DynamicStackSlot) Inst)
+(extractor
+    (dynamic_stack_load DSS)
+    (inst_data (InstructionData.DynamicStackLoad (Opcode.DynamicStackLoad) DSS))
+)
+
+(decl dynamic_stack_store (Value DynamicStackSlot) Inst)
+(extractor
+    (dynamic_stack_store x DSS)
+    (inst_data (InstructionData.DynamicStackStore (Opcode.DynamicStackStore) x DSS))
+)
+
+(decl dynamic_stack_addr (DynamicStackSlot) Inst)
+(extractor
+    (dynamic_stack_addr DSS)
+    (inst_data (InstructionData.DynamicStackLoad (Opcode.DynamicStackAddr) DSS))
+)
+
+(decl global_value (GlobalValue) Inst)
+(extractor
+    (global_value GV)
+    (inst_data (InstructionData.UnaryGlobalValue (Opcode.GlobalValue) GV))
+)
+
+(decl symbol_value (GlobalValue) Inst)
+(extractor
+    (symbol_value GV)
+    (inst_data (InstructionData.UnaryGlobalValue (Opcode.SymbolValue) GV))
+)
+
+(decl tls_value (GlobalValue) Inst)
+(extractor
+    (tls_value GV)
+    (inst_data (InstructionData.UnaryGlobalValue (Opcode.TlsValue) GV))
+)
+
+(decl get_pinned_reg () Inst)
+(extractor
+    (get_pinned_reg )
+    (inst_data (InstructionData.NullAry (Opcode.GetPinnedReg)))
+)
+
+(decl set_pinned_reg (Value) Inst)
+(extractor
+    (set_pinned_reg addr)
+    (inst_data (InstructionData.Unary (Opcode.SetPinnedReg) addr))
+)
+
+(decl get_frame_pointer () Inst)
+(extractor
+    (get_frame_pointer )
+    (inst_data (InstructionData.NullAry (Opcode.GetFramePointer)))
+)
+
+(decl get_stack_pointer () Inst)
+(extractor
+    (get_stack_pointer )
+    (inst_data (InstructionData.NullAry (Opcode.GetStackPointer)))
+)
+
+(decl get_return_address () Inst)
+(extractor
+    (get_return_address )
+    (inst_data (InstructionData.NullAry (Opcode.GetReturnAddress)))
+)
+
+(decl table_addr (Table Value Offset32) Inst)
+(extractor
+    (table_addr T p Offset)
+    (inst_data (InstructionData.TableAddr (Opcode.TableAddr) p T Offset))
+)
+
+(decl iconst (Imm64) Inst)
+(extractor
+    (iconst N)
+    (inst_data (InstructionData.UnaryImm (Opcode.Iconst) N))
+)
+
+(decl f32const (Ieee32) Inst)
+(extractor
+    (f32const N)
+    (inst_data (InstructionData.UnaryIeee32 (Opcode.F32const) N))
+)
+
+(decl f64const (Ieee64) Inst)
+(extractor
+    (f64const N)
+    (inst_data (InstructionData.UnaryIeee64 (Opcode.F64const) N))
+)
+
+(decl vconst (Constant) Inst)
+(extractor
+    (vconst N)
+    (inst_data (InstructionData.UnaryConst (Opcode.Vconst) N))
+)
+
+(decl shuffle (Value Value Immediate) Inst)
+(extractor
+    (shuffle a b mask)
+    (inst_data (InstructionData.Shuffle (Opcode.Shuffle) (value_array_2 a b) mask))
+)
+
+(decl null () Inst)
+(extractor
+    (null )
+    (inst_data (InstructionData.NullAry (Opcode.Null)))
+)
+
+(decl nop () Inst)
+(extractor
+    (nop )
+    (inst_data (InstructionData.NullAry (Opcode.Nop)))
+)
+
+(decl select (Value Value Value) Inst)
+(extractor
+    (select c x y)
+    (inst_data (InstructionData.Ternary (Opcode.Select) (value_array_3 c x y)))
+)
+
+(decl select_spectre_guard (Value Value Value) Inst)
+(extractor
+    (select_spectre_guard c x y)
+    (inst_data (InstructionData.Ternary (Opcode.SelectSpectreGuard) (value_array_3 c x y)))
+)
+
+(decl bitselect (Value Value Value) Inst)
+(extractor
+    (bitselect c x y)
+    (inst_data (InstructionData.Ternary (Opcode.Bitselect) (value_array_3 c x y)))
+)
+
+(decl x86_blendv (Value Value Value) Inst)
+(extractor
+    (x86_blendv c x y)
+    (inst_data (InstructionData.Ternary (Opcode.X86Blendv) (value_array_3 c x y)))
+)
+
+(decl vany_true (Value) Inst)
+(extractor
+    (vany_true a)
+    (inst_data (InstructionData.Unary (Opcode.VanyTrue) a))
+)
+
+(decl vall_true (Value) Inst)
+(extractor
+    (vall_true a)
+    (inst_data (InstructionData.Unary (Opcode.VallTrue) a))
+)
+
+(decl vhigh_bits (Value) Inst)
+(extractor
+    (vhigh_bits a)
+    (inst_data (InstructionData.Unary (Opcode.VhighBits) a))
+)
+
+(decl icmp (IntCC Value Value) Inst)
+(extractor
+    (icmp Cond x y)
+    (inst_data (InstructionData.IntCompare (Opcode.Icmp) (value_array_2 x y) Cond))
+)
+
+(decl icmp_imm (IntCC Value Imm64) Inst)
+(extractor
+    (icmp_imm Cond x Y)
+    (inst_data (InstructionData.IntCompareImm (Opcode.IcmpImm) x Cond Y))
+)
+
+(decl iadd (Value Value) Inst)
+(extractor
+    (iadd x y)
+    (inst_data (InstructionData.Binary (Opcode.Iadd) (value_array_2 x y)))
+)
+
+(decl isub (Value Value) Inst)
+(extractor
+    (isub x y)
+    (inst_data (InstructionData.Binary (Opcode.Isub) (value_array_2 x y)))
+)
+
+(decl ineg (Value) Inst)
+(extractor
+    (ineg x)
+    (inst_data (InstructionData.Unary (Opcode.Ineg) x))
+)
+
+(decl iabs (Value) Inst)
+(extractor
+    (iabs x)
+    (inst_data (InstructionData.Unary (Opcode.Iabs) x))
+)
+
+(decl imul (Value Value) Inst)
+(extractor
+    (imul x y)
+    (inst_data (InstructionData.Binary (Opcode.Imul) (value_array_2 x y)))
+)
+
+(decl umulhi (Value Value) Inst)
+(extractor
+    (umulhi x y)
+    (inst_data (InstructionData.Binary (Opcode.Umulhi) (value_array_2 x y)))
+)
+
+(decl smulhi (Value Value) Inst)
+(extractor
+    (smulhi x y)
+    (inst_data (InstructionData.Binary (Opcode.Smulhi) (value_array_2 x y)))
+)
+
+(decl sqmul_round_sat (Value Value) Inst)
+(extractor
+    (sqmul_round_sat x y)
+    (inst_data (InstructionData.Binary (Opcode.SqmulRoundSat) (value_array_2 x y)))
+)
+
+(decl x86_pmulhrsw (Value Value) Inst)
+(extractor
+    (x86_pmulhrsw x y)
+    (inst_data (InstructionData.Binary (Opcode.X86Pmulhrsw) (value_array_2 x y)))
+)
+
+(decl udiv (Value Value) Inst)
+(extractor
+    (udiv x y)
+    (inst_data (InstructionData.Binary (Opcode.Udiv) (value_array_2 x y)))
+)
+
+(decl sdiv (Value Value) Inst)
+(extractor
+    (sdiv x y)
+    (inst_data (InstructionData.Binary (Opcode.Sdiv) (value_array_2 x y)))
+)
+
+(decl urem (Value Value) Inst)
+(extractor
+    (urem x y)
+    (inst_data (InstructionData.Binary (Opcode.Urem) (value_array_2 x y)))
+)
+
+(decl srem (Value Value) Inst)
+(extractor
+    (srem x y)
+    (inst_data (InstructionData.Binary (Opcode.Srem) (value_array_2 x y)))
+)
+
+(decl iadd_imm (Value Imm64) Inst)
+(extractor
+    (iadd_imm x Y)
+    (inst_data (InstructionData.BinaryImm64 (Opcode.IaddImm) x Y))
+)
+
+(decl imul_imm (Value Imm64) Inst)
+(extractor
+    (imul_imm x Y)
+    (inst_data (InstructionData.BinaryImm64 (Opcode.ImulImm) x Y))
+)
+
+(decl udiv_imm (Value Imm64) Inst)
+(extractor
+    (udiv_imm x Y)
+    (inst_data (InstructionData.BinaryImm64 (Opcode.UdivImm) x Y))
+)
+
+(decl sdiv_imm (Value Imm64) Inst)
+(extractor
+    (sdiv_imm x Y)
+    (inst_data (InstructionData.BinaryImm64 (Opcode.SdivImm) x Y))
+)
+
+(decl urem_imm (Value Imm64) Inst)
+(extractor
+    (urem_imm x Y)
+    (inst_data (InstructionData.BinaryImm64 (Opcode.UremImm) x Y))
+)
+
+(decl srem_imm (Value Imm64) Inst)
+(extractor
+    (srem_imm x Y)
+    (inst_data (InstructionData.BinaryImm64 (Opcode.SremImm) x Y))
+)
+
+(decl irsub_imm (Value Imm64) Inst)
+(extractor
+    (irsub_imm x Y)
+    (inst_data (InstructionData.BinaryImm64 (Opcode.IrsubImm) x Y))
+)
+
+(decl iadd_cin (Value Value Value) Inst)
+(extractor
+    (iadd_cin x y c_in)
+    (inst_data (InstructionData.Ternary (Opcode.IaddCin) (value_array_3 x y c_in)))
+)
+
+(decl iadd_carry (Value Value Value) Inst)
+(extractor
+    (iadd_carry x y c_in)
+    (inst_data (InstructionData.Ternary (Opcode.IaddCarry) (value_array_3 x y c_in)))
+)
+
+(decl uadd_overflow (Value Value) Inst)
+(extractor
+    (uadd_overflow x y)
+    (inst_data (InstructionData.Binary (Opcode.UaddOverflow) (value_array_2 x y)))
+)
+
+(decl sadd_overflow (Value Value) Inst)
+(extractor
+    (sadd_overflow x y)
+    (inst_data (InstructionData.Binary (Opcode.SaddOverflow) (value_array_2 x y)))
+)
+
+(decl usub_overflow (Value Value) Inst)
+(extractor
+    (usub_overflow x y)
+    (inst_data (InstructionData.Binary (Opcode.UsubOverflow) (value_array_2 x y)))
+)
+
+(decl ssub_overflow (Value Value) Inst)
+(extractor
+    (ssub_overflow x y)
+    (inst_data (InstructionData.Binary (Opcode.SsubOverflow) (value_array_2 x y)))
+)
+
+(decl umul_overflow (Value Value) Inst)
+(extractor
+    (umul_overflow x y)
+    (inst_data (InstructionData.Binary (Opcode.UmulOverflow) (value_array_2 x y)))
+)
+
+(decl smul_overflow (Value Value) Inst)
+(extractor
+    (smul_overflow x y)
+    (inst_data (InstructionData.Binary (Opcode.SmulOverflow) (value_array_2 x y)))
+)
+
+(decl uadd_overflow_trap (Value Value TrapCode) Inst)
+(extractor
+    (uadd_overflow_trap x y code)
+    (inst_data (InstructionData.IntAddTrap (Opcode.UaddOverflowTrap) (value_array_2 x y) code))
+)
+
+(decl isub_bin (Value Value Value) Inst)
+(extractor
+    (isub_bin x y b_in)
+    (inst_data (InstructionData.Ternary (Opcode.IsubBin) (value_array_3 x y b_in)))
+)
+
+(decl isub_borrow (Value Value Value) Inst)
+(extractor
+    (isub_borrow x y b_in)
+    (inst_data (InstructionData.Ternary (Opcode.IsubBorrow) (value_array_3 x y b_in)))
+)
+
+(decl band (Value Value) Inst)
+(extractor
+    (band x y)
+    (inst_data (InstructionData.Binary (Opcode.Band) (value_array_2 x y)))
+)
+
+(decl bor (Value Value) Inst)
+(extractor
+    (bor x y)
+    (inst_data (InstructionData.Binary (Opcode.Bor) (value_array_2 x y)))
+)
+
+(decl bxor (Value Value) Inst)
+(extractor
+    (bxor x y)
+    (inst_data (InstructionData.Binary (Opcode.Bxor) (value_array_2 x y)))
+)
+
+(decl bnot (Value) Inst)
+(extractor
+    (bnot x)
+    (inst_data (InstructionData.Unary (Opcode.Bnot) x))
+)
+
+(decl band_not (Value Value) Inst)
+(extractor
+    (band_not x y)
+    (inst_data (InstructionData.Binary (Opcode.BandNot) (value_array_2 x y)))
+)
+
+(decl bor_not (Value Value) Inst)
+(extractor
+    (bor_not x y)
+    (inst_data (InstructionData.Binary (Opcode.BorNot) (value_array_2 x y)))
+)
+
+(decl bxor_not (Value Value) Inst)
+(extractor
+    (bxor_not x y)
+    (inst_data (InstructionData.Binary (Opcode.BxorNot) (value_array_2 x y)))
+)
+
+(decl band_imm (Value Imm64) Inst)
+(extractor
+    (band_imm x Y)
+    (inst_data (InstructionData.BinaryImm64 (Opcode.BandImm) x Y))
+)
+
+(decl bor_imm (Value Imm64) Inst)
+(extractor
+    (bor_imm x Y)
+    (inst_data (InstructionData.BinaryImm64 (Opcode.BorImm) x Y))
+)
+
+(decl bxor_imm (Value Imm64) Inst)
+(extractor
+    (bxor_imm x Y)
+    (inst_data (InstructionData.BinaryImm64 (Opcode.BxorImm) x Y))
+)
+
+(decl rotl (Value Value) Inst)
+(extractor
+    (rotl x y)
+    (inst_data (InstructionData.Binary (Opcode.Rotl) (value_array_2 x y)))
+)
+
+(decl rotr (Value Value) Inst)
+(extractor
+    (rotr x y)
+    (inst_data (InstructionData.Binary (Opcode.Rotr) (value_array_2 x y)))
+)
+
+(decl rotl_imm (Value Imm64) Inst)
+(extractor
+    (rotl_imm x Y)
+    (inst_data (InstructionData.BinaryImm64 (Opcode.RotlImm) x Y))
+)
+
+(decl rotr_imm (Value Imm64) Inst)
+(extractor
+    (rotr_imm x Y)
+    (inst_data (InstructionData.BinaryImm64 (Opcode.RotrImm) x Y))
+)
+
+(decl ishl (Value Value) Inst)
+(extractor
+    (ishl x y)
+    (inst_data (InstructionData.Binary (Opcode.Ishl) (value_array_2 x y)))
+)
+
+(decl ushr (Value Value) Inst)
+(extractor
+    (ushr x y)
+    (inst_data (InstructionData.Binary (Opcode.Ushr) (value_array_2 x y)))
+)
+
+(decl sshr (Value Value) Inst)
+(extractor
+    (sshr x y)
+    (inst_data (InstructionData.Binary (Opcode.Sshr) (value_array_2 x y)))
+)
+
+(decl ishl_imm (Value Imm64) Inst)
+(extractor
+    (ishl_imm x Y)
+    (inst_data (InstructionData.BinaryImm64 (Opcode.IshlImm) x Y))
+)
+
+(decl ushr_imm (Value Imm64) Inst)
+(extractor
+    (ushr_imm x Y)
+    (inst_data (InstructionData.BinaryImm64 (Opcode.UshrImm) x Y))
+)
+
+(decl sshr_imm (Value Imm64) Inst)
+(extractor
+    (sshr_imm x Y)
+    (inst_data (InstructionData.BinaryImm64 (Opcode.SshrImm) x Y))
+)
+
+(decl bitrev (Value) Inst)
+(extractor
+    (bitrev x)
+    (inst_data (InstructionData.Unary (Opcode.Bitrev) x))
+)
+
+(decl clz (Value) Inst)
+(extractor
+    (clz x)
+    (inst_data (InstructionData.Unary (Opcode.Clz) x))
+)
+
+(decl cls (Value) Inst)
+(extractor
+    (cls x)
+    (inst_data (InstructionData.Unary (Opcode.Cls) x))
+)
+
+(decl ctz (Value) Inst)
+(extractor
+    (ctz x)
+    (inst_data (InstructionData.Unary (Opcode.Ctz) x))
+)
+
+(decl bswap (Value) Inst)
+(extractor
+    (bswap x)
+    (inst_data (InstructionData.Unary (Opcode.Bswap) x))
+)
+
+(decl popcnt (Value) Inst)
+(extractor
+    (popcnt x)
+    (inst_data (InstructionData.Unary (Opcode.Popcnt) x))
+)
+
+(decl fcmp (FloatCC Value Value) Inst)
+(extractor
+    (fcmp Cond x y)
+    (inst_data (InstructionData.FloatCompare (Opcode.Fcmp) (value_array_2 x y) Cond))
+)
+
+(decl fadd (Value Value) Inst)
+(extractor
+    (fadd x y)
+    (inst_data (InstructionData.Binary (Opcode.Fadd) (value_array_2 x y)))
+)
+
+(decl fsub (Value Value) Inst)
+(extractor
+    (fsub x y)
+    (inst_data (InstructionData.Binary (Opcode.Fsub) (value_array_2 x y)))
+)
+
+(decl fmul (Value Value) Inst)
+(extractor
+    (fmul x y)
+    (inst_data (InstructionData.Binary (Opcode.Fmul) (value_array_2 x y)))
+)
+
+(decl fdiv (Value Value) Inst)
+(extractor
+    (fdiv x y)
+    (inst_data (InstructionData.Binary (Opcode.Fdiv) (value_array_2 x y)))
+)
+
+(decl sqrt (Value) Inst)
+(extractor
+    (sqrt x)
+    (inst_data (InstructionData.Unary (Opcode.Sqrt) x))
+)
+
+(decl fma (Value Value Value) Inst)
+(extractor
+    (fma x y z)
+    (inst_data (InstructionData.Ternary (Opcode.Fma) (value_array_3 x y z)))
+)
+
+(decl fneg (Value) Inst)
+(extractor
+    (fneg x)
+    (inst_data (InstructionData.Unary (Opcode.Fneg) x))
+)
+
+(decl fabs (Value) Inst)
+(extractor
+    (fabs x)
+    (inst_data (InstructionData.Unary (Opcode.Fabs) x))
+)
+
+(decl fcopysign (Value Value) Inst)
+(extractor
+    (fcopysign x y)
+    (inst_data (InstructionData.Binary (Opcode.Fcopysign) (value_array_2 x y)))
+)
+
+(decl fmin (Value Value) Inst)
+(extractor
+    (fmin x y)
+    (inst_data (InstructionData.Binary (Opcode.Fmin) (value_array_2 x y)))
+)
+
+(decl fmin_pseudo (Value Value) Inst)
+(extractor
+    (fmin_pseudo x y)
+    (inst_data (InstructionData.Binary (Opcode.FminPseudo) (value_array_2 x y)))
+)
+
+(decl fmax (Value Value) Inst)
+(extractor
+    (fmax x y)
+    (inst_data (InstructionData.Binary (Opcode.Fmax) (value_array_2 x y)))
+)
+
+(decl fmax_pseudo (Value Value) Inst)
+(extractor
+    (fmax_pseudo x y)
+    (inst_data (InstructionData.Binary (Opcode.FmaxPseudo) (value_array_2 x y)))
+)
+
+(decl ceil (Value) Inst)
+(extractor
+    (ceil x)
+    (inst_data (InstructionData.Unary (Opcode.Ceil) x))
+)
+
+(decl floor (Value) Inst)
+(extractor
+    (floor x)
+    (inst_data (InstructionData.Unary (Opcode.Floor) x))
+)
+
+(decl trunc (Value) Inst)
+(extractor
+    (trunc x)
+    (inst_data (InstructionData.Unary (Opcode.Trunc) x))
+)
+
+(decl nearest (Value) Inst)
+(extractor
+    (nearest x)
+    (inst_data (InstructionData.Unary (Opcode.Nearest) x))
+)
+
+(decl is_null (Value) Inst)
+(extractor
+    (is_null x)
+    (inst_data (InstructionData.Unary (Opcode.IsNull) x))
+)
+
+(decl is_invalid (Value) Inst)
+(extractor
+    (is_invalid x)
+    (inst_data (InstructionData.Unary (Opcode.IsInvalid) x))
+)
+
+(decl bitcast (MemFlags Value) Inst)
+(extractor
+    (bitcast MemFlags x)
+    (inst_data (InstructionData.LoadNoOffset (Opcode.Bitcast) x MemFlags))
+)
+
+(decl scalar_to_vector (Value) Inst)
+(extractor
+    (scalar_to_vector s)
+    (inst_data (InstructionData.Unary (Opcode.ScalarToVector) s))
+)
+
+(decl bmask (Value) Inst)
+(extractor
+    (bmask x)
+    (inst_data (InstructionData.Unary (Opcode.Bmask) x))
+)
+
+(decl ireduce (Value) Inst)
+(extractor
+    (ireduce x)
+    (inst_data (InstructionData.Unary (Opcode.Ireduce) x))
+)
+
+(decl snarrow (Value Value) Inst)
+(extractor
+    (snarrow x y)
+    (inst_data (InstructionData.Binary (Opcode.Snarrow) (value_array_2 x y)))
+)
+
+(decl unarrow (Value Value) Inst)
+(extractor
+    (unarrow x y)
+    (inst_data (InstructionData.Binary (Opcode.Unarrow) (value_array_2 x y)))
+)
+
+(decl uunarrow (Value Value) Inst)
+(extractor
+    (uunarrow x y)
+    (inst_data (InstructionData.Binary (Opcode.Uunarrow) (value_array_2 x y)))
+)
+
+(decl swiden_low (Value) Inst)
+(extractor
+    (swiden_low x)
+    (inst_data (InstructionData.Unary (Opcode.SwidenLow) x))
+)
+
+(decl swiden_high (Value) Inst)
+(extractor
+    (swiden_high x)
+    (inst_data (InstructionData.Unary (Opcode.SwidenHigh) x))
+)
+
+(decl uwiden_low (Value) Inst)
+(extractor
+    (uwiden_low x)
+    (inst_data (InstructionData.Unary (Opcode.UwidenLow) x))
+)
+
+(decl uwiden_high (Value) Inst)
+(extractor
+    (uwiden_high x)
+    (inst_data (InstructionData.Unary (Opcode.UwidenHigh) x))
+)
+
+(decl iadd_pairwise (Value Value) Inst)
+(extractor
+    (iadd_pairwise x y)
+    (inst_data (InstructionData.Binary (Opcode.IaddPairwise) (value_array_2 x y)))
+)
+
+(decl x86_pmaddubsw (Value Value) Inst)
+(extractor
+    (x86_pmaddubsw x y)
+    (inst_data (InstructionData.Binary (Opcode.X86Pmaddubsw) (value_array_2 x y)))
+)
+
+(decl uextend (Value) Inst)
+(extractor
+    (uextend x)
+    (inst_data (InstructionData.Unary (Opcode.Uextend) x))
+)
+
+(decl sextend (Value) Inst)
+(extractor
+    (sextend x)
+    (inst_data (InstructionData.Unary (Opcode.Sextend) x))
+)
+
+(decl fpromote (Value) Inst)
+(extractor
+    (fpromote x)
+    (inst_data (InstructionData.Unary (Opcode.Fpromote) x))
+)
+
+(decl fdemote (Value) Inst)
+(extractor
+    (fdemote x)
+    (inst_data (InstructionData.Unary (Opcode.Fdemote) x))
+)
+
+(decl fvdemote (Value) Inst)
+(extractor
+    (fvdemote x)
+    (inst_data (InstructionData.Unary (Opcode.Fvdemote) x))
+)
+
+(decl fvpromote_low (Value) Inst)
+(extractor
+    (fvpromote_low a)
+    (inst_data (InstructionData.Unary (Opcode.FvpromoteLow) a))
+)
+
+(decl fcvt_to_uint (Value) Inst)
+(extractor
+    (fcvt_to_uint x)
+    (inst_data (InstructionData.Unary (Opcode.FcvtToUint) x))
+)
+
+(decl fcvt_to_sint (Value) Inst)
+(extractor
+    (fcvt_to_sint x)
+    (inst_data (InstructionData.Unary (Opcode.FcvtToSint) x))
+)
+
+(decl fcvt_to_uint_sat (Value) Inst)
+(extractor
+    (fcvt_to_uint_sat x)
+    (inst_data (InstructionData.Unary (Opcode.FcvtToUintSat) x))
+)
+
+(decl fcvt_to_sint_sat (Value) Inst)
+(extractor
+    (fcvt_to_sint_sat x)
+    (inst_data (InstructionData.Unary (Opcode.FcvtToSintSat) x))
+)
+
+(decl x86_cvtt2dq (Value) Inst)
+(extractor
+    (x86_cvtt2dq x)
+    (inst_data (InstructionData.Unary (Opcode.X86Cvtt2dq) x))
+)
+
+(decl fcvt_from_uint (Value) Inst)
+(extractor
+    (fcvt_from_uint x)
+    (inst_data (InstructionData.Unary (Opcode.FcvtFromUint) x))
+)
+
+(decl fcvt_from_sint (Value) Inst)
+(extractor
+    (fcvt_from_sint x)
+    (inst_data (InstructionData.Unary (Opcode.FcvtFromSint) x))
+)
+
+(decl isplit (Value) Inst)
+(extractor
+    (isplit x)
+    (inst_data (InstructionData.Unary (Opcode.Isplit) x))
+)
+
+(decl iconcat (Value Value) Inst)
+(extractor
+    (iconcat lo hi)
+    (inst_data (InstructionData.Binary (Opcode.Iconcat) (value_array_2 lo hi)))
+)
+
+(decl atomic_rmw (MemFlags AtomicRmwOp Value Value) Inst)
+(extractor
+    (atomic_rmw MemFlags AtomicRmwOp p x)
+    (inst_data (InstructionData.AtomicRmw (Opcode.AtomicRmw) (value_array_2 p x) MemFlags AtomicRmwOp))
+)
+
+(decl atomic_cas (MemFlags Value Value Value) Inst)
+(extractor
+    (atomic_cas MemFlags p e x)
+    (inst_data (InstructionData.AtomicCas (Opcode.AtomicCas) (value_array_3 p e x) MemFlags))
+)
+
+(decl atomic_load (MemFlags Value) Inst)
+(extractor
+    (atomic_load MemFlags p)
+    (inst_data (InstructionData.LoadNoOffset (Opcode.AtomicLoad) p MemFlags))
+)
+
+(decl atomic_store (MemFlags Value Value) Inst)
+(extractor
+    (atomic_store MemFlags x p)
+    (inst_data (InstructionData.StoreNoOffset (Opcode.AtomicStore) (value_array_2 x p) MemFlags))
+)
+
+(decl fence () Inst)
+(extractor
+    (fence )
+    (inst_data (InstructionData.NullAry (Opcode.Fence)))
+)
+
+(decl extract_vector (Value Uimm8) Inst)
+(extractor
+    (extract_vector x y)
+    (inst_data (InstructionData.BinaryImm8 (Opcode.ExtractVector) x y))
+)
+
diff --git a/cranelift/codegen/isle_generated_code/clif_opt.isle b/cranelift/codegen/isle_generated_code/clif_opt.isle
new file mode 100644
index 000000000000..0f5a1a7caedc
--- /dev/null
+++ b/cranelift/codegen/isle_generated_code/clif_opt.isle
@@ -0,0 +1,1752 @@
+;; GENERATED BY `gen_isle`. DO NOT EDIT!!!
+;;
+;; This ISLE file defines all the external type declarations for Cranelift's
+;; data structures that ISLE will process, such as `InstructionData` and
+;; `Opcode`.
+
+;;;; Extern type declarations for immediates ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+(type Constant (primitive Constant))
+(type DynamicStackSlot (primitive DynamicStackSlot))
+(type FuncRef (primitive FuncRef))
+(type GlobalValue (primitive GlobalValue))
+(type Ieee32 (primitive Ieee32))
+(type Ieee64 (primitive Ieee64))
+(type Imm64 (primitive Imm64))
+(type Immediate (primitive Immediate))
+(type JumpTable (primitive JumpTable))
+(type MemFlags (primitive MemFlags))
+(type Offset32 (primitive Offset32))
+(type SigRef (primitive SigRef))
+(type StackSlot (primitive StackSlot))
+(type Table (primitive Table))
+(type Uimm8 (primitive Uimm8))
+
+;;;; Enumerated Immediate: AtomicRmwOp ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+(type AtomicRmwOp extern
+    (enum
+        Add
+        And
+        Nand
+        Or
+        Smax
+        Smin
+        Sub
+        Umax
+        Umin
+        Xchg
+        Xor
+    )
+)
+
+;;;; Enumerated Immediate: FloatCC ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+(type FloatCC extern
+    (enum
+        Equal
+        GreaterThan
+        GreaterThanOrEqual
+        LessThan
+        LessThanOrEqual
+        NotEqual
+        Ordered
+        OrderedNotEqual
+        Unordered
+        UnorderedOrEqual
+        UnorderedOrGreaterThan
+        UnorderedOrGreaterThanOrEqual
+        UnorderedOrLessThan
+        UnorderedOrLessThanOrEqual
+    )
+)
+
+;;;; Enumerated Immediate: IntCC ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+(type IntCC extern
+    (enum
+        Equal
+        NotEqual
+        SignedGreaterThan
+        SignedGreaterThanOrEqual
+        SignedLessThan
+        SignedLessThanOrEqual
+        UnsignedGreaterThan
+        UnsignedGreaterThanOrEqual
+        UnsignedLessThan
+        UnsignedLessThanOrEqual
+    )
+)
+
+;;;; Enumerated Immediate: TrapCode ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+(type TrapCode extern
+    (enum
+        HeapOutOfBounds
+        IntegerDivisionByZero
+        IntegerOverflow
+        StackOverflow
+    )
+)
+
+;;;; Value Arrays ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+;; ISLE representation of `[Value; 2]`.
+(type ValueArray2 extern (enum))
+
+(decl value_array_2 (Value Value) ValueArray2)
+(extern constructor value_array_2 pack_value_array_2)
+(extern extractor infallible value_array_2 unpack_value_array_2)
+
+;; ISLE representation of `[Value; 3]`.
+(type ValueArray3 extern (enum))
+
+(decl value_array_3 (Value Value Value) ValueArray3)
+(extern constructor value_array_3 pack_value_array_3)
+(extern extractor infallible value_array_3 unpack_value_array_3)
+
+;;;; Block Arrays ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+;; ISLE representation of `[BlockCall; 2]`.
+(type BlockArray2 extern (enum))
+
+(decl block_array_2 (BlockCall BlockCall) BlockArray2)
+(extern constructor block_array_2 pack_block_array_2)
+(extern extractor infallible block_array_2 unpack_block_array_2)
+
+;;;; `Opcode` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+(type Opcode extern
+    (enum
+        Jump
+        Brif
+        BrTable
+        Debugtrap
+        Trap
+        Trapz
+        ResumableTrap
+        Trapnz
+        ResumableTrapnz
+        Return
+        Call
+        CallIndirect
+        ReturnCall
+        ReturnCallIndirect
+        FuncAddr
+        Splat
+        Swizzle
+        X86Pshufb
+        Insertlane
+        Extractlane
+        Smin
+        Umin
+        Smax
+        Umax
+        AvgRound
+        UaddSat
+        SaddSat
+        UsubSat
+        SsubSat
+        Load
+        Store
+        Uload8
+        Sload8
+        Istore8
+        Uload16
+        Sload16
+        Istore16
+        Uload32
+        Sload32
+        Istore32
+        Uload8x8
+        Sload8x8
+        Uload16x4
+        Sload16x4
+        Uload32x2
+        Sload32x2
+        StackLoad
+        StackStore
+        StackAddr
+        DynamicStackLoad
+        DynamicStackStore
+        DynamicStackAddr
+        GlobalValue
+        SymbolValue
+        TlsValue
+        GetPinnedReg
+        SetPinnedReg
+        GetFramePointer
+        GetStackPointer
+        GetReturnAddress
+        TableAddr
+        Iconst
+        F32const
+        F64const
+        Vconst
+        Shuffle
+        Null
+        Nop
+        Select
+        SelectSpectreGuard
+        Bitselect
+        X86Blendv
+        VanyTrue
+        VallTrue
+        VhighBits
+        Icmp
+        IcmpImm
+        Iadd
+        Isub
+        Ineg
+        Iabs
+        Imul
+        Umulhi
+        Smulhi
+        SqmulRoundSat
+        X86Pmulhrsw
+        Udiv
+        Sdiv
+        Urem
+        Srem
+        IaddImm
+        ImulImm
+        UdivImm
+        SdivImm
+        UremImm
+        SremImm
+        IrsubImm
+        IaddCin
+        IaddCarry
+        UaddOverflow
+        SaddOverflow
+        UsubOverflow
+        SsubOverflow
+        UmulOverflow
+        SmulOverflow
+        UaddOverflowTrap
+        IsubBin
+        IsubBorrow
+        Band
+        Bor
+        Bxor
+        Bnot
+        BandNot
+        BorNot
+        BxorNot
+        BandImm
+        BorImm
+        BxorImm
+        Rotl
+        Rotr
+        RotlImm
+        RotrImm
+        Ishl
+        Ushr
+        Sshr
+        IshlImm
+        UshrImm
+        SshrImm
+        Bitrev
+        Clz
+        Cls
+        Ctz
+        Bswap
+        Popcnt
+        Fcmp
+        Fadd
+        Fsub
+        Fmul
+        Fdiv
+        Sqrt
+        Fma
+        Fneg
+        Fabs
+        Fcopysign
+        Fmin
+        FminPseudo
+        Fmax
+        FmaxPseudo
+        Ceil
+        Floor
+        Trunc
+        Nearest
+        IsNull
+        IsInvalid
+        Bitcast
+        ScalarToVector
+        Bmask
+        Ireduce
+        Snarrow
+        Unarrow
+        Uunarrow
+        SwidenLow
+        SwidenHigh
+        UwidenLow
+        UwidenHigh
+        IaddPairwise
+        X86Pmaddubsw
+        Uextend
+        Sextend
+        Fpromote
+        Fdemote
+        Fvdemote
+        FvpromoteLow
+        FcvtToUint
+        FcvtToSint
+        FcvtToUintSat
+        FcvtToSintSat
+        X86Cvtt2dq
+        FcvtFromUint
+        FcvtFromSint
+        Isplit
+        Iconcat
+        AtomicRmw
+        AtomicCas
+        AtomicLoad
+        AtomicStore
+        Fence
+        ExtractVector
+    )
+)
+
+;;;; `InstructionData` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+(type InstructionData extern
+    (enum
+        (AtomicCas (opcode Opcode) (args ValueArray3) (flags MemFlags))
+        (AtomicRmw (opcode Opcode) (args ValueArray2) (flags MemFlags) (op AtomicRmwOp))
+        (Binary (opcode Opcode) (args ValueArray2))
+        (BinaryImm64 (opcode Opcode) (arg Value) (imm Imm64))
+        (BinaryImm8 (opcode Opcode) (arg Value) (imm Uimm8))
+        (BranchTable (opcode Opcode) (arg Value) (table JumpTable))
+        (Brif (opcode Opcode) (arg Value) (blocks BlockArray2))
+        (Call (opcode Opcode) (args ValueList) (func_ref FuncRef))
+        (CallIndirect (opcode Opcode) (args ValueList) (sig_ref SigRef))
+        (CondTrap (opcode Opcode) (arg Value) (code TrapCode))
+        (DynamicStackLoad (opcode Opcode) (dynamic_stack_slot DynamicStackSlot))
+        (DynamicStackStore (opcode Opcode) (arg Value) (dynamic_stack_slot DynamicStackSlot))
+        (FloatCompare (opcode Opcode) (args ValueArray2) (cond FloatCC))
+        (FuncAddr (opcode Opcode) (func_ref FuncRef))
+        (IntAddTrap (opcode Opcode) (args ValueArray2) (code TrapCode))
+        (IntCompare (opcode Opcode) (args ValueArray2) (cond IntCC))
+        (IntCompareImm (opcode Opcode) (arg Value) (cond IntCC) (imm Imm64))
+        (Jump (opcode Opcode) (destination BlockCall))
+        (Load (opcode Opcode) (arg Value) (flags MemFlags) (offset Offset32))
+        (LoadNoOffset (opcode Opcode) (arg Value) (flags MemFlags))
+        (MultiAry (opcode Opcode) (args ValueList))
+        (NullAry (opcode Opcode))
+        (Shuffle (opcode Opcode) (args ValueArray2) (imm Immediate))
+        (StackLoad (opcode Opcode) (stack_slot StackSlot) (offset Offset32))
+        (StackStore (opcode Opcode) (arg Value) (stack_slot StackSlot) (offset Offset32))
+        (Store (opcode Opcode) (args ValueArray2) (flags MemFlags) (offset Offset32))
+        (StoreNoOffset (opcode Opcode) (args ValueArray2) (flags MemFlags))
+        (TableAddr (opcode Opcode) (arg Value) (table Table) (offset Offset32))
+        (Ternary (opcode Opcode) (args ValueArray3))
+        (TernaryImm8 (opcode Opcode) (args ValueArray2) (imm Uimm8))
+        (Trap (opcode Opcode) (code TrapCode))
+        (Unary (opcode Opcode) (arg Value))
+        (UnaryConst (opcode Opcode) (constant_handle Constant))
+        (UnaryGlobalValue (opcode Opcode) (global_value GlobalValue))
+        (UnaryIeee32 (opcode Opcode) (imm Ieee32))
+        (UnaryIeee64 (opcode Opcode) (imm Ieee64))
+        (UnaryImm (opcode Opcode) (imm Imm64))
+    )
+)
+
+;;;; Extracting Opcode, Operands, and Immediates from `InstructionData` ;;;;;;;;
+
+(decl func_addr (Type FuncRef) Value)
+(extractor
+    (func_addr ty FN)
+    (inst_data ty (InstructionData.FuncAddr (Opcode.FuncAddr) FN))
+)
+(rule (func_addr ty FN)
+    (make_inst ty (InstructionData.FuncAddr (Opcode.FuncAddr) FN))
+)
+
+(decl splat (Type Value) Value)
+(extractor
+    (splat ty x)
+    (inst_data ty (InstructionData.Unary (Opcode.Splat) x))
+)
+(rule (splat ty x)
+    (make_inst ty (InstructionData.Unary (Opcode.Splat) x))
+)
+
+(decl swizzle (Type Value Value) Value)
+(extractor
+    (swizzle ty x y)
+    (inst_data ty (InstructionData.Binary (Opcode.Swizzle) (value_array_2 x y)))
+)
+(rule (swizzle ty x y)
+    (make_inst ty (InstructionData.Binary (Opcode.Swizzle) (value_array_2_ctor x y)))
+)
+
+(decl x86_pshufb (Type Value Value) Value)
+(extractor
+    (x86_pshufb ty x y)
+    (inst_data ty (InstructionData.Binary (Opcode.X86Pshufb) (value_array_2 x y)))
+)
+(rule (x86_pshufb ty x y)
+    (make_inst ty (InstructionData.Binary (Opcode.X86Pshufb) (value_array_2_ctor x y)))
+)
+
+(decl insertlane (Type Value Value Uimm8) Value)
+(extractor
+    (insertlane ty x y Idx)
+    (inst_data ty (InstructionData.TernaryImm8 (Opcode.Insertlane) (value_array_2 x y) Idx))
+)
+(rule (insertlane ty x y Idx)
+    (make_inst ty (InstructionData.TernaryImm8 (Opcode.Insertlane) (value_array_2_ctor x y) Idx))
+)
+
+(decl extractlane (Type Value Uimm8) Value)
+(extractor
+    (extractlane ty x Idx)
+    (inst_data ty (InstructionData.BinaryImm8 (Opcode.Extractlane) x Idx))
+)
+(rule (extractlane ty x Idx)
+    (make_inst ty (InstructionData.BinaryImm8 (Opcode.Extractlane) x Idx))
+)
+
+(decl smin (Type Value Value) Value)
+(extractor
+    (smin ty x y)
+    (inst_data ty (InstructionData.Binary (Opcode.Smin) (value_array_2 x y)))
+)
+(rule (smin ty x y)
+    (make_inst ty (InstructionData.Binary (Opcode.Smin) (value_array_2_ctor x y)))
+)
+
+(decl umin (Type Value Value) Value)
+(extractor
+    (umin ty x y)
+    (inst_data ty (InstructionData.Binary (Opcode.Umin) (value_array_2 x y)))
+)
+(rule (umin ty x y)
+    (make_inst ty (InstructionData.Binary (Opcode.Umin) (value_array_2_ctor x y)))
+)
+
+(decl smax (Type Value Value) Value)
+(extractor
+    (smax ty x y)
+    (inst_data ty (InstructionData.Binary (Opcode.Smax) (value_array_2 x y)))
+)
+(rule (smax ty x y)
+    (make_inst ty (InstructionData.Binary (Opcode.Smax) (value_array_2_ctor x y)))
+)
+
+(decl umax (Type Value Value) Value)
+(extractor
+    (umax ty x y)
+    (inst_data ty (InstructionData.Binary (Opcode.Umax) (value_array_2 x y)))
+)
+(rule (umax ty x y)
+    (make_inst ty (InstructionData.Binary (Opcode.Umax) (value_array_2_ctor x y)))
+)
+
+(decl avg_round (Type Value Value) Value)
+(extractor
+    (avg_round ty x y)
+    (inst_data ty (InstructionData.Binary (Opcode.AvgRound) (value_array_2 x y)))
+)
+(rule (avg_round ty x y)
+    (make_inst ty (InstructionData.Binary (Opcode.AvgRound) (value_array_2_ctor x y)))
+)
+
+(decl uadd_sat (Type Value Value) Value)
+(extractor
+    (uadd_sat ty x y)
+    (inst_data ty (InstructionData.Binary (Opcode.UaddSat) (value_array_2 x y)))
+)
+(rule (uadd_sat ty x y)
+    (make_inst ty (InstructionData.Binary (Opcode.UaddSat) (value_array_2_ctor x y)))
+)
+
+(decl sadd_sat (Type Value Value) Value)
+(extractor
+    (sadd_sat ty x y)
+    (inst_data ty (InstructionData.Binary (Opcode.SaddSat) (value_array_2 x y)))
+)
+(rule (sadd_sat ty x y)
+    (make_inst ty (InstructionData.Binary (Opcode.SaddSat) (value_array_2_ctor x y)))
+)
+
+(decl usub_sat (Type Value Value) Value)
+(extractor
+    (usub_sat ty x y)
+    (inst_data ty (InstructionData.Binary (Opcode.UsubSat) (value_array_2 x y)))
+)
+(rule (usub_sat ty x y)
+    (make_inst ty (InstructionData.Binary (Opcode.UsubSat) (value_array_2_ctor x y)))
+)
+
+(decl ssub_sat (Type Value Value) Value)
+(extractor
+    (ssub_sat ty x y)
+    (inst_data ty (InstructionData.Binary (Opcode.SsubSat) (value_array_2 x y)))
+)
+(rule (ssub_sat ty x y)
+    (make_inst ty (InstructionData.Binary (Opcode.SsubSat) (value_array_2_ctor x y)))
+)
+
+(decl load (Type MemFlags Value Offset32) Value)
+(extractor
+    (load ty MemFlags p Offset)
+    (inst_data ty (InstructionData.Load (Opcode.Load) p MemFlags Offset))
+)
+(rule (load ty MemFlags p Offset)
+    (make_inst ty (InstructionData.Load (Opcode.Load) p MemFlags Offset))
+)
+
+(decl uload8 (Type MemFlags Value Offset32) Value)
+(extractor
+    (uload8 ty MemFlags p Offset)
+    (inst_data ty (InstructionData.Load (Opcode.Uload8) p MemFlags Offset))
+)
+(rule (uload8 ty MemFlags p Offset)
+    (make_inst ty (InstructionData.Load (Opcode.Uload8) p MemFlags Offset))
+)
+
+(decl sload8 (Type MemFlags Value Offset32) Value)
+(extractor
+    (sload8 ty MemFlags p Offset)
+    (inst_data ty (InstructionData.Load (Opcode.Sload8) p MemFlags Offset))
+)
+(rule (sload8 ty MemFlags p Offset)
+    (make_inst ty (InstructionData.Load (Opcode.Sload8) p MemFlags Offset))
+)
+
+(decl uload16 (Type MemFlags Value Offset32) Value)
+(extractor
+    (uload16 ty MemFlags p Offset)
+    (inst_data ty (InstructionData.Load (Opcode.Uload16) p MemFlags Offset))
+)
+(rule (uload16 ty MemFlags p Offset)
+    (make_inst ty (InstructionData.Load (Opcode.Uload16) p MemFlags Offset))
+)
+
+(decl sload16 (Type MemFlags Value Offset32) Value)
+(extractor
+    (sload16 ty MemFlags p Offset)
+    (inst_data ty (InstructionData.Load (Opcode.Sload16) p MemFlags Offset))
+)
+(rule (sload16 ty MemFlags p Offset)
+    (make_inst ty (InstructionData.Load (Opcode.Sload16) p MemFlags Offset))
+)
+
+(decl uload32 (Type MemFlags Value Offset32) Value)
+(extractor
+    (uload32 ty MemFlags p Offset)
+    (inst_data ty (InstructionData.Load (Opcode.Uload32) p MemFlags Offset))
+)
+(rule (uload32 ty MemFlags p Offset)
+    (make_inst ty (InstructionData.Load (Opcode.Uload32) p MemFlags Offset))
+)
+
+(decl sload32 (Type MemFlags Value Offset32) Value)
+(extractor
+    (sload32 ty MemFlags p Offset)
+    (inst_data ty (InstructionData.Load (Opcode.Sload32) p MemFlags Offset))
+)
+(rule (sload32 ty MemFlags p Offset)
+    (make_inst ty (InstructionData.Load (Opcode.Sload32) p MemFlags Offset))
+)
+
+(decl uload8x8 (Type MemFlags Value Offset32) Value)
+(extractor
+    (uload8x8 ty MemFlags p Offset)
+    (inst_data ty (InstructionData.Load (Opcode.Uload8x8) p MemFlags Offset))
+)
+(rule (uload8x8 ty MemFlags p Offset)
+    (make_inst ty (InstructionData.Load (Opcode.Uload8x8) p MemFlags Offset))
+)
+
+(decl sload8x8 (Type MemFlags Value Offset32) Value)
+(extractor
+    (sload8x8 ty MemFlags p Offset)
+    (inst_data ty (InstructionData.Load (Opcode.Sload8x8) p MemFlags Offset))
+)
+(rule (sload8x8 ty MemFlags p Offset)
+    (make_inst ty (InstructionData.Load (Opcode.Sload8x8) p MemFlags Offset))
+)
+
+(decl uload16x4 (Type MemFlags Value Offset32) Value)
+(extractor
+    (uload16x4 ty MemFlags p Offset)
+    (inst_data ty (InstructionData.Load (Opcode.Uload16x4) p MemFlags Offset))
+)
+(rule (uload16x4 ty MemFlags p Offset)
+    (make_inst ty (InstructionData.Load (Opcode.Uload16x4) p MemFlags Offset))
+)
+
+(decl sload16x4 (Type MemFlags Value Offset32) Value)
+(extractor
+    (sload16x4 ty MemFlags p Offset)
+    (inst_data ty (InstructionData.Load (Opcode.Sload16x4) p MemFlags Offset))
+)
+(rule (sload16x4 ty MemFlags p Offset)
+    (make_inst ty (InstructionData.Load (Opcode.Sload16x4) p MemFlags Offset))
+)
+
+(decl uload32x2 (Type MemFlags Value Offset32) Value)
+(extractor
+    (uload32x2 ty MemFlags p Offset)
+    (inst_data ty (InstructionData.Load (Opcode.Uload32x2) p MemFlags Offset))
+)
+(rule (uload32x2 ty MemFlags p Offset)
+    (make_inst ty (InstructionData.Load (Opcode.Uload32x2) p MemFlags Offset))
+)
+
+(decl sload32x2 (Type MemFlags Value Offset32) Value)
+(extractor
+    (sload32x2 ty MemFlags p Offset)
+    (inst_data ty (InstructionData.Load (Opcode.Sload32x2) p MemFlags Offset))
+)
+(rule (sload32x2 ty MemFlags p Offset)
+    (make_inst ty (InstructionData.Load (Opcode.Sload32x2) p MemFlags Offset))
+)
+
+(decl stack_load (Type StackSlot Offset32) Value)
+(extractor
+    (stack_load ty SS Offset)
+    (inst_data ty (InstructionData.StackLoad (Opcode.StackLoad) SS Offset))
+)
+(rule (stack_load ty SS Offset)
+    (make_inst ty (InstructionData.StackLoad (Opcode.StackLoad) SS Offset))
+)
+
+(decl stack_addr (Type StackSlot Offset32) Value)
+(extractor
+    (stack_addr ty SS Offset)
+    (inst_data ty (InstructionData.StackLoad (Opcode.StackAddr) SS Offset))
+)
+(rule (stack_addr ty SS Offset)
+    (make_inst ty (InstructionData.StackLoad (Opcode.StackAddr) SS Offset))
+)
+
+(decl dynamic_stack_load (Type DynamicStackSlot) Value)
+(extractor
+    (dynamic_stack_load ty DSS)
+    (inst_data ty (InstructionData.DynamicStackLoad (Opcode.DynamicStackLoad) DSS))
+)
+(rule (dynamic_stack_load ty DSS)
+    (make_inst ty (InstructionData.DynamicStackLoad (Opcode.DynamicStackLoad) DSS))
+)
+
+(decl dynamic_stack_addr (Type DynamicStackSlot) Value)
+(extractor
+    (dynamic_stack_addr ty DSS)
+    (inst_data ty (InstructionData.DynamicStackLoad (Opcode.DynamicStackAddr) DSS))
+)
+(rule (dynamic_stack_addr ty DSS)
+    (make_inst ty (InstructionData.DynamicStackLoad (Opcode.DynamicStackAddr) DSS))
+)
+
+(decl global_value (Type GlobalValue) Value)
+(extractor
+    (global_value ty GV)
+    (inst_data ty (InstructionData.UnaryGlobalValue (Opcode.GlobalValue) GV))
+)
+(rule (global_value ty GV)
+    (make_inst ty (InstructionData.UnaryGlobalValue (Opcode.GlobalValue) GV))
+)
+
+(decl symbol_value (Type GlobalValue) Value)
+(extractor
+    (symbol_value ty GV)
+    (inst_data ty (InstructionData.UnaryGlobalValue (Opcode.SymbolValue) GV))
+)
+(rule (symbol_value ty GV)
+    (make_inst ty (InstructionData.UnaryGlobalValue (Opcode.SymbolValue) GV))
+)
+
+(decl tls_value (Type GlobalValue) Value)
+(extractor
+    (tls_value ty GV)
+    (inst_data ty (InstructionData.UnaryGlobalValue (Opcode.TlsValue) GV))
+)
+(rule (tls_value ty GV)
+    (make_inst ty (InstructionData.UnaryGlobalValue (Opcode.TlsValue) GV))
+)
+
+(decl get_pinned_reg (Type ) Value)
+(extractor
+    (get_pinned_reg ty )
+    (inst_data ty (InstructionData.NullAry (Opcode.GetPinnedReg)))
+)
+(rule (get_pinned_reg ty )
+    (make_inst ty (InstructionData.NullAry (Opcode.GetPinnedReg)))
+)
+
+(decl get_frame_pointer (Type ) Value)
+(extractor
+    (get_frame_pointer ty )
+    (inst_data ty (InstructionData.NullAry (Opcode.GetFramePointer)))
+)
+(rule (get_frame_pointer ty )
+    (make_inst ty (InstructionData.NullAry (Opcode.GetFramePointer)))
+)
+
+(decl get_stack_pointer (Type ) Value)
+(extractor
+    (get_stack_pointer ty )
+    (inst_data ty (InstructionData.NullAry (Opcode.GetStackPointer)))
+)
+(rule (get_stack_pointer ty )
+    (make_inst ty (InstructionData.NullAry (Opcode.GetStackPointer)))
+)
+
+(decl get_return_address (Type ) Value)
+(extractor
+    (get_return_address ty )
+    (inst_data ty (InstructionData.NullAry (Opcode.GetReturnAddress)))
+)
+(rule (get_return_address ty )
+    (make_inst ty (InstructionData.NullAry (Opcode.GetReturnAddress)))
+)
+
+(decl table_addr (Type Table Value Offset32) Value)
+(extractor
+    (table_addr ty T p Offset)
+    (inst_data ty (InstructionData.TableAddr (Opcode.TableAddr) p T Offset))
+)
+(rule (table_addr ty T p Offset)
+    (make_inst ty (InstructionData.TableAddr (Opcode.TableAddr) p T Offset))
+)
+
+(decl iconst (Type Imm64) Value)
+(extractor
+    (iconst ty N)
+    (inst_data ty (InstructionData.UnaryImm (Opcode.Iconst) N))
+)
+(rule (iconst ty N)
+    (make_inst ty (InstructionData.UnaryImm (Opcode.Iconst) N))
+)
+
+(decl f32const (Type Ieee32) Value)
+(extractor
+    (f32const ty N)
+    (inst_data ty (InstructionData.UnaryIeee32 (Opcode.F32const) N))
+)
+(rule (f32const ty N)
+    (make_inst ty (InstructionData.UnaryIeee32 (Opcode.F32const) N))
+)
+
+(decl f64const (Type Ieee64) Value)
+(extractor
+    (f64const ty N)
+    (inst_data ty (InstructionData.UnaryIeee64 (Opcode.F64const) N))
+)
+(rule (f64const ty N)
+    (make_inst ty (InstructionData.UnaryIeee64 (Opcode.F64const) N))
+)
+
+(decl vconst (Type Constant) Value)
+(extractor
+    (vconst ty N)
+    (inst_data ty (InstructionData.UnaryConst (Opcode.Vconst) N))
+)
+(rule (vconst ty N)
+    (make_inst ty (InstructionData.UnaryConst (Opcode.Vconst) N))
+)
+
+(decl shuffle (Type Value Value Immediate) Value)
+(extractor
+    (shuffle ty a b mask)
+    (inst_data ty (InstructionData.Shuffle (Opcode.Shuffle) (value_array_2 a b) mask))
+)
+(rule (shuffle ty a b mask)
+    (make_inst ty (InstructionData.Shuffle (Opcode.Shuffle) (value_array_2_ctor a b) mask))
+)
+
+(decl null (Type ) Value)
+(extractor
+    (null ty )
+    (inst_data ty (InstructionData.NullAry (Opcode.Null)))
+)
+(rule (null ty )
+    (make_inst ty (InstructionData.NullAry (Opcode.Null)))
+)
+
+(decl select (Type Value Value Value) Value)
+(extractor
+    (select ty c x y)
+    (inst_data ty (InstructionData.Ternary (Opcode.Select) (value_array_3 c x y)))
+)
+(rule (select ty c x y)
+    (make_inst ty (InstructionData.Ternary (Opcode.Select) (value_array_3_ctor c x y)))
+)
+
+(decl select_spectre_guard (Type Value Value Value) Value)
+(extractor
+    (select_spectre_guard ty c x y)
+    (inst_data ty (InstructionData.Ternary (Opcode.SelectSpectreGuard) (value_array_3 c x y)))
+)
+(rule (select_spectre_guard ty c x y)
+    (make_inst ty (InstructionData.Ternary (Opcode.SelectSpectreGuard) (value_array_3_ctor c x y)))
+)
+
+(decl bitselect (Type Value Value Value) Value)
+(extractor
+    (bitselect ty c x y)
+    (inst_data ty (InstructionData.Ternary (Opcode.Bitselect) (value_array_3 c x y)))
+)
+(rule (bitselect ty c x y)
+    (make_inst ty (InstructionData.Ternary (Opcode.Bitselect) (value_array_3_ctor c x y)))
+)
+
+(decl x86_blendv (Type Value Value Value) Value)
+(extractor
+    (x86_blendv ty c x y)
+    (inst_data ty (InstructionData.Ternary (Opcode.X86Blendv) (value_array_3 c x y)))
+)
+(rule (x86_blendv ty c x y)
+    (make_inst ty (InstructionData.Ternary (Opcode.X86Blendv) (value_array_3_ctor c x y)))
+)
+
+(decl vany_true (Type Value) Value)
+(extractor
+    (vany_true ty a)
+    (inst_data ty (InstructionData.Unary (Opcode.VanyTrue) a))
+)
+(rule (vany_true ty a)
+    (make_inst ty (InstructionData.Unary (Opcode.VanyTrue) a))
+)
+
+(decl vall_true (Type Value) Value)
+(extractor
+    (vall_true ty a)
+    (inst_data ty (InstructionData.Unary (Opcode.VallTrue) a))
+)
+(rule (vall_true ty a)
+    (make_inst ty (InstructionData.Unary (Opcode.VallTrue) a))
+)
+
+(decl vhigh_bits (Type Value) Value)
+(extractor
+    (vhigh_bits ty a)
+    (inst_data ty (InstructionData.Unary (Opcode.VhighBits) a))
+)
+(rule (vhigh_bits ty a)
+    (make_inst ty (InstructionData.Unary (Opcode.VhighBits) a))
+)
+
+(decl icmp (Type IntCC Value Value) Value)
+(extractor
+    (icmp ty Cond x y)
+    (inst_data ty (InstructionData.IntCompare (Opcode.Icmp) (value_array_2 x y) Cond))
+)
+(rule (icmp ty Cond x y)
+    (make_inst ty (InstructionData.IntCompare (Opcode.Icmp) (value_array_2_ctor x y) Cond))
+)
+
+(decl icmp_imm (Type IntCC Value Imm64) Value)
+(extractor
+    (icmp_imm ty Cond x Y)
+    (inst_data ty (InstructionData.IntCompareImm (Opcode.IcmpImm) x Cond Y))
+)
+(rule (icmp_imm ty Cond x Y)
+    (make_inst ty (InstructionData.IntCompareImm (Opcode.IcmpImm) x Cond Y))
+)
+
+(decl iadd (Type Value Value) Value)
+(extractor
+    (iadd ty x y)
+    (inst_data ty (InstructionData.Binary (Opcode.Iadd) (value_array_2 x y)))
+)
+(rule (iadd ty x y)
+    (make_inst ty (InstructionData.Binary (Opcode.Iadd) (value_array_2_ctor x y)))
+)
+
+(decl isub (Type Value Value) Value)
+(extractor
+    (isub ty x y)
+    (inst_data ty (InstructionData.Binary (Opcode.Isub) (value_array_2 x y)))
+)
+(rule (isub ty x y)
+    (make_inst ty (InstructionData.Binary (Opcode.Isub) (value_array_2_ctor x y)))
+)
+
+(decl ineg (Type Value) Value)
+(extractor
+    (ineg ty x)
+    (inst_data ty (InstructionData.Unary (Opcode.Ineg) x))
+)
+(rule (ineg ty x)
+    (make_inst ty (InstructionData.Unary (Opcode.Ineg) x))
+)
+
+(decl iabs (Type Value) Value)
+(extractor
+    (iabs ty x)
+    (inst_data ty (InstructionData.Unary (Opcode.Iabs) x))
+)
+(rule (iabs ty x)
+    (make_inst ty (InstructionData.Unary (Opcode.Iabs) x))
+)
+
+(decl imul (Type Value Value) Value)
+(extractor
+    (imul ty x y)
+    (inst_data ty (InstructionData.Binary (Opcode.Imul) (value_array_2 x y)))
+)
+(rule (imul ty x y)
+    (make_inst ty (InstructionData.Binary (Opcode.Imul) (value_array_2_ctor x y)))
+)
+
+(decl umulhi (Type Value Value) Value)
+(extractor
+    (umulhi ty x y)
+    (inst_data ty (InstructionData.Binary (Opcode.Umulhi) (value_array_2 x y)))
+)
+(rule (umulhi ty x y)
+    (make_inst ty (InstructionData.Binary (Opcode.Umulhi) (value_array_2_ctor x y)))
+)
+
+(decl smulhi (Type Value Value) Value)
+(extractor
+    (smulhi ty x y)
+    (inst_data ty (InstructionData.Binary (Opcode.Smulhi) (value_array_2 x y)))
+)
+(rule (smulhi ty x y)
+    (make_inst ty (InstructionData.Binary (Opcode.Smulhi) (value_array_2_ctor x y)))
+)
+
+(decl sqmul_round_sat (Type Value Value) Value)
+(extractor
+    (sqmul_round_sat ty x y)
+    (inst_data ty (InstructionData.Binary (Opcode.SqmulRoundSat) (value_array_2 x y)))
+)
+(rule (sqmul_round_sat ty x y)
+    (make_inst ty (InstructionData.Binary (Opcode.SqmulRoundSat) (value_array_2_ctor x y)))
+)
+
+(decl x86_pmulhrsw (Type Value Value) Value)
+(extractor
+    (x86_pmulhrsw ty x y)
+    (inst_data ty (InstructionData.Binary (Opcode.X86Pmulhrsw) (value_array_2 x y)))
+)
+(rule (x86_pmulhrsw ty x y)
+    (make_inst ty (InstructionData.Binary (Opcode.X86Pmulhrsw) (value_array_2_ctor x y)))
+)
+
+(decl udiv (Type Value Value) Value)
+(extractor
+    (udiv ty x y)
+    (inst_data ty (InstructionData.Binary (Opcode.Udiv) (value_array_2 x y)))
+)
+(rule (udiv ty x y)
+    (make_inst ty (InstructionData.Binary (Opcode.Udiv) (value_array_2_ctor x y)))
+)
+
+(decl sdiv (Type Value Value) Value)
+(extractor
+    (sdiv ty x y)
+    (inst_data ty (InstructionData.Binary (Opcode.Sdiv) (value_array_2 x y)))
+)
+(rule (sdiv ty x y)
+    (make_inst ty (InstructionData.Binary (Opcode.Sdiv) (value_array_2_ctor x y)))
+)
+
+(decl urem (Type Value Value) Value)
+(extractor
+    (urem ty x y)
+    (inst_data ty (InstructionData.Binary (Opcode.Urem) (value_array_2 x y)))
+)
+(rule (urem ty x y)
+    (make_inst ty (InstructionData.Binary (Opcode.Urem) (value_array_2_ctor x y)))
+)
+
+(decl srem (Type Value Value) Value)
+(extractor
+    (srem ty x y)
+    (inst_data ty (InstructionData.Binary (Opcode.Srem) (value_array_2 x y)))
+)
+(rule (srem ty x y)
+    (make_inst ty (InstructionData.Binary (Opcode.Srem) (value_array_2_ctor x y)))
+)
+
+(decl iadd_imm (Type Value Imm64) Value)
+(extractor
+    (iadd_imm ty x Y)
+    (inst_data ty (InstructionData.BinaryImm64 (Opcode.IaddImm) x Y))
+)
+(rule (iadd_imm ty x Y)
+    (make_inst ty (InstructionData.BinaryImm64 (Opcode.IaddImm) x Y))
+)
+
+(decl imul_imm (Type Value Imm64) Value)
+(extractor
+    (imul_imm ty x Y)
+    (inst_data ty (InstructionData.BinaryImm64 (Opcode.ImulImm) x Y))
+)
+(rule (imul_imm ty x Y)
+    (make_inst ty (InstructionData.BinaryImm64 (Opcode.ImulImm) x Y))
+)
+
+(decl udiv_imm (Type Value Imm64) Value)
+(extractor
+    (udiv_imm ty x Y)
+    (inst_data ty (InstructionData.BinaryImm64 (Opcode.UdivImm) x Y))
+)
+(rule (udiv_imm ty x Y)
+    (make_inst ty (InstructionData.BinaryImm64 (Opcode.UdivImm) x Y))
+)
+
+(decl sdiv_imm (Type Value Imm64) Value)
+(extractor
+    (sdiv_imm ty x Y)
+    (inst_data ty (InstructionData.BinaryImm64 (Opcode.SdivImm) x Y))
+)
+(rule (sdiv_imm ty x Y)
+    (make_inst ty (InstructionData.BinaryImm64 (Opcode.SdivImm) x Y))
+)
+
+(decl urem_imm (Type Value Imm64) Value)
+(extractor
+    (urem_imm ty x Y)
+    (inst_data ty (InstructionData.BinaryImm64 (Opcode.UremImm) x Y))
+)
+(rule (urem_imm ty x Y)
+    (make_inst ty (InstructionData.BinaryImm64 (Opcode.UremImm) x Y))
+)
+
+(decl srem_imm (Type Value Imm64) Value)
+(extractor
+    (srem_imm ty x Y)
+    (inst_data ty (InstructionData.BinaryImm64 (Opcode.SremImm) x Y))
+)
+(rule (srem_imm ty x Y)
+    (make_inst ty (InstructionData.BinaryImm64 (Opcode.SremImm) x Y))
+)
+
+(decl irsub_imm (Type Value Imm64) Value)
+(extractor
+    (irsub_imm ty x Y)
+    (inst_data ty (InstructionData.BinaryImm64 (Opcode.IrsubImm) x Y))
+)
+(rule (irsub_imm ty x Y)
+    (make_inst ty (InstructionData.BinaryImm64 (Opcode.IrsubImm) x Y))
+)
+
+(decl iadd_cin (Type Value Value Value) Value)
+(extractor
+    (iadd_cin ty x y c_in)
+    (inst_data ty (InstructionData.Ternary (Opcode.IaddCin) (value_array_3 x y c_in)))
+)
+(rule (iadd_cin ty x y c_in)
+    (make_inst ty (InstructionData.Ternary (Opcode.IaddCin) (value_array_3_ctor x y c_in)))
+)
+
+(decl uadd_overflow_trap (Type Value Value TrapCode) Value)
+(extractor
+    (uadd_overflow_trap ty x y code)
+    (inst_data ty (InstructionData.IntAddTrap (Opcode.UaddOverflowTrap) (value_array_2 x y) code))
+)
+(rule (uadd_overflow_trap ty x y code)
+    (make_inst ty (InstructionData.IntAddTrap (Opcode.UaddOverflowTrap) (value_array_2_ctor x y) code))
+)
+
+(decl isub_bin (Type Value Value Value) Value)
+(extractor
+    (isub_bin ty x y b_in)
+    (inst_data ty (InstructionData.Ternary (Opcode.IsubBin) (value_array_3 x y b_in)))
+)
+(rule (isub_bin ty x y b_in)
+    (make_inst ty (InstructionData.Ternary (Opcode.IsubBin) (value_array_3_ctor x y b_in)))
+)
+
+(decl band (Type Value Value) Value)
+(extractor
+    (band ty x y)
+    (inst_data ty (InstructionData.Binary (Opcode.Band) (value_array_2 x y)))
+)
+(rule (band ty x y)
+    (make_inst ty (InstructionData.Binary (Opcode.Band) (value_array_2_ctor x y)))
+)
+
+(decl bor (Type Value Value) Value)
+(extractor
+    (bor ty x y)
+    (inst_data ty (InstructionData.Binary (Opcode.Bor) (value_array_2 x y)))
+)
+(rule (bor ty x y)
+    (make_inst ty (InstructionData.Binary (Opcode.Bor) (value_array_2_ctor x y)))
+)
+
+(decl bxor (Type Value Value) Value)
+(extractor
+    (bxor ty x y)
+    (inst_data ty (InstructionData.Binary (Opcode.Bxor) (value_array_2 x y)))
+)
+(rule (bxor ty x y)
+    (make_inst ty (InstructionData.Binary (Opcode.Bxor) (value_array_2_ctor x y)))
+)
+
+(decl bnot (Type Value) Value)
+(extractor
+    (bnot ty x)
+    (inst_data ty (InstructionData.Unary (Opcode.Bnot) x))
+)
+(rule (bnot ty x)
+    (make_inst ty (InstructionData.Unary (Opcode.Bnot) x))
+)
+
+(decl band_not (Type Value Value) Value)
+(extractor
+    (band_not ty x y)
+    (inst_data ty (InstructionData.Binary (Opcode.BandNot) (value_array_2 x y)))
+)
+(rule (band_not ty x y)
+    (make_inst ty (InstructionData.Binary (Opcode.BandNot) (value_array_2_ctor x y)))
+)
+
+(decl bor_not (Type Value Value) Value)
+(extractor
+    (bor_not ty x y)
+    (inst_data ty (InstructionData.Binary (Opcode.BorNot) (value_array_2 x y)))
+)
+(rule (bor_not ty x y)
+    (make_inst ty (InstructionData.Binary (Opcode.BorNot) (value_array_2_ctor x y)))
+)
+
+(decl bxor_not (Type Value Value) Value)
+(extractor
+    (bxor_not ty x y)
+    (inst_data ty (InstructionData.Binary (Opcode.BxorNot) (value_array_2 x y)))
+)
+(rule (bxor_not ty x y)
+    (make_inst ty (InstructionData.Binary (Opcode.BxorNot) (value_array_2_ctor x y)))
+)
+
+(decl band_imm (Type Value Imm64) Value)
+(extractor
+    (band_imm ty x Y)
+    (inst_data ty (InstructionData.BinaryImm64 (Opcode.BandImm) x Y))
+)
+(rule (band_imm ty x Y)
+    (make_inst ty (InstructionData.BinaryImm64 (Opcode.BandImm) x Y))
+)
+
+(decl bor_imm (Type Value Imm64) Value)
+(extractor
+    (bor_imm ty x Y)
+    (inst_data ty (InstructionData.BinaryImm64 (Opcode.BorImm) x Y))
+)
+(rule (bor_imm ty x Y)
+    (make_inst ty (InstructionData.BinaryImm64 (Opcode.BorImm) x Y))
+)
+
+(decl bxor_imm (Type Value Imm64) Value)
+(extractor
+    (bxor_imm ty x Y)
+    (inst_data ty (InstructionData.BinaryImm64 (Opcode.BxorImm) x Y))
+)
+(rule (bxor_imm ty x Y)
+    (make_inst ty (InstructionData.BinaryImm64 (Opcode.BxorImm) x Y))
+)
+
+(decl rotl (Type Value Value) Value)
+(extractor
+    (rotl ty x y)
+    (inst_data ty (InstructionData.Binary (Opcode.Rotl) (value_array_2 x y)))
+)
+(rule (rotl ty x y)
+    (make_inst ty (InstructionData.Binary (Opcode.Rotl) (value_array_2_ctor x y)))
+)
+
+(decl rotr (Type Value Value) Value)
+(extractor
+    (rotr ty x y)
+    (inst_data ty (InstructionData.Binary (Opcode.Rotr) (value_array_2 x y)))
+)
+(rule (rotr ty x y)
+    (make_inst ty (InstructionData.Binary (Opcode.Rotr) (value_array_2_ctor x y)))
+)
+
+(decl rotl_imm (Type Value Imm64) Value)
+(extractor
+    (rotl_imm ty x Y)
+    (inst_data ty (InstructionData.BinaryImm64 (Opcode.RotlImm) x Y))
+)
+(rule (rotl_imm ty x Y)
+    (make_inst ty (InstructionData.BinaryImm64 (Opcode.RotlImm) x Y))
+)
+
+(decl rotr_imm (Type Value Imm64) Value)
+(extractor
+    (rotr_imm ty x Y)
+    (inst_data ty (InstructionData.BinaryImm64 (Opcode.RotrImm) x Y))
+)
+(rule (rotr_imm ty x Y)
+    (make_inst ty (InstructionData.BinaryImm64 (Opcode.RotrImm) x Y))
+)
+
+(decl ishl (Type Value Value) Value)
+(extractor
+    (ishl ty x y)
+    (inst_data ty (InstructionData.Binary (Opcode.Ishl) (value_array_2 x y)))
+)
+(rule (ishl ty x y)
+    (make_inst ty (InstructionData.Binary (Opcode.Ishl) (value_array_2_ctor x y)))
+)
+
+(decl ushr (Type Value Value) Value)
+(extractor
+    (ushr ty x y)
+    (inst_data ty (InstructionData.Binary (Opcode.Ushr) (value_array_2 x y)))
+)
+(rule (ushr ty x y)
+    (make_inst ty (InstructionData.Binary (Opcode.Ushr) (value_array_2_ctor x y)))
+)
+
+(decl sshr (Type Value Value) Value)
+(extractor
+    (sshr ty x y)
+    (inst_data ty (InstructionData.Binary (Opcode.Sshr) (value_array_2 x y)))
+)
+(rule (sshr ty x y)
+    (make_inst ty (InstructionData.Binary (Opcode.Sshr) (value_array_2_ctor x y)))
+)
+
+(decl ishl_imm (Type Value Imm64) Value)
+(extractor
+    (ishl_imm ty x Y)
+    (inst_data ty (InstructionData.BinaryImm64 (Opcode.IshlImm) x Y))
+)
+(rule (ishl_imm ty x Y)
+    (make_inst ty (InstructionData.BinaryImm64 (Opcode.IshlImm) x Y))
+)
+
+(decl ushr_imm (Type Value Imm64) Value)
+(extractor
+    (ushr_imm ty x Y)
+    (inst_data ty (InstructionData.BinaryImm64 (Opcode.UshrImm) x Y))
+)
+(rule (ushr_imm ty x Y)
+    (make_inst ty (InstructionData.BinaryImm64 (Opcode.UshrImm) x Y))
+)
+
+(decl sshr_imm (Type Value Imm64) Value)
+(extractor
+    (sshr_imm ty x Y)
+    (inst_data ty (InstructionData.BinaryImm64 (Opcode.SshrImm) x Y))
+)
+(rule (sshr_imm ty x Y)
+    (make_inst ty (InstructionData.BinaryImm64 (Opcode.SshrImm) x Y))
+)
+
+(decl bitrev (Type Value) Value)
+(extractor
+    (bitrev ty x)
+    (inst_data ty (InstructionData.Unary (Opcode.Bitrev) x))
+)
+(rule (bitrev ty x)
+    (make_inst ty (InstructionData.Unary (Opcode.Bitrev) x))
+)
+
+(decl clz (Type Value) Value)
+(extractor
+    (clz ty x)
+    (inst_data ty (InstructionData.Unary (Opcode.Clz) x))
+)
+(rule (clz ty x)
+    (make_inst ty (InstructionData.Unary (Opcode.Clz) x))
+)
+
+(decl cls (Type Value) Value)
+(extractor
+    (cls ty x)
+    (inst_data ty (InstructionData.Unary (Opcode.Cls) x))
+)
+(rule (cls ty x)
+    (make_inst ty (InstructionData.Unary (Opcode.Cls) x))
+)
+
+(decl ctz (Type Value) Value)
+(extractor
+    (ctz ty x)
+    (inst_data ty (InstructionData.Unary (Opcode.Ctz) x))
+)
+(rule (ctz ty x)
+    (make_inst ty (InstructionData.Unary (Opcode.Ctz) x))
+)
+
+(decl bswap (Type Value) Value)
+(extractor
+    (bswap ty x)
+    (inst_data ty (InstructionData.Unary (Opcode.Bswap) x))
+)
+(rule (bswap ty x)
+    (make_inst ty (InstructionData.Unary (Opcode.Bswap) x))
+)
+
+(decl popcnt (Type Value) Value)
+(extractor
+    (popcnt ty x)
+    (inst_data ty (InstructionData.Unary (Opcode.Popcnt) x))
+)
+(rule (popcnt ty x)
+    (make_inst ty (InstructionData.Unary (Opcode.Popcnt) x))
+)
+
+(decl fcmp (Type FloatCC Value Value) Value)
+(extractor
+    (fcmp ty Cond x y)
+    (inst_data ty (InstructionData.FloatCompare (Opcode.Fcmp) (value_array_2 x y) Cond))
+)
+(rule (fcmp ty Cond x y)
+    (make_inst ty (InstructionData.FloatCompare (Opcode.Fcmp) (value_array_2_ctor x y) Cond))
+)
+
+(decl fadd (Type Value Value) Value)
+(extractor
+    (fadd ty x y)
+    (inst_data ty (InstructionData.Binary (Opcode.Fadd) (value_array_2 x y)))
+)
+(rule (fadd ty x y)
+    (make_inst ty (InstructionData.Binary (Opcode.Fadd) (value_array_2_ctor x y)))
+)
+
+(decl fsub (Type Value Value) Value)
+(extractor
+    (fsub ty x y)
+    (inst_data ty (InstructionData.Binary (Opcode.Fsub) (value_array_2 x y)))
+)
+(rule (fsub ty x y)
+    (make_inst ty (InstructionData.Binary (Opcode.Fsub) (value_array_2_ctor x y)))
+)
+
+(decl fmul (Type Value Value) Value)
+(extractor
+    (fmul ty x y)
+    (inst_data ty (InstructionData.Binary (Opcode.Fmul) (value_array_2 x y)))
+)
+(rule (fmul ty x y)
+    (make_inst ty (InstructionData.Binary (Opcode.Fmul) (value_array_2_ctor x y)))
+)
+
+(decl fdiv (Type Value Value) Value)
+(extractor
+    (fdiv ty x y)
+    (inst_data ty (InstructionData.Binary (Opcode.Fdiv) (value_array_2 x y)))
+)
+(rule (fdiv ty x y)
+    (make_inst ty (InstructionData.Binary (Opcode.Fdiv) (value_array_2_ctor x y)))
+)
+
+(decl sqrt (Type Value) Value)
+(extractor
+    (sqrt ty x)
+    (inst_data ty (InstructionData.Unary (Opcode.Sqrt) x))
+)
+(rule (sqrt ty x)
+    (make_inst ty (InstructionData.Unary (Opcode.Sqrt) x))
+)
+
+(decl fma (Type Value Value Value) Value)
+(extractor
+    (fma ty x y z)
+    (inst_data ty (InstructionData.Ternary (Opcode.Fma) (value_array_3 x y z)))
+)
+(rule (fma ty x y z)
+    (make_inst ty (InstructionData.Ternary (Opcode.Fma) (value_array_3_ctor x y z)))
+)
+
+(decl fneg (Type Value) Value)
+(extractor
+    (fneg ty x)
+    (inst_data ty (InstructionData.Unary (Opcode.Fneg) x))
+)
+(rule (fneg ty x)
+    (make_inst ty (InstructionData.Unary (Opcode.Fneg) x))
+)
+
+(decl fabs (Type Value) Value)
+(extractor
+    (fabs ty x)
+    (inst_data ty (InstructionData.Unary (Opcode.Fabs) x))
+)
+(rule (fabs ty x)
+    (make_inst ty (InstructionData.Unary (Opcode.Fabs) x))
+)
+
+(decl fcopysign (Type Value Value) Value)
+(extractor
+    (fcopysign ty x y)
+    (inst_data ty (InstructionData.Binary (Opcode.Fcopysign) (value_array_2 x y)))
+)
+(rule (fcopysign ty x y)
+    (make_inst ty (InstructionData.Binary (Opcode.Fcopysign) (value_array_2_ctor x y)))
+)
+
+(decl fmin (Type Value Value) Value)
+(extractor
+    (fmin ty x y)
+    (inst_data ty (InstructionData.Binary (Opcode.Fmin) (value_array_2 x y)))
+)
+(rule (fmin ty x y)
+    (make_inst ty (InstructionData.Binary (Opcode.Fmin) (value_array_2_ctor x y)))
+)
+
+(decl fmin_pseudo (Type Value Value) Value)
+(extractor
+    (fmin_pseudo ty x y)
+    (inst_data ty (InstructionData.Binary (Opcode.FminPseudo) (value_array_2 x y)))
+)
+(rule (fmin_pseudo ty x y)
+    (make_inst ty (InstructionData.Binary (Opcode.FminPseudo) (value_array_2_ctor x y)))
+)
+
+(decl fmax (Type Value Value) Value)
+(extractor
+    (fmax ty x y)
+    (inst_data ty (InstructionData.Binary (Opcode.Fmax) (value_array_2 x y)))
+)
+(rule (fmax ty x y)
+    (make_inst ty (InstructionData.Binary (Opcode.Fmax) (value_array_2_ctor x y)))
+)
+
+(decl fmax_pseudo (Type Value Value) Value)
+(extractor
+    (fmax_pseudo ty x y)
+    (inst_data ty (InstructionData.Binary (Opcode.FmaxPseudo) (value_array_2 x y)))
+)
+(rule (fmax_pseudo ty x y)
+    (make_inst ty (InstructionData.Binary (Opcode.FmaxPseudo) (value_array_2_ctor x y)))
+)
+
+(decl ceil (Type Value) Value)
+(extractor
+    (ceil ty x)
+    (inst_data ty (InstructionData.Unary (Opcode.Ceil) x))
+)
+(rule (ceil ty x)
+    (make_inst ty (InstructionData.Unary (Opcode.Ceil) x))
+)
+
+(decl floor (Type Value) Value)
+(extractor
+    (floor ty x)
+    (inst_data ty (InstructionData.Unary (Opcode.Floor) x))
+)
+(rule (floor ty x)
+    (make_inst ty (InstructionData.Unary (Opcode.Floor) x))
+)
+
+(decl trunc (Type Value) Value)
+(extractor
+    (trunc ty x)
+    (inst_data ty (InstructionData.Unary (Opcode.Trunc) x))
+)
+(rule (trunc ty x)
+    (make_inst ty (InstructionData.Unary (Opcode.Trunc) x))
+)
+
+(decl nearest (Type Value) Value)
+(extractor
+    (nearest ty x)
+    (inst_data ty (InstructionData.Unary (Opcode.Nearest) x))
+)
+(rule (nearest ty x)
+    (make_inst ty (InstructionData.Unary (Opcode.Nearest) x))
+)
+
+(decl is_null (Type Value) Value)
+(extractor
+    (is_null ty x)
+    (inst_data ty (InstructionData.Unary (Opcode.IsNull) x))
+)
+(rule (is_null ty x)
+    (make_inst ty (InstructionData.Unary (Opcode.IsNull) x))
+)
+
+(decl is_invalid (Type Value) Value)
+(extractor
+    (is_invalid ty x)
+    (inst_data ty (InstructionData.Unary (Opcode.IsInvalid) x))
+)
+(rule (is_invalid ty x)
+    (make_inst ty (InstructionData.Unary (Opcode.IsInvalid) x))
+)
+
+(decl bitcast (Type MemFlags Value) Value)
+(extractor
+    (bitcast ty MemFlags x)
+    (inst_data ty (InstructionData.LoadNoOffset (Opcode.Bitcast) x MemFlags))
+)
+(rule (bitcast ty MemFlags x)
+    (make_inst ty (InstructionData.LoadNoOffset (Opcode.Bitcast) x MemFlags))
+)
+
+(decl scalar_to_vector (Type Value) Value)
+(extractor
+    (scalar_to_vector ty s)
+    (inst_data ty (InstructionData.Unary (Opcode.ScalarToVector) s))
+)
+(rule (scalar_to_vector ty s)
+    (make_inst ty (InstructionData.Unary (Opcode.ScalarToVector) s))
+)
+
+(decl bmask (Type Value) Value)
+(extractor
+    (bmask ty x)
+    (inst_data ty (InstructionData.Unary (Opcode.Bmask) x))
+)
+(rule (bmask ty x)
+    (make_inst ty (InstructionData.Unary (Opcode.Bmask) x))
+)
+
+(decl ireduce (Type Value) Value)
+(extractor
+    (ireduce ty x)
+    (inst_data ty (InstructionData.Unary (Opcode.Ireduce) x))
+)
+(rule (ireduce ty x)
+    (make_inst ty (InstructionData.Unary (Opcode.Ireduce) x))
+)
+
+(decl snarrow (Type Value Value) Value)
+(extractor
+    (snarrow ty x y)
+    (inst_data ty (InstructionData.Binary (Opcode.Snarrow) (value_array_2 x y)))
+)
+(rule (snarrow ty x y)
+    (make_inst ty (InstructionData.Binary (Opcode.Snarrow) (value_array_2_ctor x y)))
+)
+
+(decl unarrow (Type Value Value) Value)
+(extractor
+    (unarrow ty x y)
+    (inst_data ty (InstructionData.Binary (Opcode.Unarrow) (value_array_2 x y)))
+)
+(rule (unarrow ty x y)
+    (make_inst ty (InstructionData.Binary (Opcode.Unarrow) (value_array_2_ctor x y)))
+)
+
+(decl uunarrow (Type Value Value) Value)
+(extractor
+    (uunarrow ty x y)
+    (inst_data ty (InstructionData.Binary (Opcode.Uunarrow) (value_array_2 x y)))
+)
+(rule (uunarrow ty x y)
+    (make_inst ty (InstructionData.Binary (Opcode.Uunarrow) (value_array_2_ctor x y)))
+)
+
+(decl swiden_low (Type Value) Value)
+(extractor
+    (swiden_low ty x)
+    (inst_data ty (InstructionData.Unary (Opcode.SwidenLow) x))
+)
+(rule (swiden_low ty x)
+    (make_inst ty (InstructionData.Unary (Opcode.SwidenLow) x))
+)
+
+(decl swiden_high (Type Value) Value)
+(extractor
+    (swiden_high ty x)
+    (inst_data ty (InstructionData.Unary (Opcode.SwidenHigh) x))
+)
+(rule (swiden_high ty x)
+    (make_inst ty (InstructionData.Unary (Opcode.SwidenHigh) x))
+)
+
+(decl uwiden_low (Type Value) Value)
+(extractor
+    (uwiden_low ty x)
+    (inst_data ty (InstructionData.Unary (Opcode.UwidenLow) x))
+)
+(rule (uwiden_low ty x)
+    (make_inst ty (InstructionData.Unary (Opcode.UwidenLow) x))
+)
+
+(decl uwiden_high (Type Value) Value)
+(extractor
+    (uwiden_high ty x)
+    (inst_data ty (InstructionData.Unary (Opcode.UwidenHigh) x))
+)
+(rule (uwiden_high ty x)
+    (make_inst ty (InstructionData.Unary (Opcode.UwidenHigh) x))
+)
+
+(decl iadd_pairwise (Type Value Value) Value)
+(extractor
+    (iadd_pairwise ty x y)
+    (inst_data ty (InstructionData.Binary (Opcode.IaddPairwise) (value_array_2 x y)))
+)
+(rule (iadd_pairwise ty x y)
+    (make_inst ty (InstructionData.Binary (Opcode.IaddPairwise) (value_array_2_ctor x y)))
+)
+
+(decl x86_pmaddubsw (Type Value Value) Value)
+(extractor
+    (x86_pmaddubsw ty x y)
+    (inst_data ty (InstructionData.Binary (Opcode.X86Pmaddubsw) (value_array_2 x y)))
+)
+(rule (x86_pmaddubsw ty x y)
+    (make_inst ty (InstructionData.Binary (Opcode.X86Pmaddubsw) (value_array_2_ctor x y)))
+)
+
+(decl uextend (Type Value) Value)
+(extractor
+    (uextend ty x)
+    (inst_data ty (InstructionData.Unary (Opcode.Uextend) x))
+)
+(rule (uextend ty x)
+    (make_inst ty (InstructionData.Unary (Opcode.Uextend) x))
+)
+
+(decl sextend (Type Value) Value)
+(extractor
+    (sextend ty x)
+    (inst_data ty (InstructionData.Unary (Opcode.Sextend) x))
+)
+(rule (sextend ty x)
+    (make_inst ty (InstructionData.Unary (Opcode.Sextend) x))
+)
+
+(decl fpromote (Type Value) Value)
+(extractor
+    (fpromote ty x)
+    (inst_data ty (InstructionData.Unary (Opcode.Fpromote) x))
+)
+(rule (fpromote ty x)
+    (make_inst ty (InstructionData.Unary (Opcode.Fpromote) x))
+)
+
+(decl fdemote (Type Value) Value)
+(extractor
+    (fdemote ty x)
+    (inst_data ty (InstructionData.Unary (Opcode.Fdemote) x))
+)
+(rule (fdemote ty x)
+    (make_inst ty (InstructionData.Unary (Opcode.Fdemote) x))
+)
+
+(decl fvdemote (Type Value) Value)
+(extractor
+    (fvdemote ty x)
+    (inst_data ty (InstructionData.Unary (Opcode.Fvdemote) x))
+)
+(rule (fvdemote ty x)
+    (make_inst ty (InstructionData.Unary (Opcode.Fvdemote) x))
+)
+
+(decl fvpromote_low (Type Value) Value)
+(extractor
+    (fvpromote_low ty a)
+    (inst_data ty (InstructionData.Unary (Opcode.FvpromoteLow) a))
+)
+(rule (fvpromote_low ty a)
+    (make_inst ty (InstructionData.Unary (Opcode.FvpromoteLow) a))
+)
+
+(decl fcvt_to_uint (Type Value) Value)
+(extractor
+    (fcvt_to_uint ty x)
+    (inst_data ty (InstructionData.Unary (Opcode.FcvtToUint) x))
+)
+(rule (fcvt_to_uint ty x)
+    (make_inst ty (InstructionData.Unary (Opcode.FcvtToUint) x))
+)
+
+(decl fcvt_to_sint (Type Value) Value)
+(extractor
+    (fcvt_to_sint ty x)
+    (inst_data ty (InstructionData.Unary (Opcode.FcvtToSint) x))
+)
+(rule (fcvt_to_sint ty x)
+    (make_inst ty (InstructionData.Unary (Opcode.FcvtToSint) x))
+)
+
+(decl fcvt_to_uint_sat (Type Value) Value)
+(extractor
+    (fcvt_to_uint_sat ty x)
+    (inst_data ty (InstructionData.Unary (Opcode.FcvtToUintSat) x))
+)
+(rule (fcvt_to_uint_sat ty x)
+    (make_inst ty (InstructionData.Unary (Opcode.FcvtToUintSat) x))
+)
+
+(decl fcvt_to_sint_sat (Type Value) Value)
+(extractor
+    (fcvt_to_sint_sat ty x)
+    (inst_data ty (InstructionData.Unary (Opcode.FcvtToSintSat) x))
+)
+(rule (fcvt_to_sint_sat ty x)
+    (make_inst ty (InstructionData.Unary (Opcode.FcvtToSintSat) x))
+)
+
+(decl x86_cvtt2dq (Type Value) Value)
+(extractor
+    (x86_cvtt2dq ty x)
+    (inst_data ty (InstructionData.Unary (Opcode.X86Cvtt2dq) x))
+)
+(rule (x86_cvtt2dq ty x)
+    (make_inst ty (InstructionData.Unary (Opcode.X86Cvtt2dq) x))
+)
+
+(decl fcvt_from_uint (Type Value) Value)
+(extractor
+    (fcvt_from_uint ty x)
+    (inst_data ty (InstructionData.Unary (Opcode.FcvtFromUint) x))
+)
+(rule (fcvt_from_uint ty x)
+    (make_inst ty (InstructionData.Unary (Opcode.FcvtFromUint) x))
+)
+
+(decl fcvt_from_sint (Type Value) Value)
+(extractor
+    (fcvt_from_sint ty x)
+    (inst_data ty (InstructionData.Unary (Opcode.FcvtFromSint) x))
+)
+(rule (fcvt_from_sint ty x)
+    (make_inst ty (InstructionData.Unary (Opcode.FcvtFromSint) x))
+)
+
+(decl iconcat (Type Value Value) Value)
+(extractor
+    (iconcat ty lo hi)
+    (inst_data ty (InstructionData.Binary (Opcode.Iconcat) (value_array_2 lo hi)))
+)
+(rule (iconcat ty lo hi)
+    (make_inst ty (InstructionData.Binary (Opcode.Iconcat) (value_array_2_ctor lo hi)))
+)
+
+(decl atomic_rmw (Type MemFlags AtomicRmwOp Value Value) Value)
+(extractor
+    (atomic_rmw ty MemFlags AtomicRmwOp p x)
+    (inst_data ty (InstructionData.AtomicRmw (Opcode.AtomicRmw) (value_array_2 p x) MemFlags AtomicRmwOp))
+)
+(rule (atomic_rmw ty MemFlags AtomicRmwOp p x)
+    (make_inst ty (InstructionData.AtomicRmw (Opcode.AtomicRmw) (value_array_2_ctor p x) MemFlags AtomicRmwOp))
+)
+
+(decl atomic_cas (Type MemFlags Value Value Value) Value)
+(extractor
+    (atomic_cas ty MemFlags p e x)
+    (inst_data ty (InstructionData.AtomicCas (Opcode.AtomicCas) (value_array_3 p e x) MemFlags))
+)
+(rule (atomic_cas ty MemFlags p e x)
+    (make_inst ty (InstructionData.AtomicCas (Opcode.AtomicCas) (value_array_3_ctor p e x) MemFlags))
+)
+
+(decl atomic_load (Type MemFlags Value) Value)
+(extractor
+    (atomic_load ty MemFlags p)
+    (inst_data ty (InstructionData.LoadNoOffset (Opcode.AtomicLoad) p MemFlags))
+)
+(rule (atomic_load ty MemFlags p)
+    (make_inst ty (InstructionData.LoadNoOffset (Opcode.AtomicLoad) p MemFlags))
+)
+
+(decl extract_vector (Type Value Uimm8) Value)
+(extractor
+    (extract_vector ty x y)
+    (inst_data ty (InstructionData.BinaryImm8 (Opcode.ExtractVector) x y))
+)
+(rule (extract_vector ty x y)
+    (make_inst ty (InstructionData.BinaryImm8 (Opcode.ExtractVector) x y))
+)
+
diff --git a/cranelift/codegen/isle_generated_code/isle_aarch64.rs b/cranelift/codegen/isle_generated_code/isle_aarch64.rs
new file mode 100644
index 000000000000..9b1216d4740f
--- /dev/null
+++ b/cranelift/codegen/isle_generated_code/isle_aarch64.rs
@@ -0,0 +1,16275 @@
+// GENERATED BY ISLE. DO NOT EDIT!
+//
+// Generated automatically from the instruction-selection DSL code in:
+// - src/prelude.isle
+// - src/prelude_lower.isle
+// - src/isa/aarch64/inst.isle
+// - src/isa/aarch64/inst_neon.isle
+// - src/isa/aarch64/lower.isle
+// - src/isa/aarch64/lower_dynamic_neon.isle
+// - /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_lower.isle
+
+use super::*; // Pulls in all external types.
+use std::marker::PhantomData;
+
+/// Context during lowering: an implementation of this trait
+/// must be provided with all external constructors and extractors.
+/// A mutable borrow is passed along through all lowering logic.
+pub trait Context {
+    fn unit(&mut self) -> Unit;
+    fn value_type(&mut self, arg0: Value) -> Type;
+    fn u32_nonnegative(&mut self, arg0: u32) -> Option<u32>;
+    fn offset32(&mut self, arg0: Offset32) -> u32;
+    fn u32_lteq(&mut self, arg0: u32, arg1: u32) -> Option<Unit>;
+    fn u8_lteq(&mut self, arg0: u8, arg1: u8) -> Option<Unit>;
+    fn u8_lt(&mut self, arg0: u8, arg1: u8) -> Option<Unit>;
+    fn simm32(&mut self, arg0: Imm64) -> Option<u32>;
+    fn uimm8(&mut self, arg0: Imm64) -> Option<u8>;
+    fn u8_as_u32(&mut self, arg0: u8) -> u32;
+    fn u8_as_u64(&mut self, arg0: u8) -> u64;
+    fn u16_as_u64(&mut self, arg0: u16) -> u64;
+    fn u32_as_u64(&mut self, arg0: u32) -> u64;
+    fn i64_as_u64(&mut self, arg0: i64) -> u64;
+    fn i64_neg(&mut self, arg0: i64) -> i64;
+    fn u128_as_u64(&mut self, arg0: u128) -> Option<u64>;
+    fn u64_as_u32(&mut self, arg0: u64) -> Option<u32>;
+    fn u64_as_i32(&mut self, arg0: u64) -> i32;
+    fn u8_and(&mut self, arg0: u8, arg1: u8) -> u8;
+    fn u8_shl(&mut self, arg0: u8, arg1: u8) -> u8;
+    fn u8_shr(&mut self, arg0: u8, arg1: u8) -> u8;
+    fn u32_add(&mut self, arg0: u32, arg1: u32) -> u32;
+    fn u32_sub(&mut self, arg0: u32, arg1: u32) -> u32;
+    fn u32_and(&mut self, arg0: u32, arg1: u32) -> u32;
+    fn s32_add_fallible(&mut self, arg0: u32, arg1: u32) -> Option<u32>;
+    fn u64_add(&mut self, arg0: u64, arg1: u64) -> u64;
+    fn u64_sub(&mut self, arg0: u64, arg1: u64) -> u64;
+    fn u64_mul(&mut self, arg0: u64, arg1: u64) -> u64;
+    fn u64_sdiv(&mut self, arg0: u64, arg1: u64) -> Option<u64>;
+    fn u64_udiv(&mut self, arg0: u64, arg1: u64) -> Option<u64>;
+    fn u64_and(&mut self, arg0: u64, arg1: u64) -> u64;
+    fn u64_or(&mut self, arg0: u64, arg1: u64) -> u64;
+    fn u64_xor(&mut self, arg0: u64, arg1: u64) -> u64;
+    fn u64_shl(&mut self, arg0: u64, arg1: u64) -> u64;
+    fn imm64_shl(&mut self, arg0: Type, arg1: Imm64, arg2: Imm64) -> Imm64;
+    fn imm64_ushr(&mut self, arg0: Type, arg1: Imm64, arg2: Imm64) -> Imm64;
+    fn imm64_sshr(&mut self, arg0: Type, arg1: Imm64, arg2: Imm64) -> Imm64;
+    fn u64_not(&mut self, arg0: u64) -> u64;
+    fn u64_eq(&mut self, arg0: u64, arg1: u64) -> bool;
+    fn u64_le(&mut self, arg0: u64, arg1: u64) -> bool;
+    fn u64_lt(&mut self, arg0: u64, arg1: u64) -> bool;
+    fn i64_sextend_imm64(&mut self, arg0: Type, arg1: Imm64) -> i64;
+    fn u64_uextend_imm64(&mut self, arg0: Type, arg1: Imm64) -> u64;
+    fn imm64_icmp(&mut self, arg0: Type, arg1: &IntCC, arg2: Imm64, arg3: Imm64) -> Imm64;
+    fn u64_is_zero(&mut self, arg0: u64) -> bool;
+    fn u64_is_odd(&mut self, arg0: u64) -> bool;
+    fn ty_umin(&mut self, arg0: Type) -> u64;
+    fn ty_umax(&mut self, arg0: Type) -> u64;
+    fn ty_smin(&mut self, arg0: Type) -> u64;
+    fn ty_smax(&mut self, arg0: Type) -> u64;
+    fn ty_bits(&mut self, arg0: Type) -> u8;
+    fn ty_bits_u16(&mut self, arg0: Type) -> u16;
+    fn ty_bits_u64(&mut self, arg0: Type) -> u64;
+    fn ty_mask(&mut self, arg0: Type) -> u64;
+    fn ty_lane_mask(&mut self, arg0: Type) -> u64;
+    fn ty_lane_count(&mut self, arg0: Type) -> u64;
+    fn ty_bytes(&mut self, arg0: Type) -> u16;
+    fn lane_type(&mut self, arg0: Type) -> Type;
+    fn ty_half_lanes(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_half_width(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_equal(&mut self, arg0: Type, arg1: Type) -> bool;
+    fn mem_flags_trusted(&mut self) -> MemFlags;
+    fn intcc_reverse(&mut self, arg0: &IntCC) -> IntCC;
+    fn intcc_inverse(&mut self, arg0: &IntCC) -> IntCC;
+    fn floatcc_reverse(&mut self, arg0: &FloatCC) -> FloatCC;
+    fn floatcc_inverse(&mut self, arg0: &FloatCC) -> FloatCC;
+    fn floatcc_unordered(&mut self, arg0: &FloatCC) -> bool;
+    fn fits_in_16(&mut self, arg0: Type) -> Option<Type>;
+    fn fits_in_32(&mut self, arg0: Type) -> Option<Type>;
+    fn lane_fits_in_32(&mut self, arg0: Type) -> Option<Type>;
+    fn fits_in_64(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_32(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_64(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_int_ref_scalar_64_extract(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_int_ref_scalar_64(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_32_or_64(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_8_or_16(&mut self, arg0: Type) -> Option<Type>;
+    fn int_fits_in_32(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_int_ref_64(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_int_ref_16_to_64(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_int(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_scalar(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_scalar_float(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_float_or_vec(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_vector_float(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_vector_not_float(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_vec64(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_vec64_ctor(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_vec128(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_dyn_vec64(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_dyn_vec128(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_vec64_int(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_vec128_int(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_addr64(&mut self, arg0: Type) -> Option<Type>;
+    fn not_vec32x2(&mut self, arg0: Type) -> Option<Type>;
+    fn not_i64x2(&mut self, arg0: Type) -> Option<()>;
+    fn u8_from_uimm8(&mut self, arg0: Uimm8) -> u8;
+    fn u64_from_bool(&mut self, arg0: bool) -> u64;
+    fn u64_from_imm64(&mut self, arg0: Imm64) -> u64;
+    fn nonzero_u64_from_imm64(&mut self, arg0: Imm64) -> Option<u64>;
+    fn imm64_power_of_two(&mut self, arg0: Imm64) -> Option<u64>;
+    fn imm64(&mut self, arg0: u64) -> Imm64;
+    fn imm64_masked(&mut self, arg0: Type, arg1: u64) -> Imm64;
+    fn u32_from_ieee32(&mut self, arg0: Ieee32) -> u32;
+    fn u64_from_ieee64(&mut self, arg0: Ieee64) -> u64;
+    fn multi_lane(&mut self, arg0: Type) -> Option<(u32, u32)>;
+    fn dynamic_lane(&mut self, arg0: Type) -> Option<(u32, u32)>;
+    fn dynamic_int_lane(&mut self, arg0: Type) -> Option<u32>;
+    fn dynamic_fp_lane(&mut self, arg0: Type) -> Option<u32>;
+    fn ty_dyn64_int(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_dyn128_int(&mut self, arg0: Type) -> Option<Type>;
+    fn offset32_to_u32(&mut self, arg0: Offset32) -> u32;
+    fn u32_to_offset32(&mut self, arg0: u32) -> Offset32;
+    fn intcc_unsigned(&mut self, arg0: &IntCC) -> IntCC;
+    fn signed_cond_code(&mut self, arg0: &IntCC) -> Option<IntCC>;
+    fn trap_code_division_by_zero(&mut self) -> TrapCode;
+    fn trap_code_integer_overflow(&mut self) -> TrapCode;
+    fn trap_code_bad_conversion_to_integer(&mut self) -> TrapCode;
+    fn range(&mut self, arg0: usize, arg1: usize) -> Range;
+    fn range_view(&mut self, arg0: Range) -> RangeView;
+    fn value_reg(&mut self, arg0: Reg) -> ValueRegs;
+    fn value_regs(&mut self, arg0: Reg, arg1: Reg) -> ValueRegs;
+    fn value_regs_invalid(&mut self) -> ValueRegs;
+    fn output_none(&mut self) -> InstOutput;
+    fn output(&mut self, arg0: ValueRegs) -> InstOutput;
+    fn output_pair(&mut self, arg0: ValueRegs, arg1: ValueRegs) -> InstOutput;
+    fn output_builder_new(&mut self) -> InstOutputBuilder;
+    fn output_builder_push(&mut self, arg0: &InstOutputBuilder, arg1: ValueRegs) -> Unit;
+    fn output_builder_finish(&mut self, arg0: &InstOutputBuilder) -> InstOutput;
+    fn temp_writable_reg(&mut self, arg0: Type) -> WritableReg;
+    fn is_valid_reg(&mut self, arg0: Reg) -> bool;
+    fn invalid_reg(&mut self) -> Reg;
+    fn mark_value_used(&mut self, arg0: Value) -> Unit;
+    fn put_in_reg(&mut self, arg0: Value) -> Reg;
+    fn put_in_regs(&mut self, arg0: Value) -> ValueRegs;
+    fn ensure_in_vreg(&mut self, arg0: Reg, arg1: Type) -> Reg;
+    fn value_regs_get(&mut self, arg0: ValueRegs, arg1: usize) -> Reg;
+    fn value_regs_len(&mut self, arg0: ValueRegs) -> usize;
+    fn preg_to_reg(&mut self, arg0: PReg) -> Reg;
+    fn value_list_slice(&mut self, arg0: ValueList) -> ValueSlice;
+    fn value_slice_empty(&mut self, arg0: ValueSlice) -> Option<()>;
+    fn value_slice_unwrap(&mut self, arg0: ValueSlice) -> Option<(Value, ValueSlice)>;
+    fn value_slice_len(&mut self, arg0: ValueSlice) -> usize;
+    fn value_slice_get(&mut self, arg0: ValueSlice, arg1: usize) -> Value;
+    fn writable_reg_to_reg(&mut self, arg0: WritableReg) -> Reg;
+    fn inst_results(&mut self, arg0: Inst) -> ValueSlice;
+    fn first_result(&mut self, arg0: Inst) -> Option<Value>;
+    fn inst_data(&mut self, arg0: Inst) -> InstructionData;
+    fn def_inst(&mut self, arg0: Value) -> Option<Inst>;
+    fn zero_value(&mut self, arg0: Value) -> Option<Value>;
+    fn is_sinkable_inst(&mut self, arg0: Value) -> Option<Inst>;
+    fn maybe_uextend(&mut self, arg0: Value) -> Option<Value>;
+    fn emit(&mut self, arg0: &MInst) -> Unit;
+    fn sink_inst(&mut self, arg0: Inst) -> Unit;
+    fn emit_u64_le_const(&mut self, arg0: u64) -> VCodeConstant;
+    fn emit_u128_le_const(&mut self, arg0: u128) -> VCodeConstant;
+    fn const_to_vconst(&mut self, arg0: Constant) -> VCodeConstant;
+    fn tls_model(&mut self, arg0: Type) -> TlsModel;
+    fn tls_model_is_elf_gd(&mut self) -> Option<Unit>;
+    fn tls_model_is_macho(&mut self) -> Option<Unit>;
+    fn tls_model_is_coff(&mut self) -> Option<Unit>;
+    fn preserve_frame_pointers(&mut self) -> Option<Unit>;
+    fn box_external_name(&mut self, arg0: ExternalName) -> BoxExternalName;
+    fn func_ref_data(&mut self, arg0: FuncRef) -> (SigRef, ExternalName, RelocDistance);
+    fn symbol_value_data(
+        &mut self,
+        arg0: GlobalValue,
+    ) -> Option<(ExternalName, RelocDistance, i64)>;
+    fn reloc_distance_near(&mut self, arg0: RelocDistance) -> Option<()>;
+    fn vec_mask_from_immediate(&mut self, arg0: Immediate) -> Option<VecMask>;
+    fn u128_from_immediate(&mut self, arg0: Immediate) -> Option<u128>;
+    fn vconst_from_immediate(&mut self, arg0: Immediate) -> Option<VCodeConstant>;
+    fn u128_from_constant(&mut self, arg0: Constant) -> Option<u128>;
+    fn u64_from_constant(&mut self, arg0: Constant) -> Option<u64>;
+    fn shuffle64_from_imm(&mut self, arg0: Immediate) -> Option<(u8, u8)>;
+    fn shuffle32_from_imm(&mut self, arg0: Immediate) -> Option<(u8, u8, u8, u8)>;
+    fn shuffle16_from_imm(&mut self, arg0: Immediate) -> Option<(u8, u8, u8, u8, u8, u8, u8, u8)>;
+    fn only_writable_reg(&mut self, arg0: WritableValueRegs) -> Option<WritableReg>;
+    fn writable_regs_get(&mut self, arg0: WritableValueRegs, arg1: usize) -> WritableReg;
+    fn abi_num_args(&mut self, arg0: Sig) -> usize;
+    fn abi_get_arg(&mut self, arg0: Sig, arg1: usize) -> ABIArg;
+    fn abi_num_rets(&mut self, arg0: Sig) -> usize;
+    fn abi_get_ret(&mut self, arg0: Sig, arg1: usize) -> ABIArg;
+    fn abi_ret_arg(&mut self, arg0: Sig) -> Option<ABIArg>;
+    fn abi_no_ret_arg(&mut self, arg0: Sig) -> Option<()>;
+    fn abi_sized_stack_arg_space(&mut self, arg0: Sig) -> i64;
+    fn abi_sized_stack_ret_space(&mut self, arg0: Sig) -> i64;
+    fn abi_stackslot_addr(&mut self, arg0: WritableReg, arg1: StackSlot, arg2: Offset32) -> MInst;
+    fn abi_dynamic_stackslot_addr(&mut self, arg0: WritableReg, arg1: DynamicStackSlot) -> MInst;
+    fn abi_arg_only_slot(&mut self, arg0: &ABIArg) -> Option<ABIArgSlot>;
+    fn abi_arg_struct_pointer(&mut self, arg0: &ABIArg) -> Option<(ABIArgSlot, i64, u64)>;
+    fn abi_arg_implicit_pointer(&mut self, arg0: &ABIArg) -> Option<(ABIArgSlot, i64, Type)>;
+    fn real_reg_to_reg(&mut self, arg0: RealReg) -> Reg;
+    fn real_reg_to_writable_reg(&mut self, arg0: RealReg) -> WritableReg;
+    fn gen_move(&mut self, arg0: Type, arg1: WritableReg, arg2: Reg) -> MInst;
+    fn gen_return(&mut self, arg0: ValueSlice) -> Unit;
+    fn gen_return_call(
+        &mut self,
+        arg0: SigRef,
+        arg1: ExternalName,
+        arg2: RelocDistance,
+        arg3: ValueSlice,
+    ) -> InstOutput;
+    fn gen_return_call_indirect(
+        &mut self,
+        arg0: SigRef,
+        arg1: Value,
+        arg2: ValueSlice,
+    ) -> InstOutput;
+    fn safe_divisor_from_imm64(&mut self, arg0: Type, arg1: Imm64) -> Option<u64>;
+    fn sign_return_address_disabled(&mut self) -> Option<Unit>;
+    fn use_lse(&mut self, arg0: Inst) -> Option<()>;
+    fn move_wide_const_from_u64(&mut self, arg0: Type, arg1: u64) -> Option<MoveWideConst>;
+    fn move_wide_const_from_inverted_u64(&mut self, arg0: Type, arg1: u64)
+        -> Option<MoveWideConst>;
+    fn imm_logic_from_u64(&mut self, arg0: Type, arg1: u64) -> Option<ImmLogic>;
+    fn imm_logic_from_imm64(&mut self, arg0: Type, arg1: Imm64) -> Option<ImmLogic>;
+    fn imm_shift_from_imm64(&mut self, arg0: Type, arg1: Imm64) -> Option<ImmShift>;
+    fn imm_shift_from_u8(&mut self, arg0: u8) -> ImmShift;
+    fn imm12_from_u64(&mut self, arg0: u64) -> Option<Imm12>;
+    fn u8_into_uimm5(&mut self, arg0: u8) -> UImm5;
+    fn u8_into_imm12(&mut self, arg0: u8) -> Imm12;
+    fn u64_into_imm_logic(&mut self, arg0: Type, arg1: u64) -> ImmLogic;
+    fn branch_target(&mut self, arg0: &VecMachLabel, arg1: u8) -> BranchTarget;
+    fn targets_jt_size(&mut self, arg0: &VecMachLabel) -> u32;
+    fn targets_jt_space(&mut self, arg0: &VecMachLabel) -> CodeOffset;
+    fn targets_jt_info(&mut self, arg0: &VecMachLabel) -> BoxJTSequenceInfo;
+    fn min_fp_value(&mut self, arg0: bool, arg1: u8, arg2: u8) -> Reg;
+    fn max_fp_value(&mut self, arg0: bool, arg1: u8, arg2: u8) -> Reg;
+    fn fpu_op_ri_ushr(&mut self, arg0: u8, arg1: u8) -> FPUOpRI;
+    fn fpu_op_ri_sli(&mut self, arg0: u8, arg1: u8) -> FPUOpRIMod;
+    fn lshr_from_u64(&mut self, arg0: Type, arg1: u64) -> Option<ShiftOpAndAmt>;
+    fn lshl_from_imm64(&mut self, arg0: Type, arg1: Imm64) -> Option<ShiftOpAndAmt>;
+    fn lshl_from_u64(&mut self, arg0: Type, arg1: u64) -> Option<ShiftOpAndAmt>;
+    fn ashr_from_u64(&mut self, arg0: Type, arg1: u64) -> Option<ShiftOpAndAmt>;
+    fn integral_ty(&mut self, arg0: Type) -> Option<Type>;
+    fn valid_atomic_transaction(&mut self, arg0: Type) -> Option<Type>;
+    fn is_zero_simm9(&mut self, arg0: &SImm9) -> Option<Unit>;
+    fn is_zero_uimm12(&mut self, arg0: &UImm12Scaled) -> Option<Unit>;
+    fn extended_value_from_value(&mut self, arg0: Value) -> Option<ExtendedValue>;
+    fn put_extended_in_reg(&mut self, arg0: &ExtendedValue) -> Reg;
+    fn get_extended_op(&mut self, arg0: &ExtendedValue) -> ExtendOp;
+    fn nzcv(&mut self, arg0: bool, arg1: bool, arg2: bool, arg3: bool) -> NZCV;
+    fn cond_br_zero(&mut self, arg0: Reg) -> CondBrKind;
+    fn cond_br_not_zero(&mut self, arg0: Reg) -> CondBrKind;
+    fn cond_br_cond(&mut self, arg0: &Cond) -> CondBrKind;
+    fn pair_amode(&mut self, arg0: Value, arg1: u32) -> PairAMode;
+    fn zero_reg(&mut self) -> Reg;
+    fn fp_reg(&mut self) -> Reg;
+    fn stack_reg(&mut self) -> Reg;
+    fn writable_link_reg(&mut self) -> WritableReg;
+    fn writable_zero_reg(&mut self) -> WritableReg;
+    fn load_constant64_full(&mut self, arg0: Type, arg1: &ImmExtend, arg2: u64) -> Reg;
+    fn amode(&mut self, arg0: Type, arg1: Value, arg2: u32) -> AMode;
+    fn u64_low32_bits_unset(&mut self, arg0: u64) -> Option<u64>;
+    fn u128_replicated_u64(&mut self, arg0: u128) -> Option<u64>;
+    fn u64_replicated_u32(&mut self, arg0: u64) -> Option<u64>;
+    fn u32_replicated_u16(&mut self, arg0: u64) -> Option<u64>;
+    fn u16_replicated_u8(&mut self, arg0: u64) -> Option<u64>;
+    fn fp_cond_code(&mut self, arg0: &FloatCC) -> Cond;
+    fn cond_code(&mut self, arg0: &IntCC) -> Cond;
+    fn invert_cond(&mut self, arg0: &Cond) -> Cond;
+    fn float_cc_cmp_zero_to_vec_misc_op(&mut self, arg0: &FloatCC) -> VecMisc2;
+    fn float_cc_cmp_zero_to_vec_misc_op_swap(&mut self, arg0: &FloatCC) -> VecMisc2;
+    fn fcmp_zero_cond(&mut self, arg0: &FloatCC) -> Option<FloatCC>;
+    fn fcmp_zero_cond_not_eq(&mut self, arg0: &FloatCC) -> Option<FloatCC>;
+    fn int_cc_cmp_zero_to_vec_misc_op(&mut self, arg0: &IntCC) -> VecMisc2;
+    fn int_cc_cmp_zero_to_vec_misc_op_swap(&mut self, arg0: &IntCC) -> VecMisc2;
+    fn icmp_zero_cond(&mut self, arg0: &IntCC) -> Option<IntCC>;
+    fn icmp_zero_cond_not_eq(&mut self, arg0: &IntCC) -> Option<IntCC>;
+    fn preg_sp(&mut self) -> PReg;
+    fn preg_fp(&mut self) -> PReg;
+    fn preg_link(&mut self) -> PReg;
+    fn preg_pinned(&mut self) -> PReg;
+    fn gen_call(
+        &mut self,
+        arg0: SigRef,
+        arg1: ExternalName,
+        arg2: RelocDistance,
+        arg3: ValueSlice,
+    ) -> InstOutput;
+    fn gen_call_indirect(&mut self, arg0: SigRef, arg1: Value, arg2: ValueSlice) -> InstOutput;
+    fn asimd_mov_mod_imm_zero(&mut self, arg0: &ScalarSize) -> ASIMDMovModImm;
+    fn asimd_mov_mod_imm_from_u64(
+        &mut self,
+        arg0: u64,
+        arg1: &ScalarSize,
+    ) -> Option<ASIMDMovModImm>;
+    fn asimd_fp_mod_imm_from_u64(&mut self, arg0: u64, arg1: &ScalarSize) -> Option<ASIMDFPModImm>;
+    fn shuffle_dup8_from_imm(&mut self, arg0: Immediate) -> Option<u8>;
+    fn shuffle_dup16_from_imm(&mut self, arg0: Immediate) -> Option<u8>;
+    fn shuffle_dup32_from_imm(&mut self, arg0: Immediate) -> Option<u8>;
+    fn shuffle_dup64_from_imm(&mut self, arg0: Immediate) -> Option<u8>;
+    fn vec_extract_imm4_from_immediate(&mut self, arg0: Immediate) -> Option<u8>;
+    fn shift_masked_imm(&mut self, arg0: Type, arg1: u64) -> u8;
+    fn shift_mask(&mut self, arg0: Type) -> ImmLogic;
+    fn negate_imm_shift(&mut self, arg0: Type, arg1: ImmShift) -> ImmShift;
+    fn rotr_mask(&mut self, arg0: Type) -> ImmLogic;
+    fn rotr_opposite_amount(&mut self, arg0: Type, arg1: ImmShift) -> ImmShift;
+    fn unpack_value_array_2(&mut self, arg0: &ValueArray2) -> (Value, Value);
+    fn pack_value_array_2(&mut self, arg0: Value, arg1: Value) -> ValueArray2;
+    fn unpack_value_array_3(&mut self, arg0: &ValueArray3) -> (Value, Value, Value);
+    fn pack_value_array_3(&mut self, arg0: Value, arg1: Value, arg2: Value) -> ValueArray3;
+    fn unpack_block_array_2(&mut self, arg0: &BlockArray2) -> (BlockCall, BlockCall);
+    fn pack_block_array_2(&mut self, arg0: BlockCall, arg1: BlockCall) -> BlockArray2;
+}
+
+pub trait ContextIter {
+    type Context;
+    type Output;
+    fn next(&mut self, ctx: &mut Self::Context) -> Option<Self::Output>;
+}
+
+pub struct ContextIterWrapper<Item, I: Iterator<Item = Item>, C: Context> {
+    iter: I,
+    _ctx: PhantomData<C>,
+}
+impl<Item, I: Iterator<Item = Item>, C: Context> From<I> for ContextIterWrapper<Item, I, C> {
+    fn from(iter: I) -> Self {
+        Self {
+            iter,
+            _ctx: PhantomData,
+        }
+    }
+}
+impl<Item, I: Iterator<Item = Item>, C: Context> ContextIter for ContextIterWrapper<Item, I, C> {
+    type Context = C;
+    type Output = Item;
+    fn next(&mut self, _ctx: &mut Self::Context) -> Option<Self::Output> {
+        self.iter.next()
+    }
+}
+
+/// Internal type MultiReg: defined at src/prelude_lower.isle line 21.
+#[derive(Clone, Debug)]
+pub enum MultiReg {
+    Empty,
+    One { a: Reg },
+    Two { a: Reg, b: Reg },
+    Three { a: Reg, b: Reg, c: Reg },
+    Four { a: Reg, b: Reg, c: Reg, d: Reg },
+}
+
+/// Internal type SideEffectNoResult: defined at src/prelude_lower.isle line 309.
+#[derive(Clone, Debug)]
+pub enum SideEffectNoResult {
+    Inst {
+        inst: MInst,
+    },
+    Inst2 {
+        inst1: MInst,
+        inst2: MInst,
+    },
+    Inst3 {
+        inst1: MInst,
+        inst2: MInst,
+        inst3: MInst,
+    },
+}
+
+/// Internal type ProducesFlags: defined at src/prelude_lower.isle line 351.
+#[derive(Clone, Debug)]
+pub enum ProducesFlags {
+    AlreadyExistingFlags,
+    ProducesFlagsSideEffect { inst: MInst },
+    ProducesFlagsTwiceSideEffect { inst1: MInst, inst2: MInst },
+    ProducesFlagsReturnsReg { inst: MInst, result: Reg },
+    ProducesFlagsReturnsResultWithConsumer { inst: MInst, result: Reg },
+}
+
+/// Internal type ConsumesAndProducesFlags: defined at src/prelude_lower.isle line 370.
+#[derive(Clone, Debug)]
+pub enum ConsumesAndProducesFlags {
+    SideEffect { inst: MInst },
+    ReturnsReg { inst: MInst, result: Reg },
+}
+
+/// Internal type ConsumesFlags: defined at src/prelude_lower.isle line 378.
+#[derive(Clone, Debug)]
+pub enum ConsumesFlags {
+    ConsumesFlagsSideEffect {
+        inst: MInst,
+    },
+    ConsumesFlagsSideEffect2 {
+        inst1: MInst,
+        inst2: MInst,
+    },
+    ConsumesFlagsReturnsResultWithProducer {
+        inst: MInst,
+        result: Reg,
+    },
+    ConsumesFlagsReturnsReg {
+        inst: MInst,
+        result: Reg,
+    },
+    ConsumesFlagsTwiceReturnsValueRegs {
+        inst1: MInst,
+        inst2: MInst,
+        result: ValueRegs,
+    },
+    ConsumesFlagsFourTimesReturnsValueRegs {
+        inst1: MInst,
+        inst2: MInst,
+        inst3: MInst,
+        inst4: MInst,
+        result: ValueRegs,
+    },
+}
+
+/// Internal type MInst: defined at src/isa/aarch64/inst.isle line 2.
+#[derive(Clone, Debug)]
+pub enum MInst {
+    Nop0,
+    Nop4,
+    AluRRR {
+        alu_op: ALUOp,
+        size: OperandSize,
+        rd: WritableReg,
+        rn: Reg,
+        rm: Reg,
+    },
+    AluRRRR {
+        alu_op: ALUOp3,
+        size: OperandSize,
+        rd: WritableReg,
+        rn: Reg,
+        rm: Reg,
+        ra: Reg,
+    },
+    AluRRImm12 {
+        alu_op: ALUOp,
+        size: OperandSize,
+        rd: WritableReg,
+        rn: Reg,
+        imm12: Imm12,
+    },
+    AluRRImmLogic {
+        alu_op: ALUOp,
+        size: OperandSize,
+        rd: WritableReg,
+        rn: Reg,
+        imml: ImmLogic,
+    },
+    AluRRImmShift {
+        alu_op: ALUOp,
+        size: OperandSize,
+        rd: WritableReg,
+        rn: Reg,
+        immshift: ImmShift,
+    },
+    AluRRRShift {
+        alu_op: ALUOp,
+        size: OperandSize,
+        rd: WritableReg,
+        rn: Reg,
+        rm: Reg,
+        shiftop: ShiftOpAndAmt,
+    },
+    AluRRRExtend {
+        alu_op: ALUOp,
+        size: OperandSize,
+        rd: WritableReg,
+        rn: Reg,
+        rm: Reg,
+        extendop: ExtendOp,
+    },
+    BitRR {
+        op: BitOp,
+        size: OperandSize,
+        rd: WritableReg,
+        rn: Reg,
+    },
+    ULoad8 {
+        rd: WritableReg,
+        mem: AMode,
+        flags: MemFlags,
+    },
+    SLoad8 {
+        rd: WritableReg,
+        mem: AMode,
+        flags: MemFlags,
+    },
+    ULoad16 {
+        rd: WritableReg,
+        mem: AMode,
+        flags: MemFlags,
+    },
+    SLoad16 {
+        rd: WritableReg,
+        mem: AMode,
+        flags: MemFlags,
+    },
+    ULoad32 {
+        rd: WritableReg,
+        mem: AMode,
+        flags: MemFlags,
+    },
+    SLoad32 {
+        rd: WritableReg,
+        mem: AMode,
+        flags: MemFlags,
+    },
+    ULoad64 {
+        rd: WritableReg,
+        mem: AMode,
+        flags: MemFlags,
+    },
+    Store8 {
+        rd: Reg,
+        mem: AMode,
+        flags: MemFlags,
+    },
+    Store16 {
+        rd: Reg,
+        mem: AMode,
+        flags: MemFlags,
+    },
+    Store32 {
+        rd: Reg,
+        mem: AMode,
+        flags: MemFlags,
+    },
+    Store64 {
+        rd: Reg,
+        mem: AMode,
+        flags: MemFlags,
+    },
+    StoreP64 {
+        rt: Reg,
+        rt2: Reg,
+        mem: PairAMode,
+        flags: MemFlags,
+    },
+    LoadP64 {
+        rt: WritableReg,
+        rt2: WritableReg,
+        mem: PairAMode,
+        flags: MemFlags,
+    },
+    Mov {
+        size: OperandSize,
+        rd: WritableReg,
+        rm: Reg,
+    },
+    MovFromPReg {
+        rd: WritableReg,
+        rm: PReg,
+    },
+    MovToPReg {
+        rd: PReg,
+        rm: Reg,
+    },
+    MovWide {
+        op: MoveWideOp,
+        rd: WritableReg,
+        imm: MoveWideConst,
+        size: OperandSize,
+    },
+    MovK {
+        rd: WritableReg,
+        rn: Reg,
+        imm: MoveWideConst,
+        size: OperandSize,
+    },
+    Extend {
+        rd: WritableReg,
+        rn: Reg,
+        signed: bool,
+        from_bits: u8,
+        to_bits: u8,
+    },
+    CSel {
+        rd: WritableReg,
+        cond: Cond,
+        rn: Reg,
+        rm: Reg,
+    },
+    CSNeg {
+        rd: WritableReg,
+        cond: Cond,
+        rn: Reg,
+        rm: Reg,
+    },
+    CSet {
+        rd: WritableReg,
+        cond: Cond,
+    },
+    CSetm {
+        rd: WritableReg,
+        cond: Cond,
+    },
+    CCmp {
+        size: OperandSize,
+        rn: Reg,
+        rm: Reg,
+        nzcv: NZCV,
+        cond: Cond,
+    },
+    CCmpImm {
+        size: OperandSize,
+        rn: Reg,
+        imm: UImm5,
+        nzcv: NZCV,
+        cond: Cond,
+    },
+    AtomicRMWLoop {
+        ty: Type,
+        op: AtomicRMWLoopOp,
+        flags: MemFlags,
+        addr: Reg,
+        operand: Reg,
+        oldval: WritableReg,
+        scratch1: WritableReg,
+        scratch2: WritableReg,
+    },
+    AtomicCASLoop {
+        ty: Type,
+        flags: MemFlags,
+        addr: Reg,
+        expected: Reg,
+        replacement: Reg,
+        oldval: WritableReg,
+        scratch: WritableReg,
+    },
+    AtomicRMW {
+        op: AtomicRMWOp,
+        rs: Reg,
+        rt: WritableReg,
+        rn: Reg,
+        ty: Type,
+        flags: MemFlags,
+    },
+    AtomicCAS {
+        rd: WritableReg,
+        rs: Reg,
+        rt: Reg,
+        rn: Reg,
+        ty: Type,
+        flags: MemFlags,
+    },
+    LoadAcquire {
+        access_ty: Type,
+        rt: WritableReg,
+        rn: Reg,
+        flags: MemFlags,
+    },
+    StoreRelease {
+        access_ty: Type,
+        rt: Reg,
+        rn: Reg,
+        flags: MemFlags,
+    },
+    Fence,
+    Csdb,
+    FpuMove64 {
+        rd: WritableReg,
+        rn: Reg,
+    },
+    FpuMove128 {
+        rd: WritableReg,
+        rn: Reg,
+    },
+    FpuMoveFromVec {
+        rd: WritableReg,
+        rn: Reg,
+        idx: u8,
+        size: VectorSize,
+    },
+    FpuExtend {
+        rd: WritableReg,
+        rn: Reg,
+        size: ScalarSize,
+    },
+    FpuRR {
+        fpu_op: FPUOp1,
+        size: ScalarSize,
+        rd: WritableReg,
+        rn: Reg,
+    },
+    FpuRRR {
+        fpu_op: FPUOp2,
+        size: ScalarSize,
+        rd: WritableReg,
+        rn: Reg,
+        rm: Reg,
+    },
+    FpuRRI {
+        fpu_op: FPUOpRI,
+        rd: WritableReg,
+        rn: Reg,
+    },
+    FpuRRIMod {
+        fpu_op: FPUOpRIMod,
+        rd: WritableReg,
+        ri: Reg,
+        rn: Reg,
+    },
+    FpuRRRR {
+        fpu_op: FPUOp3,
+        size: ScalarSize,
+        rd: WritableReg,
+        rn: Reg,
+        rm: Reg,
+        ra: Reg,
+    },
+    FpuCmp {
+        size: ScalarSize,
+        rn: Reg,
+        rm: Reg,
+    },
+    FpuLoad32 {
+        rd: WritableReg,
+        mem: AMode,
+        flags: MemFlags,
+    },
+    FpuStore32 {
+        rd: Reg,
+        mem: AMode,
+        flags: MemFlags,
+    },
+    FpuLoad64 {
+        rd: WritableReg,
+        mem: AMode,
+        flags: MemFlags,
+    },
+    FpuStore64 {
+        rd: Reg,
+        mem: AMode,
+        flags: MemFlags,
+    },
+    FpuLoad128 {
+        rd: WritableReg,
+        mem: AMode,
+        flags: MemFlags,
+    },
+    FpuStore128 {
+        rd: Reg,
+        mem: AMode,
+        flags: MemFlags,
+    },
+    FpuLoadP64 {
+        rt: WritableReg,
+        rt2: WritableReg,
+        mem: PairAMode,
+        flags: MemFlags,
+    },
+    FpuStoreP64 {
+        rt: Reg,
+        rt2: Reg,
+        mem: PairAMode,
+        flags: MemFlags,
+    },
+    FpuLoadP128 {
+        rt: WritableReg,
+        rt2: WritableReg,
+        mem: PairAMode,
+        flags: MemFlags,
+    },
+    FpuStoreP128 {
+        rt: Reg,
+        rt2: Reg,
+        mem: PairAMode,
+        flags: MemFlags,
+    },
+    FpuToInt {
+        op: FpuToIntOp,
+        rd: WritableReg,
+        rn: Reg,
+    },
+    IntToFpu {
+        op: IntToFpuOp,
+        rd: WritableReg,
+        rn: Reg,
+    },
+    FpuCSel32 {
+        rd: WritableReg,
+        rn: Reg,
+        rm: Reg,
+        cond: Cond,
+    },
+    FpuCSel64 {
+        rd: WritableReg,
+        rn: Reg,
+        rm: Reg,
+        cond: Cond,
+    },
+    FpuRound {
+        op: FpuRoundMode,
+        rd: WritableReg,
+        rn: Reg,
+    },
+    MovToFpu {
+        rd: WritableReg,
+        rn: Reg,
+        size: ScalarSize,
+    },
+    FpuMoveFPImm {
+        rd: WritableReg,
+        imm: ASIMDFPModImm,
+        size: ScalarSize,
+    },
+    MovToVec {
+        rd: WritableReg,
+        ri: Reg,
+        rn: Reg,
+        idx: u8,
+        size: VectorSize,
+    },
+    MovFromVec {
+        rd: WritableReg,
+        rn: Reg,
+        idx: u8,
+        size: ScalarSize,
+    },
+    MovFromVecSigned {
+        rd: WritableReg,
+        rn: Reg,
+        idx: u8,
+        size: VectorSize,
+        scalar_size: OperandSize,
+    },
+    VecDup {
+        rd: WritableReg,
+        rn: Reg,
+        size: VectorSize,
+    },
+    VecDupFromFpu {
+        rd: WritableReg,
+        rn: Reg,
+        size: VectorSize,
+        lane: u8,
+    },
+    VecDupFPImm {
+        rd: WritableReg,
+        imm: ASIMDFPModImm,
+        size: VectorSize,
+    },
+    VecDupImm {
+        rd: WritableReg,
+        imm: ASIMDMovModImm,
+        invert: bool,
+        size: VectorSize,
+    },
+    VecExtend {
+        t: VecExtendOp,
+        rd: WritableReg,
+        rn: Reg,
+        high_half: bool,
+        lane_size: ScalarSize,
+    },
+    VecMovElement {
+        rd: WritableReg,
+        ri: Reg,
+        rn: Reg,
+        dest_idx: u8,
+        src_idx: u8,
+        size: VectorSize,
+    },
+    VecRRLong {
+        op: VecRRLongOp,
+        rd: WritableReg,
+        rn: Reg,
+        high_half: bool,
+    },
+    VecRRNarrowLow {
+        op: VecRRNarrowOp,
+        rd: WritableReg,
+        rn: Reg,
+        lane_size: ScalarSize,
+    },
+    VecRRNarrowHigh {
+        op: VecRRNarrowOp,
+        rd: WritableReg,
+        ri: Reg,
+        rn: Reg,
+        lane_size: ScalarSize,
+    },
+    VecRRPair {
+        op: VecPairOp,
+        rd: WritableReg,
+        rn: Reg,
+    },
+    VecRRRLong {
+        alu_op: VecRRRLongOp,
+        rd: WritableReg,
+        rn: Reg,
+        rm: Reg,
+        high_half: bool,
+    },
+    VecRRRLongMod {
+        alu_op: VecRRRLongModOp,
+        rd: WritableReg,
+        ri: Reg,
+        rn: Reg,
+        rm: Reg,
+        high_half: bool,
+    },
+    VecRRPairLong {
+        op: VecRRPairLongOp,
+        rd: WritableReg,
+        rn: Reg,
+    },
+    VecRRR {
+        alu_op: VecALUOp,
+        rd: WritableReg,
+        rn: Reg,
+        rm: Reg,
+        size: VectorSize,
+    },
+    VecRRRMod {
+        alu_op: VecALUModOp,
+        rd: WritableReg,
+        ri: Reg,
+        rn: Reg,
+        rm: Reg,
+        size: VectorSize,
+    },
+    VecFmlaElem {
+        alu_op: VecALUModOp,
+        rd: WritableReg,
+        ri: Reg,
+        rn: Reg,
+        rm: Reg,
+        size: VectorSize,
+        idx: u8,
+    },
+    VecMisc {
+        op: VecMisc2,
+        rd: WritableReg,
+        rn: Reg,
+        size: VectorSize,
+    },
+    VecLanes {
+        op: VecLanesOp,
+        rd: WritableReg,
+        rn: Reg,
+        size: VectorSize,
+    },
+    VecShiftImm {
+        op: VecShiftImmOp,
+        rd: WritableReg,
+        rn: Reg,
+        size: VectorSize,
+        imm: u8,
+    },
+    VecShiftImmMod {
+        op: VecShiftImmModOp,
+        rd: WritableReg,
+        ri: Reg,
+        rn: Reg,
+        size: VectorSize,
+        imm: u8,
+    },
+    VecExtract {
+        rd: WritableReg,
+        rn: Reg,
+        rm: Reg,
+        imm4: u8,
+    },
+    VecTbl {
+        rd: WritableReg,
+        rn: Reg,
+        rm: Reg,
+    },
+    VecTblExt {
+        rd: WritableReg,
+        ri: Reg,
+        rn: Reg,
+        rm: Reg,
+    },
+    VecTbl2 {
+        rd: WritableReg,
+        rn: Reg,
+        rn2: Reg,
+        rm: Reg,
+    },
+    VecTbl2Ext {
+        rd: WritableReg,
+        ri: Reg,
+        rn: Reg,
+        rn2: Reg,
+        rm: Reg,
+    },
+    VecLoadReplicate {
+        rd: WritableReg,
+        rn: Reg,
+        size: VectorSize,
+        flags: MemFlags,
+    },
+    VecCSel {
+        rd: WritableReg,
+        rn: Reg,
+        rm: Reg,
+        cond: Cond,
+    },
+    MovToNZCV {
+        rn: Reg,
+    },
+    MovFromNZCV {
+        rd: WritableReg,
+    },
+    Call {
+        info: BoxCallInfo,
+    },
+    CallInd {
+        info: BoxCallIndInfo,
+    },
+    ReturnCall {
+        callee: BoxExternalName,
+        info: BoxReturnCallInfo,
+    },
+    ReturnCallInd {
+        callee: Reg,
+        info: BoxReturnCallInfo,
+    },
+    Args {
+        args: VecArgPair,
+    },
+    Ret {
+        rets: VecRetPair,
+        stack_bytes_to_pop: u32,
+    },
+    AuthenticatedRet {
+        key: APIKey,
+        is_hint: bool,
+        rets: VecRetPair,
+        stack_bytes_to_pop: u32,
+    },
+    Jump {
+        dest: BranchTarget,
+    },
+    CondBr {
+        taken: BranchTarget,
+        not_taken: BranchTarget,
+        kind: CondBrKind,
+    },
+    TrapIf {
+        kind: CondBrKind,
+        trap_code: TrapCode,
+    },
+    IndirectBr {
+        rn: Reg,
+        targets: VecMachLabel,
+    },
+    Brk,
+    Udf {
+        trap_code: TrapCode,
+    },
+    Adr {
+        rd: WritableReg,
+        off: i32,
+    },
+    Adrp {
+        rd: WritableReg,
+        off: i32,
+    },
+    Word4 {
+        data: u32,
+    },
+    Word8 {
+        data: u64,
+    },
+    JTSequence {
+        info: BoxJTSequenceInfo,
+        ridx: Reg,
+        rtmp1: WritableReg,
+        rtmp2: WritableReg,
+    },
+    LoadExtName {
+        rd: WritableReg,
+        name: BoxExternalName,
+        offset: i64,
+    },
+    LoadAddr {
+        rd: WritableReg,
+        mem: AMode,
+    },
+    Pacisp {
+        key: APIKey,
+    },
+    Xpaclri,
+    Bti {
+        targets: BranchTargetType,
+    },
+    VirtualSPOffsetAdj {
+        offset: i64,
+    },
+    EmitIsland {
+        needed_space: CodeOffset,
+    },
+    ElfTlsGetAddr {
+        symbol: ExternalName,
+        rd: WritableReg,
+    },
+    MachOTlsGetAddr {
+        symbol: ExternalName,
+        rd: WritableReg,
+    },
+    Unwind {
+        inst: UnwindInst,
+    },
+    DummyUse {
+        reg: Reg,
+    },
+    StackProbeLoop {
+        start: WritableReg,
+        end: Reg,
+        step: Imm12,
+    },
+}
+
+/// Internal type ALUOp: defined at src/isa/aarch64/inst.isle line 975.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum ALUOp {
+    Add,
+    Sub,
+    Orr,
+    OrrNot,
+    And,
+    AndS,
+    AndNot,
+    Eor,
+    EorNot,
+    AddS,
+    SubS,
+    SMulH,
+    UMulH,
+    SDiv,
+    UDiv,
+    RotR,
+    Lsr,
+    Asr,
+    Lsl,
+    Adc,
+    AdcS,
+    Sbc,
+    SbcS,
+}
+
+/// Internal type ALUOp3: defined at src/isa/aarch64/inst.isle line 1013.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum ALUOp3 {
+    MAdd,
+    MSub,
+    UMAddL,
+    SMAddL,
+}
+
+/// Internal type MoveWideOp: defined at src/isa/aarch64/inst.isle line 1025.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum MoveWideOp {
+    MovZ,
+    MovN,
+}
+
+/// Internal type BitOp: defined at src/isa/aarch64/inst.isle line 1064.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum BitOp {
+    RBit,
+    Clz,
+    Cls,
+    Rev16,
+    Rev32,
+    Rev64,
+}
+
+/// Internal type AMode: defined at src/isa/aarch64/inst.isle line 1081.
+#[derive(Clone, Debug)]
+pub enum AMode {
+    SPPostIndexed {
+        simm9: SImm9,
+    },
+    SPPreIndexed {
+        simm9: SImm9,
+    },
+    RegReg {
+        rn: Reg,
+        rm: Reg,
+    },
+    RegScaled {
+        rn: Reg,
+        rm: Reg,
+        ty: Type,
+    },
+    RegScaledExtended {
+        rn: Reg,
+        rm: Reg,
+        ty: Type,
+        extendop: ExtendOp,
+    },
+    RegExtended {
+        rn: Reg,
+        rm: Reg,
+        extendop: ExtendOp,
+    },
+    Unscaled {
+        rn: Reg,
+        simm9: SImm9,
+    },
+    UnsignedOffset {
+        rn: Reg,
+        uimm12: UImm12Scaled,
+    },
+    Label {
+        label: MemLabel,
+    },
+    RegOffset {
+        rn: Reg,
+        off: i64,
+        ty: Type,
+    },
+    SPOffset {
+        off: i64,
+        ty: Type,
+    },
+    FPOffset {
+        off: i64,
+        ty: Type,
+    },
+    Const {
+        addr: VCodeConstant,
+    },
+    NominalSPOffset {
+        off: i64,
+        ty: Type,
+    },
+}
+
+/// Internal type FPUOp1: defined at src/isa/aarch64/inst.isle line 1284.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum FPUOp1 {
+    Abs,
+    Neg,
+    Sqrt,
+    Cvt32To64,
+    Cvt64To32,
+}
+
+/// Internal type FPUOp2: defined at src/isa/aarch64/inst.isle line 1294.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum FPUOp2 {
+    Add,
+    Sub,
+    Mul,
+    Div,
+    Max,
+    Min,
+}
+
+/// Internal type FPUOp3: defined at src/isa/aarch64/inst.isle line 1305.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum FPUOp3 {
+    MAdd,
+}
+
+/// Internal type FpuToIntOp: defined at src/isa/aarch64/inst.isle line 1311.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum FpuToIntOp {
+    F32ToU32,
+    F32ToI32,
+    F32ToU64,
+    F32ToI64,
+    F64ToU32,
+    F64ToI32,
+    F64ToU64,
+    F64ToI64,
+}
+
+/// Internal type IntToFpuOp: defined at src/isa/aarch64/inst.isle line 1324.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum IntToFpuOp {
+    U32ToF32,
+    I32ToF32,
+    U32ToF64,
+    I32ToF64,
+    U64ToF32,
+    I64ToF32,
+    U64ToF64,
+    I64ToF64,
+}
+
+/// Internal type FpuRoundMode: defined at src/isa/aarch64/inst.isle line 1338.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum FpuRoundMode {
+    Minus32,
+    Minus64,
+    Plus32,
+    Plus64,
+    Zero32,
+    Zero64,
+    Nearest32,
+    Nearest64,
+}
+
+/// Internal type VecExtendOp: defined at src/isa/aarch64/inst.isle line 1351.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum VecExtendOp {
+    Sxtl,
+    Uxtl,
+}
+
+/// Internal type VecALUOp: defined at src/isa/aarch64/inst.isle line 1360.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum VecALUOp {
+    Sqadd,
+    Uqadd,
+    Sqsub,
+    Uqsub,
+    Cmeq,
+    Cmge,
+    Cmgt,
+    Cmhs,
+    Cmhi,
+    Fcmeq,
+    Fcmgt,
+    Fcmge,
+    And,
+    Bic,
+    Orr,
+    Eor,
+    Umaxp,
+    Add,
+    Sub,
+    Mul,
+    Sshl,
+    Ushl,
+    Umin,
+    Smin,
+    Umax,
+    Smax,
+    Urhadd,
+    Fadd,
+    Fsub,
+    Fdiv,
+    Fmax,
+    Fmin,
+    Fmul,
+    Addp,
+    Zip1,
+    Zip2,
+    Sqrdmulh,
+    Uzp1,
+    Uzp2,
+    Trn1,
+    Trn2,
+}
+
+/// Internal type VecALUModOp: defined at src/isa/aarch64/inst.isle line 1447.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum VecALUModOp {
+    Bsl,
+    Fmla,
+    Fmls,
+}
+
+/// Internal type VecMisc2: defined at src/isa/aarch64/inst.isle line 1458.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum VecMisc2 {
+    Not,
+    Neg,
+    Abs,
+    Fabs,
+    Fneg,
+    Fsqrt,
+    Rev16,
+    Rev32,
+    Rev64,
+    Fcvtzs,
+    Fcvtzu,
+    Scvtf,
+    Ucvtf,
+    Frintn,
+    Frintz,
+    Frintm,
+    Frintp,
+    Cnt,
+    Cmeq0,
+    Cmge0,
+    Cmgt0,
+    Cmle0,
+    Cmlt0,
+    Fcmeq0,
+    Fcmge0,
+    Fcmgt0,
+    Fcmle0,
+    Fcmlt0,
+}
+
+/// Internal type VecRRLongOp: defined at src/isa/aarch64/inst.isle line 1519.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum VecRRLongOp {
+    Fcvtl16,
+    Fcvtl32,
+    Shll8,
+    Shll16,
+    Shll32,
+}
+
+/// Internal type VecRRNarrowOp: defined at src/isa/aarch64/inst.isle line 1534.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum VecRRNarrowOp {
+    Xtn,
+    Sqxtn,
+    Sqxtun,
+    Uqxtn,
+    Fcvtn,
+}
+
+/// Internal type VecRRRLongOp: defined at src/isa/aarch64/inst.isle line 1548.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum VecRRRLongOp {
+    Smull8,
+    Smull16,
+    Smull32,
+    Umull8,
+    Umull16,
+    Umull32,
+}
+
+/// Internal type VecRRRLongModOp: defined at src/isa/aarch64/inst.isle line 1560.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum VecRRRLongModOp {
+    Umlal8,
+    Umlal16,
+    Umlal32,
+}
+
+/// Internal type VecPairOp: defined at src/isa/aarch64/inst.isle line 1569.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum VecPairOp {
+    Addp,
+}
+
+/// Internal type VecRRPairLongOp: defined at src/isa/aarch64/inst.isle line 1577.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum VecRRPairLongOp {
+    Saddlp8,
+    Saddlp16,
+    Uaddlp8,
+    Uaddlp16,
+}
+
+/// Internal type VecLanesOp: defined at src/isa/aarch64/inst.isle line 1588.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum VecLanesOp {
+    Addv,
+    Uminv,
+}
+
+/// Internal type VecShiftImmOp: defined at src/isa/aarch64/inst.isle line 1597.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum VecShiftImmOp {
+    Shl,
+    Ushr,
+    Sshr,
+}
+
+/// Internal type VecShiftImmModOp: defined at src/isa/aarch64/inst.isle line 1608.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum VecShiftImmModOp {
+    Sli,
+}
+
+/// Internal type AtomicRMWOp: defined at src/isa/aarch64/inst.isle line 1615.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum AtomicRMWOp {
+    Add,
+    Clr,
+    Eor,
+    Set,
+    Smax,
+    Smin,
+    Umax,
+    Umin,
+    Swp,
+}
+
+/// Internal type AtomicRMWLoopOp: defined at src/isa/aarch64/inst.isle line 1630.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum AtomicRMWLoopOp {
+    Add,
+    Sub,
+    And,
+    Nand,
+    Eor,
+    Orr,
+    Smax,
+    Smin,
+    Umax,
+    Umin,
+    Xchg,
+}
+
+/// Internal type APIKey: defined at src/isa/aarch64/inst.isle line 1646.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum APIKey {
+    A,
+    B,
+}
+
+/// Internal type BranchTargetType: defined at src/isa/aarch64/inst.isle line 1653.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum BranchTargetType {
+    None,
+    C,
+    J,
+    JC,
+}
+
+/// Internal type ImmExtend: defined at src/isa/aarch64/inst.isle line 2879.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum ImmExtend {
+    Sign,
+    Zero,
+}
+
+/// Internal type FlagsAndCC: defined at src/isa/aarch64/inst.isle line 3664.
+#[derive(Clone, Debug)]
+pub enum FlagsAndCC {
+    FlagsAndCC { flags: ProducesFlags, cc: IntCC },
+}
+
+// Generated as internal constructor for term output_reg.
+pub fn constructor_output_reg<C: Context>(ctx: &mut C, arg0: Reg) -> InstOutput {
+    let v1 = C::value_reg(ctx, arg0);
+    let v2 = C::output(ctx, v1);
+    // Rule at src/prelude_lower.isle line 65.
+    return v2;
+}
+
+// Generated as internal constructor for term output_value.
+pub fn constructor_output_value<C: Context>(ctx: &mut C, arg0: Value) -> InstOutput {
+    let v1 = C::put_in_regs(ctx, arg0);
+    let v2 = C::output(ctx, v1);
+    // Rule at src/prelude_lower.isle line 69.
+    return v2;
+}
+
+// Generated as internal constructor for term temp_reg.
+pub fn constructor_temp_reg<C: Context>(ctx: &mut C, arg0: Type) -> Reg {
+    let v1 = C::temp_writable_reg(ctx, arg0);
+    let v2 = C::writable_reg_to_reg(ctx, v1);
+    // Rule at src/prelude_lower.isle line 89.
+    return v2;
+}
+
+// Generated as internal constructor for term value_regs_range.
+pub fn constructor_value_regs_range<C: Context>(ctx: &mut C, arg0: ValueRegs) -> Range {
+    let v2 = C::value_regs_len(ctx, arg0);
+    let v3 = C::range(ctx, 0x0, v2);
+    // Rule at src/prelude_lower.isle line 138.
+    return v3;
+}
+
+// Generated as internal constructor for term lo_reg.
+pub fn constructor_lo_reg<C: Context>(ctx: &mut C, arg0: Value) -> Reg {
+    let v1 = C::put_in_regs(ctx, arg0);
+    let v3 = C::value_regs_get(ctx, v1, 0x0);
+    // Rule at src/prelude_lower.isle line 149.
+    return v3;
+}
+
+// Generated as internal constructor for term multi_reg_to_pair_and_single.
+pub fn constructor_multi_reg_to_pair_and_single<C: Context>(
+    ctx: &mut C,
+    arg0: &MultiReg,
+) -> InstOutput {
+    if let &MultiReg::Three {
+        a: v1,
+        b: v2,
+        c: v3,
+    } = arg0
+    {
+        let v4 = C::value_regs(ctx, v1, v2);
+        let v5 = C::value_reg(ctx, v3);
+        let v6 = C::output_pair(ctx, v4, v5);
+        // Rule at src/prelude_lower.isle line 160.
+        return v6;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "multi_reg_to_pair_and_single", "src/prelude_lower.isle line 159"
+    )
+}
+
+// Generated as internal constructor for term multi_reg_to_pair.
+pub fn constructor_multi_reg_to_pair<C: Context>(ctx: &mut C, arg0: &MultiReg) -> InstOutput {
+    if let &MultiReg::Two { a: v1, b: v2 } = arg0 {
+        let v3 = C::value_regs(ctx, v1, v2);
+        let v4 = C::output(ctx, v3);
+        // Rule at src/prelude_lower.isle line 165.
+        return v4;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "multi_reg_to_pair", "src/prelude_lower.isle line 164"
+    )
+}
+
+// Generated as internal constructor for term multi_reg_to_single.
+pub fn constructor_multi_reg_to_single<C: Context>(ctx: &mut C, arg0: &MultiReg) -> InstOutput {
+    if let &MultiReg::One { a: v1 } = arg0 {
+        let v2 = C::value_reg(ctx, v1);
+        let v3 = C::output(ctx, v2);
+        // Rule at src/prelude_lower.isle line 170.
+        return v3;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "multi_reg_to_single", "src/prelude_lower.isle line 169"
+    )
+}
+
+// Generated as internal constructor for term emit_side_effect.
+pub fn constructor_emit_side_effect<C: Context>(ctx: &mut C, arg0: &SideEffectNoResult) -> Unit {
+    match arg0 {
+        &SideEffectNoResult::Inst { inst: ref v1 } => {
+            let v2 = C::emit(ctx, v1);
+            // Rule at src/prelude_lower.isle line 319.
+            return v2;
+        }
+        &SideEffectNoResult::Inst2 {
+            inst1: ref v3,
+            inst2: ref v4,
+        } => {
+            let v5 = C::emit(ctx, v3);
+            let v6 = C::emit(ctx, v4);
+            // Rule at src/prelude_lower.isle line 321.
+            return v6;
+        }
+        &SideEffectNoResult::Inst3 {
+            inst1: ref v7,
+            inst2: ref v8,
+            inst3: ref v9,
+        } => {
+            let v10 = C::emit(ctx, v7);
+            let v11 = C::emit(ctx, v8);
+            let v12 = C::emit(ctx, v9);
+            // Rule at src/prelude_lower.isle line 324.
+            return v12;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "emit_side_effect", "src/prelude_lower.isle line 318"
+    )
+}
+
+// Generated as internal constructor for term side_effect.
+pub fn constructor_side_effect<C: Context>(ctx: &mut C, arg0: &SideEffectNoResult) -> InstOutput {
+    let v1 = constructor_emit_side_effect(ctx, arg0);
+    let v2 = C::output_none(ctx);
+    // Rule at src/prelude_lower.isle line 332.
+    return v2;
+}
+
+// Generated as internal constructor for term side_effect_concat.
+pub fn constructor_side_effect_concat<C: Context>(
+    ctx: &mut C,
+    arg0: &SideEffectNoResult,
+    arg1: &SideEffectNoResult,
+) -> SideEffectNoResult {
+    match arg0 {
+        &SideEffectNoResult::Inst { inst: ref v1 } => {
+            match arg1 {
+                &SideEffectNoResult::Inst { inst: ref v3 } => {
+                    let v4 = SideEffectNoResult::Inst2 {
+                        inst1: v1.clone(),
+                        inst2: v3.clone(),
+                    };
+                    // Rule at src/prelude_lower.isle line 337.
+                    return v4;
+                }
+                &SideEffectNoResult::Inst2 {
+                    inst1: ref v5,
+                    inst2: ref v6,
+                } => {
+                    let v7 = SideEffectNoResult::Inst3 {
+                        inst1: v1.clone(),
+                        inst2: v5.clone(),
+                        inst3: v6.clone(),
+                    };
+                    // Rule at src/prelude_lower.isle line 339.
+                    return v7;
+                }
+                _ => {}
+            }
+        }
+        &SideEffectNoResult::Inst2 {
+            inst1: ref v8,
+            inst2: ref v9,
+        } => {
+            if let &SideEffectNoResult::Inst { inst: ref v3 } = arg1 {
+                let v10 = SideEffectNoResult::Inst3 {
+                    inst1: v8.clone(),
+                    inst2: v9.clone(),
+                    inst3: v3.clone(),
+                };
+                // Rule at src/prelude_lower.isle line 341.
+                return v10;
+            }
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "side_effect_concat", "src/prelude_lower.isle line 336"
+    )
+}
+
+// Generated as internal constructor for term produces_flags_concat.
+pub fn constructor_produces_flags_concat<C: Context>(
+    ctx: &mut C,
+    arg0: &ProducesFlags,
+    arg1: &ProducesFlags,
+) -> ProducesFlags {
+    if let &ProducesFlags::ProducesFlagsSideEffect { inst: ref v1 } = arg0 {
+        if let &ProducesFlags::ProducesFlagsSideEffect { inst: ref v3 } = arg1 {
+            let v4 = ProducesFlags::ProducesFlagsTwiceSideEffect {
+                inst1: v1.clone(),
+                inst2: v3.clone(),
+            };
+            // Rule at src/prelude_lower.isle line 366.
+            return v4;
+        }
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "produces_flags_concat", "src/prelude_lower.isle line 365"
+    )
+}
+
+// Generated as internal constructor for term produces_flags_get_reg.
+pub fn constructor_produces_flags_get_reg<C: Context>(ctx: &mut C, arg0: &ProducesFlags) -> Reg {
+    match arg0 {
+        &ProducesFlags::ProducesFlagsReturnsReg {
+            inst: ref v1,
+            result: v2,
+        } => {
+            // Rule at src/prelude_lower.isle line 396.
+            return v2;
+        }
+        &ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
+            inst: ref v3,
+            result: v4,
+        } => {
+            // Rule at src/prelude_lower.isle line 397.
+            return v4;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "produces_flags_get_reg", "src/prelude_lower.isle line 395"
+    )
+}
+
+// Generated as internal constructor for term produces_flags_ignore.
+pub fn constructor_produces_flags_ignore<C: Context>(
+    ctx: &mut C,
+    arg0: &ProducesFlags,
+) -> ProducesFlags {
+    match arg0 {
+        &ProducesFlags::ProducesFlagsReturnsReg {
+            inst: ref v1,
+            result: v2,
+        } => {
+            let v3 = ProducesFlags::ProducesFlagsSideEffect { inst: v1.clone() };
+            // Rule at src/prelude_lower.isle line 402.
+            return v3;
+        }
+        &ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
+            inst: ref v4,
+            result: v5,
+        } => {
+            let v6 = ProducesFlags::ProducesFlagsSideEffect { inst: v4.clone() };
+            // Rule at src/prelude_lower.isle line 404.
+            return v6;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "produces_flags_ignore", "src/prelude_lower.isle line 401"
+    )
+}
+
+// Generated as internal constructor for term consumes_flags_concat.
+pub fn constructor_consumes_flags_concat<C: Context>(
+    ctx: &mut C,
+    arg0: &ConsumesFlags,
+    arg1: &ConsumesFlags,
+) -> ConsumesFlags {
+    match arg0 {
+        &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v8 } => {
+            if let &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v9 } = arg1 {
+                let v10 = ConsumesFlags::ConsumesFlagsSideEffect2 {
+                    inst1: v8.clone(),
+                    inst2: v9.clone(),
+                };
+                // Rule at src/prelude_lower.isle line 417.
+                return v10;
+            }
+        }
+        &ConsumesFlags::ConsumesFlagsReturnsReg {
+            inst: ref v1,
+            result: v2,
+        } => {
+            if let &ConsumesFlags::ConsumesFlagsReturnsReg {
+                inst: ref v4,
+                result: v5,
+            } = arg1
+            {
+                let v6 = C::value_regs(ctx, v2, v5);
+                let v7 = ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
+                    inst1: v1.clone(),
+                    inst2: v4.clone(),
+                    result: v6,
+                };
+                // Rule at src/prelude_lower.isle line 411.
+                return v7;
+            }
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "consumes_flags_concat", "src/prelude_lower.isle line 410"
+    )
+}
+
+// Generated as internal constructor for term with_flags.
+pub fn constructor_with_flags<C: Context>(
+    ctx: &mut C,
+    arg0: &ProducesFlags,
+    arg1: &ConsumesFlags,
+) -> ValueRegs {
+    match arg0 {
+        &ProducesFlags::ProducesFlagsSideEffect { inst: ref v12 } => {
+            match arg1 {
+                &ConsumesFlags::ConsumesFlagsReturnsReg {
+                    inst: ref v13,
+                    result: v14,
+                } => {
+                    let v15 = C::emit(ctx, v12);
+                    let v16 = C::emit(ctx, v13);
+                    let v17 = C::value_reg(ctx, v14);
+                    // Rule at src/prelude_lower.isle line 448.
+                    return v17;
+                }
+                &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
+                    inst1: ref v18,
+                    inst2: ref v19,
+                    result: v20,
+                } => {
+                    let v15 = C::emit(ctx, v12);
+                    let v21 = C::emit(ctx, v18);
+                    let v22 = C::emit(ctx, v19);
+                    // Rule at src/prelude_lower.isle line 454.
+                    return v20;
+                }
+                &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
+                    inst1: ref v23,
+                    inst2: ref v24,
+                    inst3: ref v25,
+                    inst4: ref v26,
+                    result: v27,
+                } => {
+                    let v15 = C::emit(ctx, v12);
+                    let v28 = C::emit(ctx, v23);
+                    let v29 = C::emit(ctx, v24);
+                    let v30 = C::emit(ctx, v25);
+                    let v31 = C::emit(ctx, v26);
+                    // Rule at src/prelude_lower.isle line 466.
+                    return v27;
+                }
+                _ => {}
+            }
+        }
+        &ProducesFlags::ProducesFlagsTwiceSideEffect {
+            inst1: ref v32,
+            inst2: ref v33,
+        } => {
+            match arg1 {
+                &ConsumesFlags::ConsumesFlagsReturnsReg {
+                    inst: ref v13,
+                    result: v14,
+                } => {
+                    let v34 = C::emit(ctx, v32);
+                    let v35 = C::emit(ctx, v33);
+                    let v36 = C::emit(ctx, v13);
+                    let v37 = C::value_reg(ctx, v14);
+                    // Rule at src/prelude_lower.isle line 482.
+                    return v37;
+                }
+                &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
+                    inst1: ref v18,
+                    inst2: ref v19,
+                    result: v20,
+                } => {
+                    let v34 = C::emit(ctx, v32);
+                    let v35 = C::emit(ctx, v33);
+                    let v38 = C::emit(ctx, v18);
+                    let v39 = C::emit(ctx, v19);
+                    // Rule at src/prelude_lower.isle line 489.
+                    return v20;
+                }
+                &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
+                    inst1: ref v23,
+                    inst2: ref v24,
+                    inst3: ref v25,
+                    inst4: ref v26,
+                    result: v27,
+                } => {
+                    let v34 = C::emit(ctx, v32);
+                    let v35 = C::emit(ctx, v33);
+                    let v40 = C::emit(ctx, v23);
+                    let v41 = C::emit(ctx, v24);
+                    let v42 = C::emit(ctx, v25);
+                    let v43 = C::emit(ctx, v26);
+                    // Rule at src/prelude_lower.isle line 502.
+                    return v27;
+                }
+                _ => {}
+            }
+        }
+        &ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
+            inst: ref v1,
+            result: v2,
+        } => {
+            match arg1 {
+                &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v9 } => {
+                    let v6 = C::emit(ctx, v1);
+                    let v10 = C::emit(ctx, v9);
+                    let v11 = C::value_reg(ctx, v2);
+                    // Rule at src/prelude_lower.isle line 442.
+                    return v11;
+                }
+                &ConsumesFlags::ConsumesFlagsReturnsResultWithProducer {
+                    inst: ref v4,
+                    result: v5,
+                } => {
+                    let v6 = C::emit(ctx, v1);
+                    let v7 = C::emit(ctx, v4);
+                    let v8 = C::value_regs(ctx, v2, v5);
+                    // Rule at src/prelude_lower.isle line 434.
+                    return v8;
+                }
+                _ => {}
+            }
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "with_flags", "src/prelude_lower.isle line 432"
+    )
+}
+
+// Generated as internal constructor for term with_flags_reg.
+pub fn constructor_with_flags_reg<C: Context>(
+    ctx: &mut C,
+    arg0: &ProducesFlags,
+    arg1: &ConsumesFlags,
+) -> Reg {
+    let v2 = constructor_with_flags(ctx, arg0, arg1);
+    let v4 = C::value_regs_get(ctx, v2, 0x0);
+    // Rule at src/prelude_lower.isle line 520.
+    return v4;
+}
+
+// Generated as internal constructor for term flags_to_producesflags.
+pub fn constructor_flags_to_producesflags<C: Context>(ctx: &mut C, arg0: Value) -> ProducesFlags {
+    let v1 = C::mark_value_used(ctx, arg0);
+    // Rule at src/prelude_lower.isle line 527.
+    return ProducesFlags::AlreadyExistingFlags;
+}
+
+// Generated as internal constructor for term with_flags_side_effect.
+pub fn constructor_with_flags_side_effect<C: Context>(
+    ctx: &mut C,
+    arg0: &ProducesFlags,
+    arg1: &ConsumesFlags,
+) -> SideEffectNoResult {
+    match arg0 {
+        &ProducesFlags::AlreadyExistingFlags => {
+            match arg1 {
+                &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v2 } => {
+                    let v3 = SideEffectNoResult::Inst { inst: v2.clone() };
+                    // Rule at src/prelude_lower.isle line 538.
+                    return v3;
+                }
+                &ConsumesFlags::ConsumesFlagsSideEffect2 {
+                    inst1: ref v4,
+                    inst2: ref v5,
+                } => {
+                    let v6 = SideEffectNoResult::Inst2 {
+                        inst1: v4.clone(),
+                        inst2: v5.clone(),
+                    };
+                    // Rule at src/prelude_lower.isle line 543.
+                    return v6;
+                }
+                _ => {}
+            }
+        }
+        &ProducesFlags::ProducesFlagsSideEffect { inst: ref v7 } => {
+            match arg1 {
+                &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v2 } => {
+                    let v8 = SideEffectNoResult::Inst2 {
+                        inst1: v7.clone(),
+                        inst2: v2.clone(),
+                    };
+                    // Rule at src/prelude_lower.isle line 548.
+                    return v8;
+                }
+                &ConsumesFlags::ConsumesFlagsSideEffect2 {
+                    inst1: ref v4,
+                    inst2: ref v5,
+                } => {
+                    let v9 = SideEffectNoResult::Inst3 {
+                        inst1: v7.clone(),
+                        inst2: v4.clone(),
+                        inst3: v5.clone(),
+                    };
+                    // Rule at src/prelude_lower.isle line 553.
+                    return v9;
+                }
+                _ => {}
+            }
+        }
+        &ProducesFlags::ProducesFlagsTwiceSideEffect {
+            inst1: ref v10,
+            inst2: ref v11,
+        } => {
+            if let &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v2 } = arg1 {
+                let v12 = SideEffectNoResult::Inst3 {
+                    inst1: v10.clone(),
+                    inst2: v11.clone(),
+                    inst3: v2.clone(),
+                };
+                // Rule at src/prelude_lower.isle line 558.
+                return v12;
+            }
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "with_flags_side_effect", "src/prelude_lower.isle line 536"
+    )
+}
+
+// Generated as internal constructor for term with_flags_chained.
+pub fn constructor_with_flags_chained<C: Context>(
+    ctx: &mut C,
+    arg0: &ProducesFlags,
+    arg1: &ConsumesAndProducesFlags,
+    arg2: &ConsumesFlags,
+) -> MultiReg {
+    match arg0 {
+        &ProducesFlags::ProducesFlagsSideEffect { inst: ref v1 } => {
+            match arg1 {
+                &ConsumesAndProducesFlags::SideEffect { inst: ref v3 } => {
+                    match arg2 {
+                        &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v5 } => {
+                            let v6 = C::emit(ctx, v1);
+                            let v7 = C::emit(ctx, v3);
+                            let v8 = C::emit(ctx, v5);
+                            // Rule at src/prelude_lower.isle line 567.
+                            return MultiReg::Empty;
+                        }
+                        &ConsumesFlags::ConsumesFlagsSideEffect2 {
+                            inst1: ref v10,
+                            inst2: ref v11,
+                        } => {
+                            let v6 = C::emit(ctx, v1);
+                            let v7 = C::emit(ctx, v3);
+                            let v12 = C::emit(ctx, v10);
+                            let v13 = C::emit(ctx, v11);
+                            // Rule at src/prelude_lower.isle line 575.
+                            return MultiReg::Empty;
+                        }
+                        &ConsumesFlags::ConsumesFlagsReturnsReg {
+                            inst: ref v14,
+                            result: v15,
+                        } => {
+                            let v6 = C::emit(ctx, v1);
+                            let v7 = C::emit(ctx, v3);
+                            let v16 = C::emit(ctx, v14);
+                            let v17 = MultiReg::One { a: v15 };
+                            // Rule at src/prelude_lower.isle line 584.
+                            return v17;
+                        }
+                        &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
+                            inst1: ref v18,
+                            inst2: ref v19,
+                            result: v20,
+                        } => {
+                            let v6 = C::emit(ctx, v1);
+                            let v7 = C::emit(ctx, v3);
+                            let v21 = C::emit(ctx, v18);
+                            let v22 = C::emit(ctx, v19);
+                            let v24 = C::value_regs_get(ctx, v20, 0x0);
+                            let v26 = C::value_regs_get(ctx, v20, 0x1);
+                            let v27 = MultiReg::Two { a: v24, b: v26 };
+                            // Rule at src/prelude_lower.isle line 592.
+                            return v27;
+                        }
+                        &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
+                            inst1: ref v28,
+                            inst2: ref v29,
+                            inst3: ref v30,
+                            inst4: ref v31,
+                            result: v32,
+                        } => {
+                            let v6 = C::emit(ctx, v1);
+                            let v7 = C::emit(ctx, v3);
+                            let v33 = C::emit(ctx, v28);
+                            let v34 = C::emit(ctx, v29);
+                            let v35 = C::emit(ctx, v30);
+                            let v36 = C::emit(ctx, v31);
+                            let v37 = C::value_regs_get(ctx, v32, 0x0);
+                            let v38 = C::value_regs_get(ctx, v32, 0x1);
+                            let v39 = MultiReg::Two { a: v37, b: v38 };
+                            // Rule at src/prelude_lower.isle line 601.
+                            return v39;
+                        }
+                        _ => {}
+                    }
+                }
+                &ConsumesAndProducesFlags::ReturnsReg {
+                    inst: ref v47,
+                    result: v48,
+                } => {
+                    match arg2 {
+                        &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v5 } => {
+                            let v6 = C::emit(ctx, v1);
+                            let v49 = C::emit(ctx, v47);
+                            let v8 = C::emit(ctx, v5);
+                            let v50 = MultiReg::One { a: v48 };
+                            // Rule at src/prelude_lower.isle line 661.
+                            return v50;
+                        }
+                        &ConsumesFlags::ConsumesFlagsSideEffect2 {
+                            inst1: ref v10,
+                            inst2: ref v11,
+                        } => {
+                            let v6 = C::emit(ctx, v1);
+                            let v49 = C::emit(ctx, v47);
+                            let v12 = C::emit(ctx, v10);
+                            let v13 = C::emit(ctx, v11);
+                            let v50 = MultiReg::One { a: v48 };
+                            // Rule at src/prelude_lower.isle line 669.
+                            return v50;
+                        }
+                        &ConsumesFlags::ConsumesFlagsReturnsReg {
+                            inst: ref v14,
+                            result: v15,
+                        } => {
+                            let v6 = C::emit(ctx, v1);
+                            let v49 = C::emit(ctx, v47);
+                            let v16 = C::emit(ctx, v14);
+                            let v51 = MultiReg::Two { a: v48, b: v15 };
+                            // Rule at src/prelude_lower.isle line 678.
+                            return v51;
+                        }
+                        &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
+                            inst1: ref v18,
+                            inst2: ref v19,
+                            result: v20,
+                        } => {
+                            let v6 = C::emit(ctx, v1);
+                            let v49 = C::emit(ctx, v47);
+                            let v21 = C::emit(ctx, v18);
+                            let v22 = C::emit(ctx, v19);
+                            let v24 = C::value_regs_get(ctx, v20, 0x0);
+                            let v26 = C::value_regs_get(ctx, v20, 0x1);
+                            let v52 = MultiReg::Three {
+                                a: v48,
+                                b: v24,
+                                c: v26,
+                            };
+                            // Rule at src/prelude_lower.isle line 686.
+                            return v52;
+                        }
+                        &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
+                            inst1: ref v28,
+                            inst2: ref v29,
+                            inst3: ref v30,
+                            inst4: ref v31,
+                            result: v32,
+                        } => {
+                            let v6 = C::emit(ctx, v1);
+                            let v49 = C::emit(ctx, v47);
+                            let v33 = C::emit(ctx, v28);
+                            let v34 = C::emit(ctx, v29);
+                            let v35 = C::emit(ctx, v30);
+                            let v36 = C::emit(ctx, v31);
+                            let v37 = C::value_regs_get(ctx, v32, 0x0);
+                            let v38 = C::value_regs_get(ctx, v32, 0x1);
+                            let v53 = MultiReg::Three {
+                                a: v48,
+                                b: v37,
+                                c: v38,
+                            };
+                            // Rule at src/prelude_lower.isle line 695.
+                            return v53;
+                        }
+                        _ => {}
+                    }
+                }
+                _ => {}
+            }
+        }
+        &ProducesFlags::ProducesFlagsReturnsReg {
+            inst: ref v40,
+            result: v41,
+        } => {
+            match arg1 {
+                &ConsumesAndProducesFlags::SideEffect { inst: ref v3 } => {
+                    match arg2 {
+                        &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v5 } => {
+                            let v42 = C::emit(ctx, v40);
+                            let v7 = C::emit(ctx, v3);
+                            let v8 = C::emit(ctx, v5);
+                            let v43 = MultiReg::One { a: v41 };
+                            // Rule at src/prelude_lower.isle line 614.
+                            return v43;
+                        }
+                        &ConsumesFlags::ConsumesFlagsSideEffect2 {
+                            inst1: ref v10,
+                            inst2: ref v11,
+                        } => {
+                            let v42 = C::emit(ctx, v40);
+                            let v7 = C::emit(ctx, v3);
+                            let v12 = C::emit(ctx, v10);
+                            let v13 = C::emit(ctx, v11);
+                            let v43 = MultiReg::One { a: v41 };
+                            // Rule at src/prelude_lower.isle line 622.
+                            return v43;
+                        }
+                        &ConsumesFlags::ConsumesFlagsReturnsReg {
+                            inst: ref v14,
+                            result: v15,
+                        } => {
+                            let v42 = C::emit(ctx, v40);
+                            let v7 = C::emit(ctx, v3);
+                            let v16 = C::emit(ctx, v14);
+                            let v44 = MultiReg::Two { a: v41, b: v15 };
+                            // Rule at src/prelude_lower.isle line 631.
+                            return v44;
+                        }
+                        &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
+                            inst1: ref v18,
+                            inst2: ref v19,
+                            result: v20,
+                        } => {
+                            let v42 = C::emit(ctx, v40);
+                            let v7 = C::emit(ctx, v3);
+                            let v21 = C::emit(ctx, v18);
+                            let v22 = C::emit(ctx, v19);
+                            let v24 = C::value_regs_get(ctx, v20, 0x0);
+                            let v26 = C::value_regs_get(ctx, v20, 0x1);
+                            let v45 = MultiReg::Three {
+                                a: v41,
+                                b: v24,
+                                c: v26,
+                            };
+                            // Rule at src/prelude_lower.isle line 639.
+                            return v45;
+                        }
+                        &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
+                            inst1: ref v28,
+                            inst2: ref v29,
+                            inst3: ref v30,
+                            inst4: ref v31,
+                            result: v32,
+                        } => {
+                            let v42 = C::emit(ctx, v40);
+                            let v7 = C::emit(ctx, v3);
+                            let v33 = C::emit(ctx, v28);
+                            let v34 = C::emit(ctx, v29);
+                            let v35 = C::emit(ctx, v30);
+                            let v36 = C::emit(ctx, v31);
+                            let v37 = C::value_regs_get(ctx, v32, 0x0);
+                            let v38 = C::value_regs_get(ctx, v32, 0x1);
+                            let v46 = MultiReg::Three {
+                                a: v41,
+                                b: v37,
+                                c: v38,
+                            };
+                            // Rule at src/prelude_lower.isle line 648.
+                            return v46;
+                        }
+                        _ => {}
+                    }
+                }
+                &ConsumesAndProducesFlags::ReturnsReg {
+                    inst: ref v47,
+                    result: v48,
+                } => {
+                    match arg2 {
+                        &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v5 } => {
+                            let v42 = C::emit(ctx, v40);
+                            let v49 = C::emit(ctx, v47);
+                            let v8 = C::emit(ctx, v5);
+                            let v54 = MultiReg::Two { a: v41, b: v48 };
+                            // Rule at src/prelude_lower.isle line 708.
+                            return v54;
+                        }
+                        &ConsumesFlags::ConsumesFlagsSideEffect2 {
+                            inst1: ref v10,
+                            inst2: ref v11,
+                        } => {
+                            let v42 = C::emit(ctx, v40);
+                            let v49 = C::emit(ctx, v47);
+                            let v12 = C::emit(ctx, v10);
+                            let v13 = C::emit(ctx, v11);
+                            let v54 = MultiReg::Two { a: v41, b: v48 };
+                            // Rule at src/prelude_lower.isle line 716.
+                            return v54;
+                        }
+                        &ConsumesFlags::ConsumesFlagsReturnsReg {
+                            inst: ref v14,
+                            result: v15,
+                        } => {
+                            let v42 = C::emit(ctx, v40);
+                            let v49 = C::emit(ctx, v47);
+                            let v16 = C::emit(ctx, v14);
+                            let v55 = MultiReg::Three {
+                                a: v41,
+                                b: v48,
+                                c: v15,
+                            };
+                            // Rule at src/prelude_lower.isle line 725.
+                            return v55;
+                        }
+                        &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
+                            inst1: ref v18,
+                            inst2: ref v19,
+                            result: v20,
+                        } => {
+                            let v42 = C::emit(ctx, v40);
+                            let v49 = C::emit(ctx, v47);
+                            let v21 = C::emit(ctx, v18);
+                            let v22 = C::emit(ctx, v19);
+                            let v24 = C::value_regs_get(ctx, v20, 0x0);
+                            let v26 = C::value_regs_get(ctx, v20, 0x1);
+                            let v56 = MultiReg::Four {
+                                a: v41,
+                                b: v48,
+                                c: v24,
+                                d: v26,
+                            };
+                            // Rule at src/prelude_lower.isle line 733.
+                            return v56;
+                        }
+                        &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
+                            inst1: ref v28,
+                            inst2: ref v29,
+                            inst3: ref v30,
+                            inst4: ref v31,
+                            result: v32,
+                        } => {
+                            let v42 = C::emit(ctx, v40);
+                            let v49 = C::emit(ctx, v47);
+                            let v33 = C::emit(ctx, v28);
+                            let v34 = C::emit(ctx, v29);
+                            let v35 = C::emit(ctx, v30);
+                            let v36 = C::emit(ctx, v31);
+                            let v37 = C::value_regs_get(ctx, v32, 0x0);
+                            let v38 = C::value_regs_get(ctx, v32, 0x1);
+                            let v57 = MultiReg::Four {
+                                a: v41,
+                                b: v48,
+                                c: v37,
+                                d: v38,
+                            };
+                            // Rule at src/prelude_lower.isle line 742.
+                            return v57;
+                        }
+                        _ => {}
+                    }
+                }
+                _ => {}
+            }
+        }
+        &ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
+            inst: ref v58,
+            result: v59,
+        } => {
+            if let &ConsumesAndProducesFlags::ReturnsReg {
+                inst: ref v47,
+                result: v48,
+            } = arg1
+            {
+                match arg2 {
+                    &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v5 } => {
+                        let v60 = C::emit(ctx, v58);
+                        let v49 = C::emit(ctx, v47);
+                        let v8 = C::emit(ctx, v5);
+                        let v61 = MultiReg::Two { a: v59, b: v48 };
+                        // Rule at src/prelude_lower.isle line 754.
+                        return v61;
+                    }
+                    &ConsumesFlags::ConsumesFlagsSideEffect2 {
+                        inst1: ref v10,
+                        inst2: ref v11,
+                    } => {
+                        let v60 = C::emit(ctx, v58);
+                        let v49 = C::emit(ctx, v47);
+                        let v12 = C::emit(ctx, v10);
+                        let v13 = C::emit(ctx, v11);
+                        let v61 = MultiReg::Two { a: v59, b: v48 };
+                        // Rule at src/prelude_lower.isle line 762.
+                        return v61;
+                    }
+                    &ConsumesFlags::ConsumesFlagsReturnsResultWithProducer {
+                        inst: ref v63,
+                        result: v64,
+                    } => {
+                        let v60 = C::emit(ctx, v58);
+                        let v49 = C::emit(ctx, v47);
+                        let v65 = C::emit(ctx, v63);
+                        let v66 = MultiReg::Three {
+                            a: v59,
+                            b: v48,
+                            c: v64,
+                        };
+                        // Rule at src/prelude_lower.isle line 779.
+                        return v66;
+                    }
+                    &ConsumesFlags::ConsumesFlagsReturnsReg {
+                        inst: ref v14,
+                        result: v15,
+                    } => {
+                        let v60 = C::emit(ctx, v58);
+                        let v49 = C::emit(ctx, v47);
+                        let v16 = C::emit(ctx, v14);
+                        let v62 = MultiReg::Three {
+                            a: v59,
+                            b: v48,
+                            c: v15,
+                        };
+                        // Rule at src/prelude_lower.isle line 771.
+                        return v62;
+                    }
+                    &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
+                        inst1: ref v18,
+                        inst2: ref v19,
+                        result: v20,
+                    } => {
+                        let v60 = C::emit(ctx, v58);
+                        let v49 = C::emit(ctx, v47);
+                        let v21 = C::emit(ctx, v18);
+                        let v22 = C::emit(ctx, v19);
+                        let v24 = C::value_regs_get(ctx, v20, 0x0);
+                        let v26 = C::value_regs_get(ctx, v20, 0x1);
+                        let v67 = MultiReg::Four {
+                            a: v59,
+                            b: v48,
+                            c: v24,
+                            d: v26,
+                        };
+                        // Rule at src/prelude_lower.isle line 787.
+                        return v67;
+                    }
+                    &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
+                        inst1: ref v28,
+                        inst2: ref v29,
+                        inst3: ref v30,
+                        inst4: ref v31,
+                        result: v32,
+                    } => {
+                        let v60 = C::emit(ctx, v58);
+                        let v49 = C::emit(ctx, v47);
+                        let v33 = C::emit(ctx, v28);
+                        let v34 = C::emit(ctx, v29);
+                        let v35 = C::emit(ctx, v30);
+                        let v36 = C::emit(ctx, v31);
+                        let v37 = C::value_regs_get(ctx, v32, 0x0);
+                        let v38 = C::value_regs_get(ctx, v32, 0x1);
+                        let v68 = MultiReg::Four {
+                            a: v59,
+                            b: v48,
+                            c: v37,
+                            d: v38,
+                        };
+                        // Rule at src/prelude_lower.isle line 796.
+                        return v68;
+                    }
+                    _ => {}
+                }
+            }
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "with_flags_chained", "src/prelude_lower.isle line 564"
+    )
+}
+
+// Generated as internal constructor for term lower_return.
+pub fn constructor_lower_return<C: Context>(ctx: &mut C, arg0: ValueSlice) -> InstOutput {
+    let v1 = C::gen_return(ctx, arg0);
+    let v2 = C::output_none(ctx);
+    // Rule at src/prelude_lower.isle line 996.
+    return v2;
+}
+
+// Generated as internal constructor for term operand_size.
+pub fn constructor_operand_size<C: Context>(ctx: &mut C, arg0: Type) -> OperandSize {
+    let v1 = C::fits_in_32(ctx, arg0);
+    if let Some(v2) = v1 {
+        // Rule at src/isa/aarch64/inst.isle line 1192.
+        return OperandSize::Size32;
+    }
+    let v4 = C::fits_in_64(ctx, arg0);
+    if let Some(v5) = v4 {
+        // Rule at src/isa/aarch64/inst.isle line 1193.
+        return OperandSize::Size64;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "operand_size", "src/isa/aarch64/inst.isle line 1191"
+    )
+}
+
+// Generated as internal constructor for term scalar_size.
+pub fn constructor_scalar_size<C: Context>(ctx: &mut C, arg0: Type) -> ScalarSize {
+    match arg0 {
+        I8 => {
+            // Rule at src/isa/aarch64/inst.isle line 1205.
+            return ScalarSize::Size8;
+        }
+        I16 => {
+            // Rule at src/isa/aarch64/inst.isle line 1206.
+            return ScalarSize::Size16;
+        }
+        I32 => {
+            // Rule at src/isa/aarch64/inst.isle line 1207.
+            return ScalarSize::Size32;
+        }
+        I64 => {
+            // Rule at src/isa/aarch64/inst.isle line 1208.
+            return ScalarSize::Size64;
+        }
+        I128 => {
+            // Rule at src/isa/aarch64/inst.isle line 1209.
+            return ScalarSize::Size128;
+        }
+        F32 => {
+            // Rule at src/isa/aarch64/inst.isle line 1211.
+            return ScalarSize::Size32;
+        }
+        F64 => {
+            // Rule at src/isa/aarch64/inst.isle line 1212.
+            return ScalarSize::Size64;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "scalar_size", "src/isa/aarch64/inst.isle line 1203"
+    )
+}
+
+// Generated as internal constructor for term lane_size.
+pub fn constructor_lane_size<C: Context>(ctx: &mut C, arg0: Type) -> ScalarSize {
+    let v1 = C::multi_lane(ctx, arg0);
+    if let Some(v2) = v1 {
+        match v2.0 {
+            0x8 => {
+                // Rule at src/isa/aarch64/inst.isle line 1216.
+                return ScalarSize::Size8;
+            }
+            0x10 => {
+                // Rule at src/isa/aarch64/inst.isle line 1217.
+                return ScalarSize::Size16;
+            }
+            0x20 => {
+                // Rule at src/isa/aarch64/inst.isle line 1218.
+                return ScalarSize::Size32;
+            }
+            0x40 => {
+                // Rule at src/isa/aarch64/inst.isle line 1219.
+                return ScalarSize::Size64;
+            }
+            _ => {}
+        }
+    }
+    let v9 = C::dynamic_lane(ctx, arg0);
+    if let Some(v10) = v9 {
+        match v10.0 {
+            0x8 => {
+                // Rule at src/isa/aarch64/inst.isle line 1220.
+                return ScalarSize::Size8;
+            }
+            0x10 => {
+                // Rule at src/isa/aarch64/inst.isle line 1221.
+                return ScalarSize::Size16;
+            }
+            0x20 => {
+                // Rule at src/isa/aarch64/inst.isle line 1222.
+                return ScalarSize::Size32;
+            }
+            0x40 => {
+                // Rule at src/isa/aarch64/inst.isle line 1223.
+                return ScalarSize::Size64;
+            }
+            _ => {}
+        }
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "lane_size", "src/isa/aarch64/inst.isle line 1215"
+    )
+}
+
+// Generated as internal constructor for term vector_lane_size.
+pub fn constructor_vector_lane_size<C: Context>(ctx: &mut C, arg0: &VectorSize) -> ScalarSize {
+    match arg0 {
+        &VectorSize::Size8x8 => {
+            // Rule at src/isa/aarch64/inst.isle line 1228.
+            return ScalarSize::Size8;
+        }
+        &VectorSize::Size8x16 => {
+            // Rule at src/isa/aarch64/inst.isle line 1227.
+            return ScalarSize::Size8;
+        }
+        &VectorSize::Size16x4 => {
+            // Rule at src/isa/aarch64/inst.isle line 1230.
+            return ScalarSize::Size16;
+        }
+        &VectorSize::Size16x8 => {
+            // Rule at src/isa/aarch64/inst.isle line 1229.
+            return ScalarSize::Size16;
+        }
+        &VectorSize::Size32x2 => {
+            // Rule at src/isa/aarch64/inst.isle line 1232.
+            return ScalarSize::Size32;
+        }
+        &VectorSize::Size32x4 => {
+            // Rule at src/isa/aarch64/inst.isle line 1231.
+            return ScalarSize::Size32;
+        }
+        &VectorSize::Size64x2 => {
+            // Rule at src/isa/aarch64/inst.isle line 1233.
+            return ScalarSize::Size64;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vector_lane_size", "src/isa/aarch64/inst.isle line 1226"
+    )
+}
+
+// Generated as internal constructor for term vector_size.
+pub fn constructor_vector_size<C: Context>(ctx: &mut C, arg0: Type) -> VectorSize {
+    let v1 = C::multi_lane(ctx, arg0);
+    if let Some(v2) = v1 {
+        match v2.0 {
+            0x8 => {
+                match v2.1 {
+                    0x8 => {
+                        // Rule at src/isa/aarch64/inst.isle line 1268.
+                        return VectorSize::Size8x8;
+                    }
+                    0x10 => {
+                        // Rule at src/isa/aarch64/inst.isle line 1269.
+                        return VectorSize::Size8x16;
+                    }
+                    _ => {}
+                }
+            }
+            0x10 => {
+                match v2.1 {
+                    0x4 => {
+                        // Rule at src/isa/aarch64/inst.isle line 1270.
+                        return VectorSize::Size16x4;
+                    }
+                    0x8 => {
+                        // Rule at src/isa/aarch64/inst.isle line 1271.
+                        return VectorSize::Size16x8;
+                    }
+                    _ => {}
+                }
+            }
+            0x20 => {
+                match v2.1 {
+                    0x2 => {
+                        // Rule at src/isa/aarch64/inst.isle line 1272.
+                        return VectorSize::Size32x2;
+                    }
+                    0x4 => {
+                        // Rule at src/isa/aarch64/inst.isle line 1273.
+                        return VectorSize::Size32x4;
+                    }
+                    _ => {}
+                }
+            }
+            0x40 => {
+                if v2.1 == 0x2 {
+                    // Rule at src/isa/aarch64/inst.isle line 1274.
+                    return VectorSize::Size64x2;
+                }
+            }
+            _ => {}
+        }
+    }
+    let v12 = C::dynamic_lane(ctx, arg0);
+    if let Some(v13) = v12 {
+        match v13.0 {
+            0x8 => {
+                match v13.1 {
+                    0x8 => {
+                        // Rule at src/isa/aarch64/inst.isle line 1275.
+                        return VectorSize::Size8x8;
+                    }
+                    0x10 => {
+                        // Rule at src/isa/aarch64/inst.isle line 1276.
+                        return VectorSize::Size8x16;
+                    }
+                    _ => {}
+                }
+            }
+            0x10 => {
+                match v13.1 {
+                    0x4 => {
+                        // Rule at src/isa/aarch64/inst.isle line 1277.
+                        return VectorSize::Size16x4;
+                    }
+                    0x8 => {
+                        // Rule at src/isa/aarch64/inst.isle line 1278.
+                        return VectorSize::Size16x8;
+                    }
+                    _ => {}
+                }
+            }
+            0x20 => {
+                match v13.1 {
+                    0x2 => {
+                        // Rule at src/isa/aarch64/inst.isle line 1279.
+                        return VectorSize::Size32x2;
+                    }
+                    0x4 => {
+                        // Rule at src/isa/aarch64/inst.isle line 1280.
+                        return VectorSize::Size32x4;
+                    }
+                    _ => {}
+                }
+            }
+            0x40 => {
+                if v13.1 == 0x2 {
+                    // Rule at src/isa/aarch64/inst.isle line 1281.
+                    return VectorSize::Size64x2;
+                }
+            }
+            _ => {}
+        }
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vector_size", "src/isa/aarch64/inst.isle line 1267"
+    )
+}
+
+// Generated as internal constructor for term imm12_from_negated_value.
+pub fn constructor_imm12_from_negated_value<C: Context>(ctx: &mut C, arg0: Value) -> Option<Imm12> {
+    let v1 = C::def_inst(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v3 = C::first_result(ctx, v2);
+        if let Some(v4) = v3 {
+            let v6 = &C::inst_data(ctx, v2);
+            if let &InstructionData::UnaryImm {
+                opcode: ref v7,
+                imm: v8,
+            } = v6
+            {
+                if let &Opcode::Iconst = v7 {
+                    let v5 = C::value_type(ctx, v4);
+                    let v9 = C::i64_sextend_imm64(ctx, v5, v8);
+                    let v10 = C::i64_neg(ctx, v9);
+                    let v11 = C::i64_as_u64(ctx, v10);
+                    let v12 = C::imm12_from_u64(ctx, v11);
+                    if let Some(v13) = v12 {
+                        // Rule at src/isa/aarch64/inst.isle line 1772.
+                        return Some(v13);
+                    }
+                }
+            }
+        }
+    }
+    None
+}
+
+// Generated as internal constructor for term value_regs_zero.
+pub fn constructor_value_regs_zero<C: Context>(ctx: &mut C) -> ValueRegs {
+    let v3 = constructor_imm(ctx, I64, &ImmExtend::Zero, 0x0);
+    let v4 = constructor_imm(ctx, I64, &ImmExtend::Zero, 0x0);
+    let v5 = C::value_regs(ctx, v3, v4);
+    // Rule at src/isa/aarch64/inst.isle line 1821.
+    return v5;
+}
+
+// Generated as internal constructor for term mov.
+pub fn constructor_mov<C: Context>(ctx: &mut C, arg0: Reg, arg1: Type) -> Reg {
+    let v3 = C::temp_writable_reg(ctx, I64);
+    let v4 = &constructor_operand_size(ctx, arg1);
+    let v5 = MInst::Mov {
+        size: v4.clone(),
+        rd: v3,
+        rm: arg0,
+    };
+    let v6 = C::emit(ctx, &v5);
+    let v7 = C::writable_reg_to_reg(ctx, v3);
+    // Rule at src/isa/aarch64/inst.isle line 1829.
+    return v7;
+}
+
+// Generated as internal constructor for term movz.
+pub fn constructor_movz<C: Context>(ctx: &mut C, arg0: MoveWideConst, arg1: &OperandSize) -> Reg {
+    let v3 = C::temp_writable_reg(ctx, I64);
+    let v5 = MInst::MovWide {
+        op: MoveWideOp::MovZ,
+        rd: v3,
+        imm: arg0,
+        size: arg1.clone(),
+    };
+    let v6 = C::emit(ctx, &v5);
+    let v7 = C::writable_reg_to_reg(ctx, v3);
+    // Rule at src/isa/aarch64/inst.isle line 1836.
+    return v7;
+}
+
+// Generated as internal constructor for term movn.
+pub fn constructor_movn<C: Context>(ctx: &mut C, arg0: MoveWideConst, arg1: &OperandSize) -> Reg {
+    let v3 = C::temp_writable_reg(ctx, I64);
+    let v5 = MInst::MovWide {
+        op: MoveWideOp::MovN,
+        rd: v3,
+        imm: arg0,
+        size: arg1.clone(),
+    };
+    let v6 = C::emit(ctx, &v5);
+    let v7 = C::writable_reg_to_reg(ctx, v3);
+    // Rule at src/isa/aarch64/inst.isle line 1843.
+    return v7;
+}
+
+// Generated as internal constructor for term alu_rr_imm_logic.
+pub fn constructor_alu_rr_imm_logic<C: Context>(
+    ctx: &mut C,
+    arg0: &ALUOp,
+    arg1: Type,
+    arg2: Reg,
+    arg3: ImmLogic,
+) -> Reg {
+    let v5 = C::temp_writable_reg(ctx, I64);
+    let v6 = &constructor_operand_size(ctx, arg1);
+    let v7 = MInst::AluRRImmLogic {
+        alu_op: arg0.clone(),
+        size: v6.clone(),
+        rd: v5,
+        rn: arg2,
+        imml: arg3,
+    };
+    let v8 = C::emit(ctx, &v7);
+    let v9 = C::writable_reg_to_reg(ctx, v5);
+    // Rule at src/isa/aarch64/inst.isle line 1850.
+    return v9;
+}
+
+// Generated as internal constructor for term alu_rr_imm_shift.
+pub fn constructor_alu_rr_imm_shift<C: Context>(
+    ctx: &mut C,
+    arg0: &ALUOp,
+    arg1: Type,
+    arg2: Reg,
+    arg3: ImmShift,
+) -> Reg {
+    let v5 = C::temp_writable_reg(ctx, I64);
+    let v6 = &constructor_operand_size(ctx, arg1);
+    let v7 = MInst::AluRRImmShift {
+        alu_op: arg0.clone(),
+        size: v6.clone(),
+        rd: v5,
+        rn: arg2,
+        immshift: arg3,
+    };
+    let v8 = C::emit(ctx, &v7);
+    let v9 = C::writable_reg_to_reg(ctx, v5);
+    // Rule at src/isa/aarch64/inst.isle line 1857.
+    return v9;
+}
+
+// Generated as internal constructor for term alu_rrr.
+pub fn constructor_alu_rrr<C: Context>(
+    ctx: &mut C,
+    arg0: &ALUOp,
+    arg1: Type,
+    arg2: Reg,
+    arg3: Reg,
+) -> Reg {
+    let v5 = C::temp_writable_reg(ctx, I64);
+    let v6 = &constructor_operand_size(ctx, arg1);
+    let v7 = MInst::AluRRR {
+        alu_op: arg0.clone(),
+        size: v6.clone(),
+        rd: v5,
+        rn: arg2,
+        rm: arg3,
+    };
+    let v8 = C::emit(ctx, &v7);
+    let v9 = C::writable_reg_to_reg(ctx, v5);
+    // Rule at src/isa/aarch64/inst.isle line 1864.
+    return v9;
+}
+
+// Generated as internal constructor for term vec_rrr.
+pub fn constructor_vec_rrr<C: Context>(
+    ctx: &mut C,
+    arg0: &VecALUOp,
+    arg1: Reg,
+    arg2: Reg,
+    arg3: &VectorSize,
+) -> Reg {
+    let v5 = C::temp_writable_reg(ctx, I8X16);
+    let v6 = MInst::VecRRR {
+        alu_op: arg0.clone(),
+        rd: v5,
+        rn: arg1,
+        rm: arg2,
+        size: arg3.clone(),
+    };
+    let v7 = C::emit(ctx, &v6);
+    let v8 = C::writable_reg_to_reg(ctx, v5);
+    // Rule at src/isa/aarch64/inst.isle line 1871.
+    return v8;
+}
+
+// Generated as internal constructor for term fpu_rr.
+pub fn constructor_fpu_rr<C: Context>(
+    ctx: &mut C,
+    arg0: &FPUOp1,
+    arg1: Reg,
+    arg2: &ScalarSize,
+) -> Reg {
+    let v4 = C::temp_writable_reg(ctx, F64);
+    let v5 = MInst::FpuRR {
+        fpu_op: arg0.clone(),
+        size: arg2.clone(),
+        rd: v4,
+        rn: arg1,
+    };
+    let v6 = C::emit(ctx, &v5);
+    let v7 = C::writable_reg_to_reg(ctx, v4);
+    // Rule at src/isa/aarch64/inst.isle line 1878.
+    return v7;
+}
+
+// Generated as internal constructor for term vec_rrr_mod.
+pub fn constructor_vec_rrr_mod<C: Context>(
+    ctx: &mut C,
+    arg0: &VecALUModOp,
+    arg1: Reg,
+    arg2: Reg,
+    arg3: Reg,
+    arg4: &VectorSize,
+) -> Reg {
+    let v6 = C::temp_writable_reg(ctx, I8X16);
+    let v7 = MInst::VecRRRMod {
+        alu_op: arg0.clone(),
+        rd: v6,
+        ri: arg1,
+        rn: arg2,
+        rm: arg3,
+        size: arg4.clone(),
+    };
+    let v8 = C::emit(ctx, &v7);
+    let v9 = C::writable_reg_to_reg(ctx, v6);
+    // Rule at src/isa/aarch64/inst.isle line 1886.
+    return v9;
+}
+
+// Generated as internal constructor for term vec_fmla_elem.
+pub fn constructor_vec_fmla_elem<C: Context>(
+    ctx: &mut C,
+    arg0: &VecALUModOp,
+    arg1: Reg,
+    arg2: Reg,
+    arg3: Reg,
+    arg4: &VectorSize,
+    arg5: u8,
+) -> Reg {
+    let v7 = C::temp_writable_reg(ctx, I8X16);
+    let v8 = MInst::VecFmlaElem {
+        alu_op: arg0.clone(),
+        rd: v7,
+        ri: arg1,
+        rn: arg2,
+        rm: arg3,
+        size: arg4.clone(),
+        idx: arg5,
+    };
+    let v9 = C::emit(ctx, &v8);
+    let v10 = C::writable_reg_to_reg(ctx, v7);
+    // Rule at src/isa/aarch64/inst.isle line 1894.
+    return v10;
+}
+
+// Generated as internal constructor for term fpu_rri.
+pub fn constructor_fpu_rri<C: Context>(ctx: &mut C, arg0: &FPUOpRI, arg1: Reg) -> Reg {
+    let v3 = C::temp_writable_reg(ctx, F64);
+    let v4 = MInst::FpuRRI {
+        fpu_op: arg0.clone(),
+        rd: v3,
+        rn: arg1,
+    };
+    let v5 = C::emit(ctx, &v4);
+    let v6 = C::writable_reg_to_reg(ctx, v3);
+    // Rule at src/isa/aarch64/inst.isle line 1900.
+    return v6;
+}
+
+// Generated as internal constructor for term fpu_rri_mod.
+pub fn constructor_fpu_rri_mod<C: Context>(
+    ctx: &mut C,
+    arg0: &FPUOpRIMod,
+    arg1: Reg,
+    arg2: Reg,
+) -> Reg {
+    let v4 = C::temp_writable_reg(ctx, F64);
+    let v5 = MInst::FpuRRIMod {
+        fpu_op: arg0.clone(),
+        rd: v4,
+        ri: arg1,
+        rn: arg2,
+    };
+    let v6 = C::emit(ctx, &v5);
+    let v7 = C::writable_reg_to_reg(ctx, v4);
+    // Rule at src/isa/aarch64/inst.isle line 1906.
+    return v7;
+}
+
+// Generated as internal constructor for term fpu_rrr.
+pub fn constructor_fpu_rrr<C: Context>(
+    ctx: &mut C,
+    arg0: &FPUOp2,
+    arg1: Reg,
+    arg2: Reg,
+    arg3: &ScalarSize,
+) -> Reg {
+    let v5 = C::temp_writable_reg(ctx, F64);
+    let v6 = MInst::FpuRRR {
+        fpu_op: arg0.clone(),
+        size: arg3.clone(),
+        rd: v5,
+        rn: arg1,
+        rm: arg2,
+    };
+    let v7 = C::emit(ctx, &v6);
+    let v8 = C::writable_reg_to_reg(ctx, v5);
+    // Rule at src/isa/aarch64/inst.isle line 1913.
+    return v8;
+}
+
+// Generated as internal constructor for term fpu_rrrr.
+pub fn constructor_fpu_rrrr<C: Context>(
+    ctx: &mut C,
+    arg0: &FPUOp3,
+    arg1: &ScalarSize,
+    arg2: Reg,
+    arg3: Reg,
+    arg4: Reg,
+) -> Reg {
+    let v6 = C::temp_writable_reg(ctx, F64);
+    let v7 = MInst::FpuRRRR {
+        fpu_op: arg0.clone(),
+        size: arg1.clone(),
+        rd: v6,
+        rn: arg2,
+        rm: arg3,
+        ra: arg4,
+    };
+    let v8 = C::emit(ctx, &v7);
+    let v9 = C::writable_reg_to_reg(ctx, v6);
+    // Rule at src/isa/aarch64/inst.isle line 1920.
+    return v9;
+}
+
+// Generated as internal constructor for term fpu_cmp.
+pub fn constructor_fpu_cmp<C: Context>(
+    ctx: &mut C,
+    arg0: &ScalarSize,
+    arg1: Reg,
+    arg2: Reg,
+) -> ProducesFlags {
+    let v3 = MInst::FpuCmp {
+        size: arg0.clone(),
+        rn: arg1,
+        rm: arg2,
+    };
+    let v4 = ProducesFlags::ProducesFlagsSideEffect { inst: v3 };
+    // Rule at src/isa/aarch64/inst.isle line 1927.
+    return v4;
+}
+
+// Generated as internal constructor for term vec_lanes.
+pub fn constructor_vec_lanes<C: Context>(
+    ctx: &mut C,
+    arg0: &VecLanesOp,
+    arg1: Reg,
+    arg2: &VectorSize,
+) -> Reg {
+    let v4 = C::temp_writable_reg(ctx, I8X16);
+    let v5 = MInst::VecLanes {
+        op: arg0.clone(),
+        rd: v4,
+        rn: arg1,
+        size: arg2.clone(),
+    };
+    let v6 = C::emit(ctx, &v5);
+    let v7 = C::writable_reg_to_reg(ctx, v4);
+    // Rule at src/isa/aarch64/inst.isle line 1933.
+    return v7;
+}
+
+// Generated as internal constructor for term vec_shift_imm.
+pub fn constructor_vec_shift_imm<C: Context>(
+    ctx: &mut C,
+    arg0: &VecShiftImmOp,
+    arg1: u8,
+    arg2: Reg,
+    arg3: &VectorSize,
+) -> Reg {
+    let v5 = C::temp_writable_reg(ctx, I8X16);
+    let v6 = MInst::VecShiftImm {
+        op: arg0.clone(),
+        rd: v5,
+        rn: arg2,
+        size: arg3.clone(),
+        imm: arg1,
+    };
+    let v7 = C::emit(ctx, &v6);
+    let v8 = C::writable_reg_to_reg(ctx, v5);
+    // Rule at src/isa/aarch64/inst.isle line 1940.
+    return v8;
+}
+
+// Generated as internal constructor for term vec_dup.
+pub fn constructor_vec_dup<C: Context>(ctx: &mut C, arg0: Reg, arg1: &VectorSize) -> Reg {
+    let v3 = C::temp_writable_reg(ctx, I8X16);
+    let v4 = MInst::VecDup {
+        rd: v3,
+        rn: arg0,
+        size: arg1.clone(),
+    };
+    let v5 = C::emit(ctx, &v4);
+    let v6 = C::writable_reg_to_reg(ctx, v3);
+    // Rule at src/isa/aarch64/inst.isle line 1947.
+    return v6;
+}
+
+// Generated as internal constructor for term vec_dup_from_fpu.
+pub fn constructor_vec_dup_from_fpu<C: Context>(
+    ctx: &mut C,
+    arg0: Reg,
+    arg1: &VectorSize,
+    arg2: u8,
+) -> Reg {
+    let v4 = C::temp_writable_reg(ctx, I8X16);
+    let v5 = MInst::VecDupFromFpu {
+        rd: v4,
+        rn: arg0,
+        size: arg1.clone(),
+        lane: arg2,
+    };
+    let v6 = C::emit(ctx, &v5);
+    let v7 = C::writable_reg_to_reg(ctx, v4);
+    // Rule at src/isa/aarch64/inst.isle line 1954.
+    return v7;
+}
+
+// Generated as internal constructor for term vec_dup_imm.
+pub fn constructor_vec_dup_imm<C: Context>(
+    ctx: &mut C,
+    arg0: ASIMDMovModImm,
+    arg1: bool,
+    arg2: &VectorSize,
+) -> Reg {
+    let v4 = C::temp_writable_reg(ctx, I8X16);
+    let v5 = MInst::VecDupImm {
+        rd: v4,
+        imm: arg0,
+        invert: arg1,
+        size: arg2.clone(),
+    };
+    let v6 = C::emit(ctx, &v5);
+    let v7 = C::writable_reg_to_reg(ctx, v4);
+    // Rule at src/isa/aarch64/inst.isle line 1961.
+    return v7;
+}
+
+// Generated as internal constructor for term alu_rr_imm12.
+pub fn constructor_alu_rr_imm12<C: Context>(
+    ctx: &mut C,
+    arg0: &ALUOp,
+    arg1: Type,
+    arg2: Reg,
+    arg3: Imm12,
+) -> Reg {
+    let v5 = C::temp_writable_reg(ctx, I64);
+    let v6 = &constructor_operand_size(ctx, arg1);
+    let v7 = MInst::AluRRImm12 {
+        alu_op: arg0.clone(),
+        size: v6.clone(),
+        rd: v5,
+        rn: arg2,
+        imm12: arg3,
+    };
+    let v8 = C::emit(ctx, &v7);
+    let v9 = C::writable_reg_to_reg(ctx, v5);
+    // Rule at src/isa/aarch64/inst.isle line 1968.
+    return v9;
+}
+
+// Generated as internal constructor for term alu_rrr_shift.
+pub fn constructor_alu_rrr_shift<C: Context>(
+    ctx: &mut C,
+    arg0: &ALUOp,
+    arg1: Type,
+    arg2: Reg,
+    arg3: Reg,
+    arg4: ShiftOpAndAmt,
+) -> Reg {
+    let v6 = C::temp_writable_reg(ctx, I64);
+    let v7 = &constructor_operand_size(ctx, arg1);
+    let v8 = MInst::AluRRRShift {
+        alu_op: arg0.clone(),
+        size: v7.clone(),
+        rd: v6,
+        rn: arg2,
+        rm: arg3,
+        shiftop: arg4,
+    };
+    let v9 = C::emit(ctx, &v8);
+    let v10 = C::writable_reg_to_reg(ctx, v6);
+    // Rule at src/isa/aarch64/inst.isle line 1975.
+    return v10;
+}
+
+// Generated as internal constructor for term cmp_rr_shift.
+pub fn constructor_cmp_rr_shift<C: Context>(
+    ctx: &mut C,
+    arg0: &OperandSize,
+    arg1: Reg,
+    arg2: Reg,
+    arg3: u64,
+) -> ProducesFlags {
+    let v5 = C::lshr_from_u64(ctx, I64, arg3);
+    if let Some(v6) = v5 {
+        let v8 = C::writable_zero_reg(ctx);
+        let v9 = MInst::AluRRRShift {
+            alu_op: ALUOp::SubS,
+            size: arg0.clone(),
+            rd: v8,
+            rn: arg1,
+            rm: arg2,
+            shiftop: v6,
+        };
+        let v10 = ProducesFlags::ProducesFlagsSideEffect { inst: v9 };
+        // Rule at src/isa/aarch64/inst.isle line 1983.
+        return v10;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "cmp_rr_shift", "src/isa/aarch64/inst.isle line 1982"
+    )
+}
+
+// Generated as internal constructor for term cmp_rr_shift_asr.
+pub fn constructor_cmp_rr_shift_asr<C: Context>(
+    ctx: &mut C,
+    arg0: &OperandSize,
+    arg1: Reg,
+    arg2: Reg,
+    arg3: u64,
+) -> ProducesFlags {
+    let v5 = C::ashr_from_u64(ctx, I64, arg3);
+    if let Some(v6) = v5 {
+        let v8 = C::writable_zero_reg(ctx);
+        let v9 = MInst::AluRRRShift {
+            alu_op: ALUOp::SubS,
+            size: arg0.clone(),
+            rd: v8,
+            rn: arg1,
+            rm: arg2,
+            shiftop: v6,
+        };
+        let v10 = ProducesFlags::ProducesFlagsSideEffect { inst: v9 };
+        // Rule at src/isa/aarch64/inst.isle line 1992.
+        return v10;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "cmp_rr_shift_asr", "src/isa/aarch64/inst.isle line 1991"
+    )
+}
+
+// Generated as internal constructor for term alu_rrr_extend.
+pub fn constructor_alu_rrr_extend<C: Context>(
+    ctx: &mut C,
+    arg0: &ALUOp,
+    arg1: Type,
+    arg2: Reg,
+    arg3: Reg,
+    arg4: &ExtendOp,
+) -> Reg {
+    let v6 = C::temp_writable_reg(ctx, I64);
+    let v7 = &constructor_operand_size(ctx, arg1);
+    let v8 = MInst::AluRRRExtend {
+        alu_op: arg0.clone(),
+        size: v7.clone(),
+        rd: v6,
+        rn: arg2,
+        rm: arg3,
+        extendop: arg4.clone(),
+    };
+    let v9 = C::emit(ctx, &v8);
+    let v10 = C::writable_reg_to_reg(ctx, v6);
+    // Rule at src/isa/aarch64/inst.isle line 2000.
+    return v10;
+}
+
+// Generated as internal constructor for term alu_rr_extend_reg.
+pub fn constructor_alu_rr_extend_reg<C: Context>(
+    ctx: &mut C,
+    arg0: &ALUOp,
+    arg1: Type,
+    arg2: Reg,
+    arg3: &ExtendedValue,
+) -> Reg {
+    let v4 = C::put_extended_in_reg(ctx, arg3);
+    let v5 = &C::get_extended_op(ctx, arg3);
+    let v6 = constructor_alu_rrr_extend(ctx, arg0, arg1, arg2, v4, v5);
+    // Rule at src/isa/aarch64/inst.isle line 2008.
+    return v6;
+}
+
+// Generated as internal constructor for term alu_rrrr.
+pub fn constructor_alu_rrrr<C: Context>(
+    ctx: &mut C,
+    arg0: &ALUOp3,
+    arg1: Type,
+    arg2: Reg,
+    arg3: Reg,
+    arg4: Reg,
+) -> Reg {
+    let v6 = C::temp_writable_reg(ctx, I64);
+    let v7 = &constructor_operand_size(ctx, arg1);
+    let v8 = MInst::AluRRRR {
+        alu_op: arg0.clone(),
+        size: v7.clone(),
+        rd: v6,
+        rn: arg2,
+        rm: arg3,
+        ra: arg4,
+    };
+    let v9 = C::emit(ctx, &v8);
+    let v10 = C::writable_reg_to_reg(ctx, v6);
+    // Rule at src/isa/aarch64/inst.isle line 2015.
+    return v10;
+}
+
+// Generated as internal constructor for term alu_rrr_with_flags_paired.
+pub fn constructor_alu_rrr_with_flags_paired<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: Reg,
+    arg3: &ALUOp,
+) -> ProducesFlags {
+    let v5 = C::temp_writable_reg(ctx, I64);
+    let v6 = &constructor_operand_size(ctx, arg0);
+    let v7 = MInst::AluRRR {
+        alu_op: arg3.clone(),
+        size: v6.clone(),
+        rd: v5,
+        rn: arg1,
+        rm: arg2,
+    };
+    let v8 = C::writable_reg_to_reg(ctx, v5);
+    let v9 = ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
+        inst: v7,
+        result: v8,
+    };
+    // Rule at src/isa/aarch64/inst.isle line 2022.
+    return v9;
+}
+
+// Generated as internal constructor for term alu_rrr_with_flags_chained.
+pub fn constructor_alu_rrr_with_flags_chained<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: Reg,
+    arg3: &ALUOp,
+) -> ConsumesAndProducesFlags {
+    let v5 = C::temp_writable_reg(ctx, I64);
+    let v6 = &constructor_operand_size(ctx, arg0);
+    let v7 = MInst::AluRRR {
+        alu_op: arg3.clone(),
+        size: v6.clone(),
+        rd: v5,
+        rn: arg1,
+        rm: arg2,
+    };
+    let v8 = C::writable_reg_to_reg(ctx, v5);
+    let v9 = ConsumesAndProducesFlags::ReturnsReg {
+        inst: v7,
+        result: v8,
+    };
+    // Rule at src/isa/aarch64/inst.isle line 2030.
+    return v9;
+}
+
+// Generated as internal constructor for term bit_rr.
+pub fn constructor_bit_rr<C: Context>(ctx: &mut C, arg0: &BitOp, arg1: Type, arg2: Reg) -> Reg {
+    let v4 = C::temp_writable_reg(ctx, I64);
+    let v5 = &constructor_operand_size(ctx, arg1);
+    let v6 = MInst::BitRR {
+        op: arg0.clone(),
+        size: v5.clone(),
+        rd: v4,
+        rn: arg2,
+    };
+    let v7 = C::emit(ctx, &v6);
+    let v8 = C::writable_reg_to_reg(ctx, v4);
+    // Rule at src/isa/aarch64/inst.isle line 2038.
+    return v8;
+}
+
+// Generated as internal constructor for term add_with_flags_paired.
+pub fn constructor_add_with_flags_paired<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: Reg,
+) -> ProducesFlags {
+    let v4 = C::temp_writable_reg(ctx, I64);
+    let v6 = &constructor_operand_size(ctx, arg0);
+    let v7 = MInst::AluRRR {
+        alu_op: ALUOp::AddS,
+        size: v6.clone(),
+        rd: v4,
+        rn: arg1,
+        rm: arg2,
+    };
+    let v8 = C::writable_reg_to_reg(ctx, v4);
+    let v9 = ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
+        inst: v7,
+        result: v8,
+    };
+    // Rule at src/isa/aarch64/inst.isle line 2045.
+    return v9;
+}
+
+// Generated as internal constructor for term adc_paired.
+pub fn constructor_adc_paired<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: Reg,
+) -> ConsumesFlags {
+    let v4 = C::temp_writable_reg(ctx, I64);
+    let v6 = &constructor_operand_size(ctx, arg0);
+    let v7 = MInst::AluRRR {
+        alu_op: ALUOp::Adc,
+        size: v6.clone(),
+        rd: v4,
+        rn: arg1,
+        rm: arg2,
+    };
+    let v8 = C::writable_reg_to_reg(ctx, v4);
+    let v9 = ConsumesFlags::ConsumesFlagsReturnsResultWithProducer {
+        inst: v7,
+        result: v8,
+    };
+    // Rule at src/isa/aarch64/inst.isle line 2053.
+    return v9;
+}
+
+// Generated as internal constructor for term sub_with_flags_paired.
+pub fn constructor_sub_with_flags_paired<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: Reg,
+) -> ProducesFlags {
+    let v4 = C::temp_writable_reg(ctx, I64);
+    let v6 = &constructor_operand_size(ctx, arg0);
+    let v7 = MInst::AluRRR {
+        alu_op: ALUOp::SubS,
+        size: v6.clone(),
+        rd: v4,
+        rn: arg1,
+        rm: arg2,
+    };
+    let v8 = C::writable_reg_to_reg(ctx, v4);
+    let v9 = ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
+        inst: v7,
+        result: v8,
+    };
+    // Rule at src/isa/aarch64/inst.isle line 2061.
+    return v9;
+}
+
+// Generated as internal constructor for term materialize_bool_result.
+pub fn constructor_materialize_bool_result<C: Context>(ctx: &mut C, arg0: &Cond) -> ConsumesFlags {
+    let v2 = C::temp_writable_reg(ctx, I64);
+    let v3 = MInst::CSet {
+        rd: v2,
+        cond: arg0.clone(),
+    };
+    let v4 = C::writable_reg_to_reg(ctx, v2);
+    let v5 = ConsumesFlags::ConsumesFlagsReturnsReg {
+        inst: v3,
+        result: v4,
+    };
+    // Rule at src/isa/aarch64/inst.isle line 2070.
+    return v5;
+}
+
+// Generated as internal constructor for term cmn_imm.
+pub fn constructor_cmn_imm<C: Context>(
+    ctx: &mut C,
+    arg0: &OperandSize,
+    arg1: Reg,
+    arg2: Imm12,
+) -> ProducesFlags {
+    let v4 = C::writable_zero_reg(ctx);
+    let v5 = MInst::AluRRImm12 {
+        alu_op: ALUOp::AddS,
+        size: arg0.clone(),
+        rd: v4,
+        rn: arg1,
+        imm12: arg2,
+    };
+    let v6 = ProducesFlags::ProducesFlagsSideEffect { inst: v5 };
+    // Rule at src/isa/aarch64/inst.isle line 2077.
+    return v6;
+}
+
+// Generated as internal constructor for term cmp.
+pub fn constructor_cmp<C: Context>(
+    ctx: &mut C,
+    arg0: &OperandSize,
+    arg1: Reg,
+    arg2: Reg,
+) -> ProducesFlags {
+    let v4 = C::writable_zero_reg(ctx);
+    let v5 = MInst::AluRRR {
+        alu_op: ALUOp::SubS,
+        size: arg0.clone(),
+        rd: v4,
+        rn: arg1,
+        rm: arg2,
+    };
+    let v6 = ProducesFlags::ProducesFlagsSideEffect { inst: v5 };
+    // Rule at src/isa/aarch64/inst.isle line 2083.
+    return v6;
+}
+
+// Generated as internal constructor for term cmp_imm.
+pub fn constructor_cmp_imm<C: Context>(
+    ctx: &mut C,
+    arg0: &OperandSize,
+    arg1: Reg,
+    arg2: Imm12,
+) -> ProducesFlags {
+    let v4 = C::writable_zero_reg(ctx);
+    let v5 = MInst::AluRRImm12 {
+        alu_op: ALUOp::SubS,
+        size: arg0.clone(),
+        rd: v4,
+        rn: arg1,
+        imm12: arg2,
+    };
+    let v6 = ProducesFlags::ProducesFlagsSideEffect { inst: v5 };
+    // Rule at src/isa/aarch64/inst.isle line 2089.
+    return v6;
+}
+
+// Generated as internal constructor for term cmp64_imm.
+pub fn constructor_cmp64_imm<C: Context>(ctx: &mut C, arg0: Reg, arg1: Imm12) -> ProducesFlags {
+    let v3 = &constructor_cmp_imm(ctx, &OperandSize::Size64, arg0, arg1);
+    // Rule at src/isa/aarch64/inst.isle line 2095.
+    return v3.clone();
+}
+
+// Generated as internal constructor for term cmp_extend.
+pub fn constructor_cmp_extend<C: Context>(
+    ctx: &mut C,
+    arg0: &OperandSize,
+    arg1: Reg,
+    arg2: Reg,
+    arg3: &ExtendOp,
+) -> ProducesFlags {
+    let v5 = C::writable_zero_reg(ctx);
+    let v6 = MInst::AluRRRExtend {
+        alu_op: ALUOp::SubS,
+        size: arg0.clone(),
+        rd: v5,
+        rn: arg1,
+        rm: arg2,
+        extendop: arg3.clone(),
+    };
+    let v7 = ProducesFlags::ProducesFlagsSideEffect { inst: v6 };
+    // Rule at src/isa/aarch64/inst.isle line 2099.
+    return v7;
+}
+
+// Generated as internal constructor for term sbc_paired.
+pub fn constructor_sbc_paired<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: Reg,
+) -> ConsumesFlags {
+    let v4 = C::temp_writable_reg(ctx, I64);
+    let v6 = &constructor_operand_size(ctx, arg0);
+    let v7 = MInst::AluRRR {
+        alu_op: ALUOp::Sbc,
+        size: v6.clone(),
+        rd: v4,
+        rn: arg1,
+        rm: arg2,
+    };
+    let v8 = C::writable_reg_to_reg(ctx, v4);
+    let v9 = ConsumesFlags::ConsumesFlagsReturnsResultWithProducer {
+        inst: v7,
+        result: v8,
+    };
+    // Rule at src/isa/aarch64/inst.isle line 2106.
+    return v9;
+}
+
+// Generated as internal constructor for term vec_misc.
+pub fn constructor_vec_misc<C: Context>(
+    ctx: &mut C,
+    arg0: &VecMisc2,
+    arg1: Reg,
+    arg2: &VectorSize,
+) -> Reg {
+    let v4 = C::temp_writable_reg(ctx, I8X16);
+    let v5 = MInst::VecMisc {
+        op: arg0.clone(),
+        rd: v4,
+        rn: arg1,
+        size: arg2.clone(),
+    };
+    let v6 = C::emit(ctx, &v5);
+    let v7 = C::writable_reg_to_reg(ctx, v4);
+    // Rule at src/isa/aarch64/inst.isle line 2114.
+    return v7;
+}
+
+// Generated as internal constructor for term vec_tbl.
+pub fn constructor_vec_tbl<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg) -> Reg {
+    let v3 = C::temp_writable_reg(ctx, I8X16);
+    let v4 = MInst::VecTbl {
+        rd: v3,
+        rn: arg0,
+        rm: arg1,
+    };
+    let v5 = C::emit(ctx, &v4);
+    let v6 = C::writable_reg_to_reg(ctx, v3);
+    // Rule at src/isa/aarch64/inst.isle line 2121.
+    return v6;
+}
+
+// Generated as internal constructor for term vec_tbl_ext.
+pub fn constructor_vec_tbl_ext<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg, arg2: Reg) -> Reg {
+    let v4 = C::temp_writable_reg(ctx, I8X16);
+    let v5 = MInst::VecTblExt {
+        rd: v4,
+        ri: arg0,
+        rn: arg1,
+        rm: arg2,
+    };
+    let v6 = C::emit(ctx, &v5);
+    let v7 = C::writable_reg_to_reg(ctx, v4);
+    // Rule at src/isa/aarch64/inst.isle line 2127.
+    return v7;
+}
+
+// Generated as internal constructor for term vec_tbl2.
+pub fn constructor_vec_tbl2<C: Context>(
+    ctx: &mut C,
+    arg0: Reg,
+    arg1: Reg,
+    arg2: Reg,
+    arg3: Type,
+) -> Reg {
+    let v5 = C::temp_writable_reg(ctx, I8X16);
+    let v6 = MInst::VecTbl2 {
+        rd: v5,
+        rn: arg0,
+        rn2: arg1,
+        rm: arg2,
+    };
+    let v7 = C::emit(ctx, &v6);
+    let v8 = C::writable_reg_to_reg(ctx, v5);
+    // Rule at src/isa/aarch64/inst.isle line 2134.
+    return v8;
+}
+
+// Generated as internal constructor for term vec_tbl2_ext.
+pub fn constructor_vec_tbl2_ext<C: Context>(
+    ctx: &mut C,
+    arg0: Reg,
+    arg1: Reg,
+    arg2: Reg,
+    arg3: Reg,
+    arg4: Type,
+) -> Reg {
+    let v6 = C::temp_writable_reg(ctx, I8X16);
+    let v7 = MInst::VecTbl2Ext {
+        rd: v6,
+        ri: arg0,
+        rn: arg1,
+        rn2: arg2,
+        rm: arg3,
+    };
+    let v8 = C::emit(ctx, &v7);
+    let v9 = C::writable_reg_to_reg(ctx, v6);
+    // Rule at src/isa/aarch64/inst.isle line 2143.
+    return v9;
+}
+
+// Generated as internal constructor for term vec_rrr_long.
+pub fn constructor_vec_rrr_long<C: Context>(
+    ctx: &mut C,
+    arg0: &VecRRRLongOp,
+    arg1: Reg,
+    arg2: Reg,
+    arg3: bool,
+) -> Reg {
+    let v5 = C::temp_writable_reg(ctx, I8X16);
+    let v6 = MInst::VecRRRLong {
+        alu_op: arg0.clone(),
+        rd: v5,
+        rn: arg1,
+        rm: arg2,
+        high_half: arg3,
+    };
+    let v7 = C::emit(ctx, &v6);
+    let v8 = C::writable_reg_to_reg(ctx, v5);
+    // Rule at src/isa/aarch64/inst.isle line 2152.
+    return v8;
+}
+
+// Generated as internal constructor for term vec_rr_pair_long.
+pub fn constructor_vec_rr_pair_long<C: Context>(
+    ctx: &mut C,
+    arg0: &VecRRPairLongOp,
+    arg1: Reg,
+) -> Reg {
+    let v3 = C::temp_writable_reg(ctx, I8X16);
+    let v4 = MInst::VecRRPairLong {
+        op: arg0.clone(),
+        rd: v3,
+        rn: arg1,
+    };
+    let v5 = C::emit(ctx, &v4);
+    let v6 = C::writable_reg_to_reg(ctx, v3);
+    // Rule at src/isa/aarch64/inst.isle line 2159.
+    return v6;
+}
+
+// Generated as internal constructor for term vec_rrrr_long.
+pub fn constructor_vec_rrrr_long<C: Context>(
+    ctx: &mut C,
+    arg0: &VecRRRLongModOp,
+    arg1: Reg,
+    arg2: Reg,
+    arg3: Reg,
+    arg4: bool,
+) -> Reg {
+    let v6 = C::temp_writable_reg(ctx, I8X16);
+    let v7 = MInst::VecRRRLongMod {
+        alu_op: arg0.clone(),
+        rd: v6,
+        ri: arg1,
+        rn: arg2,
+        rm: arg3,
+        high_half: arg4,
+    };
+    let v8 = C::emit(ctx, &v7);
+    let v9 = C::writable_reg_to_reg(ctx, v6);
+    // Rule at src/isa/aarch64/inst.isle line 2166.
+    return v9;
+}
+
+// Generated as internal constructor for term vec_rr_narrow_low.
+pub fn constructor_vec_rr_narrow_low<C: Context>(
+    ctx: &mut C,
+    arg0: &VecRRNarrowOp,
+    arg1: Reg,
+    arg2: &ScalarSize,
+) -> Reg {
+    let v4 = C::temp_writable_reg(ctx, I8X16);
+    let v5 = MInst::VecRRNarrowLow {
+        op: arg0.clone(),
+        rd: v4,
+        rn: arg1,
+        lane_size: arg2.clone(),
+    };
+    let v6 = C::emit(ctx, &v5);
+    let v7 = C::writable_reg_to_reg(ctx, v4);
+    // Rule at src/isa/aarch64/inst.isle line 2173.
+    return v7;
+}
+
+// Generated as internal constructor for term vec_rr_narrow_high.
+pub fn constructor_vec_rr_narrow_high<C: Context>(
+    ctx: &mut C,
+    arg0: &VecRRNarrowOp,
+    arg1: Reg,
+    arg2: Reg,
+    arg3: &ScalarSize,
+) -> Reg {
+    let v5 = C::temp_writable_reg(ctx, I8X16);
+    let v6 = MInst::VecRRNarrowHigh {
+        op: arg0.clone(),
+        rd: v5,
+        ri: arg1,
+        rn: arg2,
+        lane_size: arg3.clone(),
+    };
+    let v7 = C::emit(ctx, &v6);
+    let v8 = C::writable_reg_to_reg(ctx, v5);
+    // Rule at src/isa/aarch64/inst.isle line 2181.
+    return v8;
+}
+
+// Generated as internal constructor for term vec_rr_long.
+pub fn constructor_vec_rr_long<C: Context>(
+    ctx: &mut C,
+    arg0: &VecRRLongOp,
+    arg1: Reg,
+    arg2: bool,
+) -> Reg {
+    let v4 = C::temp_writable_reg(ctx, I8X16);
+    let v5 = MInst::VecRRLong {
+        op: arg0.clone(),
+        rd: v4,
+        rn: arg1,
+        high_half: arg2,
+    };
+    let v6 = C::emit(ctx, &v5);
+    let v7 = C::writable_reg_to_reg(ctx, v4);
+    // Rule at src/isa/aarch64/inst.isle line 2188.
+    return v7;
+}
+
+// Generated as internal constructor for term fpu_csel.
+pub fn constructor_fpu_csel<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &Cond,
+    arg2: Reg,
+    arg3: Reg,
+) -> ConsumesFlags {
+    match arg0 {
+        F32 => {
+            let v5 = C::temp_writable_reg(ctx, F32);
+            let v6 = MInst::FpuCSel32 {
+                rd: v5,
+                rn: arg2,
+                rm: arg3,
+                cond: arg1.clone(),
+            };
+            let v7 = C::writable_reg_to_reg(ctx, v5);
+            let v8 = ConsumesFlags::ConsumesFlagsReturnsReg {
+                inst: v6,
+                result: v7,
+            };
+            // Rule at src/isa/aarch64/inst.isle line 2196.
+            return v8;
+        }
+        F64 => {
+            let v10 = C::temp_writable_reg(ctx, F64);
+            let v11 = MInst::FpuCSel64 {
+                rd: v10,
+                rn: arg2,
+                rm: arg3,
+                cond: arg1.clone(),
+            };
+            let v12 = C::writable_reg_to_reg(ctx, v10);
+            let v13 = ConsumesFlags::ConsumesFlagsReturnsReg {
+                inst: v11,
+                result: v12,
+            };
+            // Rule at src/isa/aarch64/inst.isle line 2202.
+            return v13;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "fpu_csel", "src/isa/aarch64/inst.isle line 2195"
+    )
+}
+
+// Generated as internal constructor for term vec_csel.
+pub fn constructor_vec_csel<C: Context>(
+    ctx: &mut C,
+    arg0: &Cond,
+    arg1: Reg,
+    arg2: Reg,
+) -> ConsumesFlags {
+    let v4 = C::temp_writable_reg(ctx, I8X16);
+    let v5 = MInst::VecCSel {
+        rd: v4,
+        rn: arg1,
+        rm: arg2,
+        cond: arg0.clone(),
+    };
+    let v6 = C::writable_reg_to_reg(ctx, v4);
+    let v7 = ConsumesFlags::ConsumesFlagsReturnsReg {
+        inst: v5,
+        result: v6,
+    };
+    // Rule at src/isa/aarch64/inst.isle line 2210.
+    return v7;
+}
+
+// Generated as internal constructor for term fpu_round.
+pub fn constructor_fpu_round<C: Context>(ctx: &mut C, arg0: &FpuRoundMode, arg1: Reg) -> Reg {
+    let v3 = C::temp_writable_reg(ctx, F64);
+    let v4 = MInst::FpuRound {
+        op: arg0.clone(),
+        rd: v3,
+        rn: arg1,
+    };
+    let v5 = C::emit(ctx, &v4);
+    let v6 = C::writable_reg_to_reg(ctx, v3);
+    // Rule at src/isa/aarch64/inst.isle line 2218.
+    return v6;
+}
+
+// Generated as internal constructor for term fpu_move.
+pub fn constructor_fpu_move<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
+    let v7 = C::fits_in_64(ctx, arg0);
+    if let Some(v8) = v7 {
+        let v10 = C::temp_writable_reg(ctx, F64);
+        let v11 = MInst::FpuMove64 { rd: v10, rn: arg1 };
+        let v12 = C::emit(ctx, &v11);
+        let v13 = C::writable_reg_to_reg(ctx, v10);
+        // Rule at src/isa/aarch64/inst.isle line 2229.
+        return v13;
+    }
+    let v3 = C::temp_writable_reg(ctx, I8X16);
+    let v4 = MInst::FpuMove128 { rd: v3, rn: arg1 };
+    let v5 = C::emit(ctx, &v4);
+    let v6 = C::writable_reg_to_reg(ctx, v3);
+    // Rule at src/isa/aarch64/inst.isle line 2225.
+    return v6;
+}
+
+// Generated as internal constructor for term mov_to_fpu.
+pub fn constructor_mov_to_fpu<C: Context>(ctx: &mut C, arg0: Reg, arg1: &ScalarSize) -> Reg {
+    let v3 = C::temp_writable_reg(ctx, I8X16);
+    let v4 = MInst::MovToFpu {
+        rd: v3,
+        rn: arg0,
+        size: arg1.clone(),
+    };
+    let v5 = C::emit(ctx, &v4);
+    let v6 = C::writable_reg_to_reg(ctx, v3);
+    // Rule at src/isa/aarch64/inst.isle line 2236.
+    return v6;
+}
+
+// Generated as internal constructor for term fpu_move_fp_imm.
+pub fn constructor_fpu_move_fp_imm<C: Context>(
+    ctx: &mut C,
+    arg0: ASIMDFPModImm,
+    arg1: &ScalarSize,
+) -> Reg {
+    let v3 = C::temp_writable_reg(ctx, I8X16);
+    let v4 = MInst::FpuMoveFPImm {
+        rd: v3,
+        imm: arg0,
+        size: arg1.clone(),
+    };
+    let v5 = C::emit(ctx, &v4);
+    let v6 = C::writable_reg_to_reg(ctx, v3);
+    // Rule at src/isa/aarch64/inst.isle line 2243.
+    return v6;
+}
+
+// Generated as internal constructor for term mov_to_vec.
+pub fn constructor_mov_to_vec<C: Context>(
+    ctx: &mut C,
+    arg0: Reg,
+    arg1: Reg,
+    arg2: u8,
+    arg3: &VectorSize,
+) -> Reg {
+    let v5 = C::temp_writable_reg(ctx, I8X16);
+    let v6 = MInst::MovToVec {
+        rd: v5,
+        ri: arg0,
+        rn: arg1,
+        idx: arg2,
+        size: arg3.clone(),
+    };
+    let v7 = C::emit(ctx, &v6);
+    let v8 = C::writable_reg_to_reg(ctx, v5);
+    // Rule at src/isa/aarch64/inst.isle line 2250.
+    return v8;
+}
+
+// Generated as internal constructor for term mov_vec_elem.
+pub fn constructor_mov_vec_elem<C: Context>(
+    ctx: &mut C,
+    arg0: Reg,
+    arg1: Reg,
+    arg2: u8,
+    arg3: u8,
+    arg4: &VectorSize,
+) -> Reg {
+    let v6 = C::temp_writable_reg(ctx, I8X16);
+    let v7 = MInst::VecMovElement {
+        rd: v6,
+        ri: arg0,
+        rn: arg1,
+        dest_idx: arg2,
+        src_idx: arg3,
+        size: arg4.clone(),
+    };
+    let v8 = C::emit(ctx, &v7);
+    let v9 = C::writable_reg_to_reg(ctx, v6);
+    // Rule at src/isa/aarch64/inst.isle line 2257.
+    return v9;
+}
+
+// Generated as internal constructor for term mov_from_vec.
+pub fn constructor_mov_from_vec<C: Context>(
+    ctx: &mut C,
+    arg0: Reg,
+    arg1: u8,
+    arg2: &ScalarSize,
+) -> Reg {
+    let v4 = C::temp_writable_reg(ctx, I64);
+    let v5 = MInst::MovFromVec {
+        rd: v4,
+        rn: arg0,
+        idx: arg1,
+        size: arg2.clone(),
+    };
+    let v6 = C::emit(ctx, &v5);
+    let v7 = C::writable_reg_to_reg(ctx, v4);
+    // Rule at src/isa/aarch64/inst.isle line 2264.
+    return v7;
+}
+
+// Generated as internal constructor for term mov_from_vec_signed.
+pub fn constructor_mov_from_vec_signed<C: Context>(
+    ctx: &mut C,
+    arg0: Reg,
+    arg1: u8,
+    arg2: &VectorSize,
+    arg3: &OperandSize,
+) -> Reg {
+    let v5 = C::temp_writable_reg(ctx, I64);
+    let v6 = MInst::MovFromVecSigned {
+        rd: v5,
+        rn: arg0,
+        idx: arg1,
+        size: arg2.clone(),
+        scalar_size: arg3.clone(),
+    };
+    let v7 = C::emit(ctx, &v6);
+    let v8 = C::writable_reg_to_reg(ctx, v5);
+    // Rule at src/isa/aarch64/inst.isle line 2271.
+    return v8;
+}
+
+// Generated as internal constructor for term fpu_move_from_vec.
+pub fn constructor_fpu_move_from_vec<C: Context>(
+    ctx: &mut C,
+    arg0: Reg,
+    arg1: u8,
+    arg2: &VectorSize,
+) -> Reg {
+    let v4 = C::temp_writable_reg(ctx, I8X16);
+    let v5 = MInst::FpuMoveFromVec {
+        rd: v4,
+        rn: arg0,
+        idx: arg1,
+        size: arg2.clone(),
+    };
+    let v6 = C::emit(ctx, &v5);
+    let v7 = C::writable_reg_to_reg(ctx, v4);
+    // Rule at src/isa/aarch64/inst.isle line 2277.
+    return v7;
+}
+
+// Generated as internal constructor for term extend.
+pub fn constructor_extend<C: Context>(
+    ctx: &mut C,
+    arg0: Reg,
+    arg1: bool,
+    arg2: u8,
+    arg3: u8,
+) -> Reg {
+    let v5 = C::temp_writable_reg(ctx, I64);
+    let v6 = MInst::Extend {
+        rd: v5,
+        rn: arg0,
+        signed: arg1,
+        from_bits: arg2,
+        to_bits: arg3,
+    };
+    let v7 = C::emit(ctx, &v6);
+    let v8 = C::writable_reg_to_reg(ctx, v5);
+    // Rule at src/isa/aarch64/inst.isle line 2284.
+    return v8;
+}
+
+// Generated as internal constructor for term fpu_extend.
+pub fn constructor_fpu_extend<C: Context>(ctx: &mut C, arg0: Reg, arg1: &ScalarSize) -> Reg {
+    let v3 = C::temp_writable_reg(ctx, F32X4);
+    let v4 = MInst::FpuExtend {
+        rd: v3,
+        rn: arg0,
+        size: arg1.clone(),
+    };
+    let v5 = C::emit(ctx, &v4);
+    let v6 = C::writable_reg_to_reg(ctx, v3);
+    // Rule at src/isa/aarch64/inst.isle line 2291.
+    return v6;
+}
+
+// Generated as internal constructor for term vec_extend.
+pub fn constructor_vec_extend<C: Context>(
+    ctx: &mut C,
+    arg0: &VecExtendOp,
+    arg1: Reg,
+    arg2: bool,
+    arg3: &ScalarSize,
+) -> Reg {
+    let v5 = C::temp_writable_reg(ctx, I8X16);
+    let v6 = MInst::VecExtend {
+        t: arg0.clone(),
+        rd: v5,
+        rn: arg1,
+        high_half: arg2,
+        lane_size: arg3.clone(),
+    };
+    let v7 = C::emit(ctx, &v6);
+    let v8 = C::writable_reg_to_reg(ctx, v5);
+    // Rule at src/isa/aarch64/inst.isle line 2298.
+    return v8;
+}
+
+// Generated as internal constructor for term vec_extract.
+pub fn constructor_vec_extract<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg, arg2: u8) -> Reg {
+    let v4 = C::temp_writable_reg(ctx, I8X16);
+    let v5 = MInst::VecExtract {
+        rd: v4,
+        rn: arg0,
+        rm: arg1,
+        imm4: arg2,
+    };
+    let v6 = C::emit(ctx, &v5);
+    let v7 = C::writable_reg_to_reg(ctx, v4);
+    // Rule at src/isa/aarch64/inst.isle line 2305.
+    return v7;
+}
+
+// Generated as internal constructor for term load_acquire.
+pub fn constructor_load_acquire<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: MemFlags,
+    arg2: Reg,
+) -> Reg {
+    let v4 = C::temp_writable_reg(ctx, I64);
+    let v5 = MInst::LoadAcquire {
+        access_ty: arg0,
+        rt: v4,
+        rn: arg2,
+        flags: arg1,
+    };
+    let v6 = C::emit(ctx, &v5);
+    let v7 = C::writable_reg_to_reg(ctx, v4);
+    // Rule at src/isa/aarch64/inst.isle line 2312.
+    return v7;
+}
+
+// Generated as internal constructor for term store_release.
+pub fn constructor_store_release<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: MemFlags,
+    arg2: Reg,
+    arg3: Reg,
+) -> SideEffectNoResult {
+    let v4 = MInst::StoreRelease {
+        access_ty: arg0,
+        rt: arg2,
+        rn: arg3,
+        flags: arg1,
+    };
+    let v5 = SideEffectNoResult::Inst { inst: v4 };
+    // Rule at src/isa/aarch64/inst.isle line 2319.
+    return v5;
+}
+
+// Generated as internal constructor for term tst_imm.
+pub fn constructor_tst_imm<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: ImmLogic,
+) -> ProducesFlags {
+    let v4 = &constructor_operand_size(ctx, arg0);
+    let v5 = C::writable_zero_reg(ctx);
+    let v6 = MInst::AluRRImmLogic {
+        alu_op: ALUOp::AndS,
+        size: v4.clone(),
+        rd: v5,
+        rn: arg1,
+        imml: arg2,
+    };
+    let v7 = ProducesFlags::ProducesFlagsSideEffect { inst: v6 };
+    // Rule at src/isa/aarch64/inst.isle line 2327.
+    return v7;
+}
+
+// Generated as internal constructor for term csel.
+pub fn constructor_csel<C: Context>(
+    ctx: &mut C,
+    arg0: &Cond,
+    arg1: Reg,
+    arg2: Reg,
+) -> ConsumesFlags {
+    let v4 = C::temp_writable_reg(ctx, I64);
+    let v5 = MInst::CSel {
+        rd: v4,
+        cond: arg0.clone(),
+        rn: arg1,
+        rm: arg2,
+    };
+    let v6 = C::writable_reg_to_reg(ctx, v4);
+    let v7 = ConsumesFlags::ConsumesFlagsReturnsReg {
+        inst: v5,
+        result: v6,
+    };
+    // Rule at src/isa/aarch64/inst.isle line 2341.
+    return v7;
+}
+
+// Generated as internal constructor for term cset.
+pub fn constructor_cset<C: Context>(ctx: &mut C, arg0: &Cond) -> ConsumesFlags {
+    let v2 = C::temp_writable_reg(ctx, I64);
+    let v3 = MInst::CSet {
+        rd: v2,
+        cond: arg0.clone(),
+    };
+    let v4 = C::writable_reg_to_reg(ctx, v2);
+    let v5 = ConsumesFlags::ConsumesFlagsReturnsReg {
+        inst: v3,
+        result: v4,
+    };
+    // Rule at src/isa/aarch64/inst.isle line 2349.
+    return v5;
+}
+
+// Generated as internal constructor for term cset_paired.
+pub fn constructor_cset_paired<C: Context>(ctx: &mut C, arg0: &Cond) -> ConsumesFlags {
+    let v2 = C::temp_writable_reg(ctx, I64);
+    let v3 = MInst::CSet {
+        rd: v2,
+        cond: arg0.clone(),
+    };
+    let v4 = C::writable_reg_to_reg(ctx, v2);
+    let v5 = ConsumesFlags::ConsumesFlagsReturnsResultWithProducer {
+        inst: v3,
+        result: v4,
+    };
+    // Rule at src/isa/aarch64/inst.isle line 2356.
+    return v5;
+}
+
+// Generated as internal constructor for term csetm.
+pub fn constructor_csetm<C: Context>(ctx: &mut C, arg0: &Cond) -> ConsumesFlags {
+    let v2 = C::temp_writable_reg(ctx, I64);
+    let v3 = MInst::CSetm {
+        rd: v2,
+        cond: arg0.clone(),
+    };
+    let v4 = C::writable_reg_to_reg(ctx, v2);
+    let v5 = ConsumesFlags::ConsumesFlagsReturnsReg {
+        inst: v3,
+        result: v4,
+    };
+    // Rule at src/isa/aarch64/inst.isle line 2362.
+    return v5;
+}
+
+// Generated as internal constructor for term csneg.
+pub fn constructor_csneg<C: Context>(
+    ctx: &mut C,
+    arg0: &Cond,
+    arg1: Reg,
+    arg2: Reg,
+) -> ConsumesFlags {
+    let v4 = C::temp_writable_reg(ctx, I64);
+    let v5 = MInst::CSNeg {
+        rd: v4,
+        cond: arg0.clone(),
+        rn: arg1,
+        rm: arg2,
+    };
+    let v6 = C::writable_reg_to_reg(ctx, v4);
+    let v7 = ConsumesFlags::ConsumesFlagsReturnsReg {
+        inst: v5,
+        result: v6,
+    };
+    // Rule at src/isa/aarch64/inst.isle line 2372.
+    return v7;
+}
+
+// Generated as internal constructor for term ccmp.
+pub fn constructor_ccmp<C: Context>(
+    ctx: &mut C,
+    arg0: &OperandSize,
+    arg1: Reg,
+    arg2: Reg,
+    arg3: NZCV,
+    arg4: &Cond,
+    arg5: &ProducesFlags,
+) -> ProducesFlags {
+    let v6 = MInst::CCmp {
+        size: arg0.clone(),
+        rn: arg1,
+        rm: arg2,
+        nzcv: arg3,
+        cond: arg4.clone(),
+    };
+    let v7 = ProducesFlags::ProducesFlagsSideEffect { inst: v6 };
+    let v8 = &constructor_produces_flags_concat(ctx, arg5, &v7);
+    // Rule at src/isa/aarch64/inst.isle line 2382.
+    return v8.clone();
+}
+
+// Generated as internal constructor for term ccmp_imm.
+pub fn constructor_ccmp_imm<C: Context>(
+    ctx: &mut C,
+    arg0: &OperandSize,
+    arg1: Reg,
+    arg2: UImm5,
+    arg3: NZCV,
+    arg4: &Cond,
+) -> ConsumesFlags {
+    let v6 = C::temp_writable_reg(ctx, I64);
+    let v9 = C::writable_reg_to_reg(ctx, v6);
+    let v10 = C::value_reg(ctx, v9);
+    let v7 = MInst::CCmpImm {
+        size: arg0.clone(),
+        rn: arg1,
+        imm: arg2,
+        nzcv: arg3,
+        cond: arg4.clone(),
+    };
+    let v8 = MInst::CSet {
+        rd: v6,
+        cond: arg4.clone(),
+    };
+    let v11 = ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
+        inst1: v7,
+        inst2: v8,
+        result: v10,
+    };
+    // Rule at src/isa/aarch64/inst.isle line 2387.
+    return v11;
+}
+
+// Generated as internal constructor for term add.
+pub fn constructor_add<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v4 = constructor_alu_rrr(ctx, &ALUOp::Add, arg0, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 2397.
+    return v4;
+}
+
+// Generated as internal constructor for term add_imm.
+pub fn constructor_add_imm<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Imm12) -> Reg {
+    let v4 = constructor_alu_rr_imm12(ctx, &ALUOp::Add, arg0, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 2400.
+    return v4;
+}
+
+// Generated as internal constructor for term add_extend.
+pub fn constructor_add_extend<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: &ExtendedValue,
+) -> Reg {
+    let v4 = constructor_alu_rr_extend_reg(ctx, &ALUOp::Add, arg0, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 2403.
+    return v4;
+}
+
+// Generated as internal constructor for term add_extend_op.
+pub fn constructor_add_extend_op<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: Reg,
+    arg3: &ExtendOp,
+) -> Reg {
+    let v5 = constructor_alu_rrr_extend(ctx, &ALUOp::Add, arg0, arg1, arg2, arg3);
+    // Rule at src/isa/aarch64/inst.isle line 2406.
+    return v5;
+}
+
+// Generated as internal constructor for term add_shift.
+pub fn constructor_add_shift<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: Reg,
+    arg3: ShiftOpAndAmt,
+) -> Reg {
+    let v5 = constructor_alu_rrr_shift(ctx, &ALUOp::Add, arg0, arg1, arg2, arg3);
+    // Rule at src/isa/aarch64/inst.isle line 2409.
+    return v5;
+}
+
+// Generated as internal constructor for term add_vec.
+pub fn constructor_add_vec<C: Context>(
+    ctx: &mut C,
+    arg0: Reg,
+    arg1: Reg,
+    arg2: &VectorSize,
+) -> Reg {
+    let v4 = constructor_vec_rrr(ctx, &VecALUOp::Add, arg0, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 2412.
+    return v4;
+}
+
+// Generated as internal constructor for term sub.
+pub fn constructor_sub<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v4 = constructor_alu_rrr(ctx, &ALUOp::Sub, arg0, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 2417.
+    return v4;
+}
+
+// Generated as internal constructor for term sub_imm.
+pub fn constructor_sub_imm<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Imm12) -> Reg {
+    let v4 = constructor_alu_rr_imm12(ctx, &ALUOp::Sub, arg0, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 2420.
+    return v4;
+}
+
+// Generated as internal constructor for term sub_extend.
+pub fn constructor_sub_extend<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: &ExtendedValue,
+) -> Reg {
+    let v4 = constructor_alu_rr_extend_reg(ctx, &ALUOp::Sub, arg0, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 2423.
+    return v4;
+}
+
+// Generated as internal constructor for term sub_shift.
+pub fn constructor_sub_shift<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: Reg,
+    arg3: ShiftOpAndAmt,
+) -> Reg {
+    let v5 = constructor_alu_rrr_shift(ctx, &ALUOp::Sub, arg0, arg1, arg2, arg3);
+    // Rule at src/isa/aarch64/inst.isle line 2426.
+    return v5;
+}
+
+// Generated as internal constructor for term sub_vec.
+pub fn constructor_sub_vec<C: Context>(
+    ctx: &mut C,
+    arg0: Reg,
+    arg1: Reg,
+    arg2: &VectorSize,
+) -> Reg {
+    let v4 = constructor_vec_rrr(ctx, &VecALUOp::Sub, arg0, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 2429.
+    return v4;
+}
+
+// Generated as internal constructor for term sub_i128.
+pub fn constructor_sub_i128<C: Context>(
+    ctx: &mut C,
+    arg0: ValueRegs,
+    arg1: ValueRegs,
+) -> ValueRegs {
+    let v3 = C::value_regs_get(ctx, arg0, 0x0);
+    let v5 = C::value_regs_get(ctx, arg0, 0x1);
+    let v6 = C::value_regs_get(ctx, arg1, 0x0);
+    let v7 = C::value_regs_get(ctx, arg1, 0x1);
+    let v9 = &constructor_sub_with_flags_paired(ctx, I64, v3, v6);
+    let v10 = &constructor_sbc_paired(ctx, I64, v5, v7);
+    let v11 = constructor_with_flags(ctx, v9, v10);
+    // Rule at src/isa/aarch64/inst.isle line 2432.
+    return v11;
+}
+
+// Generated as internal constructor for term madd.
+pub fn constructor_madd<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: Reg,
+    arg3: Reg,
+) -> Reg {
+    let v5 = constructor_alu_rrrr(ctx, &ALUOp3::MAdd, arg0, arg1, arg2, arg3);
+    // Rule at src/isa/aarch64/inst.isle line 2452.
+    return v5;
+}
+
+// Generated as internal constructor for term msub.
+pub fn constructor_msub<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: Reg,
+    arg3: Reg,
+) -> Reg {
+    let v5 = constructor_alu_rrrr(ctx, &ALUOp3::MSub, arg0, arg1, arg2, arg3);
+    // Rule at src/isa/aarch64/inst.isle line 2457.
+    return v5;
+}
+
+// Generated as internal constructor for term umaddl.
+pub fn constructor_umaddl<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg, arg2: Reg) -> Reg {
+    let v5 = constructor_alu_rrrr(ctx, &ALUOp3::UMAddL, I32, arg0, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 2461.
+    return v5;
+}
+
+// Generated as internal constructor for term smaddl.
+pub fn constructor_smaddl<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg, arg2: Reg) -> Reg {
+    let v5 = constructor_alu_rrrr(ctx, &ALUOp3::SMAddL, I32, arg0, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 2465.
+    return v5;
+}
+
+// Generated as internal constructor for term uqadd.
+pub fn constructor_uqadd<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg, arg2: &VectorSize) -> Reg {
+    let v4 = constructor_vec_rrr(ctx, &VecALUOp::Uqadd, arg0, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 2469.
+    return v4;
+}
+
+// Generated as internal constructor for term sqadd.
+pub fn constructor_sqadd<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg, arg2: &VectorSize) -> Reg {
+    let v4 = constructor_vec_rrr(ctx, &VecALUOp::Sqadd, arg0, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 2473.
+    return v4;
+}
+
+// Generated as internal constructor for term uqsub.
+pub fn constructor_uqsub<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg, arg2: &VectorSize) -> Reg {
+    let v4 = constructor_vec_rrr(ctx, &VecALUOp::Uqsub, arg0, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 2477.
+    return v4;
+}
+
+// Generated as internal constructor for term sqsub.
+pub fn constructor_sqsub<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg, arg2: &VectorSize) -> Reg {
+    let v4 = constructor_vec_rrr(ctx, &VecALUOp::Sqsub, arg0, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 2481.
+    return v4;
+}
+
+// Generated as internal constructor for term umulh.
+pub fn constructor_umulh<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v4 = constructor_alu_rrr(ctx, &ALUOp::UMulH, arg0, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 2485.
+    return v4;
+}
+
+// Generated as internal constructor for term smulh.
+pub fn constructor_smulh<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v4 = constructor_alu_rrr(ctx, &ALUOp::SMulH, arg0, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 2489.
+    return v4;
+}
+
+// Generated as internal constructor for term mul.
+pub fn constructor_mul<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg, arg2: &VectorSize) -> Reg {
+    let v4 = constructor_vec_rrr(ctx, &VecALUOp::Mul, arg0, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 2493.
+    return v4;
+}
+
+// Generated as internal constructor for term neg.
+pub fn constructor_neg<C: Context>(ctx: &mut C, arg0: Reg, arg1: &VectorSize) -> Reg {
+    let v3 = constructor_vec_misc(ctx, &VecMisc2::Neg, arg0, arg1);
+    // Rule at src/isa/aarch64/inst.isle line 2497.
+    return v3;
+}
+
+// Generated as internal constructor for term rev16.
+pub fn constructor_rev16<C: Context>(ctx: &mut C, arg0: Reg, arg1: &VectorSize) -> Reg {
+    let v3 = constructor_vec_misc(ctx, &VecMisc2::Rev16, arg0, arg1);
+    // Rule at src/isa/aarch64/inst.isle line 2501.
+    return v3;
+}
+
+// Generated as internal constructor for term rev32.
+pub fn constructor_rev32<C: Context>(ctx: &mut C, arg0: Reg, arg1: &VectorSize) -> Reg {
+    let v3 = constructor_vec_misc(ctx, &VecMisc2::Rev32, arg0, arg1);
+    // Rule at src/isa/aarch64/inst.isle line 2505.
+    return v3;
+}
+
+// Generated as internal constructor for term rev64.
+pub fn constructor_rev64<C: Context>(ctx: &mut C, arg0: Reg, arg1: &VectorSize) -> Reg {
+    let v3 = constructor_vec_misc(ctx, &VecMisc2::Rev64, arg0, arg1);
+    // Rule at src/isa/aarch64/inst.isle line 2509.
+    return v3;
+}
+
+// Generated as internal constructor for term xtn.
+pub fn constructor_xtn<C: Context>(ctx: &mut C, arg0: Reg, arg1: &ScalarSize) -> Reg {
+    let v3 = constructor_vec_rr_narrow_low(ctx, &VecRRNarrowOp::Xtn, arg0, arg1);
+    // Rule at src/isa/aarch64/inst.isle line 2513.
+    return v3;
+}
+
+// Generated as internal constructor for term fcvtn.
+pub fn constructor_fcvtn<C: Context>(ctx: &mut C, arg0: Reg, arg1: &ScalarSize) -> Reg {
+    let v3 = constructor_vec_rr_narrow_low(ctx, &VecRRNarrowOp::Fcvtn, arg0, arg1);
+    // Rule at src/isa/aarch64/inst.isle line 2517.
+    return v3;
+}
+
+// Generated as internal constructor for term sqxtn.
+pub fn constructor_sqxtn<C: Context>(ctx: &mut C, arg0: Reg, arg1: &ScalarSize) -> Reg {
+    let v3 = constructor_vec_rr_narrow_low(ctx, &VecRRNarrowOp::Sqxtn, arg0, arg1);
+    // Rule at src/isa/aarch64/inst.isle line 2521.
+    return v3;
+}
+
+// Generated as internal constructor for term sqxtn2.
+pub fn constructor_sqxtn2<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg, arg2: &ScalarSize) -> Reg {
+    let v4 = constructor_vec_rr_narrow_high(ctx, &VecRRNarrowOp::Sqxtn, arg0, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 2525.
+    return v4;
+}
+
+// Generated as internal constructor for term sqxtun.
+pub fn constructor_sqxtun<C: Context>(ctx: &mut C, arg0: Reg, arg1: &ScalarSize) -> Reg {
+    let v3 = constructor_vec_rr_narrow_low(ctx, &VecRRNarrowOp::Sqxtun, arg0, arg1);
+    // Rule at src/isa/aarch64/inst.isle line 2529.
+    return v3;
+}
+
+// Generated as internal constructor for term sqxtun2.
+pub fn constructor_sqxtun2<C: Context>(
+    ctx: &mut C,
+    arg0: Reg,
+    arg1: Reg,
+    arg2: &ScalarSize,
+) -> Reg {
+    let v4 = constructor_vec_rr_narrow_high(ctx, &VecRRNarrowOp::Sqxtun, arg0, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 2533.
+    return v4;
+}
+
+// Generated as internal constructor for term uqxtn.
+pub fn constructor_uqxtn<C: Context>(ctx: &mut C, arg0: Reg, arg1: &ScalarSize) -> Reg {
+    let v3 = constructor_vec_rr_narrow_low(ctx, &VecRRNarrowOp::Uqxtn, arg0, arg1);
+    // Rule at src/isa/aarch64/inst.isle line 2537.
+    return v3;
+}
+
+// Generated as internal constructor for term uqxtn2.
+pub fn constructor_uqxtn2<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg, arg2: &ScalarSize) -> Reg {
+    let v4 = constructor_vec_rr_narrow_high(ctx, &VecRRNarrowOp::Uqxtn, arg0, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 2541.
+    return v4;
+}
+
+// Generated as internal constructor for term aarch64_fence.
+pub fn constructor_aarch64_fence<C: Context>(ctx: &mut C) -> SideEffectNoResult {
+    let v1 = SideEffectNoResult::Inst { inst: MInst::Fence };
+    // Rule at src/isa/aarch64/inst.isle line 2545.
+    return v1;
+}
+
+// Generated as internal constructor for term csdb.
+pub fn constructor_csdb<C: Context>(ctx: &mut C) -> SideEffectNoResult {
+    let v1 = SideEffectNoResult::Inst { inst: MInst::Csdb };
+    // Rule at src/isa/aarch64/inst.isle line 2550.
+    return v1;
+}
+
+// Generated as internal constructor for term brk.
+pub fn constructor_brk<C: Context>(ctx: &mut C) -> SideEffectNoResult {
+    let v1 = SideEffectNoResult::Inst { inst: MInst::Brk };
+    // Rule at src/isa/aarch64/inst.isle line 2555.
+    return v1;
+}
+
+// Generated as internal constructor for term addp.
+pub fn constructor_addp<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg, arg2: &VectorSize) -> Reg {
+    let v4 = constructor_vec_rrr(ctx, &VecALUOp::Addp, arg0, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 2560.
+    return v4;
+}
+
+// Generated as internal constructor for term zip1.
+pub fn constructor_zip1<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg, arg2: &VectorSize) -> Reg {
+    let v4 = constructor_vec_rrr(ctx, &VecALUOp::Zip1, arg0, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 2564.
+    return v4;
+}
+
+// Generated as internal constructor for term vec_abs.
+pub fn constructor_vec_abs<C: Context>(ctx: &mut C, arg0: Reg, arg1: &VectorSize) -> Reg {
+    let v3 = constructor_vec_misc(ctx, &VecMisc2::Abs, arg0, arg1);
+    // Rule at src/isa/aarch64/inst.isle line 2568.
+    return v3;
+}
+
+// Generated as internal constructor for term abs.
+pub fn constructor_abs<C: Context>(ctx: &mut C, arg0: &OperandSize, arg1: Reg) -> Reg {
+    let v3 = C::u8_into_imm12(ctx, 0x0);
+    let v4 = &constructor_cmp_imm(ctx, arg0, arg1, v3);
+    let v6 = &constructor_csneg(ctx, &Cond::Gt, arg1, arg1);
+    let v7 = constructor_with_flags(ctx, v4, v6);
+    let v9 = C::value_regs_get(ctx, v7, 0x0);
+    // Rule at src/isa/aarch64/inst.isle line 2573.
+    return v9;
+}
+
+// Generated as internal constructor for term addv.
+pub fn constructor_addv<C: Context>(ctx: &mut C, arg0: Reg, arg1: &VectorSize) -> Reg {
+    let v3 = constructor_vec_lanes(ctx, &VecLanesOp::Addv, arg0, arg1);
+    // Rule at src/isa/aarch64/inst.isle line 2579.
+    return v3;
+}
+
+// Generated as internal constructor for term shll32.
+pub fn constructor_shll32<C: Context>(ctx: &mut C, arg0: Reg, arg1: bool) -> Reg {
+    let v3 = constructor_vec_rr_long(ctx, &VecRRLongOp::Shll32, arg0, arg1);
+    // Rule at src/isa/aarch64/inst.isle line 2583.
+    return v3;
+}
+
+// Generated as internal constructor for term saddlp8.
+pub fn constructor_saddlp8<C: Context>(ctx: &mut C, arg0: Reg) -> Reg {
+    let v2 = constructor_vec_rr_pair_long(ctx, &VecRRPairLongOp::Saddlp8, arg0);
+    // Rule at src/isa/aarch64/inst.isle line 2588.
+    return v2;
+}
+
+// Generated as internal constructor for term saddlp16.
+pub fn constructor_saddlp16<C: Context>(ctx: &mut C, arg0: Reg) -> Reg {
+    let v2 = constructor_vec_rr_pair_long(ctx, &VecRRPairLongOp::Saddlp16, arg0);
+    // Rule at src/isa/aarch64/inst.isle line 2591.
+    return v2;
+}
+
+// Generated as internal constructor for term uaddlp8.
+pub fn constructor_uaddlp8<C: Context>(ctx: &mut C, arg0: Reg) -> Reg {
+    let v2 = constructor_vec_rr_pair_long(ctx, &VecRRPairLongOp::Uaddlp8, arg0);
+    // Rule at src/isa/aarch64/inst.isle line 2594.
+    return v2;
+}
+
+// Generated as internal constructor for term uaddlp16.
+pub fn constructor_uaddlp16<C: Context>(ctx: &mut C, arg0: Reg) -> Reg {
+    let v2 = constructor_vec_rr_pair_long(ctx, &VecRRPairLongOp::Uaddlp16, arg0);
+    // Rule at src/isa/aarch64/inst.isle line 2597.
+    return v2;
+}
+
+// Generated as internal constructor for term umlal32.
+pub fn constructor_umlal32<C: Context>(
+    ctx: &mut C,
+    arg0: Reg,
+    arg1: Reg,
+    arg2: Reg,
+    arg3: bool,
+) -> Reg {
+    let v5 = constructor_vec_rrrr_long(ctx, &VecRRRLongModOp::Umlal32, arg0, arg1, arg2, arg3);
+    // Rule at src/isa/aarch64/inst.isle line 2601.
+    return v5;
+}
+
+// Generated as internal constructor for term smull8.
+pub fn constructor_smull8<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg, arg2: bool) -> Reg {
+    let v4 = constructor_vec_rrr_long(ctx, &VecRRRLongOp::Smull8, arg0, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 2605.
+    return v4;
+}
+
+// Generated as internal constructor for term umull8.
+pub fn constructor_umull8<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg, arg2: bool) -> Reg {
+    let v4 = constructor_vec_rrr_long(ctx, &VecRRRLongOp::Umull8, arg0, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 2609.
+    return v4;
+}
+
+// Generated as internal constructor for term smull16.
+pub fn constructor_smull16<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg, arg2: bool) -> Reg {
+    let v4 = constructor_vec_rrr_long(ctx, &VecRRRLongOp::Smull16, arg0, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 2613.
+    return v4;
+}
+
+// Generated as internal constructor for term umull16.
+pub fn constructor_umull16<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg, arg2: bool) -> Reg {
+    let v4 = constructor_vec_rrr_long(ctx, &VecRRRLongOp::Umull16, arg0, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 2617.
+    return v4;
+}
+
+// Generated as internal constructor for term smull32.
+pub fn constructor_smull32<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg, arg2: bool) -> Reg {
+    let v4 = constructor_vec_rrr_long(ctx, &VecRRRLongOp::Smull32, arg0, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 2621.
+    return v4;
+}
+
+// Generated as internal constructor for term umull32.
+pub fn constructor_umull32<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg, arg2: bool) -> Reg {
+    let v4 = constructor_vec_rrr_long(ctx, &VecRRRLongOp::Umull32, arg0, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 2625.
+    return v4;
+}
+
+// Generated as internal constructor for term asr.
+pub fn constructor_asr<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v4 = constructor_alu_rrr(ctx, &ALUOp::Asr, arg0, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 2629.
+    return v4;
+}
+
+// Generated as internal constructor for term asr_imm.
+pub fn constructor_asr_imm<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: ImmShift) -> Reg {
+    let v4 = constructor_alu_rr_imm_shift(ctx, &ALUOp::Asr, arg0, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 2632.
+    return v4;
+}
+
+// Generated as internal constructor for term lsr.
+pub fn constructor_lsr<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v4 = constructor_alu_rrr(ctx, &ALUOp::Lsr, arg0, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 2636.
+    return v4;
+}
+
+// Generated as internal constructor for term lsr_imm.
+pub fn constructor_lsr_imm<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: ImmShift) -> Reg {
+    let v4 = constructor_alu_rr_imm_shift(ctx, &ALUOp::Lsr, arg0, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 2639.
+    return v4;
+}
+
+// Generated as internal constructor for term lsl.
+pub fn constructor_lsl<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v4 = constructor_alu_rrr(ctx, &ALUOp::Lsl, arg0, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 2643.
+    return v4;
+}
+
+// Generated as internal constructor for term lsl_imm.
+pub fn constructor_lsl_imm<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: ImmShift) -> Reg {
+    let v4 = constructor_alu_rr_imm_shift(ctx, &ALUOp::Lsl, arg0, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 2646.
+    return v4;
+}
+
+// Generated as internal constructor for term a64_udiv.
+pub fn constructor_a64_udiv<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v4 = constructor_alu_rrr(ctx, &ALUOp::UDiv, arg0, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 2650.
+    return v4;
+}
+
+// Generated as internal constructor for term a64_sdiv.
+pub fn constructor_a64_sdiv<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v4 = constructor_alu_rrr(ctx, &ALUOp::SDiv, arg0, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 2654.
+    return v4;
+}
+
+// Generated as internal constructor for term not.
+pub fn constructor_not<C: Context>(ctx: &mut C, arg0: Reg, arg1: &VectorSize) -> Reg {
+    let v3 = constructor_vec_misc(ctx, &VecMisc2::Not, arg0, arg1);
+    // Rule at src/isa/aarch64/inst.isle line 2658.
+    return v3;
+}
+
+// Generated as internal constructor for term orr_not.
+pub fn constructor_orr_not<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v4 = constructor_alu_rrr(ctx, &ALUOp::OrrNot, arg0, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 2663.
+    return v4;
+}
+
+// Generated as internal constructor for term orr_not_shift.
+pub fn constructor_orr_not_shift<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: Reg,
+    arg3: ShiftOpAndAmt,
+) -> Reg {
+    let v5 = constructor_alu_rrr_shift(ctx, &ALUOp::OrrNot, arg0, arg1, arg2, arg3);
+    // Rule at src/isa/aarch64/inst.isle line 2666.
+    return v5;
+}
+
+// Generated as internal constructor for term orr.
+pub fn constructor_orr<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v4 = constructor_alu_rrr(ctx, &ALUOp::Orr, arg0, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 2671.
+    return v4;
+}
+
+// Generated as internal constructor for term orr_imm.
+pub fn constructor_orr_imm<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: ImmLogic) -> Reg {
+    let v4 = constructor_alu_rr_imm_logic(ctx, &ALUOp::Orr, arg0, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 2674.
+    return v4;
+}
+
+// Generated as internal constructor for term orr_shift.
+pub fn constructor_orr_shift<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: Reg,
+    arg3: ShiftOpAndAmt,
+) -> Reg {
+    let v5 = constructor_alu_rrr_shift(ctx, &ALUOp::Orr, arg0, arg1, arg2, arg3);
+    // Rule at src/isa/aarch64/inst.isle line 2677.
+    return v5;
+}
+
+// Generated as internal constructor for term orr_vec.
+pub fn constructor_orr_vec<C: Context>(
+    ctx: &mut C,
+    arg0: Reg,
+    arg1: Reg,
+    arg2: &VectorSize,
+) -> Reg {
+    let v4 = constructor_vec_rrr(ctx, &VecALUOp::Orr, arg0, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 2680.
+    return v4;
+}
+
+// Generated as internal constructor for term and_reg.
+pub fn constructor_and_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v4 = constructor_alu_rrr(ctx, &ALUOp::And, arg0, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 2685.
+    return v4;
+}
+
+// Generated as internal constructor for term and_imm.
+pub fn constructor_and_imm<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: ImmLogic) -> Reg {
+    let v4 = constructor_alu_rr_imm_logic(ctx, &ALUOp::And, arg0, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 2688.
+    return v4;
+}
+
+// Generated as internal constructor for term and_vec.
+pub fn constructor_and_vec<C: Context>(
+    ctx: &mut C,
+    arg0: Reg,
+    arg1: Reg,
+    arg2: &VectorSize,
+) -> Reg {
+    let v4 = constructor_vec_rrr(ctx, &VecALUOp::And, arg0, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 2691.
+    return v4;
+}
+
+// Generated as internal constructor for term eor_vec.
+pub fn constructor_eor_vec<C: Context>(
+    ctx: &mut C,
+    arg0: Reg,
+    arg1: Reg,
+    arg2: &VectorSize,
+) -> Reg {
+    let v4 = constructor_vec_rrr(ctx, &VecALUOp::Eor, arg0, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 2695.
+    return v4;
+}
+
+// Generated as internal constructor for term bic.
+pub fn constructor_bic<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v4 = constructor_alu_rrr(ctx, &ALUOp::AndNot, arg0, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 2700.
+    return v4;
+}
+
+// Generated as internal constructor for term bic_vec.
+pub fn constructor_bic_vec<C: Context>(
+    ctx: &mut C,
+    arg0: Reg,
+    arg1: Reg,
+    arg2: &VectorSize,
+) -> Reg {
+    let v4 = constructor_vec_rrr(ctx, &VecALUOp::Bic, arg0, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 2703.
+    return v4;
+}
+
+// Generated as internal constructor for term sshl.
+pub fn constructor_sshl<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg, arg2: &VectorSize) -> Reg {
+    let v4 = constructor_vec_rrr(ctx, &VecALUOp::Sshl, arg0, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 2707.
+    return v4;
+}
+
+// Generated as internal constructor for term ushl.
+pub fn constructor_ushl<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg, arg2: &VectorSize) -> Reg {
+    let v4 = constructor_vec_rrr(ctx, &VecALUOp::Ushl, arg0, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 2711.
+    return v4;
+}
+
+// Generated as internal constructor for term ushl_vec_imm.
+pub fn constructor_ushl_vec_imm<C: Context>(
+    ctx: &mut C,
+    arg0: Reg,
+    arg1: u8,
+    arg2: &VectorSize,
+) -> Reg {
+    let v4 = constructor_vec_shift_imm(ctx, &VecShiftImmOp::Shl, arg1, arg0, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 2715.
+    return v4;
+}
+
+// Generated as internal constructor for term ushr_vec_imm.
+pub fn constructor_ushr_vec_imm<C: Context>(
+    ctx: &mut C,
+    arg0: Reg,
+    arg1: u8,
+    arg2: &VectorSize,
+) -> Reg {
+    let v4 = constructor_vec_shift_imm(ctx, &VecShiftImmOp::Ushr, arg1, arg0, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 2719.
+    return v4;
+}
+
+// Generated as internal constructor for term sshr_vec_imm.
+pub fn constructor_sshr_vec_imm<C: Context>(
+    ctx: &mut C,
+    arg0: Reg,
+    arg1: u8,
+    arg2: &VectorSize,
+) -> Reg {
+    let v4 = constructor_vec_shift_imm(ctx, &VecShiftImmOp::Sshr, arg1, arg0, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 2723.
+    return v4;
+}
+
+// Generated as internal constructor for term a64_rotr.
+pub fn constructor_a64_rotr<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v4 = constructor_alu_rrr(ctx, &ALUOp::RotR, arg0, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 2728.
+    return v4;
+}
+
+// Generated as internal constructor for term a64_rotr_imm.
+pub fn constructor_a64_rotr_imm<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: ImmShift,
+) -> Reg {
+    let v4 = constructor_alu_rr_imm_shift(ctx, &ALUOp::RotR, arg0, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 2731.
+    return v4;
+}
+
+// Generated as internal constructor for term rbit.
+pub fn constructor_rbit<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
+    let v3 = constructor_bit_rr(ctx, &BitOp::RBit, arg0, arg1);
+    // Rule at src/isa/aarch64/inst.isle line 2736.
+    return v3;
+}
+
+// Generated as internal constructor for term a64_clz.
+pub fn constructor_a64_clz<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
+    let v3 = constructor_bit_rr(ctx, &BitOp::Clz, arg0, arg1);
+    // Rule at src/isa/aarch64/inst.isle line 2741.
+    return v3;
+}
+
+// Generated as internal constructor for term a64_cls.
+pub fn constructor_a64_cls<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
+    let v3 = constructor_bit_rr(ctx, &BitOp::Cls, arg0, arg1);
+    // Rule at src/isa/aarch64/inst.isle line 2746.
+    return v3;
+}
+
+// Generated as internal constructor for term a64_rev16.
+pub fn constructor_a64_rev16<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
+    let v3 = constructor_bit_rr(ctx, &BitOp::Rev16, arg0, arg1);
+    // Rule at src/isa/aarch64/inst.isle line 2751.
+    return v3;
+}
+
+// Generated as internal constructor for term a64_rev32.
+pub fn constructor_a64_rev32<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
+    let v3 = constructor_bit_rr(ctx, &BitOp::Rev32, arg0, arg1);
+    // Rule at src/isa/aarch64/inst.isle line 2754.
+    return v3;
+}
+
+// Generated as internal constructor for term a64_rev64.
+pub fn constructor_a64_rev64<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
+    let v3 = constructor_bit_rr(ctx, &BitOp::Rev64, arg0, arg1);
+    // Rule at src/isa/aarch64/inst.isle line 2757.
+    return v3;
+}
+
+// Generated as internal constructor for term eon.
+pub fn constructor_eon<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v4 = constructor_alu_rrr(ctx, &ALUOp::EorNot, arg0, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 2762.
+    return v4;
+}
+
+// Generated as internal constructor for term vec_cnt.
+pub fn constructor_vec_cnt<C: Context>(ctx: &mut C, arg0: Reg, arg1: &VectorSize) -> Reg {
+    let v3 = constructor_vec_misc(ctx, &VecMisc2::Cnt, arg0, arg1);
+    // Rule at src/isa/aarch64/inst.isle line 2767.
+    return v3;
+}
+
+// Generated as internal constructor for term bsl.
+pub fn constructor_bsl<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: Reg,
+    arg3: Reg,
+) -> Reg {
+    let v5 = &constructor_vector_size(ctx, arg0);
+    let v6 = constructor_vec_rrr_mod(ctx, &VecALUModOp::Bsl, arg1, arg2, arg3, v5);
+    // Rule at src/isa/aarch64/inst.isle line 2772.
+    return v6;
+}
+
+// Generated as internal constructor for term udf.
+pub fn constructor_udf<C: Context>(ctx: &mut C, arg0: &TrapCode) -> SideEffectNoResult {
+    let v1 = MInst::Udf {
+        trap_code: arg0.clone(),
+    };
+    let v2 = SideEffectNoResult::Inst { inst: v1 };
+    // Rule at src/isa/aarch64/inst.isle line 2778.
+    return v2;
+}
+
+// Generated as internal constructor for term aarch64_uload8.
+pub fn constructor_aarch64_uload8<C: Context>(ctx: &mut C, arg0: &AMode, arg1: MemFlags) -> Reg {
+    let v3 = C::temp_writable_reg(ctx, I64);
+    let v4 = MInst::ULoad8 {
+        rd: v3,
+        mem: arg0.clone(),
+        flags: arg1,
+    };
+    let v5 = C::emit(ctx, &v4);
+    let v6 = C::writable_reg_to_reg(ctx, v3);
+    // Rule at src/isa/aarch64/inst.isle line 2784.
+    return v6;
+}
+
+// Generated as internal constructor for term aarch64_sload8.
+pub fn constructor_aarch64_sload8<C: Context>(ctx: &mut C, arg0: &AMode, arg1: MemFlags) -> Reg {
+    let v3 = C::temp_writable_reg(ctx, I64);
+    let v4 = MInst::SLoad8 {
+        rd: v3,
+        mem: arg0.clone(),
+        flags: arg1,
+    };
+    let v5 = C::emit(ctx, &v4);
+    let v6 = C::writable_reg_to_reg(ctx, v3);
+    // Rule at src/isa/aarch64/inst.isle line 2789.
+    return v6;
+}
+
+// Generated as internal constructor for term aarch64_uload16.
+pub fn constructor_aarch64_uload16<C: Context>(ctx: &mut C, arg0: &AMode, arg1: MemFlags) -> Reg {
+    let v3 = C::temp_writable_reg(ctx, I64);
+    let v4 = MInst::ULoad16 {
+        rd: v3,
+        mem: arg0.clone(),
+        flags: arg1,
+    };
+    let v5 = C::emit(ctx, &v4);
+    let v6 = C::writable_reg_to_reg(ctx, v3);
+    // Rule at src/isa/aarch64/inst.isle line 2794.
+    return v6;
+}
+
+// Generated as internal constructor for term aarch64_sload16.
+pub fn constructor_aarch64_sload16<C: Context>(ctx: &mut C, arg0: &AMode, arg1: MemFlags) -> Reg {
+    let v3 = C::temp_writable_reg(ctx, I64);
+    let v4 = MInst::SLoad16 {
+        rd: v3,
+        mem: arg0.clone(),
+        flags: arg1,
+    };
+    let v5 = C::emit(ctx, &v4);
+    let v6 = C::writable_reg_to_reg(ctx, v3);
+    // Rule at src/isa/aarch64/inst.isle line 2799.
+    return v6;
+}
+
+// Generated as internal constructor for term aarch64_uload32.
+pub fn constructor_aarch64_uload32<C: Context>(ctx: &mut C, arg0: &AMode, arg1: MemFlags) -> Reg {
+    let v3 = C::temp_writable_reg(ctx, I64);
+    let v4 = MInst::ULoad32 {
+        rd: v3,
+        mem: arg0.clone(),
+        flags: arg1,
+    };
+    let v5 = C::emit(ctx, &v4);
+    let v6 = C::writable_reg_to_reg(ctx, v3);
+    // Rule at src/isa/aarch64/inst.isle line 2804.
+    return v6;
+}
+
+// Generated as internal constructor for term aarch64_sload32.
+pub fn constructor_aarch64_sload32<C: Context>(ctx: &mut C, arg0: &AMode, arg1: MemFlags) -> Reg {
+    let v3 = C::temp_writable_reg(ctx, I64);
+    let v4 = MInst::SLoad32 {
+        rd: v3,
+        mem: arg0.clone(),
+        flags: arg1,
+    };
+    let v5 = C::emit(ctx, &v4);
+    let v6 = C::writable_reg_to_reg(ctx, v3);
+    // Rule at src/isa/aarch64/inst.isle line 2809.
+    return v6;
+}
+
+// Generated as internal constructor for term aarch64_uload64.
+pub fn constructor_aarch64_uload64<C: Context>(ctx: &mut C, arg0: &AMode, arg1: MemFlags) -> Reg {
+    let v3 = C::temp_writable_reg(ctx, I64);
+    let v4 = MInst::ULoad64 {
+        rd: v3,
+        mem: arg0.clone(),
+        flags: arg1,
+    };
+    let v5 = C::emit(ctx, &v4);
+    let v6 = C::writable_reg_to_reg(ctx, v3);
+    // Rule at src/isa/aarch64/inst.isle line 2814.
+    return v6;
+}
+
+// Generated as internal constructor for term aarch64_fpuload32.
+pub fn constructor_aarch64_fpuload32<C: Context>(ctx: &mut C, arg0: &AMode, arg1: MemFlags) -> Reg {
+    let v3 = C::temp_writable_reg(ctx, F64);
+    let v4 = MInst::FpuLoad32 {
+        rd: v3,
+        mem: arg0.clone(),
+        flags: arg1,
+    };
+    let v5 = C::emit(ctx, &v4);
+    let v6 = C::writable_reg_to_reg(ctx, v3);
+    // Rule at src/isa/aarch64/inst.isle line 2819.
+    return v6;
+}
+
+// Generated as internal constructor for term aarch64_fpuload64.
+pub fn constructor_aarch64_fpuload64<C: Context>(ctx: &mut C, arg0: &AMode, arg1: MemFlags) -> Reg {
+    let v3 = C::temp_writable_reg(ctx, F64);
+    let v4 = MInst::FpuLoad64 {
+        rd: v3,
+        mem: arg0.clone(),
+        flags: arg1,
+    };
+    let v5 = C::emit(ctx, &v4);
+    let v6 = C::writable_reg_to_reg(ctx, v3);
+    // Rule at src/isa/aarch64/inst.isle line 2824.
+    return v6;
+}
+
+// Generated as internal constructor for term aarch64_fpuload128.
+pub fn constructor_aarch64_fpuload128<C: Context>(
+    ctx: &mut C,
+    arg0: &AMode,
+    arg1: MemFlags,
+) -> Reg {
+    let v3 = C::temp_writable_reg(ctx, F64X2);
+    let v4 = MInst::FpuLoad128 {
+        rd: v3,
+        mem: arg0.clone(),
+        flags: arg1,
+    };
+    let v5 = C::emit(ctx, &v4);
+    let v6 = C::writable_reg_to_reg(ctx, v3);
+    // Rule at src/isa/aarch64/inst.isle line 2829.
+    return v6;
+}
+
+// Generated as internal constructor for term aarch64_loadp64.
+pub fn constructor_aarch64_loadp64<C: Context>(
+    ctx: &mut C,
+    arg0: &PairAMode,
+    arg1: MemFlags,
+) -> ValueRegs {
+    let v3 = C::temp_writable_reg(ctx, I64);
+    let v4 = C::temp_writable_reg(ctx, I64);
+    let v5 = MInst::LoadP64 {
+        rt: v3,
+        rt2: v4,
+        mem: arg0.clone(),
+        flags: arg1,
+    };
+    let v6 = C::emit(ctx, &v5);
+    let v7 = C::writable_reg_to_reg(ctx, v3);
+    let v8 = C::writable_reg_to_reg(ctx, v4);
+    let v9 = C::value_regs(ctx, v7, v8);
+    // Rule at src/isa/aarch64/inst.isle line 2834.
+    return v9;
+}
+
+// Generated as internal constructor for term aarch64_store8.
+pub fn constructor_aarch64_store8<C: Context>(
+    ctx: &mut C,
+    arg0: &AMode,
+    arg1: MemFlags,
+    arg2: Reg,
+) -> SideEffectNoResult {
+    let v3 = MInst::Store8 {
+        rd: arg2,
+        mem: arg0.clone(),
+        flags: arg1,
+    };
+    let v4 = SideEffectNoResult::Inst { inst: v3 };
+    // Rule at src/isa/aarch64/inst.isle line 2843.
+    return v4;
+}
+
+// Generated as internal constructor for term aarch64_store16.
+pub fn constructor_aarch64_store16<C: Context>(
+    ctx: &mut C,
+    arg0: &AMode,
+    arg1: MemFlags,
+    arg2: Reg,
+) -> SideEffectNoResult {
+    let v3 = MInst::Store16 {
+        rd: arg2,
+        mem: arg0.clone(),
+        flags: arg1,
+    };
+    let v4 = SideEffectNoResult::Inst { inst: v3 };
+    // Rule at src/isa/aarch64/inst.isle line 2846.
+    return v4;
+}
+
+// Generated as internal constructor for term aarch64_store32.
+pub fn constructor_aarch64_store32<C: Context>(
+    ctx: &mut C,
+    arg0: &AMode,
+    arg1: MemFlags,
+    arg2: Reg,
+) -> SideEffectNoResult {
+    let v3 = MInst::Store32 {
+        rd: arg2,
+        mem: arg0.clone(),
+        flags: arg1,
+    };
+    let v4 = SideEffectNoResult::Inst { inst: v3 };
+    // Rule at src/isa/aarch64/inst.isle line 2849.
+    return v4;
+}
+
+// Generated as internal constructor for term aarch64_store64.
+pub fn constructor_aarch64_store64<C: Context>(
+    ctx: &mut C,
+    arg0: &AMode,
+    arg1: MemFlags,
+    arg2: Reg,
+) -> SideEffectNoResult {
+    let v3 = MInst::Store64 {
+        rd: arg2,
+        mem: arg0.clone(),
+        flags: arg1,
+    };
+    let v4 = SideEffectNoResult::Inst { inst: v3 };
+    // Rule at src/isa/aarch64/inst.isle line 2852.
+    return v4;
+}
+
+// Generated as internal constructor for term aarch64_fpustore32.
+pub fn constructor_aarch64_fpustore32<C: Context>(
+    ctx: &mut C,
+    arg0: &AMode,
+    arg1: MemFlags,
+    arg2: Reg,
+) -> SideEffectNoResult {
+    let v3 = MInst::FpuStore32 {
+        rd: arg2,
+        mem: arg0.clone(),
+        flags: arg1,
+    };
+    let v4 = SideEffectNoResult::Inst { inst: v3 };
+    // Rule at src/isa/aarch64/inst.isle line 2855.
+    return v4;
+}
+
+// Generated as internal constructor for term aarch64_fpustore64.
+pub fn constructor_aarch64_fpustore64<C: Context>(
+    ctx: &mut C,
+    arg0: &AMode,
+    arg1: MemFlags,
+    arg2: Reg,
+) -> SideEffectNoResult {
+    let v3 = MInst::FpuStore64 {
+        rd: arg2,
+        mem: arg0.clone(),
+        flags: arg1,
+    };
+    let v4 = SideEffectNoResult::Inst { inst: v3 };
+    // Rule at src/isa/aarch64/inst.isle line 2858.
+    return v4;
+}
+
+// Generated as internal constructor for term aarch64_fpustore128.
+pub fn constructor_aarch64_fpustore128<C: Context>(
+    ctx: &mut C,
+    arg0: &AMode,
+    arg1: MemFlags,
+    arg2: Reg,
+) -> SideEffectNoResult {
+    let v3 = MInst::FpuStore128 {
+        rd: arg2,
+        mem: arg0.clone(),
+        flags: arg1,
+    };
+    let v4 = SideEffectNoResult::Inst { inst: v3 };
+    // Rule at src/isa/aarch64/inst.isle line 2861.
+    return v4;
+}
+
+// Generated as internal constructor for term aarch64_storep64.
+pub fn constructor_aarch64_storep64<C: Context>(
+    ctx: &mut C,
+    arg0: &PairAMode,
+    arg1: MemFlags,
+    arg2: Reg,
+    arg3: Reg,
+) -> SideEffectNoResult {
+    let v4 = MInst::StoreP64 {
+        rt: arg2,
+        rt2: arg3,
+        mem: arg0.clone(),
+        flags: arg1,
+    };
+    let v5 = SideEffectNoResult::Inst { inst: v4 };
+    // Rule at src/isa/aarch64/inst.isle line 2864.
+    return v5;
+}
+
+// Generated as internal constructor for term trap_if.
+pub fn constructor_trap_if<C: Context>(
+    ctx: &mut C,
+    arg0: &ProducesFlags,
+    arg1: &TrapCode,
+    arg2: &Cond,
+) -> InstOutput {
+    let v3 = C::cond_br_cond(ctx, arg2);
+    let v4 = MInst::TrapIf {
+        kind: v3,
+        trap_code: arg1.clone(),
+    };
+    let v5 = ConsumesFlags::ConsumesFlagsSideEffect { inst: v4 };
+    let v6 = &constructor_with_flags_side_effect(ctx, arg0, &v5);
+    let v7 = constructor_side_effect(ctx, v6);
+    // Rule at src/isa/aarch64/inst.isle line 2870.
+    return v7;
+}
+
+// Generated as internal constructor for term imm.
+pub fn constructor_imm<C: Context>(ctx: &mut C, arg0: Type, arg1: &ImmExtend, arg2: u64) -> Reg {
+    let v1 = C::integral_ty(ctx, arg0);
+    if let Some(v2) = v1 {
+        if let &ImmExtend::Zero = arg1 {
+            let v5 = C::move_wide_const_from_u64(ctx, v2, arg2);
+            if let Some(v6) = v5 {
+                let v7 = &constructor_operand_size(ctx, v2);
+                let v8 = constructor_movz(ctx, v6, v7);
+                // Rule at src/isa/aarch64/inst.isle line 2898.
+                return v8;
+            }
+            let v9 = C::ty_32_or_64(ctx, v2);
+            if let Some(v10) = v9 {
+                let v11 = C::move_wide_const_from_inverted_u64(ctx, v10, arg2);
+                if let Some(v12) = v11 {
+                    let v13 = &constructor_operand_size(ctx, v10);
+                    let v14 = constructor_movn(ctx, v12, v13);
+                    // Rule at src/isa/aarch64/inst.isle line 2901.
+                    return v14;
+                }
+            }
+            let v15 = C::imm_logic_from_u64(ctx, v2, arg2);
+            if let Some(v16) = v15 {
+                let v17 = C::zero_reg(ctx);
+                let v18 = constructor_orr_imm(ctx, v2, v17, v16);
+                // Rule at src/isa/aarch64/inst.isle line 2907.
+                return v18;
+            }
+        }
+        let v19 = C::load_constant64_full(ctx, v2, arg1, arg2);
+        // Rule at src/isa/aarch64/inst.isle line 2915.
+        return v19;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "imm", "src/isa/aarch64/inst.isle line 2894"
+    )
+}
+
+// Generated as internal constructor for term put_in_reg_sext32.
+pub fn constructor_put_in_reg_sext32<C: Context>(ctx: &mut C, arg0: Value) -> Reg {
+    let v1 = C::value_type(ctx, arg0);
+    match v1 {
+        I32 => {
+            let v4 = C::put_in_reg(ctx, arg0);
+            // Rule at src/isa/aarch64/inst.isle line 2926.
+            return v4;
+        }
+        I64 => {
+            let v4 = C::put_in_reg(ctx, arg0);
+            // Rule at src/isa/aarch64/inst.isle line 2927.
+            return v4;
+        }
+        _ => {}
+    }
+    let v2 = C::fits_in_32(ctx, v1);
+    if let Some(v3) = v2 {
+        let v4 = C::put_in_reg(ctx, arg0);
+        let v6 = C::ty_bits(ctx, v3);
+        let v8 = constructor_extend(ctx, v4, true, v6, 0x20);
+        // Rule at src/isa/aarch64/inst.isle line 2922.
+        return v8;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "put_in_reg_sext32", "src/isa/aarch64/inst.isle line 2921"
+    )
+}
+
+// Generated as internal constructor for term put_in_reg_zext32.
+pub fn constructor_put_in_reg_zext32<C: Context>(ctx: &mut C, arg0: Value) -> Reg {
+    let v1 = C::value_type(ctx, arg0);
+    match v1 {
+        I32 => {
+            let v4 = C::put_in_reg(ctx, arg0);
+            // Rule at src/isa/aarch64/inst.isle line 2935.
+            return v4;
+        }
+        I64 => {
+            let v4 = C::put_in_reg(ctx, arg0);
+            // Rule at src/isa/aarch64/inst.isle line 2936.
+            return v4;
+        }
+        _ => {}
+    }
+    let v2 = C::fits_in_32(ctx, v1);
+    if let Some(v3) = v2 {
+        let v4 = C::put_in_reg(ctx, arg0);
+        let v6 = C::ty_bits(ctx, v3);
+        let v8 = constructor_extend(ctx, v4, false, v6, 0x20);
+        // Rule at src/isa/aarch64/inst.isle line 2931.
+        return v8;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "put_in_reg_zext32", "src/isa/aarch64/inst.isle line 2930"
+    )
+}
+
+// Generated as internal constructor for term put_in_reg_sext64.
+pub fn constructor_put_in_reg_sext64<C: Context>(ctx: &mut C, arg0: Value) -> Reg {
+    let v1 = C::value_type(ctx, arg0);
+    let v2 = C::fits_in_32(ctx, v1);
+    if let Some(v3) = v2 {
+        let v4 = C::put_in_reg(ctx, arg0);
+        let v6 = C::ty_bits(ctx, v3);
+        let v8 = constructor_extend(ctx, v4, true, v6, 0x40);
+        // Rule at src/isa/aarch64/inst.isle line 2940.
+        return v8;
+    }
+    if v1 == I64 {
+        let v4 = C::put_in_reg(ctx, arg0);
+        // Rule at src/isa/aarch64/inst.isle line 2944.
+        return v4;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "put_in_reg_sext64", "src/isa/aarch64/inst.isle line 2939"
+    )
+}
+
+// Generated as internal constructor for term put_in_reg_zext64.
+pub fn constructor_put_in_reg_zext64<C: Context>(ctx: &mut C, arg0: Value) -> Reg {
+    let v1 = C::value_type(ctx, arg0);
+    let v2 = C::fits_in_32(ctx, v1);
+    if let Some(v3) = v2 {
+        let v4 = C::put_in_reg(ctx, arg0);
+        let v6 = C::ty_bits(ctx, v3);
+        let v8 = constructor_extend(ctx, v4, false, v6, 0x40);
+        // Rule at src/isa/aarch64/inst.isle line 2948.
+        return v8;
+    }
+    if v1 == I64 {
+        let v4 = C::put_in_reg(ctx, arg0);
+        // Rule at src/isa/aarch64/inst.isle line 2952.
+        return v4;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "put_in_reg_zext64", "src/isa/aarch64/inst.isle line 2947"
+    )
+}
+
+// Generated as internal constructor for term trap_if_zero_divisor.
+pub fn constructor_trap_if_zero_divisor<C: Context>(ctx: &mut C, arg0: Reg) -> Reg {
+    let v1 = C::cond_br_zero(ctx, arg0);
+    let v2 = &C::trap_code_division_by_zero(ctx);
+    let v3 = MInst::TrapIf {
+        kind: v1,
+        trap_code: v2.clone(),
+    };
+    let v4 = C::emit(ctx, &v3);
+    // Rule at src/isa/aarch64/inst.isle line 2957.
+    return arg0;
+}
+
+// Generated as internal constructor for term size_from_ty.
+pub fn constructor_size_from_ty<C: Context>(ctx: &mut C, arg0: Type) -> OperandSize {
+    let v1 = C::fits_in_32(ctx, arg0);
+    if let Some(v2) = v1 {
+        // Rule at src/isa/aarch64/inst.isle line 2962.
+        return OperandSize::Size32;
+    }
+    if arg0 == I64 {
+        // Rule at src/isa/aarch64/inst.isle line 2963.
+        return OperandSize::Size64;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "size_from_ty", "src/isa/aarch64/inst.isle line 2961"
+    )
+}
+
+// Generated as internal constructor for term trap_if_div_overflow.
+pub fn constructor_trap_if_div_overflow<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: Reg,
+) -> Reg {
+    let v4 = &constructor_operand_size(ctx, arg0);
+    let v5 = C::writable_zero_reg(ctx);
+    let v7 = C::u8_into_imm12(ctx, 0x1);
+    let v8 = MInst::AluRRImm12 {
+        alu_op: ALUOp::AddS,
+        size: v4.clone(),
+        rd: v5,
+        rn: arg2,
+        imm12: v7,
+    };
+    let v9 = C::emit(ctx, &v8);
+    let v10 = &constructor_size_from_ty(ctx, arg0);
+    let v11 = C::u8_into_uimm5(ctx, 0x1);
+    let v13 = C::nzcv(ctx, false, false, false, false);
+    let v15 = MInst::CCmpImm {
+        size: v10.clone(),
+        rn: arg1,
+        imm: v11,
+        nzcv: v13,
+        cond: Cond::Eq,
+    };
+    let v16 = C::emit(ctx, &v15);
+    let v18 = C::cond_br_cond(ctx, &Cond::Vs);
+    let v19 = &C::trap_code_integer_overflow(ctx);
+    let v20 = MInst::TrapIf {
+        kind: v18,
+        trap_code: v19.clone(),
+    };
+    let v21 = C::emit(ctx, &v20);
+    // Rule at src/isa/aarch64/inst.isle line 2969.
+    return arg1;
+}
+
+// Generated as internal constructor for term trap_if_overflow.
+pub fn constructor_trap_if_overflow<C: Context>(
+    ctx: &mut C,
+    arg0: &ProducesFlags,
+    arg1: &TrapCode,
+) -> Reg {
+    let v3 = C::cond_br_cond(ctx, &Cond::Hs);
+    let v4 = MInst::TrapIf {
+        kind: v3,
+        trap_code: arg1.clone(),
+    };
+    let v5 = ConsumesFlags::ConsumesFlagsSideEffect { inst: v4 };
+    let v6 = constructor_with_flags_reg(ctx, arg0, &v5);
+    // Rule at src/isa/aarch64/inst.isle line 2988.
+    return v6;
+}
+
+// Generated as internal constructor for term sink_atomic_load.
+pub fn constructor_sink_atomic_load<C: Context>(ctx: &mut C, arg0: Inst) -> Reg {
+    let v1 = &C::inst_data(ctx, arg0);
+    if let &InstructionData::LoadNoOffset {
+        opcode: ref v2,
+        arg: v3,
+        flags: v4,
+    } = v1
+    {
+        if let &Opcode::AtomicLoad = v2 {
+            let v5 = C::sink_inst(ctx, arg0);
+            let v6 = C::put_in_reg(ctx, v3);
+            // Rule at src/isa/aarch64/inst.isle line 2995.
+            return v6;
+        }
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "sink_atomic_load", "src/isa/aarch64/inst.isle line 2994"
+    )
+}
+
+// Generated as internal constructor for term alu_rs_imm_logic_commutative.
+pub fn constructor_alu_rs_imm_logic_commutative<C: Context>(
+    ctx: &mut C,
+    arg0: &ALUOp,
+    arg1: Type,
+    arg2: Value,
+    arg3: Value,
+) -> Reg {
+    let v15 = C::def_inst(ctx, arg2);
+    if let Some(v16) = v15 {
+        let v17 = &C::inst_data(ctx, v16);
+        match v17 {
+            &InstructionData::Binary {
+                opcode: ref v38,
+                args: ref v39,
+            } => {
+                if let &Opcode::Ishl = v38 {
+                    let v40 = C::unpack_value_array_2(ctx, v39);
+                    let v43 = C::def_inst(ctx, v40.1);
+                    if let Some(v44) = v43 {
+                        let v45 = &C::inst_data(ctx, v44);
+                        if let &InstructionData::UnaryImm {
+                            opcode: ref v46,
+                            imm: v47,
+                        } = v45
+                        {
+                            if let &Opcode::Iconst = v46 {
+                                let v48 = C::lshl_from_imm64(ctx, arg1, v47);
+                                if let Some(v49) = v48 {
+                                    let v22 = C::put_in_reg(ctx, arg3);
+                                    let v50 = C::put_in_reg(ctx, v40.0);
+                                    let v51 =
+                                        constructor_alu_rrr_shift(ctx, arg0, arg1, v22, v50, v49);
+                                    // Rule at src/isa/aarch64/inst.isle line 3020.
+                                    return v51;
+                                }
+                            }
+                        }
+                    }
+                }
+            }
+            &InstructionData::UnaryImm {
+                opcode: ref v18,
+                imm: v19,
+            } => {
+                if let &Opcode::Iconst = v18 {
+                    let v20 = C::imm_logic_from_imm64(ctx, arg1, v19);
+                    if let Some(v21) = v20 {
+                        let v22 = C::put_in_reg(ctx, arg3);
+                        let v23 = constructor_alu_rr_imm_logic(ctx, arg0, arg1, v22, v21);
+                        // Rule at src/isa/aarch64/inst.isle line 3012.
+                        return v23;
+                    }
+                }
+            }
+            _ => {}
+        }
+    }
+    let v7 = C::def_inst(ctx, arg3);
+    if let Some(v8) = v7 {
+        let v9 = &C::inst_data(ctx, v8);
+        match v9 {
+            &InstructionData::Binary {
+                opcode: ref v24,
+                args: ref v25,
+            } => {
+                if let &Opcode::Ishl = v24 {
+                    let v26 = C::unpack_value_array_2(ctx, v25);
+                    let v29 = C::def_inst(ctx, v26.1);
+                    if let Some(v30) = v29 {
+                        let v31 = &C::inst_data(ctx, v30);
+                        if let &InstructionData::UnaryImm {
+                            opcode: ref v32,
+                            imm: v33,
+                        } = v31
+                        {
+                            if let &Opcode::Iconst = v32 {
+                                let v34 = C::lshl_from_imm64(ctx, arg1, v33);
+                                if let Some(v35) = v34 {
+                                    let v4 = C::put_in_reg(ctx, arg2);
+                                    let v36 = C::put_in_reg(ctx, v26.0);
+                                    let v37 =
+                                        constructor_alu_rrr_shift(ctx, arg0, arg1, v4, v36, v35);
+                                    // Rule at src/isa/aarch64/inst.isle line 3017.
+                                    return v37;
+                                }
+                            }
+                        }
+                    }
+                }
+            }
+            &InstructionData::UnaryImm {
+                opcode: ref v10,
+                imm: v11,
+            } => {
+                if let &Opcode::Iconst = v10 {
+                    let v12 = C::imm_logic_from_imm64(ctx, arg1, v11);
+                    if let Some(v13) = v12 {
+                        let v4 = C::put_in_reg(ctx, arg2);
+                        let v14 = constructor_alu_rr_imm_logic(ctx, arg0, arg1, v4, v13);
+                        // Rule at src/isa/aarch64/inst.isle line 3009.
+                        return v14;
+                    }
+                }
+            }
+            _ => {}
+        }
+    }
+    let v4 = C::put_in_reg(ctx, arg2);
+    let v5 = C::put_in_reg(ctx, arg3);
+    let v6 = constructor_alu_rrr(ctx, arg0, arg1, v4, v5);
+    // Rule at src/isa/aarch64/inst.isle line 3005.
+    return v6;
+}
+
+// Generated as internal constructor for term alu_rs_imm_logic.
+pub fn constructor_alu_rs_imm_logic<C: Context>(
+    ctx: &mut C,
+    arg0: &ALUOp,
+    arg1: Type,
+    arg2: Value,
+    arg3: Value,
+) -> Reg {
+    let v7 = C::def_inst(ctx, arg3);
+    if let Some(v8) = v7 {
+        let v9 = &C::inst_data(ctx, v8);
+        match v9 {
+            &InstructionData::Binary {
+                opcode: ref v15,
+                args: ref v16,
+            } => {
+                if let &Opcode::Ishl = v15 {
+                    let v17 = C::unpack_value_array_2(ctx, v16);
+                    let v20 = C::def_inst(ctx, v17.1);
+                    if let Some(v21) = v20 {
+                        let v22 = &C::inst_data(ctx, v21);
+                        if let &InstructionData::UnaryImm {
+                            opcode: ref v23,
+                            imm: v24,
+                        } = v22
+                        {
+                            if let &Opcode::Iconst = v23 {
+                                let v25 = C::lshl_from_imm64(ctx, arg1, v24);
+                                if let Some(v26) = v25 {
+                                    let v4 = C::put_in_reg(ctx, arg2);
+                                    let v27 = C::put_in_reg(ctx, v17.0);
+                                    let v28 =
+                                        constructor_alu_rrr_shift(ctx, arg0, arg1, v4, v27, v26);
+                                    // Rule at src/isa/aarch64/inst.isle line 3032.
+                                    return v28;
+                                }
+                            }
+                        }
+                    }
+                }
+            }
+            &InstructionData::UnaryImm {
+                opcode: ref v10,
+                imm: v11,
+            } => {
+                if let &Opcode::Iconst = v10 {
+                    let v12 = C::imm_logic_from_imm64(ctx, arg1, v11);
+                    if let Some(v13) = v12 {
+                        let v4 = C::put_in_reg(ctx, arg2);
+                        let v14 = constructor_alu_rr_imm_logic(ctx, arg0, arg1, v4, v13);
+                        // Rule at src/isa/aarch64/inst.isle line 3029.
+                        return v14;
+                    }
+                }
+            }
+            _ => {}
+        }
+    }
+    let v4 = C::put_in_reg(ctx, arg2);
+    let v5 = C::put_in_reg(ctx, arg3);
+    let v6 = constructor_alu_rrr(ctx, arg0, arg1, v4, v5);
+    // Rule at src/isa/aarch64/inst.isle line 3027.
+    return v6;
+}
+
+// Generated as internal constructor for term i128_alu_bitop.
+pub fn constructor_i128_alu_bitop<C: Context>(
+    ctx: &mut C,
+    arg0: &ALUOp,
+    arg1: Type,
+    arg2: Value,
+    arg3: Value,
+) -> ValueRegs {
+    let v4 = C::put_in_regs(ctx, arg2);
+    let v6 = C::value_regs_get(ctx, v4, 0x0);
+    let v8 = C::value_regs_get(ctx, v4, 0x1);
+    let v9 = C::put_in_regs(ctx, arg3);
+    let v10 = C::value_regs_get(ctx, v9, 0x0);
+    let v11 = C::value_regs_get(ctx, v9, 0x1);
+    let v12 = constructor_alu_rrr(ctx, arg0, arg1, v6, v10);
+    let v13 = constructor_alu_rrr(ctx, arg0, arg1, v8, v11);
+    let v14 = C::value_regs(ctx, v12, v13);
+    // Rule at src/isa/aarch64/inst.isle line 3041.
+    return v14;
+}
+
+// Generated as internal constructor for term ld1r.
+pub fn constructor_ld1r<C: Context>(
+    ctx: &mut C,
+    arg0: Reg,
+    arg1: &VectorSize,
+    arg2: MemFlags,
+) -> Reg {
+    let v4 = C::temp_writable_reg(ctx, I8X16);
+    let v5 = MInst::VecLoadReplicate {
+        rd: v4,
+        rn: arg0,
+        size: arg1.clone(),
+        flags: arg2,
+    };
+    let v6 = C::emit(ctx, &v5);
+    let v7 = C::writable_reg_to_reg(ctx, v4);
+    // Rule at src/isa/aarch64/inst.isle line 3056.
+    return v7;
+}
+
+// Generated as internal constructor for term load_ext_name.
+pub fn constructor_load_ext_name<C: Context>(ctx: &mut C, arg0: BoxExternalName, arg1: i64) -> Reg {
+    let v3 = C::temp_writable_reg(ctx, I64);
+    let v4 = MInst::LoadExtName {
+        rd: v3,
+        name: arg0,
+        offset: arg1,
+    };
+    let v5 = C::emit(ctx, &v4);
+    let v6 = C::writable_reg_to_reg(ctx, v3);
+    // Rule at src/isa/aarch64/inst.isle line 3063.
+    return v6;
+}
+
+// Generated as internal constructor for term sink_load_into_addr.
+pub fn constructor_sink_load_into_addr<C: Context>(ctx: &mut C, arg0: Type, arg1: Inst) -> Reg {
+    let v2 = &C::inst_data(ctx, arg1);
+    if let &InstructionData::Load {
+        opcode: ref v3,
+        arg: v4,
+        flags: v5,
+        offset: v6,
+    } = v2
+    {
+        if let &Opcode::Load = v3 {
+            let v8 = C::sink_inst(ctx, arg1);
+            let v9 = C::put_in_reg(ctx, v4);
+            let v7 = C::offset32(ctx, v6);
+            let v10 = C::u32_as_u64(ctx, v7);
+            let v11 = constructor_add_imm_to_addr(ctx, v9, v10);
+            // Rule at src/isa/aarch64/inst.isle line 3074.
+            return v11;
+        }
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "sink_load_into_addr", "src/isa/aarch64/inst.isle line 3073"
+    )
+}
+
+// Generated as internal constructor for term add_imm_to_addr.
+pub fn constructor_add_imm_to_addr<C: Context>(ctx: &mut C, arg0: Reg, arg1: u64) -> Reg {
+    if arg1 == 0x0 {
+        // Rule at src/isa/aarch64/inst.isle line 3079.
+        return arg0;
+    }
+    let v2 = C::imm12_from_u64(ctx, arg1);
+    if let Some(v3) = v2 {
+        let v5 = constructor_add_imm(ctx, I64, arg0, v3);
+        // Rule at src/isa/aarch64/inst.isle line 3080.
+        return v5;
+    }
+    let v7 = constructor_imm(ctx, I64, &ImmExtend::Zero, arg1);
+    let v8 = constructor_add(ctx, I64, arg0, v7);
+    // Rule at src/isa/aarch64/inst.isle line 3081.
+    return v8;
+}
+
+// Generated as internal constructor for term constant_f32.
+pub fn constructor_constant_f32<C: Context>(ctx: &mut C, arg0: u32) -> Reg {
+    if arg0 == 0x0 {
+        let v2 = C::asimd_mov_mod_imm_zero(ctx, &ScalarSize::Size32);
+        let v5 = constructor_vec_dup_imm(ctx, v2, false, &VectorSize::Size32x2);
+        // Rule at src/isa/aarch64/inst.isle line 3089.
+        return v5;
+    }
+    let v6 = C::u32_as_u64(ctx, arg0);
+    let v7 = C::asimd_fp_mod_imm_from_u64(ctx, v6, &ScalarSize::Size32);
+    if let Some(v8) = v7 {
+        let v9 = constructor_fpu_move_fp_imm(ctx, v8, &ScalarSize::Size32);
+        // Rule at src/isa/aarch64/inst.isle line 3093.
+        return v9;
+    }
+    let v12 = constructor_imm(ctx, I32, &ImmExtend::Zero, v6);
+    let v13 = constructor_mov_to_fpu(ctx, v12, &ScalarSize::Size32);
+    // Rule at src/isa/aarch64/inst.isle line 3096.
+    return v13;
+}
+
+// Generated as internal constructor for term constant_f64.
+pub fn constructor_constant_f64<C: Context>(ctx: &mut C, arg0: u64) -> Reg {
+    if arg0 == 0x0 {
+        let v2 = C::asimd_mov_mod_imm_zero(ctx, &ScalarSize::Size32);
+        let v5 = constructor_vec_dup_imm(ctx, v2, false, &VectorSize::Size32x2);
+        // Rule at src/isa/aarch64/inst.isle line 3107.
+        return v5;
+    }
+    let v7 = C::asimd_fp_mod_imm_from_u64(ctx, arg0, &ScalarSize::Size64);
+    if let Some(v8) = v7 {
+        let v9 = constructor_fpu_move_fp_imm(ctx, v8, &ScalarSize::Size64);
+        // Rule at src/isa/aarch64/inst.isle line 3111.
+        return v9;
+    }
+    let v10 = C::u64_as_u32(ctx, arg0);
+    if let Some(v11) = v10 {
+        let v12 = constructor_constant_f32(ctx, v11);
+        // Rule at src/isa/aarch64/inst.isle line 3114.
+        return v12;
+    }
+    let v13 = C::u64_low32_bits_unset(ctx, arg0);
+    if let Some(v14) = v13 {
+        let v17 = constructor_imm(ctx, I64, &ImmExtend::Zero, v14);
+        let v18 = constructor_mov_to_fpu(ctx, v17, &ScalarSize::Size64);
+        // Rule at src/isa/aarch64/inst.isle line 3116.
+        return v18;
+    }
+    let v19 = C::emit_u64_le_const(ctx, arg0);
+    let v20 = AMode::Const { addr: v19 };
+    let v21 = C::mem_flags_trusted(ctx);
+    let v22 = constructor_fpu_load64(ctx, &v20, v21);
+    // Rule at src/isa/aarch64/inst.isle line 3118.
+    return v22;
+}
+
+// Generated as internal constructor for term constant_f128.
+pub fn constructor_constant_f128<C: Context>(ctx: &mut C, arg0: u128) -> Reg {
+    if arg0 == 0x0 {
+        let v2 = C::asimd_mov_mod_imm_zero(ctx, &ScalarSize::Size8);
+        let v5 = constructor_vec_dup_imm(ctx, v2, false, &VectorSize::Size8x16);
+        // Rule at src/isa/aarch64/inst.isle line 3127.
+        return v5;
+    }
+    let v6 = C::u128_as_u64(ctx, arg0);
+    if let Some(v7) = v6 {
+        let v8 = constructor_constant_f64(ctx, v7);
+        // Rule at src/isa/aarch64/inst.isle line 3133.
+        return v8;
+    }
+    let v9 = C::u128_replicated_u64(ctx, arg0);
+    if let Some(v10) = v9 {
+        let v12 = constructor_splat_const(ctx, v10, &VectorSize::Size64x2);
+        // Rule at src/isa/aarch64/inst.isle line 3137.
+        return v12;
+    }
+    let v13 = C::emit_u128_le_const(ctx, arg0);
+    let v14 = AMode::Const { addr: v13 };
+    let v15 = C::mem_flags_trusted(ctx);
+    let v16 = constructor_fpu_load128(ctx, &v14, v15);
+    // Rule at src/isa/aarch64/inst.isle line 3141.
+    return v16;
+}
+
+// Generated as internal constructor for term splat_const.
+pub fn constructor_splat_const<C: Context>(ctx: &mut C, arg0: u64, arg1: &VectorSize) -> Reg {
+    match arg1 {
+        &VectorSize::Size16x4 => {
+            let v12 = C::u16_replicated_u8(ctx, arg0);
+            if let Some(v13) = v12 {
+                let v17 = constructor_splat_const(ctx, v13, &VectorSize::Size8x8);
+                // Rule at src/isa/aarch64/inst.isle line 3160.
+                return v17;
+            }
+        }
+        &VectorSize::Size16x8 => {
+            let v12 = C::u16_replicated_u8(ctx, arg0);
+            if let Some(v13) = v12 {
+                let v15 = constructor_splat_const(ctx, v13, &VectorSize::Size8x16);
+                // Rule at src/isa/aarch64/inst.isle line 3158.
+                return v15;
+            }
+        }
+        &VectorSize::Size32x2 => {
+            let v6 = C::u32_replicated_u16(ctx, arg0);
+            if let Some(v7) = v6 {
+                let v11 = constructor_splat_const(ctx, v7, &VectorSize::Size16x4);
+                // Rule at src/isa/aarch64/inst.isle line 3156.
+                return v11;
+            }
+        }
+        &VectorSize::Size32x4 => {
+            let v6 = C::u32_replicated_u16(ctx, arg0);
+            if let Some(v7) = v6 {
+                let v9 = constructor_splat_const(ctx, v7, &VectorSize::Size16x8);
+                // Rule at src/isa/aarch64/inst.isle line 3154.
+                return v9;
+            }
+        }
+        &VectorSize::Size64x2 => {
+            let v1 = C::u64_replicated_u32(ctx, arg0);
+            if let Some(v2) = v1 {
+                let v5 = constructor_splat_const(ctx, v2, &VectorSize::Size32x4);
+                // Rule at src/isa/aarch64/inst.isle line 3152.
+                return v5;
+            }
+        }
+        _ => {}
+    }
+    let v18 = &constructor_vector_lane_size(ctx, arg1);
+    let v19 = C::asimd_mov_mod_imm_from_u64(ctx, arg0, v18);
+    if let Some(v20) = v19 {
+        let v22 = constructor_vec_dup_imm(ctx, v20, false, arg1);
+        // Rule at src/isa/aarch64/inst.isle line 3165.
+        return v22;
+    }
+    let v23 = C::u64_not(ctx, arg0);
+    let v24 = C::asimd_mov_mod_imm_from_u64(ctx, v23, v18);
+    if let Some(v25) = v24 {
+        let v27 = constructor_vec_dup_imm(ctx, v25, true, arg1);
+        // Rule at src/isa/aarch64/inst.isle line 3168.
+        return v27;
+    }
+    match arg1 {
+        &VectorSize::Size32x2 => {
+            let v29 = C::u64_shl(ctx, arg0, 0x20);
+            let v30 = C::u64_or(ctx, arg0, v29);
+            let v32 = C::asimd_mov_mod_imm_from_u64(ctx, v30, &ScalarSize::Size64);
+            if let Some(v33) = v32 {
+                let v35 = constructor_vec_dup_imm(ctx, v33, false, &VectorSize::Size64x2);
+                let v36 = constructor_fpu_extend(ctx, v35, &ScalarSize::Size64);
+                // Rule at src/isa/aarch64/inst.isle line 3177.
+                return v36;
+            }
+        }
+        &VectorSize::Size32x4 => {
+            let v29 = C::u64_shl(ctx, arg0, 0x20);
+            let v30 = C::u64_or(ctx, arg0, v29);
+            let v32 = C::asimd_mov_mod_imm_from_u64(ctx, v30, &ScalarSize::Size64);
+            if let Some(v33) = v32 {
+                let v35 = constructor_vec_dup_imm(ctx, v33, false, &VectorSize::Size64x2);
+                // Rule at src/isa/aarch64/inst.isle line 3174.
+                return v35;
+            }
+        }
+        _ => {}
+    }
+    let v37 = C::asimd_fp_mod_imm_from_u64(ctx, arg0, v18);
+    if let Some(v38) = v37 {
+        let v39 = constructor_vec_dup_fp_imm(ctx, v38, arg1);
+        // Rule at src/isa/aarch64/inst.isle line 3181.
+        return v39;
+    }
+    let v42 = constructor_imm(ctx, I64, &ImmExtend::Zero, arg0);
+    let v43 = constructor_vec_dup(ctx, v42, arg1);
+    // Rule at src/isa/aarch64/inst.isle line 3187.
+    return v43;
+}
+
+// Generated as internal constructor for term float_cmp_zero.
+pub fn constructor_float_cmp_zero<C: Context>(
+    ctx: &mut C,
+    arg0: &FloatCC,
+    arg1: Reg,
+    arg2: &VectorSize,
+) -> Reg {
+    let v3 = &C::float_cc_cmp_zero_to_vec_misc_op(ctx, arg0);
+    let v4 = constructor_vec_misc(ctx, v3, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 3233.
+    return v4;
+}
+
+// Generated as internal constructor for term float_cmp_zero_swap.
+pub fn constructor_float_cmp_zero_swap<C: Context>(
+    ctx: &mut C,
+    arg0: &FloatCC,
+    arg1: Reg,
+    arg2: &VectorSize,
+) -> Reg {
+    let v3 = &C::float_cc_cmp_zero_to_vec_misc_op_swap(ctx, arg0);
+    let v4 = constructor_vec_misc(ctx, v3, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 3238.
+    return v4;
+}
+
+// Generated as internal constructor for term fcmeq0.
+pub fn constructor_fcmeq0<C: Context>(ctx: &mut C, arg0: Reg, arg1: &VectorSize) -> Reg {
+    let v3 = constructor_vec_misc(ctx, &VecMisc2::Fcmeq0, arg0, arg1);
+    // Rule at src/isa/aarch64/inst.isle line 3243.
+    return v3;
+}
+
+// Generated as internal constructor for term int_cmp_zero.
+pub fn constructor_int_cmp_zero<C: Context>(
+    ctx: &mut C,
+    arg0: &IntCC,
+    arg1: Reg,
+    arg2: &VectorSize,
+) -> Reg {
+    let v3 = &C::int_cc_cmp_zero_to_vec_misc_op(ctx, arg0);
+    let v4 = constructor_vec_misc(ctx, v3, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 3263.
+    return v4;
+}
+
+// Generated as internal constructor for term int_cmp_zero_swap.
+pub fn constructor_int_cmp_zero_swap<C: Context>(
+    ctx: &mut C,
+    arg0: &IntCC,
+    arg1: Reg,
+    arg2: &VectorSize,
+) -> Reg {
+    let v3 = &C::int_cc_cmp_zero_to_vec_misc_op_swap(ctx, arg0);
+    let v4 = constructor_vec_misc(ctx, v3, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 3268.
+    return v4;
+}
+
+// Generated as internal constructor for term cmeq0.
+pub fn constructor_cmeq0<C: Context>(ctx: &mut C, arg0: Reg, arg1: &VectorSize) -> Reg {
+    let v3 = constructor_vec_misc(ctx, &VecMisc2::Cmeq0, arg0, arg1);
+    // Rule at src/isa/aarch64/inst.isle line 3273.
+    return v3;
+}
+
+// Generated as internal constructor for term lse_atomic_rmw.
+pub fn constructor_lse_atomic_rmw<C: Context>(
+    ctx: &mut C,
+    arg0: &AtomicRMWOp,
+    arg1: Value,
+    arg2: Reg,
+    arg3: Type,
+    arg4: MemFlags,
+) -> Reg {
+    let v5 = C::put_in_reg(ctx, arg1);
+    let v6 = C::temp_writable_reg(ctx, arg3);
+    let v7 = MInst::AtomicRMW {
+        op: arg0.clone(),
+        rs: arg2,
+        rt: v6,
+        rn: v5,
+        ty: arg3,
+        flags: arg4,
+    };
+    let v8 = C::emit(ctx, &v7);
+    let v9 = C::writable_reg_to_reg(ctx, v6);
+    // Rule at src/isa/aarch64/inst.isle line 3278.
+    return v9;
+}
+
+// Generated as internal constructor for term lse_atomic_cas.
+pub fn constructor_lse_atomic_cas<C: Context>(
+    ctx: &mut C,
+    arg0: Reg,
+    arg1: Reg,
+    arg2: Reg,
+    arg3: Type,
+    arg4: MemFlags,
+) -> Reg {
+    let v5 = C::temp_writable_reg(ctx, arg3);
+    let v6 = MInst::AtomicCAS {
+        rd: v5,
+        rs: arg1,
+        rt: arg2,
+        rn: arg0,
+        ty: arg3,
+        flags: arg4,
+    };
+    let v7 = C::emit(ctx, &v6);
+    let v8 = C::writable_reg_to_reg(ctx, v5);
+    // Rule at src/isa/aarch64/inst.isle line 3288.
+    return v8;
+}
+
+// Generated as internal constructor for term atomic_rmw_loop.
+pub fn constructor_atomic_rmw_loop<C: Context>(
+    ctx: &mut C,
+    arg0: &AtomicRMWLoopOp,
+    arg1: Reg,
+    arg2: Reg,
+    arg3: Type,
+    arg4: MemFlags,
+) -> Reg {
+    let v6 = C::temp_writable_reg(ctx, I64);
+    let v7 = C::temp_writable_reg(ctx, I64);
+    let v8 = C::temp_writable_reg(ctx, I64);
+    let v9 = MInst::AtomicRMWLoop {
+        ty: arg3,
+        op: arg0.clone(),
+        flags: arg4,
+        addr: arg1,
+        operand: arg2,
+        oldval: v6,
+        scratch1: v7,
+        scratch2: v8,
+    };
+    let v10 = C::emit(ctx, &v9);
+    let v11 = C::writable_reg_to_reg(ctx, v6);
+    // Rule at src/isa/aarch64/inst.isle line 3302.
+    return v11;
+}
+
+// Generated as internal constructor for term atomic_cas_loop.
+pub fn constructor_atomic_cas_loop<C: Context>(
+    ctx: &mut C,
+    arg0: Reg,
+    arg1: Reg,
+    arg2: Reg,
+    arg3: Type,
+    arg4: MemFlags,
+) -> Reg {
+    let v6 = C::temp_writable_reg(ctx, I64);
+    let v7 = C::temp_writable_reg(ctx, I64);
+    let v8 = MInst::AtomicCASLoop {
+        ty: arg3,
+        flags: arg4,
+        addr: arg0,
+        expected: arg1,
+        replacement: arg2,
+        oldval: v6,
+        scratch: v7,
+    };
+    let v9 = C::emit(ctx, &v8);
+    let v10 = C::writable_reg_to_reg(ctx, v6);
+    // Rule at src/isa/aarch64/inst.isle line 3316.
+    return v10;
+}
+
+// Generated as internal constructor for term mov_from_preg.
+pub fn constructor_mov_from_preg<C: Context>(ctx: &mut C, arg0: PReg) -> Reg {
+    let v2 = C::temp_writable_reg(ctx, I64);
+    let v3 = MInst::MovFromPReg { rd: v2, rm: arg0 };
+    let v4 = C::emit(ctx, &v3);
+    let v5 = C::writable_reg_to_reg(ctx, v2);
+    // Rule at src/isa/aarch64/inst.isle line 3324.
+    return v5;
+}
+
+// Generated as internal constructor for term mov_to_preg.
+pub fn constructor_mov_to_preg<C: Context>(
+    ctx: &mut C,
+    arg0: PReg,
+    arg1: Reg,
+) -> SideEffectNoResult {
+    let v2 = MInst::MovToPReg { rd: arg0, rm: arg1 };
+    let v3 = SideEffectNoResult::Inst { inst: v2 };
+    // Rule at src/isa/aarch64/inst.isle line 3330.
+    return v3;
+}
+
+// Generated as internal constructor for term aarch64_sp.
+pub fn constructor_aarch64_sp<C: Context>(ctx: &mut C) -> Reg {
+    let v0 = C::preg_sp(ctx);
+    let v1 = constructor_mov_from_preg(ctx, v0);
+    // Rule at src/isa/aarch64/inst.isle line 3346.
+    return v1;
+}
+
+// Generated as internal constructor for term aarch64_fp.
+pub fn constructor_aarch64_fp<C: Context>(ctx: &mut C) -> Reg {
+    let v0 = C::preg_fp(ctx);
+    let v1 = constructor_mov_from_preg(ctx, v0);
+    // Rule at src/isa/aarch64/inst.isle line 3350.
+    return v1;
+}
+
+// Generated as internal constructor for term aarch64_link.
+pub fn constructor_aarch64_link<C: Context>(ctx: &mut C) -> Reg {
+    let v0 = C::preserve_frame_pointers(ctx);
+    if let Some(v1) = v0 {
+        let v2 = C::sign_return_address_disabled(ctx);
+        if let Some(v3) = v2 {
+            let v5 = C::temp_writable_reg(ctx, I64);
+            let v7 = AMode::FPOffset { off: 0x8, ty: I64 };
+            let v8 = C::mem_flags_trusted(ctx);
+            let v9 = MInst::ULoad64 {
+                rd: v5,
+                mem: v7,
+                flags: v8,
+            };
+            let v10 = C::emit(ctx, &v9);
+            let v11 = C::writable_reg_to_reg(ctx, v5);
+            // Rule at src/isa/aarch64/inst.isle line 3354.
+            return v11;
+        }
+        let v12 = C::writable_link_reg(ctx);
+        let v7 = AMode::FPOffset { off: 0x8, ty: I64 };
+        let v8 = C::mem_flags_trusted(ctx);
+        let v13 = MInst::ULoad64 {
+            rd: v12,
+            mem: v7,
+            flags: v8,
+        };
+        let v14 = C::emit(ctx, &v13);
+        let v16 = C::emit(ctx, &MInst::Xpaclri);
+        let v17 = C::preg_link(ctx);
+        let v18 = constructor_mov_from_preg(ctx, v17);
+        // Rule at src/isa/aarch64/inst.isle line 3370.
+        return v18;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "aarch64_link", "src/isa/aarch64/inst.isle line 3353"
+    )
+}
+
+// Generated as internal constructor for term max_shift.
+pub fn constructor_max_shift<C: Context>(ctx: &mut C, arg0: Type) -> u8 {
+    match arg0 {
+        F32 => {
+            // Rule at src/isa/aarch64/inst.isle line 3386.
+            return 0x1F;
+        }
+        F64 => {
+            // Rule at src/isa/aarch64/inst.isle line 3385.
+            return 0x3F;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "max_shift", "src/isa/aarch64/inst.isle line 3384"
+    )
+}
+
+// Generated as internal constructor for term fcopy_sign.
+pub fn constructor_fcopy_sign<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg, arg2: Type) -> Reg {
+    let v3 = C::ty_scalar_float(ctx, arg2);
+    if let Some(v4) = v3 {
+        let v6 = C::temp_writable_reg(ctx, F64);
+        let v8 = constructor_max_shift(ctx, v4);
+        let v7 = C::ty_bits(ctx, v4);
+        let v9 = &C::fpu_op_ri_ushr(ctx, v7, v8);
+        let v10 = constructor_fpu_rri(ctx, v9, arg1);
+        let v11 = constructor_max_shift(ctx, v4);
+        let v12 = &C::fpu_op_ri_sli(ctx, v7, v11);
+        let v13 = MInst::FpuRRIMod {
+            fpu_op: v12.clone(),
+            rd: v6,
+            ri: arg0,
+            rn: v10,
+        };
+        let v14 = C::emit(ctx, &v13);
+        let v15 = C::writable_reg_to_reg(ctx, v6);
+        // Rule at src/isa/aarch64/inst.isle line 3391.
+        return v15;
+    }
+    let v16 = C::multi_lane(ctx, arg2);
+    if let Some(v17) = v16 {
+        let v21 = C::temp_writable_reg(ctx, I8X16);
+        let v22 = C::lane_type(ctx, arg2);
+        let v23 = constructor_max_shift(ctx, v22);
+        let v24 = &constructor_vector_size(ctx, arg2);
+        let v25 = constructor_ushr_vec_imm(ctx, arg1, v23, v24);
+        let v27 = &constructor_vector_size(ctx, arg2);
+        let v28 = constructor_max_shift(ctx, v22);
+        let v29 = MInst::VecShiftImmMod {
+            op: VecShiftImmModOp::Sli,
+            rd: v21,
+            ri: arg0,
+            rn: v25,
+            size: v27.clone(),
+            imm: v28,
+        };
+        let v30 = C::emit(ctx, &v29);
+        let v31 = C::writable_reg_to_reg(ctx, v21);
+        // Rule at src/isa/aarch64/inst.isle line 3396.
+        return v31;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "fcopy_sign", "src/isa/aarch64/inst.isle line 3390"
+    )
+}
+
+// Generated as internal constructor for term fpu_to_int_nan_check.
+pub fn constructor_fpu_to_int_nan_check<C: Context>(
+    ctx: &mut C,
+    arg0: &ScalarSize,
+    arg1: Reg,
+) -> Reg {
+    let v2 = &constructor_fpu_cmp(ctx, arg0, arg1, arg1);
+    let v4 = C::cond_br_cond(ctx, &Cond::Vs);
+    let v5 = &C::trap_code_bad_conversion_to_integer(ctx);
+    let v6 = MInst::TrapIf {
+        kind: v4,
+        trap_code: v5.clone(),
+    };
+    let v7 = ConsumesFlags::ConsumesFlagsReturnsReg {
+        inst: v6,
+        result: arg1,
+    };
+    let v8 = constructor_with_flags(ctx, v2, &v7);
+    let v10 = C::value_regs_get(ctx, v8, 0x0);
+    // Rule at src/isa/aarch64/inst.isle line 3405.
+    return v10;
+}
+
+// Generated as internal constructor for term fpu_to_int_underflow_check.
+pub fn constructor_fpu_to_int_underflow_check<C: Context>(
+    ctx: &mut C,
+    arg0: bool,
+    arg1: Type,
+    arg2: Type,
+    arg3: Reg,
+    arg4: Reg,
+) -> Reg {
+    match arg0 {
+        true => {
+            match arg1 {
+                F32 => {
+                    let v3 = C::fits_in_16(ctx, arg2);
+                    if let Some(v4) = v3 {
+                        let v8 = &constructor_fpu_cmp(ctx, &ScalarSize::Size32, arg3, arg4);
+                        let v10 = C::cond_br_cond(ctx, &Cond::Le);
+                        let v11 = &C::trap_code_integer_overflow(ctx);
+                        let v12 = MInst::TrapIf {
+                            kind: v10,
+                            trap_code: v11.clone(),
+                        };
+                        let v13 = ConsumesFlags::ConsumesFlagsReturnsReg {
+                            inst: v12,
+                            result: arg3,
+                        };
+                        let v14 = constructor_with_flags(ctx, v8, &v13);
+                        let v16 = C::value_regs_get(ctx, v14, 0x0);
+                        // Rule at src/isa/aarch64/inst.isle line 3418.
+                        return v16;
+                    }
+                }
+                F64 => {
+                    let v17 = C::fits_in_32(ctx, arg2);
+                    if let Some(v18) = v17 {
+                        let v20 = &constructor_fpu_cmp(ctx, &ScalarSize::Size64, arg3, arg4);
+                        let v10 = C::cond_br_cond(ctx, &Cond::Le);
+                        let v11 = &C::trap_code_integer_overflow(ctx);
+                        let v12 = MInst::TrapIf {
+                            kind: v10,
+                            trap_code: v11.clone(),
+                        };
+                        let v13 = ConsumesFlags::ConsumesFlagsReturnsReg {
+                            inst: v12,
+                            result: arg3,
+                        };
+                        let v21 = constructor_with_flags(ctx, v20, &v13);
+                        let v22 = C::value_regs_get(ctx, v21, 0x0);
+                        // Rule at src/isa/aarch64/inst.isle line 3426.
+                        return v22;
+                    }
+                }
+                _ => {}
+            }
+            let v23 = &constructor_scalar_size(ctx, arg1);
+            let v24 = &constructor_fpu_cmp(ctx, v23, arg3, arg4);
+            let v26 = C::cond_br_cond(ctx, &Cond::Lt);
+            let v11 = &C::trap_code_integer_overflow(ctx);
+            let v27 = MInst::TrapIf {
+                kind: v26,
+                trap_code: v11.clone(),
+            };
+            let v28 = ConsumesFlags::ConsumesFlagsReturnsReg {
+                inst: v27,
+                result: arg3,
+            };
+            let v29 = constructor_with_flags(ctx, v24, &v28);
+            let v30 = C::value_regs_get(ctx, v29, 0x0);
+            // Rule at src/isa/aarch64/inst.isle line 3434.
+            return v30;
+        }
+        false => {
+            let v23 = &constructor_scalar_size(ctx, arg1);
+            let v24 = &constructor_fpu_cmp(ctx, v23, arg3, arg4);
+            let v31 = C::cond_br_cond(ctx, &Cond::Le);
+            let v11 = &C::trap_code_integer_overflow(ctx);
+            let v32 = MInst::TrapIf {
+                kind: v31,
+                trap_code: v11.clone(),
+            };
+            let v33 = ConsumesFlags::ConsumesFlagsReturnsReg {
+                inst: v32,
+                result: arg3,
+            };
+            let v34 = constructor_with_flags(ctx, v24, &v33);
+            let v35 = C::value_regs_get(ctx, v34, 0x0);
+            // Rule at src/isa/aarch64/inst.isle line 3442.
+            return v35;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "fpu_to_int_underflow_check", "src/isa/aarch64/inst.isle line 3417"
+    )
+}
+
+// Generated as internal constructor for term fpu_to_int_overflow_check.
+pub fn constructor_fpu_to_int_overflow_check<C: Context>(
+    ctx: &mut C,
+    arg0: &ScalarSize,
+    arg1: Reg,
+    arg2: Reg,
+) -> Reg {
+    let v3 = &constructor_fpu_cmp(ctx, arg0, arg1, arg2);
+    let v5 = C::cond_br_cond(ctx, &Cond::Ge);
+    let v6 = &C::trap_code_integer_overflow(ctx);
+    let v7 = MInst::TrapIf {
+        kind: v5,
+        trap_code: v6.clone(),
+    };
+    let v8 = ConsumesFlags::ConsumesFlagsReturnsReg {
+        inst: v7,
+        result: arg1,
+    };
+    let v9 = constructor_with_flags(ctx, v3, &v8);
+    let v11 = C::value_regs_get(ctx, v9, 0x0);
+    // Rule at src/isa/aarch64/inst.isle line 3452.
+    return v11;
+}
+
+// Generated as internal constructor for term fpu_to_int_cvt.
+pub fn constructor_fpu_to_int_cvt<C: Context>(
+    ctx: &mut C,
+    arg0: &FpuToIntOp,
+    arg1: Reg,
+    arg2: bool,
+    arg3: Type,
+    arg4: Type,
+) -> Reg {
+    let v5 = &constructor_scalar_size(ctx, arg3);
+    let v8 = constructor_fpu_to_int_nan_check(ctx, v5, arg1);
+    let v6 = C::ty_bits(ctx, arg3);
+    let v7 = C::ty_bits(ctx, arg4);
+    let v9 = C::min_fp_value(ctx, arg2, v6, v7);
+    let v10 = constructor_fpu_to_int_underflow_check(ctx, arg2, arg3, arg4, v8, v9);
+    let v11 = C::max_fp_value(ctx, arg2, v6, v7);
+    let v12 = constructor_fpu_to_int_overflow_check(ctx, v5, v10, v11);
+    let v13 = constructor_fpu_to_int(ctx, arg0, v12);
+    // Rule at src/isa/aarch64/inst.isle line 3468.
+    return v13;
+}
+
+// Generated as internal constructor for term fpu_to_int_cvt_sat.
+pub fn constructor_fpu_to_int_cvt_sat<C: Context>(
+    ctx: &mut C,
+    arg0: &FpuToIntOp,
+    arg1: Reg,
+    arg2: bool,
+    arg3: Type,
+) -> Reg {
+    match arg3 {
+        I32 => {
+            let v4 = constructor_fpu_to_int(ctx, arg0, arg1);
+            // Rule at src/isa/aarch64/inst.isle line 3487.
+            return v4;
+        }
+        I64 => {
+            let v4 = constructor_fpu_to_int(ctx, arg0, arg1);
+            // Rule at src/isa/aarch64/inst.isle line 3485.
+            return v4;
+        }
+        _ => {}
+    }
+    match arg2 {
+        true => {
+            let v5 = C::fits_in_16(ctx, arg3);
+            if let Some(v6) = v5 {
+                let v4 = constructor_fpu_to_int(ctx, arg0, arg1);
+                let v15 = constructor_signed_max(ctx, v6);
+                let v16 = constructor_signed_min(ctx, v6);
+                let v17 = &constructor_operand_size(ctx, v6);
+                let v18 = &constructor_cmp(ctx, v17, v4, v15);
+                let v20 = &constructor_csel(ctx, &Cond::Gt, v15, v4);
+                let v21 = constructor_with_flags_reg(ctx, v18, v20);
+                let v22 = &constructor_operand_size(ctx, v6);
+                let v23 = &constructor_cmp(ctx, v22, v21, v16);
+                let v25 = &constructor_csel(ctx, &Cond::Lt, v16, v21);
+                let v26 = constructor_with_flags_reg(ctx, v23, v25);
+                // Rule at src/isa/aarch64/inst.isle line 3495.
+                return v26;
+            }
+        }
+        false => {
+            let v5 = C::fits_in_16(ctx, arg3);
+            if let Some(v6) = v5 {
+                let v4 = constructor_fpu_to_int(ctx, arg0, arg1);
+                let v8 = C::ty_mask(ctx, v6);
+                let v9 = constructor_imm(ctx, v6, &ImmExtend::Zero, v8);
+                let v11 = &constructor_cmp(ctx, &OperandSize::Size32, v4, v9);
+                let v13 = &constructor_csel(ctx, &Cond::Hi, v9, v4);
+                let v14 = constructor_with_flags_reg(ctx, v11, v13);
+                // Rule at src/isa/aarch64/inst.isle line 3489.
+                return v14;
+            }
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "fpu_to_int_cvt_sat", "src/isa/aarch64/inst.isle line 3484"
+    )
+}
+
+// Generated as internal constructor for term signed_min.
+pub fn constructor_signed_min<C: Context>(ctx: &mut C, arg0: Type) -> Reg {
+    match arg0 {
+        I8 => {
+            let v4 = constructor_imm(ctx, I8, &ImmExtend::Sign, 0x80);
+            // Rule at src/isa/aarch64/inst.isle line 3508.
+            return v4;
+        }
+        I16 => {
+            let v7 = constructor_imm(ctx, I16, &ImmExtend::Sign, 0x8000);
+            // Rule at src/isa/aarch64/inst.isle line 3509.
+            return v7;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "signed_min", "src/isa/aarch64/inst.isle line 3507"
+    )
+}
+
+// Generated as internal constructor for term signed_max.
+pub fn constructor_signed_max<C: Context>(ctx: &mut C, arg0: Type) -> Reg {
+    match arg0 {
+        I8 => {
+            let v4 = constructor_imm(ctx, I8, &ImmExtend::Sign, 0x7F);
+            // Rule at src/isa/aarch64/inst.isle line 3512.
+            return v4;
+        }
+        I16 => {
+            let v7 = constructor_imm(ctx, I16, &ImmExtend::Sign, 0x7FFF);
+            // Rule at src/isa/aarch64/inst.isle line 3513.
+            return v7;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "signed_max", "src/isa/aarch64/inst.isle line 3511"
+    )
+}
+
+// Generated as internal constructor for term fpu_to_int.
+pub fn constructor_fpu_to_int<C: Context>(ctx: &mut C, arg0: &FpuToIntOp, arg1: Reg) -> Reg {
+    let v3 = C::temp_writable_reg(ctx, I64);
+    let v4 = MInst::FpuToInt {
+        op: arg0.clone(),
+        rd: v3,
+        rn: arg1,
+    };
+    let v5 = C::emit(ctx, &v4);
+    let v6 = C::writable_reg_to_reg(ctx, v3);
+    // Rule at src/isa/aarch64/inst.isle line 3516.
+    return v6;
+}
+
+// Generated as internal constructor for term int_to_fpu.
+pub fn constructor_int_to_fpu<C: Context>(ctx: &mut C, arg0: &IntToFpuOp, arg1: Reg) -> Reg {
+    let v3 = C::temp_writable_reg(ctx, I8X16);
+    let v4 = MInst::IntToFpu {
+        op: arg0.clone(),
+        rd: v3,
+        rn: arg1,
+    };
+    let v5 = C::emit(ctx, &v4);
+    let v6 = C::writable_reg_to_reg(ctx, v3);
+    // Rule at src/isa/aarch64/inst.isle line 3524.
+    return v6;
+}
+
+// Generated as internal constructor for term write_pinned_reg.
+pub fn constructor_write_pinned_reg<C: Context>(ctx: &mut C, arg0: Reg) -> SideEffectNoResult {
+    let v1 = C::preg_pinned(ctx);
+    let v2 = &constructor_mov_to_preg(ctx, v1, arg0);
+    // Rule at src/isa/aarch64/inst.isle line 3540.
+    return v2.clone();
+}
+
+// Generated as internal constructor for term compute_stack_addr.
+pub fn constructor_compute_stack_addr<C: Context>(
+    ctx: &mut C,
+    arg0: StackSlot,
+    arg1: Offset32,
+) -> Reg {
+    let v3 = C::temp_writable_reg(ctx, I64);
+    let v4 = &C::abi_stackslot_addr(ctx, v3, arg0, arg1);
+    let v5 = C::emit(ctx, v4);
+    let v6 = C::writable_reg_to_reg(ctx, v3);
+    // Rule at src/isa/aarch64/inst.isle line 3546.
+    return v6;
+}
+
+// Generated as internal constructor for term vec_cmp_vc.
+pub fn constructor_vec_cmp_vc<C: Context>(
+    ctx: &mut C,
+    arg0: Reg,
+    arg1: Reg,
+    arg2: &VectorSize,
+) -> Reg {
+    let v4 = constructor_vec_rrr(ctx, &VecALUOp::Fcmeq, arg0, arg0, arg2);
+    let v5 = constructor_vec_rrr(ctx, &VecALUOp::Fcmeq, arg1, arg1, arg2);
+    let v7 = constructor_vec_rrr(ctx, &VecALUOp::And, v4, v5, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 3554.
+    return v7;
+}
+
+// Generated as internal constructor for term vec_cmp.
+pub fn constructor_vec_cmp<C: Context>(
+    ctx: &mut C,
+    arg0: Reg,
+    arg1: Reg,
+    arg2: Type,
+    arg3: &Cond,
+) -> Reg {
+    match arg3 {
+        &Cond::Eq => {
+            let v20 = C::ty_vector_not_float(ctx, arg2);
+            if let Some(v21) = v20 {
+                let v6 = &constructor_vector_size(ctx, arg2);
+                let v23 = constructor_vec_rrr(ctx, &VecALUOp::Cmeq, arg0, arg1, v6);
+                // Rule at src/isa/aarch64/inst.isle line 3598.
+                return v23;
+            }
+            let v4 = C::ty_vector_float(ctx, arg2);
+            if let Some(v5) = v4 {
+                let v6 = &constructor_vector_size(ctx, arg2);
+                let v12 = constructor_vec_rrr(ctx, &VecALUOp::Fcmeq, arg0, arg1, v6);
+                // Rule at src/isa/aarch64/inst.isle line 3576.
+                return v12;
+            }
+        }
+        &Cond::Ne => {
+            let v20 = C::ty_vector_not_float(ctx, arg2);
+            if let Some(v21) = v20 {
+                let v6 = &constructor_vector_size(ctx, arg2);
+                let v23 = constructor_vec_rrr(ctx, &VecALUOp::Cmeq, arg0, arg1, v6);
+                let v9 = &constructor_vector_size(ctx, arg2);
+                let v24 = constructor_vec_misc(ctx, &VecMisc2::Not, v23, v9);
+                // Rule at src/isa/aarch64/inst.isle line 3601.
+                return v24;
+            }
+            let v4 = C::ty_vector_float(ctx, arg2);
+            if let Some(v5) = v4 {
+                let v6 = &constructor_vector_size(ctx, arg2);
+                let v12 = constructor_vec_rrr(ctx, &VecALUOp::Fcmeq, arg0, arg1, v6);
+                let v9 = &constructor_vector_size(ctx, arg2);
+                let v13 = constructor_vec_misc(ctx, &VecMisc2::Not, v12, v9);
+                // Rule at src/isa/aarch64/inst.isle line 3579.
+                return v13;
+            }
+        }
+        &Cond::Hs => {
+            let v20 = C::ty_vector_not_float(ctx, arg2);
+            if let Some(v21) = v20 {
+                let v6 = &constructor_vector_size(ctx, arg2);
+                let v30 = constructor_vec_rrr(ctx, &VecALUOp::Cmhs, arg0, arg1, v6);
+                // Rule at src/isa/aarch64/inst.isle line 3611.
+                return v30;
+            }
+        }
+        &Cond::Lo => {
+            let v20 = C::ty_vector_not_float(ctx, arg2);
+            if let Some(v21) = v20 {
+                let v6 = &constructor_vector_size(ctx, arg2);
+                let v36 = constructor_vec_rrr(ctx, &VecALUOp::Cmhi, arg1, arg0, v6);
+                // Rule at src/isa/aarch64/inst.isle line 3627.
+                return v36;
+            }
+        }
+        &Cond::Mi => {
+            let v4 = C::ty_vector_float(ctx, arg2);
+            if let Some(v5) = v4 {
+                let v6 = &constructor_vector_size(ctx, arg2);
+                let v18 = constructor_vec_rrr(ctx, &VecALUOp::Fcmgt, arg1, arg0, v6);
+                // Rule at src/isa/aarch64/inst.isle line 3590.
+                return v18;
+            }
+        }
+        &Cond::Vs => {
+            let v4 = C::ty_vector_float(ctx, arg2);
+            if let Some(v5) = v4 {
+                let v6 = &constructor_vector_size(ctx, arg2);
+                let v7 = constructor_vec_cmp_vc(ctx, arg0, arg1, v6);
+                let v9 = &constructor_vector_size(ctx, arg2);
+                let v10 = constructor_vec_misc(ctx, &VecMisc2::Not, v7, v9);
+                // Rule at src/isa/aarch64/inst.isle line 3566.
+                return v10;
+            }
+        }
+        &Cond::Vc => {
+            let v4 = C::ty_vector_float(ctx, arg2);
+            if let Some(v5) = v4 {
+                let v6 = &constructor_vector_size(ctx, arg2);
+                let v7 = constructor_vec_cmp_vc(ctx, arg0, arg1, v6);
+                // Rule at src/isa/aarch64/inst.isle line 3563.
+                return v7;
+            }
+        }
+        &Cond::Hi => {
+            let v20 = C::ty_vector_not_float(ctx, arg2);
+            if let Some(v21) = v20 {
+                let v6 = &constructor_vector_size(ctx, arg2);
+                let v32 = constructor_vec_rrr(ctx, &VecALUOp::Cmhi, arg0, arg1, v6);
+                // Rule at src/isa/aarch64/inst.isle line 3614.
+                return v32;
+            }
+        }
+        &Cond::Ls => {
+            let v20 = C::ty_vector_not_float(ctx, arg2);
+            if let Some(v21) = v20 {
+                let v6 = &constructor_vector_size(ctx, arg2);
+                let v35 = constructor_vec_rrr(ctx, &VecALUOp::Cmhs, arg1, arg0, v6);
+                // Rule at src/isa/aarch64/inst.isle line 3624.
+                return v35;
+            }
+            let v4 = C::ty_vector_float(ctx, arg2);
+            if let Some(v5) = v4 {
+                let v6 = &constructor_vector_size(ctx, arg2);
+                let v19 = constructor_vec_rrr(ctx, &VecALUOp::Fcmge, arg1, arg0, v6);
+                // Rule at src/isa/aarch64/inst.isle line 3593.
+                return v19;
+            }
+        }
+        &Cond::Ge => {
+            let v20 = C::ty_vector_not_float(ctx, arg2);
+            if let Some(v21) = v20 {
+                let v6 = &constructor_vector_size(ctx, arg2);
+                let v26 = constructor_vec_rrr(ctx, &VecALUOp::Cmge, arg0, arg1, v6);
+                // Rule at src/isa/aarch64/inst.isle line 3605.
+                return v26;
+            }
+            let v4 = C::ty_vector_float(ctx, arg2);
+            if let Some(v5) = v4 {
+                let v6 = &constructor_vector_size(ctx, arg2);
+                let v15 = constructor_vec_rrr(ctx, &VecALUOp::Fcmge, arg0, arg1, v6);
+                // Rule at src/isa/aarch64/inst.isle line 3583.
+                return v15;
+            }
+        }
+        &Cond::Lt => {
+            let v20 = C::ty_vector_not_float(ctx, arg2);
+            if let Some(v21) = v20 {
+                let v6 = &constructor_vector_size(ctx, arg2);
+                let v34 = constructor_vec_rrr(ctx, &VecALUOp::Cmgt, arg1, arg0, v6);
+                // Rule at src/isa/aarch64/inst.isle line 3621.
+                return v34;
+            }
+        }
+        &Cond::Gt => {
+            let v20 = C::ty_vector_not_float(ctx, arg2);
+            if let Some(v21) = v20 {
+                let v6 = &constructor_vector_size(ctx, arg2);
+                let v28 = constructor_vec_rrr(ctx, &VecALUOp::Cmgt, arg0, arg1, v6);
+                // Rule at src/isa/aarch64/inst.isle line 3608.
+                return v28;
+            }
+            let v4 = C::ty_vector_float(ctx, arg2);
+            if let Some(v5) = v4 {
+                let v6 = &constructor_vector_size(ctx, arg2);
+                let v17 = constructor_vec_rrr(ctx, &VecALUOp::Fcmgt, arg0, arg1, v6);
+                // Rule at src/isa/aarch64/inst.isle line 3586.
+                return v17;
+            }
+        }
+        &Cond::Le => {
+            let v20 = C::ty_vector_not_float(ctx, arg2);
+            if let Some(v21) = v20 {
+                let v6 = &constructor_vector_size(ctx, arg2);
+                let v33 = constructor_vec_rrr(ctx, &VecALUOp::Cmge, arg1, arg0, v6);
+                // Rule at src/isa/aarch64/inst.isle line 3618.
+                return v33;
+            }
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_cmp", "src/isa/aarch64/inst.isle line 3560"
+    )
+}
+
+// Generated as internal constructor for term vanytrue.
+pub fn constructor_vanytrue<C: Context>(ctx: &mut C, arg0: Reg, arg1: Type) -> ProducesFlags {
+    let v2 = C::ty_vec128(ctx, arg1);
+    if let Some(v3) = v2 {
+        let v6 = constructor_vec_rrr(ctx, &VecALUOp::Umaxp, arg0, arg0, &VectorSize::Size32x4);
+        let v9 = constructor_mov_from_vec(ctx, v6, 0x0, &ScalarSize::Size64);
+        let v11 = C::u8_into_imm12(ctx, 0x0);
+        let v12 = &constructor_cmp_imm(ctx, &OperandSize::Size64, v9, v11);
+        // Rule at src/isa/aarch64/inst.isle line 3639.
+        return v12.clone();
+    }
+    let v13 = C::ty_vec64_ctor(ctx, arg1);
+    if let Some(v14) = v13 {
+        let v15 = constructor_mov_from_vec(ctx, arg0, 0x0, &ScalarSize::Size64);
+        let v16 = C::u8_into_imm12(ctx, 0x0);
+        let v17 = &constructor_cmp_imm(ctx, &OperandSize::Size64, v15, v16);
+        // Rule at src/isa/aarch64/inst.isle line 3643.
+        return v17.clone();
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vanytrue", "src/isa/aarch64/inst.isle line 3638"
+    )
+}
+
+// Generated as internal constructor for term elf_tls_get_addr.
+pub fn constructor_elf_tls_get_addr<C: Context>(ctx: &mut C, arg0: ExternalName) -> Reg {
+    let v2 = C::temp_writable_reg(ctx, I64);
+    let v3 = MInst::ElfTlsGetAddr {
+        symbol: arg0,
+        rd: v2,
+    };
+    let v4 = C::emit(ctx, &v3);
+    let v5 = C::writable_reg_to_reg(ctx, v2);
+    // Rule at src/isa/aarch64/inst.isle line 3652.
+    return v5;
+}
+
+// Generated as internal constructor for term macho_tls_get_addr.
+pub fn constructor_macho_tls_get_addr<C: Context>(ctx: &mut C, arg0: ExternalName) -> Reg {
+    let v2 = C::temp_writable_reg(ctx, I64);
+    let v3 = MInst::MachOTlsGetAddr {
+        symbol: arg0,
+        rd: v2,
+    };
+    let v4 = C::emit(ctx, &v3);
+    let v5 = C::writable_reg_to_reg(ctx, v2);
+    // Rule at src/isa/aarch64/inst.isle line 3658.
+    return v5;
+}
+
+// Generated as internal constructor for term flags_and_cc.
+pub fn constructor_flags_and_cc<C: Context>(
+    ctx: &mut C,
+    arg0: &ProducesFlags,
+    arg1: &IntCC,
+) -> FlagsAndCC {
+    let v2 = FlagsAndCC::FlagsAndCC {
+        flags: arg0.clone(),
+        cc: arg1.clone(),
+    };
+    // Rule at src/isa/aarch64/inst.isle line 3669.
+    return v2;
+}
+
+// Generated as internal constructor for term flags_and_cc_to_bool.
+pub fn constructor_flags_and_cc_to_bool<C: Context>(ctx: &mut C, arg0: &FlagsAndCC) -> ValueRegs {
+    if let &FlagsAndCC::FlagsAndCC {
+        flags: ref v1,
+        cc: ref v2,
+    } = arg0
+    {
+        let v3 = &C::cond_code(ctx, v2);
+        let v4 = &constructor_materialize_bool_result(ctx, v3);
+        let v5 = constructor_with_flags(ctx, v1, v4);
+        // Rule at src/isa/aarch64/inst.isle line 3673.
+        return v5;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "flags_and_cc_to_bool", "src/isa/aarch64/inst.isle line 3672"
+    )
+}
+
+// Generated as internal constructor for term flags_and_cc_flags.
+pub fn constructor_flags_and_cc_flags<C: Context>(ctx: &mut C, arg0: &FlagsAndCC) -> ProducesFlags {
+    if let &FlagsAndCC::FlagsAndCC {
+        flags: ref v1,
+        cc: ref v2,
+    } = arg0
+    {
+        // Rule at src/isa/aarch64/inst.isle line 3678.
+        return v1.clone();
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "flags_and_cc_flags", "src/isa/aarch64/inst.isle line 3677"
+    )
+}
+
+// Generated as internal constructor for term flags_and_cc_cc.
+pub fn constructor_flags_and_cc_cc<C: Context>(ctx: &mut C, arg0: &FlagsAndCC) -> IntCC {
+    if let &FlagsAndCC::FlagsAndCC {
+        flags: ref v1,
+        cc: ref v2,
+    } = arg0
+    {
+        // Rule at src/isa/aarch64/inst.isle line 3682.
+        return v2.clone();
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "flags_and_cc_cc", "src/isa/aarch64/inst.isle line 3681"
+    )
+}
+
+// Generated as internal constructor for term lower_icmp.
+pub fn constructor_lower_icmp<C: Context>(
+    ctx: &mut C,
+    arg0: &IntCC,
+    arg1: Value,
+    arg2: Value,
+    arg3: Type,
+) -> FlagsAndCC {
+    let v4 = C::fits_in_16(ctx, arg3);
+    if let Some(v5) = v4 {
+        let v6 = &C::signed_cond_code(ctx, arg0);
+        if let Some(v7) = v6 {
+            let v8 = constructor_put_in_reg_sext32(ctx, arg1);
+            let v9 = &constructor_operand_size(ctx, v5);
+            let v10 = C::put_in_reg(ctx, arg2);
+            let v12 = &constructor_lower_extend_op(ctx, v5, &ArgumentExtension::Sext);
+            let v13 = &constructor_cmp_extend(ctx, v9, v8, v10, v12);
+            let v14 = &constructor_flags_and_cc(ctx, v13, arg0);
+            // Rule at src/isa/aarch64/inst.isle line 3716.
+            return v14.clone();
+        }
+    }
+    if arg3 == I128 {
+        match arg0 {
+            &IntCC::Equal => {
+                let v37 = &constructor_lower_icmp_i128_eq_ne(ctx, arg1, arg2);
+                let v39 = &constructor_flags_and_cc(ctx, v37, &IntCC::Equal);
+                // Rule at src/isa/aarch64/inst.isle line 3782.
+                return v39.clone();
+            }
+            &IntCC::NotEqual => {
+                let v37 = &constructor_lower_icmp_i128_eq_ne(ctx, arg1, arg2);
+                let v41 = &constructor_flags_and_cc(ctx, v37, &IntCC::NotEqual);
+                // Rule at src/isa/aarch64/inst.isle line 3784.
+                return v41.clone();
+            }
+            _ => {}
+        }
+    }
+    if let Some(v5) = v4 {
+        let v15 = C::def_inst(ctx, arg2);
+        if let Some(v16) = v15 {
+            let v17 = &C::inst_data(ctx, v16);
+            if let &InstructionData::UnaryImm {
+                opcode: ref v18,
+                imm: v19,
+            } = v17
+            {
+                if let &Opcode::Iconst = v18 {
+                    let v20 = C::u64_from_imm64(ctx, v19);
+                    let v21 = C::imm12_from_u64(ctx, v20);
+                    if let Some(v22) = v21 {
+                        let v23 = constructor_put_in_reg_zext32(ctx, arg1);
+                        let v9 = &constructor_operand_size(ctx, v5);
+                        let v24 = &constructor_cmp_imm(ctx, v9, v23, v22);
+                        let v25 = &constructor_flags_and_cc(ctx, v24, arg0);
+                        // Rule at src/isa/aarch64/inst.isle line 3720.
+                        return v25.clone();
+                    }
+                }
+            }
+        }
+        let v23 = constructor_put_in_reg_zext32(ctx, arg1);
+        let v9 = &constructor_operand_size(ctx, v5);
+        let v10 = C::put_in_reg(ctx, arg2);
+        let v27 = &constructor_lower_extend_op(ctx, v5, &ArgumentExtension::Uext);
+        let v28 = &constructor_cmp_extend(ctx, v9, v23, v10, v27);
+        let v29 = &constructor_flags_and_cc(ctx, v28, arg0);
+        // Rule at src/isa/aarch64/inst.isle line 3723.
+        return v29.clone();
+    }
+    let v30 = C::ty_int_ref_scalar_64(ctx, arg3);
+    if let Some(v31) = v30 {
+        let v15 = C::def_inst(ctx, arg2);
+        if let Some(v16) = v15 {
+            let v17 = &C::inst_data(ctx, v16);
+            if let &InstructionData::UnaryImm {
+                opcode: ref v18,
+                imm: v19,
+            } = v17
+            {
+                if let &Opcode::Iconst = v18 {
+                    let v20 = C::u64_from_imm64(ctx, v19);
+                    let v32 = &constructor_lower_icmp_const(ctx, arg0, arg1, v20, arg3);
+                    // Rule at src/isa/aarch64/inst.isle line 3726.
+                    return v32.clone();
+                }
+            }
+        }
+        let v33 = &constructor_operand_size(ctx, arg3);
+        let v34 = C::put_in_reg(ctx, arg1);
+        let v10 = C::put_in_reg(ctx, arg2);
+        let v35 = &constructor_cmp(ctx, v33, v34, v10);
+        let v36 = &constructor_flags_and_cc(ctx, v35, arg0);
+        // Rule at src/isa/aarch64/inst.isle line 3729.
+        return v36.clone();
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "lower_icmp", "src/isa/aarch64/inst.isle line 3687"
+    )
+}
+
+// Generated as internal constructor for term lower_icmp_into_reg.
+pub fn constructor_lower_icmp_into_reg<C: Context>(
+    ctx: &mut C,
+    arg0: &IntCC,
+    arg1: Value,
+    arg2: Value,
+    arg3: Type,
+    arg4: Type,
+) -> ValueRegs {
+    let v4 = C::multi_lane(ctx, arg3);
+    if let Some(v5) = v4 {
+        let v9 = &C::cond_code(ctx, arg0);
+        let v10 = C::put_in_reg(ctx, arg1);
+        let v11 = C::put_in_reg(ctx, arg2);
+        let v12 = constructor_vec_cmp(ctx, v10, v11, arg3, v9);
+        let v13 = C::value_reg(ctx, v12);
+        // Rule at src/isa/aarch64/inst.isle line 3697.
+        return v13;
+    }
+    if arg3 == I128 {
+        if arg4 == I8 {
+            match arg0 {
+                &IntCC::Equal => {
+                    let v9 = &C::cond_code(ctx, arg0);
+                    let v19 = &constructor_lower_icmp(ctx, arg0, arg1, arg2, I128);
+                    let v20 = constructor_flags_and_cc_to_bool(ctx, v19);
+                    // Rule at src/isa/aarch64/inst.isle line 3759.
+                    return v20;
+                }
+                &IntCC::NotEqual => {
+                    let v9 = &C::cond_code(ctx, arg0);
+                    let v19 = &constructor_lower_icmp(ctx, arg0, arg1, arg2, I128);
+                    let v20 = constructor_flags_and_cc_to_bool(ctx, v19);
+                    // Rule at src/isa/aarch64/inst.isle line 3763.
+                    return v20;
+                }
+                _ => {}
+            }
+            let v21 = &C::intcc_unsigned(ctx, arg0);
+            let v22 = &C::cond_code(ctx, v21);
+            let v23 = &C::cond_code(ctx, arg0);
+            let v24 = C::put_in_regs(ctx, arg1);
+            let v25 = C::put_in_regs(ctx, arg2);
+            let v27 = C::value_regs_get(ctx, v24, 0x0);
+            let v29 = C::value_regs_get(ctx, v24, 0x1);
+            let v30 = C::value_regs_get(ctx, v25, 0x0);
+            let v31 = C::value_regs_get(ctx, v25, 0x1);
+            let v33 = &constructor_cmp(ctx, &OperandSize::Size64, v27, v30);
+            let v34 = &constructor_materialize_bool_result(ctx, v22);
+            let v35 = constructor_with_flags_reg(ctx, v33, v34);
+            let v36 = &constructor_cmp(ctx, &OperandSize::Size64, v29, v31);
+            let v37 = &constructor_lower_icmp_i128_consumer(ctx, v23, v35);
+            let v38 = constructor_with_flags(ctx, v36, v37);
+            // Rule at src/isa/aarch64/inst.isle line 3792.
+            return v38;
+        }
+    }
+    let v14 = C::ty_int_ref_scalar_64(ctx, arg3);
+    if let Some(v15) = v14 {
+        let v9 = &C::cond_code(ctx, arg0);
+        let v16 = &constructor_lower_icmp(ctx, arg0, arg1, arg2, arg3);
+        let v17 = constructor_flags_and_cc_to_bool(ctx, v16);
+        // Rule at src/isa/aarch64/inst.isle line 3711.
+        return v17;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "lower_icmp_into_reg", "src/isa/aarch64/inst.isle line 3688"
+    )
+}
+
+// Generated as internal constructor for term lower_icmp_into_flags.
+pub fn constructor_lower_icmp_into_flags<C: Context>(
+    ctx: &mut C,
+    arg0: &IntCC,
+    arg1: Value,
+    arg2: Value,
+    arg3: Type,
+) -> FlagsAndCC {
+    match arg0 {
+        &IntCC::SignedGreaterThan => {
+            if arg3 == I128 {
+                let v7 = constructor_lower_icmp_into_reg(ctx, arg0, arg1, arg2, I128, I8);
+                let v9 = C::value_regs_get(ctx, v7, 0x0);
+                let v25 = C::zero_reg(ctx);
+                let v26 = &constructor_cmp(ctx, &OperandSize::Size64, v9, v25);
+                let v27 = &constructor_flags_and_cc(ctx, v26, arg0);
+                // Rule at src/isa/aarch64/inst.isle line 3887.
+                return v27.clone();
+            }
+        }
+        &IntCC::SignedGreaterThanOrEqual => {
+            if arg3 == I128 {
+                let v7 = constructor_lower_icmp_into_reg(ctx, arg0, arg1, arg2, I128, I8);
+                let v9 = C::value_regs_get(ctx, v7, 0x0);
+                let v13 = constructor_imm(ctx, I64, &ImmExtend::Sign, 0x1);
+                let v15 = &constructor_cmp(ctx, &OperandSize::Size64, v9, v13);
+                let v16 = &constructor_flags_and_cc(ctx, v15, arg0);
+                // Rule at src/isa/aarch64/inst.isle line 3866.
+                return v16.clone();
+            }
+        }
+        &IntCC::SignedLessThan => {
+            if arg3 == I128 {
+                let v7 = constructor_lower_icmp_into_reg(ctx, arg0, arg1, arg2, I128, I8);
+                let v9 = C::value_regs_get(ctx, v7, 0x0);
+                let v25 = C::zero_reg(ctx);
+                let v28 = &constructor_cmp(ctx, &OperandSize::Size64, v25, v9);
+                let v29 = &constructor_flags_and_cc(ctx, v28, arg0);
+                // Rule at src/isa/aarch64/inst.isle line 3895.
+                return v29.clone();
+            }
+        }
+        &IntCC::SignedLessThanOrEqual => {
+            if arg3 == I128 {
+                let v7 = constructor_lower_icmp_into_reg(ctx, arg0, arg1, arg2, I128, I8);
+                let v9 = C::value_regs_get(ctx, v7, 0x0);
+                let v13 = constructor_imm(ctx, I64, &ImmExtend::Sign, 0x1);
+                let v21 = &constructor_cmp(ctx, &OperandSize::Size64, v13, v9);
+                let v22 = &constructor_flags_and_cc(ctx, v21, arg0);
+                // Rule at src/isa/aarch64/inst.isle line 3876.
+                return v22.clone();
+            }
+        }
+        &IntCC::UnsignedGreaterThan => {
+            if arg3 == I128 {
+                let v7 = constructor_lower_icmp_into_reg(ctx, arg0, arg1, arg2, I128, I8);
+                let v9 = C::value_regs_get(ctx, v7, 0x0);
+                let v25 = C::zero_reg(ctx);
+                let v26 = &constructor_cmp(ctx, &OperandSize::Size64, v9, v25);
+                let v27 = &constructor_flags_and_cc(ctx, v26, arg0);
+                // Rule at src/isa/aarch64/inst.isle line 3891.
+                return v27.clone();
+            }
+        }
+        &IntCC::UnsignedGreaterThanOrEqual => {
+            if arg3 == I128 {
+                let v7 = constructor_lower_icmp_into_reg(ctx, arg0, arg1, arg2, I128, I8);
+                let v9 = C::value_regs_get(ctx, v7, 0x0);
+                let v18 = constructor_imm(ctx, I64, &ImmExtend::Zero, 0x1);
+                let v19 = &constructor_cmp(ctx, &OperandSize::Size64, v9, v18);
+                let v20 = &constructor_flags_and_cc(ctx, v19, arg0);
+                // Rule at src/isa/aarch64/inst.isle line 3871.
+                return v20.clone();
+            }
+        }
+        &IntCC::UnsignedLessThan => {
+            if arg3 == I128 {
+                let v7 = constructor_lower_icmp_into_reg(ctx, arg0, arg1, arg2, I128, I8);
+                let v9 = C::value_regs_get(ctx, v7, 0x0);
+                let v25 = C::zero_reg(ctx);
+                let v28 = &constructor_cmp(ctx, &OperandSize::Size64, v25, v9);
+                let v29 = &constructor_flags_and_cc(ctx, v28, arg0);
+                // Rule at src/isa/aarch64/inst.isle line 3899.
+                return v29.clone();
+            }
+        }
+        &IntCC::UnsignedLessThanOrEqual => {
+            if arg3 == I128 {
+                let v7 = constructor_lower_icmp_into_reg(ctx, arg0, arg1, arg2, I128, I8);
+                let v9 = C::value_regs_get(ctx, v7, 0x0);
+                let v18 = constructor_imm(ctx, I64, &ImmExtend::Zero, 0x1);
+                let v23 = &constructor_cmp(ctx, &OperandSize::Size64, v18, v9);
+                let v24 = &constructor_flags_and_cc(ctx, v23, arg0);
+                // Rule at src/isa/aarch64/inst.isle line 3881.
+                return v24.clone();
+            }
+        }
+        _ => {}
+    }
+    let v4 = &constructor_lower_icmp(ctx, arg0, arg1, arg2, arg3);
+    // Rule at src/isa/aarch64/inst.isle line 3693.
+    return v4.clone();
+}
+
+// Generated as internal constructor for term lower_icmp_const.
+pub fn constructor_lower_icmp_const<C: Context>(
+    ctx: &mut C,
+    arg0: &IntCC,
+    arg1: Value,
+    arg2: u64,
+    arg3: Type,
+) -> FlagsAndCC {
+    let v4 = C::ty_int_ref_scalar_64(ctx, arg3);
+    if let Some(v5) = v4 {
+        match arg0 {
+            &IntCC::SignedGreaterThanOrEqual => {
+                let v6 = C::u64_is_odd(ctx, arg2);
+                if v6 == true {
+                    let v8 = C::u64_sub(ctx, arg2, 0x1);
+                    let v9 = C::imm12_from_u64(ctx, v8);
+                    if let Some(v10) = v9 {
+                        let v11 = &constructor_operand_size(ctx, arg3);
+                        let v12 = C::put_in_reg(ctx, arg1);
+                        let v13 = &constructor_cmp_imm(ctx, v11, v12, v10);
+                        let v17 = &constructor_flags_and_cc(ctx, v13, &IntCC::SignedGreaterThan);
+                        // Rule at src/isa/aarch64/inst.isle line 3744.
+                        return v17.clone();
+                    }
+                }
+            }
+            &IntCC::UnsignedGreaterThanOrEqual => {
+                let v6 = C::u64_is_odd(ctx, arg2);
+                if v6 == true {
+                    let v8 = C::u64_sub(ctx, arg2, 0x1);
+                    let v9 = C::imm12_from_u64(ctx, v8);
+                    if let Some(v10) = v9 {
+                        let v11 = &constructor_operand_size(ctx, arg3);
+                        let v12 = C::put_in_reg(ctx, arg1);
+                        let v13 = &constructor_cmp_imm(ctx, v11, v12, v10);
+                        let v15 = &constructor_flags_and_cc(ctx, v13, &IntCC::UnsignedGreaterThan);
+                        // Rule at src/isa/aarch64/inst.isle line 3739.
+                        return v15.clone();
+                    }
+                }
+            }
+            _ => {}
+        }
+        let v18 = C::imm12_from_u64(ctx, arg2);
+        if let Some(v19) = v18 {
+            let v11 = &constructor_operand_size(ctx, arg3);
+            let v12 = C::put_in_reg(ctx, arg1);
+            let v20 = &constructor_cmp_imm(ctx, v11, v12, v19);
+            let v21 = &constructor_flags_and_cc(ctx, v20, arg0);
+            // Rule at src/isa/aarch64/inst.isle line 3750.
+            return v21.clone();
+        }
+        let v11 = &constructor_operand_size(ctx, arg3);
+        let v12 = C::put_in_reg(ctx, arg1);
+        let v23 = constructor_imm(ctx, arg3, &ImmExtend::Zero, arg2);
+        let v24 = &constructor_cmp(ctx, v11, v12, v23);
+        let v25 = &constructor_flags_and_cc(ctx, v24, arg0);
+        // Rule at src/isa/aarch64/inst.isle line 3753.
+        return v25.clone();
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "lower_icmp_const", "src/isa/aarch64/inst.isle line 3690"
+    )
+}
+
+// Generated as internal constructor for term lower_extend_op.
+pub fn constructor_lower_extend_op<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &ArgumentExtension,
+) -> ExtendOp {
+    match arg0 {
+        I8 => {
+            match arg1 {
+                &ArgumentExtension::Uext => {
+                    // Rule at src/isa/aarch64/inst.isle line 3707.
+                    return ExtendOp::UXTB;
+                }
+                &ArgumentExtension::Sext => {
+                    // Rule at src/isa/aarch64/inst.isle line 3705.
+                    return ExtendOp::SXTB;
+                }
+                _ => {}
+            }
+        }
+        I16 => {
+            match arg1 {
+                &ArgumentExtension::Uext => {
+                    // Rule at src/isa/aarch64/inst.isle line 3708.
+                    return ExtendOp::UXTH;
+                }
+                &ArgumentExtension::Sext => {
+                    // Rule at src/isa/aarch64/inst.isle line 3706.
+                    return ExtendOp::SXTH;
+                }
+                _ => {}
+            }
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "lower_extend_op", "src/isa/aarch64/inst.isle line 3704"
+    )
+}
+
+// Generated as internal constructor for term lower_icmp_i128_eq_ne.
+pub fn constructor_lower_icmp_i128_eq_ne<C: Context>(
+    ctx: &mut C,
+    arg0: Value,
+    arg1: Value,
+) -> ProducesFlags {
+    let v2 = C::put_in_regs(ctx, arg0);
+    let v3 = C::put_in_regs(ctx, arg1);
+    let v5 = C::value_regs_get(ctx, v2, 0x0);
+    let v7 = C::value_regs_get(ctx, v2, 0x1);
+    let v8 = C::value_regs_get(ctx, v3, 0x0);
+    let v9 = C::value_regs_get(ctx, v3, 0x1);
+    let v11 = &constructor_cmp(ctx, &OperandSize::Size64, v5, v8);
+    let v13 = C::nzcv(ctx, false, false, false, false);
+    let v15 = &constructor_ccmp(ctx, &OperandSize::Size64, v7, v9, v13, &Cond::Eq, v11);
+    // Rule at src/isa/aarch64/inst.isle line 3771.
+    return v15.clone();
+}
+
+// Generated as internal constructor for term lower_icmp_i128_consumer.
+pub fn constructor_lower_icmp_i128_consumer<C: Context>(
+    ctx: &mut C,
+    arg0: &Cond,
+    arg1: Reg,
+) -> ConsumesFlags {
+    let v3 = C::temp_writable_reg(ctx, I64);
+    let v4 = C::temp_writable_reg(ctx, I64);
+    let v9 = C::writable_reg_to_reg(ctx, v4);
+    let v10 = C::value_reg(ctx, v9);
+    let v5 = MInst::CSet {
+        rd: v3,
+        cond: arg0.clone(),
+    };
+    let v7 = C::writable_reg_to_reg(ctx, v3);
+    let v8 = MInst::CSel {
+        rd: v4,
+        cond: Cond::Eq,
+        rn: arg1,
+        rm: v7,
+    };
+    let v11 = ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
+        inst1: v5,
+        inst2: v8,
+        result: v10,
+    };
+    // Rule at src/isa/aarch64/inst.isle line 3807.
+    return v11;
+}
+
+// Generated as internal constructor for term lower_bmask.
+pub fn constructor_lower_bmask<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Type,
+    arg2: ValueRegs,
+) -> ValueRegs {
+    let v27 = C::fits_in_16(ctx, arg1);
+    if let Some(v28) = v27 {
+        let v30 = C::ty_mask(ctx, v28);
+        let v31 = C::imm_logic_from_u64(ctx, I32, v30);
+        if let Some(v32) = v31 {
+            let v17 = C::value_regs_get(ctx, arg2, 0x0);
+            let v33 = constructor_and_imm(ctx, I32, v17, v32);
+            let v34 = C::value_reg(ctx, v33);
+            let v35 = constructor_lower_bmask(ctx, arg0, I32, v34);
+            // Rule at src/isa/aarch64/inst.isle line 3856.
+            return v35;
+        }
+    }
+    if arg0 == I128 {
+        let v24 = constructor_lower_bmask(ctx, I64, arg1, arg2);
+        let v25 = C::value_regs_get(ctx, v24, 0x0);
+        let v26 = C::value_regs(ctx, v25, v25);
+        // Rule at src/isa/aarch64/inst.isle line 3844.
+        return v26;
+    }
+    let v1 = C::fits_in_64(ctx, arg0);
+    if let Some(v2) = v1 {
+        if arg1 == I128 {
+            let v17 = C::value_regs_get(ctx, arg2, 0x0);
+            let v19 = C::value_regs_get(ctx, arg2, 0x1);
+            let v21 = constructor_orr(ctx, I64, v17, v19);
+            let v22 = C::value_reg(ctx, v21);
+            let v23 = constructor_lower_bmask(ctx, v2, I64, v22);
+            // Rule at src/isa/aarch64/inst.isle line 3835.
+            return v23;
+        }
+        let v4 = C::ty_32_or_64(ctx, arg1);
+        if let Some(v5) = v4 {
+            let v7 = &constructor_operand_size(ctx, v5);
+            let v9 = C::value_regs_get(ctx, arg2, 0x0);
+            let v11 = C::u8_into_imm12(ctx, 0x0);
+            let v12 = &constructor_cmp_imm(ctx, v7, v9, v11);
+            let v14 = &constructor_csetm(ctx, &Cond::Ne);
+            let v15 = constructor_with_flags_reg(ctx, v12, v14);
+            let v16 = C::value_reg(ctx, v15);
+            // Rule at src/isa/aarch64/inst.isle line 3822.
+            return v16;
+        }
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "lower_bmask", "src/isa/aarch64/inst.isle line 3815"
+    )
+}
+
+// Generated as internal constructor for term lower_select.
+pub fn constructor_lower_select<C: Context>(
+    ctx: &mut C,
+    arg0: &ProducesFlags,
+    arg1: &Cond,
+    arg2: Type,
+    arg3: Value,
+    arg4: Value,
+) -> ValueRegs {
+    if arg2 == I128 {
+        let v21 = C::temp_writable_reg(ctx, I64);
+        let v22 = C::temp_writable_reg(ctx, I64);
+        let v23 = C::put_in_regs(ctx, arg3);
+        let v24 = C::put_in_regs(ctx, arg4);
+        let v26 = C::value_regs_get(ctx, v23, 0x0);
+        let v28 = C::value_regs_get(ctx, v23, 0x1);
+        let v29 = C::value_regs_get(ctx, v24, 0x0);
+        let v30 = C::value_regs_get(ctx, v24, 0x1);
+        let v33 = C::writable_reg_to_reg(ctx, v21);
+        let v34 = C::writable_reg_to_reg(ctx, v22);
+        let v35 = C::value_regs(ctx, v33, v34);
+        let v31 = MInst::CSel {
+            rd: v21,
+            cond: arg1.clone(),
+            rn: v26,
+            rm: v29,
+        };
+        let v32 = MInst::CSel {
+            rd: v22,
+            cond: arg1.clone(),
+            rn: v28,
+            rm: v30,
+        };
+        let v36 = ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
+            inst1: v31,
+            inst2: v32,
+            result: v35,
+        };
+        let v37 = constructor_with_flags(ctx, arg0, &v36);
+        // Rule at src/isa/aarch64/inst.isle line 3913.
+        return v37;
+    }
+    let v11 = C::ty_vec128(ctx, arg2);
+    if let Some(v12) = v11 {
+        let v7 = C::put_in_reg(ctx, arg3);
+        let v8 = C::put_in_reg(ctx, arg4);
+        let v13 = &constructor_vec_csel(ctx, arg1, v7, v8);
+        let v14 = constructor_with_flags(ctx, arg0, v13);
+        // Rule at src/isa/aarch64/inst.isle line 3908.
+        return v14;
+    }
+    let v3 = C::ty_scalar_float(ctx, arg2);
+    if let Some(v4) = v3 {
+        let v7 = C::put_in_reg(ctx, arg3);
+        let v8 = C::put_in_reg(ctx, arg4);
+        let v9 = &constructor_fpu_csel(ctx, v4, arg1, v7, v8);
+        let v10 = constructor_with_flags(ctx, arg0, v9);
+        // Rule at src/isa/aarch64/inst.isle line 3906.
+        return v10;
+    }
+    let v38 = C::ty_int_ref_scalar_64(ctx, arg2);
+    if let Some(v39) = v38 {
+        let v7 = C::put_in_reg(ctx, arg3);
+        let v8 = C::put_in_reg(ctx, arg4);
+        let v40 = &constructor_csel(ctx, arg1, v7, v8);
+        let v41 = constructor_with_flags(ctx, arg0, v40);
+        // Rule at src/isa/aarch64/inst.isle line 3927.
+        return v41;
+    }
+    let v15 = C::ty_vec64_ctor(ctx, arg2);
+    if let Some(v16) = v15 {
+        let v7 = C::put_in_reg(ctx, arg3);
+        let v8 = C::put_in_reg(ctx, arg4);
+        let v18 = &constructor_fpu_csel(ctx, F64, arg1, v7, v8);
+        let v19 = constructor_with_flags(ctx, arg0, v18);
+        // Rule at src/isa/aarch64/inst.isle line 3910.
+        return v19;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "lower_select", "src/isa/aarch64/inst.isle line 3905"
+    )
+}
+
+// Generated as internal constructor for term aarch64_jump.
+pub fn constructor_aarch64_jump<C: Context>(ctx: &mut C, arg0: BranchTarget) -> SideEffectNoResult {
+    let v1 = MInst::Jump { dest: arg0 };
+    let v2 = SideEffectNoResult::Inst { inst: v1 };
+    // Rule at src/isa/aarch64/inst.isle line 3933.
+    return v2;
+}
+
+// Generated as internal constructor for term jt_sequence.
+pub fn constructor_jt_sequence<C: Context>(
+    ctx: &mut C,
+    arg0: Reg,
+    arg1: BoxJTSequenceInfo,
+) -> ConsumesFlags {
+    let v3 = C::temp_writable_reg(ctx, I64);
+    let v4 = C::temp_writable_reg(ctx, I64);
+    let v5 = MInst::JTSequence {
+        info: arg1,
+        ridx: arg0,
+        rtmp1: v3,
+        rtmp2: v4,
+    };
+    let v6 = ConsumesFlags::ConsumesFlagsSideEffect { inst: v5 };
+    // Rule at src/isa/aarch64/inst.isle line 3955.
+    return v6;
+}
+
+// Generated as internal constructor for term cond_br.
+pub fn constructor_cond_br<C: Context>(
+    ctx: &mut C,
+    arg0: BranchTarget,
+    arg1: BranchTarget,
+    arg2: CondBrKind,
+) -> ConsumesFlags {
+    let v3 = MInst::CondBr {
+        taken: arg0,
+        not_taken: arg1,
+        kind: arg2,
+    };
+    let v4 = ConsumesFlags::ConsumesFlagsSideEffect { inst: v3 };
+    // Rule at src/isa/aarch64/inst.isle line 3963.
+    return v4;
+}
+
+// Generated as internal constructor for term mov_to_nzcv.
+pub fn constructor_mov_to_nzcv<C: Context>(ctx: &mut C, arg0: Reg) -> ProducesFlags {
+    let v1 = MInst::MovToNZCV { rn: arg0 };
+    let v2 = ProducesFlags::ProducesFlagsSideEffect { inst: v1 };
+    // Rule at src/isa/aarch64/inst.isle line 3969.
+    return v2;
+}
+
+// Generated as internal constructor for term emit_island.
+pub fn constructor_emit_island<C: Context>(ctx: &mut C, arg0: CodeOffset) -> SideEffectNoResult {
+    let v1 = MInst::EmitIsland { needed_space: arg0 };
+    let v2 = SideEffectNoResult::Inst { inst: v1 };
+    // Rule at src/isa/aarch64/inst.isle line 3975.
+    return v2;
+}
+
+// Generated as internal constructor for term br_table_impl.
+pub fn constructor_br_table_impl<C: Context>(
+    ctx: &mut C,
+    arg0: u64,
+    arg1: Reg,
+    arg2: &VecMachLabel,
+) -> Unit {
+    let v1 = C::imm12_from_u64(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v5 = C::targets_jt_info(ctx, arg2);
+        let v7 = &constructor_cmp_imm(ctx, &OperandSize::Size32, arg1, v2);
+        let v8 = &constructor_jt_sequence(ctx, arg1, v5);
+        let v9 = &constructor_with_flags_side_effect(ctx, v7, v8);
+        let v10 = constructor_emit_side_effect(ctx, v9);
+        // Rule at src/isa/aarch64/inst.isle line 3981.
+        return v10;
+    }
+    let v13 = constructor_imm(ctx, I64, &ImmExtend::Zero, arg0);
+    let v14 = C::targets_jt_info(ctx, arg2);
+    let v15 = &constructor_cmp(ctx, &OperandSize::Size32, arg1, v13);
+    let v16 = &constructor_jt_sequence(ctx, arg1, v14);
+    let v17 = &constructor_with_flags_side_effect(ctx, v15, v16);
+    let v18 = constructor_emit_side_effect(ctx, v17);
+    // Rule at src/isa/aarch64/inst.isle line 3986.
+    return v18;
+}
+
+// Generated as internal constructor for term vec_uzp1.
+pub fn constructor_vec_uzp1<C: Context>(
+    ctx: &mut C,
+    arg0: Reg,
+    arg1: Reg,
+    arg2: &VectorSize,
+) -> Reg {
+    let v4 = constructor_vec_rrr(ctx, &VecALUOp::Uzp1, arg0, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 3995.
+    return v4;
+}
+
+// Generated as internal constructor for term vec_uzp2.
+pub fn constructor_vec_uzp2<C: Context>(
+    ctx: &mut C,
+    arg0: Reg,
+    arg1: Reg,
+    arg2: &VectorSize,
+) -> Reg {
+    let v4 = constructor_vec_rrr(ctx, &VecALUOp::Uzp2, arg0, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 3999.
+    return v4;
+}
+
+// Generated as internal constructor for term vec_zip1.
+pub fn constructor_vec_zip1<C: Context>(
+    ctx: &mut C,
+    arg0: Reg,
+    arg1: Reg,
+    arg2: &VectorSize,
+) -> Reg {
+    let v4 = constructor_vec_rrr(ctx, &VecALUOp::Zip1, arg0, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 4003.
+    return v4;
+}
+
+// Generated as internal constructor for term vec_zip2.
+pub fn constructor_vec_zip2<C: Context>(
+    ctx: &mut C,
+    arg0: Reg,
+    arg1: Reg,
+    arg2: &VectorSize,
+) -> Reg {
+    let v4 = constructor_vec_rrr(ctx, &VecALUOp::Zip2, arg0, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 4007.
+    return v4;
+}
+
+// Generated as internal constructor for term vec_trn1.
+pub fn constructor_vec_trn1<C: Context>(
+    ctx: &mut C,
+    arg0: Reg,
+    arg1: Reg,
+    arg2: &VectorSize,
+) -> Reg {
+    let v4 = constructor_vec_rrr(ctx, &VecALUOp::Trn1, arg0, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 4011.
+    return v4;
+}
+
+// Generated as internal constructor for term vec_trn2.
+pub fn constructor_vec_trn2<C: Context>(
+    ctx: &mut C,
+    arg0: Reg,
+    arg1: Reg,
+    arg2: &VectorSize,
+) -> Reg {
+    let v4 = constructor_vec_rrr(ctx, &VecALUOp::Trn2, arg0, arg1, arg2);
+    // Rule at src/isa/aarch64/inst.isle line 4015.
+    return v4;
+}
+
+// Generated as internal constructor for term vec_dup_fp_imm.
+pub fn constructor_vec_dup_fp_imm<C: Context>(
+    ctx: &mut C,
+    arg0: ASIMDFPModImm,
+    arg1: &VectorSize,
+) -> Reg {
+    let v3 = C::temp_writable_reg(ctx, I8X16);
+    let v4 = MInst::VecDupFPImm {
+        rd: v3,
+        imm: arg0,
+        size: arg1.clone(),
+    };
+    let v5 = C::emit(ctx, &v4);
+    let v6 = C::writable_reg_to_reg(ctx, v3);
+    // Rule at src/isa/aarch64/inst.isle line 4031.
+    return v6;
+}
+
+// Generated as internal constructor for term fpu_load64.
+pub fn constructor_fpu_load64<C: Context>(ctx: &mut C, arg0: &AMode, arg1: MemFlags) -> Reg {
+    let v3 = C::temp_writable_reg(ctx, I8X16);
+    let v4 = MInst::FpuLoad64 {
+        rd: v3,
+        mem: arg0.clone(),
+        flags: arg1,
+    };
+    let v5 = C::emit(ctx, &v4);
+    let v6 = C::writable_reg_to_reg(ctx, v3);
+    // Rule at src/isa/aarch64/inst.isle line 4038.
+    return v6;
+}
+
+// Generated as internal constructor for term fpu_load128.
+pub fn constructor_fpu_load128<C: Context>(ctx: &mut C, arg0: &AMode, arg1: MemFlags) -> Reg {
+    let v3 = C::temp_writable_reg(ctx, I8X16);
+    let v4 = MInst::FpuLoad128 {
+        rd: v3,
+        mem: arg0.clone(),
+        flags: arg1,
+    };
+    let v5 = C::emit(ctx, &v4);
+    let v6 = C::writable_reg_to_reg(ctx, v3);
+    // Rule at src/isa/aarch64/inst.isle line 4045.
+    return v6;
+}
+
+// Generated as internal constructor for term fpu_move_128.
+pub fn constructor_fpu_move_128<C: Context>(ctx: &mut C, arg0: Reg) -> Reg {
+    let v2 = C::temp_writable_reg(ctx, I8X16);
+    let v3 = MInst::FpuMove128 { rd: v2, rn: arg0 };
+    let v4 = C::emit(ctx, &v3);
+    let v5 = C::writable_reg_to_reg(ctx, v2);
+    // Rule at src/isa/aarch64/inst_neon.isle line 4.
+    return v5;
+}
+
+// Generated as internal constructor for term lower.
+pub fn constructor_lower<C: Context>(ctx: &mut C, arg0: Inst) -> Option<InstOutput> {
+    let v4 = &C::inst_data(ctx, arg0);
+    match v4 {
+        &InstructionData::AtomicCas {
+            opcode: ref v1385,
+            args: ref v1386,
+            flags: v1387,
+        } => {
+            if let &Opcode::AtomicCas = v1385 {
+                let v1 = C::first_result(ctx, arg0);
+                if let Some(v2) = v1 {
+                    let v3 = C::value_type(ctx, v2);
+                    let v1291 = C::valid_atomic_transaction(ctx, v3);
+                    if let Some(v1292) = v1291 {
+                        let v1312 = C::use_lse(ctx, arg0);
+                        if let Some(v1313) = v1312 {
+                            let v1388 = C::unpack_value_array_3(ctx, v1386);
+                            let v1392 = C::put_in_reg(ctx, v1388.0);
+                            let v1393 = C::put_in_reg(ctx, v1388.1);
+                            let v1394 = C::put_in_reg(ctx, v1388.2);
+                            let v1395 =
+                                constructor_lse_atomic_cas(ctx, v1392, v1393, v1394, v1292, v1387);
+                            let v1396 = constructor_output_reg(ctx, v1395);
+                            // Rule at src/isa/aarch64/lower.isle line 2125.
+                            return Some(v1396);
+                        }
+                        let v1388 = C::unpack_value_array_3(ctx, v1386);
+                        let v1392 = C::put_in_reg(ctx, v1388.0);
+                        let v1393 = C::put_in_reg(ctx, v1388.1);
+                        let v1394 = C::put_in_reg(ctx, v1388.2);
+                        let v1397 =
+                            constructor_atomic_cas_loop(ctx, v1392, v1393, v1394, v1292, v1387);
+                        let v1398 = constructor_output_reg(ctx, v1397);
+                        // Rule at src/isa/aarch64/lower.isle line 2130.
+                        return Some(v1398);
+                    }
+                }
+            }
+        }
+        &InstructionData::AtomicRmw {
+            opcode: ref v1314,
+            args: ref v1315,
+            flags: v1316,
+            op: ref v1317,
+        } => {
+            if let &Opcode::AtomicRmw = v1314 {
+                match v1317 {
+                    &AtomicRmwOp::Add => {
+                        let v1 = C::first_result(ctx, arg0);
+                        if let Some(v2) = v1 {
+                            let v3 = C::value_type(ctx, v2);
+                            let v1291 = C::valid_atomic_transaction(ctx, v3);
+                            if let Some(v1292) = v1291 {
+                                let v1312 = C::use_lse(ctx, arg0);
+                                if let Some(v1313) = v1312 {
+                                    let v1318 = C::unpack_value_array_2(ctx, v1315);
+                                    let v1322 = C::put_in_reg(ctx, v1318.1);
+                                    let v1323 = constructor_lse_atomic_rmw(
+                                        ctx,
+                                        &AtomicRMWOp::Add,
+                                        v1318.0,
+                                        v1322,
+                                        v1292,
+                                        v1316,
+                                    );
+                                    let v1324 = constructor_output_reg(ctx, v1323);
+                                    // Rule at src/isa/aarch64/lower.isle line 2052.
+                                    return Some(v1324);
+                                }
+                                let v1318 = C::unpack_value_array_2(ctx, v1315);
+                                let v1352 = C::put_in_reg(ctx, v1318.0);
+                                let v1343 = C::put_in_reg(ctx, v1318.1);
+                                let v1353 = constructor_atomic_rmw_loop(
+                                    ctx,
+                                    &AtomicRMWLoopOp::Add,
+                                    v1352,
+                                    v1343,
+                                    v1292,
+                                    v1316,
+                                );
+                                let v1354 = constructor_output_reg(ctx, v1353);
+                                // Rule at src/isa/aarch64/lower.isle line 2090.
+                                return Some(v1354);
+                            }
+                        }
+                    }
+                    &AtomicRmwOp::And => {
+                        let v1 = C::first_result(ctx, arg0);
+                        if let Some(v2) = v1 {
+                            let v3 = C::value_type(ctx, v2);
+                            let v1291 = C::valid_atomic_transaction(ctx, v3);
+                            if let Some(v1292) = v1291 {
+                                let v1312 = C::use_lse(ctx, arg0);
+                                if let Some(v1313) = v1312 {
+                                    let v1318 = C::unpack_value_array_2(ctx, v1315);
+                                    let v1322 = C::put_in_reg(ctx, v1318.1);
+                                    let v1217 = C::zero_reg(ctx);
+                                    let v1348 = constructor_eon(ctx, v1292, v1322, v1217);
+                                    let v1349 = constructor_lse_atomic_rmw(
+                                        ctx,
+                                        &AtomicRMWOp::Clr,
+                                        v1318.0,
+                                        v1348,
+                                        v1292,
+                                        v1316,
+                                    );
+                                    let v1350 = constructor_output_reg(ctx, v1349);
+                                    // Rule at src/isa/aarch64/lower.isle line 2084.
+                                    return Some(v1350);
+                                }
+                                let v1318 = C::unpack_value_array_2(ctx, v1315);
+                                let v1352 = C::put_in_reg(ctx, v1318.0);
+                                let v1343 = C::put_in_reg(ctx, v1318.1);
+                                let v1359 = constructor_atomic_rmw_loop(
+                                    ctx,
+                                    &AtomicRMWLoopOp::And,
+                                    v1352,
+                                    v1343,
+                                    v1292,
+                                    v1316,
+                                );
+                                let v1360 = constructor_output_reg(ctx, v1359);
+                                // Rule at src/isa/aarch64/lower.isle line 2096.
+                                return Some(v1360);
+                            }
+                        }
+                    }
+                    &AtomicRmwOp::Nand => {
+                        let v1 = C::first_result(ctx, arg0);
+                        if let Some(v2) = v1 {
+                            let v3 = C::value_type(ctx, v2);
+                            let v1291 = C::valid_atomic_transaction(ctx, v3);
+                            if let Some(v1292) = v1291 {
+                                let v1318 = C::unpack_value_array_2(ctx, v1315);
+                                let v1352 = C::put_in_reg(ctx, v1318.0);
+                                let v1343 = C::put_in_reg(ctx, v1318.1);
+                                let v1362 = constructor_atomic_rmw_loop(
+                                    ctx,
+                                    &AtomicRMWLoopOp::Nand,
+                                    v1352,
+                                    v1343,
+                                    v1292,
+                                    v1316,
+                                );
+                                let v1363 = constructor_output_reg(ctx, v1362);
+                                // Rule at src/isa/aarch64/lower.isle line 2099.
+                                return Some(v1363);
+                            }
+                        }
+                    }
+                    &AtomicRmwOp::Or => {
+                        let v1 = C::first_result(ctx, arg0);
+                        if let Some(v2) = v1 {
+                            let v3 = C::value_type(ctx, v2);
+                            let v1291 = C::valid_atomic_transaction(ctx, v3);
+                            if let Some(v1292) = v1291 {
+                                let v1312 = C::use_lse(ctx, arg0);
+                                if let Some(v1313) = v1312 {
+                                    let v1318 = C::unpack_value_array_2(ctx, v1315);
+                                    let v1322 = C::put_in_reg(ctx, v1318.1);
+                                    let v1329 = constructor_lse_atomic_rmw(
+                                        ctx,
+                                        &AtomicRMWOp::Set,
+                                        v1318.0,
+                                        v1322,
+                                        v1292,
+                                        v1316,
+                                    );
+                                    let v1330 = constructor_output_reg(ctx, v1329);
+                                    // Rule at src/isa/aarch64/lower.isle line 2060.
+                                    return Some(v1330);
+                                }
+                                let v1318 = C::unpack_value_array_2(ctx, v1315);
+                                let v1352 = C::put_in_reg(ctx, v1318.0);
+                                let v1343 = C::put_in_reg(ctx, v1318.1);
+                                let v1365 = constructor_atomic_rmw_loop(
+                                    ctx,
+                                    &AtomicRMWLoopOp::Orr,
+                                    v1352,
+                                    v1343,
+                                    v1292,
+                                    v1316,
+                                );
+                                let v1366 = constructor_output_reg(ctx, v1365);
+                                // Rule at src/isa/aarch64/lower.isle line 2102.
+                                return Some(v1366);
+                            }
+                        }
+                    }
+                    &AtomicRmwOp::Smax => {
+                        let v1 = C::first_result(ctx, arg0);
+                        if let Some(v2) = v1 {
+                            let v3 = C::value_type(ctx, v2);
+                            let v1291 = C::valid_atomic_transaction(ctx, v3);
+                            if let Some(v1292) = v1291 {
+                                let v1312 = C::use_lse(ctx, arg0);
+                                if let Some(v1313) = v1312 {
+                                    let v1318 = C::unpack_value_array_2(ctx, v1315);
+                                    let v1322 = C::put_in_reg(ctx, v1318.1);
+                                    let v1332 = constructor_lse_atomic_rmw(
+                                        ctx,
+                                        &AtomicRMWOp::Smax,
+                                        v1318.0,
+                                        v1322,
+                                        v1292,
+                                        v1316,
+                                    );
+                                    let v1333 = constructor_output_reg(ctx, v1332);
+                                    // Rule at src/isa/aarch64/lower.isle line 2064.
+                                    return Some(v1333);
+                                }
+                                let v1318 = C::unpack_value_array_2(ctx, v1315);
+                                let v1352 = C::put_in_reg(ctx, v1318.0);
+                                let v1343 = C::put_in_reg(ctx, v1318.1);
+                                let v1374 = constructor_atomic_rmw_loop(
+                                    ctx,
+                                    &AtomicRMWLoopOp::Smax,
+                                    v1352,
+                                    v1343,
+                                    v1292,
+                                    v1316,
+                                );
+                                let v1375 = constructor_output_reg(ctx, v1374);
+                                // Rule at src/isa/aarch64/lower.isle line 2111.
+                                return Some(v1375);
+                            }
+                        }
+                    }
+                    &AtomicRmwOp::Smin => {
+                        let v1 = C::first_result(ctx, arg0);
+                        if let Some(v2) = v1 {
+                            let v3 = C::value_type(ctx, v2);
+                            let v1291 = C::valid_atomic_transaction(ctx, v3);
+                            if let Some(v1292) = v1291 {
+                                let v1312 = C::use_lse(ctx, arg0);
+                                if let Some(v1313) = v1312 {
+                                    let v1318 = C::unpack_value_array_2(ctx, v1315);
+                                    let v1322 = C::put_in_reg(ctx, v1318.1);
+                                    let v1335 = constructor_lse_atomic_rmw(
+                                        ctx,
+                                        &AtomicRMWOp::Smin,
+                                        v1318.0,
+                                        v1322,
+                                        v1292,
+                                        v1316,
+                                    );
+                                    let v1336 = constructor_output_reg(ctx, v1335);
+                                    // Rule at src/isa/aarch64/lower.isle line 2068.
+                                    return Some(v1336);
+                                }
+                                let v1318 = C::unpack_value_array_2(ctx, v1315);
+                                let v1352 = C::put_in_reg(ctx, v1318.0);
+                                let v1343 = C::put_in_reg(ctx, v1318.1);
+                                let v1371 = constructor_atomic_rmw_loop(
+                                    ctx,
+                                    &AtomicRMWLoopOp::Smin,
+                                    v1352,
+                                    v1343,
+                                    v1292,
+                                    v1316,
+                                );
+                                let v1372 = constructor_output_reg(ctx, v1371);
+                                // Rule at src/isa/aarch64/lower.isle line 2108.
+                                return Some(v1372);
+                            }
+                        }
+                    }
+                    &AtomicRmwOp::Sub => {
+                        let v1 = C::first_result(ctx, arg0);
+                        if let Some(v2) = v1 {
+                            let v3 = C::value_type(ctx, v2);
+                            let v1291 = C::valid_atomic_transaction(ctx, v3);
+                            if let Some(v1292) = v1291 {
+                                let v1312 = C::use_lse(ctx, arg0);
+                                if let Some(v1313) = v1312 {
+                                    let v586 = C::zero_reg(ctx);
+                                    let v1318 = C::unpack_value_array_2(ctx, v1315);
+                                    let v1343 = C::put_in_reg(ctx, v1318.1);
+                                    let v1344 = constructor_sub(ctx, v1292, v586, v1343);
+                                    let v1345 = constructor_lse_atomic_rmw(
+                                        ctx,
+                                        &AtomicRMWOp::Add,
+                                        v1318.0,
+                                        v1344,
+                                        v1292,
+                                        v1316,
+                                    );
+                                    let v1346 = constructor_output_reg(ctx, v1345);
+                                    // Rule at src/isa/aarch64/lower.isle line 2080.
+                                    return Some(v1346);
+                                }
+                                let v1318 = C::unpack_value_array_2(ctx, v1315);
+                                let v1352 = C::put_in_reg(ctx, v1318.0);
+                                let v1343 = C::put_in_reg(ctx, v1318.1);
+                                let v1356 = constructor_atomic_rmw_loop(
+                                    ctx,
+                                    &AtomicRMWLoopOp::Sub,
+                                    v1352,
+                                    v1343,
+                                    v1292,
+                                    v1316,
+                                );
+                                let v1357 = constructor_output_reg(ctx, v1356);
+                                // Rule at src/isa/aarch64/lower.isle line 2093.
+                                return Some(v1357);
+                            }
+                        }
+                    }
+                    &AtomicRmwOp::Umax => {
+                        let v1 = C::first_result(ctx, arg0);
+                        if let Some(v2) = v1 {
+                            let v3 = C::value_type(ctx, v2);
+                            let v1291 = C::valid_atomic_transaction(ctx, v3);
+                            if let Some(v1292) = v1291 {
+                                let v1312 = C::use_lse(ctx, arg0);
+                                if let Some(v1313) = v1312 {
+                                    let v1318 = C::unpack_value_array_2(ctx, v1315);
+                                    let v1322 = C::put_in_reg(ctx, v1318.1);
+                                    let v1338 = constructor_lse_atomic_rmw(
+                                        ctx,
+                                        &AtomicRMWOp::Umax,
+                                        v1318.0,
+                                        v1322,
+                                        v1292,
+                                        v1316,
+                                    );
+                                    let v1339 = constructor_output_reg(ctx, v1338);
+                                    // Rule at src/isa/aarch64/lower.isle line 2072.
+                                    return Some(v1339);
+                                }
+                                let v1318 = C::unpack_value_array_2(ctx, v1315);
+                                let v1352 = C::put_in_reg(ctx, v1318.0);
+                                let v1343 = C::put_in_reg(ctx, v1318.1);
+                                let v1380 = constructor_atomic_rmw_loop(
+                                    ctx,
+                                    &AtomicRMWLoopOp::Umax,
+                                    v1352,
+                                    v1343,
+                                    v1292,
+                                    v1316,
+                                );
+                                let v1381 = constructor_output_reg(ctx, v1380);
+                                // Rule at src/isa/aarch64/lower.isle line 2117.
+                                return Some(v1381);
+                            }
+                        }
+                    }
+                    &AtomicRmwOp::Umin => {
+                        let v1 = C::first_result(ctx, arg0);
+                        if let Some(v2) = v1 {
+                            let v3 = C::value_type(ctx, v2);
+                            let v1291 = C::valid_atomic_transaction(ctx, v3);
+                            if let Some(v1292) = v1291 {
+                                let v1312 = C::use_lse(ctx, arg0);
+                                if let Some(v1313) = v1312 {
+                                    let v1318 = C::unpack_value_array_2(ctx, v1315);
+                                    let v1322 = C::put_in_reg(ctx, v1318.1);
+                                    let v1341 = constructor_lse_atomic_rmw(
+                                        ctx,
+                                        &AtomicRMWOp::Umin,
+                                        v1318.0,
+                                        v1322,
+                                        v1292,
+                                        v1316,
+                                    );
+                                    let v1342 = constructor_output_reg(ctx, v1341);
+                                    // Rule at src/isa/aarch64/lower.isle line 2076.
+                                    return Some(v1342);
+                                }
+                                let v1318 = C::unpack_value_array_2(ctx, v1315);
+                                let v1352 = C::put_in_reg(ctx, v1318.0);
+                                let v1343 = C::put_in_reg(ctx, v1318.1);
+                                let v1377 = constructor_atomic_rmw_loop(
+                                    ctx,
+                                    &AtomicRMWLoopOp::Umin,
+                                    v1352,
+                                    v1343,
+                                    v1292,
+                                    v1316,
+                                );
+                                let v1378 = constructor_output_reg(ctx, v1377);
+                                // Rule at src/isa/aarch64/lower.isle line 2114.
+                                return Some(v1378);
+                            }
+                        }
+                    }
+                    &AtomicRmwOp::Xchg => {
+                        let v1 = C::first_result(ctx, arg0);
+                        if let Some(v2) = v1 {
+                            let v3 = C::value_type(ctx, v2);
+                            let v1291 = C::valid_atomic_transaction(ctx, v3);
+                            if let Some(v1292) = v1291 {
+                                let v1318 = C::unpack_value_array_2(ctx, v1315);
+                                let v1352 = C::put_in_reg(ctx, v1318.0);
+                                let v1343 = C::put_in_reg(ctx, v1318.1);
+                                let v1383 = constructor_atomic_rmw_loop(
+                                    ctx,
+                                    &AtomicRMWLoopOp::Xchg,
+                                    v1352,
+                                    v1343,
+                                    v1292,
+                                    v1316,
+                                );
+                                let v1384 = constructor_output_reg(ctx, v1383);
+                                // Rule at src/isa/aarch64/lower.isle line 2120.
+                                return Some(v1384);
+                            }
+                        }
+                    }
+                    &AtomicRmwOp::Xor => {
+                        let v1 = C::first_result(ctx, arg0);
+                        if let Some(v2) = v1 {
+                            let v3 = C::value_type(ctx, v2);
+                            let v1291 = C::valid_atomic_transaction(ctx, v3);
+                            if let Some(v1292) = v1291 {
+                                let v1312 = C::use_lse(ctx, arg0);
+                                if let Some(v1313) = v1312 {
+                                    let v1318 = C::unpack_value_array_2(ctx, v1315);
+                                    let v1322 = C::put_in_reg(ctx, v1318.1);
+                                    let v1326 = constructor_lse_atomic_rmw(
+                                        ctx,
+                                        &AtomicRMWOp::Eor,
+                                        v1318.0,
+                                        v1322,
+                                        v1292,
+                                        v1316,
+                                    );
+                                    let v1327 = constructor_output_reg(ctx, v1326);
+                                    // Rule at src/isa/aarch64/lower.isle line 2056.
+                                    return Some(v1327);
+                                }
+                                let v1318 = C::unpack_value_array_2(ctx, v1315);
+                                let v1352 = C::put_in_reg(ctx, v1318.0);
+                                let v1343 = C::put_in_reg(ctx, v1318.1);
+                                let v1368 = constructor_atomic_rmw_loop(
+                                    ctx,
+                                    &AtomicRMWLoopOp::Eor,
+                                    v1352,
+                                    v1343,
+                                    v1292,
+                                    v1316,
+                                );
+                                let v1369 = constructor_output_reg(ctx, v1368);
+                                // Rule at src/isa/aarch64/lower.isle line 2105.
+                                return Some(v1369);
+                            }
+                        }
+                    }
+                    _ => {}
+                }
+            }
+        }
+        &InstructionData::Binary {
+            opcode: ref v29,
+            args: ref v30,
+        } => {
+            match v29 {
+                &Opcode::Swizzle => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v31 = C::unpack_value_array_2(ctx, v30);
+                        let v34 = C::put_in_reg(ctx, v31.0);
+                        let v35 = C::put_in_reg(ctx, v31.1);
+                        let v228 = constructor_vec_tbl(ctx, v34, v35);
+                        let v229 = constructor_output_reg(ctx, v228);
+                        // Rule at src/isa/aarch64/lower.isle line 241.
+                        return Some(v229);
+                    }
+                }
+                &Opcode::Smin => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v27 = C::fits_in_64(ctx, v3);
+                        if let Some(v28) = v27 {
+                            let v680 = C::ty_int(ctx, v3);
+                            if let Some(v681) = v680 {
+                                let v31 = C::unpack_value_array_2(ctx, v30);
+                                let v686 = constructor_cmp_and_choose(
+                                    ctx,
+                                    v28,
+                                    &Cond::Lt,
+                                    true,
+                                    v31.0,
+                                    v31.1,
+                                );
+                                let v687 = C::output(ctx, v686);
+                                // Rule at src/isa/aarch64/lower.isle line 1076.
+                                return Some(v687);
+                            }
+                        }
+                        if v3 == I64X2 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v56 = C::put_in_reg(ctx, v31.1);
+                            let v325 = C::put_in_reg(ctx, v31.0);
+                            let v700 = constructor_vec_rrr(
+                                ctx,
+                                &VecALUOp::Cmgt,
+                                v56,
+                                v325,
+                                &VectorSize::Size64x2,
+                            );
+                            let v701 = C::put_in_reg(ctx, v31.0);
+                            let v386 = C::put_in_reg(ctx, v31.1);
+                            let v702 = constructor_bsl(ctx, I64X2, v700, v701, v386);
+                            let v703 = constructor_output_reg(ctx, v702);
+                            // Rule at src/isa/aarch64/lower.isle line 1088.
+                            return Some(v703);
+                        }
+                        let v693 = C::not_i64x2(ctx, v3);
+                        if let Some(v694) = v693 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v34 = C::put_in_reg(ctx, v31.0);
+                            let v35 = C::put_in_reg(ctx, v31.1);
+                            let v121 = &constructor_vector_size(ctx, v3);
+                            let v696 = constructor_vec_rrr(ctx, &VecALUOp::Smin, v34, v35, v121);
+                            let v697 = constructor_output_reg(ctx, v696);
+                            // Rule at src/isa/aarch64/lower.isle line 1085.
+                            return Some(v697);
+                        }
+                    }
+                }
+                &Opcode::Umin => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v27 = C::fits_in_64(ctx, v3);
+                        if let Some(v28) = v27 {
+                            let v680 = C::ty_int(ctx, v3);
+                            if let Some(v681) = v680 {
+                                let v31 = C::unpack_value_array_2(ctx, v30);
+                                let v683 = constructor_cmp_and_choose(
+                                    ctx,
+                                    v28,
+                                    &Cond::Lo,
+                                    false,
+                                    v31.0,
+                                    v31.1,
+                                );
+                                let v684 = C::output(ctx, v683);
+                                // Rule at src/isa/aarch64/lower.isle line 1074.
+                                return Some(v684);
+                            }
+                        }
+                        if v3 == I64X2 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v56 = C::put_in_reg(ctx, v31.1);
+                            let v325 = C::put_in_reg(ctx, v31.0);
+                            let v708 = constructor_vec_rrr(
+                                ctx,
+                                &VecALUOp::Cmhi,
+                                v56,
+                                v325,
+                                &VectorSize::Size64x2,
+                            );
+                            let v701 = C::put_in_reg(ctx, v31.0);
+                            let v386 = C::put_in_reg(ctx, v31.1);
+                            let v709 = constructor_bsl(ctx, I64X2, v708, v701, v386);
+                            let v710 = constructor_output_reg(ctx, v709);
+                            // Rule at src/isa/aarch64/lower.isle line 1094.
+                            return Some(v710);
+                        }
+                        let v693 = C::not_i64x2(ctx, v3);
+                        if let Some(v694) = v693 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v34 = C::put_in_reg(ctx, v31.0);
+                            let v35 = C::put_in_reg(ctx, v31.1);
+                            let v121 = &constructor_vector_size(ctx, v3);
+                            let v705 = constructor_vec_rrr(ctx, &VecALUOp::Umin, v34, v35, v121);
+                            let v706 = constructor_output_reg(ctx, v705);
+                            // Rule at src/isa/aarch64/lower.isle line 1091.
+                            return Some(v706);
+                        }
+                    }
+                }
+                &Opcode::Smax => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v27 = C::fits_in_64(ctx, v3);
+                        if let Some(v28) = v27 {
+                            let v680 = C::ty_int(ctx, v3);
+                            if let Some(v681) = v680 {
+                                let v31 = C::unpack_value_array_2(ctx, v30);
+                                let v691 = constructor_cmp_and_choose(
+                                    ctx,
+                                    v28,
+                                    &Cond::Gt,
+                                    true,
+                                    v31.0,
+                                    v31.1,
+                                );
+                                let v692 = C::output(ctx, v691);
+                                // Rule at src/isa/aarch64/lower.isle line 1080.
+                                return Some(v692);
+                            }
+                        }
+                        if v3 == I64X2 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v34 = C::put_in_reg(ctx, v31.0);
+                            let v35 = C::put_in_reg(ctx, v31.1);
+                            let v714 = constructor_vec_rrr(
+                                ctx,
+                                &VecALUOp::Cmgt,
+                                v34,
+                                v35,
+                                &VectorSize::Size64x2,
+                            );
+                            let v701 = C::put_in_reg(ctx, v31.0);
+                            let v386 = C::put_in_reg(ctx, v31.1);
+                            let v715 = constructor_bsl(ctx, I64X2, v714, v701, v386);
+                            let v716 = constructor_output_reg(ctx, v715);
+                            // Rule at src/isa/aarch64/lower.isle line 1100.
+                            return Some(v716);
+                        }
+                        let v693 = C::not_i64x2(ctx, v3);
+                        if let Some(v694) = v693 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v34 = C::put_in_reg(ctx, v31.0);
+                            let v35 = C::put_in_reg(ctx, v31.1);
+                            let v121 = &constructor_vector_size(ctx, v3);
+                            let v712 = constructor_vec_rrr(ctx, &VecALUOp::Smax, v34, v35, v121);
+                            let v713 = constructor_output_reg(ctx, v712);
+                            // Rule at src/isa/aarch64/lower.isle line 1097.
+                            return Some(v713);
+                        }
+                    }
+                }
+                &Opcode::Umax => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v27 = C::fits_in_64(ctx, v3);
+                        if let Some(v28) = v27 {
+                            let v680 = C::ty_int(ctx, v3);
+                            if let Some(v681) = v680 {
+                                let v31 = C::unpack_value_array_2(ctx, v30);
+                                let v689 = constructor_cmp_and_choose(
+                                    ctx,
+                                    v28,
+                                    &Cond::Hi,
+                                    false,
+                                    v31.0,
+                                    v31.1,
+                                );
+                                let v690 = C::output(ctx, v689);
+                                // Rule at src/isa/aarch64/lower.isle line 1078.
+                                return Some(v690);
+                            }
+                        }
+                        if v3 == I64X2 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v34 = C::put_in_reg(ctx, v31.0);
+                            let v35 = C::put_in_reg(ctx, v31.1);
+                            let v720 = constructor_vec_rrr(
+                                ctx,
+                                &VecALUOp::Cmhi,
+                                v34,
+                                v35,
+                                &VectorSize::Size64x2,
+                            );
+                            let v701 = C::put_in_reg(ctx, v31.0);
+                            let v386 = C::put_in_reg(ctx, v31.1);
+                            let v721 = constructor_bsl(ctx, I64X2, v720, v701, v386);
+                            let v722 = constructor_output_reg(ctx, v721);
+                            // Rule at src/isa/aarch64/lower.isle line 1106.
+                            return Some(v722);
+                        }
+                        let v693 = C::not_i64x2(ctx, v3);
+                        if let Some(v694) = v693 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v34 = C::put_in_reg(ctx, v31.0);
+                            let v35 = C::put_in_reg(ctx, v31.1);
+                            let v121 = &constructor_vector_size(ctx, v3);
+                            let v718 = constructor_vec_rrr(ctx, &VecALUOp::Umax, v34, v35, v121);
+                            let v719 = constructor_output_reg(ctx, v718);
+                            // Rule at src/isa/aarch64/lower.isle line 1103.
+                            return Some(v719);
+                        }
+                    }
+                }
+                &Opcode::AvgRound => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        if v3 == I64X2 {
+                            let v324 = constructor_splat_const(ctx, 0x1, &VectorSize::Size64x2);
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v325 = C::put_in_reg(ctx, v31.0);
+                            let v112 = C::put_in_reg(ctx, v31.1);
+                            let v326 = constructor_orr_vec(ctx, v325, v112, &VectorSize::Size64x2);
+                            let v327 = constructor_and_vec(ctx, v326, v324, &VectorSize::Size64x2);
+                            let v328 = C::put_in_reg(ctx, v31.0);
+                            let v330 =
+                                constructor_ushr_vec_imm(ctx, v328, 0x1, &VectorSize::Size64x2);
+                            let v331 = C::put_in_reg(ctx, v31.1);
+                            let v332 =
+                                constructor_ushr_vec_imm(ctx, v331, 0x1, &VectorSize::Size64x2);
+                            let v333 = constructor_add_vec(ctx, v330, v332, &VectorSize::Size64x2);
+                            let v334 = constructor_add_vec(ctx, v327, v333, &VectorSize::Size64x2);
+                            let v335 = constructor_output_reg(ctx, v334);
+                            // Rule at src/isa/aarch64/lower.isle line 353.
+                            return Some(v335);
+                        }
+                        let v336 = C::lane_fits_in_32(ctx, v3);
+                        if let Some(v337) = v336 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v34 = C::put_in_reg(ctx, v31.0);
+                            let v35 = C::put_in_reg(ctx, v31.1);
+                            let v339 = &constructor_vector_size(ctx, v337);
+                            let v340 = constructor_vec_rrr(ctx, &VecALUOp::Urhadd, v34, v35, v339);
+                            let v341 = constructor_output_reg(ctx, v340);
+                            // Rule at src/isa/aarch64/lower.isle line 362.
+                            return Some(v341);
+                        }
+                    }
+                }
+                &Opcode::UaddSat => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v575 = C::ty_vec128(ctx, v3);
+                        if let Some(v576) = v575 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v34 = C::put_in_reg(ctx, v31.0);
+                            let v35 = C::put_in_reg(ctx, v31.1);
+                            let v577 = &constructor_vector_size(ctx, v576);
+                            let v578 = constructor_uqadd(ctx, v34, v35, v577);
+                            let v579 = constructor_output_reg(ctx, v578);
+                            // Rule at src/isa/aarch64/lower.isle line 726.
+                            return Some(v579);
+                        }
+                    }
+                }
+                &Opcode::SaddSat => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v575 = C::ty_vec128(ctx, v3);
+                        if let Some(v576) = v575 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v34 = C::put_in_reg(ctx, v31.0);
+                            let v35 = C::put_in_reg(ctx, v31.1);
+                            let v577 = &constructor_vector_size(ctx, v576);
+                            let v580 = constructor_sqadd(ctx, v34, v35, v577);
+                            let v581 = constructor_output_reg(ctx, v580);
+                            // Rule at src/isa/aarch64/lower.isle line 731.
+                            return Some(v581);
+                        }
+                    }
+                }
+                &Opcode::UsubSat => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v575 = C::ty_vec128(ctx, v3);
+                        if let Some(v576) = v575 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v34 = C::put_in_reg(ctx, v31.0);
+                            let v35 = C::put_in_reg(ctx, v31.1);
+                            let v577 = &constructor_vector_size(ctx, v576);
+                            let v582 = constructor_uqsub(ctx, v34, v35, v577);
+                            let v583 = constructor_output_reg(ctx, v582);
+                            // Rule at src/isa/aarch64/lower.isle line 736.
+                            return Some(v583);
+                        }
+                    }
+                }
+                &Opcode::SsubSat => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v575 = C::ty_vec128(ctx, v3);
+                        if let Some(v576) = v575 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v34 = C::put_in_reg(ctx, v31.0);
+                            let v35 = C::put_in_reg(ctx, v31.1);
+                            let v577 = &constructor_vector_size(ctx, v576);
+                            let v584 = constructor_sqsub(ctx, v34, v35, v577);
+                            let v585 = constructor_output_reg(ctx, v584);
+                            // Rule at src/isa/aarch64/lower.isle line 741.
+                            return Some(v585);
+                        }
+                    }
+                }
+                &Opcode::Iadd => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v27 = C::fits_in_64(ctx, v3);
+                        if let Some(v28) = v27 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v38 = C::def_inst(ctx, v31.1);
+                            if let Some(v39) = v38 {
+                                let v40 = &C::inst_data(ctx, v39);
+                                if let &InstructionData::Binary {
+                                    opcode: ref v75,
+                                    args: ref v76,
+                                } = v40
+                                {
+                                    match v75 {
+                                        &Opcode::Imul => {
+                                            let v77 = C::unpack_value_array_2(ctx, v76);
+                                            let v105 = C::put_in_reg(ctx, v77.0);
+                                            let v106 = C::put_in_reg(ctx, v77.1);
+                                            let v107 = C::put_in_reg(ctx, v31.0);
+                                            let v108 = constructor_madd(ctx, v28, v105, v106, v107);
+                                            let v109 = constructor_output_reg(ctx, v108);
+                                            // Rule at src/isa/aarch64/lower.isle line 88.
+                                            return Some(v109);
+                                        }
+                                        &Opcode::Ishl => {
+                                            let v77 = C::unpack_value_array_2(ctx, v76);
+                                            let v80 = C::def_inst(ctx, v77.1);
+                                            if let Some(v81) = v80 {
+                                                let v82 = &C::inst_data(ctx, v81);
+                                                if let &InstructionData::UnaryImm {
+                                                    opcode: ref v83,
+                                                    imm: v84,
+                                                } = v82
+                                                {
+                                                    if let &Opcode::Iconst = v83 {
+                                                        let v85 = C::lshl_from_imm64(ctx, v28, v84);
+                                                        if let Some(v86) = v85 {
+                                                            let v34 = C::put_in_reg(ctx, v31.0);
+                                                            let v87 = C::put_in_reg(ctx, v77.0);
+                                                            let v88 = constructor_add_shift(
+                                                                ctx, v28, v34, v87, v86,
+                                                            );
+                                                            let v89 =
+                                                                constructor_output_reg(ctx, v88);
+                                                            // Rule at src/isa/aarch64/lower.isle line 77.
+                                                            return Some(v89);
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                        _ => {}
+                                    }
+                                }
+                            }
+                            let v48 = C::def_inst(ctx, v31.0);
+                            if let Some(v49) = v48 {
+                                let v50 = &C::inst_data(ctx, v49);
+                                match v50 {
+                                    &InstructionData::Binary {
+                                        opcode: ref v90,
+                                        args: ref v91,
+                                    } => {
+                                        match v90 {
+                                            &Opcode::Imul => {
+                                                let v92 = C::unpack_value_array_2(ctx, v91);
+                                                let v110 = C::put_in_reg(ctx, v92.0);
+                                                let v111 = C::put_in_reg(ctx, v92.1);
+                                                let v112 = C::put_in_reg(ctx, v31.1);
+                                                let v113 =
+                                                    constructor_madd(ctx, v28, v110, v111, v112);
+                                                let v114 = constructor_output_reg(ctx, v113);
+                                                // Rule at src/isa/aarch64/lower.isle line 91.
+                                                return Some(v114);
+                                            }
+                                            &Opcode::Ishl => {
+                                                let v92 = C::unpack_value_array_2(ctx, v91);
+                                                let v95 = C::def_inst(ctx, v92.1);
+                                                if let Some(v96) = v95 {
+                                                    let v97 = &C::inst_data(ctx, v96);
+                                                    if let &InstructionData::UnaryImm {
+                                                        opcode: ref v98,
+                                                        imm: v99,
+                                                    } = v97
+                                                    {
+                                                        if let &Opcode::Iconst = v98 {
+                                                            let v100 =
+                                                                C::lshl_from_imm64(ctx, v28, v99);
+                                                            if let Some(v101) = v100 {
+                                                                let v56 = C::put_in_reg(ctx, v31.1);
+                                                                let v102 =
+                                                                    C::put_in_reg(ctx, v92.0);
+                                                                let v103 = constructor_add_shift(
+                                                                    ctx, v28, v56, v102, v101,
+                                                                );
+                                                                let v104 = constructor_output_reg(
+                                                                    ctx, v103,
+                                                                );
+                                                                // Rule at src/isa/aarch64/lower.isle line 82.
+                                                                return Some(v104);
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                            _ => {}
+                                        }
+                                    }
+                                    &InstructionData::UnaryImm {
+                                        opcode: ref v51,
+                                        imm: v52,
+                                    } => {
+                                        if let &Opcode::Iconst = v51 {
+                                            let v53 = C::u64_from_imm64(ctx, v52);
+                                            let v54 = C::imm12_from_u64(ctx, v53);
+                                            if let Some(v55) = v54 {
+                                                let v56 = C::put_in_reg(ctx, v31.1);
+                                                let v57 = constructor_add_imm(ctx, v28, v56, v55);
+                                                let v58 = constructor_output_reg(ctx, v57);
+                                                // Rule at src/isa/aarch64/lower.isle line 54.
+                                                return Some(v58);
+                                            }
+                                        }
+                                    }
+                                    _ => {}
+                                }
+                            }
+                            if let Some(v39) = v38 {
+                                let v40 = &C::inst_data(ctx, v39);
+                                if let &InstructionData::UnaryImm {
+                                    opcode: ref v41,
+                                    imm: v42,
+                                } = v40
+                                {
+                                    if let &Opcode::Iconst = v41 {
+                                        let v43 = C::u64_from_imm64(ctx, v42);
+                                        let v44 = C::imm12_from_u64(ctx, v43);
+                                        if let Some(v45) = v44 {
+                                            let v34 = C::put_in_reg(ctx, v31.0);
+                                            let v46 = constructor_add_imm(ctx, v28, v34, v45);
+                                            let v47 = constructor_output_reg(ctx, v46);
+                                            // Rule at src/isa/aarch64/lower.isle line 51.
+                                            return Some(v47);
+                                        }
+                                    }
+                                }
+                            }
+                            let v63 = constructor_imm12_from_negated_value(ctx, v31.0);
+                            if let Some(v64) = v63 {
+                                let v56 = C::put_in_reg(ctx, v31.1);
+                                let v65 = constructor_sub_imm(ctx, v28, v56, v64);
+                                let v66 = constructor_output_reg(ctx, v65);
+                                // Rule at src/isa/aarch64/lower.isle line 63.
+                                return Some(v66);
+                            }
+                            let v59 = constructor_imm12_from_negated_value(ctx, v31.1);
+                            if let Some(v60) = v59 {
+                                let v34 = C::put_in_reg(ctx, v31.0);
+                                let v61 = constructor_sub_imm(ctx, v28, v34, v60);
+                                let v62 = constructor_output_reg(ctx, v61);
+                                // Rule at src/isa/aarch64/lower.isle line 59.
+                                return Some(v62);
+                            }
+                            let v71 = &C::extended_value_from_value(ctx, v31.0);
+                            if let Some(v72) = v71 {
+                                let v56 = C::put_in_reg(ctx, v31.1);
+                                let v73 = constructor_add_extend(ctx, v28, v56, v72);
+                                let v74 = constructor_output_reg(ctx, v73);
+                                // Rule at src/isa/aarch64/lower.isle line 72.
+                                return Some(v74);
+                            }
+                            let v67 = &C::extended_value_from_value(ctx, v31.1);
+                            if let Some(v68) = v67 {
+                                let v34 = C::put_in_reg(ctx, v31.0);
+                                let v69 = constructor_add_extend(ctx, v28, v34, v68);
+                                let v70 = constructor_output_reg(ctx, v69);
+                                // Rule at src/isa/aarch64/lower.isle line 69.
+                                return Some(v70);
+                            }
+                            let v34 = C::put_in_reg(ctx, v31.0);
+                            let v35 = C::put_in_reg(ctx, v31.1);
+                            let v36 = constructor_add(ctx, v28, v34, v35);
+                            let v37 = constructor_output_reg(ctx, v36);
+                            // Rule at src/isa/aarch64/lower.isle line 47.
+                            return Some(v37);
+                        }
+                        let v117 = C::multi_lane(ctx, v3);
+                        if let Some(v118) = v117 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v34 = C::put_in_reg(ctx, v31.0);
+                            let v35 = C::put_in_reg(ctx, v31.1);
+                            let v121 = &constructor_vector_size(ctx, v3);
+                            let v122 = constructor_add_vec(ctx, v34, v35, v121);
+                            let v123 = constructor_output_reg(ctx, v122);
+                            // Rule at src/isa/aarch64/lower.isle line 100.
+                            return Some(v123);
+                        }
+                        if v3 == I128 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v124 = C::put_in_regs(ctx, v31.0);
+                            let v126 = C::value_regs_get(ctx, v124, 0x0);
+                            let v128 = C::value_regs_get(ctx, v124, 0x1);
+                            let v129 = C::put_in_regs(ctx, v31.1);
+                            let v130 = C::value_regs_get(ctx, v129, 0x0);
+                            let v131 = C::value_regs_get(ctx, v129, 0x1);
+                            let v133 = &constructor_add_with_flags_paired(ctx, I64, v126, v130);
+                            let v134 = &constructor_adc_paired(ctx, I64, v128, v131);
+                            let v135 = constructor_with_flags(ctx, v133, v134);
+                            let v136 = C::output(ctx, v135);
+                            // Rule at src/isa/aarch64/lower.isle line 104.
+                            return Some(v136);
+                        }
+                        let v1807 = C::dynamic_lane(ctx, v3);
+                        if let Some(v1808) = v1807 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v34 = C::put_in_reg(ctx, v31.0);
+                            let v35 = C::put_in_reg(ctx, v31.1);
+                            let v121 = &constructor_vector_size(ctx, v3);
+                            let v122 = constructor_add_vec(ctx, v34, v35, v121);
+                            let v1811 = C::value_reg(ctx, v122);
+                            let v1812 = C::output(ctx, v1811);
+                            // Rule at src/isa/aarch64/lower_dynamic_neon.isle line 3.
+                            return Some(v1812);
+                        }
+                    }
+                }
+                &Opcode::Isub => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v27 = C::fits_in_64(ctx, v3);
+                        if let Some(v28) = v27 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v59 = constructor_imm12_from_negated_value(ctx, v31.1);
+                            if let Some(v60) = v59 {
+                                let v34 = C::put_in_reg(ctx, v31.0);
+                                let v564 = constructor_add_imm(ctx, v28, v34, v60);
+                                let v565 = constructor_output_reg(ctx, v564);
+                                // Rule at src/isa/aarch64/lower.isle line 700.
+                                return Some(v565);
+                            }
+                            let v67 = &C::extended_value_from_value(ctx, v31.1);
+                            if let Some(v68) = v67 {
+                                let v34 = C::put_in_reg(ctx, v31.0);
+                                let v566 = constructor_sub_extend(ctx, v28, v34, v68);
+                                let v567 = constructor_output_reg(ctx, v566);
+                                // Rule at src/isa/aarch64/lower.isle line 706.
+                                return Some(v567);
+                            }
+                            let v38 = C::def_inst(ctx, v31.1);
+                            if let Some(v39) = v38 {
+                                let v40 = &C::inst_data(ctx, v39);
+                                match v40 {
+                                    &InstructionData::Binary {
+                                        opcode: ref v75,
+                                        args: ref v76,
+                                    } => {
+                                        if let &Opcode::Imul = v75 {
+                                            let v77 = C::unpack_value_array_2(ctx, v76);
+                                            let v105 = C::put_in_reg(ctx, v77.0);
+                                            let v106 = C::put_in_reg(ctx, v77.1);
+                                            let v107 = C::put_in_reg(ctx, v31.0);
+                                            let v115 = constructor_msub(ctx, v28, v105, v106, v107);
+                                            let v116 = constructor_output_reg(ctx, v115);
+                                            // Rule at src/isa/aarch64/lower.isle line 95.
+                                            return Some(v116);
+                                        }
+                                    }
+                                    &InstructionData::UnaryImm {
+                                        opcode: ref v41,
+                                        imm: v42,
+                                    } => {
+                                        if let &Opcode::Iconst = v41 {
+                                            let v43 = C::u64_from_imm64(ctx, v42);
+                                            let v44 = C::imm12_from_u64(ctx, v43);
+                                            if let Some(v45) = v44 {
+                                                let v34 = C::put_in_reg(ctx, v31.0);
+                                                let v562 = constructor_sub_imm(ctx, v28, v34, v45);
+                                                let v563 = constructor_output_reg(ctx, v562);
+                                                // Rule at src/isa/aarch64/lower.isle line 695.
+                                                return Some(v563);
+                                            }
+                                        }
+                                    }
+                                    _ => {}
+                                }
+                            }
+                        }
+                        if v3 == I128 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v124 = C::put_in_regs(ctx, v31.0);
+                            let v572 = C::put_in_regs(ctx, v31.1);
+                            let v573 = constructor_sub_i128(ctx, v124, v572);
+                            let v574 = C::output(ctx, v573);
+                            // Rule at src/isa/aarch64/lower.isle line 721.
+                            return Some(v574);
+                        }
+                        let v117 = C::multi_lane(ctx, v3);
+                        if let Some(v118) = v117 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v34 = C::put_in_reg(ctx, v31.0);
+                            let v35 = C::put_in_reg(ctx, v31.1);
+                            let v121 = &constructor_vector_size(ctx, v3);
+                            let v570 = constructor_sub_vec(ctx, v34, v35, v121);
+                            let v571 = constructor_output_reg(ctx, v570);
+                            // Rule at src/isa/aarch64/lower.isle line 717.
+                            return Some(v571);
+                        }
+                        if let Some(v28) = v27 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v38 = C::def_inst(ctx, v31.1);
+                            if let Some(v39) = v38 {
+                                let v40 = &C::inst_data(ctx, v39);
+                                if let &InstructionData::Binary {
+                                    opcode: ref v75,
+                                    args: ref v76,
+                                } = v40
+                                {
+                                    if let &Opcode::Ishl = v75 {
+                                        let v77 = C::unpack_value_array_2(ctx, v76);
+                                        let v80 = C::def_inst(ctx, v77.1);
+                                        if let Some(v81) = v80 {
+                                            let v82 = &C::inst_data(ctx, v81);
+                                            if let &InstructionData::UnaryImm {
+                                                opcode: ref v83,
+                                                imm: v84,
+                                            } = v82
+                                            {
+                                                if let &Opcode::Iconst = v83 {
+                                                    let v85 = C::lshl_from_imm64(ctx, v28, v84);
+                                                    if let Some(v86) = v85 {
+                                                        let v34 = C::put_in_reg(ctx, v31.0);
+                                                        let v87 = C::put_in_reg(ctx, v77.0);
+                                                        let v568 = constructor_sub_shift(
+                                                            ctx, v28, v34, v87, v86,
+                                                        );
+                                                        let v569 =
+                                                            constructor_output_reg(ctx, v568);
+                                                        // Rule at src/isa/aarch64/lower.isle line 711.
+                                                        return Some(v569);
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                            }
+                            let v34 = C::put_in_reg(ctx, v31.0);
+                            let v35 = C::put_in_reg(ctx, v31.1);
+                            let v560 = constructor_sub(ctx, v28, v34, v35);
+                            let v561 = constructor_output_reg(ctx, v560);
+                            // Rule at src/isa/aarch64/lower.isle line 691.
+                            return Some(v561);
+                        }
+                        let v1807 = C::dynamic_lane(ctx, v3);
+                        if let Some(v1808) = v1807 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v34 = C::put_in_reg(ctx, v31.0);
+                            let v35 = C::put_in_reg(ctx, v31.1);
+                            let v121 = &constructor_vector_size(ctx, v3);
+                            let v570 = constructor_sub_vec(ctx, v34, v35, v121);
+                            let v1813 = C::value_reg(ctx, v570);
+                            let v1814 = C::output(ctx, v1813);
+                            // Rule at src/isa/aarch64/lower_dynamic_neon.isle line 7.
+                            return Some(v1814);
+                        }
+                    }
+                }
+                &Opcode::Imul => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            I128 => {
+                                let v31 = C::unpack_value_array_2(ctx, v30);
+                                let v124 = C::put_in_regs(ctx, v31.0);
+                                let v126 = C::value_regs_get(ctx, v124, 0x0);
+                                let v128 = C::value_regs_get(ctx, v124, 0x1);
+                                let v129 = C::put_in_regs(ctx, v31.1);
+                                let v130 = C::value_regs_get(ctx, v129, 0x0);
+                                let v131 = C::value_regs_get(ctx, v129, 0x1);
+                                let v599 = constructor_umulh(ctx, I64, v126, v130);
+                                let v600 = constructor_madd(ctx, I64, v126, v131, v599);
+                                let v601 = constructor_madd(ctx, I64, v128, v130, v600);
+                                let v602 = C::zero_reg(ctx);
+                                let v603 = constructor_madd(ctx, I64, v126, v130, v602);
+                                let v604 = C::value_regs(ctx, v603, v601);
+                                let v605 = C::output(ctx, v604);
+                                // Rule at src/isa/aarch64/lower.isle line 765.
+                                return Some(v605);
+                            }
+                            I16X8 => {
+                                let v31 = C::unpack_value_array_2(ctx, v30);
+                                let v38 = C::def_inst(ctx, v31.1);
+                                if let Some(v39) = v38 {
+                                    let v40 = &C::inst_data(ctx, v39);
+                                    if let &InstructionData::Unary {
+                                        opcode: ref v300,
+                                        arg: v301,
+                                    } = v40
+                                    {
+                                        match v300 {
+                                            &Opcode::SwidenLow => {
+                                                let v48 = C::def_inst(ctx, v31.0);
+                                                if let Some(v49) = v48 {
+                                                    let v50 = &C::inst_data(ctx, v49);
+                                                    if let &InstructionData::Unary {
+                                                        opcode: ref v298,
+                                                        arg: v299,
+                                                    } = v50
+                                                    {
+                                                        if let &Opcode::SwidenLow = v298 {
+                                                            let v618 = C::value_type(ctx, v299);
+                                                            if v618 == I8X16 {
+                                                                let v619 = C::value_type(ctx, v301);
+                                                                if v619 == I8X16 {
+                                                                    let v302 =
+                                                                        C::put_in_reg(ctx, v299);
+                                                                    let v620 =
+                                                                        C::put_in_reg(ctx, v301);
+                                                                    let v621 = constructor_smull8(
+                                                                        ctx, v302, v620, false,
+                                                                    );
+                                                                    let v622 =
+                                                                        constructor_output_reg(
+                                                                            ctx, v621,
+                                                                        );
+                                                                    // Rule at src/isa/aarch64/lower.isle line 864.
+                                                                    return Some(v622);
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                            &Opcode::SwidenHigh => {
+                                                let v48 = C::def_inst(ctx, v31.0);
+                                                if let Some(v49) = v48 {
+                                                    let v50 = &C::inst_data(ctx, v49);
+                                                    if let &InstructionData::Unary {
+                                                        opcode: ref v298,
+                                                        arg: v299,
+                                                    } = v50
+                                                    {
+                                                        if let &Opcode::SwidenHigh = v298 {
+                                                            let v618 = C::value_type(ctx, v299);
+                                                            if v618 == I8X16 {
+                                                                let v619 = C::value_type(ctx, v301);
+                                                                if v619 == I8X16 {
+                                                                    let v302 =
+                                                                        C::put_in_reg(ctx, v299);
+                                                                    let v620 =
+                                                                        C::put_in_reg(ctx, v301);
+                                                                    let v623 = constructor_smull8(
+                                                                        ctx, v302, v620, true,
+                                                                    );
+                                                                    let v624 =
+                                                                        constructor_output_reg(
+                                                                            ctx, v623,
+                                                                        );
+                                                                    // Rule at src/isa/aarch64/lower.isle line 870.
+                                                                    return Some(v624);
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                            &Opcode::UwidenLow => {
+                                                let v48 = C::def_inst(ctx, v31.0);
+                                                if let Some(v49) = v48 {
+                                                    let v50 = &C::inst_data(ctx, v49);
+                                                    if let &InstructionData::Unary {
+                                                        opcode: ref v298,
+                                                        arg: v299,
+                                                    } = v50
+                                                    {
+                                                        if let &Opcode::UwidenLow = v298 {
+                                                            let v618 = C::value_type(ctx, v299);
+                                                            if v618 == I8X16 {
+                                                                let v619 = C::value_type(ctx, v301);
+                                                                if v619 == I8X16 {
+                                                                    let v302 =
+                                                                        C::put_in_reg(ctx, v299);
+                                                                    let v620 =
+                                                                        C::put_in_reg(ctx, v301);
+                                                                    let v625 = constructor_umull8(
+                                                                        ctx, v302, v620, false,
+                                                                    );
+                                                                    let v626 =
+                                                                        constructor_output_reg(
+                                                                            ctx, v625,
+                                                                        );
+                                                                    // Rule at src/isa/aarch64/lower.isle line 876.
+                                                                    return Some(v626);
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                            &Opcode::UwidenHigh => {
+                                                let v48 = C::def_inst(ctx, v31.0);
+                                                if let Some(v49) = v48 {
+                                                    let v50 = &C::inst_data(ctx, v49);
+                                                    if let &InstructionData::Unary {
+                                                        opcode: ref v298,
+                                                        arg: v299,
+                                                    } = v50
+                                                    {
+                                                        if let &Opcode::UwidenHigh = v298 {
+                                                            let v618 = C::value_type(ctx, v299);
+                                                            if v618 == I8X16 {
+                                                                let v619 = C::value_type(ctx, v301);
+                                                                if v619 == I8X16 {
+                                                                    let v302 =
+                                                                        C::put_in_reg(ctx, v299);
+                                                                    let v620 =
+                                                                        C::put_in_reg(ctx, v301);
+                                                                    let v627 = constructor_umull8(
+                                                                        ctx, v302, v620, true,
+                                                                    );
+                                                                    let v628 =
+                                                                        constructor_output_reg(
+                                                                            ctx, v627,
+                                                                        );
+                                                                    // Rule at src/isa/aarch64/lower.isle line 882.
+                                                                    return Some(v628);
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                            _ => {}
+                                        }
+                                    }
+                                }
+                            }
+                            I32X4 => {
+                                let v31 = C::unpack_value_array_2(ctx, v30);
+                                let v38 = C::def_inst(ctx, v31.1);
+                                if let Some(v39) = v38 {
+                                    let v40 = &C::inst_data(ctx, v39);
+                                    if let &InstructionData::Unary {
+                                        opcode: ref v300,
+                                        arg: v301,
+                                    } = v40
+                                    {
+                                        match v300 {
+                                            &Opcode::SwidenLow => {
+                                                let v48 = C::def_inst(ctx, v31.0);
+                                                if let Some(v49) = v48 {
+                                                    let v50 = &C::inst_data(ctx, v49);
+                                                    if let &InstructionData::Unary {
+                                                        opcode: ref v298,
+                                                        arg: v299,
+                                                    } = v50
+                                                    {
+                                                        if let &Opcode::SwidenLow = v298 {
+                                                            let v618 = C::value_type(ctx, v299);
+                                                            if v618 == I16X8 {
+                                                                let v619 = C::value_type(ctx, v301);
+                                                                if v619 == I16X8 {
+                                                                    let v302 =
+                                                                        C::put_in_reg(ctx, v299);
+                                                                    let v620 =
+                                                                        C::put_in_reg(ctx, v301);
+                                                                    let v629 = constructor_smull16(
+                                                                        ctx, v302, v620, false,
+                                                                    );
+                                                                    let v630 =
+                                                                        constructor_output_reg(
+                                                                            ctx, v629,
+                                                                        );
+                                                                    // Rule at src/isa/aarch64/lower.isle line 888.
+                                                                    return Some(v630);
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                            &Opcode::SwidenHigh => {
+                                                let v48 = C::def_inst(ctx, v31.0);
+                                                if let Some(v49) = v48 {
+                                                    let v50 = &C::inst_data(ctx, v49);
+                                                    if let &InstructionData::Unary {
+                                                        opcode: ref v298,
+                                                        arg: v299,
+                                                    } = v50
+                                                    {
+                                                        if let &Opcode::SwidenHigh = v298 {
+                                                            let v618 = C::value_type(ctx, v299);
+                                                            if v618 == I16X8 {
+                                                                let v619 = C::value_type(ctx, v301);
+                                                                if v619 == I16X8 {
+                                                                    let v302 =
+                                                                        C::put_in_reg(ctx, v299);
+                                                                    let v620 =
+                                                                        C::put_in_reg(ctx, v301);
+                                                                    let v631 = constructor_smull16(
+                                                                        ctx, v302, v620, true,
+                                                                    );
+                                                                    let v632 =
+                                                                        constructor_output_reg(
+                                                                            ctx, v631,
+                                                                        );
+                                                                    // Rule at src/isa/aarch64/lower.isle line 894.
+                                                                    return Some(v632);
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                            &Opcode::UwidenLow => {
+                                                let v48 = C::def_inst(ctx, v31.0);
+                                                if let Some(v49) = v48 {
+                                                    let v50 = &C::inst_data(ctx, v49);
+                                                    if let &InstructionData::Unary {
+                                                        opcode: ref v298,
+                                                        arg: v299,
+                                                    } = v50
+                                                    {
+                                                        if let &Opcode::UwidenLow = v298 {
+                                                            let v618 = C::value_type(ctx, v299);
+                                                            if v618 == I16X8 {
+                                                                let v619 = C::value_type(ctx, v301);
+                                                                if v619 == I16X8 {
+                                                                    let v302 =
+                                                                        C::put_in_reg(ctx, v299);
+                                                                    let v620 =
+                                                                        C::put_in_reg(ctx, v301);
+                                                                    let v633 = constructor_umull16(
+                                                                        ctx, v302, v620, false,
+                                                                    );
+                                                                    let v634 =
+                                                                        constructor_output_reg(
+                                                                            ctx, v633,
+                                                                        );
+                                                                    // Rule at src/isa/aarch64/lower.isle line 900.
+                                                                    return Some(v634);
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                            &Opcode::UwidenHigh => {
+                                                let v48 = C::def_inst(ctx, v31.0);
+                                                if let Some(v49) = v48 {
+                                                    let v50 = &C::inst_data(ctx, v49);
+                                                    if let &InstructionData::Unary {
+                                                        opcode: ref v298,
+                                                        arg: v299,
+                                                    } = v50
+                                                    {
+                                                        if let &Opcode::UwidenHigh = v298 {
+                                                            let v618 = C::value_type(ctx, v299);
+                                                            if v618 == I16X8 {
+                                                                let v619 = C::value_type(ctx, v301);
+                                                                if v619 == I16X8 {
+                                                                    let v302 =
+                                                                        C::put_in_reg(ctx, v299);
+                                                                    let v620 =
+                                                                        C::put_in_reg(ctx, v301);
+                                                                    let v635 = constructor_umull16(
+                                                                        ctx, v302, v620, true,
+                                                                    );
+                                                                    let v636 =
+                                                                        constructor_output_reg(
+                                                                            ctx, v635,
+                                                                        );
+                                                                    // Rule at src/isa/aarch64/lower.isle line 906.
+                                                                    return Some(v636);
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                            _ => {}
+                                        }
+                                    }
+                                }
+                            }
+                            I64X2 => {
+                                let v31 = C::unpack_value_array_2(ctx, v30);
+                                let v38 = C::def_inst(ctx, v31.1);
+                                if let Some(v39) = v38 {
+                                    let v40 = &C::inst_data(ctx, v39);
+                                    if let &InstructionData::Unary {
+                                        opcode: ref v300,
+                                        arg: v301,
+                                    } = v40
+                                    {
+                                        match v300 {
+                                            &Opcode::SwidenLow => {
+                                                let v48 = C::def_inst(ctx, v31.0);
+                                                if let Some(v49) = v48 {
+                                                    let v50 = &C::inst_data(ctx, v49);
+                                                    if let &InstructionData::Unary {
+                                                        opcode: ref v298,
+                                                        arg: v299,
+                                                    } = v50
+                                                    {
+                                                        if let &Opcode::SwidenLow = v298 {
+                                                            let v618 = C::value_type(ctx, v299);
+                                                            if v618 == I32X4 {
+                                                                let v619 = C::value_type(ctx, v301);
+                                                                if v619 == I32X4 {
+                                                                    let v302 =
+                                                                        C::put_in_reg(ctx, v299);
+                                                                    let v620 =
+                                                                        C::put_in_reg(ctx, v301);
+                                                                    let v637 = constructor_smull32(
+                                                                        ctx, v302, v620, false,
+                                                                    );
+                                                                    let v638 =
+                                                                        constructor_output_reg(
+                                                                            ctx, v637,
+                                                                        );
+                                                                    // Rule at src/isa/aarch64/lower.isle line 912.
+                                                                    return Some(v638);
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                            &Opcode::SwidenHigh => {
+                                                let v48 = C::def_inst(ctx, v31.0);
+                                                if let Some(v49) = v48 {
+                                                    let v50 = &C::inst_data(ctx, v49);
+                                                    if let &InstructionData::Unary {
+                                                        opcode: ref v298,
+                                                        arg: v299,
+                                                    } = v50
+                                                    {
+                                                        if let &Opcode::SwidenHigh = v298 {
+                                                            let v618 = C::value_type(ctx, v299);
+                                                            if v618 == I32X4 {
+                                                                let v619 = C::value_type(ctx, v301);
+                                                                if v619 == I32X4 {
+                                                                    let v302 =
+                                                                        C::put_in_reg(ctx, v299);
+                                                                    let v620 =
+                                                                        C::put_in_reg(ctx, v301);
+                                                                    let v639 = constructor_smull32(
+                                                                        ctx, v302, v620, true,
+                                                                    );
+                                                                    let v640 =
+                                                                        constructor_output_reg(
+                                                                            ctx, v639,
+                                                                        );
+                                                                    // Rule at src/isa/aarch64/lower.isle line 918.
+                                                                    return Some(v640);
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                            &Opcode::UwidenLow => {
+                                                let v48 = C::def_inst(ctx, v31.0);
+                                                if let Some(v49) = v48 {
+                                                    let v50 = &C::inst_data(ctx, v49);
+                                                    if let &InstructionData::Unary {
+                                                        opcode: ref v298,
+                                                        arg: v299,
+                                                    } = v50
+                                                    {
+                                                        if let &Opcode::UwidenLow = v298 {
+                                                            let v618 = C::value_type(ctx, v299);
+                                                            if v618 == I32X4 {
+                                                                let v619 = C::value_type(ctx, v301);
+                                                                if v619 == I32X4 {
+                                                                    let v302 =
+                                                                        C::put_in_reg(ctx, v299);
+                                                                    let v620 =
+                                                                        C::put_in_reg(ctx, v301);
+                                                                    let v641 = constructor_umull32(
+                                                                        ctx, v302, v620, false,
+                                                                    );
+                                                                    let v642 =
+                                                                        constructor_output_reg(
+                                                                            ctx, v641,
+                                                                        );
+                                                                    // Rule at src/isa/aarch64/lower.isle line 924.
+                                                                    return Some(v642);
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                            &Opcode::UwidenHigh => {
+                                                let v48 = C::def_inst(ctx, v31.0);
+                                                if let Some(v49) = v48 {
+                                                    let v50 = &C::inst_data(ctx, v49);
+                                                    if let &InstructionData::Unary {
+                                                        opcode: ref v298,
+                                                        arg: v299,
+                                                    } = v50
+                                                    {
+                                                        if let &Opcode::UwidenHigh = v298 {
+                                                            let v618 = C::value_type(ctx, v299);
+                                                            if v618 == I32X4 {
+                                                                let v619 = C::value_type(ctx, v301);
+                                                                if v619 == I32X4 {
+                                                                    let v302 =
+                                                                        C::put_in_reg(ctx, v299);
+                                                                    let v620 =
+                                                                        C::put_in_reg(ctx, v301);
+                                                                    let v643 = constructor_umull32(
+                                                                        ctx, v302, v620, true,
+                                                                    );
+                                                                    let v644 =
+                                                                        constructor_output_reg(
+                                                                            ctx, v643,
+                                                                        );
+                                                                    // Rule at src/isa/aarch64/lower.isle line 930.
+                                                                    return Some(v644);
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                            _ => {}
+                                        }
+                                    }
+                                }
+                                let v34 = C::put_in_reg(ctx, v31.0);
+                                let v35 = C::put_in_reg(ctx, v31.1);
+                                let v610 = constructor_rev64(ctx, v35, &VectorSize::Size32x4);
+                                let v611 = constructor_mul(ctx, v610, v34, &VectorSize::Size32x4);
+                                let v612 = constructor_xtn(ctx, v34, &ScalarSize::Size32);
+                                let v613 = constructor_addp(ctx, v611, v611, &VectorSize::Size32x4);
+                                let v614 = constructor_xtn(ctx, v35, &ScalarSize::Size32);
+                                let v615 = constructor_shll32(ctx, v613, false);
+                                let v616 = constructor_umlal32(ctx, v615, v614, v612, false);
+                                let v617 = constructor_output_reg(ctx, v616);
+                                // Rule at src/isa/aarch64/lower.isle line 825.
+                                return Some(v617);
+                            }
+                            _ => {}
+                        }
+                        let v575 = C::ty_vec128(ctx, v3);
+                        if let Some(v576) = v575 {
+                            let v606 = C::not_i64x2(ctx, v576);
+                            if let Some(v607) = v606 {
+                                let v31 = C::unpack_value_array_2(ctx, v30);
+                                let v34 = C::put_in_reg(ctx, v31.0);
+                                let v35 = C::put_in_reg(ctx, v31.1);
+                                let v577 = &constructor_vector_size(ctx, v576);
+                                let v608 = constructor_mul(ctx, v34, v35, v577);
+                                let v609 = constructor_output_reg(ctx, v608);
+                                // Rule at src/isa/aarch64/lower.isle line 793.
+                                return Some(v609);
+                            }
+                        }
+                        let v27 = C::fits_in_64(ctx, v3);
+                        if let Some(v28) = v27 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v34 = C::put_in_reg(ctx, v31.0);
+                            let v35 = C::put_in_reg(ctx, v31.1);
+                            let v269 = C::zero_reg(ctx);
+                            let v597 = constructor_madd(ctx, v28, v34, v35, v269);
+                            let v598 = constructor_output_reg(ctx, v597);
+                            // Rule at src/isa/aarch64/lower.isle line 761.
+                            return Some(v598);
+                        }
+                        let v336 = C::lane_fits_in_32(ctx, v3);
+                        if let Some(v337) = v336 {
+                            let v1815 = C::dynamic_lane(ctx, v337);
+                            if let Some(v1816) = v1815 {
+                                let v31 = C::unpack_value_array_2(ctx, v30);
+                                let v34 = C::put_in_reg(ctx, v31.0);
+                                let v35 = C::put_in_reg(ctx, v31.1);
+                                let v339 = &constructor_vector_size(ctx, v337);
+                                let v1820 =
+                                    constructor_vec_rrr(ctx, &VecALUOp::Mul, v34, v35, v339);
+                                let v1821 = C::value_reg(ctx, v1820);
+                                let v1822 = C::output(ctx, v1821);
+                                // Rule at src/isa/aarch64/lower_dynamic_neon.isle line 11.
+                                return Some(v1822);
+                            }
+                        }
+                    }
+                }
+                &Opcode::Umulhi => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        if v3 == I64 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v34 = C::put_in_reg(ctx, v31.0);
+                            let v35 = C::put_in_reg(ctx, v31.1);
+                            let v654 = constructor_umulh(ctx, I64, v34, v35);
+                            let v655 = constructor_output_reg(ctx, v654);
+                            // Rule at src/isa/aarch64/lower.isle line 949.
+                            return Some(v655);
+                        }
+                        let v318 = C::fits_in_32(ctx, v3);
+                        if let Some(v319) = v318 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v656 = constructor_put_in_reg_zext64(ctx, v31.0);
+                            let v657 = constructor_put_in_reg_zext64(ctx, v31.1);
+                            let v269 = C::zero_reg(ctx);
+                            let v658 = constructor_madd(ctx, I64, v656, v657, v269);
+                            let v650 = C::ty_bits(ctx, v319);
+                            let v651 = C::imm_shift_from_u8(ctx, v650);
+                            let v659 = constructor_lsr_imm(ctx, I64, v658, v651);
+                            let v660 = C::value_reg(ctx, v659);
+                            let v661 = C::output(ctx, v660);
+                            // Rule at src/isa/aarch64/lower.isle line 952.
+                            return Some(v661);
+                        }
+                    }
+                }
+                &Opcode::Smulhi => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        if v3 == I64 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v34 = C::put_in_reg(ctx, v31.0);
+                            let v35 = C::put_in_reg(ctx, v31.1);
+                            let v645 = constructor_smulh(ctx, I64, v34, v35);
+                            let v646 = constructor_output_reg(ctx, v645);
+                            // Rule at src/isa/aarch64/lower.isle line 937.
+                            return Some(v646);
+                        }
+                        let v318 = C::fits_in_32(ctx, v3);
+                        if let Some(v319) = v318 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v647 = constructor_put_in_reg_sext64(ctx, v31.0);
+                            let v648 = constructor_put_in_reg_sext64(ctx, v31.1);
+                            let v269 = C::zero_reg(ctx);
+                            let v649 = constructor_madd(ctx, I64, v647, v648, v269);
+                            let v650 = C::ty_bits(ctx, v319);
+                            let v651 = C::imm_shift_from_u8(ctx, v650);
+                            let v652 = constructor_asr_imm(ctx, I64, v649, v651);
+                            let v653 = constructor_output_reg(ctx, v652);
+                            // Rule at src/isa/aarch64/lower.isle line 940.
+                            return Some(v653);
+                        }
+                    }
+                }
+                &Opcode::SqmulRoundSat => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v117 = C::multi_lane(ctx, v3);
+                        if let Some(v118) = v117 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v34 = C::put_in_reg(ctx, v31.0);
+                            let v35 = C::put_in_reg(ctx, v31.1);
+                            let v121 = &constructor_vector_size(ctx, v3);
+                            let v343 =
+                                constructor_vec_rrr(ctx, &VecALUOp::Sqrdmulh, v34, v35, v121);
+                            let v344 = constructor_output_reg(ctx, v343);
+                            // Rule at src/isa/aarch64/lower.isle line 367.
+                            return Some(v344);
+                        }
+                    }
+                }
+                &Opcode::Udiv => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v27 = C::fits_in_64(ctx, v3);
+                        if let Some(v28) = v27 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v656 = constructor_put_in_reg_zext64(ctx, v31.0);
+                            let v662 = constructor_put_nonzero_in_reg_zext64(ctx, v31.1);
+                            let v663 = constructor_a64_udiv(ctx, I64, v656, v662);
+                            let v664 = constructor_output_reg(ctx, v663);
+                            // Rule at src/isa/aarch64/lower.isle line 968.
+                            return Some(v664);
+                        }
+                    }
+                }
+                &Opcode::Sdiv => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v27 = C::fits_in_64(ctx, v3);
+                        if let Some(v28) = v27 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v38 = C::def_inst(ctx, v31.1);
+                            if let Some(v39) = v38 {
+                                let v40 = &C::inst_data(ctx, v39);
+                                if let &InstructionData::UnaryImm {
+                                    opcode: ref v41,
+                                    imm: v42,
+                                } = v40
+                                {
+                                    if let &Opcode::Iconst = v41 {
+                                        let v669 = C::safe_divisor_from_imm64(ctx, v28, v42);
+                                        if let Some(v670) = v669 {
+                                            let v647 = constructor_put_in_reg_sext64(ctx, v31.0);
+                                            let v672 =
+                                                constructor_imm(ctx, v28, &ImmExtend::Sign, v670);
+                                            let v673 = constructor_a64_sdiv(ctx, I64, v647, v672);
+                                            let v674 = constructor_output_reg(ctx, v673);
+                                            // Rule at src/isa/aarch64/lower.isle line 1010.
+                                            return Some(v674);
+                                        }
+                                    }
+                                }
+                            }
+                            let v647 = constructor_put_in_reg_sext64(ctx, v31.0);
+                            let v665 = constructor_put_nonzero_in_reg_sext64(ctx, v31.1);
+                            let v666 = constructor_trap_if_div_overflow(ctx, v28, v647, v665);
+                            let v667 = constructor_a64_sdiv(ctx, I64, v666, v665);
+                            let v668 = constructor_output_reg(ctx, v667);
+                            // Rule at src/isa/aarch64/lower.isle line 1001.
+                            return Some(v668);
+                        }
+                    }
+                }
+                &Opcode::Urem => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v27 = C::fits_in_64(ctx, v3);
+                        if let Some(v28) = v27 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v656 = constructor_put_in_reg_zext64(ctx, v31.0);
+                            let v662 = constructor_put_nonzero_in_reg_zext64(ctx, v31.1);
+                            let v663 = constructor_a64_udiv(ctx, I64, v656, v662);
+                            let v675 = constructor_msub(ctx, I64, v663, v662, v656);
+                            let v676 = constructor_output_reg(ctx, v675);
+                            // Rule at src/isa/aarch64/lower.isle line 1039.
+                            return Some(v676);
+                        }
+                    }
+                }
+                &Opcode::Srem => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v27 = C::fits_in_64(ctx, v3);
+                        if let Some(v28) = v27 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v647 = constructor_put_in_reg_sext64(ctx, v31.0);
+                            let v665 = constructor_put_nonzero_in_reg_sext64(ctx, v31.1);
+                            let v677 = constructor_a64_sdiv(ctx, I64, v647, v665);
+                            let v678 = constructor_msub(ctx, I64, v677, v665, v647);
+                            let v679 = constructor_output_reg(ctx, v678);
+                            // Rule at src/isa/aarch64/lower.isle line 1046.
+                            return Some(v679);
+                        }
+                    }
+                }
+                &Opcode::UaddOverflow => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v1726 = C::ty_32_or_64(ctx, v3);
+                        if let Some(v1727) = v1726 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v1730 = constructor_overflow_op_normal(
+                                ctx,
+                                v1727,
+                                v31.0,
+                                v31.1,
+                                &ALUOp::AddS,
+                                &Cond::Hs,
+                            );
+                            // Rule at src/isa/aarch64/lower.isle line 2671.
+                            return Some(v1730);
+                        }
+                        let v909 = C::fits_in_16(ctx, v3);
+                        if let Some(v910) = v909 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v1725 = constructor_overflow_op_small(
+                                ctx,
+                                v910,
+                                v31.0,
+                                v31.1,
+                                &ArgumentExtension::Uext,
+                                &ALUOp::Add,
+                            );
+                            // Rule at src/isa/aarch64/lower.isle line 2667.
+                            return Some(v1725);
+                        }
+                        if v3 == I128 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v1732 = constructor_overflow_op_128(
+                                ctx,
+                                v31.0,
+                                v31.1,
+                                &ALUOp::AddS,
+                                &ALUOp::AdcS,
+                                &Cond::Hs,
+                            );
+                            // Rule at src/isa/aarch64/lower.isle line 2675.
+                            return Some(v1732);
+                        }
+                    }
+                }
+                &Opcode::SaddOverflow => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v1726 = C::ty_32_or_64(ctx, v3);
+                        if let Some(v1727) = v1726 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v1736 = constructor_overflow_op_normal(
+                                ctx,
+                                v1727,
+                                v31.0,
+                                v31.1,
+                                &ALUOp::AddS,
+                                &Cond::Vs,
+                            );
+                            // Rule at src/isa/aarch64/lower.isle line 2689.
+                            return Some(v1736);
+                        }
+                        let v909 = C::fits_in_16(ctx, v3);
+                        if let Some(v910) = v909 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v1734 = constructor_overflow_op_small(
+                                ctx,
+                                v910,
+                                v31.0,
+                                v31.1,
+                                &ArgumentExtension::Sext,
+                                &ALUOp::Add,
+                            );
+                            // Rule at src/isa/aarch64/lower.isle line 2684.
+                            return Some(v1734);
+                        }
+                        if v3 == I128 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v1737 = constructor_overflow_op_128(
+                                ctx,
+                                v31.0,
+                                v31.1,
+                                &ALUOp::AddS,
+                                &ALUOp::AdcS,
+                                &Cond::Vs,
+                            );
+                            // Rule at src/isa/aarch64/lower.isle line 2695.
+                            return Some(v1737);
+                        }
+                    }
+                }
+                &Opcode::UsubOverflow => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v1726 = C::ty_32_or_64(ctx, v3);
+                        if let Some(v1727) = v1726 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v1741 = constructor_overflow_op_normal(
+                                ctx,
+                                v1727,
+                                v31.0,
+                                v31.1,
+                                &ALUOp::SubS,
+                                &Cond::Lo,
+                            );
+                            // Rule at src/isa/aarch64/lower.isle line 2709.
+                            return Some(v1741);
+                        }
+                        let v909 = C::fits_in_16(ctx, v3);
+                        if let Some(v910) = v909 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v1739 = constructor_overflow_op_small(
+                                ctx,
+                                v910,
+                                v31.0,
+                                v31.1,
+                                &ArgumentExtension::Uext,
+                                &ALUOp::Sub,
+                            );
+                            // Rule at src/isa/aarch64/lower.isle line 2704.
+                            return Some(v1739);
+                        }
+                        if v3 == I128 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v1743 = constructor_overflow_op_128(
+                                ctx,
+                                v31.0,
+                                v31.1,
+                                &ALUOp::SubS,
+                                &ALUOp::SbcS,
+                                &Cond::Lo,
+                            );
+                            // Rule at src/isa/aarch64/lower.isle line 2715.
+                            return Some(v1743);
+                        }
+                    }
+                }
+                &Opcode::SsubOverflow => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v1726 = C::ty_32_or_64(ctx, v3);
+                        if let Some(v1727) = v1726 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v1745 = constructor_overflow_op_normal(
+                                ctx,
+                                v1727,
+                                v31.0,
+                                v31.1,
+                                &ALUOp::SubS,
+                                &Cond::Vs,
+                            );
+                            // Rule at src/isa/aarch64/lower.isle line 2729.
+                            return Some(v1745);
+                        }
+                        let v909 = C::fits_in_16(ctx, v3);
+                        if let Some(v910) = v909 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v1744 = constructor_overflow_op_small(
+                                ctx,
+                                v910,
+                                v31.0,
+                                v31.1,
+                                &ArgumentExtension::Sext,
+                                &ALUOp::Sub,
+                            );
+                            // Rule at src/isa/aarch64/lower.isle line 2724.
+                            return Some(v1744);
+                        }
+                        if v3 == I128 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v1746 = constructor_overflow_op_128(
+                                ctx,
+                                v31.0,
+                                v31.1,
+                                &ALUOp::SubS,
+                                &ALUOp::SbcS,
+                                &Cond::Vs,
+                            );
+                            // Rule at src/isa/aarch64/lower.isle line 2735.
+                            return Some(v1746);
+                        }
+                    }
+                }
+                &Opcode::UmulOverflow => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            I32 => {
+                                let v31 = C::unpack_value_array_2(ctx, v30);
+                                let v34 = C::put_in_reg(ctx, v31.0);
+                                let v35 = C::put_in_reg(ctx, v31.1);
+                                let v269 = C::zero_reg(ctx);
+                                let v1757 = constructor_umaddl(ctx, v34, v35, v269);
+                                let v1759 = &constructor_cmp_extend(
+                                    ctx,
+                                    &OperandSize::Size64,
+                                    v1757,
+                                    v1757,
+                                    &ExtendOp::UXTW,
+                                );
+                                let v1760 = &constructor_cset(ctx, &Cond::Ne);
+                                let v1761 = constructor_with_flags_reg(ctx, v1759, v1760);
+                                let v1762 = C::value_reg(ctx, v1757);
+                                let v1763 = C::value_reg(ctx, v1761);
+                                let v1764 = C::output_pair(ctx, v1762, v1763);
+                                // Rule at src/isa/aarch64/lower.isle line 2761.
+                                return Some(v1764);
+                            }
+                            I64 => {
+                                let v31 = C::unpack_value_array_2(ctx, v30);
+                                let v34 = C::put_in_reg(ctx, v31.0);
+                                let v35 = C::put_in_reg(ctx, v31.1);
+                                let v269 = C::zero_reg(ctx);
+                                let v1765 = constructor_madd(ctx, I64, v34, v35, v269);
+                                let v922 = C::put_in_reg(ctx, v31.0);
+                                let v1766 = C::put_in_reg(ctx, v31.1);
+                                let v1767 = constructor_umulh(ctx, I64, v922, v1766);
+                                let v1768 = C::u8_into_imm12(ctx, 0x0);
+                                let v1769 = &constructor_cmp64_imm(ctx, v1767, v1768);
+                                let v1770 = &constructor_cset(ctx, &Cond::Ne);
+                                let v1771 = constructor_with_flags_reg(ctx, v1769, v1770);
+                                let v1772 = C::value_reg(ctx, v1765);
+                                let v1773 = C::value_reg(ctx, v1771);
+                                let v1774 = C::output_pair(ctx, v1772, v1773);
+                                // Rule at src/isa/aarch64/lower.isle line 2775.
+                                return Some(v1774);
+                            }
+                            _ => {}
+                        }
+                        let v909 = C::fits_in_16(ctx, v3);
+                        if let Some(v910) = v909 {
+                            let v1747 =
+                                &constructor_lower_extend_op(ctx, v910, &ArgumentExtension::Uext);
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v1748 = constructor_put_in_reg_zext32(ctx, v31.0);
+                            let v1749 = constructor_put_in_reg_zext32(ctx, v31.1);
+                            let v797 = C::zero_reg(ctx);
+                            let v1750 = constructor_madd(ctx, v910, v1748, v1749, v797);
+                            let v1751 = &constructor_cmp_extend(
+                                ctx,
+                                &OperandSize::Size32,
+                                v1750,
+                                v1750,
+                                v1747,
+                            );
+                            let v1752 = &constructor_cset(ctx, &Cond::Ne);
+                            let v1753 = constructor_with_flags_reg(ctx, v1751, v1752);
+                            let v1754 = C::value_reg(ctx, v1750);
+                            let v1755 = C::value_reg(ctx, v1753);
+                            let v1756 = C::output_pair(ctx, v1754, v1755);
+                            // Rule at src/isa/aarch64/lower.isle line 2745.
+                            return Some(v1756);
+                        }
+                    }
+                }
+                &Opcode::SmulOverflow => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            I32 => {
+                                let v31 = C::unpack_value_array_2(ctx, v30);
+                                let v34 = C::put_in_reg(ctx, v31.0);
+                                let v35 = C::put_in_reg(ctx, v31.1);
+                                let v269 = C::zero_reg(ctx);
+                                let v1784 = constructor_smaddl(ctx, v34, v35, v269);
+                                let v1786 = &constructor_cmp_extend(
+                                    ctx,
+                                    &OperandSize::Size64,
+                                    v1784,
+                                    v1784,
+                                    &ExtendOp::SXTW,
+                                );
+                                let v1760 = &constructor_cset(ctx, &Cond::Ne);
+                                let v1787 = constructor_with_flags_reg(ctx, v1786, v1760);
+                                let v1788 = C::value_reg(ctx, v1784);
+                                let v1789 = C::value_reg(ctx, v1787);
+                                let v1790 = C::output_pair(ctx, v1788, v1789);
+                                // Rule at src/isa/aarch64/lower.isle line 2809.
+                                return Some(v1790);
+                            }
+                            I64 => {
+                                let v31 = C::unpack_value_array_2(ctx, v30);
+                                let v34 = C::put_in_reg(ctx, v31.0);
+                                let v35 = C::put_in_reg(ctx, v31.1);
+                                let v269 = C::zero_reg(ctx);
+                                let v1765 = constructor_madd(ctx, I64, v34, v35, v269);
+                                let v922 = C::put_in_reg(ctx, v31.0);
+                                let v1766 = C::put_in_reg(ctx, v31.1);
+                                let v1791 = constructor_smulh(ctx, I64, v922, v1766);
+                                let v1793 = &constructor_cmp_rr_shift_asr(
+                                    ctx,
+                                    &OperandSize::Size64,
+                                    v1791,
+                                    v1765,
+                                    0x3F,
+                                );
+                                let v1794 = &constructor_cset(ctx, &Cond::Ne);
+                                let v1795 = constructor_with_flags_reg(ctx, v1793, v1794);
+                                let v1796 = C::value_reg(ctx, v1765);
+                                let v1797 = C::value_reg(ctx, v1795);
+                                let v1798 = C::output_pair(ctx, v1796, v1797);
+                                // Rule at src/isa/aarch64/lower.isle line 2823.
+                                return Some(v1798);
+                            }
+                            _ => {}
+                        }
+                        let v909 = C::fits_in_16(ctx, v3);
+                        if let Some(v910) = v909 {
+                            let v1775 =
+                                &constructor_lower_extend_op(ctx, v910, &ArgumentExtension::Sext);
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v1776 = constructor_put_in_reg_sext32(ctx, v31.0);
+                            let v1777 = constructor_put_in_reg_sext32(ctx, v31.1);
+                            let v797 = C::zero_reg(ctx);
+                            let v1778 = constructor_madd(ctx, v910, v1776, v1777, v797);
+                            let v1779 = &constructor_cmp_extend(
+                                ctx,
+                                &OperandSize::Size32,
+                                v1778,
+                                v1778,
+                                v1775,
+                            );
+                            let v1752 = &constructor_cset(ctx, &Cond::Ne);
+                            let v1780 = constructor_with_flags_reg(ctx, v1779, v1752);
+                            let v1781 = C::value_reg(ctx, v1778);
+                            let v1782 = C::value_reg(ctx, v1780);
+                            let v1783 = C::output_pair(ctx, v1781, v1782);
+                            // Rule at src/isa/aarch64/lower.isle line 2793.
+                            return Some(v1783);
+                        }
+                    }
+                }
+                &Opcode::Band => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v575 = C::ty_vec128(ctx, v3);
+                        if let Some(v576) = v575 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v48 = C::def_inst(ctx, v31.0);
+                            if let Some(v49) = v48 {
+                                let v50 = &C::inst_data(ctx, v49);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v298,
+                                    arg: v299,
+                                } = v50
+                                {
+                                    if let &Opcode::Bnot = v298 {
+                                        let v56 = C::put_in_reg(ctx, v31.1);
+                                        let v828 = C::put_in_reg(ctx, v299);
+                                        let v577 = &constructor_vector_size(ctx, v576);
+                                        let v829 = constructor_bic_vec(ctx, v56, v828, v577);
+                                        let v830 = constructor_output_reg(ctx, v829);
+                                        // Rule at src/isa/aarch64/lower.isle line 1249.
+                                        return Some(v830);
+                                    }
+                                }
+                            }
+                            let v38 = C::def_inst(ctx, v31.1);
+                            if let Some(v39) = v38 {
+                                let v40 = &C::inst_data(ctx, v39);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v300,
+                                    arg: v301,
+                                } = v40
+                                {
+                                    if let &Opcode::Bnot = v300 {
+                                        let v34 = C::put_in_reg(ctx, v31.0);
+                                        let v620 = C::put_in_reg(ctx, v301);
+                                        let v577 = &constructor_vector_size(ctx, v576);
+                                        let v826 = constructor_bic_vec(ctx, v34, v620, v577);
+                                        let v827 = constructor_output_reg(ctx, v826);
+                                        // Rule at src/isa/aarch64/lower.isle line 1247.
+                                        return Some(v827);
+                                    }
+                                }
+                            }
+                        }
+                        if v3 == I128 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v48 = C::def_inst(ctx, v31.0);
+                            if let Some(v49) = v48 {
+                                let v50 = &C::inst_data(ctx, v49);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v298,
+                                    arg: v299,
+                                } = v50
+                                {
+                                    if let &Opcode::Bnot = v298 {
+                                        let v824 = constructor_i128_alu_bitop(
+                                            ctx,
+                                            &ALUOp::AndNot,
+                                            I64,
+                                            v31.1,
+                                            v299,
+                                        );
+                                        let v825 = C::output(ctx, v824);
+                                        // Rule at src/isa/aarch64/lower.isle line 1245.
+                                        return Some(v825);
+                                    }
+                                }
+                            }
+                            let v38 = C::def_inst(ctx, v31.1);
+                            if let Some(v39) = v38 {
+                                let v40 = &C::inst_data(ctx, v39);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v300,
+                                    arg: v301,
+                                } = v40
+                                {
+                                    if let &Opcode::Bnot = v300 {
+                                        let v822 = constructor_i128_alu_bitop(
+                                            ctx,
+                                            &ALUOp::AndNot,
+                                            I64,
+                                            v31.0,
+                                            v301,
+                                        );
+                                        let v823 = C::output(ctx, v822);
+                                        // Rule at src/isa/aarch64/lower.isle line 1244.
+                                        return Some(v823);
+                                    }
+                                }
+                            }
+                        }
+                        let v27 = C::fits_in_64(ctx, v3);
+                        if let Some(v28) = v27 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v48 = C::def_inst(ctx, v31.0);
+                            if let Some(v49) = v48 {
+                                let v50 = &C::inst_data(ctx, v49);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v298,
+                                    arg: v299,
+                                } = v50
+                                {
+                                    if let &Opcode::Bnot = v298 {
+                                        let v820 = constructor_alu_rs_imm_logic(
+                                            ctx,
+                                            &ALUOp::AndNot,
+                                            v28,
+                                            v31.1,
+                                            v299,
+                                        );
+                                        let v821 = constructor_output_reg(ctx, v820);
+                                        // Rule at src/isa/aarch64/lower.isle line 1241.
+                                        return Some(v821);
+                                    }
+                                }
+                            }
+                            let v38 = C::def_inst(ctx, v31.1);
+                            if let Some(v39) = v38 {
+                                let v40 = &C::inst_data(ctx, v39);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v300,
+                                    arg: v301,
+                                } = v40
+                                {
+                                    if let &Opcode::Bnot = v300 {
+                                        let v818 = constructor_alu_rs_imm_logic(
+                                            ctx,
+                                            &ALUOp::AndNot,
+                                            v28,
+                                            v31.0,
+                                            v301,
+                                        );
+                                        let v819 = constructor_output_reg(ctx, v818);
+                                        // Rule at src/isa/aarch64/lower.isle line 1239.
+                                        return Some(v819);
+                                    }
+                                }
+                            }
+                        }
+                        if v3 == I128 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v813 =
+                                constructor_i128_alu_bitop(ctx, &ALUOp::And, I64, v31.0, v31.1);
+                            let v814 = C::output(ctx, v813);
+                            // Rule at src/isa/aarch64/lower.isle line 1230.
+                            return Some(v814);
+                        }
+                        if let Some(v28) = v27 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v811 = constructor_alu_rs_imm_logic_commutative(
+                                ctx,
+                                &ALUOp::And,
+                                v28,
+                                v31.0,
+                                v31.1,
+                            );
+                            let v812 = constructor_output_reg(ctx, v811);
+                            // Rule at src/isa/aarch64/lower.isle line 1227.
+                            return Some(v812);
+                        }
+                        if let Some(v576) = v575 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v34 = C::put_in_reg(ctx, v31.0);
+                            let v35 = C::put_in_reg(ctx, v31.1);
+                            let v577 = &constructor_vector_size(ctx, v576);
+                            let v815 = constructor_and_vec(ctx, v34, v35, v577);
+                            let v816 = constructor_output_reg(ctx, v815);
+                            // Rule at src/isa/aarch64/lower.isle line 1232.
+                            return Some(v816);
+                        }
+                    }
+                }
+                &Opcode::Bor => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        if v3 == I128 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v48 = C::def_inst(ctx, v31.0);
+                            if let Some(v49) = v48 {
+                                let v50 = &C::inst_data(ctx, v49);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v298,
+                                    arg: v299,
+                                } = v50
+                                {
+                                    if let &Opcode::Bnot = v298 {
+                                        let v845 = constructor_i128_alu_bitop(
+                                            ctx,
+                                            &ALUOp::OrrNot,
+                                            I64,
+                                            v31.1,
+                                            v299,
+                                        );
+                                        let v846 = C::output(ctx, v845);
+                                        // Rule at src/isa/aarch64/lower.isle line 1272.
+                                        return Some(v846);
+                                    }
+                                }
+                            }
+                            let v38 = C::def_inst(ctx, v31.1);
+                            if let Some(v39) = v38 {
+                                let v40 = &C::inst_data(ctx, v39);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v300,
+                                    arg: v301,
+                                } = v40
+                                {
+                                    if let &Opcode::Bnot = v300 {
+                                        let v843 = constructor_i128_alu_bitop(
+                                            ctx,
+                                            &ALUOp::OrrNot,
+                                            I64,
+                                            v31.0,
+                                            v301,
+                                        );
+                                        let v844 = C::output(ctx, v843);
+                                        // Rule at src/isa/aarch64/lower.isle line 1271.
+                                        return Some(v844);
+                                    }
+                                }
+                            }
+                        }
+                        let v27 = C::fits_in_64(ctx, v3);
+                        if let Some(v28) = v27 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v48 = C::def_inst(ctx, v31.0);
+                            if let Some(v49) = v48 {
+                                let v50 = &C::inst_data(ctx, v49);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v298,
+                                    arg: v299,
+                                } = v50
+                                {
+                                    if let &Opcode::Bnot = v298 {
+                                        let v841 = constructor_alu_rs_imm_logic(
+                                            ctx,
+                                            &ALUOp::OrrNot,
+                                            v28,
+                                            v31.1,
+                                            v299,
+                                        );
+                                        let v842 = constructor_output_reg(ctx, v841);
+                                        // Rule at src/isa/aarch64/lower.isle line 1268.
+                                        return Some(v842);
+                                    }
+                                }
+                            }
+                            let v38 = C::def_inst(ctx, v31.1);
+                            if let Some(v39) = v38 {
+                                let v40 = &C::inst_data(ctx, v39);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v300,
+                                    arg: v301,
+                                } = v40
+                                {
+                                    if let &Opcode::Bnot = v300 {
+                                        let v839 = constructor_alu_rs_imm_logic(
+                                            ctx,
+                                            &ALUOp::OrrNot,
+                                            v28,
+                                            v31.0,
+                                            v301,
+                                        );
+                                        let v840 = constructor_output_reg(ctx, v839);
+                                        // Rule at src/isa/aarch64/lower.isle line 1266.
+                                        return Some(v840);
+                                    }
+                                }
+                            }
+                        }
+                        if v3 == I128 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v834 =
+                                constructor_i128_alu_bitop(ctx, &ALUOp::Orr, I64, v31.0, v31.1);
+                            let v835 = C::output(ctx, v834);
+                            // Rule at src/isa/aarch64/lower.isle line 1257.
+                            return Some(v835);
+                        }
+                        if let Some(v28) = v27 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v832 = constructor_alu_rs_imm_logic_commutative(
+                                ctx,
+                                &ALUOp::Orr,
+                                v28,
+                                v31.0,
+                                v31.1,
+                            );
+                            let v833 = constructor_output_reg(ctx, v832);
+                            // Rule at src/isa/aarch64/lower.isle line 1254.
+                            return Some(v833);
+                        }
+                        let v575 = C::ty_vec128(ctx, v3);
+                        if let Some(v576) = v575 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v34 = C::put_in_reg(ctx, v31.0);
+                            let v35 = C::put_in_reg(ctx, v31.1);
+                            let v577 = &constructor_vector_size(ctx, v576);
+                            let v836 = constructor_orr_vec(ctx, v34, v35, v577);
+                            let v837 = constructor_output_reg(ctx, v836);
+                            // Rule at src/isa/aarch64/lower.isle line 1259.
+                            return Some(v837);
+                        }
+                    }
+                }
+                &Opcode::Bxor => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        if v3 == I128 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v48 = C::def_inst(ctx, v31.0);
+                            if let Some(v49) = v48 {
+                                let v50 = &C::inst_data(ctx, v49);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v298,
+                                    arg: v299,
+                                } = v50
+                                {
+                                    if let &Opcode::Bnot = v298 {
+                                        let v860 = constructor_i128_alu_bitop(
+                                            ctx,
+                                            &ALUOp::EorNot,
+                                            I64,
+                                            v31.1,
+                                            v299,
+                                        );
+                                        let v861 = C::output(ctx, v860);
+                                        // Rule at src/isa/aarch64/lower.isle line 1294.
+                                        return Some(v861);
+                                    }
+                                }
+                            }
+                            let v38 = C::def_inst(ctx, v31.1);
+                            if let Some(v39) = v38 {
+                                let v40 = &C::inst_data(ctx, v39);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v300,
+                                    arg: v301,
+                                } = v40
+                                {
+                                    if let &Opcode::Bnot = v300 {
+                                        let v858 = constructor_i128_alu_bitop(
+                                            ctx,
+                                            &ALUOp::EorNot,
+                                            I64,
+                                            v31.0,
+                                            v301,
+                                        );
+                                        let v859 = C::output(ctx, v858);
+                                        // Rule at src/isa/aarch64/lower.isle line 1293.
+                                        return Some(v859);
+                                    }
+                                }
+                            }
+                        }
+                        let v27 = C::fits_in_64(ctx, v3);
+                        if let Some(v28) = v27 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v48 = C::def_inst(ctx, v31.0);
+                            if let Some(v49) = v48 {
+                                let v50 = &C::inst_data(ctx, v49);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v298,
+                                    arg: v299,
+                                } = v50
+                                {
+                                    if let &Opcode::Bnot = v298 {
+                                        let v856 = constructor_alu_rs_imm_logic(
+                                            ctx,
+                                            &ALUOp::EorNot,
+                                            v28,
+                                            v31.1,
+                                            v299,
+                                        );
+                                        let v857 = constructor_output_reg(ctx, v856);
+                                        // Rule at src/isa/aarch64/lower.isle line 1290.
+                                        return Some(v857);
+                                    }
+                                }
+                            }
+                            let v38 = C::def_inst(ctx, v31.1);
+                            if let Some(v39) = v38 {
+                                let v40 = &C::inst_data(ctx, v39);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v300,
+                                    arg: v301,
+                                } = v40
+                                {
+                                    if let &Opcode::Bnot = v300 {
+                                        let v854 = constructor_alu_rs_imm_logic(
+                                            ctx,
+                                            &ALUOp::EorNot,
+                                            v28,
+                                            v31.0,
+                                            v301,
+                                        );
+                                        let v855 = constructor_output_reg(ctx, v854);
+                                        // Rule at src/isa/aarch64/lower.isle line 1288.
+                                        return Some(v855);
+                                    }
+                                }
+                            }
+                        }
+                        if v3 == I128 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v850 =
+                                constructor_i128_alu_bitop(ctx, &ALUOp::Eor, I64, v31.0, v31.1);
+                            let v851 = C::output(ctx, v850);
+                            // Rule at src/isa/aarch64/lower.isle line 1279.
+                            return Some(v851);
+                        }
+                        if let Some(v28) = v27 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v848 = constructor_alu_rs_imm_logic_commutative(
+                                ctx,
+                                &ALUOp::Eor,
+                                v28,
+                                v31.0,
+                                v31.1,
+                            );
+                            let v849 = constructor_output_reg(ctx, v848);
+                            // Rule at src/isa/aarch64/lower.isle line 1276.
+                            return Some(v849);
+                        }
+                        let v575 = C::ty_vec128(ctx, v3);
+                        if let Some(v576) = v575 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v34 = C::put_in_reg(ctx, v31.0);
+                            let v35 = C::put_in_reg(ctx, v31.1);
+                            let v577 = &constructor_vector_size(ctx, v576);
+                            let v852 = constructor_eor_vec(ctx, v34, v35, v577);
+                            let v853 = constructor_output_reg(ctx, v852);
+                            // Rule at src/isa/aarch64/lower.isle line 1281.
+                            return Some(v853);
+                        }
+                    }
+                }
+                &Opcode::Rotl => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            I32 => {
+                                let v31 = C::unpack_value_array_2(ctx, v30);
+                                let v38 = C::def_inst(ctx, v31.1);
+                                if let Some(v39) = v38 {
+                                    let v40 = &C::inst_data(ctx, v39);
+                                    if let &InstructionData::UnaryImm {
+                                        opcode: ref v41,
+                                        imm: v42,
+                                    } = v40
+                                    {
+                                        if let &Opcode::Iconst = v41 {
+                                            let v928 = C::imm_shift_from_imm64(ctx, I32, v42);
+                                            if let Some(v929) = v928 {
+                                                let v34 = C::put_in_reg(ctx, v31.0);
+                                                let v930 = C::negate_imm_shift(ctx, I32, v929);
+                                                let v931 =
+                                                    constructor_a64_rotr_imm(ctx, I32, v34, v930);
+                                                let v932 = constructor_output_reg(ctx, v931);
+                                                // Rule at src/isa/aarch64/lower.isle line 1538.
+                                                return Some(v932);
+                                            }
+                                        }
+                                    }
+                                }
+                                let v911 = C::put_in_regs(ctx, v31.1);
+                                let v912 = C::value_regs_get(ctx, v911, 0x0);
+                                let v269 = C::zero_reg(ctx);
+                                let v913 = constructor_sub(ctx, I32, v269, v912);
+                                let v922 = C::put_in_reg(ctx, v31.0);
+                                let v923 = constructor_a64_rotr(ctx, I32, v922, v913);
+                                let v924 = constructor_output_reg(ctx, v923);
+                                // Rule at src/isa/aarch64/lower.isle line 1526.
+                                return Some(v924);
+                            }
+                            I64 => {
+                                let v31 = C::unpack_value_array_2(ctx, v30);
+                                let v38 = C::def_inst(ctx, v31.1);
+                                if let Some(v39) = v38 {
+                                    let v40 = &C::inst_data(ctx, v39);
+                                    if let &InstructionData::UnaryImm {
+                                        opcode: ref v41,
+                                        imm: v42,
+                                    } = v40
+                                    {
+                                        if let &Opcode::Iconst = v41 {
+                                            let v933 = C::imm_shift_from_imm64(ctx, I64, v42);
+                                            if let Some(v934) = v933 {
+                                                let v34 = C::put_in_reg(ctx, v31.0);
+                                                let v935 = C::negate_imm_shift(ctx, I64, v934);
+                                                let v936 =
+                                                    constructor_a64_rotr_imm(ctx, I64, v34, v935);
+                                                let v937 = constructor_output_reg(ctx, v936);
+                                                // Rule at src/isa/aarch64/lower.isle line 1543.
+                                                return Some(v937);
+                                            }
+                                        }
+                                    }
+                                }
+                                let v911 = C::put_in_regs(ctx, v31.1);
+                                let v912 = C::value_regs_get(ctx, v911, 0x0);
+                                let v269 = C::zero_reg(ctx);
+                                let v925 = constructor_sub(ctx, I64, v269, v912);
+                                let v922 = C::put_in_reg(ctx, v31.0);
+                                let v926 = constructor_a64_rotr(ctx, I64, v922, v925);
+                                let v927 = constructor_output_reg(ctx, v926);
+                                // Rule at src/isa/aarch64/lower.isle line 1532.
+                                return Some(v927);
+                            }
+                            I128 => {
+                                let v31 = C::unpack_value_array_2(ctx, v30);
+                                let v124 = C::put_in_regs(ctx, v31.0);
+                                let v572 = C::put_in_regs(ctx, v31.1);
+                                let v867 = C::value_regs_get(ctx, v572, 0x0);
+                                let v939 = constructor_imm(ctx, I64, &ImmExtend::Zero, 0x80);
+                                let v940 = constructor_sub(ctx, I64, v939, v867);
+                                let v941 = constructor_lower_shl128(ctx, v124, v867);
+                                let v942 = constructor_lower_ushr128(ctx, v124, v940);
+                                let v943 = C::value_regs_get(ctx, v941, 0x0);
+                                let v944 = C::value_regs_get(ctx, v942, 0x0);
+                                let v945 = constructor_orr(ctx, I64, v943, v944);
+                                let v946 = C::value_regs_get(ctx, v941, 0x1);
+                                let v947 = C::value_regs_get(ctx, v942, 0x1);
+                                let v948 = constructor_orr(ctx, I64, v946, v947);
+                                let v949 = C::value_regs(ctx, v945, v948);
+                                let v950 = C::output(ctx, v949);
+                                // Rule at src/isa/aarch64/lower.isle line 1553.
+                                return Some(v950);
+                            }
+                            _ => {}
+                        }
+                        let v909 = C::fits_in_16(ctx, v3);
+                        if let Some(v910) = v909 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v38 = C::def_inst(ctx, v31.1);
+                            if let Some(v39) = v38 {
+                                let v40 = &C::inst_data(ctx, v39);
+                                if let &InstructionData::UnaryImm {
+                                    opcode: ref v41,
+                                    imm: v42,
+                                } = v40
+                                {
+                                    if let &Opcode::Iconst = v41 {
+                                        let v917 = C::imm_shift_from_imm64(ctx, v910, v42);
+                                        if let Some(v918) = v917 {
+                                            let v881 = constructor_put_in_reg_zext32(ctx, v31.0);
+                                            let v919 = C::negate_imm_shift(ctx, v910, v918);
+                                            let v920 =
+                                                constructor_small_rotr_imm(ctx, v910, v881, v919);
+                                            let v921 = constructor_output_reg(ctx, v920);
+                                            // Rule at src/isa/aarch64/lower.isle line 1513.
+                                            return Some(v921);
+                                        }
+                                    }
+                                }
+                            }
+                            let v911 = C::put_in_regs(ctx, v31.1);
+                            let v912 = C::value_regs_get(ctx, v911, 0x0);
+                            let v269 = C::zero_reg(ctx);
+                            let v913 = constructor_sub(ctx, I32, v269, v912);
+                            let v914 = constructor_put_in_reg_zext32(ctx, v31.0);
+                            let v915 = constructor_small_rotr(ctx, v910, v914, v913);
+                            let v916 = constructor_output_reg(ctx, v915);
+                            // Rule at src/isa/aarch64/lower.isle line 1507.
+                            return Some(v916);
+                        }
+                    }
+                }
+                &Opcode::Rotr => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            I32 => {
+                                let v31 = C::unpack_value_array_2(ctx, v30);
+                                let v38 = C::def_inst(ctx, v31.1);
+                                if let Some(v39) = v38 {
+                                    let v40 = &C::inst_data(ctx, v39);
+                                    if let &InstructionData::UnaryImm {
+                                        opcode: ref v41,
+                                        imm: v42,
+                                    } = v40
+                                    {
+                                        if let &Opcode::Iconst = v41 {
+                                            let v928 = C::imm_shift_from_imm64(ctx, I32, v42);
+                                            if let Some(v929) = v928 {
+                                                let v34 = C::put_in_reg(ctx, v31.0);
+                                                let v959 =
+                                                    constructor_a64_rotr_imm(ctx, I32, v34, v929);
+                                                let v960 = constructor_output_reg(ctx, v959);
+                                                // Rule at src/isa/aarch64/lower.isle line 1583.
+                                                return Some(v960);
+                                            }
+                                        }
+                                    }
+                                }
+                                let v34 = C::put_in_reg(ctx, v31.0);
+                                let v572 = C::put_in_regs(ctx, v31.1);
+                                let v867 = C::value_regs_get(ctx, v572, 0x0);
+                                let v953 = constructor_a64_rotr(ctx, I32, v34, v867);
+                                let v954 = constructor_output_reg(ctx, v953);
+                                // Rule at src/isa/aarch64/lower.isle line 1570.
+                                return Some(v954);
+                            }
+                            I64 => {
+                                let v31 = C::unpack_value_array_2(ctx, v30);
+                                let v38 = C::def_inst(ctx, v31.1);
+                                if let Some(v39) = v38 {
+                                    let v40 = &C::inst_data(ctx, v39);
+                                    if let &InstructionData::UnaryImm {
+                                        opcode: ref v41,
+                                        imm: v42,
+                                    } = v40
+                                    {
+                                        if let &Opcode::Iconst = v41 {
+                                            let v933 = C::imm_shift_from_imm64(ctx, I64, v42);
+                                            if let Some(v934) = v933 {
+                                                let v34 = C::put_in_reg(ctx, v31.0);
+                                                let v961 =
+                                                    constructor_a64_rotr_imm(ctx, I64, v34, v934);
+                                                let v962 = constructor_output_reg(ctx, v961);
+                                                // Rule at src/isa/aarch64/lower.isle line 1588.
+                                                return Some(v962);
+                                            }
+                                        }
+                                    }
+                                }
+                                let v34 = C::put_in_reg(ctx, v31.0);
+                                let v572 = C::put_in_regs(ctx, v31.1);
+                                let v867 = C::value_regs_get(ctx, v572, 0x0);
+                                let v955 = constructor_a64_rotr(ctx, I64, v34, v867);
+                                let v956 = constructor_output_reg(ctx, v955);
+                                // Rule at src/isa/aarch64/lower.isle line 1574.
+                                return Some(v956);
+                            }
+                            I128 => {
+                                let v31 = C::unpack_value_array_2(ctx, v30);
+                                let v124 = C::put_in_regs(ctx, v31.0);
+                                let v572 = C::put_in_regs(ctx, v31.1);
+                                let v867 = C::value_regs_get(ctx, v572, 0x0);
+                                let v939 = constructor_imm(ctx, I64, &ImmExtend::Zero, 0x80);
+                                let v940 = constructor_sub(ctx, I64, v939, v867);
+                                let v963 = constructor_lower_ushr128(ctx, v124, v867);
+                                let v964 = constructor_lower_shl128(ctx, v124, v940);
+                                let v965 = C::value_regs_get(ctx, v963, 0x1);
+                                let v966 = C::value_regs_get(ctx, v964, 0x1);
+                                let v967 = constructor_orr(ctx, I64, v965, v966);
+                                let v968 = C::value_regs_get(ctx, v963, 0x0);
+                                let v969 = C::value_regs_get(ctx, v964, 0x0);
+                                let v970 = constructor_orr(ctx, I64, v968, v969);
+                                let v971 = C::value_regs(ctx, v970, v967);
+                                let v972 = C::output(ctx, v971);
+                                // Rule at src/isa/aarch64/lower.isle line 1637.
+                                return Some(v972);
+                            }
+                            _ => {}
+                        }
+                        let v909 = C::fits_in_16(ctx, v3);
+                        if let Some(v910) = v909 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v38 = C::def_inst(ctx, v31.1);
+                            if let Some(v39) = v38 {
+                                let v40 = &C::inst_data(ctx, v39);
+                                if let &InstructionData::UnaryImm {
+                                    opcode: ref v41,
+                                    imm: v42,
+                                } = v40
+                                {
+                                    if let &Opcode::Iconst = v41 {
+                                        let v917 = C::imm_shift_from_imm64(ctx, v910, v42);
+                                        if let Some(v918) = v917 {
+                                            let v881 = constructor_put_in_reg_zext32(ctx, v31.0);
+                                            let v957 =
+                                                constructor_small_rotr_imm(ctx, v910, v881, v918);
+                                            let v958 = constructor_output_reg(ctx, v957);
+                                            // Rule at src/isa/aarch64/lower.isle line 1578.
+                                            return Some(v958);
+                                        }
+                                    }
+                                }
+                            }
+                            let v881 = constructor_put_in_reg_zext32(ctx, v31.0);
+                            let v572 = C::put_in_regs(ctx, v31.1);
+                            let v867 = C::value_regs_get(ctx, v572, 0x0);
+                            let v951 = constructor_small_rotr(ctx, v910, v881, v867);
+                            let v952 = constructor_output_reg(ctx, v951);
+                            // Rule at src/isa/aarch64/lower.isle line 1566.
+                            return Some(v952);
+                        }
+                    }
+                }
+                &Opcode::Ishl => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            I64 => {
+                                let v31 = C::unpack_value_array_2(ctx, v30);
+                                let v34 = C::put_in_reg(ctx, v31.0);
+                                let v865 = constructor_do_shift(ctx, &ALUOp::Lsl, I64, v34, v31.1);
+                                let v866 = constructor_output_reg(ctx, v865);
+                                // Rule at src/isa/aarch64/lower.isle line 1303.
+                                return Some(v866);
+                            }
+                            I128 => {
+                                let v31 = C::unpack_value_array_2(ctx, v30);
+                                let v124 = C::put_in_regs(ctx, v31.0);
+                                let v572 = C::put_in_regs(ctx, v31.1);
+                                let v867 = C::value_regs_get(ctx, v572, 0x0);
+                                let v868 = constructor_lower_shl128(ctx, v124, v867);
+                                let v869 = C::output(ctx, v868);
+                                // Rule at src/isa/aarch64/lower.isle line 1307.
+                                return Some(v869);
+                            }
+                            _ => {}
+                        }
+                        let v318 = C::fits_in_32(ctx, v3);
+                        if let Some(v319) = v318 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v34 = C::put_in_reg(ctx, v31.0);
+                            let v863 = constructor_do_shift(ctx, &ALUOp::Lsl, v319, v34, v31.1);
+                            let v864 = constructor_output_reg(ctx, v863);
+                            // Rule at src/isa/aarch64/lower.isle line 1299.
+                            return Some(v864);
+                        }
+                        let v575 = C::ty_vec128(ctx, v3);
+                        if let Some(v576) = v575 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v38 = C::def_inst(ctx, v31.1);
+                            if let Some(v39) = v38 {
+                                let v40 = &C::inst_data(ctx, v39);
+                                if let &InstructionData::UnaryImm {
+                                    opcode: ref v41,
+                                    imm: v42,
+                                } = v40
+                                {
+                                    if let &Opcode::Iconst = v41 {
+                                        let v34 = C::put_in_reg(ctx, v31.0);
+                                        let v594 = &constructor_vector_size(ctx, v576);
+                                        let v43 = C::u64_from_imm64(ctx, v42);
+                                        let v877 = C::shift_masked_imm(ctx, v576, v43);
+                                        let v878 = constructor_ushl_vec_imm(ctx, v34, v877, v594);
+                                        let v879 = constructor_output_reg(ctx, v878);
+                                        // Rule at src/isa/aarch64/lower.isle line 1342.
+                                        return Some(v879);
+                                    }
+                                }
+                            }
+                            let v870 = &constructor_vector_size(ctx, v576);
+                            let v35 = C::put_in_reg(ctx, v31.1);
+                            let v872 = C::shift_mask(ctx, v576);
+                            let v873 = constructor_and_imm(ctx, I32, v35, v872);
+                            let v874 = constructor_vec_dup(ctx, v873, v870);
+                            let v328 = C::put_in_reg(ctx, v31.0);
+                            let v875 = constructor_sshl(ctx, v328, v874, v870);
+                            let v876 = constructor_output_reg(ctx, v875);
+                            // Rule at src/isa/aarch64/lower.isle line 1337.
+                            return Some(v876);
+                        }
+                    }
+                }
+                &Opcode::Ushr => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            I64 => {
+                                let v31 = C::unpack_value_array_2(ctx, v30);
+                                let v656 = constructor_put_in_reg_zext64(ctx, v31.0);
+                                let v884 = constructor_do_shift(ctx, &ALUOp::Lsr, I64, v656, v31.1);
+                                let v885 = constructor_output_reg(ctx, v884);
+                                // Rule at src/isa/aarch64/lower.isle line 1394.
+                                return Some(v885);
+                            }
+                            I128 => {
+                                let v31 = C::unpack_value_array_2(ctx, v30);
+                                let v124 = C::put_in_regs(ctx, v31.0);
+                                let v572 = C::put_in_regs(ctx, v31.1);
+                                let v867 = C::value_regs_get(ctx, v572, 0x0);
+                                let v886 = constructor_lower_ushr128(ctx, v124, v867);
+                                let v887 = C::output(ctx, v886);
+                                // Rule at src/isa/aarch64/lower.isle line 1398.
+                                return Some(v887);
+                            }
+                            _ => {}
+                        }
+                        let v318 = C::fits_in_32(ctx, v3);
+                        if let Some(v319) = v318 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v881 = constructor_put_in_reg_zext32(ctx, v31.0);
+                            let v882 = constructor_do_shift(ctx, &ALUOp::Lsr, v319, v881, v31.1);
+                            let v883 = constructor_output_reg(ctx, v882);
+                            // Rule at src/isa/aarch64/lower.isle line 1390.
+                            return Some(v883);
+                        }
+                        let v575 = C::ty_vec128(ctx, v3);
+                        if let Some(v576) = v575 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v38 = C::def_inst(ctx, v31.1);
+                            if let Some(v39) = v38 {
+                                let v40 = &C::inst_data(ctx, v39);
+                                if let &InstructionData::UnaryImm {
+                                    opcode: ref v41,
+                                    imm: v42,
+                                } = v40
+                                {
+                                    if let &Opcode::Iconst = v41 {
+                                        let v43 = C::u64_from_imm64(ctx, v42);
+                                        let v877 = C::shift_masked_imm(ctx, v576, v43);
+                                        if v877 == 0x0 {
+                                            let v896 = constructor_output_value(ctx, v31.0);
+                                            // Rule at src/isa/aarch64/lower.isle line 1413.
+                                            return Some(v896);
+                                        }
+                                        let v34 = C::put_in_reg(ctx, v31.0);
+                                        let v594 = &constructor_vector_size(ctx, v576);
+                                        let v894 = constructor_ushr_vec_imm(ctx, v34, v877, v594);
+                                        let v895 = constructor_output_reg(ctx, v894);
+                                        // Rule at src/isa/aarch64/lower.isle line 1411.
+                                        return Some(v895);
+                                    }
+                                }
+                            }
+                            let v870 = &constructor_vector_size(ctx, v576);
+                            let v35 = C::put_in_reg(ctx, v31.1);
+                            let v872 = C::shift_mask(ctx, v576);
+                            let v873 = constructor_and_imm(ctx, I32, v35, v872);
+                            let v888 = C::zero_reg(ctx);
+                            let v889 = constructor_sub(ctx, I64, v888, v873);
+                            let v890 = constructor_vec_dup(ctx, v889, v870);
+                            let v891 = C::put_in_reg(ctx, v31.0);
+                            let v892 = constructor_ushl(ctx, v891, v890, v870);
+                            let v893 = constructor_output_reg(ctx, v892);
+                            // Rule at src/isa/aarch64/lower.isle line 1406.
+                            return Some(v893);
+                        }
+                    }
+                }
+                &Opcode::Sshr => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            I64 => {
+                                let v31 = C::unpack_value_array_2(ctx, v30);
+                                let v647 = constructor_put_in_reg_sext64(ctx, v31.0);
+                                let v901 = constructor_do_shift(ctx, &ALUOp::Asr, I64, v647, v31.1);
+                                let v902 = constructor_output_reg(ctx, v901);
+                                // Rule at src/isa/aarch64/lower.isle line 1451.
+                                return Some(v902);
+                            }
+                            I128 => {
+                                let v31 = C::unpack_value_array_2(ctx, v30);
+                                let v124 = C::put_in_regs(ctx, v31.0);
+                                let v572 = C::put_in_regs(ctx, v31.1);
+                                let v867 = C::value_regs_get(ctx, v572, 0x0);
+                                let v903 = constructor_lower_sshr128(ctx, v124, v867);
+                                let v904 = C::output(ctx, v903);
+                                // Rule at src/isa/aarch64/lower.isle line 1455.
+                                return Some(v904);
+                            }
+                            _ => {}
+                        }
+                        let v575 = C::ty_vec128(ctx, v3);
+                        if let Some(v576) = v575 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v38 = C::def_inst(ctx, v31.1);
+                            if let Some(v39) = v38 {
+                                let v40 = &C::inst_data(ctx, v39);
+                                if let &InstructionData::UnaryImm {
+                                    opcode: ref v41,
+                                    imm: v42,
+                                } = v40
+                                {
+                                    if let &Opcode::Iconst = v41 {
+                                        let v43 = C::u64_from_imm64(ctx, v42);
+                                        let v877 = C::shift_masked_imm(ctx, v576, v43);
+                                        if v877 == 0x0 {
+                                            let v896 = constructor_output_value(ctx, v31.0);
+                                            // Rule at src/isa/aarch64/lower.isle line 1471.
+                                            return Some(v896);
+                                        }
+                                        let v34 = C::put_in_reg(ctx, v31.0);
+                                        let v594 = &constructor_vector_size(ctx, v576);
+                                        let v907 = constructor_sshr_vec_imm(ctx, v34, v877, v594);
+                                        let v908 = constructor_output_reg(ctx, v907);
+                                        // Rule at src/isa/aarch64/lower.isle line 1469.
+                                        return Some(v908);
+                                    }
+                                }
+                            }
+                            let v870 = &constructor_vector_size(ctx, v576);
+                            let v35 = C::put_in_reg(ctx, v31.1);
+                            let v872 = C::shift_mask(ctx, v576);
+                            let v873 = constructor_and_imm(ctx, I32, v35, v872);
+                            let v888 = C::zero_reg(ctx);
+                            let v889 = constructor_sub(ctx, I64, v888, v873);
+                            let v890 = constructor_vec_dup(ctx, v889, v870);
+                            let v891 = C::put_in_reg(ctx, v31.0);
+                            let v905 = constructor_sshl(ctx, v891, v890, v870);
+                            let v906 = constructor_output_reg(ctx, v905);
+                            // Rule at src/isa/aarch64/lower.isle line 1464.
+                            return Some(v906);
+                        }
+                        let v318 = C::fits_in_32(ctx, v3);
+                        if let Some(v319) = v318 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v898 = constructor_put_in_reg_sext32(ctx, v31.0);
+                            let v899 = constructor_do_shift(ctx, &ALUOp::Asr, v319, v898, v31.1);
+                            let v900 = constructor_output_reg(ctx, v899);
+                            // Rule at src/isa/aarch64/lower.isle line 1447.
+                            return Some(v900);
+                        }
+                    }
+                }
+                &Opcode::Fadd => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v348 = C::ty_scalar_float(ctx, v3);
+                        if let Some(v349) = v348 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v34 = C::put_in_reg(ctx, v31.0);
+                            let v35 = C::put_in_reg(ctx, v31.1);
+                            let v351 = &constructor_scalar_size(ctx, v349);
+                            let v352 = constructor_fpu_rrr(ctx, &FPUOp2::Add, v34, v35, v351);
+                            let v353 = constructor_output_reg(ctx, v352);
+                            // Rule at src/isa/aarch64/lower.isle line 375.
+                            return Some(v353);
+                        }
+                        let v117 = C::multi_lane(ctx, v3);
+                        if let Some(v118) = v117 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v34 = C::put_in_reg(ctx, v31.0);
+                            let v35 = C::put_in_reg(ctx, v31.1);
+                            let v121 = &constructor_vector_size(ctx, v3);
+                            let v346 = constructor_vec_rrr(ctx, &VecALUOp::Fadd, v34, v35, v121);
+                            let v347 = constructor_output_reg(ctx, v346);
+                            // Rule at src/isa/aarch64/lower.isle line 372.
+                            return Some(v347);
+                        }
+                        let v1807 = C::dynamic_lane(ctx, v3);
+                        if let Some(v1808) = v1807 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v34 = C::put_in_reg(ctx, v31.0);
+                            let v35 = C::put_in_reg(ctx, v31.1);
+                            let v121 = &constructor_vector_size(ctx, v3);
+                            let v346 = constructor_vec_rrr(ctx, &VecALUOp::Fadd, v34, v35, v121);
+                            let v1823 = C::value_reg(ctx, v346);
+                            let v1824 = C::output(ctx, v1823);
+                            // Rule at src/isa/aarch64/lower_dynamic_neon.isle line 15.
+                            return Some(v1824);
+                        }
+                    }
+                }
+                &Opcode::Fsub => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v348 = C::ty_scalar_float(ctx, v3);
+                        if let Some(v349) = v348 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v34 = C::put_in_reg(ctx, v31.0);
+                            let v35 = C::put_in_reg(ctx, v31.1);
+                            let v351 = &constructor_scalar_size(ctx, v349);
+                            let v358 = constructor_fpu_rrr(ctx, &FPUOp2::Sub, v34, v35, v351);
+                            let v359 = constructor_output_reg(ctx, v358);
+                            // Rule at src/isa/aarch64/lower.isle line 383.
+                            return Some(v359);
+                        }
+                        let v117 = C::multi_lane(ctx, v3);
+                        if let Some(v118) = v117 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v34 = C::put_in_reg(ctx, v31.0);
+                            let v35 = C::put_in_reg(ctx, v31.1);
+                            let v121 = &constructor_vector_size(ctx, v3);
+                            let v355 = constructor_vec_rrr(ctx, &VecALUOp::Fsub, v34, v35, v121);
+                            let v356 = constructor_output_reg(ctx, v355);
+                            // Rule at src/isa/aarch64/lower.isle line 380.
+                            return Some(v356);
+                        }
+                        let v1807 = C::dynamic_lane(ctx, v3);
+                        if let Some(v1808) = v1807 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v34 = C::put_in_reg(ctx, v31.0);
+                            let v35 = C::put_in_reg(ctx, v31.1);
+                            let v121 = &constructor_vector_size(ctx, v3);
+                            let v355 = constructor_vec_rrr(ctx, &VecALUOp::Fsub, v34, v35, v121);
+                            let v1825 = C::value_reg(ctx, v355);
+                            let v1826 = C::output(ctx, v1825);
+                            // Rule at src/isa/aarch64/lower_dynamic_neon.isle line 19.
+                            return Some(v1826);
+                        }
+                    }
+                }
+                &Opcode::Fmul => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v348 = C::ty_scalar_float(ctx, v3);
+                        if let Some(v349) = v348 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v34 = C::put_in_reg(ctx, v31.0);
+                            let v35 = C::put_in_reg(ctx, v31.1);
+                            let v351 = &constructor_scalar_size(ctx, v349);
+                            let v364 = constructor_fpu_rrr(ctx, &FPUOp2::Mul, v34, v35, v351);
+                            let v365 = constructor_output_reg(ctx, v364);
+                            // Rule at src/isa/aarch64/lower.isle line 391.
+                            return Some(v365);
+                        }
+                        let v117 = C::multi_lane(ctx, v3);
+                        if let Some(v118) = v117 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v34 = C::put_in_reg(ctx, v31.0);
+                            let v35 = C::put_in_reg(ctx, v31.1);
+                            let v121 = &constructor_vector_size(ctx, v3);
+                            let v361 = constructor_vec_rrr(ctx, &VecALUOp::Fmul, v34, v35, v121);
+                            let v362 = constructor_output_reg(ctx, v361);
+                            // Rule at src/isa/aarch64/lower.isle line 388.
+                            return Some(v362);
+                        }
+                        let v1807 = C::dynamic_lane(ctx, v3);
+                        if let Some(v1808) = v1807 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v34 = C::put_in_reg(ctx, v31.0);
+                            let v35 = C::put_in_reg(ctx, v31.1);
+                            let v121 = &constructor_vector_size(ctx, v3);
+                            let v361 = constructor_vec_rrr(ctx, &VecALUOp::Fmul, v34, v35, v121);
+                            let v1827 = C::value_reg(ctx, v361);
+                            let v1828 = C::output(ctx, v1827);
+                            // Rule at src/isa/aarch64/lower_dynamic_neon.isle line 23.
+                            return Some(v1828);
+                        }
+                    }
+                }
+                &Opcode::Fdiv => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v348 = C::ty_scalar_float(ctx, v3);
+                        if let Some(v349) = v348 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v34 = C::put_in_reg(ctx, v31.0);
+                            let v35 = C::put_in_reg(ctx, v31.1);
+                            let v351 = &constructor_scalar_size(ctx, v349);
+                            let v370 = constructor_fpu_rrr(ctx, &FPUOp2::Div, v34, v35, v351);
+                            let v371 = constructor_output_reg(ctx, v370);
+                            // Rule at src/isa/aarch64/lower.isle line 399.
+                            return Some(v371);
+                        }
+                        let v117 = C::multi_lane(ctx, v3);
+                        if let Some(v118) = v117 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v34 = C::put_in_reg(ctx, v31.0);
+                            let v35 = C::put_in_reg(ctx, v31.1);
+                            let v121 = &constructor_vector_size(ctx, v3);
+                            let v367 = constructor_vec_rrr(ctx, &VecALUOp::Fdiv, v34, v35, v121);
+                            let v368 = constructor_output_reg(ctx, v367);
+                            // Rule at src/isa/aarch64/lower.isle line 396.
+                            return Some(v368);
+                        }
+                        let v1807 = C::dynamic_lane(ctx, v3);
+                        if let Some(v1808) = v1807 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v34 = C::put_in_reg(ctx, v31.0);
+                            let v35 = C::put_in_reg(ctx, v31.1);
+                            let v121 = &constructor_vector_size(ctx, v3);
+                            let v367 = constructor_vec_rrr(ctx, &VecALUOp::Fdiv, v34, v35, v121);
+                            let v1829 = C::value_reg(ctx, v367);
+                            let v1830 = C::output(ctx, v1829);
+                            // Rule at src/isa/aarch64/lower_dynamic_neon.isle line 27.
+                            return Some(v1830);
+                        }
+                    }
+                }
+                &Opcode::Fcopysign => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v31 = C::unpack_value_array_2(ctx, v30);
+                        let v34 = C::put_in_reg(ctx, v31.0);
+                        let v35 = C::put_in_reg(ctx, v31.1);
+                        let v3 = C::value_type(ctx, v2);
+                        let v478 = constructor_fcopy_sign(ctx, v34, v35, v3);
+                        let v479 = constructor_output_reg(ctx, v478);
+                        // Rule at src/isa/aarch64/lower.isle line 575.
+                        return Some(v479);
+                    }
+                }
+                &Opcode::Fmin => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v348 = C::ty_scalar_float(ctx, v3);
+                        if let Some(v349) = v348 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v34 = C::put_in_reg(ctx, v31.0);
+                            let v35 = C::put_in_reg(ctx, v31.1);
+                            let v351 = &constructor_scalar_size(ctx, v349);
+                            let v376 = constructor_fpu_rrr(ctx, &FPUOp2::Min, v34, v35, v351);
+                            let v377 = constructor_output_reg(ctx, v376);
+                            // Rule at src/isa/aarch64/lower.isle line 407.
+                            return Some(v377);
+                        }
+                        let v117 = C::multi_lane(ctx, v3);
+                        if let Some(v118) = v117 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v34 = C::put_in_reg(ctx, v31.0);
+                            let v35 = C::put_in_reg(ctx, v31.1);
+                            let v121 = &constructor_vector_size(ctx, v3);
+                            let v373 = constructor_vec_rrr(ctx, &VecALUOp::Fmin, v34, v35, v121);
+                            let v374 = constructor_output_reg(ctx, v373);
+                            // Rule at src/isa/aarch64/lower.isle line 404.
+                            return Some(v374);
+                        }
+                        let v1807 = C::dynamic_lane(ctx, v3);
+                        if let Some(v1808) = v1807 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v34 = C::put_in_reg(ctx, v31.0);
+                            let v35 = C::put_in_reg(ctx, v31.1);
+                            let v121 = &constructor_vector_size(ctx, v3);
+                            let v373 = constructor_vec_rrr(ctx, &VecALUOp::Fmin, v34, v35, v121);
+                            let v1831 = C::value_reg(ctx, v373);
+                            let v1832 = C::output(ctx, v1831);
+                            // Rule at src/isa/aarch64/lower_dynamic_neon.isle line 31.
+                            return Some(v1832);
+                        }
+                    }
+                }
+                &Opcode::FminPseudo => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v348 = C::ty_scalar_float(ctx, v3);
+                        if let Some(v349) = v348 {
+                            let v389 = &constructor_scalar_size(ctx, v349);
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v325 = C::put_in_reg(ctx, v31.0);
+                            let v112 = C::put_in_reg(ctx, v31.1);
+                            let v390 = &constructor_fpu_cmp(ctx, v389, v325, v112);
+                            let v386 = C::put_in_reg(ctx, v31.1);
+                            let v328 = C::put_in_reg(ctx, v31.0);
+                            let v392 = &constructor_fpu_csel(ctx, v349, &Cond::Gt, v386, v328);
+                            let v393 = constructor_with_flags(ctx, v390, v392);
+                            let v394 = C::output(ctx, v393);
+                            // Rule at src/isa/aarch64/lower.isle line 423.
+                            return Some(v394);
+                        }
+                        let v117 = C::multi_lane(ctx, v3);
+                        if let Some(v118) = v117 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v34 = C::put_in_reg(ctx, v31.0);
+                            let v35 = C::put_in_reg(ctx, v31.1);
+                            let v121 = &constructor_vector_size(ctx, v3);
+                            let v385 = constructor_vec_rrr(ctx, &VecALUOp::Fcmgt, v34, v35, v121);
+                            let v386 = C::put_in_reg(ctx, v31.1);
+                            let v328 = C::put_in_reg(ctx, v31.0);
+                            let v387 = constructor_bsl(ctx, v3, v385, v386, v328);
+                            let v388 = constructor_output_reg(ctx, v387);
+                            // Rule at src/isa/aarch64/lower.isle line 420.
+                            return Some(v388);
+                        }
+                        let v1807 = C::dynamic_lane(ctx, v3);
+                        if let Some(v1808) = v1807 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v34 = C::put_in_reg(ctx, v31.0);
+                            let v35 = C::put_in_reg(ctx, v31.1);
+                            let v121 = &constructor_vector_size(ctx, v3);
+                            let v385 = constructor_vec_rrr(ctx, &VecALUOp::Fcmgt, v34, v35, v121);
+                            let v386 = C::put_in_reg(ctx, v31.1);
+                            let v328 = C::put_in_reg(ctx, v31.0);
+                            let v387 = constructor_bsl(ctx, v3, v385, v386, v328);
+                            let v1835 = C::value_reg(ctx, v387);
+                            let v1836 = C::output(ctx, v1835);
+                            // Rule at src/isa/aarch64/lower_dynamic_neon.isle line 39.
+                            return Some(v1836);
+                        }
+                    }
+                }
+                &Opcode::Fmax => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v348 = C::ty_scalar_float(ctx, v3);
+                        if let Some(v349) = v348 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v34 = C::put_in_reg(ctx, v31.0);
+                            let v35 = C::put_in_reg(ctx, v31.1);
+                            let v351 = &constructor_scalar_size(ctx, v349);
+                            let v382 = constructor_fpu_rrr(ctx, &FPUOp2::Max, v34, v35, v351);
+                            let v383 = constructor_output_reg(ctx, v382);
+                            // Rule at src/isa/aarch64/lower.isle line 415.
+                            return Some(v383);
+                        }
+                        let v117 = C::multi_lane(ctx, v3);
+                        if let Some(v118) = v117 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v34 = C::put_in_reg(ctx, v31.0);
+                            let v35 = C::put_in_reg(ctx, v31.1);
+                            let v121 = &constructor_vector_size(ctx, v3);
+                            let v379 = constructor_vec_rrr(ctx, &VecALUOp::Fmax, v34, v35, v121);
+                            let v380 = constructor_output_reg(ctx, v379);
+                            // Rule at src/isa/aarch64/lower.isle line 412.
+                            return Some(v380);
+                        }
+                        let v1807 = C::dynamic_lane(ctx, v3);
+                        if let Some(v1808) = v1807 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v34 = C::put_in_reg(ctx, v31.0);
+                            let v35 = C::put_in_reg(ctx, v31.1);
+                            let v121 = &constructor_vector_size(ctx, v3);
+                            let v379 = constructor_vec_rrr(ctx, &VecALUOp::Fmax, v34, v35, v121);
+                            let v1833 = C::value_reg(ctx, v379);
+                            let v1834 = C::output(ctx, v1833);
+                            // Rule at src/isa/aarch64/lower_dynamic_neon.isle line 35.
+                            return Some(v1834);
+                        }
+                    }
+                }
+                &Opcode::FmaxPseudo => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v348 = C::ty_scalar_float(ctx, v3);
+                        if let Some(v349) = v348 {
+                            let v389 = &constructor_scalar_size(ctx, v349);
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v35 = C::put_in_reg(ctx, v31.1);
+                            let v107 = C::put_in_reg(ctx, v31.0);
+                            let v398 = &constructor_fpu_cmp(ctx, v389, v35, v107);
+                            let v386 = C::put_in_reg(ctx, v31.1);
+                            let v328 = C::put_in_reg(ctx, v31.0);
+                            let v392 = &constructor_fpu_csel(ctx, v349, &Cond::Gt, v386, v328);
+                            let v399 = constructor_with_flags(ctx, v398, v392);
+                            let v400 = C::output(ctx, v399);
+                            // Rule at src/isa/aarch64/lower.isle line 432.
+                            return Some(v400);
+                        }
+                        let v117 = C::multi_lane(ctx, v3);
+                        if let Some(v118) = v117 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v56 = C::put_in_reg(ctx, v31.1);
+                            let v325 = C::put_in_reg(ctx, v31.0);
+                            let v121 = &constructor_vector_size(ctx, v3);
+                            let v395 = constructor_vec_rrr(ctx, &VecALUOp::Fcmgt, v56, v325, v121);
+                            let v386 = C::put_in_reg(ctx, v31.1);
+                            let v328 = C::put_in_reg(ctx, v31.0);
+                            let v396 = constructor_bsl(ctx, v3, v395, v386, v328);
+                            let v397 = constructor_output_reg(ctx, v396);
+                            // Rule at src/isa/aarch64/lower.isle line 429.
+                            return Some(v397);
+                        }
+                        let v1807 = C::dynamic_lane(ctx, v3);
+                        if let Some(v1808) = v1807 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v56 = C::put_in_reg(ctx, v31.1);
+                            let v325 = C::put_in_reg(ctx, v31.0);
+                            let v121 = &constructor_vector_size(ctx, v3);
+                            let v395 = constructor_vec_rrr(ctx, &VecALUOp::Fcmgt, v56, v325, v121);
+                            let v386 = C::put_in_reg(ctx, v31.1);
+                            let v328 = C::put_in_reg(ctx, v31.0);
+                            let v396 = constructor_bsl(ctx, v3, v395, v386, v328);
+                            let v1837 = C::value_reg(ctx, v396);
+                            let v1838 = C::output(ctx, v1837);
+                            // Rule at src/isa/aarch64/lower_dynamic_neon.isle line 45.
+                            return Some(v1838);
+                        }
+                    }
+                }
+                &Opcode::Snarrow => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v1408 = C::ty_vec64_int(ctx, v3);
+                        if let Some(v1409) = v1408 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v34 = C::put_in_reg(ctx, v31.0);
+                            let v35 = C::put_in_reg(ctx, v31.1);
+                            let v1410 = constructor_mov_vec_elem(
+                                ctx,
+                                v34,
+                                v35,
+                                0x1,
+                                0x0,
+                                &VectorSize::Size64x2,
+                            );
+                            let v1411 = &constructor_lane_size(ctx, v1409);
+                            let v1412 = constructor_sqxtn(ctx, v1410, v1411);
+                            let v1413 = constructor_output_reg(ctx, v1412);
+                            // Rule at src/isa/aarch64/lower.isle line 2144.
+                            return Some(v1413);
+                        }
+                        let v1401 = C::ty_vec128_int(ctx, v3);
+                        if let Some(v1402) = v1401 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v1403 = C::zero_value(ctx, v31.1);
+                            if let Some(v1404) = v1403 {
+                                let v34 = C::put_in_reg(ctx, v31.0);
+                                let v1405 = &constructor_lane_size(ctx, v1402);
+                                let v1406 = constructor_sqxtn(ctx, v34, v1405);
+                                let v1407 = constructor_output_reg(ctx, v1406);
+                                // Rule at src/isa/aarch64/lower.isle line 2140.
+                                return Some(v1407);
+                            }
+                            let v34 = C::put_in_reg(ctx, v31.0);
+                            let v1405 = &constructor_lane_size(ctx, v1402);
+                            let v1406 = constructor_sqxtn(ctx, v34, v1405);
+                            let v1414 = C::put_in_reg(ctx, v31.1);
+                            let v1415 = &constructor_lane_size(ctx, v1402);
+                            let v1416 = constructor_sqxtn2(ctx, v1406, v1414, v1415);
+                            let v1417 = constructor_output_reg(ctx, v1416);
+                            // Rule at src/isa/aarch64/lower.isle line 2148.
+                            return Some(v1417);
+                        }
+                        let v1844 = C::ty_dyn64_int(ctx, v3);
+                        if let Some(v1845) = v1844 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v34 = C::put_in_reg(ctx, v31.0);
+                            let v35 = C::put_in_reg(ctx, v31.1);
+                            let v1410 = constructor_mov_vec_elem(
+                                ctx,
+                                v34,
+                                v35,
+                                0x1,
+                                0x0,
+                                &VectorSize::Size64x2,
+                            );
+                            let v1846 = &constructor_lane_size(ctx, v1845);
+                            let v1847 = constructor_sqxtn(ctx, v1410, v1846);
+                            let v1848 = constructor_output_reg(ctx, v1847);
+                            // Rule at src/isa/aarch64/lower_dynamic_neon.isle line 55.
+                            return Some(v1848);
+                        }
+                        let v1839 = C::ty_dyn128_int(ctx, v3);
+                        if let Some(v1840) = v1839 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v1403 = C::zero_value(ctx, v31.1);
+                            if let Some(v1404) = v1403 {
+                                let v34 = C::put_in_reg(ctx, v31.0);
+                                let v1841 = &constructor_lane_size(ctx, v1840);
+                                let v1842 = constructor_sqxtn(ctx, v34, v1841);
+                                let v1843 = constructor_output_reg(ctx, v1842);
+                                // Rule at src/isa/aarch64/lower_dynamic_neon.isle line 51.
+                                return Some(v1843);
+                            }
+                            let v34 = C::put_in_reg(ctx, v31.0);
+                            let v1841 = &constructor_lane_size(ctx, v1840);
+                            let v1842 = constructor_sqxtn(ctx, v34, v1841);
+                            let v1414 = C::put_in_reg(ctx, v31.1);
+                            let v1849 = &constructor_lane_size(ctx, v1840);
+                            let v1850 = constructor_sqxtn2(ctx, v1842, v1414, v1849);
+                            let v1851 = constructor_output_reg(ctx, v1850);
+                            // Rule at src/isa/aarch64/lower_dynamic_neon.isle line 59.
+                            return Some(v1851);
+                        }
+                    }
+                }
+                &Opcode::Unarrow => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v1408 = C::ty_vec64_int(ctx, v3);
+                        if let Some(v1409) = v1408 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v34 = C::put_in_reg(ctx, v31.0);
+                            let v35 = C::put_in_reg(ctx, v31.1);
+                            let v1410 = constructor_mov_vec_elem(
+                                ctx,
+                                v34,
+                                v35,
+                                0x1,
+                                0x0,
+                                &VectorSize::Size64x2,
+                            );
+                            let v1411 = &constructor_lane_size(ctx, v1409);
+                            let v1420 = constructor_sqxtun(ctx, v1410, v1411);
+                            let v1421 = constructor_output_reg(ctx, v1420);
+                            // Rule at src/isa/aarch64/lower.isle line 2159.
+                            return Some(v1421);
+                        }
+                        let v1401 = C::ty_vec128_int(ctx, v3);
+                        if let Some(v1402) = v1401 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v1403 = C::zero_value(ctx, v31.1);
+                            if let Some(v1404) = v1403 {
+                                let v34 = C::put_in_reg(ctx, v31.0);
+                                let v1405 = &constructor_lane_size(ctx, v1402);
+                                let v1418 = constructor_sqxtun(ctx, v34, v1405);
+                                let v1419 = constructor_output_reg(ctx, v1418);
+                                // Rule at src/isa/aarch64/lower.isle line 2155.
+                                return Some(v1419);
+                            }
+                            let v34 = C::put_in_reg(ctx, v31.0);
+                            let v1405 = &constructor_lane_size(ctx, v1402);
+                            let v1418 = constructor_sqxtun(ctx, v34, v1405);
+                            let v1414 = C::put_in_reg(ctx, v31.1);
+                            let v1415 = &constructor_lane_size(ctx, v1402);
+                            let v1422 = constructor_sqxtun2(ctx, v1418, v1414, v1415);
+                            let v1423 = constructor_output_reg(ctx, v1422);
+                            // Rule at src/isa/aarch64/lower.isle line 2163.
+                            return Some(v1423);
+                        }
+                        let v1844 = C::ty_dyn64_int(ctx, v3);
+                        if let Some(v1845) = v1844 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v34 = C::put_in_reg(ctx, v31.0);
+                            let v35 = C::put_in_reg(ctx, v31.1);
+                            let v1410 = constructor_mov_vec_elem(
+                                ctx,
+                                v34,
+                                v35,
+                                0x1,
+                                0x0,
+                                &VectorSize::Size64x2,
+                            );
+                            let v1846 = &constructor_lane_size(ctx, v1845);
+                            let v1854 = constructor_sqxtun(ctx, v1410, v1846);
+                            let v1855 = constructor_output_reg(ctx, v1854);
+                            // Rule at src/isa/aarch64/lower_dynamic_neon.isle line 69.
+                            return Some(v1855);
+                        }
+                        let v1839 = C::ty_dyn128_int(ctx, v3);
+                        if let Some(v1840) = v1839 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v1403 = C::zero_value(ctx, v31.1);
+                            if let Some(v1404) = v1403 {
+                                let v34 = C::put_in_reg(ctx, v31.0);
+                                let v1841 = &constructor_lane_size(ctx, v1840);
+                                let v1852 = constructor_sqxtun(ctx, v34, v1841);
+                                let v1853 = constructor_output_reg(ctx, v1852);
+                                // Rule at src/isa/aarch64/lower_dynamic_neon.isle line 65.
+                                return Some(v1853);
+                            }
+                            let v34 = C::put_in_reg(ctx, v31.0);
+                            let v1841 = &constructor_lane_size(ctx, v1840);
+                            let v1852 = constructor_sqxtun(ctx, v34, v1841);
+                            let v1414 = C::put_in_reg(ctx, v31.1);
+                            let v1849 = &constructor_lane_size(ctx, v1840);
+                            let v1856 = constructor_sqxtun2(ctx, v1852, v1414, v1849);
+                            let v1857 = constructor_output_reg(ctx, v1856);
+                            // Rule at src/isa/aarch64/lower_dynamic_neon.isle line 73.
+                            return Some(v1857);
+                        }
+                    }
+                }
+                &Opcode::Uunarrow => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v1408 = C::ty_vec64_int(ctx, v3);
+                        if let Some(v1409) = v1408 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v34 = C::put_in_reg(ctx, v31.0);
+                            let v35 = C::put_in_reg(ctx, v31.1);
+                            let v1410 = constructor_mov_vec_elem(
+                                ctx,
+                                v34,
+                                v35,
+                                0x1,
+                                0x0,
+                                &VectorSize::Size64x2,
+                            );
+                            let v1411 = &constructor_lane_size(ctx, v1409);
+                            let v1426 = constructor_uqxtn(ctx, v1410, v1411);
+                            let v1427 = constructor_output_reg(ctx, v1426);
+                            // Rule at src/isa/aarch64/lower.isle line 2175.
+                            return Some(v1427);
+                        }
+                        let v1401 = C::ty_vec128_int(ctx, v3);
+                        if let Some(v1402) = v1401 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v1403 = C::zero_value(ctx, v31.1);
+                            if let Some(v1404) = v1403 {
+                                let v34 = C::put_in_reg(ctx, v31.0);
+                                let v1405 = &constructor_lane_size(ctx, v1402);
+                                let v1424 = constructor_uqxtn(ctx, v34, v1405);
+                                let v1425 = constructor_output_reg(ctx, v1424);
+                                // Rule at src/isa/aarch64/lower.isle line 2171.
+                                return Some(v1425);
+                            }
+                            let v34 = C::put_in_reg(ctx, v31.0);
+                            let v1405 = &constructor_lane_size(ctx, v1402);
+                            let v1424 = constructor_uqxtn(ctx, v34, v1405);
+                            let v1414 = C::put_in_reg(ctx, v31.1);
+                            let v1415 = &constructor_lane_size(ctx, v1402);
+                            let v1428 = constructor_uqxtn2(ctx, v1424, v1414, v1415);
+                            let v1429 = constructor_output_reg(ctx, v1428);
+                            // Rule at src/isa/aarch64/lower.isle line 2179.
+                            return Some(v1429);
+                        }
+                        let v1844 = C::ty_dyn64_int(ctx, v3);
+                        if let Some(v1845) = v1844 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v34 = C::put_in_reg(ctx, v31.0);
+                            let v35 = C::put_in_reg(ctx, v31.1);
+                            let v1410 = constructor_mov_vec_elem(
+                                ctx,
+                                v34,
+                                v35,
+                                0x1,
+                                0x0,
+                                &VectorSize::Size64x2,
+                            );
+                            let v1846 = &constructor_lane_size(ctx, v1845);
+                            let v1860 = constructor_uqxtn(ctx, v1410, v1846);
+                            let v1861 = constructor_output_reg(ctx, v1860);
+                            // Rule at src/isa/aarch64/lower_dynamic_neon.isle line 83.
+                            return Some(v1861);
+                        }
+                        let v1839 = C::ty_dyn128_int(ctx, v3);
+                        if let Some(v1840) = v1839 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v1403 = C::zero_value(ctx, v31.1);
+                            if let Some(v1404) = v1403 {
+                                let v34 = C::put_in_reg(ctx, v31.0);
+                                let v1841 = &constructor_lane_size(ctx, v1840);
+                                let v1858 = constructor_uqxtn(ctx, v34, v1841);
+                                let v1859 = constructor_output_reg(ctx, v1858);
+                                // Rule at src/isa/aarch64/lower_dynamic_neon.isle line 79.
+                                return Some(v1859);
+                            }
+                            let v34 = C::put_in_reg(ctx, v31.0);
+                            let v1841 = &constructor_lane_size(ctx, v1840);
+                            let v1858 = constructor_uqxtn(ctx, v34, v1841);
+                            let v1414 = C::put_in_reg(ctx, v31.1);
+                            let v1849 = &constructor_lane_size(ctx, v1840);
+                            let v1862 = constructor_uqxtn2(ctx, v1858, v1414, v1849);
+                            let v1863 = constructor_output_reg(ctx, v1862);
+                            // Rule at src/isa/aarch64/lower_dynamic_neon.isle line 87.
+                            return Some(v1863);
+                        }
+                    }
+                }
+                &Opcode::IaddPairwise => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            I16X8 => {
+                                let v31 = C::unpack_value_array_2(ctx, v30);
+                                let v38 = C::def_inst(ctx, v31.1);
+                                if let Some(v39) = v38 {
+                                    let v40 = &C::inst_data(ctx, v39);
+                                    if let &InstructionData::Unary {
+                                        opcode: ref v300,
+                                        arg: v301,
+                                    } = v40
+                                    {
+                                        match v300 {
+                                            &Opcode::SwidenHigh => {
+                                                let v48 = C::def_inst(ctx, v31.0);
+                                                if let Some(v49) = v48 {
+                                                    let v50 = &C::inst_data(ctx, v49);
+                                                    if let &InstructionData::Unary {
+                                                        opcode: ref v298,
+                                                        arg: v299,
+                                                    } = v50
+                                                    {
+                                                        if let &Opcode::SwidenLow = v298 {
+                                                            if v299 == v301 {
+                                                                let v302 = C::put_in_reg(ctx, v299);
+                                                                let v303 =
+                                                                    constructor_saddlp8(ctx, v302);
+                                                                let v304 = constructor_output_reg(
+                                                                    ctx, v303,
+                                                                );
+                                                                // Rule at src/isa/aarch64/lower.isle line 322.
+                                                                return Some(v304);
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                            &Opcode::UwidenHigh => {
+                                                let v48 = C::def_inst(ctx, v31.0);
+                                                if let Some(v49) = v48 {
+                                                    let v50 = &C::inst_data(ctx, v49);
+                                                    if let &InstructionData::Unary {
+                                                        opcode: ref v298,
+                                                        arg: v299,
+                                                    } = v50
+                                                    {
+                                                        if let &Opcode::UwidenLow = v298 {
+                                                            if v299 == v301 {
+                                                                let v302 = C::put_in_reg(ctx, v299);
+                                                                let v307 =
+                                                                    constructor_uaddlp8(ctx, v302);
+                                                                let v308 = constructor_output_reg(
+                                                                    ctx, v307,
+                                                                );
+                                                                // Rule at src/isa/aarch64/lower.isle line 330.
+                                                                return Some(v308);
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                            _ => {}
+                                        }
+                                    }
+                                }
+                            }
+                            I32X4 => {
+                                let v31 = C::unpack_value_array_2(ctx, v30);
+                                let v38 = C::def_inst(ctx, v31.1);
+                                if let Some(v39) = v38 {
+                                    let v40 = &C::inst_data(ctx, v39);
+                                    if let &InstructionData::Unary {
+                                        opcode: ref v300,
+                                        arg: v301,
+                                    } = v40
+                                    {
+                                        match v300 {
+                                            &Opcode::SwidenHigh => {
+                                                let v48 = C::def_inst(ctx, v31.0);
+                                                if let Some(v49) = v48 {
+                                                    let v50 = &C::inst_data(ctx, v49);
+                                                    if let &InstructionData::Unary {
+                                                        opcode: ref v298,
+                                                        arg: v299,
+                                                    } = v50
+                                                    {
+                                                        if let &Opcode::SwidenLow = v298 {
+                                                            if v299 == v301 {
+                                                                let v302 = C::put_in_reg(ctx, v299);
+                                                                let v305 =
+                                                                    constructor_saddlp16(ctx, v302);
+                                                                let v306 = constructor_output_reg(
+                                                                    ctx, v305,
+                                                                );
+                                                                // Rule at src/isa/aarch64/lower.isle line 326.
+                                                                return Some(v306);
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                            &Opcode::UwidenHigh => {
+                                                let v48 = C::def_inst(ctx, v31.0);
+                                                if let Some(v49) = v48 {
+                                                    let v50 = &C::inst_data(ctx, v49);
+                                                    if let &InstructionData::Unary {
+                                                        opcode: ref v298,
+                                                        arg: v299,
+                                                    } = v50
+                                                    {
+                                                        if let &Opcode::UwidenLow = v298 {
+                                                            if v299 == v301 {
+                                                                let v302 = C::put_in_reg(ctx, v299);
+                                                                let v309 =
+                                                                    constructor_uaddlp16(ctx, v302);
+                                                                let v310 = constructor_output_reg(
+                                                                    ctx, v309,
+                                                                );
+                                                                // Rule at src/isa/aarch64/lower.isle line 334.
+                                                                return Some(v310);
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                            _ => {}
+                                        }
+                                    }
+                                }
+                            }
+                            _ => {}
+                        }
+                        let v31 = C::unpack_value_array_2(ctx, v30);
+                        let v34 = C::put_in_reg(ctx, v31.0);
+                        let v35 = C::put_in_reg(ctx, v31.1);
+                        let v121 = &constructor_vector_size(ctx, v3);
+                        let v311 = constructor_addp(ctx, v34, v35, v121);
+                        let v312 = constructor_output_reg(ctx, v311);
+                        // Rule at src/isa/aarch64/lower.isle line 337.
+                        return Some(v312);
+                    }
+                }
+                &Opcode::Iconcat => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        if v3 == I128 {
+                            let v31 = C::unpack_value_array_2(ctx, v30);
+                            let v34 = C::put_in_reg(ctx, v31.0);
+                            let v35 = C::put_in_reg(ctx, v31.1);
+                            let v239 = C::value_regs(ctx, v34, v35);
+                            let v240 = C::output(ctx, v239);
+                            // Rule at src/isa/aarch64/lower.isle line 255.
+                            return Some(v240);
+                        }
+                    }
+                }
+                _ => {}
+            }
+        }
+        &InstructionData::BinaryImm8 {
+            opcode: ref v1638,
+            arg: v1639,
+            imm: v1640,
+        } => {
+            match v1638 {
+                &Opcode::Extractlane => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v348 = C::ty_scalar_float(ctx, v3);
+                        if let Some(v349) = v348 {
+                            let v1641 = C::u8_from_uimm8(ctx, v1640);
+                            if v1641 == 0x0 {
+                                let v1642 = constructor_output_value(ctx, v1639);
+                                // Rule at src/isa/aarch64/lower.isle line 2482.
+                                return Some(v1642);
+                            }
+                            let v1643 = C::put_in_reg(ctx, v1639);
+                            let v1647 = C::value_type(ctx, v1639);
+                            let v1648 = &constructor_vector_size(ctx, v1647);
+                            let v1649 = constructor_fpu_move_from_vec(ctx, v1643, v1641, v1648);
+                            let v1650 = constructor_output_reg(ctx, v1649);
+                            // Rule at src/isa/aarch64/lower.isle line 2490.
+                            return Some(v1650);
+                        }
+                        let v680 = C::ty_int(ctx, v3);
+                        if let Some(v681) = v680 {
+                            let v1643 = C::put_in_reg(ctx, v1639);
+                            let v1644 = &constructor_scalar_size(ctx, v681);
+                            let v1641 = C::u8_from_uimm8(ctx, v1640);
+                            let v1645 = constructor_mov_from_vec(ctx, v1643, v1641, v1644);
+                            let v1646 = constructor_output_reg(ctx, v1645);
+                            // Rule at src/isa/aarch64/lower.isle line 2485.
+                            return Some(v1646);
+                        }
+                    }
+                }
+                &Opcode::ExtractVector => {
+                    if v1640 == 0x0 {
+                        let v1643 = C::put_in_reg(ctx, v1639);
+                        let v1872 = C::value_reg(ctx, v1643);
+                        let v1873 = C::output(ctx, v1872);
+                        // Rule at src/isa/aarch64/lower_dynamic_neon.isle line 99.
+                        return Some(v1873);
+                    }
+                }
+                _ => {}
+            }
+        }
+        &InstructionData::Call {
+            opcode: ref v1488,
+            args: v1489,
+            func_ref: v1490,
+        } => {
+            match v1488 {
+                &Opcode::Call => {
+                    let v1492 = C::func_ref_data(ctx, v1490);
+                    let v1491 = C::value_list_slice(ctx, v1489);
+                    let v1496 = C::gen_call(ctx, v1492.0, v1492.1, v1492.2, v1491);
+                    // Rule at src/isa/aarch64/lower.isle line 2259.
+                    return Some(v1496);
+                }
+                &Opcode::ReturnCall => {
+                    let v1492 = C::func_ref_data(ctx, v1490);
+                    let v1491 = C::value_list_slice(ctx, v1489);
+                    let v1510 = C::gen_return_call(ctx, v1492.0, v1492.1, v1492.2, v1491);
+                    // Rule at src/isa/aarch64/lower.isle line 2273.
+                    return Some(v1510);
+                }
+                _ => {}
+            }
+        }
+        &InstructionData::CallIndirect {
+            opcode: ref v1497,
+            args: v1498,
+            sig_ref: v1499,
+        } => {
+            match v1497 {
+                &Opcode::CallIndirect => {
+                    let v1500 = C::value_list_slice(ctx, v1498);
+                    let v1501 = C::value_slice_unwrap(ctx, v1500);
+                    if let Some(v1502) = v1501 {
+                        let v1505 = C::gen_call_indirect(ctx, v1499, v1502.0, v1502.1);
+                        // Rule at src/isa/aarch64/lower.isle line 2262.
+                        return Some(v1505);
+                    }
+                }
+                &Opcode::ReturnCallIndirect => {
+                    let v1500 = C::value_list_slice(ctx, v1498);
+                    let v1501 = C::value_slice_unwrap(ctx, v1500);
+                    if let Some(v1502) = v1501 {
+                        let v1511 = C::gen_return_call_indirect(ctx, v1499, v1502.0, v1502.1);
+                        // Rule at src/isa/aarch64/lower.isle line 2276.
+                        return Some(v1511);
+                    }
+                }
+                _ => {}
+            }
+        }
+        &InstructionData::DynamicStackLoad {
+            opcode: ref v1864,
+            dynamic_stack_slot: v1865,
+        } => {
+            if let &Opcode::DynamicStackAddr = v1864 {
+                let v1866 = C::temp_writable_reg(ctx, I64);
+                let v1867 = &C::abi_dynamic_stackslot_addr(ctx, v1866, v1865);
+                let v1868 = C::emit(ctx, v1867);
+                let v1869 = C::writable_reg_to_reg(ctx, v1866);
+                let v1870 = C::value_reg(ctx, v1869);
+                let v1871 = C::output(ctx, v1870);
+                // Rule at src/isa/aarch64/lower_dynamic_neon.isle line 93.
+                return Some(v1871);
+            }
+        }
+        &InstructionData::FloatCompare {
+            opcode: ref v1091,
+            args: ref v1092,
+            cond: ref v1093,
+        } => {
+            if let &Opcode::Fcmp = v1091 {
+                let v1 = C::first_result(ctx, arg0);
+                if let Some(v2) = v1 {
+                    let v3 = C::value_type(ctx, v2);
+                    let v117 = C::multi_lane(ctx, v3);
+                    if let Some(v118) = v117 {
+                        let v1094 = C::unpack_value_array_2(ctx, v1092);
+                        let v1099 = C::zero_value(ctx, v1094.1);
+                        if let Some(v1100) = v1099 {
+                            let v1097 = &C::fcmp_zero_cond_not_eq(ctx, v1093);
+                            if let Some(v1098) = v1097 {
+                                let v1101 = C::put_in_reg(ctx, v1094.0);
+                                let v313 = &constructor_vector_size(ctx, v3);
+                                let v1102 = constructor_fcmeq0(ctx, v1101, v313);
+                                let v1103 = constructor_not(ctx, v1102, v313);
+                                let v1104 = C::value_reg(ctx, v1103);
+                                let v1105 = C::output(ctx, v1104);
+                                // Rule at src/isa/aarch64/lower.isle line 1850.
+                                return Some(v1105);
+                            }
+                            let v1106 = &C::fcmp_zero_cond(ctx, v1093);
+                            if let Some(v1107) = v1106 {
+                                let v1101 = C::put_in_reg(ctx, v1094.0);
+                                let v313 = &constructor_vector_size(ctx, v3);
+                                let v1108 = constructor_float_cmp_zero(ctx, v1107, v1101, v313);
+                                let v1109 = C::value_reg(ctx, v1108);
+                                let v1110 = C::output(ctx, v1109);
+                                // Rule at src/isa/aarch64/lower.isle line 1856.
+                                return Some(v1110);
+                            }
+                        }
+                        let v1111 = C::zero_value(ctx, v1094.0);
+                        if let Some(v1112) = v1111 {
+                            let v1097 = &C::fcmp_zero_cond_not_eq(ctx, v1093);
+                            if let Some(v1098) = v1097 {
+                                let v1113 = C::put_in_reg(ctx, v1094.1);
+                                let v313 = &constructor_vector_size(ctx, v3);
+                                let v1114 = constructor_fcmeq0(ctx, v1113, v313);
+                                let v1115 = constructor_not(ctx, v1114, v313);
+                                let v1116 = C::value_reg(ctx, v1115);
+                                let v1117 = C::output(ctx, v1116);
+                                // Rule at src/isa/aarch64/lower.isle line 1862.
+                                return Some(v1117);
+                            }
+                            let v1106 = &C::fcmp_zero_cond(ctx, v1093);
+                            if let Some(v1107) = v1106 {
+                                let v1113 = C::put_in_reg(ctx, v1094.1);
+                                let v313 = &constructor_vector_size(ctx, v3);
+                                let v1118 =
+                                    constructor_float_cmp_zero_swap(ctx, v1107, v1113, v313);
+                                let v1119 = C::value_reg(ctx, v1118);
+                                let v1120 = C::output(ctx, v1119);
+                                // Rule at src/isa/aarch64/lower.isle line 1868.
+                                return Some(v1120);
+                            }
+                        }
+                    }
+                    let v1094 = C::unpack_value_array_2(ctx, v1092);
+                    let v1121 = C::value_type(ctx, v1094.0);
+                    let v1122 = C::ty_scalar_float(ctx, v1121);
+                    if let Some(v1123) = v1122 {
+                        let v1124 = &constructor_scalar_size(ctx, v1123);
+                        let v1125 = C::put_in_reg(ctx, v1094.0);
+                        let v1126 = C::put_in_reg(ctx, v1094.1);
+                        let v1127 = &constructor_fpu_cmp(ctx, v1124, v1125, v1126);
+                        let v1128 = &C::fp_cond_code(ctx, v1093);
+                        let v1129 = &constructor_materialize_bool_result(ctx, v1128);
+                        let v1130 = constructor_with_flags(ctx, v1127, v1129);
+                        let v1131 = C::output(ctx, v1130);
+                        // Rule at src/isa/aarch64/lower.isle line 1874.
+                        return Some(v1131);
+                    }
+                    let v1132 = C::ty_vector_float(ctx, v1121);
+                    if let Some(v1133) = v1132 {
+                        let v1101 = C::put_in_reg(ctx, v1094.0);
+                        let v1134 = C::put_in_reg(ctx, v1094.1);
+                        let v1135 = &C::fp_cond_code(ctx, v1093);
+                        let v1136 = constructor_vec_cmp(ctx, v1101, v1134, v1121, v1135);
+                        let v1137 = constructor_output_reg(ctx, v1136);
+                        // Rule at src/isa/aarch64/lower.isle line 1879.
+                        return Some(v1137);
+                    }
+                }
+            }
+        }
+        &InstructionData::FuncAddr {
+            opcode: ref v1462,
+            func_ref: v1463,
+        } => {
+            if let &Opcode::FuncAddr = v1462 {
+                let v1464 = C::func_ref_data(ctx, v1463);
+                let v1468 = C::box_external_name(ctx, v1464.1);
+                let v1470 = constructor_load_ext_name(ctx, v1468, 0x0);
+                let v1471 = constructor_output_reg(ctx, v1470);
+                // Rule at src/isa/aarch64/lower.isle line 2238.
+                return Some(v1471);
+            }
+        }
+        &InstructionData::IntAddTrap {
+            opcode: ref v1712,
+            args: ref v1713,
+            code: ref v1714,
+        } => {
+            if let &Opcode::UaddOverflowTrap = v1712 {
+                let v1 = C::first_result(ctx, arg0);
+                if let Some(v2) = v1 {
+                    let v3 = C::value_type(ctx, v2);
+                    let v27 = C::fits_in_64(ctx, v3);
+                    if let Some(v28) = v27 {
+                        let v1715 = C::unpack_value_array_2(ctx, v1713);
+                        let v1718 = C::put_in_reg(ctx, v1715.0);
+                        let v1719 = C::put_in_reg(ctx, v1715.1);
+                        let v1720 = &constructor_add_with_flags_paired(ctx, v28, v1718, v1719);
+                        let v1721 = constructor_trap_if_overflow(ctx, v1720, v1714);
+                        let v1722 = constructor_output_reg(ctx, v1721);
+                        // Rule at src/isa/aarch64/lower.isle line 2587.
+                        return Some(v1722);
+                    }
+                }
+            }
+        }
+        &InstructionData::IntCompare {
+            opcode: ref v1138,
+            args: ref v1139,
+            cond: ref v1140,
+        } => {
+            if let &Opcode::Icmp = v1138 {
+                let v1 = C::first_result(ctx, arg0);
+                if let Some(v2) = v1 {
+                    let v3 = C::value_type(ctx, v2);
+                    let v117 = C::multi_lane(ctx, v3);
+                    if let Some(v118) = v117 {
+                        let v1141 = C::unpack_value_array_2(ctx, v1139);
+                        let v1146 = C::zero_value(ctx, v1141.1);
+                        if let Some(v1147) = v1146 {
+                            let v1144 = &C::icmp_zero_cond_not_eq(ctx, v1140);
+                            if let Some(v1145) = v1144 {
+                                let v1148 = C::put_in_reg(ctx, v1141.0);
+                                let v313 = &constructor_vector_size(ctx, v3);
+                                let v1149 = constructor_cmeq0(ctx, v1148, v313);
+                                let v1150 = constructor_not(ctx, v1149, v313);
+                                let v1151 = C::value_reg(ctx, v1150);
+                                let v1152 = C::output(ctx, v1151);
+                                // Rule at src/isa/aarch64/lower.isle line 1885.
+                                return Some(v1152);
+                            }
+                            let v1153 = &C::icmp_zero_cond(ctx, v1140);
+                            if let Some(v1154) = v1153 {
+                                let v1148 = C::put_in_reg(ctx, v1141.0);
+                                let v313 = &constructor_vector_size(ctx, v3);
+                                let v1155 = constructor_int_cmp_zero(ctx, v1154, v1148, v313);
+                                let v1156 = C::value_reg(ctx, v1155);
+                                let v1157 = C::output(ctx, v1156);
+                                // Rule at src/isa/aarch64/lower.isle line 1891.
+                                return Some(v1157);
+                            }
+                        }
+                        let v1158 = C::zero_value(ctx, v1141.0);
+                        if let Some(v1159) = v1158 {
+                            let v1144 = &C::icmp_zero_cond_not_eq(ctx, v1140);
+                            if let Some(v1145) = v1144 {
+                                let v1160 = C::put_in_reg(ctx, v1141.1);
+                                let v313 = &constructor_vector_size(ctx, v3);
+                                let v1161 = constructor_cmeq0(ctx, v1160, v313);
+                                let v1162 = constructor_not(ctx, v1161, v313);
+                                let v1163 = C::value_reg(ctx, v1162);
+                                let v1164 = C::output(ctx, v1163);
+                                // Rule at src/isa/aarch64/lower.isle line 1897.
+                                return Some(v1164);
+                            }
+                            let v1153 = &C::icmp_zero_cond(ctx, v1140);
+                            if let Some(v1154) = v1153 {
+                                let v1160 = C::put_in_reg(ctx, v1141.1);
+                                let v313 = &constructor_vector_size(ctx, v3);
+                                let v1165 = constructor_int_cmp_zero_swap(ctx, v1154, v1160, v313);
+                                let v1166 = C::value_reg(ctx, v1165);
+                                let v1167 = C::output(ctx, v1166);
+                                // Rule at src/isa/aarch64/lower.isle line 1903.
+                                return Some(v1167);
+                            }
+                        }
+                    }
+                }
+                let v1141 = C::unpack_value_array_2(ctx, v1139);
+                let v1168 = C::value_type(ctx, v1141.0);
+                let v1170 =
+                    constructor_lower_icmp_into_reg(ctx, v1140, v1141.0, v1141.1, v1168, I8);
+                let v1171 = C::output(ctx, v1170);
+                // Rule at src/isa/aarch64/lower.isle line 1909.
+                return Some(v1171);
+            }
+        }
+        &InstructionData::Load {
+            opcode: ref v1512,
+            arg: v1513,
+            flags: v1514,
+            offset: v1515,
+        } => {
+            match v1512 {
+                &Opcode::Load => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            I8 => {
+                                let v1516 = C::offset32_to_u32(ctx, v1515);
+                                let v1517 = &C::amode(ctx, I8, v1513, v1516);
+                                let v1518 = constructor_aarch64_uload8(ctx, v1517, v1514);
+                                let v1519 = constructor_output_reg(ctx, v1518);
+                                // Rule at src/isa/aarch64/lower.isle line 2281.
+                                return Some(v1519);
+                            }
+                            I16 => {
+                                let v1516 = C::offset32_to_u32(ctx, v1515);
+                                let v1520 = &C::amode(ctx, I16, v1513, v1516);
+                                let v1521 = constructor_aarch64_uload16(ctx, v1520, v1514);
+                                let v1522 = constructor_output_reg(ctx, v1521);
+                                // Rule at src/isa/aarch64/lower.isle line 2284.
+                                return Some(v1522);
+                            }
+                            I32 => {
+                                let v1516 = C::offset32_to_u32(ctx, v1515);
+                                let v1523 = &C::amode(ctx, I32, v1513, v1516);
+                                let v1524 = constructor_aarch64_uload32(ctx, v1523, v1514);
+                                let v1525 = constructor_output_reg(ctx, v1524);
+                                // Rule at src/isa/aarch64/lower.isle line 2287.
+                                return Some(v1525);
+                            }
+                            I64 => {
+                                let v1516 = C::offset32_to_u32(ctx, v1515);
+                                let v1526 = &C::amode(ctx, I64, v1513, v1516);
+                                let v1527 = constructor_aarch64_uload64(ctx, v1526, v1514);
+                                let v1528 = constructor_output_reg(ctx, v1527);
+                                // Rule at src/isa/aarch64/lower.isle line 2290.
+                                return Some(v1528);
+                            }
+                            I128 => {
+                                let v1516 = C::offset32_to_u32(ctx, v1515);
+                                let v1535 = &C::pair_amode(ctx, v1513, v1516);
+                                let v1536 = constructor_aarch64_loadp64(ctx, v1535, v1514);
+                                let v1537 = C::output(ctx, v1536);
+                                // Rule at src/isa/aarch64/lower.isle line 2302.
+                                return Some(v1537);
+                            }
+                            R64 => {
+                                let v1516 = C::offset32_to_u32(ctx, v1515);
+                                let v1526 = &C::amode(ctx, I64, v1513, v1516);
+                                let v1527 = constructor_aarch64_uload64(ctx, v1526, v1514);
+                                let v1528 = constructor_output_reg(ctx, v1527);
+                                // Rule at src/isa/aarch64/lower.isle line 2293.
+                                return Some(v1528);
+                            }
+                            F32 => {
+                                let v1516 = C::offset32_to_u32(ctx, v1515);
+                                let v1529 = &C::amode(ctx, F32, v1513, v1516);
+                                let v1530 = constructor_aarch64_fpuload32(ctx, v1529, v1514);
+                                let v1531 = constructor_output_reg(ctx, v1530);
+                                // Rule at src/isa/aarch64/lower.isle line 2296.
+                                return Some(v1531);
+                            }
+                            F64 => {
+                                let v1516 = C::offset32_to_u32(ctx, v1515);
+                                let v1532 = &C::amode(ctx, F64, v1513, v1516);
+                                let v1533 = constructor_aarch64_fpuload64(ctx, v1532, v1514);
+                                let v1534 = constructor_output_reg(ctx, v1533);
+                                // Rule at src/isa/aarch64/lower.isle line 2299.
+                                return Some(v1534);
+                            }
+                            _ => {}
+                        }
+                        let v1538 = C::ty_vec64(ctx, v3);
+                        if let Some(v1539) = v1538 {
+                            let v1516 = C::offset32_to_u32(ctx, v1515);
+                            let v1532 = &C::amode(ctx, F64, v1513, v1516);
+                            let v1540 = constructor_aarch64_fpuload128(ctx, v1532, v1514);
+                            let v1541 = constructor_output_reg(ctx, v1540);
+                            // Rule at src/isa/aarch64/lower.isle line 2305.
+                            return Some(v1541);
+                        }
+                        let v1546 = C::ty_dyn_vec64(ctx, v3);
+                        if let Some(v1547) = v1546 {
+                            let v1516 = C::offset32_to_u32(ctx, v1515);
+                            let v1532 = &C::amode(ctx, F64, v1513, v1516);
+                            let v1533 = constructor_aarch64_fpuload64(ctx, v1532, v1514);
+                            let v1534 = constructor_output_reg(ctx, v1533);
+                            // Rule at src/isa/aarch64/lower.isle line 2313.
+                            return Some(v1534);
+                        }
+                        let v575 = C::ty_vec128(ctx, v3);
+                        if let Some(v576) = v575 {
+                            let v1516 = C::offset32_to_u32(ctx, v1515);
+                            let v1543 = &C::amode(ctx, I8X16, v1513, v1516);
+                            let v1544 = constructor_aarch64_fpuload128(ctx, v1543, v1514);
+                            let v1545 = constructor_output_reg(ctx, v1544);
+                            // Rule at src/isa/aarch64/lower.isle line 2309.
+                            return Some(v1545);
+                        }
+                        let v1548 = C::ty_dyn_vec128(ctx, v3);
+                        if let Some(v1549) = v1548 {
+                            let v1516 = C::offset32_to_u32(ctx, v1515);
+                            let v1543 = &C::amode(ctx, I8X16, v1513, v1516);
+                            let v1544 = constructor_aarch64_fpuload128(ctx, v1543, v1514);
+                            let v1545 = constructor_output_reg(ctx, v1544);
+                            // Rule at src/isa/aarch64/lower.isle line 2317.
+                            return Some(v1545);
+                        }
+                    }
+                }
+                &Opcode::Uload8 => {
+                    let v1516 = C::offset32_to_u32(ctx, v1515);
+                    let v1517 = &C::amode(ctx, I8, v1513, v1516);
+                    let v1518 = constructor_aarch64_uload8(ctx, v1517, v1514);
+                    let v1519 = constructor_output_reg(ctx, v1518);
+                    // Rule at src/isa/aarch64/lower.isle line 2322.
+                    return Some(v1519);
+                }
+                &Opcode::Sload8 => {
+                    let v1516 = C::offset32_to_u32(ctx, v1515);
+                    let v1517 = &C::amode(ctx, I8, v1513, v1516);
+                    let v1550 = constructor_aarch64_sload8(ctx, v1517, v1514);
+                    let v1551 = constructor_output_reg(ctx, v1550);
+                    // Rule at src/isa/aarch64/lower.isle line 2325.
+                    return Some(v1551);
+                }
+                &Opcode::Uload16 => {
+                    let v1516 = C::offset32_to_u32(ctx, v1515);
+                    let v1520 = &C::amode(ctx, I16, v1513, v1516);
+                    let v1521 = constructor_aarch64_uload16(ctx, v1520, v1514);
+                    let v1522 = constructor_output_reg(ctx, v1521);
+                    // Rule at src/isa/aarch64/lower.isle line 2328.
+                    return Some(v1522);
+                }
+                &Opcode::Sload16 => {
+                    let v1516 = C::offset32_to_u32(ctx, v1515);
+                    let v1520 = &C::amode(ctx, I16, v1513, v1516);
+                    let v1552 = constructor_aarch64_sload16(ctx, v1520, v1514);
+                    let v1553 = constructor_output_reg(ctx, v1552);
+                    // Rule at src/isa/aarch64/lower.isle line 2331.
+                    return Some(v1553);
+                }
+                &Opcode::Uload32 => {
+                    let v1516 = C::offset32_to_u32(ctx, v1515);
+                    let v1523 = &C::amode(ctx, I32, v1513, v1516);
+                    let v1524 = constructor_aarch64_uload32(ctx, v1523, v1514);
+                    let v1525 = constructor_output_reg(ctx, v1524);
+                    // Rule at src/isa/aarch64/lower.isle line 2334.
+                    return Some(v1525);
+                }
+                &Opcode::Sload32 => {
+                    let v1516 = C::offset32_to_u32(ctx, v1515);
+                    let v1523 = &C::amode(ctx, I32, v1513, v1516);
+                    let v1554 = constructor_aarch64_sload32(ctx, v1523, v1514);
+                    let v1555 = constructor_output_reg(ctx, v1554);
+                    // Rule at src/isa/aarch64/lower.isle line 2337.
+                    return Some(v1555);
+                }
+                &Opcode::Uload8x8 => {
+                    let v1516 = C::offset32_to_u32(ctx, v1515);
+                    let v1532 = &C::amode(ctx, F64, v1513, v1516);
+                    let v1533 = constructor_aarch64_fpuload64(ctx, v1532, v1514);
+                    let v1559 = constructor_vec_extend(
+                        ctx,
+                        &VecExtendOp::Uxtl,
+                        v1533,
+                        false,
+                        &ScalarSize::Size16,
+                    );
+                    let v1560 = constructor_output_reg(ctx, v1559);
+                    // Rule at src/isa/aarch64/lower.isle line 2347.
+                    return Some(v1560);
+                }
+                &Opcode::Sload8x8 => {
+                    let v1516 = C::offset32_to_u32(ctx, v1515);
+                    let v1532 = &C::amode(ctx, F64, v1513, v1516);
+                    let v1533 = constructor_aarch64_fpuload64(ctx, v1532, v1514);
+                    let v1557 = constructor_vec_extend(
+                        ctx,
+                        &VecExtendOp::Sxtl,
+                        v1533,
+                        false,
+                        &ScalarSize::Size16,
+                    );
+                    let v1558 = constructor_output_reg(ctx, v1557);
+                    // Rule at src/isa/aarch64/lower.isle line 2341.
+                    return Some(v1558);
+                }
+                &Opcode::Uload16x4 => {
+                    let v1516 = C::offset32_to_u32(ctx, v1515);
+                    let v1532 = &C::amode(ctx, F64, v1513, v1516);
+                    let v1533 = constructor_aarch64_fpuload64(ctx, v1532, v1514);
+                    let v1563 = constructor_vec_extend(
+                        ctx,
+                        &VecExtendOp::Uxtl,
+                        v1533,
+                        false,
+                        &ScalarSize::Size32,
+                    );
+                    let v1564 = constructor_output_reg(ctx, v1563);
+                    // Rule at src/isa/aarch64/lower.isle line 2359.
+                    return Some(v1564);
+                }
+                &Opcode::Sload16x4 => {
+                    let v1516 = C::offset32_to_u32(ctx, v1515);
+                    let v1532 = &C::amode(ctx, F64, v1513, v1516);
+                    let v1533 = constructor_aarch64_fpuload64(ctx, v1532, v1514);
+                    let v1561 = constructor_vec_extend(
+                        ctx,
+                        &VecExtendOp::Sxtl,
+                        v1533,
+                        false,
+                        &ScalarSize::Size32,
+                    );
+                    let v1562 = constructor_output_reg(ctx, v1561);
+                    // Rule at src/isa/aarch64/lower.isle line 2353.
+                    return Some(v1562);
+                }
+                &Opcode::Uload32x2 => {
+                    let v1516 = C::offset32_to_u32(ctx, v1515);
+                    let v1532 = &C::amode(ctx, F64, v1513, v1516);
+                    let v1533 = constructor_aarch64_fpuload64(ctx, v1532, v1514);
+                    let v1567 = constructor_vec_extend(
+                        ctx,
+                        &VecExtendOp::Uxtl,
+                        v1533,
+                        false,
+                        &ScalarSize::Size64,
+                    );
+                    let v1568 = constructor_output_reg(ctx, v1567);
+                    // Rule at src/isa/aarch64/lower.isle line 2371.
+                    return Some(v1568);
+                }
+                &Opcode::Sload32x2 => {
+                    let v1516 = C::offset32_to_u32(ctx, v1515);
+                    let v1532 = &C::amode(ctx, F64, v1513, v1516);
+                    let v1533 = constructor_aarch64_fpuload64(ctx, v1532, v1514);
+                    let v1565 = constructor_vec_extend(
+                        ctx,
+                        &VecExtendOp::Sxtl,
+                        v1533,
+                        false,
+                        &ScalarSize::Size64,
+                    );
+                    let v1566 = constructor_output_reg(ctx, v1565);
+                    // Rule at src/isa/aarch64/lower.isle line 2365.
+                    return Some(v1566);
+                }
+                _ => {}
+            }
+        }
+        &InstructionData::LoadNoOffset {
+            opcode: ref v1293,
+            arg: v1294,
+            flags: v1295,
+        } => {
+            match v1293 {
+                &Opcode::Bitcast => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v1620 = C::ty_float_or_vec(ctx, v3);
+                        if let Some(v1621) = v1620 {
+                            let v1622 = C::value_type(ctx, v1294);
+                            let v1623 = C::ty_float_or_vec(ctx, v1622);
+                            if let Some(v1624) = v1623 {
+                                let v1625 = constructor_output_value(ctx, v1294);
+                                // Rule at src/isa/aarch64/lower.isle line 2458.
+                                return Some(v1625);
+                            }
+                            let v1626 = C::ty_int_ref_scalar_64(ctx, v1622);
+                            if let Some(v1627) = v1626 {
+                                let v1296 = C::put_in_reg(ctx, v1294);
+                                let v1628 = &constructor_scalar_size(ctx, v1622);
+                                let v1629 = constructor_mov_to_fpu(ctx, v1296, v1628);
+                                let v1630 = constructor_output_reg(ctx, v1629);
+                                // Rule at src/isa/aarch64/lower.isle line 2462.
+                                return Some(v1630);
+                            }
+                        }
+                        let v1077 = C::ty_int_ref_scalar_64(ctx, v3);
+                        if let Some(v1078) = v1077 {
+                            let v1622 = C::value_type(ctx, v1294);
+                            let v1631 = C::fits_in_64(ctx, v1622);
+                            if let Some(v1632) = v1631 {
+                                let v1633 = C::ty_float_or_vec(ctx, v1632);
+                                if let Some(v1634) = v1633 {
+                                    let v1296 = C::put_in_reg(ctx, v1294);
+                                    let v1635 = &constructor_scalar_size(ctx, v3);
+                                    let v1636 = constructor_mov_from_vec(ctx, v1296, 0x0, v1635);
+                                    let v1637 = constructor_output_reg(ctx, v1636);
+                                    // Rule at src/isa/aarch64/lower.isle line 2467.
+                                    return Some(v1637);
+                                }
+                            }
+                            let v1626 = C::ty_int_ref_scalar_64(ctx, v1622);
+                            if let Some(v1627) = v1626 {
+                                let v1625 = constructor_output_value(ctx, v1294);
+                                // Rule at src/isa/aarch64/lower.isle line 2472.
+                                return Some(v1625);
+                            }
+                        }
+                        if v3 == I128 {
+                            let v1622 = C::value_type(ctx, v1294);
+                            if v1622 == I128 {
+                                let v1625 = constructor_output_value(ctx, v1294);
+                                // Rule at src/isa/aarch64/lower.isle line 2476.
+                                return Some(v1625);
+                            }
+                        }
+                    }
+                }
+                &Opcode::AtomicLoad => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v1291 = C::valid_atomic_transaction(ctx, v3);
+                        if let Some(v1292) = v1291 {
+                            let v1296 = C::put_in_reg(ctx, v1294);
+                            let v1297 = constructor_load_acquire(ctx, v1292, v1295, v1296);
+                            let v1298 = constructor_output_reg(ctx, v1297);
+                            // Rule at src/isa/aarch64/lower.isle line 2040.
+                            return Some(v1298);
+                        }
+                    }
+                }
+                _ => {}
+            }
+        }
+        &InstructionData::MultiAry {
+            opcode: ref v1506,
+            args: v1507,
+        } => {
+            if let &Opcode::Return = v1506 {
+                let v1508 = C::value_list_slice(ctx, v1507);
+                let v1509 = constructor_lower_return(ctx, v1508);
+                // Rule at src/isa/aarch64/lower.isle line 2268.
+                return Some(v1509);
+            }
+        }
+        &InstructionData::NullAry { opcode: ref v11 } => {
+            match v11 {
+                &Opcode::Debugtrap => {
+                    let v1460 = &constructor_brk(ctx);
+                    let v1461 = constructor_side_effect(ctx, v1460);
+                    // Rule at src/isa/aarch64/lower.isle line 2233.
+                    return Some(v1461);
+                }
+                &Opcode::GetPinnedReg => {
+                    let v1615 = C::preg_pinned(ctx);
+                    let v1616 = constructor_mov_from_preg(ctx, v1615);
+                    let v1617 = constructor_output_reg(ctx, v1616);
+                    // Rule at src/isa/aarch64/lower.isle line 2449.
+                    return Some(v1617);
+                }
+                &Opcode::GetFramePointer => {
+                    let v1482 = constructor_aarch64_fp(ctx);
+                    let v1483 = constructor_output_reg(ctx, v1482);
+                    // Rule at src/isa/aarch64/lower.isle line 2248.
+                    return Some(v1483);
+                }
+                &Opcode::GetStackPointer => {
+                    let v1484 = constructor_aarch64_sp(ctx);
+                    let v1485 = constructor_output_reg(ctx, v1484);
+                    // Rule at src/isa/aarch64/lower.isle line 2251.
+                    return Some(v1485);
+                }
+                &Opcode::GetReturnAddress => {
+                    let v1486 = constructor_aarch64_link(ctx);
+                    let v1487 = constructor_output_reg(ctx, v1486);
+                    // Rule at src/isa/aarch64/lower.isle line 2254.
+                    return Some(v1487);
+                }
+                &Opcode::Null => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v13 = constructor_imm(ctx, v3, &ImmExtend::Zero, 0x0);
+                        let v14 = constructor_output_reg(ctx, v13);
+                        // Rule at src/isa/aarch64/lower.isle line 24.
+                        return Some(v14);
+                    }
+                }
+                &Opcode::Nop => {
+                    let v25 = C::invalid_reg(ctx);
+                    let v26 = constructor_output_reg(ctx, v25);
+                    // Rule at src/isa/aarch64/lower.isle line 39.
+                    return Some(v26);
+                }
+                &Opcode::Fence => {
+                    let v1449 = &constructor_aarch64_fence(ctx);
+                    let v1450 = constructor_side_effect(ctx, v1449);
+                    // Rule at src/isa/aarch64/lower.isle line 2216.
+                    return Some(v1450);
+                }
+                _ => {}
+            }
+        }
+        &InstructionData::Shuffle {
+            opcode: ref v137,
+            args: ref v138,
+            imm: v139,
+        } => {
+            if let &Opcode::Shuffle = v137 {
+                let v143 = C::shuffle_dup8_from_imm(ctx, v139);
+                if let Some(v144) = v143 {
+                    let v140 = C::unpack_value_array_2(ctx, v138);
+                    let v145 = C::put_in_reg(ctx, v140.0);
+                    let v147 = constructor_vec_dup_from_fpu(ctx, v145, &VectorSize::Size8x16, v144);
+                    let v148 = constructor_output_reg(ctx, v147);
+                    // Rule at src/isa/aarch64/lower.isle line 127.
+                    return Some(v148);
+                }
+                let v149 = C::shuffle_dup16_from_imm(ctx, v139);
+                if let Some(v150) = v149 {
+                    let v140 = C::unpack_value_array_2(ctx, v138);
+                    let v145 = C::put_in_reg(ctx, v140.0);
+                    let v152 = constructor_vec_dup_from_fpu(ctx, v145, &VectorSize::Size16x8, v150);
+                    let v153 = constructor_output_reg(ctx, v152);
+                    // Rule at src/isa/aarch64/lower.isle line 129.
+                    return Some(v153);
+                }
+                let v154 = C::shuffle_dup32_from_imm(ctx, v139);
+                if let Some(v155) = v154 {
+                    let v140 = C::unpack_value_array_2(ctx, v138);
+                    let v145 = C::put_in_reg(ctx, v140.0);
+                    let v157 = constructor_vec_dup_from_fpu(ctx, v145, &VectorSize::Size32x4, v155);
+                    let v158 = constructor_output_reg(ctx, v157);
+                    // Rule at src/isa/aarch64/lower.isle line 131.
+                    return Some(v158);
+                }
+                let v159 = C::shuffle_dup64_from_imm(ctx, v139);
+                if let Some(v160) = v159 {
+                    let v140 = C::unpack_value_array_2(ctx, v138);
+                    let v145 = C::put_in_reg(ctx, v140.0);
+                    let v162 = constructor_vec_dup_from_fpu(ctx, v145, &VectorSize::Size64x2, v160);
+                    let v163 = constructor_output_reg(ctx, v162);
+                    // Rule at src/isa/aarch64/lower.isle line 133.
+                    return Some(v163);
+                }
+                let v164 = C::vec_extract_imm4_from_immediate(ctx, v139);
+                if let Some(v165) = v164 {
+                    let v140 = C::unpack_value_array_2(ctx, v138);
+                    let v145 = C::put_in_reg(ctx, v140.0);
+                    let v166 = C::put_in_reg(ctx, v140.1);
+                    let v167 = constructor_vec_extract(ctx, v145, v166, v165);
+                    let v168 = constructor_output_reg(ctx, v167);
+                    // Rule at src/isa/aarch64/lower.isle line 152.
+                    return Some(v168);
+                }
+                let v169 = C::u128_from_immediate(ctx, v139);
+                if let Some(v170) = v169 {
+                    match v170 {
+                        0x8090A0B0C0D0E0F0001020304050607 => {
+                            let v140 = C::unpack_value_array_2(ctx, v138);
+                            let v145 = C::put_in_reg(ctx, v140.0);
+                            let v217 = constructor_rev64(ctx, v145, &VectorSize::Size8x16);
+                            let v218 = constructor_output_reg(ctx, v217);
+                            // Rule at src/isa/aarch64/lower.isle line 228.
+                            return Some(v218);
+                        }
+                        0x9080B0A0D0C0F0E0100030205040706 => {
+                            let v140 = C::unpack_value_array_2(ctx, v138);
+                            let v145 = C::put_in_reg(ctx, v140.0);
+                            let v219 = constructor_rev64(ctx, v145, &VectorSize::Size16x8);
+                            let v220 = constructor_output_reg(ctx, v219);
+                            // Rule at src/isa/aarch64/lower.isle line 230.
+                            return Some(v220);
+                        }
+                        0xB0A09080F0E0D0C0302010007060504 => {
+                            let v140 = C::unpack_value_array_2(ctx, v138);
+                            let v145 = C::put_in_reg(ctx, v140.0);
+                            let v221 = constructor_rev64(ctx, v145, &VectorSize::Size32x4);
+                            let v222 = constructor_output_reg(ctx, v221);
+                            // Rule at src/isa/aarch64/lower.isle line 232.
+                            return Some(v222);
+                        }
+                        0xC0D0E0F08090A0B0405060700010203 => {
+                            let v140 = C::unpack_value_array_2(ctx, v138);
+                            let v145 = C::put_in_reg(ctx, v140.0);
+                            let v213 = constructor_rev32(ctx, v145, &VectorSize::Size8x16);
+                            let v214 = constructor_output_reg(ctx, v213);
+                            // Rule at src/isa/aarch64/lower.isle line 224.
+                            return Some(v214);
+                        }
+                        0xD0C0F0E09080B0A0504070601000302 => {
+                            let v140 = C::unpack_value_array_2(ctx, v138);
+                            let v145 = C::put_in_reg(ctx, v140.0);
+                            let v215 = constructor_rev32(ctx, v145, &VectorSize::Size16x8);
+                            let v216 = constructor_output_reg(ctx, v215);
+                            // Rule at src/isa/aarch64/lower.isle line 226.
+                            return Some(v216);
+                        }
+                        0xE0F0C0D0A0B08090607040502030001 => {
+                            let v140 = C::unpack_value_array_2(ctx, v138);
+                            let v145 = C::put_in_reg(ctx, v140.0);
+                            let v211 = constructor_rev16(ctx, v145, &VectorSize::Size8x16);
+                            let v212 = constructor_output_reg(ctx, v211);
+                            // Rule at src/isa/aarch64/lower.isle line 222.
+                            return Some(v212);
+                        }
+                        0x17071606150514041303120211011000 => {
+                            let v140 = C::unpack_value_array_2(ctx, v138);
+                            let v145 = C::put_in_reg(ctx, v140.0);
+                            let v166 = C::put_in_reg(ctx, v140.1);
+                            let v187 = constructor_vec_zip1(ctx, v145, v166, &VectorSize::Size8x16);
+                            let v188 = constructor_output_reg(ctx, v187);
+                            // Rule at src/isa/aarch64/lower.isle line 184.
+                            return Some(v188);
+                        }
+                        0x17160706151405041312030211100100 => {
+                            let v140 = C::unpack_value_array_2(ctx, v138);
+                            let v145 = C::put_in_reg(ctx, v140.0);
+                            let v166 = C::put_in_reg(ctx, v140.1);
+                            let v191 = constructor_vec_zip1(ctx, v145, v166, &VectorSize::Size16x8);
+                            let v192 = constructor_output_reg(ctx, v191);
+                            // Rule at src/isa/aarch64/lower.isle line 188.
+                            return Some(v192);
+                        }
+                        0x17161514070605041312111003020100 => {
+                            let v140 = C::unpack_value_array_2(ctx, v138);
+                            let v145 = C::put_in_reg(ctx, v140.0);
+                            let v166 = C::put_in_reg(ctx, v140.1);
+                            let v195 = constructor_vec_zip1(ctx, v145, v166, &VectorSize::Size32x4);
+                            let v196 = constructor_output_reg(ctx, v195);
+                            // Rule at src/isa/aarch64/lower.isle line 192.
+                            return Some(v196);
+                        }
+                        0x17161514131211100706050403020100 => {
+                            let v140 = C::unpack_value_array_2(ctx, v138);
+                            let v145 = C::put_in_reg(ctx, v140.0);
+                            let v166 = C::put_in_reg(ctx, v140.1);
+                            let v183 = constructor_vec_uzp1(ctx, v145, v166, &VectorSize::Size64x2);
+                            let v184 = constructor_output_reg(ctx, v183);
+                            // Rule at src/isa/aarch64/lower.isle line 177.
+                            return Some(v184);
+                        }
+                        0x1B1A19180B0A09081312111003020100 => {
+                            let v140 = C::unpack_value_array_2(ctx, v138);
+                            let v145 = C::put_in_reg(ctx, v140.0);
+                            let v166 = C::put_in_reg(ctx, v140.1);
+                            let v207 = constructor_vec_trn1(ctx, v145, v166, &VectorSize::Size32x4);
+                            let v208 = constructor_output_reg(ctx, v207);
+                            // Rule at src/isa/aarch64/lower.isle line 210.
+                            return Some(v208);
+                        }
+                        0x1B1A1918131211100B0A090803020100 => {
+                            let v140 = C::unpack_value_array_2(ctx, v138);
+                            let v145 = C::put_in_reg(ctx, v140.0);
+                            let v166 = C::put_in_reg(ctx, v140.1);
+                            let v179 = constructor_vec_uzp1(ctx, v145, v166, &VectorSize::Size32x4);
+                            let v180 = constructor_output_reg(ctx, v179);
+                            // Rule at src/isa/aarch64/lower.isle line 173.
+                            return Some(v180);
+                        }
+                        0x1D1C0D0C191809081514050411100100 => {
+                            let v140 = C::unpack_value_array_2(ctx, v138);
+                            let v145 = C::put_in_reg(ctx, v140.0);
+                            let v166 = C::put_in_reg(ctx, v140.1);
+                            let v203 = constructor_vec_trn1(ctx, v145, v166, &VectorSize::Size16x8);
+                            let v204 = constructor_output_reg(ctx, v203);
+                            // Rule at src/isa/aarch64/lower.isle line 206.
+                            return Some(v204);
+                        }
+                        0x1D1C1918151411100D0C090805040100 => {
+                            let v140 = C::unpack_value_array_2(ctx, v138);
+                            let v145 = C::put_in_reg(ctx, v140.0);
+                            let v166 = C::put_in_reg(ctx, v140.1);
+                            let v175 = constructor_vec_uzp1(ctx, v145, v166, &VectorSize::Size16x8);
+                            let v176 = constructor_output_reg(ctx, v175);
+                            // Rule at src/isa/aarch64/lower.isle line 169.
+                            return Some(v176);
+                        }
+                        0x1E0E1C0C1A0A18081606140412021000 => {
+                            let v140 = C::unpack_value_array_2(ctx, v138);
+                            let v145 = C::put_in_reg(ctx, v140.0);
+                            let v166 = C::put_in_reg(ctx, v140.1);
+                            let v199 = constructor_vec_trn1(ctx, v145, v166, &VectorSize::Size8x16);
+                            let v200 = constructor_output_reg(ctx, v199);
+                            // Rule at src/isa/aarch64/lower.isle line 202.
+                            return Some(v200);
+                        }
+                        0x1E1C1A18161412100E0C0A0806040200 => {
+                            let v140 = C::unpack_value_array_2(ctx, v138);
+                            let v145 = C::put_in_reg(ctx, v140.0);
+                            let v166 = C::put_in_reg(ctx, v140.1);
+                            let v171 = constructor_vec_uzp1(ctx, v145, v166, &VectorSize::Size8x16);
+                            let v172 = constructor_output_reg(ctx, v171);
+                            // Rule at src/isa/aarch64/lower.isle line 165.
+                            return Some(v172);
+                        }
+                        0x1F0F1D0D1B0B19091707150513031101 => {
+                            let v140 = C::unpack_value_array_2(ctx, v138);
+                            let v145 = C::put_in_reg(ctx, v140.0);
+                            let v166 = C::put_in_reg(ctx, v140.1);
+                            let v201 = constructor_vec_trn2(ctx, v145, v166, &VectorSize::Size8x16);
+                            let v202 = constructor_output_reg(ctx, v201);
+                            // Rule at src/isa/aarch64/lower.isle line 204.
+                            return Some(v202);
+                        }
+                        0x1F0F1E0E1D0D1C0C1B0B1A0A19091808 => {
+                            let v140 = C::unpack_value_array_2(ctx, v138);
+                            let v145 = C::put_in_reg(ctx, v140.0);
+                            let v166 = C::put_in_reg(ctx, v140.1);
+                            let v189 = constructor_vec_zip2(ctx, v145, v166, &VectorSize::Size8x16);
+                            let v190 = constructor_output_reg(ctx, v189);
+                            // Rule at src/isa/aarch64/lower.isle line 186.
+                            return Some(v190);
+                        }
+                        0x1F1D1B19171513110F0D0B0907050301 => {
+                            let v140 = C::unpack_value_array_2(ctx, v138);
+                            let v145 = C::put_in_reg(ctx, v140.0);
+                            let v166 = C::put_in_reg(ctx, v140.1);
+                            let v173 = constructor_vec_uzp2(ctx, v145, v166, &VectorSize::Size8x16);
+                            let v174 = constructor_output_reg(ctx, v173);
+                            // Rule at src/isa/aarch64/lower.isle line 167.
+                            return Some(v174);
+                        }
+                        0x1F1E0F0E1B1A0B0A1716070613120302 => {
+                            let v140 = C::unpack_value_array_2(ctx, v138);
+                            let v145 = C::put_in_reg(ctx, v140.0);
+                            let v166 = C::put_in_reg(ctx, v140.1);
+                            let v205 = constructor_vec_trn2(ctx, v145, v166, &VectorSize::Size16x8);
+                            let v206 = constructor_output_reg(ctx, v205);
+                            // Rule at src/isa/aarch64/lower.isle line 208.
+                            return Some(v206);
+                        }
+                        0x1F1E0F0E1D1C0D0C1B1A0B0A19180908 => {
+                            let v140 = C::unpack_value_array_2(ctx, v138);
+                            let v145 = C::put_in_reg(ctx, v140.0);
+                            let v166 = C::put_in_reg(ctx, v140.1);
+                            let v193 = constructor_vec_zip2(ctx, v145, v166, &VectorSize::Size16x8);
+                            let v194 = constructor_output_reg(ctx, v193);
+                            // Rule at src/isa/aarch64/lower.isle line 190.
+                            return Some(v194);
+                        }
+                        0x1F1E1B1A171613120F0E0B0A07060302 => {
+                            let v140 = C::unpack_value_array_2(ctx, v138);
+                            let v145 = C::put_in_reg(ctx, v140.0);
+                            let v166 = C::put_in_reg(ctx, v140.1);
+                            let v177 = constructor_vec_uzp2(ctx, v145, v166, &VectorSize::Size16x8);
+                            let v178 = constructor_output_reg(ctx, v177);
+                            // Rule at src/isa/aarch64/lower.isle line 171.
+                            return Some(v178);
+                        }
+                        0x1F1E1D1C0F0E0D0C1716151407060504 => {
+                            let v140 = C::unpack_value_array_2(ctx, v138);
+                            let v145 = C::put_in_reg(ctx, v140.0);
+                            let v166 = C::put_in_reg(ctx, v140.1);
+                            let v209 = constructor_vec_trn2(ctx, v145, v166, &VectorSize::Size32x4);
+                            let v210 = constructor_output_reg(ctx, v209);
+                            // Rule at src/isa/aarch64/lower.isle line 212.
+                            return Some(v210);
+                        }
+                        0x1F1E1D1C0F0E0D0C1B1A19180B0A0908 => {
+                            let v140 = C::unpack_value_array_2(ctx, v138);
+                            let v145 = C::put_in_reg(ctx, v140.0);
+                            let v166 = C::put_in_reg(ctx, v140.1);
+                            let v197 = constructor_vec_zip2(ctx, v145, v166, &VectorSize::Size32x4);
+                            let v198 = constructor_output_reg(ctx, v197);
+                            // Rule at src/isa/aarch64/lower.isle line 194.
+                            return Some(v198);
+                        }
+                        0x1F1E1D1C171615140F0E0D0C07060504 => {
+                            let v140 = C::unpack_value_array_2(ctx, v138);
+                            let v145 = C::put_in_reg(ctx, v140.0);
+                            let v166 = C::put_in_reg(ctx, v140.1);
+                            let v181 = constructor_vec_uzp2(ctx, v145, v166, &VectorSize::Size32x4);
+                            let v182 = constructor_output_reg(ctx, v181);
+                            // Rule at src/isa/aarch64/lower.isle line 175.
+                            return Some(v182);
+                        }
+                        0x1F1E1D1C1B1A19180F0E0D0C0B0A0908 => {
+                            let v140 = C::unpack_value_array_2(ctx, v138);
+                            let v145 = C::put_in_reg(ctx, v140.0);
+                            let v166 = C::put_in_reg(ctx, v140.1);
+                            let v185 = constructor_vec_uzp2(ctx, v145, v166, &VectorSize::Size64x2);
+                            let v186 = constructor_output_reg(ctx, v185);
+                            // Rule at src/isa/aarch64/lower.isle line 179.
+                            return Some(v186);
+                        }
+                        _ => {}
+                    }
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v223 = constructor_constant_f128(ctx, v170);
+                        let v140 = C::unpack_value_array_2(ctx, v138);
+                        let v224 = C::put_in_reg(ctx, v140.0);
+                        let v225 = C::put_in_reg(ctx, v140.1);
+                        let v3 = C::value_type(ctx, v2);
+                        let v226 = constructor_vec_tbl2(ctx, v224, v225, v223, v3);
+                        let v227 = constructor_output_reg(ctx, v226);
+                        // Rule at src/isa/aarch64/lower.isle line 235.
+                        return Some(v227);
+                    }
+                }
+            }
+        }
+        &InstructionData::StackLoad {
+            opcode: ref v1671,
+            stack_slot: v1672,
+            offset: v1673,
+        } => {
+            if let &Opcode::StackAddr = v1671 {
+                let v1674 = constructor_compute_stack_addr(ctx, v1672, v1673);
+                let v1675 = constructor_output_reg(ctx, v1674);
+                // Rule at src/isa/aarch64/lower.isle line 2509.
+                return Some(v1675);
+            }
+        }
+        &InstructionData::Store {
+            opcode: ref v1569,
+            args: ref v1570,
+            flags: v1571,
+            offset: v1572,
+        } => {
+            match v1569 {
+                &Opcode::Store => {
+                    let v1573 = C::unpack_value_array_2(ctx, v1570);
+                    let v1576 = C::value_type(ctx, v1573.0);
+                    match v1576 {
+                        I8 => {
+                            let v1577 = C::offset32_to_u32(ctx, v1572);
+                            let v1578 = &C::amode(ctx, I8, v1573.1, v1577);
+                            let v1579 = C::put_in_reg(ctx, v1573.0);
+                            let v1580 = &constructor_aarch64_store8(ctx, v1578, v1571, v1579);
+                            let v1581 = constructor_side_effect(ctx, v1580);
+                            // Rule at src/isa/aarch64/lower.isle line 2380.
+                            return Some(v1581);
+                        }
+                        I16 => {
+                            let v1577 = C::offset32_to_u32(ctx, v1572);
+                            let v1582 = &C::amode(ctx, I16, v1573.1, v1577);
+                            let v1579 = C::put_in_reg(ctx, v1573.0);
+                            let v1583 = &constructor_aarch64_store16(ctx, v1582, v1571, v1579);
+                            let v1584 = constructor_side_effect(ctx, v1583);
+                            // Rule at src/isa/aarch64/lower.isle line 2384.
+                            return Some(v1584);
+                        }
+                        I32 => {
+                            let v1577 = C::offset32_to_u32(ctx, v1572);
+                            let v1585 = &C::amode(ctx, I32, v1573.1, v1577);
+                            let v1579 = C::put_in_reg(ctx, v1573.0);
+                            let v1586 = &constructor_aarch64_store32(ctx, v1585, v1571, v1579);
+                            let v1587 = constructor_side_effect(ctx, v1586);
+                            // Rule at src/isa/aarch64/lower.isle line 2388.
+                            return Some(v1587);
+                        }
+                        I64 => {
+                            let v1577 = C::offset32_to_u32(ctx, v1572);
+                            let v1588 = &C::amode(ctx, I64, v1573.1, v1577);
+                            let v1579 = C::put_in_reg(ctx, v1573.0);
+                            let v1589 = &constructor_aarch64_store64(ctx, v1588, v1571, v1579);
+                            let v1590 = constructor_side_effect(ctx, v1589);
+                            // Rule at src/isa/aarch64/lower.isle line 2392.
+                            return Some(v1590);
+                        }
+                        I128 => {
+                            let v1577 = C::offset32_to_u32(ctx, v1572);
+                            let v1597 = &C::pair_amode(ctx, v1573.1, v1577);
+                            let v1598 = C::put_in_regs(ctx, v1573.0);
+                            let v1599 = C::value_regs_get(ctx, v1598, 0x0);
+                            let v1600 = C::put_in_regs(ctx, v1573.0);
+                            let v1601 = C::value_regs_get(ctx, v1600, 0x1);
+                            let v1602 =
+                                &constructor_aarch64_storep64(ctx, v1597, v1571, v1599, v1601);
+                            let v1603 = constructor_side_effect(ctx, v1602);
+                            // Rule at src/isa/aarch64/lower.isle line 2423.
+                            return Some(v1603);
+                        }
+                        R64 => {
+                            let v1577 = C::offset32_to_u32(ctx, v1572);
+                            let v1588 = &C::amode(ctx, I64, v1573.1, v1577);
+                            let v1579 = C::put_in_reg(ctx, v1573.0);
+                            let v1589 = &constructor_aarch64_store64(ctx, v1588, v1571, v1579);
+                            let v1590 = constructor_side_effect(ctx, v1589);
+                            // Rule at src/isa/aarch64/lower.isle line 2396.
+                            return Some(v1590);
+                        }
+                        F32 => {
+                            let v1577 = C::offset32_to_u32(ctx, v1572);
+                            let v1591 = &C::amode(ctx, F32, v1573.1, v1577);
+                            let v1579 = C::put_in_reg(ctx, v1573.0);
+                            let v1592 = &constructor_aarch64_fpustore32(ctx, v1591, v1571, v1579);
+                            let v1593 = constructor_side_effect(ctx, v1592);
+                            // Rule at src/isa/aarch64/lower.isle line 2414.
+                            return Some(v1593);
+                        }
+                        F64 => {
+                            let v1577 = C::offset32_to_u32(ctx, v1572);
+                            let v1594 = &C::amode(ctx, F64, v1573.1, v1577);
+                            let v1579 = C::put_in_reg(ctx, v1573.0);
+                            let v1595 = &constructor_aarch64_fpustore64(ctx, v1594, v1571, v1579);
+                            let v1596 = constructor_side_effect(ctx, v1595);
+                            // Rule at src/isa/aarch64/lower.isle line 2418.
+                            return Some(v1596);
+                        }
+                        _ => {}
+                    }
+                    let v1604 = C::ty_vec64(ctx, v1576);
+                    if let Some(v1605) = v1604 {
+                        let v1577 = C::offset32_to_u32(ctx, v1572);
+                        let v1594 = &C::amode(ctx, F64, v1573.1, v1577);
+                        let v1579 = C::put_in_reg(ctx, v1573.0);
+                        let v1595 = &constructor_aarch64_fpustore64(ctx, v1594, v1571, v1579);
+                        let v1596 = constructor_side_effect(ctx, v1595);
+                        // Rule at src/isa/aarch64/lower.isle line 2430.
+                        return Some(v1596);
+                    }
+                    let v1611 = C::ty_dyn_vec64(ctx, v1576);
+                    if let Some(v1612) = v1611 {
+                        let v1577 = C::offset32_to_u32(ctx, v1572);
+                        let v1594 = &C::amode(ctx, F64, v1573.1, v1577);
+                        let v1579 = C::put_in_reg(ctx, v1573.0);
+                        let v1595 = &constructor_aarch64_fpustore64(ctx, v1594, v1571, v1579);
+                        let v1596 = constructor_side_effect(ctx, v1595);
+                        // Rule at src/isa/aarch64/lower.isle line 2438.
+                        return Some(v1596);
+                    }
+                    let v1606 = C::ty_vec128(ctx, v1576);
+                    if let Some(v1607) = v1606 {
+                        let v1577 = C::offset32_to_u32(ctx, v1572);
+                        let v1608 = &C::amode(ctx, I8X16, v1573.1, v1577);
+                        let v1579 = C::put_in_reg(ctx, v1573.0);
+                        let v1609 = &constructor_aarch64_fpustore128(ctx, v1608, v1571, v1579);
+                        let v1610 = constructor_side_effect(ctx, v1609);
+                        // Rule at src/isa/aarch64/lower.isle line 2434.
+                        return Some(v1610);
+                    }
+                    let v1613 = C::ty_dyn_vec128(ctx, v1576);
+                    if let Some(v1614) = v1613 {
+                        let v1577 = C::offset32_to_u32(ctx, v1572);
+                        let v1608 = &C::amode(ctx, I8X16, v1573.1, v1577);
+                        let v1579 = C::put_in_reg(ctx, v1573.0);
+                        let v1609 = &constructor_aarch64_fpustore128(ctx, v1608, v1571, v1579);
+                        let v1610 = constructor_side_effect(ctx, v1609);
+                        // Rule at src/isa/aarch64/lower.isle line 2442.
+                        return Some(v1610);
+                    }
+                }
+                &Opcode::Istore8 => {
+                    let v1573 = C::unpack_value_array_2(ctx, v1570);
+                    let v1577 = C::offset32_to_u32(ctx, v1572);
+                    let v1578 = &C::amode(ctx, I8, v1573.1, v1577);
+                    let v1579 = C::put_in_reg(ctx, v1573.0);
+                    let v1580 = &constructor_aarch64_store8(ctx, v1578, v1571, v1579);
+                    let v1581 = constructor_side_effect(ctx, v1580);
+                    // Rule at src/isa/aarch64/lower.isle line 2401.
+                    return Some(v1581);
+                }
+                &Opcode::Istore16 => {
+                    let v1573 = C::unpack_value_array_2(ctx, v1570);
+                    let v1577 = C::offset32_to_u32(ctx, v1572);
+                    let v1582 = &C::amode(ctx, I16, v1573.1, v1577);
+                    let v1579 = C::put_in_reg(ctx, v1573.0);
+                    let v1583 = &constructor_aarch64_store16(ctx, v1582, v1571, v1579);
+                    let v1584 = constructor_side_effect(ctx, v1583);
+                    // Rule at src/isa/aarch64/lower.isle line 2405.
+                    return Some(v1584);
+                }
+                &Opcode::Istore32 => {
+                    let v1573 = C::unpack_value_array_2(ctx, v1570);
+                    let v1577 = C::offset32_to_u32(ctx, v1572);
+                    let v1585 = &C::amode(ctx, I32, v1573.1, v1577);
+                    let v1579 = C::put_in_reg(ctx, v1573.0);
+                    let v1586 = &constructor_aarch64_store32(ctx, v1585, v1571, v1579);
+                    let v1587 = constructor_side_effect(ctx, v1586);
+                    // Rule at src/isa/aarch64/lower.isle line 2409.
+                    return Some(v1587);
+                }
+                _ => {}
+            }
+        }
+        &InstructionData::StoreNoOffset {
+            opcode: ref v1299,
+            args: ref v1300,
+            flags: v1301,
+        } => {
+            if let &Opcode::AtomicStore = v1299 {
+                let v1302 = C::unpack_value_array_2(ctx, v1300);
+                let v1305 = C::value_type(ctx, v1302.0);
+                let v1306 = C::valid_atomic_transaction(ctx, v1305);
+                if let Some(v1307) = v1306 {
+                    let v1308 = C::put_in_reg(ctx, v1302.0);
+                    let v1309 = C::put_in_reg(ctx, v1302.1);
+                    let v1310 = &constructor_store_release(ctx, v1307, v1301, v1308, v1309);
+                    let v1311 = constructor_side_effect(ctx, v1310);
+                    // Rule at src/isa/aarch64/lower.isle line 2045.
+                    return Some(v1311);
+                }
+            }
+        }
+        &InstructionData::Ternary {
+            opcode: ref v462,
+            args: ref v463,
+        } => {
+            match v462 {
+                &Opcode::Select => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v464 = C::unpack_value_array_3(ctx, v463);
+                        let v1176 = C::maybe_uextend(ctx, v464.0);
+                        if let Some(v1177) = v1176 {
+                            let v1178 = C::def_inst(ctx, v1177);
+                            if let Some(v1179) = v1178 {
+                                let v1180 = &C::inst_data(ctx, v1179);
+                                match v1180 {
+                                    &InstructionData::FloatCompare {
+                                        opcode: ref v1194,
+                                        args: ref v1195,
+                                        cond: ref v1196,
+                                    } => {
+                                        if let &Opcode::Fcmp = v1194 {
+                                            let v1201 = &C::fp_cond_code(ctx, v1196);
+                                            let v1197 = C::unpack_value_array_2(ctx, v1195);
+                                            let v1200 = C::value_type(ctx, v1197.0);
+                                            let v1202 = &constructor_scalar_size(ctx, v1200);
+                                            let v1203 = C::put_in_reg(ctx, v1197.0);
+                                            let v1204 = C::put_in_reg(ctx, v1197.1);
+                                            let v1205 =
+                                                &constructor_fpu_cmp(ctx, v1202, v1203, v1204);
+                                            let v3 = C::value_type(ctx, v2);
+                                            let v1206 = constructor_lower_select(
+                                                ctx, v1205, v1201, v3, v464.1, v464.2,
+                                            );
+                                            let v1207 = C::output(ctx, v1206);
+                                            // Rule at src/isa/aarch64/lower.isle line 1937.
+                                            return Some(v1207);
+                                        }
+                                    }
+                                    &InstructionData::IntCompare {
+                                        opcode: ref v1181,
+                                        args: ref v1182,
+                                        cond: ref v1183,
+                                    } => {
+                                        if let &Opcode::Icmp = v1181 {
+                                            let v1184 = C::unpack_value_array_2(ctx, v1182);
+                                            let v1187 = C::value_type(ctx, v1184.0);
+                                            let v1188 = &constructor_lower_icmp_into_flags(
+                                                ctx, v1183, v1184.0, v1184.1, v1187,
+                                            );
+                                            let v1189 = &constructor_flags_and_cc_flags(ctx, v1188);
+                                            let v1190 = &constructor_flags_and_cc_cc(ctx, v1188);
+                                            let v1191 = &C::cond_code(ctx, v1190);
+                                            let v3 = C::value_type(ctx, v2);
+                                            let v1192 = constructor_lower_select(
+                                                ctx, v1189, v1191, v3, v464.1, v464.2,
+                                            );
+                                            let v1193 = C::output(ctx, v1192);
+                                            // Rule at src/isa/aarch64/lower.isle line 1924.
+                                            return Some(v1193);
+                                        }
+                                    }
+                                    _ => {}
+                                }
+                            }
+                        }
+                        let v1208 = C::value_type(ctx, v464.0);
+                        if v1208 == I8 {
+                            let v1085 = C::put_in_reg(ctx, v464.0);
+                            let v1210 = C::u64_into_imm_logic(ctx, I32, 0xFF);
+                            let v1211 = &constructor_tst_imm(ctx, I32, v1085, v1210);
+                            let v3 = C::value_type(ctx, v2);
+                            let v1212 =
+                                constructor_lower_select(ctx, v1211, &Cond::Ne, v3, v464.1, v464.2);
+                            let v1213 = C::output(ctx, v1212);
+                            // Rule at src/isa/aarch64/lower.isle line 1946.
+                            return Some(v1213);
+                        }
+                        let v1214 = C::fits_in_32(ctx, v1208);
+                        if let Some(v1215) = v1214 {
+                            let v1216 = constructor_put_in_reg_zext32(ctx, v464.0);
+                            let v1217 = C::zero_reg(ctx);
+                            let v1218 = &constructor_cmp(ctx, &OperandSize::Size32, v1216, v1217);
+                            let v3 = C::value_type(ctx, v2);
+                            let v1219 =
+                                constructor_lower_select(ctx, v1218, &Cond::Ne, v3, v464.1, v464.2);
+                            let v1220 = C::output(ctx, v1219);
+                            // Rule at src/isa/aarch64/lower.isle line 1952.
+                            return Some(v1220);
+                        }
+                        let v1221 = C::fits_in_64(ctx, v1208);
+                        if let Some(v1222) = v1221 {
+                            let v1223 = constructor_put_in_reg_zext64(ctx, v464.0);
+                            let v1217 = C::zero_reg(ctx);
+                            let v1224 = &constructor_cmp(ctx, &OperandSize::Size64, v1223, v1217);
+                            let v3 = C::value_type(ctx, v2);
+                            let v1225 =
+                                constructor_lower_select(ctx, v1224, &Cond::Ne, v3, v464.1, v464.2);
+                            let v1226 = C::output(ctx, v1225);
+                            // Rule at src/isa/aarch64/lower.isle line 1958.
+                            return Some(v1226);
+                        }
+                        if v1208 == I128 {
+                            let v1227 = C::put_in_regs(ctx, v464.0);
+                            let v1228 = C::value_regs_get(ctx, v1227, 0x0);
+                            let v1229 = C::value_regs_get(ctx, v1227, 0x1);
+                            let v1230 = constructor_orr(ctx, I64, v1228, v1229);
+                            let v888 = C::zero_reg(ctx);
+                            let v1231 = &constructor_cmp(ctx, &OperandSize::Size64, v1230, v888);
+                            let v3 = C::value_type(ctx, v2);
+                            let v1232 =
+                                constructor_lower_select(ctx, v1231, &Cond::Ne, v3, v464.1, v464.2);
+                            let v1233 = C::output(ctx, v1232);
+                            // Rule at src/isa/aarch64/lower.isle line 1964.
+                            return Some(v1233);
+                        }
+                    }
+                }
+                &Opcode::SelectSpectreGuard => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v464 = C::unpack_value_array_3(ctx, v463);
+                        let v1176 = C::maybe_uextend(ctx, v464.0);
+                        if let Some(v1177) = v1176 {
+                            let v1178 = C::def_inst(ctx, v1177);
+                            if let Some(v1179) = v1178 {
+                                let v1180 = &C::inst_data(ctx, v1179);
+                                if let &InstructionData::IntCompare {
+                                    opcode: ref v1181,
+                                    args: ref v1182,
+                                    cond: ref v1183,
+                                } = v1180
+                                {
+                                    if let &Opcode::Icmp = v1181 {
+                                        let v1184 = C::unpack_value_array_2(ctx, v1182);
+                                        let v1187 = C::value_type(ctx, v1184.0);
+                                        let v1188 = &constructor_lower_icmp_into_flags(
+                                            ctx, v1183, v1184.0, v1184.1, v1187,
+                                        );
+                                        let v1189 = &constructor_flags_and_cc_flags(ctx, v1188);
+                                        let v1190 = &constructor_flags_and_cc_cc(ctx, v1188);
+                                        let v1191 = &C::cond_code(ctx, v1190);
+                                        let v3 = C::value_type(ctx, v2);
+                                        let v1192 = constructor_lower_select(
+                                            ctx, v1189, v1191, v3, v464.1, v464.2,
+                                        );
+                                        let v1234 = &constructor_csdb(ctx);
+                                        let v1235 = constructor_side_effect(ctx, v1234);
+                                        let v1236 = C::output(ctx, v1192);
+                                        // Rule at src/isa/aarch64/lower.isle line 1975.
+                                        return Some(v1236);
+                                    }
+                                }
+                            }
+                        }
+                        let v1208 = C::value_type(ctx, v464.0);
+                        let v1221 = C::fits_in_64(ctx, v1208);
+                        if let Some(v1222) = v1221 {
+                            let v1223 = constructor_put_in_reg_zext64(ctx, v464.0);
+                            let v1217 = C::zero_reg(ctx);
+                            let v1224 = &constructor_cmp(ctx, &OperandSize::Size64, v1223, v1217);
+                            let v3 = C::value_type(ctx, v2);
+                            let v1225 =
+                                constructor_lower_select(ctx, v1224, &Cond::Ne, v3, v464.1, v464.2);
+                            let v1226 = C::output(ctx, v1225);
+                            // Rule at src/isa/aarch64/lower.isle line 1989.
+                            return Some(v1226);
+                        }
+                        if v1208 == I128 {
+                            let v1227 = C::put_in_regs(ctx, v464.0);
+                            let v1228 = C::value_regs_get(ctx, v1227, 0x0);
+                            let v1229 = C::value_regs_get(ctx, v1227, 0x1);
+                            let v1230 = constructor_orr(ctx, I64, v1228, v1229);
+                            let v888 = C::zero_reg(ctx);
+                            let v1231 = &constructor_cmp(ctx, &OperandSize::Size64, v1230, v888);
+                            let v3 = C::value_type(ctx, v2);
+                            let v1232 =
+                                constructor_lower_select(ctx, v1231, &Cond::Ne, v3, v464.1, v464.2);
+                            let v1233 = C::output(ctx, v1232);
+                            // Rule at src/isa/aarch64/lower.isle line 1995.
+                            return Some(v1233);
+                        }
+                    }
+                }
+                &Opcode::Bitselect => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v575 = C::ty_vec128(ctx, v3);
+                        if let Some(v576) = v575 {
+                            let v464 = C::unpack_value_array_3(ctx, v463);
+                            let v1085 = C::put_in_reg(ctx, v464.0);
+                            let v1086 = C::put_in_reg(ctx, v464.1);
+                            let v1087 = C::put_in_reg(ctx, v464.2);
+                            let v1088 = constructor_bsl(ctx, v576, v1085, v1086, v1087);
+                            let v1089 = constructor_output_reg(ctx, v1088);
+                            // Rule at src/isa/aarch64/lower.isle line 1836.
+                            return Some(v1089);
+                        }
+                        let v1077 = C::ty_int_ref_scalar_64(ctx, v3);
+                        if let Some(v1078) = v1077 {
+                            let v464 = C::unpack_value_array_3(ctx, v463);
+                            let v1079 = C::put_in_reg(ctx, v464.1);
+                            let v469 = C::put_in_reg(ctx, v464.0);
+                            let v1080 = constructor_and_reg(ctx, v3, v1079, v469);
+                            let v471 = C::put_in_reg(ctx, v464.2);
+                            let v1081 = C::put_in_reg(ctx, v464.0);
+                            let v1082 = constructor_bic(ctx, v3, v471, v1081);
+                            let v1083 = constructor_orr(ctx, v3, v1080, v1082);
+                            let v1084 = constructor_output_reg(ctx, v1083);
+                            // Rule at src/isa/aarch64/lower.isle line 1830.
+                            return Some(v1084);
+                        }
+                    }
+                }
+                &Opcode::Fma => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v117 = C::multi_lane(ctx, v3);
+                        if let Some(v118) = v117 {
+                            let v475 = &constructor_vector_size(ctx, v3);
+                            let v464 = C::unpack_value_array_3(ctx, v463);
+                            let v476 = constructor_lower_fmla(
+                                ctx,
+                                &VecALUModOp::Fmla,
+                                v464.0,
+                                v464.1,
+                                v464.2,
+                                v475,
+                            );
+                            let v477 = constructor_output_reg(ctx, v476);
+                            // Rule at src/isa/aarch64/lower.isle line 520.
+                            return Some(v477);
+                        }
+                        let v348 = C::ty_scalar_float(ctx, v3);
+                        if let Some(v349) = v348 {
+                            let v389 = &constructor_scalar_size(ctx, v349);
+                            let v464 = C::unpack_value_array_3(ctx, v463);
+                            let v469 = C::put_in_reg(ctx, v464.0);
+                            let v470 = C::put_in_reg(ctx, v464.1);
+                            let v471 = C::put_in_reg(ctx, v464.2);
+                            let v472 =
+                                constructor_fpu_rrrr(ctx, &FPUOp3::MAdd, v389, v469, v470, v471);
+                            let v473 = constructor_output_reg(ctx, v472);
+                            // Rule at src/isa/aarch64/lower.isle line 516.
+                            return Some(v473);
+                        }
+                    }
+                }
+                _ => {}
+            }
+        }
+        &InstructionData::TernaryImm8 {
+            opcode: ref v1651,
+            args: ref v1652,
+            imm: v1653,
+        } => {
+            if let &Opcode::Insertlane = v1651 {
+                let v1654 = C::unpack_value_array_2(ctx, v1652);
+                let v1658 = C::value_type(ctx, v1654.1);
+                let v1659 = C::ty_int(ctx, v1658);
+                if let Some(v1660) = v1659 {
+                    let v1662 = C::put_in_reg(ctx, v1654.0);
+                    let v1663 = C::put_in_reg(ctx, v1654.1);
+                    let v1657 = C::value_type(ctx, v1654.0);
+                    let v1664 = &constructor_vector_size(ctx, v1657);
+                    let v1661 = C::u8_from_uimm8(ctx, v1653);
+                    let v1665 = constructor_mov_to_vec(ctx, v1662, v1663, v1661, v1664);
+                    let v1666 = constructor_output_reg(ctx, v1665);
+                    // Rule at src/isa/aarch64/lower.isle line 2497.
+                    return Some(v1666);
+                }
+                let v1667 = C::ty_scalar_float(ctx, v1658);
+                if let Some(v1668) = v1667 {
+                    let v1662 = C::put_in_reg(ctx, v1654.0);
+                    let v1663 = C::put_in_reg(ctx, v1654.1);
+                    let v1657 = C::value_type(ctx, v1654.0);
+                    let v1664 = &constructor_vector_size(ctx, v1657);
+                    let v1661 = C::u8_from_uimm8(ctx, v1653);
+                    let v1669 = constructor_mov_vec_elem(ctx, v1662, v1663, v1661, 0x0, v1664);
+                    let v1670 = constructor_output_reg(ctx, v1669);
+                    // Rule at src/isa/aarch64/lower.isle line 2502.
+                    return Some(v1670);
+                }
+            }
+        }
+        &InstructionData::Trap {
+            opcode: ref v1172,
+            code: ref v1173,
+        } => {
+            match v1172 {
+                &Opcode::Trap => {
+                    let v1174 = &constructor_udf(ctx, v1173);
+                    let v1175 = constructor_side_effect(ctx, v1174);
+                    // Rule at src/isa/aarch64/lower.isle line 1914.
+                    return Some(v1175);
+                }
+                &Opcode::ResumableTrap => {
+                    let v1174 = &constructor_udf(ctx, v1173);
+                    let v1175 = constructor_side_effect(ctx, v1174);
+                    // Rule at src/isa/aarch64/lower.isle line 1919.
+                    return Some(v1175);
+                }
+                _ => {}
+            }
+        }
+        &InstructionData::Unary {
+            opcode: ref v230,
+            arg: v231,
+        } => {
+            match v230 {
+                &Opcode::Splat => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v727 = C::def_inst(ctx, v231);
+                        if let Some(v728) = v727 {
+                            let v729 = &C::inst_data(ctx, v728);
+                            match v729 {
+                                &InstructionData::Load {
+                                    opcode: ref v1283,
+                                    arg: v1284,
+                                    flags: v1285,
+                                    offset: v1286,
+                                } => {
+                                    if let &Opcode::Load = v1283 {
+                                        let v742 = C::is_sinkable_inst(ctx, v231);
+                                        if let Some(v743) = v742 {
+                                            let v3 = C::value_type(ctx, v2);
+                                            let v1287 = C::lane_type(ctx, v3);
+                                            let v1288 =
+                                                constructor_sink_load_into_addr(ctx, v1287, v743);
+                                            let v313 = &constructor_vector_size(ctx, v3);
+                                            let v1289 = constructor_ld1r(ctx, v1288, v313, v1285);
+                                            let v1290 = constructor_output_reg(ctx, v1289);
+                                            // Rule at src/isa/aarch64/lower.isle line 2034.
+                                            return Some(v1290);
+                                        }
+                                    }
+                                }
+                                &InstructionData::Unary {
+                                    opcode: ref v1273,
+                                    arg: v1274,
+                                } => {
+                                    if let &Opcode::Ireduce = v1273 {
+                                        let v1275 = C::def_inst(ctx, v1274);
+                                        if let Some(v1276) = v1275 {
+                                            let v1277 = &C::inst_data(ctx, v1276);
+                                            if let &InstructionData::UnaryImm {
+                                                opcode: ref v1278,
+                                                imm: v1279,
+                                            } = v1277
+                                            {
+                                                if let &Opcode::Iconst = v1278 {
+                                                    let v3 = C::value_type(ctx, v2);
+                                                    let v475 = &constructor_vector_size(ctx, v3);
+                                                    let v1280 = C::u64_from_imm64(ctx, v1279);
+                                                    let v1281 =
+                                                        constructor_splat_const(ctx, v1280, v475);
+                                                    let v1282 = constructor_output_reg(ctx, v1281);
+                                                    // Rule at src/isa/aarch64/lower.isle line 2031.
+                                                    return Some(v1282);
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                                &InstructionData::UnaryIeee32 {
+                                    opcode: ref v1257,
+                                    imm: v1258,
+                                } => {
+                                    if let &Opcode::F32const = v1257 {
+                                        let v3 = C::value_type(ctx, v2);
+                                        let v475 = &constructor_vector_size(ctx, v3);
+                                        let v1259 = C::u32_from_ieee32(ctx, v1258);
+                                        let v1260 = C::u32_as_u64(ctx, v1259);
+                                        let v1261 = constructor_splat_const(ctx, v1260, v475);
+                                        let v1262 = constructor_output_reg(ctx, v1261);
+                                        // Rule at src/isa/aarch64/lower.isle line 2022.
+                                        return Some(v1262);
+                                    }
+                                }
+                                &InstructionData::UnaryIeee64 {
+                                    opcode: ref v1263,
+                                    imm: v1264,
+                                } => {
+                                    if let &Opcode::F64const = v1263 {
+                                        let v3 = C::value_type(ctx, v2);
+                                        let v475 = &constructor_vector_size(ctx, v3);
+                                        let v1265 = C::u64_from_ieee64(ctx, v1264);
+                                        let v1266 = constructor_splat_const(ctx, v1265, v475);
+                                        let v1267 = constructor_output_reg(ctx, v1266);
+                                        // Rule at src/isa/aarch64/lower.isle line 2025.
+                                        return Some(v1267);
+                                    }
+                                }
+                                &InstructionData::UnaryImm {
+                                    opcode: ref v1268,
+                                    imm: v1269,
+                                } => {
+                                    if let &Opcode::Iconst = v1268 {
+                                        let v3 = C::value_type(ctx, v2);
+                                        let v475 = &constructor_vector_size(ctx, v3);
+                                        let v1270 = C::u64_from_imm64(ctx, v1269);
+                                        let v1271 = constructor_splat_const(ctx, v1270, v475);
+                                        let v1272 = constructor_output_reg(ctx, v1271);
+                                        // Rule at src/isa/aarch64/lower.isle line 2028.
+                                        return Some(v1272);
+                                    }
+                                }
+                                _ => {}
+                            }
+                        }
+                        let v232 = C::value_type(ctx, v231);
+                        let v1249 = C::ty_int_ref_scalar_64(ctx, v232);
+                        if let Some(v1250) = v1249 {
+                            let v241 = C::put_in_reg(ctx, v231);
+                            let v3 = C::value_type(ctx, v2);
+                            let v313 = &constructor_vector_size(ctx, v3);
+                            let v1251 = constructor_vec_dup(ctx, v241, v313);
+                            let v1252 = constructor_output_reg(ctx, v1251);
+                            // Rule at src/isa/aarch64/lower.isle line 2015.
+                            return Some(v1252);
+                        }
+                        let v1253 = C::ty_scalar_float(ctx, v232);
+                        if let Some(v1254) = v1253 {
+                            let v241 = C::put_in_reg(ctx, v231);
+                            let v3 = C::value_type(ctx, v2);
+                            let v313 = &constructor_vector_size(ctx, v3);
+                            let v1255 = constructor_vec_dup_from_fpu(ctx, v241, v313, 0x0);
+                            let v1256 = constructor_output_reg(ctx, v1255);
+                            // Rule at src/isa/aarch64/lower.isle line 2019.
+                            return Some(v1256);
+                        }
+                    }
+                }
+                &Opcode::SetPinnedReg => {
+                    let v241 = C::put_in_reg(ctx, v231);
+                    let v1618 = &constructor_write_pinned_reg(ctx, v241);
+                    let v1619 = constructor_side_effect(ctx, v1618);
+                    // Rule at src/isa/aarch64/lower.isle line 2452.
+                    return Some(v1619);
+                }
+                &Opcode::VanyTrue => {
+                    let v241 = C::put_in_reg(ctx, v231);
+                    let v232 = C::value_type(ctx, v231);
+                    let v294 = &constructor_vanytrue(ctx, v241, v232);
+                    let v295 = &constructor_materialize_bool_result(ctx, &Cond::Ne);
+                    let v296 = constructor_with_flags(ctx, v294, v295);
+                    let v297 = C::output(ctx, v296);
+                    // Rule at src/isa/aarch64/lower.isle line 315.
+                    return Some(v297);
+                }
+                &Opcode::VallTrue => {
+                    let v232 = C::value_type(ctx, v231);
+                    let v255 = C::multi_lane(ctx, v232);
+                    if let Some(v256) = v255 {
+                        match v256.0 {
+                            0x20 => {
+                                if v256.1 == 0x2 {
+                                    let v241 = C::put_in_reg(ctx, v231);
+                                    let v267 = constructor_mov_from_vec(
+                                        ctx,
+                                        v241,
+                                        0x0,
+                                        &ScalarSize::Size64,
+                                    );
+                                    let v269 = C::zero_reg(ctx);
+                                    let v271 = &constructor_cmp_rr_shift(
+                                        ctx,
+                                        &OperandSize::Size64,
+                                        v269,
+                                        v267,
+                                        0x20,
+                                    );
+                                    let v273 = C::u8_into_uimm5(ctx, 0x0);
+                                    let v276 = C::nzcv(ctx, false, true, false, false);
+                                    let v278 = &constructor_ccmp_imm(
+                                        ctx,
+                                        &OperandSize::Size32,
+                                        v267,
+                                        v273,
+                                        v276,
+                                        &Cond::Ne,
+                                    );
+                                    let v279 = constructor_with_flags(ctx, v271, v278);
+                                    let v280 = C::output(ctx, v279);
+                                    // Rule at src/isa/aarch64/lower.isle line 289.
+                                    return Some(v280);
+                                }
+                            }
+                            0x40 => {
+                                if v256.1 == 0x2 {
+                                    let v241 = C::put_in_reg(ctx, v231);
+                                    let v259 = constructor_cmeq0(ctx, v241, &VectorSize::Size64x2);
+                                    let v260 =
+                                        constructor_addp(ctx, v259, v259, &VectorSize::Size64x2);
+                                    let v261 =
+                                        &constructor_fpu_cmp(ctx, &ScalarSize::Size64, v260, v260);
+                                    let v263 = &constructor_materialize_bool_result(ctx, &Cond::Eq);
+                                    let v264 = constructor_with_flags(ctx, v261, v263);
+                                    let v265 = C::output(ctx, v264);
+                                    // Rule at src/isa/aarch64/lower.isle line 283.
+                                    return Some(v265);
+                                }
+                            }
+                            _ => {}
+                        }
+                    }
+                    let v281 = C::lane_fits_in_32(ctx, v232);
+                    if let Some(v282) = v281 {
+                        let v283 = C::not_vec32x2(ctx, v282);
+                        if let Some(v284) = v283 {
+                            let v241 = C::put_in_reg(ctx, v231);
+                            let v286 = &constructor_vector_size(ctx, v282);
+                            let v287 = constructor_vec_lanes(ctx, &VecLanesOp::Uminv, v241, v286);
+                            let v288 =
+                                constructor_mov_from_vec(ctx, v287, 0x0, &ScalarSize::Size64);
+                            let v289 = C::u8_into_imm12(ctx, 0x0);
+                            let v290 = &constructor_cmp_imm(ctx, &OperandSize::Size64, v288, v289);
+                            let v291 = &constructor_materialize_bool_result(ctx, &Cond::Ne);
+                            let v292 = constructor_with_flags(ctx, v290, v291);
+                            let v293 = C::output(ctx, v292);
+                            // Rule at src/isa/aarch64/lower.isle line 306.
+                            return Some(v293);
+                        }
+                    }
+                }
+                &Opcode::VhighBits => {
+                    let v232 = C::value_type(ctx, v231);
+                    match v232 {
+                        I8X16 => {
+                            let v241 = C::put_in_reg(ctx, v231);
+                            let v1677 =
+                                constructor_sshr_vec_imm(ctx, v241, 0x7, &VectorSize::Size8x16);
+                            let v1679 =
+                                constructor_constant_f128(ctx, 0x80402010080402018040201008040201);
+                            let v1680 =
+                                constructor_and_vec(ctx, v1677, v1679, &VectorSize::Size8x16);
+                            let v1682 = constructor_vec_extract(ctx, v1680, v1680, 0x8);
+                            let v1683 = constructor_zip1(ctx, v1680, v1682, &VectorSize::Size8x16);
+                            let v1684 = constructor_addv(ctx, v1683, &VectorSize::Size16x8);
+                            let v1685 =
+                                constructor_mov_from_vec(ctx, v1684, 0x0, &ScalarSize::Size16);
+                            let v1686 = constructor_output_reg(ctx, v1685);
+                            // Rule at src/isa/aarch64/lower.isle line 2523.
+                            return Some(v1686);
+                        }
+                        I16X8 => {
+                            let v241 = C::put_in_reg(ctx, v231);
+                            let v1688 =
+                                constructor_sshr_vec_imm(ctx, v241, 0xF, &VectorSize::Size16x8);
+                            let v1690 =
+                                constructor_constant_f128(ctx, 0x800040002000100008000400020001);
+                            let v1691 =
+                                constructor_and_vec(ctx, v1688, v1690, &VectorSize::Size16x8);
+                            let v1692 = constructor_addv(ctx, v1691, &VectorSize::Size16x8);
+                            let v1693 =
+                                constructor_mov_from_vec(ctx, v1692, 0x0, &ScalarSize::Size16);
+                            let v1694 = constructor_output_reg(ctx, v1693);
+                            // Rule at src/isa/aarch64/lower.isle line 2547.
+                            return Some(v1694);
+                        }
+                        I32X4 => {
+                            let v241 = C::put_in_reg(ctx, v231);
+                            let v1696 =
+                                constructor_sshr_vec_imm(ctx, v241, 0x1F, &VectorSize::Size32x4);
+                            let v1698 = constructor_constant_f128(ctx, 0x8000000040000000200000001);
+                            let v1699 =
+                                constructor_and_vec(ctx, v1696, v1698, &VectorSize::Size32x4);
+                            let v1700 = constructor_addv(ctx, v1699, &VectorSize::Size32x4);
+                            let v1701 =
+                                constructor_mov_from_vec(ctx, v1700, 0x0, &ScalarSize::Size32);
+                            let v1702 = constructor_output_reg(ctx, v1701);
+                            // Rule at src/isa/aarch64/lower.isle line 2560.
+                            return Some(v1702);
+                        }
+                        I64X2 => {
+                            let v241 = C::put_in_reg(ctx, v231);
+                            let v1703 =
+                                constructor_mov_from_vec(ctx, v241, 0x1, &ScalarSize::Size64);
+                            let v1704 = C::put_in_reg(ctx, v231);
+                            let v1705 =
+                                constructor_mov_from_vec(ctx, v1704, 0x0, &ScalarSize::Size64);
+                            let v770 = C::imm_shift_from_u8(ctx, 0x3F);
+                            let v1706 = constructor_lsr_imm(ctx, I64, v1703, v770);
+                            let v1021 = C::imm_shift_from_u8(ctx, 0x3F);
+                            let v1707 = constructor_lsr_imm(ctx, I64, v1705, v1021);
+                            let v1708 = C::lshl_from_u64(ctx, I64, 0x1);
+                            let v1709 = v1708?;
+                            let v1710 = constructor_add_shift(ctx, I64, v1707, v1706, v1709);
+                            let v1711 = constructor_output_reg(ctx, v1710);
+                            // Rule at src/isa/aarch64/lower.isle line 2573.
+                            return Some(v1711);
+                        }
+                        _ => {}
+                    }
+                }
+                &Opcode::Ineg => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        if v3 == I128 {
+                            let v590 = constructor_value_regs_zero(ctx);
+                            let v591 = C::put_in_regs(ctx, v231);
+                            let v592 = constructor_sub_i128(ctx, v590, v591);
+                            let v593 = C::output(ctx, v592);
+                            // Rule at src/isa/aarch64/lower.isle line 751.
+                            return Some(v593);
+                        }
+                        let v27 = C::fits_in_64(ctx, v3);
+                        if let Some(v28) = v27 {
+                            let v586 = C::zero_reg(ctx);
+                            let v587 = C::put_in_reg(ctx, v231);
+                            let v588 = constructor_sub(ctx, v28, v586, v587);
+                            let v589 = constructor_output_reg(ctx, v588);
+                            // Rule at src/isa/aarch64/lower.isle line 747.
+                            return Some(v589);
+                        }
+                        let v575 = C::ty_vec128(ctx, v3);
+                        if let Some(v576) = v575 {
+                            let v241 = C::put_in_reg(ctx, v231);
+                            let v594 = &constructor_vector_size(ctx, v576);
+                            let v595 = constructor_neg(ctx, v241, v594);
+                            let v596 = constructor_output_reg(ctx, v595);
+                            // Rule at src/isa/aarch64/lower.isle line 755.
+                            return Some(v596);
+                        }
+                    }
+                }
+                &Opcode::Iabs => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        if v3 == I64 {
+                            let v241 = C::put_in_reg(ctx, v231);
+                            let v316 = constructor_abs(ctx, &OperandSize::Size64, v241);
+                            let v317 = constructor_output_reg(ctx, v316);
+                            // Rule at src/isa/aarch64/lower.isle line 345.
+                            return Some(v317);
+                        }
+                        let v318 = C::fits_in_32(ctx, v3);
+                        if let Some(v319) = v318 {
+                            let v320 = constructor_put_in_reg_sext32(ctx, v231);
+                            let v321 = constructor_abs(ctx, &OperandSize::Size32, v320);
+                            let v322 = constructor_output_reg(ctx, v321);
+                            // Rule at src/isa/aarch64/lower.isle line 348.
+                            return Some(v322);
+                        }
+                        let v117 = C::multi_lane(ctx, v3);
+                        if let Some(v118) = v117 {
+                            let v241 = C::put_in_reg(ctx, v231);
+                            let v313 = &constructor_vector_size(ctx, v3);
+                            let v314 = constructor_vec_abs(ctx, v241, v313);
+                            let v315 = constructor_output_reg(ctx, v314);
+                            // Rule at src/isa/aarch64/lower.isle line 342.
+                            return Some(v315);
+                        }
+                    }
+                }
+                &Opcode::Bnot => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v727 = C::def_inst(ctx, v231);
+                        if let Some(v728) = v727 {
+                            let v729 = &C::inst_data(ctx, v728);
+                            if let &InstructionData::Binary {
+                                opcode: ref v781,
+                                args: ref v782,
+                            } = v729
+                            {
+                                match v781 {
+                                    &Opcode::Bxor => {
+                                        let v3 = C::value_type(ctx, v2);
+                                        if v3 == I128 {
+                                            let v783 = C::unpack_value_array_2(ctx, v782);
+                                            let v808 = constructor_i128_alu_bitop(
+                                                ctx,
+                                                &ALUOp::EorNot,
+                                                I64,
+                                                v783.0,
+                                                v783.1,
+                                            );
+                                            let v809 = C::output(ctx, v808);
+                                            // Rule at src/isa/aarch64/lower.isle line 1223.
+                                            return Some(v809);
+                                        }
+                                        let v27 = C::fits_in_64(ctx, v3);
+                                        if let Some(v28) = v27 {
+                                            let v783 = C::unpack_value_array_2(ctx, v782);
+                                            let v806 = constructor_alu_rs_imm_logic(
+                                                ctx,
+                                                &ALUOp::EorNot,
+                                                v28,
+                                                v783.0,
+                                                v783.1,
+                                            );
+                                            let v807 = constructor_output_reg(ctx, v806);
+                                            // Rule at src/isa/aarch64/lower.isle line 1221.
+                                            return Some(v807);
+                                        }
+                                    }
+                                    &Opcode::Ishl => {
+                                        let v3 = C::value_type(ctx, v2);
+                                        let v27 = C::fits_in_64(ctx, v3);
+                                        if let Some(v28) = v27 {
+                                            let v783 = C::unpack_value_array_2(ctx, v782);
+                                            let v786 = C::def_inst(ctx, v783.1);
+                                            if let Some(v787) = v786 {
+                                                let v788 = &C::inst_data(ctx, v787);
+                                                if let &InstructionData::UnaryImm {
+                                                    opcode: ref v789,
+                                                    imm: v790,
+                                                } = v788
+                                                {
+                                                    if let &Opcode::Iconst = v789 {
+                                                        let v791 =
+                                                            C::lshl_from_imm64(ctx, v28, v790);
+                                                        if let Some(v792) = v791 {
+                                                            let v586 = C::zero_reg(ctx);
+                                                            let v793 = C::put_in_reg(ctx, v783.0);
+                                                            let v794 = constructor_orr_not_shift(
+                                                                ctx, v28, v586, v793, v792,
+                                                            );
+                                                            let v795 =
+                                                                constructor_output_reg(ctx, v794);
+                                                            // Rule at src/isa/aarch64/lower.isle line 1202.
+                                                            return Some(v795);
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                    _ => {}
+                                }
+                            }
+                        }
+                        let v3 = C::value_type(ctx, v2);
+                        if v3 == I128 {
+                            let v233 = C::put_in_regs(ctx, v231);
+                            let v234 = C::value_regs_get(ctx, v233, 0x0);
+                            let v796 = C::value_regs_get(ctx, v233, 0x1);
+                            let v797 = C::zero_reg(ctx);
+                            let v798 = constructor_orr_not(ctx, I64, v797, v234);
+                            let v799 = C::zero_reg(ctx);
+                            let v800 = constructor_orr_not(ctx, I64, v799, v796);
+                            let v801 = C::value_regs(ctx, v798, v800);
+                            let v802 = C::output(ctx, v801);
+                            // Rule at src/isa/aarch64/lower.isle line 1208.
+                            return Some(v802);
+                        }
+                        let v27 = C::fits_in_64(ctx, v3);
+                        if let Some(v28) = v27 {
+                            let v586 = C::zero_reg(ctx);
+                            let v587 = C::put_in_reg(ctx, v231);
+                            let v779 = constructor_orr_not(ctx, v28, v586, v587);
+                            let v780 = constructor_output_reg(ctx, v779);
+                            // Rule at src/isa/aarch64/lower.isle line 1197.
+                            return Some(v780);
+                        }
+                        let v575 = C::ty_vec128(ctx, v3);
+                        if let Some(v576) = v575 {
+                            let v241 = C::put_in_reg(ctx, v231);
+                            let v594 = &constructor_vector_size(ctx, v576);
+                            let v803 = constructor_not(ctx, v241, v594);
+                            let v804 = constructor_output_reg(ctx, v803);
+                            // Rule at src/isa/aarch64/lower.isle line 1217.
+                            return Some(v804);
+                        }
+                    }
+                }
+                &Opcode::Bitrev => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            I8 => {
+                                let v241 = C::put_in_reg(ctx, v231);
+                                let v973 = constructor_rbit(ctx, I32, v241);
+                                let v975 = C::imm_shift_from_u8(ctx, 0x18);
+                                let v976 = constructor_lsr_imm(ctx, I32, v973, v975);
+                                let v977 = constructor_output_reg(ctx, v976);
+                                // Rule at src/isa/aarch64/lower.isle line 1652.
+                                return Some(v977);
+                            }
+                            I16 => {
+                                let v241 = C::put_in_reg(ctx, v231);
+                                let v973 = constructor_rbit(ctx, I32, v241);
+                                let v979 = C::imm_shift_from_u8(ctx, 0x10);
+                                let v980 = constructor_lsr_imm(ctx, I32, v973, v979);
+                                let v981 = constructor_output_reg(ctx, v980);
+                                // Rule at src/isa/aarch64/lower.isle line 1658.
+                                return Some(v981);
+                            }
+                            I128 => {
+                                let v233 = C::put_in_regs(ctx, v231);
+                                let v234 = C::value_regs_get(ctx, v233, 0x0);
+                                let v982 = constructor_rbit(ctx, I64, v234);
+                                let v236 = C::value_regs_get(ctx, v233, 0x1);
+                                let v983 = constructor_rbit(ctx, I64, v236);
+                                let v984 = C::value_regs(ctx, v983, v982);
+                                let v985 = C::output(ctx, v984);
+                                // Rule at src/isa/aarch64/lower.isle line 1661.
+                                return Some(v985);
+                            }
+                            _ => {}
+                        }
+                        let v241 = C::put_in_reg(ctx, v231);
+                        let v986 = constructor_rbit(ctx, v3, v241);
+                        let v987 = constructor_output_reg(ctx, v986);
+                        // Rule at src/isa/aarch64/lower.isle line 1667.
+                        return Some(v987);
+                    }
+                }
+                &Opcode::Clz => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            I8 => {
+                                let v252 = constructor_put_in_reg_zext32(ctx, v231);
+                                let v988 = constructor_a64_clz(ctx, I32, v252);
+                                let v989 = C::u8_into_imm12(ctx, 0x18);
+                                let v990 = constructor_sub_imm(ctx, I32, v988, v989);
+                                let v991 = constructor_output_reg(ctx, v990);
+                                // Rule at src/isa/aarch64/lower.isle line 1673.
+                                return Some(v991);
+                            }
+                            I16 => {
+                                let v252 = constructor_put_in_reg_zext32(ctx, v231);
+                                let v988 = constructor_a64_clz(ctx, I32, v252);
+                                let v992 = C::u8_into_imm12(ctx, 0x10);
+                                let v993 = constructor_sub_imm(ctx, I32, v988, v992);
+                                let v994 = constructor_output_reg(ctx, v993);
+                                // Rule at src/isa/aarch64/lower.isle line 1676.
+                                return Some(v994);
+                            }
+                            I128 => {
+                                let v233 = C::put_in_regs(ctx, v231);
+                                let v995 = constructor_lower_clz128(ctx, v233);
+                                let v996 = C::output(ctx, v995);
+                                // Rule at src/isa/aarch64/lower.isle line 1679.
+                                return Some(v996);
+                            }
+                            _ => {}
+                        }
+                        let v241 = C::put_in_reg(ctx, v231);
+                        let v997 = constructor_a64_clz(ctx, v3, v241);
+                        let v998 = constructor_output_reg(ctx, v997);
+                        // Rule at src/isa/aarch64/lower.isle line 1682.
+                        return Some(v998);
+                    }
+                }
+                &Opcode::Cls => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            I8 => {
+                                let v320 = constructor_put_in_reg_sext32(ctx, v231);
+                                let v1013 = constructor_a64_cls(ctx, I32, v320);
+                                let v989 = C::u8_into_imm12(ctx, 0x18);
+                                let v1014 = constructor_sub_imm(ctx, I32, v1013, v989);
+                                let v1015 = constructor_output_reg(ctx, v1014);
+                                // Rule at src/isa/aarch64/lower.isle line 1720.
+                                return Some(v1015);
+                            }
+                            I16 => {
+                                let v320 = constructor_put_in_reg_sext32(ctx, v231);
+                                let v1013 = constructor_a64_cls(ctx, I32, v320);
+                                let v992 = C::u8_into_imm12(ctx, 0x10);
+                                let v1016 = constructor_sub_imm(ctx, I32, v1013, v992);
+                                let v1017 = constructor_output_reg(ctx, v1016);
+                                // Rule at src/isa/aarch64/lower.isle line 1723.
+                                return Some(v1017);
+                            }
+                            I128 => {
+                                let v233 = C::put_in_regs(ctx, v231);
+                                let v234 = C::value_regs_get(ctx, v233, 0x0);
+                                let v796 = C::value_regs_get(ctx, v233, 0x1);
+                                let v1018 = constructor_a64_cls(ctx, I64, v234);
+                                let v1019 = constructor_a64_cls(ctx, I64, v796);
+                                let v1020 = constructor_eon(ctx, I64, v796, v234);
+                                let v1021 = C::imm_shift_from_u8(ctx, 0x3F);
+                                let v1022 = constructor_lsr_imm(ctx, I64, v1020, v1021);
+                                let v1023 = constructor_madd(ctx, I64, v1018, v1022, v1022);
+                                let v1024 = C::u8_into_imm12(ctx, 0x3F);
+                                let v1025 = &constructor_cmp64_imm(ctx, v1019, v1024);
+                                let v1026 = C::zero_reg(ctx);
+                                let v1027 = &constructor_csel(ctx, &Cond::Eq, v1023, v1026);
+                                let v1028 = constructor_with_flags_reg(ctx, v1025, v1027);
+                                let v1029 = constructor_add(ctx, I64, v1028, v1019);
+                                let v1030 = constructor_imm(ctx, I64, &ImmExtend::Zero, 0x0);
+                                let v1031 = C::value_regs(ctx, v1029, v1030);
+                                let v1032 = C::output(ctx, v1031);
+                                // Rule at src/isa/aarch64/lower.isle line 1735.
+                                return Some(v1032);
+                            }
+                            _ => {}
+                        }
+                        let v241 = C::put_in_reg(ctx, v231);
+                        let v1033 = constructor_a64_cls(ctx, v3, v241);
+                        let v1034 = constructor_output_reg(ctx, v1033);
+                        // Rule at src/isa/aarch64/lower.isle line 1749.
+                        return Some(v1034);
+                    }
+                }
+                &Opcode::Ctz => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            I8 => {
+                                let v241 = C::put_in_reg(ctx, v231);
+                                let v973 = constructor_rbit(ctx, I32, v241);
+                                let v1000 = C::u64_into_imm_logic(ctx, I32, 0x800000);
+                                let v1001 = constructor_orr_imm(ctx, I32, v973, v1000);
+                                let v1002 = constructor_a64_clz(ctx, I32, v1001);
+                                let v1003 = constructor_output_reg(ctx, v1002);
+                                // Rule at src/isa/aarch64/lower.isle line 1703.
+                                return Some(v1003);
+                            }
+                            I16 => {
+                                let v241 = C::put_in_reg(ctx, v231);
+                                let v973 = constructor_rbit(ctx, I32, v241);
+                                let v1005 = C::u64_into_imm_logic(ctx, I32, 0x8000);
+                                let v1006 = constructor_orr_imm(ctx, I32, v973, v1005);
+                                let v1007 = constructor_a64_clz(ctx, I32, v1006);
+                                let v1008 = constructor_output_reg(ctx, v1007);
+                                // Rule at src/isa/aarch64/lower.isle line 1706.
+                                return Some(v1008);
+                            }
+                            I128 => {
+                                let v233 = C::put_in_regs(ctx, v231);
+                                let v234 = C::value_regs_get(ctx, v233, 0x0);
+                                let v982 = constructor_rbit(ctx, I64, v234);
+                                let v236 = C::value_regs_get(ctx, v233, 0x1);
+                                let v983 = constructor_rbit(ctx, I64, v236);
+                                let v984 = C::value_regs(ctx, v983, v982);
+                                let v1009 = constructor_lower_clz128(ctx, v984);
+                                let v1010 = C::output(ctx, v1009);
+                                // Rule at src/isa/aarch64/lower.isle line 1709.
+                                return Some(v1010);
+                            }
+                            _ => {}
+                        }
+                        let v241 = C::put_in_reg(ctx, v231);
+                        let v986 = constructor_rbit(ctx, v3, v241);
+                        let v1011 = constructor_a64_clz(ctx, v3, v986);
+                        let v1012 = constructor_output_reg(ctx, v1011);
+                        // Rule at src/isa/aarch64/lower.isle line 1715.
+                        return Some(v1012);
+                    }
+                }
+                &Opcode::Bswap => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            I16 => {
+                                let v241 = C::put_in_reg(ctx, v231);
+                                let v1036 = constructor_a64_rev16(ctx, I16, v241);
+                                let v1037 = constructor_output_reg(ctx, v1036);
+                                // Rule at src/isa/aarch64/lower.isle line 1754.
+                                return Some(v1037);
+                            }
+                            I32 => {
+                                let v241 = C::put_in_reg(ctx, v231);
+                                let v1038 = constructor_a64_rev32(ctx, I32, v241);
+                                let v1039 = constructor_output_reg(ctx, v1038);
+                                // Rule at src/isa/aarch64/lower.isle line 1757.
+                                return Some(v1039);
+                            }
+                            I64 => {
+                                let v241 = C::put_in_reg(ctx, v231);
+                                let v1040 = constructor_a64_rev64(ctx, I64, v241);
+                                let v1041 = constructor_output_reg(ctx, v1040);
+                                // Rule at src/isa/aarch64/lower.isle line 1760.
+                                return Some(v1041);
+                            }
+                            I128 => {
+                                let v233 = C::put_in_regs(ctx, v231);
+                                let v1042 = C::value_regs_get(ctx, v233, 0x1);
+                                let v1043 = constructor_a64_rev64(ctx, I64, v1042);
+                                let v1044 = C::put_in_regs(ctx, v231);
+                                let v1045 = C::value_regs_get(ctx, v1044, 0x0);
+                                let v1046 = constructor_a64_rev64(ctx, I64, v1045);
+                                let v1047 = C::value_regs(ctx, v1043, v1046);
+                                let v1048 = C::output(ctx, v1047);
+                                // Rule at src/isa/aarch64/lower.isle line 1763.
+                                return Some(v1048);
+                            }
+                            _ => {}
+                        }
+                    }
+                }
+                &Opcode::Popcnt => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            I8 => {
+                                let v241 = C::put_in_reg(ctx, v231);
+                                let v1051 = constructor_mov_to_fpu(ctx, v241, &ScalarSize::Size32);
+                                let v1053 = constructor_vec_cnt(ctx, v1051, &VectorSize::Size8x8);
+                                let v1055 =
+                                    constructor_mov_from_vec(ctx, v1053, 0x0, &ScalarSize::Size8);
+                                let v1056 = constructor_output_reg(ctx, v1055);
+                                // Rule at src/isa/aarch64/lower.isle line 1793.
+                                return Some(v1056);
+                            }
+                            I16 => {
+                                let v241 = C::put_in_reg(ctx, v231);
+                                let v1051 = constructor_mov_to_fpu(ctx, v241, &ScalarSize::Size32);
+                                let v1053 = constructor_vec_cnt(ctx, v1051, &VectorSize::Size8x8);
+                                let v1057 =
+                                    constructor_addp(ctx, v1053, v1053, &VectorSize::Size8x8);
+                                let v1058 =
+                                    constructor_mov_from_vec(ctx, v1057, 0x0, &ScalarSize::Size8);
+                                let v1059 = constructor_output_reg(ctx, v1058);
+                                // Rule at src/isa/aarch64/lower.isle line 1799.
+                                return Some(v1059);
+                            }
+                            I32 => {
+                                let v241 = C::put_in_reg(ctx, v231);
+                                let v1051 = constructor_mov_to_fpu(ctx, v241, &ScalarSize::Size32);
+                                let v1053 = constructor_vec_cnt(ctx, v1051, &VectorSize::Size8x8);
+                                let v1060 = constructor_addv(ctx, v1053, &VectorSize::Size8x8);
+                                let v1061 =
+                                    constructor_mov_from_vec(ctx, v1060, 0x0, &ScalarSize::Size8);
+                                let v1062 = constructor_output_reg(ctx, v1061);
+                                // Rule at src/isa/aarch64/lower.isle line 1805.
+                                return Some(v1062);
+                            }
+                            I64 => {
+                                let v241 = C::put_in_reg(ctx, v231);
+                                let v248 = constructor_mov_to_fpu(ctx, v241, &ScalarSize::Size64);
+                                let v1063 = constructor_vec_cnt(ctx, v248, &VectorSize::Size8x8);
+                                let v1064 = constructor_addv(ctx, v1063, &VectorSize::Size8x8);
+                                let v1065 =
+                                    constructor_mov_from_vec(ctx, v1064, 0x0, &ScalarSize::Size8);
+                                let v1066 = constructor_output_reg(ctx, v1065);
+                                // Rule at src/isa/aarch64/lower.isle line 1811.
+                                return Some(v1066);
+                            }
+                            I128 => {
+                                let v233 = C::put_in_regs(ctx, v231);
+                                let v234 = C::value_regs_get(ctx, v233, 0x0);
+                                let v1067 = constructor_mov_to_fpu(ctx, v234, &ScalarSize::Size64);
+                                let v236 = C::value_regs_get(ctx, v233, 0x1);
+                                let v1068 = constructor_mov_to_vec(
+                                    ctx,
+                                    v1067,
+                                    v236,
+                                    0x1,
+                                    &VectorSize::Size64x2,
+                                );
+                                let v1069 = constructor_vec_cnt(ctx, v1068, &VectorSize::Size8x16);
+                                let v1070 = constructor_addv(ctx, v1069, &VectorSize::Size8x16);
+                                let v1071 =
+                                    constructor_mov_from_vec(ctx, v1070, 0x0, &ScalarSize::Size8);
+                                let v1072 = constructor_imm(ctx, I64, &ImmExtend::Zero, 0x0);
+                                let v1073 = C::value_regs(ctx, v1071, v1072);
+                                let v1074 = C::output(ctx, v1073);
+                                // Rule at src/isa/aarch64/lower.isle line 1817.
+                                return Some(v1074);
+                            }
+                            I8X16 => {
+                                let v241 = C::put_in_reg(ctx, v231);
+                                let v1075 = constructor_vec_cnt(ctx, v241, &VectorSize::Size8x16);
+                                let v1076 = constructor_output_reg(ctx, v1075);
+                                // Rule at src/isa/aarch64/lower.isle line 1825.
+                                return Some(v1076);
+                            }
+                            _ => {}
+                        }
+                    }
+                }
+                &Opcode::Sqrt => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v348 = C::ty_scalar_float(ctx, v3);
+                        if let Some(v349) = v348 {
+                            let v241 = C::put_in_reg(ctx, v231);
+                            let v405 = &constructor_scalar_size(ctx, v349);
+                            let v406 = constructor_fpu_rr(ctx, &FPUOp1::Sqrt, v241, v405);
+                            let v407 = constructor_output_reg(ctx, v406);
+                            // Rule at src/isa/aarch64/lower.isle line 441.
+                            return Some(v407);
+                        }
+                        let v117 = C::multi_lane(ctx, v3);
+                        if let Some(v118) = v117 {
+                            let v241 = C::put_in_reg(ctx, v231);
+                            let v313 = &constructor_vector_size(ctx, v3);
+                            let v402 = constructor_vec_misc(ctx, &VecMisc2::Fsqrt, v241, v313);
+                            let v403 = constructor_output_reg(ctx, v402);
+                            // Rule at src/isa/aarch64/lower.isle line 438.
+                            return Some(v403);
+                        }
+                    }
+                }
+                &Opcode::Fneg => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v348 = C::ty_scalar_float(ctx, v3);
+                        if let Some(v349) = v348 {
+                            let v241 = C::put_in_reg(ctx, v231);
+                            let v405 = &constructor_scalar_size(ctx, v349);
+                            let v412 = constructor_fpu_rr(ctx, &FPUOp1::Neg, v241, v405);
+                            let v413 = constructor_output_reg(ctx, v412);
+                            // Rule at src/isa/aarch64/lower.isle line 449.
+                            return Some(v413);
+                        }
+                        let v117 = C::multi_lane(ctx, v3);
+                        if let Some(v118) = v117 {
+                            let v241 = C::put_in_reg(ctx, v231);
+                            let v313 = &constructor_vector_size(ctx, v3);
+                            let v409 = constructor_vec_misc(ctx, &VecMisc2::Fneg, v241, v313);
+                            let v410 = constructor_output_reg(ctx, v409);
+                            // Rule at src/isa/aarch64/lower.isle line 446.
+                            return Some(v410);
+                        }
+                    }
+                }
+                &Opcode::Fabs => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v348 = C::ty_scalar_float(ctx, v3);
+                        if let Some(v349) = v348 {
+                            let v241 = C::put_in_reg(ctx, v231);
+                            let v405 = &constructor_scalar_size(ctx, v349);
+                            let v418 = constructor_fpu_rr(ctx, &FPUOp1::Abs, v241, v405);
+                            let v419 = constructor_output_reg(ctx, v418);
+                            // Rule at src/isa/aarch64/lower.isle line 457.
+                            return Some(v419);
+                        }
+                        let v117 = C::multi_lane(ctx, v3);
+                        if let Some(v118) = v117 {
+                            let v241 = C::put_in_reg(ctx, v231);
+                            let v313 = &constructor_vector_size(ctx, v3);
+                            let v415 = constructor_vec_misc(ctx, &VecMisc2::Fabs, v241, v313);
+                            let v416 = constructor_output_reg(ctx, v415);
+                            // Rule at src/isa/aarch64/lower.isle line 454.
+                            return Some(v416);
+                        }
+                    }
+                }
+                &Opcode::Ceil => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            F32 => {
+                                let v241 = C::put_in_reg(ctx, v231);
+                                let v430 = constructor_fpu_round(ctx, &FpuRoundMode::Plus32, v241);
+                                let v431 = constructor_output_reg(ctx, v430);
+                                // Rule at src/isa/aarch64/lower.isle line 475.
+                                return Some(v431);
+                            }
+                            F64 => {
+                                let v241 = C::put_in_reg(ctx, v231);
+                                let v433 = constructor_fpu_round(ctx, &FpuRoundMode::Plus64, v241);
+                                let v434 = constructor_output_reg(ctx, v433);
+                                // Rule at src/isa/aarch64/lower.isle line 478.
+                                return Some(v434);
+                            }
+                            _ => {}
+                        }
+                        let v117 = C::multi_lane(ctx, v3);
+                        if let Some(v118) = v117 {
+                            let v241 = C::put_in_reg(ctx, v231);
+                            let v313 = &constructor_vector_size(ctx, v3);
+                            let v427 = constructor_vec_misc(ctx, &VecMisc2::Frintp, v241, v313);
+                            let v428 = constructor_output_reg(ctx, v427);
+                            // Rule at src/isa/aarch64/lower.isle line 472.
+                            return Some(v428);
+                        }
+                    }
+                }
+                &Opcode::Floor => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            F32 => {
+                                let v241 = C::put_in_reg(ctx, v231);
+                                let v439 = constructor_fpu_round(ctx, &FpuRoundMode::Minus32, v241);
+                                let v440 = constructor_output_reg(ctx, v439);
+                                // Rule at src/isa/aarch64/lower.isle line 486.
+                                return Some(v440);
+                            }
+                            F64 => {
+                                let v241 = C::put_in_reg(ctx, v231);
+                                let v442 = constructor_fpu_round(ctx, &FpuRoundMode::Minus64, v241);
+                                let v443 = constructor_output_reg(ctx, v442);
+                                // Rule at src/isa/aarch64/lower.isle line 489.
+                                return Some(v443);
+                            }
+                            _ => {}
+                        }
+                        let v117 = C::multi_lane(ctx, v3);
+                        if let Some(v118) = v117 {
+                            let v241 = C::put_in_reg(ctx, v231);
+                            let v313 = &constructor_vector_size(ctx, v3);
+                            let v436 = constructor_vec_misc(ctx, &VecMisc2::Frintm, v241, v313);
+                            let v437 = constructor_output_reg(ctx, v436);
+                            // Rule at src/isa/aarch64/lower.isle line 483.
+                            return Some(v437);
+                        }
+                    }
+                }
+                &Opcode::Trunc => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            F32 => {
+                                let v241 = C::put_in_reg(ctx, v231);
+                                let v448 = constructor_fpu_round(ctx, &FpuRoundMode::Zero32, v241);
+                                let v449 = constructor_output_reg(ctx, v448);
+                                // Rule at src/isa/aarch64/lower.isle line 497.
+                                return Some(v449);
+                            }
+                            F64 => {
+                                let v241 = C::put_in_reg(ctx, v231);
+                                let v451 = constructor_fpu_round(ctx, &FpuRoundMode::Zero64, v241);
+                                let v452 = constructor_output_reg(ctx, v451);
+                                // Rule at src/isa/aarch64/lower.isle line 500.
+                                return Some(v452);
+                            }
+                            _ => {}
+                        }
+                        let v117 = C::multi_lane(ctx, v3);
+                        if let Some(v118) = v117 {
+                            let v241 = C::put_in_reg(ctx, v231);
+                            let v313 = &constructor_vector_size(ctx, v3);
+                            let v445 = constructor_vec_misc(ctx, &VecMisc2::Frintz, v241, v313);
+                            let v446 = constructor_output_reg(ctx, v445);
+                            // Rule at src/isa/aarch64/lower.isle line 494.
+                            return Some(v446);
+                        }
+                    }
+                }
+                &Opcode::Nearest => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            F32 => {
+                                let v241 = C::put_in_reg(ctx, v231);
+                                let v457 =
+                                    constructor_fpu_round(ctx, &FpuRoundMode::Nearest32, v241);
+                                let v458 = constructor_output_reg(ctx, v457);
+                                // Rule at src/isa/aarch64/lower.isle line 508.
+                                return Some(v458);
+                            }
+                            F64 => {
+                                let v241 = C::put_in_reg(ctx, v231);
+                                let v460 =
+                                    constructor_fpu_round(ctx, &FpuRoundMode::Nearest64, v241);
+                                let v461 = constructor_output_reg(ctx, v460);
+                                // Rule at src/isa/aarch64/lower.isle line 511.
+                                return Some(v461);
+                            }
+                            _ => {}
+                        }
+                        let v117 = C::multi_lane(ctx, v3);
+                        if let Some(v118) = v117 {
+                            let v241 = C::put_in_reg(ctx, v231);
+                            let v313 = &constructor_vector_size(ctx, v3);
+                            let v454 = constructor_vec_misc(ctx, &VecMisc2::Frintn, v241, v313);
+                            let v455 = constructor_output_reg(ctx, v454);
+                            // Rule at src/isa/aarch64/lower.isle line 505.
+                            return Some(v455);
+                        }
+                    }
+                }
+                &Opcode::IsNull => {
+                    let v232 = C::value_type(ctx, v231);
+                    let v1451 = &constructor_operand_size(ctx, v232);
+                    let v587 = C::put_in_reg(ctx, v231);
+                    let v1452 = C::u8_into_imm12(ctx, 0x0);
+                    let v1453 = &constructor_cmp_imm(ctx, v1451, v587, v1452);
+                    let v263 = &constructor_materialize_bool_result(ctx, &Cond::Eq);
+                    let v1454 = constructor_with_flags(ctx, v1453, v263);
+                    let v1455 = C::output(ctx, v1454);
+                    // Rule at src/isa/aarch64/lower.isle line 2221.
+                    return Some(v1455);
+                }
+                &Opcode::IsInvalid => {
+                    let v232 = C::value_type(ctx, v231);
+                    let v1451 = &constructor_operand_size(ctx, v232);
+                    let v587 = C::put_in_reg(ctx, v231);
+                    let v1456 = C::u8_into_imm12(ctx, 0x1);
+                    let v1457 = &constructor_cmn_imm(ctx, v1451, v587, v1456);
+                    let v263 = &constructor_materialize_bool_result(ctx, &Cond::Eq);
+                    let v1458 = constructor_with_flags(ctx, v1457, v263);
+                    let v1459 = C::output(ctx, v1458);
+                    // Rule at src/isa/aarch64/lower.isle line 2227.
+                    return Some(v1459);
+                }
+                &Opcode::ScalarToVector => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            F32X4 => {
+                                let v241 = C::put_in_reg(ctx, v231);
+                                let v243 = constructor_fpu_extend(ctx, v241, &ScalarSize::Size32);
+                                let v244 = constructor_output_reg(ctx, v243);
+                                // Rule at src/isa/aarch64/lower.isle line 260.
+                                return Some(v244);
+                            }
+                            F64X2 => {
+                                let v241 = C::put_in_reg(ctx, v231);
+                                let v246 = constructor_fpu_extend(ctx, v241, &ScalarSize::Size64);
+                                let v247 = constructor_output_reg(ctx, v246);
+                                // Rule at src/isa/aarch64/lower.isle line 263.
+                                return Some(v247);
+                            }
+                            _ => {}
+                        }
+                    }
+                    let v232 = C::value_type(ctx, v231);
+                    if v232 == I64 {
+                        let v241 = C::put_in_reg(ctx, v231);
+                        let v248 = constructor_mov_to_fpu(ctx, v241, &ScalarSize::Size64);
+                        let v249 = constructor_output_reg(ctx, v248);
+                        // Rule at src/isa/aarch64/lower.isle line 266.
+                        return Some(v249);
+                    }
+                    let v250 = C::int_fits_in_32(ctx, v232);
+                    if let Some(v251) = v250 {
+                        let v252 = constructor_put_in_reg_zext32(ctx, v231);
+                        let v253 = constructor_mov_to_fpu(ctx, v252, &ScalarSize::Size32);
+                        let v254 = constructor_output_reg(ctx, v253);
+                        // Rule at src/isa/aarch64/lower.isle line 269.
+                        return Some(v254);
+                    }
+                }
+                &Opcode::Bmask => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v233 = C::put_in_regs(ctx, v231);
+                        let v3 = C::value_type(ctx, v2);
+                        let v232 = C::value_type(ctx, v231);
+                        let v1049 = constructor_lower_bmask(ctx, v3, v232, v233);
+                        let v1050 = C::output(ctx, v1049);
+                        // Rule at src/isa/aarch64/lower.isle line 1771.
+                        return Some(v1050);
+                    }
+                }
+                &Opcode::Ireduce => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v1077 = C::ty_int_ref_scalar_64(ctx, v3);
+                        if let Some(v1078) = v1077 {
+                            let v233 = C::put_in_regs(ctx, v231);
+                            let v234 = C::value_regs_get(ctx, v233, 0x0);
+                            let v1090 = constructor_output_reg(ctx, v234);
+                            // Rule at src/isa/aarch64/lower.isle line 1844.
+                            return Some(v1090);
+                        }
+                    }
+                }
+                &Opcode::SwidenLow => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v241 = C::put_in_reg(ctx, v231);
+                        let v3 = C::value_type(ctx, v2);
+                        let v1431 = &constructor_lane_size(ctx, v3);
+                        let v1432 =
+                            constructor_vec_extend(ctx, &VecExtendOp::Sxtl, v241, false, v1431);
+                        let v1433 = constructor_output_reg(ctx, v1432);
+                        // Rule at src/isa/aarch64/lower.isle line 2186.
+                        return Some(v1433);
+                    }
+                }
+                &Opcode::SwidenHigh => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v575 = C::ty_vec128(ctx, v3);
+                        if let Some(v576) = v575 {
+                            let v241 = C::put_in_reg(ctx, v231);
+                            let v1434 = &constructor_lane_size(ctx, v576);
+                            let v1435 =
+                                constructor_vec_extend(ctx, &VecExtendOp::Sxtl, v241, true, v1434);
+                            let v1436 = constructor_output_reg(ctx, v1435);
+                            // Rule at src/isa/aarch64/lower.isle line 2191.
+                            return Some(v1436);
+                        }
+                        let v1245 = C::ty_vec64_ctor(ctx, v3);
+                        if let Some(v1246) = v1245 {
+                            let v241 = C::put_in_reg(ctx, v231);
+                            let v1438 = constructor_fpu_move_from_vec(
+                                ctx,
+                                v241,
+                                0x1,
+                                &VectorSize::Size32x2,
+                            );
+                            let v1439 = &constructor_lane_size(ctx, v3);
+                            let v1440 = constructor_vec_extend(
+                                ctx,
+                                &VecExtendOp::Sxtl,
+                                v1438,
+                                false,
+                                v1439,
+                            );
+                            let v1441 = constructor_output_reg(ctx, v1440);
+                            // Rule at src/isa/aarch64/lower.isle line 2194.
+                            return Some(v1441);
+                        }
+                        let v241 = C::put_in_reg(ctx, v231);
+                        let v1431 = &constructor_lane_size(ctx, v3);
+                        let v1874 =
+                            constructor_vec_extend(ctx, &VecExtendOp::Sxtl, v241, true, v1431);
+                        let v1875 = constructor_output_reg(ctx, v1874);
+                        // Rule at src/isa/aarch64/lower_dynamic_neon.isle line 104.
+                        return Some(v1875);
+                    }
+                }
+                &Opcode::UwidenLow => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v241 = C::put_in_reg(ctx, v231);
+                        let v3 = C::value_type(ctx, v2);
+                        let v1431 = &constructor_lane_size(ctx, v3);
+                        let v1443 =
+                            constructor_vec_extend(ctx, &VecExtendOp::Uxtl, v241, false, v1431);
+                        let v1444 = constructor_output_reg(ctx, v1443);
+                        // Rule at src/isa/aarch64/lower.isle line 2201.
+                        return Some(v1444);
+                    }
+                }
+                &Opcode::UwidenHigh => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v575 = C::ty_vec128(ctx, v3);
+                        if let Some(v576) = v575 {
+                            let v241 = C::put_in_reg(ctx, v231);
+                            let v1434 = &constructor_lane_size(ctx, v576);
+                            let v1445 =
+                                constructor_vec_extend(ctx, &VecExtendOp::Uxtl, v241, true, v1434);
+                            let v1446 = constructor_output_reg(ctx, v1445);
+                            // Rule at src/isa/aarch64/lower.isle line 2206.
+                            return Some(v1446);
+                        }
+                        let v1245 = C::ty_vec64_ctor(ctx, v3);
+                        if let Some(v1246) = v1245 {
+                            let v241 = C::put_in_reg(ctx, v231);
+                            let v1438 = constructor_fpu_move_from_vec(
+                                ctx,
+                                v241,
+                                0x1,
+                                &VectorSize::Size32x2,
+                            );
+                            let v1439 = &constructor_lane_size(ctx, v3);
+                            let v1447 = constructor_vec_extend(
+                                ctx,
+                                &VecExtendOp::Uxtl,
+                                v1438,
+                                false,
+                                v1439,
+                            );
+                            let v1448 = constructor_output_reg(ctx, v1447);
+                            // Rule at src/isa/aarch64/lower.isle line 2209.
+                            return Some(v1448);
+                        }
+                        let v241 = C::put_in_reg(ctx, v231);
+                        let v1431 = &constructor_lane_size(ctx, v3);
+                        let v1876 =
+                            constructor_vec_extend(ctx, &VecExtendOp::Uxtl, v241, true, v1431);
+                        let v1877 = constructor_output_reg(ctx, v1876);
+                        // Rule at src/isa/aarch64/lower_dynamic_neon.isle line 109.
+                        return Some(v1877);
+                    }
+                }
+                &Opcode::Uextend => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v727 = C::def_inst(ctx, v231);
+                        if let Some(v728) = v727 {
+                            let v729 = &C::inst_data(ctx, v728);
+                            match v729 {
+                                &InstructionData::BinaryImm8 {
+                                    opcode: ref v730,
+                                    arg: v731,
+                                    imm: v732,
+                                } => {
+                                    if let &Opcode::Extractlane = v730 {
+                                        let v3 = C::value_type(ctx, v2);
+                                        let v27 = C::fits_in_64(ctx, v3);
+                                        if let Some(v28) = v27 {
+                                            let v735 = C::put_in_reg(ctx, v731);
+                                            let v733 = C::value_type(ctx, v731);
+                                            let v736 = &constructor_lane_size(ctx, v733);
+                                            let v734 = C::u8_from_uimm8(ctx, v732);
+                                            let v737 =
+                                                constructor_mov_from_vec(ctx, v735, v734, v736);
+                                            let v738 = constructor_output_reg(ctx, v737);
+                                            // Rule at src/isa/aarch64/lower.isle line 1118.
+                                            return Some(v738);
+                                        }
+                                        if v3 == I128 {
+                                            let v735 = C::put_in_reg(ctx, v731);
+                                            let v733 = C::value_type(ctx, v731);
+                                            let v736 = &constructor_lane_size(ctx, v733);
+                                            let v734 = C::u8_from_uimm8(ctx, v732);
+                                            let v737 =
+                                                constructor_mov_from_vec(ctx, v735, v734, v736);
+                                            let v751 =
+                                                constructor_imm(ctx, I64, &ImmExtend::Zero, 0x0);
+                                            let v752 = C::value_regs(ctx, v737, v751);
+                                            let v753 = C::output(ctx, v752);
+                                            // Rule at src/isa/aarch64/lower.isle line 1137.
+                                            return Some(v753);
+                                        }
+                                    }
+                                }
+                                &InstructionData::LoadNoOffset {
+                                    opcode: ref v739,
+                                    arg: v740,
+                                    flags: v741,
+                                } => {
+                                    if let &Opcode::AtomicLoad = v739 {
+                                        let v3 = C::value_type(ctx, v2);
+                                        let v27 = C::fits_in_64(ctx, v3);
+                                        if let Some(v28) = v27 {
+                                            let v742 = C::is_sinkable_inst(ctx, v231);
+                                            if let Some(v743) = v742 {
+                                                let v744 = constructor_sink_atomic_load(ctx, v743);
+                                                let v232 = C::value_type(ctx, v231);
+                                                let v745 =
+                                                    constructor_load_acquire(ctx, v232, v741, v744);
+                                                let v746 = constructor_output_reg(ctx, v745);
+                                                // Rule at src/isa/aarch64/lower.isle line 1125.
+                                                return Some(v746);
+                                            }
+                                        }
+                                    }
+                                }
+                                _ => {}
+                            }
+                        }
+                        let v3 = C::value_type(ctx, v2);
+                        if v3 == I128 {
+                            let v747 = constructor_put_in_reg_zext64(ctx, v231);
+                            let v748 = constructor_imm(ctx, I64, &ImmExtend::Zero, 0x0);
+                            let v749 = C::value_regs(ctx, v747, v748);
+                            let v750 = C::output(ctx, v749);
+                            // Rule at src/isa/aarch64/lower.isle line 1132.
+                            return Some(v750);
+                        }
+                        let v27 = C::fits_in_64(ctx, v3);
+                        if let Some(v28) = v27 {
+                            let v241 = C::put_in_reg(ctx, v231);
+                            let v232 = C::value_type(ctx, v231);
+                            let v723 = C::ty_bits(ctx, v232);
+                            let v724 = C::ty_bits(ctx, v28);
+                            let v725 = constructor_extend(ctx, v241, false, v723, v724);
+                            let v726 = constructor_output_reg(ctx, v725);
+                            // Rule at src/isa/aarch64/lower.isle line 1113.
+                            return Some(v726);
+                        }
+                    }
+                }
+                &Opcode::Sextend => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        if v3 == I128 {
+                            let v727 = C::def_inst(ctx, v231);
+                            if let Some(v728) = v727 {
+                                let v729 = &C::inst_data(ctx, v728);
+                                if let &InstructionData::BinaryImm8 {
+                                    opcode: ref v730,
+                                    arg: v731,
+                                    imm: v732,
+                                } = v729
+                                {
+                                    if let &Opcode::Extractlane = v730 {
+                                        let v733 = C::value_type(ctx, v731);
+                                        let v766 = C::not_i64x2(ctx, v733);
+                                        if let Some(v767) = v766 {
+                                            let v735 = C::put_in_reg(ctx, v731);
+                                            let v756 = &constructor_vector_size(ctx, v733);
+                                            let v768 = &constructor_size_from_ty(ctx, I64);
+                                            let v734 = C::u8_from_uimm8(ctx, v732);
+                                            let v769 = constructor_mov_from_vec_signed(
+                                                ctx, v735, v734, v756, v768,
+                                            );
+                                            let v770 = C::imm_shift_from_u8(ctx, 0x3F);
+                                            let v771 = constructor_asr_imm(ctx, I64, v769, v770);
+                                            let v772 = C::value_regs(ctx, v769, v771);
+                                            let v773 = C::output(ctx, v772);
+                                            // Rule at src/isa/aarch64/lower.isle line 1170.
+                                            return Some(v773);
+                                        }
+                                        if v733 == I64X2 {
+                                            let v735 = C::put_in_reg(ctx, v731);
+                                            let v734 = C::u8_from_uimm8(ctx, v732);
+                                            let v774 = constructor_mov_from_vec(
+                                                ctx,
+                                                v735,
+                                                v734,
+                                                &ScalarSize::Size64,
+                                            );
+                                            let v775 = C::imm_shift_from_u8(ctx, 0x3F);
+                                            let v776 = constructor_asr_imm(ctx, I64, v774, v775);
+                                            let v777 = C::value_regs(ctx, v774, v776);
+                                            let v778 = C::output(ctx, v777);
+                                            // Rule at src/isa/aarch64/lower.isle line 1181.
+                                            return Some(v778);
+                                        }
+                                    }
+                                }
+                            }
+                            let v760 = constructor_put_in_reg_sext64(ctx, v231);
+                            let v762 = C::imm_shift_from_u8(ctx, 0x3F);
+                            let v763 = constructor_asr_imm(ctx, I64, v760, v762);
+                            let v764 = C::value_regs(ctx, v760, v763);
+                            let v765 = C::output(ctx, v764);
+                            // Rule at src/isa/aarch64/lower.isle line 1160.
+                            return Some(v765);
+                        }
+                        let v27 = C::fits_in_64(ctx, v3);
+                        if let Some(v28) = v27 {
+                            let v727 = C::def_inst(ctx, v231);
+                            if let Some(v728) = v727 {
+                                let v729 = &C::inst_data(ctx, v728);
+                                if let &InstructionData::BinaryImm8 {
+                                    opcode: ref v730,
+                                    arg: v731,
+                                    imm: v732,
+                                } = v729
+                                {
+                                    if let &Opcode::Extractlane = v730 {
+                                        let v735 = C::put_in_reg(ctx, v731);
+                                        let v733 = C::value_type(ctx, v731);
+                                        let v756 = &constructor_vector_size(ctx, v733);
+                                        let v757 = &constructor_size_from_ty(ctx, v28);
+                                        let v734 = C::u8_from_uimm8(ctx, v732);
+                                        let v758 = constructor_mov_from_vec_signed(
+                                            ctx, v735, v734, v756, v757,
+                                        );
+                                        let v759 = constructor_output_reg(ctx, v758);
+                                        // Rule at src/isa/aarch64/lower.isle line 1151.
+                                        return Some(v759);
+                                    }
+                                }
+                            }
+                            let v241 = C::put_in_reg(ctx, v231);
+                            let v232 = C::value_type(ctx, v231);
+                            let v723 = C::ty_bits(ctx, v232);
+                            let v724 = C::ty_bits(ctx, v28);
+                            let v754 = constructor_extend(ctx, v241, true, v723, v724);
+                            let v755 = constructor_output_reg(ctx, v754);
+                            // Rule at src/isa/aarch64/lower.isle line 1146.
+                            return Some(v755);
+                        }
+                    }
+                }
+                &Opcode::Fpromote => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        if v3 == F64 {
+                            let v241 = C::put_in_reg(ctx, v231);
+                            let v421 = constructor_fpu_rr(
+                                ctx,
+                                &FPUOp1::Cvt32To64,
+                                v241,
+                                &ScalarSize::Size32,
+                            );
+                            let v422 = constructor_output_reg(ctx, v421);
+                            // Rule at src/isa/aarch64/lower.isle line 462.
+                            return Some(v422);
+                        }
+                    }
+                }
+                &Opcode::Fdemote => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        if v3 == F32 {
+                            let v241 = C::put_in_reg(ctx, v231);
+                            let v424 = constructor_fpu_rr(
+                                ctx,
+                                &FPUOp1::Cvt64To32,
+                                v241,
+                                &ScalarSize::Size64,
+                            );
+                            let v425 = constructor_output_reg(ctx, v424);
+                            // Rule at src/isa/aarch64/lower.isle line 467.
+                            return Some(v425);
+                        }
+                    }
+                }
+                &Opcode::Fvdemote => {
+                    let v241 = C::put_in_reg(ctx, v231);
+                    let v1399 = constructor_fcvtn(ctx, v241, &ScalarSize::Size32);
+                    let v1400 = constructor_output_reg(ctx, v1399);
+                    // Rule at src/isa/aarch64/lower.isle line 2135.
+                    return Some(v1400);
+                }
+                &Opcode::FvpromoteLow => {
+                    let v241 = C::put_in_reg(ctx, v231);
+                    let v1805 = constructor_vec_rr_long(ctx, &VecRRLongOp::Fcvtl32, v241, false);
+                    let v1806 = constructor_output_reg(ctx, v1805);
+                    // Rule at src/isa/aarch64/lower.isle line 2844.
+                    return Some(v1806);
+                }
+                &Opcode::FcvtToUint => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v232 = C::value_type(ctx, v231);
+                        match v232 {
+                            F32 => {
+                                let v3 = C::value_type(ctx, v2);
+                                if v3 == I64 {
+                                    let v241 = C::put_in_reg(ctx, v231);
+                                    let v485 = constructor_fpu_to_int_cvt(
+                                        ctx,
+                                        &FpuToIntOp::F32ToU64,
+                                        v241,
+                                        false,
+                                        F32,
+                                        I64,
+                                    );
+                                    let v486 = constructor_output_reg(ctx, v485);
+                                    // Rule at src/isa/aarch64/lower.isle line 583.
+                                    return Some(v486);
+                                }
+                                let v318 = C::fits_in_32(ctx, v3);
+                                if let Some(v319) = v318 {
+                                    let v241 = C::put_in_reg(ctx, v231);
+                                    let v482 = constructor_fpu_to_int_cvt(
+                                        ctx,
+                                        &FpuToIntOp::F32ToU32,
+                                        v241,
+                                        false,
+                                        F32,
+                                        v319,
+                                    );
+                                    let v483 = constructor_output_reg(ctx, v482);
+                                    // Rule at src/isa/aarch64/lower.isle line 580.
+                                    return Some(v483);
+                                }
+                            }
+                            F64 => {
+                                let v3 = C::value_type(ctx, v2);
+                                if v3 == I64 {
+                                    let v241 = C::put_in_reg(ctx, v231);
+                                    let v492 = constructor_fpu_to_int_cvt(
+                                        ctx,
+                                        &FpuToIntOp::F64ToU64,
+                                        v241,
+                                        false,
+                                        F64,
+                                        I64,
+                                    );
+                                    let v493 = constructor_output_reg(ctx, v492);
+                                    // Rule at src/isa/aarch64/lower.isle line 589.
+                                    return Some(v493);
+                                }
+                                let v318 = C::fits_in_32(ctx, v3);
+                                if let Some(v319) = v318 {
+                                    let v241 = C::put_in_reg(ctx, v231);
+                                    let v489 = constructor_fpu_to_int_cvt(
+                                        ctx,
+                                        &FpuToIntOp::F64ToU32,
+                                        v241,
+                                        false,
+                                        F64,
+                                        v319,
+                                    );
+                                    let v490 = constructor_output_reg(ctx, v489);
+                                    // Rule at src/isa/aarch64/lower.isle line 586.
+                                    return Some(v490);
+                                }
+                            }
+                            _ => {}
+                        }
+                    }
+                }
+                &Opcode::FcvtToSint => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v232 = C::value_type(ctx, v231);
+                        match v232 {
+                            F32 => {
+                                let v3 = C::value_type(ctx, v2);
+                                if v3 == I64 {
+                                    let v241 = C::put_in_reg(ctx, v231);
+                                    let v498 = constructor_fpu_to_int_cvt(
+                                        ctx,
+                                        &FpuToIntOp::F32ToI64,
+                                        v241,
+                                        true,
+                                        F32,
+                                        I64,
+                                    );
+                                    let v499 = constructor_output_reg(ctx, v498);
+                                    // Rule at src/isa/aarch64/lower.isle line 597.
+                                    return Some(v499);
+                                }
+                                let v318 = C::fits_in_32(ctx, v3);
+                                if let Some(v319) = v318 {
+                                    let v241 = C::put_in_reg(ctx, v231);
+                                    let v495 = constructor_fpu_to_int_cvt(
+                                        ctx,
+                                        &FpuToIntOp::F32ToI32,
+                                        v241,
+                                        true,
+                                        F32,
+                                        v319,
+                                    );
+                                    let v496 = constructor_output_reg(ctx, v495);
+                                    // Rule at src/isa/aarch64/lower.isle line 594.
+                                    return Some(v496);
+                                }
+                            }
+                            F64 => {
+                                let v3 = C::value_type(ctx, v2);
+                                if v3 == I64 {
+                                    let v241 = C::put_in_reg(ctx, v231);
+                                    let v504 = constructor_fpu_to_int_cvt(
+                                        ctx,
+                                        &FpuToIntOp::F64ToI64,
+                                        v241,
+                                        true,
+                                        F64,
+                                        I64,
+                                    );
+                                    let v505 = constructor_output_reg(ctx, v504);
+                                    // Rule at src/isa/aarch64/lower.isle line 603.
+                                    return Some(v505);
+                                }
+                                let v318 = C::fits_in_32(ctx, v3);
+                                if let Some(v319) = v318 {
+                                    let v241 = C::put_in_reg(ctx, v231);
+                                    let v501 = constructor_fpu_to_int_cvt(
+                                        ctx,
+                                        &FpuToIntOp::F64ToI32,
+                                        v241,
+                                        true,
+                                        F64,
+                                        v319,
+                                    );
+                                    let v502 = constructor_output_reg(ctx, v501);
+                                    // Rule at src/isa/aarch64/lower.isle line 600.
+                                    return Some(v502);
+                                }
+                            }
+                            _ => {}
+                        }
+                    }
+                }
+                &Opcode::FcvtToUintSat => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v232 = C::value_type(ctx, v231);
+                        match v232 {
+                            F32 => {
+                                let v3 = C::value_type(ctx, v2);
+                                if v3 == I64 {
+                                    let v241 = C::put_in_reg(ctx, v231);
+                                    let v543 = constructor_fpu_to_int_cvt_sat(
+                                        ctx,
+                                        &FpuToIntOp::F32ToU64,
+                                        v241,
+                                        false,
+                                        I64,
+                                    );
+                                    let v544 = constructor_output_reg(ctx, v543);
+                                    // Rule at src/isa/aarch64/lower.isle line 657.
+                                    return Some(v544);
+                                }
+                                let v318 = C::fits_in_32(ctx, v3);
+                                if let Some(v319) = v318 {
+                                    let v241 = C::put_in_reg(ctx, v231);
+                                    let v541 = constructor_fpu_to_int_cvt_sat(
+                                        ctx,
+                                        &FpuToIntOp::F32ToU32,
+                                        v241,
+                                        false,
+                                        v319,
+                                    );
+                                    let v542 = constructor_output_reg(ctx, v541);
+                                    // Rule at src/isa/aarch64/lower.isle line 654.
+                                    return Some(v542);
+                                }
+                            }
+                            F64 => {
+                                let v3 = C::value_type(ctx, v2);
+                                if v3 == I64 {
+                                    let v241 = C::put_in_reg(ctx, v231);
+                                    let v547 = constructor_fpu_to_int_cvt_sat(
+                                        ctx,
+                                        &FpuToIntOp::F64ToU64,
+                                        v241,
+                                        false,
+                                        I64,
+                                    );
+                                    let v548 = constructor_output_reg(ctx, v547);
+                                    // Rule at src/isa/aarch64/lower.isle line 663.
+                                    return Some(v548);
+                                }
+                                let v318 = C::fits_in_32(ctx, v3);
+                                if let Some(v319) = v318 {
+                                    let v241 = C::put_in_reg(ctx, v231);
+                                    let v545 = constructor_fpu_to_int_cvt_sat(
+                                        ctx,
+                                        &FpuToIntOp::F64ToU32,
+                                        v241,
+                                        false,
+                                        v319,
+                                    );
+                                    let v546 = constructor_output_reg(ctx, v545);
+                                    // Rule at src/isa/aarch64/lower.isle line 660.
+                                    return Some(v546);
+                                }
+                            }
+                            _ => {}
+                        }
+                        let v3 = C::value_type(ctx, v2);
+                        let v117 = C::multi_lane(ctx, v3);
+                        if let Some(v118) = v117 {
+                            match v118.0 {
+                                0x20 => {
+                                    let v255 = C::multi_lane(ctx, v232);
+                                    if let Some(v256) = v255 {
+                                        if v256.0 == 0x20 {
+                                            let v241 = C::put_in_reg(ctx, v231);
+                                            let v313 = &constructor_vector_size(ctx, v3);
+                                            let v539 = constructor_vec_misc(
+                                                ctx,
+                                                &VecMisc2::Fcvtzu,
+                                                v241,
+                                                v313,
+                                            );
+                                            let v540 = constructor_output_reg(ctx, v539);
+                                            // Rule at src/isa/aarch64/lower.isle line 648.
+                                            return Some(v540);
+                                        }
+                                    }
+                                }
+                                0x40 => {
+                                    let v255 = C::multi_lane(ctx, v232);
+                                    if let Some(v256) = v255 {
+                                        if v256.0 == 0x40 {
+                                            let v241 = C::put_in_reg(ctx, v231);
+                                            let v313 = &constructor_vector_size(ctx, v3);
+                                            let v539 = constructor_vec_misc(
+                                                ctx,
+                                                &VecMisc2::Fcvtzu,
+                                                v241,
+                                                v313,
+                                            );
+                                            let v540 = constructor_output_reg(ctx, v539);
+                                            // Rule at src/isa/aarch64/lower.isle line 651.
+                                            return Some(v540);
+                                        }
+                                    }
+                                }
+                                _ => {}
+                            }
+                        }
+                    }
+                }
+                &Opcode::FcvtToSintSat => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v232 = C::value_type(ctx, v231);
+                        match v232 {
+                            F32 => {
+                                let v3 = C::value_type(ctx, v2);
+                                if v3 == I64 {
+                                    let v241 = C::put_in_reg(ctx, v231);
+                                    let v554 = constructor_fpu_to_int_cvt_sat(
+                                        ctx,
+                                        &FpuToIntOp::F32ToI64,
+                                        v241,
+                                        true,
+                                        I64,
+                                    );
+                                    let v555 = constructor_output_reg(ctx, v554);
+                                    // Rule at src/isa/aarch64/lower.isle line 677.
+                                    return Some(v555);
+                                }
+                                let v318 = C::fits_in_32(ctx, v3);
+                                if let Some(v319) = v318 {
+                                    let v241 = C::put_in_reg(ctx, v231);
+                                    let v552 = constructor_fpu_to_int_cvt_sat(
+                                        ctx,
+                                        &FpuToIntOp::F32ToI32,
+                                        v241,
+                                        true,
+                                        v319,
+                                    );
+                                    let v553 = constructor_output_reg(ctx, v552);
+                                    // Rule at src/isa/aarch64/lower.isle line 674.
+                                    return Some(v553);
+                                }
+                            }
+                            F64 => {
+                                let v3 = C::value_type(ctx, v2);
+                                if v3 == I64 {
+                                    let v241 = C::put_in_reg(ctx, v231);
+                                    let v558 = constructor_fpu_to_int_cvt_sat(
+                                        ctx,
+                                        &FpuToIntOp::F64ToI64,
+                                        v241,
+                                        true,
+                                        I64,
+                                    );
+                                    let v559 = constructor_output_reg(ctx, v558);
+                                    // Rule at src/isa/aarch64/lower.isle line 683.
+                                    return Some(v559);
+                                }
+                                let v318 = C::fits_in_32(ctx, v3);
+                                if let Some(v319) = v318 {
+                                    let v241 = C::put_in_reg(ctx, v231);
+                                    let v556 = constructor_fpu_to_int_cvt_sat(
+                                        ctx,
+                                        &FpuToIntOp::F64ToI32,
+                                        v241,
+                                        true,
+                                        v319,
+                                    );
+                                    let v557 = constructor_output_reg(ctx, v556);
+                                    // Rule at src/isa/aarch64/lower.isle line 680.
+                                    return Some(v557);
+                                }
+                            }
+                            _ => {}
+                        }
+                        let v3 = C::value_type(ctx, v2);
+                        let v117 = C::multi_lane(ctx, v3);
+                        if let Some(v118) = v117 {
+                            match v118.0 {
+                                0x20 => {
+                                    let v255 = C::multi_lane(ctx, v232);
+                                    if let Some(v256) = v255 {
+                                        if v256.0 == 0x20 {
+                                            let v241 = C::put_in_reg(ctx, v231);
+                                            let v313 = &constructor_vector_size(ctx, v3);
+                                            let v550 = constructor_vec_misc(
+                                                ctx,
+                                                &VecMisc2::Fcvtzs,
+                                                v241,
+                                                v313,
+                                            );
+                                            let v551 = constructor_output_reg(ctx, v550);
+                                            // Rule at src/isa/aarch64/lower.isle line 668.
+                                            return Some(v551);
+                                        }
+                                    }
+                                }
+                                0x40 => {
+                                    let v255 = C::multi_lane(ctx, v232);
+                                    if let Some(v256) = v255 {
+                                        if v256.0 == 0x40 {
+                                            let v241 = C::put_in_reg(ctx, v231);
+                                            let v313 = &constructor_vector_size(ctx, v3);
+                                            let v550 = constructor_vec_misc(
+                                                ctx,
+                                                &VecMisc2::Fcvtzs,
+                                                v241,
+                                                v313,
+                                            );
+                                            let v551 = constructor_output_reg(ctx, v550);
+                                            // Rule at src/isa/aarch64/lower.isle line 671.
+                                            return Some(v551);
+                                        }
+                                    }
+                                }
+                                _ => {}
+                            }
+                        }
+                    }
+                }
+                &Opcode::FcvtFromUint => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            F32 => {
+                                let v232 = C::value_type(ctx, v231);
+                                if v232 == I64 {
+                                    let v241 = C::put_in_reg(ctx, v231);
+                                    let v518 =
+                                        constructor_int_to_fpu(ctx, &IntToFpuOp::U64ToF32, v241);
+                                    let v519 = constructor_output_reg(ctx, v518);
+                                    // Rule at src/isa/aarch64/lower.isle line 620.
+                                    return Some(v519);
+                                }
+                                let v509 = C::fits_in_32(ctx, v232);
+                                if let Some(v510) = v509 {
+                                    let v252 = constructor_put_in_reg_zext32(ctx, v231);
+                                    let v512 =
+                                        constructor_int_to_fpu(ctx, &IntToFpuOp::U32ToF32, v252);
+                                    let v513 = constructor_output_reg(ctx, v512);
+                                    // Rule at src/isa/aarch64/lower.isle line 614.
+                                    return Some(v513);
+                                }
+                            }
+                            F64 => {
+                                let v232 = C::value_type(ctx, v231);
+                                if v232 == I64 {
+                                    let v241 = C::put_in_reg(ctx, v231);
+                                    let v521 =
+                                        constructor_int_to_fpu(ctx, &IntToFpuOp::U64ToF64, v241);
+                                    let v522 = constructor_output_reg(ctx, v521);
+                                    // Rule at src/isa/aarch64/lower.isle line 623.
+                                    return Some(v522);
+                                }
+                                let v509 = C::fits_in_32(ctx, v232);
+                                if let Some(v510) = v509 {
+                                    let v252 = constructor_put_in_reg_zext32(ctx, v231);
+                                    let v515 =
+                                        constructor_int_to_fpu(ctx, &IntToFpuOp::U32ToF64, v252);
+                                    let v516 = constructor_output_reg(ctx, v515);
+                                    // Rule at src/isa/aarch64/lower.isle line 617.
+                                    return Some(v516);
+                                }
+                            }
+                            _ => {}
+                        }
+                        let v117 = C::multi_lane(ctx, v3);
+                        if let Some(v118) = v117 {
+                            match v118.0 {
+                                0x20 => {
+                                    let v232 = C::value_type(ctx, v231);
+                                    let v255 = C::multi_lane(ctx, v232);
+                                    if let Some(v256) = v255 {
+                                        if v256.0 == 0x20 {
+                                            let v241 = C::put_in_reg(ctx, v231);
+                                            let v313 = &constructor_vector_size(ctx, v3);
+                                            let v507 = constructor_vec_misc(
+                                                ctx,
+                                                &VecMisc2::Ucvtf,
+                                                v241,
+                                                v313,
+                                            );
+                                            let v508 = constructor_output_reg(ctx, v507);
+                                            // Rule at src/isa/aarch64/lower.isle line 608.
+                                            return Some(v508);
+                                        }
+                                    }
+                                }
+                                0x40 => {
+                                    let v232 = C::value_type(ctx, v231);
+                                    let v255 = C::multi_lane(ctx, v232);
+                                    if let Some(v256) = v255 {
+                                        if v256.0 == 0x40 {
+                                            let v241 = C::put_in_reg(ctx, v231);
+                                            let v313 = &constructor_vector_size(ctx, v3);
+                                            let v507 = constructor_vec_misc(
+                                                ctx,
+                                                &VecMisc2::Ucvtf,
+                                                v241,
+                                                v313,
+                                            );
+                                            let v508 = constructor_output_reg(ctx, v507);
+                                            // Rule at src/isa/aarch64/lower.isle line 611.
+                                            return Some(v508);
+                                        }
+                                    }
+                                }
+                                _ => {}
+                            }
+                        }
+                    }
+                }
+                &Opcode::FcvtFromSint => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            F32 => {
+                                let v232 = C::value_type(ctx, v231);
+                                if v232 == I64 {
+                                    let v241 = C::put_in_reg(ctx, v231);
+                                    let v533 =
+                                        constructor_int_to_fpu(ctx, &IntToFpuOp::I64ToF32, v241);
+                                    let v534 = constructor_output_reg(ctx, v533);
+                                    // Rule at src/isa/aarch64/lower.isle line 640.
+                                    return Some(v534);
+                                }
+                                let v509 = C::fits_in_32(ctx, v232);
+                                if let Some(v510) = v509 {
+                                    let v320 = constructor_put_in_reg_sext32(ctx, v231);
+                                    let v527 =
+                                        constructor_int_to_fpu(ctx, &IntToFpuOp::I32ToF32, v320);
+                                    let v528 = constructor_output_reg(ctx, v527);
+                                    // Rule at src/isa/aarch64/lower.isle line 634.
+                                    return Some(v528);
+                                }
+                            }
+                            F64 => {
+                                let v232 = C::value_type(ctx, v231);
+                                if v232 == I64 {
+                                    let v241 = C::put_in_reg(ctx, v231);
+                                    let v536 =
+                                        constructor_int_to_fpu(ctx, &IntToFpuOp::I64ToF64, v241);
+                                    let v537 = constructor_output_reg(ctx, v536);
+                                    // Rule at src/isa/aarch64/lower.isle line 643.
+                                    return Some(v537);
+                                }
+                                let v509 = C::fits_in_32(ctx, v232);
+                                if let Some(v510) = v509 {
+                                    let v320 = constructor_put_in_reg_sext32(ctx, v231);
+                                    let v530 =
+                                        constructor_int_to_fpu(ctx, &IntToFpuOp::I32ToF64, v320);
+                                    let v531 = constructor_output_reg(ctx, v530);
+                                    // Rule at src/isa/aarch64/lower.isle line 637.
+                                    return Some(v531);
+                                }
+                            }
+                            _ => {}
+                        }
+                        let v117 = C::multi_lane(ctx, v3);
+                        if let Some(v118) = v117 {
+                            match v118.0 {
+                                0x20 => {
+                                    let v232 = C::value_type(ctx, v231);
+                                    let v255 = C::multi_lane(ctx, v232);
+                                    if let Some(v256) = v255 {
+                                        if v256.0 == 0x20 {
+                                            let v241 = C::put_in_reg(ctx, v231);
+                                            let v313 = &constructor_vector_size(ctx, v3);
+                                            let v524 = constructor_vec_misc(
+                                                ctx,
+                                                &VecMisc2::Scvtf,
+                                                v241,
+                                                v313,
+                                            );
+                                            let v525 = constructor_output_reg(ctx, v524);
+                                            // Rule at src/isa/aarch64/lower.isle line 628.
+                                            return Some(v525);
+                                        }
+                                    }
+                                }
+                                0x40 => {
+                                    let v232 = C::value_type(ctx, v231);
+                                    let v255 = C::multi_lane(ctx, v232);
+                                    if let Some(v256) = v255 {
+                                        if v256.0 == 0x40 {
+                                            let v241 = C::put_in_reg(ctx, v231);
+                                            let v313 = &constructor_vector_size(ctx, v3);
+                                            let v524 = constructor_vec_misc(
+                                                ctx,
+                                                &VecMisc2::Scvtf,
+                                                v241,
+                                                v313,
+                                            );
+                                            let v525 = constructor_output_reg(ctx, v524);
+                                            // Rule at src/isa/aarch64/lower.isle line 631.
+                                            return Some(v525);
+                                        }
+                                    }
+                                }
+                                _ => {}
+                            }
+                        }
+                    }
+                }
+                &Opcode::Isplit => {
+                    let v232 = C::value_type(ctx, v231);
+                    if v232 == I128 {
+                        let v233 = C::put_in_regs(ctx, v231);
+                        let v234 = C::value_regs_get(ctx, v233, 0x0);
+                        let v235 = C::value_reg(ctx, v234);
+                        let v236 = C::value_regs_get(ctx, v233, 0x1);
+                        let v237 = C::value_reg(ctx, v236);
+                        let v238 = C::output_pair(ctx, v235, v237);
+                        // Rule at src/isa/aarch64/lower.isle line 246.
+                        return Some(v238);
+                    }
+                }
+                _ => {}
+            }
+        }
+        &InstructionData::UnaryConst {
+            opcode: ref v1237,
+            constant_handle: v1238,
+        } => {
+            if let &Opcode::Vconst = v1237 {
+                let v1 = C::first_result(ctx, arg0);
+                if let Some(v2) = v1 {
+                    let v1243 = C::u64_from_constant(ctx, v1238);
+                    if let Some(v1244) = v1243 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v1245 = C::ty_vec64_ctor(ctx, v3);
+                        if let Some(v1246) = v1245 {
+                            let v1247 = constructor_constant_f64(ctx, v1244);
+                            let v1248 = constructor_output_reg(ctx, v1247);
+                            // Rule at src/isa/aarch64/lower.isle line 2009.
+                            return Some(v1248);
+                        }
+                    }
+                    let v3 = C::value_type(ctx, v2);
+                    let v575 = C::ty_vec128(ctx, v3);
+                    if let Some(v576) = v575 {
+                        let v1239 = C::u128_from_constant(ctx, v1238);
+                        if let Some(v1240) = v1239 {
+                            let v1241 = constructor_constant_f128(ctx, v1240);
+                            let v1242 = constructor_output_reg(ctx, v1241);
+                            // Rule at src/isa/aarch64/lower.isle line 2006.
+                            return Some(v1242);
+                        }
+                    }
+                }
+            }
+        }
+        &InstructionData::UnaryGlobalValue {
+            opcode: ref v1472,
+            global_value: v1473,
+        } => {
+            match v1472 {
+                &Opcode::SymbolValue => {
+                    let v1474 = C::symbol_value_data(ctx, v1473);
+                    if let Some(v1475) = v1474 {
+                        let v1479 = C::box_external_name(ctx, v1475.0);
+                        let v1480 = constructor_load_ext_name(ctx, v1479, v1475.2);
+                        let v1481 = constructor_output_reg(ctx, v1480);
+                        // Rule at src/isa/aarch64/lower.isle line 2243.
+                        return Some(v1481);
+                    }
+                }
+                &Opcode::TlsValue => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v1474 = C::symbol_value_data(ctx, v1473);
+                        if let Some(v1475) = v1474 {
+                            let v3 = C::value_type(ctx, v2);
+                            let v1799 = &C::tls_model(ctx, v3);
+                            match v1799 {
+                                &TlsModel::ElfGd => {
+                                    let v1800 = constructor_elf_tls_get_addr(ctx, v1475.0);
+                                    let v1801 = constructor_output_reg(ctx, v1800);
+                                    // Rule at src/isa/aarch64/lower.isle line 2836.
+                                    return Some(v1801);
+                                }
+                                &TlsModel::Macho => {
+                                    let v1802 = constructor_macho_tls_get_addr(ctx, v1475.0);
+                                    let v1803 = constructor_output_reg(ctx, v1802);
+                                    // Rule at src/isa/aarch64/lower.isle line 2839.
+                                    return Some(v1803);
+                                }
+                                _ => {}
+                            }
+                        }
+                    }
+                }
+                _ => {}
+            }
+        }
+        &InstructionData::UnaryIeee32 {
+            opcode: ref v15,
+            imm: v16,
+        } => {
+            if let &Opcode::F32const = v15 {
+                let v17 = C::u32_from_ieee32(ctx, v16);
+                let v18 = constructor_constant_f32(ctx, v17);
+                let v19 = constructor_output_reg(ctx, v18);
+                // Rule at src/isa/aarch64/lower.isle line 29.
+                return Some(v19);
+            }
+        }
+        &InstructionData::UnaryIeee64 {
+            opcode: ref v20,
+            imm: v21,
+        } => {
+            if let &Opcode::F64const = v20 {
+                let v22 = C::u64_from_ieee64(ctx, v21);
+                let v23 = constructor_constant_f64(ctx, v22);
+                let v24 = constructor_output_reg(ctx, v23);
+                // Rule at src/isa/aarch64/lower.isle line 34.
+                return Some(v24);
+            }
+        }
+        &InstructionData::UnaryImm {
+            opcode: ref v5,
+            imm: v6,
+        } => {
+            if let &Opcode::Iconst = v5 {
+                let v1 = C::first_result(ctx, arg0);
+                if let Some(v2) = v1 {
+                    let v3 = C::value_type(ctx, v2);
+                    let v7 = C::u64_from_imm64(ctx, v6);
+                    let v9 = constructor_imm(ctx, v3, &ImmExtend::Zero, v7);
+                    let v10 = constructor_output_reg(ctx, v9);
+                    // Rule at src/isa/aarch64/lower.isle line 19.
+                    return Some(v10);
+                }
+            }
+        }
+        _ => {}
+    }
+    None
+}
+
+// Generated as internal constructor for term lower_branch.
+pub fn constructor_lower_branch<C: Context>(
+    ctx: &mut C,
+    arg0: Inst,
+    arg1: &VecMachLabel,
+) -> Option<Unit> {
+    let v1 = &C::inst_data(ctx, arg0);
+    match v1 {
+        &InstructionData::BranchTable {
+            opcode: ref v82,
+            arg: v83,
+            table: v84,
+        } => {
+            if let &Opcode::BrTable = v82 {
+                let v85 = C::targets_jt_size(ctx, arg1);
+                let v86 = C::targets_jt_space(ctx, arg1);
+                let v87 = &constructor_emit_island(ctx, v86);
+                let v88 = constructor_side_effect(ctx, v87);
+                let v89 = constructor_put_in_reg_zext32(ctx, v83);
+                let v90 = C::u32_as_u64(ctx, v85);
+                let v91 = constructor_br_table_impl(ctx, v90, v89, arg1);
+                // Rule at src/isa/aarch64/lower.isle line 2902.
+                return Some(v91);
+            }
+        }
+        &InstructionData::Brif {
+            opcode: ref v2,
+            arg: v3,
+            blocks: ref v4,
+        } => {
+            if let &Opcode::Brif = v2 {
+                let v5 = C::maybe_uextend(ctx, v3);
+                if let Some(v6) = v5 {
+                    let v7 = C::def_inst(ctx, v6);
+                    if let Some(v8) = v7 {
+                        let v9 = &C::inst_data(ctx, v8);
+                        match v9 {
+                            &InstructionData::FloatCompare {
+                                opcode: ref v33,
+                                args: ref v34,
+                                cond: ref v35,
+                            } => {
+                                if let &Opcode::Fcmp = v33 {
+                                    let v36 = C::unpack_value_array_2(ctx, v34);
+                                    let v39 = C::value_type(ctx, v36.0);
+                                    let v40 = C::ty_scalar_float(ctx, v39);
+                                    if let Some(v41) = v40 {
+                                        let v42 = &C::fp_cond_code(ctx, v35);
+                                        let v43 = C::branch_target(ctx, arg1, 0x0);
+                                        let v44 = C::branch_target(ctx, arg1, 0x1);
+                                        let v45 = &constructor_scalar_size(ctx, v41);
+                                        let v46 = C::put_in_reg(ctx, v36.0);
+                                        let v47 = C::put_in_reg(ctx, v36.1);
+                                        let v48 = &constructor_fpu_cmp(ctx, v45, v46, v47);
+                                        let v49 = C::cond_br_cond(ctx, v42);
+                                        let v50 = &constructor_cond_br(ctx, v43, v44, v49);
+                                        let v51 =
+                                            &constructor_with_flags_side_effect(ctx, v48, v50);
+                                        let v52 = constructor_emit_side_effect(ctx, v51);
+                                        // Rule at src/isa/aarch64/lower.isle line 2862.
+                                        return Some(v52);
+                                    }
+                                }
+                            }
+                            &InstructionData::IntCompare {
+                                opcode: ref v10,
+                                args: ref v11,
+                                cond: ref v12,
+                            } => {
+                                if let &Opcode::Icmp = v10 {
+                                    let v13 = C::unpack_value_array_2(ctx, v11);
+                                    let v16 = C::value_type(ctx, v13.0);
+                                    let v21 = &constructor_lower_icmp_into_flags(
+                                        ctx, v12, v13.0, v13.1, v16,
+                                    );
+                                    let v22 = &constructor_flags_and_cc_cc(ctx, v21);
+                                    let v23 = &C::cond_code(ctx, v22);
+                                    let v25 = C::branch_target(ctx, arg1, 0x0);
+                                    let v27 = C::branch_target(ctx, arg1, 0x1);
+                                    let v28 = &constructor_flags_and_cc_flags(ctx, v21);
+                                    let v29 = C::cond_br_cond(ctx, v23);
+                                    let v30 = &constructor_cond_br(ctx, v25, v27, v29);
+                                    let v31 = &constructor_with_flags_side_effect(ctx, v28, v30);
+                                    let v32 = constructor_emit_side_effect(ctx, v31);
+                                    // Rule at src/isa/aarch64/lower.isle line 2850.
+                                    return Some(v32);
+                                }
+                            }
+                            _ => {}
+                        }
+                    }
+                }
+                let v53 = C::value_type(ctx, v3);
+                if v53 == I128 {
+                    let v54 = &constructor_flags_to_producesflags(ctx, v3);
+                    let v55 = C::put_in_regs(ctx, v3);
+                    let v57 = C::value_regs_get(ctx, v55, 0x0);
+                    let v59 = C::value_regs_get(ctx, v55, 0x1);
+                    let v61 = constructor_orr(ctx, I64, v57, v59);
+                    let v62 = C::branch_target(ctx, arg1, 0x0);
+                    let v63 = C::branch_target(ctx, arg1, 0x1);
+                    let v64 = C::cond_br_not_zero(ctx, v61);
+                    let v65 = &constructor_cond_br(ctx, v62, v63, v64);
+                    let v66 = &constructor_with_flags_side_effect(ctx, v54, v65);
+                    let v67 = constructor_emit_side_effect(ctx, v66);
+                    // Rule at src/isa/aarch64/lower.isle line 2872.
+                    return Some(v67);
+                }
+                let v68 = C::ty_int_ref_scalar_64(ctx, v53);
+                if let Some(v69) = v68 {
+                    let v54 = &constructor_flags_to_producesflags(ctx, v3);
+                    let v70 = constructor_put_in_reg_zext64(ctx, v3);
+                    let v71 = C::branch_target(ctx, arg1, 0x0);
+                    let v72 = C::branch_target(ctx, arg1, 0x1);
+                    let v73 = C::cond_br_not_zero(ctx, v70);
+                    let v74 = &constructor_cond_br(ctx, v71, v72, v73);
+                    let v75 = &constructor_with_flags_side_effect(ctx, v54, v74);
+                    let v76 = constructor_emit_side_effect(ctx, v75);
+                    // Rule at src/isa/aarch64/lower.isle line 2883.
+                    return Some(v76);
+                }
+            }
+        }
+        &InstructionData::Jump {
+            opcode: ref v77,
+            destination: v78,
+        } => {
+            if let &Opcode::Jump = v77 {
+                let v79 = C::branch_target(ctx, arg1, 0x0);
+                let v80 = &constructor_aarch64_jump(ctx, v79);
+                let v81 = constructor_emit_side_effect(ctx, v80);
+                // Rule at src/isa/aarch64/lower.isle line 2895.
+                return Some(v81);
+            }
+        }
+        _ => {}
+    }
+    None
+}
+
+// Generated as internal constructor for term lower_fmla.
+pub fn constructor_lower_fmla<C: Context>(
+    ctx: &mut C,
+    arg0: &VecALUModOp,
+    arg1: Value,
+    arg2: Value,
+    arg3: Value,
+    arg4: &VectorSize,
+) -> Reg {
+    let v18 = C::def_inst(ctx, arg2);
+    if let Some(v19) = v18 {
+        let v20 = &C::inst_data(ctx, v19);
+        if let &InstructionData::Unary {
+            opcode: ref v21,
+            arg: v22,
+        } = v20
+        {
+            if let &Opcode::Fneg = v21 {
+                let v85 = &constructor_neg_fmla(ctx, arg0);
+                let v87 = constructor_lower_fmla(ctx, v85, arg1, v22, arg3, arg4);
+                // Rule at src/isa/aarch64/lower.isle line 566.
+                return v87;
+            }
+        }
+    }
+    let v9 = C::def_inst(ctx, arg1);
+    if let Some(v10) = v9 {
+        let v11 = &C::inst_data(ctx, v10);
+        if let &InstructionData::Unary {
+            opcode: ref v12,
+            arg: v13,
+        } = v11
+        {
+            if let &Opcode::Fneg = v12 {
+                let v85 = &constructor_neg_fmla(ctx, arg0);
+                let v86 = constructor_lower_fmla(ctx, v85, v13, arg2, arg3, arg4);
+                // Rule at src/isa/aarch64/lower.isle line 564.
+                return v86;
+            }
+        }
+    }
+    match arg4 {
+        &VectorSize::Size32x4 => {
+            if let Some(v19) = v18 {
+                let v20 = &C::inst_data(ctx, v19);
+                if let &InstructionData::LoadNoOffset {
+                    opcode: ref v48,
+                    arg: v49,
+                    flags: v50,
+                } = v20
+                {
+                    if let &Opcode::Bitcast = v48 {
+                        let v51 = C::def_inst(ctx, v49);
+                        if let Some(v52) = v51 {
+                            let v53 = &C::inst_data(ctx, v52);
+                            if let &InstructionData::Shuffle {
+                                opcode: ref v54,
+                                args: ref v55,
+                                imm: v56,
+                            } = v53
+                            {
+                                if let &Opcode::Shuffle = v54 {
+                                    let v60 = C::shuffle32_from_imm(ctx, v56);
+                                    if let Some(v61) = v60 {
+                                        let v66 = C::u8_as_u64(ctx, v61.0);
+                                        let v67 = C::u64_lt(ctx, v66, 0x4);
+                                        if v67 == true {
+                                            let v57 = C::unpack_value_array_2(ctx, v55);
+                                            if v57.0 == v57.1 {
+                                                if v61.0 == v61.1 {
+                                                    if v61.0 == v61.2 {
+                                                        if v61.0 == v61.3 {
+                                                            let v5 = C::put_in_reg(ctx, arg3);
+                                                            let v6 = C::put_in_reg(ctx, arg1);
+                                                            let v68 = C::put_in_reg(ctx, v57.0);
+                                                            let v69 = constructor_vec_fmla_elem(
+                                                                ctx, arg0, v5, v6, v68, arg4, v61.0,
+                                                            );
+                                                            // Rule at src/isa/aarch64/lower.isle line 548.
+                                                            return v69;
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                            }
+                        }
+                    }
+                }
+            }
+            if let Some(v10) = v9 {
+                let v11 = &C::inst_data(ctx, v10);
+                if let &InstructionData::LoadNoOffset {
+                    opcode: ref v25,
+                    arg: v26,
+                    flags: v27,
+                } = v11
+                {
+                    if let &Opcode::Bitcast = v25 {
+                        let v28 = C::def_inst(ctx, v26);
+                        if let Some(v29) = v28 {
+                            let v30 = &C::inst_data(ctx, v29);
+                            if let &InstructionData::Shuffle {
+                                opcode: ref v31,
+                                args: ref v32,
+                                imm: v33,
+                            } = v30
+                            {
+                                if let &Opcode::Shuffle = v31 {
+                                    let v37 = C::shuffle32_from_imm(ctx, v33);
+                                    if let Some(v38) = v37 {
+                                        let v43 = C::u8_as_u64(ctx, v38.0);
+                                        let v45 = C::u64_lt(ctx, v43, 0x4);
+                                        if v45 == true {
+                                            let v34 = C::unpack_value_array_2(ctx, v32);
+                                            if v34.0 == v34.1 {
+                                                if v38.0 == v38.1 {
+                                                    if v38.0 == v38.2 {
+                                                        if v38.0 == v38.3 {
+                                                            let v5 = C::put_in_reg(ctx, arg3);
+                                                            let v14 = C::put_in_reg(ctx, arg2);
+                                                            let v46 = C::put_in_reg(ctx, v34.0);
+                                                            let v47 = constructor_vec_fmla_elem(
+                                                                ctx, arg0, v5, v14, v46, arg4,
+                                                                v38.0,
+                                                            );
+                                                            // Rule at src/isa/aarch64/lower.isle line 545.
+                                                            return v47;
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                            }
+                        }
+                    }
+                }
+            }
+        }
+        &VectorSize::Size64x2 => {
+            if let Some(v19) = v18 {
+                let v20 = &C::inst_data(ctx, v19);
+                if let &InstructionData::LoadNoOffset {
+                    opcode: ref v48,
+                    arg: v49,
+                    flags: v50,
+                } = v20
+                {
+                    if let &Opcode::Bitcast = v48 {
+                        let v51 = C::def_inst(ctx, v49);
+                        if let Some(v52) = v51 {
+                            let v53 = &C::inst_data(ctx, v52);
+                            if let &InstructionData::Shuffle {
+                                opcode: ref v54,
+                                args: ref v55,
+                                imm: v56,
+                            } = v53
+                            {
+                                if let &Opcode::Shuffle = v54 {
+                                    let v78 = C::shuffle64_from_imm(ctx, v56);
+                                    if let Some(v79) = v78 {
+                                        let v82 = C::u8_as_u64(ctx, v79.0);
+                                        let v83 = C::u64_lt(ctx, v82, 0x2);
+                                        if v83 == true {
+                                            let v57 = C::unpack_value_array_2(ctx, v55);
+                                            if v57.0 == v57.1 {
+                                                if v79.0 == v79.1 {
+                                                    let v5 = C::put_in_reg(ctx, arg3);
+                                                    let v6 = C::put_in_reg(ctx, arg1);
+                                                    let v68 = C::put_in_reg(ctx, v57.0);
+                                                    let v84 = constructor_vec_fmla_elem(
+                                                        ctx, arg0, v5, v6, v68, arg4, v79.0,
+                                                    );
+                                                    // Rule at src/isa/aarch64/lower.isle line 554.
+                                                    return v84;
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                            }
+                        }
+                    }
+                }
+            }
+            if let Some(v10) = v9 {
+                let v11 = &C::inst_data(ctx, v10);
+                if let &InstructionData::LoadNoOffset {
+                    opcode: ref v25,
+                    arg: v26,
+                    flags: v27,
+                } = v11
+                {
+                    if let &Opcode::Bitcast = v25 {
+                        let v28 = C::def_inst(ctx, v26);
+                        if let Some(v29) = v28 {
+                            let v30 = &C::inst_data(ctx, v29);
+                            if let &InstructionData::Shuffle {
+                                opcode: ref v31,
+                                args: ref v32,
+                                imm: v33,
+                            } = v30
+                            {
+                                if let &Opcode::Shuffle = v31 {
+                                    let v70 = C::shuffle64_from_imm(ctx, v33);
+                                    if let Some(v71) = v70 {
+                                        let v74 = C::u8_as_u64(ctx, v71.0);
+                                        let v76 = C::u64_lt(ctx, v74, 0x2);
+                                        if v76 == true {
+                                            let v34 = C::unpack_value_array_2(ctx, v32);
+                                            if v34.0 == v34.1 {
+                                                if v71.0 == v71.1 {
+                                                    let v5 = C::put_in_reg(ctx, arg3);
+                                                    let v14 = C::put_in_reg(ctx, arg2);
+                                                    let v46 = C::put_in_reg(ctx, v34.0);
+                                                    let v77 = constructor_vec_fmla_elem(
+                                                        ctx, arg0, v5, v14, v46, arg4, v71.0,
+                                                    );
+                                                    // Rule at src/isa/aarch64/lower.isle line 551.
+                                                    return v77;
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                            }
+                        }
+                    }
+                }
+            }
+        }
+        _ => {}
+    }
+    if let Some(v19) = v18 {
+        let v20 = &C::inst_data(ctx, v19);
+        if let &InstructionData::Unary {
+            opcode: ref v21,
+            arg: v22,
+        } = v20
+        {
+            if let &Opcode::Splat = v21 {
+                let v5 = C::put_in_reg(ctx, arg3);
+                let v6 = C::put_in_reg(ctx, arg1);
+                let v23 = C::put_in_reg(ctx, v22);
+                let v24 = constructor_vec_fmla_elem(ctx, arg0, v5, v6, v23, arg4, 0x0);
+                // Rule at src/isa/aarch64/lower.isle line 535.
+                return v24;
+            }
+        }
+    }
+    if let Some(v10) = v9 {
+        let v11 = &C::inst_data(ctx, v10);
+        if let &InstructionData::Unary {
+            opcode: ref v12,
+            arg: v13,
+        } = v11
+        {
+            if let &Opcode::Splat = v12 {
+                let v5 = C::put_in_reg(ctx, arg3);
+                let v14 = C::put_in_reg(ctx, arg2);
+                let v15 = C::put_in_reg(ctx, v13);
+                let v17 = constructor_vec_fmla_elem(ctx, arg0, v5, v14, v15, arg4, 0x0);
+                // Rule at src/isa/aarch64/lower.isle line 533.
+                return v17;
+            }
+        }
+    }
+    let v5 = C::put_in_reg(ctx, arg3);
+    let v6 = C::put_in_reg(ctx, arg1);
+    let v7 = C::put_in_reg(ctx, arg2);
+    let v8 = constructor_vec_rrr_mod(ctx, arg0, v5, v6, v7, arg4);
+    // Rule at src/isa/aarch64/lower.isle line 528.
+    return v8;
+}
+
+// Generated as internal constructor for term neg_fmla.
+pub fn constructor_neg_fmla<C: Context>(ctx: &mut C, arg0: &VecALUModOp) -> VecALUModOp {
+    match arg0 {
+        &VecALUModOp::Fmla => {
+            // Rule at src/isa/aarch64/lower.isle line 570.
+            return VecALUModOp::Fmls;
+        }
+        &VecALUModOp::Fmls => {
+            // Rule at src/isa/aarch64/lower.isle line 571.
+            return VecALUModOp::Fmla;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "neg_fmla", "src/isa/aarch64/lower.isle line 569"
+    )
+}
+
+// Generated as internal constructor for term put_nonzero_in_reg_zext64.
+pub fn constructor_put_nonzero_in_reg_zext64<C: Context>(ctx: &mut C, arg0: Value) -> Reg {
+    let v4 = C::def_inst(ctx, arg0);
+    if let Some(v5) = v4 {
+        let v6 = &C::inst_data(ctx, v5);
+        if let &InstructionData::UnaryImm {
+            opcode: ref v7,
+            imm: v8,
+        } = v6
+        {
+            if let &Opcode::Iconst = v7 {
+                let v9 = C::nonzero_u64_from_imm64(ctx, v8);
+                if let Some(v10) = v9 {
+                    let v3 = C::value_type(ctx, arg0);
+                    let v12 = constructor_imm(ctx, v3, &ImmExtend::Zero, v10);
+                    // Rule at src/isa/aarch64/lower.isle line 978.
+                    return v12;
+                }
+            }
+        }
+    }
+    let v1 = constructor_put_in_reg_zext64(ctx, arg0);
+    let v2 = constructor_trap_if_zero_divisor(ctx, v1);
+    // Rule at src/isa/aarch64/lower.isle line 973.
+    return v2;
+}
+
+// Generated as internal constructor for term put_nonzero_in_reg_sext64.
+pub fn constructor_put_nonzero_in_reg_sext64<C: Context>(ctx: &mut C, arg0: Value) -> Reg {
+    let v4 = C::def_inst(ctx, arg0);
+    if let Some(v5) = v4 {
+        let v6 = &C::inst_data(ctx, v5);
+        if let &InstructionData::UnaryImm {
+            opcode: ref v7,
+            imm: v8,
+        } = v6
+        {
+            if let &Opcode::Iconst = v7 {
+                let v9 = C::nonzero_u64_from_imm64(ctx, v8);
+                if let Some(v10) = v9 {
+                    let v3 = C::value_type(ctx, arg0);
+                    let v12 = constructor_imm(ctx, v3, &ImmExtend::Sign, v10);
+                    // Rule at src/isa/aarch64/lower.isle line 1021.
+                    return v12;
+                }
+            }
+        }
+    }
+    let v1 = constructor_put_in_reg_sext64(ctx, arg0);
+    let v2 = constructor_trap_if_zero_divisor(ctx, v1);
+    // Rule at src/isa/aarch64/lower.isle line 1016.
+    return v2;
+}
+
+// Generated as internal constructor for term cmp_and_choose.
+pub fn constructor_cmp_and_choose<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &Cond,
+    arg2: bool,
+    arg3: Value,
+    arg4: Value,
+) -> ValueRegs {
+    let v14 = C::fits_in_16(ctx, arg0);
+    if let Some(v15) = v14 {
+        let v7 = C::put_in_reg(ctx, arg3);
+        let v16 = C::ty_bits(ctx, v15);
+        let v18 = constructor_extend(ctx, v7, arg2, v16, 0x20);
+        let v19 = C::put_in_reg(ctx, arg4);
+        let v20 = constructor_extend(ctx, v19, arg2, v16, 0x20);
+        let v21 = &constructor_operand_size(ctx, v15);
+        let v22 = &constructor_cmp(ctx, v21, v18, v20);
+        let v23 = &constructor_csel(ctx, arg1, v18, v20);
+        let v24 = constructor_with_flags_reg(ctx, v22, v23);
+        let v25 = C::value_reg(ctx, v24);
+        // Rule at src/isa/aarch64/lower.isle line 1068.
+        return v25;
+    }
+    let v1 = C::fits_in_64(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v7 = C::put_in_reg(ctx, arg3);
+        let v8 = C::put_in_reg(ctx, arg4);
+        let v9 = &constructor_operand_size(ctx, v2);
+        let v10 = &constructor_cmp(ctx, v9, v7, v8);
+        let v11 = &constructor_csel(ctx, arg1, v7, v8);
+        let v12 = constructor_with_flags_reg(ctx, v10, v11);
+        let v13 = C::value_reg(ctx, v12);
+        // Rule at src/isa/aarch64/lower.isle line 1060.
+        return v13;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "cmp_and_choose", "src/isa/aarch64/lower.isle line 1059"
+    )
+}
+
+// Generated as internal constructor for term lower_shl128.
+pub fn constructor_lower_shl128<C: Context>(ctx: &mut C, arg0: ValueRegs, arg1: Reg) -> ValueRegs {
+    let v3 = C::value_regs_get(ctx, arg0, 0x0);
+    let v5 = C::value_regs_get(ctx, arg0, 0x1);
+    let v7 = constructor_lsl(ctx, I64, v3, arg1);
+    let v8 = constructor_lsl(ctx, I64, v5, arg1);
+    let v10 = C::zero_reg(ctx);
+    let v11 = constructor_orr_not(ctx, I32, v10, arg1);
+    let v13 = C::imm_shift_from_u8(ctx, 0x1);
+    let v14 = constructor_lsr_imm(ctx, I64, v3, v13);
+    let v15 = constructor_lsr(ctx, I64, v14, v11);
+    let v16 = constructor_orr(ctx, I64, v8, v15);
+    let v18 = C::u64_into_imm_logic(ctx, I64, 0x40);
+    let v19 = &constructor_tst_imm(ctx, I64, arg1, v18);
+    let v21 = C::zero_reg(ctx);
+    let v22 = &constructor_csel(ctx, &Cond::Ne, v21, v7);
+    let v23 = &constructor_csel(ctx, &Cond::Ne, v7, v16);
+    let v24 = &constructor_consumes_flags_concat(ctx, v22, v23);
+    let v25 = constructor_with_flags(ctx, v19, v24);
+    // Rule at src/isa/aarch64/lower.isle line 1320.
+    return v25;
+}
+
+// Generated as internal constructor for term do_shift.
+pub fn constructor_do_shift<C: Context>(
+    ctx: &mut C,
+    arg0: &ALUOp,
+    arg1: Type,
+    arg2: Reg,
+    arg3: Value,
+) -> Reg {
+    let v16 = C::def_inst(ctx, arg3);
+    if let Some(v17) = v16 {
+        let v18 = &C::inst_data(ctx, v17);
+        if let &InstructionData::UnaryImm {
+            opcode: ref v19,
+            imm: v20,
+        } = v18
+        {
+            if let &Opcode::Iconst = v19 {
+                let v21 = C::imm_shift_from_imm64(ctx, arg1, v20);
+                if let Some(v22) = v21 {
+                    let v23 = constructor_alu_rr_imm_shift(ctx, arg0, arg1, arg2, v22);
+                    // Rule at src/isa/aarch64/lower.isle line 1383.
+                    return v23;
+                }
+            }
+        }
+    }
+    match arg1 {
+        I32 => {
+            let v6 = C::put_in_regs(ctx, arg3);
+            let v8 = C::value_regs_get(ctx, v6, 0x0);
+            let v13 = constructor_alu_rrr(ctx, arg0, I32, arg2, v8);
+            // Rule at src/isa/aarch64/lower.isle line 1374.
+            return v13;
+        }
+        I64 => {
+            let v6 = C::put_in_regs(ctx, arg3);
+            let v8 = C::value_regs_get(ctx, v6, 0x0);
+            let v15 = constructor_alu_rrr(ctx, arg0, I64, arg2, v8);
+            // Rule at src/isa/aarch64/lower.isle line 1375.
+            return v15;
+        }
+        _ => {}
+    }
+    let v2 = C::fits_in_16(ctx, arg1);
+    if let Some(v3) = v2 {
+        let v6 = C::put_in_regs(ctx, arg3);
+        let v8 = C::value_regs_get(ctx, v6, 0x0);
+        let v10 = C::shift_mask(ctx, v3);
+        let v11 = constructor_and_imm(ctx, I32, v8, v10);
+        let v12 = constructor_alu_rrr(ctx, arg0, I32, arg2, v11);
+        // Rule at src/isa/aarch64/lower.isle line 1365.
+        return v12;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "do_shift", "src/isa/aarch64/lower.isle line 1354"
+    )
+}
+
+// Generated as internal constructor for term lower_ushr128.
+pub fn constructor_lower_ushr128<C: Context>(ctx: &mut C, arg0: ValueRegs, arg1: Reg) -> ValueRegs {
+    let v3 = C::value_regs_get(ctx, arg0, 0x0);
+    let v5 = C::value_regs_get(ctx, arg0, 0x1);
+    let v7 = constructor_lsr(ctx, I64, v3, arg1);
+    let v8 = constructor_lsr(ctx, I64, v5, arg1);
+    let v10 = C::zero_reg(ctx);
+    let v11 = constructor_orr_not(ctx, I32, v10, arg1);
+    let v13 = C::imm_shift_from_u8(ctx, 0x1);
+    let v14 = constructor_lsl_imm(ctx, I64, v5, v13);
+    let v15 = constructor_lsl(ctx, I64, v14, v11);
+    let v16 = constructor_orr(ctx, I64, v7, v15);
+    let v18 = C::u64_into_imm_logic(ctx, I64, 0x40);
+    let v19 = &constructor_tst_imm(ctx, I64, arg1, v18);
+    let v21 = &constructor_csel(ctx, &Cond::Ne, v8, v16);
+    let v22 = C::zero_reg(ctx);
+    let v23 = &constructor_csel(ctx, &Cond::Ne, v22, v8);
+    let v24 = &constructor_consumes_flags_concat(ctx, v21, v23);
+    let v25 = constructor_with_flags(ctx, v19, v24);
+    // Rule at src/isa/aarch64/lower.isle line 1427.
+    return v25;
+}
+
+// Generated as internal constructor for term lower_sshr128.
+pub fn constructor_lower_sshr128<C: Context>(ctx: &mut C, arg0: ValueRegs, arg1: Reg) -> ValueRegs {
+    let v3 = C::value_regs_get(ctx, arg0, 0x0);
+    let v5 = C::value_regs_get(ctx, arg0, 0x1);
+    let v7 = constructor_lsr(ctx, I64, v3, arg1);
+    let v8 = constructor_asr(ctx, I64, v5, arg1);
+    let v10 = C::zero_reg(ctx);
+    let v11 = constructor_orr_not(ctx, I32, v10, arg1);
+    let v13 = C::imm_shift_from_u8(ctx, 0x1);
+    let v14 = constructor_lsl_imm(ctx, I64, v5, v13);
+    let v15 = constructor_lsl(ctx, I64, v14, v11);
+    let v17 = C::imm_shift_from_u8(ctx, 0x3F);
+    let v18 = constructor_asr_imm(ctx, I64, v5, v17);
+    let v19 = constructor_orr(ctx, I64, v7, v15);
+    let v21 = C::u64_into_imm_logic(ctx, I64, 0x40);
+    let v22 = &constructor_tst_imm(ctx, I64, arg1, v21);
+    let v24 = &constructor_csel(ctx, &Cond::Ne, v8, v19);
+    let v25 = &constructor_csel(ctx, &Cond::Ne, v18, v8);
+    let v26 = &constructor_consumes_flags_concat(ctx, v24, v25);
+    let v27 = constructor_with_flags(ctx, v22, v26);
+    // Rule at src/isa/aarch64/lower.isle line 1486.
+    return v27;
+}
+
+// Generated as internal constructor for term small_rotr.
+pub fn constructor_small_rotr<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v4 = C::rotr_mask(ctx, arg0);
+    let v5 = constructor_and_imm(ctx, I32, arg2, v4);
+    let v6 = C::ty_bits(ctx, arg0);
+    let v7 = C::u8_into_imm12(ctx, v6);
+    let v8 = constructor_sub_imm(ctx, I32, v5, v7);
+    let v9 = C::zero_reg(ctx);
+    let v10 = constructor_sub(ctx, I32, v9, v8);
+    let v11 = constructor_lsr(ctx, I32, arg1, v5);
+    let v12 = constructor_lsl(ctx, I32, arg1, v10);
+    let v13 = constructor_orr(ctx, I32, v12, v11);
+    // Rule at src/isa/aarch64/lower.isle line 1605.
+    return v13;
+}
+
+// Generated as internal constructor for term small_rotr_imm.
+pub fn constructor_small_rotr_imm<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: ImmShift,
+) -> Reg {
+    let v4 = constructor_lsr_imm(ctx, I32, arg1, arg2);
+    let v5 = C::rotr_opposite_amount(ctx, arg0, arg2);
+    let v6 = constructor_lsl_imm(ctx, I32, arg1, v5);
+    let v7 = constructor_orr(ctx, I32, v6, v4);
+    // Rule at src/isa/aarch64/lower.isle line 1626.
+    return v7;
+}
+
+// Generated as internal constructor for term lower_clz128.
+pub fn constructor_lower_clz128<C: Context>(ctx: &mut C, arg0: ValueRegs) -> ValueRegs {
+    let v3 = C::value_regs_get(ctx, arg0, 0x1);
+    let v4 = constructor_a64_clz(ctx, I64, v3);
+    let v6 = C::value_regs_get(ctx, arg0, 0x0);
+    let v7 = constructor_a64_clz(ctx, I64, v6);
+    let v9 = C::imm_shift_from_u8(ctx, 0x6);
+    let v10 = constructor_lsr_imm(ctx, I64, v4, v9);
+    let v11 = constructor_madd(ctx, I64, v7, v10, v4);
+    let v14 = constructor_imm(ctx, I64, &ImmExtend::Zero, 0x0);
+    let v15 = C::value_regs(ctx, v11, v14);
+    // Rule at src/isa/aarch64/lower.isle line 1691.
+    return v15;
+}
+
+// Generated as internal constructor for term put_in_reg_ext32.
+pub fn constructor_put_in_reg_ext32<C: Context>(
+    ctx: &mut C,
+    arg0: Value,
+    arg1: &ArgumentExtension,
+) -> Reg {
+    match arg1 {
+        &ArgumentExtension::Uext => {
+            let v3 = constructor_put_in_reg_zext32(ctx, arg0);
+            // Rule at src/isa/aarch64/lower.isle line 2596.
+            return v3;
+        }
+        &ArgumentExtension::Sext => {
+            let v2 = constructor_put_in_reg_sext32(ctx, arg0);
+            // Rule at src/isa/aarch64/lower.isle line 2594.
+            return v2;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "put_in_reg_ext32", "src/isa/aarch64/lower.isle line 2593"
+    )
+}
+
+// Generated as internal constructor for term overflow_op_small.
+pub fn constructor_overflow_op_small<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Value,
+    arg2: Value,
+    arg3: &ArgumentExtension,
+    arg4: &ALUOp,
+) -> InstOutput {
+    let v5 = &constructor_lower_extend_op(ctx, arg0, arg3);
+    let v6 = constructor_put_in_reg_ext32(ctx, arg1, arg3);
+    let v7 = C::put_in_reg(ctx, arg2);
+    let v8 = constructor_alu_rrr_extend(ctx, arg4, arg0, v6, v7, v5);
+    let v10 = &constructor_cmp_extend(ctx, &OperandSize::Size32, v8, v8, v5);
+    let v12 = &constructor_cset(ctx, &Cond::Ne);
+    let v13 = constructor_with_flags_reg(ctx, v10, v12);
+    let v14 = C::value_reg(ctx, v8);
+    let v15 = C::value_reg(ctx, v13);
+    let v16 = C::output_pair(ctx, v14, v15);
+    // Rule at src/isa/aarch64/lower.isle line 2602.
+    return v16;
+}
+
+// Generated as internal constructor for term overflow_op_normal.
+pub fn constructor_overflow_op_normal<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Value,
+    arg2: Value,
+    arg3: &ALUOp,
+    arg4: &Cond,
+) -> InstOutput {
+    let v5 = C::put_in_reg(ctx, arg1);
+    let v6 = C::put_in_reg(ctx, arg2);
+    let v7 = &constructor_alu_rrr_with_flags_paired(ctx, arg0, v5, v6, arg3);
+    let v8 = &constructor_cset_paired(ctx, arg4);
+    let v9 = constructor_with_flags(ctx, v7, v8);
+    let v11 = C::value_regs_get(ctx, v9, 0x0);
+    let v12 = C::value_reg(ctx, v11);
+    let v14 = C::value_regs_get(ctx, v9, 0x1);
+    let v15 = C::value_reg(ctx, v14);
+    let v16 = C::output_pair(ctx, v12, v15);
+    // Rule at src/isa/aarch64/lower.isle line 2631.
+    return v16;
+}
+
+// Generated as internal constructor for term overflow_op_128.
+pub fn constructor_overflow_op_128<C: Context>(
+    ctx: &mut C,
+    arg0: Value,
+    arg1: Value,
+    arg2: &ALUOp,
+    arg3: &ALUOp,
+    arg4: &Cond,
+) -> InstOutput {
+    let v5 = C::put_in_regs(ctx, arg0);
+    let v7 = C::value_regs_get(ctx, v5, 0x0);
+    let v9 = C::value_regs_get(ctx, v5, 0x1);
+    let v10 = C::put_in_regs(ctx, arg1);
+    let v11 = C::value_regs_get(ctx, v10, 0x0);
+    let v12 = C::value_regs_get(ctx, v10, 0x1);
+    let v14 = &constructor_alu_rrr_with_flags_paired(ctx, I64, v7, v11, arg2);
+    let v15 = &constructor_alu_rrr_with_flags_chained(ctx, I64, v9, v12, arg3);
+    let v16 = &constructor_cset_paired(ctx, arg4);
+    let v17 = &constructor_with_flags_chained(ctx, v14, v15, v16);
+    let v18 = constructor_multi_reg_to_pair_and_single(ctx, v17);
+    // Rule at src/isa/aarch64/lower.isle line 2642.
+    return v18;
+}
diff --git a/cranelift/codegen/isle_generated_code/isle_opt.rs b/cranelift/codegen/isle_generated_code/isle_opt.rs
new file mode 100644
index 000000000000..30abca21da70
--- /dev/null
+++ b/cranelift/codegen/isle_generated_code/isle_opt.rs
@@ -0,0 +1,6676 @@
+// GENERATED BY ISLE. DO NOT EDIT!
+//
+// Generated automatically from the instruction-selection DSL code in:
+// - src/prelude.isle
+// - src/prelude_opt.isle
+// - src/opts/arithmetic.isle
+// - src/opts/bitops.isle
+// - src/opts/cprop.isle
+// - src/opts/extends.isle
+// - src/opts/icmp.isle
+// - src/opts/remat.isle
+// - src/opts/selects.isle
+// - src/opts/shifts.isle
+// - src/opts/vector.isle
+// - /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle
+
+use super::*; // Pulls in all external types.
+use std::marker::PhantomData;
+
+/// Context during lowering: an implementation of this trait
+/// must be provided with all external constructors and extractors.
+/// A mutable borrow is passed along through all lowering logic.
+pub trait Context {
+    fn unit(&mut self) -> Unit;
+    fn value_type(&mut self, arg0: Value) -> Type;
+    fn u32_nonnegative(&mut self, arg0: u32) -> Option<u32>;
+    fn offset32(&mut self, arg0: Offset32) -> u32;
+    fn u32_lteq(&mut self, arg0: u32, arg1: u32) -> Option<Unit>;
+    fn u8_lteq(&mut self, arg0: u8, arg1: u8) -> Option<Unit>;
+    fn u8_lt(&mut self, arg0: u8, arg1: u8) -> Option<Unit>;
+    fn simm32(&mut self, arg0: Imm64) -> Option<u32>;
+    fn uimm8(&mut self, arg0: Imm64) -> Option<u8>;
+    fn u8_as_u32(&mut self, arg0: u8) -> u32;
+    fn u8_as_u64(&mut self, arg0: u8) -> u64;
+    fn u16_as_u64(&mut self, arg0: u16) -> u64;
+    fn u32_as_u64(&mut self, arg0: u32) -> u64;
+    fn i64_as_u64(&mut self, arg0: i64) -> u64;
+    fn i64_neg(&mut self, arg0: i64) -> i64;
+    fn u128_as_u64(&mut self, arg0: u128) -> Option<u64>;
+    fn u64_as_u32(&mut self, arg0: u64) -> Option<u32>;
+    fn u64_as_i32(&mut self, arg0: u64) -> i32;
+    fn u8_and(&mut self, arg0: u8, arg1: u8) -> u8;
+    fn u8_shl(&mut self, arg0: u8, arg1: u8) -> u8;
+    fn u8_shr(&mut self, arg0: u8, arg1: u8) -> u8;
+    fn u32_add(&mut self, arg0: u32, arg1: u32) -> u32;
+    fn u32_sub(&mut self, arg0: u32, arg1: u32) -> u32;
+    fn u32_and(&mut self, arg0: u32, arg1: u32) -> u32;
+    fn s32_add_fallible(&mut self, arg0: u32, arg1: u32) -> Option<u32>;
+    fn u64_add(&mut self, arg0: u64, arg1: u64) -> u64;
+    fn u64_sub(&mut self, arg0: u64, arg1: u64) -> u64;
+    fn u64_mul(&mut self, arg0: u64, arg1: u64) -> u64;
+    fn u64_sdiv(&mut self, arg0: u64, arg1: u64) -> Option<u64>;
+    fn u64_udiv(&mut self, arg0: u64, arg1: u64) -> Option<u64>;
+    fn u64_and(&mut self, arg0: u64, arg1: u64) -> u64;
+    fn u64_or(&mut self, arg0: u64, arg1: u64) -> u64;
+    fn u64_xor(&mut self, arg0: u64, arg1: u64) -> u64;
+    fn u64_shl(&mut self, arg0: u64, arg1: u64) -> u64;
+    fn imm64_shl(&mut self, arg0: Type, arg1: Imm64, arg2: Imm64) -> Imm64;
+    fn imm64_ushr(&mut self, arg0: Type, arg1: Imm64, arg2: Imm64) -> Imm64;
+    fn imm64_sshr(&mut self, arg0: Type, arg1: Imm64, arg2: Imm64) -> Imm64;
+    fn u64_not(&mut self, arg0: u64) -> u64;
+    fn u64_eq(&mut self, arg0: u64, arg1: u64) -> bool;
+    fn u64_le(&mut self, arg0: u64, arg1: u64) -> bool;
+    fn u64_lt(&mut self, arg0: u64, arg1: u64) -> bool;
+    fn i64_sextend_imm64(&mut self, arg0: Type, arg1: Imm64) -> i64;
+    fn u64_uextend_imm64(&mut self, arg0: Type, arg1: Imm64) -> u64;
+    fn imm64_icmp(&mut self, arg0: Type, arg1: &IntCC, arg2: Imm64, arg3: Imm64) -> Imm64;
+    fn u64_is_zero(&mut self, arg0: u64) -> bool;
+    fn u64_is_odd(&mut self, arg0: u64) -> bool;
+    fn ty_umin(&mut self, arg0: Type) -> u64;
+    fn ty_umax(&mut self, arg0: Type) -> u64;
+    fn ty_smin(&mut self, arg0: Type) -> u64;
+    fn ty_smax(&mut self, arg0: Type) -> u64;
+    fn ty_bits(&mut self, arg0: Type) -> u8;
+    fn ty_bits_u16(&mut self, arg0: Type) -> u16;
+    fn ty_bits_u64(&mut self, arg0: Type) -> u64;
+    fn ty_mask(&mut self, arg0: Type) -> u64;
+    fn ty_lane_mask(&mut self, arg0: Type) -> u64;
+    fn ty_lane_count(&mut self, arg0: Type) -> u64;
+    fn ty_bytes(&mut self, arg0: Type) -> u16;
+    fn lane_type(&mut self, arg0: Type) -> Type;
+    fn ty_half_lanes(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_half_width(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_equal(&mut self, arg0: Type, arg1: Type) -> bool;
+    fn mem_flags_trusted(&mut self) -> MemFlags;
+    fn intcc_reverse(&mut self, arg0: &IntCC) -> IntCC;
+    fn intcc_inverse(&mut self, arg0: &IntCC) -> IntCC;
+    fn floatcc_reverse(&mut self, arg0: &FloatCC) -> FloatCC;
+    fn floatcc_inverse(&mut self, arg0: &FloatCC) -> FloatCC;
+    fn floatcc_unordered(&mut self, arg0: &FloatCC) -> bool;
+    fn fits_in_16(&mut self, arg0: Type) -> Option<Type>;
+    fn fits_in_32(&mut self, arg0: Type) -> Option<Type>;
+    fn lane_fits_in_32(&mut self, arg0: Type) -> Option<Type>;
+    fn fits_in_64(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_32(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_64(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_int_ref_scalar_64_extract(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_int_ref_scalar_64(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_32_or_64(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_8_or_16(&mut self, arg0: Type) -> Option<Type>;
+    fn int_fits_in_32(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_int_ref_64(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_int_ref_16_to_64(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_int(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_scalar(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_scalar_float(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_float_or_vec(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_vector_float(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_vector_not_float(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_vec64(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_vec64_ctor(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_vec128(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_dyn_vec64(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_dyn_vec128(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_vec64_int(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_vec128_int(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_addr64(&mut self, arg0: Type) -> Option<Type>;
+    fn not_vec32x2(&mut self, arg0: Type) -> Option<Type>;
+    fn not_i64x2(&mut self, arg0: Type) -> Option<()>;
+    fn u8_from_uimm8(&mut self, arg0: Uimm8) -> u8;
+    fn u64_from_bool(&mut self, arg0: bool) -> u64;
+    fn u64_from_imm64(&mut self, arg0: Imm64) -> u64;
+    fn nonzero_u64_from_imm64(&mut self, arg0: Imm64) -> Option<u64>;
+    fn imm64_power_of_two(&mut self, arg0: Imm64) -> Option<u64>;
+    fn imm64(&mut self, arg0: u64) -> Imm64;
+    fn imm64_masked(&mut self, arg0: Type, arg1: u64) -> Imm64;
+    fn u32_from_ieee32(&mut self, arg0: Ieee32) -> u32;
+    fn u64_from_ieee64(&mut self, arg0: Ieee64) -> u64;
+    fn multi_lane(&mut self, arg0: Type) -> Option<(u32, u32)>;
+    fn dynamic_lane(&mut self, arg0: Type) -> Option<(u32, u32)>;
+    fn dynamic_int_lane(&mut self, arg0: Type) -> Option<u32>;
+    fn dynamic_fp_lane(&mut self, arg0: Type) -> Option<u32>;
+    fn ty_dyn64_int(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_dyn128_int(&mut self, arg0: Type) -> Option<Type>;
+    fn offset32_to_u32(&mut self, arg0: Offset32) -> u32;
+    fn u32_to_offset32(&mut self, arg0: u32) -> Offset32;
+    fn intcc_unsigned(&mut self, arg0: &IntCC) -> IntCC;
+    fn signed_cond_code(&mut self, arg0: &IntCC) -> Option<IntCC>;
+    fn trap_code_division_by_zero(&mut self) -> TrapCode;
+    fn trap_code_integer_overflow(&mut self) -> TrapCode;
+    fn trap_code_bad_conversion_to_integer(&mut self) -> TrapCode;
+    fn range(&mut self, arg0: usize, arg1: usize) -> Range;
+    fn range_view(&mut self, arg0: Range) -> RangeView;
+    type inst_data_etor_iter: ContextIter<Context = Self, Output = (Type, InstructionData)>;
+    fn inst_data_etor(&mut self, arg0: Value) -> Self::inst_data_etor_iter;
+    fn make_inst_ctor(&mut self, arg0: Type, arg1: &InstructionData) -> Value;
+    fn value_array_2_ctor(&mut self, arg0: Value, arg1: Value) -> ValueArray2;
+    fn value_array_3_ctor(&mut self, arg0: Value, arg1: Value, arg2: Value) -> ValueArray3;
+    fn remat(&mut self, arg0: Value) -> Value;
+    fn subsume(&mut self, arg0: Value) -> Value;
+    fn splat64(&mut self, arg0: u64) -> Constant;
+    fn unpack_value_array_2(&mut self, arg0: &ValueArray2) -> (Value, Value);
+    fn pack_value_array_2(&mut self, arg0: Value, arg1: Value) -> ValueArray2;
+    fn unpack_value_array_3(&mut self, arg0: &ValueArray3) -> (Value, Value, Value);
+    fn pack_value_array_3(&mut self, arg0: Value, arg1: Value, arg2: Value) -> ValueArray3;
+    fn unpack_block_array_2(&mut self, arg0: &BlockArray2) -> (BlockCall, BlockCall);
+    fn pack_block_array_2(&mut self, arg0: BlockCall, arg1: BlockCall) -> BlockArray2;
+}
+
+pub trait ContextIter {
+    type Context;
+    type Output;
+    fn next(&mut self, ctx: &mut Self::Context) -> Option<Self::Output>;
+}
+
+pub struct ContextIterWrapper<Item, I: Iterator<Item = Item>, C: Context> {
+    iter: I,
+    _ctx: PhantomData<C>,
+}
+impl<Item, I: Iterator<Item = Item>, C: Context> From<I> for ContextIterWrapper<Item, I, C> {
+    fn from(iter: I) -> Self {
+        Self {
+            iter,
+            _ctx: PhantomData,
+        }
+    }
+}
+impl<Item, I: Iterator<Item = Item>, C: Context> ContextIter for ContextIterWrapper<Item, I, C> {
+    type Context = C;
+    type Output = Item;
+    fn next(&mut self, _ctx: &mut Self::Context) -> Option<Self::Output> {
+        self.iter.next()
+    }
+}
+
+// Generated as internal constructor for term eq.
+pub fn constructor_eq<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
+    let v4 = constructor_icmp(ctx, arg0, &IntCC::Equal, arg1, arg2);
+    // Rule at src/prelude_opt.isle line 20.
+    return v4;
+}
+
+// Generated as internal constructor for term ne.
+pub fn constructor_ne<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
+    let v4 = constructor_icmp(ctx, arg0, &IntCC::NotEqual, arg1, arg2);
+    // Rule at src/prelude_opt.isle line 21.
+    return v4;
+}
+
+// Generated as internal constructor for term ult.
+pub fn constructor_ult<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
+    let v4 = constructor_icmp(ctx, arg0, &IntCC::UnsignedLessThan, arg1, arg2);
+    // Rule at src/prelude_opt.isle line 22.
+    return v4;
+}
+
+// Generated as internal constructor for term ule.
+pub fn constructor_ule<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
+    let v4 = constructor_icmp(ctx, arg0, &IntCC::UnsignedLessThanOrEqual, arg1, arg2);
+    // Rule at src/prelude_opt.isle line 23.
+    return v4;
+}
+
+// Generated as internal constructor for term ugt.
+pub fn constructor_ugt<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
+    let v4 = constructor_icmp(ctx, arg0, &IntCC::UnsignedGreaterThan, arg1, arg2);
+    // Rule at src/prelude_opt.isle line 24.
+    return v4;
+}
+
+// Generated as internal constructor for term uge.
+pub fn constructor_uge<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
+    let v4 = constructor_icmp(ctx, arg0, &IntCC::UnsignedGreaterThanOrEqual, arg1, arg2);
+    // Rule at src/prelude_opt.isle line 25.
+    return v4;
+}
+
+// Generated as internal constructor for term slt.
+pub fn constructor_slt<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
+    let v4 = constructor_icmp(ctx, arg0, &IntCC::SignedLessThan, arg1, arg2);
+    // Rule at src/prelude_opt.isle line 26.
+    return v4;
+}
+
+// Generated as internal constructor for term sle.
+pub fn constructor_sle<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
+    let v4 = constructor_icmp(ctx, arg0, &IntCC::SignedLessThanOrEqual, arg1, arg2);
+    // Rule at src/prelude_opt.isle line 27.
+    return v4;
+}
+
+// Generated as internal constructor for term sgt.
+pub fn constructor_sgt<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
+    let v4 = constructor_icmp(ctx, arg0, &IntCC::SignedGreaterThan, arg1, arg2);
+    // Rule at src/prelude_opt.isle line 28.
+    return v4;
+}
+
+// Generated as internal constructor for term sge.
+pub fn constructor_sge<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
+    let v4 = constructor_icmp(ctx, arg0, &IntCC::SignedGreaterThanOrEqual, arg1, arg2);
+    // Rule at src/prelude_opt.isle line 29.
+    return v4;
+}
+
+// Generated as internal constructor for term simplify.
+pub fn constructor_simplify<C: Context>(
+    ctx: &mut C,
+    arg0: Value,
+) -> impl ContextIter<Context = C, Output = Value> {
+    let mut returns = ConstructorVec::new();
+    let v1 = C::inst_data_etor(ctx, arg0);
+    let mut v1 = v1;
+    while let Some(v2) = v1.next(ctx) {
+        match &v2.1 {
+            &InstructionData::Binary {
+                opcode: ref v5,
+                args: ref v6,
+            } => {
+                match v5 {
+                    &Opcode::Iadd => {
+                        let v7 = C::unpack_value_array_2(ctx, v6);
+                        let v18 = C::inst_data_etor(ctx, v7.0);
+                        let mut v18 = v18;
+                        while let Some(v19) = v18.next(ctx) {
+                            match &v19.1 {
+                                &InstructionData::Binary {
+                                    opcode: ref v123,
+                                    args: ref v124,
+                                } => {
+                                    match v123 {
+                                        &Opcode::Iadd => {
+                                            if v2.0 == v19.0 {
+                                                let v10 = C::inst_data_etor(ctx, v7.1);
+                                                let mut v10 = v10;
+                                                while let Some(v11) = v10.next(ctx) {
+                                                    if let &InstructionData::UnaryImm {
+                                                        opcode: ref v14,
+                                                        imm: v15,
+                                                    } = &v11.1
+                                                    {
+                                                        if let &Opcode::Iconst = v14 {
+                                                            if v2.0 == v11.0 {
+                                                                let v125 = C::unpack_value_array_2(
+                                                                    ctx, v124,
+                                                                );
+                                                                let v135 =
+                                                                    C::inst_data_etor(ctx, v125.1);
+                                                                let mut v135 = v135;
+                                                                while let Some(v136) =
+                                                                    v135.next(ctx)
+                                                                {
+                                                                    if let &InstructionData::UnaryImm {
+                                                                        opcode: ref v139,
+                                                                        imm: v140,
+                                                                    } = &v136.1 {
+                                                                        if let &Opcode::Iconst = v139 {
+                                                                            if v2.0 == v136.0 {
+                                                                                let v257 = constructor_iadd(ctx, v2.0, v125.1, v7.1);
+                                                                                let v258 = constructor_iadd(ctx, v2.0, v125.0, v257);
+                                                                                // Rule at src/opts/cprop.isle line 125.
+                                                                                returns.push(v258);
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                        &Opcode::Isub => {
+                                            if v2.0 == v19.0 {
+                                                let v10 = C::inst_data_etor(ctx, v7.1);
+                                                let mut v10 = v10;
+                                                while let Some(v11) = v10.next(ctx) {
+                                                    if let &InstructionData::UnaryImm {
+                                                        opcode: ref v14,
+                                                        imm: v15,
+                                                    } = &v11.1
+                                                    {
+                                                        if let &Opcode::Iconst = v14 {
+                                                            if v2.0 == v11.0 {
+                                                                let v125 = C::unpack_value_array_2(
+                                                                    ctx, v124,
+                                                                );
+                                                                let v135 =
+                                                                    C::inst_data_etor(ctx, v125.1);
+                                                                let mut v135 = v135;
+                                                                while let Some(v136) =
+                                                                    v135.next(ctx)
+                                                                {
+                                                                    if let &InstructionData::UnaryImm {
+                                                                        opcode: ref v139,
+                                                                        imm: v140,
+                                                                    } = &v136.1 {
+                                                                        if let &Opcode::Iconst = v139 {
+                                                                            if v2.0 == v136.0 {
+                                                                                let v16 = C::u64_from_imm64(ctx, v15);
+                                                                                let v141 = C::u64_from_imm64(ctx, v140);
+                                                                                let v270 = C::u64_sub(ctx, v16, v141);
+                                                                                let v271 = C::imm64_masked(ctx, v2.0, v270);
+                                                                                let v272 = constructor_iconst(ctx, v2.0, v271);
+                                                                                let v274 = constructor_iadd(ctx, v2.0, v125.0, v272);
+                                                                                // Rule at src/opts/cprop.isle line 147.
+                                                                                returns.push(v274);
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                }
+                                                                let v156 =
+                                                                    C::inst_data_etor(ctx, v125.0);
+                                                                let mut v156 = v156;
+                                                                while let Some(v157) =
+                                                                    v156.next(ctx)
+                                                                {
+                                                                    if let &InstructionData::UnaryImm {
+                                                                        opcode: ref v263,
+                                                                        imm: v264,
+                                                                    } = &v157.1 {
+                                                                        if let &Opcode::Iconst = v263 {
+                                                                            if v2.0 == v157.0 {
+                                                                                let v265 = C::u64_from_imm64(ctx, v264);
+                                                                                let v16 = C::u64_from_imm64(ctx, v15);
+                                                                                let v275 = C::u64_add(ctx, v265, v16);
+                                                                                let v276 = C::imm64_masked(ctx, v2.0, v275);
+                                                                                let v277 = constructor_iconst(ctx, v2.0, v276);
+                                                                                let v278 = constructor_isub(ctx, v2.0, v277, v125.1);
+                                                                                // Rule at src/opts/cprop.isle line 151.
+                                                                                returns.push(v278);
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                        _ => {}
+                                    }
+                                }
+                                &InstructionData::Unary {
+                                    opcode: ref v36,
+                                    arg: v37,
+                                } => {
+                                    if let &Opcode::Bnot = v36 {
+                                        if v2.0 == v19.0 {
+                                            let v10 = C::inst_data_etor(ctx, v7.1);
+                                            let mut v10 = v10;
+                                            while let Some(v11) = v10.next(ctx) {
+                                                if let &InstructionData::UnaryImm {
+                                                    opcode: ref v14,
+                                                    imm: v15,
+                                                } = &v11.1
+                                                {
+                                                    if let &Opcode::Iconst = v14 {
+                                                        let v16 = C::u64_from_imm64(ctx, v15);
+                                                        if v16 == 0x1 {
+                                                            if v2.0 == v11.0 {
+                                                                let v55 = constructor_ineg(
+                                                                    ctx, v2.0, v37,
+                                                                );
+                                                                // Rule at src/opts/arithmetic.isle line 71.
+                                                                returns.push(v55);
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                                &InstructionData::UnaryImm {
+                                    opcode: ref v22,
+                                    imm: v23,
+                                } => {
+                                    if let &Opcode::Iconst = v22 {
+                                        if v2.0 == v19.0 {
+                                            let v24 = C::u64_from_imm64(ctx, v23);
+                                            match v24 {
+                                                0x0 => {
+                                                    let v25 = C::subsume(ctx, v7.1);
+                                                    // Rule at src/opts/arithmetic.isle line 9.
+                                                    returns.push(v25);
+                                                }
+                                                0x1 => {
+                                                    let v10 = C::inst_data_etor(ctx, v7.1);
+                                                    let mut v10 = v10;
+                                                    while let Some(v11) = v10.next(ctx) {
+                                                        if let &InstructionData::Unary {
+                                                            opcode: ref v38,
+                                                            arg: v39,
+                                                        } = &v11.1
+                                                        {
+                                                            if let &Opcode::Bnot = v38 {
+                                                                if v2.0 == v11.0 {
+                                                                    let v56 = constructor_ineg(
+                                                                        ctx, v2.0, v39,
+                                                                    );
+                                                                    // Rule at src/opts/arithmetic.isle line 73.
+                                                                    returns.push(v56);
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                                _ => {}
+                                            }
+                                            let v248 = constructor_iadd(ctx, v2.0, v7.1, v7.0);
+                                            // Rule at src/opts/cprop.isle line 94.
+                                            returns.push(v248);
+                                        }
+                                        let v44 = C::fits_in_64(ctx, v2.0);
+                                        if let Some(v45) = v44 {
+                                            if v19.0 == v45 {
+                                                let v10 = C::inst_data_etor(ctx, v7.1);
+                                                let mut v10 = v10;
+                                                while let Some(v11) = v10.next(ctx) {
+                                                    if let &InstructionData::UnaryImm {
+                                                        opcode: ref v14,
+                                                        imm: v15,
+                                                    } = &v11.1
+                                                    {
+                                                        if let &Opcode::Iconst = v14 {
+                                                            if v11.0 == v19.0 {
+                                                                let v24 =
+                                                                    C::u64_from_imm64(ctx, v23);
+                                                                let v16 =
+                                                                    C::u64_from_imm64(ctx, v15);
+                                                                let v163 =
+                                                                    C::u64_add(ctx, v24, v16);
+                                                                let v164 =
+                                                                    C::imm64_masked(ctx, v45, v163);
+                                                                let v165 = constructor_iconst(
+                                                                    ctx, v45, v164,
+                                                                );
+                                                                let v166 = C::subsume(ctx, v165);
+                                                                // Rule at src/opts/cprop.isle line 3.
+                                                                returns.push(v166);
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                        let v406 = C::remat(ctx, arg0);
+                                        // Rule at src/opts/remat.isle line 4.
+                                        returns.push(v406);
+                                    }
+                                }
+                                _ => {}
+                            }
+                        }
+                        let v10 = C::inst_data_etor(ctx, v7.1);
+                        let mut v10 = v10;
+                        while let Some(v11) = v10.next(ctx) {
+                            if let &InstructionData::UnaryImm {
+                                opcode: ref v14,
+                                imm: v15,
+                            } = &v11.1
+                            {
+                                if let &Opcode::Iconst = v14 {
+                                    let v16 = C::u64_from_imm64(ctx, v15);
+                                    if v16 == 0x0 {
+                                        if v2.0 == v11.0 {
+                                            let v17 = C::subsume(ctx, v7.0);
+                                            // Rule at src/opts/arithmetic.isle line 5.
+                                            returns.push(v17);
+                                        }
+                                    }
+                                    let v406 = C::remat(ctx, arg0);
+                                    // Rule at src/opts/remat.isle line 6.
+                                    returns.push(v406);
+                                }
+                            }
+                        }
+                    }
+                    &Opcode::Isub => {
+                        let v7 = C::unpack_value_array_2(ctx, v6);
+                        let v18 = C::inst_data_etor(ctx, v7.0);
+                        let mut v18 = v18;
+                        while let Some(v19) = v18.next(ctx) {
+                            match &v19.1 {
+                                &InstructionData::Binary {
+                                    opcode: ref v123,
+                                    args: ref v124,
+                                } => {
+                                    match v123 {
+                                        &Opcode::Iadd => {
+                                            if v2.0 == v19.0 {
+                                                let v10 = C::inst_data_etor(ctx, v7.1);
+                                                let mut v10 = v10;
+                                                while let Some(v11) = v10.next(ctx) {
+                                                    if let &InstructionData::UnaryImm {
+                                                        opcode: ref v14,
+                                                        imm: v15,
+                                                    } = &v11.1
+                                                    {
+                                                        if let &Opcode::Iconst = v14 {
+                                                            if v2.0 == v11.0 {
+                                                                let v125 = C::unpack_value_array_2(
+                                                                    ctx, v124,
+                                                                );
+                                                                let v135 =
+                                                                    C::inst_data_etor(ctx, v125.1);
+                                                                let mut v135 = v135;
+                                                                while let Some(v136) =
+                                                                    v135.next(ctx)
+                                                                {
+                                                                    if let &InstructionData::UnaryImm {
+                                                                        opcode: ref v139,
+                                                                        imm: v140,
+                                                                    } = &v136.1 {
+                                                                        if let &Opcode::Iconst = v139 {
+                                                                            if v2.0 == v136.0 {
+                                                                                let v16 = C::u64_from_imm64(ctx, v15);
+                                                                                let v141 = C::u64_from_imm64(ctx, v140);
+                                                                                let v270 = C::u64_sub(ctx, v16, v141);
+                                                                                let v271 = C::imm64_masked(ctx, v2.0, v270);
+                                                                                let v272 = constructor_iconst(ctx, v2.0, v271);
+                                                                                let v273 = constructor_isub(ctx, v2.0, v125.0, v272);
+                                                                                // Rule at src/opts/cprop.isle line 143.
+                                                                                returns.push(v273);
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                        &Opcode::Isub => {
+                                            if v2.0 == v19.0 {
+                                                let v10 = C::inst_data_etor(ctx, v7.1);
+                                                let mut v10 = v10;
+                                                while let Some(v11) = v10.next(ctx) {
+                                                    if let &InstructionData::UnaryImm {
+                                                        opcode: ref v14,
+                                                        imm: v15,
+                                                    } = &v11.1
+                                                    {
+                                                        if let &Opcode::Iconst = v14 {
+                                                            if v2.0 == v11.0 {
+                                                                let v125 = C::unpack_value_array_2(
+                                                                    ctx, v124,
+                                                                );
+                                                                let v135 =
+                                                                    C::inst_data_etor(ctx, v125.1);
+                                                                let mut v135 = v135;
+                                                                while let Some(v136) =
+                                                                    v135.next(ctx)
+                                                                {
+                                                                    if let &InstructionData::UnaryImm {
+                                                                        opcode: ref v139,
+                                                                        imm: v140,
+                                                                    } = &v136.1 {
+                                                                        if let &Opcode::Iconst = v139 {
+                                                                            if v2.0 == v136.0 {
+                                                                                let v141 = C::u64_from_imm64(ctx, v140);
+                                                                                let v16 = C::u64_from_imm64(ctx, v15);
+                                                                                let v259 = C::u64_add(ctx, v141, v16);
+                                                                                let v260 = C::imm64_masked(ctx, v2.0, v259);
+                                                                                let v261 = constructor_iconst(ctx, v2.0, v260);
+                                                                                let v262 = constructor_isub(ctx, v2.0, v125.0, v261);
+                                                                                // Rule at src/opts/cprop.isle line 135.
+                                                                                returns.push(v262);
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                }
+                                                                let v156 =
+                                                                    C::inst_data_etor(ctx, v125.0);
+                                                                let mut v156 = v156;
+                                                                while let Some(v157) =
+                                                                    v156.next(ctx)
+                                                                {
+                                                                    if let &InstructionData::UnaryImm {
+                                                                        opcode: ref v263,
+                                                                        imm: v264,
+                                                                    } = &v157.1 {
+                                                                        if let &Opcode::Iconst = v263 {
+                                                                            if v2.0 == v157.0 {
+                                                                                let v265 = C::u64_from_imm64(ctx, v264);
+                                                                                let v16 = C::u64_from_imm64(ctx, v15);
+                                                                                let v266 = C::u64_sub(ctx, v265, v16);
+                                                                                let v267 = C::imm64_masked(ctx, v2.0, v266);
+                                                                                let v268 = constructor_iconst(ctx, v2.0, v267);
+                                                                                let v269 = constructor_isub(ctx, v2.0, v268, v125.1);
+                                                                                // Rule at src/opts/cprop.isle line 139.
+                                                                                returns.push(v269);
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                        _ => {}
+                                    }
+                                }
+                                &InstructionData::Unary {
+                                    opcode: ref v36,
+                                    arg: v37,
+                                } => {
+                                    if let &Opcode::Bnot = v36 {
+                                        if v2.0 == v19.0 {
+                                            let v10 = C::inst_data_etor(ctx, v7.1);
+                                            let mut v10 = v10;
+                                            while let Some(v11) = v10.next(ctx) {
+                                                if let &InstructionData::UnaryImm {
+                                                    opcode: ref v14,
+                                                    imm: v15,
+                                                } = &v11.1
+                                                {
+                                                    if let &Opcode::Iconst = v14 {
+                                                        let v52 =
+                                                            C::i64_sextend_imm64(ctx, v2.0, v15);
+                                                        if v52 == -0x1 {
+                                                            if v2.0 == v11.0 {
+                                                                let v55 = constructor_ineg(
+                                                                    ctx, v2.0, v37,
+                                                                );
+                                                                // Rule at src/opts/arithmetic.isle line 75.
+                                                                returns.push(v55);
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                                &InstructionData::UnaryImm {
+                                    opcode: ref v22,
+                                    imm: v23,
+                                } => {
+                                    if let &Opcode::Iconst = v22 {
+                                        if v2.0 == v19.0 {
+                                            let v24 = C::u64_from_imm64(ctx, v23);
+                                            if v24 == 0x0 {
+                                                let v26 = constructor_ineg(ctx, v2.0, v7.1);
+                                                // Rule at src/opts/arithmetic.isle line 19.
+                                                returns.push(v26);
+                                            }
+                                            let v249 = constructor_isub(ctx, v2.0, v7.1, v7.0);
+                                            let v250 = constructor_ineg(ctx, v2.0, v249);
+                                            // Rule at src/opts/cprop.isle line 99.
+                                            returns.push(v250);
+                                        }
+                                        let v44 = C::fits_in_64(ctx, v2.0);
+                                        if let Some(v45) = v44 {
+                                            if v19.0 == v45 {
+                                                let v10 = C::inst_data_etor(ctx, v7.1);
+                                                let mut v10 = v10;
+                                                while let Some(v11) = v10.next(ctx) {
+                                                    if let &InstructionData::UnaryImm {
+                                                        opcode: ref v14,
+                                                        imm: v15,
+                                                    } = &v11.1
+                                                    {
+                                                        if let &Opcode::Iconst = v14 {
+                                                            if v11.0 == v19.0 {
+                                                                let v24 =
+                                                                    C::u64_from_imm64(ctx, v23);
+                                                                let v16 =
+                                                                    C::u64_from_imm64(ctx, v15);
+                                                                let v167 =
+                                                                    C::u64_sub(ctx, v24, v16);
+                                                                let v168 =
+                                                                    C::imm64_masked(ctx, v45, v167);
+                                                                let v169 = constructor_iconst(
+                                                                    ctx, v45, v168,
+                                                                );
+                                                                let v170 = C::subsume(ctx, v169);
+                                                                // Rule at src/opts/cprop.isle line 9.
+                                                                returns.push(v170);
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                        let v406 = C::remat(ctx, arg0);
+                                        // Rule at src/opts/remat.isle line 8.
+                                        returns.push(v406);
+                                    }
+                                }
+                                _ => {}
+                            }
+                        }
+                        let v10 = C::inst_data_etor(ctx, v7.1);
+                        let mut v10 = v10;
+                        while let Some(v11) = v10.next(ctx) {
+                            if let &InstructionData::UnaryImm {
+                                opcode: ref v14,
+                                imm: v15,
+                            } = &v11.1
+                            {
+                                if let &Opcode::Iconst = v14 {
+                                    let v16 = C::u64_from_imm64(ctx, v15);
+                                    if v16 == 0x0 {
+                                        if v2.0 == v11.0 {
+                                            let v17 = C::subsume(ctx, v7.0);
+                                            // Rule at src/opts/arithmetic.isle line 14.
+                                            returns.push(v17);
+                                        }
+                                    }
+                                    let v406 = C::remat(ctx, arg0);
+                                    // Rule at src/opts/remat.isle line 10.
+                                    returns.push(v406);
+                                }
+                            }
+                        }
+                        if v7.0 == v7.1 {
+                            let v44 = C::fits_in_64(ctx, v2.0);
+                            if let Some(v45) = v44 {
+                                let v46 = C::ty_int(ctx, v45);
+                                if let Some(v47) = v46 {
+                                    let v49 = C::imm64(ctx, 0x0);
+                                    let v50 = constructor_iconst(ctx, v47, v49);
+                                    let v51 = C::subsume(ctx, v50);
+                                    // Rule at src/opts/arithmetic.isle line 40.
+                                    returns.push(v51);
+                                }
+                            }
+                        }
+                    }
+                    &Opcode::Imul => {
+                        let v7 = C::unpack_value_array_2(ctx, v6);
+                        let v18 = C::inst_data_etor(ctx, v7.0);
+                        let mut v18 = v18;
+                        while let Some(v19) = v18.next(ctx) {
+                            match &v19.1 {
+                                &InstructionData::Binary {
+                                    opcode: ref v123,
+                                    args: ref v124,
+                                } => {
+                                    if let &Opcode::Imul = v123 {
+                                        if v2.0 == v19.0 {
+                                            let v10 = C::inst_data_etor(ctx, v7.1);
+                                            let mut v10 = v10;
+                                            while let Some(v11) = v10.next(ctx) {
+                                                if let &InstructionData::UnaryImm {
+                                                    opcode: ref v14,
+                                                    imm: v15,
+                                                } = &v11.1
+                                                {
+                                                    if let &Opcode::Iconst = v14 {
+                                                        if v2.0 == v11.0 {
+                                                            let v125 =
+                                                                C::unpack_value_array_2(ctx, v124);
+                                                            let v135 =
+                                                                C::inst_data_etor(ctx, v125.1);
+                                                            let mut v135 = v135;
+                                                            while let Some(v136) = v135.next(ctx) {
+                                                                if let &InstructionData::UnaryImm {
+                                                                    opcode: ref v139,
+                                                                    imm: v140,
+                                                                } = &v136.1 {
+                                                                    if let &Opcode::Iconst = v139 {
+                                                                        if v2.0 == v136.0 {
+                                                                            let v279 = constructor_imul(ctx, v2.0, v125.1, v7.1);
+                                                                            let v280 = constructor_imul(ctx, v2.0, v125.0, v279);
+                                                                            // Rule at src/opts/cprop.isle line 156.
+                                                                            returns.push(v280);
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                                &InstructionData::Unary {
+                                    opcode: ref v36,
+                                    arg: v37,
+                                } => {
+                                    if let &Opcode::Ineg = v36 {
+                                        if v2.0 == v19.0 {
+                                            let v10 = C::inst_data_etor(ctx, v7.1);
+                                            let mut v10 = v10;
+                                            while let Some(v11) = v10.next(ctx) {
+                                                if let &InstructionData::Unary {
+                                                    opcode: ref v38,
+                                                    arg: v39,
+                                                } = &v11.1
+                                                {
+                                                    if let &Opcode::Ineg = v38 {
+                                                        if v2.0 == v11.0 {
+                                                            let v40 = constructor_imul(
+                                                                ctx, v2.0, v37, v39,
+                                                            );
+                                                            let v41 = C::subsume(ctx, v40);
+                                                            // Rule at src/opts/arithmetic.isle line 28.
+                                                            returns.push(v41);
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                                &InstructionData::UnaryImm {
+                                    opcode: ref v22,
+                                    imm: v23,
+                                } => {
+                                    if let &Opcode::Iconst = v22 {
+                                        if v2.0 == v19.0 {
+                                            let v24 = C::u64_from_imm64(ctx, v23);
+                                            match v24 {
+                                                0x0 => {
+                                                    let v17 = C::subsume(ctx, v7.0);
+                                                    // Rule at src/opts/arithmetic.isle line 57.
+                                                    returns.push(v17);
+                                                }
+                                                0x1 => {
+                                                    let v25 = C::subsume(ctx, v7.1);
+                                                    // Rule at src/opts/arithmetic.isle line 47.
+                                                    returns.push(v25);
+                                                }
+                                                _ => {}
+                                            }
+                                            let v54 = C::i64_sextend_imm64(ctx, v2.0, v23);
+                                            if v54 == -0x1 {
+                                                let v26 = constructor_ineg(ctx, v2.0, v7.1);
+                                                // Rule at src/opts/arithmetic.isle line 66.
+                                                returns.push(v26);
+                                            }
+                                            let v251 = constructor_imul(ctx, v2.0, v7.1, v7.0);
+                                            // Rule at src/opts/cprop.isle line 102.
+                                            returns.push(v251);
+                                        }
+                                        let v44 = C::fits_in_64(ctx, v2.0);
+                                        if let Some(v45) = v44 {
+                                            if v19.0 == v45 {
+                                                let v10 = C::inst_data_etor(ctx, v7.1);
+                                                let mut v10 = v10;
+                                                while let Some(v11) = v10.next(ctx) {
+                                                    if let &InstructionData::UnaryImm {
+                                                        opcode: ref v14,
+                                                        imm: v15,
+                                                    } = &v11.1
+                                                    {
+                                                        if let &Opcode::Iconst = v14 {
+                                                            if v11.0 == v19.0 {
+                                                                let v24 =
+                                                                    C::u64_from_imm64(ctx, v23);
+                                                                let v16 =
+                                                                    C::u64_from_imm64(ctx, v15);
+                                                                let v171 =
+                                                                    C::u64_mul(ctx, v24, v16);
+                                                                let v172 =
+                                                                    C::imm64_masked(ctx, v45, v171);
+                                                                let v173 = constructor_iconst(
+                                                                    ctx, v45, v172,
+                                                                );
+                                                                let v174 = C::subsume(ctx, v173);
+                                                                // Rule at src/opts/cprop.isle line 15.
+                                                                returns.push(v174);
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                        let v82 = C::simm32(ctx, v23);
+                                        if let Some(v83) = v82 {
+                                            if v83 == 0x2 {
+                                                let v84 = constructor_iadd(ctx, v2.0, v7.1, v7.1);
+                                                // Rule at src/opts/arithmetic.isle line 105.
+                                                returns.push(v84);
+                                            }
+                                        }
+                                        let v90 = C::imm64_power_of_two(ctx, v23);
+                                        if let Some(v91) = v90 {
+                                            let v92 = C::imm64(ctx, v91);
+                                            let v93 = constructor_iconst(ctx, v2.0, v92);
+                                            let v94 = constructor_ishl(ctx, v2.0, v7.1, v93);
+                                            // Rule at src/opts/arithmetic.isle line 114.
+                                            returns.push(v94);
+                                        }
+                                    }
+                                }
+                                _ => {}
+                            }
+                        }
+                        let v10 = C::inst_data_etor(ctx, v7.1);
+                        let mut v10 = v10;
+                        while let Some(v11) = v10.next(ctx) {
+                            if let &InstructionData::UnaryImm {
+                                opcode: ref v14,
+                                imm: v15,
+                            } = &v11.1
+                            {
+                                if let &Opcode::Iconst = v14 {
+                                    if v2.0 == v11.0 {
+                                        let v16 = C::u64_from_imm64(ctx, v15);
+                                        match v16 {
+                                            0x0 => {
+                                                let v25 = C::subsume(ctx, v7.1);
+                                                // Rule at src/opts/arithmetic.isle line 53.
+                                                returns.push(v25);
+                                            }
+                                            0x1 => {
+                                                let v17 = C::subsume(ctx, v7.0);
+                                                // Rule at src/opts/arithmetic.isle line 43.
+                                                returns.push(v17);
+                                            }
+                                            _ => {}
+                                        }
+                                        let v52 = C::i64_sextend_imm64(ctx, v2.0, v15);
+                                        if v52 == -0x1 {
+                                            let v53 = constructor_ineg(ctx, v2.0, v7.0);
+                                            // Rule at src/opts/arithmetic.isle line 63.
+                                            returns.push(v53);
+                                        }
+                                    }
+                                    let v79 = C::simm32(ctx, v15);
+                                    if let Some(v80) = v79 {
+                                        if v80 == 0x2 {
+                                            let v81 = constructor_iadd(ctx, v2.0, v7.0, v7.0);
+                                            // Rule at src/opts/arithmetic.isle line 103.
+                                            returns.push(v81);
+                                        }
+                                    }
+                                    let v85 = C::imm64_power_of_two(ctx, v15);
+                                    if let Some(v86) = v85 {
+                                        let v87 = C::imm64(ctx, v86);
+                                        let v88 = constructor_iconst(ctx, v2.0, v87);
+                                        let v89 = constructor_ishl(ctx, v2.0, v7.0, v88);
+                                        // Rule at src/opts/arithmetic.isle line 112.
+                                        returns.push(v89);
+                                    }
+                                }
+                            }
+                        }
+                    }
+                    &Opcode::Udiv => {
+                        let v7 = C::unpack_value_array_2(ctx, v6);
+                        let v10 = C::inst_data_etor(ctx, v7.1);
+                        let mut v10 = v10;
+                        while let Some(v11) = v10.next(ctx) {
+                            if let &InstructionData::UnaryImm {
+                                opcode: ref v14,
+                                imm: v15,
+                            } = &v11.1
+                            {
+                                if let &Opcode::Iconst = v14 {
+                                    let v16 = C::u64_from_imm64(ctx, v15);
+                                    if v16 == 0x1 {
+                                        if v2.0 == v11.0 {
+                                            let v17 = C::subsume(ctx, v7.0);
+                                            // Rule at src/opts/arithmetic.isle line 94.
+                                            returns.push(v17);
+                                        }
+                                    }
+                                    let v44 = C::fits_in_64(ctx, v2.0);
+                                    if let Some(v45) = v44 {
+                                        if v11.0 == v45 {
+                                            let v18 = C::inst_data_etor(ctx, v7.0);
+                                            let mut v18 = v18;
+                                            while let Some(v19) = v18.next(ctx) {
+                                                if let &InstructionData::UnaryImm {
+                                                    opcode: ref v22,
+                                                    imm: v23,
+                                                } = &v19.1
+                                                {
+                                                    if let &Opcode::Iconst = v22 {
+                                                        let v24 = C::u64_from_imm64(ctx, v23);
+                                                        let v180 = C::u64_udiv(ctx, v24, v16);
+                                                        if let Some(v181) = v180 {
+                                                            if v11.0 == v19.0 {
+                                                                let v182 =
+                                                                    C::imm64_masked(ctx, v45, v181);
+                                                                let v183 = constructor_iconst(
+                                                                    ctx, v45, v182,
+                                                                );
+                                                                let v184 = C::subsume(ctx, v183);
+                                                                // Rule at src/opts/cprop.isle line 28.
+                                                                returns.push(v184);
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                            }
+                        }
+                    }
+                    &Opcode::Sdiv => {
+                        let v7 = C::unpack_value_array_2(ctx, v6);
+                        let v10 = C::inst_data_etor(ctx, v7.1);
+                        let mut v10 = v10;
+                        while let Some(v11) = v10.next(ctx) {
+                            if let &InstructionData::UnaryImm {
+                                opcode: ref v14,
+                                imm: v15,
+                            } = &v11.1
+                            {
+                                if let &Opcode::Iconst = v14 {
+                                    let v16 = C::u64_from_imm64(ctx, v15);
+                                    if v16 == 0x1 {
+                                        if v2.0 == v11.0 {
+                                            let v17 = C::subsume(ctx, v7.0);
+                                            // Rule at src/opts/arithmetic.isle line 90.
+                                            returns.push(v17);
+                                        }
+                                    }
+                                    let v44 = C::fits_in_64(ctx, v2.0);
+                                    if let Some(v45) = v44 {
+                                        if v11.0 == v45 {
+                                            let v18 = C::inst_data_etor(ctx, v7.0);
+                                            let mut v18 = v18;
+                                            while let Some(v19) = v18.next(ctx) {
+                                                if let &InstructionData::UnaryImm {
+                                                    opcode: ref v22,
+                                                    imm: v23,
+                                                } = &v19.1
+                                                {
+                                                    if let &Opcode::Iconst = v22 {
+                                                        let v24 = C::u64_from_imm64(ctx, v23);
+                                                        let v175 = C::u64_sdiv(ctx, v24, v16);
+                                                        if let Some(v176) = v175 {
+                                                            if v11.0 == v19.0 {
+                                                                let v177 =
+                                                                    C::imm64_masked(ctx, v45, v176);
+                                                                let v178 = constructor_iconst(
+                                                                    ctx, v45, v177,
+                                                                );
+                                                                let v179 = C::subsume(ctx, v178);
+                                                                // Rule at src/opts/cprop.isle line 21.
+                                                                returns.push(v179);
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                            }
+                        }
+                    }
+                    &Opcode::Band => {
+                        let v7 = C::unpack_value_array_2(ctx, v6);
+                        let v18 = C::inst_data_etor(ctx, v7.0);
+                        let mut v18 = v18;
+                        while let Some(v19) = v18.next(ctx) {
+                            match &v19.1 {
+                                &InstructionData::Binary {
+                                    opcode: ref v123,
+                                    args: ref v124,
+                                } => {
+                                    if let &Opcode::Band = v123 {
+                                        if v2.0 == v19.0 {
+                                            let v10 = C::inst_data_etor(ctx, v7.1);
+                                            let mut v10 = v10;
+                                            while let Some(v11) = v10.next(ctx) {
+                                                if let &InstructionData::UnaryImm {
+                                                    opcode: ref v14,
+                                                    imm: v15,
+                                                } = &v11.1
+                                                {
+                                                    if let &Opcode::Iconst = v14 {
+                                                        if v2.0 == v11.0 {
+                                                            let v125 =
+                                                                C::unpack_value_array_2(ctx, v124);
+                                                            let v135 =
+                                                                C::inst_data_etor(ctx, v125.1);
+                                                            let mut v135 = v135;
+                                                            while let Some(v136) = v135.next(ctx) {
+                                                                if let &InstructionData::UnaryImm {
+                                                                    opcode: ref v139,
+                                                                    imm: v140,
+                                                                } = &v136.1 {
+                                                                    if let &Opcode::Iconst = v139 {
+                                                                        if v2.0 == v136.0 {
+                                                                            let v283 = constructor_band(ctx, v2.0, v125.1, v7.1);
+                                                                            let v284 = constructor_band(ctx, v2.0, v125.0, v283);
+                                                                            // Rule at src/opts/cprop.isle line 162.
+                                                                            returns.push(v284);
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                                &InstructionData::IntCompare {
+                                    opcode: ref v367,
+                                    args: ref v368,
+                                    cond: ref v369,
+                                } => {
+                                    if let &Opcode::Icmp = v367 {
+                                        let v10 = C::inst_data_etor(ctx, v7.1);
+                                        let mut v10 = v10;
+                                        while let Some(v11) = v10.next(ctx) {
+                                            match &v11.1 {
+                                                &InstructionData::IntCompare {
+                                                    opcode: ref v392,
+                                                    args: ref v393,
+                                                    cond: ref v394,
+                                                } => {
+                                                    if let &Opcode::Icmp = v392 {
+                                                        let v44 = C::fits_in_64(ctx, v2.0);
+                                                        if let Some(v45) = v44 {
+                                                            let v398 = constructor_intcc_comparable(
+                                                                ctx, v369, v394,
+                                                            );
+                                                            if let Some(v399) = v398 {
+                                                                if v11.0 == v19.0 {
+                                                                    if v11.0 == v45 {
+                                                                        let v370 =
+                                                                            C::unpack_value_array_2(
+                                                                                ctx, v368,
+                                                                            );
+                                                                        let v395 =
+                                                                            C::unpack_value_array_2(
+                                                                                ctx, v393,
+                                                                            );
+                                                                        if v370.0 == v395.0 {
+                                                                            if v370.1 == v395.1 {
+                                                                                let v400 = constructor_decompose_intcc(ctx, v369);
+                                                                                let v401 = constructor_decompose_intcc(ctx, v394);
+                                                                                let v402 =
+                                                                                    C::u64_and(
+                                                                                        ctx, v400,
+                                                                                        v401,
+                                                                                    );
+                                                                                let v403 = constructor_compose_icmp(ctx, v45, v402, v399, v370.0, v370.1);
+                                                                                // Rule at src/opts/icmp.isle line 128.
+                                                                                returns.push(v403);
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                                &InstructionData::UnaryImm {
+                                                    opcode: ref v14,
+                                                    imm: v15,
+                                                } => {
+                                                    if let &Opcode::Iconst = v14 {
+                                                        let v16 = C::u64_from_imm64(ctx, v15);
+                                                        if v16 == 0x1 {
+                                                            let v365 = C::ty_int(ctx, v2.0);
+                                                            if let Some(v366) = v365 {
+                                                                // Rule at src/opts/icmp.isle line 39.
+                                                                returns.push(v7.0);
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                                _ => {}
+                                            }
+                                        }
+                                    }
+                                }
+                                &InstructionData::Unary {
+                                    opcode: ref v36,
+                                    arg: v37,
+                                } => {
+                                    match v36 {
+                                        &Opcode::Bnot => {
+                                            let v44 = C::fits_in_64(ctx, v2.0);
+                                            if let Some(v45) = v44 {
+                                                let v46 = C::ty_int(ctx, v45);
+                                                if let Some(v47) = v46 {
+                                                    if v7.1 == v37 {
+                                                        if v19.0 == v47 {
+                                                            let v49 = C::imm64(ctx, 0x0);
+                                                            let v50 =
+                                                                constructor_iconst(ctx, v47, v49);
+                                                            let v51 = C::subsume(ctx, v50);
+                                                            // Rule at src/opts/bitops.isle line 50.
+                                                            returns.push(v51);
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                        &Opcode::Uextend => {
+                                            let v10 = C::inst_data_etor(ctx, v7.1);
+                                            let mut v10 = v10;
+                                            while let Some(v11) = v10.next(ctx) {
+                                                if let &InstructionData::UnaryImm {
+                                                    opcode: ref v14,
+                                                    imm: v15,
+                                                } = &v11.1
+                                                {
+                                                    if let &Opcode::Iconst = v14 {
+                                                        let v16 = C::u64_from_imm64(ctx, v15);
+                                                        if v16 == 0x1 {
+                                                            let v365 = C::ty_int(ctx, v2.0);
+                                                            if let Some(v366) = v365 {
+                                                                let v373 =
+                                                                    C::inst_data_etor(ctx, v37);
+                                                                let mut v373 = v373;
+                                                                while let Some(v374) =
+                                                                    v373.next(ctx)
+                                                                {
+                                                                    if let &InstructionData::IntCompare {
+                                                                        opcode: ref v377,
+                                                                        args: ref v378,
+                                                                        cond: ref v379,
+                                                                    } = &v374.1 {
+                                                                        if let &Opcode::Icmp = v377 {
+                                                                            // Rule at src/opts/icmp.isle line 44.
+                                                                            returns.push(v7.0);
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                        let v320 = C::value_type(ctx, v37);
+                                                        let v321 = C::ty_mask(ctx, v320);
+                                                        let v322 = C::u64_and(ctx, v16, v321);
+                                                        let v323 = C::u64_eq(ctx, v321, v322);
+                                                        if v323 == true {
+                                                            // Rule at src/opts/extends.isle line 9.
+                                                            returns.push(v7.0);
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                        &Opcode::Sextend => {
+                                            let v10 = C::inst_data_etor(ctx, v7.1);
+                                            let mut v10 = v10;
+                                            while let Some(v11) = v10.next(ctx) {
+                                                if let &InstructionData::UnaryImm {
+                                                    opcode: ref v14,
+                                                    imm: v15,
+                                                } = &v11.1
+                                                {
+                                                    if let &Opcode::Iconst = v14 {
+                                                        let v16 = C::u64_from_imm64(ctx, v15);
+                                                        let v320 = C::value_type(ctx, v37);
+                                                        let v321 = C::ty_mask(ctx, v320);
+                                                        let v324 = C::u64_eq(ctx, v16, v321);
+                                                        if v324 == true {
+                                                            let v325 =
+                                                                constructor_uextend(ctx, v2.0, v37);
+                                                            // Rule at src/opts/extends.isle line 15.
+                                                            returns.push(v325);
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                        _ => {}
+                                    }
+                                }
+                                &InstructionData::UnaryImm {
+                                    opcode: ref v22,
+                                    imm: v23,
+                                } => {
+                                    if let &Opcode::Iconst = v22 {
+                                        if v2.0 == v19.0 {
+                                            let v24 = C::u64_from_imm64(ctx, v23);
+                                            if v24 == 0x0 {
+                                                let v17 = C::subsume(ctx, v7.0);
+                                                // Rule at src/opts/bitops.isle line 48.
+                                                returns.push(v17);
+                                            }
+                                            let v54 = C::i64_sextend_imm64(ctx, v2.0, v23);
+                                            if v54 == -0x1 {
+                                                let v25 = C::subsume(ctx, v7.1);
+                                                // Rule at src/opts/bitops.isle line 42.
+                                                returns.push(v25);
+                                            }
+                                            let v253 = constructor_band(ctx, v2.0, v7.1, v7.0);
+                                            // Rule at src/opts/cprop.isle line 109.
+                                            returns.push(v253);
+                                        }
+                                        let v44 = C::fits_in_64(ctx, v2.0);
+                                        if let Some(v45) = v44 {
+                                            if v19.0 == v45 {
+                                                let v10 = C::inst_data_etor(ctx, v7.1);
+                                                let mut v10 = v10;
+                                                while let Some(v11) = v10.next(ctx) {
+                                                    if let &InstructionData::UnaryImm {
+                                                        opcode: ref v14,
+                                                        imm: v15,
+                                                    } = &v11.1
+                                                    {
+                                                        if let &Opcode::Iconst = v14 {
+                                                            if v11.0 == v19.0 {
+                                                                let v24 =
+                                                                    C::u64_from_imm64(ctx, v23);
+                                                                let v16 =
+                                                                    C::u64_from_imm64(ctx, v15);
+                                                                let v189 =
+                                                                    C::u64_and(ctx, v24, v16);
+                                                                let v190 =
+                                                                    C::imm64_masked(ctx, v45, v189);
+                                                                let v191 = constructor_iconst(
+                                                                    ctx, v45, v190,
+                                                                );
+                                                                let v192 = C::subsume(ctx, v191);
+                                                                // Rule at src/opts/cprop.isle line 41.
+                                                                returns.push(v192);
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                        let v406 = C::remat(ctx, arg0);
+                                        // Rule at src/opts/remat.isle line 12.
+                                        returns.push(v406);
+                                    }
+                                }
+                                _ => {}
+                            }
+                        }
+                        let v10 = C::inst_data_etor(ctx, v7.1);
+                        let mut v10 = v10;
+                        while let Some(v11) = v10.next(ctx) {
+                            match &v11.1 {
+                                &InstructionData::Unary {
+                                    opcode: ref v38,
+                                    arg: v39,
+                                } => {
+                                    if let &Opcode::Bnot = v38 {
+                                        if v7.0 == v39 {
+                                            let v44 = C::fits_in_64(ctx, v2.0);
+                                            if let Some(v45) = v44 {
+                                                let v46 = C::ty_int(ctx, v45);
+                                                if let Some(v47) = v46 {
+                                                    if v11.0 == v47 {
+                                                        let v49 = C::imm64(ctx, 0x0);
+                                                        let v50 = constructor_iconst(ctx, v47, v49);
+                                                        let v51 = C::subsume(ctx, v50);
+                                                        // Rule at src/opts/bitops.isle line 49.
+                                                        returns.push(v51);
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                                &InstructionData::UnaryImm {
+                                    opcode: ref v14,
+                                    imm: v15,
+                                } => {
+                                    if let &Opcode::Iconst = v14 {
+                                        if v2.0 == v11.0 {
+                                            let v16 = C::u64_from_imm64(ctx, v15);
+                                            if v16 == 0x0 {
+                                                let v25 = C::subsume(ctx, v7.1);
+                                                // Rule at src/opts/bitops.isle line 47.
+                                                returns.push(v25);
+                                            }
+                                            let v52 = C::i64_sextend_imm64(ctx, v2.0, v15);
+                                            if v52 == -0x1 {
+                                                let v17 = C::subsume(ctx, v7.0);
+                                                // Rule at src/opts/bitops.isle line 39.
+                                                returns.push(v17);
+                                            }
+                                        }
+                                        let v406 = C::remat(ctx, arg0);
+                                        // Rule at src/opts/remat.isle line 14.
+                                        returns.push(v406);
+                                    }
+                                }
+                                _ => {}
+                            }
+                        }
+                        if v7.0 == v7.1 {
+                            let v17 = C::subsume(ctx, v7.0);
+                            // Rule at src/opts/bitops.isle line 38.
+                            returns.push(v17);
+                        }
+                    }
+                    &Opcode::Bor => {
+                        let v7 = C::unpack_value_array_2(ctx, v6);
+                        let v18 = C::inst_data_etor(ctx, v7.0);
+                        let mut v18 = v18;
+                        while let Some(v19) = v18.next(ctx) {
+                            match &v19.1 {
+                                &InstructionData::Binary {
+                                    opcode: ref v123,
+                                    args: ref v124,
+                                } => {
+                                    match v123 {
+                                        &Opcode::Band => {
+                                            if v2.0 == v19.0 {
+                                                let v10 = C::inst_data_etor(ctx, v7.1);
+                                                let mut v10 = v10;
+                                                while let Some(v11) = v10.next(ctx) {
+                                                    match &v11.1 {
+                                                        &InstructionData::Unary {
+                                                            opcode: ref v38,
+                                                            arg: v39,
+                                                        } => {
+                                                            if let &Opcode::Bnot = v38 {
+                                                                if v2.0 == v11.0 {
+                                                                    let v125 =
+                                                                        C::unpack_value_array_2(
+                                                                            ctx, v124,
+                                                                        );
+                                                                    if v39 == v125.1 {
+                                                                        let v128 = constructor_bor(
+                                                                            ctx, v2.0, v125.0, v7.1,
+                                                                        );
+                                                                        // Rule at src/opts/bitops.isle line 64.
+                                                                        returns.push(v128);
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                        &InstructionData::UnaryImm {
+                                                            opcode: ref v14,
+                                                            imm: v15,
+                                                        } => {
+                                                            if let &Opcode::Iconst = v14 {
+                                                                if v2.0 == v11.0 {
+                                                                    let v125 =
+                                                                        C::unpack_value_array_2(
+                                                                            ctx, v124,
+                                                                        );
+                                                                    let v135 = C::inst_data_etor(
+                                                                        ctx, v125.1,
+                                                                    );
+                                                                    let mut v135 = v135;
+                                                                    while let Some(v136) =
+                                                                        v135.next(ctx)
+                                                                    {
+                                                                        if let &InstructionData::UnaryImm {
+                                                                            opcode: ref v139,
+                                                                            imm: v140,
+                                                                        } = &v136.1 {
+                                                                            if let &Opcode::Iconst = v139 {
+                                                                                let v142 = C::ty_mask(ctx, v2.0);
+                                                                                let v16 = C::u64_from_imm64(ctx, v15);
+                                                                                let v143 = C::u64_and(ctx, v142, v16);
+                                                                                let v141 = C::u64_from_imm64(ctx, v140);
+                                                                                let v144 = C::u64_not(ctx, v141);
+                                                                                let v145 = C::u64_and(ctx, v142, v144);
+                                                                                let v146 = C::u64_eq(ctx, v143, v145);
+                                                                                if v146 == true {
+                                                                                    if v2.0 == v136.0 {
+                                                                                        let v128 = constructor_bor(ctx, v2.0, v125.0, v7.1);
+                                                                                        // Rule at src/opts/bitops.isle line 84.
+                                                                                        returns.push(v128);
+                                                                                    }
+                                                                                }
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                        _ => {}
+                                                    }
+                                                }
+                                            }
+                                        }
+                                        &Opcode::Bor => {
+                                            if v2.0 == v19.0 {
+                                                let v10 = C::inst_data_etor(ctx, v7.1);
+                                                let mut v10 = v10;
+                                                while let Some(v11) = v10.next(ctx) {
+                                                    if let &InstructionData::UnaryImm {
+                                                        opcode: ref v14,
+                                                        imm: v15,
+                                                    } = &v11.1
+                                                    {
+                                                        if let &Opcode::Iconst = v14 {
+                                                            if v2.0 == v11.0 {
+                                                                let v125 = C::unpack_value_array_2(
+                                                                    ctx, v124,
+                                                                );
+                                                                let v135 =
+                                                                    C::inst_data_etor(ctx, v125.1);
+                                                                let mut v135 = v135;
+                                                                while let Some(v136) =
+                                                                    v135.next(ctx)
+                                                                {
+                                                                    if let &InstructionData::UnaryImm {
+                                                                        opcode: ref v139,
+                                                                        imm: v140,
+                                                                    } = &v136.1 {
+                                                                        if let &Opcode::Iconst = v139 {
+                                                                            if v2.0 == v136.0 {
+                                                                                let v281 = constructor_bor(ctx, v2.0, v125.1, v7.1);
+                                                                                let v282 = constructor_bor(ctx, v2.0, v125.0, v281);
+                                                                                // Rule at src/opts/cprop.isle line 159.
+                                                                                returns.push(v282);
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                        _ => {}
+                                    }
+                                }
+                                &InstructionData::IntCompare {
+                                    opcode: ref v367,
+                                    args: ref v368,
+                                    cond: ref v369,
+                                } => {
+                                    if let &Opcode::Icmp = v367 {
+                                        let v44 = C::fits_in_64(ctx, v2.0);
+                                        if let Some(v45) = v44 {
+                                            if v19.0 == v45 {
+                                                let v10 = C::inst_data_etor(ctx, v7.1);
+                                                let mut v10 = v10;
+                                                while let Some(v11) = v10.next(ctx) {
+                                                    if let &InstructionData::IntCompare {
+                                                        opcode: ref v392,
+                                                        args: ref v393,
+                                                        cond: ref v394,
+                                                    } = &v11.1
+                                                    {
+                                                        if let &Opcode::Icmp = v392 {
+                                                            let v398 = constructor_intcc_comparable(
+                                                                ctx, v369, v394,
+                                                            );
+                                                            if let Some(v399) = v398 {
+                                                                if v11.0 == v19.0 {
+                                                                    let v370 =
+                                                                        C::unpack_value_array_2(
+                                                                            ctx, v368,
+                                                                        );
+                                                                    let v395 =
+                                                                        C::unpack_value_array_2(
+                                                                            ctx, v393,
+                                                                        );
+                                                                    if v370.0 == v395.0 {
+                                                                        if v370.1 == v395.1 {
+                                                                            let v400 = constructor_decompose_intcc(ctx, v369);
+                                                                            let v401 = constructor_decompose_intcc(ctx, v394);
+                                                                            let v404 = C::u64_or(
+                                                                                ctx, v400, v401,
+                                                                            );
+                                                                            let v405 = constructor_compose_icmp(ctx, v45, v404, v399, v370.0, v370.1);
+                                                                            // Rule at src/opts/icmp.isle line 132.
+                                                                            returns.push(v405);
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                                &InstructionData::Unary {
+                                    opcode: ref v36,
+                                    arg: v37,
+                                } => {
+                                    if let &Opcode::Bnot = v36 {
+                                        let v44 = C::fits_in_64(ctx, v2.0);
+                                        if let Some(v45) = v44 {
+                                            let v46 = C::ty_int(ctx, v45);
+                                            if let Some(v47) = v46 {
+                                                if v7.1 == v37 {
+                                                    if v19.0 == v47 {
+                                                        let v115 = C::ty_mask(ctx, v47);
+                                                        let v116 = C::imm64(ctx, v115);
+                                                        let v117 =
+                                                            constructor_iconst(ctx, v47, v116);
+                                                        let v118 = C::subsume(ctx, v117);
+                                                        // Rule at src/opts/bitops.isle line 35.
+                                                        returns.push(v118);
+                                                    }
+                                                }
+                                            }
+                                        }
+                                        if v2.0 == v19.0 {
+                                            let v10 = C::inst_data_etor(ctx, v7.1);
+                                            let mut v10 = v10;
+                                            while let Some(v11) = v10.next(ctx) {
+                                                if let &InstructionData::Binary {
+                                                    opcode: ref v129,
+                                                    args: ref v130,
+                                                } = &v11.1
+                                                {
+                                                    if let &Opcode::Band = v129 {
+                                                        if v2.0 == v11.0 {
+                                                            let v131 =
+                                                                C::unpack_value_array_2(ctx, v130);
+                                                            if v37 == v131.1 {
+                                                                let v134 = constructor_bor(
+                                                                    ctx, v2.0, v131.0, v7.0,
+                                                                );
+                                                                // Rule at src/opts/bitops.isle line 73.
+                                                                returns.push(v134);
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                                &InstructionData::UnaryImm {
+                                    opcode: ref v22,
+                                    imm: v23,
+                                } => {
+                                    if let &Opcode::Iconst = v22 {
+                                        if v2.0 == v19.0 {
+                                            let v24 = C::u64_from_imm64(ctx, v23);
+                                            if v24 == 0x0 {
+                                                let v25 = C::subsume(ctx, v7.1);
+                                                // Rule at src/opts/bitops.isle line 8.
+                                                returns.push(v25);
+                                            }
+                                            let v252 = constructor_bor(ctx, v2.0, v7.1, v7.0);
+                                            // Rule at src/opts/cprop.isle line 106.
+                                            returns.push(v252);
+                                        }
+                                        let v44 = C::fits_in_64(ctx, v2.0);
+                                        if let Some(v45) = v44 {
+                                            if v19.0 == v45 {
+                                                let v10 = C::inst_data_etor(ctx, v7.1);
+                                                let mut v10 = v10;
+                                                while let Some(v11) = v10.next(ctx) {
+                                                    if let &InstructionData::UnaryImm {
+                                                        opcode: ref v14,
+                                                        imm: v15,
+                                                    } = &v11.1
+                                                    {
+                                                        if let &Opcode::Iconst = v14 {
+                                                            if v11.0 == v19.0 {
+                                                                let v24 =
+                                                                    C::u64_from_imm64(ctx, v23);
+                                                                let v16 =
+                                                                    C::u64_from_imm64(ctx, v15);
+                                                                let v185 = C::u64_or(ctx, v24, v16);
+                                                                let v186 =
+                                                                    C::imm64_masked(ctx, v45, v185);
+                                                                let v187 = constructor_iconst(
+                                                                    ctx, v45, v186,
+                                                                );
+                                                                let v188 = C::subsume(ctx, v187);
+                                                                // Rule at src/opts/cprop.isle line 35.
+                                                                returns.push(v188);
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                        let v406 = C::remat(ctx, arg0);
+                                        // Rule at src/opts/remat.isle line 16.
+                                        returns.push(v406);
+                                    }
+                                }
+                                _ => {}
+                            }
+                        }
+                        let v10 = C::inst_data_etor(ctx, v7.1);
+                        let mut v10 = v10;
+                        while let Some(v11) = v10.next(ctx) {
+                            match &v11.1 {
+                                &InstructionData::Unary {
+                                    opcode: ref v38,
+                                    arg: v39,
+                                } => {
+                                    if let &Opcode::Bnot = v38 {
+                                        if v7.0 == v39 {
+                                            let v44 = C::fits_in_64(ctx, v2.0);
+                                            if let Some(v45) = v44 {
+                                                let v46 = C::ty_int(ctx, v45);
+                                                if let Some(v47) = v46 {
+                                                    if v11.0 == v47 {
+                                                        let v115 = C::ty_mask(ctx, v47);
+                                                        let v116 = C::imm64(ctx, v115);
+                                                        let v117 =
+                                                            constructor_iconst(ctx, v47, v116);
+                                                        let v118 = C::subsume(ctx, v117);
+                                                        // Rule at src/opts/bitops.isle line 34.
+                                                        returns.push(v118);
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                                &InstructionData::UnaryImm {
+                                    opcode: ref v14,
+                                    imm: v15,
+                                } => {
+                                    if let &Opcode::Iconst = v14 {
+                                        let v16 = C::u64_from_imm64(ctx, v15);
+                                        if v16 == 0x0 {
+                                            if v2.0 == v11.0 {
+                                                let v17 = C::subsume(ctx, v7.0);
+                                                // Rule at src/opts/bitops.isle line 4.
+                                                returns.push(v17);
+                                            }
+                                        }
+                                        let v406 = C::remat(ctx, arg0);
+                                        // Rule at src/opts/remat.isle line 18.
+                                        returns.push(v406);
+                                    }
+                                }
+                                _ => {}
+                            }
+                        }
+                        if v7.0 == v7.1 {
+                            let v17 = C::subsume(ctx, v7.0);
+                            // Rule at src/opts/bitops.isle line 12.
+                            returns.push(v17);
+                        }
+                    }
+                    &Opcode::Bxor => {
+                        let v7 = C::unpack_value_array_2(ctx, v6);
+                        let v10 = C::inst_data_etor(ctx, v7.1);
+                        let mut v10 = v10;
+                        while let Some(v11) = v10.next(ctx) {
+                            match &v11.1 {
+                                &InstructionData::Unary {
+                                    opcode: ref v38,
+                                    arg: v39,
+                                } => {
+                                    if let &Opcode::Bnot = v38 {
+                                        let v44 = C::fits_in_64(ctx, v2.0);
+                                        if let Some(v45) = v44 {
+                                            let v46 = C::ty_int(ctx, v45);
+                                            if let Some(v47) = v46 {
+                                                if v7.0 == v39 {
+                                                    if v11.0 == v47 {
+                                                        let v115 = C::ty_mask(ctx, v47);
+                                                        let v116 = C::imm64(ctx, v115);
+                                                        let v117 =
+                                                            constructor_iconst(ctx, v47, v116);
+                                                        let v118 = C::subsume(ctx, v117);
+                                                        // Rule at src/opts/bitops.isle line 32.
+                                                        returns.push(v118);
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                                &InstructionData::UnaryImm {
+                                    opcode: ref v14,
+                                    imm: v15,
+                                } => {
+                                    if let &Opcode::Iconst = v14 {
+                                        if v2.0 == v11.0 {
+                                            let v16 = C::u64_from_imm64(ctx, v15);
+                                            if v16 == 0x0 {
+                                                let v17 = C::subsume(ctx, v7.0);
+                                                // Rule at src/opts/bitops.isle line 16.
+                                                returns.push(v17);
+                                            }
+                                            let v52 = C::i64_sextend_imm64(ctx, v2.0, v15);
+                                            if v52 == -0x1 {
+                                                let v147 = constructor_bnot(ctx, v2.0, v7.0);
+                                                // Rule at src/opts/bitops.isle line 92.
+                                                returns.push(v147);
+                                            }
+                                            let v18 = C::inst_data_etor(ctx, v7.0);
+                                            let mut v18 = v18;
+                                            while let Some(v19) = v18.next(ctx) {
+                                                if let &InstructionData::Binary {
+                                                    opcode: ref v123,
+                                                    args: ref v124,
+                                                } = &v19.1
+                                                {
+                                                    if let &Opcode::Bxor = v123 {
+                                                        if v2.0 == v19.0 {
+                                                            let v125 =
+                                                                C::unpack_value_array_2(ctx, v124);
+                                                            let v135 =
+                                                                C::inst_data_etor(ctx, v125.1);
+                                                            let mut v135 = v135;
+                                                            while let Some(v136) = v135.next(ctx) {
+                                                                if let &InstructionData::UnaryImm {
+                                                                    opcode: ref v139,
+                                                                    imm: v140,
+                                                                } = &v136.1 {
+                                                                    if let &Opcode::Iconst = v139 {
+                                                                        if v2.0 == v136.0 {
+                                                                            let v285 = constructor_bxor(ctx, v2.0, v125.1, v7.1);
+                                                                            let v286 = constructor_bxor(ctx, v2.0, v125.0, v285);
+                                                                            // Rule at src/opts/cprop.isle line 165.
+                                                                            returns.push(v286);
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                        let v44 = C::fits_in_64(ctx, v2.0);
+                                        if let Some(v45) = v44 {
+                                            if v11.0 == v45 {
+                                                let v18 = C::inst_data_etor(ctx, v7.0);
+                                                let mut v18 = v18;
+                                                while let Some(v19) = v18.next(ctx) {
+                                                    if let &InstructionData::UnaryImm {
+                                                        opcode: ref v22,
+                                                        imm: v23,
+                                                    } = &v19.1
+                                                    {
+                                                        if let &Opcode::Iconst = v22 {
+                                                            if v11.0 == v19.0 {
+                                                                let v24 =
+                                                                    C::u64_from_imm64(ctx, v23);
+                                                                let v16 =
+                                                                    C::u64_from_imm64(ctx, v15);
+                                                                let v193 =
+                                                                    C::u64_xor(ctx, v24, v16);
+                                                                let v194 =
+                                                                    C::imm64_masked(ctx, v45, v193);
+                                                                let v195 = constructor_iconst(
+                                                                    ctx, v45, v194,
+                                                                );
+                                                                let v196 = C::subsume(ctx, v195);
+                                                                // Rule at src/opts/cprop.isle line 47.
+                                                                returns.push(v196);
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                        let v406 = C::remat(ctx, arg0);
+                                        // Rule at src/opts/remat.isle line 22.
+                                        returns.push(v406);
+                                    }
+                                }
+                                _ => {}
+                            }
+                        }
+                        let v18 = C::inst_data_etor(ctx, v7.0);
+                        let mut v18 = v18;
+                        while let Some(v19) = v18.next(ctx) {
+                            match &v19.1 {
+                                &InstructionData::Unary {
+                                    opcode: ref v36,
+                                    arg: v37,
+                                } => {
+                                    if let &Opcode::Bnot = v36 {
+                                        if v7.1 == v37 {
+                                            let v44 = C::fits_in_64(ctx, v2.0);
+                                            if let Some(v45) = v44 {
+                                                let v46 = C::ty_int(ctx, v45);
+                                                if let Some(v47) = v46 {
+                                                    if v19.0 == v47 {
+                                                        let v115 = C::ty_mask(ctx, v47);
+                                                        let v116 = C::imm64(ctx, v115);
+                                                        let v117 =
+                                                            constructor_iconst(ctx, v47, v116);
+                                                        let v118 = C::subsume(ctx, v117);
+                                                        // Rule at src/opts/bitops.isle line 33.
+                                                        returns.push(v118);
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                                &InstructionData::UnaryImm {
+                                    opcode: ref v22,
+                                    imm: v23,
+                                } => {
+                                    if let &Opcode::Iconst = v22 {
+                                        if v2.0 == v19.0 {
+                                            let v24 = C::u64_from_imm64(ctx, v23);
+                                            if v24 == 0x0 {
+                                                let v25 = C::subsume(ctx, v7.1);
+                                                // Rule at src/opts/bitops.isle line 20.
+                                                returns.push(v25);
+                                            }
+                                            let v254 = constructor_bxor(ctx, v2.0, v7.1, v7.0);
+                                            // Rule at src/opts/cprop.isle line 112.
+                                            returns.push(v254);
+                                        }
+                                        let v406 = C::remat(ctx, arg0);
+                                        // Rule at src/opts/remat.isle line 20.
+                                        returns.push(v406);
+                                    }
+                                }
+                                _ => {}
+                            }
+                        }
+                        if v7.0 == v7.1 {
+                            let v44 = C::fits_in_64(ctx, v2.0);
+                            if let Some(v45) = v44 {
+                                let v46 = C::ty_int(ctx, v45);
+                                if let Some(v47) = v46 {
+                                    let v49 = C::imm64(ctx, 0x0);
+                                    let v50 = constructor_iconst(ctx, v47, v49);
+                                    let v51 = C::subsume(ctx, v50);
+                                    // Rule at src/opts/bitops.isle line 26.
+                                    returns.push(v51);
+                                }
+                            }
+                        }
+                    }
+                    &Opcode::Rotl => {
+                        let v7 = C::unpack_value_array_2(ctx, v6);
+                        let v10 = C::inst_data_etor(ctx, v7.1);
+                        let mut v10 = v10;
+                        while let Some(v11) = v10.next(ctx) {
+                            if let &InstructionData::UnaryImm {
+                                opcode: ref v14,
+                                imm: v15,
+                            } = &v11.1
+                            {
+                                if let &Opcode::Iconst = v14 {
+                                    let v16 = C::u64_from_imm64(ctx, v15);
+                                    if v16 == 0x0 {
+                                        if v2.0 == v11.0 {
+                                            let v17 = C::subsume(ctx, v7.0);
+                                            // Rule at src/opts/shifts.isle line 20.
+                                            returns.push(v17);
+                                        }
+                                    }
+                                }
+                            }
+                        }
+                    }
+                    &Opcode::Rotr => {
+                        let v7 = C::unpack_value_array_2(ctx, v6);
+                        let v10 = C::inst_data_etor(ctx, v7.1);
+                        let mut v10 = v10;
+                        while let Some(v11) = v10.next(ctx) {
+                            if let &InstructionData::UnaryImm {
+                                opcode: ref v14,
+                                imm: v15,
+                            } = &v11.1
+                            {
+                                if let &Opcode::Iconst = v14 {
+                                    let v16 = C::u64_from_imm64(ctx, v15);
+                                    if v16 == 0x0 {
+                                        if v2.0 == v11.0 {
+                                            let v17 = C::subsume(ctx, v7.0);
+                                            // Rule at src/opts/shifts.isle line 16.
+                                            returns.push(v17);
+                                        }
+                                    }
+                                }
+                            }
+                        }
+                    }
+                    &Opcode::Ishl => {
+                        let v7 = C::unpack_value_array_2(ctx, v6);
+                        let v10 = C::inst_data_etor(ctx, v7.1);
+                        let mut v10 = v10;
+                        while let Some(v11) = v10.next(ctx) {
+                            if let &InstructionData::UnaryImm {
+                                opcode: ref v14,
+                                imm: v15,
+                            } = &v11.1
+                            {
+                                if let &Opcode::Iconst = v14 {
+                                    let v44 = C::fits_in_64(ctx, v2.0);
+                                    if let Some(v45) = v44 {
+                                        let v18 = C::inst_data_etor(ctx, v7.0);
+                                        let mut v18 = v18;
+                                        while let Some(v19) = v18.next(ctx) {
+                                            match &v19.1 {
+                                                &InstructionData::Binary {
+                                                    opcode: ref v123,
+                                                    args: ref v124,
+                                                } => {
+                                                    match v123 {
+                                                        &Opcode::Ushr => {
+                                                            if v19.0 == v45 {
+                                                                let v125 = C::unpack_value_array_2(
+                                                                    ctx, v124,
+                                                                );
+                                                                let v135 =
+                                                                    C::inst_data_etor(ctx, v125.1);
+                                                                let mut v135 = v135;
+                                                                while let Some(v136) =
+                                                                    v135.next(ctx)
+                                                                {
+                                                                    if let &InstructionData::UnaryImm {
+                                                                        opcode: ref v139,
+                                                                        imm: v140,
+                                                                    } = &v136.1 {
+                                                                        if let &Opcode::Iconst = v139 {
+                                                                            if v15 == v140 {
+                                                                                let v436 = C::imm64(ctx, 0xFFFFFFFFFFFFFFFF);
+                                                                                let v437 = C::imm64_shl(ctx, v45, v436, v140);
+                                                                                let v438 = constructor_iconst(ctx, v45, v437);
+                                                                                let v439 = constructor_band(ctx, v45, v125.0, v438);
+                                                                                // Rule at src/opts/shifts.isle line 27.
+                                                                                returns.push(v439);
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                        &Opcode::Sshr => {
+                                                            if v19.0 == v45 {
+                                                                let v125 = C::unpack_value_array_2(
+                                                                    ctx, v124,
+                                                                );
+                                                                let v135 =
+                                                                    C::inst_data_etor(ctx, v125.1);
+                                                                let mut v135 = v135;
+                                                                while let Some(v136) =
+                                                                    v135.next(ctx)
+                                                                {
+                                                                    if let &InstructionData::UnaryImm {
+                                                                        opcode: ref v139,
+                                                                        imm: v140,
+                                                                    } = &v136.1 {
+                                                                        if let &Opcode::Iconst = v139 {
+                                                                            if v15 == v140 {
+                                                                                let v436 = C::imm64(ctx, 0xFFFFFFFFFFFFFFFF);
+                                                                                let v437 = C::imm64_shl(ctx, v45, v436, v140);
+                                                                                let v438 = constructor_iconst(ctx, v45, v437);
+                                                                                let v439 = constructor_band(ctx, v45, v125.0, v438);
+                                                                                // Rule at src/opts/shifts.isle line 32.
+                                                                                returns.push(v439);
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                        _ => {}
+                                                    }
+                                                }
+                                                &InstructionData::UnaryImm {
+                                                    opcode: ref v22,
+                                                    imm: v23,
+                                                } => {
+                                                    if let &Opcode::Iconst = v22 {
+                                                        if v19.0 == v45 {
+                                                            let v204 =
+                                                                C::imm64_shl(ctx, v45, v23, v15);
+                                                            let v205 =
+                                                                constructor_iconst(ctx, v45, v204);
+                                                            let v206 = C::subsume(ctx, v205);
+                                                            // Rule at src/opts/cprop.isle line 58.
+                                                            returns.push(v206);
+                                                        }
+                                                    }
+                                                }
+                                                _ => {}
+                                            }
+                                        }
+                                    }
+                                    let v16 = C::u64_from_imm64(ctx, v15);
+                                    if v16 == 0x0 {
+                                        if v2.0 == v11.0 {
+                                            let v17 = C::subsume(ctx, v7.0);
+                                            // Rule at src/opts/shifts.isle line 4.
+                                            returns.push(v17);
+                                        }
+                                    }
+                                }
+                            }
+                        }
+                    }
+                    &Opcode::Ushr => {
+                        let v7 = C::unpack_value_array_2(ctx, v6);
+                        let v10 = C::inst_data_etor(ctx, v7.1);
+                        let mut v10 = v10;
+                        while let Some(v11) = v10.next(ctx) {
+                            if let &InstructionData::UnaryImm {
+                                opcode: ref v14,
+                                imm: v15,
+                            } = &v11.1
+                            {
+                                if let &Opcode::Iconst = v14 {
+                                    let v18 = C::inst_data_etor(ctx, v7.0);
+                                    let mut v18 = v18;
+                                    while let Some(v19) = v18.next(ctx) {
+                                        match &v19.1 {
+                                            &InstructionData::Binary {
+                                                opcode: ref v123,
+                                                args: ref v124,
+                                            } => {
+                                                if let &Opcode::Ishl = v123 {
+                                                    let v125 = C::unpack_value_array_2(ctx, v124);
+                                                    let v135 = C::inst_data_etor(ctx, v125.1);
+                                                    let mut v135 = v135;
+                                                    while let Some(v136) = v135.next(ctx) {
+                                                        if let &InstructionData::UnaryImm {
+                                                            opcode: ref v139,
+                                                            imm: v140,
+                                                        } = &v136.1
+                                                        {
+                                                            if let &Opcode::Iconst = v139 {
+                                                                if v15 == v140 {
+                                                                    let v44 =
+                                                                        C::fits_in_64(ctx, v2.0);
+                                                                    if let Some(v45) = v44 {
+                                                                        let v46 =
+                                                                            C::ty_int(ctx, v45);
+                                                                        if let Some(v47) = v46 {
+                                                                            if v19.0 == v47 {
+                                                                                let v115 =
+                                                                                    C::ty_mask(
+                                                                                        ctx, v47,
+                                                                                    );
+                                                                                let v116 = C::imm64(
+                                                                                    ctx, v115,
+                                                                                );
+                                                                                let v440 =
+                                                                                    C::imm64_ushr(
+                                                                                        ctx, v47,
+                                                                                        v116, v140,
+                                                                                    );
+                                                                                let v441 = constructor_iconst(ctx, v47, v440);
+                                                                                let v442 = constructor_band(ctx, v47, v125.0, v441);
+                                                                                // Rule at src/opts/shifts.isle line 41.
+                                                                                returns.push(v442);
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                    let v141 = C::u64_from_imm64(
+                                                                        ctx, v140,
+                                                                    );
+                                                                    let v451 =
+                                                                        C::u64_is_zero(ctx, v141);
+                                                                    if v451 == false {
+                                                                        let v150 =
+                                                                            C::ty_bits(ctx, v2.0);
+                                                                        let v151 =
+                                                                            C::u8_as_u64(ctx, v150);
+                                                                        let v452 = C::u64_sub(
+                                                                            ctx, v151, v141,
+                                                                        );
+                                                                        let v453 = constructor_shift_amt_to_type(ctx, v452);
+                                                                        if let Some(v454) = v453 {
+                                                                            if v2.0 == v19.0 {
+                                                                                let v455 = constructor_ireduce(ctx, v454, v125.0);
+                                                                                let v457 = constructor_uextend(ctx, v2.0, v455);
+                                                                                // Rule at src/opts/shifts.isle line 91.
+                                                                                returns.push(v457);
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                            &InstructionData::UnaryImm {
+                                                opcode: ref v22,
+                                                imm: v23,
+                                            } => {
+                                                if let &Opcode::Iconst = v22 {
+                                                    let v44 = C::fits_in_64(ctx, v2.0);
+                                                    if let Some(v45) = v44 {
+                                                        if v19.0 == v45 {
+                                                            let v207 =
+                                                                C::imm64_ushr(ctx, v45, v23, v15);
+                                                            let v208 =
+                                                                constructor_iconst(ctx, v45, v207);
+                                                            let v209 = C::subsume(ctx, v208);
+                                                            // Rule at src/opts/cprop.isle line 63.
+                                                            returns.push(v209);
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                            _ => {}
+                                        }
+                                    }
+                                    let v16 = C::u64_from_imm64(ctx, v15);
+                                    if v16 == 0x0 {
+                                        if v2.0 == v11.0 {
+                                            let v17 = C::subsume(ctx, v7.0);
+                                            // Rule at src/opts/shifts.isle line 8.
+                                            returns.push(v17);
+                                        }
+                                    }
+                                }
+                            }
+                        }
+                    }
+                    &Opcode::Sshr => {
+                        let v7 = C::unpack_value_array_2(ctx, v6);
+                        let v10 = C::inst_data_etor(ctx, v7.1);
+                        let mut v10 = v10;
+                        while let Some(v11) = v10.next(ctx) {
+                            if let &InstructionData::UnaryImm {
+                                opcode: ref v14,
+                                imm: v15,
+                            } = &v11.1
+                            {
+                                if let &Opcode::Iconst = v14 {
+                                    let v18 = C::inst_data_etor(ctx, v7.0);
+                                    let mut v18 = v18;
+                                    while let Some(v19) = v18.next(ctx) {
+                                        match &v19.1 {
+                                            &InstructionData::Binary {
+                                                opcode: ref v123,
+                                                args: ref v124,
+                                            } => {
+                                                match v123 {
+                                                    &Opcode::Bor => {
+                                                        let v16 = C::u64_from_imm64(ctx, v15);
+                                                        let v150 = C::ty_bits(ctx, v2.0);
+                                                        let v151 = C::u8_as_u64(ctx, v150);
+                                                        let v153 = C::u64_sub(ctx, v151, 0x1);
+                                                        let v154 = C::u64_eq(ctx, v16, v153);
+                                                        if v154 == true {
+                                                            if v2.0 == v11.0 {
+                                                                if v2.0 == v19.0 {
+                                                                    let v125 =
+                                                                        C::unpack_value_array_2(
+                                                                            ctx, v124,
+                                                                        );
+                                                                    let v135 = C::inst_data_etor(
+                                                                        ctx, v125.1,
+                                                                    );
+                                                                    let mut v135 = v135;
+                                                                    while let Some(v136) =
+                                                                        v135.next(ctx)
+                                                                    {
+                                                                        if let &InstructionData::Unary {
+                                                                            opcode: ref v148,
+                                                                            arg: v149,
+                                                                        } = &v136.1 {
+                                                                            if let &Opcode::Ineg = v148 {
+                                                                                if v2.0 == v136.0 {
+                                                                                    if v125.0 == v149 {
+                                                                                        let v155 = constructor_bmask(ctx, v2.0, v125.0);
+                                                                                        // Rule at src/opts/bitops.isle line 100.
+                                                                                        returns.push(v155);
+                                                                                    }
+                                                                                }
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                    let v156 = C::inst_data_etor(
+                                                                        ctx, v125.0,
+                                                                    );
+                                                                    let mut v156 = v156;
+                                                                    while let Some(v157) =
+                                                                        v156.next(ctx)
+                                                                    {
+                                                                        if let &InstructionData::Unary {
+                                                                            opcode: ref v160,
+                                                                            arg: v161,
+                                                                        } = &v157.1 {
+                                                                            if let &Opcode::Ineg = v160 {
+                                                                                if v125.1 == v161 {
+                                                                                    if v2.0 == v157.0 {
+                                                                                        let v162 = constructor_bmask(ctx, v2.0, v161);
+                                                                                        // Rule at src/opts/bitops.isle line 104.
+                                                                                        returns.push(v162);
+                                                                                    }
+                                                                                }
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                    &Opcode::Ishl => {
+                                                        if v2.0 == v19.0 {
+                                                            let v125 =
+                                                                C::unpack_value_array_2(ctx, v124);
+                                                            let v135 =
+                                                                C::inst_data_etor(ctx, v125.1);
+                                                            let mut v135 = v135;
+                                                            while let Some(v136) = v135.next(ctx) {
+                                                                if let &InstructionData::UnaryImm {
+                                                                    opcode: ref v139,
+                                                                    imm: v140,
+                                                                } = &v136.1 {
+                                                                    if let &Opcode::Iconst = v139 {
+                                                                        if v15 == v140 {
+                                                                            let v156 = C::inst_data_etor(ctx, v125.0);
+                                                                            let mut v156 = v156;
+                                                                            while let Some(v157) = v156.next(ctx) {
+                                                                                if let &InstructionData::Unary {
+                                                                                    opcode: ref v160,
+                                                                                    arg: v161,
+                                                                                } = &v157.1 {
+                                                                                    match v160 {
+                                                                                        &Opcode::Uextend => {
+                                                                                            if v2.0 == v157.0 {
+                                                                                                let v141 = C::u64_from_imm64(ctx, v140);
+                                                                                                let v444 = C::ty_bits_u64(ctx, v2.0);
+                                                                                                let v443 = C::value_type(ctx, v161);
+                                                                                                let v445 = C::ty_bits_u64(ctx, v443);
+                                                                                                let v446 = C::u64_sub(ctx, v444, v445);
+                                                                                                let v447 = C::u64_eq(ctx, v141, v446);
+                                                                                                if v447 == true {
+                                                                                                    let v448 = constructor_sextend(ctx, v2.0, v161);
+                                                                                                    // Rule at src/opts/shifts.isle line 50.
+                                                                                                    returns.push(v448);
+                                                                                                }
+                                                                                                let v449 = C::u64_lt(ctx, v141, v446);
+                                                                                                if v449 == true {
+                                                                                                    // Rule at src/opts/shifts.isle line 62.
+                                                                                                    returns.push(v125.0);
+                                                                                                }
+                                                                                            }
+                                                                                        }
+                                                                                        &Opcode::Sextend => {
+                                                                                            let v141 = C::u64_from_imm64(ctx, v140);
+                                                                                            let v444 = C::ty_bits_u64(ctx, v2.0);
+                                                                                            let v443 = C::value_type(ctx, v161);
+                                                                                            let v445 = C::ty_bits_u64(ctx, v443);
+                                                                                            let v446 = C::u64_sub(ctx, v444, v445);
+                                                                                            let v450 = C::u64_le(ctx, v141, v446);
+                                                                                            if v450 == true {
+                                                                                                if v2.0 == v157.0 {
+                                                                                                    // Rule at src/opts/shifts.isle line 73.
+                                                                                                    returns.push(v125.0);
+                                                                                                }
+                                                                                            }
+                                                                                        }
+                                                                                        _ => {}
+                                                                                    }
+                                                                                }
+                                                                            }
+                                                                            let v141 = C::u64_from_imm64(ctx, v140);
+                                                                            let v451 = C::u64_is_zero(ctx, v141);
+                                                                            if v451 == false {
+                                                                                let v150 = C::ty_bits(ctx, v2.0);
+                                                                                let v151 = C::u8_as_u64(ctx, v150);
+                                                                                let v452 = C::u64_sub(ctx, v151, v141);
+                                                                                let v453 = constructor_shift_amt_to_type(ctx, v452);
+                                                                                if let Some(v454) = v453 {
+                                                                                    let v455 = constructor_ireduce(ctx, v454, v125.0);
+                                                                                    let v456 = constructor_sextend(ctx, v2.0, v455);
+                                                                                    // Rule at src/opts/shifts.isle line 87.
+                                                                                    returns.push(v456);
+                                                                                }
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                    _ => {}
+                                                }
+                                            }
+                                            &InstructionData::UnaryImm {
+                                                opcode: ref v22,
+                                                imm: v23,
+                                            } => {
+                                                if let &Opcode::Iconst = v22 {
+                                                    let v44 = C::fits_in_64(ctx, v2.0);
+                                                    if let Some(v45) = v44 {
+                                                        if v19.0 == v45 {
+                                                            let v210 =
+                                                                C::imm64_sshr(ctx, v45, v23, v15);
+                                                            let v211 =
+                                                                constructor_iconst(ctx, v45, v210);
+                                                            let v212 = C::subsume(ctx, v211);
+                                                            // Rule at src/opts/cprop.isle line 68.
+                                                            returns.push(v212);
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                            _ => {}
+                                        }
+                                    }
+                                    let v16 = C::u64_from_imm64(ctx, v15);
+                                    if v16 == 0x0 {
+                                        if v2.0 == v11.0 {
+                                            let v17 = C::subsume(ctx, v7.0);
+                                            // Rule at src/opts/shifts.isle line 12.
+                                            returns.push(v17);
+                                        }
+                                    }
+                                }
+                            }
+                        }
+                    }
+                    &Opcode::Fmul => {
+                        let v7 = C::unpack_value_array_2(ctx, v6);
+                        let v10 = C::inst_data_etor(ctx, v7.1);
+                        let mut v10 = v10;
+                        while let Some(v11) = v10.next(ctx) {
+                            if let &InstructionData::Unary {
+                                opcode: ref v38,
+                                arg: v39,
+                            } = &v11.1
+                            {
+                                if let &Opcode::Fneg = v38 {
+                                    if v2.0 == v11.0 {
+                                        let v18 = C::inst_data_etor(ctx, v7.0);
+                                        let mut v18 = v18;
+                                        while let Some(v19) = v18.next(ctx) {
+                                            if let &InstructionData::Unary {
+                                                opcode: ref v36,
+                                                arg: v37,
+                                            } = &v19.1
+                                            {
+                                                if let &Opcode::Fneg = v36 {
+                                                    if v2.0 == v19.0 {
+                                                        let v114 =
+                                                            constructor_fmul(ctx, v2.0, v37, v39);
+                                                        // Rule at src/opts/arithmetic.isle line 127.
+                                                        returns.push(v114);
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                            }
+                        }
+                    }
+                    _ => {}
+                }
+            }
+            &InstructionData::IntCompare {
+                opcode: ref v227,
+                args: ref v228,
+                cond: ref v229,
+            } => {
+                if let &Opcode::Icmp = v227 {
+                    match v229 {
+                        &IntCC::Equal => {
+                            let v44 = C::fits_in_64(ctx, v2.0);
+                            if let Some(v45) = v44 {
+                                let v46 = C::ty_int(ctx, v45);
+                                if let Some(v47) = v46 {
+                                    let v230 = C::unpack_value_array_2(ctx, v228);
+                                    if v230.0 == v230.1 {
+                                        let v331 = C::imm64(ctx, 0x1);
+                                        let v339 = constructor_iconst(ctx, v47, v331);
+                                        // Rule at src/opts/icmp.isle line 5.
+                                        returns.push(v339);
+                                    }
+                                }
+                            }
+                            let v230 = C::unpack_value_array_2(ctx, v228);
+                            let v233 = C::inst_data_etor(ctx, v230.0);
+                            let mut v233 = v233;
+                            while let Some(v234) = v233.next(ctx) {
+                                if let &InstructionData::Unary {
+                                    opcode: ref v326,
+                                    arg: v327,
+                                } = &v234.1
+                                {
+                                    if let &Opcode::Uextend = v326 {
+                                        let v239 = C::inst_data_etor(ctx, v230.1);
+                                        let mut v239 = v239;
+                                        while let Some(v240) = v239.next(ctx) {
+                                            if let &InstructionData::UnaryImm {
+                                                opcode: ref v243,
+                                                imm: v244,
+                                            } = &v240.1
+                                            {
+                                                if let &Opcode::Iconst = v243 {
+                                                    let v329 = C::u64_from_imm64(ctx, v244);
+                                                    if v329 == 0x0 {
+                                                        let v340 = C::inst_data_etor(ctx, v327);
+                                                        let mut v340 = v340;
+                                                        while let Some(v341) = v340.next(ctx) {
+                                                            if let &InstructionData::IntCompare {
+                                                                opcode: ref v344,
+                                                                args: ref v345,
+                                                                cond: ref v346,
+                                                            } = &v341.1
+                                                            {
+                                                                if let &Opcode::Icmp = v344 {
+                                                                    if v2.0 == v341.0 {
+                                                                        let v351 =
+                                                                            &C::intcc_inverse(
+                                                                                ctx, v346,
+                                                                            );
+                                                                        let v347 =
+                                                                            C::unpack_value_array_2(
+                                                                                ctx, v345,
+                                                                            );
+                                                                        let v352 = constructor_icmp(
+                                                                            ctx, v2.0, v351,
+                                                                            v347.0, v347.1,
+                                                                        );
+                                                                        let v353 =
+                                                                            C::subsume(ctx, v352);
+                                                                        // Rule at src/opts/icmp.isle line 22.
+                                                                        returns.push(v353);
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                            }
+                        }
+                        &IntCC::NotEqual => {
+                            let v44 = C::fits_in_64(ctx, v2.0);
+                            if let Some(v45) = v44 {
+                                let v46 = C::ty_int(ctx, v45);
+                                if let Some(v47) = v46 {
+                                    let v230 = C::unpack_value_array_2(ctx, v228);
+                                    if v230.0 == v230.1 {
+                                        let v49 = C::imm64(ctx, 0x0);
+                                        let v50 = constructor_iconst(ctx, v47, v49);
+                                        // Rule at src/opts/icmp.isle line 6.
+                                        returns.push(v50);
+                                    }
+                                }
+                            }
+                            let v230 = C::unpack_value_array_2(ctx, v228);
+                            let v233 = C::inst_data_etor(ctx, v230.0);
+                            let mut v233 = v233;
+                            while let Some(v234) = v233.next(ctx) {
+                                if let &InstructionData::Unary {
+                                    opcode: ref v326,
+                                    arg: v327,
+                                } = &v234.1
+                                {
+                                    if let &Opcode::Uextend = v326 {
+                                        let v239 = C::inst_data_etor(ctx, v230.1);
+                                        let mut v239 = v239;
+                                        while let Some(v240) = v239.next(ctx) {
+                                            if let &InstructionData::UnaryImm {
+                                                opcode: ref v243,
+                                                imm: v244,
+                                            } = &v240.1
+                                            {
+                                                if let &Opcode::Iconst = v243 {
+                                                    let v329 = C::u64_from_imm64(ctx, v244);
+                                                    if v329 == 0x0 {
+                                                        let v340 = C::inst_data_etor(ctx, v327);
+                                                        let mut v340 = v340;
+                                                        while let Some(v341) = v340.next(ctx) {
+                                                            if let &InstructionData::IntCompare {
+                                                                opcode: ref v344,
+                                                                args: ref v345,
+                                                                cond: ref v346,
+                                                            } = &v341.1
+                                                            {
+                                                                if let &Opcode::Icmp = v344 {
+                                                                    if v2.0 == v341.0 {
+                                                                        let v350 =
+                                                                            C::subsume(ctx, v327);
+                                                                        // Rule at src/opts/icmp.isle line 17.
+                                                                        returns.push(v350);
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                            }
+                        }
+                        &IntCC::SignedGreaterThan => {
+                            let v44 = C::fits_in_64(ctx, v2.0);
+                            if let Some(v45) = v44 {
+                                let v46 = C::ty_int(ctx, v45);
+                                if let Some(v47) = v46 {
+                                    let v230 = C::unpack_value_array_2(ctx, v228);
+                                    let v239 = C::inst_data_etor(ctx, v230.1);
+                                    let mut v239 = v239;
+                                    while let Some(v240) = v239.next(ctx) {
+                                        if let &InstructionData::UnaryImm {
+                                            opcode: ref v243,
+                                            imm: v244,
+                                        } = &v240.1
+                                        {
+                                            if let &Opcode::Iconst = v243 {
+                                                let v329 = C::u64_from_imm64(ctx, v244);
+                                                let v388 = C::ty_smin(ctx, v240.0);
+                                                let v389 = C::u64_eq(ctx, v329, v388);
+                                                if v389 == true {
+                                                    let v384 =
+                                                        constructor_ne(ctx, v47, v230.0, v230.1);
+                                                    // Rule at src/opts/icmp.isle line 98.
+                                                    returns.push(v384);
+                                                }
+                                                let v390 = C::ty_smax(ctx, v240.0);
+                                                let v391 = C::u64_eq(ctx, v329, v390);
+                                                if v391 == true {
+                                                    let v49 = C::imm64(ctx, 0x0);
+                                                    let v50 = constructor_iconst(ctx, v47, v49);
+                                                    let v51 = C::subsume(ctx, v50);
+                                                    // Rule at src/opts/icmp.isle line 118.
+                                                    returns.push(v51);
+                                                }
+                                            }
+                                        }
+                                    }
+                                    if v230.0 == v230.1 {
+                                        let v49 = C::imm64(ctx, 0x0);
+                                        let v50 = constructor_iconst(ctx, v47, v49);
+                                        // Rule at src/opts/icmp.isle line 9.
+                                        returns.push(v50);
+                                    }
+                                }
+                            }
+                        }
+                        &IntCC::SignedGreaterThanOrEqual => {
+                            let v44 = C::fits_in_64(ctx, v2.0);
+                            if let Some(v45) = v44 {
+                                let v46 = C::ty_int(ctx, v45);
+                                if let Some(v47) = v46 {
+                                    let v230 = C::unpack_value_array_2(ctx, v228);
+                                    let v239 = C::inst_data_etor(ctx, v230.1);
+                                    let mut v239 = v239;
+                                    while let Some(v240) = v239.next(ctx) {
+                                        if let &InstructionData::UnaryImm {
+                                            opcode: ref v243,
+                                            imm: v244,
+                                        } = &v240.1
+                                        {
+                                            if let &Opcode::Iconst = v243 {
+                                                let v329 = C::u64_from_imm64(ctx, v244);
+                                                let v388 = C::ty_smin(ctx, v240.0);
+                                                let v389 = C::u64_eq(ctx, v329, v388);
+                                                if v389 == true {
+                                                    let v331 = C::imm64(ctx, 0x1);
+                                                    let v339 = constructor_iconst(ctx, v47, v331);
+                                                    let v385 = C::subsume(ctx, v339);
+                                                    // Rule at src/opts/icmp.isle line 103.
+                                                    returns.push(v385);
+                                                }
+                                                let v390 = C::ty_smax(ctx, v240.0);
+                                                let v391 = C::u64_eq(ctx, v329, v390);
+                                                if v391 == true {
+                                                    let v383 =
+                                                        constructor_eq(ctx, v47, v230.0, v230.1);
+                                                    // Rule at src/opts/icmp.isle line 123.
+                                                    returns.push(v383);
+                                                }
+                                            }
+                                        }
+                                    }
+                                    if v230.0 == v230.1 {
+                                        let v331 = C::imm64(ctx, 0x1);
+                                        let v339 = constructor_iconst(ctx, v47, v331);
+                                        // Rule at src/opts/icmp.isle line 10.
+                                        returns.push(v339);
+                                    }
+                                }
+                            }
+                            let v230 = C::unpack_value_array_2(ctx, v228);
+                            let v233 = C::inst_data_etor(ctx, v230.0);
+                            let mut v233 = v233;
+                            while let Some(v234) = v233.next(ctx) {
+                                if v234.0 == I64 {
+                                    if let &InstructionData::Unary {
+                                        opcode: ref v326,
+                                        arg: v327,
+                                    } = &v234.1
+                                    {
+                                        if let &Opcode::Uextend = v326 {
+                                            let v328 = C::value_type(ctx, v327);
+                                            if v328 == I32 {
+                                                let v239 = C::inst_data_etor(ctx, v230.1);
+                                                let mut v239 = v239;
+                                                while let Some(v240) = v239.next(ctx) {
+                                                    if let &InstructionData::UnaryImm {
+                                                        opcode: ref v243,
+                                                        imm: v244,
+                                                    } = &v240.1
+                                                    {
+                                                        if let &Opcode::Iconst = v243 {
+                                                            let v329 = C::u64_from_imm64(ctx, v244);
+                                                            if v329 == 0x0 {
+                                                                let v331 = C::imm64(ctx, 0x1);
+                                                                let v332 = constructor_iconst(
+                                                                    ctx, v2.0, v331,
+                                                                );
+                                                                // Rule at src/opts/extends.isle line 25.
+                                                                returns.push(v332);
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                            }
+                        }
+                        &IntCC::SignedLessThan => {
+                            let v44 = C::fits_in_64(ctx, v2.0);
+                            if let Some(v45) = v44 {
+                                let v46 = C::ty_int(ctx, v45);
+                                if let Some(v47) = v46 {
+                                    let v230 = C::unpack_value_array_2(ctx, v228);
+                                    let v239 = C::inst_data_etor(ctx, v230.1);
+                                    let mut v239 = v239;
+                                    while let Some(v240) = v239.next(ctx) {
+                                        if let &InstructionData::UnaryImm {
+                                            opcode: ref v243,
+                                            imm: v244,
+                                        } = &v240.1
+                                        {
+                                            if let &Opcode::Iconst = v243 {
+                                                let v329 = C::u64_from_imm64(ctx, v244);
+                                                let v388 = C::ty_smin(ctx, v240.0);
+                                                let v389 = C::u64_eq(ctx, v329, v388);
+                                                if v389 == true {
+                                                    let v49 = C::imm64(ctx, 0x0);
+                                                    let v50 = constructor_iconst(ctx, v47, v49);
+                                                    let v51 = C::subsume(ctx, v50);
+                                                    // Rule at src/opts/icmp.isle line 88.
+                                                    returns.push(v51);
+                                                }
+                                                let v390 = C::ty_smax(ctx, v240.0);
+                                                let v391 = C::u64_eq(ctx, v329, v390);
+                                                if v391 == true {
+                                                    let v384 =
+                                                        constructor_ne(ctx, v47, v230.0, v230.1);
+                                                    // Rule at src/opts/icmp.isle line 108.
+                                                    returns.push(v384);
+                                                }
+                                            }
+                                        }
+                                    }
+                                    if v230.0 == v230.1 {
+                                        let v49 = C::imm64(ctx, 0x0);
+                                        let v50 = constructor_iconst(ctx, v47, v49);
+                                        // Rule at src/opts/icmp.isle line 13.
+                                        returns.push(v50);
+                                    }
+                                }
+                            }
+                            let v230 = C::unpack_value_array_2(ctx, v228);
+                            let v233 = C::inst_data_etor(ctx, v230.0);
+                            let mut v233 = v233;
+                            while let Some(v234) = v233.next(ctx) {
+                                if v234.0 == I64 {
+                                    if let &InstructionData::Unary {
+                                        opcode: ref v326,
+                                        arg: v327,
+                                    } = &v234.1
+                                    {
+                                        if let &Opcode::Uextend = v326 {
+                                            let v328 = C::value_type(ctx, v327);
+                                            if v328 == I32 {
+                                                let v239 = C::inst_data_etor(ctx, v230.1);
+                                                let mut v239 = v239;
+                                                while let Some(v240) = v239.next(ctx) {
+                                                    if let &InstructionData::UnaryImm {
+                                                        opcode: ref v243,
+                                                        imm: v244,
+                                                    } = &v240.1
+                                                    {
+                                                        if let &Opcode::Iconst = v243 {
+                                                            let v329 = C::u64_from_imm64(ctx, v244);
+                                                            if v329 == 0x0 {
+                                                                let v49 = C::imm64(ctx, 0x0);
+                                                                let v330 = constructor_iconst(
+                                                                    ctx, v2.0, v49,
+                                                                );
+                                                                // Rule at src/opts/extends.isle line 20.
+                                                                returns.push(v330);
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                            }
+                        }
+                        &IntCC::SignedLessThanOrEqual => {
+                            let v44 = C::fits_in_64(ctx, v2.0);
+                            if let Some(v45) = v44 {
+                                let v46 = C::ty_int(ctx, v45);
+                                if let Some(v47) = v46 {
+                                    let v230 = C::unpack_value_array_2(ctx, v228);
+                                    let v239 = C::inst_data_etor(ctx, v230.1);
+                                    let mut v239 = v239;
+                                    while let Some(v240) = v239.next(ctx) {
+                                        if let &InstructionData::UnaryImm {
+                                            opcode: ref v243,
+                                            imm: v244,
+                                        } = &v240.1
+                                        {
+                                            if let &Opcode::Iconst = v243 {
+                                                let v329 = C::u64_from_imm64(ctx, v244);
+                                                let v388 = C::ty_smin(ctx, v240.0);
+                                                let v389 = C::u64_eq(ctx, v329, v388);
+                                                if v389 == true {
+                                                    let v383 =
+                                                        constructor_eq(ctx, v47, v230.0, v230.1);
+                                                    // Rule at src/opts/icmp.isle line 93.
+                                                    returns.push(v383);
+                                                }
+                                                let v390 = C::ty_smax(ctx, v240.0);
+                                                let v391 = C::u64_eq(ctx, v329, v390);
+                                                if v391 == true {
+                                                    let v331 = C::imm64(ctx, 0x1);
+                                                    let v339 = constructor_iconst(ctx, v47, v331);
+                                                    let v385 = C::subsume(ctx, v339);
+                                                    // Rule at src/opts/icmp.isle line 113.
+                                                    returns.push(v385);
+                                                }
+                                            }
+                                        }
+                                    }
+                                    if v230.0 == v230.1 {
+                                        let v331 = C::imm64(ctx, 0x1);
+                                        let v339 = constructor_iconst(ctx, v47, v331);
+                                        // Rule at src/opts/icmp.isle line 14.
+                                        returns.push(v339);
+                                    }
+                                }
+                            }
+                        }
+                        &IntCC::UnsignedGreaterThan => {
+                            let v44 = C::fits_in_64(ctx, v2.0);
+                            if let Some(v45) = v44 {
+                                let v46 = C::ty_int(ctx, v45);
+                                if let Some(v47) = v46 {
+                                    let v230 = C::unpack_value_array_2(ctx, v228);
+                                    let v239 = C::inst_data_etor(ctx, v230.1);
+                                    let mut v239 = v239;
+                                    while let Some(v240) = v239.next(ctx) {
+                                        if let &InstructionData::UnaryImm {
+                                            opcode: ref v243,
+                                            imm: v244,
+                                        } = &v240.1
+                                        {
+                                            if let &Opcode::Iconst = v243 {
+                                                let v329 = C::u64_from_imm64(ctx, v244);
+                                                if v329 == 0x0 {
+                                                    let v384 =
+                                                        constructor_ne(ctx, v47, v230.0, v230.1);
+                                                    // Rule at src/opts/icmp.isle line 60.
+                                                    returns.push(v384);
+                                                }
+                                                let v386 = C::ty_umax(ctx, v240.0);
+                                                let v387 = C::u64_eq(ctx, v329, v386);
+                                                if v387 == true {
+                                                    let v49 = C::imm64(ctx, 0x0);
+                                                    let v50 = constructor_iconst(ctx, v47, v49);
+                                                    let v51 = C::subsume(ctx, v50);
+                                                    // Rule at src/opts/icmp.isle line 78.
+                                                    returns.push(v51);
+                                                }
+                                            }
+                                        }
+                                    }
+                                    if v230.0 == v230.1 {
+                                        let v49 = C::imm64(ctx, 0x0);
+                                        let v50 = constructor_iconst(ctx, v47, v49);
+                                        // Rule at src/opts/icmp.isle line 7.
+                                        returns.push(v50);
+                                    }
+                                }
+                            }
+                        }
+                        &IntCC::UnsignedGreaterThanOrEqual => {
+                            let v44 = C::fits_in_64(ctx, v2.0);
+                            if let Some(v45) = v44 {
+                                let v46 = C::ty_int(ctx, v45);
+                                if let Some(v47) = v46 {
+                                    let v230 = C::unpack_value_array_2(ctx, v228);
+                                    let v239 = C::inst_data_etor(ctx, v230.1);
+                                    let mut v239 = v239;
+                                    while let Some(v240) = v239.next(ctx) {
+                                        if let &InstructionData::UnaryImm {
+                                            opcode: ref v243,
+                                            imm: v244,
+                                        } = &v240.1
+                                        {
+                                            if let &Opcode::Iconst = v243 {
+                                                let v329 = C::u64_from_imm64(ctx, v244);
+                                                if v329 == 0x0 {
+                                                    let v331 = C::imm64(ctx, 0x1);
+                                                    let v339 = constructor_iconst(ctx, v47, v331);
+                                                    let v385 = C::subsume(ctx, v339);
+                                                    // Rule at src/opts/icmp.isle line 64.
+                                                    returns.push(v385);
+                                                }
+                                                let v386 = C::ty_umax(ctx, v240.0);
+                                                let v387 = C::u64_eq(ctx, v329, v386);
+                                                if v387 == true {
+                                                    let v383 =
+                                                        constructor_eq(ctx, v47, v230.0, v230.1);
+                                                    // Rule at src/opts/icmp.isle line 83.
+                                                    returns.push(v383);
+                                                }
+                                            }
+                                        }
+                                    }
+                                    if v230.0 == v230.1 {
+                                        let v331 = C::imm64(ctx, 0x1);
+                                        let v339 = constructor_iconst(ctx, v47, v331);
+                                        // Rule at src/opts/icmp.isle line 8.
+                                        returns.push(v339);
+                                    }
+                                }
+                            }
+                        }
+                        &IntCC::UnsignedLessThan => {
+                            let v44 = C::fits_in_64(ctx, v2.0);
+                            if let Some(v45) = v44 {
+                                let v46 = C::ty_int(ctx, v45);
+                                if let Some(v47) = v46 {
+                                    let v230 = C::unpack_value_array_2(ctx, v228);
+                                    let v239 = C::inst_data_etor(ctx, v230.1);
+                                    let mut v239 = v239;
+                                    while let Some(v240) = v239.next(ctx) {
+                                        if let &InstructionData::UnaryImm {
+                                            opcode: ref v243,
+                                            imm: v244,
+                                        } = &v240.1
+                                        {
+                                            if let &Opcode::Iconst = v243 {
+                                                let v329 = C::u64_from_imm64(ctx, v244);
+                                                if v329 == 0x0 {
+                                                    let v49 = C::imm64(ctx, 0x0);
+                                                    let v50 = constructor_iconst(ctx, v47, v49);
+                                                    let v51 = C::subsume(ctx, v50);
+                                                    // Rule at src/opts/icmp.isle line 52.
+                                                    returns.push(v51);
+                                                }
+                                                let v386 = C::ty_umax(ctx, v240.0);
+                                                let v387 = C::u64_eq(ctx, v329, v386);
+                                                if v387 == true {
+                                                    let v384 =
+                                                        constructor_ne(ctx, v47, v230.0, v230.1);
+                                                    // Rule at src/opts/icmp.isle line 68.
+                                                    returns.push(v384);
+                                                }
+                                            }
+                                        }
+                                    }
+                                    if v230.0 == v230.1 {
+                                        let v49 = C::imm64(ctx, 0x0);
+                                        let v50 = constructor_iconst(ctx, v47, v49);
+                                        // Rule at src/opts/icmp.isle line 11.
+                                        returns.push(v50);
+                                    }
+                                }
+                            }
+                        }
+                        &IntCC::UnsignedLessThanOrEqual => {
+                            let v44 = C::fits_in_64(ctx, v2.0);
+                            if let Some(v45) = v44 {
+                                let v46 = C::ty_int(ctx, v45);
+                                if let Some(v47) = v46 {
+                                    let v230 = C::unpack_value_array_2(ctx, v228);
+                                    let v239 = C::inst_data_etor(ctx, v230.1);
+                                    let mut v239 = v239;
+                                    while let Some(v240) = v239.next(ctx) {
+                                        if let &InstructionData::UnaryImm {
+                                            opcode: ref v243,
+                                            imm: v244,
+                                        } = &v240.1
+                                        {
+                                            if let &Opcode::Iconst = v243 {
+                                                let v329 = C::u64_from_imm64(ctx, v244);
+                                                if v329 == 0x0 {
+                                                    let v383 =
+                                                        constructor_eq(ctx, v47, v230.0, v230.1);
+                                                    // Rule at src/opts/icmp.isle line 56.
+                                                    returns.push(v383);
+                                                }
+                                                let v386 = C::ty_umax(ctx, v240.0);
+                                                let v387 = C::u64_eq(ctx, v329, v386);
+                                                if v387 == true {
+                                                    let v331 = C::imm64(ctx, 0x1);
+                                                    let v339 = constructor_iconst(ctx, v47, v331);
+                                                    let v385 = C::subsume(ctx, v339);
+                                                    // Rule at src/opts/icmp.isle line 73.
+                                                    returns.push(v385);
+                                                }
+                                            }
+                                        }
+                                    }
+                                    if v230.0 == v230.1 {
+                                        let v331 = C::imm64(ctx, 0x1);
+                                        let v339 = constructor_iconst(ctx, v47, v331);
+                                        // Rule at src/opts/icmp.isle line 12.
+                                        returns.push(v339);
+                                    }
+                                }
+                            }
+                        }
+                        _ => {}
+                    }
+                    let v230 = C::unpack_value_array_2(ctx, v228);
+                    let v233 = C::inst_data_etor(ctx, v230.0);
+                    let mut v233 = v233;
+                    while let Some(v234) = v233.next(ctx) {
+                        if let &InstructionData::UnaryImm {
+                            opcode: ref v237,
+                            imm: v238,
+                        } = &v234.1
+                        {
+                            if let &Opcode::Iconst = v237 {
+                                let v239 = C::inst_data_etor(ctx, v230.1);
+                                let mut v239 = v239;
+                                while let Some(v240) = v239.next(ctx) {
+                                    if let &InstructionData::UnaryImm {
+                                        opcode: ref v243,
+                                        imm: v244,
+                                    } = &v240.1
+                                    {
+                                        if let &Opcode::Iconst = v243 {
+                                            if v234.0 == v240.0 {
+                                                let v245 =
+                                                    C::imm64_icmp(ctx, v234.0, v229, v238, v244);
+                                                let v246 = constructor_iconst(ctx, v2.0, v245);
+                                                let v247 = C::subsume(ctx, v246);
+                                                // Rule at src/opts/cprop.isle line 82.
+                                                returns.push(v247);
+                                            }
+                                        }
+                                    }
+                                }
+                                let v255 = &C::intcc_reverse(ctx, v229);
+                                let v256 = constructor_icmp(ctx, v2.0, v255, v230.1, v230.0);
+                                // Rule at src/opts/cprop.isle line 116.
+                                returns.push(v256);
+                            }
+                        }
+                    }
+                }
+            }
+            &InstructionData::Ternary {
+                opcode: ref v95,
+                args: ref v96,
+            } => {
+                match v95 {
+                    &Opcode::Select => {
+                        let v97 = C::unpack_value_array_3(ctx, v96);
+                        let v101 = C::inst_data_etor(ctx, v97.0);
+                        let mut v101 = v101;
+                        while let Some(v102) = v101.next(ctx) {
+                            match &v102.1 {
+                                &InstructionData::FloatCompare {
+                                    opcode: ref v427,
+                                    args: ref v428,
+                                    cond: ref v429,
+                                } => {
+                                    if let &Opcode::Fcmp = v427 {
+                                        match v429 {
+                                            &FloatCC::GreaterThan => {
+                                                let v430 = C::unpack_value_array_2(ctx, v428);
+                                                if v97.1 == v430.0 {
+                                                    if v97.2 == v430.1 {
+                                                        let v434 = constructor_fmax_pseudo(
+                                                            ctx, v2.0, v430.0, v430.1,
+                                                        );
+                                                        // Rule at src/opts/selects.isle line 57.
+                                                        returns.push(v434);
+                                                    }
+                                                }
+                                            }
+                                            &FloatCC::LessThan => {
+                                                let v430 = C::unpack_value_array_2(ctx, v428);
+                                                if v97.1 == v430.0 {
+                                                    if v97.2 == v430.1 {
+                                                        let v433 = constructor_fmin_pseudo(
+                                                            ctx, v2.0, v430.0, v430.1,
+                                                        );
+                                                        // Rule at src/opts/selects.isle line 54.
+                                                        returns.push(v433);
+                                                    }
+                                                }
+                                            }
+                                            _ => {}
+                                        }
+                                    }
+                                }
+                                &InstructionData::IntCompare {
+                                    opcode: ref v413,
+                                    args: ref v414,
+                                    cond: ref v415,
+                                } => {
+                                    if let &Opcode::Icmp = v413 {
+                                        match v415 {
+                                            &IntCC::SignedGreaterThan => {
+                                                let v416 = C::unpack_value_array_2(ctx, v414);
+                                                if v97.1 == v416.0 {
+                                                    if v97.2 == v416.1 {
+                                                        let v419 = constructor_smax(
+                                                            ctx, v2.0, v416.0, v416.1,
+                                                        );
+                                                        // Rule at src/opts/selects.isle line 8.
+                                                        returns.push(v419);
+                                                    }
+                                                }
+                                                if v97.1 == v416.1 {
+                                                    if v97.2 == v416.0 {
+                                                        let v421 = constructor_smin(
+                                                            ctx, v2.0, v416.0, v416.1,
+                                                        );
+                                                        // Rule at src/opts/selects.isle line 22.
+                                                        returns.push(v421);
+                                                    }
+                                                }
+                                            }
+                                            &IntCC::SignedGreaterThanOrEqual => {
+                                                let v416 = C::unpack_value_array_2(ctx, v414);
+                                                if v97.1 == v416.0 {
+                                                    if v97.2 == v416.1 {
+                                                        let v419 = constructor_smax(
+                                                            ctx, v2.0, v416.0, v416.1,
+                                                        );
+                                                        // Rule at src/opts/selects.isle line 9.
+                                                        returns.push(v419);
+                                                    }
+                                                }
+                                                if v97.1 == v416.1 {
+                                                    if v97.2 == v416.0 {
+                                                        let v421 = constructor_smin(
+                                                            ctx, v2.0, v416.0, v416.1,
+                                                        );
+                                                        // Rule at src/opts/selects.isle line 23.
+                                                        returns.push(v421);
+                                                    }
+                                                }
+                                            }
+                                            &IntCC::SignedLessThan => {
+                                                let v416 = C::unpack_value_array_2(ctx, v414);
+                                                if v97.1 == v416.0 {
+                                                    if v97.2 == v416.1 {
+                                                        let v421 = constructor_smin(
+                                                            ctx, v2.0, v416.0, v416.1,
+                                                        );
+                                                        // Rule at src/opts/selects.isle line 12.
+                                                        returns.push(v421);
+                                                    }
+                                                }
+                                                if v97.1 == v416.1 {
+                                                    if v97.2 == v416.0 {
+                                                        let v419 = constructor_smax(
+                                                            ctx, v2.0, v416.0, v416.1,
+                                                        );
+                                                        // Rule at src/opts/selects.isle line 18.
+                                                        returns.push(v419);
+                                                    }
+                                                }
+                                            }
+                                            &IntCC::SignedLessThanOrEqual => {
+                                                let v416 = C::unpack_value_array_2(ctx, v414);
+                                                if v97.1 == v416.0 {
+                                                    if v97.2 == v416.1 {
+                                                        let v421 = constructor_smin(
+                                                            ctx, v2.0, v416.0, v416.1,
+                                                        );
+                                                        // Rule at src/opts/selects.isle line 13.
+                                                        returns.push(v421);
+                                                    }
+                                                }
+                                                if v97.1 == v416.1 {
+                                                    if v97.2 == v416.0 {
+                                                        let v419 = constructor_smax(
+                                                            ctx, v2.0, v416.0, v416.1,
+                                                        );
+                                                        // Rule at src/opts/selects.isle line 19.
+                                                        returns.push(v419);
+                                                    }
+                                                }
+                                            }
+                                            &IntCC::UnsignedGreaterThan => {
+                                                let v416 = C::unpack_value_array_2(ctx, v414);
+                                                if v97.1 == v416.0 {
+                                                    if v97.2 == v416.1 {
+                                                        let v420 = constructor_umax(
+                                                            ctx, v2.0, v416.0, v416.1,
+                                                        );
+                                                        // Rule at src/opts/selects.isle line 10.
+                                                        returns.push(v420);
+                                                    }
+                                                }
+                                                if v97.1 == v416.1 {
+                                                    if v97.2 == v416.0 {
+                                                        let v422 = constructor_umin(
+                                                            ctx, v2.0, v416.0, v416.1,
+                                                        );
+                                                        // Rule at src/opts/selects.isle line 24.
+                                                        returns.push(v422);
+                                                    }
+                                                }
+                                            }
+                                            &IntCC::UnsignedGreaterThanOrEqual => {
+                                                let v416 = C::unpack_value_array_2(ctx, v414);
+                                                if v97.1 == v416.0 {
+                                                    if v97.2 == v416.1 {
+                                                        let v420 = constructor_umax(
+                                                            ctx, v2.0, v416.0, v416.1,
+                                                        );
+                                                        // Rule at src/opts/selects.isle line 11.
+                                                        returns.push(v420);
+                                                    }
+                                                }
+                                                if v97.1 == v416.1 {
+                                                    if v97.2 == v416.0 {
+                                                        let v422 = constructor_umin(
+                                                            ctx, v2.0, v416.0, v416.1,
+                                                        );
+                                                        // Rule at src/opts/selects.isle line 25.
+                                                        returns.push(v422);
+                                                    }
+                                                }
+                                            }
+                                            &IntCC::UnsignedLessThan => {
+                                                let v416 = C::unpack_value_array_2(ctx, v414);
+                                                if v97.1 == v416.0 {
+                                                    if v97.2 == v416.1 {
+                                                        let v422 = constructor_umin(
+                                                            ctx, v2.0, v416.0, v416.1,
+                                                        );
+                                                        // Rule at src/opts/selects.isle line 14.
+                                                        returns.push(v422);
+                                                    }
+                                                }
+                                                if v97.1 == v416.1 {
+                                                    if v97.2 == v416.0 {
+                                                        let v420 = constructor_umax(
+                                                            ctx, v2.0, v416.0, v416.1,
+                                                        );
+                                                        // Rule at src/opts/selects.isle line 20.
+                                                        returns.push(v420);
+                                                    }
+                                                }
+                                            }
+                                            &IntCC::UnsignedLessThanOrEqual => {
+                                                let v416 = C::unpack_value_array_2(ctx, v414);
+                                                if v97.1 == v416.0 {
+                                                    if v97.2 == v416.1 {
+                                                        let v422 = constructor_umin(
+                                                            ctx, v2.0, v416.0, v416.1,
+                                                        );
+                                                        // Rule at src/opts/selects.isle line 15.
+                                                        returns.push(v422);
+                                                    }
+                                                }
+                                                if v97.1 == v416.1 {
+                                                    if v97.2 == v416.0 {
+                                                        let v420 = constructor_umax(
+                                                            ctx, v2.0, v416.0, v416.1,
+                                                        );
+                                                        // Rule at src/opts/selects.isle line 21.
+                                                        returns.push(v420);
+                                                    }
+                                                }
+                                            }
+                                            _ => {}
+                                        }
+                                    }
+                                }
+                                &InstructionData::Unary {
+                                    opcode: ref v105,
+                                    arg: v106,
+                                } => {
+                                    if let &Opcode::Uextend = v105 {
+                                        let v354 = C::inst_data_etor(ctx, v106);
+                                        let mut v354 = v354;
+                                        while let Some(v355) = v354.next(ctx) {
+                                            if let &InstructionData::IntCompare {
+                                                opcode: ref v358,
+                                                args: ref v359,
+                                                cond: ref v360,
+                                            } = &v355.1
+                                            {
+                                                if let &Opcode::Icmp = v358 {
+                                                    let v364 = constructor_select(
+                                                        ctx, v2.0, v106, v97.1, v97.2,
+                                                    );
+                                                    // Rule at src/opts/icmp.isle line 29.
+                                                    returns.push(v364);
+                                                    // Rule at src/opts/icmp.isle line 32.
+                                                    returns.push(v364);
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                                &InstructionData::UnaryImm {
+                                    opcode: ref v287,
+                                    imm: v288,
+                                } => {
+                                    if let &Opcode::Iconst = v287 {
+                                        let v289 = C::u64_from_imm64(ctx, v288);
+                                        if v289 == 0x0 {
+                                            // Rule at src/opts/cprop.isle line 172.
+                                            returns.push(v97.2);
+                                        }
+                                        let v290 = C::u64_is_zero(ctx, v289);
+                                        if v290 == false {
+                                            // Rule at src/opts/cprop.isle line 169.
+                                            returns.push(v97.1);
+                                        }
+                                    }
+                                }
+                                _ => {}
+                            }
+                        }
+                        if v97.1 == v97.2 {
+                            // Rule at src/opts/selects.isle line 4.
+                            returns.push(v97.1);
+                        }
+                    }
+                    &Opcode::Bitselect => {
+                        let v423 = C::multi_lane(ctx, v2.0);
+                        if let Some(v424) = v423 {
+                            let v97 = C::unpack_value_array_3(ctx, v96);
+                            let v101 = C::inst_data_etor(ctx, v97.0);
+                            let mut v101 = v101;
+                            while let Some(v102) = v101.next(ctx) {
+                                if let &InstructionData::IntCompare {
+                                    opcode: ref v413,
+                                    args: ref v414,
+                                    cond: ref v415,
+                                } = &v102.1
+                                {
+                                    if let &Opcode::Icmp = v413 {
+                                        match v415 {
+                                            &IntCC::SignedGreaterThan => {
+                                                let v416 = C::unpack_value_array_2(ctx, v414);
+                                                if v97.1 == v416.0 {
+                                                    if v97.2 == v416.1 {
+                                                        let v419 = constructor_smax(
+                                                            ctx, v2.0, v416.0, v416.1,
+                                                        );
+                                                        // Rule at src/opts/selects.isle line 28.
+                                                        returns.push(v419);
+                                                    }
+                                                }
+                                                if v97.1 == v416.1 {
+                                                    if v97.2 == v416.0 {
+                                                        let v421 = constructor_smin(
+                                                            ctx, v2.0, v416.0, v416.1,
+                                                        );
+                                                        // Rule at src/opts/selects.isle line 42.
+                                                        returns.push(v421);
+                                                    }
+                                                }
+                                            }
+                                            &IntCC::SignedGreaterThanOrEqual => {
+                                                let v416 = C::unpack_value_array_2(ctx, v414);
+                                                if v97.1 == v416.0 {
+                                                    if v97.2 == v416.1 {
+                                                        let v419 = constructor_smax(
+                                                            ctx, v2.0, v416.0, v416.1,
+                                                        );
+                                                        // Rule at src/opts/selects.isle line 29.
+                                                        returns.push(v419);
+                                                    }
+                                                }
+                                                if v97.1 == v416.1 {
+                                                    if v97.2 == v416.0 {
+                                                        let v421 = constructor_smin(
+                                                            ctx, v2.0, v416.0, v416.1,
+                                                        );
+                                                        // Rule at src/opts/selects.isle line 43.
+                                                        returns.push(v421);
+                                                    }
+                                                }
+                                            }
+                                            &IntCC::SignedLessThan => {
+                                                let v416 = C::unpack_value_array_2(ctx, v414);
+                                                if v97.1 == v416.0 {
+                                                    if v97.2 == v416.1 {
+                                                        let v421 = constructor_smin(
+                                                            ctx, v2.0, v416.0, v416.1,
+                                                        );
+                                                        // Rule at src/opts/selects.isle line 32.
+                                                        returns.push(v421);
+                                                    }
+                                                }
+                                                if v97.1 == v416.1 {
+                                                    if v97.2 == v416.0 {
+                                                        let v419 = constructor_smax(
+                                                            ctx, v2.0, v416.0, v416.1,
+                                                        );
+                                                        // Rule at src/opts/selects.isle line 38.
+                                                        returns.push(v419);
+                                                    }
+                                                }
+                                            }
+                                            &IntCC::SignedLessThanOrEqual => {
+                                                let v416 = C::unpack_value_array_2(ctx, v414);
+                                                if v97.1 == v416.0 {
+                                                    if v97.2 == v416.1 {
+                                                        let v421 = constructor_smin(
+                                                            ctx, v2.0, v416.0, v416.1,
+                                                        );
+                                                        // Rule at src/opts/selects.isle line 33.
+                                                        returns.push(v421);
+                                                    }
+                                                }
+                                                if v97.1 == v416.1 {
+                                                    if v97.2 == v416.0 {
+                                                        let v419 = constructor_smax(
+                                                            ctx, v2.0, v416.0, v416.1,
+                                                        );
+                                                        // Rule at src/opts/selects.isle line 39.
+                                                        returns.push(v419);
+                                                    }
+                                                }
+                                            }
+                                            &IntCC::UnsignedGreaterThan => {
+                                                let v416 = C::unpack_value_array_2(ctx, v414);
+                                                if v97.1 == v416.0 {
+                                                    if v97.2 == v416.1 {
+                                                        let v420 = constructor_umax(
+                                                            ctx, v2.0, v416.0, v416.1,
+                                                        );
+                                                        // Rule at src/opts/selects.isle line 30.
+                                                        returns.push(v420);
+                                                    }
+                                                }
+                                                if v97.1 == v416.1 {
+                                                    if v97.2 == v416.0 {
+                                                        let v422 = constructor_umin(
+                                                            ctx, v2.0, v416.0, v416.1,
+                                                        );
+                                                        // Rule at src/opts/selects.isle line 44.
+                                                        returns.push(v422);
+                                                    }
+                                                }
+                                            }
+                                            &IntCC::UnsignedGreaterThanOrEqual => {
+                                                let v416 = C::unpack_value_array_2(ctx, v414);
+                                                if v97.1 == v416.0 {
+                                                    if v97.2 == v416.1 {
+                                                        let v420 = constructor_umax(
+                                                            ctx, v2.0, v416.0, v416.1,
+                                                        );
+                                                        // Rule at src/opts/selects.isle line 31.
+                                                        returns.push(v420);
+                                                    }
+                                                }
+                                                if v97.1 == v416.1 {
+                                                    if v97.2 == v416.0 {
+                                                        let v422 = constructor_umin(
+                                                            ctx, v2.0, v416.0, v416.1,
+                                                        );
+                                                        // Rule at src/opts/selects.isle line 45.
+                                                        returns.push(v422);
+                                                    }
+                                                }
+                                            }
+                                            &IntCC::UnsignedLessThan => {
+                                                let v416 = C::unpack_value_array_2(ctx, v414);
+                                                if v97.1 == v416.0 {
+                                                    if v97.2 == v416.1 {
+                                                        let v422 = constructor_umin(
+                                                            ctx, v2.0, v416.0, v416.1,
+                                                        );
+                                                        // Rule at src/opts/selects.isle line 34.
+                                                        returns.push(v422);
+                                                    }
+                                                }
+                                                if v97.1 == v416.1 {
+                                                    if v97.2 == v416.0 {
+                                                        let v420 = constructor_umax(
+                                                            ctx, v2.0, v416.0, v416.1,
+                                                        );
+                                                        // Rule at src/opts/selects.isle line 40.
+                                                        returns.push(v420);
+                                                    }
+                                                }
+                                            }
+                                            &IntCC::UnsignedLessThanOrEqual => {
+                                                let v416 = C::unpack_value_array_2(ctx, v414);
+                                                if v97.1 == v416.0 {
+                                                    if v97.2 == v416.1 {
+                                                        let v422 = constructor_umin(
+                                                            ctx, v2.0, v416.0, v416.1,
+                                                        );
+                                                        // Rule at src/opts/selects.isle line 35.
+                                                        returns.push(v422);
+                                                    }
+                                                }
+                                                if v97.1 == v416.1 {
+                                                    if v97.2 == v416.0 {
+                                                        let v420 = constructor_umax(
+                                                            ctx, v2.0, v416.0, v416.1,
+                                                        );
+                                                        // Rule at src/opts/selects.isle line 41.
+                                                        returns.push(v420);
+                                                    }
+                                                }
+                                            }
+                                            _ => {}
+                                        }
+                                    }
+                                }
+                            }
+                        }
+                        let v97 = C::unpack_value_array_3(ctx, v96);
+                        if v97.1 == v97.2 {
+                            // Rule at src/opts/selects.isle line 5.
+                            returns.push(v97.1);
+                        }
+                    }
+                    &Opcode::Fma => {
+                        let v97 = C::unpack_value_array_3(ctx, v96);
+                        let v101 = C::inst_data_etor(ctx, v97.0);
+                        let mut v101 = v101;
+                        while let Some(v102) = v101.next(ctx) {
+                            if let &InstructionData::Unary {
+                                opcode: ref v105,
+                                arg: v106,
+                            } = &v102.1
+                            {
+                                if let &Opcode::Fneg = v105 {
+                                    if v2.0 == v102.0 {
+                                        let v107 = C::inst_data_etor(ctx, v97.1);
+                                        let mut v107 = v107;
+                                        while let Some(v108) = v107.next(ctx) {
+                                            if let &InstructionData::Unary {
+                                                opcode: ref v111,
+                                                arg: v112,
+                                            } = &v108.1
+                                            {
+                                                if let &Opcode::Fneg = v111 {
+                                                    if v2.0 == v108.0 {
+                                                        let v113 = constructor_fma(
+                                                            ctx, v2.0, v106, v112, v97.2,
+                                                        );
+                                                        // Rule at src/opts/arithmetic.isle line 122.
+                                                        returns.push(v113);
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                            }
+                        }
+                    }
+                    _ => {}
+                }
+            }
+            &InstructionData::Unary {
+                opcode: ref v27,
+                arg: v28,
+            } => {
+                match v27 {
+                    &Opcode::Splat => {
+                        let v29 = C::inst_data_etor(ctx, v28);
+                        let mut v29 = v29;
+                        while let Some(v30) = v29.next(ctx) {
+                            match &v30.1 {
+                                &InstructionData::UnaryIeee32 {
+                                    opcode: ref v307,
+                                    imm: v308,
+                                } => {
+                                    if let &Opcode::F32const = v307 {
+                                        let v309 = C::u32_from_ieee32(ctx, v308);
+                                        let v310 = C::u32_as_u64(ctx, v309);
+                                        let v311 = constructor_splat32(ctx, v310);
+                                        let v312 = constructor_vconst(ctx, v2.0, v311);
+                                        // Rule at src/opts/cprop.isle line 188.
+                                        returns.push(v312);
+                                    }
+                                }
+                                &InstructionData::UnaryIeee64 {
+                                    opcode: ref v313,
+                                    imm: v314,
+                                } => {
+                                    if let &Opcode::F64const = v313 {
+                                        let v315 = C::u64_from_ieee64(ctx, v314);
+                                        let v316 = C::splat64(ctx, v315);
+                                        let v317 = constructor_vconst(ctx, v2.0, v316);
+                                        // Rule at src/opts/cprop.isle line 190.
+                                        returns.push(v317);
+                                    }
+                                }
+                                &InstructionData::UnaryImm {
+                                    opcode: ref v197,
+                                    imm: v198,
+                                } => {
+                                    if let &Opcode::Iconst = v197 {
+                                        match v30.0 {
+                                            I8 => {
+                                                let v292 = C::u64_uextend_imm64(ctx, I8, v198);
+                                                let v293 = constructor_splat8(ctx, v292);
+                                                let v294 = constructor_vconst(ctx, v2.0, v293);
+                                                // Rule at src/opts/cprop.isle line 180.
+                                                returns.push(v294);
+                                            }
+                                            I16 => {
+                                                let v296 = C::u64_uextend_imm64(ctx, I16, v198);
+                                                let v297 = constructor_splat16(ctx, v296);
+                                                let v298 = constructor_vconst(ctx, v2.0, v297);
+                                                // Rule at src/opts/cprop.isle line 182.
+                                                returns.push(v298);
+                                            }
+                                            I32 => {
+                                                let v300 = C::u64_uextend_imm64(ctx, I32, v198);
+                                                let v301 = constructor_splat32(ctx, v300);
+                                                let v302 = constructor_vconst(ctx, v2.0, v301);
+                                                // Rule at src/opts/cprop.isle line 184.
+                                                returns.push(v302);
+                                            }
+                                            I64 => {
+                                                let v304 = C::u64_uextend_imm64(ctx, I64, v198);
+                                                let v305 = C::splat64(ctx, v304);
+                                                let v306 = constructor_vconst(ctx, v2.0, v305);
+                                                // Rule at src/opts/cprop.isle line 186.
+                                                returns.push(v306);
+                                            }
+                                            _ => {}
+                                        }
+                                    }
+                                }
+                                _ => {}
+                            }
+                        }
+                    }
+                    &Opcode::Ineg => {
+                        let v29 = C::inst_data_etor(ctx, v28);
+                        let mut v29 = v29;
+                        while let Some(v30) = v29.next(ctx) {
+                            match &v30.1 {
+                                &InstructionData::Binary {
+                                    opcode: ref v57,
+                                    args: ref v58,
+                                } => {
+                                    if let &Opcode::Ushr = v57 {
+                                        if v2.0 == v30.0 {
+                                            let v59 = C::unpack_value_array_2(ctx, v58);
+                                            let v62 = C::inst_data_etor(ctx, v59.1);
+                                            let mut v62 = v62;
+                                            while let Some(v63) = v62.next(ctx) {
+                                                if let &InstructionData::UnaryImm {
+                                                    opcode: ref v66,
+                                                    imm: v67,
+                                                } = &v63.1
+                                                {
+                                                    if let &Opcode::Iconst = v66 {
+                                                        let v68 = C::u64_from_imm64(ctx, v67);
+                                                        let v150 = C::ty_bits(ctx, v2.0);
+                                                        let v151 = C::u8_as_u64(ctx, v150);
+                                                        let v153 = C::u64_sub(ctx, v151, 0x1);
+                                                        let v458 = C::u64_eq(ctx, v68, v153);
+                                                        if v458 == true {
+                                                            if v2.0 == v63.0 {
+                                                                let v459 = constructor_sshr(
+                                                                    ctx, v2.0, v59.0, v59.1,
+                                                                );
+                                                                // Rule at src/opts/shifts.isle line 102.
+                                                                returns.push(v459);
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                                &InstructionData::Unary {
+                                    opcode: ref v33,
+                                    arg: v34,
+                                } => {
+                                    if let &Opcode::Ineg = v33 {
+                                        if v2.0 == v30.0 {
+                                            let v35 = C::subsume(ctx, v34);
+                                            // Rule at src/opts/arithmetic.isle line 25.
+                                            returns.push(v35);
+                                        }
+                                    }
+                                }
+                                _ => {}
+                            }
+                        }
+                    }
+                    &Opcode::Iabs => {
+                        let v29 = C::inst_data_etor(ctx, v28);
+                        let mut v29 = v29;
+                        while let Some(v30) = v29.next(ctx) {
+                            if let &InstructionData::Unary {
+                                opcode: ref v33,
+                                arg: v34,
+                            } = &v30.1
+                            {
+                                match v33 {
+                                    &Opcode::Ineg => {
+                                        if v2.0 == v30.0 {
+                                            let v42 = constructor_iabs(ctx, v2.0, v34);
+                                            // Rule at src/opts/arithmetic.isle line 32.
+                                            returns.push(v42);
+                                        }
+                                    }
+                                    &Opcode::Iabs => {
+                                        if v2.0 == v30.0 {
+                                            let v43 = C::subsume(ctx, v28);
+                                            // Rule at src/opts/arithmetic.isle line 36.
+                                            returns.push(v43);
+                                        }
+                                    }
+                                    _ => {}
+                                }
+                            }
+                        }
+                    }
+                    &Opcode::Bnot => {
+                        let v29 = C::inst_data_etor(ctx, v28);
+                        let mut v29 = v29;
+                        while let Some(v30) = v29.next(ctx) {
+                            match &v30.1 {
+                                &InstructionData::Binary {
+                                    opcode: ref v57,
+                                    args: ref v58,
+                                } => {
+                                    match v57 {
+                                        &Opcode::Iadd => {
+                                            if v2.0 == v30.0 {
+                                                let v59 = C::unpack_value_array_2(ctx, v58);
+                                                let v62 = C::inst_data_etor(ctx, v59.1);
+                                                let mut v62 = v62;
+                                                while let Some(v63) = v62.next(ctx) {
+                                                    if let &InstructionData::UnaryImm {
+                                                        opcode: ref v66,
+                                                        imm: v67,
+                                                    } = &v63.1
+                                                    {
+                                                        if let &Opcode::Iconst = v66 {
+                                                            let v70 = C::i64_sextend_imm64(
+                                                                ctx, v2.0, v67,
+                                                            );
+                                                            if v70 == -0x1 {
+                                                                if v2.0 == v63.0 {
+                                                                    let v69 = constructor_ineg(
+                                                                        ctx, v2.0, v59.0,
+                                                                    );
+                                                                    // Rule at src/opts/arithmetic.isle line 82.
+                                                                    returns.push(v69);
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                                let v71 = C::inst_data_etor(ctx, v59.0);
+                                                let mut v71 = v71;
+                                                while let Some(v72) = v71.next(ctx) {
+                                                    if let &InstructionData::UnaryImm {
+                                                        opcode: ref v75,
+                                                        imm: v76,
+                                                    } = &v72.1
+                                                    {
+                                                        if let &Opcode::Iconst = v75 {
+                                                            let v77 = C::i64_sextend_imm64(
+                                                                ctx, v2.0, v76,
+                                                            );
+                                                            if v77 == -0x1 {
+                                                                if v2.0 == v72.0 {
+                                                                    let v78 = constructor_ineg(
+                                                                        ctx, v2.0, v59.1,
+                                                                    );
+                                                                    // Rule at src/opts/arithmetic.isle line 85.
+                                                                    returns.push(v78);
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                        &Opcode::Isub => {
+                                            if v2.0 == v30.0 {
+                                                let v59 = C::unpack_value_array_2(ctx, v58);
+                                                let v62 = C::inst_data_etor(ctx, v59.1);
+                                                let mut v62 = v62;
+                                                while let Some(v63) = v62.next(ctx) {
+                                                    if let &InstructionData::UnaryImm {
+                                                        opcode: ref v66,
+                                                        imm: v67,
+                                                    } = &v63.1
+                                                    {
+                                                        if let &Opcode::Iconst = v66 {
+                                                            let v68 = C::u64_from_imm64(ctx, v67);
+                                                            if v68 == 0x1 {
+                                                                if v2.0 == v63.0 {
+                                                                    let v69 = constructor_ineg(
+                                                                        ctx, v2.0, v59.0,
+                                                                    );
+                                                                    // Rule at src/opts/arithmetic.isle line 80.
+                                                                    returns.push(v69);
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                        &Opcode::Band => {
+                                            let v59 = C::unpack_value_array_2(ctx, v58);
+                                            let v119 = constructor_bnot(ctx, v2.0, v59.0);
+                                            let v120 = constructor_bnot(ctx, v2.0, v59.1);
+                                            let v122 = constructor_bor(ctx, v2.0, v119, v120);
+                                            // Rule at src/opts/bitops.isle line 60.
+                                            returns.push(v122);
+                                        }
+                                        &Opcode::Bor => {
+                                            if v2.0 == v30.0 {
+                                                let v59 = C::unpack_value_array_2(ctx, v58);
+                                                let v119 = constructor_bnot(ctx, v2.0, v59.0);
+                                                let v120 = constructor_bnot(ctx, v2.0, v59.1);
+                                                let v121 = constructor_band(ctx, v2.0, v119, v120);
+                                                // Rule at src/opts/bitops.isle line 57.
+                                                returns.push(v121);
+                                            }
+                                        }
+                                        _ => {}
+                                    }
+                                }
+                                &InstructionData::Unary {
+                                    opcode: ref v33,
+                                    arg: v34,
+                                } => {
+                                    if let &Opcode::Bnot = v33 {
+                                        if v2.0 == v30.0 {
+                                            let v35 = C::subsume(ctx, v34);
+                                            // Rule at src/opts/bitops.isle line 53.
+                                            returns.push(v35);
+                                        }
+                                    }
+                                }
+                                &InstructionData::UnaryImm {
+                                    opcode: ref v197,
+                                    imm: v198,
+                                } => {
+                                    if let &Opcode::Iconst = v197 {
+                                        let v44 = C::fits_in_64(ctx, v2.0);
+                                        if let Some(v45) = v44 {
+                                            if v30.0 == v45 {
+                                                let v199 = C::u64_from_imm64(ctx, v198);
+                                                let v200 = C::u64_not(ctx, v199);
+                                                let v201 = C::imm64_masked(ctx, v45, v200);
+                                                let v202 = constructor_iconst(ctx, v45, v201);
+                                                let v203 = C::subsume(ctx, v202);
+                                                // Rule at src/opts/cprop.isle line 53.
+                                                returns.push(v203);
+                                            }
+                                        }
+                                    }
+                                }
+                                _ => {}
+                            }
+                        }
+                        let v406 = C::remat(ctx, arg0);
+                        // Rule at src/opts/remat.isle line 24.
+                        returns.push(v406);
+                    }
+                    &Opcode::Fneg => {
+                        let v29 = C::inst_data_etor(ctx, v28);
+                        let mut v29 = v29;
+                        while let Some(v30) = v29.next(ctx) {
+                            if let &InstructionData::Unary {
+                                opcode: ref v33,
+                                arg: v34,
+                            } = &v30.1
+                            {
+                                if let &Opcode::Fneg = v33 {
+                                    if v2.0 == v30.0 {
+                                        let v35 = C::subsume(ctx, v34);
+                                        // Rule at src/opts/arithmetic.isle line 118.
+                                        returns.push(v35);
+                                    }
+                                }
+                            }
+                        }
+                    }
+                    &Opcode::Ireduce => {
+                        let v29 = C::inst_data_etor(ctx, v28);
+                        let mut v29 = v29;
+                        while let Some(v30) = v29.next(ctx) {
+                            match &v30.1 {
+                                &InstructionData::Unary {
+                                    opcode: ref v33,
+                                    arg: v34,
+                                } => {
+                                    match v33 {
+                                        &Opcode::Uextend => {
+                                            let v333 = C::value_type(ctx, v34);
+                                            if v2.0 == v333 {
+                                                // Rule at src/opts/extends.isle line 34.
+                                                returns.push(v34);
+                                            }
+                                        }
+                                        &Opcode::Sextend => {
+                                            let v333 = C::value_type(ctx, v34);
+                                            if v2.0 == v333 {
+                                                // Rule at src/opts/extends.isle line 33.
+                                                returns.push(v34);
+                                            }
+                                        }
+                                        _ => {}
+                                    }
+                                }
+                                &InstructionData::UnaryImm {
+                                    opcode: ref v197,
+                                    imm: v198,
+                                } => {
+                                    if let &Opcode::Iconst = v197 {
+                                        let v213 = C::fits_in_64(ctx, v30.0);
+                                        if let Some(v214) = v213 {
+                                            let v199 = C::u64_from_imm64(ctx, v198);
+                                            let v215 = C::imm64_masked(ctx, v2.0, v199);
+                                            let v216 = constructor_iconst(ctx, v2.0, v215);
+                                            let v217 = C::subsume(ctx, v216);
+                                            // Rule at src/opts/cprop.isle line 73.
+                                            returns.push(v217);
+                                        }
+                                    }
+                                }
+                                _ => {}
+                            }
+                        }
+                    }
+                    &Opcode::SwidenLow => {
+                        let v29 = C::inst_data_etor(ctx, v28);
+                        let mut v29 = v29;
+                        while let Some(v30) = v29.next(ctx) {
+                            if let &InstructionData::Unary {
+                                opcode: ref v33,
+                                arg: v34,
+                            } = &v30.1
+                            {
+                                if let &Opcode::Splat = v33 {
+                                    let v334 = C::lane_type(ctx, v2.0);
+                                    let v335 = constructor_sextend(ctx, v334, v34);
+                                    let v336 = constructor_splat(ctx, v2.0, v335);
+                                    // Rule at src/opts/extends.isle line 38.
+                                    returns.push(v336);
+                                }
+                            }
+                        }
+                    }
+                    &Opcode::SwidenHigh => {
+                        let v29 = C::inst_data_etor(ctx, v28);
+                        let mut v29 = v29;
+                        while let Some(v30) = v29.next(ctx) {
+                            if let &InstructionData::Unary {
+                                opcode: ref v33,
+                                arg: v34,
+                            } = &v30.1
+                            {
+                                if let &Opcode::Splat = v33 {
+                                    let v334 = C::lane_type(ctx, v2.0);
+                                    let v335 = constructor_sextend(ctx, v334, v34);
+                                    let v336 = constructor_splat(ctx, v2.0, v335);
+                                    // Rule at src/opts/extends.isle line 37.
+                                    returns.push(v336);
+                                }
+                            }
+                        }
+                    }
+                    &Opcode::UwidenLow => {
+                        let v29 = C::inst_data_etor(ctx, v28);
+                        let mut v29 = v29;
+                        while let Some(v30) = v29.next(ctx) {
+                            if let &InstructionData::Unary {
+                                opcode: ref v33,
+                                arg: v34,
+                            } = &v30.1
+                            {
+                                if let &Opcode::Splat = v33 {
+                                    let v334 = C::lane_type(ctx, v2.0);
+                                    let v337 = constructor_uextend(ctx, v334, v34);
+                                    let v338 = constructor_splat(ctx, v2.0, v337);
+                                    // Rule at src/opts/extends.isle line 41.
+                                    returns.push(v338);
+                                }
+                            }
+                        }
+                    }
+                    &Opcode::UwidenHigh => {
+                        let v29 = C::inst_data_etor(ctx, v28);
+                        let mut v29 = v29;
+                        while let Some(v30) = v29.next(ctx) {
+                            if let &InstructionData::Unary {
+                                opcode: ref v33,
+                                arg: v34,
+                            } = &v30.1
+                            {
+                                if let &Opcode::Splat = v33 {
+                                    let v334 = C::lane_type(ctx, v2.0);
+                                    let v337 = constructor_uextend(ctx, v334, v34);
+                                    let v338 = constructor_splat(ctx, v2.0, v337);
+                                    // Rule at src/opts/extends.isle line 40.
+                                    returns.push(v338);
+                                }
+                            }
+                        }
+                    }
+                    &Opcode::Uextend => {
+                        let v29 = C::inst_data_etor(ctx, v28);
+                        let mut v29 = v29;
+                        while let Some(v30) = v29.next(ctx) {
+                            match &v30.1 {
+                                &InstructionData::Unary {
+                                    opcode: ref v33,
+                                    arg: v34,
+                                } => {
+                                    if let &Opcode::Uextend = v33 {
+                                        let v318 = constructor_uextend(ctx, v2.0, v34);
+                                        // Rule at src/opts/extends.isle line 2.
+                                        returns.push(v318);
+                                    }
+                                }
+                                &InstructionData::UnaryImm {
+                                    opcode: ref v197,
+                                    imm: v198,
+                                } => {
+                                    if let &Opcode::Iconst = v197 {
+                                        let v44 = C::fits_in_64(ctx, v2.0);
+                                        if let Some(v45) = v44 {
+                                            let v218 = C::u64_uextend_imm64(ctx, v30.0, v198);
+                                            let v219 = C::imm64(ctx, v218);
+                                            let v220 = constructor_iconst(ctx, v45, v219);
+                                            let v221 = C::subsume(ctx, v220);
+                                            // Rule at src/opts/cprop.isle line 76.
+                                            returns.push(v221);
+                                        }
+                                    }
+                                }
+                                _ => {}
+                            }
+                        }
+                    }
+                    &Opcode::Sextend => {
+                        let v29 = C::inst_data_etor(ctx, v28);
+                        let mut v29 = v29;
+                        while let Some(v30) = v29.next(ctx) {
+                            match &v30.1 {
+                                &InstructionData::Unary {
+                                    opcode: ref v33,
+                                    arg: v34,
+                                } => {
+                                    if let &Opcode::Sextend = v33 {
+                                        let v319 = constructor_sextend(ctx, v2.0, v34);
+                                        // Rule at src/opts/extends.isle line 4.
+                                        returns.push(v319);
+                                    }
+                                }
+                                &InstructionData::UnaryImm {
+                                    opcode: ref v197,
+                                    imm: v198,
+                                } => {
+                                    if let &Opcode::Iconst = v197 {
+                                        let v44 = C::fits_in_64(ctx, v2.0);
+                                        if let Some(v45) = v44 {
+                                            let v222 = C::i64_sextend_imm64(ctx, v30.0, v198);
+                                            let v223 = C::i64_as_u64(ctx, v222);
+                                            let v224 = C::imm64_masked(ctx, v45, v223);
+                                            let v225 = constructor_iconst(ctx, v45, v224);
+                                            let v226 = C::subsume(ctx, v225);
+                                            // Rule at src/opts/cprop.isle line 79.
+                                            returns.push(v226);
+                                        }
+                                    }
+                                }
+                                _ => {}
+                            }
+                        }
+                    }
+                    &Opcode::FcvtFromUint => {
+                        let v29 = C::inst_data_etor(ctx, v28);
+                        let mut v29 = v29;
+                        while let Some(v30) = v29.next(ctx) {
+                            if let &InstructionData::Unary {
+                                opcode: ref v33,
+                                arg: v34,
+                            } = &v30.1
+                            {
+                                if let &Opcode::Splat = v33 {
+                                    let v334 = C::lane_type(ctx, v2.0);
+                                    let v460 = constructor_fcvt_from_uint(ctx, v334, v34);
+                                    let v461 = constructor_splat(ctx, v2.0, v460);
+                                    // Rule at src/opts/vector.isle line 5.
+                                    returns.push(v461);
+                                }
+                            }
+                        }
+                    }
+                    &Opcode::FcvtFromSint => {
+                        let v29 = C::inst_data_etor(ctx, v28);
+                        let mut v29 = v29;
+                        while let Some(v30) = v29.next(ctx) {
+                            if let &InstructionData::Unary {
+                                opcode: ref v33,
+                                arg: v34,
+                            } = &v30.1
+                            {
+                                if let &Opcode::Splat = v33 {
+                                    let v334 = C::lane_type(ctx, v2.0);
+                                    let v462 = constructor_fcvt_from_sint(ctx, v334, v34);
+                                    let v463 = constructor_splat(ctx, v2.0, v462);
+                                    // Rule at src/opts/vector.isle line 7.
+                                    returns.push(v463);
+                                }
+                            }
+                        }
+                    }
+                    _ => {}
+                }
+            }
+            &InstructionData::UnaryIeee32 {
+                opcode: ref v409,
+                imm: v410,
+            } => {
+                if let &Opcode::F32const = v409 {
+                    let v406 = C::remat(ctx, arg0);
+                    // Rule at src/opts/remat.isle line 28.
+                    returns.push(v406);
+                }
+            }
+            &InstructionData::UnaryIeee64 {
+                opcode: ref v411,
+                imm: v412,
+            } => {
+                if let &Opcode::F64const = v411 {
+                    let v406 = C::remat(ctx, arg0);
+                    // Rule at src/opts/remat.isle line 30.
+                    returns.push(v406);
+                }
+            }
+            &InstructionData::UnaryImm {
+                opcode: ref v407,
+                imm: v408,
+            } => {
+                if let &Opcode::Iconst = v407 {
+                    let v406 = C::remat(ctx, arg0);
+                    // Rule at src/opts/remat.isle line 26.
+                    returns.push(v406);
+                }
+            }
+            _ => {}
+        }
+    }
+    return ContextIterWrapper::from(returns.into_iter());
+}
+
+// Generated as internal constructor for term splat8.
+pub fn constructor_splat8<C: Context>(ctx: &mut C, arg0: u64) -> Constant {
+    let v2 = C::u64_shl(ctx, arg0, 0x8);
+    let v3 = C::u64_or(ctx, arg0, v2);
+    let v4 = constructor_splat16(ctx, v3);
+    // Rule at src/opts/cprop.isle line 194.
+    return v4;
+}
+
+// Generated as internal constructor for term splat16.
+pub fn constructor_splat16<C: Context>(ctx: &mut C, arg0: u64) -> Constant {
+    let v2 = C::u64_shl(ctx, arg0, 0x10);
+    let v3 = C::u64_or(ctx, arg0, v2);
+    let v4 = constructor_splat32(ctx, v3);
+    // Rule at src/opts/cprop.isle line 196.
+    return v4;
+}
+
+// Generated as internal constructor for term splat32.
+pub fn constructor_splat32<C: Context>(ctx: &mut C, arg0: u64) -> Constant {
+    let v2 = C::u64_shl(ctx, arg0, 0x20);
+    let v3 = C::u64_or(ctx, arg0, v2);
+    let v4 = C::splat64(ctx, v3);
+    // Rule at src/opts/cprop.isle line 198.
+    return v4;
+}
+
+// Generated as internal constructor for term intcc_comparable.
+pub fn constructor_intcc_comparable<C: Context>(
+    ctx: &mut C,
+    arg0: &IntCC,
+    arg1: &IntCC,
+) -> Option<bool> {
+    let v2 = constructor_intcc_class(ctx, arg0);
+    let v3 = constructor_intcc_class(ctx, arg1);
+    let v4 = C::u64_and(ctx, v2, v3);
+    let v5 = C::u64_is_zero(ctx, v4);
+    if v5 == false {
+        let v7 = C::u64_eq(ctx, 0x2, v4);
+        // Rule at src/opts/icmp.isle line 137.
+        return Some(v7);
+    }
+    None
+}
+
+// Generated as internal constructor for term decompose_intcc.
+pub fn constructor_decompose_intcc<C: Context>(ctx: &mut C, arg0: &IntCC) -> u64 {
+    match arg0 {
+        &IntCC::Equal => {
+            // Rule at src/opts/icmp.isle line 142.
+            return 0x1;
+        }
+        &IntCC::NotEqual => {
+            // Rule at src/opts/icmp.isle line 151.
+            return 0x6;
+        }
+        &IntCC::SignedGreaterThan => {
+            // Rule at src/opts/icmp.isle line 148.
+            return 0x4;
+        }
+        &IntCC::SignedGreaterThanOrEqual => {
+            // Rule at src/opts/icmp.isle line 150.
+            return 0x5;
+        }
+        &IntCC::SignedLessThan => {
+            // Rule at src/opts/icmp.isle line 144.
+            return 0x2;
+        }
+        &IntCC::SignedLessThanOrEqual => {
+            // Rule at src/opts/icmp.isle line 146.
+            return 0x3;
+        }
+        &IntCC::UnsignedGreaterThan => {
+            // Rule at src/opts/icmp.isle line 147.
+            return 0x4;
+        }
+        &IntCC::UnsignedGreaterThanOrEqual => {
+            // Rule at src/opts/icmp.isle line 149.
+            return 0x5;
+        }
+        &IntCC::UnsignedLessThan => {
+            // Rule at src/opts/icmp.isle line 143.
+            return 0x2;
+        }
+        &IntCC::UnsignedLessThanOrEqual => {
+            // Rule at src/opts/icmp.isle line 145.
+            return 0x3;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "decompose_intcc", "src/opts/icmp.isle line 141"
+    )
+}
+
+// Generated as internal constructor for term compose_icmp.
+pub fn constructor_compose_icmp<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: u64,
+    arg2: bool,
+    arg3: Value,
+    arg4: Value,
+) -> Value {
+    match arg1 {
+        0x0 => {
+            let v6 = C::imm64(ctx, 0x0);
+            let v7 = constructor_iconst(ctx, arg0, v6);
+            let v8 = C::subsume(ctx, v7);
+            // Rule at src/opts/icmp.isle line 154.
+            return v8;
+        }
+        0x1 => {
+            let v10 = constructor_icmp(ctx, arg0, &IntCC::Equal, arg3, arg4);
+            // Rule at src/opts/icmp.isle line 155.
+            return v10;
+        }
+        0x2 => {
+            match arg2 {
+                true => {
+                    let v14 = constructor_icmp(ctx, arg0, &IntCC::SignedLessThan, arg3, arg4);
+                    // Rule at src/opts/icmp.isle line 157.
+                    return v14;
+                }
+                false => {
+                    let v12 = constructor_icmp(ctx, arg0, &IntCC::UnsignedLessThan, arg3, arg4);
+                    // Rule at src/opts/icmp.isle line 156.
+                    return v12;
+                }
+                _ => {}
+            }
+        }
+        0x3 => {
+            match arg2 {
+                true => {
+                    let v18 =
+                        constructor_icmp(ctx, arg0, &IntCC::SignedLessThanOrEqual, arg3, arg4);
+                    // Rule at src/opts/icmp.isle line 159.
+                    return v18;
+                }
+                false => {
+                    let v16 =
+                        constructor_icmp(ctx, arg0, &IntCC::UnsignedLessThanOrEqual, arg3, arg4);
+                    // Rule at src/opts/icmp.isle line 158.
+                    return v16;
+                }
+                _ => {}
+            }
+        }
+        0x4 => {
+            match arg2 {
+                true => {
+                    let v22 = constructor_icmp(ctx, arg0, &IntCC::SignedGreaterThan, arg3, arg4);
+                    // Rule at src/opts/icmp.isle line 161.
+                    return v22;
+                }
+                false => {
+                    let v20 = constructor_icmp(ctx, arg0, &IntCC::UnsignedGreaterThan, arg3, arg4);
+                    // Rule at src/opts/icmp.isle line 160.
+                    return v20;
+                }
+                _ => {}
+            }
+        }
+        0x5 => {
+            match arg2 {
+                true => {
+                    let v26 =
+                        constructor_icmp(ctx, arg0, &IntCC::SignedGreaterThanOrEqual, arg3, arg4);
+                    // Rule at src/opts/icmp.isle line 163.
+                    return v26;
+                }
+                false => {
+                    let v24 =
+                        constructor_icmp(ctx, arg0, &IntCC::UnsignedGreaterThanOrEqual, arg3, arg4);
+                    // Rule at src/opts/icmp.isle line 162.
+                    return v24;
+                }
+                _ => {}
+            }
+        }
+        0x6 => {
+            let v28 = constructor_icmp(ctx, arg0, &IntCC::NotEqual, arg3, arg4);
+            // Rule at src/opts/icmp.isle line 164.
+            return v28;
+        }
+        0x7 => {
+            let v30 = C::imm64(ctx, 0x1);
+            let v31 = constructor_iconst(ctx, arg0, v30);
+            let v32 = C::subsume(ctx, v31);
+            // Rule at src/opts/icmp.isle line 165.
+            return v32;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "compose_icmp", "src/opts/icmp.isle line 153"
+    )
+}
+
+// Generated as internal constructor for term intcc_class.
+pub fn constructor_intcc_class<C: Context>(ctx: &mut C, arg0: &IntCC) -> u64 {
+    match arg0 {
+        &IntCC::Equal => {
+            // Rule at src/opts/icmp.isle line 176.
+            return 0x3;
+        }
+        &IntCC::NotEqual => {
+            // Rule at src/opts/icmp.isle line 177.
+            return 0x3;
+        }
+        &IntCC::SignedGreaterThan => {
+            // Rule at src/opts/icmp.isle line 174.
+            return 0x2;
+        }
+        &IntCC::SignedGreaterThanOrEqual => {
+            // Rule at src/opts/icmp.isle line 175.
+            return 0x2;
+        }
+        &IntCC::SignedLessThan => {
+            // Rule at src/opts/icmp.isle line 172.
+            return 0x2;
+        }
+        &IntCC::SignedLessThanOrEqual => {
+            // Rule at src/opts/icmp.isle line 173.
+            return 0x2;
+        }
+        &IntCC::UnsignedGreaterThan => {
+            // Rule at src/opts/icmp.isle line 170.
+            return 0x1;
+        }
+        &IntCC::UnsignedGreaterThanOrEqual => {
+            // Rule at src/opts/icmp.isle line 171.
+            return 0x1;
+        }
+        &IntCC::UnsignedLessThan => {
+            // Rule at src/opts/icmp.isle line 168.
+            return 0x1;
+        }
+        &IntCC::UnsignedLessThanOrEqual => {
+            // Rule at src/opts/icmp.isle line 169.
+            return 0x1;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "intcc_class", "src/opts/icmp.isle line 167"
+    )
+}
+
+// Generated as internal constructor for term shift_amt_to_type.
+pub fn constructor_shift_amt_to_type<C: Context>(ctx: &mut C, arg0: u64) -> Option<Type> {
+    match arg0 {
+        0x8 => {
+            // Rule at src/opts/shifts.isle line 97.
+            return Some(I8);
+        }
+        0x10 => {
+            // Rule at src/opts/shifts.isle line 98.
+            return Some(I16);
+        }
+        0x20 => {
+            // Rule at src/opts/shifts.isle line 99.
+            return Some(I32);
+        }
+        _ => {}
+    }
+    None
+}
+
+// Generated as internal constructor for term func_addr.
+pub fn constructor_func_addr<C: Context>(ctx: &mut C, arg0: Type, arg1: FuncRef) -> Value {
+    let v3 = InstructionData::FuncAddr {
+        opcode: Opcode::FuncAddr,
+        func_ref: arg1,
+    };
+    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 363.
+    return v4;
+}
+
+// Generated as internal constructor for term splat.
+pub fn constructor_splat<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
+    let v3 = InstructionData::Unary {
+        opcode: Opcode::Splat,
+        arg: arg1,
+    };
+    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 372.
+    return v4;
+}
+
+// Generated as internal constructor for term swizzle.
+pub fn constructor_swizzle<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
+    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
+    let v5 = InstructionData::Binary {
+        opcode: Opcode::Swizzle,
+        args: v4.clone(),
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 381.
+    return v6;
+}
+
+// Generated as internal constructor for term x86_pshufb.
+pub fn constructor_x86_pshufb<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Value,
+    arg2: Value,
+) -> Value {
+    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
+    let v5 = InstructionData::Binary {
+        opcode: Opcode::X86Pshufb,
+        args: v4.clone(),
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 390.
+    return v6;
+}
+
+// Generated as internal constructor for term insertlane.
+pub fn constructor_insertlane<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Value,
+    arg2: Value,
+    arg3: Uimm8,
+) -> Value {
+    let v5 = &C::value_array_2_ctor(ctx, arg1, arg2);
+    let v6 = InstructionData::TernaryImm8 {
+        opcode: Opcode::Insertlane,
+        args: v5.clone(),
+        imm: arg3,
+    };
+    let v7 = C::make_inst_ctor(ctx, arg0, &v6);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 399.
+    return v7;
+}
+
+// Generated as internal constructor for term extractlane.
+pub fn constructor_extractlane<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Value,
+    arg2: Uimm8,
+) -> Value {
+    let v4 = InstructionData::BinaryImm8 {
+        opcode: Opcode::Extractlane,
+        arg: arg1,
+        imm: arg2,
+    };
+    let v5 = C::make_inst_ctor(ctx, arg0, &v4);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 408.
+    return v5;
+}
+
+// Generated as internal constructor for term smin.
+pub fn constructor_smin<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
+    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
+    let v5 = InstructionData::Binary {
+        opcode: Opcode::Smin,
+        args: v4.clone(),
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 417.
+    return v6;
+}
+
+// Generated as internal constructor for term umin.
+pub fn constructor_umin<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
+    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
+    let v5 = InstructionData::Binary {
+        opcode: Opcode::Umin,
+        args: v4.clone(),
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 426.
+    return v6;
+}
+
+// Generated as internal constructor for term smax.
+pub fn constructor_smax<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
+    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
+    let v5 = InstructionData::Binary {
+        opcode: Opcode::Smax,
+        args: v4.clone(),
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 435.
+    return v6;
+}
+
+// Generated as internal constructor for term umax.
+pub fn constructor_umax<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
+    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
+    let v5 = InstructionData::Binary {
+        opcode: Opcode::Umax,
+        args: v4.clone(),
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 444.
+    return v6;
+}
+
+// Generated as internal constructor for term avg_round.
+pub fn constructor_avg_round<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Value,
+    arg2: Value,
+) -> Value {
+    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
+    let v5 = InstructionData::Binary {
+        opcode: Opcode::AvgRound,
+        args: v4.clone(),
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 453.
+    return v6;
+}
+
+// Generated as internal constructor for term uadd_sat.
+pub fn constructor_uadd_sat<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Value,
+    arg2: Value,
+) -> Value {
+    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
+    let v5 = InstructionData::Binary {
+        opcode: Opcode::UaddSat,
+        args: v4.clone(),
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 462.
+    return v6;
+}
+
+// Generated as internal constructor for term sadd_sat.
+pub fn constructor_sadd_sat<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Value,
+    arg2: Value,
+) -> Value {
+    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
+    let v5 = InstructionData::Binary {
+        opcode: Opcode::SaddSat,
+        args: v4.clone(),
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 471.
+    return v6;
+}
+
+// Generated as internal constructor for term usub_sat.
+pub fn constructor_usub_sat<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Value,
+    arg2: Value,
+) -> Value {
+    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
+    let v5 = InstructionData::Binary {
+        opcode: Opcode::UsubSat,
+        args: v4.clone(),
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 480.
+    return v6;
+}
+
+// Generated as internal constructor for term ssub_sat.
+pub fn constructor_ssub_sat<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Value,
+    arg2: Value,
+) -> Value {
+    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
+    let v5 = InstructionData::Binary {
+        opcode: Opcode::SsubSat,
+        args: v4.clone(),
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 489.
+    return v6;
+}
+
+// Generated as internal constructor for term load.
+pub fn constructor_load<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: MemFlags,
+    arg2: Value,
+    arg3: Offset32,
+) -> Value {
+    let v5 = InstructionData::Load {
+        opcode: Opcode::Load,
+        arg: arg2,
+        flags: arg1,
+        offset: arg3,
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 498.
+    return v6;
+}
+
+// Generated as internal constructor for term uload8.
+pub fn constructor_uload8<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: MemFlags,
+    arg2: Value,
+    arg3: Offset32,
+) -> Value {
+    let v5 = InstructionData::Load {
+        opcode: Opcode::Uload8,
+        arg: arg2,
+        flags: arg1,
+        offset: arg3,
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 507.
+    return v6;
+}
+
+// Generated as internal constructor for term sload8.
+pub fn constructor_sload8<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: MemFlags,
+    arg2: Value,
+    arg3: Offset32,
+) -> Value {
+    let v5 = InstructionData::Load {
+        opcode: Opcode::Sload8,
+        arg: arg2,
+        flags: arg1,
+        offset: arg3,
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 516.
+    return v6;
+}
+
+// Generated as internal constructor for term uload16.
+pub fn constructor_uload16<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: MemFlags,
+    arg2: Value,
+    arg3: Offset32,
+) -> Value {
+    let v5 = InstructionData::Load {
+        opcode: Opcode::Uload16,
+        arg: arg2,
+        flags: arg1,
+        offset: arg3,
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 525.
+    return v6;
+}
+
+// Generated as internal constructor for term sload16.
+pub fn constructor_sload16<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: MemFlags,
+    arg2: Value,
+    arg3: Offset32,
+) -> Value {
+    let v5 = InstructionData::Load {
+        opcode: Opcode::Sload16,
+        arg: arg2,
+        flags: arg1,
+        offset: arg3,
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 534.
+    return v6;
+}
+
+// Generated as internal constructor for term uload32.
+pub fn constructor_uload32<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: MemFlags,
+    arg2: Value,
+    arg3: Offset32,
+) -> Value {
+    let v5 = InstructionData::Load {
+        opcode: Opcode::Uload32,
+        arg: arg2,
+        flags: arg1,
+        offset: arg3,
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 543.
+    return v6;
+}
+
+// Generated as internal constructor for term sload32.
+pub fn constructor_sload32<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: MemFlags,
+    arg2: Value,
+    arg3: Offset32,
+) -> Value {
+    let v5 = InstructionData::Load {
+        opcode: Opcode::Sload32,
+        arg: arg2,
+        flags: arg1,
+        offset: arg3,
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 552.
+    return v6;
+}
+
+// Generated as internal constructor for term uload8x8.
+pub fn constructor_uload8x8<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: MemFlags,
+    arg2: Value,
+    arg3: Offset32,
+) -> Value {
+    let v5 = InstructionData::Load {
+        opcode: Opcode::Uload8x8,
+        arg: arg2,
+        flags: arg1,
+        offset: arg3,
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 561.
+    return v6;
+}
+
+// Generated as internal constructor for term sload8x8.
+pub fn constructor_sload8x8<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: MemFlags,
+    arg2: Value,
+    arg3: Offset32,
+) -> Value {
+    let v5 = InstructionData::Load {
+        opcode: Opcode::Sload8x8,
+        arg: arg2,
+        flags: arg1,
+        offset: arg3,
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 570.
+    return v6;
+}
+
+// Generated as internal constructor for term uload16x4.
+pub fn constructor_uload16x4<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: MemFlags,
+    arg2: Value,
+    arg3: Offset32,
+) -> Value {
+    let v5 = InstructionData::Load {
+        opcode: Opcode::Uload16x4,
+        arg: arg2,
+        flags: arg1,
+        offset: arg3,
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 579.
+    return v6;
+}
+
+// Generated as internal constructor for term sload16x4.
+pub fn constructor_sload16x4<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: MemFlags,
+    arg2: Value,
+    arg3: Offset32,
+) -> Value {
+    let v5 = InstructionData::Load {
+        opcode: Opcode::Sload16x4,
+        arg: arg2,
+        flags: arg1,
+        offset: arg3,
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 588.
+    return v6;
+}
+
+// Generated as internal constructor for term uload32x2.
+pub fn constructor_uload32x2<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: MemFlags,
+    arg2: Value,
+    arg3: Offset32,
+) -> Value {
+    let v5 = InstructionData::Load {
+        opcode: Opcode::Uload32x2,
+        arg: arg2,
+        flags: arg1,
+        offset: arg3,
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 597.
+    return v6;
+}
+
+// Generated as internal constructor for term sload32x2.
+pub fn constructor_sload32x2<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: MemFlags,
+    arg2: Value,
+    arg3: Offset32,
+) -> Value {
+    let v5 = InstructionData::Load {
+        opcode: Opcode::Sload32x2,
+        arg: arg2,
+        flags: arg1,
+        offset: arg3,
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 606.
+    return v6;
+}
+
+// Generated as internal constructor for term stack_load.
+pub fn constructor_stack_load<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: StackSlot,
+    arg2: Offset32,
+) -> Value {
+    let v4 = InstructionData::StackLoad {
+        opcode: Opcode::StackLoad,
+        stack_slot: arg1,
+        offset: arg2,
+    };
+    let v5 = C::make_inst_ctor(ctx, arg0, &v4);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 615.
+    return v5;
+}
+
+// Generated as internal constructor for term stack_addr.
+pub fn constructor_stack_addr<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: StackSlot,
+    arg2: Offset32,
+) -> Value {
+    let v4 = InstructionData::StackLoad {
+        opcode: Opcode::StackAddr,
+        stack_slot: arg1,
+        offset: arg2,
+    };
+    let v5 = C::make_inst_ctor(ctx, arg0, &v4);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 624.
+    return v5;
+}
+
+// Generated as internal constructor for term dynamic_stack_load.
+pub fn constructor_dynamic_stack_load<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: DynamicStackSlot,
+) -> Value {
+    let v3 = InstructionData::DynamicStackLoad {
+        opcode: Opcode::DynamicStackLoad,
+        dynamic_stack_slot: arg1,
+    };
+    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 633.
+    return v4;
+}
+
+// Generated as internal constructor for term dynamic_stack_addr.
+pub fn constructor_dynamic_stack_addr<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: DynamicStackSlot,
+) -> Value {
+    let v3 = InstructionData::DynamicStackLoad {
+        opcode: Opcode::DynamicStackAddr,
+        dynamic_stack_slot: arg1,
+    };
+    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 642.
+    return v4;
+}
+
+// Generated as internal constructor for term global_value.
+pub fn constructor_global_value<C: Context>(ctx: &mut C, arg0: Type, arg1: GlobalValue) -> Value {
+    let v3 = InstructionData::UnaryGlobalValue {
+        opcode: Opcode::GlobalValue,
+        global_value: arg1,
+    };
+    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 651.
+    return v4;
+}
+
+// Generated as internal constructor for term symbol_value.
+pub fn constructor_symbol_value<C: Context>(ctx: &mut C, arg0: Type, arg1: GlobalValue) -> Value {
+    let v3 = InstructionData::UnaryGlobalValue {
+        opcode: Opcode::SymbolValue,
+        global_value: arg1,
+    };
+    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 660.
+    return v4;
+}
+
+// Generated as internal constructor for term tls_value.
+pub fn constructor_tls_value<C: Context>(ctx: &mut C, arg0: Type, arg1: GlobalValue) -> Value {
+    let v3 = InstructionData::UnaryGlobalValue {
+        opcode: Opcode::TlsValue,
+        global_value: arg1,
+    };
+    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 669.
+    return v4;
+}
+
+// Generated as internal constructor for term get_pinned_reg.
+pub fn constructor_get_pinned_reg<C: Context>(ctx: &mut C, arg0: Type) -> Value {
+    let v2 = InstructionData::NullAry {
+        opcode: Opcode::GetPinnedReg,
+    };
+    let v3 = C::make_inst_ctor(ctx, arg0, &v2);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 678.
+    return v3;
+}
+
+// Generated as internal constructor for term get_frame_pointer.
+pub fn constructor_get_frame_pointer<C: Context>(ctx: &mut C, arg0: Type) -> Value {
+    let v2 = InstructionData::NullAry {
+        opcode: Opcode::GetFramePointer,
+    };
+    let v3 = C::make_inst_ctor(ctx, arg0, &v2);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 687.
+    return v3;
+}
+
+// Generated as internal constructor for term get_stack_pointer.
+pub fn constructor_get_stack_pointer<C: Context>(ctx: &mut C, arg0: Type) -> Value {
+    let v2 = InstructionData::NullAry {
+        opcode: Opcode::GetStackPointer,
+    };
+    let v3 = C::make_inst_ctor(ctx, arg0, &v2);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 696.
+    return v3;
+}
+
+// Generated as internal constructor for term get_return_address.
+pub fn constructor_get_return_address<C: Context>(ctx: &mut C, arg0: Type) -> Value {
+    let v2 = InstructionData::NullAry {
+        opcode: Opcode::GetReturnAddress,
+    };
+    let v3 = C::make_inst_ctor(ctx, arg0, &v2);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 705.
+    return v3;
+}
+
+// Generated as internal constructor for term table_addr.
+pub fn constructor_table_addr<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Table,
+    arg2: Value,
+    arg3: Offset32,
+) -> Value {
+    let v5 = InstructionData::TableAddr {
+        opcode: Opcode::TableAddr,
+        arg: arg2,
+        table: arg1,
+        offset: arg3,
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 714.
+    return v6;
+}
+
+// Generated as internal constructor for term iconst.
+pub fn constructor_iconst<C: Context>(ctx: &mut C, arg0: Type, arg1: Imm64) -> Value {
+    let v3 = InstructionData::UnaryImm {
+        opcode: Opcode::Iconst,
+        imm: arg1,
+    };
+    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 723.
+    return v4;
+}
+
+// Generated as internal constructor for term f32const.
+pub fn constructor_f32const<C: Context>(ctx: &mut C, arg0: Type, arg1: Ieee32) -> Value {
+    let v3 = InstructionData::UnaryIeee32 {
+        opcode: Opcode::F32const,
+        imm: arg1,
+    };
+    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 732.
+    return v4;
+}
+
+// Generated as internal constructor for term f64const.
+pub fn constructor_f64const<C: Context>(ctx: &mut C, arg0: Type, arg1: Ieee64) -> Value {
+    let v3 = InstructionData::UnaryIeee64 {
+        opcode: Opcode::F64const,
+        imm: arg1,
+    };
+    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 741.
+    return v4;
+}
+
+// Generated as internal constructor for term vconst.
+pub fn constructor_vconst<C: Context>(ctx: &mut C, arg0: Type, arg1: Constant) -> Value {
+    let v3 = InstructionData::UnaryConst {
+        opcode: Opcode::Vconst,
+        constant_handle: arg1,
+    };
+    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 750.
+    return v4;
+}
+
+// Generated as internal constructor for term shuffle.
+pub fn constructor_shuffle<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Value,
+    arg2: Value,
+    arg3: Immediate,
+) -> Value {
+    let v5 = &C::value_array_2_ctor(ctx, arg1, arg2);
+    let v6 = InstructionData::Shuffle {
+        opcode: Opcode::Shuffle,
+        args: v5.clone(),
+        imm: arg3,
+    };
+    let v7 = C::make_inst_ctor(ctx, arg0, &v6);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 759.
+    return v7;
+}
+
+// Generated as internal constructor for term null.
+pub fn constructor_null<C: Context>(ctx: &mut C, arg0: Type) -> Value {
+    let v2 = InstructionData::NullAry {
+        opcode: Opcode::Null,
+    };
+    let v3 = C::make_inst_ctor(ctx, arg0, &v2);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 768.
+    return v3;
+}
+
+// Generated as internal constructor for term select.
+pub fn constructor_select<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Value,
+    arg2: Value,
+    arg3: Value,
+) -> Value {
+    let v5 = &C::value_array_3_ctor(ctx, arg1, arg2, arg3);
+    let v6 = InstructionData::Ternary {
+        opcode: Opcode::Select,
+        args: v5.clone(),
+    };
+    let v7 = C::make_inst_ctor(ctx, arg0, &v6);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 777.
+    return v7;
+}
+
+// Generated as internal constructor for term select_spectre_guard.
+pub fn constructor_select_spectre_guard<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Value,
+    arg2: Value,
+    arg3: Value,
+) -> Value {
+    let v5 = &C::value_array_3_ctor(ctx, arg1, arg2, arg3);
+    let v6 = InstructionData::Ternary {
+        opcode: Opcode::SelectSpectreGuard,
+        args: v5.clone(),
+    };
+    let v7 = C::make_inst_ctor(ctx, arg0, &v6);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 786.
+    return v7;
+}
+
+// Generated as internal constructor for term bitselect.
+pub fn constructor_bitselect<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Value,
+    arg2: Value,
+    arg3: Value,
+) -> Value {
+    let v5 = &C::value_array_3_ctor(ctx, arg1, arg2, arg3);
+    let v6 = InstructionData::Ternary {
+        opcode: Opcode::Bitselect,
+        args: v5.clone(),
+    };
+    let v7 = C::make_inst_ctor(ctx, arg0, &v6);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 795.
+    return v7;
+}
+
+// Generated as internal constructor for term x86_blendv.
+pub fn constructor_x86_blendv<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Value,
+    arg2: Value,
+    arg3: Value,
+) -> Value {
+    let v5 = &C::value_array_3_ctor(ctx, arg1, arg2, arg3);
+    let v6 = InstructionData::Ternary {
+        opcode: Opcode::X86Blendv,
+        args: v5.clone(),
+    };
+    let v7 = C::make_inst_ctor(ctx, arg0, &v6);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 804.
+    return v7;
+}
+
+// Generated as internal constructor for term vany_true.
+pub fn constructor_vany_true<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
+    let v3 = InstructionData::Unary {
+        opcode: Opcode::VanyTrue,
+        arg: arg1,
+    };
+    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 813.
+    return v4;
+}
+
+// Generated as internal constructor for term vall_true.
+pub fn constructor_vall_true<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
+    let v3 = InstructionData::Unary {
+        opcode: Opcode::VallTrue,
+        arg: arg1,
+    };
+    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 822.
+    return v4;
+}
+
+// Generated as internal constructor for term vhigh_bits.
+pub fn constructor_vhigh_bits<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
+    let v3 = InstructionData::Unary {
+        opcode: Opcode::VhighBits,
+        arg: arg1,
+    };
+    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 831.
+    return v4;
+}
+
+// Generated as internal constructor for term icmp.
+pub fn constructor_icmp<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &IntCC,
+    arg2: Value,
+    arg3: Value,
+) -> Value {
+    let v5 = &C::value_array_2_ctor(ctx, arg2, arg3);
+    let v6 = InstructionData::IntCompare {
+        opcode: Opcode::Icmp,
+        args: v5.clone(),
+        cond: arg1.clone(),
+    };
+    let v7 = C::make_inst_ctor(ctx, arg0, &v6);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 840.
+    return v7;
+}
+
+// Generated as internal constructor for term icmp_imm.
+pub fn constructor_icmp_imm<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &IntCC,
+    arg2: Value,
+    arg3: Imm64,
+) -> Value {
+    let v5 = InstructionData::IntCompareImm {
+        opcode: Opcode::IcmpImm,
+        arg: arg2,
+        cond: arg1.clone(),
+        imm: arg3,
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 849.
+    return v6;
+}
+
+// Generated as internal constructor for term iadd.
+pub fn constructor_iadd<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
+    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
+    let v5 = InstructionData::Binary {
+        opcode: Opcode::Iadd,
+        args: v4.clone(),
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 858.
+    return v6;
+}
+
+// Generated as internal constructor for term isub.
+pub fn constructor_isub<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
+    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
+    let v5 = InstructionData::Binary {
+        opcode: Opcode::Isub,
+        args: v4.clone(),
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 867.
+    return v6;
+}
+
+// Generated as internal constructor for term ineg.
+pub fn constructor_ineg<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
+    let v3 = InstructionData::Unary {
+        opcode: Opcode::Ineg,
+        arg: arg1,
+    };
+    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 876.
+    return v4;
+}
+
+// Generated as internal constructor for term iabs.
+pub fn constructor_iabs<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
+    let v3 = InstructionData::Unary {
+        opcode: Opcode::Iabs,
+        arg: arg1,
+    };
+    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 885.
+    return v4;
+}
+
+// Generated as internal constructor for term imul.
+pub fn constructor_imul<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
+    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
+    let v5 = InstructionData::Binary {
+        opcode: Opcode::Imul,
+        args: v4.clone(),
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 894.
+    return v6;
+}
+
+// Generated as internal constructor for term umulhi.
+pub fn constructor_umulhi<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
+    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
+    let v5 = InstructionData::Binary {
+        opcode: Opcode::Umulhi,
+        args: v4.clone(),
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 903.
+    return v6;
+}
+
+// Generated as internal constructor for term smulhi.
+pub fn constructor_smulhi<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
+    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
+    let v5 = InstructionData::Binary {
+        opcode: Opcode::Smulhi,
+        args: v4.clone(),
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 912.
+    return v6;
+}
+
+// Generated as internal constructor for term sqmul_round_sat.
+pub fn constructor_sqmul_round_sat<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Value,
+    arg2: Value,
+) -> Value {
+    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
+    let v5 = InstructionData::Binary {
+        opcode: Opcode::SqmulRoundSat,
+        args: v4.clone(),
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 921.
+    return v6;
+}
+
+// Generated as internal constructor for term x86_pmulhrsw.
+pub fn constructor_x86_pmulhrsw<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Value,
+    arg2: Value,
+) -> Value {
+    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
+    let v5 = InstructionData::Binary {
+        opcode: Opcode::X86Pmulhrsw,
+        args: v4.clone(),
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 930.
+    return v6;
+}
+
+// Generated as internal constructor for term udiv.
+pub fn constructor_udiv<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
+    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
+    let v5 = InstructionData::Binary {
+        opcode: Opcode::Udiv,
+        args: v4.clone(),
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 939.
+    return v6;
+}
+
+// Generated as internal constructor for term sdiv.
+pub fn constructor_sdiv<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
+    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
+    let v5 = InstructionData::Binary {
+        opcode: Opcode::Sdiv,
+        args: v4.clone(),
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 948.
+    return v6;
+}
+
+// Generated as internal constructor for term urem.
+pub fn constructor_urem<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
+    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
+    let v5 = InstructionData::Binary {
+        opcode: Opcode::Urem,
+        args: v4.clone(),
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 957.
+    return v6;
+}
+
+// Generated as internal constructor for term srem.
+pub fn constructor_srem<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
+    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
+    let v5 = InstructionData::Binary {
+        opcode: Opcode::Srem,
+        args: v4.clone(),
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 966.
+    return v6;
+}
+
+// Generated as internal constructor for term iadd_imm.
+pub fn constructor_iadd_imm<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Value,
+    arg2: Imm64,
+) -> Value {
+    let v4 = InstructionData::BinaryImm64 {
+        opcode: Opcode::IaddImm,
+        arg: arg1,
+        imm: arg2,
+    };
+    let v5 = C::make_inst_ctor(ctx, arg0, &v4);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 975.
+    return v5;
+}
+
+// Generated as internal constructor for term imul_imm.
+pub fn constructor_imul_imm<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Value,
+    arg2: Imm64,
+) -> Value {
+    let v4 = InstructionData::BinaryImm64 {
+        opcode: Opcode::ImulImm,
+        arg: arg1,
+        imm: arg2,
+    };
+    let v5 = C::make_inst_ctor(ctx, arg0, &v4);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 984.
+    return v5;
+}
+
+// Generated as internal constructor for term udiv_imm.
+pub fn constructor_udiv_imm<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Value,
+    arg2: Imm64,
+) -> Value {
+    let v4 = InstructionData::BinaryImm64 {
+        opcode: Opcode::UdivImm,
+        arg: arg1,
+        imm: arg2,
+    };
+    let v5 = C::make_inst_ctor(ctx, arg0, &v4);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 993.
+    return v5;
+}
+
+// Generated as internal constructor for term sdiv_imm.
+pub fn constructor_sdiv_imm<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Value,
+    arg2: Imm64,
+) -> Value {
+    let v4 = InstructionData::BinaryImm64 {
+        opcode: Opcode::SdivImm,
+        arg: arg1,
+        imm: arg2,
+    };
+    let v5 = C::make_inst_ctor(ctx, arg0, &v4);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1002.
+    return v5;
+}
+
+// Generated as internal constructor for term urem_imm.
+pub fn constructor_urem_imm<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Value,
+    arg2: Imm64,
+) -> Value {
+    let v4 = InstructionData::BinaryImm64 {
+        opcode: Opcode::UremImm,
+        arg: arg1,
+        imm: arg2,
+    };
+    let v5 = C::make_inst_ctor(ctx, arg0, &v4);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1011.
+    return v5;
+}
+
+// Generated as internal constructor for term srem_imm.
+pub fn constructor_srem_imm<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Value,
+    arg2: Imm64,
+) -> Value {
+    let v4 = InstructionData::BinaryImm64 {
+        opcode: Opcode::SremImm,
+        arg: arg1,
+        imm: arg2,
+    };
+    let v5 = C::make_inst_ctor(ctx, arg0, &v4);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1020.
+    return v5;
+}
+
+// Generated as internal constructor for term irsub_imm.
+pub fn constructor_irsub_imm<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Value,
+    arg2: Imm64,
+) -> Value {
+    let v4 = InstructionData::BinaryImm64 {
+        opcode: Opcode::IrsubImm,
+        arg: arg1,
+        imm: arg2,
+    };
+    let v5 = C::make_inst_ctor(ctx, arg0, &v4);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1029.
+    return v5;
+}
+
+// Generated as internal constructor for term iadd_cin.
+pub fn constructor_iadd_cin<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Value,
+    arg2: Value,
+    arg3: Value,
+) -> Value {
+    let v5 = &C::value_array_3_ctor(ctx, arg1, arg2, arg3);
+    let v6 = InstructionData::Ternary {
+        opcode: Opcode::IaddCin,
+        args: v5.clone(),
+    };
+    let v7 = C::make_inst_ctor(ctx, arg0, &v6);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1038.
+    return v7;
+}
+
+// Generated as internal constructor for term uadd_overflow_trap.
+pub fn constructor_uadd_overflow_trap<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Value,
+    arg2: Value,
+    arg3: &TrapCode,
+) -> Value {
+    let v5 = &C::value_array_2_ctor(ctx, arg1, arg2);
+    let v6 = InstructionData::IntAddTrap {
+        opcode: Opcode::UaddOverflowTrap,
+        args: v5.clone(),
+        code: arg3.clone(),
+    };
+    let v7 = C::make_inst_ctor(ctx, arg0, &v6);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1047.
+    return v7;
+}
+
+// Generated as internal constructor for term isub_bin.
+pub fn constructor_isub_bin<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Value,
+    arg2: Value,
+    arg3: Value,
+) -> Value {
+    let v5 = &C::value_array_3_ctor(ctx, arg1, arg2, arg3);
+    let v6 = InstructionData::Ternary {
+        opcode: Opcode::IsubBin,
+        args: v5.clone(),
+    };
+    let v7 = C::make_inst_ctor(ctx, arg0, &v6);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1056.
+    return v7;
+}
+
+// Generated as internal constructor for term band.
+pub fn constructor_band<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
+    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
+    let v5 = InstructionData::Binary {
+        opcode: Opcode::Band,
+        args: v4.clone(),
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1065.
+    return v6;
+}
+
+// Generated as internal constructor for term bor.
+pub fn constructor_bor<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
+    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
+    let v5 = InstructionData::Binary {
+        opcode: Opcode::Bor,
+        args: v4.clone(),
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1074.
+    return v6;
+}
+
+// Generated as internal constructor for term bxor.
+pub fn constructor_bxor<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
+    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
+    let v5 = InstructionData::Binary {
+        opcode: Opcode::Bxor,
+        args: v4.clone(),
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1083.
+    return v6;
+}
+
+// Generated as internal constructor for term bnot.
+pub fn constructor_bnot<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
+    let v3 = InstructionData::Unary {
+        opcode: Opcode::Bnot,
+        arg: arg1,
+    };
+    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1092.
+    return v4;
+}
+
+// Generated as internal constructor for term band_not.
+pub fn constructor_band_not<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Value,
+    arg2: Value,
+) -> Value {
+    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
+    let v5 = InstructionData::Binary {
+        opcode: Opcode::BandNot,
+        args: v4.clone(),
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1101.
+    return v6;
+}
+
+// Generated as internal constructor for term bor_not.
+pub fn constructor_bor_not<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
+    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
+    let v5 = InstructionData::Binary {
+        opcode: Opcode::BorNot,
+        args: v4.clone(),
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1110.
+    return v6;
+}
+
+// Generated as internal constructor for term bxor_not.
+pub fn constructor_bxor_not<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Value,
+    arg2: Value,
+) -> Value {
+    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
+    let v5 = InstructionData::Binary {
+        opcode: Opcode::BxorNot,
+        args: v4.clone(),
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1119.
+    return v6;
+}
+
+// Generated as internal constructor for term band_imm.
+pub fn constructor_band_imm<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Value,
+    arg2: Imm64,
+) -> Value {
+    let v4 = InstructionData::BinaryImm64 {
+        opcode: Opcode::BandImm,
+        arg: arg1,
+        imm: arg2,
+    };
+    let v5 = C::make_inst_ctor(ctx, arg0, &v4);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1128.
+    return v5;
+}
+
+// Generated as internal constructor for term bor_imm.
+pub fn constructor_bor_imm<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Imm64) -> Value {
+    let v4 = InstructionData::BinaryImm64 {
+        opcode: Opcode::BorImm,
+        arg: arg1,
+        imm: arg2,
+    };
+    let v5 = C::make_inst_ctor(ctx, arg0, &v4);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1137.
+    return v5;
+}
+
+// Generated as internal constructor for term bxor_imm.
+pub fn constructor_bxor_imm<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Value,
+    arg2: Imm64,
+) -> Value {
+    let v4 = InstructionData::BinaryImm64 {
+        opcode: Opcode::BxorImm,
+        arg: arg1,
+        imm: arg2,
+    };
+    let v5 = C::make_inst_ctor(ctx, arg0, &v4);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1146.
+    return v5;
+}
+
+// Generated as internal constructor for term rotl.
+pub fn constructor_rotl<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
+    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
+    let v5 = InstructionData::Binary {
+        opcode: Opcode::Rotl,
+        args: v4.clone(),
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1155.
+    return v6;
+}
+
+// Generated as internal constructor for term rotr.
+pub fn constructor_rotr<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
+    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
+    let v5 = InstructionData::Binary {
+        opcode: Opcode::Rotr,
+        args: v4.clone(),
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1164.
+    return v6;
+}
+
+// Generated as internal constructor for term rotl_imm.
+pub fn constructor_rotl_imm<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Value,
+    arg2: Imm64,
+) -> Value {
+    let v4 = InstructionData::BinaryImm64 {
+        opcode: Opcode::RotlImm,
+        arg: arg1,
+        imm: arg2,
+    };
+    let v5 = C::make_inst_ctor(ctx, arg0, &v4);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1173.
+    return v5;
+}
+
+// Generated as internal constructor for term rotr_imm.
+pub fn constructor_rotr_imm<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Value,
+    arg2: Imm64,
+) -> Value {
+    let v4 = InstructionData::BinaryImm64 {
+        opcode: Opcode::RotrImm,
+        arg: arg1,
+        imm: arg2,
+    };
+    let v5 = C::make_inst_ctor(ctx, arg0, &v4);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1182.
+    return v5;
+}
+
+// Generated as internal constructor for term ishl.
+pub fn constructor_ishl<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
+    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
+    let v5 = InstructionData::Binary {
+        opcode: Opcode::Ishl,
+        args: v4.clone(),
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1191.
+    return v6;
+}
+
+// Generated as internal constructor for term ushr.
+pub fn constructor_ushr<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
+    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
+    let v5 = InstructionData::Binary {
+        opcode: Opcode::Ushr,
+        args: v4.clone(),
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1200.
+    return v6;
+}
+
+// Generated as internal constructor for term sshr.
+pub fn constructor_sshr<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
+    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
+    let v5 = InstructionData::Binary {
+        opcode: Opcode::Sshr,
+        args: v4.clone(),
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1209.
+    return v6;
+}
+
+// Generated as internal constructor for term ishl_imm.
+pub fn constructor_ishl_imm<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Value,
+    arg2: Imm64,
+) -> Value {
+    let v4 = InstructionData::BinaryImm64 {
+        opcode: Opcode::IshlImm,
+        arg: arg1,
+        imm: arg2,
+    };
+    let v5 = C::make_inst_ctor(ctx, arg0, &v4);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1218.
+    return v5;
+}
+
+// Generated as internal constructor for term ushr_imm.
+pub fn constructor_ushr_imm<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Value,
+    arg2: Imm64,
+) -> Value {
+    let v4 = InstructionData::BinaryImm64 {
+        opcode: Opcode::UshrImm,
+        arg: arg1,
+        imm: arg2,
+    };
+    let v5 = C::make_inst_ctor(ctx, arg0, &v4);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1227.
+    return v5;
+}
+
+// Generated as internal constructor for term sshr_imm.
+pub fn constructor_sshr_imm<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Value,
+    arg2: Imm64,
+) -> Value {
+    let v4 = InstructionData::BinaryImm64 {
+        opcode: Opcode::SshrImm,
+        arg: arg1,
+        imm: arg2,
+    };
+    let v5 = C::make_inst_ctor(ctx, arg0, &v4);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1236.
+    return v5;
+}
+
+// Generated as internal constructor for term bitrev.
+pub fn constructor_bitrev<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
+    let v3 = InstructionData::Unary {
+        opcode: Opcode::Bitrev,
+        arg: arg1,
+    };
+    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1245.
+    return v4;
+}
+
+// Generated as internal constructor for term clz.
+pub fn constructor_clz<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
+    let v3 = InstructionData::Unary {
+        opcode: Opcode::Clz,
+        arg: arg1,
+    };
+    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1254.
+    return v4;
+}
+
+// Generated as internal constructor for term cls.
+pub fn constructor_cls<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
+    let v3 = InstructionData::Unary {
+        opcode: Opcode::Cls,
+        arg: arg1,
+    };
+    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1263.
+    return v4;
+}
+
+// Generated as internal constructor for term ctz.
+pub fn constructor_ctz<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
+    let v3 = InstructionData::Unary {
+        opcode: Opcode::Ctz,
+        arg: arg1,
+    };
+    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1272.
+    return v4;
+}
+
+// Generated as internal constructor for term bswap.
+pub fn constructor_bswap<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
+    let v3 = InstructionData::Unary {
+        opcode: Opcode::Bswap,
+        arg: arg1,
+    };
+    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1281.
+    return v4;
+}
+
+// Generated as internal constructor for term popcnt.
+pub fn constructor_popcnt<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
+    let v3 = InstructionData::Unary {
+        opcode: Opcode::Popcnt,
+        arg: arg1,
+    };
+    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1290.
+    return v4;
+}
+
+// Generated as internal constructor for term fcmp.
+pub fn constructor_fcmp<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &FloatCC,
+    arg2: Value,
+    arg3: Value,
+) -> Value {
+    let v5 = &C::value_array_2_ctor(ctx, arg2, arg3);
+    let v6 = InstructionData::FloatCompare {
+        opcode: Opcode::Fcmp,
+        args: v5.clone(),
+        cond: arg1.clone(),
+    };
+    let v7 = C::make_inst_ctor(ctx, arg0, &v6);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1299.
+    return v7;
+}
+
+// Generated as internal constructor for term fadd.
+pub fn constructor_fadd<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
+    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
+    let v5 = InstructionData::Binary {
+        opcode: Opcode::Fadd,
+        args: v4.clone(),
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1308.
+    return v6;
+}
+
+// Generated as internal constructor for term fsub.
+pub fn constructor_fsub<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
+    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
+    let v5 = InstructionData::Binary {
+        opcode: Opcode::Fsub,
+        args: v4.clone(),
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1317.
+    return v6;
+}
+
+// Generated as internal constructor for term fmul.
+pub fn constructor_fmul<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
+    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
+    let v5 = InstructionData::Binary {
+        opcode: Opcode::Fmul,
+        args: v4.clone(),
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1326.
+    return v6;
+}
+
+// Generated as internal constructor for term fdiv.
+pub fn constructor_fdiv<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
+    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
+    let v5 = InstructionData::Binary {
+        opcode: Opcode::Fdiv,
+        args: v4.clone(),
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1335.
+    return v6;
+}
+
+// Generated as internal constructor for term sqrt.
+pub fn constructor_sqrt<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
+    let v3 = InstructionData::Unary {
+        opcode: Opcode::Sqrt,
+        arg: arg1,
+    };
+    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1344.
+    return v4;
+}
+
+// Generated as internal constructor for term fma.
+pub fn constructor_fma<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Value,
+    arg2: Value,
+    arg3: Value,
+) -> Value {
+    let v5 = &C::value_array_3_ctor(ctx, arg1, arg2, arg3);
+    let v6 = InstructionData::Ternary {
+        opcode: Opcode::Fma,
+        args: v5.clone(),
+    };
+    let v7 = C::make_inst_ctor(ctx, arg0, &v6);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1353.
+    return v7;
+}
+
+// Generated as internal constructor for term fneg.
+pub fn constructor_fneg<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
+    let v3 = InstructionData::Unary {
+        opcode: Opcode::Fneg,
+        arg: arg1,
+    };
+    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1362.
+    return v4;
+}
+
+// Generated as internal constructor for term fabs.
+pub fn constructor_fabs<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
+    let v3 = InstructionData::Unary {
+        opcode: Opcode::Fabs,
+        arg: arg1,
+    };
+    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1371.
+    return v4;
+}
+
+// Generated as internal constructor for term fcopysign.
+pub fn constructor_fcopysign<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Value,
+    arg2: Value,
+) -> Value {
+    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
+    let v5 = InstructionData::Binary {
+        opcode: Opcode::Fcopysign,
+        args: v4.clone(),
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1380.
+    return v6;
+}
+
+// Generated as internal constructor for term fmin.
+pub fn constructor_fmin<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
+    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
+    let v5 = InstructionData::Binary {
+        opcode: Opcode::Fmin,
+        args: v4.clone(),
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1389.
+    return v6;
+}
+
+// Generated as internal constructor for term fmin_pseudo.
+pub fn constructor_fmin_pseudo<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Value,
+    arg2: Value,
+) -> Value {
+    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
+    let v5 = InstructionData::Binary {
+        opcode: Opcode::FminPseudo,
+        args: v4.clone(),
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1398.
+    return v6;
+}
+
+// Generated as internal constructor for term fmax.
+pub fn constructor_fmax<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
+    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
+    let v5 = InstructionData::Binary {
+        opcode: Opcode::Fmax,
+        args: v4.clone(),
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1407.
+    return v6;
+}
+
+// Generated as internal constructor for term fmax_pseudo.
+pub fn constructor_fmax_pseudo<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Value,
+    arg2: Value,
+) -> Value {
+    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
+    let v5 = InstructionData::Binary {
+        opcode: Opcode::FmaxPseudo,
+        args: v4.clone(),
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1416.
+    return v6;
+}
+
+// Generated as internal constructor for term ceil.
+pub fn constructor_ceil<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
+    let v3 = InstructionData::Unary {
+        opcode: Opcode::Ceil,
+        arg: arg1,
+    };
+    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1425.
+    return v4;
+}
+
+// Generated as internal constructor for term floor.
+pub fn constructor_floor<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
+    let v3 = InstructionData::Unary {
+        opcode: Opcode::Floor,
+        arg: arg1,
+    };
+    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1434.
+    return v4;
+}
+
+// Generated as internal constructor for term trunc.
+pub fn constructor_trunc<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
+    let v3 = InstructionData::Unary {
+        opcode: Opcode::Trunc,
+        arg: arg1,
+    };
+    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1443.
+    return v4;
+}
+
+// Generated as internal constructor for term nearest.
+pub fn constructor_nearest<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
+    let v3 = InstructionData::Unary {
+        opcode: Opcode::Nearest,
+        arg: arg1,
+    };
+    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1452.
+    return v4;
+}
+
+// Generated as internal constructor for term is_null.
+pub fn constructor_is_null<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
+    let v3 = InstructionData::Unary {
+        opcode: Opcode::IsNull,
+        arg: arg1,
+    };
+    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1461.
+    return v4;
+}
+
+// Generated as internal constructor for term is_invalid.
+pub fn constructor_is_invalid<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
+    let v3 = InstructionData::Unary {
+        opcode: Opcode::IsInvalid,
+        arg: arg1,
+    };
+    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1470.
+    return v4;
+}
+
+// Generated as internal constructor for term bitcast.
+pub fn constructor_bitcast<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: MemFlags,
+    arg2: Value,
+) -> Value {
+    let v4 = InstructionData::LoadNoOffset {
+        opcode: Opcode::Bitcast,
+        arg: arg2,
+        flags: arg1,
+    };
+    let v5 = C::make_inst_ctor(ctx, arg0, &v4);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1479.
+    return v5;
+}
+
+// Generated as internal constructor for term scalar_to_vector.
+pub fn constructor_scalar_to_vector<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
+    let v3 = InstructionData::Unary {
+        opcode: Opcode::ScalarToVector,
+        arg: arg1,
+    };
+    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1488.
+    return v4;
+}
+
+// Generated as internal constructor for term bmask.
+pub fn constructor_bmask<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
+    let v3 = InstructionData::Unary {
+        opcode: Opcode::Bmask,
+        arg: arg1,
+    };
+    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1497.
+    return v4;
+}
+
+// Generated as internal constructor for term ireduce.
+pub fn constructor_ireduce<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
+    let v3 = InstructionData::Unary {
+        opcode: Opcode::Ireduce,
+        arg: arg1,
+    };
+    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1506.
+    return v4;
+}
+
+// Generated as internal constructor for term snarrow.
+pub fn constructor_snarrow<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
+    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
+    let v5 = InstructionData::Binary {
+        opcode: Opcode::Snarrow,
+        args: v4.clone(),
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1515.
+    return v6;
+}
+
+// Generated as internal constructor for term unarrow.
+pub fn constructor_unarrow<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
+    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
+    let v5 = InstructionData::Binary {
+        opcode: Opcode::Unarrow,
+        args: v4.clone(),
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1524.
+    return v6;
+}
+
+// Generated as internal constructor for term uunarrow.
+pub fn constructor_uunarrow<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Value,
+    arg2: Value,
+) -> Value {
+    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
+    let v5 = InstructionData::Binary {
+        opcode: Opcode::Uunarrow,
+        args: v4.clone(),
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1533.
+    return v6;
+}
+
+// Generated as internal constructor for term swiden_low.
+pub fn constructor_swiden_low<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
+    let v3 = InstructionData::Unary {
+        opcode: Opcode::SwidenLow,
+        arg: arg1,
+    };
+    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1542.
+    return v4;
+}
+
+// Generated as internal constructor for term swiden_high.
+pub fn constructor_swiden_high<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
+    let v3 = InstructionData::Unary {
+        opcode: Opcode::SwidenHigh,
+        arg: arg1,
+    };
+    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1551.
+    return v4;
+}
+
+// Generated as internal constructor for term uwiden_low.
+pub fn constructor_uwiden_low<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
+    let v3 = InstructionData::Unary {
+        opcode: Opcode::UwidenLow,
+        arg: arg1,
+    };
+    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1560.
+    return v4;
+}
+
+// Generated as internal constructor for term uwiden_high.
+pub fn constructor_uwiden_high<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
+    let v3 = InstructionData::Unary {
+        opcode: Opcode::UwidenHigh,
+        arg: arg1,
+    };
+    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1569.
+    return v4;
+}
+
+// Generated as internal constructor for term iadd_pairwise.
+pub fn constructor_iadd_pairwise<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Value,
+    arg2: Value,
+) -> Value {
+    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
+    let v5 = InstructionData::Binary {
+        opcode: Opcode::IaddPairwise,
+        args: v4.clone(),
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1578.
+    return v6;
+}
+
+// Generated as internal constructor for term x86_pmaddubsw.
+pub fn constructor_x86_pmaddubsw<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Value,
+    arg2: Value,
+) -> Value {
+    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
+    let v5 = InstructionData::Binary {
+        opcode: Opcode::X86Pmaddubsw,
+        args: v4.clone(),
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1587.
+    return v6;
+}
+
+// Generated as internal constructor for term uextend.
+pub fn constructor_uextend<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
+    let v3 = InstructionData::Unary {
+        opcode: Opcode::Uextend,
+        arg: arg1,
+    };
+    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1596.
+    return v4;
+}
+
+// Generated as internal constructor for term sextend.
+pub fn constructor_sextend<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
+    let v3 = InstructionData::Unary {
+        opcode: Opcode::Sextend,
+        arg: arg1,
+    };
+    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1605.
+    return v4;
+}
+
+// Generated as internal constructor for term fpromote.
+pub fn constructor_fpromote<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
+    let v3 = InstructionData::Unary {
+        opcode: Opcode::Fpromote,
+        arg: arg1,
+    };
+    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1614.
+    return v4;
+}
+
+// Generated as internal constructor for term fdemote.
+pub fn constructor_fdemote<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
+    let v3 = InstructionData::Unary {
+        opcode: Opcode::Fdemote,
+        arg: arg1,
+    };
+    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1623.
+    return v4;
+}
+
+// Generated as internal constructor for term fvdemote.
+pub fn constructor_fvdemote<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
+    let v3 = InstructionData::Unary {
+        opcode: Opcode::Fvdemote,
+        arg: arg1,
+    };
+    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1632.
+    return v4;
+}
+
+// Generated as internal constructor for term fvpromote_low.
+pub fn constructor_fvpromote_low<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
+    let v3 = InstructionData::Unary {
+        opcode: Opcode::FvpromoteLow,
+        arg: arg1,
+    };
+    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1641.
+    return v4;
+}
+
+// Generated as internal constructor for term fcvt_to_uint.
+pub fn constructor_fcvt_to_uint<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
+    let v3 = InstructionData::Unary {
+        opcode: Opcode::FcvtToUint,
+        arg: arg1,
+    };
+    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1650.
+    return v4;
+}
+
+// Generated as internal constructor for term fcvt_to_sint.
+pub fn constructor_fcvt_to_sint<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
+    let v3 = InstructionData::Unary {
+        opcode: Opcode::FcvtToSint,
+        arg: arg1,
+    };
+    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1659.
+    return v4;
+}
+
+// Generated as internal constructor for term fcvt_to_uint_sat.
+pub fn constructor_fcvt_to_uint_sat<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
+    let v3 = InstructionData::Unary {
+        opcode: Opcode::FcvtToUintSat,
+        arg: arg1,
+    };
+    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1668.
+    return v4;
+}
+
+// Generated as internal constructor for term fcvt_to_sint_sat.
+pub fn constructor_fcvt_to_sint_sat<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
+    let v3 = InstructionData::Unary {
+        opcode: Opcode::FcvtToSintSat,
+        arg: arg1,
+    };
+    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1677.
+    return v4;
+}
+
+// Generated as internal constructor for term x86_cvtt2dq.
+pub fn constructor_x86_cvtt2dq<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
+    let v3 = InstructionData::Unary {
+        opcode: Opcode::X86Cvtt2dq,
+        arg: arg1,
+    };
+    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1686.
+    return v4;
+}
+
+// Generated as internal constructor for term fcvt_from_uint.
+pub fn constructor_fcvt_from_uint<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
+    let v3 = InstructionData::Unary {
+        opcode: Opcode::FcvtFromUint,
+        arg: arg1,
+    };
+    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1695.
+    return v4;
+}
+
+// Generated as internal constructor for term fcvt_from_sint.
+pub fn constructor_fcvt_from_sint<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
+    let v3 = InstructionData::Unary {
+        opcode: Opcode::FcvtFromSint,
+        arg: arg1,
+    };
+    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1704.
+    return v4;
+}
+
+// Generated as internal constructor for term iconcat.
+pub fn constructor_iconcat<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
+    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
+    let v5 = InstructionData::Binary {
+        opcode: Opcode::Iconcat,
+        args: v4.clone(),
+    };
+    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1713.
+    return v6;
+}
+
+// Generated as internal constructor for term atomic_rmw.
+pub fn constructor_atomic_rmw<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: MemFlags,
+    arg2: &AtomicRmwOp,
+    arg3: Value,
+    arg4: Value,
+) -> Value {
+    let v6 = &C::value_array_2_ctor(ctx, arg3, arg4);
+    let v7 = InstructionData::AtomicRmw {
+        opcode: Opcode::AtomicRmw,
+        args: v6.clone(),
+        flags: arg1,
+        op: arg2.clone(),
+    };
+    let v8 = C::make_inst_ctor(ctx, arg0, &v7);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1722.
+    return v8;
+}
+
+// Generated as internal constructor for term atomic_cas.
+pub fn constructor_atomic_cas<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: MemFlags,
+    arg2: Value,
+    arg3: Value,
+    arg4: Value,
+) -> Value {
+    let v6 = &C::value_array_3_ctor(ctx, arg2, arg3, arg4);
+    let v7 = InstructionData::AtomicCas {
+        opcode: Opcode::AtomicCas,
+        args: v6.clone(),
+        flags: arg1,
+    };
+    let v8 = C::make_inst_ctor(ctx, arg0, &v7);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1731.
+    return v8;
+}
+
+// Generated as internal constructor for term atomic_load.
+pub fn constructor_atomic_load<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: MemFlags,
+    arg2: Value,
+) -> Value {
+    let v4 = InstructionData::LoadNoOffset {
+        opcode: Opcode::AtomicLoad,
+        arg: arg2,
+        flags: arg1,
+    };
+    let v5 = C::make_inst_ctor(ctx, arg0, &v4);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1740.
+    return v5;
+}
+
+// Generated as internal constructor for term extract_vector.
+pub fn constructor_extract_vector<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Value,
+    arg2: Uimm8,
+) -> Value {
+    let v4 = InstructionData::BinaryImm8 {
+        opcode: Opcode::ExtractVector,
+        arg: arg1,
+        imm: arg2,
+    };
+    let v5 = C::make_inst_ctor(ctx, arg0, &v4);
+    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1749.
+    return v5;
+}
diff --git a/cranelift/codegen/isle_generated_code/isle_riscv64.rs b/cranelift/codegen/isle_generated_code/isle_riscv64.rs
new file mode 100644
index 000000000000..8faf335aaae2
--- /dev/null
+++ b/cranelift/codegen/isle_generated_code/isle_riscv64.rs
@@ -0,0 +1,18461 @@
+// GENERATED BY ISLE. DO NOT EDIT!
+//
+// Generated automatically from the instruction-selection DSL code in:
+// - src/prelude.isle
+// - src/prelude_lower.isle
+// - src/isa/riscv64/inst.isle
+// - src/isa/riscv64/inst_vector.isle
+// - src/isa/riscv64/lower.isle
+// - /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_lower.isle
+
+use super::*; // Pulls in all external types.
+use std::marker::PhantomData;
+
+/// Context during lowering: an implementation of this trait
+/// must be provided with all external constructors and extractors.
+/// A mutable borrow is passed along through all lowering logic.
+pub trait Context {
+    fn unit(&mut self) -> Unit;
+    fn value_type(&mut self, arg0: Value) -> Type;
+    fn u32_nonnegative(&mut self, arg0: u32) -> Option<u32>;
+    fn offset32(&mut self, arg0: Offset32) -> u32;
+    fn u32_lteq(&mut self, arg0: u32, arg1: u32) -> Option<Unit>;
+    fn u8_lteq(&mut self, arg0: u8, arg1: u8) -> Option<Unit>;
+    fn u8_lt(&mut self, arg0: u8, arg1: u8) -> Option<Unit>;
+    fn simm32(&mut self, arg0: Imm64) -> Option<u32>;
+    fn uimm8(&mut self, arg0: Imm64) -> Option<u8>;
+    fn u8_as_u32(&mut self, arg0: u8) -> u32;
+    fn u8_as_u64(&mut self, arg0: u8) -> u64;
+    fn u16_as_u64(&mut self, arg0: u16) -> u64;
+    fn u32_as_u64(&mut self, arg0: u32) -> u64;
+    fn i64_as_u64(&mut self, arg0: i64) -> u64;
+    fn i64_neg(&mut self, arg0: i64) -> i64;
+    fn u128_as_u64(&mut self, arg0: u128) -> Option<u64>;
+    fn u64_as_u32(&mut self, arg0: u64) -> Option<u32>;
+    fn u64_as_i32(&mut self, arg0: u64) -> i32;
+    fn u8_and(&mut self, arg0: u8, arg1: u8) -> u8;
+    fn u8_shl(&mut self, arg0: u8, arg1: u8) -> u8;
+    fn u8_shr(&mut self, arg0: u8, arg1: u8) -> u8;
+    fn u32_add(&mut self, arg0: u32, arg1: u32) -> u32;
+    fn u32_sub(&mut self, arg0: u32, arg1: u32) -> u32;
+    fn u32_and(&mut self, arg0: u32, arg1: u32) -> u32;
+    fn s32_add_fallible(&mut self, arg0: u32, arg1: u32) -> Option<u32>;
+    fn u64_add(&mut self, arg0: u64, arg1: u64) -> u64;
+    fn u64_sub(&mut self, arg0: u64, arg1: u64) -> u64;
+    fn u64_mul(&mut self, arg0: u64, arg1: u64) -> u64;
+    fn u64_sdiv(&mut self, arg0: u64, arg1: u64) -> Option<u64>;
+    fn u64_udiv(&mut self, arg0: u64, arg1: u64) -> Option<u64>;
+    fn u64_and(&mut self, arg0: u64, arg1: u64) -> u64;
+    fn u64_or(&mut self, arg0: u64, arg1: u64) -> u64;
+    fn u64_xor(&mut self, arg0: u64, arg1: u64) -> u64;
+    fn u64_shl(&mut self, arg0: u64, arg1: u64) -> u64;
+    fn imm64_shl(&mut self, arg0: Type, arg1: Imm64, arg2: Imm64) -> Imm64;
+    fn imm64_ushr(&mut self, arg0: Type, arg1: Imm64, arg2: Imm64) -> Imm64;
+    fn imm64_sshr(&mut self, arg0: Type, arg1: Imm64, arg2: Imm64) -> Imm64;
+    fn u64_not(&mut self, arg0: u64) -> u64;
+    fn u64_eq(&mut self, arg0: u64, arg1: u64) -> bool;
+    fn u64_le(&mut self, arg0: u64, arg1: u64) -> bool;
+    fn u64_lt(&mut self, arg0: u64, arg1: u64) -> bool;
+    fn i64_sextend_imm64(&mut self, arg0: Type, arg1: Imm64) -> i64;
+    fn u64_uextend_imm64(&mut self, arg0: Type, arg1: Imm64) -> u64;
+    fn imm64_icmp(&mut self, arg0: Type, arg1: &IntCC, arg2: Imm64, arg3: Imm64) -> Imm64;
+    fn u64_is_zero(&mut self, arg0: u64) -> bool;
+    fn u64_is_odd(&mut self, arg0: u64) -> bool;
+    fn ty_umin(&mut self, arg0: Type) -> u64;
+    fn ty_umax(&mut self, arg0: Type) -> u64;
+    fn ty_smin(&mut self, arg0: Type) -> u64;
+    fn ty_smax(&mut self, arg0: Type) -> u64;
+    fn ty_bits(&mut self, arg0: Type) -> u8;
+    fn ty_bits_u16(&mut self, arg0: Type) -> u16;
+    fn ty_bits_u64(&mut self, arg0: Type) -> u64;
+    fn ty_mask(&mut self, arg0: Type) -> u64;
+    fn ty_lane_mask(&mut self, arg0: Type) -> u64;
+    fn ty_lane_count(&mut self, arg0: Type) -> u64;
+    fn ty_bytes(&mut self, arg0: Type) -> u16;
+    fn lane_type(&mut self, arg0: Type) -> Type;
+    fn ty_half_lanes(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_half_width(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_equal(&mut self, arg0: Type, arg1: Type) -> bool;
+    fn mem_flags_trusted(&mut self) -> MemFlags;
+    fn intcc_reverse(&mut self, arg0: &IntCC) -> IntCC;
+    fn intcc_inverse(&mut self, arg0: &IntCC) -> IntCC;
+    fn floatcc_reverse(&mut self, arg0: &FloatCC) -> FloatCC;
+    fn floatcc_inverse(&mut self, arg0: &FloatCC) -> FloatCC;
+    fn floatcc_unordered(&mut self, arg0: &FloatCC) -> bool;
+    fn fits_in_16(&mut self, arg0: Type) -> Option<Type>;
+    fn fits_in_32(&mut self, arg0: Type) -> Option<Type>;
+    fn lane_fits_in_32(&mut self, arg0: Type) -> Option<Type>;
+    fn fits_in_64(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_32(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_64(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_int_ref_scalar_64_extract(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_int_ref_scalar_64(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_32_or_64(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_8_or_16(&mut self, arg0: Type) -> Option<Type>;
+    fn int_fits_in_32(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_int_ref_64(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_int_ref_16_to_64(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_int(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_scalar(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_scalar_float(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_float_or_vec(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_vector_float(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_vector_not_float(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_vec64(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_vec64_ctor(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_vec128(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_dyn_vec64(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_dyn_vec128(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_vec64_int(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_vec128_int(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_addr64(&mut self, arg0: Type) -> Option<Type>;
+    fn not_vec32x2(&mut self, arg0: Type) -> Option<Type>;
+    fn not_i64x2(&mut self, arg0: Type) -> Option<()>;
+    fn u8_from_uimm8(&mut self, arg0: Uimm8) -> u8;
+    fn u64_from_bool(&mut self, arg0: bool) -> u64;
+    fn u64_from_imm64(&mut self, arg0: Imm64) -> u64;
+    fn nonzero_u64_from_imm64(&mut self, arg0: Imm64) -> Option<u64>;
+    fn imm64_power_of_two(&mut self, arg0: Imm64) -> Option<u64>;
+    fn imm64(&mut self, arg0: u64) -> Imm64;
+    fn imm64_masked(&mut self, arg0: Type, arg1: u64) -> Imm64;
+    fn u32_from_ieee32(&mut self, arg0: Ieee32) -> u32;
+    fn u64_from_ieee64(&mut self, arg0: Ieee64) -> u64;
+    fn multi_lane(&mut self, arg0: Type) -> Option<(u32, u32)>;
+    fn dynamic_lane(&mut self, arg0: Type) -> Option<(u32, u32)>;
+    fn dynamic_int_lane(&mut self, arg0: Type) -> Option<u32>;
+    fn dynamic_fp_lane(&mut self, arg0: Type) -> Option<u32>;
+    fn ty_dyn64_int(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_dyn128_int(&mut self, arg0: Type) -> Option<Type>;
+    fn offset32_to_u32(&mut self, arg0: Offset32) -> u32;
+    fn u32_to_offset32(&mut self, arg0: u32) -> Offset32;
+    fn intcc_unsigned(&mut self, arg0: &IntCC) -> IntCC;
+    fn signed_cond_code(&mut self, arg0: &IntCC) -> Option<IntCC>;
+    fn trap_code_division_by_zero(&mut self) -> TrapCode;
+    fn trap_code_integer_overflow(&mut self) -> TrapCode;
+    fn trap_code_bad_conversion_to_integer(&mut self) -> TrapCode;
+    fn range(&mut self, arg0: usize, arg1: usize) -> Range;
+    fn range_view(&mut self, arg0: Range) -> RangeView;
+    fn value_reg(&mut self, arg0: Reg) -> ValueRegs;
+    fn value_regs(&mut self, arg0: Reg, arg1: Reg) -> ValueRegs;
+    fn value_regs_invalid(&mut self) -> ValueRegs;
+    fn output_none(&mut self) -> InstOutput;
+    fn output(&mut self, arg0: ValueRegs) -> InstOutput;
+    fn output_pair(&mut self, arg0: ValueRegs, arg1: ValueRegs) -> InstOutput;
+    fn output_builder_new(&mut self) -> InstOutputBuilder;
+    fn output_builder_push(&mut self, arg0: &InstOutputBuilder, arg1: ValueRegs) -> Unit;
+    fn output_builder_finish(&mut self, arg0: &InstOutputBuilder) -> InstOutput;
+    fn temp_writable_reg(&mut self, arg0: Type) -> WritableReg;
+    fn is_valid_reg(&mut self, arg0: Reg) -> bool;
+    fn invalid_reg(&mut self) -> Reg;
+    fn mark_value_used(&mut self, arg0: Value) -> Unit;
+    fn put_in_reg(&mut self, arg0: Value) -> Reg;
+    fn put_in_regs(&mut self, arg0: Value) -> ValueRegs;
+    fn ensure_in_vreg(&mut self, arg0: Reg, arg1: Type) -> Reg;
+    fn value_regs_get(&mut self, arg0: ValueRegs, arg1: usize) -> Reg;
+    fn value_regs_len(&mut self, arg0: ValueRegs) -> usize;
+    fn preg_to_reg(&mut self, arg0: PReg) -> Reg;
+    fn value_list_slice(&mut self, arg0: ValueList) -> ValueSlice;
+    fn value_slice_empty(&mut self, arg0: ValueSlice) -> Option<()>;
+    fn value_slice_unwrap(&mut self, arg0: ValueSlice) -> Option<(Value, ValueSlice)>;
+    fn value_slice_len(&mut self, arg0: ValueSlice) -> usize;
+    fn value_slice_get(&mut self, arg0: ValueSlice, arg1: usize) -> Value;
+    fn writable_reg_to_reg(&mut self, arg0: WritableReg) -> Reg;
+    fn inst_results(&mut self, arg0: Inst) -> ValueSlice;
+    fn first_result(&mut self, arg0: Inst) -> Option<Value>;
+    fn inst_data(&mut self, arg0: Inst) -> InstructionData;
+    fn def_inst(&mut self, arg0: Value) -> Option<Inst>;
+    fn zero_value(&mut self, arg0: Value) -> Option<Value>;
+    fn is_sinkable_inst(&mut self, arg0: Value) -> Option<Inst>;
+    fn maybe_uextend(&mut self, arg0: Value) -> Option<Value>;
+    fn emit(&mut self, arg0: &MInst) -> Unit;
+    fn sink_inst(&mut self, arg0: Inst) -> Unit;
+    fn emit_u64_le_const(&mut self, arg0: u64) -> VCodeConstant;
+    fn emit_u128_le_const(&mut self, arg0: u128) -> VCodeConstant;
+    fn const_to_vconst(&mut self, arg0: Constant) -> VCodeConstant;
+    fn tls_model(&mut self, arg0: Type) -> TlsModel;
+    fn tls_model_is_elf_gd(&mut self) -> Option<Unit>;
+    fn tls_model_is_macho(&mut self) -> Option<Unit>;
+    fn tls_model_is_coff(&mut self) -> Option<Unit>;
+    fn preserve_frame_pointers(&mut self) -> Option<Unit>;
+    fn box_external_name(&mut self, arg0: ExternalName) -> BoxExternalName;
+    fn func_ref_data(&mut self, arg0: FuncRef) -> (SigRef, ExternalName, RelocDistance);
+    fn symbol_value_data(
+        &mut self,
+        arg0: GlobalValue,
+    ) -> Option<(ExternalName, RelocDistance, i64)>;
+    fn reloc_distance_near(&mut self, arg0: RelocDistance) -> Option<()>;
+    fn vec_mask_from_immediate(&mut self, arg0: Immediate) -> Option<VecMask>;
+    fn u128_from_immediate(&mut self, arg0: Immediate) -> Option<u128>;
+    fn vconst_from_immediate(&mut self, arg0: Immediate) -> Option<VCodeConstant>;
+    fn u128_from_constant(&mut self, arg0: Constant) -> Option<u128>;
+    fn u64_from_constant(&mut self, arg0: Constant) -> Option<u64>;
+    fn shuffle64_from_imm(&mut self, arg0: Immediate) -> Option<(u8, u8)>;
+    fn shuffle32_from_imm(&mut self, arg0: Immediate) -> Option<(u8, u8, u8, u8)>;
+    fn shuffle16_from_imm(&mut self, arg0: Immediate) -> Option<(u8, u8, u8, u8, u8, u8, u8, u8)>;
+    fn only_writable_reg(&mut self, arg0: WritableValueRegs) -> Option<WritableReg>;
+    fn writable_regs_get(&mut self, arg0: WritableValueRegs, arg1: usize) -> WritableReg;
+    fn abi_num_args(&mut self, arg0: Sig) -> usize;
+    fn abi_get_arg(&mut self, arg0: Sig, arg1: usize) -> ABIArg;
+    fn abi_num_rets(&mut self, arg0: Sig) -> usize;
+    fn abi_get_ret(&mut self, arg0: Sig, arg1: usize) -> ABIArg;
+    fn abi_ret_arg(&mut self, arg0: Sig) -> Option<ABIArg>;
+    fn abi_no_ret_arg(&mut self, arg0: Sig) -> Option<()>;
+    fn abi_sized_stack_arg_space(&mut self, arg0: Sig) -> i64;
+    fn abi_sized_stack_ret_space(&mut self, arg0: Sig) -> i64;
+    fn abi_stackslot_addr(&mut self, arg0: WritableReg, arg1: StackSlot, arg2: Offset32) -> MInst;
+    fn abi_dynamic_stackslot_addr(&mut self, arg0: WritableReg, arg1: DynamicStackSlot) -> MInst;
+    fn abi_arg_only_slot(&mut self, arg0: &ABIArg) -> Option<ABIArgSlot>;
+    fn abi_arg_struct_pointer(&mut self, arg0: &ABIArg) -> Option<(ABIArgSlot, i64, u64)>;
+    fn abi_arg_implicit_pointer(&mut self, arg0: &ABIArg) -> Option<(ABIArgSlot, i64, Type)>;
+    fn real_reg_to_reg(&mut self, arg0: RealReg) -> Reg;
+    fn real_reg_to_writable_reg(&mut self, arg0: RealReg) -> WritableReg;
+    fn gen_move(&mut self, arg0: Type, arg1: WritableReg, arg2: Reg) -> MInst;
+    fn gen_return(&mut self, arg0: ValueSlice) -> Unit;
+    fn gen_return_call(
+        &mut self,
+        arg0: SigRef,
+        arg1: ExternalName,
+        arg2: RelocDistance,
+        arg3: ValueSlice,
+    ) -> InstOutput;
+    fn gen_return_call_indirect(
+        &mut self,
+        arg0: SigRef,
+        arg1: Value,
+        arg2: ValueSlice,
+    ) -> InstOutput;
+    fn safe_divisor_from_imm64(&mut self, arg0: Type, arg1: Imm64) -> Option<u64>;
+    fn xreg_new(&mut self, arg0: Reg) -> XReg;
+    fn writable_xreg_new(&mut self, arg0: WritableReg) -> WritableXReg;
+    fn writable_xreg_to_xreg(&mut self, arg0: WritableXReg) -> XReg;
+    fn writable_xreg_to_writable_reg(&mut self, arg0: WritableXReg) -> WritableReg;
+    fn xreg_to_reg(&mut self, arg0: XReg) -> Reg;
+    fn freg_new(&mut self, arg0: Reg) -> FReg;
+    fn writable_freg_new(&mut self, arg0: WritableReg) -> WritableFReg;
+    fn writable_freg_to_freg(&mut self, arg0: WritableFReg) -> FReg;
+    fn writable_freg_to_writable_reg(&mut self, arg0: WritableFReg) -> WritableReg;
+    fn freg_to_reg(&mut self, arg0: FReg) -> Reg;
+    fn vreg_new(&mut self, arg0: Reg) -> VReg;
+    fn writable_vreg_new(&mut self, arg0: WritableReg) -> WritableVReg;
+    fn writable_vreg_to_vreg(&mut self, arg0: WritableVReg) -> VReg;
+    fn writable_vreg_to_writable_reg(&mut self, arg0: WritableVReg) -> WritableReg;
+    fn vreg_to_reg(&mut self, arg0: VReg) -> Reg;
+    fn u8_as_i32(&mut self, arg0: u8) -> i32;
+    fn has_v(&mut self) -> bool;
+    fn has_zbkb(&mut self) -> bool;
+    fn has_zba(&mut self) -> bool;
+    fn has_zbb(&mut self) -> bool;
+    fn has_zbc(&mut self) -> bool;
+    fn has_zbs(&mut self) -> bool;
+    fn imm(&mut self, arg0: Type, arg1: u64) -> Reg;
+    fn imm12_const(&mut self, arg0: i32) -> Imm12;
+    fn imm_from_bits(&mut self, arg0: u64) -> Imm12;
+    fn imm_from_neg_bits(&mut self, arg0: i64) -> Imm12;
+    fn imm12_const_add(&mut self, arg0: i32, arg1: i32) -> Imm12;
+    fn imm12_and(&mut self, arg0: Imm12, arg1: u64) -> Imm12;
+    fn neg_imm12(&mut self, arg0: Imm12) -> Imm12;
+    fn imm12_from_u64(&mut self, arg0: u64) -> Option<Imm12>;
+    fn imm5_from_u64(&mut self, arg0: u64) -> Option<Imm5>;
+    fn imm5_from_i8(&mut self, arg0: i8) -> Option<Imm5>;
+    fn uimm5_from_u8(&mut self, arg0: u8) -> Option<UImm5>;
+    fn uimm5_from_u64(&mut self, arg0: u64) -> Option<UImm5>;
+    fn uimm5_bitcast_to_imm5(&mut self, arg0: UImm5) -> Imm5;
+    fn gen_default_frm(&mut self) -> OptionFloatRoundingMode;
+    fn pack_float_rounding_mode(&mut self, arg0: &FRM) -> OptionFloatRoundingMode;
+    fn gen_shamt(&mut self, arg0: Type, arg1: XReg) -> ValueRegs;
+    fn gen_amode(&mut self, arg0: Reg, arg1: Offset32, arg2: Type) -> AMode;
+    fn gen_const_amode(&mut self, arg0: VCodeConstant) -> AMode;
+    fn offset32_imm(&mut self, arg0: i32) -> Offset32;
+    fn default_memflags(&mut self) -> MemFlags;
+    fn offset32_add(&mut self, arg0: Offset32, arg1: i64) -> Offset32;
+    fn valid_atomic_transaction(&mut self, arg0: Type) -> Option<Type>;
+    fn atomic_amo(&mut self) -> AMO;
+    fn gen_stack_addr(&mut self, arg0: StackSlot, arg1: Offset32) -> Reg;
+    fn gen_select_reg(&mut self, arg0: &IntCC, arg1: XReg, arg2: XReg, arg3: Reg, arg4: Reg)
+        -> Reg;
+    fn load_u64_constant(&mut self, arg0: u64) -> Reg;
+    fn vec_writable_clone(&mut self, arg0: &VecWritableReg) -> VecWritableReg;
+    fn vec_writable_to_regs(&mut self, arg0: &VecWritableReg) -> ValueRegs;
+    fn alloc_vec_writable(&mut self, arg0: Type) -> VecWritableReg;
+    fn load_op(&mut self, arg0: Type) -> LoadOP;
+    fn store_op(&mut self, arg0: Type) -> StoreOP;
+    fn load_ext_name(&mut self, arg0: ExternalName, arg1: i64) -> Reg;
+    fn int_convert_2_float_op(&mut self, arg0: Type, arg1: bool, arg2: Type) -> FpuOPRR;
+    fn label_to_br_target(&mut self, arg0: MachLabel) -> BranchTarget;
+    fn vec_label_get(&mut self, arg0: &VecMachLabel, arg1: u8) -> MachLabel;
+    fn lower_br_icmp(
+        &mut self,
+        arg0: &IntCC,
+        arg1: ValueRegs,
+        arg2: ValueRegs,
+        arg3: &VecMachLabel,
+        arg4: Type,
+    ) -> Unit;
+    fn int_zero_reg(&mut self, arg0: Type) -> ValueRegs;
+    fn lower_cond_br(
+        &mut self,
+        arg0: &IntCC,
+        arg1: ValueRegs,
+        arg2: &VecMachLabel,
+        arg3: Type,
+    ) -> Unit;
+    fn intcc_to_extend_op(&mut self, arg0: &IntCC) -> ExtendOp;
+    fn lower_br_table(&mut self, arg0: Reg, arg1: &VecMachLabel) -> Unit;
+    fn load_ra(&mut self) -> Reg;
+    fn shift_int_to_most_significant(&mut self, arg0: XReg, arg1: Type) -> XReg;
+    fn gen_call(
+        &mut self,
+        arg0: SigRef,
+        arg1: ExternalName,
+        arg2: RelocDistance,
+        arg3: ValueSlice,
+    ) -> InstOutput;
+    fn gen_call_indirect(&mut self, arg0: SigRef, arg1: Value, arg2: ValueSlice) -> InstOutput;
+    fn fp_reg(&mut self) -> PReg;
+    fn sp_reg(&mut self) -> PReg;
+    fn zero_reg(&mut self) -> Reg;
+    fn writable_zero_reg(&mut self) -> WritableReg;
+    fn int_compare(&mut self, arg0: &IntCC, arg1: XReg, arg2: XReg) -> IntegerCompare;
+    fn vec_alu_rr_dst_type(&mut self, arg0: &VecAluOpRR) -> Type;
+    fn vstate_from_type(&mut self, arg0: Type) -> VState;
+    fn vstate_mf2(&mut self, arg0: VState) -> VState;
+    fn min_vec_reg_size(&mut self) -> u64;
+    fn ty_vec_fits_in_register(&mut self, arg0: Type) -> Option<Type>;
+    fn is_atomic_rmw_max_etc(&mut self, arg0: &AtomicRmwOp) -> Option<(AtomicRmwOp, bool)>;
+    fn unpack_value_array_2(&mut self, arg0: &ValueArray2) -> (Value, Value);
+    fn pack_value_array_2(&mut self, arg0: Value, arg1: Value) -> ValueArray2;
+    fn unpack_value_array_3(&mut self, arg0: &ValueArray3) -> (Value, Value, Value);
+    fn pack_value_array_3(&mut self, arg0: Value, arg1: Value, arg2: Value) -> ValueArray3;
+    fn unpack_block_array_2(&mut self, arg0: &BlockArray2) -> (BlockCall, BlockCall);
+    fn pack_block_array_2(&mut self, arg0: BlockCall, arg1: BlockCall) -> BlockArray2;
+}
+
+pub trait ContextIter {
+    type Context;
+    type Output;
+    fn next(&mut self, ctx: &mut Self::Context) -> Option<Self::Output>;
+}
+
+pub struct ContextIterWrapper<Item, I: Iterator<Item = Item>, C: Context> {
+    iter: I,
+    _ctx: PhantomData<C>,
+}
+impl<Item, I: Iterator<Item = Item>, C: Context> From<I> for ContextIterWrapper<Item, I, C> {
+    fn from(iter: I) -> Self {
+        Self {
+            iter,
+            _ctx: PhantomData,
+        }
+    }
+}
+impl<Item, I: Iterator<Item = Item>, C: Context> ContextIter for ContextIterWrapper<Item, I, C> {
+    type Context = C;
+    type Output = Item;
+    fn next(&mut self, _ctx: &mut Self::Context) -> Option<Self::Output> {
+        self.iter.next()
+    }
+}
+
+/// Internal type MultiReg: defined at src/prelude_lower.isle line 21.
+#[derive(Clone, Debug)]
+pub enum MultiReg {
+    Empty,
+    One { a: Reg },
+    Two { a: Reg, b: Reg },
+    Three { a: Reg, b: Reg, c: Reg },
+    Four { a: Reg, b: Reg, c: Reg, d: Reg },
+}
+
+/// Internal type SideEffectNoResult: defined at src/prelude_lower.isle line 309.
+#[derive(Clone, Debug)]
+pub enum SideEffectNoResult {
+    Inst {
+        inst: MInst,
+    },
+    Inst2 {
+        inst1: MInst,
+        inst2: MInst,
+    },
+    Inst3 {
+        inst1: MInst,
+        inst2: MInst,
+        inst3: MInst,
+    },
+}
+
+/// Internal type ProducesFlags: defined at src/prelude_lower.isle line 351.
+#[derive(Clone, Debug)]
+pub enum ProducesFlags {
+    AlreadyExistingFlags,
+    ProducesFlagsSideEffect { inst: MInst },
+    ProducesFlagsTwiceSideEffect { inst1: MInst, inst2: MInst },
+    ProducesFlagsReturnsReg { inst: MInst, result: Reg },
+    ProducesFlagsReturnsResultWithConsumer { inst: MInst, result: Reg },
+}
+
+/// Internal type ConsumesAndProducesFlags: defined at src/prelude_lower.isle line 370.
+#[derive(Clone, Debug)]
+pub enum ConsumesAndProducesFlags {
+    SideEffect { inst: MInst },
+    ReturnsReg { inst: MInst, result: Reg },
+}
+
+/// Internal type ConsumesFlags: defined at src/prelude_lower.isle line 378.
+#[derive(Clone, Debug)]
+pub enum ConsumesFlags {
+    ConsumesFlagsSideEffect {
+        inst: MInst,
+    },
+    ConsumesFlagsSideEffect2 {
+        inst1: MInst,
+        inst2: MInst,
+    },
+    ConsumesFlagsReturnsResultWithProducer {
+        inst: MInst,
+        result: Reg,
+    },
+    ConsumesFlagsReturnsReg {
+        inst: MInst,
+        result: Reg,
+    },
+    ConsumesFlagsTwiceReturnsValueRegs {
+        inst1: MInst,
+        inst2: MInst,
+        result: ValueRegs,
+    },
+    ConsumesFlagsFourTimesReturnsValueRegs {
+        inst1: MInst,
+        inst2: MInst,
+        inst3: MInst,
+        inst4: MInst,
+        result: ValueRegs,
+    },
+}
+
+/// Internal type MInst: defined at src/isa/riscv64/inst.isle line 2.
+#[derive(Clone, Debug)]
+pub enum MInst {
+    Nop0,
+    Nop4,
+    Lui {
+        rd: WritableReg,
+        imm: Imm20,
+    },
+    LoadConst32 {
+        rd: WritableReg,
+        imm: u32,
+    },
+    LoadConst64 {
+        rd: WritableReg,
+        imm: u64,
+    },
+    Auipc {
+        rd: WritableReg,
+        imm: Imm20,
+    },
+    FpuRR {
+        alu_op: FpuOPRR,
+        frm: OptionFloatRoundingMode,
+        rd: WritableReg,
+        rs: Reg,
+    },
+    AluRRR {
+        alu_op: AluOPRRR,
+        rd: WritableReg,
+        rs1: Reg,
+        rs2: Reg,
+    },
+    FpuRRR {
+        alu_op: FpuOPRRR,
+        frm: OptionFloatRoundingMode,
+        rd: WritableReg,
+        rs1: Reg,
+        rs2: Reg,
+    },
+    FpuRRRR {
+        alu_op: FpuOPRRRR,
+        frm: OptionFloatRoundingMode,
+        rd: WritableReg,
+        rs1: Reg,
+        rs2: Reg,
+        rs3: Reg,
+    },
+    AluRRImm12 {
+        alu_op: AluOPRRI,
+        rd: WritableReg,
+        rs: Reg,
+        imm12: Imm12,
+    },
+    Load {
+        rd: WritableReg,
+        op: LoadOP,
+        flags: MemFlags,
+        from: AMode,
+    },
+    Store {
+        to: AMode,
+        op: StoreOP,
+        flags: MemFlags,
+        src: Reg,
+    },
+    Args {
+        args: VecArgPair,
+    },
+    Ret {
+        rets: VecRetPair,
+        stack_bytes_to_pop: u32,
+    },
+    Extend {
+        rd: WritableReg,
+        rn: Reg,
+        signed: bool,
+        from_bits: u8,
+        to_bits: u8,
+    },
+    AdjustSp {
+        amount: i64,
+    },
+    Call {
+        info: BoxCallInfo,
+    },
+    CallInd {
+        info: BoxCallIndInfo,
+    },
+    ReturnCall {
+        callee: BoxExternalName,
+        info: BoxReturnCallInfo,
+    },
+    ReturnCallInd {
+        callee: Reg,
+        info: BoxReturnCallInfo,
+    },
+    TrapIf {
+        test: Reg,
+        trap_code: TrapCode,
+    },
+    TrapIfC {
+        rs1: Reg,
+        rs2: Reg,
+        cc: IntCC,
+        trap_code: TrapCode,
+    },
+    Jal {
+        dest: BranchTarget,
+    },
+    CondBr {
+        taken: BranchTarget,
+        not_taken: BranchTarget,
+        kind: IntegerCompare,
+    },
+    LoadExtName {
+        rd: WritableReg,
+        name: BoxExternalName,
+        offset: i64,
+    },
+    LoadAddr {
+        rd: WritableReg,
+        mem: AMode,
+    },
+    VirtualSPOffsetAdj {
+        amount: i64,
+    },
+    Mov {
+        rd: WritableReg,
+        rm: Reg,
+        ty: Type,
+    },
+    MovFromPReg {
+        rd: WritableReg,
+        rm: PReg,
+    },
+    Fence {
+        pred: u8,
+        succ: u8,
+    },
+    FenceI,
+    ECall,
+    EBreak,
+    Udf {
+        trap_code: TrapCode,
+    },
+    Jalr {
+        rd: WritableReg,
+        base: Reg,
+        offset: Imm12,
+    },
+    Atomic {
+        op: AtomicOP,
+        rd: WritableReg,
+        addr: Reg,
+        src: Reg,
+        amo: AMO,
+    },
+    AtomicStore {
+        src: Reg,
+        ty: Type,
+        p: Reg,
+    },
+    AtomicLoad {
+        rd: WritableReg,
+        ty: Type,
+        p: Reg,
+    },
+    AtomicRmwLoop {
+        offset: Reg,
+        op: AtomicRmwOp,
+        dst: WritableReg,
+        ty: Type,
+        p: Reg,
+        x: Reg,
+        t0: WritableReg,
+    },
+    Select {
+        dst: VecWritableReg,
+        ty: Type,
+        condition: Reg,
+        x: ValueRegs,
+        y: ValueRegs,
+    },
+    BrTable {
+        index: Reg,
+        tmp1: WritableReg,
+        tmp2: WritableReg,
+        targets: VecBranchTarget,
+    },
+    AtomicCas {
+        offset: Reg,
+        t0: WritableReg,
+        dst: WritableReg,
+        e: Reg,
+        addr: Reg,
+        v: Reg,
+        ty: Type,
+    },
+    IntSelect {
+        op: IntSelectOP,
+        dst: VecWritableReg,
+        x: ValueRegs,
+        y: ValueRegs,
+        ty: Type,
+    },
+    Icmp {
+        cc: IntCC,
+        rd: WritableReg,
+        a: ValueRegs,
+        b: ValueRegs,
+        ty: Type,
+    },
+    SelectReg {
+        rd: WritableReg,
+        rs1: Reg,
+        rs2: Reg,
+        condition: IntegerCompare,
+    },
+    FcvtToInt {
+        is_sat: bool,
+        rd: WritableReg,
+        tmp: WritableReg,
+        rs: Reg,
+        is_signed: bool,
+        in_type: Type,
+        out_type: Type,
+    },
+    RawData {
+        data: VecU8,
+    },
+    Unwind {
+        inst: UnwindInst,
+    },
+    DummyUse {
+        reg: Reg,
+    },
+    FloatRound {
+        op: FloatRoundOP,
+        rd: WritableReg,
+        int_tmp: WritableReg,
+        f_tmp: WritableReg,
+        rs: Reg,
+        ty: Type,
+    },
+    FloatSelect {
+        op: FloatSelectOP,
+        rd: WritableReg,
+        tmp: WritableReg,
+        rs1: Reg,
+        rs2: Reg,
+        ty: Type,
+    },
+    FloatSelectPseudo {
+        op: FloatSelectOP,
+        rd: WritableReg,
+        tmp: WritableReg,
+        rs1: Reg,
+        rs2: Reg,
+        ty: Type,
+    },
+    Popcnt {
+        sum: WritableReg,
+        step: WritableReg,
+        tmp: WritableReg,
+        rs: Reg,
+        ty: Type,
+    },
+    Cltz {
+        leading: bool,
+        sum: WritableReg,
+        step: WritableReg,
+        tmp: WritableReg,
+        rs: Reg,
+        ty: Type,
+    },
+    Rev8 {
+        rs: Reg,
+        step: WritableReg,
+        tmp: WritableReg,
+        rd: WritableReg,
+    },
+    Brev8 {
+        rs: Reg,
+        ty: Type,
+        step: WritableReg,
+        tmp: WritableReg,
+        tmp2: WritableReg,
+        rd: WritableReg,
+    },
+    StackProbeLoop {
+        guard_size: u32,
+        probe_count: u32,
+        tmp: WritableReg,
+    },
+    VecAluRRRImm5 {
+        op: VecAluOpRRRImm5,
+        vd: WritableReg,
+        vd_src: Reg,
+        vs2: Reg,
+        imm: Imm5,
+        mask: VecOpMasking,
+        vstate: VState,
+    },
+    VecAluRRR {
+        op: VecAluOpRRR,
+        vd: WritableReg,
+        vs2: Reg,
+        vs1: Reg,
+        mask: VecOpMasking,
+        vstate: VState,
+    },
+    VecAluRRImm5 {
+        op: VecAluOpRRImm5,
+        vd: WritableReg,
+        vs2: Reg,
+        imm: Imm5,
+        mask: VecOpMasking,
+        vstate: VState,
+    },
+    VecAluRR {
+        op: VecAluOpRR,
+        vd: WritableReg,
+        vs: Reg,
+        mask: VecOpMasking,
+        vstate: VState,
+    },
+    VecAluRImm5 {
+        op: VecAluOpRImm5,
+        vd: WritableReg,
+        imm: Imm5,
+        mask: VecOpMasking,
+        vstate: VState,
+    },
+    VecSetState {
+        rd: WritableReg,
+        vstate: VState,
+    },
+    VecLoad {
+        eew: VecElementWidth,
+        to: WritableReg,
+        from: VecAMode,
+        flags: MemFlags,
+        mask: VecOpMasking,
+        vstate: VState,
+    },
+    VecStore {
+        eew: VecElementWidth,
+        to: VecAMode,
+        from: Reg,
+        flags: MemFlags,
+        mask: VecOpMasking,
+        vstate: VState,
+    },
+}
+
+/// Internal type FloatSelectOP: defined at src/isa/riscv64/inst.isle line 398.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum FloatSelectOP {
+    Max,
+    Min,
+}
+
+/// Internal type FloatRoundOP: defined at src/isa/riscv64/inst.isle line 403.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum FloatRoundOP {
+    Nearest,
+    Ceil,
+    Floor,
+    Trunc,
+}
+
+/// Internal type IntSelectOP: defined at src/isa/riscv64/inst.isle line 410.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum IntSelectOP {
+    Smax,
+    Umax,
+    Smin,
+    Umin,
+}
+
+/// Internal type AtomicOP: defined at src/isa/riscv64/inst.isle line 417.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum AtomicOP {
+    LrW,
+    ScW,
+    AmoswapW,
+    AmoaddW,
+    AmoxorW,
+    AmoandW,
+    AmoorW,
+    AmominW,
+    AmomaxW,
+    AmominuW,
+    AmomaxuW,
+    LrD,
+    ScD,
+    AmoswapD,
+    AmoaddD,
+    AmoxorD,
+    AmoandD,
+    AmoorD,
+    AmominD,
+    AmomaxD,
+    AmominuD,
+    AmomaxuD,
+}
+
+/// Internal type FpuOPRRRR: defined at src/isa/riscv64/inst.isle line 442.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum FpuOPRRRR {
+    FmaddS,
+    FmsubS,
+    FnmsubS,
+    FnmaddS,
+    FmaddD,
+    FmsubD,
+    FnmsubD,
+    FnmaddD,
+}
+
+/// Internal type FClassResult: defined at src/isa/riscv64/inst.isle line 455.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum FClassResult {
+    NegInfinite,
+    NegNormal,
+    NegSubNormal,
+    NegZero,
+    PosZero,
+    PosSubNormal,
+    PosNormal,
+    PosInfinite,
+    SNaN,
+    QNaN,
+}
+
+/// Internal type FpuOPRR: defined at src/isa/riscv64/inst.isle line 478.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum FpuOPRR {
+    FsqrtS,
+    FcvtWS,
+    FcvtWuS,
+    FmvXW,
+    FclassS,
+    FcvtSw,
+    FcvtSwU,
+    FmvWX,
+    FcvtLS,
+    FcvtLuS,
+    FcvtSL,
+    FcvtSLU,
+    FcvtLD,
+    FcvtLuD,
+    FmvXD,
+    FcvtDL,
+    FcvtDLu,
+    FmvDX,
+    FsqrtD,
+    FcvtSD,
+    FcvtDS,
+    FclassD,
+    FcvtWD,
+    FcvtWuD,
+    FcvtDW,
+    FcvtDWU,
+}
+
+/// Internal type LoadOP: defined at src/isa/riscv64/inst.isle line 518.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum LoadOP {
+    Lb,
+    Lh,
+    Lw,
+    Lbu,
+    Lhu,
+    Lwu,
+    Ld,
+    Flw,
+    Fld,
+}
+
+/// Internal type StoreOP: defined at src/isa/riscv64/inst.isle line 530.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum StoreOP {
+    Sb,
+    Sh,
+    Sw,
+    Sd,
+    Fsw,
+    Fsd,
+}
+
+/// Internal type AluOPRRR: defined at src/isa/riscv64/inst.isle line 539.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum AluOPRRR {
+    Add,
+    Sub,
+    Sll,
+    Slt,
+    SltU,
+    Sgt,
+    Sgtu,
+    Xor,
+    Srl,
+    Sra,
+    Or,
+    And,
+    Addw,
+    Subw,
+    Sllw,
+    Srlw,
+    Sraw,
+    Mul,
+    Mulh,
+    Mulhsu,
+    Mulhu,
+    Div,
+    DivU,
+    Rem,
+    RemU,
+    Mulw,
+    Divw,
+    Divuw,
+    Remw,
+    Remuw,
+    Adduw,
+    Sh1add,
+    Sh1adduw,
+    Sh2add,
+    Sh2adduw,
+    Sh3add,
+    Sh3adduw,
+    Andn,
+    Orn,
+    Xnor,
+    Max,
+    Maxu,
+    Min,
+    Minu,
+    Rol,
+    Rolw,
+    Ror,
+    Rorw,
+    Bclr,
+    Bext,
+    Binv,
+    Bset,
+    Clmul,
+    Clmulh,
+    Clmulr,
+    Pack,
+    Packw,
+    Packh,
+}
+
+/// Internal type FpuOPRRR: defined at src/isa/riscv64/inst.isle line 619.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum FpuOPRRR {
+    FaddS,
+    FsubS,
+    FmulS,
+    FdivS,
+    FsgnjS,
+    FsgnjnS,
+    FsgnjxS,
+    FminS,
+    FmaxS,
+    FeqS,
+    FltS,
+    FleS,
+    FaddD,
+    FsubD,
+    FmulD,
+    FdivD,
+    FsgnjD,
+    FsgnjnD,
+    FsgnjxD,
+    FminD,
+    FmaxD,
+    FeqD,
+    FltD,
+    FleD,
+}
+
+/// Internal type AluOPRRI: defined at src/isa/riscv64/inst.isle line 652.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum AluOPRRI {
+    Addi,
+    Slti,
+    SltiU,
+    Xori,
+    Ori,
+    Andi,
+    Slli,
+    Srli,
+    Srai,
+    Addiw,
+    Slliw,
+    SrliW,
+    Sraiw,
+    SlliUw,
+    Clz,
+    Clzw,
+    Ctz,
+    Ctzw,
+    Cpop,
+    Cpopw,
+    Sextb,
+    Sexth,
+    Zexth,
+    Rori,
+    Roriw,
+    Rev8,
+    Brev8,
+    Orcb,
+    Bclri,
+    Bexti,
+    Binvi,
+    Bseti,
+}
+
+/// Internal type FRM: defined at src/isa/riscv64/inst.isle line 695.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum FRM {
+    RNE,
+    RTZ,
+    RDN,
+    RUP,
+    RMM,
+    Fcsr,
+}
+
+/// Internal type FFlagsException: defined at src/isa/riscv64/inst.isle line 711.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum FFlagsException {
+    NV,
+    DZ,
+    OF,
+    UF,
+    NX,
+}
+
+/// Internal type ExtendOp: defined at src/isa/riscv64/inst.isle line 1912.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum ExtendOp {
+    Zero,
+    Signed,
+}
+
+/// Internal type CmpResult: defined at src/isa/riscv64/inst.isle line 2854.
+#[derive(Clone, Debug)]
+pub enum CmpResult {
+    Result { result: XReg, invert: bool },
+}
+
+/// Internal type VecElementWidth: defined at src/isa/riscv64/inst_vector.isle line 2.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum VecElementWidth {
+    E8,
+    E16,
+    E32,
+    E64,
+}
+
+/// Internal type VecLmul: defined at src/isa/riscv64/inst_vector.isle line 15.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum VecLmul {
+    LmulF8,
+    LmulF4,
+    LmulF2,
+    Lmul1,
+    Lmul2,
+    Lmul4,
+    Lmul8,
+}
+
+/// Internal type VecTailMode: defined at src/isa/riscv64/inst_vector.isle line 28.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum VecTailMode {
+    Agnostic,
+    Undisturbed,
+}
+
+/// Internal type VecMaskMode: defined at src/isa/riscv64/inst_vector.isle line 38.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum VecMaskMode {
+    Agnostic,
+    Undisturbed,
+}
+
+/// Internal type VecAvl: defined at src/isa/riscv64/inst_vector.isle line 50.
+#[derive(Clone, Debug)]
+pub enum VecAvl {
+    Static { size: UImm5 },
+}
+
+/// Internal type VecOpCategory: defined at src/isa/riscv64/inst_vector.isle line 64.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum VecOpCategory {
+    OPIVV,
+    OPFVV,
+    OPMVV,
+    OPIVI,
+    OPIVX,
+    OPFVF,
+    OPMVX,
+    OPCFG,
+}
+
+/// Internal type VecOpMasking: defined at src/isa/riscv64/inst_vector.isle line 79.
+#[derive(Clone, Debug)]
+pub enum VecOpMasking {
+    Enabled { reg: Reg },
+    Disabled,
+}
+
+/// Internal type VecAluOpRRR: defined at src/isa/riscv64/inst_vector.isle line 91.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum VecAluOpRRR {
+    VaddVV,
+    VsaddVV,
+    VsadduVV,
+    VwaddVV,
+    VwaddWV,
+    VwadduVV,
+    VwadduWV,
+    VsubVV,
+    VwsubVV,
+    VwsubWV,
+    VwsubuVV,
+    VwsubuWV,
+    VssubVV,
+    VssubuVV,
+    VmulVV,
+    VmulhVV,
+    VmulhuVV,
+    VsmulVV,
+    VsllVV,
+    VsrlVV,
+    VsraVV,
+    VandVV,
+    VorVV,
+    VxorVV,
+    VmaxVV,
+    VmaxuVV,
+    VminVV,
+    VminuVV,
+    VfaddVV,
+    VfsubVV,
+    VfmulVV,
+    VfdivVV,
+    VfminVV,
+    VfmaxVV,
+    VfsgnjVV,
+    VfsgnjnVV,
+    VfsgnjxVV,
+    VmergeVVM,
+    VredmaxuVS,
+    VredminuVS,
+    VrgatherVV,
+    VcompressVM,
+    VmseqVV,
+    VmsneVV,
+    VmsltuVV,
+    VmsltVV,
+    VmsleuVV,
+    VmsleVV,
+    VmfeqVV,
+    VmfneVV,
+    VmfltVV,
+    VmfleVV,
+    VmandMM,
+    VmorMM,
+    VmnandMM,
+    VmnorMM,
+    VaddVX,
+    VsaddVX,
+    VsadduVX,
+    VwaddVX,
+    VwaddWX,
+    VwadduVX,
+    VwadduWX,
+    VsubVX,
+    VrsubVX,
+    VwsubVX,
+    VwsubWX,
+    VwsubuVX,
+    VwsubuWX,
+    VssubVX,
+    VssubuVX,
+    VmulVX,
+    VmulhVX,
+    VmulhuVX,
+    VsmulVX,
+    VsllVX,
+    VsrlVX,
+    VsraVX,
+    VandVX,
+    VorVX,
+    VxorVX,
+    VmaxVX,
+    VmaxuVX,
+    VminVX,
+    VminuVX,
+    VslidedownVX,
+    VfaddVF,
+    VfsubVF,
+    VfrsubVF,
+    VfmulVF,
+    VfdivVF,
+    VfsgnjVF,
+    VfrdivVF,
+    VmergeVXM,
+    VfmergeVFM,
+    VrgatherVX,
+    VmseqVX,
+    VmsneVX,
+    VmsltuVX,
+    VmsltVX,
+    VmsleuVX,
+    VmsleVX,
+    VmsgtuVX,
+    VmsgtVX,
+    VmfeqVF,
+    VmfneVF,
+    VmfltVF,
+    VmfleVF,
+    VmfgtVF,
+    VmfgeVF,
+}
+
+/// Internal type VecAluOpRRRImm5: defined at src/isa/riscv64/inst_vector.isle line 211.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum VecAluOpRRRImm5 {
+    VslideupVI,
+}
+
+/// Internal type VecAluOpRRImm5: defined at src/isa/riscv64/inst_vector.isle line 216.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum VecAluOpRRImm5 {
+    VaddVI,
+    VsaddVI,
+    VsadduVI,
+    VrsubVI,
+    VsllVI,
+    VsrlVI,
+    VsraVI,
+    VandVI,
+    VorVI,
+    VxorVI,
+    VssrlVI,
+    VslidedownVI,
+    VmergeVIM,
+    VrgatherVI,
+    VmvrV,
+    VnclipWI,
+    VnclipuWI,
+    VmseqVI,
+    VmsneVI,
+    VmsleuVI,
+    VmsleVI,
+    VmsgtuVI,
+    VmsgtVI,
+}
+
+/// Internal type VecAluOpRImm5: defined at src/isa/riscv64/inst_vector.isle line 246.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum VecAluOpRImm5 {
+    VmvVI,
+}
+
+/// Internal type VecAluOpRR: defined at src/isa/riscv64/inst_vector.isle line 253.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum VecAluOpRR {
+    VmvSX,
+    VmvXS,
+    VfmvSF,
+    VfmvFS,
+    VmvVV,
+    VmvVX,
+    VfmvVF,
+    VfsqrtV,
+    VsextVF2,
+    VsextVF4,
+    VsextVF8,
+    VzextVF2,
+    VzextVF4,
+    VzextVF8,
+}
+
+/// Internal type VecAMode: defined at src/isa/riscv64/inst_vector.isle line 277.
+#[derive(Clone, Debug)]
+pub enum VecAMode {
+    UnitStride { base: AMode },
+}
+
+// Generated as internal constructor for term output_reg.
+pub fn constructor_output_reg<C: Context>(ctx: &mut C, arg0: Reg) -> InstOutput {
+    let v1 = C::value_reg(ctx, arg0);
+    let v2 = C::output(ctx, v1);
+    // Rule at src/prelude_lower.isle line 65.
+    return v2;
+}
+
+// Generated as internal constructor for term output_value.
+pub fn constructor_output_value<C: Context>(ctx: &mut C, arg0: Value) -> InstOutput {
+    let v1 = C::put_in_regs(ctx, arg0);
+    let v2 = C::output(ctx, v1);
+    // Rule at src/prelude_lower.isle line 69.
+    return v2;
+}
+
+// Generated as internal constructor for term temp_reg.
+pub fn constructor_temp_reg<C: Context>(ctx: &mut C, arg0: Type) -> Reg {
+    let v1 = C::temp_writable_reg(ctx, arg0);
+    let v2 = C::writable_reg_to_reg(ctx, v1);
+    // Rule at src/prelude_lower.isle line 89.
+    return v2;
+}
+
+// Generated as internal constructor for term value_regs_range.
+pub fn constructor_value_regs_range<C: Context>(ctx: &mut C, arg0: ValueRegs) -> Range {
+    let v2 = C::value_regs_len(ctx, arg0);
+    let v3 = C::range(ctx, 0x0, v2);
+    // Rule at src/prelude_lower.isle line 138.
+    return v3;
+}
+
+// Generated as internal constructor for term lo_reg.
+pub fn constructor_lo_reg<C: Context>(ctx: &mut C, arg0: Value) -> Reg {
+    let v1 = C::put_in_regs(ctx, arg0);
+    let v3 = C::value_regs_get(ctx, v1, 0x0);
+    // Rule at src/prelude_lower.isle line 149.
+    return v3;
+}
+
+// Generated as internal constructor for term multi_reg_to_pair_and_single.
+pub fn constructor_multi_reg_to_pair_and_single<C: Context>(
+    ctx: &mut C,
+    arg0: &MultiReg,
+) -> InstOutput {
+    if let &MultiReg::Three {
+        a: v1,
+        b: v2,
+        c: v3,
+    } = arg0
+    {
+        let v4 = C::value_regs(ctx, v1, v2);
+        let v5 = C::value_reg(ctx, v3);
+        let v6 = C::output_pair(ctx, v4, v5);
+        // Rule at src/prelude_lower.isle line 160.
+        return v6;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "multi_reg_to_pair_and_single", "src/prelude_lower.isle line 159"
+    )
+}
+
+// Generated as internal constructor for term multi_reg_to_pair.
+pub fn constructor_multi_reg_to_pair<C: Context>(ctx: &mut C, arg0: &MultiReg) -> InstOutput {
+    if let &MultiReg::Two { a: v1, b: v2 } = arg0 {
+        let v3 = C::value_regs(ctx, v1, v2);
+        let v4 = C::output(ctx, v3);
+        // Rule at src/prelude_lower.isle line 165.
+        return v4;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "multi_reg_to_pair", "src/prelude_lower.isle line 164"
+    )
+}
+
+// Generated as internal constructor for term multi_reg_to_single.
+pub fn constructor_multi_reg_to_single<C: Context>(ctx: &mut C, arg0: &MultiReg) -> InstOutput {
+    if let &MultiReg::One { a: v1 } = arg0 {
+        let v2 = C::value_reg(ctx, v1);
+        let v3 = C::output(ctx, v2);
+        // Rule at src/prelude_lower.isle line 170.
+        return v3;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "multi_reg_to_single", "src/prelude_lower.isle line 169"
+    )
+}
+
+// Generated as internal constructor for term emit_side_effect.
+pub fn constructor_emit_side_effect<C: Context>(ctx: &mut C, arg0: &SideEffectNoResult) -> Unit {
+    match arg0 {
+        &SideEffectNoResult::Inst { inst: ref v1 } => {
+            let v2 = C::emit(ctx, v1);
+            // Rule at src/prelude_lower.isle line 319.
+            return v2;
+        }
+        &SideEffectNoResult::Inst2 {
+            inst1: ref v3,
+            inst2: ref v4,
+        } => {
+            let v5 = C::emit(ctx, v3);
+            let v6 = C::emit(ctx, v4);
+            // Rule at src/prelude_lower.isle line 321.
+            return v6;
+        }
+        &SideEffectNoResult::Inst3 {
+            inst1: ref v7,
+            inst2: ref v8,
+            inst3: ref v9,
+        } => {
+            let v10 = C::emit(ctx, v7);
+            let v11 = C::emit(ctx, v8);
+            let v12 = C::emit(ctx, v9);
+            // Rule at src/prelude_lower.isle line 324.
+            return v12;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "emit_side_effect", "src/prelude_lower.isle line 318"
+    )
+}
+
+// Generated as internal constructor for term side_effect.
+pub fn constructor_side_effect<C: Context>(ctx: &mut C, arg0: &SideEffectNoResult) -> InstOutput {
+    let v1 = constructor_emit_side_effect(ctx, arg0);
+    let v2 = C::output_none(ctx);
+    // Rule at src/prelude_lower.isle line 332.
+    return v2;
+}
+
+// Generated as internal constructor for term side_effect_concat.
+pub fn constructor_side_effect_concat<C: Context>(
+    ctx: &mut C,
+    arg0: &SideEffectNoResult,
+    arg1: &SideEffectNoResult,
+) -> SideEffectNoResult {
+    match arg0 {
+        &SideEffectNoResult::Inst { inst: ref v1 } => {
+            match arg1 {
+                &SideEffectNoResult::Inst { inst: ref v3 } => {
+                    let v4 = SideEffectNoResult::Inst2 {
+                        inst1: v1.clone(),
+                        inst2: v3.clone(),
+                    };
+                    // Rule at src/prelude_lower.isle line 337.
+                    return v4;
+                }
+                &SideEffectNoResult::Inst2 {
+                    inst1: ref v5,
+                    inst2: ref v6,
+                } => {
+                    let v7 = SideEffectNoResult::Inst3 {
+                        inst1: v1.clone(),
+                        inst2: v5.clone(),
+                        inst3: v6.clone(),
+                    };
+                    // Rule at src/prelude_lower.isle line 339.
+                    return v7;
+                }
+                _ => {}
+            }
+        }
+        &SideEffectNoResult::Inst2 {
+            inst1: ref v8,
+            inst2: ref v9,
+        } => {
+            if let &SideEffectNoResult::Inst { inst: ref v3 } = arg1 {
+                let v10 = SideEffectNoResult::Inst3 {
+                    inst1: v8.clone(),
+                    inst2: v9.clone(),
+                    inst3: v3.clone(),
+                };
+                // Rule at src/prelude_lower.isle line 341.
+                return v10;
+            }
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "side_effect_concat", "src/prelude_lower.isle line 336"
+    )
+}
+
+// Generated as internal constructor for term produces_flags_concat.
+pub fn constructor_produces_flags_concat<C: Context>(
+    ctx: &mut C,
+    arg0: &ProducesFlags,
+    arg1: &ProducesFlags,
+) -> ProducesFlags {
+    if let &ProducesFlags::ProducesFlagsSideEffect { inst: ref v1 } = arg0 {
+        if let &ProducesFlags::ProducesFlagsSideEffect { inst: ref v3 } = arg1 {
+            let v4 = ProducesFlags::ProducesFlagsTwiceSideEffect {
+                inst1: v1.clone(),
+                inst2: v3.clone(),
+            };
+            // Rule at src/prelude_lower.isle line 366.
+            return v4;
+        }
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "produces_flags_concat", "src/prelude_lower.isle line 365"
+    )
+}
+
+// Generated as internal constructor for term produces_flags_get_reg.
+pub fn constructor_produces_flags_get_reg<C: Context>(ctx: &mut C, arg0: &ProducesFlags) -> Reg {
+    match arg0 {
+        &ProducesFlags::ProducesFlagsReturnsReg {
+            inst: ref v1,
+            result: v2,
+        } => {
+            // Rule at src/prelude_lower.isle line 396.
+            return v2;
+        }
+        &ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
+            inst: ref v3,
+            result: v4,
+        } => {
+            // Rule at src/prelude_lower.isle line 397.
+            return v4;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "produces_flags_get_reg", "src/prelude_lower.isle line 395"
+    )
+}
+
+// Generated as internal constructor for term produces_flags_ignore.
+pub fn constructor_produces_flags_ignore<C: Context>(
+    ctx: &mut C,
+    arg0: &ProducesFlags,
+) -> ProducesFlags {
+    match arg0 {
+        &ProducesFlags::ProducesFlagsReturnsReg {
+            inst: ref v1,
+            result: v2,
+        } => {
+            let v3 = ProducesFlags::ProducesFlagsSideEffect { inst: v1.clone() };
+            // Rule at src/prelude_lower.isle line 402.
+            return v3;
+        }
+        &ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
+            inst: ref v4,
+            result: v5,
+        } => {
+            let v6 = ProducesFlags::ProducesFlagsSideEffect { inst: v4.clone() };
+            // Rule at src/prelude_lower.isle line 404.
+            return v6;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "produces_flags_ignore", "src/prelude_lower.isle line 401"
+    )
+}
+
+// Generated as internal constructor for term consumes_flags_concat.
+pub fn constructor_consumes_flags_concat<C: Context>(
+    ctx: &mut C,
+    arg0: &ConsumesFlags,
+    arg1: &ConsumesFlags,
+) -> ConsumesFlags {
+    match arg0 {
+        &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v8 } => {
+            if let &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v9 } = arg1 {
+                let v10 = ConsumesFlags::ConsumesFlagsSideEffect2 {
+                    inst1: v8.clone(),
+                    inst2: v9.clone(),
+                };
+                // Rule at src/prelude_lower.isle line 417.
+                return v10;
+            }
+        }
+        &ConsumesFlags::ConsumesFlagsReturnsReg {
+            inst: ref v1,
+            result: v2,
+        } => {
+            if let &ConsumesFlags::ConsumesFlagsReturnsReg {
+                inst: ref v4,
+                result: v5,
+            } = arg1
+            {
+                let v6 = C::value_regs(ctx, v2, v5);
+                let v7 = ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
+                    inst1: v1.clone(),
+                    inst2: v4.clone(),
+                    result: v6,
+                };
+                // Rule at src/prelude_lower.isle line 411.
+                return v7;
+            }
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "consumes_flags_concat", "src/prelude_lower.isle line 410"
+    )
+}
+
+// Generated as internal constructor for term with_flags.
+pub fn constructor_with_flags<C: Context>(
+    ctx: &mut C,
+    arg0: &ProducesFlags,
+    arg1: &ConsumesFlags,
+) -> ValueRegs {
+    match arg0 {
+        &ProducesFlags::ProducesFlagsSideEffect { inst: ref v12 } => {
+            match arg1 {
+                &ConsumesFlags::ConsumesFlagsReturnsReg {
+                    inst: ref v13,
+                    result: v14,
+                } => {
+                    let v15 = C::emit(ctx, v12);
+                    let v16 = C::emit(ctx, v13);
+                    let v17 = C::value_reg(ctx, v14);
+                    // Rule at src/prelude_lower.isle line 448.
+                    return v17;
+                }
+                &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
+                    inst1: ref v18,
+                    inst2: ref v19,
+                    result: v20,
+                } => {
+                    let v15 = C::emit(ctx, v12);
+                    let v21 = C::emit(ctx, v18);
+                    let v22 = C::emit(ctx, v19);
+                    // Rule at src/prelude_lower.isle line 454.
+                    return v20;
+                }
+                &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
+                    inst1: ref v23,
+                    inst2: ref v24,
+                    inst3: ref v25,
+                    inst4: ref v26,
+                    result: v27,
+                } => {
+                    let v15 = C::emit(ctx, v12);
+                    let v28 = C::emit(ctx, v23);
+                    let v29 = C::emit(ctx, v24);
+                    let v30 = C::emit(ctx, v25);
+                    let v31 = C::emit(ctx, v26);
+                    // Rule at src/prelude_lower.isle line 466.
+                    return v27;
+                }
+                _ => {}
+            }
+        }
+        &ProducesFlags::ProducesFlagsTwiceSideEffect {
+            inst1: ref v32,
+            inst2: ref v33,
+        } => {
+            match arg1 {
+                &ConsumesFlags::ConsumesFlagsReturnsReg {
+                    inst: ref v13,
+                    result: v14,
+                } => {
+                    let v34 = C::emit(ctx, v32);
+                    let v35 = C::emit(ctx, v33);
+                    let v36 = C::emit(ctx, v13);
+                    let v37 = C::value_reg(ctx, v14);
+                    // Rule at src/prelude_lower.isle line 482.
+                    return v37;
+                }
+                &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
+                    inst1: ref v18,
+                    inst2: ref v19,
+                    result: v20,
+                } => {
+                    let v34 = C::emit(ctx, v32);
+                    let v35 = C::emit(ctx, v33);
+                    let v38 = C::emit(ctx, v18);
+                    let v39 = C::emit(ctx, v19);
+                    // Rule at src/prelude_lower.isle line 489.
+                    return v20;
+                }
+                &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
+                    inst1: ref v23,
+                    inst2: ref v24,
+                    inst3: ref v25,
+                    inst4: ref v26,
+                    result: v27,
+                } => {
+                    let v34 = C::emit(ctx, v32);
+                    let v35 = C::emit(ctx, v33);
+                    let v40 = C::emit(ctx, v23);
+                    let v41 = C::emit(ctx, v24);
+                    let v42 = C::emit(ctx, v25);
+                    let v43 = C::emit(ctx, v26);
+                    // Rule at src/prelude_lower.isle line 502.
+                    return v27;
+                }
+                _ => {}
+            }
+        }
+        &ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
+            inst: ref v1,
+            result: v2,
+        } => {
+            match arg1 {
+                &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v9 } => {
+                    let v6 = C::emit(ctx, v1);
+                    let v10 = C::emit(ctx, v9);
+                    let v11 = C::value_reg(ctx, v2);
+                    // Rule at src/prelude_lower.isle line 442.
+                    return v11;
+                }
+                &ConsumesFlags::ConsumesFlagsReturnsResultWithProducer {
+                    inst: ref v4,
+                    result: v5,
+                } => {
+                    let v6 = C::emit(ctx, v1);
+                    let v7 = C::emit(ctx, v4);
+                    let v8 = C::value_regs(ctx, v2, v5);
+                    // Rule at src/prelude_lower.isle line 434.
+                    return v8;
+                }
+                _ => {}
+            }
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "with_flags", "src/prelude_lower.isle line 432"
+    )
+}
+
+// Generated as internal constructor for term with_flags_reg.
+pub fn constructor_with_flags_reg<C: Context>(
+    ctx: &mut C,
+    arg0: &ProducesFlags,
+    arg1: &ConsumesFlags,
+) -> Reg {
+    let v2 = constructor_with_flags(ctx, arg0, arg1);
+    let v4 = C::value_regs_get(ctx, v2, 0x0);
+    // Rule at src/prelude_lower.isle line 520.
+    return v4;
+}
+
+// Generated as internal constructor for term flags_to_producesflags.
+pub fn constructor_flags_to_producesflags<C: Context>(ctx: &mut C, arg0: Value) -> ProducesFlags {
+    let v1 = C::mark_value_used(ctx, arg0);
+    // Rule at src/prelude_lower.isle line 527.
+    return ProducesFlags::AlreadyExistingFlags;
+}
+
+// Generated as internal constructor for term with_flags_side_effect.
+pub fn constructor_with_flags_side_effect<C: Context>(
+    ctx: &mut C,
+    arg0: &ProducesFlags,
+    arg1: &ConsumesFlags,
+) -> SideEffectNoResult {
+    match arg0 {
+        &ProducesFlags::AlreadyExistingFlags => {
+            match arg1 {
+                &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v2 } => {
+                    let v3 = SideEffectNoResult::Inst { inst: v2.clone() };
+                    // Rule at src/prelude_lower.isle line 538.
+                    return v3;
+                }
+                &ConsumesFlags::ConsumesFlagsSideEffect2 {
+                    inst1: ref v4,
+                    inst2: ref v5,
+                } => {
+                    let v6 = SideEffectNoResult::Inst2 {
+                        inst1: v4.clone(),
+                        inst2: v5.clone(),
+                    };
+                    // Rule at src/prelude_lower.isle line 543.
+                    return v6;
+                }
+                _ => {}
+            }
+        }
+        &ProducesFlags::ProducesFlagsSideEffect { inst: ref v7 } => {
+            match arg1 {
+                &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v2 } => {
+                    let v8 = SideEffectNoResult::Inst2 {
+                        inst1: v7.clone(),
+                        inst2: v2.clone(),
+                    };
+                    // Rule at src/prelude_lower.isle line 548.
+                    return v8;
+                }
+                &ConsumesFlags::ConsumesFlagsSideEffect2 {
+                    inst1: ref v4,
+                    inst2: ref v5,
+                } => {
+                    let v9 = SideEffectNoResult::Inst3 {
+                        inst1: v7.clone(),
+                        inst2: v4.clone(),
+                        inst3: v5.clone(),
+                    };
+                    // Rule at src/prelude_lower.isle line 553.
+                    return v9;
+                }
+                _ => {}
+            }
+        }
+        &ProducesFlags::ProducesFlagsTwiceSideEffect {
+            inst1: ref v10,
+            inst2: ref v11,
+        } => {
+            if let &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v2 } = arg1 {
+                let v12 = SideEffectNoResult::Inst3 {
+                    inst1: v10.clone(),
+                    inst2: v11.clone(),
+                    inst3: v2.clone(),
+                };
+                // Rule at src/prelude_lower.isle line 558.
+                return v12;
+            }
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "with_flags_side_effect", "src/prelude_lower.isle line 536"
+    )
+}
+
+// Generated as internal constructor for term with_flags_chained.
+pub fn constructor_with_flags_chained<C: Context>(
+    ctx: &mut C,
+    arg0: &ProducesFlags,
+    arg1: &ConsumesAndProducesFlags,
+    arg2: &ConsumesFlags,
+) -> MultiReg {
+    match arg0 {
+        &ProducesFlags::ProducesFlagsSideEffect { inst: ref v1 } => {
+            match arg1 {
+                &ConsumesAndProducesFlags::SideEffect { inst: ref v3 } => {
+                    match arg2 {
+                        &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v5 } => {
+                            let v6 = C::emit(ctx, v1);
+                            let v7 = C::emit(ctx, v3);
+                            let v8 = C::emit(ctx, v5);
+                            // Rule at src/prelude_lower.isle line 567.
+                            return MultiReg::Empty;
+                        }
+                        &ConsumesFlags::ConsumesFlagsSideEffect2 {
+                            inst1: ref v10,
+                            inst2: ref v11,
+                        } => {
+                            let v6 = C::emit(ctx, v1);
+                            let v7 = C::emit(ctx, v3);
+                            let v12 = C::emit(ctx, v10);
+                            let v13 = C::emit(ctx, v11);
+                            // Rule at src/prelude_lower.isle line 575.
+                            return MultiReg::Empty;
+                        }
+                        &ConsumesFlags::ConsumesFlagsReturnsReg {
+                            inst: ref v14,
+                            result: v15,
+                        } => {
+                            let v6 = C::emit(ctx, v1);
+                            let v7 = C::emit(ctx, v3);
+                            let v16 = C::emit(ctx, v14);
+                            let v17 = MultiReg::One { a: v15 };
+                            // Rule at src/prelude_lower.isle line 584.
+                            return v17;
+                        }
+                        &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
+                            inst1: ref v18,
+                            inst2: ref v19,
+                            result: v20,
+                        } => {
+                            let v6 = C::emit(ctx, v1);
+                            let v7 = C::emit(ctx, v3);
+                            let v21 = C::emit(ctx, v18);
+                            let v22 = C::emit(ctx, v19);
+                            let v24 = C::value_regs_get(ctx, v20, 0x0);
+                            let v26 = C::value_regs_get(ctx, v20, 0x1);
+                            let v27 = MultiReg::Two { a: v24, b: v26 };
+                            // Rule at src/prelude_lower.isle line 592.
+                            return v27;
+                        }
+                        &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
+                            inst1: ref v28,
+                            inst2: ref v29,
+                            inst3: ref v30,
+                            inst4: ref v31,
+                            result: v32,
+                        } => {
+                            let v6 = C::emit(ctx, v1);
+                            let v7 = C::emit(ctx, v3);
+                            let v33 = C::emit(ctx, v28);
+                            let v34 = C::emit(ctx, v29);
+                            let v35 = C::emit(ctx, v30);
+                            let v36 = C::emit(ctx, v31);
+                            let v37 = C::value_regs_get(ctx, v32, 0x0);
+                            let v38 = C::value_regs_get(ctx, v32, 0x1);
+                            let v39 = MultiReg::Two { a: v37, b: v38 };
+                            // Rule at src/prelude_lower.isle line 601.
+                            return v39;
+                        }
+                        _ => {}
+                    }
+                }
+                &ConsumesAndProducesFlags::ReturnsReg {
+                    inst: ref v47,
+                    result: v48,
+                } => {
+                    match arg2 {
+                        &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v5 } => {
+                            let v6 = C::emit(ctx, v1);
+                            let v49 = C::emit(ctx, v47);
+                            let v8 = C::emit(ctx, v5);
+                            let v50 = MultiReg::One { a: v48 };
+                            // Rule at src/prelude_lower.isle line 661.
+                            return v50;
+                        }
+                        &ConsumesFlags::ConsumesFlagsSideEffect2 {
+                            inst1: ref v10,
+                            inst2: ref v11,
+                        } => {
+                            let v6 = C::emit(ctx, v1);
+                            let v49 = C::emit(ctx, v47);
+                            let v12 = C::emit(ctx, v10);
+                            let v13 = C::emit(ctx, v11);
+                            let v50 = MultiReg::One { a: v48 };
+                            // Rule at src/prelude_lower.isle line 669.
+                            return v50;
+                        }
+                        &ConsumesFlags::ConsumesFlagsReturnsReg {
+                            inst: ref v14,
+                            result: v15,
+                        } => {
+                            let v6 = C::emit(ctx, v1);
+                            let v49 = C::emit(ctx, v47);
+                            let v16 = C::emit(ctx, v14);
+                            let v51 = MultiReg::Two { a: v48, b: v15 };
+                            // Rule at src/prelude_lower.isle line 678.
+                            return v51;
+                        }
+                        &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
+                            inst1: ref v18,
+                            inst2: ref v19,
+                            result: v20,
+                        } => {
+                            let v6 = C::emit(ctx, v1);
+                            let v49 = C::emit(ctx, v47);
+                            let v21 = C::emit(ctx, v18);
+                            let v22 = C::emit(ctx, v19);
+                            let v24 = C::value_regs_get(ctx, v20, 0x0);
+                            let v26 = C::value_regs_get(ctx, v20, 0x1);
+                            let v52 = MultiReg::Three {
+                                a: v48,
+                                b: v24,
+                                c: v26,
+                            };
+                            // Rule at src/prelude_lower.isle line 686.
+                            return v52;
+                        }
+                        &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
+                            inst1: ref v28,
+                            inst2: ref v29,
+                            inst3: ref v30,
+                            inst4: ref v31,
+                            result: v32,
+                        } => {
+                            let v6 = C::emit(ctx, v1);
+                            let v49 = C::emit(ctx, v47);
+                            let v33 = C::emit(ctx, v28);
+                            let v34 = C::emit(ctx, v29);
+                            let v35 = C::emit(ctx, v30);
+                            let v36 = C::emit(ctx, v31);
+                            let v37 = C::value_regs_get(ctx, v32, 0x0);
+                            let v38 = C::value_regs_get(ctx, v32, 0x1);
+                            let v53 = MultiReg::Three {
+                                a: v48,
+                                b: v37,
+                                c: v38,
+                            };
+                            // Rule at src/prelude_lower.isle line 695.
+                            return v53;
+                        }
+                        _ => {}
+                    }
+                }
+                _ => {}
+            }
+        }
+        &ProducesFlags::ProducesFlagsReturnsReg {
+            inst: ref v40,
+            result: v41,
+        } => {
+            match arg1 {
+                &ConsumesAndProducesFlags::SideEffect { inst: ref v3 } => {
+                    match arg2 {
+                        &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v5 } => {
+                            let v42 = C::emit(ctx, v40);
+                            let v7 = C::emit(ctx, v3);
+                            let v8 = C::emit(ctx, v5);
+                            let v43 = MultiReg::One { a: v41 };
+                            // Rule at src/prelude_lower.isle line 614.
+                            return v43;
+                        }
+                        &ConsumesFlags::ConsumesFlagsSideEffect2 {
+                            inst1: ref v10,
+                            inst2: ref v11,
+                        } => {
+                            let v42 = C::emit(ctx, v40);
+                            let v7 = C::emit(ctx, v3);
+                            let v12 = C::emit(ctx, v10);
+                            let v13 = C::emit(ctx, v11);
+                            let v43 = MultiReg::One { a: v41 };
+                            // Rule at src/prelude_lower.isle line 622.
+                            return v43;
+                        }
+                        &ConsumesFlags::ConsumesFlagsReturnsReg {
+                            inst: ref v14,
+                            result: v15,
+                        } => {
+                            let v42 = C::emit(ctx, v40);
+                            let v7 = C::emit(ctx, v3);
+                            let v16 = C::emit(ctx, v14);
+                            let v44 = MultiReg::Two { a: v41, b: v15 };
+                            // Rule at src/prelude_lower.isle line 631.
+                            return v44;
+                        }
+                        &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
+                            inst1: ref v18,
+                            inst2: ref v19,
+                            result: v20,
+                        } => {
+                            let v42 = C::emit(ctx, v40);
+                            let v7 = C::emit(ctx, v3);
+                            let v21 = C::emit(ctx, v18);
+                            let v22 = C::emit(ctx, v19);
+                            let v24 = C::value_regs_get(ctx, v20, 0x0);
+                            let v26 = C::value_regs_get(ctx, v20, 0x1);
+                            let v45 = MultiReg::Three {
+                                a: v41,
+                                b: v24,
+                                c: v26,
+                            };
+                            // Rule at src/prelude_lower.isle line 639.
+                            return v45;
+                        }
+                        &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
+                            inst1: ref v28,
+                            inst2: ref v29,
+                            inst3: ref v30,
+                            inst4: ref v31,
+                            result: v32,
+                        } => {
+                            let v42 = C::emit(ctx, v40);
+                            let v7 = C::emit(ctx, v3);
+                            let v33 = C::emit(ctx, v28);
+                            let v34 = C::emit(ctx, v29);
+                            let v35 = C::emit(ctx, v30);
+                            let v36 = C::emit(ctx, v31);
+                            let v37 = C::value_regs_get(ctx, v32, 0x0);
+                            let v38 = C::value_regs_get(ctx, v32, 0x1);
+                            let v46 = MultiReg::Three {
+                                a: v41,
+                                b: v37,
+                                c: v38,
+                            };
+                            // Rule at src/prelude_lower.isle line 648.
+                            return v46;
+                        }
+                        _ => {}
+                    }
+                }
+                &ConsumesAndProducesFlags::ReturnsReg {
+                    inst: ref v47,
+                    result: v48,
+                } => {
+                    match arg2 {
+                        &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v5 } => {
+                            let v42 = C::emit(ctx, v40);
+                            let v49 = C::emit(ctx, v47);
+                            let v8 = C::emit(ctx, v5);
+                            let v54 = MultiReg::Two { a: v41, b: v48 };
+                            // Rule at src/prelude_lower.isle line 708.
+                            return v54;
+                        }
+                        &ConsumesFlags::ConsumesFlagsSideEffect2 {
+                            inst1: ref v10,
+                            inst2: ref v11,
+                        } => {
+                            let v42 = C::emit(ctx, v40);
+                            let v49 = C::emit(ctx, v47);
+                            let v12 = C::emit(ctx, v10);
+                            let v13 = C::emit(ctx, v11);
+                            let v54 = MultiReg::Two { a: v41, b: v48 };
+                            // Rule at src/prelude_lower.isle line 716.
+                            return v54;
+                        }
+                        &ConsumesFlags::ConsumesFlagsReturnsReg {
+                            inst: ref v14,
+                            result: v15,
+                        } => {
+                            let v42 = C::emit(ctx, v40);
+                            let v49 = C::emit(ctx, v47);
+                            let v16 = C::emit(ctx, v14);
+                            let v55 = MultiReg::Three {
+                                a: v41,
+                                b: v48,
+                                c: v15,
+                            };
+                            // Rule at src/prelude_lower.isle line 725.
+                            return v55;
+                        }
+                        &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
+                            inst1: ref v18,
+                            inst2: ref v19,
+                            result: v20,
+                        } => {
+                            let v42 = C::emit(ctx, v40);
+                            let v49 = C::emit(ctx, v47);
+                            let v21 = C::emit(ctx, v18);
+                            let v22 = C::emit(ctx, v19);
+                            let v24 = C::value_regs_get(ctx, v20, 0x0);
+                            let v26 = C::value_regs_get(ctx, v20, 0x1);
+                            let v56 = MultiReg::Four {
+                                a: v41,
+                                b: v48,
+                                c: v24,
+                                d: v26,
+                            };
+                            // Rule at src/prelude_lower.isle line 733.
+                            return v56;
+                        }
+                        &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
+                            inst1: ref v28,
+                            inst2: ref v29,
+                            inst3: ref v30,
+                            inst4: ref v31,
+                            result: v32,
+                        } => {
+                            let v42 = C::emit(ctx, v40);
+                            let v49 = C::emit(ctx, v47);
+                            let v33 = C::emit(ctx, v28);
+                            let v34 = C::emit(ctx, v29);
+                            let v35 = C::emit(ctx, v30);
+                            let v36 = C::emit(ctx, v31);
+                            let v37 = C::value_regs_get(ctx, v32, 0x0);
+                            let v38 = C::value_regs_get(ctx, v32, 0x1);
+                            let v57 = MultiReg::Four {
+                                a: v41,
+                                b: v48,
+                                c: v37,
+                                d: v38,
+                            };
+                            // Rule at src/prelude_lower.isle line 742.
+                            return v57;
+                        }
+                        _ => {}
+                    }
+                }
+                _ => {}
+            }
+        }
+        &ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
+            inst: ref v58,
+            result: v59,
+        } => {
+            if let &ConsumesAndProducesFlags::ReturnsReg {
+                inst: ref v47,
+                result: v48,
+            } = arg1
+            {
+                match arg2 {
+                    &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v5 } => {
+                        let v60 = C::emit(ctx, v58);
+                        let v49 = C::emit(ctx, v47);
+                        let v8 = C::emit(ctx, v5);
+                        let v61 = MultiReg::Two { a: v59, b: v48 };
+                        // Rule at src/prelude_lower.isle line 754.
+                        return v61;
+                    }
+                    &ConsumesFlags::ConsumesFlagsSideEffect2 {
+                        inst1: ref v10,
+                        inst2: ref v11,
+                    } => {
+                        let v60 = C::emit(ctx, v58);
+                        let v49 = C::emit(ctx, v47);
+                        let v12 = C::emit(ctx, v10);
+                        let v13 = C::emit(ctx, v11);
+                        let v61 = MultiReg::Two { a: v59, b: v48 };
+                        // Rule at src/prelude_lower.isle line 762.
+                        return v61;
+                    }
+                    &ConsumesFlags::ConsumesFlagsReturnsResultWithProducer {
+                        inst: ref v63,
+                        result: v64,
+                    } => {
+                        let v60 = C::emit(ctx, v58);
+                        let v49 = C::emit(ctx, v47);
+                        let v65 = C::emit(ctx, v63);
+                        let v66 = MultiReg::Three {
+                            a: v59,
+                            b: v48,
+                            c: v64,
+                        };
+                        // Rule at src/prelude_lower.isle line 779.
+                        return v66;
+                    }
+                    &ConsumesFlags::ConsumesFlagsReturnsReg {
+                        inst: ref v14,
+                        result: v15,
+                    } => {
+                        let v60 = C::emit(ctx, v58);
+                        let v49 = C::emit(ctx, v47);
+                        let v16 = C::emit(ctx, v14);
+                        let v62 = MultiReg::Three {
+                            a: v59,
+                            b: v48,
+                            c: v15,
+                        };
+                        // Rule at src/prelude_lower.isle line 771.
+                        return v62;
+                    }
+                    &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
+                        inst1: ref v18,
+                        inst2: ref v19,
+                        result: v20,
+                    } => {
+                        let v60 = C::emit(ctx, v58);
+                        let v49 = C::emit(ctx, v47);
+                        let v21 = C::emit(ctx, v18);
+                        let v22 = C::emit(ctx, v19);
+                        let v24 = C::value_regs_get(ctx, v20, 0x0);
+                        let v26 = C::value_regs_get(ctx, v20, 0x1);
+                        let v67 = MultiReg::Four {
+                            a: v59,
+                            b: v48,
+                            c: v24,
+                            d: v26,
+                        };
+                        // Rule at src/prelude_lower.isle line 787.
+                        return v67;
+                    }
+                    &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
+                        inst1: ref v28,
+                        inst2: ref v29,
+                        inst3: ref v30,
+                        inst4: ref v31,
+                        result: v32,
+                    } => {
+                        let v60 = C::emit(ctx, v58);
+                        let v49 = C::emit(ctx, v47);
+                        let v33 = C::emit(ctx, v28);
+                        let v34 = C::emit(ctx, v29);
+                        let v35 = C::emit(ctx, v30);
+                        let v36 = C::emit(ctx, v31);
+                        let v37 = C::value_regs_get(ctx, v32, 0x0);
+                        let v38 = C::value_regs_get(ctx, v32, 0x1);
+                        let v68 = MultiReg::Four {
+                            a: v59,
+                            b: v48,
+                            c: v37,
+                            d: v38,
+                        };
+                        // Rule at src/prelude_lower.isle line 796.
+                        return v68;
+                    }
+                    _ => {}
+                }
+            }
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "with_flags_chained", "src/prelude_lower.isle line 564"
+    )
+}
+
+// Generated as internal constructor for term lower_return.
+pub fn constructor_lower_return<C: Context>(ctx: &mut C, arg0: ValueSlice) -> InstOutput {
+    let v1 = C::gen_return(ctx, arg0);
+    let v2 = C::output_none(ctx);
+    // Rule at src/prelude_lower.isle line 996.
+    return v2;
+}
+
+// Generated as internal constructor for term put_in_xreg.
+pub fn constructor_put_in_xreg<C: Context>(ctx: &mut C, arg0: Value) -> XReg {
+    let v1 = C::put_in_reg(ctx, arg0);
+    let v2 = C::xreg_new(ctx, v1);
+    // Rule at src/isa/riscv64/inst.isle line 778.
+    return v2;
+}
+
+// Generated as internal constructor for term output_xreg.
+pub fn constructor_output_xreg<C: Context>(ctx: &mut C, arg0: XReg) -> InstOutput {
+    let v1 = C::xreg_to_reg(ctx, arg0);
+    let v2 = constructor_output_reg(ctx, v1);
+    // Rule at src/isa/riscv64/inst.isle line 783.
+    return v2;
+}
+
+// Generated as internal constructor for term writable_xreg_to_reg.
+pub fn constructor_writable_xreg_to_reg<C: Context>(ctx: &mut C, arg0: WritableXReg) -> Reg {
+    let v1 = C::writable_xreg_to_writable_reg(ctx, arg0);
+    let v2 = C::writable_reg_to_reg(ctx, v1);
+    // Rule at src/isa/riscv64/inst.isle line 798.
+    return v2;
+}
+
+// Generated as internal constructor for term xreg_to_value_regs.
+pub fn constructor_xreg_to_value_regs<C: Context>(ctx: &mut C, arg0: XReg) -> ValueRegs {
+    let v1 = C::xreg_to_reg(ctx, arg0);
+    let v2 = C::value_reg(ctx, v1);
+    // Rule at src/isa/riscv64/inst.isle line 808.
+    return v2;
+}
+
+// Generated as internal constructor for term writable_xreg_to_value_regs.
+pub fn constructor_writable_xreg_to_value_regs<C: Context>(
+    ctx: &mut C,
+    arg0: WritableXReg,
+) -> ValueRegs {
+    let v1 = constructor_writable_xreg_to_reg(ctx, arg0);
+    let v2 = C::value_reg(ctx, v1);
+    // Rule at src/isa/riscv64/inst.isle line 813.
+    return v2;
+}
+
+// Generated as internal constructor for term temp_writable_xreg.
+pub fn constructor_temp_writable_xreg<C: Context>(ctx: &mut C) -> WritableXReg {
+    let v1 = C::temp_writable_reg(ctx, I64);
+    let v2 = C::writable_xreg_new(ctx, v1);
+    // Rule at src/isa/riscv64/inst.isle line 818.
+    return v2;
+}
+
+// Generated as internal constructor for term put_in_freg.
+pub fn constructor_put_in_freg<C: Context>(ctx: &mut C, arg0: Value) -> FReg {
+    let v1 = C::put_in_reg(ctx, arg0);
+    let v2 = C::freg_new(ctx, v1);
+    // Rule at src/isa/riscv64/inst.isle line 839.
+    return v2;
+}
+
+// Generated as internal constructor for term output_freg.
+pub fn constructor_output_freg<C: Context>(ctx: &mut C, arg0: FReg) -> InstOutput {
+    let v1 = C::freg_to_reg(ctx, arg0);
+    let v2 = constructor_output_reg(ctx, v1);
+    // Rule at src/isa/riscv64/inst.isle line 844.
+    return v2;
+}
+
+// Generated as internal constructor for term writable_freg_to_reg.
+pub fn constructor_writable_freg_to_reg<C: Context>(ctx: &mut C, arg0: WritableFReg) -> Reg {
+    let v1 = C::writable_freg_to_writable_reg(ctx, arg0);
+    let v2 = C::writable_reg_to_reg(ctx, v1);
+    // Rule at src/isa/riscv64/inst.isle line 859.
+    return v2;
+}
+
+// Generated as internal constructor for term freg_to_value_regs.
+pub fn constructor_freg_to_value_regs<C: Context>(ctx: &mut C, arg0: FReg) -> ValueRegs {
+    let v1 = C::freg_to_reg(ctx, arg0);
+    let v2 = C::value_reg(ctx, v1);
+    // Rule at src/isa/riscv64/inst.isle line 869.
+    return v2;
+}
+
+// Generated as internal constructor for term writable_freg_to_value_regs.
+pub fn constructor_writable_freg_to_value_regs<C: Context>(
+    ctx: &mut C,
+    arg0: WritableFReg,
+) -> ValueRegs {
+    let v1 = constructor_writable_freg_to_reg(ctx, arg0);
+    let v2 = C::value_reg(ctx, v1);
+    // Rule at src/isa/riscv64/inst.isle line 874.
+    return v2;
+}
+
+// Generated as internal constructor for term temp_writable_freg.
+pub fn constructor_temp_writable_freg<C: Context>(ctx: &mut C) -> WritableFReg {
+    let v1 = C::temp_writable_reg(ctx, F64);
+    let v2 = C::writable_freg_new(ctx, v1);
+    // Rule at src/isa/riscv64/inst.isle line 879.
+    return v2;
+}
+
+// Generated as internal constructor for term put_in_vreg.
+pub fn constructor_put_in_vreg<C: Context>(ctx: &mut C, arg0: Value) -> VReg {
+    let v1 = C::put_in_reg(ctx, arg0);
+    let v2 = C::vreg_new(ctx, v1);
+    // Rule at src/isa/riscv64/inst.isle line 901.
+    return v2;
+}
+
+// Generated as internal constructor for term output_vreg.
+pub fn constructor_output_vreg<C: Context>(ctx: &mut C, arg0: VReg) -> InstOutput {
+    let v1 = C::vreg_to_reg(ctx, arg0);
+    let v2 = constructor_output_reg(ctx, v1);
+    // Rule at src/isa/riscv64/inst.isle line 906.
+    return v2;
+}
+
+// Generated as internal constructor for term writable_vreg_to_reg.
+pub fn constructor_writable_vreg_to_reg<C: Context>(ctx: &mut C, arg0: WritableVReg) -> Reg {
+    let v1 = C::writable_vreg_to_writable_reg(ctx, arg0);
+    let v2 = C::writable_reg_to_reg(ctx, v1);
+    // Rule at src/isa/riscv64/inst.isle line 921.
+    return v2;
+}
+
+// Generated as internal constructor for term vreg_to_value_regs.
+pub fn constructor_vreg_to_value_regs<C: Context>(ctx: &mut C, arg0: VReg) -> ValueRegs {
+    let v1 = C::vreg_to_reg(ctx, arg0);
+    let v2 = C::value_reg(ctx, v1);
+    // Rule at src/isa/riscv64/inst.isle line 931.
+    return v2;
+}
+
+// Generated as internal constructor for term writable_vreg_to_value_regs.
+pub fn constructor_writable_vreg_to_value_regs<C: Context>(
+    ctx: &mut C,
+    arg0: WritableVReg,
+) -> ValueRegs {
+    let v1 = constructor_writable_vreg_to_reg(ctx, arg0);
+    let v2 = C::value_reg(ctx, v1);
+    // Rule at src/isa/riscv64/inst.isle line 936.
+    return v2;
+}
+
+// Generated as internal constructor for term temp_writable_vreg.
+pub fn constructor_temp_writable_vreg<C: Context>(ctx: &mut C) -> WritableVReg {
+    let v1 = C::temp_writable_reg(ctx, I8X16);
+    let v2 = C::writable_vreg_new(ctx, v1);
+    // Rule at src/isa/riscv64/inst.isle line 941.
+    return v2;
+}
+
+// Generated as internal constructor for term gen_float_round.
+pub fn constructor_gen_float_round<C: Context>(
+    ctx: &mut C,
+    arg0: &FloatRoundOP,
+    arg1: Reg,
+    arg2: Type,
+) -> Reg {
+    let v3 = C::temp_writable_reg(ctx, arg2);
+    let v4 = constructor_temp_writable_xreg(ctx);
+    let v5 = constructor_temp_writable_freg(ctx);
+    let v6 = C::writable_xreg_to_writable_reg(ctx, v4);
+    let v7 = C::writable_freg_to_writable_reg(ctx, v5);
+    let v8 = MInst::FloatRound {
+        op: arg0.clone(),
+        rd: v3,
+        int_tmp: v6,
+        f_tmp: v7,
+        rs: arg1,
+        ty: arg2,
+    };
+    let v9 = C::emit(ctx, &v8);
+    let v10 = C::writable_reg_to_reg(ctx, v3);
+    // Rule at src/isa/riscv64/inst.isle line 972.
+    return v10;
+}
+
+// Generated as internal constructor for term gen_float_select_pseudo.
+pub fn constructor_gen_float_select_pseudo<C: Context>(
+    ctx: &mut C,
+    arg0: &FloatSelectOP,
+    arg1: Reg,
+    arg2: Reg,
+    arg3: Type,
+) -> Reg {
+    let v4 = C::temp_writable_reg(ctx, arg3);
+    let v5 = constructor_temp_writable_xreg(ctx);
+    let v6 = C::writable_xreg_to_writable_reg(ctx, v5);
+    let v7 = MInst::FloatSelectPseudo {
+        op: arg0.clone(),
+        rd: v4,
+        tmp: v6,
+        rs1: arg1,
+        rs2: arg2,
+        ty: arg3,
+    };
+    let v8 = C::emit(ctx, &v7);
+    let v9 = C::writable_reg_to_reg(ctx, v4);
+    // Rule at src/isa/riscv64/inst.isle line 982.
+    return v9;
+}
+
+// Generated as internal constructor for term gen_float_select.
+pub fn constructor_gen_float_select<C: Context>(
+    ctx: &mut C,
+    arg0: &FloatSelectOP,
+    arg1: Reg,
+    arg2: Reg,
+    arg3: Type,
+) -> Reg {
+    let v4 = C::temp_writable_reg(ctx, arg3);
+    let v5 = constructor_temp_writable_xreg(ctx);
+    let v6 = C::writable_xreg_to_writable_reg(ctx, v5);
+    let v7 = MInst::FloatSelect {
+        op: arg0.clone(),
+        rd: v4,
+        tmp: v6,
+        rs1: arg1,
+        rs2: arg2,
+        ty: arg3,
+    };
+    let v8 = C::emit(ctx, &v7);
+    let v9 = C::writable_reg_to_reg(ctx, v4);
+    // Rule at src/isa/riscv64/inst.isle line 991.
+    return v9;
+}
+
+// Generated as internal constructor for term rv_add.
+pub fn constructor_rv_add<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
+    let v3 = C::xreg_to_reg(ctx, arg0);
+    let v4 = C::xreg_to_reg(ctx, arg1);
+    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Add, v3, v4);
+    let v6 = C::xreg_new(ctx, v5);
+    // Rule at src/isa/riscv64/inst.isle line 1006.
+    return v6;
+}
+
+// Generated as internal constructor for term rv_addi.
+pub fn constructor_rv_addi<C: Context>(ctx: &mut C, arg0: XReg, arg1: Imm12) -> XReg {
+    let v3 = C::xreg_to_reg(ctx, arg0);
+    let v4 = constructor_alu_rr_imm12(ctx, &AluOPRRI::Addi, v3, arg1);
+    let v5 = C::xreg_new(ctx, v4);
+    // Rule at src/isa/riscv64/inst.isle line 1012.
+    return v5;
+}
+
+// Generated as internal constructor for term rv_sub.
+pub fn constructor_rv_sub<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
+    let v3 = C::xreg_to_reg(ctx, arg0);
+    let v4 = C::xreg_to_reg(ctx, arg1);
+    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Sub, v3, v4);
+    let v6 = C::xreg_new(ctx, v5);
+    // Rule at src/isa/riscv64/inst.isle line 1018.
+    return v6;
+}
+
+// Generated as internal constructor for term rv_neg.
+pub fn constructor_rv_neg<C: Context>(ctx: &mut C, arg0: XReg) -> XReg {
+    let v2 = C::zero_reg(ctx);
+    let v3 = C::xreg_to_reg(ctx, arg0);
+    let v4 = constructor_alu_rrr(ctx, &AluOPRRR::Sub, v2, v3);
+    let v5 = C::xreg_new(ctx, v4);
+    // Rule at src/isa/riscv64/inst.isle line 1024.
+    return v5;
+}
+
+// Generated as internal constructor for term rv_sll.
+pub fn constructor_rv_sll<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
+    let v3 = C::xreg_to_reg(ctx, arg0);
+    let v4 = C::xreg_to_reg(ctx, arg1);
+    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Sll, v3, v4);
+    let v6 = C::xreg_new(ctx, v5);
+    // Rule at src/isa/riscv64/inst.isle line 1030.
+    return v6;
+}
+
+// Generated as internal constructor for term rv_slli.
+pub fn constructor_rv_slli<C: Context>(ctx: &mut C, arg0: XReg, arg1: Imm12) -> XReg {
+    let v3 = C::xreg_to_reg(ctx, arg0);
+    let v4 = constructor_alu_rr_imm12(ctx, &AluOPRRI::Slli, v3, arg1);
+    let v5 = C::xreg_new(ctx, v4);
+    // Rule at src/isa/riscv64/inst.isle line 1036.
+    return v5;
+}
+
+// Generated as internal constructor for term rv_srl.
+pub fn constructor_rv_srl<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
+    let v3 = C::xreg_to_reg(ctx, arg0);
+    let v4 = C::xreg_to_reg(ctx, arg1);
+    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Srl, v3, v4);
+    let v6 = C::xreg_new(ctx, v5);
+    // Rule at src/isa/riscv64/inst.isle line 1042.
+    return v6;
+}
+
+// Generated as internal constructor for term rv_srli.
+pub fn constructor_rv_srli<C: Context>(ctx: &mut C, arg0: XReg, arg1: Imm12) -> XReg {
+    let v3 = C::xreg_to_reg(ctx, arg0);
+    let v4 = constructor_alu_rr_imm12(ctx, &AluOPRRI::Srli, v3, arg1);
+    let v5 = C::xreg_new(ctx, v4);
+    // Rule at src/isa/riscv64/inst.isle line 1048.
+    return v5;
+}
+
+// Generated as internal constructor for term rv_sra.
+pub fn constructor_rv_sra<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
+    let v3 = C::xreg_to_reg(ctx, arg0);
+    let v4 = C::xreg_to_reg(ctx, arg1);
+    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Sra, v3, v4);
+    let v6 = C::xreg_new(ctx, v5);
+    // Rule at src/isa/riscv64/inst.isle line 1054.
+    return v6;
+}
+
+// Generated as internal constructor for term rv_srai.
+pub fn constructor_rv_srai<C: Context>(ctx: &mut C, arg0: XReg, arg1: Imm12) -> XReg {
+    let v3 = C::xreg_to_reg(ctx, arg0);
+    let v4 = constructor_alu_rr_imm12(ctx, &AluOPRRI::Srai, v3, arg1);
+    let v5 = C::xreg_new(ctx, v4);
+    // Rule at src/isa/riscv64/inst.isle line 1060.
+    return v5;
+}
+
+// Generated as internal constructor for term rv_or.
+pub fn constructor_rv_or<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
+    let v3 = C::xreg_to_reg(ctx, arg0);
+    let v4 = C::xreg_to_reg(ctx, arg1);
+    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Or, v3, v4);
+    let v6 = C::xreg_new(ctx, v5);
+    // Rule at src/isa/riscv64/inst.isle line 1066.
+    return v6;
+}
+
+// Generated as internal constructor for term rv_ori.
+pub fn constructor_rv_ori<C: Context>(ctx: &mut C, arg0: XReg, arg1: Imm12) -> XReg {
+    let v3 = C::xreg_to_reg(ctx, arg0);
+    let v4 = constructor_alu_rr_imm12(ctx, &AluOPRRI::Ori, v3, arg1);
+    let v5 = C::xreg_new(ctx, v4);
+    // Rule at src/isa/riscv64/inst.isle line 1072.
+    return v5;
+}
+
+// Generated as internal constructor for term rv_xor.
+pub fn constructor_rv_xor<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
+    let v3 = C::xreg_to_reg(ctx, arg0);
+    let v4 = C::xreg_to_reg(ctx, arg1);
+    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Xor, v3, v4);
+    let v6 = C::xreg_new(ctx, v5);
+    // Rule at src/isa/riscv64/inst.isle line 1078.
+    return v6;
+}
+
+// Generated as internal constructor for term rv_xori.
+pub fn constructor_rv_xori<C: Context>(ctx: &mut C, arg0: XReg, arg1: Imm12) -> XReg {
+    let v3 = C::xreg_to_reg(ctx, arg0);
+    let v4 = constructor_alu_rr_imm12(ctx, &AluOPRRI::Xori, v3, arg1);
+    let v5 = C::xreg_new(ctx, v4);
+    // Rule at src/isa/riscv64/inst.isle line 1084.
+    return v5;
+}
+
+// Generated as internal constructor for term rv_not.
+pub fn constructor_rv_not<C: Context>(ctx: &mut C, arg0: XReg) -> XReg {
+    let v2 = C::imm12_const(ctx, -0x1);
+    let v3 = constructor_rv_xori(ctx, arg0, v2);
+    // Rule at src/isa/riscv64/inst.isle line 1090.
+    return v3;
+}
+
+// Generated as internal constructor for term rv_and.
+pub fn constructor_rv_and<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
+    let v3 = C::xreg_to_reg(ctx, arg0);
+    let v4 = C::xreg_to_reg(ctx, arg1);
+    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::And, v3, v4);
+    let v6 = C::xreg_new(ctx, v5);
+    // Rule at src/isa/riscv64/inst.isle line 1096.
+    return v6;
+}
+
+// Generated as internal constructor for term rv_andi.
+pub fn constructor_rv_andi<C: Context>(ctx: &mut C, arg0: XReg, arg1: Imm12) -> XReg {
+    let v3 = C::xreg_to_reg(ctx, arg0);
+    let v4 = constructor_alu_rr_imm12(ctx, &AluOPRRI::Andi, v3, arg1);
+    let v5 = C::xreg_new(ctx, v4);
+    // Rule at src/isa/riscv64/inst.isle line 1102.
+    return v5;
+}
+
+// Generated as internal constructor for term rv_sltu.
+pub fn constructor_rv_sltu<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
+    let v3 = C::xreg_to_reg(ctx, arg0);
+    let v4 = C::xreg_to_reg(ctx, arg1);
+    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::SltU, v3, v4);
+    let v6 = C::xreg_new(ctx, v5);
+    // Rule at src/isa/riscv64/inst.isle line 1108.
+    return v6;
+}
+
+// Generated as internal constructor for term rv_snez.
+pub fn constructor_rv_snez<C: Context>(ctx: &mut C, arg0: XReg) -> XReg {
+    let v1 = C::zero_reg(ctx);
+    let v2 = C::xreg_new(ctx, v1);
+    let v3 = constructor_rv_sltu(ctx, v2, arg0);
+    // Rule at src/isa/riscv64/inst.isle line 1114.
+    return v3;
+}
+
+// Generated as internal constructor for term rv_sltiu.
+pub fn constructor_rv_sltiu<C: Context>(ctx: &mut C, arg0: XReg, arg1: Imm12) -> XReg {
+    let v3 = C::xreg_to_reg(ctx, arg0);
+    let v4 = constructor_alu_rr_imm12(ctx, &AluOPRRI::SltiU, v3, arg1);
+    let v5 = C::xreg_new(ctx, v4);
+    // Rule at src/isa/riscv64/inst.isle line 1120.
+    return v5;
+}
+
+// Generated as internal constructor for term rv_seqz.
+pub fn constructor_rv_seqz<C: Context>(ctx: &mut C, arg0: XReg) -> XReg {
+    let v2 = C::imm12_const(ctx, 0x1);
+    let v3 = constructor_rv_sltiu(ctx, arg0, v2);
+    // Rule at src/isa/riscv64/inst.isle line 1126.
+    return v3;
+}
+
+// Generated as internal constructor for term rv_addw.
+pub fn constructor_rv_addw<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
+    let v3 = C::xreg_to_reg(ctx, arg0);
+    let v4 = C::xreg_to_reg(ctx, arg1);
+    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Addw, v3, v4);
+    let v6 = C::xreg_new(ctx, v5);
+    // Rule at src/isa/riscv64/inst.isle line 1136.
+    return v6;
+}
+
+// Generated as internal constructor for term rv_addiw.
+pub fn constructor_rv_addiw<C: Context>(ctx: &mut C, arg0: XReg, arg1: Imm12) -> XReg {
+    let v3 = C::xreg_to_reg(ctx, arg0);
+    let v4 = constructor_alu_rr_imm12(ctx, &AluOPRRI::Addiw, v3, arg1);
+    let v5 = C::xreg_new(ctx, v4);
+    // Rule at src/isa/riscv64/inst.isle line 1142.
+    return v5;
+}
+
+// Generated as internal constructor for term rv_sextw.
+pub fn constructor_rv_sextw<C: Context>(ctx: &mut C, arg0: XReg) -> XReg {
+    let v2 = C::imm12_const(ctx, 0x0);
+    let v3 = constructor_rv_addiw(ctx, arg0, v2);
+    // Rule at src/isa/riscv64/inst.isle line 1148.
+    return v3;
+}
+
+// Generated as internal constructor for term rv_subw.
+pub fn constructor_rv_subw<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
+    let v3 = C::xreg_to_reg(ctx, arg0);
+    let v4 = C::xreg_to_reg(ctx, arg1);
+    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Subw, v3, v4);
+    let v6 = C::xreg_new(ctx, v5);
+    // Rule at src/isa/riscv64/inst.isle line 1154.
+    return v6;
+}
+
+// Generated as internal constructor for term rv_sllw.
+pub fn constructor_rv_sllw<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
+    let v3 = C::xreg_to_reg(ctx, arg0);
+    let v4 = C::xreg_to_reg(ctx, arg1);
+    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Sllw, v3, v4);
+    let v6 = C::xreg_new(ctx, v5);
+    // Rule at src/isa/riscv64/inst.isle line 1160.
+    return v6;
+}
+
+// Generated as internal constructor for term rv_slliw.
+pub fn constructor_rv_slliw<C: Context>(ctx: &mut C, arg0: XReg, arg1: Imm12) -> XReg {
+    let v3 = C::xreg_to_reg(ctx, arg0);
+    let v4 = constructor_alu_rr_imm12(ctx, &AluOPRRI::Slliw, v3, arg1);
+    let v5 = C::xreg_new(ctx, v4);
+    // Rule at src/isa/riscv64/inst.isle line 1166.
+    return v5;
+}
+
+// Generated as internal constructor for term rv_srlw.
+pub fn constructor_rv_srlw<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
+    let v3 = C::xreg_to_reg(ctx, arg0);
+    let v4 = C::xreg_to_reg(ctx, arg1);
+    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Srlw, v3, v4);
+    let v6 = C::xreg_new(ctx, v5);
+    // Rule at src/isa/riscv64/inst.isle line 1172.
+    return v6;
+}
+
+// Generated as internal constructor for term rv_srliw.
+pub fn constructor_rv_srliw<C: Context>(ctx: &mut C, arg0: XReg, arg1: Imm12) -> XReg {
+    let v3 = C::xreg_to_reg(ctx, arg0);
+    let v4 = constructor_alu_rr_imm12(ctx, &AluOPRRI::SrliW, v3, arg1);
+    let v5 = C::xreg_new(ctx, v4);
+    // Rule at src/isa/riscv64/inst.isle line 1178.
+    return v5;
+}
+
+// Generated as internal constructor for term rv_sraw.
+pub fn constructor_rv_sraw<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
+    let v3 = C::xreg_to_reg(ctx, arg0);
+    let v4 = C::xreg_to_reg(ctx, arg1);
+    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Sraw, v3, v4);
+    let v6 = C::xreg_new(ctx, v5);
+    // Rule at src/isa/riscv64/inst.isle line 1184.
+    return v6;
+}
+
+// Generated as internal constructor for term rv_sraiw.
+pub fn constructor_rv_sraiw<C: Context>(ctx: &mut C, arg0: XReg, arg1: Imm12) -> XReg {
+    let v3 = C::xreg_to_reg(ctx, arg0);
+    let v4 = constructor_alu_rr_imm12(ctx, &AluOPRRI::Sraiw, v3, arg1);
+    let v5 = C::xreg_new(ctx, v4);
+    // Rule at src/isa/riscv64/inst.isle line 1190.
+    return v5;
+}
+
+// Generated as internal constructor for term rv_mul.
+pub fn constructor_rv_mul<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
+    let v3 = C::xreg_to_reg(ctx, arg0);
+    let v4 = C::xreg_to_reg(ctx, arg1);
+    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Mul, v3, v4);
+    let v6 = C::xreg_new(ctx, v5);
+    // Rule at src/isa/riscv64/inst.isle line 1200.
+    return v6;
+}
+
+// Generated as internal constructor for term rv_mulh.
+pub fn constructor_rv_mulh<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
+    let v3 = C::xreg_to_reg(ctx, arg0);
+    let v4 = C::xreg_to_reg(ctx, arg1);
+    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Mulh, v3, v4);
+    let v6 = C::xreg_new(ctx, v5);
+    // Rule at src/isa/riscv64/inst.isle line 1206.
+    return v6;
+}
+
+// Generated as internal constructor for term rv_mulhu.
+pub fn constructor_rv_mulhu<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
+    let v3 = C::xreg_to_reg(ctx, arg0);
+    let v4 = C::xreg_to_reg(ctx, arg1);
+    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Mulhu, v3, v4);
+    let v6 = C::xreg_new(ctx, v5);
+    // Rule at src/isa/riscv64/inst.isle line 1212.
+    return v6;
+}
+
+// Generated as internal constructor for term rv_div.
+pub fn constructor_rv_div<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
+    let v3 = C::xreg_to_reg(ctx, arg0);
+    let v4 = C::xreg_to_reg(ctx, arg1);
+    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Div, v3, v4);
+    let v6 = C::xreg_new(ctx, v5);
+    // Rule at src/isa/riscv64/inst.isle line 1218.
+    return v6;
+}
+
+// Generated as internal constructor for term rv_divu.
+pub fn constructor_rv_divu<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
+    let v3 = C::xreg_to_reg(ctx, arg0);
+    let v4 = C::xreg_to_reg(ctx, arg1);
+    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::DivU, v3, v4);
+    let v6 = C::xreg_new(ctx, v5);
+    // Rule at src/isa/riscv64/inst.isle line 1224.
+    return v6;
+}
+
+// Generated as internal constructor for term rv_rem.
+pub fn constructor_rv_rem<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
+    let v3 = C::xreg_to_reg(ctx, arg0);
+    let v4 = C::xreg_to_reg(ctx, arg1);
+    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Rem, v3, v4);
+    let v6 = C::xreg_new(ctx, v5);
+    // Rule at src/isa/riscv64/inst.isle line 1230.
+    return v6;
+}
+
+// Generated as internal constructor for term rv_remu.
+pub fn constructor_rv_remu<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
+    let v3 = C::xreg_to_reg(ctx, arg0);
+    let v4 = C::xreg_to_reg(ctx, arg1);
+    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::RemU, v3, v4);
+    let v6 = C::xreg_new(ctx, v5);
+    // Rule at src/isa/riscv64/inst.isle line 1236.
+    return v6;
+}
+
+// Generated as internal constructor for term rv_mulw.
+pub fn constructor_rv_mulw<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
+    let v3 = C::xreg_to_reg(ctx, arg0);
+    let v4 = C::xreg_to_reg(ctx, arg1);
+    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Mulw, v3, v4);
+    let v6 = C::xreg_new(ctx, v5);
+    // Rule at src/isa/riscv64/inst.isle line 1247.
+    return v6;
+}
+
+// Generated as internal constructor for term rv_divw.
+pub fn constructor_rv_divw<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
+    let v3 = C::xreg_to_reg(ctx, arg0);
+    let v4 = C::xreg_to_reg(ctx, arg1);
+    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Divw, v3, v4);
+    let v6 = C::xreg_new(ctx, v5);
+    // Rule at src/isa/riscv64/inst.isle line 1253.
+    return v6;
+}
+
+// Generated as internal constructor for term rv_divuw.
+pub fn constructor_rv_divuw<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
+    let v3 = C::xreg_to_reg(ctx, arg0);
+    let v4 = C::xreg_to_reg(ctx, arg1);
+    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Divuw, v3, v4);
+    let v6 = C::xreg_new(ctx, v5);
+    // Rule at src/isa/riscv64/inst.isle line 1259.
+    return v6;
+}
+
+// Generated as internal constructor for term rv_remw.
+pub fn constructor_rv_remw<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
+    let v3 = C::xreg_to_reg(ctx, arg0);
+    let v4 = C::xreg_to_reg(ctx, arg1);
+    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Remw, v3, v4);
+    let v6 = C::xreg_new(ctx, v5);
+    // Rule at src/isa/riscv64/inst.isle line 1265.
+    return v6;
+}
+
+// Generated as internal constructor for term rv_remuw.
+pub fn constructor_rv_remuw<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
+    let v3 = C::xreg_to_reg(ctx, arg0);
+    let v4 = C::xreg_to_reg(ctx, arg1);
+    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Remuw, v3, v4);
+    let v6 = C::xreg_new(ctx, v5);
+    // Rule at src/isa/riscv64/inst.isle line 1271.
+    return v6;
+}
+
+// Generated as internal constructor for term rv_fadd.
+pub fn constructor_rv_fadd<C: Context>(ctx: &mut C, arg0: Type, arg1: FReg, arg2: FReg) -> FReg {
+    match arg0 {
+        F32 => {
+            let v5 = C::freg_to_reg(ctx, arg1);
+            let v6 = C::freg_to_reg(ctx, arg2);
+            let v7 = constructor_fpu_rrr(ctx, &FpuOPRRR::FaddS, F32, v5, v6);
+            let v8 = C::freg_new(ctx, v7);
+            // Rule at src/isa/riscv64/inst.isle line 1280.
+            return v8;
+        }
+        F64 => {
+            let v5 = C::freg_to_reg(ctx, arg1);
+            let v6 = C::freg_to_reg(ctx, arg2);
+            let v11 = constructor_fpu_rrr(ctx, &FpuOPRRR::FaddD, F64, v5, v6);
+            let v12 = C::freg_new(ctx, v11);
+            // Rule at src/isa/riscv64/inst.isle line 1281.
+            return v12;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "rv_fadd", "src/isa/riscv64/inst.isle line 1279"
+    )
+}
+
+// Generated as internal constructor for term rv_fsub.
+pub fn constructor_rv_fsub<C: Context>(ctx: &mut C, arg0: Type, arg1: FReg, arg2: FReg) -> FReg {
+    match arg0 {
+        F32 => {
+            let v5 = C::freg_to_reg(ctx, arg1);
+            let v6 = C::freg_to_reg(ctx, arg2);
+            let v7 = constructor_fpu_rrr(ctx, &FpuOPRRR::FsubS, F32, v5, v6);
+            let v8 = C::freg_new(ctx, v7);
+            // Rule at src/isa/riscv64/inst.isle line 1285.
+            return v8;
+        }
+        F64 => {
+            let v5 = C::freg_to_reg(ctx, arg1);
+            let v6 = C::freg_to_reg(ctx, arg2);
+            let v11 = constructor_fpu_rrr(ctx, &FpuOPRRR::FsubD, F64, v5, v6);
+            let v12 = C::freg_new(ctx, v11);
+            // Rule at src/isa/riscv64/inst.isle line 1286.
+            return v12;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "rv_fsub", "src/isa/riscv64/inst.isle line 1284"
+    )
+}
+
+// Generated as internal constructor for term rv_fmul.
+pub fn constructor_rv_fmul<C: Context>(ctx: &mut C, arg0: Type, arg1: FReg, arg2: FReg) -> FReg {
+    match arg0 {
+        F32 => {
+            let v5 = C::freg_to_reg(ctx, arg1);
+            let v6 = C::freg_to_reg(ctx, arg2);
+            let v7 = constructor_fpu_rrr(ctx, &FpuOPRRR::FmulS, F32, v5, v6);
+            let v8 = C::freg_new(ctx, v7);
+            // Rule at src/isa/riscv64/inst.isle line 1290.
+            return v8;
+        }
+        F64 => {
+            let v5 = C::freg_to_reg(ctx, arg1);
+            let v6 = C::freg_to_reg(ctx, arg2);
+            let v11 = constructor_fpu_rrr(ctx, &FpuOPRRR::FmulD, F64, v5, v6);
+            let v12 = C::freg_new(ctx, v11);
+            // Rule at src/isa/riscv64/inst.isle line 1291.
+            return v12;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "rv_fmul", "src/isa/riscv64/inst.isle line 1289"
+    )
+}
+
+// Generated as internal constructor for term rv_fdiv.
+pub fn constructor_rv_fdiv<C: Context>(ctx: &mut C, arg0: Type, arg1: FReg, arg2: FReg) -> FReg {
+    match arg0 {
+        F32 => {
+            let v5 = C::freg_to_reg(ctx, arg1);
+            let v6 = C::freg_to_reg(ctx, arg2);
+            let v7 = constructor_fpu_rrr(ctx, &FpuOPRRR::FdivS, F32, v5, v6);
+            let v8 = C::freg_new(ctx, v7);
+            // Rule at src/isa/riscv64/inst.isle line 1295.
+            return v8;
+        }
+        F64 => {
+            let v5 = C::freg_to_reg(ctx, arg1);
+            let v6 = C::freg_to_reg(ctx, arg2);
+            let v11 = constructor_fpu_rrr(ctx, &FpuOPRRR::FdivD, F64, v5, v6);
+            let v12 = C::freg_new(ctx, v11);
+            // Rule at src/isa/riscv64/inst.isle line 1296.
+            return v12;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "rv_fdiv", "src/isa/riscv64/inst.isle line 1294"
+    )
+}
+
+// Generated as internal constructor for term rv_fsqrt.
+pub fn constructor_rv_fsqrt<C: Context>(ctx: &mut C, arg0: Type, arg1: FReg) -> FReg {
+    match arg0 {
+        F32 => {
+            let v4 = C::freg_to_reg(ctx, arg1);
+            let v5 = constructor_fpu_rr(ctx, &FpuOPRR::FsqrtS, F32, v4);
+            let v6 = C::freg_new(ctx, v5);
+            // Rule at src/isa/riscv64/inst.isle line 1300.
+            return v6;
+        }
+        F64 => {
+            let v4 = C::freg_to_reg(ctx, arg1);
+            let v9 = constructor_fpu_rr(ctx, &FpuOPRR::FsqrtD, F64, v4);
+            let v10 = C::freg_new(ctx, v9);
+            // Rule at src/isa/riscv64/inst.isle line 1301.
+            return v10;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "rv_fsqrt", "src/isa/riscv64/inst.isle line 1299"
+    )
+}
+
+// Generated as internal constructor for term rv_fmadd.
+pub fn constructor_rv_fmadd<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: FReg,
+    arg2: FReg,
+    arg3: FReg,
+) -> FReg {
+    match arg0 {
+        F32 => {
+            let v6 = C::freg_to_reg(ctx, arg1);
+            let v7 = C::freg_to_reg(ctx, arg2);
+            let v8 = C::freg_to_reg(ctx, arg3);
+            let v9 = constructor_fpu_rrrr(ctx, &FpuOPRRRR::FmaddS, F32, v6, v7, v8);
+            let v10 = C::freg_new(ctx, v9);
+            // Rule at src/isa/riscv64/inst.isle line 1305.
+            return v10;
+        }
+        F64 => {
+            let v6 = C::freg_to_reg(ctx, arg1);
+            let v7 = C::freg_to_reg(ctx, arg2);
+            let v8 = C::freg_to_reg(ctx, arg3);
+            let v13 = constructor_fpu_rrrr(ctx, &FpuOPRRRR::FmaddD, F64, v6, v7, v8);
+            let v14 = C::freg_new(ctx, v13);
+            // Rule at src/isa/riscv64/inst.isle line 1306.
+            return v14;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "rv_fmadd", "src/isa/riscv64/inst.isle line 1304"
+    )
+}
+
+// Generated as internal constructor for term rv_fmvxw.
+pub fn constructor_rv_fmvxw<C: Context>(ctx: &mut C, arg0: FReg) -> XReg {
+    let v3 = C::freg_to_reg(ctx, arg0);
+    let v4 = constructor_fpu_rr(ctx, &FpuOPRR::FmvXW, I32, v3);
+    let v5 = C::xreg_new(ctx, v4);
+    // Rule at src/isa/riscv64/inst.isle line 1310.
+    return v5;
+}
+
+// Generated as internal constructor for term rv_fmvxd.
+pub fn constructor_rv_fmvxd<C: Context>(ctx: &mut C, arg0: FReg) -> XReg {
+    let v3 = C::freg_to_reg(ctx, arg0);
+    let v4 = constructor_fpu_rr(ctx, &FpuOPRR::FmvXD, I64, v3);
+    let v5 = C::xreg_new(ctx, v4);
+    // Rule at src/isa/riscv64/inst.isle line 1314.
+    return v5;
+}
+
+// Generated as internal constructor for term rv_fmvwx.
+pub fn constructor_rv_fmvwx<C: Context>(ctx: &mut C, arg0: XReg) -> FReg {
+    let v3 = C::xreg_to_reg(ctx, arg0);
+    let v4 = constructor_fpu_rr(ctx, &FpuOPRR::FmvWX, F32, v3);
+    let v5 = C::freg_new(ctx, v4);
+    // Rule at src/isa/riscv64/inst.isle line 1318.
+    return v5;
+}
+
+// Generated as internal constructor for term rv_fmvdx.
+pub fn constructor_rv_fmvdx<C: Context>(ctx: &mut C, arg0: XReg) -> FReg {
+    let v3 = C::xreg_to_reg(ctx, arg0);
+    let v4 = constructor_fpu_rr(ctx, &FpuOPRR::FmvDX, F64, v3);
+    let v5 = C::freg_new(ctx, v4);
+    // Rule at src/isa/riscv64/inst.isle line 1322.
+    return v5;
+}
+
+// Generated as internal constructor for term rv_fcvtds.
+pub fn constructor_rv_fcvtds<C: Context>(ctx: &mut C, arg0: FReg) -> FReg {
+    let v3 = C::freg_to_reg(ctx, arg0);
+    let v4 = constructor_fpu_rr(ctx, &FpuOPRR::FcvtDS, F32, v3);
+    let v5 = C::freg_new(ctx, v4);
+    // Rule at src/isa/riscv64/inst.isle line 1326.
+    return v5;
+}
+
+// Generated as internal constructor for term rv_fcvtsd.
+pub fn constructor_rv_fcvtsd<C: Context>(ctx: &mut C, arg0: FReg) -> FReg {
+    let v3 = C::freg_to_reg(ctx, arg0);
+    let v4 = constructor_fpu_rr(ctx, &FpuOPRR::FcvtSD, F64, v3);
+    let v5 = C::freg_new(ctx, v4);
+    // Rule at src/isa/riscv64/inst.isle line 1330.
+    return v5;
+}
+
+// Generated as internal constructor for term rv_fsgnj.
+pub fn constructor_rv_fsgnj<C: Context>(ctx: &mut C, arg0: Type, arg1: FReg, arg2: FReg) -> FReg {
+    match arg0 {
+        F32 => {
+            let v5 = C::freg_to_reg(ctx, arg1);
+            let v6 = C::freg_to_reg(ctx, arg2);
+            let v7 = constructor_fpu_rrr(ctx, &FpuOPRRR::FsgnjS, F32, v5, v6);
+            let v8 = C::freg_new(ctx, v7);
+            // Rule at src/isa/riscv64/inst.isle line 1336.
+            return v8;
+        }
+        F64 => {
+            let v5 = C::freg_to_reg(ctx, arg1);
+            let v6 = C::freg_to_reg(ctx, arg2);
+            let v11 = constructor_fpu_rrr(ctx, &FpuOPRRR::FsgnjD, F64, v5, v6);
+            let v12 = C::freg_new(ctx, v11);
+            // Rule at src/isa/riscv64/inst.isle line 1337.
+            return v12;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "rv_fsgnj", "src/isa/riscv64/inst.isle line 1335"
+    )
+}
+
+// Generated as internal constructor for term rv_fsgnjn.
+pub fn constructor_rv_fsgnjn<C: Context>(ctx: &mut C, arg0: Type, arg1: FReg, arg2: FReg) -> FReg {
+    match arg0 {
+        F32 => {
+            let v5 = C::freg_to_reg(ctx, arg1);
+            let v6 = C::freg_to_reg(ctx, arg2);
+            let v7 = constructor_fpu_rrr(ctx, &FpuOPRRR::FsgnjnS, F32, v5, v6);
+            let v8 = C::freg_new(ctx, v7);
+            // Rule at src/isa/riscv64/inst.isle line 1343.
+            return v8;
+        }
+        F64 => {
+            let v5 = C::freg_to_reg(ctx, arg1);
+            let v6 = C::freg_to_reg(ctx, arg2);
+            let v11 = constructor_fpu_rrr(ctx, &FpuOPRRR::FsgnjnD, F64, v5, v6);
+            let v12 = C::freg_new(ctx, v11);
+            // Rule at src/isa/riscv64/inst.isle line 1344.
+            return v12;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "rv_fsgnjn", "src/isa/riscv64/inst.isle line 1342"
+    )
+}
+
+// Generated as internal constructor for term rv_fneg.
+pub fn constructor_rv_fneg<C: Context>(ctx: &mut C, arg0: Type, arg1: FReg) -> FReg {
+    let v2 = constructor_rv_fsgnjn(ctx, arg0, arg1, arg1);
+    // Rule at src/isa/riscv64/inst.isle line 1349.
+    return v2;
+}
+
+// Generated as internal constructor for term rv_fsgnjx.
+pub fn constructor_rv_fsgnjx<C: Context>(ctx: &mut C, arg0: Type, arg1: FReg, arg2: FReg) -> FReg {
+    match arg0 {
+        F32 => {
+            let v5 = C::freg_to_reg(ctx, arg1);
+            let v6 = C::freg_to_reg(ctx, arg2);
+            let v7 = constructor_fpu_rrr(ctx, &FpuOPRRR::FsgnjxS, F32, v5, v6);
+            let v8 = C::freg_new(ctx, v7);
+            // Rule at src/isa/riscv64/inst.isle line 1355.
+            return v8;
+        }
+        F64 => {
+            let v5 = C::freg_to_reg(ctx, arg1);
+            let v6 = C::freg_to_reg(ctx, arg2);
+            let v11 = constructor_fpu_rrr(ctx, &FpuOPRRR::FsgnjxD, F64, v5, v6);
+            let v12 = C::freg_new(ctx, v11);
+            // Rule at src/isa/riscv64/inst.isle line 1356.
+            return v12;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "rv_fsgnjx", "src/isa/riscv64/inst.isle line 1354"
+    )
+}
+
+// Generated as internal constructor for term rv_fabs.
+pub fn constructor_rv_fabs<C: Context>(ctx: &mut C, arg0: Type, arg1: FReg) -> FReg {
+    let v2 = constructor_rv_fsgnjx(ctx, arg0, arg1, arg1);
+    // Rule at src/isa/riscv64/inst.isle line 1361.
+    return v2;
+}
+
+// Generated as internal constructor for term rv_feq.
+pub fn constructor_rv_feq<C: Context>(ctx: &mut C, arg0: Type, arg1: FReg, arg2: FReg) -> XReg {
+    match arg0 {
+        F32 => {
+            let v5 = C::freg_to_reg(ctx, arg1);
+            let v6 = C::freg_to_reg(ctx, arg2);
+            let v7 = constructor_fpu_rrr(ctx, &FpuOPRRR::FeqS, I64, v5, v6);
+            let v8 = C::xreg_new(ctx, v7);
+            // Rule at src/isa/riscv64/inst.isle line 1365.
+            return v8;
+        }
+        F64 => {
+            let v5 = C::freg_to_reg(ctx, arg1);
+            let v6 = C::freg_to_reg(ctx, arg2);
+            let v10 = constructor_fpu_rrr(ctx, &FpuOPRRR::FeqD, I64, v5, v6);
+            let v11 = C::xreg_new(ctx, v10);
+            // Rule at src/isa/riscv64/inst.isle line 1366.
+            return v11;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "rv_feq", "src/isa/riscv64/inst.isle line 1364"
+    )
+}
+
+// Generated as internal constructor for term rv_flt.
+pub fn constructor_rv_flt<C: Context>(ctx: &mut C, arg0: Type, arg1: FReg, arg2: FReg) -> XReg {
+    match arg0 {
+        F32 => {
+            let v5 = C::freg_to_reg(ctx, arg1);
+            let v6 = C::freg_to_reg(ctx, arg2);
+            let v7 = constructor_fpu_rrr(ctx, &FpuOPRRR::FltS, I64, v5, v6);
+            let v8 = C::xreg_new(ctx, v7);
+            // Rule at src/isa/riscv64/inst.isle line 1370.
+            return v8;
+        }
+        F64 => {
+            let v5 = C::freg_to_reg(ctx, arg1);
+            let v6 = C::freg_to_reg(ctx, arg2);
+            let v10 = constructor_fpu_rrr(ctx, &FpuOPRRR::FltD, I64, v5, v6);
+            let v11 = C::xreg_new(ctx, v10);
+            // Rule at src/isa/riscv64/inst.isle line 1371.
+            return v11;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "rv_flt", "src/isa/riscv64/inst.isle line 1369"
+    )
+}
+
+// Generated as internal constructor for term rv_fle.
+pub fn constructor_rv_fle<C: Context>(ctx: &mut C, arg0: Type, arg1: FReg, arg2: FReg) -> XReg {
+    match arg0 {
+        F32 => {
+            let v5 = C::freg_to_reg(ctx, arg1);
+            let v6 = C::freg_to_reg(ctx, arg2);
+            let v7 = constructor_fpu_rrr(ctx, &FpuOPRRR::FleS, I64, v5, v6);
+            let v8 = C::xreg_new(ctx, v7);
+            // Rule at src/isa/riscv64/inst.isle line 1375.
+            return v8;
+        }
+        F64 => {
+            let v5 = C::freg_to_reg(ctx, arg1);
+            let v6 = C::freg_to_reg(ctx, arg2);
+            let v10 = constructor_fpu_rrr(ctx, &FpuOPRRR::FleD, I64, v5, v6);
+            let v11 = C::xreg_new(ctx, v10);
+            // Rule at src/isa/riscv64/inst.isle line 1376.
+            return v11;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "rv_fle", "src/isa/riscv64/inst.isle line 1374"
+    )
+}
+
+// Generated as internal constructor for term rv_fgt.
+pub fn constructor_rv_fgt<C: Context>(ctx: &mut C, arg0: Type, arg1: FReg, arg2: FReg) -> XReg {
+    let v3 = constructor_rv_flt(ctx, arg0, arg2, arg1);
+    // Rule at src/isa/riscv64/inst.isle line 1381.
+    return v3;
+}
+
+// Generated as internal constructor for term rv_fge.
+pub fn constructor_rv_fge<C: Context>(ctx: &mut C, arg0: Type, arg1: FReg, arg2: FReg) -> XReg {
+    let v3 = constructor_rv_fle(ctx, arg0, arg2, arg1);
+    // Rule at src/isa/riscv64/inst.isle line 1386.
+    return v3;
+}
+
+// Generated as internal constructor for term rv_adduw.
+pub fn constructor_rv_adduw<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
+    let v3 = C::xreg_to_reg(ctx, arg0);
+    let v4 = C::xreg_to_reg(ctx, arg1);
+    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Adduw, v3, v4);
+    let v6 = C::xreg_new(ctx, v5);
+    // Rule at src/isa/riscv64/inst.isle line 1394.
+    return v6;
+}
+
+// Generated as internal constructor for term rv_zextw.
+pub fn constructor_rv_zextw<C: Context>(ctx: &mut C, arg0: XReg) -> XReg {
+    let v1 = C::zero_reg(ctx);
+    let v2 = C::xreg_new(ctx, v1);
+    let v3 = constructor_rv_adduw(ctx, arg0, v2);
+    // Rule at src/isa/riscv64/inst.isle line 1401.
+    return v3;
+}
+
+// Generated as internal constructor for term rv_slliuw.
+pub fn constructor_rv_slliuw<C: Context>(ctx: &mut C, arg0: XReg, arg1: Imm12) -> XReg {
+    let v3 = C::xreg_to_reg(ctx, arg0);
+    let v4 = constructor_alu_rr_imm12(ctx, &AluOPRRI::SlliUw, v3, arg1);
+    let v5 = C::xreg_new(ctx, v4);
+    // Rule at src/isa/riscv64/inst.isle line 1407.
+    return v5;
+}
+
+// Generated as internal constructor for term rv_andn.
+pub fn constructor_rv_andn<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
+    let v3 = C::xreg_to_reg(ctx, arg0);
+    let v4 = C::xreg_to_reg(ctx, arg1);
+    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Andn, v3, v4);
+    let v6 = C::xreg_new(ctx, v5);
+    // Rule at src/isa/riscv64/inst.isle line 1416.
+    return v6;
+}
+
+// Generated as internal constructor for term rv_orn.
+pub fn constructor_rv_orn<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
+    let v3 = C::xreg_to_reg(ctx, arg0);
+    let v4 = C::xreg_to_reg(ctx, arg1);
+    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Orn, v3, v4);
+    let v6 = C::xreg_new(ctx, v5);
+    // Rule at src/isa/riscv64/inst.isle line 1422.
+    return v6;
+}
+
+// Generated as internal constructor for term rv_clz.
+pub fn constructor_rv_clz<C: Context>(ctx: &mut C, arg0: XReg) -> XReg {
+    let v2 = C::xreg_to_reg(ctx, arg0);
+    let v3 = constructor_alu_rr_funct12(ctx, &AluOPRRI::Clz, v2);
+    let v4 = C::xreg_new(ctx, v3);
+    // Rule at src/isa/riscv64/inst.isle line 1427.
+    return v4;
+}
+
+// Generated as internal constructor for term rv_clzw.
+pub fn constructor_rv_clzw<C: Context>(ctx: &mut C, arg0: XReg) -> XReg {
+    let v2 = C::xreg_to_reg(ctx, arg0);
+    let v3 = constructor_alu_rr_funct12(ctx, &AluOPRRI::Clzw, v2);
+    let v4 = C::xreg_new(ctx, v3);
+    // Rule at src/isa/riscv64/inst.isle line 1432.
+    return v4;
+}
+
+// Generated as internal constructor for term rv_ctz.
+pub fn constructor_rv_ctz<C: Context>(ctx: &mut C, arg0: XReg) -> XReg {
+    let v2 = C::xreg_to_reg(ctx, arg0);
+    let v3 = constructor_alu_rr_funct12(ctx, &AluOPRRI::Ctz, v2);
+    let v4 = C::xreg_new(ctx, v3);
+    // Rule at src/isa/riscv64/inst.isle line 1437.
+    return v4;
+}
+
+// Generated as internal constructor for term rv_ctzw.
+pub fn constructor_rv_ctzw<C: Context>(ctx: &mut C, arg0: XReg) -> XReg {
+    let v2 = C::xreg_to_reg(ctx, arg0);
+    let v3 = constructor_alu_rr_funct12(ctx, &AluOPRRI::Ctzw, v2);
+    let v4 = C::xreg_new(ctx, v3);
+    // Rule at src/isa/riscv64/inst.isle line 1442.
+    return v4;
+}
+
+// Generated as internal constructor for term rv_cpop.
+pub fn constructor_rv_cpop<C: Context>(ctx: &mut C, arg0: XReg) -> XReg {
+    let v2 = C::xreg_to_reg(ctx, arg0);
+    let v3 = constructor_alu_rr_funct12(ctx, &AluOPRRI::Cpop, v2);
+    let v4 = C::xreg_new(ctx, v3);
+    // Rule at src/isa/riscv64/inst.isle line 1447.
+    return v4;
+}
+
+// Generated as internal constructor for term rv_max.
+pub fn constructor_rv_max<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
+    let v3 = C::xreg_to_reg(ctx, arg0);
+    let v4 = C::xreg_to_reg(ctx, arg1);
+    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Max, v3, v4);
+    let v6 = C::xreg_new(ctx, v5);
+    // Rule at src/isa/riscv64/inst.isle line 1452.
+    return v6;
+}
+
+// Generated as internal constructor for term rv_sextb.
+pub fn constructor_rv_sextb<C: Context>(ctx: &mut C, arg0: XReg) -> XReg {
+    let v2 = C::xreg_to_reg(ctx, arg0);
+    let v4 = C::imm12_const(ctx, 0x0);
+    let v5 = constructor_alu_rr_imm12(ctx, &AluOPRRI::Sextb, v2, v4);
+    let v6 = C::xreg_new(ctx, v5);
+    // Rule at src/isa/riscv64/inst.isle line 1457.
+    return v6;
+}
+
+// Generated as internal constructor for term rv_sexth.
+pub fn constructor_rv_sexth<C: Context>(ctx: &mut C, arg0: XReg) -> XReg {
+    let v2 = C::xreg_to_reg(ctx, arg0);
+    let v4 = C::imm12_const(ctx, 0x0);
+    let v5 = constructor_alu_rr_imm12(ctx, &AluOPRRI::Sexth, v2, v4);
+    let v6 = C::xreg_new(ctx, v5);
+    // Rule at src/isa/riscv64/inst.isle line 1462.
+    return v6;
+}
+
+// Generated as internal constructor for term rv_zexth.
+pub fn constructor_rv_zexth<C: Context>(ctx: &mut C, arg0: XReg) -> XReg {
+    let v2 = C::xreg_to_reg(ctx, arg0);
+    let v4 = C::imm12_const(ctx, 0x0);
+    let v5 = constructor_alu_rr_imm12(ctx, &AluOPRRI::Zexth, v2, v4);
+    let v6 = C::xreg_new(ctx, v5);
+    // Rule at src/isa/riscv64/inst.isle line 1467.
+    return v6;
+}
+
+// Generated as internal constructor for term rv_rol.
+pub fn constructor_rv_rol<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
+    let v3 = C::xreg_to_reg(ctx, arg0);
+    let v4 = C::xreg_to_reg(ctx, arg1);
+    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Rol, v3, v4);
+    let v6 = C::xreg_new(ctx, v5);
+    // Rule at src/isa/riscv64/inst.isle line 1472.
+    return v6;
+}
+
+// Generated as internal constructor for term rv_rolw.
+pub fn constructor_rv_rolw<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
+    let v3 = C::xreg_to_reg(ctx, arg0);
+    let v4 = C::xreg_to_reg(ctx, arg1);
+    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Rolw, v3, v4);
+    let v6 = C::xreg_new(ctx, v5);
+    // Rule at src/isa/riscv64/inst.isle line 1477.
+    return v6;
+}
+
+// Generated as internal constructor for term rv_ror.
+pub fn constructor_rv_ror<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
+    let v3 = C::xreg_to_reg(ctx, arg0);
+    let v4 = C::xreg_to_reg(ctx, arg1);
+    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Ror, v3, v4);
+    let v6 = C::xreg_new(ctx, v5);
+    // Rule at src/isa/riscv64/inst.isle line 1482.
+    return v6;
+}
+
+// Generated as internal constructor for term rv_rorw.
+pub fn constructor_rv_rorw<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
+    let v3 = C::xreg_to_reg(ctx, arg0);
+    let v4 = C::xreg_to_reg(ctx, arg1);
+    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Rorw, v3, v4);
+    let v6 = C::xreg_new(ctx, v5);
+    // Rule at src/isa/riscv64/inst.isle line 1487.
+    return v6;
+}
+
+// Generated as internal constructor for term rv_rev8.
+pub fn constructor_rv_rev8<C: Context>(ctx: &mut C, arg0: XReg) -> XReg {
+    let v2 = C::xreg_to_reg(ctx, arg0);
+    let v3 = constructor_alu_rr_funct12(ctx, &AluOPRRI::Rev8, v2);
+    let v4 = C::xreg_new(ctx, v3);
+    // Rule at src/isa/riscv64/inst.isle line 1492.
+    return v4;
+}
+
+// Generated as internal constructor for term rv_brev8.
+pub fn constructor_rv_brev8<C: Context>(ctx: &mut C, arg0: XReg) -> XReg {
+    let v2 = C::xreg_to_reg(ctx, arg0);
+    let v3 = constructor_alu_rr_funct12(ctx, &AluOPRRI::Brev8, v2);
+    let v4 = C::xreg_new(ctx, v3);
+    // Rule at src/isa/riscv64/inst.isle line 1500.
+    return v4;
+}
+
+// Generated as internal constructor for term rv_bseti.
+pub fn constructor_rv_bseti<C: Context>(ctx: &mut C, arg0: XReg, arg1: Imm12) -> XReg {
+    let v3 = C::xreg_to_reg(ctx, arg0);
+    let v4 = constructor_alu_rr_imm12(ctx, &AluOPRRI::Bseti, v3, arg1);
+    let v5 = C::xreg_new(ctx, v4);
+    // Rule at src/isa/riscv64/inst.isle line 1505.
+    return v5;
+}
+
+// Generated as internal constructor for term rv_pack.
+pub fn constructor_rv_pack<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
+    let v3 = C::xreg_to_reg(ctx, arg0);
+    let v4 = C::xreg_to_reg(ctx, arg1);
+    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Pack, v3, v4);
+    let v6 = C::xreg_new(ctx, v5);
+    // Rule at src/isa/riscv64/inst.isle line 1513.
+    return v6;
+}
+
+// Generated as internal constructor for term rv_packw.
+pub fn constructor_rv_packw<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
+    let v3 = C::xreg_to_reg(ctx, arg0);
+    let v4 = C::xreg_to_reg(ctx, arg1);
+    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Packw, v3, v4);
+    let v6 = C::xreg_new(ctx, v5);
+    // Rule at src/isa/riscv64/inst.isle line 1518.
+    return v6;
+}
+
+// Generated as internal constructor for term shift_mask.
+pub fn constructor_shift_mask<C: Context>(ctx: &mut C, arg0: Type) -> u64 {
+    let v1 = C::lane_type(ctx, arg0);
+    let v2 = C::ty_bits(ctx, v1);
+    let v3 = C::u8_as_u64(ctx, v2);
+    let v5 = C::u64_sub(ctx, v3, 0x1);
+    // Rule at src/isa/riscv64/inst.isle line 1526.
+    return v5;
+}
+
+// Generated as internal constructor for term imm12_zero.
+pub fn constructor_imm12_zero<C: Context>(ctx: &mut C) -> Imm12 {
+    let v1 = C::imm12_const(ctx, 0x0);
+    // Rule at src/isa/riscv64/inst.isle line 1536.
+    return v1;
+}
+
+// Generated as internal constructor for term load_imm12.
+pub fn constructor_load_imm12<C: Context>(ctx: &mut C, arg0: i32) -> Reg {
+    let v1 = C::zero_reg(ctx);
+    let v2 = C::xreg_new(ctx, v1);
+    let v3 = C::imm12_const(ctx, arg0);
+    let v4 = constructor_rv_addi(ctx, v2, v3);
+    let v5 = C::xreg_to_reg(ctx, v4);
+    // Rule at src/isa/riscv64/inst.isle line 1544.
+    return v5;
+}
+
+// Generated as internal constructor for term u64_to_imm12.
+pub fn constructor_u64_to_imm12<C: Context>(ctx: &mut C, arg0: u64) -> Option<Imm12> {
+    let v1 = C::imm12_from_u64(ctx, arg0);
+    if let Some(v2) = v1 {
+        // Rule at src/isa/riscv64/inst.isle line 1576.
+        return Some(v2);
+    }
+    None
+}
+
+// Generated as internal constructor for term u64_to_uimm5.
+pub fn constructor_u64_to_uimm5<C: Context>(ctx: &mut C, arg0: u64) -> Option<UImm5> {
+    let v1 = C::uimm5_from_u64(ctx, arg0);
+    if let Some(v2) = v1 {
+        // Rule at src/isa/riscv64/inst.isle line 1617.
+        return Some(v2);
+    }
+    None
+}
+
+// Generated as internal constructor for term canonical_nan_u64.
+pub fn constructor_canonical_nan_u64<C: Context>(ctx: &mut C, arg0: Type) -> u64 {
+    match arg0 {
+        F32 => {
+            // Rule at src/isa/riscv64/inst.isle line 1626.
+            return 0x7FC00000;
+        }
+        F64 => {
+            // Rule at src/isa/riscv64/inst.isle line 1627.
+            return 0x7FF8000000000000;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "canonical_nan_u64", "src/isa/riscv64/inst.isle line 1625"
+    )
+}
+
+// Generated as internal constructor for term fpu_rr.
+pub fn constructor_fpu_rr<C: Context>(ctx: &mut C, arg0: &FpuOPRR, arg1: Type, arg2: Reg) -> Reg {
+    let v3 = C::temp_writable_reg(ctx, arg1);
+    let v4 = C::gen_default_frm(ctx);
+    let v5 = MInst::FpuRR {
+        alu_op: arg0.clone(),
+        frm: v4,
+        rd: v3,
+        rs: arg2,
+    };
+    let v6 = C::emit(ctx, &v5);
+    let v7 = C::writable_reg_to_reg(ctx, v3);
+    // Rule at src/isa/riscv64/inst.isle line 1634.
+    return v7;
+}
+
+// Generated as internal constructor for term alu_rrr.
+pub fn constructor_alu_rrr<C: Context>(ctx: &mut C, arg0: &AluOPRRR, arg1: Reg, arg2: Reg) -> Reg {
+    let v3 = constructor_temp_writable_xreg(ctx);
+    let v4 = C::writable_xreg_to_writable_reg(ctx, v3);
+    let v5 = MInst::AluRRR {
+        alu_op: arg0.clone(),
+        rd: v4,
+        rs1: arg1,
+        rs2: arg2,
+    };
+    let v6 = C::emit(ctx, &v5);
+    let v7 = constructor_writable_xreg_to_reg(ctx, v3);
+    // Rule at src/isa/riscv64/inst.isle line 1641.
+    return v7;
+}
+
+// Generated as internal constructor for term fpu_rrr.
+pub fn constructor_fpu_rrr<C: Context>(
+    ctx: &mut C,
+    arg0: &FpuOPRRR,
+    arg1: Type,
+    arg2: Reg,
+    arg3: Reg,
+) -> Reg {
+    let v4 = C::temp_writable_reg(ctx, arg1);
+    let v5 = C::gen_default_frm(ctx);
+    let v6 = MInst::FpuRRR {
+        alu_op: arg0.clone(),
+        frm: v5,
+        rd: v4,
+        rs1: arg2,
+        rs2: arg3,
+    };
+    let v7 = C::emit(ctx, &v6);
+    let v8 = C::writable_reg_to_reg(ctx, v4);
+    // Rule at src/isa/riscv64/inst.isle line 1652.
+    return v8;
+}
+
+// Generated as internal constructor for term fpu_rrrr.
+pub fn constructor_fpu_rrrr<C: Context>(
+    ctx: &mut C,
+    arg0: &FpuOPRRRR,
+    arg1: Type,
+    arg2: Reg,
+    arg3: Reg,
+    arg4: Reg,
+) -> Reg {
+    let v5 = C::temp_writable_reg(ctx, arg1);
+    let v6 = C::gen_default_frm(ctx);
+    let v7 = MInst::FpuRRRR {
+        alu_op: arg0.clone(),
+        frm: v6,
+        rd: v5,
+        rs1: arg2,
+        rs2: arg3,
+        rs3: arg4,
+    };
+    let v8 = C::emit(ctx, &v7);
+    let v9 = C::writable_reg_to_reg(ctx, v5);
+    // Rule at src/isa/riscv64/inst.isle line 1660.
+    return v9;
+}
+
+// Generated as internal constructor for term alu_rr_imm12.
+pub fn constructor_alu_rr_imm12<C: Context>(
+    ctx: &mut C,
+    arg0: &AluOPRRI,
+    arg1: Reg,
+    arg2: Imm12,
+) -> Reg {
+    let v3 = constructor_temp_writable_xreg(ctx);
+    let v4 = C::writable_xreg_to_writable_reg(ctx, v3);
+    let v5 = MInst::AluRRImm12 {
+        alu_op: arg0.clone(),
+        rd: v4,
+        rs: arg1,
+        imm12: arg2,
+    };
+    let v6 = C::emit(ctx, &v5);
+    let v7 = constructor_writable_xreg_to_reg(ctx, v3);
+    // Rule at src/isa/riscv64/inst.isle line 1668.
+    return v7;
+}
+
+// Generated as internal constructor for term alu_rr_funct12.
+pub fn constructor_alu_rr_funct12<C: Context>(ctx: &mut C, arg0: &AluOPRRI, arg1: Reg) -> Reg {
+    let v2 = constructor_temp_writable_xreg(ctx);
+    let v3 = C::writable_xreg_to_writable_reg(ctx, v2);
+    let v4 = constructor_imm12_zero(ctx);
+    let v5 = MInst::AluRRImm12 {
+        alu_op: arg0.clone(),
+        rd: v3,
+        rs: arg1,
+        imm12: v4,
+    };
+    let v6 = C::emit(ctx, &v5);
+    let v7 = constructor_writable_xreg_to_reg(ctx, v2);
+    // Rule at src/isa/riscv64/inst.isle line 1676.
+    return v7;
+}
+
+// Generated as internal constructor for term select_addi.
+pub fn constructor_select_addi<C: Context>(ctx: &mut C, arg0: Type) -> AluOPRRI {
+    let v1 = C::fits_in_32(ctx, arg0);
+    if let Some(v2) = v1 {
+        // Rule at src/isa/riscv64/inst.isle line 1682.
+        return AluOPRRI::Addiw;
+    }
+    let v4 = C::fits_in_64(ctx, arg0);
+    if let Some(v5) = v4 {
+        // Rule at src/isa/riscv64/inst.isle line 1683.
+        return AluOPRRI::Addi;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "select_addi", "src/isa/riscv64/inst.isle line 1681"
+    )
+}
+
+// Generated as internal constructor for term gen_bnot.
+pub fn constructor_gen_bnot<C: Context>(ctx: &mut C, arg0: Type, arg1: ValueRegs) -> ValueRegs {
+    let v1 = C::ty_scalar_float(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v5 = C::value_regs_get(ctx, arg1, 0x0);
+        let v6 = C::freg_new(ctx, v5);
+        let v7 = constructor_move_f_to_x(ctx, v6, v2);
+        let v8 = constructor_rv_not(ctx, v7);
+        let v9 = constructor_float_int_of_same_size(ctx, v2);
+        let v10 = constructor_move_x_to_f(ctx, v8, v9);
+        let v11 = C::freg_to_reg(ctx, v10);
+        let v12 = C::value_reg(ctx, v11);
+        // Rule at src/isa/riscv64/inst.isle line 1687.
+        return v12;
+    }
+    if arg0 == I128 {
+        let v5 = C::value_regs_get(ctx, arg1, 0x0);
+        let v13 = C::xreg_new(ctx, v5);
+        let v14 = constructor_rv_not(ctx, v13);
+        let v16 = C::value_regs_get(ctx, arg1, 0x1);
+        let v17 = C::xreg_new(ctx, v16);
+        let v18 = constructor_rv_not(ctx, v17);
+        let v19 = C::xreg_to_reg(ctx, v14);
+        let v20 = C::xreg_to_reg(ctx, v18);
+        let v21 = C::value_regs(ctx, v19, v20);
+        // Rule at src/isa/riscv64/inst.isle line 1694.
+        return v21;
+    }
+    let v22 = C::ty_int_ref_scalar_64_extract(ctx, arg0);
+    if let Some(v23) = v22 {
+        let v5 = C::value_regs_get(ctx, arg1, 0x0);
+        let v13 = C::xreg_new(ctx, v5);
+        let v14 = constructor_rv_not(ctx, v13);
+        let v19 = C::xreg_to_reg(ctx, v14);
+        let v24 = C::value_reg(ctx, v19);
+        // Rule at src/isa/riscv64/inst.isle line 1699.
+        return v24;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "gen_bnot", "src/isa/riscv64/inst.isle line 1686"
+    )
+}
+
+// Generated as internal constructor for term gen_and.
+pub fn constructor_gen_and<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: ValueRegs,
+    arg2: ValueRegs,
+) -> ValueRegs {
+    if arg0 == I128 {
+        let v4 = C::value_regs_get(ctx, arg1, 0x0);
+        let v5 = C::xreg_new(ctx, v4);
+        let v6 = C::value_regs_get(ctx, arg2, 0x0);
+        let v7 = C::xreg_new(ctx, v6);
+        let v8 = constructor_rv_and(ctx, v5, v7);
+        let v11 = C::value_regs_get(ctx, arg1, 0x1);
+        let v12 = C::xreg_new(ctx, v11);
+        let v13 = C::value_regs_get(ctx, arg2, 0x1);
+        let v14 = C::xreg_new(ctx, v13);
+        let v15 = constructor_rv_and(ctx, v12, v14);
+        let v9 = C::xreg_to_reg(ctx, v8);
+        let v16 = C::xreg_to_reg(ctx, v15);
+        let v17 = C::value_regs(ctx, v9, v16);
+        // Rule at src/isa/riscv64/inst.isle line 1704.
+        return v17;
+    }
+    let v18 = C::fits_in_64(ctx, arg0);
+    if let Some(v19) = v18 {
+        let v4 = C::value_regs_get(ctx, arg1, 0x0);
+        let v5 = C::xreg_new(ctx, v4);
+        let v6 = C::value_regs_get(ctx, arg2, 0x0);
+        let v7 = C::xreg_new(ctx, v6);
+        let v8 = constructor_rv_and(ctx, v5, v7);
+        let v9 = C::xreg_to_reg(ctx, v8);
+        let v20 = C::value_reg(ctx, v9);
+        // Rule at src/isa/riscv64/inst.isle line 1709.
+        return v20;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "gen_and", "src/isa/riscv64/inst.isle line 1703"
+    )
+}
+
+// Generated as internal constructor for term gen_andi.
+pub fn constructor_gen_andi<C: Context>(ctx: &mut C, arg0: XReg, arg1: u64) -> XReg {
+    let v2 = C::imm12_from_u64(ctx, arg1);
+    if let Some(v3) = v2 {
+        let v4 = constructor_rv_andi(ctx, arg0, v3);
+        // Rule at src/isa/riscv64/inst.isle line 1714.
+        return v4;
+    }
+    let v6 = C::imm(ctx, I64, arg1);
+    let v7 = C::xreg_new(ctx, v6);
+    let v8 = constructor_rv_and(ctx, arg0, v7);
+    // Rule at src/isa/riscv64/inst.isle line 1717.
+    return v8;
+}
+
+// Generated as internal constructor for term gen_or.
+pub fn constructor_gen_or<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: ValueRegs,
+    arg2: ValueRegs,
+) -> ValueRegs {
+    if arg0 == I128 {
+        let v4 = C::value_regs_get(ctx, arg1, 0x0);
+        let v5 = C::xreg_new(ctx, v4);
+        let v6 = C::value_regs_get(ctx, arg2, 0x0);
+        let v7 = C::xreg_new(ctx, v6);
+        let v8 = constructor_rv_or(ctx, v5, v7);
+        let v11 = C::value_regs_get(ctx, arg1, 0x1);
+        let v12 = C::xreg_new(ctx, v11);
+        let v13 = C::value_regs_get(ctx, arg2, 0x1);
+        let v14 = C::xreg_new(ctx, v13);
+        let v15 = constructor_rv_or(ctx, v12, v14);
+        let v9 = C::xreg_to_reg(ctx, v8);
+        let v16 = C::xreg_to_reg(ctx, v15);
+        let v17 = C::value_regs(ctx, v9, v16);
+        // Rule at src/isa/riscv64/inst.isle line 1722.
+        return v17;
+    }
+    let v18 = C::fits_in_64(ctx, arg0);
+    if let Some(v19) = v18 {
+        let v4 = C::value_regs_get(ctx, arg1, 0x0);
+        let v5 = C::xreg_new(ctx, v4);
+        let v6 = C::value_regs_get(ctx, arg2, 0x0);
+        let v7 = C::xreg_new(ctx, v6);
+        let v8 = constructor_rv_or(ctx, v5, v7);
+        let v9 = C::xreg_to_reg(ctx, v8);
+        let v20 = C::value_reg(ctx, v9);
+        // Rule at src/isa/riscv64/inst.isle line 1727.
+        return v20;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "gen_or", "src/isa/riscv64/inst.isle line 1721"
+    )
+}
+
+// Generated as internal constructor for term gen_bswap.
+pub fn constructor_gen_bswap<C: Context>(ctx: &mut C, arg0: Type, arg1: XReg) -> XReg {
+    let v19 = C::has_zbb(ctx);
+    if v19 == true {
+        if arg0 == I64 {
+            let v26 = constructor_rv_rev8(ctx, arg1);
+            // Rule at src/isa/riscv64/inst.isle line 1759.
+            return v26;
+        }
+        let v17 = C::int_fits_in_32(ctx, arg0);
+        if let Some(v18) = v17 {
+            let v21 = C::ty_bits(ctx, v18);
+            let v22 = C::u8_as_u64(ctx, v21);
+            let v23 = C::u64_sub(ctx, 0x40, v22);
+            let v24 = constructor_u64_to_imm12(ctx, v23);
+            if let Some(v25) = v24 {
+                let v26 = constructor_rv_rev8(ctx, arg1);
+                let v27 = constructor_rv_srli(ctx, v26, v25);
+                // Rule at src/isa/riscv64/inst.isle line 1753.
+                return v27;
+            }
+        }
+    }
+    let v2 = C::ty_int_ref_16_to_64(ctx, arg0);
+    if let Some(v3) = v2 {
+        let v4 = C::ty_half_width(ctx, v3);
+        if let Some(v5) = v4 {
+            let v6 = C::ty_bits(ctx, v5);
+            let v7 = C::u8_as_u64(ctx, v6);
+            let v8 = constructor_u64_to_imm12(ctx, v7);
+            if let Some(v9) = v8 {
+                let v10 = constructor_gen_bswap(ctx, v5, arg1);
+                let v11 = constructor_rv_slli(ctx, v10, v9);
+                let v12 = constructor_rv_srli(ctx, arg1, v9);
+                let v13 = constructor_gen_bswap(ctx, v5, v12);
+                let v15 = constructor_zext(ctx, v13, v5, I64);
+                let v16 = constructor_rv_or(ctx, v11, v15);
+                // Rule at src/isa/riscv64/inst.isle line 1737.
+                return v16;
+            }
+        }
+    }
+    if arg0 == I8 {
+        // Rule at src/isa/riscv64/inst.isle line 1735.
+        return arg1;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "gen_bswap", "src/isa/riscv64/inst.isle line 1732"
+    )
+}
+
+// Generated as internal constructor for term lower_bit_reverse.
+pub fn constructor_lower_bit_reverse<C: Context>(ctx: &mut C, arg0: Reg, arg1: Type) -> Reg {
+    match arg1 {
+        I8 => {
+            let v3 = constructor_gen_brev8(ctx, arg0, I8);
+            // Rule at src/isa/riscv64/inst.isle line 1768.
+            return v3;
+        }
+        I16 => {
+            let v5 = constructor_gen_brev8(ctx, arg0, I16);
+            let v6 = C::xreg_new(ctx, v5);
+            let v7 = constructor_gen_rev8(ctx, v6);
+            let v9 = C::imm12_const(ctx, 0x30);
+            let v10 = constructor_rv_srli(ctx, v7, v9);
+            let v11 = C::xreg_to_reg(ctx, v10);
+            // Rule at src/isa/riscv64/inst.isle line 1772.
+            return v11;
+        }
+        I32 => {
+            let v13 = constructor_gen_brev8(ctx, arg0, I32);
+            let v14 = C::xreg_new(ctx, v13);
+            let v15 = constructor_gen_rev8(ctx, v14);
+            let v17 = C::imm12_const(ctx, 0x20);
+            let v18 = constructor_rv_srli(ctx, v15, v17);
+            let v19 = C::xreg_to_reg(ctx, v18);
+            // Rule at src/isa/riscv64/inst.isle line 1780.
+            return v19;
+        }
+        I64 => {
+            let v20 = C::xreg_new(ctx, arg0);
+            let v21 = constructor_gen_rev8(ctx, v20);
+            let v22 = C::xreg_to_reg(ctx, v21);
+            let v24 = constructor_gen_brev8(ctx, v22, I64);
+            // Rule at src/isa/riscv64/inst.isle line 1788.
+            return v24;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "lower_bit_reverse", "src/isa/riscv64/inst.isle line 1765"
+    )
+}
+
+// Generated as internal constructor for term lower_ctz.
+pub fn constructor_lower_ctz<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
+    let v8 = C::has_zbb(ctx);
+    if v8 == true {
+        match arg0 {
+            I32 => {
+                let v3 = C::xreg_new(ctx, arg1);
+                let v15 = constructor_rv_ctzw(ctx, v3);
+                let v16 = C::xreg_to_reg(ctx, v15);
+                // Rule at src/isa/riscv64/inst.isle line 1803.
+                return v16;
+            }
+            I64 => {
+                let v3 = C::xreg_new(ctx, arg1);
+                let v17 = constructor_rv_ctz(ctx, v3);
+                let v18 = C::xreg_to_reg(ctx, v17);
+                // Rule at src/isa/riscv64/inst.isle line 1807.
+                return v18;
+            }
+            _ => {}
+        }
+        let v6 = C::fits_in_16(ctx, arg0);
+        if let Some(v7) = v6 {
+            let v9 = C::ty_bits(ctx, v7);
+            let v10 = C::u8_as_u64(ctx, v9);
+            let v11 = constructor_gen_bseti(ctx, arg1, v10);
+            let v12 = C::xreg_new(ctx, v11);
+            let v13 = constructor_rv_ctzw(ctx, v12);
+            let v14 = C::xreg_to_reg(ctx, v13);
+            // Rule at src/isa/riscv64/inst.isle line 1798.
+            return v14;
+        }
+    }
+    let v3 = C::xreg_new(ctx, arg1);
+    let v4 = constructor_gen_cltz(ctx, false, v3, arg0);
+    let v5 = C::xreg_to_reg(ctx, v4);
+    // Rule at src/isa/riscv64/inst.isle line 1795.
+    return v5;
+}
+
+// Generated as internal constructor for term lower_ctz_128.
+pub fn constructor_lower_ctz_128<C: Context>(ctx: &mut C, arg0: ValueRegs) -> ValueRegs {
+    let v2 = C::value_regs_get(ctx, arg0, 0x0);
+    let v3 = C::xreg_new(ctx, v2);
+    let v5 = C::value_regs_get(ctx, arg0, 0x1);
+    let v6 = C::xreg_new(ctx, v5);
+    let v8 = C::xreg_to_reg(ctx, v6);
+    let v9 = constructor_lower_ctz(ctx, I64, v8);
+    let v10 = C::xreg_new(ctx, v9);
+    let v11 = C::xreg_to_reg(ctx, v3);
+    let v12 = constructor_lower_ctz(ctx, I64, v11);
+    let v13 = C::xreg_new(ctx, v12);
+    let v15 = C::zero_reg(ctx);
+    let v16 = C::xreg_new(ctx, v15);
+    let v18 = C::zero_reg(ctx);
+    let v17 = C::xreg_to_reg(ctx, v10);
+    let v19 = C::gen_select_reg(ctx, &IntCC::Equal, v3, v16, v17, v18);
+    let v20 = C::xreg_new(ctx, v19);
+    let v21 = constructor_rv_add(ctx, v13, v20);
+    let v22 = C::xreg_to_reg(ctx, v21);
+    let v23 = C::value_reg(ctx, v22);
+    let v26 = constructor_extend(ctx, v23, &ExtendOp::Zero, I64, I128);
+    // Rule at src/isa/riscv64/inst.isle line 1814.
+    return v26;
+}
+
+// Generated as internal constructor for term lower_clz.
+pub fn constructor_lower_clz<C: Context>(ctx: &mut C, arg0: Type, arg1: XReg) -> XReg {
+    let v6 = C::has_zbb(ctx);
+    if v6 == true {
+        match arg0 {
+            I32 => {
+                let v15 = constructor_rv_clzw(ctx, arg1);
+                // Rule at src/isa/riscv64/inst.isle line 1837.
+                return v15;
+            }
+            I64 => {
+                let v16 = constructor_rv_clz(ctx, arg1);
+                // Rule at src/isa/riscv64/inst.isle line 1841.
+                return v16;
+            }
+            _ => {}
+        }
+        let v4 = C::fits_in_16(ctx, arg0);
+        if let Some(v5) = v4 {
+            let v8 = constructor_zext(ctx, arg1, v5, I64);
+            let v9 = constructor_rv_clz(ctx, v8);
+            let v10 = C::ty_bits(ctx, v5);
+            let v11 = C::u8_as_i32(ctx, v10);
+            let v13 = C::imm12_const_add(ctx, v11, -0x40);
+            let v14 = constructor_rv_addi(ctx, v9, v13);
+            // Rule at src/isa/riscv64/inst.isle line 1829.
+            return v14;
+        }
+    }
+    let v3 = constructor_gen_cltz(ctx, true, arg1, arg0);
+    // Rule at src/isa/riscv64/inst.isle line 1826.
+    return v3;
+}
+
+// Generated as internal constructor for term lower_clz_i128.
+pub fn constructor_lower_clz_i128<C: Context>(ctx: &mut C, arg0: ValueRegs) -> ValueRegs {
+    let v2 = C::value_regs_get(ctx, arg0, 0x0);
+    let v3 = C::xreg_new(ctx, v2);
+    let v5 = C::value_regs_get(ctx, arg0, 0x1);
+    let v6 = C::xreg_new(ctx, v5);
+    let v8 = constructor_lower_clz(ctx, I64, v6);
+    let v9 = constructor_lower_clz(ctx, I64, v3);
+    let v11 = C::zero_reg(ctx);
+    let v12 = C::xreg_new(ctx, v11);
+    let v14 = C::zero_reg(ctx);
+    let v13 = C::xreg_to_reg(ctx, v9);
+    let v15 = C::gen_select_reg(ctx, &IntCC::Equal, v6, v12, v13, v14);
+    let v16 = C::xreg_new(ctx, v15);
+    let v17 = constructor_rv_add(ctx, v8, v16);
+    let v18 = C::xreg_to_reg(ctx, v17);
+    let v19 = C::value_reg(ctx, v18);
+    let v22 = constructor_extend(ctx, v19, &ExtendOp::Zero, I64, I128);
+    // Rule at src/isa/riscv64/inst.isle line 1849.
+    return v22;
+}
+
+// Generated as internal constructor for term lower_cls.
+pub fn constructor_lower_cls<C: Context>(ctx: &mut C, arg0: Type, arg1: XReg) -> XReg {
+    let v3 = constructor_sext(ctx, arg1, arg0, I64);
+    let v5 = C::zero_reg(ctx);
+    let v6 = C::xreg_new(ctx, v5);
+    let v7 = constructor_rv_not(ctx, v3);
+    let v8 = C::xreg_to_reg(ctx, v7);
+    let v9 = C::xreg_to_reg(ctx, v3);
+    let v10 = C::gen_select_reg(ctx, &IntCC::SignedLessThan, v3, v6, v8, v9);
+    let v11 = C::xreg_new(ctx, v10);
+    let v12 = constructor_lower_clz(ctx, arg0, v11);
+    let v14 = C::imm12_const(ctx, -0x1);
+    let v15 = constructor_rv_addi(ctx, v12, v14);
+    // Rule at src/isa/riscv64/inst.isle line 1862.
+    return v15;
+}
+
+// Generated as internal constructor for term lower_cls_i128.
+pub fn constructor_lower_cls_i128<C: Context>(ctx: &mut C, arg0: ValueRegs) -> ValueRegs {
+    let v2 = C::value_regs_get(ctx, arg0, 0x0);
+    let v3 = C::xreg_new(ctx, v2);
+    let v5 = C::value_regs_get(ctx, arg0, 0x1);
+    let v6 = C::xreg_new(ctx, v5);
+    let v8 = C::zero_reg(ctx);
+    let v9 = C::xreg_new(ctx, v8);
+    let v10 = constructor_rv_not(ctx, v3);
+    let v11 = C::xreg_to_reg(ctx, v10);
+    let v12 = C::xreg_to_reg(ctx, v3);
+    let v13 = C::gen_select_reg(ctx, &IntCC::SignedLessThan, v6, v9, v11, v12);
+    let v14 = C::xreg_new(ctx, v13);
+    let v15 = C::zero_reg(ctx);
+    let v16 = C::xreg_new(ctx, v15);
+    let v17 = constructor_rv_not(ctx, v6);
+    let v18 = C::xreg_to_reg(ctx, v17);
+    let v19 = C::xreg_to_reg(ctx, v6);
+    let v20 = C::gen_select_reg(ctx, &IntCC::SignedLessThan, v6, v16, v18, v19);
+    let v21 = C::xreg_new(ctx, v20);
+    let v22 = C::xreg_to_reg(ctx, v14);
+    let v23 = C::xreg_to_reg(ctx, v21);
+    let v24 = C::value_regs(ctx, v22, v23);
+    let v25 = constructor_lower_clz_i128(ctx, v24);
+    let v26 = C::value_regs_get(ctx, v25, 0x0);
+    let v27 = C::xreg_new(ctx, v26);
+    let v29 = C::imm12_const(ctx, -0x1);
+    let v30 = constructor_rv_addi(ctx, v27, v29);
+    let v31 = C::xreg_to_reg(ctx, v30);
+    let v32 = C::value_reg(ctx, v31);
+    let v36 = constructor_extend(ctx, v32, &ExtendOp::Zero, I64, I128);
+    // Rule at src/isa/riscv64/inst.isle line 1872.
+    return v36;
+}
+
+// Generated as internal constructor for term gen_cltz.
+pub fn constructor_gen_cltz<C: Context>(ctx: &mut C, arg0: bool, arg1: XReg, arg2: Type) -> XReg {
+    let v3 = constructor_temp_writable_xreg(ctx);
+    let v4 = constructor_temp_writable_xreg(ctx);
+    let v5 = constructor_temp_writable_xreg(ctx);
+    let v6 = C::writable_xreg_to_writable_reg(ctx, v5);
+    let v7 = C::writable_xreg_to_writable_reg(ctx, v4);
+    let v8 = C::writable_xreg_to_writable_reg(ctx, v3);
+    let v9 = C::xreg_to_reg(ctx, arg1);
+    let v10 = MInst::Cltz {
+        leading: arg0,
+        sum: v6,
+        step: v7,
+        tmp: v8,
+        rs: v9,
+        ty: arg2,
+    };
+    let v11 = C::emit(ctx, &v10);
+    let v12 = C::writable_xreg_to_xreg(ctx, v5);
+    // Rule at src/isa/riscv64/inst.isle line 1884.
+    return v12;
+}
+
+// Generated as internal constructor for term ext_int_if_need.
+pub fn constructor_ext_int_if_need<C: Context>(
+    ctx: &mut C,
+    arg0: bool,
+    arg1: ValueRegs,
+    arg2: Type,
+) -> ValueRegs {
+    match arg2 {
+        I64 => {
+            // Rule at src/isa/riscv64/inst.isle line 1900.
+            return arg1;
+        }
+        I128 => {
+            // Rule at src/isa/riscv64/inst.isle line 1901.
+            return arg1;
+        }
+        _ => {}
+    }
+    match arg0 {
+        true => {
+            let v3 = C::fits_in_32(ctx, arg2);
+            if let Some(v4) = v3 {
+                let v5 = C::ty_int(ctx, v4);
+                if let Some(v6) = v5 {
+                    let v9 = constructor_extend(ctx, arg1, &ExtendOp::Signed, v6, I64);
+                    // Rule at src/isa/riscv64/inst.isle line 1895.
+                    return v9;
+                }
+            }
+        }
+        false => {
+            let v3 = C::fits_in_32(ctx, arg2);
+            if let Some(v4) = v3 {
+                let v5 = C::ty_int(ctx, v4);
+                if let Some(v6) = v5 {
+                    let v11 = constructor_extend(ctx, arg1, &ExtendOp::Zero, v6, I64);
+                    // Rule at src/isa/riscv64/inst.isle line 1897.
+                    return v11;
+                }
+            }
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "ext_int_if_need", "src/isa/riscv64/inst.isle line 1893"
+    )
+}
+
+// Generated as internal constructor for term zext.
+pub fn constructor_zext<C: Context>(ctx: &mut C, arg0: XReg, arg1: Type, arg2: Type) -> XReg {
+    let v3 = C::fits_in_64(ctx, arg2);
+    if let Some(v4) = v3 {
+        let v5 = C::xreg_to_reg(ctx, arg0);
+        let v6 = C::value_reg(ctx, v5);
+        let v8 = constructor_extend(ctx, v6, &ExtendOp::Zero, arg1, v4);
+        let v10 = C::value_regs_get(ctx, v8, 0x0);
+        let v11 = C::xreg_new(ctx, v10);
+        // Rule at src/isa/riscv64/inst.isle line 1906.
+        return v11;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "zext", "src/isa/riscv64/inst.isle line 1905"
+    )
+}
+
+// Generated as internal constructor for term sext.
+pub fn constructor_sext<C: Context>(ctx: &mut C, arg0: XReg, arg1: Type, arg2: Type) -> XReg {
+    let v3 = C::fits_in_64(ctx, arg2);
+    if let Some(v4) = v3 {
+        let v5 = C::xreg_to_reg(ctx, arg0);
+        let v6 = C::value_reg(ctx, v5);
+        let v8 = constructor_extend(ctx, v6, &ExtendOp::Signed, arg1, v4);
+        let v10 = C::value_regs_get(ctx, v8, 0x0);
+        let v11 = C::xreg_new(ctx, v10);
+        // Rule at src/isa/riscv64/inst.isle line 1910.
+        return v11;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "sext", "src/isa/riscv64/inst.isle line 1909"
+    )
+}
+
+// Generated as internal constructor for term extend.
+pub fn constructor_extend<C: Context>(
+    ctx: &mut C,
+    arg0: ValueRegs,
+    arg1: &ExtendOp,
+    arg2: Type,
+    arg3: Type,
+) -> ValueRegs {
+    if arg2 == arg3 {
+        // Rule at src/isa/riscv64/inst.isle line 2004.
+        return arg0;
+    }
+    match arg1 {
+        &ExtendOp::Zero => {
+            match arg3 {
+                I64 => {
+                    if arg2 == I32 {
+                        let v50 = C::has_zba(ctx);
+                        if v50 == true {
+                            let v9 = C::value_regs_get(ctx, arg0, 0x0);
+                            let v10 = C::xreg_new(ctx, v9);
+                            let v51 = constructor_rv_zextw(ctx, v10);
+                            let v52 = C::xreg_to_reg(ctx, v51);
+                            let v53 = C::value_reg(ctx, v52);
+                            // Rule at src/isa/riscv64/inst.isle line 1982.
+                            return v53;
+                        }
+                    }
+                }
+                I128 => {
+                    let v54 = C::fits_in_64(ctx, arg2);
+                    if let Some(v55) = v54 {
+                        let v9 = C::value_regs_get(ctx, arg0, 0x0);
+                        let v10 = C::xreg_new(ctx, v9);
+                        let v64 = constructor_zext(ctx, v10, v55, I64);
+                        let v66 = C::load_u64_constant(ctx, 0x0);
+                        let v67 = C::xreg_new(ctx, v66);
+                        let v68 = C::xreg_to_reg(ctx, v64);
+                        let v69 = C::xreg_to_reg(ctx, v67);
+                        let v70 = C::value_regs(ctx, v68, v69);
+                        // Rule at src/isa/riscv64/inst.isle line 1997.
+                        return v70;
+                    }
+                }
+                _ => {}
+            }
+            match arg2 {
+                I8 => {
+                    let v6 = C::fits_in_64(ctx, arg3);
+                    if let Some(v7) = v6 {
+                        let v9 = C::value_regs_get(ctx, arg0, 0x0);
+                        let v10 = C::xreg_new(ctx, v9);
+                        let v24 = C::imm12_const(ctx, 0xFF);
+                        let v25 = constructor_rv_andi(ctx, v10, v24);
+                        let v26 = C::xreg_to_reg(ctx, v25);
+                        let v27 = C::value_reg(ctx, v26);
+                        // Rule at src/isa/riscv64/inst.isle line 1936.
+                        return v27;
+                    }
+                }
+                I16 => {
+                    let v6 = C::fits_in_64(ctx, arg3);
+                    if let Some(v7) = v6 {
+                        let v40 = C::has_zbb(ctx);
+                        if v40 == true {
+                            let v9 = C::value_regs_get(ctx, arg0, 0x0);
+                            let v10 = C::xreg_new(ctx, v9);
+                            let v47 = constructor_rv_zexth(ctx, v10);
+                            let v48 = C::xreg_to_reg(ctx, v47);
+                            let v49 = C::value_reg(ctx, v48);
+                            // Rule at src/isa/riscv64/inst.isle line 1976.
+                            return v49;
+                        }
+                        let v31 = C::has_zbkb(ctx);
+                        if v31 == true {
+                            let v9 = C::value_regs_get(ctx, arg0, 0x0);
+                            let v10 = C::xreg_new(ctx, v9);
+                            let v32 = C::zero_reg(ctx);
+                            let v33 = C::xreg_new(ctx, v32);
+                            let v34 = constructor_rv_packw(ctx, v10, v33);
+                            let v35 = C::xreg_to_reg(ctx, v34);
+                            let v36 = C::value_reg(ctx, v35);
+                            // Rule at src/isa/riscv64/inst.isle line 1951.
+                            return v36;
+                        }
+                    }
+                }
+                I32 => {
+                    if arg3 == I64 {
+                        let v31 = C::has_zbkb(ctx);
+                        if v31 == true {
+                            let v9 = C::value_regs_get(ctx, arg0, 0x0);
+                            let v10 = C::xreg_new(ctx, v9);
+                            let v32 = C::zero_reg(ctx);
+                            let v33 = C::xreg_new(ctx, v32);
+                            let v37 = constructor_rv_pack(ctx, v10, v33);
+                            let v38 = C::xreg_to_reg(ctx, v37);
+                            let v39 = C::value_reg(ctx, v38);
+                            // Rule at src/isa/riscv64/inst.isle line 1957.
+                            return v39;
+                        }
+                    }
+                }
+                _ => {}
+            }
+        }
+        &ExtendOp::Signed => {
+            match arg3 {
+                I64 => {
+                    if arg2 == I32 {
+                        let v9 = C::value_regs_get(ctx, arg0, 0x0);
+                        let v10 = C::xreg_new(ctx, v9);
+                        let v28 = constructor_rv_sextw(ctx, v10);
+                        let v29 = C::xreg_to_reg(ctx, v28);
+                        let v30 = C::value_reg(ctx, v29);
+                        // Rule at src/isa/riscv64/inst.isle line 1942.
+                        return v30;
+                    }
+                }
+                I128 => {
+                    let v54 = C::fits_in_64(ctx, arg2);
+                    if let Some(v55) = v54 {
+                        let v9 = C::value_regs_get(ctx, arg0, 0x0);
+                        let v10 = C::xreg_new(ctx, v9);
+                        let v57 = constructor_sext(ctx, v10, v55, I64);
+                        let v59 = C::imm12_const(ctx, 0x3F);
+                        let v60 = constructor_rv_srai(ctx, v57, v59);
+                        let v61 = C::xreg_to_reg(ctx, v57);
+                        let v62 = C::xreg_to_reg(ctx, v60);
+                        let v63 = C::value_regs(ctx, v61, v62);
+                        // Rule at src/isa/riscv64/inst.isle line 1989.
+                        return v63;
+                    }
+                }
+                _ => {}
+            }
+            match arg2 {
+                I8 => {
+                    let v6 = C::fits_in_64(ctx, arg3);
+                    if let Some(v7) = v6 {
+                        let v40 = C::has_zbb(ctx);
+                        if v40 == true {
+                            let v9 = C::value_regs_get(ctx, arg0, 0x0);
+                            let v10 = C::xreg_new(ctx, v9);
+                            let v41 = constructor_rv_sextb(ctx, v10);
+                            let v42 = C::xreg_to_reg(ctx, v41);
+                            let v43 = C::value_reg(ctx, v42);
+                            // Rule at src/isa/riscv64/inst.isle line 1964.
+                            return v43;
+                        }
+                    }
+                }
+                I16 => {
+                    let v6 = C::fits_in_64(ctx, arg3);
+                    if let Some(v7) = v6 {
+                        let v40 = C::has_zbb(ctx);
+                        if v40 == true {
+                            let v9 = C::value_regs_get(ctx, arg0, 0x0);
+                            let v10 = C::xreg_new(ctx, v9);
+                            let v44 = constructor_rv_sexth(ctx, v10);
+                            let v45 = C::xreg_to_reg(ctx, v44);
+                            let v46 = C::value_reg(ctx, v45);
+                            // Rule at src/isa/riscv64/inst.isle line 1970.
+                            return v46;
+                        }
+                    }
+                }
+                _ => {}
+            }
+        }
+        _ => {}
+    }
+    let v3 = C::fits_in_32(ctx, arg2);
+    if let Some(v4) = v3 {
+        let v6 = C::fits_in_64(ctx, arg3);
+        if let Some(v7) = v6 {
+            let v9 = C::value_regs_get(ctx, arg0, 0x0);
+            let v10 = C::xreg_new(ctx, v9);
+            let v12 = C::ty_bits(ctx, v4);
+            let v13 = C::u8_as_u64(ctx, v12);
+            let v14 = C::u64_sub(ctx, 0x40, v13);
+            let v15 = C::imm_from_bits(ctx, v14);
+            let v16 = constructor_rv_slli(ctx, v10, v15);
+            let v17 = &constructor_extend_shift_op(ctx, arg1);
+            let v18 = C::xreg_to_reg(ctx, v16);
+            let v19 = constructor_alu_rr_imm12(ctx, v17, v18, v15);
+            let v20 = C::xreg_new(ctx, v19);
+            let v21 = C::xreg_to_reg(ctx, v20);
+            let v22 = C::value_reg(ctx, v21);
+            // Rule at src/isa/riscv64/inst.isle line 1927.
+            return v22;
+        }
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "extend", "src/isa/riscv64/inst.isle line 1918"
+    )
+}
+
+// Generated as internal constructor for term extend_shift_op.
+pub fn constructor_extend_shift_op<C: Context>(ctx: &mut C, arg0: &ExtendOp) -> AluOPRRI {
+    match arg0 {
+        &ExtendOp::Zero => {
+            // Rule at src/isa/riscv64/inst.isle line 1922.
+            return AluOPRRI::Srli;
+        }
+        &ExtendOp::Signed => {
+            // Rule at src/isa/riscv64/inst.isle line 1923.
+            return AluOPRRI::Srai;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "extend_shift_op", "src/isa/riscv64/inst.isle line 1921"
+    )
+}
+
+// Generated as internal constructor for term lower_b128_binary.
+pub fn constructor_lower_b128_binary<C: Context>(
+    ctx: &mut C,
+    arg0: &AluOPRRR,
+    arg1: ValueRegs,
+    arg2: ValueRegs,
+) -> ValueRegs {
+    let v4 = C::value_regs_get(ctx, arg1, 0x0);
+    let v5 = C::value_regs_get(ctx, arg2, 0x0);
+    let v6 = constructor_alu_rrr(ctx, arg0, v4, v5);
+    let v7 = C::xreg_new(ctx, v6);
+    let v9 = C::value_regs_get(ctx, arg1, 0x1);
+    let v10 = C::value_regs_get(ctx, arg2, 0x1);
+    let v11 = constructor_alu_rrr(ctx, arg0, v9, v10);
+    let v12 = C::xreg_new(ctx, v11);
+    let v13 = C::xreg_to_reg(ctx, v7);
+    let v14 = C::xreg_to_reg(ctx, v12);
+    let v15 = C::value_regs(ctx, v13, v14);
+    // Rule at src/isa/riscv64/inst.isle line 2010.
+    return v15;
+}
+
+// Generated as internal constructor for term lower_umlhi.
+pub fn constructor_lower_umlhi<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: XReg,
+    arg2: XReg,
+) -> XReg {
+    if arg0 == I64 {
+        let v3 = constructor_rv_mulhu(ctx, arg1, arg2);
+        // Rule at src/isa/riscv64/inst.isle line 2019.
+        return v3;
+    }
+    let v5 = constructor_zext(ctx, arg1, arg0, I64);
+    let v6 = constructor_zext(ctx, arg2, arg0, I64);
+    let v7 = constructor_rv_mul(ctx, v5, v6);
+    let v8 = C::ty_bits(ctx, arg0);
+    let v9 = C::u8_as_i32(ctx, v8);
+    let v10 = C::imm12_const(ctx, v9);
+    let v11 = constructor_rv_srli(ctx, v7, v10);
+    // Rule at src/isa/riscv64/inst.isle line 2022.
+    return v11;
+}
+
+// Generated as internal constructor for term lower_smlhi.
+pub fn constructor_lower_smlhi<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: XReg,
+    arg2: XReg,
+) -> XReg {
+    if arg0 == I64 {
+        let v3 = constructor_rv_mulh(ctx, arg1, arg2);
+        // Rule at src/isa/riscv64/inst.isle line 2028.
+        return v3;
+    }
+    let v4 = constructor_rv_mul(ctx, arg1, arg2);
+    let v5 = C::ty_bits(ctx, arg0);
+    let v6 = C::u8_as_i32(ctx, v5);
+    let v7 = C::imm12_const(ctx, v6);
+    let v8 = constructor_rv_srli(ctx, v4, v7);
+    // Rule at src/isa/riscv64/inst.isle line 2033.
+    return v8;
+}
+
+// Generated as internal constructor for term lower_rotl.
+pub fn constructor_lower_rotl<C: Context>(ctx: &mut C, arg0: Type, arg1: XReg, arg2: XReg) -> XReg {
+    match arg0 {
+        I32 => {
+            let v3 = C::has_zbb(ctx);
+            match v3 {
+                true => {
+                    let v7 = constructor_rv_rolw(ctx, arg1, arg2);
+                    // Rule at src/isa/riscv64/inst.isle line 2051.
+                    return v7;
+                }
+                false => {
+                    let v9 = constructor_lower_rotl_shift(ctx, I32, arg1, arg2);
+                    // Rule at src/isa/riscv64/inst.isle line 2057.
+                    return v9;
+                }
+                _ => {}
+            }
+        }
+        I64 => {
+            let v3 = C::has_zbb(ctx);
+            match v3 {
+                true => {
+                    let v4 = constructor_rv_rol(ctx, arg1, arg2);
+                    // Rule at src/isa/riscv64/inst.isle line 2041.
+                    return v4;
+                }
+                false => {
+                    let v6 = constructor_lower_rotl_shift(ctx, I64, arg1, arg2);
+                    // Rule at src/isa/riscv64/inst.isle line 2047.
+                    return v6;
+                }
+                _ => {}
+            }
+        }
+        _ => {}
+    }
+    let v10 = constructor_lower_rotl_shift(ctx, arg0, arg1, arg2);
+    // Rule at src/isa/riscv64/inst.isle line 2061.
+    return v10;
+}
+
+// Generated as internal constructor for term lower_rotl_shift.
+pub fn constructor_lower_rotl_shift<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: XReg,
+    arg2: XReg,
+) -> XReg {
+    let v3 = C::gen_shamt(ctx, arg0, arg2);
+    let v5 = C::value_regs_get(ctx, v3, 0x0);
+    let v7 = C::value_regs_get(ctx, v3, 0x1);
+    let v8 = C::xreg_new(ctx, v5);
+    let v9 = constructor_rv_sll(ctx, arg1, v8);
+    let v11 = C::xreg_new(ctx, v7);
+    let v12 = constructor_rv_srl(ctx, arg1, v11);
+    let v15 = C::xreg_new(ctx, v5);
+    let v16 = C::zero_reg(ctx);
+    let v17 = C::xreg_new(ctx, v16);
+    let v18 = C::zero_reg(ctx);
+    let v13 = C::xreg_to_reg(ctx, v12);
+    let v19 = C::gen_select_reg(ctx, &IntCC::Equal, v15, v17, v18, v13);
+    let v10 = C::xreg_to_reg(ctx, v9);
+    let v20 = C::xreg_new(ctx, v10);
+    let v21 = C::xreg_new(ctx, v19);
+    let v22 = constructor_rv_or(ctx, v20, v21);
+    // Rule at src/isa/riscv64/inst.isle line 2070.
+    return v22;
+}
+
+// Generated as internal constructor for term lower_rotr.
+pub fn constructor_lower_rotr<C: Context>(ctx: &mut C, arg0: Type, arg1: XReg, arg2: XReg) -> XReg {
+    match arg0 {
+        I32 => {
+            let v3 = C::has_zbb(ctx);
+            match v3 {
+                true => {
+                    let v7 = constructor_rv_rorw(ctx, arg1, arg2);
+                    // Rule at src/isa/riscv64/inst.isle line 2100.
+                    return v7;
+                }
+                false => {
+                    let v9 = constructor_lower_rotr_shift(ctx, I32, arg1, arg2);
+                    // Rule at src/isa/riscv64/inst.isle line 2106.
+                    return v9;
+                }
+                _ => {}
+            }
+        }
+        I64 => {
+            let v3 = C::has_zbb(ctx);
+            match v3 {
+                true => {
+                    let v4 = constructor_rv_ror(ctx, arg1, arg2);
+                    // Rule at src/isa/riscv64/inst.isle line 2091.
+                    return v4;
+                }
+                false => {
+                    let v6 = constructor_lower_rotr_shift(ctx, I64, arg1, arg2);
+                    // Rule at src/isa/riscv64/inst.isle line 2096.
+                    return v6;
+                }
+                _ => {}
+            }
+        }
+        _ => {}
+    }
+    let v10 = constructor_lower_rotr_shift(ctx, arg0, arg1, arg2);
+    // Rule at src/isa/riscv64/inst.isle line 2110.
+    return v10;
+}
+
+// Generated as internal constructor for term lower_rotr_shift.
+pub fn constructor_lower_rotr_shift<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: XReg,
+    arg2: XReg,
+) -> XReg {
+    let v3 = C::gen_shamt(ctx, arg0, arg2);
+    let v5 = C::value_regs_get(ctx, v3, 0x0);
+    let v6 = C::xreg_new(ctx, v5);
+    let v8 = C::value_regs_get(ctx, v3, 0x1);
+    let v9 = C::xreg_new(ctx, v8);
+    let v10 = constructor_rv_srl(ctx, arg1, v6);
+    let v11 = constructor_rv_sll(ctx, arg1, v9);
+    let v13 = C::zero_reg(ctx);
+    let v14 = C::xreg_new(ctx, v13);
+    let v15 = C::zero_reg(ctx);
+    let v16 = C::xreg_to_reg(ctx, v11);
+    let v17 = C::gen_select_reg(ctx, &IntCC::Equal, v6, v14, v15, v16);
+    let v18 = C::xreg_new(ctx, v17);
+    let v19 = constructor_rv_or(ctx, v10, v18);
+    // Rule at src/isa/riscv64/inst.isle line 2118.
+    return v19;
+}
+
+// Generated as internal constructor for term gen_bseti.
+pub fn constructor_gen_bseti<C: Context>(ctx: &mut C, arg0: Reg, arg1: u64) -> Reg {
+    let v2 = C::has_zbs(ctx);
+    match v2 {
+        true => {
+            let v12 = C::xreg_new(ctx, arg0);
+            let v17 = C::u64_as_i32(ctx, arg1);
+            let v18 = C::imm12_const(ctx, v17);
+            let v19 = constructor_rv_bseti(ctx, v12, v18);
+            let v20 = C::xreg_to_reg(ctx, v19);
+            // Rule at src/isa/riscv64/inst.isle line 2146.
+            return v20;
+        }
+        false => {
+            let v4 = C::u64_le(ctx, arg1, 0xC);
+            match v4 {
+                true => {
+                    let v12 = C::xreg_new(ctx, arg0);
+                    let v6 = C::u64_shl(ctx, 0x1, arg1);
+                    let v13 = C::u64_as_i32(ctx, v6);
+                    let v14 = C::imm12_const(ctx, v13);
+                    let v15 = constructor_rv_ori(ctx, v12, v14);
+                    let v16 = C::xreg_to_reg(ctx, v15);
+                    // Rule at src/isa/riscv64/inst.isle line 2141.
+                    return v16;
+                }
+                false => {
+                    let v6 = C::u64_shl(ctx, 0x1, arg1);
+                    let v7 = C::load_u64_constant(ctx, v6);
+                    let v8 = C::xreg_new(ctx, v7);
+                    let v9 = C::xreg_new(ctx, arg0);
+                    let v10 = constructor_rv_or(ctx, v9, v8);
+                    let v11 = C::xreg_to_reg(ctx, v10);
+                    // Rule at src/isa/riscv64/inst.isle line 2135.
+                    return v11;
+                }
+                _ => {}
+            }
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "gen_bseti", "src/isa/riscv64/inst.isle line 2134"
+    )
+}
+
+// Generated as internal constructor for term gen_popcnt.
+pub fn constructor_gen_popcnt<C: Context>(ctx: &mut C, arg0: Reg, arg1: Type) -> Reg {
+    let v2 = constructor_temp_writable_xreg(ctx);
+    let v3 = constructor_temp_writable_xreg(ctx);
+    let v4 = constructor_temp_writable_xreg(ctx);
+    let v5 = C::writable_xreg_to_writable_reg(ctx, v4);
+    let v6 = C::writable_xreg_to_writable_reg(ctx, v3);
+    let v7 = C::writable_xreg_to_writable_reg(ctx, v2);
+    let v8 = MInst::Popcnt {
+        sum: v5,
+        step: v6,
+        tmp: v7,
+        rs: arg0,
+        ty: arg1,
+    };
+    let v9 = C::emit(ctx, &v8);
+    let v10 = C::writable_reg_to_reg(ctx, v5);
+    // Rule at src/isa/riscv64/inst.isle line 2153.
+    return v10;
+}
+
+// Generated as internal constructor for term lower_popcnt.
+pub fn constructor_lower_popcnt<C: Context>(ctx: &mut C, arg0: XReg, arg1: Type) -> XReg {
+    let v2 = C::has_zbb(ctx);
+    match v2 {
+        true => {
+            let v4 = constructor_zext(ctx, arg0, arg1, I64);
+            let v5 = constructor_rv_cpop(ctx, v4);
+            // Rule at src/isa/riscv64/inst.isle line 2162.
+            return v5;
+        }
+        false => {
+            let v6 = C::xreg_to_reg(ctx, arg0);
+            let v7 = constructor_gen_popcnt(ctx, v6, arg1);
+            let v8 = C::xreg_new(ctx, v7);
+            // Rule at src/isa/riscv64/inst.isle line 2166.
+            return v8;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "lower_popcnt", "src/isa/riscv64/inst.isle line 2161"
+    )
+}
+
+// Generated as internal constructor for term lower_popcnt_i128.
+pub fn constructor_lower_popcnt_i128<C: Context>(ctx: &mut C, arg0: ValueRegs) -> ValueRegs {
+    let v2 = C::value_regs_get(ctx, arg0, 0x0);
+    let v3 = C::xreg_new(ctx, v2);
+    let v5 = constructor_lower_popcnt(ctx, v3, I64);
+    let v7 = C::value_regs_get(ctx, arg0, 0x1);
+    let v8 = C::xreg_new(ctx, v7);
+    let v9 = constructor_lower_popcnt(ctx, v8, I64);
+    let v10 = constructor_rv_add(ctx, v5, v9);
+    let v13 = C::load_u64_constant(ctx, 0x0);
+    let v11 = C::xreg_to_reg(ctx, v10);
+    let v14 = C::value_regs(ctx, v11, v13);
+    // Rule at src/isa/riscv64/inst.isle line 2172.
+    return v14;
+}
+
+// Generated as internal constructor for term lower_i128_rotl.
+pub fn constructor_lower_i128_rotl<C: Context>(
+    ctx: &mut C,
+    arg0: ValueRegs,
+    arg1: ValueRegs,
+) -> ValueRegs {
+    let v4 = C::value_regs_get(ctx, arg1, 0x0);
+    let v5 = C::xreg_new(ctx, v4);
+    let v6 = C::gen_shamt(ctx, I128, v5);
+    let v7 = C::value_regs_get(ctx, v6, 0x0);
+    let v8 = C::xreg_new(ctx, v7);
+    let v10 = C::value_regs_get(ctx, v6, 0x1);
+    let v11 = C::xreg_new(ctx, v10);
+    let v12 = C::value_regs_get(ctx, arg0, 0x0);
+    let v13 = C::xreg_new(ctx, v12);
+    let v14 = constructor_rv_sll(ctx, v13, v8);
+    let v15 = C::value_regs_get(ctx, arg0, 0x1);
+    let v16 = C::xreg_new(ctx, v15);
+    let v17 = constructor_rv_srl(ctx, v16, v11);
+    let v19 = C::zero_reg(ctx);
+    let v20 = C::xreg_new(ctx, v19);
+    let v21 = C::zero_reg(ctx);
+    let v22 = C::xreg_to_reg(ctx, v17);
+    let v23 = C::gen_select_reg(ctx, &IntCC::Equal, v8, v20, v21, v22);
+    let v24 = C::xreg_new(ctx, v23);
+    let v25 = constructor_rv_or(ctx, v14, v24);
+    let v26 = C::value_regs_get(ctx, arg0, 0x1);
+    let v27 = C::xreg_new(ctx, v26);
+    let v28 = constructor_rv_sll(ctx, v27, v8);
+    let v29 = C::value_regs_get(ctx, arg0, 0x0);
+    let v30 = C::xreg_new(ctx, v29);
+    let v31 = constructor_rv_srl(ctx, v30, v11);
+    let v32 = C::zero_reg(ctx);
+    let v33 = C::xreg_new(ctx, v32);
+    let v34 = C::zero_reg(ctx);
+    let v35 = C::xreg_to_reg(ctx, v31);
+    let v36 = C::gen_select_reg(ctx, &IntCC::Equal, v8, v33, v34, v35);
+    let v37 = C::xreg_new(ctx, v36);
+    let v38 = constructor_rv_or(ctx, v28, v37);
+    let v40 = C::load_u64_constant(ctx, 0x40);
+    let v41 = C::xreg_new(ctx, v40);
+    let v42 = C::value_regs_get(ctx, arg1, 0x0);
+    let v43 = C::xreg_new(ctx, v42);
+    let v45 = C::imm12_const(ctx, 0x7F);
+    let v46 = constructor_rv_andi(ctx, v43, v45);
+    let v48 = C::xreg_to_reg(ctx, v38);
+    let v49 = C::xreg_to_reg(ctx, v25);
+    let v50 = C::gen_select_reg(ctx, &IntCC::UnsignedGreaterThanOrEqual, v46, v41, v48, v49);
+    let v51 = C::gen_select_reg(ctx, &IntCC::UnsignedGreaterThanOrEqual, v46, v41, v49, v48);
+    let v52 = C::value_regs(ctx, v50, v51);
+    // Rule at src/isa/riscv64/inst.isle line 2184.
+    return v52;
+}
+
+// Generated as internal constructor for term lower_i128_rotr.
+pub fn constructor_lower_i128_rotr<C: Context>(
+    ctx: &mut C,
+    arg0: ValueRegs,
+    arg1: ValueRegs,
+) -> ValueRegs {
+    let v4 = C::value_regs_get(ctx, arg1, 0x0);
+    let v5 = C::xreg_new(ctx, v4);
+    let v6 = C::gen_shamt(ctx, I128, v5);
+    let v7 = C::value_regs_get(ctx, v6, 0x0);
+    let v8 = C::xreg_new(ctx, v7);
+    let v10 = C::value_regs_get(ctx, v6, 0x1);
+    let v11 = C::xreg_new(ctx, v10);
+    let v12 = C::value_regs_get(ctx, arg0, 0x0);
+    let v13 = C::xreg_new(ctx, v12);
+    let v14 = constructor_rv_srl(ctx, v13, v8);
+    let v15 = C::value_regs_get(ctx, arg0, 0x1);
+    let v16 = C::xreg_new(ctx, v15);
+    let v17 = constructor_rv_sll(ctx, v16, v11);
+    let v19 = C::zero_reg(ctx);
+    let v20 = C::xreg_new(ctx, v19);
+    let v21 = C::zero_reg(ctx);
+    let v22 = C::xreg_to_reg(ctx, v17);
+    let v23 = C::gen_select_reg(ctx, &IntCC::Equal, v8, v20, v21, v22);
+    let v24 = C::xreg_new(ctx, v23);
+    let v25 = constructor_rv_or(ctx, v14, v24);
+    let v26 = C::value_regs_get(ctx, arg0, 0x1);
+    let v27 = C::xreg_new(ctx, v26);
+    let v28 = constructor_rv_srl(ctx, v27, v8);
+    let v29 = C::value_regs_get(ctx, arg0, 0x0);
+    let v30 = C::xreg_new(ctx, v29);
+    let v31 = constructor_rv_sll(ctx, v30, v11);
+    let v32 = C::zero_reg(ctx);
+    let v33 = C::xreg_new(ctx, v32);
+    let v34 = C::zero_reg(ctx);
+    let v35 = C::xreg_to_reg(ctx, v31);
+    let v36 = C::gen_select_reg(ctx, &IntCC::Equal, v8, v33, v34, v35);
+    let v37 = C::xreg_new(ctx, v36);
+    let v38 = constructor_rv_or(ctx, v28, v37);
+    let v40 = C::load_u64_constant(ctx, 0x40);
+    let v41 = C::xreg_new(ctx, v40);
+    let v42 = C::value_regs_get(ctx, arg1, 0x0);
+    let v43 = C::xreg_new(ctx, v42);
+    let v45 = C::imm12_const(ctx, 0x7F);
+    let v46 = constructor_rv_andi(ctx, v43, v45);
+    let v48 = C::xreg_to_reg(ctx, v38);
+    let v49 = C::xreg_to_reg(ctx, v25);
+    let v50 = C::gen_select_reg(ctx, &IntCC::UnsignedGreaterThanOrEqual, v46, v41, v48, v49);
+    let v51 = C::gen_select_reg(ctx, &IntCC::UnsignedGreaterThanOrEqual, v46, v41, v49, v48);
+    let v52 = C::value_regs(ctx, v50, v51);
+    // Rule at src/isa/riscv64/inst.isle line 2213.
+    return v52;
+}
+
+// Generated as internal constructor for term gen_load.
+pub fn constructor_gen_load<C: Context>(
+    ctx: &mut C,
+    arg0: Reg,
+    arg1: Offset32,
+    arg2: &LoadOP,
+    arg3: MemFlags,
+    arg4: Type,
+) -> Reg {
+    let v5 = C::temp_writable_reg(ctx, arg4);
+    let v7 = C::gen_amode(ctx, arg0, arg1, I64);
+    let v8 = MInst::Load {
+        rd: v5,
+        op: arg2.clone(),
+        flags: arg3,
+        from: v7,
+    };
+    let v9 = C::emit(ctx, &v8);
+    let v10 = C::writable_reg_to_reg(ctx, v5);
+    // Rule at src/isa/riscv64/inst.isle line 2253.
+    return v10;
+}
+
+// Generated as internal constructor for term gen_load_128.
+pub fn constructor_gen_load_128<C: Context>(
+    ctx: &mut C,
+    arg0: Reg,
+    arg1: Offset32,
+    arg2: MemFlags,
+) -> ValueRegs {
+    let v5 = constructor_gen_load(ctx, arg0, arg1, &LoadOP::Ld, arg2, I64);
+    let v7 = C::offset32_add(ctx, arg1, 0x8);
+    let v8 = constructor_gen_load(ctx, arg0, v7, &LoadOP::Ld, arg2, I64);
+    let v9 = C::value_regs(ctx, v5, v8);
+    // Rule at src/isa/riscv64/inst.isle line 2261.
+    return v9;
+}
+
+// Generated as internal constructor for term gen_store.
+pub fn constructor_gen_store<C: Context>(
+    ctx: &mut C,
+    arg0: Reg,
+    arg1: Offset32,
+    arg2: &StoreOP,
+    arg3: MemFlags,
+    arg4: Reg,
+) -> InstOutput {
+    let v6 = C::gen_amode(ctx, arg0, arg1, I64);
+    let v7 = MInst::Store {
+        to: v6,
+        op: arg2.clone(),
+        flags: arg3,
+        src: arg4,
+    };
+    let v8 = SideEffectNoResult::Inst { inst: v7 };
+    let v9 = constructor_side_effect(ctx, &v8);
+    // Rule at src/isa/riscv64/inst.isle line 2276.
+    return v9;
+}
+
+// Generated as internal constructor for term gen_store_128.
+pub fn constructor_gen_store_128<C: Context>(
+    ctx: &mut C,
+    arg0: Reg,
+    arg1: Offset32,
+    arg2: MemFlags,
+    arg3: ValueRegs,
+) -> InstOutput {
+    let v5 = C::gen_amode(ctx, arg0, arg1, I64);
+    let v8 = C::value_regs_get(ctx, arg3, 0x0);
+    let v11 = C::offset32_add(ctx, arg1, 0x8);
+    let v12 = C::gen_amode(ctx, arg0, v11, I64);
+    let v14 = C::value_regs_get(ctx, arg3, 0x1);
+    let v9 = MInst::Store {
+        to: v5,
+        op: StoreOP::Sd,
+        flags: arg2,
+        src: v8,
+    };
+    let v15 = MInst::Store {
+        to: v12,
+        op: StoreOP::Sd,
+        flags: arg2,
+        src: v14,
+    };
+    let v16 = SideEffectNoResult::Inst2 {
+        inst1: v9,
+        inst2: v15,
+    };
+    let v17 = constructor_side_effect(ctx, &v16);
+    // Rule at src/isa/riscv64/inst.isle line 2282.
+    return v17;
+}
+
+// Generated as internal constructor for term gen_atomic.
+pub fn constructor_gen_atomic<C: Context>(
+    ctx: &mut C,
+    arg0: &AtomicOP,
+    arg1: Reg,
+    arg2: Reg,
+    arg3: AMO,
+) -> Reg {
+    let v4 = constructor_temp_writable_xreg(ctx);
+    let v5 = C::writable_xreg_to_writable_reg(ctx, v4);
+    let v6 = MInst::Atomic {
+        op: arg0.clone(),
+        rd: v5,
+        addr: arg1,
+        src: arg2,
+        amo: arg3,
+    };
+    let v7 = C::emit(ctx, &v6);
+    let v8 = constructor_writable_xreg_to_reg(ctx, v4);
+    // Rule at src/isa/riscv64/inst.isle line 2295.
+    return v8;
+}
+
+// Generated as internal constructor for term get_atomic_rmw_op.
+pub fn constructor_get_atomic_rmw_op<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &AtomicRmwOp,
+) -> AtomicOP {
+    match arg0 {
+        I32 => {
+            match arg1 {
+                &AtomicRmwOp::Add => {
+                    // Rule at src/isa/riscv64/inst.isle line 2304.
+                    return AtomicOP::AmoaddW;
+                }
+                &AtomicRmwOp::And => {
+                    // Rule at src/isa/riscv64/inst.isle line 2311.
+                    return AtomicOP::AmoandW;
+                }
+                &AtomicRmwOp::Or => {
+                    // Rule at src/isa/riscv64/inst.isle line 2319.
+                    return AtomicOP::AmoorW;
+                }
+                &AtomicRmwOp::Smax => {
+                    // Rule at src/isa/riscv64/inst.isle line 2327.
+                    return AtomicOP::AmomaxW;
+                }
+                &AtomicRmwOp::Smin => {
+                    // Rule at src/isa/riscv64/inst.isle line 2335.
+                    return AtomicOP::AmominW;
+                }
+                &AtomicRmwOp::Umax => {
+                    // Rule at src/isa/riscv64/inst.isle line 2343.
+                    return AtomicOP::AmomaxuW;
+                }
+                &AtomicRmwOp::Umin => {
+                    // Rule at src/isa/riscv64/inst.isle line 2352.
+                    return AtomicOP::AmominuW;
+                }
+                &AtomicRmwOp::Xchg => {
+                    // Rule at src/isa/riscv64/inst.isle line 2360.
+                    return AtomicOP::AmoswapW;
+                }
+                &AtomicRmwOp::Xor => {
+                    // Rule at src/isa/riscv64/inst.isle line 2368.
+                    return AtomicOP::AmoxorW;
+                }
+                _ => {}
+            }
+        }
+        I64 => {
+            match arg1 {
+                &AtomicRmwOp::Add => {
+                    // Rule at src/isa/riscv64/inst.isle line 2307.
+                    return AtomicOP::AmoaddD;
+                }
+                &AtomicRmwOp::And => {
+                    // Rule at src/isa/riscv64/inst.isle line 2315.
+                    return AtomicOP::AmoandD;
+                }
+                &AtomicRmwOp::Or => {
+                    // Rule at src/isa/riscv64/inst.isle line 2323.
+                    return AtomicOP::AmoorD;
+                }
+                &AtomicRmwOp::Smax => {
+                    // Rule at src/isa/riscv64/inst.isle line 2331.
+                    return AtomicOP::AmomaxD;
+                }
+                &AtomicRmwOp::Smin => {
+                    // Rule at src/isa/riscv64/inst.isle line 2339.
+                    return AtomicOP::AmominD;
+                }
+                &AtomicRmwOp::Umax => {
+                    // Rule at src/isa/riscv64/inst.isle line 2348.
+                    return AtomicOP::AmomaxuD;
+                }
+                &AtomicRmwOp::Umin => {
+                    // Rule at src/isa/riscv64/inst.isle line 2356.
+                    return AtomicOP::AmominuD;
+                }
+                &AtomicRmwOp::Xchg => {
+                    // Rule at src/isa/riscv64/inst.isle line 2364.
+                    return AtomicOP::AmoswapD;
+                }
+                &AtomicRmwOp::Xor => {
+                    // Rule at src/isa/riscv64/inst.isle line 2372.
+                    return AtomicOP::AmoxorD;
+                }
+                _ => {}
+            }
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "get_atomic_rmw_op", "src/isa/riscv64/inst.isle line 2302"
+    )
+}
+
+// Generated as internal constructor for term gen_atomic_load.
+pub fn constructor_gen_atomic_load<C: Context>(ctx: &mut C, arg0: Reg, arg1: Type) -> Reg {
+    let v2 = constructor_temp_writable_xreg(ctx);
+    let v3 = C::writable_xreg_to_writable_reg(ctx, v2);
+    let v4 = MInst::AtomicLoad {
+        rd: v3,
+        ty: arg1,
+        p: arg0,
+    };
+    let v5 = C::emit(ctx, &v4);
+    let v6 = C::writable_reg_to_reg(ctx, v3);
+    // Rule at src/isa/riscv64/inst.isle line 2381.
+    return v6;
+}
+
+// Generated as internal constructor for term gen_atomic_store.
+pub fn constructor_gen_atomic_store<C: Context>(
+    ctx: &mut C,
+    arg0: Reg,
+    arg1: Type,
+    arg2: Reg,
+) -> InstOutput {
+    let v3 = MInst::AtomicStore {
+        src: arg2,
+        ty: arg1,
+        p: arg0,
+    };
+    let v4 = SideEffectNoResult::Inst { inst: v3 };
+    let v5 = constructor_side_effect(ctx, &v4);
+    // Rule at src/isa/riscv64/inst.isle line 2390.
+    return v5;
+}
+
+// Generated as internal constructor for term gen_select.
+pub fn constructor_gen_select<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: ValueRegs,
+    arg3: ValueRegs,
+) -> ValueRegs {
+    let v4 = &C::alloc_vec_writable(ctx, arg0);
+    let v5 = &C::vec_writable_clone(ctx, v4);
+    let v6 = MInst::Select {
+        dst: v4.clone(),
+        ty: arg0,
+        condition: arg1,
+        x: arg2,
+        y: arg3,
+    };
+    let v7 = C::emit(ctx, &v6);
+    let v8 = C::vec_writable_to_regs(ctx, v5);
+    // Rule at src/isa/riscv64/inst.isle line 2401.
+    return v8;
+}
+
+// Generated as internal constructor for term gen_int_select.
+pub fn constructor_gen_int_select<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &IntSelectOP,
+    arg2: ValueRegs,
+    arg3: ValueRegs,
+) -> ValueRegs {
+    let v4 = &C::alloc_vec_writable(ctx, arg0);
+    let v5 = &C::vec_writable_clone(ctx, v4);
+    let v6 = MInst::IntSelect {
+        op: arg1.clone(),
+        dst: v5.clone(),
+        x: arg2,
+        y: arg3,
+        ty: arg0,
+    };
+    let v7 = C::emit(ctx, &v6);
+    let v8 = C::vec_writable_to_regs(ctx, v4);
+    // Rule at src/isa/riscv64/inst.isle line 2430.
+    return v8;
+}
+
+// Generated as internal constructor for term udf.
+pub fn constructor_udf<C: Context>(ctx: &mut C, arg0: &TrapCode) -> InstOutput {
+    let v1 = MInst::Udf {
+        trap_code: arg0.clone(),
+    };
+    let v2 = SideEffectNoResult::Inst { inst: v1 };
+    let v3 = constructor_side_effect(ctx, &v2);
+    // Rule at src/isa/riscv64/inst.isle line 2440.
+    return v3;
+}
+
+// Generated as internal constructor for term int_load_op.
+pub fn constructor_int_load_op<C: Context>(ctx: &mut C, arg0: bool, arg1: u8) -> LoadOP {
+    match arg1 {
+        0x8 => {
+            match arg0 {
+                true => {
+                    // Rule at src/isa/riscv64/inst.isle line 2456.
+                    return LoadOP::Lb;
+                }
+                false => {
+                    // Rule at src/isa/riscv64/inst.isle line 2452.
+                    return LoadOP::Lbu;
+                }
+                _ => {}
+            }
+        }
+        0x10 => {
+            match arg0 {
+                true => {
+                    // Rule at src/isa/riscv64/inst.isle line 2463.
+                    return LoadOP::Lh;
+                }
+                false => {
+                    // Rule at src/isa/riscv64/inst.isle line 2460.
+                    return LoadOP::Lhu;
+                }
+                _ => {}
+            }
+        }
+        0x20 => {
+            match arg0 {
+                true => {
+                    // Rule at src/isa/riscv64/inst.isle line 2469.
+                    return LoadOP::Lw;
+                }
+                false => {
+                    // Rule at src/isa/riscv64/inst.isle line 2466.
+                    return LoadOP::Lwu;
+                }
+                _ => {}
+            }
+        }
+        0x40 => {
+            // Rule at src/isa/riscv64/inst.isle line 2473.
+            return LoadOP::Ld;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "int_load_op", "src/isa/riscv64/inst.isle line 2450"
+    )
+}
+
+// Generated as internal constructor for term gen_fcvt_int.
+pub fn constructor_gen_fcvt_int<C: Context>(
+    ctx: &mut C,
+    arg0: bool,
+    arg1: FReg,
+    arg2: bool,
+    arg3: Type,
+    arg4: Type,
+) -> XReg {
+    let v5 = C::temp_writable_reg(ctx, arg4);
+    let v6 = constructor_temp_writable_freg(ctx);
+    let v7 = C::writable_freg_to_writable_reg(ctx, v6);
+    let v8 = C::freg_to_reg(ctx, arg1);
+    let v9 = MInst::FcvtToInt {
+        is_sat: arg0,
+        rd: v5,
+        tmp: v7,
+        rs: v8,
+        is_signed: arg2,
+        in_type: arg3,
+        out_type: arg4,
+    };
+    let v10 = C::emit(ctx, &v9);
+    let v11 = C::writable_reg_to_reg(ctx, v5);
+    let v12 = C::xreg_new(ctx, v11);
+    // Rule at src/isa/riscv64/inst.isle line 2486.
+    return v12;
+}
+
+// Generated as internal constructor for term lower_float_binary.
+pub fn constructor_lower_float_binary<C: Context>(
+    ctx: &mut C,
+    arg0: &AluOPRRR,
+    arg1: FReg,
+    arg2: FReg,
+    arg3: Type,
+) -> FReg {
+    let v4 = constructor_move_f_to_x(ctx, arg1, arg3);
+    let v5 = constructor_move_f_to_x(ctx, arg2, arg3);
+    let v6 = C::xreg_to_reg(ctx, v4);
+    let v7 = C::xreg_to_reg(ctx, v5);
+    let v8 = constructor_alu_rrr(ctx, arg0, v6, v7);
+    let v9 = C::xreg_new(ctx, v8);
+    let v10 = constructor_float_int_of_same_size(ctx, arg3);
+    let v11 = constructor_move_x_to_f(ctx, v9, v10);
+    // Rule at src/isa/riscv64/inst.isle line 2499.
+    return v11;
+}
+
+// Generated as internal constructor for term lower_icmp.
+pub fn constructor_lower_icmp<C: Context>(
+    ctx: &mut C,
+    arg0: &IntCC,
+    arg1: ValueRegs,
+    arg2: ValueRegs,
+    arg3: Type,
+) -> Reg {
+    let v4 = &C::signed_cond_code(ctx, arg0);
+    if let Some(v5) = v4 {
+        let v7 = constructor_ext_int_if_need(ctx, true, arg1, arg3);
+        let v8 = constructor_ext_int_if_need(ctx, true, arg2, arg3);
+        let v9 = constructor_gen_icmp(ctx, arg0, v7, v8, arg3);
+        let v10 = C::xreg_to_reg(ctx, v9);
+        // Rule at src/isa/riscv64/inst.isle line 2508.
+        return v10;
+    }
+    let v12 = constructor_ext_int_if_need(ctx, false, arg1, arg3);
+    let v13 = constructor_ext_int_if_need(ctx, false, arg2, arg3);
+    let v14 = constructor_gen_icmp(ctx, arg0, v12, v13, arg3);
+    let v15 = C::xreg_to_reg(ctx, v14);
+    // Rule at src/isa/riscv64/inst.isle line 2511.
+    return v15;
+}
+
+// Generated as internal constructor for term i128_sub.
+pub fn constructor_i128_sub<C: Context>(
+    ctx: &mut C,
+    arg0: ValueRegs,
+    arg1: ValueRegs,
+) -> ValueRegs {
+    let v3 = C::value_regs_get(ctx, arg0, 0x0);
+    let v4 = C::xreg_new(ctx, v3);
+    let v5 = C::value_regs_get(ctx, arg1, 0x0);
+    let v6 = C::xreg_new(ctx, v5);
+    let v7 = constructor_rv_sub(ctx, v4, v6);
+    let v8 = C::value_regs_get(ctx, arg0, 0x0);
+    let v9 = C::xreg_new(ctx, v8);
+    let v10 = constructor_rv_sltu(ctx, v9, v7);
+    let v12 = C::value_regs_get(ctx, arg0, 0x1);
+    let v13 = C::xreg_new(ctx, v12);
+    let v14 = C::value_regs_get(ctx, arg1, 0x1);
+    let v15 = C::xreg_new(ctx, v14);
+    let v16 = constructor_rv_sub(ctx, v13, v15);
+    let v17 = constructor_rv_sub(ctx, v16, v10);
+    let v18 = C::xreg_to_reg(ctx, v7);
+    let v19 = C::xreg_to_reg(ctx, v17);
+    let v20 = C::value_regs(ctx, v18, v19);
+    // Rule at src/isa/riscv64/inst.isle line 2517.
+    return v20;
+}
+
+// Generated as internal constructor for term lower_uadd_overflow.
+pub fn constructor_lower_uadd_overflow<C: Context>(
+    ctx: &mut C,
+    arg0: XReg,
+    arg1: XReg,
+    arg2: Type,
+) -> ValueRegs {
+    if arg2 == I64 {
+        let v3 = constructor_rv_add(ctx, arg0, arg1);
+        let v5 = C::xreg_to_reg(ctx, v3);
+        let v6 = C::value_reg(ctx, v5);
+        let v7 = C::xreg_to_reg(ctx, arg0);
+        let v8 = C::value_reg(ctx, v7);
+        let v10 = constructor_gen_icmp(ctx, &IntCC::UnsignedLessThan, v6, v8, I64);
+        let v11 = C::xreg_to_reg(ctx, v10);
+        let v12 = C::value_regs(ctx, v5, v11);
+        // Rule at src/isa/riscv64/inst.isle line 2533.
+        return v12;
+    }
+    let v13 = C::fits_in_32(ctx, arg2);
+    if let Some(v14) = v13 {
+        let v15 = constructor_zext(ctx, arg0, v14, I64);
+        let v16 = constructor_zext(ctx, arg1, v14, I64);
+        let v17 = constructor_rv_add(ctx, v15, v16);
+        let v18 = C::ty_bits(ctx, v14);
+        let v19 = C::u8_as_i32(ctx, v18);
+        let v20 = C::imm12_const(ctx, v19);
+        let v21 = constructor_rv_srli(ctx, v17, v20);
+        let v22 = C::xreg_to_reg(ctx, v17);
+        let v23 = C::xreg_to_reg(ctx, v21);
+        let v24 = C::value_regs(ctx, v22, v23);
+        // Rule at src/isa/riscv64/inst.isle line 2540.
+        return v24;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "lower_uadd_overflow", "src/isa/riscv64/inst.isle line 2531"
+    )
+}
+
+// Generated as internal constructor for term gen_jump.
+pub fn constructor_gen_jump<C: Context>(ctx: &mut C, arg0: MachLabel) -> MInst {
+    let v1 = C::label_to_br_target(ctx, arg0);
+    let v2 = MInst::Jal { dest: v1 };
+    // Rule at src/isa/riscv64/inst.isle line 2552.
+    return v2;
+}
+
+// Generated as internal constructor for term lower_branch.
+pub fn constructor_lower_branch<C: Context>(
+    ctx: &mut C,
+    arg0: Inst,
+    arg1: &VecMachLabel,
+) -> Option<Unit> {
+    let v1 = &C::inst_data(ctx, arg0);
+    match v1 {
+        &InstructionData::BranchTable {
+            opcode: ref v70,
+            arg: v71,
+            table: v72,
+        } => {
+            if let &Opcode::BrTable = v70 {
+                let v73 = C::put_in_reg(ctx, v71);
+                let v74 = C::lower_br_table(ctx, v73, arg1);
+                // Rule at src/isa/riscv64/inst.isle line 2642.
+                return Some(v74);
+            }
+        }
+        &InstructionData::Brif {
+            opcode: ref v10,
+            arg: v11,
+            blocks: ref v12,
+        } => {
+            if let &Opcode::Brif = v10 {
+                let v13 = C::value_type(ctx, v11);
+                if v13 == I128 {
+                    let v22 = C::zero_reg(ctx);
+                    let v23 = C::zero_reg(ctx);
+                    let v24 = C::value_regs(ctx, v22, v23);
+                    let v25 = C::put_in_regs(ctx, v11);
+                    let v27 = constructor_gen_icmp(ctx, &IntCC::NotEqual, v25, v24, I128);
+                    let v28 = C::xreg_to_reg(ctx, v27);
+                    let v29 = C::value_reg(ctx, v28);
+                    let v31 = C::lower_cond_br(ctx, &IntCC::NotEqual, v29, arg1, I64);
+                    // Rule at src/isa/riscv64/inst.isle line 2611.
+                    return Some(v31);
+                }
+                let v32 = C::maybe_uextend(ctx, v11);
+                if let Some(v33) = v32 {
+                    let v34 = C::def_inst(ctx, v33);
+                    if let Some(v35) = v34 {
+                        let v36 = &C::inst_data(ctx, v35);
+                        match v36 {
+                            &InstructionData::FloatCompare {
+                                opcode: ref v47,
+                                args: ref v48,
+                                cond: ref v49,
+                            } => {
+                                if let &Opcode::Fcmp = v47 {
+                                    let v54 = C::floatcc_unordered(ctx, v49);
+                                    match v54 {
+                                        true => {
+                                            let v6 = C::vec_label_get(ctx, arg1, 0x0);
+                                            let v55 = C::label_to_br_target(ctx, v6);
+                                            let v57 = C::vec_label_get(ctx, arg1, 0x1);
+                                            let v58 = C::label_to_br_target(ctx, v57);
+                                            let v59 = &C::floatcc_inverse(ctx, v49);
+                                            let v50 = C::unpack_value_array_2(ctx, v48);
+                                            let v60 = constructor_put_in_freg(ctx, v50.0);
+                                            let v61 = constructor_put_in_freg(ctx, v50.1);
+                                            let v53 = C::value_type(ctx, v50.0);
+                                            let v62 =
+                                                &constructor_emit_fcmp(ctx, v59, v53, v60, v61);
+                                            let v63 = &constructor_cond_br(ctx, v62, v58, v55);
+                                            let v64 = constructor_emit_side_effect(ctx, v63);
+                                            // Rule at src/isa/riscv64/inst.isle line 2623.
+                                            return Some(v64);
+                                        }
+                                        false => {
+                                            let v6 = C::vec_label_get(ctx, arg1, 0x0);
+                                            let v55 = C::label_to_br_target(ctx, v6);
+                                            let v57 = C::vec_label_get(ctx, arg1, 0x1);
+                                            let v58 = C::label_to_br_target(ctx, v57);
+                                            let v50 = C::unpack_value_array_2(ctx, v48);
+                                            let v65 = constructor_put_in_freg(ctx, v50.0);
+                                            let v66 = constructor_put_in_freg(ctx, v50.1);
+                                            let v53 = C::value_type(ctx, v50.0);
+                                            let v67 =
+                                                &constructor_emit_fcmp(ctx, v49, v53, v65, v66);
+                                            let v68 = &constructor_cond_br(ctx, v67, v55, v58);
+                                            let v69 = constructor_emit_side_effect(ctx, v68);
+                                            // Rule at src/isa/riscv64/inst.isle line 2630.
+                                            return Some(v69);
+                                        }
+                                        _ => {}
+                                    }
+                                }
+                            }
+                            &InstructionData::IntCompare {
+                                opcode: ref v37,
+                                args: ref v38,
+                                cond: ref v39,
+                            } => {
+                                if let &Opcode::Icmp = v37 {
+                                    let v40 = C::unpack_value_array_2(ctx, v38);
+                                    let v44 = C::put_in_regs(ctx, v40.0);
+                                    let v45 = C::put_in_regs(ctx, v40.1);
+                                    let v43 = C::value_type(ctx, v40.0);
+                                    let v46 = C::lower_br_icmp(ctx, v39, v44, v45, arg1, v43);
+                                    // Rule at src/isa/riscv64/inst.isle line 2618.
+                                    return Some(v46);
+                                }
+                            }
+                            _ => {}
+                        }
+                    }
+                }
+                let v18 = C::put_in_regs(ctx, v11);
+                let v20 = constructor_normalize_cmp_value(ctx, v13, v18, &ExtendOp::Zero);
+                let v21 = C::lower_cond_br(ctx, &IntCC::NotEqual, v20, arg1, v13);
+                // Rule at src/isa/riscv64/inst.isle line 2607.
+                return Some(v21);
+            }
+        }
+        &InstructionData::Jump {
+            opcode: ref v2,
+            destination: v3,
+        } => {
+            if let &Opcode::Jump = v2 {
+                let v6 = C::vec_label_get(ctx, arg1, 0x0);
+                let v7 = &constructor_gen_jump(ctx, v6);
+                let v8 = SideEffectNoResult::Inst { inst: v7.clone() };
+                let v9 = constructor_emit_side_effect(ctx, &v8);
+                // Rule at src/isa/riscv64/inst.isle line 2559.
+                return Some(v9);
+            }
+        }
+        _ => {}
+    }
+    None
+}
+
+// Generated as internal constructor for term normalize_cmp_value.
+pub fn constructor_normalize_cmp_value<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: ValueRegs,
+    arg2: &ExtendOp,
+) -> ValueRegs {
+    let v1 = C::fits_in_32(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v6 = constructor_extend(ctx, arg1, arg2, v2, I64);
+        // Rule at src/isa/riscv64/inst.isle line 2582.
+        return v6;
+    }
+    match arg0 {
+        I64 => {
+            // Rule at src/isa/riscv64/inst.isle line 2585.
+            return arg1;
+        }
+        I128 => {
+            // Rule at src/isa/riscv64/inst.isle line 2586.
+            return arg1;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "normalize_cmp_value", "src/isa/riscv64/inst.isle line 2580"
+    )
+}
+
+// Generated as internal constructor for term normalize_fcvt_from_int.
+pub fn constructor_normalize_fcvt_from_int<C: Context>(
+    ctx: &mut C,
+    arg0: XReg,
+    arg1: Type,
+    arg2: &ExtendOp,
+) -> XReg {
+    let v2 = C::fits_in_16(ctx, arg1);
+    if let Some(v3) = v2 {
+        let v5 = C::xreg_to_reg(ctx, arg0);
+        let v6 = C::value_reg(ctx, v5);
+        let v8 = constructor_extend(ctx, v6, arg2, v3, I64);
+        let v10 = C::value_regs_get(ctx, v8, 0x0);
+        let v11 = C::xreg_new(ctx, v10);
+        // Rule at src/isa/riscv64/inst.isle line 2589.
+        return v11;
+    }
+    // Rule at src/isa/riscv64/inst.isle line 2591.
+    return arg0;
+}
+
+// Generated as internal constructor for term truthy_to_reg.
+pub fn constructor_truthy_to_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: ValueRegs) -> XReg {
+    let v1 = C::fits_in_64(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v5 = C::value_regs_get(ctx, arg1, 0x0);
+        let v6 = C::xreg_new(ctx, v5);
+        // Rule at src/isa/riscv64/inst.isle line 2598.
+        return v6;
+    }
+    if arg0 == I128 {
+        let v5 = C::value_regs_get(ctx, arg1, 0x0);
+        let v6 = C::xreg_new(ctx, v5);
+        let v8 = C::value_regs_get(ctx, arg1, 0x1);
+        let v9 = C::xreg_new(ctx, v8);
+        let v10 = constructor_rv_or(ctx, v6, v9);
+        // Rule at src/isa/riscv64/inst.isle line 2600.
+        return v10;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "truthy_to_reg", "src/isa/riscv64/inst.isle line 2597"
+    )
+}
+
+// Generated as internal constructor for term gen_bitcast.
+pub fn constructor_gen_bitcast<C: Context>(ctx: &mut C, arg0: Reg, arg1: Type, arg2: Type) -> Reg {
+    match arg1 {
+        I32 => {
+            if arg2 == F32 {
+                let v8 = C::xreg_new(ctx, arg0);
+                let v9 = constructor_rv_fmvwx(ctx, v8);
+                let v10 = C::freg_to_reg(ctx, v9);
+                // Rule at src/isa/riscv64/inst.isle line 2654.
+                return v10;
+            }
+        }
+        I64 => {
+            if arg2 == F64 {
+                let v8 = C::xreg_new(ctx, arg0);
+                let v11 = constructor_rv_fmvdx(ctx, v8);
+                let v12 = C::freg_to_reg(ctx, v11);
+                // Rule at src/isa/riscv64/inst.isle line 2655.
+                return v12;
+            }
+        }
+        F32 => {
+            if arg2 == I32 {
+                let v3 = C::freg_new(ctx, arg0);
+                let v4 = constructor_rv_fmvxw(ctx, v3);
+                let v5 = C::xreg_to_reg(ctx, v4);
+                // Rule at src/isa/riscv64/inst.isle line 2652.
+                return v5;
+            }
+        }
+        F64 => {
+            if arg2 == I64 {
+                let v3 = C::freg_new(ctx, arg0);
+                let v6 = constructor_rv_fmvxd(ctx, v3);
+                let v7 = C::xreg_to_reg(ctx, v6);
+                // Rule at src/isa/riscv64/inst.isle line 2653.
+                return v7;
+            }
+        }
+        _ => {}
+    }
+    // Rule at src/isa/riscv64/inst.isle line 2656.
+    return arg0;
+}
+
+// Generated as internal constructor for term move_f_to_x.
+pub fn constructor_move_f_to_x<C: Context>(ctx: &mut C, arg0: FReg, arg1: Type) -> XReg {
+    match arg1 {
+        F32 => {
+            let v2 = C::freg_to_reg(ctx, arg0);
+            let v5 = constructor_gen_bitcast(ctx, v2, F32, I32);
+            let v6 = C::xreg_new(ctx, v5);
+            // Rule at src/isa/riscv64/inst.isle line 2659.
+            return v6;
+        }
+        F64 => {
+            let v2 = C::freg_to_reg(ctx, arg0);
+            let v9 = constructor_gen_bitcast(ctx, v2, F64, I64);
+            let v10 = C::xreg_new(ctx, v9);
+            // Rule at src/isa/riscv64/inst.isle line 2660.
+            return v10;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "move_f_to_x", "src/isa/riscv64/inst.isle line 2658"
+    )
+}
+
+// Generated as internal constructor for term move_x_to_f.
+pub fn constructor_move_x_to_f<C: Context>(ctx: &mut C, arg0: XReg, arg1: Type) -> FReg {
+    match arg1 {
+        I32 => {
+            let v2 = C::xreg_to_reg(ctx, arg0);
+            let v5 = constructor_gen_bitcast(ctx, v2, I32, F32);
+            let v6 = C::freg_new(ctx, v5);
+            // Rule at src/isa/riscv64/inst.isle line 2663.
+            return v6;
+        }
+        I64 => {
+            let v2 = C::xreg_to_reg(ctx, arg0);
+            let v9 = constructor_gen_bitcast(ctx, v2, I64, F64);
+            let v10 = C::freg_new(ctx, v9);
+            // Rule at src/isa/riscv64/inst.isle line 2664.
+            return v10;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "move_x_to_f", "src/isa/riscv64/inst.isle line 2662"
+    )
+}
+
+// Generated as internal constructor for term float_int_of_same_size.
+pub fn constructor_float_int_of_same_size<C: Context>(ctx: &mut C, arg0: Type) -> Type {
+    match arg0 {
+        F32 => {
+            // Rule at src/isa/riscv64/inst.isle line 2667.
+            return I32;
+        }
+        F64 => {
+            // Rule at src/isa/riscv64/inst.isle line 2668.
+            return I64;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "float_int_of_same_size", "src/isa/riscv64/inst.isle line 2666"
+    )
+}
+
+// Generated as internal constructor for term gen_rev8.
+pub fn constructor_gen_rev8<C: Context>(ctx: &mut C, arg0: XReg) -> XReg {
+    let v1 = C::has_zbb(ctx);
+    match v1 {
+        true => {
+            let v2 = constructor_rv_rev8(ctx, arg0);
+            // Rule at src/isa/riscv64/inst.isle line 2672.
+            return v2;
+        }
+        false => {
+            let v3 = constructor_temp_writable_xreg(ctx);
+            let v4 = constructor_temp_writable_xreg(ctx);
+            let v5 = constructor_temp_writable_xreg(ctx);
+            let v6 = C::xreg_to_reg(ctx, arg0);
+            let v7 = C::writable_xreg_to_writable_reg(ctx, v5);
+            let v8 = C::writable_xreg_to_writable_reg(ctx, v4);
+            let v9 = C::writable_xreg_to_writable_reg(ctx, v3);
+            let v10 = MInst::Rev8 {
+                rs: v6,
+                step: v7,
+                tmp: v8,
+                rd: v9,
+            };
+            let v11 = C::emit(ctx, &v10);
+            let v12 = C::writable_reg_to_reg(ctx, v9);
+            let v13 = C::xreg_new(ctx, v12);
+            // Rule at src/isa/riscv64/inst.isle line 2678.
+            return v13;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "gen_rev8", "src/isa/riscv64/inst.isle line 2671"
+    )
+}
+
+// Generated as internal constructor for term gen_brev8.
+pub fn constructor_gen_brev8<C: Context>(ctx: &mut C, arg0: Reg, arg1: Type) -> Reg {
+    let v2 = C::has_zbkb(ctx);
+    match v2 {
+        true => {
+            let v3 = C::xreg_new(ctx, arg0);
+            let v4 = constructor_rv_brev8(ctx, v3);
+            let v5 = C::xreg_to_reg(ctx, v4);
+            // Rule at src/isa/riscv64/inst.isle line 2689.
+            return v5;
+        }
+        false => {
+            let v6 = constructor_temp_writable_xreg(ctx);
+            let v7 = constructor_temp_writable_xreg(ctx);
+            let v8 = constructor_temp_writable_xreg(ctx);
+            let v9 = constructor_temp_writable_xreg(ctx);
+            let v10 = C::writable_xreg_to_writable_reg(ctx, v8);
+            let v11 = C::writable_xreg_to_writable_reg(ctx, v6);
+            let v12 = C::writable_xreg_to_writable_reg(ctx, v7);
+            let v13 = C::writable_xreg_to_writable_reg(ctx, v9);
+            let v14 = MInst::Brev8 {
+                rs: arg0,
+                ty: arg1,
+                step: v10,
+                tmp: v11,
+                tmp2: v12,
+                rd: v13,
+            };
+            let v15 = C::emit(ctx, &v14);
+            let v16 = C::writable_reg_to_reg(ctx, v13);
+            // Rule at src/isa/riscv64/inst.isle line 2694.
+            return v16;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "gen_brev8", "src/isa/riscv64/inst.isle line 2688"
+    )
+}
+
+// Generated as internal constructor for term neg.
+pub fn constructor_neg<C: Context>(ctx: &mut C, arg0: Type, arg1: ValueRegs) -> ValueRegs {
+    if arg0 == I128 {
+        let v12 = constructor_value_regs_zero(ctx);
+        let v13 = constructor_i128_sub(ctx, v12, arg1);
+        // Rule at src/isa/riscv64/inst.isle line 2711.
+        return v13;
+    }
+    let v1 = C::fits_in_64(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v3 = C::ty_int(ctx, v2);
+        if let Some(v4) = v3 {
+            let v7 = C::value_regs_get(ctx, arg1, 0x0);
+            let v8 = C::xreg_new(ctx, v7);
+            let v9 = constructor_rv_neg(ctx, v8);
+            let v10 = C::xreg_to_reg(ctx, v9);
+            let v11 = C::value_reg(ctx, v10);
+            // Rule at src/isa/riscv64/inst.isle line 2707.
+            return v11;
+        }
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "neg", "src/isa/riscv64/inst.isle line 2706"
+    )
+}
+
+// Generated as internal constructor for term max.
+pub fn constructor_max<C: Context>(ctx: &mut C, arg0: Type, arg1: XReg, arg2: XReg) -> XReg {
+    let v1 = C::fits_in_64(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v3 = C::ty_int(ctx, v2);
+        if let Some(v4) = v3 {
+            let v7 = C::has_zbb(ctx);
+            match v7 {
+                true => {
+                    let v8 = constructor_rv_max(ctx, arg1, arg2);
+                    // Rule at src/isa/riscv64/inst.isle line 2717.
+                    return v8;
+                }
+                false => {
+                    let v10 = C::xreg_to_reg(ctx, arg1);
+                    let v11 = C::xreg_to_reg(ctx, arg2);
+                    let v12 =
+                        C::gen_select_reg(ctx, &IntCC::SignedGreaterThan, arg1, arg2, v10, v11);
+                    let v13 = C::xreg_new(ctx, v12);
+                    // Rule at src/isa/riscv64/inst.isle line 2721.
+                    return v13;
+                }
+                _ => {}
+            }
+        }
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "max", "src/isa/riscv64/inst.isle line 2716"
+    )
+}
+
+// Generated as internal constructor for term gen_trapif.
+pub fn constructor_gen_trapif<C: Context>(ctx: &mut C, arg0: XReg, arg1: &TrapCode) -> InstOutput {
+    let v2 = C::xreg_to_reg(ctx, arg0);
+    let v3 = MInst::TrapIf {
+        test: v2,
+        trap_code: arg1.clone(),
+    };
+    let v4 = SideEffectNoResult::Inst { inst: v3 };
+    let v5 = constructor_side_effect(ctx, &v4);
+    // Rule at src/isa/riscv64/inst.isle line 2728.
+    return v5;
+}
+
+// Generated as internal constructor for term gen_trapifc.
+pub fn constructor_gen_trapifc<C: Context>(
+    ctx: &mut C,
+    arg0: &IntCC,
+    arg1: XReg,
+    arg2: XReg,
+    arg3: &TrapCode,
+) -> InstOutput {
+    let v4 = C::xreg_to_reg(ctx, arg1);
+    let v5 = C::xreg_to_reg(ctx, arg2);
+    let v6 = MInst::TrapIfC {
+        rs1: v4,
+        rs2: v5,
+        cc: arg0.clone(),
+        trap_code: arg3.clone(),
+    };
+    let v7 = SideEffectNoResult::Inst { inst: v6 };
+    let v8 = constructor_side_effect(ctx, &v7);
+    // Rule at src/isa/riscv64/inst.isle line 2733.
+    return v8;
+}
+
+// Generated as internal constructor for term gen_div_overflow.
+pub fn constructor_gen_div_overflow<C: Context>(
+    ctx: &mut C,
+    arg0: XReg,
+    arg1: XReg,
+    arg2: Type,
+) -> InstOutput {
+    let v4 = constructor_load_imm12(ctx, -0x1);
+    let v5 = C::xreg_new(ctx, v4);
+    let v7 = constructor_load_imm12(ctx, 0x1);
+    let v8 = C::xreg_new(ctx, v7);
+    let v10 = C::imm12_const(ctx, 0x3F);
+    let v11 = constructor_rv_slli(ctx, v8, v10);
+    let v12 = C::shift_int_to_most_significant(ctx, arg0, arg2);
+    let v14 = C::xreg_to_reg(ctx, v5);
+    let v15 = C::value_reg(ctx, v14);
+    let v16 = C::xreg_to_reg(ctx, arg1);
+    let v17 = C::value_reg(ctx, v16);
+    let v18 = constructor_gen_icmp(ctx, &IntCC::Equal, v15, v17, arg2);
+    let v19 = C::xreg_to_reg(ctx, v11);
+    let v20 = C::value_reg(ctx, v19);
+    let v21 = C::xreg_to_reg(ctx, v12);
+    let v22 = C::value_reg(ctx, v21);
+    let v23 = constructor_gen_icmp(ctx, &IntCC::Equal, v20, v22, arg2);
+    let v24 = constructor_rv_and(ctx, v18, v23);
+    let v26 = constructor_gen_trapif(ctx, v24, &TrapCode::IntegerOverflow);
+    // Rule at src/isa/riscv64/inst.isle line 2742.
+    return v26;
+}
+
+// Generated as internal constructor for term gen_div_by_zero.
+pub fn constructor_gen_div_by_zero<C: Context>(ctx: &mut C, arg0: XReg) -> InstOutput {
+    let v2 = C::zero_reg(ctx);
+    let v3 = C::xreg_new(ctx, v2);
+    let v5 = constructor_gen_trapifc(
+        ctx,
+        &IntCC::Equal,
+        v3,
+        arg0,
+        &TrapCode::IntegerDivisionByZero,
+    );
+    // Rule at src/isa/riscv64/inst.isle line 2754.
+    return v5;
+}
+
+// Generated as internal constructor for term madd.
+pub fn constructor_madd<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg, arg2: XReg) -> XReg {
+    let v3 = constructor_rv_mul(ctx, arg0, arg1);
+    let v4 = constructor_rv_add(ctx, v3, arg2);
+    // Rule at src/isa/riscv64/inst.isle line 2768.
+    return v4;
+}
+
+// Generated as internal constructor for term lower_bmask.
+pub fn constructor_lower_bmask<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Type,
+    arg2: ValueRegs,
+) -> ValueRegs {
+    if arg0 == I128 {
+        if arg1 == I128 {
+            let v30 = constructor_lower_bmask(ctx, I64, I128, arg2);
+            let v31 = C::value_regs_get(ctx, v30, 0x0);
+            let v32 = C::value_regs_get(ctx, v30, 0x0);
+            let v33 = C::value_regs(ctx, v31, v32);
+            // Rule at src/isa/riscv64/inst.isle line 2809.
+            return v33;
+        }
+        let v4 = C::fits_in_64(ctx, arg1);
+        if let Some(v5) = v4 {
+            let v25 = constructor_lower_bmask(ctx, I64, v5, arg2);
+            let v26 = C::value_regs_get(ctx, v25, 0x0);
+            let v27 = C::value_regs_get(ctx, v25, 0x0);
+            let v28 = C::value_regs(ctx, v26, v27);
+            // Rule at src/isa/riscv64/inst.isle line 2800.
+            return v28;
+        }
+    }
+    let v1 = C::fits_in_64(ctx, arg0);
+    if let Some(v2) = v1 {
+        if arg1 == I128 {
+            let v15 = C::value_regs_get(ctx, arg2, 0x0);
+            let v16 = C::xreg_new(ctx, v15);
+            let v18 = C::value_regs_get(ctx, arg2, 0x1);
+            let v19 = C::xreg_new(ctx, v18);
+            let v20 = constructor_rv_or(ctx, v16, v19);
+            let v22 = C::xreg_to_reg(ctx, v20);
+            let v23 = C::value_reg(ctx, v22);
+            let v24 = constructor_lower_bmask(ctx, v2, I64, v23);
+            // Rule at src/isa/riscv64/inst.isle line 2790.
+            return v24;
+        }
+        let v4 = C::fits_in_64(ctx, arg1);
+        if let Some(v5) = v4 {
+            let v8 = constructor_normalize_cmp_value(ctx, v5, arg2, &ExtendOp::Zero);
+            let v9 = constructor_truthy_to_reg(ctx, v5, v8);
+            let v10 = constructor_rv_snez(ctx, v9);
+            let v11 = constructor_rv_neg(ctx, v10);
+            let v12 = C::xreg_to_reg(ctx, v11);
+            let v13 = C::value_reg(ctx, v12);
+            // Rule at src/isa/riscv64/inst.isle line 2781.
+            return v13;
+        }
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "lower_bmask", "src/isa/riscv64/inst.isle line 2775"
+    )
+}
+
+// Generated as internal constructor for term gen_mov_from_preg.
+pub fn constructor_gen_mov_from_preg<C: Context>(ctx: &mut C, arg0: PReg) -> Reg {
+    let v1 = constructor_temp_writable_xreg(ctx);
+    let v2 = C::writable_xreg_to_writable_reg(ctx, v1);
+    let v3 = MInst::MovFromPReg { rd: v2, rm: arg0 };
+    let v4 = C::emit(ctx, &v3);
+    let v5 = constructor_writable_xreg_to_reg(ctx, v1);
+    // Rule at src/isa/riscv64/inst.isle line 2820.
+    return v5;
+}
+
+// Generated as internal constructor for term value_regs_zero.
+pub fn constructor_value_regs_zero<C: Context>(ctx: &mut C) -> ValueRegs {
+    let v2 = C::imm(ctx, I64, 0x0);
+    let v3 = C::imm(ctx, I64, 0x0);
+    let v4 = C::value_regs(ctx, v2, v3);
+    // Rule at src/isa/riscv64/inst.isle line 2836.
+    return v4;
+}
+
+// Generated as internal constructor for term not.
+pub fn constructor_not<C: Context>(ctx: &mut C, arg0: XReg) -> XReg {
+    let v2 = C::imm_from_bits(ctx, 0x1);
+    let v3 = constructor_rv_xori(ctx, arg0, v2);
+    // Rule at src/isa/riscv64/inst.isle line 2846.
+    return v3;
+}
+
+// Generated as internal constructor for term is_not_nan.
+pub fn constructor_is_not_nan<C: Context>(ctx: &mut C, arg0: Type, arg1: FReg) -> XReg {
+    let v2 = constructor_rv_feq(ctx, arg0, arg1, arg1);
+    // Rule at src/isa/riscv64/inst.isle line 2849.
+    return v2;
+}
+
+// Generated as internal constructor for term ordered.
+pub fn constructor_ordered<C: Context>(ctx: &mut C, arg0: Type, arg1: FReg, arg2: FReg) -> XReg {
+    let v3 = constructor_is_not_nan(ctx, arg0, arg1);
+    let v4 = constructor_is_not_nan(ctx, arg0, arg2);
+    let v5 = constructor_rv_and(ctx, v3, v4);
+    // Rule at src/isa/riscv64/inst.isle line 2852.
+    return v5;
+}
+
+// Generated as internal constructor for term cmp_result.
+pub fn constructor_cmp_result<C: Context>(ctx: &mut C, arg0: XReg) -> CmpResult {
+    let v2 = CmpResult::Result {
+        result: arg0,
+        invert: false,
+    };
+    // Rule at src/isa/riscv64/inst.isle line 2862.
+    return v2;
+}
+
+// Generated as internal constructor for term cmp_result_invert.
+pub fn constructor_cmp_result_invert<C: Context>(ctx: &mut C, arg0: XReg) -> CmpResult {
+    let v2 = CmpResult::Result {
+        result: arg0,
+        invert: true,
+    };
+    // Rule at src/isa/riscv64/inst.isle line 2867.
+    return v2;
+}
+
+// Generated as internal constructor for term cond_br.
+pub fn constructor_cond_br<C: Context>(
+    ctx: &mut C,
+    arg0: &CmpResult,
+    arg1: BranchTarget,
+    arg2: BranchTarget,
+) -> SideEffectNoResult {
+    let v3 = constructor_cmp_integer_compare(ctx, arg0);
+    let v4 = MInst::CondBr {
+        taken: arg1,
+        not_taken: arg2,
+        kind: v3,
+    };
+    let v5 = SideEffectNoResult::Inst { inst: v4 };
+    // Rule at src/isa/riscv64/inst.isle line 2871.
+    return v5;
+}
+
+// Generated as internal constructor for term cmp_integer_compare.
+pub fn constructor_cmp_integer_compare<C: Context>(
+    ctx: &mut C,
+    arg0: &CmpResult,
+) -> IntegerCompare {
+    if let &CmpResult::Result {
+        result: v1,
+        invert: v2,
+    } = arg0
+    {
+        match v2 {
+            true => {
+                let v4 = C::zero_reg(ctx);
+                let v5 = C::xreg_new(ctx, v4);
+                let v8 = C::int_compare(ctx, &IntCC::Equal, v1, v5);
+                // Rule at src/isa/riscv64/inst.isle line 2887.
+                return v8;
+            }
+            false => {
+                let v4 = C::zero_reg(ctx);
+                let v5 = C::xreg_new(ctx, v4);
+                let v6 = C::int_compare(ctx, &IntCC::NotEqual, v1, v5);
+                // Rule at src/isa/riscv64/inst.isle line 2883.
+                return v6;
+            }
+            _ => {}
+        }
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "cmp_integer_compare", "src/isa/riscv64/inst.isle line 2880"
+    )
+}
+
+// Generated as internal constructor for term cmp_value.
+pub fn constructor_cmp_value<C: Context>(ctx: &mut C, arg0: &CmpResult) -> XReg {
+    if let &CmpResult::Result {
+        result: v1,
+        invert: v2,
+    } = arg0
+    {
+        match v2 {
+            true => {
+                let v3 = constructor_not(ctx, v1);
+                // Rule at src/isa/riscv64/inst.isle line 2893.
+                return v3;
+            }
+            false => {
+                // Rule at src/isa/riscv64/inst.isle line 2892.
+                return v1;
+            }
+            _ => {}
+        }
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "cmp_value", "src/isa/riscv64/inst.isle line 2891"
+    )
+}
+
+// Generated as internal constructor for term emit_fcmp.
+pub fn constructor_emit_fcmp<C: Context>(
+    ctx: &mut C,
+    arg0: &FloatCC,
+    arg1: Type,
+    arg2: FReg,
+    arg3: FReg,
+) -> CmpResult {
+    match arg0 {
+        &FloatCC::Equal => {
+            let v7 = constructor_rv_feq(ctx, arg1, arg2, arg3);
+            let v8 = &constructor_cmp_result(ctx, v7);
+            // Rule at src/isa/riscv64/inst.isle line 2911.
+            return v8.clone();
+        }
+        &FloatCC::GreaterThan => {
+            let v21 = constructor_rv_fgt(ctx, arg1, arg2, arg3);
+            let v22 = &constructor_cmp_result(ctx, v21);
+            // Rule at src/isa/riscv64/inst.isle line 2942.
+            return v22.clone();
+        }
+        &FloatCC::GreaterThanOrEqual => {
+            let v23 = constructor_rv_fge(ctx, arg1, arg2, arg3);
+            let v24 = &constructor_cmp_result(ctx, v23);
+            // Rule at src/isa/riscv64/inst.isle line 2947.
+            return v24.clone();
+        }
+        &FloatCC::LessThan => {
+            let v10 = constructor_rv_flt(ctx, arg1, arg2, arg3);
+            let v18 = &constructor_cmp_result(ctx, v10);
+            // Rule at src/isa/riscv64/inst.isle line 2932.
+            return v18.clone();
+        }
+        &FloatCC::LessThanOrEqual => {
+            let v19 = constructor_rv_fle(ctx, arg1, arg2, arg3);
+            let v20 = &constructor_cmp_result(ctx, v19);
+            // Rule at src/isa/riscv64/inst.isle line 2937.
+            return v20.clone();
+        }
+        &FloatCC::NotEqual => {
+            let v7 = constructor_rv_feq(ctx, arg1, arg2, arg3);
+            let v9 = &constructor_cmp_result_invert(ctx, v7);
+            // Rule at src/isa/riscv64/inst.isle line 2917.
+            return v9.clone();
+        }
+        &FloatCC::Ordered => {
+            let v4 = constructor_ordered(ctx, arg1, arg2, arg3);
+            let v5 = &constructor_cmp_result(ctx, v4);
+            // Rule at src/isa/riscv64/inst.isle line 2900.
+            return v5.clone();
+        }
+        &FloatCC::OrderedNotEqual => {
+            let v10 = constructor_rv_flt(ctx, arg1, arg2, arg3);
+            let v11 = constructor_rv_fgt(ctx, arg1, arg2, arg3);
+            let v12 = constructor_rv_or(ctx, v10, v11);
+            let v13 = &constructor_cmp_result(ctx, v12);
+            // Rule at src/isa/riscv64/inst.isle line 2922.
+            return v13.clone();
+        }
+        &FloatCC::Unordered => {
+            let v4 = constructor_ordered(ctx, arg1, arg2, arg3);
+            let v6 = &constructor_cmp_result_invert(ctx, v4);
+            // Rule at src/isa/riscv64/inst.isle line 2906.
+            return v6.clone();
+        }
+        &FloatCC::UnorderedOrEqual => {
+            let v4 = constructor_ordered(ctx, arg1, arg2, arg3);
+            let v14 = constructor_not(ctx, v4);
+            let v15 = constructor_rv_feq(ctx, arg1, arg2, arg3);
+            let v16 = constructor_rv_or(ctx, v14, v15);
+            let v17 = &constructor_cmp_result(ctx, v16);
+            // Rule at src/isa/riscv64/inst.isle line 2927.
+            return v17.clone();
+        }
+        &FloatCC::UnorderedOrGreaterThan => {
+            let v4 = constructor_ordered(ctx, arg1, arg2, arg3);
+            let v30 = constructor_rv_fle(ctx, arg1, arg2, arg3);
+            let v31 = constructor_rv_and(ctx, v4, v30);
+            let v32 = &constructor_cmp_result_invert(ctx, v31);
+            // Rule at src/isa/riscv64/inst.isle line 2965.
+            return v32.clone();
+        }
+        &FloatCC::UnorderedOrGreaterThanOrEqual => {
+            let v4 = constructor_ordered(ctx, arg1, arg2, arg3);
+            let v33 = constructor_rv_flt(ctx, arg1, arg2, arg3);
+            let v34 = constructor_rv_and(ctx, v4, v33);
+            let v35 = &constructor_cmp_result_invert(ctx, v34);
+            // Rule at src/isa/riscv64/inst.isle line 2971.
+            return v35.clone();
+        }
+        &FloatCC::UnorderedOrLessThan => {
+            let v4 = constructor_ordered(ctx, arg1, arg2, arg3);
+            let v25 = constructor_rv_fge(ctx, arg1, arg2, arg3);
+            let v26 = constructor_rv_and(ctx, v4, v25);
+            let v27 = &constructor_cmp_result_invert(ctx, v26);
+            // Rule at src/isa/riscv64/inst.isle line 2953.
+            return v27.clone();
+        }
+        &FloatCC::UnorderedOrLessThanOrEqual => {
+            let v4 = constructor_ordered(ctx, arg1, arg2, arg3);
+            let v11 = constructor_rv_fgt(ctx, arg1, arg2, arg3);
+            let v28 = constructor_rv_and(ctx, v4, v11);
+            let v29 = &constructor_cmp_result_invert(ctx, v28);
+            // Rule at src/isa/riscv64/inst.isle line 2959.
+            return v29.clone();
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "emit_fcmp", "src/isa/riscv64/inst.isle line 2896"
+    )
+}
+
+// Generated as internal constructor for term masked.
+pub fn constructor_masked<C: Context>(ctx: &mut C, arg0: VReg) -> VecOpMasking {
+    let v1 = C::vreg_to_reg(ctx, arg0);
+    let v2 = VecOpMasking::Enabled { reg: v1 };
+    // Rule at src/isa/riscv64/inst_vector.isle line 85.
+    return v2;
+}
+
+// Generated as internal constructor for term unmasked.
+pub fn constructor_unmasked<C: Context>(ctx: &mut C) -> VecOpMasking {
+    // Rule at src/isa/riscv64/inst_vector.isle line 88.
+    return VecOpMasking::Disabled;
+}
+
+// Generated as internal constructor for term element_width_from_type.
+pub fn constructor_element_width_from_type<C: Context>(ctx: &mut C, arg0: Type) -> VecElementWidth {
+    let v1 = C::lane_type(ctx, arg0);
+    match v1 {
+        I8 => {
+            // Rule at src/isa/riscv64/inst_vector.isle line 303.
+            return VecElementWidth::E8;
+        }
+        I16 => {
+            // Rule at src/isa/riscv64/inst_vector.isle line 306.
+            return VecElementWidth::E16;
+        }
+        I32 => {
+            // Rule at src/isa/riscv64/inst_vector.isle line 309.
+            return VecElementWidth::E32;
+        }
+        I64 => {
+            // Rule at src/isa/riscv64/inst_vector.isle line 315.
+            return VecElementWidth::E64;
+        }
+        F32 => {
+            // Rule at src/isa/riscv64/inst_vector.isle line 312.
+            return VecElementWidth::E32;
+        }
+        F64 => {
+            // Rule at src/isa/riscv64/inst_vector.isle line 318.
+            return VecElementWidth::E64;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "element_width_from_type", "src/isa/riscv64/inst_vector.isle line 302"
+    )
+}
+
+// Generated as internal constructor for term vec_alu_rrr_imm5.
+pub fn constructor_vec_alu_rrr_imm5<C: Context>(
+    ctx: &mut C,
+    arg0: &VecAluOpRRRImm5,
+    arg1: VReg,
+    arg2: VReg,
+    arg3: Imm5,
+    arg4: &VecOpMasking,
+    arg5: VState,
+) -> VReg {
+    let v6 = constructor_temp_writable_vreg(ctx);
+    let v7 = C::writable_vreg_to_writable_reg(ctx, v6);
+    let v8 = C::vreg_to_reg(ctx, arg1);
+    let v9 = C::vreg_to_reg(ctx, arg2);
+    let v10 = MInst::VecAluRRRImm5 {
+        op: arg0.clone(),
+        vd: v7,
+        vd_src: v8,
+        vs2: v9,
+        imm: arg3,
+        mask: arg4.clone(),
+        vstate: arg5,
+    };
+    let v11 = C::emit(ctx, &v10);
+    let v12 = C::writable_vreg_to_vreg(ctx, v6);
+    // Rule at src/isa/riscv64/inst_vector.isle line 341.
+    return v12;
+}
+
+// Generated as internal constructor for term vec_alu_rrr_uimm5.
+pub fn constructor_vec_alu_rrr_uimm5<C: Context>(
+    ctx: &mut C,
+    arg0: &VecAluOpRRRImm5,
+    arg1: VReg,
+    arg2: VReg,
+    arg3: UImm5,
+    arg4: &VecOpMasking,
+    arg5: VState,
+) -> VReg {
+    let v6 = C::uimm5_bitcast_to_imm5(ctx, arg3);
+    let v7 = constructor_vec_alu_rrr_imm5(ctx, arg0, arg1, arg2, v6, arg4, arg5);
+    // Rule at src/isa/riscv64/inst_vector.isle line 349.
+    return v7;
+}
+
+// Generated as internal constructor for term vec_alu_rrr.
+pub fn constructor_vec_alu_rrr<C: Context>(
+    ctx: &mut C,
+    arg0: &VecAluOpRRR,
+    arg1: Reg,
+    arg2: Reg,
+    arg3: &VecOpMasking,
+    arg4: VState,
+) -> Reg {
+    let v5 = constructor_temp_writable_vreg(ctx);
+    let v6 = C::writable_vreg_to_writable_reg(ctx, v5);
+    let v7 = MInst::VecAluRRR {
+        op: arg0.clone(),
+        vd: v6,
+        vs2: arg1,
+        vs1: arg2,
+        mask: arg3.clone(),
+        vstate: arg4,
+    };
+    let v8 = C::emit(ctx, &v7);
+    let v9 = constructor_writable_vreg_to_reg(ctx, v5);
+    // Rule at src/isa/riscv64/inst_vector.isle line 354.
+    return v9;
+}
+
+// Generated as internal constructor for term vec_alu_rr_imm5.
+pub fn constructor_vec_alu_rr_imm5<C: Context>(
+    ctx: &mut C,
+    arg0: &VecAluOpRRImm5,
+    arg1: Reg,
+    arg2: Imm5,
+    arg3: &VecOpMasking,
+    arg4: VState,
+) -> Reg {
+    let v5 = constructor_temp_writable_vreg(ctx);
+    let v6 = C::writable_vreg_to_writable_reg(ctx, v5);
+    let v7 = MInst::VecAluRRImm5 {
+        op: arg0.clone(),
+        vd: v6,
+        vs2: arg1,
+        imm: arg2,
+        mask: arg3.clone(),
+        vstate: arg4,
+    };
+    let v8 = C::emit(ctx, &v7);
+    let v9 = constructor_writable_vreg_to_reg(ctx, v5);
+    // Rule at src/isa/riscv64/inst_vector.isle line 361.
+    return v9;
+}
+
+// Generated as internal constructor for term vec_alu_rr_uimm5.
+pub fn constructor_vec_alu_rr_uimm5<C: Context>(
+    ctx: &mut C,
+    arg0: &VecAluOpRRImm5,
+    arg1: Reg,
+    arg2: UImm5,
+    arg3: &VecOpMasking,
+    arg4: VState,
+) -> Reg {
+    let v5 = C::uimm5_bitcast_to_imm5(ctx, arg2);
+    let v6 = constructor_vec_alu_rr_imm5(ctx, arg0, arg1, v5, arg3, arg4);
+    // Rule at src/isa/riscv64/inst_vector.isle line 369.
+    return v6;
+}
+
+// Generated as internal constructor for term vec_alu_rr.
+pub fn constructor_vec_alu_rr<C: Context>(
+    ctx: &mut C,
+    arg0: &VecAluOpRR,
+    arg1: Reg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> Reg {
+    let v4 = C::vec_alu_rr_dst_type(ctx, arg0);
+    let v5 = C::temp_writable_reg(ctx, v4);
+    let v6 = MInst::VecAluRR {
+        op: arg0.clone(),
+        vd: v5,
+        vs: arg1,
+        mask: arg2.clone(),
+        vstate: arg3,
+    };
+    let v7 = C::emit(ctx, &v6);
+    let v8 = C::writable_reg_to_reg(ctx, v5);
+    // Rule at src/isa/riscv64/inst_vector.isle line 375.
+    return v8;
+}
+
+// Generated as internal constructor for term vec_alu_r_imm5.
+pub fn constructor_vec_alu_r_imm5<C: Context>(
+    ctx: &mut C,
+    arg0: &VecAluOpRImm5,
+    arg1: Imm5,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> Reg {
+    let v4 = constructor_temp_writable_vreg(ctx);
+    let v5 = C::writable_vreg_to_writable_reg(ctx, v4);
+    let v6 = MInst::VecAluRImm5 {
+        op: arg0.clone(),
+        vd: v5,
+        imm: arg1,
+        mask: arg2.clone(),
+        vstate: arg3,
+    };
+    let v7 = C::emit(ctx, &v6);
+    let v8 = constructor_writable_vreg_to_reg(ctx, v4);
+    // Rule at src/isa/riscv64/inst_vector.isle line 382.
+    return v8;
+}
+
+// Generated as internal constructor for term vec_load.
+pub fn constructor_vec_load<C: Context>(
+    ctx: &mut C,
+    arg0: &VecElementWidth,
+    arg1: &VecAMode,
+    arg2: MemFlags,
+    arg3: &VecOpMasking,
+    arg4: VState,
+) -> Reg {
+    let v5 = constructor_temp_writable_vreg(ctx);
+    let v6 = C::writable_vreg_to_writable_reg(ctx, v5);
+    let v7 = MInst::VecLoad {
+        eew: arg0.clone(),
+        to: v6,
+        from: arg1.clone(),
+        flags: arg2,
+        mask: arg3.clone(),
+        vstate: arg4,
+    };
+    let v8 = C::emit(ctx, &v7);
+    let v9 = constructor_writable_vreg_to_reg(ctx, v5);
+    // Rule at src/isa/riscv64/inst_vector.isle line 389.
+    return v9;
+}
+
+// Generated as internal constructor for term vec_store.
+pub fn constructor_vec_store<C: Context>(
+    ctx: &mut C,
+    arg0: &VecElementWidth,
+    arg1: &VecAMode,
+    arg2: VReg,
+    arg3: MemFlags,
+    arg4: &VecOpMasking,
+    arg5: VState,
+) -> InstOutput {
+    let v6 = C::vreg_to_reg(ctx, arg2);
+    let v7 = MInst::VecStore {
+        eew: arg0.clone(),
+        to: arg1.clone(),
+        from: v6,
+        flags: arg3,
+        mask: arg4.clone(),
+        vstate: arg5,
+    };
+    let v8 = SideEffectNoResult::Inst { inst: v7 };
+    let v9 = constructor_side_effect(ctx, &v8);
+    // Rule at src/isa/riscv64/inst_vector.isle line 396.
+    return v9;
+}
+
+// Generated as internal constructor for term rv_vadd_vv.
+pub fn constructor_rv_vadd_vv<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::vreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VaddVV, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 402.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vadd_vx.
+pub fn constructor_rv_vadd_vx<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: XReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::xreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VaddVX, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 407.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vadd_vi.
+pub fn constructor_rv_vadd_vi<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: Imm5,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = constructor_vec_alu_rr_imm5(ctx, &VecAluOpRRImm5::VaddVI, v5, arg1, arg2, arg3);
+    let v7 = C::vreg_new(ctx, v6);
+    // Rule at src/isa/riscv64/inst_vector.isle line 412.
+    return v7;
+}
+
+// Generated as internal constructor for term rv_vsadd_vv.
+pub fn constructor_rv_vsadd_vv<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::vreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VsaddVV, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 417.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vsadd_vx.
+pub fn constructor_rv_vsadd_vx<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: XReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::xreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VsaddVX, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 422.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vsadd_vi.
+pub fn constructor_rv_vsadd_vi<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: Imm5,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = constructor_vec_alu_rr_imm5(ctx, &VecAluOpRRImm5::VsaddVI, v5, arg1, arg2, arg3);
+    let v7 = C::vreg_new(ctx, v6);
+    // Rule at src/isa/riscv64/inst_vector.isle line 427.
+    return v7;
+}
+
+// Generated as internal constructor for term rv_vsaddu_vv.
+pub fn constructor_rv_vsaddu_vv<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::vreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VsadduVV, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 432.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vsaddu_vx.
+pub fn constructor_rv_vsaddu_vx<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: XReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::xreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VsadduVX, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 437.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vsaddu_vi.
+pub fn constructor_rv_vsaddu_vi<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: Imm5,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = constructor_vec_alu_rr_imm5(ctx, &VecAluOpRRImm5::VsadduVI, v5, arg1, arg2, arg3);
+    let v7 = C::vreg_new(ctx, v6);
+    // Rule at src/isa/riscv64/inst_vector.isle line 442.
+    return v7;
+}
+
+// Generated as internal constructor for term rv_vwadd_vv.
+pub fn constructor_rv_vwadd_vv<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::vreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VwaddVV, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 449.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vwadd_vx.
+pub fn constructor_rv_vwadd_vx<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: XReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::xreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VwaddVX, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 456.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vwadd_wv.
+pub fn constructor_rv_vwadd_wv<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::vreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VwaddWV, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 463.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vwadd_wx.
+pub fn constructor_rv_vwadd_wx<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: XReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::xreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VwaddWX, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 470.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vwaddu_vv.
+pub fn constructor_rv_vwaddu_vv<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::vreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VwadduVV, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 477.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vwaddu_vx.
+pub fn constructor_rv_vwaddu_vx<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: XReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::xreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VwadduVX, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 484.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vwaddu_wv.
+pub fn constructor_rv_vwaddu_wv<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::vreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VwadduWV, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 491.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vwaddu_wx.
+pub fn constructor_rv_vwaddu_wx<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: XReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::xreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VwadduWX, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 498.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vsub_vv.
+pub fn constructor_rv_vsub_vv<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::vreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VsubVV, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 503.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vsub_vx.
+pub fn constructor_rv_vsub_vx<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: XReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::xreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VsubVX, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 508.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vrsub_vx.
+pub fn constructor_rv_vrsub_vx<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: XReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::xreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VrsubVX, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 513.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vwsub_vv.
+pub fn constructor_rv_vwsub_vv<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::vreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VwsubVV, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 520.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vwsub_vx.
+pub fn constructor_rv_vwsub_vx<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: XReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::xreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VwsubVX, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 527.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vwsub_wv.
+pub fn constructor_rv_vwsub_wv<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::vreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VwsubWV, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 534.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vwsub_wx.
+pub fn constructor_rv_vwsub_wx<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: XReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::xreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VwsubWX, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 541.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vwsubu_vv.
+pub fn constructor_rv_vwsubu_vv<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::vreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VwsubuVV, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 548.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vwsubu_vx.
+pub fn constructor_rv_vwsubu_vx<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: XReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::xreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VwsubuVX, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 555.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vwsubu_wv.
+pub fn constructor_rv_vwsubu_wv<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::vreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VwsubuWV, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 562.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vwsubu_wx.
+pub fn constructor_rv_vwsubu_wx<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: XReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::xreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VwsubuWX, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 569.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vssub_vv.
+pub fn constructor_rv_vssub_vv<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::vreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VssubVV, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 574.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vssub_vx.
+pub fn constructor_rv_vssub_vx<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: XReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::xreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VssubVX, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 579.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vssubu_vv.
+pub fn constructor_rv_vssubu_vv<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::vreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VssubuVV, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 584.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vssubu_vx.
+pub fn constructor_rv_vssubu_vx<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: XReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::xreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VssubuVX, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 589.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vneg_v.
+pub fn constructor_rv_vneg_v<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: &VecOpMasking,
+    arg2: VState,
+) -> VReg {
+    let v5 = C::zero_reg(ctx);
+    let v4 = C::vreg_to_reg(ctx, arg0);
+    let v6 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VrsubVX, v4, v5, arg1, arg2);
+    let v7 = C::vreg_new(ctx, v6);
+    // Rule at src/isa/riscv64/inst_vector.isle line 594.
+    return v7;
+}
+
+// Generated as internal constructor for term rv_vrsub_vi.
+pub fn constructor_rv_vrsub_vi<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: Imm5,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = constructor_vec_alu_rr_imm5(ctx, &VecAluOpRRImm5::VrsubVI, v5, arg1, arg2, arg3);
+    let v7 = C::vreg_new(ctx, v6);
+    // Rule at src/isa/riscv64/inst_vector.isle line 599.
+    return v7;
+}
+
+// Generated as internal constructor for term rv_vmul_vv.
+pub fn constructor_rv_vmul_vv<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::vreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmulVV, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 604.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vmul_vx.
+pub fn constructor_rv_vmul_vx<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: XReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::xreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmulVX, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 609.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vmulh_vv.
+pub fn constructor_rv_vmulh_vv<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::vreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmulhVV, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 614.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vmulh_vx.
+pub fn constructor_rv_vmulh_vx<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: XReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::xreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmulhVX, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 619.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vmulhu_vv.
+pub fn constructor_rv_vmulhu_vv<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::vreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmulhuVV, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 624.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vmulhu_vx.
+pub fn constructor_rv_vmulhu_vx<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: XReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::xreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmulhuVX, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 629.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vsmul_vv.
+pub fn constructor_rv_vsmul_vv<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::vreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VsmulVV, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 637.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vsmul_vx.
+pub fn constructor_rv_vsmul_vx<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: XReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::xreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VsmulVX, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 645.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vsll_vv.
+pub fn constructor_rv_vsll_vv<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::vreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VsllVV, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 650.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vsll_vx.
+pub fn constructor_rv_vsll_vx<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: XReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::xreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VsllVX, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 655.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vsll_vi.
+pub fn constructor_rv_vsll_vi<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: UImm5,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = constructor_vec_alu_rr_uimm5(ctx, &VecAluOpRRImm5::VsllVI, v5, arg1, arg2, arg3);
+    let v7 = C::vreg_new(ctx, v6);
+    // Rule at src/isa/riscv64/inst_vector.isle line 660.
+    return v7;
+}
+
+// Generated as internal constructor for term rv_vsrl_vv.
+pub fn constructor_rv_vsrl_vv<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::vreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VsrlVV, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 665.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vsrl_vx.
+pub fn constructor_rv_vsrl_vx<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: XReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::xreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VsrlVX, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 670.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vsrl_vi.
+pub fn constructor_rv_vsrl_vi<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: UImm5,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = constructor_vec_alu_rr_uimm5(ctx, &VecAluOpRRImm5::VsrlVI, v5, arg1, arg2, arg3);
+    let v7 = C::vreg_new(ctx, v6);
+    // Rule at src/isa/riscv64/inst_vector.isle line 675.
+    return v7;
+}
+
+// Generated as internal constructor for term rv_vsra_vv.
+pub fn constructor_rv_vsra_vv<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::vreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VsraVV, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 680.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vsra_vx.
+pub fn constructor_rv_vsra_vx<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: XReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::xreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VsraVX, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 685.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vsra_vi.
+pub fn constructor_rv_vsra_vi<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: UImm5,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = constructor_vec_alu_rr_uimm5(ctx, &VecAluOpRRImm5::VsraVI, v5, arg1, arg2, arg3);
+    let v7 = C::vreg_new(ctx, v6);
+    // Rule at src/isa/riscv64/inst_vector.isle line 690.
+    return v7;
+}
+
+// Generated as internal constructor for term rv_vand_vv.
+pub fn constructor_rv_vand_vv<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::vreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VandVV, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 695.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vand_vx.
+pub fn constructor_rv_vand_vx<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: XReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::xreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VandVX, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 700.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vand_vi.
+pub fn constructor_rv_vand_vi<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: Imm5,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = constructor_vec_alu_rr_imm5(ctx, &VecAluOpRRImm5::VandVI, v5, arg1, arg2, arg3);
+    let v7 = C::vreg_new(ctx, v6);
+    // Rule at src/isa/riscv64/inst_vector.isle line 705.
+    return v7;
+}
+
+// Generated as internal constructor for term rv_vor_vv.
+pub fn constructor_rv_vor_vv<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::vreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VorVV, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 710.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vor_vx.
+pub fn constructor_rv_vor_vx<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: XReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::xreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VorVX, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 715.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vor_vi.
+pub fn constructor_rv_vor_vi<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: Imm5,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = constructor_vec_alu_rr_imm5(ctx, &VecAluOpRRImm5::VorVI, v5, arg1, arg2, arg3);
+    let v7 = C::vreg_new(ctx, v6);
+    // Rule at src/isa/riscv64/inst_vector.isle line 720.
+    return v7;
+}
+
+// Generated as internal constructor for term rv_vxor_vv.
+pub fn constructor_rv_vxor_vv<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::vreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VxorVV, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 725.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vxor_vx.
+pub fn constructor_rv_vxor_vx<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: XReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::xreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VxorVX, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 730.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vxor_vi.
+pub fn constructor_rv_vxor_vi<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: Imm5,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = constructor_vec_alu_rr_imm5(ctx, &VecAluOpRRImm5::VxorVI, v5, arg1, arg2, arg3);
+    let v7 = C::vreg_new(ctx, v6);
+    // Rule at src/isa/riscv64/inst_vector.isle line 735.
+    return v7;
+}
+
+// Generated as internal constructor for term rv_vssrl_vi.
+pub fn constructor_rv_vssrl_vi<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: UImm5,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = constructor_vec_alu_rr_uimm5(ctx, &VecAluOpRRImm5::VssrlVI, v5, arg1, arg2, arg3);
+    let v7 = C::vreg_new(ctx, v6);
+    // Rule at src/isa/riscv64/inst_vector.isle line 744.
+    return v7;
+}
+
+// Generated as internal constructor for term rv_vnot_v.
+pub fn constructor_rv_vnot_v<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: &VecOpMasking,
+    arg2: VState,
+) -> VReg {
+    let v4 = C::imm5_from_i8(ctx, -0x1);
+    if let Some(v5) = v4 {
+        let v6 = constructor_rv_vxor_vi(ctx, arg0, v5, arg1, arg2);
+        // Rule at src/isa/riscv64/inst_vector.isle line 750.
+        return v6;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "rv_vnot_v", "src/isa/riscv64/inst_vector.isle line 749"
+    )
+}
+
+// Generated as internal constructor for term rv_vmax_vv.
+pub fn constructor_rv_vmax_vv<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::vreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmaxVV, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 756.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vmax_vx.
+pub fn constructor_rv_vmax_vx<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: XReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::xreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmaxVX, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 761.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vmin_vv.
+pub fn constructor_rv_vmin_vv<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::vreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VminVV, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 766.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vmin_vx.
+pub fn constructor_rv_vmin_vx<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: XReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::xreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VminVX, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 771.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vmaxu_vv.
+pub fn constructor_rv_vmaxu_vv<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::vreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmaxuVV, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 776.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vmaxu_vx.
+pub fn constructor_rv_vmaxu_vx<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: XReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::xreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmaxuVX, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 781.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vminu_vv.
+pub fn constructor_rv_vminu_vv<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::vreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VminuVV, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 786.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vminu_vx.
+pub fn constructor_rv_vminu_vx<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: XReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::xreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VminuVX, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 791.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vfadd_vv.
+pub fn constructor_rv_vfadd_vv<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::vreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VfaddVV, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 796.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vfadd_vf.
+pub fn constructor_rv_vfadd_vf<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: FReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::freg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VfaddVF, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 801.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vfsub_vv.
+pub fn constructor_rv_vfsub_vv<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::vreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VfsubVV, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 806.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vfsub_vf.
+pub fn constructor_rv_vfsub_vf<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: FReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::freg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VfsubVF, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 811.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vfrsub_vf.
+pub fn constructor_rv_vfrsub_vf<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: FReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::freg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VfrsubVF, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 816.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vfmul_vv.
+pub fn constructor_rv_vfmul_vv<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::vreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VfmulVV, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 821.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vfmul_vf.
+pub fn constructor_rv_vfmul_vf<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: FReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::freg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VfmulVF, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 826.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vfdiv_vv.
+pub fn constructor_rv_vfdiv_vv<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::vreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VfdivVV, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 831.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vfdiv_vf.
+pub fn constructor_rv_vfdiv_vf<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: FReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::freg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VfdivVF, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 836.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vfrdiv_vf.
+pub fn constructor_rv_vfrdiv_vf<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: FReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::freg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VfrdivVF, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 841.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vfmin_vv.
+pub fn constructor_rv_vfmin_vv<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::vreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VfminVV, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 846.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vfmax_vv.
+pub fn constructor_rv_vfmax_vv<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::vreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VfmaxVV, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 851.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vfsgnj_vv.
+pub fn constructor_rv_vfsgnj_vv<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::vreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VfsgnjVV, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 857.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vfsgnj_vf.
+pub fn constructor_rv_vfsgnj_vf<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: FReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::freg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VfsgnjVF, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 862.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vfsgnjn_vv.
+pub fn constructor_rv_vfsgnjn_vv<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::vreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VfsgnjnVV, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 868.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vfneg_v.
+pub fn constructor_rv_vfneg_v<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: &VecOpMasking,
+    arg2: VState,
+) -> VReg {
+    let v3 = constructor_rv_vfsgnjn_vv(ctx, arg0, arg0, arg1, arg2);
+    // Rule at src/isa/riscv64/inst_vector.isle line 874.
+    return v3;
+}
+
+// Generated as internal constructor for term rv_vfsgnjx_vv.
+pub fn constructor_rv_vfsgnjx_vv<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::vreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VfsgnjxVV, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 880.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vfabs_v.
+pub fn constructor_rv_vfabs_v<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: &VecOpMasking,
+    arg2: VState,
+) -> VReg {
+    let v3 = constructor_rv_vfsgnjx_vv(ctx, arg0, arg0, arg1, arg2);
+    // Rule at src/isa/riscv64/inst_vector.isle line 886.
+    return v3;
+}
+
+// Generated as internal constructor for term rv_vfsqrt_v.
+pub fn constructor_rv_vfsqrt_v<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: &VecOpMasking,
+    arg2: VState,
+) -> VReg {
+    let v4 = C::vreg_to_reg(ctx, arg0);
+    let v5 = constructor_vec_alu_rr(ctx, &VecAluOpRR::VfsqrtV, v4, arg1, arg2);
+    let v6 = C::vreg_new(ctx, v5);
+    // Rule at src/isa/riscv64/inst_vector.isle line 891.
+    return v6;
+}
+
+// Generated as internal constructor for term rv_vslidedown_vx.
+pub fn constructor_rv_vslidedown_vx<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: XReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::xreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VslidedownVX, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 898.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vslidedown_vi.
+pub fn constructor_rv_vslidedown_vi<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: UImm5,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = constructor_vec_alu_rr_uimm5(ctx, &VecAluOpRRImm5::VslidedownVI, v5, arg1, arg2, arg3);
+    let v7 = C::vreg_new(ctx, v6);
+    // Rule at src/isa/riscv64/inst_vector.isle line 904.
+    return v7;
+}
+
+// Generated as internal constructor for term rv_vslideup_vvi.
+pub fn constructor_rv_vslideup_vvi<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: UImm5,
+    arg3: &VecOpMasking,
+    arg4: VState,
+) -> VReg {
+    let v6 = constructor_vec_alu_rrr_uimm5(
+        ctx,
+        &VecAluOpRRRImm5::VslideupVI,
+        arg0,
+        arg1,
+        arg2,
+        arg3,
+        arg4,
+    );
+    // Rule at src/isa/riscv64/inst_vector.isle line 912.
+    return v6;
+}
+
+// Generated as internal constructor for term rv_vmv_xs.
+pub fn constructor_rv_vmv_xs<C: Context>(ctx: &mut C, arg0: VReg, arg1: VState) -> XReg {
+    let v3 = C::vreg_to_reg(ctx, arg0);
+    let v4 = &constructor_unmasked(ctx);
+    let v5 = constructor_vec_alu_rr(ctx, &VecAluOpRR::VmvXS, v3, v4, arg1);
+    let v6 = C::xreg_new(ctx, v5);
+    // Rule at src/isa/riscv64/inst_vector.isle line 919.
+    return v6;
+}
+
+// Generated as internal constructor for term rv_vfmv_fs.
+pub fn constructor_rv_vfmv_fs<C: Context>(ctx: &mut C, arg0: VReg, arg1: VState) -> FReg {
+    let v3 = C::vreg_to_reg(ctx, arg0);
+    let v4 = &constructor_unmasked(ctx);
+    let v5 = constructor_vec_alu_rr(ctx, &VecAluOpRR::VfmvFS, v3, v4, arg1);
+    let v6 = C::freg_new(ctx, v5);
+    // Rule at src/isa/riscv64/inst_vector.isle line 926.
+    return v6;
+}
+
+// Generated as internal constructor for term rv_vmv_sx.
+pub fn constructor_rv_vmv_sx<C: Context>(ctx: &mut C, arg0: XReg, arg1: VState) -> VReg {
+    let v3 = C::xreg_to_reg(ctx, arg0);
+    let v4 = &constructor_unmasked(ctx);
+    let v5 = constructor_vec_alu_rr(ctx, &VecAluOpRR::VmvSX, v3, v4, arg1);
+    let v6 = C::vreg_new(ctx, v5);
+    // Rule at src/isa/riscv64/inst_vector.isle line 933.
+    return v6;
+}
+
+// Generated as internal constructor for term rv_vfmv_sf.
+pub fn constructor_rv_vfmv_sf<C: Context>(ctx: &mut C, arg0: FReg, arg1: VState) -> VReg {
+    let v3 = C::freg_to_reg(ctx, arg0);
+    let v4 = &constructor_unmasked(ctx);
+    let v5 = constructor_vec_alu_rr(ctx, &VecAluOpRR::VfmvSF, v3, v4, arg1);
+    let v6 = C::vreg_new(ctx, v5);
+    // Rule at src/isa/riscv64/inst_vector.isle line 940.
+    return v6;
+}
+
+// Generated as internal constructor for term rv_vmv_vx.
+pub fn constructor_rv_vmv_vx<C: Context>(ctx: &mut C, arg0: XReg, arg1: VState) -> VReg {
+    let v3 = C::xreg_to_reg(ctx, arg0);
+    let v4 = &constructor_unmasked(ctx);
+    let v5 = constructor_vec_alu_rr(ctx, &VecAluOpRR::VmvVX, v3, v4, arg1);
+    let v6 = C::vreg_new(ctx, v5);
+    // Rule at src/isa/riscv64/inst_vector.isle line 947.
+    return v6;
+}
+
+// Generated as internal constructor for term rv_vfmv_vf.
+pub fn constructor_rv_vfmv_vf<C: Context>(ctx: &mut C, arg0: FReg, arg1: VState) -> VReg {
+    let v3 = C::freg_to_reg(ctx, arg0);
+    let v4 = &constructor_unmasked(ctx);
+    let v5 = constructor_vec_alu_rr(ctx, &VecAluOpRR::VfmvVF, v3, v4, arg1);
+    let v6 = C::vreg_new(ctx, v5);
+    // Rule at src/isa/riscv64/inst_vector.isle line 954.
+    return v6;
+}
+
+// Generated as internal constructor for term rv_vmv_vi.
+pub fn constructor_rv_vmv_vi<C: Context>(ctx: &mut C, arg0: Imm5, arg1: VState) -> VReg {
+    let v3 = &constructor_unmasked(ctx);
+    let v4 = constructor_vec_alu_r_imm5(ctx, &VecAluOpRImm5::VmvVI, arg0, v3, arg1);
+    let v5 = C::vreg_new(ctx, v4);
+    // Rule at src/isa/riscv64/inst_vector.isle line 961.
+    return v5;
+}
+
+// Generated as internal constructor for term rv_vmerge_vvm.
+pub fn constructor_rv_vmerge_vvm<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: VReg,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::vreg_to_reg(ctx, arg1);
+    let v7 = &constructor_masked(ctx, arg2);
+    let v8 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmergeVVM, v5, v6, v7, arg3);
+    let v9 = C::vreg_new(ctx, v8);
+    // Rule at src/isa/riscv64/inst_vector.isle line 971.
+    return v9;
+}
+
+// Generated as internal constructor for term rv_vmerge_vxm.
+pub fn constructor_rv_vmerge_vxm<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: XReg,
+    arg2: VReg,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::xreg_to_reg(ctx, arg1);
+    let v7 = &constructor_masked(ctx, arg2);
+    let v8 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmergeVXM, v5, v6, v7, arg3);
+    let v9 = C::vreg_new(ctx, v8);
+    // Rule at src/isa/riscv64/inst_vector.isle line 980.
+    return v9;
+}
+
+// Generated as internal constructor for term rv_vfmerge_vfm.
+pub fn constructor_rv_vfmerge_vfm<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: FReg,
+    arg2: VReg,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::freg_to_reg(ctx, arg1);
+    let v7 = &constructor_masked(ctx, arg2);
+    let v8 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VfmergeVFM, v5, v6, v7, arg3);
+    let v9 = C::vreg_new(ctx, v8);
+    // Rule at src/isa/riscv64/inst_vector.isle line 989.
+    return v9;
+}
+
+// Generated as internal constructor for term rv_vmerge_vim.
+pub fn constructor_rv_vmerge_vim<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: Imm5,
+    arg2: VReg,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = &constructor_masked(ctx, arg2);
+    let v7 = constructor_vec_alu_rr_imm5(ctx, &VecAluOpRRImm5::VmergeVIM, v5, arg1, v6, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 998.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vredminu_vs.
+pub fn constructor_rv_vredminu_vs<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::vreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VredminuVS, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 1006.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vredmaxu_vs.
+pub fn constructor_rv_vredmaxu_vs<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::vreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VredmaxuVS, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 1013.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vrgather_vv.
+pub fn constructor_rv_vrgather_vv<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::vreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VrgatherVV, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 1020.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vrgather_vx.
+pub fn constructor_rv_vrgather_vx<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: XReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::xreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VrgatherVX, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 1027.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vrgather_vi.
+pub fn constructor_rv_vrgather_vi<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: UImm5,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = constructor_vec_alu_rr_uimm5(ctx, &VecAluOpRRImm5::VrgatherVI, v5, arg1, arg2, arg3);
+    let v7 = C::vreg_new(ctx, v6);
+    // Rule at src/isa/riscv64/inst_vector.isle line 1032.
+    return v7;
+}
+
+// Generated as internal constructor for term rv_vcompress_vm.
+pub fn constructor_rv_vcompress_vm<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: VState,
+) -> VReg {
+    let v4 = C::vreg_to_reg(ctx, arg0);
+    let v5 = C::vreg_to_reg(ctx, arg1);
+    let v6 = &constructor_unmasked(ctx);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VcompressVM, v4, v5, v6, arg2);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 1043.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vmseq_vv.
+pub fn constructor_rv_vmseq_vv<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::vreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmseqVV, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 1048.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vmseq_vx.
+pub fn constructor_rv_vmseq_vx<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: XReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::xreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmseqVX, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 1053.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vmseq_vi.
+pub fn constructor_rv_vmseq_vi<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: Imm5,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = constructor_vec_alu_rr_imm5(ctx, &VecAluOpRRImm5::VmseqVI, v5, arg1, arg2, arg3);
+    let v7 = C::vreg_new(ctx, v6);
+    // Rule at src/isa/riscv64/inst_vector.isle line 1058.
+    return v7;
+}
+
+// Generated as internal constructor for term rv_vmsne_vv.
+pub fn constructor_rv_vmsne_vv<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::vreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmsneVV, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 1063.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vmsne_vx.
+pub fn constructor_rv_vmsne_vx<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: XReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::xreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmsneVX, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 1068.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vmsne_vi.
+pub fn constructor_rv_vmsne_vi<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: Imm5,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = constructor_vec_alu_rr_imm5(ctx, &VecAluOpRRImm5::VmsneVI, v5, arg1, arg2, arg3);
+    let v7 = C::vreg_new(ctx, v6);
+    // Rule at src/isa/riscv64/inst_vector.isle line 1073.
+    return v7;
+}
+
+// Generated as internal constructor for term rv_vmsltu_vv.
+pub fn constructor_rv_vmsltu_vv<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::vreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmsltuVV, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 1078.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vmsltu_vx.
+pub fn constructor_rv_vmsltu_vx<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: XReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::xreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmsltuVX, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 1083.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vmslt_vv.
+pub fn constructor_rv_vmslt_vv<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::vreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmsltVV, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 1088.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vmslt_vx.
+pub fn constructor_rv_vmslt_vx<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: XReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::xreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmsltVX, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 1093.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vmsleu_vv.
+pub fn constructor_rv_vmsleu_vv<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::vreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmsleuVV, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 1098.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vmsleu_vx.
+pub fn constructor_rv_vmsleu_vx<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: XReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::xreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmsleuVX, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 1103.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vmsleu_vi.
+pub fn constructor_rv_vmsleu_vi<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: Imm5,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = constructor_vec_alu_rr_imm5(ctx, &VecAluOpRRImm5::VmsleuVI, v5, arg1, arg2, arg3);
+    let v7 = C::vreg_new(ctx, v6);
+    // Rule at src/isa/riscv64/inst_vector.isle line 1108.
+    return v7;
+}
+
+// Generated as internal constructor for term rv_vmsle_vv.
+pub fn constructor_rv_vmsle_vv<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::vreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmsleVV, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 1113.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vmsle_vx.
+pub fn constructor_rv_vmsle_vx<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: XReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::xreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmsleVX, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 1118.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vmsle_vi.
+pub fn constructor_rv_vmsle_vi<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: Imm5,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = constructor_vec_alu_rr_imm5(ctx, &VecAluOpRRImm5::VmsleVI, v5, arg1, arg2, arg3);
+    let v7 = C::vreg_new(ctx, v6);
+    // Rule at src/isa/riscv64/inst_vector.isle line 1123.
+    return v7;
+}
+
+// Generated as internal constructor for term rv_vmsgtu_vv.
+pub fn constructor_rv_vmsgtu_vv<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v4 = constructor_rv_vmsltu_vv(ctx, arg1, arg0, arg2, arg3);
+    // Rule at src/isa/riscv64/inst_vector.isle line 1129.
+    return v4;
+}
+
+// Generated as internal constructor for term rv_vmsgtu_vx.
+pub fn constructor_rv_vmsgtu_vx<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: XReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::xreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmsgtuVX, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 1133.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vmsgtu_vi.
+pub fn constructor_rv_vmsgtu_vi<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: Imm5,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = constructor_vec_alu_rr_imm5(ctx, &VecAluOpRRImm5::VmsgtuVI, v5, arg1, arg2, arg3);
+    let v7 = C::vreg_new(ctx, v6);
+    // Rule at src/isa/riscv64/inst_vector.isle line 1138.
+    return v7;
+}
+
+// Generated as internal constructor for term rv_vmsgt_vv.
+pub fn constructor_rv_vmsgt_vv<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v4 = constructor_rv_vmslt_vv(ctx, arg1, arg0, arg2, arg3);
+    // Rule at src/isa/riscv64/inst_vector.isle line 1144.
+    return v4;
+}
+
+// Generated as internal constructor for term rv_vmsgt_vx.
+pub fn constructor_rv_vmsgt_vx<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: XReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::xreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmsgtVX, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 1148.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vmsgt_vi.
+pub fn constructor_rv_vmsgt_vi<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: Imm5,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = constructor_vec_alu_rr_imm5(ctx, &VecAluOpRRImm5::VmsgtVI, v5, arg1, arg2, arg3);
+    let v7 = C::vreg_new(ctx, v6);
+    // Rule at src/isa/riscv64/inst_vector.isle line 1153.
+    return v7;
+}
+
+// Generated as internal constructor for term rv_vmsgeu_vv.
+pub fn constructor_rv_vmsgeu_vv<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v4 = constructor_rv_vmsleu_vv(ctx, arg1, arg0, arg2, arg3);
+    // Rule at src/isa/riscv64/inst_vector.isle line 1159.
+    return v4;
+}
+
+// Generated as internal constructor for term rv_vmsge_vv.
+pub fn constructor_rv_vmsge_vv<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v4 = constructor_rv_vmsle_vv(ctx, arg1, arg0, arg2, arg3);
+    // Rule at src/isa/riscv64/inst_vector.isle line 1164.
+    return v4;
+}
+
+// Generated as internal constructor for term rv_vmfeq_vv.
+pub fn constructor_rv_vmfeq_vv<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::vreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmfeqVV, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 1168.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vmfeq_vf.
+pub fn constructor_rv_vmfeq_vf<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: FReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::freg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmfeqVF, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 1173.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vmfne_vv.
+pub fn constructor_rv_vmfne_vv<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::vreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmfneVV, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 1178.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vmfne_vf.
+pub fn constructor_rv_vmfne_vf<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: FReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::freg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmfneVF, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 1183.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vmflt_vv.
+pub fn constructor_rv_vmflt_vv<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::vreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmfltVV, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 1188.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vmflt_vf.
+pub fn constructor_rv_vmflt_vf<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: FReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::freg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmfltVF, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 1193.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vmfle_vv.
+pub fn constructor_rv_vmfle_vv<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::vreg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmfleVV, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 1198.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vmfle_vf.
+pub fn constructor_rv_vmfle_vf<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: FReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::freg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmfleVF, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 1203.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vmfgt_vv.
+pub fn constructor_rv_vmfgt_vv<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v4 = constructor_rv_vmflt_vv(ctx, arg1, arg0, arg2, arg3);
+    // Rule at src/isa/riscv64/inst_vector.isle line 1209.
+    return v4;
+}
+
+// Generated as internal constructor for term rv_vmfgt_vf.
+pub fn constructor_rv_vmfgt_vf<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: FReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::freg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmfgtVF, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 1213.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vmfge_vv.
+pub fn constructor_rv_vmfge_vv<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v4 = constructor_rv_vmfle_vv(ctx, arg1, arg0, arg2, arg3);
+    // Rule at src/isa/riscv64/inst_vector.isle line 1219.
+    return v4;
+}
+
+// Generated as internal constructor for term rv_vmfge_vf.
+pub fn constructor_rv_vmfge_vf<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: FReg,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = C::freg_to_reg(ctx, arg1);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmfgeVF, v5, v6, arg2, arg3);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 1223.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vzext_vf2.
+pub fn constructor_rv_vzext_vf2<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: &VecOpMasking,
+    arg2: VState,
+) -> VReg {
+    let v4 = C::vreg_to_reg(ctx, arg0);
+    let v5 = constructor_vec_alu_rr(ctx, &VecAluOpRR::VzextVF2, v4, arg1, arg2);
+    let v6 = C::vreg_new(ctx, v5);
+    // Rule at src/isa/riscv64/inst_vector.isle line 1229.
+    return v6;
+}
+
+// Generated as internal constructor for term rv_vzext_vf4.
+pub fn constructor_rv_vzext_vf4<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: &VecOpMasking,
+    arg2: VState,
+) -> VReg {
+    let v4 = C::vreg_to_reg(ctx, arg0);
+    let v5 = constructor_vec_alu_rr(ctx, &VecAluOpRR::VzextVF4, v4, arg1, arg2);
+    let v6 = C::vreg_new(ctx, v5);
+    // Rule at src/isa/riscv64/inst_vector.isle line 1235.
+    return v6;
+}
+
+// Generated as internal constructor for term rv_vzext_vf8.
+pub fn constructor_rv_vzext_vf8<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: &VecOpMasking,
+    arg2: VState,
+) -> VReg {
+    let v4 = C::vreg_to_reg(ctx, arg0);
+    let v5 = constructor_vec_alu_rr(ctx, &VecAluOpRR::VzextVF8, v4, arg1, arg2);
+    let v6 = C::vreg_new(ctx, v5);
+    // Rule at src/isa/riscv64/inst_vector.isle line 1241.
+    return v6;
+}
+
+// Generated as internal constructor for term rv_vsext_vf2.
+pub fn constructor_rv_vsext_vf2<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: &VecOpMasking,
+    arg2: VState,
+) -> VReg {
+    let v4 = C::vreg_to_reg(ctx, arg0);
+    let v5 = constructor_vec_alu_rr(ctx, &VecAluOpRR::VsextVF2, v4, arg1, arg2);
+    let v6 = C::vreg_new(ctx, v5);
+    // Rule at src/isa/riscv64/inst_vector.isle line 1247.
+    return v6;
+}
+
+// Generated as internal constructor for term rv_vsext_vf4.
+pub fn constructor_rv_vsext_vf4<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: &VecOpMasking,
+    arg2: VState,
+) -> VReg {
+    let v4 = C::vreg_to_reg(ctx, arg0);
+    let v5 = constructor_vec_alu_rr(ctx, &VecAluOpRR::VsextVF4, v4, arg1, arg2);
+    let v6 = C::vreg_new(ctx, v5);
+    // Rule at src/isa/riscv64/inst_vector.isle line 1253.
+    return v6;
+}
+
+// Generated as internal constructor for term rv_vsext_vf8.
+pub fn constructor_rv_vsext_vf8<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: &VecOpMasking,
+    arg2: VState,
+) -> VReg {
+    let v4 = C::vreg_to_reg(ctx, arg0);
+    let v5 = constructor_vec_alu_rr(ctx, &VecAluOpRR::VsextVF8, v4, arg1, arg2);
+    let v6 = C::vreg_new(ctx, v5);
+    // Rule at src/isa/riscv64/inst_vector.isle line 1259.
+    return v6;
+}
+
+// Generated as internal constructor for term rv_vnclip_wi.
+pub fn constructor_rv_vnclip_wi<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: UImm5,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = constructor_vec_alu_rr_uimm5(ctx, &VecAluOpRRImm5::VnclipWI, v5, arg1, arg2, arg3);
+    let v7 = C::vreg_new(ctx, v6);
+    // Rule at src/isa/riscv64/inst_vector.isle line 1266.
+    return v7;
+}
+
+// Generated as internal constructor for term rv_vnclipu_wi.
+pub fn constructor_rv_vnclipu_wi<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: UImm5,
+    arg2: &VecOpMasking,
+    arg3: VState,
+) -> VReg {
+    let v5 = C::vreg_to_reg(ctx, arg0);
+    let v6 = constructor_vec_alu_rr_uimm5(ctx, &VecAluOpRRImm5::VnclipuWI, v5, arg1, arg2, arg3);
+    let v7 = C::vreg_new(ctx, v6);
+    // Rule at src/isa/riscv64/inst_vector.isle line 1273.
+    return v7;
+}
+
+// Generated as internal constructor for term rv_vmand_mm.
+pub fn constructor_rv_vmand_mm<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: VState,
+) -> VReg {
+    let v4 = C::vreg_to_reg(ctx, arg0);
+    let v5 = C::vreg_to_reg(ctx, arg1);
+    let v6 = &constructor_unmasked(ctx);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmandMM, v4, v5, v6, arg2);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 1280.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vmor_mm.
+pub fn constructor_rv_vmor_mm<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: VState,
+) -> VReg {
+    let v4 = C::vreg_to_reg(ctx, arg0);
+    let v5 = C::vreg_to_reg(ctx, arg1);
+    let v6 = &constructor_unmasked(ctx);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmorMM, v4, v5, v6, arg2);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 1287.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vmnand_mm.
+pub fn constructor_rv_vmnand_mm<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: VState,
+) -> VReg {
+    let v4 = C::vreg_to_reg(ctx, arg0);
+    let v5 = C::vreg_to_reg(ctx, arg1);
+    let v6 = &constructor_unmasked(ctx);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmnandMM, v4, v5, v6, arg2);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 1294.
+    return v8;
+}
+
+// Generated as internal constructor for term rv_vmnot_m.
+pub fn constructor_rv_vmnot_m<C: Context>(ctx: &mut C, arg0: VReg, arg1: VState) -> VReg {
+    let v2 = constructor_rv_vmnand_mm(ctx, arg0, arg0, arg1);
+    // Rule at src/isa/riscv64/inst_vector.isle line 1302.
+    return v2;
+}
+
+// Generated as internal constructor for term rv_vmnor_mm.
+pub fn constructor_rv_vmnor_mm<C: Context>(
+    ctx: &mut C,
+    arg0: VReg,
+    arg1: VReg,
+    arg2: VState,
+) -> VReg {
+    let v4 = C::vreg_to_reg(ctx, arg0);
+    let v5 = C::vreg_to_reg(ctx, arg1);
+    let v6 = &constructor_unmasked(ctx);
+    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmnorMM, v4, v5, v6, arg2);
+    let v8 = C::vreg_new(ctx, v7);
+    // Rule at src/isa/riscv64/inst_vector.isle line 1308.
+    return v8;
+}
+
+// Generated as internal constructor for term gen_extractlane.
+pub fn constructor_gen_extractlane<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: VReg,
+    arg2: u8,
+) -> Reg {
+    let v1 = C::ty_vec_fits_in_register(ctx, arg0);
+    if let Some(v2) = v1 {
+        if arg2 == 0x0 {
+            let v5 = C::ty_vector_float(ctx, v2);
+            if let Some(v6) = v5 {
+                let v7 = C::vstate_from_type(ctx, v2);
+                let v8 = constructor_rv_vfmv_fs(ctx, arg1, v7);
+                let v9 = C::freg_to_reg(ctx, v8);
+                // Rule at src/isa/riscv64/inst_vector.isle line 1316.
+                return v9;
+            }
+            let v10 = C::ty_vector_not_float(ctx, v2);
+            if let Some(v11) = v10 {
+                let v7 = C::vstate_from_type(ctx, v2);
+                let v12 = constructor_rv_vmv_xs(ctx, arg1, v7);
+                let v13 = C::xreg_to_reg(ctx, v12);
+                // Rule at src/isa/riscv64/inst_vector.isle line 1321.
+                return v13;
+            }
+        }
+        let v14 = C::uimm5_from_u8(ctx, arg2);
+        if let Some(v15) = v14 {
+            let v16 = &constructor_unmasked(ctx);
+            let v7 = C::vstate_from_type(ctx, v2);
+            let v17 = constructor_rv_vslidedown_vi(ctx, arg1, v15, v16, v7);
+            let v19 = constructor_gen_extractlane(ctx, v2, v17, 0x0);
+            // Rule at src/isa/riscv64/inst_vector.isle line 1328.
+            return v19;
+        }
+        let v21 = C::u8_as_u64(ctx, arg2);
+        let v22 = C::imm(ctx, I64, v21);
+        let v23 = C::xreg_new(ctx, v22);
+        let v16 = &constructor_unmasked(ctx);
+        let v7 = C::vstate_from_type(ctx, v2);
+        let v24 = constructor_rv_vslidedown_vx(ctx, arg1, v23, v16, v7);
+        let v25 = constructor_gen_extractlane(ctx, v2, v24, 0x0);
+        // Rule at src/isa/riscv64/inst_vector.isle line 1332.
+        return v25;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "gen_extractlane", "src/isa/riscv64/inst_vector.isle line 1313"
+    )
+}
+
+// Generated as internal constructor for term gen_vec_mask.
+pub fn constructor_gen_vec_mask<C: Context>(ctx: &mut C, arg0: u64) -> VReg {
+    let v1 = C::imm5_from_u64(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v4 = C::vstate_from_type(ctx, I64X2);
+        let v5 = constructor_rv_vmv_vi(ctx, v2, v4);
+        // Rule at src/isa/riscv64/inst_vector.isle line 1342.
+        return v5;
+    }
+    let v7 = C::imm(ctx, I64, arg0);
+    let v8 = C::xreg_new(ctx, v7);
+    let v4 = C::vstate_from_type(ctx, I64X2);
+    let v9 = constructor_rv_vmv_sx(ctx, v8, v4);
+    // Rule at src/isa/riscv64/inst_vector.isle line 1347.
+    return v9;
+}
+
+// Generated as internal constructor for term gen_constant.
+pub fn constructor_gen_constant<C: Context>(ctx: &mut C, arg0: Type, arg1: VCodeConstant) -> VReg {
+    let v3 = C::gen_const_amode(ctx, arg1);
+    let v2 = &constructor_element_width_from_type(ctx, arg0);
+    let v4 = VecAMode::UnitStride { base: v3 };
+    let v5 = C::mem_flags_trusted(ctx);
+    let v6 = &constructor_unmasked(ctx);
+    let v7 = C::vstate_from_type(ctx, arg0);
+    let v8 = constructor_vec_load(ctx, v2, &v4, v5, v6, v7);
+    let v9 = C::vreg_new(ctx, v8);
+    // Rule at src/isa/riscv64/inst_vector.isle line 1358.
+    return v9;
+}
+
+// Generated as internal constructor for term gen_slidedown_half.
+pub fn constructor_gen_slidedown_half<C: Context>(ctx: &mut C, arg0: Type, arg1: VReg) -> VReg {
+    let v1 = C::ty_vec_fits_in_register(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v4 = C::ty_lane_count(ctx, v2);
+        let v6 = C::u64_udiv(ctx, v4, 0x2);
+        if let Some(v7) = v6 {
+            let v8 = C::uimm5_from_u64(ctx, v7);
+            if let Some(v9) = v8 {
+                let v10 = &constructor_unmasked(ctx);
+                let v11 = C::vstate_from_type(ctx, v2);
+                let v12 = constructor_rv_vslidedown_vi(ctx, arg1, v9, v10, v11);
+                // Rule at src/isa/riscv64/inst_vector.isle line 1371.
+                return v12;
+            }
+            let v14 = C::imm(ctx, I64, v7);
+            let v15 = C::xreg_new(ctx, v14);
+            let v10 = &constructor_unmasked(ctx);
+            let v11 = C::vstate_from_type(ctx, v2);
+            let v16 = constructor_rv_vslidedown_vx(ctx, arg1, v15, v10, v11);
+            // Rule at src/isa/riscv64/inst_vector.isle line 1376.
+            return v16;
+        }
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "gen_slidedown_half", "src/isa/riscv64/inst_vector.isle line 1368"
+    )
+}
+
+// Generated as internal constructor for term gen_expand_mask.
+pub fn constructor_gen_expand_mask<C: Context>(ctx: &mut C, arg0: Type, arg1: VReg) -> VReg {
+    let v3 = C::imm5_from_i8(ctx, 0x0);
+    if let Some(v4) = v3 {
+        let v6 = C::imm5_from_i8(ctx, -0x1);
+        if let Some(v7) = v6 {
+            let v8 = C::vstate_from_type(ctx, arg0);
+            let v9 = constructor_rv_vmv_vi(ctx, v4, v8);
+            let v10 = constructor_rv_vmerge_vim(ctx, v9, v7, arg1, v8);
+            // Rule at src/isa/riscv64/inst_vector.isle line 1384.
+            return v10;
+        }
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "gen_expand_mask", "src/isa/riscv64/inst_vector.isle line 1383"
+    )
+}
+
+// Generated as internal constructor for term gen_icmp_mask.
+pub fn constructor_gen_icmp_mask<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &IntCC,
+    arg2: Value,
+    arg3: Value,
+) -> VReg {
+    let v1 = C::ty_vec_fits_in_register(ctx, arg0);
+    if let Some(v2) = v1 {
+        match arg1 {
+            &IntCC::Equal => {
+                let v18 = C::def_inst(ctx, arg2);
+                if let Some(v19) = v18 {
+                    let v20 = &C::inst_data(ctx, v19);
+                    if let &InstructionData::Unary {
+                        opcode: ref v21,
+                        arg: v22,
+                    } = v20
+                    {
+                        if let &Opcode::Splat = v21 {
+                            let v35 = C::def_inst(ctx, v22);
+                            if let Some(v36) = v35 {
+                                let v37 = &C::inst_data(ctx, v36);
+                                if let &InstructionData::UnaryImm {
+                                    opcode: ref v38,
+                                    imm: v39,
+                                } = v37
+                                {
+                                    if let &Opcode::Iconst = v38 {
+                                        let v40 = C::u64_from_imm64(ctx, v39);
+                                        let v41 = C::imm5_from_u64(ctx, v40);
+                                        if let Some(v42) = v41 {
+                                            let v23 = constructor_put_in_vreg(ctx, arg3);
+                                            let v8 = &constructor_unmasked(ctx);
+                                            let v9 = C::vstate_from_type(ctx, v2);
+                                            let v43 =
+                                                constructor_rv_vmseq_vi(ctx, v23, v42, v8, v9);
+                                            // Rule at src/isa/riscv64/inst_vector.isle line 1408.
+                                            return v43;
+                                        }
+                                    }
+                                }
+                            }
+                        }
+                    }
+                }
+                let v11 = C::def_inst(ctx, arg3);
+                if let Some(v12) = v11 {
+                    let v13 = &C::inst_data(ctx, v12);
+                    if let &InstructionData::Unary {
+                        opcode: ref v14,
+                        arg: v15,
+                    } = v13
+                    {
+                        if let &Opcode::Splat = v14 {
+                            let v26 = C::def_inst(ctx, v15);
+                            if let Some(v27) = v26 {
+                                let v28 = &C::inst_data(ctx, v27);
+                                if let &InstructionData::UnaryImm {
+                                    opcode: ref v29,
+                                    imm: v30,
+                                } = v28
+                                {
+                                    if let &Opcode::Iconst = v29 {
+                                        let v31 = C::u64_from_imm64(ctx, v30);
+                                        let v32 = C::imm5_from_u64(ctx, v31);
+                                        if let Some(v33) = v32 {
+                                            let v6 = constructor_put_in_vreg(ctx, arg2);
+                                            let v8 = &constructor_unmasked(ctx);
+                                            let v9 = C::vstate_from_type(ctx, v2);
+                                            let v34 = constructor_rv_vmseq_vi(ctx, v6, v33, v8, v9);
+                                            // Rule at src/isa/riscv64/inst_vector.isle line 1405.
+                                            return v34;
+                                        }
+                                    }
+                                }
+                            }
+                        }
+                    }
+                }
+                if let Some(v19) = v18 {
+                    let v20 = &C::inst_data(ctx, v19);
+                    if let &InstructionData::Unary {
+                        opcode: ref v21,
+                        arg: v22,
+                    } = v20
+                    {
+                        if let &Opcode::Splat = v21 {
+                            let v23 = constructor_put_in_vreg(ctx, arg3);
+                            let v24 = constructor_put_in_xreg(ctx, v22);
+                            let v8 = &constructor_unmasked(ctx);
+                            let v9 = C::vstate_from_type(ctx, v2);
+                            let v25 = constructor_rv_vmseq_vx(ctx, v23, v24, v8, v9);
+                            // Rule at src/isa/riscv64/inst_vector.isle line 1402.
+                            return v25;
+                        }
+                    }
+                }
+                if let Some(v12) = v11 {
+                    let v13 = &C::inst_data(ctx, v12);
+                    if let &InstructionData::Unary {
+                        opcode: ref v14,
+                        arg: v15,
+                    } = v13
+                    {
+                        if let &Opcode::Splat = v14 {
+                            let v6 = constructor_put_in_vreg(ctx, arg2);
+                            let v16 = constructor_put_in_xreg(ctx, v15);
+                            let v8 = &constructor_unmasked(ctx);
+                            let v9 = C::vstate_from_type(ctx, v2);
+                            let v17 = constructor_rv_vmseq_vx(ctx, v6, v16, v8, v9);
+                            // Rule at src/isa/riscv64/inst_vector.isle line 1399.
+                            return v17;
+                        }
+                    }
+                }
+                let v6 = constructor_put_in_vreg(ctx, arg2);
+                let v7 = constructor_put_in_vreg(ctx, arg3);
+                let v8 = &constructor_unmasked(ctx);
+                let v9 = C::vstate_from_type(ctx, v2);
+                let v10 = constructor_rv_vmseq_vv(ctx, v6, v7, v8, v9);
+                // Rule at src/isa/riscv64/inst_vector.isle line 1396.
+                return v10;
+            }
+            &IntCC::NotEqual => {
+                let v18 = C::def_inst(ctx, arg2);
+                if let Some(v19) = v18 {
+                    let v20 = &C::inst_data(ctx, v19);
+                    if let &InstructionData::Unary {
+                        opcode: ref v21,
+                        arg: v22,
+                    } = v20
+                    {
+                        if let &Opcode::Splat = v21 {
+                            let v35 = C::def_inst(ctx, v22);
+                            if let Some(v36) = v35 {
+                                let v37 = &C::inst_data(ctx, v36);
+                                if let &InstructionData::UnaryImm {
+                                    opcode: ref v38,
+                                    imm: v39,
+                                } = v37
+                                {
+                                    if let &Opcode::Iconst = v38 {
+                                        let v40 = C::u64_from_imm64(ctx, v39);
+                                        let v41 = C::imm5_from_u64(ctx, v40);
+                                        if let Some(v42) = v41 {
+                                            let v23 = constructor_put_in_vreg(ctx, arg3);
+                                            let v8 = &constructor_unmasked(ctx);
+                                            let v9 = C::vstate_from_type(ctx, v2);
+                                            let v48 =
+                                                constructor_rv_vmsne_vi(ctx, v23, v42, v8, v9);
+                                            // Rule at src/isa/riscv64/inst_vector.isle line 1425.
+                                            return v48;
+                                        }
+                                    }
+                                }
+                            }
+                        }
+                    }
+                }
+                let v11 = C::def_inst(ctx, arg3);
+                if let Some(v12) = v11 {
+                    let v13 = &C::inst_data(ctx, v12);
+                    if let &InstructionData::Unary {
+                        opcode: ref v14,
+                        arg: v15,
+                    } = v13
+                    {
+                        if let &Opcode::Splat = v14 {
+                            let v26 = C::def_inst(ctx, v15);
+                            if let Some(v27) = v26 {
+                                let v28 = &C::inst_data(ctx, v27);
+                                if let &InstructionData::UnaryImm {
+                                    opcode: ref v29,
+                                    imm: v30,
+                                } = v28
+                                {
+                                    if let &Opcode::Iconst = v29 {
+                                        let v31 = C::u64_from_imm64(ctx, v30);
+                                        let v32 = C::imm5_from_u64(ctx, v31);
+                                        if let Some(v33) = v32 {
+                                            let v6 = constructor_put_in_vreg(ctx, arg2);
+                                            let v8 = &constructor_unmasked(ctx);
+                                            let v9 = C::vstate_from_type(ctx, v2);
+                                            let v47 = constructor_rv_vmsne_vi(ctx, v6, v33, v8, v9);
+                                            // Rule at src/isa/riscv64/inst_vector.isle line 1422.
+                                            return v47;
+                                        }
+                                    }
+                                }
+                            }
+                        }
+                    }
+                }
+                if let Some(v19) = v18 {
+                    let v20 = &C::inst_data(ctx, v19);
+                    if let &InstructionData::Unary {
+                        opcode: ref v21,
+                        arg: v22,
+                    } = v20
+                    {
+                        if let &Opcode::Splat = v21 {
+                            let v23 = constructor_put_in_vreg(ctx, arg3);
+                            let v24 = constructor_put_in_xreg(ctx, v22);
+                            let v8 = &constructor_unmasked(ctx);
+                            let v9 = C::vstate_from_type(ctx, v2);
+                            let v46 = constructor_rv_vmsne_vx(ctx, v23, v24, v8, v9);
+                            // Rule at src/isa/riscv64/inst_vector.isle line 1419.
+                            return v46;
+                        }
+                    }
+                }
+                if let Some(v12) = v11 {
+                    let v13 = &C::inst_data(ctx, v12);
+                    if let &InstructionData::Unary {
+                        opcode: ref v14,
+                        arg: v15,
+                    } = v13
+                    {
+                        if let &Opcode::Splat = v14 {
+                            let v6 = constructor_put_in_vreg(ctx, arg2);
+                            let v16 = constructor_put_in_xreg(ctx, v15);
+                            let v8 = &constructor_unmasked(ctx);
+                            let v9 = C::vstate_from_type(ctx, v2);
+                            let v45 = constructor_rv_vmsne_vx(ctx, v6, v16, v8, v9);
+                            // Rule at src/isa/riscv64/inst_vector.isle line 1416.
+                            return v45;
+                        }
+                    }
+                }
+                let v6 = constructor_put_in_vreg(ctx, arg2);
+                let v7 = constructor_put_in_vreg(ctx, arg3);
+                let v8 = &constructor_unmasked(ctx);
+                let v9 = C::vstate_from_type(ctx, v2);
+                let v44 = constructor_rv_vmsne_vv(ctx, v6, v7, v8, v9);
+                // Rule at src/isa/riscv64/inst_vector.isle line 1413.
+                return v44;
+            }
+            &IntCC::SignedGreaterThan => {
+                let v11 = C::def_inst(ctx, arg3);
+                if let Some(v12) = v11 {
+                    let v13 = &C::inst_data(ctx, v12);
+                    if let &InstructionData::Unary {
+                        opcode: ref v14,
+                        arg: v15,
+                    } = v13
+                    {
+                        if let &Opcode::Splat = v14 {
+                            let v26 = C::def_inst(ctx, v15);
+                            if let Some(v27) = v26 {
+                                let v28 = &C::inst_data(ctx, v27);
+                                if let &InstructionData::UnaryImm {
+                                    opcode: ref v29,
+                                    imm: v30,
+                                } = v28
+                                {
+                                    if let &Opcode::Iconst = v29 {
+                                        let v31 = C::u64_from_imm64(ctx, v30);
+                                        let v32 = C::imm5_from_u64(ctx, v31);
+                                        if let Some(v33) = v32 {
+                                            let v6 = constructor_put_in_vreg(ctx, arg2);
+                                            let v8 = &constructor_unmasked(ctx);
+                                            let v9 = C::vstate_from_type(ctx, v2);
+                                            let v70 = constructor_rv_vmsgt_vi(ctx, v6, v33, v8, v9);
+                                            // Rule at src/isa/riscv64/inst_vector.isle line 1503.
+                                            return v70;
+                                        }
+                                    }
+                                }
+                            }
+                        }
+                    }
+                }
+                let v18 = C::def_inst(ctx, arg2);
+                if let Some(v19) = v18 {
+                    let v20 = &C::inst_data(ctx, v19);
+                    if let &InstructionData::Unary {
+                        opcode: ref v21,
+                        arg: v22,
+                    } = v20
+                    {
+                        if let &Opcode::Splat = v21 {
+                            let v23 = constructor_put_in_vreg(ctx, arg3);
+                            let v24 = constructor_put_in_xreg(ctx, v22);
+                            let v8 = &constructor_unmasked(ctx);
+                            let v9 = C::vstate_from_type(ctx, v2);
+                            let v69 = constructor_rv_vmslt_vx(ctx, v23, v24, v8, v9);
+                            // Rule at src/isa/riscv64/inst_vector.isle line 1500.
+                            return v69;
+                        }
+                    }
+                }
+                if let Some(v12) = v11 {
+                    let v13 = &C::inst_data(ctx, v12);
+                    if let &InstructionData::Unary {
+                        opcode: ref v14,
+                        arg: v15,
+                    } = v13
+                    {
+                        if let &Opcode::Splat = v14 {
+                            let v6 = constructor_put_in_vreg(ctx, arg2);
+                            let v16 = constructor_put_in_xreg(ctx, v15);
+                            let v8 = &constructor_unmasked(ctx);
+                            let v9 = C::vstate_from_type(ctx, v2);
+                            let v68 = constructor_rv_vmsgt_vx(ctx, v6, v16, v8, v9);
+                            // Rule at src/isa/riscv64/inst_vector.isle line 1497.
+                            return v68;
+                        }
+                    }
+                }
+                let v6 = constructor_put_in_vreg(ctx, arg2);
+                let v7 = constructor_put_in_vreg(ctx, arg3);
+                let v8 = &constructor_unmasked(ctx);
+                let v9 = C::vstate_from_type(ctx, v2);
+                let v67 = constructor_rv_vmsgt_vv(ctx, v6, v7, v8, v9);
+                // Rule at src/isa/riscv64/inst_vector.isle line 1494.
+                return v67;
+            }
+            &IntCC::SignedGreaterThanOrEqual => {
+                let v18 = C::def_inst(ctx, arg2);
+                if let Some(v19) = v18 {
+                    let v20 = &C::inst_data(ctx, v19);
+                    if let &InstructionData::Unary {
+                        opcode: ref v21,
+                        arg: v22,
+                    } = v20
+                    {
+                        if let &Opcode::Splat = v21 {
+                            let v35 = C::def_inst(ctx, v22);
+                            if let Some(v36) = v35 {
+                                let v37 = &C::inst_data(ctx, v36);
+                                if let &InstructionData::UnaryImm {
+                                    opcode: ref v38,
+                                    imm: v39,
+                                } = v37
+                                {
+                                    if let &Opcode::Iconst = v38 {
+                                        let v40 = C::u64_from_imm64(ctx, v39);
+                                        let v41 = C::imm5_from_u64(ctx, v40);
+                                        if let Some(v42) = v41 {
+                                            let v23 = constructor_put_in_vreg(ctx, arg3);
+                                            let v8 = &constructor_unmasked(ctx);
+                                            let v9 = C::vstate_from_type(ctx, v2);
+                                            let v76 =
+                                                constructor_rv_vmsle_vi(ctx, v23, v42, v8, v9);
+                                            // Rule at src/isa/riscv64/inst_vector.isle line 1525.
+                                            return v76;
+                                        }
+                                    }
+                                }
+                            }
+                            let v23 = constructor_put_in_vreg(ctx, arg3);
+                            let v24 = constructor_put_in_xreg(ctx, v22);
+                            let v8 = &constructor_unmasked(ctx);
+                            let v9 = C::vstate_from_type(ctx, v2);
+                            let v75 = constructor_rv_vmsle_vx(ctx, v23, v24, v8, v9);
+                            // Rule at src/isa/riscv64/inst_vector.isle line 1522.
+                            return v75;
+                        }
+                    }
+                }
+                let v6 = constructor_put_in_vreg(ctx, arg2);
+                let v7 = constructor_put_in_vreg(ctx, arg3);
+                let v8 = &constructor_unmasked(ctx);
+                let v9 = C::vstate_from_type(ctx, v2);
+                let v74 = constructor_rv_vmsge_vv(ctx, v6, v7, v8, v9);
+                // Rule at src/isa/riscv64/inst_vector.isle line 1519.
+                return v74;
+            }
+            &IntCC::SignedLessThan => {
+                let v18 = C::def_inst(ctx, arg2);
+                if let Some(v19) = v18 {
+                    let v20 = &C::inst_data(ctx, v19);
+                    if let &InstructionData::Unary {
+                        opcode: ref v21,
+                        arg: v22,
+                    } = v20
+                    {
+                        if let &Opcode::Splat = v21 {
+                            let v35 = C::def_inst(ctx, v22);
+                            if let Some(v36) = v35 {
+                                let v37 = &C::inst_data(ctx, v36);
+                                if let &InstructionData::UnaryImm {
+                                    opcode: ref v38,
+                                    imm: v39,
+                                } = v37
+                                {
+                                    if let &Opcode::Iconst = v38 {
+                                        let v40 = C::u64_from_imm64(ctx, v39);
+                                        let v41 = C::imm5_from_u64(ctx, v40);
+                                        if let Some(v42) = v41 {
+                                            let v23 = constructor_put_in_vreg(ctx, arg3);
+                                            let v8 = &constructor_unmasked(ctx);
+                                            let v9 = C::vstate_from_type(ctx, v2);
+                                            let v56 =
+                                                constructor_rv_vmsgt_vi(ctx, v23, v42, v8, v9);
+                                            // Rule at src/isa/riscv64/inst_vector.isle line 1453.
+                                            return v56;
+                                        }
+                                    }
+                                }
+                            }
+                            let v23 = constructor_put_in_vreg(ctx, arg3);
+                            let v24 = constructor_put_in_xreg(ctx, v22);
+                            let v8 = &constructor_unmasked(ctx);
+                            let v9 = C::vstate_from_type(ctx, v2);
+                            let v55 = constructor_rv_vmsgt_vx(ctx, v23, v24, v8, v9);
+                            // Rule at src/isa/riscv64/inst_vector.isle line 1450.
+                            return v55;
+                        }
+                    }
+                }
+                let v11 = C::def_inst(ctx, arg3);
+                if let Some(v12) = v11 {
+                    let v13 = &C::inst_data(ctx, v12);
+                    if let &InstructionData::Unary {
+                        opcode: ref v14,
+                        arg: v15,
+                    } = v13
+                    {
+                        if let &Opcode::Splat = v14 {
+                            let v6 = constructor_put_in_vreg(ctx, arg2);
+                            let v16 = constructor_put_in_xreg(ctx, v15);
+                            let v8 = &constructor_unmasked(ctx);
+                            let v9 = C::vstate_from_type(ctx, v2);
+                            let v54 = constructor_rv_vmslt_vx(ctx, v6, v16, v8, v9);
+                            // Rule at src/isa/riscv64/inst_vector.isle line 1447.
+                            return v54;
+                        }
+                    }
+                }
+                let v6 = constructor_put_in_vreg(ctx, arg2);
+                let v7 = constructor_put_in_vreg(ctx, arg3);
+                let v8 = &constructor_unmasked(ctx);
+                let v9 = C::vstate_from_type(ctx, v2);
+                let v53 = constructor_rv_vmslt_vv(ctx, v6, v7, v8, v9);
+                // Rule at src/isa/riscv64/inst_vector.isle line 1444.
+                return v53;
+            }
+            &IntCC::SignedLessThanOrEqual => {
+                let v11 = C::def_inst(ctx, arg3);
+                if let Some(v12) = v11 {
+                    let v13 = &C::inst_data(ctx, v12);
+                    if let &InstructionData::Unary {
+                        opcode: ref v14,
+                        arg: v15,
+                    } = v13
+                    {
+                        if let &Opcode::Splat = v14 {
+                            let v26 = C::def_inst(ctx, v15);
+                            if let Some(v27) = v26 {
+                                let v28 = &C::inst_data(ctx, v27);
+                                if let &InstructionData::UnaryImm {
+                                    opcode: ref v29,
+                                    imm: v30,
+                                } = v28
+                                {
+                                    if let &Opcode::Iconst = v29 {
+                                        let v31 = C::u64_from_imm64(ctx, v30);
+                                        let v32 = C::imm5_from_u64(ctx, v31);
+                                        if let Some(v33) = v32 {
+                                            let v6 = constructor_put_in_vreg(ctx, arg2);
+                                            let v8 = &constructor_unmasked(ctx);
+                                            let v9 = C::vstate_from_type(ctx, v2);
+                                            let v62 = constructor_rv_vmsle_vi(ctx, v6, v33, v8, v9);
+                                            // Rule at src/isa/riscv64/inst_vector.isle line 1475.
+                                            return v62;
+                                        }
+                                    }
+                                }
+                            }
+                            let v6 = constructor_put_in_vreg(ctx, arg2);
+                            let v16 = constructor_put_in_xreg(ctx, v15);
+                            let v8 = &constructor_unmasked(ctx);
+                            let v9 = C::vstate_from_type(ctx, v2);
+                            let v61 = constructor_rv_vmsle_vx(ctx, v6, v16, v8, v9);
+                            // Rule at src/isa/riscv64/inst_vector.isle line 1472.
+                            return v61;
+                        }
+                    }
+                }
+                let v6 = constructor_put_in_vreg(ctx, arg2);
+                let v7 = constructor_put_in_vreg(ctx, arg3);
+                let v8 = &constructor_unmasked(ctx);
+                let v9 = C::vstate_from_type(ctx, v2);
+                let v60 = constructor_rv_vmsle_vv(ctx, v6, v7, v8, v9);
+                // Rule at src/isa/riscv64/inst_vector.isle line 1469.
+                return v60;
+            }
+            &IntCC::UnsignedGreaterThan => {
+                let v11 = C::def_inst(ctx, arg3);
+                if let Some(v12) = v11 {
+                    let v13 = &C::inst_data(ctx, v12);
+                    if let &InstructionData::Unary {
+                        opcode: ref v14,
+                        arg: v15,
+                    } = v13
+                    {
+                        if let &Opcode::Splat = v14 {
+                            let v26 = C::def_inst(ctx, v15);
+                            if let Some(v27) = v26 {
+                                let v28 = &C::inst_data(ctx, v27);
+                                if let &InstructionData::UnaryImm {
+                                    opcode: ref v29,
+                                    imm: v30,
+                                } = v28
+                                {
+                                    if let &Opcode::Iconst = v29 {
+                                        let v31 = C::u64_from_imm64(ctx, v30);
+                                        let v32 = C::imm5_from_u64(ctx, v31);
+                                        if let Some(v33) = v32 {
+                                            let v6 = constructor_put_in_vreg(ctx, arg2);
+                                            let v8 = &constructor_unmasked(ctx);
+                                            let v9 = C::vstate_from_type(ctx, v2);
+                                            let v66 =
+                                                constructor_rv_vmsgtu_vi(ctx, v6, v33, v8, v9);
+                                            // Rule at src/isa/riscv64/inst_vector.isle line 1489.
+                                            return v66;
+                                        }
+                                    }
+                                }
+                            }
+                        }
+                    }
+                }
+                let v18 = C::def_inst(ctx, arg2);
+                if let Some(v19) = v18 {
+                    let v20 = &C::inst_data(ctx, v19);
+                    if let &InstructionData::Unary {
+                        opcode: ref v21,
+                        arg: v22,
+                    } = v20
+                    {
+                        if let &Opcode::Splat = v21 {
+                            let v23 = constructor_put_in_vreg(ctx, arg3);
+                            let v24 = constructor_put_in_xreg(ctx, v22);
+                            let v8 = &constructor_unmasked(ctx);
+                            let v9 = C::vstate_from_type(ctx, v2);
+                            let v65 = constructor_rv_vmsltu_vx(ctx, v23, v24, v8, v9);
+                            // Rule at src/isa/riscv64/inst_vector.isle line 1486.
+                            return v65;
+                        }
+                    }
+                }
+                if let Some(v12) = v11 {
+                    let v13 = &C::inst_data(ctx, v12);
+                    if let &InstructionData::Unary {
+                        opcode: ref v14,
+                        arg: v15,
+                    } = v13
+                    {
+                        if let &Opcode::Splat = v14 {
+                            let v6 = constructor_put_in_vreg(ctx, arg2);
+                            let v16 = constructor_put_in_xreg(ctx, v15);
+                            let v8 = &constructor_unmasked(ctx);
+                            let v9 = C::vstate_from_type(ctx, v2);
+                            let v64 = constructor_rv_vmsgtu_vx(ctx, v6, v16, v8, v9);
+                            // Rule at src/isa/riscv64/inst_vector.isle line 1483.
+                            return v64;
+                        }
+                    }
+                }
+                let v6 = constructor_put_in_vreg(ctx, arg2);
+                let v7 = constructor_put_in_vreg(ctx, arg3);
+                let v8 = &constructor_unmasked(ctx);
+                let v9 = C::vstate_from_type(ctx, v2);
+                let v63 = constructor_rv_vmsgtu_vv(ctx, v6, v7, v8, v9);
+                // Rule at src/isa/riscv64/inst_vector.isle line 1480.
+                return v63;
+            }
+            &IntCC::UnsignedGreaterThanOrEqual => {
+                let v18 = C::def_inst(ctx, arg2);
+                if let Some(v19) = v18 {
+                    let v20 = &C::inst_data(ctx, v19);
+                    if let &InstructionData::Unary {
+                        opcode: ref v21,
+                        arg: v22,
+                    } = v20
+                    {
+                        if let &Opcode::Splat = v21 {
+                            let v35 = C::def_inst(ctx, v22);
+                            if let Some(v36) = v35 {
+                                let v37 = &C::inst_data(ctx, v36);
+                                if let &InstructionData::UnaryImm {
+                                    opcode: ref v38,
+                                    imm: v39,
+                                } = v37
+                                {
+                                    if let &Opcode::Iconst = v38 {
+                                        let v40 = C::u64_from_imm64(ctx, v39);
+                                        let v41 = C::imm5_from_u64(ctx, v40);
+                                        if let Some(v42) = v41 {
+                                            let v23 = constructor_put_in_vreg(ctx, arg3);
+                                            let v8 = &constructor_unmasked(ctx);
+                                            let v9 = C::vstate_from_type(ctx, v2);
+                                            let v73 =
+                                                constructor_rv_vmsleu_vi(ctx, v23, v42, v8, v9);
+                                            // Rule at src/isa/riscv64/inst_vector.isle line 1514.
+                                            return v73;
+                                        }
+                                    }
+                                }
+                            }
+                            let v23 = constructor_put_in_vreg(ctx, arg3);
+                            let v24 = constructor_put_in_xreg(ctx, v22);
+                            let v8 = &constructor_unmasked(ctx);
+                            let v9 = C::vstate_from_type(ctx, v2);
+                            let v72 = constructor_rv_vmsleu_vx(ctx, v23, v24, v8, v9);
+                            // Rule at src/isa/riscv64/inst_vector.isle line 1511.
+                            return v72;
+                        }
+                    }
+                }
+                let v6 = constructor_put_in_vreg(ctx, arg2);
+                let v7 = constructor_put_in_vreg(ctx, arg3);
+                let v8 = &constructor_unmasked(ctx);
+                let v9 = C::vstate_from_type(ctx, v2);
+                let v71 = constructor_rv_vmsgeu_vv(ctx, v6, v7, v8, v9);
+                // Rule at src/isa/riscv64/inst_vector.isle line 1508.
+                return v71;
+            }
+            &IntCC::UnsignedLessThan => {
+                let v18 = C::def_inst(ctx, arg2);
+                if let Some(v19) = v18 {
+                    let v20 = &C::inst_data(ctx, v19);
+                    if let &InstructionData::Unary {
+                        opcode: ref v21,
+                        arg: v22,
+                    } = v20
+                    {
+                        if let &Opcode::Splat = v21 {
+                            let v35 = C::def_inst(ctx, v22);
+                            if let Some(v36) = v35 {
+                                let v37 = &C::inst_data(ctx, v36);
+                                if let &InstructionData::UnaryImm {
+                                    opcode: ref v38,
+                                    imm: v39,
+                                } = v37
+                                {
+                                    if let &Opcode::Iconst = v38 {
+                                        let v40 = C::u64_from_imm64(ctx, v39);
+                                        let v41 = C::imm5_from_u64(ctx, v40);
+                                        if let Some(v42) = v41 {
+                                            let v23 = constructor_put_in_vreg(ctx, arg3);
+                                            let v8 = &constructor_unmasked(ctx);
+                                            let v9 = C::vstate_from_type(ctx, v2);
+                                            let v52 =
+                                                constructor_rv_vmsgtu_vi(ctx, v23, v42, v8, v9);
+                                            // Rule at src/isa/riscv64/inst_vector.isle line 1439.
+                                            return v52;
+                                        }
+                                    }
+                                }
+                            }
+                            let v23 = constructor_put_in_vreg(ctx, arg3);
+                            let v24 = constructor_put_in_xreg(ctx, v22);
+                            let v8 = &constructor_unmasked(ctx);
+                            let v9 = C::vstate_from_type(ctx, v2);
+                            let v51 = constructor_rv_vmsgtu_vx(ctx, v23, v24, v8, v9);
+                            // Rule at src/isa/riscv64/inst_vector.isle line 1436.
+                            return v51;
+                        }
+                    }
+                }
+                let v11 = C::def_inst(ctx, arg3);
+                if let Some(v12) = v11 {
+                    let v13 = &C::inst_data(ctx, v12);
+                    if let &InstructionData::Unary {
+                        opcode: ref v14,
+                        arg: v15,
+                    } = v13
+                    {
+                        if let &Opcode::Splat = v14 {
+                            let v6 = constructor_put_in_vreg(ctx, arg2);
+                            let v16 = constructor_put_in_xreg(ctx, v15);
+                            let v8 = &constructor_unmasked(ctx);
+                            let v9 = C::vstate_from_type(ctx, v2);
+                            let v50 = constructor_rv_vmsltu_vx(ctx, v6, v16, v8, v9);
+                            // Rule at src/isa/riscv64/inst_vector.isle line 1433.
+                            return v50;
+                        }
+                    }
+                }
+                let v6 = constructor_put_in_vreg(ctx, arg2);
+                let v7 = constructor_put_in_vreg(ctx, arg3);
+                let v8 = &constructor_unmasked(ctx);
+                let v9 = C::vstate_from_type(ctx, v2);
+                let v49 = constructor_rv_vmsltu_vv(ctx, v6, v7, v8, v9);
+                // Rule at src/isa/riscv64/inst_vector.isle line 1430.
+                return v49;
+            }
+            &IntCC::UnsignedLessThanOrEqual => {
+                let v11 = C::def_inst(ctx, arg3);
+                if let Some(v12) = v11 {
+                    let v13 = &C::inst_data(ctx, v12);
+                    if let &InstructionData::Unary {
+                        opcode: ref v14,
+                        arg: v15,
+                    } = v13
+                    {
+                        if let &Opcode::Splat = v14 {
+                            let v26 = C::def_inst(ctx, v15);
+                            if let Some(v27) = v26 {
+                                let v28 = &C::inst_data(ctx, v27);
+                                if let &InstructionData::UnaryImm {
+                                    opcode: ref v29,
+                                    imm: v30,
+                                } = v28
+                                {
+                                    if let &Opcode::Iconst = v29 {
+                                        let v31 = C::u64_from_imm64(ctx, v30);
+                                        let v32 = C::imm5_from_u64(ctx, v31);
+                                        if let Some(v33) = v32 {
+                                            let v6 = constructor_put_in_vreg(ctx, arg2);
+                                            let v8 = &constructor_unmasked(ctx);
+                                            let v9 = C::vstate_from_type(ctx, v2);
+                                            let v59 =
+                                                constructor_rv_vmsleu_vi(ctx, v6, v33, v8, v9);
+                                            // Rule at src/isa/riscv64/inst_vector.isle line 1464.
+                                            return v59;
+                                        }
+                                    }
+                                }
+                            }
+                            let v6 = constructor_put_in_vreg(ctx, arg2);
+                            let v16 = constructor_put_in_xreg(ctx, v15);
+                            let v8 = &constructor_unmasked(ctx);
+                            let v9 = C::vstate_from_type(ctx, v2);
+                            let v58 = constructor_rv_vmsleu_vx(ctx, v6, v16, v8, v9);
+                            // Rule at src/isa/riscv64/inst_vector.isle line 1461.
+                            return v58;
+                        }
+                    }
+                }
+                let v6 = constructor_put_in_vreg(ctx, arg2);
+                let v7 = constructor_put_in_vreg(ctx, arg3);
+                let v8 = &constructor_unmasked(ctx);
+                let v9 = C::vstate_from_type(ctx, v2);
+                let v57 = constructor_rv_vmsleu_vv(ctx, v6, v7, v8, v9);
+                // Rule at src/isa/riscv64/inst_vector.isle line 1458.
+                return v57;
+            }
+            _ => {}
+        }
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "gen_icmp_mask", "src/isa/riscv64/inst_vector.isle line 1392"
+    )
+}
+
+// Generated as internal constructor for term gen_fcmp_mask.
+pub fn constructor_gen_fcmp_mask<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &FloatCC,
+    arg2: Value,
+    arg3: Value,
+) -> VReg {
+    let v1 = C::ty_vec_fits_in_register(ctx, arg0);
+    if let Some(v2) = v1 {
+        match arg1 {
+            &FloatCC::Equal => {
+                let v18 = C::def_inst(ctx, arg2);
+                if let Some(v19) = v18 {
+                    let v20 = &C::inst_data(ctx, v19);
+                    if let &InstructionData::Unary {
+                        opcode: ref v21,
+                        arg: v22,
+                    } = v20
+                    {
+                        if let &Opcode::Splat = v21 {
+                            let v23 = constructor_put_in_vreg(ctx, arg3);
+                            let v24 = constructor_put_in_freg(ctx, v22);
+                            let v8 = &constructor_unmasked(ctx);
+                            let v9 = C::vstate_from_type(ctx, v2);
+                            let v25 = constructor_rv_vmfeq_vf(ctx, v23, v24, v8, v9);
+                            // Rule at src/isa/riscv64/inst_vector.isle line 1541.
+                            return v25;
+                        }
+                    }
+                }
+                let v11 = C::def_inst(ctx, arg3);
+                if let Some(v12) = v11 {
+                    let v13 = &C::inst_data(ctx, v12);
+                    if let &InstructionData::Unary {
+                        opcode: ref v14,
+                        arg: v15,
+                    } = v13
+                    {
+                        if let &Opcode::Splat = v14 {
+                            let v6 = constructor_put_in_vreg(ctx, arg2);
+                            let v16 = constructor_put_in_freg(ctx, v15);
+                            let v8 = &constructor_unmasked(ctx);
+                            let v9 = C::vstate_from_type(ctx, v2);
+                            let v17 = constructor_rv_vmfeq_vf(ctx, v6, v16, v8, v9);
+                            // Rule at src/isa/riscv64/inst_vector.isle line 1538.
+                            return v17;
+                        }
+                    }
+                }
+                let v6 = constructor_put_in_vreg(ctx, arg2);
+                let v7 = constructor_put_in_vreg(ctx, arg3);
+                let v8 = &constructor_unmasked(ctx);
+                let v9 = C::vstate_from_type(ctx, v2);
+                let v10 = constructor_rv_vmfeq_vv(ctx, v6, v7, v8, v9);
+                // Rule at src/isa/riscv64/inst_vector.isle line 1535.
+                return v10;
+            }
+            &FloatCC::GreaterThan => {
+                let v18 = C::def_inst(ctx, arg2);
+                if let Some(v19) = v18 {
+                    let v20 = &C::inst_data(ctx, v19);
+                    if let &InstructionData::Unary {
+                        opcode: ref v21,
+                        arg: v22,
+                    } = v20
+                    {
+                        if let &Opcode::Splat = v21 {
+                            let v23 = constructor_put_in_vreg(ctx, arg3);
+                            let v24 = constructor_put_in_freg(ctx, v22);
+                            let v8 = &constructor_unmasked(ctx);
+                            let v9 = C::vstate_from_type(ctx, v2);
+                            let v37 = constructor_rv_vmflt_vf(ctx, v23, v24, v8, v9);
+                            // Rule at src/isa/riscv64/inst_vector.isle line 1586.
+                            return v37;
+                        }
+                    }
+                }
+                let v11 = C::def_inst(ctx, arg3);
+                if let Some(v12) = v11 {
+                    let v13 = &C::inst_data(ctx, v12);
+                    if let &InstructionData::Unary {
+                        opcode: ref v14,
+                        arg: v15,
+                    } = v13
+                    {
+                        if let &Opcode::Splat = v14 {
+                            let v6 = constructor_put_in_vreg(ctx, arg2);
+                            let v16 = constructor_put_in_freg(ctx, v15);
+                            let v8 = &constructor_unmasked(ctx);
+                            let v9 = C::vstate_from_type(ctx, v2);
+                            let v36 = constructor_rv_vmfgt_vf(ctx, v6, v16, v8, v9);
+                            // Rule at src/isa/riscv64/inst_vector.isle line 1583.
+                            return v36;
+                        }
+                    }
+                }
+                let v6 = constructor_put_in_vreg(ctx, arg2);
+                let v7 = constructor_put_in_vreg(ctx, arg3);
+                let v8 = &constructor_unmasked(ctx);
+                let v9 = C::vstate_from_type(ctx, v2);
+                let v35 = constructor_rv_vmfgt_vv(ctx, v6, v7, v8, v9);
+                // Rule at src/isa/riscv64/inst_vector.isle line 1580.
+                return v35;
+            }
+            &FloatCC::GreaterThanOrEqual => {
+                let v18 = C::def_inst(ctx, arg2);
+                if let Some(v19) = v18 {
+                    let v20 = &C::inst_data(ctx, v19);
+                    if let &InstructionData::Unary {
+                        opcode: ref v21,
+                        arg: v22,
+                    } = v20
+                    {
+                        if let &Opcode::Splat = v21 {
+                            let v23 = constructor_put_in_vreg(ctx, arg3);
+                            let v24 = constructor_put_in_freg(ctx, v22);
+                            let v8 = &constructor_unmasked(ctx);
+                            let v9 = C::vstate_from_type(ctx, v2);
+                            let v40 = constructor_rv_vmfle_vf(ctx, v23, v24, v8, v9);
+                            // Rule at src/isa/riscv64/inst_vector.isle line 1597.
+                            return v40;
+                        }
+                    }
+                }
+                let v11 = C::def_inst(ctx, arg3);
+                if let Some(v12) = v11 {
+                    let v13 = &C::inst_data(ctx, v12);
+                    if let &InstructionData::Unary {
+                        opcode: ref v14,
+                        arg: v15,
+                    } = v13
+                    {
+                        if let &Opcode::Splat = v14 {
+                            let v6 = constructor_put_in_vreg(ctx, arg2);
+                            let v16 = constructor_put_in_freg(ctx, v15);
+                            let v8 = &constructor_unmasked(ctx);
+                            let v9 = C::vstate_from_type(ctx, v2);
+                            let v39 = constructor_rv_vmfge_vf(ctx, v6, v16, v8, v9);
+                            // Rule at src/isa/riscv64/inst_vector.isle line 1594.
+                            return v39;
+                        }
+                    }
+                }
+                let v6 = constructor_put_in_vreg(ctx, arg2);
+                let v7 = constructor_put_in_vreg(ctx, arg3);
+                let v8 = &constructor_unmasked(ctx);
+                let v9 = C::vstate_from_type(ctx, v2);
+                let v38 = constructor_rv_vmfge_vv(ctx, v6, v7, v8, v9);
+                // Rule at src/isa/riscv64/inst_vector.isle line 1591.
+                return v38;
+            }
+            &FloatCC::LessThan => {
+                let v18 = C::def_inst(ctx, arg2);
+                if let Some(v19) = v18 {
+                    let v20 = &C::inst_data(ctx, v19);
+                    if let &InstructionData::Unary {
+                        opcode: ref v21,
+                        arg: v22,
+                    } = v20
+                    {
+                        if let &Opcode::Splat = v21 {
+                            let v23 = constructor_put_in_vreg(ctx, arg3);
+                            let v24 = constructor_put_in_freg(ctx, v22);
+                            let v8 = &constructor_unmasked(ctx);
+                            let v9 = C::vstate_from_type(ctx, v2);
+                            let v31 = constructor_rv_vmfgt_vf(ctx, v23, v24, v8, v9);
+                            // Rule at src/isa/riscv64/inst_vector.isle line 1564.
+                            return v31;
+                        }
+                    }
+                }
+                let v11 = C::def_inst(ctx, arg3);
+                if let Some(v12) = v11 {
+                    let v13 = &C::inst_data(ctx, v12);
+                    if let &InstructionData::Unary {
+                        opcode: ref v14,
+                        arg: v15,
+                    } = v13
+                    {
+                        if let &Opcode::Splat = v14 {
+                            let v6 = constructor_put_in_vreg(ctx, arg2);
+                            let v16 = constructor_put_in_freg(ctx, v15);
+                            let v8 = &constructor_unmasked(ctx);
+                            let v9 = C::vstate_from_type(ctx, v2);
+                            let v30 = constructor_rv_vmflt_vf(ctx, v6, v16, v8, v9);
+                            // Rule at src/isa/riscv64/inst_vector.isle line 1561.
+                            return v30;
+                        }
+                    }
+                }
+                let v6 = constructor_put_in_vreg(ctx, arg2);
+                let v7 = constructor_put_in_vreg(ctx, arg3);
+                let v8 = &constructor_unmasked(ctx);
+                let v9 = C::vstate_from_type(ctx, v2);
+                let v29 = constructor_rv_vmflt_vv(ctx, v6, v7, v8, v9);
+                // Rule at src/isa/riscv64/inst_vector.isle line 1558.
+                return v29;
+            }
+            &FloatCC::LessThanOrEqual => {
+                let v18 = C::def_inst(ctx, arg2);
+                if let Some(v19) = v18 {
+                    let v20 = &C::inst_data(ctx, v19);
+                    if let &InstructionData::Unary {
+                        opcode: ref v21,
+                        arg: v22,
+                    } = v20
+                    {
+                        if let &Opcode::Splat = v21 {
+                            let v23 = constructor_put_in_vreg(ctx, arg3);
+                            let v24 = constructor_put_in_freg(ctx, v22);
+                            let v8 = &constructor_unmasked(ctx);
+                            let v9 = C::vstate_from_type(ctx, v2);
+                            let v34 = constructor_rv_vmfge_vf(ctx, v23, v24, v8, v9);
+                            // Rule at src/isa/riscv64/inst_vector.isle line 1575.
+                            return v34;
+                        }
+                    }
+                }
+                let v11 = C::def_inst(ctx, arg3);
+                if let Some(v12) = v11 {
+                    let v13 = &C::inst_data(ctx, v12);
+                    if let &InstructionData::Unary {
+                        opcode: ref v14,
+                        arg: v15,
+                    } = v13
+                    {
+                        if let &Opcode::Splat = v14 {
+                            let v6 = constructor_put_in_vreg(ctx, arg2);
+                            let v16 = constructor_put_in_freg(ctx, v15);
+                            let v8 = &constructor_unmasked(ctx);
+                            let v9 = C::vstate_from_type(ctx, v2);
+                            let v33 = constructor_rv_vmfle_vf(ctx, v6, v16, v8, v9);
+                            // Rule at src/isa/riscv64/inst_vector.isle line 1572.
+                            return v33;
+                        }
+                    }
+                }
+                let v6 = constructor_put_in_vreg(ctx, arg2);
+                let v7 = constructor_put_in_vreg(ctx, arg3);
+                let v8 = &constructor_unmasked(ctx);
+                let v9 = C::vstate_from_type(ctx, v2);
+                let v32 = constructor_rv_vmfle_vv(ctx, v6, v7, v8, v9);
+                // Rule at src/isa/riscv64/inst_vector.isle line 1569.
+                return v32;
+            }
+            &FloatCC::NotEqual => {
+                let v18 = C::def_inst(ctx, arg2);
+                if let Some(v19) = v18 {
+                    let v20 = &C::inst_data(ctx, v19);
+                    if let &InstructionData::Unary {
+                        opcode: ref v21,
+                        arg: v22,
+                    } = v20
+                    {
+                        if let &Opcode::Splat = v21 {
+                            let v23 = constructor_put_in_vreg(ctx, arg3);
+                            let v24 = constructor_put_in_freg(ctx, v22);
+                            let v8 = &constructor_unmasked(ctx);
+                            let v9 = C::vstate_from_type(ctx, v2);
+                            let v28 = constructor_rv_vmfne_vf(ctx, v23, v24, v8, v9);
+                            // Rule at src/isa/riscv64/inst_vector.isle line 1553.
+                            return v28;
+                        }
+                    }
+                }
+                let v11 = C::def_inst(ctx, arg3);
+                if let Some(v12) = v11 {
+                    let v13 = &C::inst_data(ctx, v12);
+                    if let &InstructionData::Unary {
+                        opcode: ref v14,
+                        arg: v15,
+                    } = v13
+                    {
+                        if let &Opcode::Splat = v14 {
+                            let v6 = constructor_put_in_vreg(ctx, arg2);
+                            let v16 = constructor_put_in_freg(ctx, v15);
+                            let v8 = &constructor_unmasked(ctx);
+                            let v9 = C::vstate_from_type(ctx, v2);
+                            let v27 = constructor_rv_vmfne_vf(ctx, v6, v16, v8, v9);
+                            // Rule at src/isa/riscv64/inst_vector.isle line 1550.
+                            return v27;
+                        }
+                    }
+                }
+                let v6 = constructor_put_in_vreg(ctx, arg2);
+                let v7 = constructor_put_in_vreg(ctx, arg3);
+                let v8 = &constructor_unmasked(ctx);
+                let v9 = C::vstate_from_type(ctx, v2);
+                let v26 = constructor_rv_vmfne_vv(ctx, v6, v7, v8, v9);
+                // Rule at src/isa/riscv64/inst_vector.isle line 1547.
+                return v26;
+            }
+            &FloatCC::Ordered => {
+                let v42 = constructor_gen_fcmp_mask(ctx, v2, &FloatCC::Equal, arg2, arg2);
+                let v43 = constructor_gen_fcmp_mask(ctx, v2, &FloatCC::Equal, arg3, arg3);
+                let v9 = C::vstate_from_type(ctx, v2);
+                let v44 = constructor_rv_vmand_mm(ctx, v42, v43, v9);
+                // Rule at src/isa/riscv64/inst_vector.isle line 1602.
+                return v44;
+            }
+            &FloatCC::OrderedNotEqual => {
+                let v50 = constructor_gen_fcmp_mask(ctx, v2, &FloatCC::LessThan, arg2, arg3);
+                let v51 = constructor_gen_fcmp_mask(ctx, v2, &FloatCC::LessThan, arg3, arg2);
+                let v9 = C::vstate_from_type(ctx, v2);
+                let v52 = constructor_rv_vmor_mm(ctx, v50, v51, v9);
+                // Rule at src/isa/riscv64/inst_vector.isle line 1618.
+                return v52;
+            }
+            &FloatCC::Unordered => {
+                let v46 = constructor_gen_fcmp_mask(ctx, v2, &FloatCC::NotEqual, arg2, arg2);
+                let v47 = constructor_gen_fcmp_mask(ctx, v2, &FloatCC::NotEqual, arg3, arg3);
+                let v9 = C::vstate_from_type(ctx, v2);
+                let v48 = constructor_rv_vmor_mm(ctx, v46, v47, v9);
+                // Rule at src/isa/riscv64/inst_vector.isle line 1610.
+                return v48;
+            }
+            &FloatCC::UnorderedOrEqual => {
+                let v50 = constructor_gen_fcmp_mask(ctx, v2, &FloatCC::LessThan, arg2, arg3);
+                let v51 = constructor_gen_fcmp_mask(ctx, v2, &FloatCC::LessThan, arg3, arg2);
+                let v9 = C::vstate_from_type(ctx, v2);
+                let v53 = constructor_rv_vmnor_mm(ctx, v50, v51, v9);
+                // Rule at src/isa/riscv64/inst_vector.isle line 1626.
+                return v53;
+            }
+            &FloatCC::UnorderedOrGreaterThan => {
+                let v55 = constructor_gen_fcmp_mask(ctx, v2, &FloatCC::LessThanOrEqual, arg2, arg3);
+                let v9 = C::vstate_from_type(ctx, v2);
+                let v56 = constructor_rv_vmnot_m(ctx, v55, v9);
+                // Rule at src/isa/riscv64/inst_vector.isle line 1634.
+                return v56;
+            }
+            &FloatCC::UnorderedOrGreaterThanOrEqual => {
+                let v50 = constructor_gen_fcmp_mask(ctx, v2, &FloatCC::LessThan, arg2, arg3);
+                let v9 = C::vstate_from_type(ctx, v2);
+                let v57 = constructor_rv_vmnot_m(ctx, v50, v9);
+                // Rule at src/isa/riscv64/inst_vector.isle line 1639.
+                return v57;
+            }
+            &FloatCC::UnorderedOrLessThan => {
+                let v59 =
+                    constructor_gen_fcmp_mask(ctx, v2, &FloatCC::GreaterThanOrEqual, arg2, arg3);
+                let v9 = C::vstate_from_type(ctx, v2);
+                let v60 = constructor_rv_vmnot_m(ctx, v59, v9);
+                // Rule at src/isa/riscv64/inst_vector.isle line 1644.
+                return v60;
+            }
+            &FloatCC::UnorderedOrLessThanOrEqual => {
+                let v62 = constructor_gen_fcmp_mask(ctx, v2, &FloatCC::GreaterThan, arg2, arg3);
+                let v9 = C::vstate_from_type(ctx, v2);
+                let v63 = constructor_rv_vmnot_m(ctx, v62, v9);
+                // Rule at src/isa/riscv64/inst_vector.isle line 1649.
+                return v63;
+            }
+            _ => {}
+        }
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "gen_fcmp_mask", "src/isa/riscv64/inst_vector.isle line 1531"
+    )
+}
+
+// Generated as internal constructor for term lower.
+pub fn constructor_lower<C: Context>(ctx: &mut C, arg0: Inst) -> Option<InstOutput> {
+    let v4 = &C::inst_data(ctx, arg0);
+    match v4 {
+        &InstructionData::AtomicCas {
+            opcode: ref v1030,
+            args: ref v1031,
+            flags: v1032,
+        } => {
+            if let &Opcode::AtomicCas = v1030 {
+                let v1 = C::first_result(ctx, arg0);
+                if let Some(v2) = v1 {
+                    let v3 = C::value_type(ctx, v2);
+                    let v969 = C::valid_atomic_transaction(ctx, v3);
+                    if let Some(v970) = v969 {
+                        let v1000 = C::temp_writable_reg(ctx, v970);
+                        let v1037 = C::temp_writable_reg(ctx, v970);
+                        let v1033 = C::unpack_value_array_3(ctx, v1031);
+                        let v1038 = constructor_put_in_xreg(ctx, v1033.0);
+                        let v1039 = constructor_gen_atomic_offset(ctx, v1038, v970);
+                        let v1041 = constructor_put_in_xreg(ctx, v1033.1);
+                        let v1042 = constructor_zext(ctx, v1041, v970, I64);
+                        let v1044 = constructor_put_in_xreg(ctx, v1033.0);
+                        let v1045 = constructor_gen_atomic_p(ctx, v1044, v970);
+                        let v1047 = C::put_in_reg(ctx, v1033.2);
+                        let v1040 = C::xreg_to_reg(ctx, v1039);
+                        let v1043 = C::xreg_to_reg(ctx, v1042);
+                        let v1046 = C::xreg_to_reg(ctx, v1045);
+                        let v1048 = MInst::AtomicCas {
+                            offset: v1040,
+                            t0: v1000,
+                            dst: v1037,
+                            e: v1043,
+                            addr: v1046,
+                            v: v1047,
+                            ty: v970,
+                        };
+                        let v1049 = C::emit(ctx, &v1048);
+                        let v1050 = C::writable_reg_to_reg(ctx, v1037);
+                        let v1051 = constructor_output_reg(ctx, v1050);
+                        // Rule at src/isa/riscv64/lower.isle line 1111.
+                        return Some(v1051);
+                    }
+                }
+            }
+        }
+        &InstructionData::AtomicRmw {
+            opcode: ref v971,
+            args: ref v972,
+            flags: v973,
+            op: ref v974,
+        } => {
+            if let &Opcode::AtomicRmw = v971 {
+                let v1 = C::first_result(ctx, arg0);
+                if let Some(v2) = v1 {
+                    let v3 = C::value_type(ctx, v2);
+                    let v969 = C::valid_atomic_transaction(ctx, v3);
+                    if let Some(v970) = v969 {
+                        let v984 = C::fits_in_16(ctx, v970);
+                        if let Some(v985) = v984 {
+                            let v990 = C::is_atomic_rmw_max_etc(ctx, v974);
+                            if let Some(v991) = v990 {
+                                match v991.1 {
+                                    true => {
+                                        let v975 = C::unpack_value_array_2(ctx, v972);
+                                        let v986 = constructor_put_in_xreg(ctx, v975.0);
+                                        let v987 = constructor_put_in_xreg(ctx, v975.1);
+                                        let v994 = constructor_sext(ctx, v987, v985, I64);
+                                        let v995 = constructor_gen_atomic_rmw_loop(
+                                            ctx, &v991.0, v985, v986, v994,
+                                        );
+                                        let v996 = constructor_output_xreg(ctx, v995);
+                                        // Rule at src/isa/riscv64/lower.isle line 1043.
+                                        return Some(v996);
+                                    }
+                                    false => {
+                                        let v975 = C::unpack_value_array_2(ctx, v972);
+                                        let v986 = constructor_put_in_xreg(ctx, v975.0);
+                                        let v987 = constructor_put_in_xreg(ctx, v975.1);
+                                        let v997 = constructor_zext(ctx, v987, v985, I64);
+                                        let v998 = constructor_gen_atomic_rmw_loop(
+                                            ctx, &v991.0, v985, v986, v997,
+                                        );
+                                        let v999 = constructor_output_xreg(ctx, v998);
+                                        // Rule at src/isa/riscv64/lower.isle line 1049.
+                                        return Some(v999);
+                                    }
+                                    _ => {}
+                                }
+                            }
+                            let v975 = C::unpack_value_array_2(ctx, v972);
+                            let v986 = constructor_put_in_xreg(ctx, v975.0);
+                            let v987 = constructor_put_in_xreg(ctx, v975.1);
+                            let v988 = constructor_gen_atomic_rmw_loop(ctx, v974, v985, v986, v987);
+                            let v989 = constructor_output_xreg(ctx, v988);
+                            // Rule at src/isa/riscv64/lower.isle line 1036.
+                            return Some(v989);
+                        }
+                        match v974 {
+                            &AtomicRmwOp::Nand => {
+                                let v975 = C::unpack_value_array_2(ctx, v972);
+                                let v986 = constructor_put_in_xreg(ctx, v975.0);
+                                let v987 = constructor_put_in_xreg(ctx, v975.1);
+                                let v1010 = constructor_gen_atomic_rmw_loop(
+                                    ctx,
+                                    &AtomicRmwOp::Nand,
+                                    v970,
+                                    v986,
+                                    v987,
+                                );
+                                let v1011 = constructor_output_xreg(ctx, v1010);
+                                // Rule at src/isa/riscv64/lower.isle line 1076.
+                                return Some(v1011);
+                            }
+                            &AtomicRmwOp::Sub => {
+                                let v1000 = C::temp_writable_reg(ctx, v970);
+                                let v975 = C::unpack_value_array_2(ctx, v972);
+                                let v987 = constructor_put_in_xreg(ctx, v975.1);
+                                let v1001 = constructor_rv_neg(ctx, v987);
+                                let v1004 =
+                                    &constructor_get_atomic_rmw_op(ctx, v970, &AtomicRmwOp::Add);
+                                let v1005 = C::put_in_reg(ctx, v975.0);
+                                let v1006 = C::atomic_amo(ctx);
+                                let v1002 = C::xreg_to_reg(ctx, v1001);
+                                let v1007 = constructor_gen_atomic(ctx, v1004, v1005, v1002, v1006);
+                                let v1008 = constructor_output_reg(ctx, v1007);
+                                // Rule at src/isa/riscv64/lower.isle line 1058.
+                                return Some(v1008);
+                            }
+                            _ => {}
+                        }
+                        let v978 = &constructor_get_atomic_rmw_op(ctx, v970, v974);
+                        let v975 = C::unpack_value_array_2(ctx, v972);
+                        let v979 = C::put_in_reg(ctx, v975.0);
+                        let v980 = C::put_in_reg(ctx, v975.1);
+                        let v981 = C::atomic_amo(ctx);
+                        let v982 = constructor_gen_atomic(ctx, v978, v979, v980, v981);
+                        let v983 = constructor_output_reg(ctx, v982);
+                        // Rule at src/isa/riscv64/lower.isle line 1029.
+                        return Some(v983);
+                    }
+                }
+            }
+        }
+        &InstructionData::Binary {
+            opcode: ref v36,
+            args: ref v37,
+        } => {
+            match v36 {
+                &Opcode::Swizzle => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
+                        if let Some(v11) = v10 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v45 = C::def_inst(ctx, v38.1);
+                            if let Some(v46) = v45 {
+                                let v47 = &C::inst_data(ctx, v46);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v68,
+                                    arg: v69,
+                                } = v47
+                                {
+                                    if let &Opcode::Splat = v68 {
+                                        let v172 = C::def_inst(ctx, v69);
+                                        if let Some(v173) = v172 {
+                                            let v174 = &C::inst_data(ctx, v173);
+                                            if let &InstructionData::UnaryImm {
+                                                opcode: ref v189,
+                                                imm: v190,
+                                            } = v174
+                                            {
+                                                if let &Opcode::Iconst = v189 {
+                                                    let v191 = C::u64_from_imm64(ctx, v190);
+                                                    let v1581 = C::uimm5_from_u64(ctx, v191);
+                                                    if let Some(v1582) = v1581 {
+                                                        let v163 =
+                                                            constructor_put_in_vreg(ctx, v38.0);
+                                                        let v165 = &constructor_unmasked(ctx);
+                                                        let v166 = C::vstate_from_type(ctx, v11);
+                                                        let v1583 = constructor_rv_vrgather_vi(
+                                                            ctx, v163, v1582, v165, v166,
+                                                        );
+                                                        let v1584 =
+                                                            constructor_output_vreg(ctx, v1583);
+                                                        // Rule at src/isa/riscv64/lower.isle line 1824.
+                                                        return Some(v1584);
+                                                    }
+                                                }
+                                            }
+                                        }
+                                        let v163 = constructor_put_in_vreg(ctx, v38.0);
+                                        let v169 = constructor_put_in_xreg(ctx, v69);
+                                        let v165 = &constructor_unmasked(ctx);
+                                        let v166 = C::vstate_from_type(ctx, v11);
+                                        let v1579 =
+                                            constructor_rv_vrgather_vx(ctx, v163, v169, v165, v166);
+                                        let v1580 = constructor_output_vreg(ctx, v1579);
+                                        // Rule at src/isa/riscv64/lower.isle line 1821.
+                                        return Some(v1580);
+                                    }
+                                }
+                            }
+                            let v163 = constructor_put_in_vreg(ctx, v38.0);
+                            let v164 = constructor_put_in_vreg(ctx, v38.1);
+                            let v165 = &constructor_unmasked(ctx);
+                            let v166 = C::vstate_from_type(ctx, v11);
+                            let v1577 = constructor_rv_vrgather_vv(ctx, v163, v164, v165, v166);
+                            let v1578 = constructor_output_vreg(ctx, v1577);
+                            // Rule at src/isa/riscv64/lower.isle line 1818.
+                            return Some(v1578);
+                        }
+                    }
+                }
+                &Opcode::Smin => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
+                        if let Some(v11) = v10 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v57 = C::def_inst(ctx, v38.0);
+                            if let Some(v58) = v57 {
+                                let v59 = &C::inst_data(ctx, v58);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v76,
+                                    arg: v77,
+                                } = v59
+                                {
+                                    if let &Opcode::Splat = v76 {
+                                        let v196 = constructor_put_in_vreg(ctx, v38.1);
+                                        let v197 = constructor_put_in_xreg(ctx, v77);
+                                        let v165 = &constructor_unmasked(ctx);
+                                        let v166 = C::vstate_from_type(ctx, v11);
+                                        let v1219 =
+                                            constructor_rv_vmin_vx(ctx, v196, v197, v165, v166);
+                                        let v1220 = constructor_output_vreg(ctx, v1219);
+                                        // Rule at src/isa/riscv64/lower.isle line 1334.
+                                        return Some(v1220);
+                                    }
+                                }
+                            }
+                            let v45 = C::def_inst(ctx, v38.1);
+                            if let Some(v46) = v45 {
+                                let v47 = &C::inst_data(ctx, v46);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v68,
+                                    arg: v69,
+                                } = v47
+                                {
+                                    if let &Opcode::Splat = v68 {
+                                        let v163 = constructor_put_in_vreg(ctx, v38.0);
+                                        let v169 = constructor_put_in_xreg(ctx, v69);
+                                        let v165 = &constructor_unmasked(ctx);
+                                        let v166 = C::vstate_from_type(ctx, v11);
+                                        let v1217 =
+                                            constructor_rv_vmin_vx(ctx, v163, v169, v165, v166);
+                                        let v1218 = constructor_output_vreg(ctx, v1217);
+                                        // Rule at src/isa/riscv64/lower.isle line 1331.
+                                        return Some(v1218);
+                                    }
+                                }
+                            }
+                            let v163 = constructor_put_in_vreg(ctx, v38.0);
+                            let v164 = constructor_put_in_vreg(ctx, v38.1);
+                            let v165 = &constructor_unmasked(ctx);
+                            let v166 = C::vstate_from_type(ctx, v11);
+                            let v1215 = constructor_rv_vmin_vv(ctx, v163, v164, v165, v166);
+                            let v1216 = constructor_output_vreg(ctx, v1215);
+                            // Rule at src/isa/riscv64/lower.isle line 1328.
+                            return Some(v1216);
+                        }
+                        let v363 = C::ty_int(ctx, v3);
+                        if let Some(v364) = v363 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v138 = C::put_in_regs(ctx, v38.0);
+                            let v1202 = constructor_ext_int_if_need(ctx, true, v138, v364);
+                            let v839 = C::put_in_regs(ctx, v38.1);
+                            let v1203 = constructor_ext_int_if_need(ctx, true, v839, v364);
+                            let v1213 = constructor_gen_int_select(
+                                ctx,
+                                v364,
+                                &IntSelectOP::Smin,
+                                v1202,
+                                v1203,
+                            );
+                            let v1214 = C::output(ctx, v1213);
+                            // Rule at src/isa/riscv64/lower.isle line 1325.
+                            return Some(v1214);
+                        }
+                    }
+                }
+                &Opcode::Umin => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
+                        if let Some(v11) = v10 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v57 = C::def_inst(ctx, v38.0);
+                            if let Some(v58) = v57 {
+                                let v59 = &C::inst_data(ctx, v58);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v76,
+                                    arg: v77,
+                                } = v59
+                                {
+                                    if let &Opcode::Splat = v76 {
+                                        let v196 = constructor_put_in_vreg(ctx, v38.1);
+                                        let v197 = constructor_put_in_xreg(ctx, v77);
+                                        let v165 = &constructor_unmasked(ctx);
+                                        let v166 = C::vstate_from_type(ctx, v11);
+                                        let v1240 =
+                                            constructor_rv_vminu_vx(ctx, v196, v197, v165, v166);
+                                        let v1241 = constructor_output_vreg(ctx, v1240);
+                                        // Rule at src/isa/riscv64/lower.isle line 1362.
+                                        return Some(v1241);
+                                    }
+                                }
+                            }
+                            let v45 = C::def_inst(ctx, v38.1);
+                            if let Some(v46) = v45 {
+                                let v47 = &C::inst_data(ctx, v46);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v68,
+                                    arg: v69,
+                                } = v47
+                                {
+                                    if let &Opcode::Splat = v68 {
+                                        let v163 = constructor_put_in_vreg(ctx, v38.0);
+                                        let v169 = constructor_put_in_xreg(ctx, v69);
+                                        let v165 = &constructor_unmasked(ctx);
+                                        let v166 = C::vstate_from_type(ctx, v11);
+                                        let v1238 =
+                                            constructor_rv_vminu_vx(ctx, v163, v169, v165, v166);
+                                        let v1239 = constructor_output_vreg(ctx, v1238);
+                                        // Rule at src/isa/riscv64/lower.isle line 1359.
+                                        return Some(v1239);
+                                    }
+                                }
+                            }
+                            let v163 = constructor_put_in_vreg(ctx, v38.0);
+                            let v164 = constructor_put_in_vreg(ctx, v38.1);
+                            let v165 = &constructor_unmasked(ctx);
+                            let v166 = C::vstate_from_type(ctx, v11);
+                            let v1236 = constructor_rv_vminu_vv(ctx, v163, v164, v165, v166);
+                            let v1237 = constructor_output_vreg(ctx, v1236);
+                            // Rule at src/isa/riscv64/lower.isle line 1356.
+                            return Some(v1237);
+                        }
+                        let v363 = C::ty_int(ctx, v3);
+                        if let Some(v364) = v363 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v138 = C::put_in_regs(ctx, v38.0);
+                            let v1223 = constructor_ext_int_if_need(ctx, false, v138, v364);
+                            let v839 = C::put_in_regs(ctx, v38.1);
+                            let v1224 = constructor_ext_int_if_need(ctx, false, v839, v364);
+                            let v1234 = constructor_gen_int_select(
+                                ctx,
+                                v364,
+                                &IntSelectOP::Umin,
+                                v1223,
+                                v1224,
+                            );
+                            let v1235 = C::output(ctx, v1234);
+                            // Rule at src/isa/riscv64/lower.isle line 1353.
+                            return Some(v1235);
+                        }
+                    }
+                }
+                &Opcode::Smax => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
+                        if let Some(v11) = v10 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v57 = C::def_inst(ctx, v38.0);
+                            if let Some(v58) = v57 {
+                                let v59 = &C::inst_data(ctx, v58);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v76,
+                                    arg: v77,
+                                } = v59
+                                {
+                                    if let &Opcode::Splat = v76 {
+                                        let v196 = constructor_put_in_vreg(ctx, v38.1);
+                                        let v197 = constructor_put_in_xreg(ctx, v77);
+                                        let v165 = &constructor_unmasked(ctx);
+                                        let v166 = C::vstate_from_type(ctx, v11);
+                                        let v1210 =
+                                            constructor_rv_vmax_vx(ctx, v196, v197, v165, v166);
+                                        let v1211 = constructor_output_vreg(ctx, v1210);
+                                        // Rule at src/isa/riscv64/lower.isle line 1320.
+                                        return Some(v1211);
+                                    }
+                                }
+                            }
+                            let v45 = C::def_inst(ctx, v38.1);
+                            if let Some(v46) = v45 {
+                                let v47 = &C::inst_data(ctx, v46);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v68,
+                                    arg: v69,
+                                } = v47
+                                {
+                                    if let &Opcode::Splat = v68 {
+                                        let v163 = constructor_put_in_vreg(ctx, v38.0);
+                                        let v169 = constructor_put_in_xreg(ctx, v69);
+                                        let v165 = &constructor_unmasked(ctx);
+                                        let v166 = C::vstate_from_type(ctx, v11);
+                                        let v1208 =
+                                            constructor_rv_vmax_vx(ctx, v163, v169, v165, v166);
+                                        let v1209 = constructor_output_vreg(ctx, v1208);
+                                        // Rule at src/isa/riscv64/lower.isle line 1317.
+                                        return Some(v1209);
+                                    }
+                                }
+                            }
+                            let v163 = constructor_put_in_vreg(ctx, v38.0);
+                            let v164 = constructor_put_in_vreg(ctx, v38.1);
+                            let v165 = &constructor_unmasked(ctx);
+                            let v166 = C::vstate_from_type(ctx, v11);
+                            let v1206 = constructor_rv_vmax_vv(ctx, v163, v164, v165, v166);
+                            let v1207 = constructor_output_vreg(ctx, v1206);
+                            // Rule at src/isa/riscv64/lower.isle line 1314.
+                            return Some(v1207);
+                        }
+                        let v363 = C::ty_int(ctx, v3);
+                        if let Some(v364) = v363 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v138 = C::put_in_regs(ctx, v38.0);
+                            let v1202 = constructor_ext_int_if_need(ctx, true, v138, v364);
+                            let v839 = C::put_in_regs(ctx, v38.1);
+                            let v1203 = constructor_ext_int_if_need(ctx, true, v839, v364);
+                            let v1204 = constructor_gen_int_select(
+                                ctx,
+                                v364,
+                                &IntSelectOP::Smax,
+                                v1202,
+                                v1203,
+                            );
+                            let v1205 = C::output(ctx, v1204);
+                            // Rule at src/isa/riscv64/lower.isle line 1311.
+                            return Some(v1205);
+                        }
+                    }
+                }
+                &Opcode::Umax => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
+                        if let Some(v11) = v10 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v57 = C::def_inst(ctx, v38.0);
+                            if let Some(v58) = v57 {
+                                let v59 = &C::inst_data(ctx, v58);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v76,
+                                    arg: v77,
+                                } = v59
+                                {
+                                    if let &Opcode::Splat = v76 {
+                                        let v196 = constructor_put_in_vreg(ctx, v38.1);
+                                        let v197 = constructor_put_in_xreg(ctx, v77);
+                                        let v165 = &constructor_unmasked(ctx);
+                                        let v166 = C::vstate_from_type(ctx, v11);
+                                        let v1231 =
+                                            constructor_rv_vmaxu_vx(ctx, v196, v197, v165, v166);
+                                        let v1232 = constructor_output_vreg(ctx, v1231);
+                                        // Rule at src/isa/riscv64/lower.isle line 1348.
+                                        return Some(v1232);
+                                    }
+                                }
+                            }
+                            let v45 = C::def_inst(ctx, v38.1);
+                            if let Some(v46) = v45 {
+                                let v47 = &C::inst_data(ctx, v46);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v68,
+                                    arg: v69,
+                                } = v47
+                                {
+                                    if let &Opcode::Splat = v68 {
+                                        let v163 = constructor_put_in_vreg(ctx, v38.0);
+                                        let v169 = constructor_put_in_xreg(ctx, v69);
+                                        let v165 = &constructor_unmasked(ctx);
+                                        let v166 = C::vstate_from_type(ctx, v11);
+                                        let v1229 =
+                                            constructor_rv_vmaxu_vx(ctx, v163, v169, v165, v166);
+                                        let v1230 = constructor_output_vreg(ctx, v1229);
+                                        // Rule at src/isa/riscv64/lower.isle line 1345.
+                                        return Some(v1230);
+                                    }
+                                }
+                            }
+                            let v163 = constructor_put_in_vreg(ctx, v38.0);
+                            let v164 = constructor_put_in_vreg(ctx, v38.1);
+                            let v165 = &constructor_unmasked(ctx);
+                            let v166 = C::vstate_from_type(ctx, v11);
+                            let v1227 = constructor_rv_vmaxu_vv(ctx, v163, v164, v165, v166);
+                            let v1228 = constructor_output_vreg(ctx, v1227);
+                            // Rule at src/isa/riscv64/lower.isle line 1342.
+                            return Some(v1228);
+                        }
+                        let v363 = C::ty_int(ctx, v3);
+                        if let Some(v364) = v363 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v138 = C::put_in_regs(ctx, v38.0);
+                            let v1223 = constructor_ext_int_if_need(ctx, false, v138, v364);
+                            let v839 = C::put_in_regs(ctx, v38.1);
+                            let v1224 = constructor_ext_int_if_need(ctx, false, v839, v364);
+                            let v1225 = constructor_gen_int_select(
+                                ctx,
+                                v364,
+                                &IntSelectOP::Umax,
+                                v1223,
+                                v1224,
+                            );
+                            let v1226 = C::output(ctx, v1225);
+                            // Rule at src/isa/riscv64/lower.isle line 1339.
+                            return Some(v1226);
+                        }
+                    }
+                }
+                &Opcode::AvgRound => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
+                        if let Some(v11) = v10 {
+                            let v701 = constructor_u64_to_uimm5(ctx, 0x1);
+                            if let Some(v702) = v701 {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v163 = constructor_put_in_vreg(ctx, v38.0);
+                                let v164 = constructor_put_in_vreg(ctx, v38.1);
+                                let v165 = &constructor_unmasked(ctx);
+                                let v166 = C::vstate_from_type(ctx, v11);
+                                let v523 = constructor_rv_vand_vv(ctx, v163, v164, v165, v166);
+                                let v1671 = constructor_put_in_vreg(ctx, v38.0);
+                                let v1672 = constructor_put_in_vreg(ctx, v38.1);
+                                let v1673 = constructor_rv_vxor_vv(ctx, v1671, v1672, v165, v166);
+                                let v1674 = constructor_rv_vssrl_vi(ctx, v1673, v702, v165, v166);
+                                let v1675 = constructor_rv_vadd_vv(ctx, v523, v1674, v165, v166);
+                                let v1676 = constructor_output_vreg(ctx, v1675);
+                                // Rule at src/isa/riscv64/lower.isle line 1938.
+                                return Some(v1676);
+                            }
+                        }
+                    }
+                }
+                &Opcode::UaddSat => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
+                        if let Some(v11) = v10 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v57 = C::def_inst(ctx, v38.0);
+                            if let Some(v58) = v57 {
+                                let v59 = &C::inst_data(ctx, v58);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v76,
+                                    arg: v77,
+                                } = v59
+                                {
+                                    if let &Opcode::Splat = v76 {
+                                        let v200 = C::def_inst(ctx, v77);
+                                        if let Some(v201) = v200 {
+                                            let v202 = &C::inst_data(ctx, v201);
+                                            if let &InstructionData::UnaryImm {
+                                                opcode: ref v212,
+                                                imm: v213,
+                                            } = v202
+                                            {
+                                                if let &Opcode::Iconst = v212 {
+                                                    let v214 = C::u64_from_imm64(ctx, v213);
+                                                    let v215 = C::imm5_from_u64(ctx, v214);
+                                                    if let Some(v216) = v215 {
+                                                        let v196 =
+                                                            constructor_put_in_vreg(ctx, v38.1);
+                                                        let v165 = &constructor_unmasked(ctx);
+                                                        let v166 = C::vstate_from_type(ctx, v11);
+                                                        let v1533 = constructor_rv_vsaddu_vi(
+                                                            ctx, v196, v216, v165, v166,
+                                                        );
+                                                        let v1534 =
+                                                            constructor_output_vreg(ctx, v1533);
+                                                        // Rule at src/isa/riscv64/lower.isle line 1732.
+                                                        return Some(v1534);
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                            }
+                            let v45 = C::def_inst(ctx, v38.1);
+                            if let Some(v46) = v45 {
+                                let v47 = &C::inst_data(ctx, v46);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v68,
+                                    arg: v69,
+                                } = v47
+                                {
+                                    if let &Opcode::Splat = v68 {
+                                        let v172 = C::def_inst(ctx, v69);
+                                        if let Some(v173) = v172 {
+                                            let v174 = &C::inst_data(ctx, v173);
+                                            if let &InstructionData::UnaryImm {
+                                                opcode: ref v189,
+                                                imm: v190,
+                                            } = v174
+                                            {
+                                                if let &Opcode::Iconst = v189 {
+                                                    let v191 = C::u64_from_imm64(ctx, v190);
+                                                    let v192 = C::imm5_from_u64(ctx, v191);
+                                                    if let Some(v193) = v192 {
+                                                        let v163 =
+                                                            constructor_put_in_vreg(ctx, v38.0);
+                                                        let v165 = &constructor_unmasked(ctx);
+                                                        let v166 = C::vstate_from_type(ctx, v11);
+                                                        let v1531 = constructor_rv_vsaddu_vi(
+                                                            ctx, v163, v193, v165, v166,
+                                                        );
+                                                        let v1532 =
+                                                            constructor_output_vreg(ctx, v1531);
+                                                        // Rule at src/isa/riscv64/lower.isle line 1729.
+                                                        return Some(v1532);
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                            }
+                            if let Some(v58) = v57 {
+                                let v59 = &C::inst_data(ctx, v58);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v76,
+                                    arg: v77,
+                                } = v59
+                                {
+                                    if let &Opcode::Splat = v76 {
+                                        let v196 = constructor_put_in_vreg(ctx, v38.1);
+                                        let v197 = constructor_put_in_xreg(ctx, v77);
+                                        let v165 = &constructor_unmasked(ctx);
+                                        let v166 = C::vstate_from_type(ctx, v11);
+                                        let v1529 =
+                                            constructor_rv_vsaddu_vx(ctx, v196, v197, v165, v166);
+                                        let v1530 = constructor_output_vreg(ctx, v1529);
+                                        // Rule at src/isa/riscv64/lower.isle line 1726.
+                                        return Some(v1530);
+                                    }
+                                }
+                            }
+                            if let Some(v46) = v45 {
+                                let v47 = &C::inst_data(ctx, v46);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v68,
+                                    arg: v69,
+                                } = v47
+                                {
+                                    if let &Opcode::Splat = v68 {
+                                        let v163 = constructor_put_in_vreg(ctx, v38.0);
+                                        let v169 = constructor_put_in_xreg(ctx, v69);
+                                        let v165 = &constructor_unmasked(ctx);
+                                        let v166 = C::vstate_from_type(ctx, v11);
+                                        let v1527 =
+                                            constructor_rv_vsaddu_vx(ctx, v163, v169, v165, v166);
+                                        let v1528 = constructor_output_vreg(ctx, v1527);
+                                        // Rule at src/isa/riscv64/lower.isle line 1723.
+                                        return Some(v1528);
+                                    }
+                                }
+                            }
+                            let v163 = constructor_put_in_vreg(ctx, v38.0);
+                            let v164 = constructor_put_in_vreg(ctx, v38.1);
+                            let v165 = &constructor_unmasked(ctx);
+                            let v166 = C::vstate_from_type(ctx, v11);
+                            let v1525 = constructor_rv_vsaddu_vv(ctx, v163, v164, v165, v166);
+                            let v1526 = constructor_output_vreg(ctx, v1525);
+                            // Rule at src/isa/riscv64/lower.isle line 1720.
+                            return Some(v1526);
+                        }
+                    }
+                }
+                &Opcode::SaddSat => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
+                        if let Some(v11) = v10 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v57 = C::def_inst(ctx, v38.0);
+                            if let Some(v58) = v57 {
+                                let v59 = &C::inst_data(ctx, v58);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v76,
+                                    arg: v77,
+                                } = v59
+                                {
+                                    if let &Opcode::Splat = v76 {
+                                        let v200 = C::def_inst(ctx, v77);
+                                        if let Some(v201) = v200 {
+                                            let v202 = &C::inst_data(ctx, v201);
+                                            if let &InstructionData::UnaryImm {
+                                                opcode: ref v212,
+                                                imm: v213,
+                                            } = v202
+                                            {
+                                                if let &Opcode::Iconst = v212 {
+                                                    let v214 = C::u64_from_imm64(ctx, v213);
+                                                    let v215 = C::imm5_from_u64(ctx, v214);
+                                                    if let Some(v216) = v215 {
+                                                        let v196 =
+                                                            constructor_put_in_vreg(ctx, v38.1);
+                                                        let v165 = &constructor_unmasked(ctx);
+                                                        let v166 = C::vstate_from_type(ctx, v11);
+                                                        let v1543 = constructor_rv_vsadd_vi(
+                                                            ctx, v196, v216, v165, v166,
+                                                        );
+                                                        let v1544 =
+                                                            constructor_output_vreg(ctx, v1543);
+                                                        // Rule at src/isa/riscv64/lower.isle line 1749.
+                                                        return Some(v1544);
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                            }
+                            let v45 = C::def_inst(ctx, v38.1);
+                            if let Some(v46) = v45 {
+                                let v47 = &C::inst_data(ctx, v46);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v68,
+                                    arg: v69,
+                                } = v47
+                                {
+                                    if let &Opcode::Splat = v68 {
+                                        let v172 = C::def_inst(ctx, v69);
+                                        if let Some(v173) = v172 {
+                                            let v174 = &C::inst_data(ctx, v173);
+                                            if let &InstructionData::UnaryImm {
+                                                opcode: ref v189,
+                                                imm: v190,
+                                            } = v174
+                                            {
+                                                if let &Opcode::Iconst = v189 {
+                                                    let v191 = C::u64_from_imm64(ctx, v190);
+                                                    let v192 = C::imm5_from_u64(ctx, v191);
+                                                    if let Some(v193) = v192 {
+                                                        let v163 =
+                                                            constructor_put_in_vreg(ctx, v38.0);
+                                                        let v165 = &constructor_unmasked(ctx);
+                                                        let v166 = C::vstate_from_type(ctx, v11);
+                                                        let v1541 = constructor_rv_vsadd_vi(
+                                                            ctx, v163, v193, v165, v166,
+                                                        );
+                                                        let v1542 =
+                                                            constructor_output_vreg(ctx, v1541);
+                                                        // Rule at src/isa/riscv64/lower.isle line 1746.
+                                                        return Some(v1542);
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                            }
+                            if let Some(v58) = v57 {
+                                let v59 = &C::inst_data(ctx, v58);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v76,
+                                    arg: v77,
+                                } = v59
+                                {
+                                    if let &Opcode::Splat = v76 {
+                                        let v196 = constructor_put_in_vreg(ctx, v38.1);
+                                        let v197 = constructor_put_in_xreg(ctx, v77);
+                                        let v165 = &constructor_unmasked(ctx);
+                                        let v166 = C::vstate_from_type(ctx, v11);
+                                        let v1539 =
+                                            constructor_rv_vsadd_vx(ctx, v196, v197, v165, v166);
+                                        let v1540 = constructor_output_vreg(ctx, v1539);
+                                        // Rule at src/isa/riscv64/lower.isle line 1743.
+                                        return Some(v1540);
+                                    }
+                                }
+                            }
+                            if let Some(v46) = v45 {
+                                let v47 = &C::inst_data(ctx, v46);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v68,
+                                    arg: v69,
+                                } = v47
+                                {
+                                    if let &Opcode::Splat = v68 {
+                                        let v163 = constructor_put_in_vreg(ctx, v38.0);
+                                        let v169 = constructor_put_in_xreg(ctx, v69);
+                                        let v165 = &constructor_unmasked(ctx);
+                                        let v166 = C::vstate_from_type(ctx, v11);
+                                        let v1537 =
+                                            constructor_rv_vsadd_vx(ctx, v163, v169, v165, v166);
+                                        let v1538 = constructor_output_vreg(ctx, v1537);
+                                        // Rule at src/isa/riscv64/lower.isle line 1740.
+                                        return Some(v1538);
+                                    }
+                                }
+                            }
+                            let v163 = constructor_put_in_vreg(ctx, v38.0);
+                            let v164 = constructor_put_in_vreg(ctx, v38.1);
+                            let v165 = &constructor_unmasked(ctx);
+                            let v166 = C::vstate_from_type(ctx, v11);
+                            let v1535 = constructor_rv_vsadd_vv(ctx, v163, v164, v165, v166);
+                            let v1536 = constructor_output_vreg(ctx, v1535);
+                            // Rule at src/isa/riscv64/lower.isle line 1737.
+                            return Some(v1536);
+                        }
+                    }
+                }
+                &Opcode::UsubSat => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
+                        if let Some(v11) = v10 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v45 = C::def_inst(ctx, v38.1);
+                            if let Some(v46) = v45 {
+                                let v47 = &C::inst_data(ctx, v46);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v68,
+                                    arg: v69,
+                                } = v47
+                                {
+                                    if let &Opcode::Splat = v68 {
+                                        let v163 = constructor_put_in_vreg(ctx, v38.0);
+                                        let v169 = constructor_put_in_xreg(ctx, v69);
+                                        let v165 = &constructor_unmasked(ctx);
+                                        let v166 = C::vstate_from_type(ctx, v11);
+                                        let v1547 =
+                                            constructor_rv_vssubu_vx(ctx, v163, v169, v165, v166);
+                                        let v1548 = constructor_output_vreg(ctx, v1547);
+                                        // Rule at src/isa/riscv64/lower.isle line 1757.
+                                        return Some(v1548);
+                                    }
+                                }
+                            }
+                            let v163 = constructor_put_in_vreg(ctx, v38.0);
+                            let v164 = constructor_put_in_vreg(ctx, v38.1);
+                            let v165 = &constructor_unmasked(ctx);
+                            let v166 = C::vstate_from_type(ctx, v11);
+                            let v1545 = constructor_rv_vssubu_vv(ctx, v163, v164, v165, v166);
+                            let v1546 = constructor_output_vreg(ctx, v1545);
+                            // Rule at src/isa/riscv64/lower.isle line 1754.
+                            return Some(v1546);
+                        }
+                    }
+                }
+                &Opcode::SsubSat => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
+                        if let Some(v11) = v10 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v45 = C::def_inst(ctx, v38.1);
+                            if let Some(v46) = v45 {
+                                let v47 = &C::inst_data(ctx, v46);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v68,
+                                    arg: v69,
+                                } = v47
+                                {
+                                    if let &Opcode::Splat = v68 {
+                                        let v163 = constructor_put_in_vreg(ctx, v38.0);
+                                        let v169 = constructor_put_in_xreg(ctx, v69);
+                                        let v165 = &constructor_unmasked(ctx);
+                                        let v166 = C::vstate_from_type(ctx, v11);
+                                        let v1551 =
+                                            constructor_rv_vssub_vx(ctx, v163, v169, v165, v166);
+                                        let v1552 = constructor_output_vreg(ctx, v1551);
+                                        // Rule at src/isa/riscv64/lower.isle line 1765.
+                                        return Some(v1552);
+                                    }
+                                }
+                            }
+                            let v163 = constructor_put_in_vreg(ctx, v38.0);
+                            let v164 = constructor_put_in_vreg(ctx, v38.1);
+                            let v165 = &constructor_unmasked(ctx);
+                            let v166 = C::vstate_from_type(ctx, v11);
+                            let v1549 = constructor_rv_vssub_vv(ctx, v163, v164, v165, v166);
+                            let v1550 = constructor_output_vreg(ctx, v1549);
+                            // Rule at src/isa/riscv64/lower.isle line 1762.
+                            return Some(v1550);
+                        }
+                    }
+                }
+                &Opcode::Iadd => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
+                        if let Some(v11) = v10 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v57 = C::def_inst(ctx, v38.0);
+                            if let Some(v58) = v57 {
+                                let v59 = &C::inst_data(ctx, v58);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v76,
+                                    arg: v77,
+                                } = v59
+                                {
+                                    match v76 {
+                                        &Opcode::Splat => {
+                                            let v200 = C::def_inst(ctx, v77);
+                                            if let Some(v201) = v200 {
+                                                let v202 = &C::inst_data(ctx, v201);
+                                                match v202 {
+                                                    &InstructionData::Unary {
+                                                        opcode: ref v203,
+                                                        arg: v204,
+                                                    } => {
+                                                        match v203 {
+                                                            &Opcode::Uextend => {
+                                                                let v45 = C::def_inst(ctx, v38.1);
+                                                                if let Some(v46) = v45 {
+                                                                    let v47 =
+                                                                        &C::inst_data(ctx, v46);
+                                                                    if let &InstructionData::Unary {
+                                                                        opcode: ref v68,
+                                                                        arg: v69,
+                                                                    } = v47 {
+                                                                        match v68 {
+                                                                            &Opcode::UwidenLow => {
+                                                                                let v70 = C::value_type(ctx, v69);
+                                                                                let v240 = C::lane_type(ctx, v70);
+                                                                                let v205 = C::value_type(ctx, v204);
+                                                                                let v241 = C::ty_equal(ctx, v240, v205);
+                                                                                if v241 == true {
+                                                                                    let v242 = constructor_put_in_vreg(ctx, v69);
+                                                                                    let v207 = constructor_put_in_xreg(ctx, v204);
+                                                                                    let v165 = &constructor_unmasked(ctx);
+                                                                                    let v220 = C::ty_half_lanes(ctx, v70);
+                                                                                    let v221 = v220?;
+                                                                                    let v222 = C::vstate_from_type(ctx, v221);
+                                                                                    let v223 = C::vstate_mf2(ctx, v222);
+                                                                                    let v271 = constructor_rv_vwaddu_vx(ctx, v242, v207, v165, v223);
+                                                                                    let v272 = constructor_output_vreg(ctx, v271);
+                                                                                    // Rule at src/isa/riscv64/lower.isle line 204.
+                                                                                    return Some(v272);
+                                                                                }
+                                                                            }
+                                                                            &Opcode::UwidenHigh => {
+                                                                                let v70 = C::value_type(ctx, v69);
+                                                                                let v240 = C::lane_type(ctx, v70);
+                                                                                let v205 = C::value_type(ctx, v204);
+                                                                                let v241 = C::ty_equal(ctx, v240, v205);
+                                                                                if v241 == true {
+                                                                                    let v242 = constructor_put_in_vreg(ctx, v69);
+                                                                                    let v259 = constructor_gen_slidedown_half(ctx, v70, v242);
+                                                                                    let v260 = constructor_put_in_xreg(ctx, v204);
+                                                                                    let v165 = &constructor_unmasked(ctx);
+                                                                                    let v220 = C::ty_half_lanes(ctx, v70);
+                                                                                    let v221 = v220?;
+                                                                                    let v222 = C::vstate_from_type(ctx, v221);
+                                                                                    let v223 = C::vstate_mf2(ctx, v222);
+                                                                                    let v281 = constructor_rv_vwaddu_vx(ctx, v259, v260, v165, v223);
+                                                                                    let v282 = constructor_output_vreg(ctx, v281);
+                                                                                    // Rule at src/isa/riscv64/lower.isle line 227.
+                                                                                    return Some(v282);
+                                                                                }
+                                                                            }
+                                                                            _ => {}
+                                                                        }
+                                                                    }
+                                                                }
+                                                                let v178 =
+                                                                    C::ty_half_width(ctx, v11);
+                                                                if let Some(v179) = v178 {
+                                                                    let v180 =
+                                                                        C::lane_type(ctx, v179);
+                                                                    let v205 =
+                                                                        C::value_type(ctx, v204);
+                                                                    let v206 = C::ty_equal(
+                                                                        ctx, v180, v205,
+                                                                    );
+                                                                    if v206 == true {
+                                                                        let v196 =
+                                                                            constructor_put_in_vreg(
+                                                                                ctx, v38.1,
+                                                                            );
+                                                                        let v207 =
+                                                                            constructor_put_in_xreg(
+                                                                                ctx, v204,
+                                                                            );
+                                                                        let v165 =
+                                                                            &constructor_unmasked(
+                                                                                ctx,
+                                                                            );
+                                                                        let v183 =
+                                                                            C::vstate_from_type(
+                                                                                ctx, v179,
+                                                                            );
+                                                                        let v184 = C::vstate_mf2(
+                                                                            ctx, v183,
+                                                                        );
+                                                                        let v210 = constructor_rv_vwaddu_wx(ctx, v196, v207, v165, v184);
+                                                                        let v211 =
+                                                                            constructor_output_vreg(
+                                                                                ctx, v210,
+                                                                            );
+                                                                        // Rule at src/isa/riscv64/lower.isle line 134.
+                                                                        return Some(v211);
+                                                                    }
+                                                                }
+                                                            }
+                                                            &Opcode::Sextend => {
+                                                                let v45 = C::def_inst(ctx, v38.1);
+                                                                if let Some(v46) = v45 {
+                                                                    let v47 =
+                                                                        &C::inst_data(ctx, v46);
+                                                                    if let &InstructionData::Unary {
+                                                                        opcode: ref v68,
+                                                                        arg: v69,
+                                                                    } = v47 {
+                                                                        match v68 {
+                                                                            &Opcode::SwidenLow => {
+                                                                                let v70 = C::value_type(ctx, v69);
+                                                                                let v240 = C::lane_type(ctx, v70);
+                                                                                let v205 = C::value_type(ctx, v204);
+                                                                                let v241 = C::ty_equal(ctx, v240, v205);
+                                                                                if v241 == true {
+                                                                                    let v242 = constructor_put_in_vreg(ctx, v69);
+                                                                                    let v207 = constructor_put_in_xreg(ctx, v204);
+                                                                                    let v165 = &constructor_unmasked(ctx);
+                                                                                    let v220 = C::ty_half_lanes(ctx, v70);
+                                                                                    let v221 = v220?;
+                                                                                    let v222 = C::vstate_from_type(ctx, v221);
+                                                                                    let v223 = C::vstate_mf2(ctx, v222);
+                                                                                    let v243 = constructor_rv_vwadd_vx(ctx, v242, v207, v165, v223);
+                                                                                    let v244 = constructor_output_vreg(ctx, v243);
+                                                                                    // Rule at src/isa/riscv64/lower.isle line 159.
+                                                                                    return Some(v244);
+                                                                                }
+                                                                            }
+                                                                            &Opcode::SwidenHigh => {
+                                                                                let v70 = C::value_type(ctx, v69);
+                                                                                let v240 = C::lane_type(ctx, v70);
+                                                                                let v205 = C::value_type(ctx, v204);
+                                                                                let v241 = C::ty_equal(ctx, v240, v205);
+                                                                                if v241 == true {
+                                                                                    let v242 = constructor_put_in_vreg(ctx, v69);
+                                                                                    let v259 = constructor_gen_slidedown_half(ctx, v70, v242);
+                                                                                    let v260 = constructor_put_in_xreg(ctx, v204);
+                                                                                    let v165 = &constructor_unmasked(ctx);
+                                                                                    let v220 = C::ty_half_lanes(ctx, v70);
+                                                                                    let v221 = v220?;
+                                                                                    let v222 = C::vstate_from_type(ctx, v221);
+                                                                                    let v223 = C::vstate_mf2(ctx, v222);
+                                                                                    let v261 = constructor_rv_vwadd_vx(ctx, v259, v260, v165, v223);
+                                                                                    let v262 = constructor_output_vreg(ctx, v261);
+                                                                                    // Rule at src/isa/riscv64/lower.isle line 182.
+                                                                                    return Some(v262);
+                                                                                }
+                                                                            }
+                                                                            _ => {}
+                                                                        }
+                                                                    }
+                                                                }
+                                                                let v178 =
+                                                                    C::ty_half_width(ctx, v11);
+                                                                if let Some(v179) = v178 {
+                                                                    let v180 =
+                                                                        C::lane_type(ctx, v179);
+                                                                    let v205 =
+                                                                        C::value_type(ctx, v204);
+                                                                    let v206 = C::ty_equal(
+                                                                        ctx, v180, v205,
+                                                                    );
+                                                                    if v206 == true {
+                                                                        let v196 =
+                                                                            constructor_put_in_vreg(
+                                                                                ctx, v38.1,
+                                                                            );
+                                                                        let v207 =
+                                                                            constructor_put_in_xreg(
+                                                                                ctx, v204,
+                                                                            );
+                                                                        let v165 =
+                                                                            &constructor_unmasked(
+                                                                                ctx,
+                                                                            );
+                                                                        let v183 =
+                                                                            C::vstate_from_type(
+                                                                                ctx, v179,
+                                                                            );
+                                                                        let v184 = C::vstate_mf2(
+                                                                            ctx, v183,
+                                                                        );
+                                                                        let v208 =
+                                                                            constructor_rv_vwadd_wx(
+                                                                                ctx, v196, v207,
+                                                                                v165, v184,
+                                                                            );
+                                                                        let v209 =
+                                                                            constructor_output_vreg(
+                                                                                ctx, v208,
+                                                                            );
+                                                                        // Rule at src/isa/riscv64/lower.isle line 129.
+                                                                        return Some(v209);
+                                                                    }
+                                                                }
+                                                            }
+                                                            _ => {}
+                                                        }
+                                                    }
+                                                    &InstructionData::UnaryImm {
+                                                        opcode: ref v212,
+                                                        imm: v213,
+                                                    } => {
+                                                        if let &Opcode::Iconst = v212 {
+                                                            let v214 = C::u64_from_imm64(ctx, v213);
+                                                            let v215 = C::imm5_from_u64(ctx, v214);
+                                                            if let Some(v216) = v215 {
+                                                                let v196 = constructor_put_in_vreg(
+                                                                    ctx, v38.1,
+                                                                );
+                                                                let v165 =
+                                                                    &constructor_unmasked(ctx);
+                                                                let v166 =
+                                                                    C::vstate_from_type(ctx, v11);
+                                                                let v217 = constructor_rv_vadd_vi(
+                                                                    ctx, v196, v216, v165, v166,
+                                                                );
+                                                                let v218 = constructor_output_vreg(
+                                                                    ctx, v217,
+                                                                );
+                                                                // Rule at src/isa/riscv64/lower.isle line 139.
+                                                                return Some(v218);
+                                                            }
+                                                        }
+                                                    }
+                                                    _ => {}
+                                                }
+                                            }
+                                            let v196 = constructor_put_in_vreg(ctx, v38.1);
+                                            let v197 = constructor_put_in_xreg(ctx, v77);
+                                            let v165 = &constructor_unmasked(ctx);
+                                            let v166 = C::vstate_from_type(ctx, v11);
+                                            let v198 =
+                                                constructor_rv_vadd_vx(ctx, v196, v197, v165, v166);
+                                            let v199 = constructor_output_vreg(ctx, v198);
+                                            // Rule at src/isa/riscv64/lower.isle line 126.
+                                            return Some(v199);
+                                        }
+                                        &Opcode::SwidenLow => {
+                                            let v45 = C::def_inst(ctx, v38.1);
+                                            if let Some(v46) = v45 {
+                                                let v47 = &C::inst_data(ctx, v46);
+                                                if let &InstructionData::Unary {
+                                                    opcode: ref v68,
+                                                    arg: v69,
+                                                } = v47
+                                                {
+                                                    match v68 {
+                                                        &Opcode::Splat => {
+                                                            let v172 = C::def_inst(ctx, v69);
+                                                            if let Some(v173) = v172 {
+                                                                let v174 = &C::inst_data(ctx, v173);
+                                                                if let &InstructionData::Unary {
+                                                                    opcode: ref v175,
+                                                                    arg: v176,
+                                                                } = v174
+                                                                {
+                                                                    if let &Opcode::Sextend = v175 {
+                                                                        let v78 =
+                                                                            C::value_type(ctx, v77);
+                                                                        let v236 =
+                                                                            C::lane_type(ctx, v78);
+                                                                        let v177 = C::value_type(
+                                                                            ctx, v176,
+                                                                        );
+                                                                        let v237 = C::ty_equal(
+                                                                            ctx, v236, v177,
+                                                                        );
+                                                                        if v237 == true {
+                                                                            let v233 = constructor_put_in_vreg(ctx, v77);
+                                                                            let v182 = constructor_put_in_xreg(ctx, v176);
+                                                                            let v165 = &constructor_unmasked(ctx);
+                                                                            let v227 =
+                                                                                C::ty_half_lanes(
+                                                                                    ctx, v78,
+                                                                                );
+                                                                            let v228 = v227?;
+                                                                            let v229 =
+                                                                                C::vstate_from_type(
+                                                                                    ctx, v228,
+                                                                                );
+                                                                            let v230 =
+                                                                                C::vstate_mf2(
+                                                                                    ctx, v229,
+                                                                                );
+                                                                            let v238 = constructor_rv_vwadd_vx(ctx, v233, v182, v165, v230);
+                                                                            let v239 = constructor_output_vreg(ctx, v238);
+                                                                            // Rule at src/isa/riscv64/lower.isle line 154.
+                                                                            return Some(v239);
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                        &Opcode::SwidenLow => {
+                                                            let v233 =
+                                                                constructor_put_in_vreg(ctx, v77);
+                                                            let v219 =
+                                                                constructor_put_in_vreg(ctx, v69);
+                                                            let v165 = &constructor_unmasked(ctx);
+                                                            let v78 = C::value_type(ctx, v77);
+                                                            let v227 = C::ty_half_lanes(ctx, v78);
+                                                            let v228 = v227?;
+                                                            let v229 =
+                                                                C::vstate_from_type(ctx, v228);
+                                                            let v230 = C::vstate_mf2(ctx, v229);
+                                                            let v234 = constructor_rv_vwadd_vv(
+                                                                ctx, v233, v219, v165, v230,
+                                                            );
+                                                            let v235 =
+                                                                constructor_output_vreg(ctx, v234);
+                                                            // Rule at src/isa/riscv64/lower.isle line 150.
+                                                            return Some(v235);
+                                                        }
+                                                        &Opcode::SwidenHigh => {
+                                                            let v233 =
+                                                                constructor_put_in_vreg(ctx, v77);
+                                                            let v219 =
+                                                                constructor_put_in_vreg(ctx, v69);
+                                                            let v78 = C::value_type(ctx, v77);
+                                                            let v283 =
+                                                                constructor_gen_slidedown_half(
+                                                                    ctx, v78, v219,
+                                                                );
+                                                            let v165 = &constructor_unmasked(ctx);
+                                                            let v227 = C::ty_half_lanes(ctx, v78);
+                                                            let v228 = v227?;
+                                                            let v229 =
+                                                                C::vstate_from_type(ctx, v228);
+                                                            let v230 = C::vstate_mf2(ctx, v229);
+                                                            let v284 = constructor_rv_vwadd_vv(
+                                                                ctx, v233, v283, v165, v230,
+                                                            );
+                                                            let v285 =
+                                                                constructor_output_vreg(ctx, v284);
+                                                            // Rule at src/isa/riscv64/lower.isle line 234.
+                                                            return Some(v285);
+                                                        }
+                                                        _ => {}
+                                                    }
+                                                }
+                                            }
+                                            let v196 = constructor_put_in_vreg(ctx, v38.1);
+                                            let v226 = constructor_put_in_vreg(ctx, v77);
+                                            let v165 = &constructor_unmasked(ctx);
+                                            let v78 = C::value_type(ctx, v77);
+                                            let v227 = C::ty_half_lanes(ctx, v78);
+                                            let v228 = v227?;
+                                            let v229 = C::vstate_from_type(ctx, v228);
+                                            let v230 = C::vstate_mf2(ctx, v229);
+                                            let v231 = constructor_rv_vwadd_wv(
+                                                ctx, v196, v226, v165, v230,
+                                            );
+                                            let v232 = constructor_output_vreg(ctx, v231);
+                                            // Rule at src/isa/riscv64/lower.isle line 147.
+                                            return Some(v232);
+                                        }
+                                        &Opcode::SwidenHigh => {
+                                            let v45 = C::def_inst(ctx, v38.1);
+                                            if let Some(v46) = v45 {
+                                                let v47 = &C::inst_data(ctx, v46);
+                                                if let &InstructionData::Unary {
+                                                    opcode: ref v68,
+                                                    arg: v69,
+                                                } = v47
+                                                {
+                                                    match v68 {
+                                                        &Opcode::Splat => {
+                                                            let v172 = C::def_inst(ctx, v69);
+                                                            if let Some(v173) = v172 {
+                                                                let v174 = &C::inst_data(ctx, v173);
+                                                                if let &InstructionData::Unary {
+                                                                    opcode: ref v175,
+                                                                    arg: v176,
+                                                                } = v174
+                                                                {
+                                                                    if let &Opcode::Sextend = v175 {
+                                                                        let v78 =
+                                                                            C::value_type(ctx, v77);
+                                                                        let v236 =
+                                                                            C::lane_type(ctx, v78);
+                                                                        let v177 = C::value_type(
+                                                                            ctx, v176,
+                                                                        );
+                                                                        let v237 = C::ty_equal(
+                                                                            ctx, v236, v177,
+                                                                        );
+                                                                        if v237 == true {
+                                                                            let v233 = constructor_put_in_vreg(ctx, v77);
+                                                                            let v251 = constructor_gen_slidedown_half(ctx, v78, v233);
+                                                                            let v256 = constructor_put_in_xreg(ctx, v176);
+                                                                            let v165 = &constructor_unmasked(ctx);
+                                                                            let v227 =
+                                                                                C::ty_half_lanes(
+                                                                                    ctx, v78,
+                                                                                );
+                                                                            let v228 = v227?;
+                                                                            let v229 =
+                                                                                C::vstate_from_type(
+                                                                                    ctx, v228,
+                                                                                );
+                                                                            let v230 =
+                                                                                C::vstate_mf2(
+                                                                                    ctx, v229,
+                                                                                );
+                                                                            let v257 = constructor_rv_vwadd_vx(ctx, v251, v256, v165, v230);
+                                                                            let v258 = constructor_output_vreg(ctx, v257);
+                                                                            // Rule at src/isa/riscv64/lower.isle line 177.
+                                                                            return Some(v258);
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                        &Opcode::SwidenLow => {
+                                                            let v233 =
+                                                                constructor_put_in_vreg(ctx, v77);
+                                                            let v78 = C::value_type(ctx, v77);
+                                                            let v251 =
+                                                                constructor_gen_slidedown_half(
+                                                                    ctx, v78, v233,
+                                                                );
+                                                            let v252 =
+                                                                constructor_put_in_vreg(ctx, v69);
+                                                            let v165 = &constructor_unmasked(ctx);
+                                                            let v227 = C::ty_half_lanes(ctx, v78);
+                                                            let v228 = v227?;
+                                                            let v229 =
+                                                                C::vstate_from_type(ctx, v228);
+                                                            let v230 = C::vstate_mf2(ctx, v229);
+                                                            let v286 = constructor_rv_vwadd_vv(
+                                                                ctx, v251, v252, v165, v230,
+                                                            );
+                                                            let v287 =
+                                                                constructor_output_vreg(ctx, v286);
+                                                            // Rule at src/isa/riscv64/lower.isle line 238.
+                                                            return Some(v287);
+                                                        }
+                                                        &Opcode::SwidenHigh => {
+                                                            let v233 =
+                                                                constructor_put_in_vreg(ctx, v77);
+                                                            let v78 = C::value_type(ctx, v77);
+                                                            let v251 =
+                                                                constructor_gen_slidedown_half(
+                                                                    ctx, v78, v233,
+                                                                );
+                                                            let v252 =
+                                                                constructor_put_in_vreg(ctx, v69);
+                                                            let v253 =
+                                                                constructor_gen_slidedown_half(
+                                                                    ctx, v78, v252,
+                                                                );
+                                                            let v165 = &constructor_unmasked(ctx);
+                                                            let v227 = C::ty_half_lanes(ctx, v78);
+                                                            let v228 = v227?;
+                                                            let v229 =
+                                                                C::vstate_from_type(ctx, v228);
+                                                            let v230 = C::vstate_mf2(ctx, v229);
+                                                            let v254 = constructor_rv_vwadd_vv(
+                                                                ctx, v251, v253, v165, v230,
+                                                            );
+                                                            let v255 =
+                                                                constructor_output_vreg(ctx, v254);
+                                                            // Rule at src/isa/riscv64/lower.isle line 173.
+                                                            return Some(v255);
+                                                        }
+                                                        _ => {}
+                                                    }
+                                                }
+                                            }
+                                            let v196 = constructor_put_in_vreg(ctx, v38.1);
+                                            let v226 = constructor_put_in_vreg(ctx, v77);
+                                            let v78 = C::value_type(ctx, v77);
+                                            let v248 =
+                                                constructor_gen_slidedown_half(ctx, v78, v226);
+                                            let v165 = &constructor_unmasked(ctx);
+                                            let v227 = C::ty_half_lanes(ctx, v78);
+                                            let v228 = v227?;
+                                            let v229 = C::vstate_from_type(ctx, v228);
+                                            let v230 = C::vstate_mf2(ctx, v229);
+                                            let v249 = constructor_rv_vwadd_wv(
+                                                ctx, v196, v248, v165, v230,
+                                            );
+                                            let v250 = constructor_output_vreg(ctx, v249);
+                                            // Rule at src/isa/riscv64/lower.isle line 170.
+                                            return Some(v250);
+                                        }
+                                        &Opcode::UwidenLow => {
+                                            let v45 = C::def_inst(ctx, v38.1);
+                                            if let Some(v46) = v45 {
+                                                let v47 = &C::inst_data(ctx, v46);
+                                                if let &InstructionData::Unary {
+                                                    opcode: ref v68,
+                                                    arg: v69,
+                                                } = v47
+                                                {
+                                                    match v68 {
+                                                        &Opcode::Splat => {
+                                                            let v172 = C::def_inst(ctx, v69);
+                                                            if let Some(v173) = v172 {
+                                                                let v174 = &C::inst_data(ctx, v173);
+                                                                if let &InstructionData::Unary {
+                                                                    opcode: ref v175,
+                                                                    arg: v176,
+                                                                } = v174
+                                                                {
+                                                                    if let &Opcode::Uextend = v175 {
+                                                                        let v78 =
+                                                                            C::value_type(ctx, v77);
+                                                                        let v236 =
+                                                                            C::lane_type(ctx, v78);
+                                                                        let v177 = C::value_type(
+                                                                            ctx, v176,
+                                                                        );
+                                                                        let v237 = C::ty_equal(
+                                                                            ctx, v236, v177,
+                                                                        );
+                                                                        if v237 == true {
+                                                                            let v233 = constructor_put_in_vreg(ctx, v77);
+                                                                            let v182 = constructor_put_in_xreg(ctx, v176);
+                                                                            let v165 = &constructor_unmasked(ctx);
+                                                                            let v227 =
+                                                                                C::ty_half_lanes(
+                                                                                    ctx, v78,
+                                                                                );
+                                                                            let v228 = v227?;
+                                                                            let v229 =
+                                                                                C::vstate_from_type(
+                                                                                    ctx, v228,
+                                                                                );
+                                                                            let v230 =
+                                                                                C::vstate_mf2(
+                                                                                    ctx, v229,
+                                                                                );
+                                                                            let v269 = constructor_rv_vwaddu_vx(ctx, v233, v182, v165, v230);
+                                                                            let v270 = constructor_output_vreg(ctx, v269);
+                                                                            // Rule at src/isa/riscv64/lower.isle line 199.
+                                                                            return Some(v270);
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                        &Opcode::UwidenLow => {
+                                                            let v233 =
+                                                                constructor_put_in_vreg(ctx, v77);
+                                                            let v219 =
+                                                                constructor_put_in_vreg(ctx, v69);
+                                                            let v165 = &constructor_unmasked(ctx);
+                                                            let v78 = C::value_type(ctx, v77);
+                                                            let v227 = C::ty_half_lanes(ctx, v78);
+                                                            let v228 = v227?;
+                                                            let v229 =
+                                                                C::vstate_from_type(ctx, v228);
+                                                            let v230 = C::vstate_mf2(ctx, v229);
+                                                            let v267 = constructor_rv_vwaddu_vv(
+                                                                ctx, v233, v219, v165, v230,
+                                                            );
+                                                            let v268 =
+                                                                constructor_output_vreg(ctx, v267);
+                                                            // Rule at src/isa/riscv64/lower.isle line 195.
+                                                            return Some(v268);
+                                                        }
+                                                        &Opcode::UwidenHigh => {
+                                                            let v233 =
+                                                                constructor_put_in_vreg(ctx, v77);
+                                                            let v219 =
+                                                                constructor_put_in_vreg(ctx, v69);
+                                                            let v78 = C::value_type(ctx, v77);
+                                                            let v283 =
+                                                                constructor_gen_slidedown_half(
+                                                                    ctx, v78, v219,
+                                                                );
+                                                            let v165 = &constructor_unmasked(ctx);
+                                                            let v227 = C::ty_half_lanes(ctx, v78);
+                                                            let v228 = v227?;
+                                                            let v229 =
+                                                                C::vstate_from_type(ctx, v228);
+                                                            let v230 = C::vstate_mf2(ctx, v229);
+                                                            let v288 = constructor_rv_vwaddu_vv(
+                                                                ctx, v233, v283, v165, v230,
+                                                            );
+                                                            let v289 =
+                                                                constructor_output_vreg(ctx, v288);
+                                                            // Rule at src/isa/riscv64/lower.isle line 244.
+                                                            return Some(v289);
+                                                        }
+                                                        _ => {}
+                                                    }
+                                                }
+                                            }
+                                            let v196 = constructor_put_in_vreg(ctx, v38.1);
+                                            let v226 = constructor_put_in_vreg(ctx, v77);
+                                            let v165 = &constructor_unmasked(ctx);
+                                            let v78 = C::value_type(ctx, v77);
+                                            let v227 = C::ty_half_lanes(ctx, v78);
+                                            let v228 = v227?;
+                                            let v229 = C::vstate_from_type(ctx, v228);
+                                            let v230 = C::vstate_mf2(ctx, v229);
+                                            let v265 = constructor_rv_vwaddu_wv(
+                                                ctx, v196, v226, v165, v230,
+                                            );
+                                            let v266 = constructor_output_vreg(ctx, v265);
+                                            // Rule at src/isa/riscv64/lower.isle line 192.
+                                            return Some(v266);
+                                        }
+                                        &Opcode::UwidenHigh => {
+                                            let v45 = C::def_inst(ctx, v38.1);
+                                            if let Some(v46) = v45 {
+                                                let v47 = &C::inst_data(ctx, v46);
+                                                if let &InstructionData::Unary {
+                                                    opcode: ref v68,
+                                                    arg: v69,
+                                                } = v47
+                                                {
+                                                    match v68 {
+                                                        &Opcode::Splat => {
+                                                            let v172 = C::def_inst(ctx, v69);
+                                                            if let Some(v173) = v172 {
+                                                                let v174 = &C::inst_data(ctx, v173);
+                                                                if let &InstructionData::Unary {
+                                                                    opcode: ref v175,
+                                                                    arg: v176,
+                                                                } = v174
+                                                                {
+                                                                    if let &Opcode::Uextend = v175 {
+                                                                        let v78 =
+                                                                            C::value_type(ctx, v77);
+                                                                        let v236 =
+                                                                            C::lane_type(ctx, v78);
+                                                                        let v177 = C::value_type(
+                                                                            ctx, v176,
+                                                                        );
+                                                                        let v237 = C::ty_equal(
+                                                                            ctx, v236, v177,
+                                                                        );
+                                                                        if v237 == true {
+                                                                            let v233 = constructor_put_in_vreg(ctx, v77);
+                                                                            let v251 = constructor_gen_slidedown_half(ctx, v78, v233);
+                                                                            let v256 = constructor_put_in_xreg(ctx, v176);
+                                                                            let v165 = &constructor_unmasked(ctx);
+                                                                            let v227 =
+                                                                                C::ty_half_lanes(
+                                                                                    ctx, v78,
+                                                                                );
+                                                                            let v228 = v227?;
+                                                                            let v229 =
+                                                                                C::vstate_from_type(
+                                                                                    ctx, v228,
+                                                                                );
+                                                                            let v230 =
+                                                                                C::vstate_mf2(
+                                                                                    ctx, v229,
+                                                                                );
+                                                                            let v279 = constructor_rv_vwaddu_vx(ctx, v251, v256, v165, v230);
+                                                                            let v280 = constructor_output_vreg(ctx, v279);
+                                                                            // Rule at src/isa/riscv64/lower.isle line 222.
+                                                                            return Some(v280);
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                        &Opcode::UwidenLow => {
+                                                            let v233 =
+                                                                constructor_put_in_vreg(ctx, v77);
+                                                            let v78 = C::value_type(ctx, v77);
+                                                            let v251 =
+                                                                constructor_gen_slidedown_half(
+                                                                    ctx, v78, v233,
+                                                                );
+                                                            let v252 =
+                                                                constructor_put_in_vreg(ctx, v69);
+                                                            let v165 = &constructor_unmasked(ctx);
+                                                            let v227 = C::ty_half_lanes(ctx, v78);
+                                                            let v228 = v227?;
+                                                            let v229 =
+                                                                C::vstate_from_type(ctx, v228);
+                                                            let v230 = C::vstate_mf2(ctx, v229);
+                                                            let v290 = constructor_rv_vwaddu_vv(
+                                                                ctx, v251, v252, v165, v230,
+                                                            );
+                                                            let v291 =
+                                                                constructor_output_vreg(ctx, v290);
+                                                            // Rule at src/isa/riscv64/lower.isle line 248.
+                                                            return Some(v291);
+                                                        }
+                                                        &Opcode::UwidenHigh => {
+                                                            let v233 =
+                                                                constructor_put_in_vreg(ctx, v77);
+                                                            let v78 = C::value_type(ctx, v77);
+                                                            let v251 =
+                                                                constructor_gen_slidedown_half(
+                                                                    ctx, v78, v233,
+                                                                );
+                                                            let v252 =
+                                                                constructor_put_in_vreg(ctx, v69);
+                                                            let v253 =
+                                                                constructor_gen_slidedown_half(
+                                                                    ctx, v78, v252,
+                                                                );
+                                                            let v165 = &constructor_unmasked(ctx);
+                                                            let v227 = C::ty_half_lanes(ctx, v78);
+                                                            let v228 = v227?;
+                                                            let v229 =
+                                                                C::vstate_from_type(ctx, v228);
+                                                            let v230 = C::vstate_mf2(ctx, v229);
+                                                            let v277 = constructor_rv_vwaddu_vv(
+                                                                ctx, v251, v253, v165, v230,
+                                                            );
+                                                            let v278 =
+                                                                constructor_output_vreg(ctx, v277);
+                                                            // Rule at src/isa/riscv64/lower.isle line 218.
+                                                            return Some(v278);
+                                                        }
+                                                        _ => {}
+                                                    }
+                                                }
+                                            }
+                                            let v196 = constructor_put_in_vreg(ctx, v38.1);
+                                            let v226 = constructor_put_in_vreg(ctx, v77);
+                                            let v78 = C::value_type(ctx, v77);
+                                            let v248 =
+                                                constructor_gen_slidedown_half(ctx, v78, v226);
+                                            let v165 = &constructor_unmasked(ctx);
+                                            let v227 = C::ty_half_lanes(ctx, v78);
+                                            let v228 = v227?;
+                                            let v229 = C::vstate_from_type(ctx, v228);
+                                            let v230 = C::vstate_mf2(ctx, v229);
+                                            let v275 = constructor_rv_vwaddu_wv(
+                                                ctx, v196, v248, v165, v230,
+                                            );
+                                            let v276 = constructor_output_vreg(ctx, v275);
+                                            // Rule at src/isa/riscv64/lower.isle line 215.
+                                            return Some(v276);
+                                        }
+                                        _ => {}
+                                    }
+                                }
+                            }
+                            let v45 = C::def_inst(ctx, v38.1);
+                            if let Some(v46) = v45 {
+                                let v47 = &C::inst_data(ctx, v46);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v68,
+                                    arg: v69,
+                                } = v47
+                                {
+                                    match v68 {
+                                        &Opcode::Splat => {
+                                            let v172 = C::def_inst(ctx, v69);
+                                            if let Some(v173) = v172 {
+                                                let v174 = &C::inst_data(ctx, v173);
+                                                match v174 {
+                                                    &InstructionData::Unary {
+                                                        opcode: ref v175,
+                                                        arg: v176,
+                                                    } => {
+                                                        match v175 {
+                                                            &Opcode::Uextend => {
+                                                                let v178 =
+                                                                    C::ty_half_width(ctx, v11);
+                                                                if let Some(v179) = v178 {
+                                                                    let v180 =
+                                                                        C::lane_type(ctx, v179);
+                                                                    let v177 =
+                                                                        C::value_type(ctx, v176);
+                                                                    let v181 = C::ty_equal(
+                                                                        ctx, v180, v177,
+                                                                    );
+                                                                    if v181 == true {
+                                                                        let v163 =
+                                                                            constructor_put_in_vreg(
+                                                                                ctx, v38.0,
+                                                                            );
+                                                                        let v182 =
+                                                                            constructor_put_in_xreg(
+                                                                                ctx, v176,
+                                                                            );
+                                                                        let v165 =
+                                                                            &constructor_unmasked(
+                                                                                ctx,
+                                                                            );
+                                                                        let v183 =
+                                                                            C::vstate_from_type(
+                                                                                ctx, v179,
+                                                                            );
+                                                                        let v184 = C::vstate_mf2(
+                                                                            ctx, v183,
+                                                                        );
+                                                                        let v187 = constructor_rv_vwaddu_wx(ctx, v163, v182, v165, v184);
+                                                                        let v188 =
+                                                                            constructor_output_vreg(
+                                                                                ctx, v187,
+                                                                            );
+                                                                        // Rule at src/isa/riscv64/lower.isle line 117.
+                                                                        return Some(v188);
+                                                                    }
+                                                                }
+                                                            }
+                                                            &Opcode::Sextend => {
+                                                                let v178 =
+                                                                    C::ty_half_width(ctx, v11);
+                                                                if let Some(v179) = v178 {
+                                                                    let v180 =
+                                                                        C::lane_type(ctx, v179);
+                                                                    let v177 =
+                                                                        C::value_type(ctx, v176);
+                                                                    let v181 = C::ty_equal(
+                                                                        ctx, v180, v177,
+                                                                    );
+                                                                    if v181 == true {
+                                                                        let v163 =
+                                                                            constructor_put_in_vreg(
+                                                                                ctx, v38.0,
+                                                                            );
+                                                                        let v182 =
+                                                                            constructor_put_in_xreg(
+                                                                                ctx, v176,
+                                                                            );
+                                                                        let v165 =
+                                                                            &constructor_unmasked(
+                                                                                ctx,
+                                                                            );
+                                                                        let v183 =
+                                                                            C::vstate_from_type(
+                                                                                ctx, v179,
+                                                                            );
+                                                                        let v184 = C::vstate_mf2(
+                                                                            ctx, v183,
+                                                                        );
+                                                                        let v185 =
+                                                                            constructor_rv_vwadd_wx(
+                                                                                ctx, v163, v182,
+                                                                                v165, v184,
+                                                                            );
+                                                                        let v186 =
+                                                                            constructor_output_vreg(
+                                                                                ctx, v185,
+                                                                            );
+                                                                        // Rule at src/isa/riscv64/lower.isle line 112.
+                                                                        return Some(v186);
+                                                                    }
+                                                                }
+                                                            }
+                                                            _ => {}
+                                                        }
+                                                    }
+                                                    &InstructionData::UnaryImm {
+                                                        opcode: ref v189,
+                                                        imm: v190,
+                                                    } => {
+                                                        if let &Opcode::Iconst = v189 {
+                                                            let v191 = C::u64_from_imm64(ctx, v190);
+                                                            let v192 = C::imm5_from_u64(ctx, v191);
+                                                            if let Some(v193) = v192 {
+                                                                let v163 = constructor_put_in_vreg(
+                                                                    ctx, v38.0,
+                                                                );
+                                                                let v165 =
+                                                                    &constructor_unmasked(ctx);
+                                                                let v166 =
+                                                                    C::vstate_from_type(ctx, v11);
+                                                                let v194 = constructor_rv_vadd_vi(
+                                                                    ctx, v163, v193, v165, v166,
+                                                                );
+                                                                let v195 = constructor_output_vreg(
+                                                                    ctx, v194,
+                                                                );
+                                                                // Rule at src/isa/riscv64/lower.isle line 122.
+                                                                return Some(v195);
+                                                            }
+                                                        }
+                                                    }
+                                                    _ => {}
+                                                }
+                                            }
+                                            let v163 = constructor_put_in_vreg(ctx, v38.0);
+                                            let v169 = constructor_put_in_xreg(ctx, v69);
+                                            let v165 = &constructor_unmasked(ctx);
+                                            let v166 = C::vstate_from_type(ctx, v11);
+                                            let v170 =
+                                                constructor_rv_vadd_vx(ctx, v163, v169, v165, v166);
+                                            let v171 = constructor_output_vreg(ctx, v170);
+                                            // Rule at src/isa/riscv64/lower.isle line 109.
+                                            return Some(v171);
+                                        }
+                                        &Opcode::SwidenLow => {
+                                            let v163 = constructor_put_in_vreg(ctx, v38.0);
+                                            let v219 = constructor_put_in_vreg(ctx, v69);
+                                            let v165 = &constructor_unmasked(ctx);
+                                            let v70 = C::value_type(ctx, v69);
+                                            let v220 = C::ty_half_lanes(ctx, v70);
+                                            let v221 = v220?;
+                                            let v222 = C::vstate_from_type(ctx, v221);
+                                            let v223 = C::vstate_mf2(ctx, v222);
+                                            let v224 = constructor_rv_vwadd_wv(
+                                                ctx, v163, v219, v165, v223,
+                                            );
+                                            let v225 = constructor_output_vreg(ctx, v224);
+                                            // Rule at src/isa/riscv64/lower.isle line 144.
+                                            return Some(v225);
+                                        }
+                                        &Opcode::SwidenHigh => {
+                                            let v163 = constructor_put_in_vreg(ctx, v38.0);
+                                            let v219 = constructor_put_in_vreg(ctx, v69);
+                                            let v70 = C::value_type(ctx, v69);
+                                            let v245 =
+                                                constructor_gen_slidedown_half(ctx, v70, v219);
+                                            let v165 = &constructor_unmasked(ctx);
+                                            let v220 = C::ty_half_lanes(ctx, v70);
+                                            let v221 = v220?;
+                                            let v222 = C::vstate_from_type(ctx, v221);
+                                            let v223 = C::vstate_mf2(ctx, v222);
+                                            let v246 = constructor_rv_vwadd_wv(
+                                                ctx, v163, v245, v165, v223,
+                                            );
+                                            let v247 = constructor_output_vreg(ctx, v246);
+                                            // Rule at src/isa/riscv64/lower.isle line 167.
+                                            return Some(v247);
+                                        }
+                                        &Opcode::UwidenLow => {
+                                            let v163 = constructor_put_in_vreg(ctx, v38.0);
+                                            let v219 = constructor_put_in_vreg(ctx, v69);
+                                            let v165 = &constructor_unmasked(ctx);
+                                            let v70 = C::value_type(ctx, v69);
+                                            let v220 = C::ty_half_lanes(ctx, v70);
+                                            let v221 = v220?;
+                                            let v222 = C::vstate_from_type(ctx, v221);
+                                            let v223 = C::vstate_mf2(ctx, v222);
+                                            let v263 = constructor_rv_vwaddu_wv(
+                                                ctx, v163, v219, v165, v223,
+                                            );
+                                            let v264 = constructor_output_vreg(ctx, v263);
+                                            // Rule at src/isa/riscv64/lower.isle line 189.
+                                            return Some(v264);
+                                        }
+                                        &Opcode::UwidenHigh => {
+                                            let v163 = constructor_put_in_vreg(ctx, v38.0);
+                                            let v219 = constructor_put_in_vreg(ctx, v69);
+                                            let v70 = C::value_type(ctx, v69);
+                                            let v245 =
+                                                constructor_gen_slidedown_half(ctx, v70, v219);
+                                            let v165 = &constructor_unmasked(ctx);
+                                            let v220 = C::ty_half_lanes(ctx, v70);
+                                            let v221 = v220?;
+                                            let v222 = C::vstate_from_type(ctx, v221);
+                                            let v223 = C::vstate_mf2(ctx, v222);
+                                            let v273 = constructor_rv_vwaddu_wv(
+                                                ctx, v163, v245, v165, v223,
+                                            );
+                                            let v274 = constructor_output_vreg(ctx, v273);
+                                            // Rule at src/isa/riscv64/lower.isle line 212.
+                                            return Some(v274);
+                                        }
+                                        _ => {}
+                                    }
+                                }
+                            }
+                            let v163 = constructor_put_in_vreg(ctx, v38.0);
+                            let v164 = constructor_put_in_vreg(ctx, v38.1);
+                            let v165 = &constructor_unmasked(ctx);
+                            let v166 = C::vstate_from_type(ctx, v11);
+                            let v167 = constructor_rv_vadd_vv(ctx, v163, v164, v165, v166);
+                            let v168 = constructor_output_vreg(ctx, v167);
+                            // Rule at src/isa/riscv64/lower.isle line 106.
+                            return Some(v168);
+                        }
+                        match v3 {
+                            I64 => {
+                                let v71 = C::has_zba(ctx);
+                                if v71 == true {
+                                    let v38 = C::unpack_value_array_2(ctx, v37);
+                                    let v57 = C::def_inst(ctx, v38.0);
+                                    if let Some(v58) = v57 {
+                                        let v59 = &C::inst_data(ctx, v58);
+                                        if let &InstructionData::Binary {
+                                            opcode: ref v99,
+                                            args: ref v100,
+                                        } = v59
+                                        {
+                                            if let &Opcode::Ishl = v99 {
+                                                let v101 = C::unpack_value_array_2(ctx, v100);
+                                                let v104 = C::maybe_uextend(ctx, v101.1);
+                                                if let Some(v105) = v104 {
+                                                    let v106 = C::def_inst(ctx, v105);
+                                                    if let Some(v107) = v106 {
+                                                        let v108 = &C::inst_data(ctx, v107);
+                                                        if let &InstructionData::UnaryImm {
+                                                            opcode: ref v109,
+                                                            imm: v110,
+                                                        } = v108
+                                                        {
+                                                            if let &Opcode::Iconst = v109 {
+                                                                let v127 = C::def_inst(ctx, v101.0);
+                                                                if let Some(v128) = v127 {
+                                                                    let v129 =
+                                                                        &C::inst_data(ctx, v128);
+                                                                    if let &InstructionData::Unary {
+                                                                        opcode: ref v130,
+                                                                        arg: v131,
+                                                                    } = v129 {
+                                                                        if let &Opcode::Uextend = v130 {
+                                                                            let v132 = C::value_type(ctx, v131);
+                                                                            if v132 == I32 {
+                                                                                let v133 = &constructor_match_shnadd_uw(ctx, v110);
+                                                                                if let Some(v134) = v133 {
+                                                                                    let v135 = C::put_in_reg(ctx, v131);
+                                                                                    let v65 = C::put_in_reg(ctx, v38.1);
+                                                                                    let v136 = constructor_alu_rrr(ctx, v134, v135, v65);
+                                                                                    let v137 = constructor_output_reg(ctx, v136);
+                                                                                    // Rule at src/isa/riscv64/lower.isle line 89.
+                                                                                    return Some(v137);
+                                                                                }
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                    let v45 = C::def_inst(ctx, v38.1);
+                                    if let Some(v46) = v45 {
+                                        let v47 = &C::inst_data(ctx, v46);
+                                        if let &InstructionData::Binary {
+                                            opcode: ref v82,
+                                            args: ref v83,
+                                        } = v47
+                                        {
+                                            if let &Opcode::Ishl = v82 {
+                                                let v84 = C::unpack_value_array_2(ctx, v83);
+                                                let v87 = C::maybe_uextend(ctx, v84.1);
+                                                if let Some(v88) = v87 {
+                                                    let v89 = C::def_inst(ctx, v88);
+                                                    if let Some(v90) = v89 {
+                                                        let v91 = &C::inst_data(ctx, v90);
+                                                        if let &InstructionData::UnaryImm {
+                                                            opcode: ref v92,
+                                                            imm: v93,
+                                                        } = v91
+                                                        {
+                                                            if let &Opcode::Iconst = v92 {
+                                                                let v116 = C::def_inst(ctx, v84.0);
+                                                                if let Some(v117) = v116 {
+                                                                    let v118 =
+                                                                        &C::inst_data(ctx, v117);
+                                                                    if let &InstructionData::Unary {
+                                                                        opcode: ref v119,
+                                                                        arg: v120,
+                                                                    } = v118 {
+                                                                        if let &Opcode::Uextend = v119 {
+                                                                            let v121 = C::value_type(ctx, v120);
+                                                                            if v121 == I32 {
+                                                                                let v122 = &constructor_match_shnadd_uw(ctx, v93);
+                                                                                if let Some(v123) = v122 {
+                                                                                    let v124 = C::put_in_reg(ctx, v120);
+                                                                                    let v54 = C::put_in_reg(ctx, v38.0);
+                                                                                    let v125 = constructor_alu_rrr(ctx, v123, v124, v54);
+                                                                                    let v126 = constructor_output_reg(ctx, v125);
+                                                                                    // Rule at src/isa/riscv64/lower.isle line 84.
+                                                                                    return Some(v126);
+                                                                                }
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                    if let Some(v58) = v57 {
+                                        let v59 = &C::inst_data(ctx, v58);
+                                        match v59 {
+                                            &InstructionData::Binary {
+                                                opcode: ref v99,
+                                                args: ref v100,
+                                            } => {
+                                                if let &Opcode::Ishl = v99 {
+                                                    let v101 = C::unpack_value_array_2(ctx, v100);
+                                                    let v104 = C::maybe_uextend(ctx, v101.1);
+                                                    if let Some(v105) = v104 {
+                                                        let v106 = C::def_inst(ctx, v105);
+                                                        if let Some(v107) = v106 {
+                                                            let v108 = &C::inst_data(ctx, v107);
+                                                            if let &InstructionData::UnaryImm {
+                                                                opcode: ref v109,
+                                                                imm: v110,
+                                                            } = v108
+                                                            {
+                                                                if let &Opcode::Iconst = v109 {
+                                                                    let v111 =
+                                                                        &constructor_match_shnadd(
+                                                                            ctx, v110,
+                                                                        );
+                                                                    if let Some(v112) = v111 {
+                                                                        let v113 = C::put_in_reg(
+                                                                            ctx, v101.0,
+                                                                        );
+                                                                        let v65 = C::put_in_reg(
+                                                                            ctx, v38.1,
+                                                                        );
+                                                                        let v114 =
+                                                                            constructor_alu_rrr(
+                                                                                ctx, v112, v113,
+                                                                                v65,
+                                                                            );
+                                                                        let v115 =
+                                                                            constructor_output_reg(
+                                                                                ctx, v114,
+                                                                            );
+                                                                        // Rule at src/isa/riscv64/lower.isle line 67.
+                                                                        return Some(v115);
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                            &InstructionData::Unary {
+                                                opcode: ref v76,
+                                                arg: v77,
+                                            } => {
+                                                if let &Opcode::Uextend = v76 {
+                                                    let v78 = C::value_type(ctx, v77);
+                                                    if v78 == I32 {
+                                                        let v79 = constructor_put_in_xreg(ctx, v77);
+                                                        let v42 =
+                                                            constructor_put_in_xreg(ctx, v38.1);
+                                                        let v80 =
+                                                            constructor_rv_adduw(ctx, v79, v42);
+                                                        let v81 = constructor_output_xreg(ctx, v80);
+                                                        // Rule at src/isa/riscv64/lower.isle line 52.
+                                                        return Some(v81);
+                                                    }
+                                                }
+                                            }
+                                            _ => {}
+                                        }
+                                    }
+                                    if let Some(v46) = v45 {
+                                        let v47 = &C::inst_data(ctx, v46);
+                                        match v47 {
+                                            &InstructionData::Binary {
+                                                opcode: ref v82,
+                                                args: ref v83,
+                                            } => {
+                                                if let &Opcode::Ishl = v82 {
+                                                    let v84 = C::unpack_value_array_2(ctx, v83);
+                                                    let v87 = C::maybe_uextend(ctx, v84.1);
+                                                    if let Some(v88) = v87 {
+                                                        let v89 = C::def_inst(ctx, v88);
+                                                        if let Some(v90) = v89 {
+                                                            let v91 = &C::inst_data(ctx, v90);
+                                                            if let &InstructionData::UnaryImm {
+                                                                opcode: ref v92,
+                                                                imm: v93,
+                                                            } = v91
+                                                            {
+                                                                if let &Opcode::Iconst = v92 {
+                                                                    let v94 =
+                                                                        &constructor_match_shnadd(
+                                                                            ctx, v93,
+                                                                        );
+                                                                    if let Some(v95) = v94 {
+                                                                        let v96 = C::put_in_reg(
+                                                                            ctx, v84.0,
+                                                                        );
+                                                                        let v54 = C::put_in_reg(
+                                                                            ctx, v38.0,
+                                                                        );
+                                                                        let v97 =
+                                                                            constructor_alu_rrr(
+                                                                                ctx, v95, v96, v54,
+                                                                            );
+                                                                        let v98 =
+                                                                            constructor_output_reg(
+                                                                                ctx, v97,
+                                                                            );
+                                                                        // Rule at src/isa/riscv64/lower.isle line 62.
+                                                                        return Some(v98);
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                            &InstructionData::Unary {
+                                                opcode: ref v68,
+                                                arg: v69,
+                                            } => {
+                                                if let &Opcode::Uextend = v68 {
+                                                    let v70 = C::value_type(ctx, v69);
+                                                    if v70 == I32 {
+                                                        let v72 = constructor_put_in_xreg(ctx, v69);
+                                                        let v73 =
+                                                            constructor_put_in_xreg(ctx, v38.0);
+                                                        let v74 =
+                                                            constructor_rv_adduw(ctx, v72, v73);
+                                                        let v75 = constructor_output_xreg(ctx, v74);
+                                                        // Rule at src/isa/riscv64/lower.isle line 48.
+                                                        return Some(v75);
+                                                    }
+                                                }
+                                            }
+                                            _ => {}
+                                        }
+                                    }
+                                }
+                            }
+                            I128 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v138 = C::put_in_regs(ctx, v38.0);
+                                let v140 = C::value_regs_get(ctx, v138, 0x0);
+                                let v141 = C::xreg_new(ctx, v140);
+                                let v142 = C::put_in_regs(ctx, v38.1);
+                                let v143 = C::value_regs_get(ctx, v142, 0x0);
+                                let v144 = C::xreg_new(ctx, v143);
+                                let v145 = constructor_rv_add(ctx, v141, v144);
+                                let v146 = C::put_in_regs(ctx, v38.1);
+                                let v147 = C::value_regs_get(ctx, v146, 0x0);
+                                let v148 = C::xreg_new(ctx, v147);
+                                let v149 = constructor_rv_sltu(ctx, v145, v148);
+                                let v150 = C::put_in_regs(ctx, v38.0);
+                                let v152 = C::value_regs_get(ctx, v150, 0x1);
+                                let v153 = C::xreg_new(ctx, v152);
+                                let v154 = C::put_in_regs(ctx, v38.1);
+                                let v155 = C::value_regs_get(ctx, v154, 0x1);
+                                let v156 = C::xreg_new(ctx, v155);
+                                let v157 = constructor_rv_add(ctx, v153, v156);
+                                let v158 = constructor_rv_add(ctx, v157, v149);
+                                let v159 = C::xreg_to_reg(ctx, v145);
+                                let v160 = C::xreg_to_reg(ctx, v158);
+                                let v161 = C::value_regs(ctx, v159, v160);
+                                let v162 = C::output(ctx, v161);
+                                // Rule at src/isa/riscv64/lower.isle line 95.
+                                return Some(v162);
+                            }
+                            _ => {}
+                        }
+                        let v34 = C::ty_int_ref_scalar_64_extract(ctx, v3);
+                        if let Some(v35) = v34 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v57 = C::def_inst(ctx, v38.0);
+                            if let Some(v58) = v57 {
+                                let v59 = &C::inst_data(ctx, v58);
+                                if let &InstructionData::UnaryImm {
+                                    opcode: ref v60,
+                                    imm: v61,
+                                } = v59
+                                {
+                                    if let &Opcode::Iconst = v60 {
+                                        let v62 = C::u64_from_imm64(ctx, v61);
+                                        let v63 = C::imm12_from_u64(ctx, v62);
+                                        if let Some(v64) = v63 {
+                                            let v53 = &constructor_select_addi(ctx, v35);
+                                            let v65 = C::put_in_reg(ctx, v38.1);
+                                            let v66 = constructor_alu_rr_imm12(ctx, v53, v65, v64);
+                                            let v67 = constructor_output_reg(ctx, v66);
+                                            // Rule at src/isa/riscv64/lower.isle line 43.
+                                            return Some(v67);
+                                        }
+                                    }
+                                }
+                            }
+                            let v45 = C::def_inst(ctx, v38.1);
+                            if let Some(v46) = v45 {
+                                let v47 = &C::inst_data(ctx, v46);
+                                if let &InstructionData::UnaryImm {
+                                    opcode: ref v48,
+                                    imm: v49,
+                                } = v47
+                                {
+                                    if let &Opcode::Iconst = v48 {
+                                        let v50 = C::u64_from_imm64(ctx, v49);
+                                        let v51 = C::imm12_from_u64(ctx, v50);
+                                        if let Some(v52) = v51 {
+                                            let v53 = &constructor_select_addi(ctx, v35);
+                                            let v54 = C::put_in_reg(ctx, v38.0);
+                                            let v55 = constructor_alu_rr_imm12(ctx, v53, v54, v52);
+                                            let v56 = constructor_output_reg(ctx, v55);
+                                            // Rule at src/isa/riscv64/lower.isle line 40.
+                                            return Some(v56);
+                                        }
+                                    }
+                                }
+                            }
+                            let v41 = constructor_put_in_xreg(ctx, v38.0);
+                            let v42 = constructor_put_in_xreg(ctx, v38.1);
+                            let v43 = constructor_rv_add(ctx, v41, v42);
+                            let v44 = constructor_output_xreg(ctx, v43);
+                            // Rule at src/isa/riscv64/lower.isle line 36.
+                            return Some(v44);
+                        }
+                    }
+                }
+                &Opcode::Isub => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
+                        if let Some(v11) = v10 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v57 = C::def_inst(ctx, v38.0);
+                            if let Some(v58) = v57 {
+                                let v59 = &C::inst_data(ctx, v58);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v76,
+                                    arg: v77,
+                                } = v59
+                                {
+                                    match v76 {
+                                        &Opcode::Splat => {
+                                            let v200 = C::def_inst(ctx, v77);
+                                            if let Some(v201) = v200 {
+                                                let v202 = &C::inst_data(ctx, v201);
+                                                if let &InstructionData::UnaryImm {
+                                                    opcode: ref v212,
+                                                    imm: v213,
+                                                } = v202
+                                                {
+                                                    if let &Opcode::Iconst = v212 {
+                                                        let v214 = C::u64_from_imm64(ctx, v213);
+                                                        let v215 = C::imm5_from_u64(ctx, v214);
+                                                        if let Some(v216) = v215 {
+                                                            let v196 =
+                                                                constructor_put_in_vreg(ctx, v38.1);
+                                                            let v165 = &constructor_unmasked(ctx);
+                                                            let v166 =
+                                                                C::vstate_from_type(ctx, v11);
+                                                            let v329 = constructor_rv_vrsub_vi(
+                                                                ctx, v196, v216, v165, v166,
+                                                            );
+                                                            let v330 =
+                                                                constructor_output_vreg(ctx, v329);
+                                                            // Rule at src/isa/riscv64/lower.isle line 293.
+                                                            return Some(v330);
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                            let v196 = constructor_put_in_vreg(ctx, v38.1);
+                                            let v197 = constructor_put_in_xreg(ctx, v77);
+                                            let v165 = &constructor_unmasked(ctx);
+                                            let v166 = C::vstate_from_type(ctx, v11);
+                                            let v327 = constructor_rv_vrsub_vx(
+                                                ctx, v196, v197, v165, v166,
+                                            );
+                                            let v328 = constructor_output_vreg(ctx, v327);
+                                            // Rule at src/isa/riscv64/lower.isle line 290.
+                                            return Some(v328);
+                                        }
+                                        &Opcode::SwidenLow => {
+                                            let v45 = C::def_inst(ctx, v38.1);
+                                            if let Some(v46) = v45 {
+                                                let v47 = &C::inst_data(ctx, v46);
+                                                if let &InstructionData::Unary {
+                                                    opcode: ref v68,
+                                                    arg: v69,
+                                                } = v47
+                                                {
+                                                    match v68 {
+                                                        &Opcode::Splat => {
+                                                            let v172 = C::def_inst(ctx, v69);
+                                                            if let Some(v173) = v172 {
+                                                                let v174 = &C::inst_data(ctx, v173);
+                                                                if let &InstructionData::Unary {
+                                                                    opcode: ref v175,
+                                                                    arg: v176,
+                                                                } = v174
+                                                                {
+                                                                    if let &Opcode::Sextend = v175 {
+                                                                        let v78 =
+                                                                            C::value_type(ctx, v77);
+                                                                        let v236 =
+                                                                            C::lane_type(ctx, v78);
+                                                                        let v177 = C::value_type(
+                                                                            ctx, v176,
+                                                                        );
+                                                                        let v237 = C::ty_equal(
+                                                                            ctx, v236, v177,
+                                                                        );
+                                                                        if v237 == true {
+                                                                            let v233 = constructor_put_in_vreg(ctx, v77);
+                                                                            let v182 = constructor_put_in_xreg(ctx, v176);
+                                                                            let v165 = &constructor_unmasked(ctx);
+                                                                            let v227 =
+                                                                                C::ty_half_lanes(
+                                                                                    ctx, v78,
+                                                                                );
+                                                                            let v228 = v227?;
+                                                                            let v229 =
+                                                                                C::vstate_from_type(
+                                                                                    ctx, v228,
+                                                                                );
+                                                                            let v230 =
+                                                                                C::vstate_mf2(
+                                                                                    ctx, v229,
+                                                                                );
+                                                                            let v335 = constructor_rv_vwsub_vx(ctx, v233, v182, v165, v230);
+                                                                            let v336 = constructor_output_vreg(ctx, v335);
+                                                                            // Rule at src/isa/riscv64/lower.isle line 306.
+                                                                            return Some(v336);
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                        &Opcode::SwidenLow => {
+                                                            let v233 =
+                                                                constructor_put_in_vreg(ctx, v77);
+                                                            let v219 =
+                                                                constructor_put_in_vreg(ctx, v69);
+                                                            let v165 = &constructor_unmasked(ctx);
+                                                            let v78 = C::value_type(ctx, v77);
+                                                            let v227 = C::ty_half_lanes(ctx, v78);
+                                                            let v228 = v227?;
+                                                            let v229 =
+                                                                C::vstate_from_type(ctx, v228);
+                                                            let v230 = C::vstate_mf2(ctx, v229);
+                                                            let v333 = constructor_rv_vwsub_vv(
+                                                                ctx, v233, v219, v165, v230,
+                                                            );
+                                                            let v334 =
+                                                                constructor_output_vreg(ctx, v333);
+                                                            // Rule at src/isa/riscv64/lower.isle line 302.
+                                                            return Some(v334);
+                                                        }
+                                                        &Opcode::SwidenHigh => {
+                                                            let v233 =
+                                                                constructor_put_in_vreg(ctx, v77);
+                                                            let v219 =
+                                                                constructor_put_in_vreg(ctx, v69);
+                                                            let v78 = C::value_type(ctx, v77);
+                                                            let v283 =
+                                                                constructor_gen_slidedown_half(
+                                                                    ctx, v78, v219,
+                                                                );
+                                                            let v165 = &constructor_unmasked(ctx);
+                                                            let v227 = C::ty_half_lanes(ctx, v78);
+                                                            let v228 = v227?;
+                                                            let v229 =
+                                                                C::vstate_from_type(ctx, v228);
+                                                            let v230 = C::vstate_mf2(ctx, v229);
+                                                            let v355 = constructor_rv_vwsub_vv(
+                                                                ctx, v233, v283, v165, v230,
+                                                            );
+                                                            let v356 =
+                                                                constructor_output_vreg(ctx, v355);
+                                                            // Rule at src/isa/riscv64/lower.isle line 357.
+                                                            return Some(v356);
+                                                        }
+                                                        _ => {}
+                                                    }
+                                                }
+                                            }
+                                        }
+                                        &Opcode::SwidenHigh => {
+                                            let v45 = C::def_inst(ctx, v38.1);
+                                            if let Some(v46) = v45 {
+                                                let v47 = &C::inst_data(ctx, v46);
+                                                if let &InstructionData::Unary {
+                                                    opcode: ref v68,
+                                                    arg: v69,
+                                                } = v47
+                                                {
+                                                    match v68 {
+                                                        &Opcode::Splat => {
+                                                            let v172 = C::def_inst(ctx, v69);
+                                                            if let Some(v173) = v172 {
+                                                                let v174 = &C::inst_data(ctx, v173);
+                                                                if let &InstructionData::Unary {
+                                                                    opcode: ref v175,
+                                                                    arg: v176,
+                                                                } = v174
+                                                                {
+                                                                    if let &Opcode::Sextend = v175 {
+                                                                        let v78 =
+                                                                            C::value_type(ctx, v77);
+                                                                        let v236 =
+                                                                            C::lane_type(ctx, v78);
+                                                                        let v177 = C::value_type(
+                                                                            ctx, v176,
+                                                                        );
+                                                                        let v237 = C::ty_equal(
+                                                                            ctx, v236, v177,
+                                                                        );
+                                                                        if v237 == true {
+                                                                            let v233 = constructor_put_in_vreg(ctx, v77);
+                                                                            let v251 = constructor_gen_slidedown_half(ctx, v78, v233);
+                                                                            let v256 = constructor_put_in_xreg(ctx, v176);
+                                                                            let v165 = &constructor_unmasked(ctx);
+                                                                            let v227 =
+                                                                                C::ty_half_lanes(
+                                                                                    ctx, v78,
+                                                                                );
+                                                                            let v228 = v227?;
+                                                                            let v229 =
+                                                                                C::vstate_from_type(
+                                                                                    ctx, v228,
+                                                                                );
+                                                                            let v230 =
+                                                                                C::vstate_mf2(
+                                                                                    ctx, v229,
+                                                                                );
+                                                                            let v341 = constructor_rv_vwsub_vx(ctx, v251, v256, v165, v230);
+                                                                            let v342 = constructor_output_vreg(ctx, v341);
+                                                                            // Rule at src/isa/riscv64/lower.isle line 321.
+                                                                            return Some(v342);
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                        &Opcode::SwidenLow => {
+                                                            let v233 =
+                                                                constructor_put_in_vreg(ctx, v77);
+                                                            let v78 = C::value_type(ctx, v77);
+                                                            let v251 =
+                                                                constructor_gen_slidedown_half(
+                                                                    ctx, v78, v233,
+                                                                );
+                                                            let v252 =
+                                                                constructor_put_in_vreg(ctx, v69);
+                                                            let v165 = &constructor_unmasked(ctx);
+                                                            let v227 = C::ty_half_lanes(ctx, v78);
+                                                            let v228 = v227?;
+                                                            let v229 =
+                                                                C::vstate_from_type(ctx, v228);
+                                                            let v230 = C::vstate_mf2(ctx, v229);
+                                                            let v357 = constructor_rv_vwsub_vv(
+                                                                ctx, v251, v252, v165, v230,
+                                                            );
+                                                            let v358 =
+                                                                constructor_output_vreg(ctx, v357);
+                                                            // Rule at src/isa/riscv64/lower.isle line 361.
+                                                            return Some(v358);
+                                                        }
+                                                        &Opcode::SwidenHigh => {
+                                                            let v233 =
+                                                                constructor_put_in_vreg(ctx, v77);
+                                                            let v78 = C::value_type(ctx, v77);
+                                                            let v251 =
+                                                                constructor_gen_slidedown_half(
+                                                                    ctx, v78, v233,
+                                                                );
+                                                            let v252 =
+                                                                constructor_put_in_vreg(ctx, v69);
+                                                            let v253 =
+                                                                constructor_gen_slidedown_half(
+                                                                    ctx, v78, v252,
+                                                                );
+                                                            let v165 = &constructor_unmasked(ctx);
+                                                            let v227 = C::ty_half_lanes(ctx, v78);
+                                                            let v228 = v227?;
+                                                            let v229 =
+                                                                C::vstate_from_type(ctx, v228);
+                                                            let v230 = C::vstate_mf2(ctx, v229);
+                                                            let v339 = constructor_rv_vwsub_vv(
+                                                                ctx, v251, v253, v165, v230,
+                                                            );
+                                                            let v340 =
+                                                                constructor_output_vreg(ctx, v339);
+                                                            // Rule at src/isa/riscv64/lower.isle line 317.
+                                                            return Some(v340);
+                                                        }
+                                                        _ => {}
+                                                    }
+                                                }
+                                            }
+                                        }
+                                        &Opcode::UwidenLow => {
+                                            let v45 = C::def_inst(ctx, v38.1);
+                                            if let Some(v46) = v45 {
+                                                let v47 = &C::inst_data(ctx, v46);
+                                                if let &InstructionData::Unary {
+                                                    opcode: ref v68,
+                                                    arg: v69,
+                                                } = v47
+                                                {
+                                                    match v68 {
+                                                        &Opcode::Splat => {
+                                                            let v172 = C::def_inst(ctx, v69);
+                                                            if let Some(v173) = v172 {
+                                                                let v174 = &C::inst_data(ctx, v173);
+                                                                if let &InstructionData::Unary {
+                                                                    opcode: ref v175,
+                                                                    arg: v176,
+                                                                } = v174
+                                                                {
+                                                                    if let &Opcode::Uextend = v175 {
+                                                                        let v78 =
+                                                                            C::value_type(ctx, v77);
+                                                                        let v236 =
+                                                                            C::lane_type(ctx, v78);
+                                                                        let v177 = C::value_type(
+                                                                            ctx, v176,
+                                                                        );
+                                                                        let v237 = C::ty_equal(
+                                                                            ctx, v236, v177,
+                                                                        );
+                                                                        if v237 == true {
+                                                                            let v233 = constructor_put_in_vreg(ctx, v77);
+                                                                            let v182 = constructor_put_in_xreg(ctx, v176);
+                                                                            let v165 = &constructor_unmasked(ctx);
+                                                                            let v227 =
+                                                                                C::ty_half_lanes(
+                                                                                    ctx, v78,
+                                                                                );
+                                                                            let v228 = v227?;
+                                                                            let v229 =
+                                                                                C::vstate_from_type(
+                                                                                    ctx, v228,
+                                                                                );
+                                                                            let v230 =
+                                                                                C::vstate_mf2(
+                                                                                    ctx, v229,
+                                                                                );
+                                                                            let v347 = constructor_rv_vwsubu_vx(ctx, v233, v182, v165, v230);
+                                                                            let v348 = constructor_output_vreg(ctx, v347);
+                                                                            // Rule at src/isa/riscv64/lower.isle line 335.
+                                                                            return Some(v348);
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                        &Opcode::UwidenLow => {
+                                                            let v233 =
+                                                                constructor_put_in_vreg(ctx, v77);
+                                                            let v219 =
+                                                                constructor_put_in_vreg(ctx, v69);
+                                                            let v165 = &constructor_unmasked(ctx);
+                                                            let v78 = C::value_type(ctx, v77);
+                                                            let v227 = C::ty_half_lanes(ctx, v78);
+                                                            let v228 = v227?;
+                                                            let v229 =
+                                                                C::vstate_from_type(ctx, v228);
+                                                            let v230 = C::vstate_mf2(ctx, v229);
+                                                            let v345 = constructor_rv_vwsubu_vv(
+                                                                ctx, v233, v219, v165, v230,
+                                                            );
+                                                            let v346 =
+                                                                constructor_output_vreg(ctx, v345);
+                                                            // Rule at src/isa/riscv64/lower.isle line 331.
+                                                            return Some(v346);
+                                                        }
+                                                        &Opcode::UwidenHigh => {
+                                                            let v233 =
+                                                                constructor_put_in_vreg(ctx, v77);
+                                                            let v219 =
+                                                                constructor_put_in_vreg(ctx, v69);
+                                                            let v78 = C::value_type(ctx, v77);
+                                                            let v283 =
+                                                                constructor_gen_slidedown_half(
+                                                                    ctx, v78, v219,
+                                                                );
+                                                            let v165 = &constructor_unmasked(ctx);
+                                                            let v227 = C::ty_half_lanes(ctx, v78);
+                                                            let v228 = v227?;
+                                                            let v229 =
+                                                                C::vstate_from_type(ctx, v228);
+                                                            let v230 = C::vstate_mf2(ctx, v229);
+                                                            let v359 = constructor_rv_vwsubu_vv(
+                                                                ctx, v233, v283, v165, v230,
+                                                            );
+                                                            let v360 =
+                                                                constructor_output_vreg(ctx, v359);
+                                                            // Rule at src/isa/riscv64/lower.isle line 367.
+                                                            return Some(v360);
+                                                        }
+                                                        _ => {}
+                                                    }
+                                                }
+                                            }
+                                        }
+                                        &Opcode::UwidenHigh => {
+                                            let v45 = C::def_inst(ctx, v38.1);
+                                            if let Some(v46) = v45 {
+                                                let v47 = &C::inst_data(ctx, v46);
+                                                if let &InstructionData::Unary {
+                                                    opcode: ref v68,
+                                                    arg: v69,
+                                                } = v47
+                                                {
+                                                    match v68 {
+                                                        &Opcode::Splat => {
+                                                            let v172 = C::def_inst(ctx, v69);
+                                                            if let Some(v173) = v172 {
+                                                                let v174 = &C::inst_data(ctx, v173);
+                                                                if let &InstructionData::Unary {
+                                                                    opcode: ref v175,
+                                                                    arg: v176,
+                                                                } = v174
+                                                                {
+                                                                    if let &Opcode::Uextend = v175 {
+                                                                        let v78 =
+                                                                            C::value_type(ctx, v77);
+                                                                        let v236 =
+                                                                            C::lane_type(ctx, v78);
+                                                                        let v177 = C::value_type(
+                                                                            ctx, v176,
+                                                                        );
+                                                                        let v237 = C::ty_equal(
+                                                                            ctx, v236, v177,
+                                                                        );
+                                                                        if v237 == true {
+                                                                            let v233 = constructor_put_in_vreg(ctx, v77);
+                                                                            let v251 = constructor_gen_slidedown_half(ctx, v78, v233);
+                                                                            let v256 = constructor_put_in_xreg(ctx, v176);
+                                                                            let v165 = &constructor_unmasked(ctx);
+                                                                            let v227 =
+                                                                                C::ty_half_lanes(
+                                                                                    ctx, v78,
+                                                                                );
+                                                                            let v228 = v227?;
+                                                                            let v229 =
+                                                                                C::vstate_from_type(
+                                                                                    ctx, v228,
+                                                                                );
+                                                                            let v230 =
+                                                                                C::vstate_mf2(
+                                                                                    ctx, v229,
+                                                                                );
+                                                                            let v353 = constructor_rv_vwsubu_vx(ctx, v251, v256, v165, v230);
+                                                                            let v354 = constructor_output_vreg(ctx, v353);
+                                                                            // Rule at src/isa/riscv64/lower.isle line 350.
+                                                                            return Some(v354);
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                        &Opcode::UwidenLow => {
+                                                            let v233 =
+                                                                constructor_put_in_vreg(ctx, v77);
+                                                            let v78 = C::value_type(ctx, v77);
+                                                            let v251 =
+                                                                constructor_gen_slidedown_half(
+                                                                    ctx, v78, v233,
+                                                                );
+                                                            let v252 =
+                                                                constructor_put_in_vreg(ctx, v69);
+                                                            let v165 = &constructor_unmasked(ctx);
+                                                            let v227 = C::ty_half_lanes(ctx, v78);
+                                                            let v228 = v227?;
+                                                            let v229 =
+                                                                C::vstate_from_type(ctx, v228);
+                                                            let v230 = C::vstate_mf2(ctx, v229);
+                                                            let v361 = constructor_rv_vwsubu_vv(
+                                                                ctx, v251, v252, v165, v230,
+                                                            );
+                                                            let v362 =
+                                                                constructor_output_vreg(ctx, v361);
+                                                            // Rule at src/isa/riscv64/lower.isle line 371.
+                                                            return Some(v362);
+                                                        }
+                                                        &Opcode::UwidenHigh => {
+                                                            let v233 =
+                                                                constructor_put_in_vreg(ctx, v77);
+                                                            let v78 = C::value_type(ctx, v77);
+                                                            let v251 =
+                                                                constructor_gen_slidedown_half(
+                                                                    ctx, v78, v233,
+                                                                );
+                                                            let v252 =
+                                                                constructor_put_in_vreg(ctx, v69);
+                                                            let v253 =
+                                                                constructor_gen_slidedown_half(
+                                                                    ctx, v78, v252,
+                                                                );
+                                                            let v165 = &constructor_unmasked(ctx);
+                                                            let v227 = C::ty_half_lanes(ctx, v78);
+                                                            let v228 = v227?;
+                                                            let v229 =
+                                                                C::vstate_from_type(ctx, v228);
+                                                            let v230 = C::vstate_mf2(ctx, v229);
+                                                            let v351 = constructor_rv_vwsubu_vv(
+                                                                ctx, v251, v253, v165, v230,
+                                                            );
+                                                            let v352 =
+                                                                constructor_output_vreg(ctx, v351);
+                                                            // Rule at src/isa/riscv64/lower.isle line 346.
+                                                            return Some(v352);
+                                                        }
+                                                        _ => {}
+                                                    }
+                                                }
+                                            }
+                                        }
+                                        _ => {}
+                                    }
+                                }
+                            }
+                            let v45 = C::def_inst(ctx, v38.1);
+                            if let Some(v46) = v45 {
+                                let v47 = &C::inst_data(ctx, v46);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v68,
+                                    arg: v69,
+                                } = v47
+                                {
+                                    match v68 {
+                                        &Opcode::Splat => {
+                                            let v172 = C::def_inst(ctx, v69);
+                                            if let Some(v173) = v172 {
+                                                let v174 = &C::inst_data(ctx, v173);
+                                                if let &InstructionData::Unary {
+                                                    opcode: ref v175,
+                                                    arg: v176,
+                                                } = v174
+                                                {
+                                                    match v175 {
+                                                        &Opcode::Uextend => {
+                                                            let v178 = C::ty_half_width(ctx, v11);
+                                                            if let Some(v179) = v178 {
+                                                                let v180 = C::lane_type(ctx, v179);
+                                                                let v177 = C::value_type(ctx, v176);
+                                                                let v181 =
+                                                                    C::ty_equal(ctx, v180, v177);
+                                                                if v181 == true {
+                                                                    let v163 =
+                                                                        constructor_put_in_vreg(
+                                                                            ctx, v38.0,
+                                                                        );
+                                                                    let v182 =
+                                                                        constructor_put_in_xreg(
+                                                                            ctx, v176,
+                                                                        );
+                                                                    let v165 =
+                                                                        &constructor_unmasked(ctx);
+                                                                    let v183 = C::vstate_from_type(
+                                                                        ctx, v179,
+                                                                    );
+                                                                    let v184 =
+                                                                        C::vstate_mf2(ctx, v183);
+                                                                    let v325 =
+                                                                        constructor_rv_vwsubu_wx(
+                                                                            ctx, v163, v182, v165,
+                                                                            v184,
+                                                                        );
+                                                                    let v326 =
+                                                                        constructor_output_vreg(
+                                                                            ctx, v325,
+                                                                        );
+                                                                    // Rule at src/isa/riscv64/lower.isle line 285.
+                                                                    return Some(v326);
+                                                                }
+                                                            }
+                                                        }
+                                                        &Opcode::Sextend => {
+                                                            let v178 = C::ty_half_width(ctx, v11);
+                                                            if let Some(v179) = v178 {
+                                                                let v180 = C::lane_type(ctx, v179);
+                                                                let v177 = C::value_type(ctx, v176);
+                                                                let v181 =
+                                                                    C::ty_equal(ctx, v180, v177);
+                                                                if v181 == true {
+                                                                    let v163 =
+                                                                        constructor_put_in_vreg(
+                                                                            ctx, v38.0,
+                                                                        );
+                                                                    let v182 =
+                                                                        constructor_put_in_xreg(
+                                                                            ctx, v176,
+                                                                        );
+                                                                    let v165 =
+                                                                        &constructor_unmasked(ctx);
+                                                                    let v183 = C::vstate_from_type(
+                                                                        ctx, v179,
+                                                                    );
+                                                                    let v184 =
+                                                                        C::vstate_mf2(ctx, v183);
+                                                                    let v323 =
+                                                                        constructor_rv_vwsub_wx(
+                                                                            ctx, v163, v182, v165,
+                                                                            v184,
+                                                                        );
+                                                                    let v324 =
+                                                                        constructor_output_vreg(
+                                                                            ctx, v323,
+                                                                        );
+                                                                    // Rule at src/isa/riscv64/lower.isle line 280.
+                                                                    return Some(v324);
+                                                                }
+                                                            }
+                                                        }
+                                                        _ => {}
+                                                    }
+                                                }
+                                            }
+                                            let v163 = constructor_put_in_vreg(ctx, v38.0);
+                                            let v169 = constructor_put_in_xreg(ctx, v69);
+                                            let v165 = &constructor_unmasked(ctx);
+                                            let v166 = C::vstate_from_type(ctx, v11);
+                                            let v321 =
+                                                constructor_rv_vsub_vx(ctx, v163, v169, v165, v166);
+                                            let v322 = constructor_output_vreg(ctx, v321);
+                                            // Rule at src/isa/riscv64/lower.isle line 277.
+                                            return Some(v322);
+                                        }
+                                        &Opcode::SwidenLow => {
+                                            let v163 = constructor_put_in_vreg(ctx, v38.0);
+                                            let v219 = constructor_put_in_vreg(ctx, v69);
+                                            let v165 = &constructor_unmasked(ctx);
+                                            let v70 = C::value_type(ctx, v69);
+                                            let v220 = C::ty_half_lanes(ctx, v70);
+                                            let v221 = v220?;
+                                            let v222 = C::vstate_from_type(ctx, v221);
+                                            let v223 = C::vstate_mf2(ctx, v222);
+                                            let v331 = constructor_rv_vwsub_wv(
+                                                ctx, v163, v219, v165, v223,
+                                            );
+                                            let v332 = constructor_output_vreg(ctx, v331);
+                                            // Rule at src/isa/riscv64/lower.isle line 299.
+                                            return Some(v332);
+                                        }
+                                        &Opcode::SwidenHigh => {
+                                            let v163 = constructor_put_in_vreg(ctx, v38.0);
+                                            let v219 = constructor_put_in_vreg(ctx, v69);
+                                            let v70 = C::value_type(ctx, v69);
+                                            let v245 =
+                                                constructor_gen_slidedown_half(ctx, v70, v219);
+                                            let v165 = &constructor_unmasked(ctx);
+                                            let v220 = C::ty_half_lanes(ctx, v70);
+                                            let v221 = v220?;
+                                            let v222 = C::vstate_from_type(ctx, v221);
+                                            let v223 = C::vstate_mf2(ctx, v222);
+                                            let v337 = constructor_rv_vwsub_wv(
+                                                ctx, v163, v245, v165, v223,
+                                            );
+                                            let v338 = constructor_output_vreg(ctx, v337);
+                                            // Rule at src/isa/riscv64/lower.isle line 314.
+                                            return Some(v338);
+                                        }
+                                        &Opcode::UwidenLow => {
+                                            let v163 = constructor_put_in_vreg(ctx, v38.0);
+                                            let v219 = constructor_put_in_vreg(ctx, v69);
+                                            let v165 = &constructor_unmasked(ctx);
+                                            let v70 = C::value_type(ctx, v69);
+                                            let v220 = C::ty_half_lanes(ctx, v70);
+                                            let v221 = v220?;
+                                            let v222 = C::vstate_from_type(ctx, v221);
+                                            let v223 = C::vstate_mf2(ctx, v222);
+                                            let v343 = constructor_rv_vwsubu_wv(
+                                                ctx, v163, v219, v165, v223,
+                                            );
+                                            let v344 = constructor_output_vreg(ctx, v343);
+                                            // Rule at src/isa/riscv64/lower.isle line 328.
+                                            return Some(v344);
+                                        }
+                                        &Opcode::UwidenHigh => {
+                                            let v163 = constructor_put_in_vreg(ctx, v38.0);
+                                            let v219 = constructor_put_in_vreg(ctx, v69);
+                                            let v70 = C::value_type(ctx, v69);
+                                            let v245 =
+                                                constructor_gen_slidedown_half(ctx, v70, v219);
+                                            let v165 = &constructor_unmasked(ctx);
+                                            let v220 = C::ty_half_lanes(ctx, v70);
+                                            let v221 = v220?;
+                                            let v222 = C::vstate_from_type(ctx, v221);
+                                            let v223 = C::vstate_mf2(ctx, v222);
+                                            let v349 = constructor_rv_vwsubu_wv(
+                                                ctx, v163, v245, v165, v223,
+                                            );
+                                            let v350 = constructor_output_vreg(ctx, v349);
+                                            // Rule at src/isa/riscv64/lower.isle line 343.
+                                            return Some(v350);
+                                        }
+                                        _ => {}
+                                    }
+                                }
+                            }
+                            let v163 = constructor_put_in_vreg(ctx, v38.0);
+                            let v164 = constructor_put_in_vreg(ctx, v38.1);
+                            let v165 = &constructor_unmasked(ctx);
+                            let v166 = C::vstate_from_type(ctx, v11);
+                            let v319 = constructor_rv_vsub_vv(ctx, v163, v164, v165, v166);
+                            let v320 = constructor_output_vreg(ctx, v319);
+                            // Rule at src/isa/riscv64/lower.isle line 274.
+                            return Some(v320);
+                        }
+                        if v3 == I128 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v138 = C::put_in_regs(ctx, v38.0);
+                            let v316 = C::put_in_regs(ctx, v38.1);
+                            let v317 = constructor_i128_sub(ctx, v138, v316);
+                            let v318 = C::output(ctx, v317);
+                            // Rule at src/isa/riscv64/lower.isle line 270.
+                            return Some(v318);
+                        }
+                        let v310 = C::fits_in_32(ctx, v3);
+                        if let Some(v311) = v310 {
+                            let v312 = C::ty_int(ctx, v311);
+                            if let Some(v313) = v312 {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v41 = constructor_put_in_xreg(ctx, v38.0);
+                                let v42 = constructor_put_in_xreg(ctx, v38.1);
+                                let v314 = constructor_rv_subw(ctx, v41, v42);
+                                let v315 = constructor_output_xreg(ctx, v314);
+                                // Rule at src/isa/riscv64/lower.isle line 267.
+                                return Some(v315);
+                            }
+                        }
+                        let v34 = C::ty_int_ref_scalar_64_extract(ctx, v3);
+                        if let Some(v35) = v34 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v41 = constructor_put_in_xreg(ctx, v38.0);
+                            let v42 = constructor_put_in_xreg(ctx, v38.1);
+                            let v308 = constructor_rv_sub(ctx, v41, v42);
+                            let v309 = constructor_output_xreg(ctx, v308);
+                            // Rule at src/isa/riscv64/lower.isle line 264.
+                            return Some(v309);
+                        }
+                    }
+                }
+                &Opcode::Imul => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
+                        if let Some(v11) = v10 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v45 = C::def_inst(ctx, v38.1);
+                            if let Some(v46) = v45 {
+                                let v47 = &C::inst_data(ctx, v46);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v68,
+                                    arg: v69,
+                                } = v47
+                                {
+                                    if let &Opcode::Splat = v68 {
+                                        let v163 = constructor_put_in_vreg(ctx, v38.0);
+                                        let v169 = constructor_put_in_xreg(ctx, v69);
+                                        let v165 = &constructor_unmasked(ctx);
+                                        let v166 = C::vstate_from_type(ctx, v11);
+                                        let v398 =
+                                            constructor_rv_vmul_vx(ctx, v163, v169, v165, v166);
+                                        let v399 = constructor_output_vreg(ctx, v398);
+                                        // Rule at src/isa/riscv64/lower.isle line 426.
+                                        return Some(v399);
+                                    }
+                                }
+                            }
+                            let v57 = C::def_inst(ctx, v38.0);
+                            if let Some(v58) = v57 {
+                                let v59 = &C::inst_data(ctx, v58);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v76,
+                                    arg: v77,
+                                } = v59
+                                {
+                                    if let &Opcode::Splat = v76 {
+                                        let v196 = constructor_put_in_vreg(ctx, v38.1);
+                                        let v197 = constructor_put_in_xreg(ctx, v77);
+                                        let v165 = &constructor_unmasked(ctx);
+                                        let v166 = C::vstate_from_type(ctx, v11);
+                                        let v396 =
+                                            constructor_rv_vmul_vx(ctx, v196, v197, v165, v166);
+                                        let v397 = constructor_output_vreg(ctx, v396);
+                                        // Rule at src/isa/riscv64/lower.isle line 423.
+                                        return Some(v397);
+                                    }
+                                }
+                            }
+                            let v163 = constructor_put_in_vreg(ctx, v38.0);
+                            let v164 = constructor_put_in_vreg(ctx, v38.1);
+                            let v165 = &constructor_unmasked(ctx);
+                            let v166 = C::vstate_from_type(ctx, v11);
+                            let v394 = constructor_rv_vmul_vv(ctx, v163, v164, v165, v166);
+                            let v395 = constructor_output_vreg(ctx, v394);
+                            // Rule at src/isa/riscv64/lower.isle line 420.
+                            return Some(v395);
+                        }
+                        if v3 == I128 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v138 = C::put_in_regs(ctx, v38.0);
+                            let v140 = C::value_regs_get(ctx, v138, 0x0);
+                            let v141 = C::xreg_new(ctx, v140);
+                            let v377 = C::value_regs_get(ctx, v138, 0x1);
+                            let v378 = C::xreg_new(ctx, v377);
+                            let v379 = C::put_in_regs(ctx, v38.1);
+                            let v380 = C::value_regs_get(ctx, v379, 0x0);
+                            let v381 = C::xreg_new(ctx, v380);
+                            let v382 = C::value_regs_get(ctx, v379, 0x1);
+                            let v383 = C::xreg_new(ctx, v382);
+                            let v384 = constructor_rv_mulhu(ctx, v141, v381);
+                            let v385 = constructor_madd(ctx, v141, v383, v384);
+                            let v386 = constructor_madd(ctx, v378, v381, v385);
+                            let v387 = C::zero_reg(ctx);
+                            let v388 = C::xreg_new(ctx, v387);
+                            let v389 = constructor_madd(ctx, v141, v381, v388);
+                            let v390 = C::xreg_to_reg(ctx, v389);
+                            let v391 = C::xreg_to_reg(ctx, v386);
+                            let v392 = C::value_regs(ctx, v390, v391);
+                            let v393 = C::output(ctx, v392);
+                            // Rule at src/isa/riscv64/lower.isle line 394.
+                            return Some(v393);
+                        }
+                        let v310 = C::fits_in_32(ctx, v3);
+                        if let Some(v311) = v310 {
+                            let v312 = C::ty_int(ctx, v311);
+                            if let Some(v313) = v312 {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v41 = constructor_put_in_xreg(ctx, v38.0);
+                                let v42 = constructor_put_in_xreg(ctx, v38.1);
+                                let v375 = constructor_rv_mulw(ctx, v41, v42);
+                                let v376 = constructor_output_xreg(ctx, v375);
+                                // Rule at src/isa/riscv64/lower.isle line 390.
+                                return Some(v376);
+                            }
+                        }
+                        let v34 = C::ty_int_ref_scalar_64_extract(ctx, v3);
+                        if let Some(v35) = v34 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v41 = constructor_put_in_xreg(ctx, v38.0);
+                            let v42 = constructor_put_in_xreg(ctx, v38.1);
+                            let v373 = constructor_rv_mul(ctx, v41, v42);
+                            let v374 = constructor_output_xreg(ctx, v373);
+                            // Rule at src/isa/riscv64/lower.isle line 387.
+                            return Some(v374);
+                        }
+                    }
+                }
+                &Opcode::Umulhi => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
+                        if let Some(v11) = v10 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v45 = C::def_inst(ctx, v38.1);
+                            if let Some(v46) = v45 {
+                                let v47 = &C::inst_data(ctx, v46);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v68,
+                                    arg: v69,
+                                } = v47
+                                {
+                                    if let &Opcode::Splat = v68 {
+                                        let v163 = constructor_put_in_vreg(ctx, v38.0);
+                                        let v169 = constructor_put_in_xreg(ctx, v69);
+                                        let v165 = &constructor_unmasked(ctx);
+                                        let v166 = C::vstate_from_type(ctx, v11);
+                                        let v420 =
+                                            constructor_rv_vmulhu_vx(ctx, v163, v169, v165, v166);
+                                        let v421 = constructor_output_vreg(ctx, v420);
+                                        // Rule at src/isa/riscv64/lower.isle line 452.
+                                        return Some(v421);
+                                    }
+                                }
+                            }
+                            let v57 = C::def_inst(ctx, v38.0);
+                            if let Some(v58) = v57 {
+                                let v59 = &C::inst_data(ctx, v58);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v76,
+                                    arg: v77,
+                                } = v59
+                                {
+                                    if let &Opcode::Splat = v76 {
+                                        let v196 = constructor_put_in_vreg(ctx, v38.1);
+                                        let v197 = constructor_put_in_xreg(ctx, v77);
+                                        let v165 = &constructor_unmasked(ctx);
+                                        let v166 = C::vstate_from_type(ctx, v11);
+                                        let v418 =
+                                            constructor_rv_vmulhu_vx(ctx, v196, v197, v165, v166);
+                                        let v419 = constructor_output_vreg(ctx, v418);
+                                        // Rule at src/isa/riscv64/lower.isle line 449.
+                                        return Some(v419);
+                                    }
+                                }
+                            }
+                            let v163 = constructor_put_in_vreg(ctx, v38.0);
+                            let v164 = constructor_put_in_vreg(ctx, v38.1);
+                            let v165 = &constructor_unmasked(ctx);
+                            let v166 = C::vstate_from_type(ctx, v11);
+                            let v416 = constructor_rv_vmulhu_vv(ctx, v163, v164, v165, v166);
+                            let v417 = constructor_output_vreg(ctx, v416);
+                            // Rule at src/isa/riscv64/lower.isle line 446.
+                            return Some(v417);
+                        }
+                        let v34 = C::ty_int_ref_scalar_64_extract(ctx, v3);
+                        if let Some(v35) = v34 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v41 = constructor_put_in_xreg(ctx, v38.0);
+                            let v412 = constructor_zext(ctx, v41, v35, I64);
+                            let v402 = constructor_put_in_xreg(ctx, v38.1);
+                            let v413 = constructor_zext(ctx, v402, v35, I64);
+                            let v414 = constructor_lower_umlhi(ctx, v35, v412, v413);
+                            let v415 = constructor_output_xreg(ctx, v414);
+                            // Rule at src/isa/riscv64/lower.isle line 443.
+                            return Some(v415);
+                        }
+                    }
+                }
+                &Opcode::Smulhi => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
+                        if let Some(v11) = v10 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v45 = C::def_inst(ctx, v38.1);
+                            if let Some(v46) = v45 {
+                                let v47 = &C::inst_data(ctx, v46);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v68,
+                                    arg: v69,
+                                } = v47
+                                {
+                                    if let &Opcode::Splat = v68 {
+                                        let v163 = constructor_put_in_vreg(ctx, v38.0);
+                                        let v169 = constructor_put_in_xreg(ctx, v69);
+                                        let v165 = &constructor_unmasked(ctx);
+                                        let v166 = C::vstate_from_type(ctx, v11);
+                                        let v410 =
+                                            constructor_rv_vmulh_vx(ctx, v163, v169, v165, v166);
+                                        let v411 = constructor_output_vreg(ctx, v410);
+                                        // Rule at src/isa/riscv64/lower.isle line 439.
+                                        return Some(v411);
+                                    }
+                                }
+                            }
+                            let v57 = C::def_inst(ctx, v38.0);
+                            if let Some(v58) = v57 {
+                                let v59 = &C::inst_data(ctx, v58);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v76,
+                                    arg: v77,
+                                } = v59
+                                {
+                                    if let &Opcode::Splat = v76 {
+                                        let v196 = constructor_put_in_vreg(ctx, v38.1);
+                                        let v197 = constructor_put_in_xreg(ctx, v77);
+                                        let v165 = &constructor_unmasked(ctx);
+                                        let v166 = C::vstate_from_type(ctx, v11);
+                                        let v408 =
+                                            constructor_rv_vmulh_vx(ctx, v196, v197, v165, v166);
+                                        let v409 = constructor_output_vreg(ctx, v408);
+                                        // Rule at src/isa/riscv64/lower.isle line 436.
+                                        return Some(v409);
+                                    }
+                                }
+                            }
+                            let v163 = constructor_put_in_vreg(ctx, v38.0);
+                            let v164 = constructor_put_in_vreg(ctx, v38.1);
+                            let v165 = &constructor_unmasked(ctx);
+                            let v166 = C::vstate_from_type(ctx, v11);
+                            let v406 = constructor_rv_vmulh_vv(ctx, v163, v164, v165, v166);
+                            let v407 = constructor_output_vreg(ctx, v406);
+                            // Rule at src/isa/riscv64/lower.isle line 433.
+                            return Some(v407);
+                        }
+                        let v34 = C::ty_int_ref_scalar_64_extract(ctx, v3);
+                        if let Some(v35) = v34 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v41 = constructor_put_in_xreg(ctx, v38.0);
+                            let v401 = constructor_sext(ctx, v41, v35, I64);
+                            let v402 = constructor_put_in_xreg(ctx, v38.1);
+                            let v403 = constructor_sext(ctx, v402, v35, I64);
+                            let v404 = constructor_lower_smlhi(ctx, v35, v401, v403);
+                            let v405 = constructor_output_xreg(ctx, v404);
+                            // Rule at src/isa/riscv64/lower.isle line 430.
+                            return Some(v405);
+                        }
+                    }
+                }
+                &Opcode::SqmulRoundSat => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
+                        if let Some(v11) = v10 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v57 = C::def_inst(ctx, v38.0);
+                            if let Some(v58) = v57 {
+                                let v59 = &C::inst_data(ctx, v58);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v76,
+                                    arg: v77,
+                                } = v59
+                                {
+                                    if let &Opcode::Splat = v76 {
+                                        let v196 = constructor_put_in_vreg(ctx, v38.1);
+                                        let v197 = constructor_put_in_xreg(ctx, v77);
+                                        let v165 = &constructor_unmasked(ctx);
+                                        let v166 = C::vstate_from_type(ctx, v11);
+                                        let v1695 =
+                                            constructor_rv_vsmul_vx(ctx, v196, v197, v165, v166);
+                                        let v1696 = constructor_output_vreg(ctx, v1695);
+                                        // Rule at src/isa/riscv64/lower.isle line 1968.
+                                        return Some(v1696);
+                                    }
+                                }
+                            }
+                            let v45 = C::def_inst(ctx, v38.1);
+                            if let Some(v46) = v45 {
+                                let v47 = &C::inst_data(ctx, v46);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v68,
+                                    arg: v69,
+                                } = v47
+                                {
+                                    if let &Opcode::Splat = v68 {
+                                        let v163 = constructor_put_in_vreg(ctx, v38.0);
+                                        let v169 = constructor_put_in_xreg(ctx, v69);
+                                        let v165 = &constructor_unmasked(ctx);
+                                        let v166 = C::vstate_from_type(ctx, v11);
+                                        let v1693 =
+                                            constructor_rv_vsmul_vx(ctx, v163, v169, v165, v166);
+                                        let v1694 = constructor_output_vreg(ctx, v1693);
+                                        // Rule at src/isa/riscv64/lower.isle line 1965.
+                                        return Some(v1694);
+                                    }
+                                }
+                            }
+                            let v163 = constructor_put_in_vreg(ctx, v38.0);
+                            let v164 = constructor_put_in_vreg(ctx, v38.1);
+                            let v165 = &constructor_unmasked(ctx);
+                            let v166 = C::vstate_from_type(ctx, v11);
+                            let v1691 = constructor_rv_vsmul_vv(ctx, v163, v164, v165, v166);
+                            let v1692 = constructor_output_vreg(ctx, v1691);
+                            // Rule at src/isa/riscv64/lower.isle line 1962.
+                            return Some(v1692);
+                        }
+                    }
+                }
+                &Opcode::Udiv => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        if v3 == I64 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v422 = constructor_put_in_xreg(ctx, v38.1);
+                            let v442 = constructor_gen_div_by_zero(ctx, v422);
+                            let v443 = constructor_put_in_xreg(ctx, v38.0);
+                            let v436 = constructor_put_in_xreg(ctx, v38.1);
+                            let v444 = constructor_rv_divu(ctx, v443, v436);
+                            let v445 = constructor_output_xreg(ctx, v444);
+                            // Rule at src/isa/riscv64/lower.isle line 477.
+                            return Some(v445);
+                        }
+                        let v310 = C::fits_in_32(ctx, v3);
+                        if let Some(v311) = v310 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v422 = constructor_put_in_xreg(ctx, v38.1);
+                            let v423 = constructor_zext(ctx, v422, v311, I64);
+                            let v424 = constructor_gen_div_by_zero(ctx, v423);
+                            let v425 = constructor_put_in_xreg(ctx, v38.0);
+                            let v426 = constructor_zext(ctx, v425, v311, I64);
+                            let v427 = constructor_rv_divuw(ctx, v426, v423);
+                            let v428 = constructor_output_xreg(ctx, v427);
+                            // Rule at src/isa/riscv64/lower.isle line 457.
+                            return Some(v428);
+                        }
+                    }
+                }
+                &Opcode::Sdiv => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        if v3 == I64 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v41 = constructor_put_in_xreg(ctx, v38.0);
+                            let v42 = constructor_put_in_xreg(ctx, v38.1);
+                            let v435 = constructor_gen_div_overflow(ctx, v41, v42, I64);
+                            let v436 = constructor_put_in_xreg(ctx, v38.1);
+                            let v437 = constructor_gen_div_by_zero(ctx, v436);
+                            let v438 = constructor_put_in_xreg(ctx, v38.0);
+                            let v439 = constructor_put_in_xreg(ctx, v38.1);
+                            let v440 = constructor_rv_div(ctx, v438, v439);
+                            let v441 = constructor_output_xreg(ctx, v440);
+                            // Rule at src/isa/riscv64/lower.isle line 471.
+                            return Some(v441);
+                        }
+                        let v310 = C::fits_in_32(ctx, v3);
+                        if let Some(v311) = v310 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v41 = constructor_put_in_xreg(ctx, v38.0);
+                            let v429 = constructor_sext(ctx, v41, v311, I64);
+                            let v402 = constructor_put_in_xreg(ctx, v38.1);
+                            let v430 = constructor_sext(ctx, v402, v311, I64);
+                            let v431 = constructor_gen_div_overflow(ctx, v429, v430, v311);
+                            let v432 = constructor_gen_div_by_zero(ctx, v430);
+                            let v433 = constructor_rv_divw(ctx, v429, v430);
+                            let v434 = constructor_output_xreg(ctx, v433);
+                            // Rule at src/isa/riscv64/lower.isle line 463.
+                            return Some(v434);
+                        }
+                    }
+                }
+                &Opcode::Urem => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            I32 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v422 = constructor_put_in_xreg(ctx, v38.1);
+                                let v463 = constructor_zext(ctx, v422, I32, I64);
+                                let v464 = constructor_gen_div_by_zero(ctx, v463);
+                                let v425 = constructor_put_in_xreg(ctx, v38.0);
+                                let v465 = constructor_rv_remuw(ctx, v425, v463);
+                                let v466 = constructor_output_xreg(ctx, v465);
+                                // Rule at src/isa/riscv64/lower.isle line 502.
+                                return Some(v466);
+                            }
+                            I64 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v422 = constructor_put_in_xreg(ctx, v38.1);
+                                let v442 = constructor_gen_div_by_zero(ctx, v422);
+                                let v443 = constructor_put_in_xreg(ctx, v38.0);
+                                let v436 = constructor_put_in_xreg(ctx, v38.1);
+                                let v469 = constructor_rv_remu(ctx, v443, v436);
+                                let v470 = constructor_output_xreg(ctx, v469);
+                                // Rule at src/isa/riscv64/lower.isle line 513.
+                                return Some(v470);
+                            }
+                            _ => {}
+                        }
+                        let v446 = C::fits_in_16(ctx, v3);
+                        if let Some(v447) = v446 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v422 = constructor_put_in_xreg(ctx, v38.1);
+                            let v448 = constructor_zext(ctx, v422, v447, I64);
+                            let v449 = constructor_gen_div_by_zero(ctx, v448);
+                            let v425 = constructor_put_in_xreg(ctx, v38.0);
+                            let v450 = constructor_zext(ctx, v425, v447, I64);
+                            let v451 = constructor_rv_remuw(ctx, v450, v448);
+                            let v452 = constructor_output_xreg(ctx, v451);
+                            // Rule at src/isa/riscv64/lower.isle line 484.
+                            return Some(v452);
+                        }
+                    }
+                }
+                &Opcode::Srem => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            I32 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v422 = constructor_put_in_xreg(ctx, v38.1);
+                                let v459 = constructor_sext(ctx, v422, I32, I64);
+                                let v460 = constructor_gen_div_by_zero(ctx, v459);
+                                let v425 = constructor_put_in_xreg(ctx, v38.0);
+                                let v461 = constructor_rv_remw(ctx, v425, v459);
+                                let v462 = constructor_output_xreg(ctx, v461);
+                                // Rule at src/isa/riscv64/lower.isle line 496.
+                                return Some(v462);
+                            }
+                            I64 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v422 = constructor_put_in_xreg(ctx, v38.1);
+                                let v442 = constructor_gen_div_by_zero(ctx, v422);
+                                let v443 = constructor_put_in_xreg(ctx, v38.0);
+                                let v436 = constructor_put_in_xreg(ctx, v38.1);
+                                let v467 = constructor_rv_rem(ctx, v443, v436);
+                                let v468 = constructor_output_xreg(ctx, v467);
+                                // Rule at src/isa/riscv64/lower.isle line 508.
+                                return Some(v468);
+                            }
+                            _ => {}
+                        }
+                        let v446 = C::fits_in_16(ctx, v3);
+                        if let Some(v447) = v446 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v422 = constructor_put_in_xreg(ctx, v38.1);
+                            let v453 = constructor_sext(ctx, v422, v447, I64);
+                            let v454 = constructor_gen_div_by_zero(ctx, v453);
+                            let v425 = constructor_put_in_xreg(ctx, v38.0);
+                            let v455 = constructor_sext(ctx, v425, v447, I64);
+                            let v456 = constructor_rv_remw(ctx, v455, v453);
+                            let v457 = constructor_output_xreg(ctx, v456);
+                            // Rule at src/isa/riscv64/lower.isle line 490.
+                            return Some(v457);
+                        }
+                    }
+                }
+                &Opcode::Band => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
+                        if let Some(v11) = v10 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v57 = C::def_inst(ctx, v38.0);
+                            if let Some(v58) = v57 {
+                                let v59 = &C::inst_data(ctx, v58);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v76,
+                                    arg: v77,
+                                } = v59
+                                {
+                                    if let &Opcode::Splat = v76 {
+                                        let v200 = C::def_inst(ctx, v77);
+                                        if let Some(v201) = v200 {
+                                            let v202 = &C::inst_data(ctx, v201);
+                                            if let &InstructionData::UnaryImm {
+                                                opcode: ref v212,
+                                                imm: v213,
+                                            } = v202
+                                            {
+                                                if let &Opcode::Iconst = v212 {
+                                                    let v214 = C::u64_from_imm64(ctx, v213);
+                                                    let v215 = C::imm5_from_u64(ctx, v214);
+                                                    if let Some(v216) = v215 {
+                                                        let v196 =
+                                                            constructor_put_in_vreg(ctx, v38.1);
+                                                        let v165 = &constructor_unmasked(ctx);
+                                                        let v166 = C::vstate_from_type(ctx, v11);
+                                                        let v533 = constructor_rv_vand_vi(
+                                                            ctx, v196, v216, v165, v166,
+                                                        );
+                                                        let v534 =
+                                                            constructor_output_vreg(ctx, v533);
+                                                        // Rule at src/isa/riscv64/lower.isle line 570.
+                                                        return Some(v534);
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                            }
+                            let v45 = C::def_inst(ctx, v38.1);
+                            if let Some(v46) = v45 {
+                                let v47 = &C::inst_data(ctx, v46);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v68,
+                                    arg: v69,
+                                } = v47
+                                {
+                                    if let &Opcode::Splat = v68 {
+                                        let v172 = C::def_inst(ctx, v69);
+                                        if let Some(v173) = v172 {
+                                            let v174 = &C::inst_data(ctx, v173);
+                                            if let &InstructionData::UnaryImm {
+                                                opcode: ref v189,
+                                                imm: v190,
+                                            } = v174
+                                            {
+                                                if let &Opcode::Iconst = v189 {
+                                                    let v191 = C::u64_from_imm64(ctx, v190);
+                                                    let v192 = C::imm5_from_u64(ctx, v191);
+                                                    if let Some(v193) = v192 {
+                                                        let v163 =
+                                                            constructor_put_in_vreg(ctx, v38.0);
+                                                        let v165 = &constructor_unmasked(ctx);
+                                                        let v166 = C::vstate_from_type(ctx, v11);
+                                                        let v531 = constructor_rv_vand_vi(
+                                                            ctx, v163, v193, v165, v166,
+                                                        );
+                                                        let v532 =
+                                                            constructor_output_vreg(ctx, v531);
+                                                        // Rule at src/isa/riscv64/lower.isle line 567.
+                                                        return Some(v532);
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                            }
+                            let v525 = C::ty_vector_not_float(ctx, v11);
+                            if let Some(v526) = v525 {
+                                if let Some(v58) = v57 {
+                                    let v59 = &C::inst_data(ctx, v58);
+                                    if let &InstructionData::Unary {
+                                        opcode: ref v76,
+                                        arg: v77,
+                                    } = v59
+                                    {
+                                        if let &Opcode::Splat = v76 {
+                                            let v196 = constructor_put_in_vreg(ctx, v38.1);
+                                            let v197 = constructor_put_in_xreg(ctx, v77);
+                                            let v165 = &constructor_unmasked(ctx);
+                                            let v166 = C::vstate_from_type(ctx, v11);
+                                            let v529 =
+                                                constructor_rv_vand_vx(ctx, v196, v197, v165, v166);
+                                            let v530 = constructor_output_vreg(ctx, v529);
+                                            // Rule at src/isa/riscv64/lower.isle line 563.
+                                            return Some(v530);
+                                        }
+                                    }
+                                }
+                                if let Some(v46) = v45 {
+                                    let v47 = &C::inst_data(ctx, v46);
+                                    if let &InstructionData::Unary {
+                                        opcode: ref v68,
+                                        arg: v69,
+                                    } = v47
+                                    {
+                                        if let &Opcode::Splat = v68 {
+                                            let v163 = constructor_put_in_vreg(ctx, v38.0);
+                                            let v169 = constructor_put_in_xreg(ctx, v69);
+                                            let v165 = &constructor_unmasked(ctx);
+                                            let v166 = C::vstate_from_type(ctx, v11);
+                                            let v527 =
+                                                constructor_rv_vand_vx(ctx, v163, v169, v165, v166);
+                                            let v528 = constructor_output_vreg(ctx, v527);
+                                            // Rule at src/isa/riscv64/lower.isle line 559.
+                                            return Some(v528);
+                                        }
+                                    }
+                                }
+                            }
+                            let v163 = constructor_put_in_vreg(ctx, v38.0);
+                            let v164 = constructor_put_in_vreg(ctx, v38.1);
+                            let v165 = &constructor_unmasked(ctx);
+                            let v166 = C::vstate_from_type(ctx, v11);
+                            let v523 = constructor_rv_vand_vv(ctx, v163, v164, v165, v166);
+                            let v524 = constructor_output_vreg(ctx, v523);
+                            // Rule at src/isa/riscv64/lower.isle line 556.
+                            return Some(v524);
+                        }
+                        let v486 = C::has_zbb(ctx);
+                        if v486 == true {
+                            if v3 == I128 {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v57 = C::def_inst(ctx, v38.0);
+                                if let Some(v58) = v57 {
+                                    let v59 = &C::inst_data(ctx, v58);
+                                    if let &InstructionData::Unary {
+                                        opcode: ref v76,
+                                        arg: v77,
+                                    } = v59
+                                    {
+                                        if let &Opcode::Bnot = v76 {
+                                            let v506 = C::put_in_regs(ctx, v38.1);
+                                            let v507 = C::value_regs_get(ctx, v506, 0x0);
+                                            let v508 = C::xreg_new(ctx, v507);
+                                            let v509 = C::put_in_regs(ctx, v77);
+                                            let v510 = C::value_regs_get(ctx, v509, 0x0);
+                                            let v511 = C::xreg_new(ctx, v510);
+                                            let v512 = constructor_rv_andn(ctx, v508, v511);
+                                            let v146 = C::put_in_regs(ctx, v38.1);
+                                            let v513 = C::value_regs_get(ctx, v146, 0x1);
+                                            let v514 = C::xreg_new(ctx, v513);
+                                            let v515 = C::put_in_regs(ctx, v77);
+                                            let v516 = C::value_regs_get(ctx, v515, 0x1);
+                                            let v517 = C::xreg_new(ctx, v516);
+                                            let v518 = constructor_rv_andn(ctx, v514, v517);
+                                            let v519 = C::xreg_to_reg(ctx, v512);
+                                            let v520 = C::xreg_to_reg(ctx, v518);
+                                            let v521 = C::value_regs(ctx, v519, v520);
+                                            let v522 = C::output(ctx, v521);
+                                            // Rule at src/isa/riscv64/lower.isle line 550.
+                                            return Some(v522);
+                                        }
+                                    }
+                                }
+                                let v45 = C::def_inst(ctx, v38.1);
+                                if let Some(v46) = v45 {
+                                    let v47 = &C::inst_data(ctx, v46);
+                                    if let &InstructionData::Unary {
+                                        opcode: ref v68,
+                                        arg: v69,
+                                    } = v47
+                                    {
+                                        if let &Opcode::Bnot = v68 {
+                                            let v138 = C::put_in_regs(ctx, v38.0);
+                                            let v140 = C::value_regs_get(ctx, v138, 0x0);
+                                            let v141 = C::xreg_new(ctx, v140);
+                                            let v491 = C::put_in_regs(ctx, v69);
+                                            let v492 = C::value_regs_get(ctx, v491, 0x0);
+                                            let v493 = C::xreg_new(ctx, v492);
+                                            let v494 = constructor_rv_andn(ctx, v141, v493);
+                                            let v495 = C::put_in_regs(ctx, v38.0);
+                                            let v496 = C::value_regs_get(ctx, v495, 0x1);
+                                            let v497 = C::xreg_new(ctx, v496);
+                                            let v498 = C::put_in_regs(ctx, v69);
+                                            let v499 = C::value_regs_get(ctx, v498, 0x1);
+                                            let v500 = C::xreg_new(ctx, v499);
+                                            let v501 = constructor_rv_andn(ctx, v497, v500);
+                                            let v502 = C::xreg_to_reg(ctx, v494);
+                                            let v503 = C::xreg_to_reg(ctx, v501);
+                                            let v504 = C::value_regs(ctx, v502, v503);
+                                            let v505 = C::output(ctx, v504);
+                                            // Rule at src/isa/riscv64/lower.isle line 544.
+                                            return Some(v505);
+                                        }
+                                    }
+                                }
+                            }
+                            let v292 = C::fits_in_64(ctx, v3);
+                            if let Some(v293) = v292 {
+                                let v473 = C::ty_int(ctx, v293);
+                                if let Some(v474) = v473 {
+                                    let v38 = C::unpack_value_array_2(ctx, v37);
+                                    let v57 = C::def_inst(ctx, v38.0);
+                                    if let Some(v58) = v57 {
+                                        let v59 = &C::inst_data(ctx, v58);
+                                        if let &InstructionData::Unary {
+                                            opcode: ref v76,
+                                            arg: v77,
+                                        } = v59
+                                        {
+                                            if let &Opcode::Bnot = v76 {
+                                                let v422 = constructor_put_in_xreg(ctx, v38.1);
+                                                let v197 = constructor_put_in_xreg(ctx, v77);
+                                                let v489 = constructor_rv_andn(ctx, v422, v197);
+                                                let v490 = constructor_output_xreg(ctx, v489);
+                                                // Rule at src/isa/riscv64/lower.isle line 540.
+                                                return Some(v490);
+                                            }
+                                        }
+                                    }
+                                    let v45 = C::def_inst(ctx, v38.1);
+                                    if let Some(v46) = v45 {
+                                        let v47 = &C::inst_data(ctx, v46);
+                                        if let &InstructionData::Unary {
+                                            opcode: ref v68,
+                                            arg: v69,
+                                        } = v47
+                                        {
+                                            if let &Opcode::Bnot = v68 {
+                                                let v41 = constructor_put_in_xreg(ctx, v38.0);
+                                                let v169 = constructor_put_in_xreg(ctx, v69);
+                                                let v487 = constructor_rv_andn(ctx, v41, v169);
+                                                let v488 = constructor_output_xreg(ctx, v487);
+                                                // Rule at src/isa/riscv64/lower.isle line 536.
+                                                return Some(v488);
+                                            }
+                                        }
+                                    }
+                                }
+                            }
+                        }
+                        let v479 = C::ty_scalar_float(ctx, v3);
+                        if let Some(v480) = v479 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v482 = constructor_put_in_freg(ctx, v38.0);
+                            let v483 = constructor_put_in_freg(ctx, v38.1);
+                            let v484 = constructor_lower_float_binary(
+                                ctx,
+                                &AluOPRRR::And,
+                                v482,
+                                v483,
+                                v480,
+                            );
+                            let v485 = constructor_output_freg(ctx, v484);
+                            // Rule at src/isa/riscv64/lower.isle line 529.
+                            return Some(v485);
+                        }
+                        let v292 = C::fits_in_64(ctx, v3);
+                        if let Some(v293) = v292 {
+                            let v473 = C::ty_int(ctx, v293);
+                            if let Some(v474) = v473 {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v57 = C::def_inst(ctx, v38.0);
+                                if let Some(v58) = v57 {
+                                    let v59 = &C::inst_data(ctx, v58);
+                                    if let &InstructionData::UnaryImm {
+                                        opcode: ref v60,
+                                        imm: v61,
+                                    } = v59
+                                    {
+                                        if let &Opcode::Iconst = v60 {
+                                            let v62 = C::u64_from_imm64(ctx, v61);
+                                            let v63 = C::imm12_from_u64(ctx, v62);
+                                            if let Some(v64) = v63 {
+                                                let v422 = constructor_put_in_xreg(ctx, v38.1);
+                                                let v477 = constructor_rv_andi(ctx, v422, v64);
+                                                let v478 = constructor_output_xreg(ctx, v477);
+                                                // Rule at src/isa/riscv64/lower.isle line 526.
+                                                return Some(v478);
+                                            }
+                                        }
+                                    }
+                                }
+                                let v45 = C::def_inst(ctx, v38.1);
+                                if let Some(v46) = v45 {
+                                    let v47 = &C::inst_data(ctx, v46);
+                                    if let &InstructionData::UnaryImm {
+                                        opcode: ref v48,
+                                        imm: v49,
+                                    } = v47
+                                    {
+                                        if let &Opcode::Iconst = v48 {
+                                            let v50 = C::u64_from_imm64(ctx, v49);
+                                            let v51 = C::imm12_from_u64(ctx, v50);
+                                            if let Some(v52) = v51 {
+                                                let v41 = constructor_put_in_xreg(ctx, v38.0);
+                                                let v475 = constructor_rv_andi(ctx, v41, v52);
+                                                let v476 = constructor_output_xreg(ctx, v475);
+                                                // Rule at src/isa/riscv64/lower.isle line 523.
+                                                return Some(v476);
+                                            }
+                                        }
+                                    }
+                                }
+                            }
+                        }
+                        let v363 = C::ty_int(ctx, v3);
+                        if let Some(v364) = v363 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v138 = C::put_in_regs(ctx, v38.0);
+                            let v316 = C::put_in_regs(ctx, v38.1);
+                            let v471 = constructor_gen_and(ctx, v364, v138, v316);
+                            let v472 = C::output(ctx, v471);
+                            // Rule at src/isa/riscv64/lower.isle line 519.
+                            return Some(v472);
+                        }
+                    }
+                }
+                &Opcode::Bor => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
+                        if let Some(v11) = v10 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v57 = C::def_inst(ctx, v38.0);
+                            if let Some(v58) = v57 {
+                                let v59 = &C::inst_data(ctx, v58);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v76,
+                                    arg: v77,
+                                } = v59
+                                {
+                                    if let &Opcode::Splat = v76 {
+                                        let v200 = C::def_inst(ctx, v77);
+                                        if let Some(v201) = v200 {
+                                            let v202 = &C::inst_data(ctx, v201);
+                                            if let &InstructionData::UnaryImm {
+                                                opcode: ref v212,
+                                                imm: v213,
+                                            } = v202
+                                            {
+                                                if let &Opcode::Iconst = v212 {
+                                                    let v214 = C::u64_from_imm64(ctx, v213);
+                                                    let v215 = C::imm5_from_u64(ctx, v214);
+                                                    if let Some(v216) = v215 {
+                                                        let v196 =
+                                                            constructor_put_in_vreg(ctx, v38.1);
+                                                        let v165 = &constructor_unmasked(ctx);
+                                                        let v166 = C::vstate_from_type(ctx, v11);
+                                                        let v568 = constructor_rv_vor_vi(
+                                                            ctx, v196, v216, v165, v166,
+                                                        );
+                                                        let v569 =
+                                                            constructor_output_vreg(ctx, v568);
+                                                        // Rule at src/isa/riscv64/lower.isle line 626.
+                                                        return Some(v569);
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                            }
+                            let v45 = C::def_inst(ctx, v38.1);
+                            if let Some(v46) = v45 {
+                                let v47 = &C::inst_data(ctx, v46);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v68,
+                                    arg: v69,
+                                } = v47
+                                {
+                                    if let &Opcode::Splat = v68 {
+                                        let v172 = C::def_inst(ctx, v69);
+                                        if let Some(v173) = v172 {
+                                            let v174 = &C::inst_data(ctx, v173);
+                                            if let &InstructionData::UnaryImm {
+                                                opcode: ref v189,
+                                                imm: v190,
+                                            } = v174
+                                            {
+                                                if let &Opcode::Iconst = v189 {
+                                                    let v191 = C::u64_from_imm64(ctx, v190);
+                                                    let v192 = C::imm5_from_u64(ctx, v191);
+                                                    if let Some(v193) = v192 {
+                                                        let v163 =
+                                                            constructor_put_in_vreg(ctx, v38.0);
+                                                        let v165 = &constructor_unmasked(ctx);
+                                                        let v166 = C::vstate_from_type(ctx, v11);
+                                                        let v566 = constructor_rv_vor_vi(
+                                                            ctx, v163, v193, v165, v166,
+                                                        );
+                                                        let v567 =
+                                                            constructor_output_vreg(ctx, v566);
+                                                        // Rule at src/isa/riscv64/lower.isle line 623.
+                                                        return Some(v567);
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                            }
+                            let v525 = C::ty_vector_not_float(ctx, v11);
+                            if let Some(v526) = v525 {
+                                if let Some(v58) = v57 {
+                                    let v59 = &C::inst_data(ctx, v58);
+                                    if let &InstructionData::Unary {
+                                        opcode: ref v76,
+                                        arg: v77,
+                                    } = v59
+                                    {
+                                        if let &Opcode::Splat = v76 {
+                                            let v196 = constructor_put_in_vreg(ctx, v38.1);
+                                            let v197 = constructor_put_in_xreg(ctx, v77);
+                                            let v165 = &constructor_unmasked(ctx);
+                                            let v166 = C::vstate_from_type(ctx, v11);
+                                            let v564 =
+                                                constructor_rv_vor_vx(ctx, v196, v197, v165, v166);
+                                            let v565 = constructor_output_vreg(ctx, v564);
+                                            // Rule at src/isa/riscv64/lower.isle line 619.
+                                            return Some(v565);
+                                        }
+                                    }
+                                }
+                                if let Some(v46) = v45 {
+                                    let v47 = &C::inst_data(ctx, v46);
+                                    if let &InstructionData::Unary {
+                                        opcode: ref v68,
+                                        arg: v69,
+                                    } = v47
+                                    {
+                                        if let &Opcode::Splat = v68 {
+                                            let v163 = constructor_put_in_vreg(ctx, v38.0);
+                                            let v169 = constructor_put_in_xreg(ctx, v69);
+                                            let v165 = &constructor_unmasked(ctx);
+                                            let v166 = C::vstate_from_type(ctx, v11);
+                                            let v562 =
+                                                constructor_rv_vor_vx(ctx, v163, v169, v165, v166);
+                                            let v563 = constructor_output_vreg(ctx, v562);
+                                            // Rule at src/isa/riscv64/lower.isle line 615.
+                                            return Some(v563);
+                                        }
+                                    }
+                                }
+                            }
+                            let v163 = constructor_put_in_vreg(ctx, v38.0);
+                            let v164 = constructor_put_in_vreg(ctx, v38.1);
+                            let v165 = &constructor_unmasked(ctx);
+                            let v166 = C::vstate_from_type(ctx, v11);
+                            let v560 = constructor_rv_vor_vv(ctx, v163, v164, v165, v166);
+                            let v561 = constructor_output_vreg(ctx, v560);
+                            // Rule at src/isa/riscv64/lower.isle line 612.
+                            return Some(v561);
+                        }
+                        let v486 = C::has_zbb(ctx);
+                        if v486 == true {
+                            if v3 == I128 {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v57 = C::def_inst(ctx, v38.0);
+                                if let Some(v58) = v57 {
+                                    let v59 = &C::inst_data(ctx, v58);
+                                    if let &InstructionData::Unary {
+                                        opcode: ref v76,
+                                        arg: v77,
+                                    } = v59
+                                    {
+                                        if let &Opcode::Bnot = v76 {
+                                            let v506 = C::put_in_regs(ctx, v38.1);
+                                            let v507 = C::value_regs_get(ctx, v506, 0x0);
+                                            let v508 = C::xreg_new(ctx, v507);
+                                            let v509 = C::put_in_regs(ctx, v77);
+                                            let v510 = C::value_regs_get(ctx, v509, 0x0);
+                                            let v511 = C::xreg_new(ctx, v510);
+                                            let v554 = constructor_rv_orn(ctx, v508, v511);
+                                            let v146 = C::put_in_regs(ctx, v38.1);
+                                            let v513 = C::value_regs_get(ctx, v146, 0x1);
+                                            let v514 = C::xreg_new(ctx, v513);
+                                            let v515 = C::put_in_regs(ctx, v77);
+                                            let v516 = C::value_regs_get(ctx, v515, 0x1);
+                                            let v517 = C::xreg_new(ctx, v516);
+                                            let v555 = constructor_rv_orn(ctx, v514, v517);
+                                            let v556 = C::xreg_to_reg(ctx, v554);
+                                            let v557 = C::xreg_to_reg(ctx, v555);
+                                            let v558 = C::value_regs(ctx, v556, v557);
+                                            let v559 = C::output(ctx, v558);
+                                            // Rule at src/isa/riscv64/lower.isle line 606.
+                                            return Some(v559);
+                                        }
+                                    }
+                                }
+                                let v45 = C::def_inst(ctx, v38.1);
+                                if let Some(v46) = v45 {
+                                    let v47 = &C::inst_data(ctx, v46);
+                                    if let &InstructionData::Unary {
+                                        opcode: ref v68,
+                                        arg: v69,
+                                    } = v47
+                                    {
+                                        if let &Opcode::Bnot = v68 {
+                                            let v138 = C::put_in_regs(ctx, v38.0);
+                                            let v140 = C::value_regs_get(ctx, v138, 0x0);
+                                            let v141 = C::xreg_new(ctx, v140);
+                                            let v491 = C::put_in_regs(ctx, v69);
+                                            let v492 = C::value_regs_get(ctx, v491, 0x0);
+                                            let v493 = C::xreg_new(ctx, v492);
+                                            let v548 = constructor_rv_orn(ctx, v141, v493);
+                                            let v495 = C::put_in_regs(ctx, v38.0);
+                                            let v496 = C::value_regs_get(ctx, v495, 0x1);
+                                            let v497 = C::xreg_new(ctx, v496);
+                                            let v498 = C::put_in_regs(ctx, v69);
+                                            let v499 = C::value_regs_get(ctx, v498, 0x1);
+                                            let v500 = C::xreg_new(ctx, v499);
+                                            let v549 = constructor_rv_orn(ctx, v497, v500);
+                                            let v550 = C::xreg_to_reg(ctx, v548);
+                                            let v551 = C::xreg_to_reg(ctx, v549);
+                                            let v552 = C::value_regs(ctx, v550, v551);
+                                            let v553 = C::output(ctx, v552);
+                                            // Rule at src/isa/riscv64/lower.isle line 600.
+                                            return Some(v553);
+                                        }
+                                    }
+                                }
+                            }
+                            let v292 = C::fits_in_64(ctx, v3);
+                            if let Some(v293) = v292 {
+                                let v473 = C::ty_int(ctx, v293);
+                                if let Some(v474) = v473 {
+                                    let v38 = C::unpack_value_array_2(ctx, v37);
+                                    let v57 = C::def_inst(ctx, v38.0);
+                                    if let Some(v58) = v57 {
+                                        let v59 = &C::inst_data(ctx, v58);
+                                        if let &InstructionData::Unary {
+                                            opcode: ref v76,
+                                            arg: v77,
+                                        } = v59
+                                        {
+                                            if let &Opcode::Bnot = v76 {
+                                                let v422 = constructor_put_in_xreg(ctx, v38.1);
+                                                let v197 = constructor_put_in_xreg(ctx, v77);
+                                                let v546 = constructor_rv_orn(ctx, v422, v197);
+                                                let v547 = constructor_output_xreg(ctx, v546);
+                                                // Rule at src/isa/riscv64/lower.isle line 596.
+                                                return Some(v547);
+                                            }
+                                        }
+                                    }
+                                    let v45 = C::def_inst(ctx, v38.1);
+                                    if let Some(v46) = v45 {
+                                        let v47 = &C::inst_data(ctx, v46);
+                                        if let &InstructionData::Unary {
+                                            opcode: ref v68,
+                                            arg: v69,
+                                        } = v47
+                                        {
+                                            if let &Opcode::Bnot = v68 {
+                                                let v41 = constructor_put_in_xreg(ctx, v38.0);
+                                                let v169 = constructor_put_in_xreg(ctx, v69);
+                                                let v544 = constructor_rv_orn(ctx, v41, v169);
+                                                let v545 = constructor_output_xreg(ctx, v544);
+                                                // Rule at src/isa/riscv64/lower.isle line 592.
+                                                return Some(v545);
+                                            }
+                                        }
+                                    }
+                                }
+                            }
+                        }
+                        let v479 = C::ty_scalar_float(ctx, v3);
+                        if let Some(v480) = v479 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v482 = constructor_put_in_freg(ctx, v38.0);
+                            let v483 = constructor_put_in_freg(ctx, v38.1);
+                            let v542 = constructor_lower_float_binary(
+                                ctx,
+                                &AluOPRRR::Or,
+                                v482,
+                                v483,
+                                v480,
+                            );
+                            let v543 = constructor_output_freg(ctx, v542);
+                            // Rule at src/isa/riscv64/lower.isle line 585.
+                            return Some(v543);
+                        }
+                        let v292 = C::fits_in_64(ctx, v3);
+                        if let Some(v293) = v292 {
+                            let v473 = C::ty_int(ctx, v293);
+                            if let Some(v474) = v473 {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v57 = C::def_inst(ctx, v38.0);
+                                if let Some(v58) = v57 {
+                                    let v59 = &C::inst_data(ctx, v58);
+                                    if let &InstructionData::UnaryImm {
+                                        opcode: ref v60,
+                                        imm: v61,
+                                    } = v59
+                                    {
+                                        if let &Opcode::Iconst = v60 {
+                                            let v62 = C::u64_from_imm64(ctx, v61);
+                                            let v63 = C::imm12_from_u64(ctx, v62);
+                                            if let Some(v64) = v63 {
+                                                let v422 = constructor_put_in_xreg(ctx, v38.1);
+                                                let v539 = constructor_rv_ori(ctx, v422, v64);
+                                                let v540 = constructor_output_xreg(ctx, v539);
+                                                // Rule at src/isa/riscv64/lower.isle line 582.
+                                                return Some(v540);
+                                            }
+                                        }
+                                    }
+                                }
+                                let v45 = C::def_inst(ctx, v38.1);
+                                if let Some(v46) = v45 {
+                                    let v47 = &C::inst_data(ctx, v46);
+                                    if let &InstructionData::UnaryImm {
+                                        opcode: ref v48,
+                                        imm: v49,
+                                    } = v47
+                                    {
+                                        if let &Opcode::Iconst = v48 {
+                                            let v50 = C::u64_from_imm64(ctx, v49);
+                                            let v51 = C::imm12_from_u64(ctx, v50);
+                                            if let Some(v52) = v51 {
+                                                let v41 = constructor_put_in_xreg(ctx, v38.0);
+                                                let v537 = constructor_rv_ori(ctx, v41, v52);
+                                                let v538 = constructor_output_xreg(ctx, v537);
+                                                // Rule at src/isa/riscv64/lower.isle line 579.
+                                                return Some(v538);
+                                            }
+                                        }
+                                    }
+                                }
+                            }
+                        }
+                        let v363 = C::ty_int(ctx, v3);
+                        if let Some(v364) = v363 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v138 = C::put_in_regs(ctx, v38.0);
+                            let v316 = C::put_in_regs(ctx, v38.1);
+                            let v535 = constructor_gen_or(ctx, v364, v138, v316);
+                            let v536 = C::output(ctx, v535);
+                            // Rule at src/isa/riscv64/lower.isle line 575.
+                            return Some(v536);
+                        }
+                    }
+                }
+                &Opcode::Bxor => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
+                        if let Some(v11) = v10 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v57 = C::def_inst(ctx, v38.0);
+                            if let Some(v58) = v57 {
+                                let v59 = &C::inst_data(ctx, v58);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v76,
+                                    arg: v77,
+                                } = v59
+                                {
+                                    if let &Opcode::Splat = v76 {
+                                        let v200 = C::def_inst(ctx, v77);
+                                        if let Some(v201) = v200 {
+                                            let v202 = &C::inst_data(ctx, v201);
+                                            if let &InstructionData::UnaryImm {
+                                                opcode: ref v212,
+                                                imm: v213,
+                                            } = v202
+                                            {
+                                                if let &Opcode::Iconst = v212 {
+                                                    let v214 = C::u64_from_imm64(ctx, v213);
+                                                    let v215 = C::imm5_from_u64(ctx, v214);
+                                                    if let Some(v216) = v215 {
+                                                        let v196 =
+                                                            constructor_put_in_vreg(ctx, v38.1);
+                                                        let v165 = &constructor_unmasked(ctx);
+                                                        let v166 = C::vstate_from_type(ctx, v11);
+                                                        let v589 = constructor_rv_vxor_vi(
+                                                            ctx, v196, v216, v165, v166,
+                                                        );
+                                                        let v590 =
+                                                            constructor_output_vreg(ctx, v589);
+                                                        // Rule at src/isa/riscv64/lower.isle line 661.
+                                                        return Some(v590);
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                            }
+                            let v45 = C::def_inst(ctx, v38.1);
+                            if let Some(v46) = v45 {
+                                let v47 = &C::inst_data(ctx, v46);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v68,
+                                    arg: v69,
+                                } = v47
+                                {
+                                    if let &Opcode::Splat = v68 {
+                                        let v172 = C::def_inst(ctx, v69);
+                                        if let Some(v173) = v172 {
+                                            let v174 = &C::inst_data(ctx, v173);
+                                            if let &InstructionData::UnaryImm {
+                                                opcode: ref v189,
+                                                imm: v190,
+                                            } = v174
+                                            {
+                                                if let &Opcode::Iconst = v189 {
+                                                    let v191 = C::u64_from_imm64(ctx, v190);
+                                                    let v192 = C::imm5_from_u64(ctx, v191);
+                                                    if let Some(v193) = v192 {
+                                                        let v163 =
+                                                            constructor_put_in_vreg(ctx, v38.0);
+                                                        let v165 = &constructor_unmasked(ctx);
+                                                        let v166 = C::vstate_from_type(ctx, v11);
+                                                        let v587 = constructor_rv_vxor_vi(
+                                                            ctx, v163, v193, v165, v166,
+                                                        );
+                                                        let v588 =
+                                                            constructor_output_vreg(ctx, v587);
+                                                        // Rule at src/isa/riscv64/lower.isle line 658.
+                                                        return Some(v588);
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                            }
+                            let v525 = C::ty_vector_not_float(ctx, v11);
+                            if let Some(v526) = v525 {
+                                if let Some(v58) = v57 {
+                                    let v59 = &C::inst_data(ctx, v58);
+                                    if let &InstructionData::Unary {
+                                        opcode: ref v76,
+                                        arg: v77,
+                                    } = v59
+                                    {
+                                        if let &Opcode::Splat = v76 {
+                                            let v196 = constructor_put_in_vreg(ctx, v38.1);
+                                            let v197 = constructor_put_in_xreg(ctx, v77);
+                                            let v165 = &constructor_unmasked(ctx);
+                                            let v166 = C::vstate_from_type(ctx, v11);
+                                            let v585 =
+                                                constructor_rv_vxor_vx(ctx, v196, v197, v165, v166);
+                                            let v586 = constructor_output_vreg(ctx, v585);
+                                            // Rule at src/isa/riscv64/lower.isle line 654.
+                                            return Some(v586);
+                                        }
+                                    }
+                                }
+                                if let Some(v46) = v45 {
+                                    let v47 = &C::inst_data(ctx, v46);
+                                    if let &InstructionData::Unary {
+                                        opcode: ref v68,
+                                        arg: v69,
+                                    } = v47
+                                    {
+                                        if let &Opcode::Splat = v68 {
+                                            let v163 = constructor_put_in_vreg(ctx, v38.0);
+                                            let v169 = constructor_put_in_xreg(ctx, v69);
+                                            let v165 = &constructor_unmasked(ctx);
+                                            let v166 = C::vstate_from_type(ctx, v11);
+                                            let v583 =
+                                                constructor_rv_vxor_vx(ctx, v163, v169, v165, v166);
+                                            let v584 = constructor_output_vreg(ctx, v583);
+                                            // Rule at src/isa/riscv64/lower.isle line 650.
+                                            return Some(v584);
+                                        }
+                                    }
+                                }
+                            }
+                            let v163 = constructor_put_in_vreg(ctx, v38.0);
+                            let v164 = constructor_put_in_vreg(ctx, v38.1);
+                            let v165 = &constructor_unmasked(ctx);
+                            let v166 = C::vstate_from_type(ctx, v11);
+                            let v581 = constructor_rv_vxor_vv(ctx, v163, v164, v165, v166);
+                            let v582 = constructor_output_vreg(ctx, v581);
+                            // Rule at src/isa/riscv64/lower.isle line 647.
+                            return Some(v582);
+                        }
+                        let v479 = C::ty_scalar_float(ctx, v3);
+                        if let Some(v480) = v479 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v482 = constructor_put_in_freg(ctx, v38.0);
+                            let v483 = constructor_put_in_freg(ctx, v38.1);
+                            let v579 = constructor_lower_float_binary(
+                                ctx,
+                                &AluOPRRR::Xor,
+                                v482,
+                                v483,
+                                v480,
+                            );
+                            let v580 = constructor_output_freg(ctx, v579);
+                            // Rule at src/isa/riscv64/lower.isle line 644.
+                            return Some(v580);
+                        }
+                        if v3 == I128 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v138 = C::put_in_regs(ctx, v38.0);
+                            let v316 = C::put_in_regs(ctx, v38.1);
+                            let v577 =
+                                constructor_lower_b128_binary(ctx, &AluOPRRR::Xor, v138, v316);
+                            let v578 = C::output(ctx, v577);
+                            // Rule at src/isa/riscv64/lower.isle line 641.
+                            return Some(v578);
+                        }
+                        let v292 = C::fits_in_64(ctx, v3);
+                        if let Some(v293) = v292 {
+                            let v473 = C::ty_int(ctx, v293);
+                            if let Some(v474) = v473 {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v57 = C::def_inst(ctx, v38.0);
+                                if let Some(v58) = v57 {
+                                    let v59 = &C::inst_data(ctx, v58);
+                                    if let &InstructionData::UnaryImm {
+                                        opcode: ref v60,
+                                        imm: v61,
+                                    } = v59
+                                    {
+                                        if let &Opcode::Iconst = v60 {
+                                            let v62 = C::u64_from_imm64(ctx, v61);
+                                            let v63 = C::imm12_from_u64(ctx, v62);
+                                            if let Some(v64) = v63 {
+                                                let v422 = constructor_put_in_xreg(ctx, v38.1);
+                                                let v574 = constructor_rv_xori(ctx, v422, v64);
+                                                let v575 = constructor_output_xreg(ctx, v574);
+                                                // Rule at src/isa/riscv64/lower.isle line 638.
+                                                return Some(v575);
+                                            }
+                                        }
+                                    }
+                                }
+                                let v45 = C::def_inst(ctx, v38.1);
+                                if let Some(v46) = v45 {
+                                    let v47 = &C::inst_data(ctx, v46);
+                                    if let &InstructionData::UnaryImm {
+                                        opcode: ref v48,
+                                        imm: v49,
+                                    } = v47
+                                    {
+                                        if let &Opcode::Iconst = v48 {
+                                            let v50 = C::u64_from_imm64(ctx, v49);
+                                            let v51 = C::imm12_from_u64(ctx, v50);
+                                            if let Some(v52) = v51 {
+                                                let v41 = constructor_put_in_xreg(ctx, v38.0);
+                                                let v572 = constructor_rv_xori(ctx, v41, v52);
+                                                let v573 = constructor_output_xreg(ctx, v572);
+                                                // Rule at src/isa/riscv64/lower.isle line 635.
+                                                return Some(v573);
+                                            }
+                                        }
+                                    }
+                                }
+                                let v41 = constructor_put_in_xreg(ctx, v38.0);
+                                let v42 = constructor_put_in_xreg(ctx, v38.1);
+                                let v570 = constructor_rv_xor(ctx, v41, v42);
+                                let v571 = constructor_output_xreg(ctx, v570);
+                                // Rule at src/isa/riscv64/lower.isle line 631.
+                                return Some(v571);
+                            }
+                        }
+                    }
+                }
+                &Opcode::Rotl => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        if v3 == I128 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v138 = C::put_in_regs(ctx, v38.0);
+                            let v316 = C::put_in_regs(ctx, v38.1);
+                            let v932 = constructor_lower_i128_rotl(ctx, v138, v316);
+                            let v933 = C::output(ctx, v932);
+                            // Rule at src/isa/riscv64/lower.isle line 981.
+                            return Some(v933);
+                        }
+                        let v292 = C::fits_in_64(ctx, v3);
+                        if let Some(v293) = v292 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v41 = constructor_put_in_xreg(ctx, v38.0);
+                            let v929 = constructor_zext(ctx, v41, v293, I64);
+                            let v839 = C::put_in_regs(ctx, v38.1);
+                            let v840 = C::value_regs_get(ctx, v839, 0x0);
+                            let v841 = C::xreg_new(ctx, v840);
+                            let v930 = constructor_lower_rotl(ctx, v293, v929, v841);
+                            let v931 = constructor_output_xreg(ctx, v930);
+                            // Rule at src/isa/riscv64/lower.isle line 978.
+                            return Some(v931);
+                        }
+                    }
+                }
+                &Opcode::Rotr => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        if v3 == I128 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v138 = C::put_in_regs(ctx, v38.0);
+                            let v316 = C::put_in_regs(ctx, v38.1);
+                            let v936 = constructor_lower_i128_rotr(ctx, v138, v316);
+                            let v937 = C::output(ctx, v936);
+                            // Rule at src/isa/riscv64/lower.isle line 988.
+                            return Some(v937);
+                        }
+                        let v292 = C::fits_in_64(ctx, v3);
+                        if let Some(v293) = v292 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v41 = constructor_put_in_xreg(ctx, v38.0);
+                            let v929 = constructor_zext(ctx, v41, v293, I64);
+                            let v839 = C::put_in_regs(ctx, v38.1);
+                            let v840 = C::value_regs_get(ctx, v839, 0x0);
+                            let v841 = C::xreg_new(ctx, v840);
+                            let v934 = constructor_lower_rotr(ctx, v293, v929, v841);
+                            let v935 = constructor_output_xreg(ctx, v934);
+                            // Rule at src/isa/riscv64/lower.isle line 985.
+                            return Some(v935);
+                        }
+                    }
+                }
+                &Opcode::Ishl => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
+                        if let Some(v11) = v10 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v764 = C::maybe_uextend(ctx, v38.1);
+                            if let Some(v765) = v764 {
+                                let v766 = C::def_inst(ctx, v765);
+                                if let Some(v767) = v766 {
+                                    let v768 = &C::inst_data(ctx, v767);
+                                    if let &InstructionData::UnaryImm {
+                                        opcode: ref v769,
+                                        imm: v770,
+                                    } = v768
+                                    {
+                                        if let &Opcode::Iconst = v769 {
+                                            let v771 = C::u64_from_imm64(ctx, v770);
+                                            let v829 = C::uimm5_from_u64(ctx, v771);
+                                            if let Some(v830) = v829 {
+                                                let v163 = constructor_put_in_vreg(ctx, v38.0);
+                                                let v165 = &constructor_unmasked(ctx);
+                                                let v166 = C::vstate_from_type(ctx, v11);
+                                                let v831 = constructor_rv_vsll_vi(
+                                                    ctx, v163, v830, v165, v166,
+                                                );
+                                                let v832 = constructor_output_vreg(ctx, v831);
+                                                // Rule at src/isa/riscv64/lower.isle line 860.
+                                                return Some(v832);
+                                            }
+                                        }
+                                    }
+                                }
+                            }
+                            let v163 = constructor_put_in_vreg(ctx, v38.0);
+                            let v316 = C::put_in_regs(ctx, v38.1);
+                            let v753 = C::value_regs_get(ctx, v316, 0x0);
+                            let v754 = C::xreg_new(ctx, v753);
+                            let v165 = &constructor_unmasked(ctx);
+                            let v166 = C::vstate_from_type(ctx, v11);
+                            let v827 = constructor_rv_vsll_vx(ctx, v163, v754, v165, v166);
+                            let v828 = constructor_output_vreg(ctx, v827);
+                            // Rule at src/isa/riscv64/lower.isle line 857.
+                            return Some(v828);
+                        }
+                        match v3 {
+                            I64 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v764 = C::maybe_uextend(ctx, v38.1);
+                                if let Some(v765) = v764 {
+                                    let v766 = C::def_inst(ctx, v765);
+                                    if let Some(v767) = v766 {
+                                        let v768 = &C::inst_data(ctx, v767);
+                                        if let &InstructionData::UnaryImm {
+                                            opcode: ref v769,
+                                            imm: v770,
+                                        } = v768
+                                        {
+                                            if let &Opcode::Iconst = v769 {
+                                                let v771 = C::u64_from_imm64(ctx, v770);
+                                                let v772 = C::imm12_from_u64(ctx, v771);
+                                                if let Some(v773) = v772 {
+                                                    let v57 = C::def_inst(ctx, v38.0);
+                                                    if let Some(v58) = v57 {
+                                                        let v59 = &C::inst_data(ctx, v58);
+                                                        if let &InstructionData::Unary {
+                                                            opcode: ref v76,
+                                                            arg: v77,
+                                                        } = v59
+                                                        {
+                                                            if let &Opcode::Uextend = v76 {
+                                                                let v71 = C::has_zba(ctx);
+                                                                if v71 == true {
+                                                                    let v78 =
+                                                                        C::value_type(ctx, v77);
+                                                                    if v78 == I32 {
+                                                                        let v79 =
+                                                                            constructor_put_in_xreg(
+                                                                                ctx, v77,
+                                                                            );
+                                                                        let v782 =
+                                                                            constructor_rv_slliuw(
+                                                                                ctx, v79, v773,
+                                                                            );
+                                                                        let v783 =
+                                                                            constructor_output_xreg(
+                                                                                ctx, v782,
+                                                                            );
+                                                                        // Rule at src/isa/riscv64/lower.isle line 830.
+                                                                        return Some(v783);
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                    let v41 = constructor_put_in_xreg(ctx, v38.0);
+                                                    let v778 = constructor_shift_mask(ctx, v3);
+                                                    let v779 = C::imm12_and(ctx, v773, v778);
+                                                    let v780 = constructor_rv_slli(ctx, v41, v779);
+                                                    let v781 = constructor_output_xreg(ctx, v780);
+                                                    // Rule at src/isa/riscv64/lower.isle line 826.
+                                                    return Some(v781);
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                            }
+                            I128 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v506 = C::put_in_regs(ctx, v38.1);
+                                let v507 = C::value_regs_get(ctx, v506, 0x0);
+                                let v508 = C::xreg_new(ctx, v507);
+                                let v785 = C::gen_shamt(ctx, I128, v508);
+                                let v786 = C::value_regs_get(ctx, v785, 0x0);
+                                let v787 = C::xreg_new(ctx, v786);
+                                let v788 = C::value_regs_get(ctx, v785, 0x1);
+                                let v789 = C::xreg_new(ctx, v788);
+                                let v790 = C::put_in_regs(ctx, v38.0);
+                                let v791 = C::value_regs_get(ctx, v790, 0x0);
+                                let v792 = C::xreg_new(ctx, v791);
+                                let v793 = constructor_rv_sll(ctx, v792, v787);
+                                let v794 = C::put_in_regs(ctx, v38.0);
+                                let v795 = C::value_regs_get(ctx, v794, 0x0);
+                                let v796 = C::xreg_new(ctx, v795);
+                                let v797 = constructor_rv_srl(ctx, v796, v789);
+                                let v799 = C::zero_reg(ctx);
+                                let v800 = C::xreg_new(ctx, v799);
+                                let v801 = C::zero_reg(ctx);
+                                let v802 = C::xreg_to_reg(ctx, v797);
+                                let v803 =
+                                    C::gen_select_reg(ctx, &IntCC::Equal, v787, v800, v801, v802);
+                                let v804 = C::xreg_new(ctx, v803);
+                                let v805 = C::put_in_regs(ctx, v38.0);
+                                let v806 = C::value_regs_get(ctx, v805, 0x1);
+                                let v807 = C::xreg_new(ctx, v806);
+                                let v808 = constructor_rv_sll(ctx, v807, v787);
+                                let v809 = constructor_rv_or(ctx, v804, v808);
+                                let v811 = C::load_u64_constant(ctx, 0x40);
+                                let v812 = C::xreg_new(ctx, v811);
+                                let v813 = C::put_in_regs(ctx, v38.1);
+                                let v814 = C::value_regs_get(ctx, v813, 0x0);
+                                let v815 = C::xreg_new(ctx, v814);
+                                let v817 = C::imm12_const(ctx, 0x7F);
+                                let v818 = constructor_rv_andi(ctx, v815, v817);
+                                let v820 = C::zero_reg(ctx);
+                                let v821 = C::xreg_to_reg(ctx, v793);
+                                let v822 = C::gen_select_reg(
+                                    ctx,
+                                    &IntCC::UnsignedGreaterThanOrEqual,
+                                    v818,
+                                    v812,
+                                    v820,
+                                    v821,
+                                );
+                                let v823 = C::xreg_to_reg(ctx, v809);
+                                let v824 = C::gen_select_reg(
+                                    ctx,
+                                    &IntCC::UnsignedGreaterThanOrEqual,
+                                    v818,
+                                    v812,
+                                    v821,
+                                    v823,
+                                );
+                                let v825 = C::value_regs(ctx, v822, v824);
+                                let v826 = C::output(ctx, v825);
+                                // Rule at src/isa/riscv64/lower.isle line 835.
+                                return Some(v826);
+                            }
+                            _ => {}
+                        }
+                        let v762 = C::int_fits_in_32(ctx, v3);
+                        if let Some(v763) = v762 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v764 = C::maybe_uextend(ctx, v38.1);
+                            if let Some(v765) = v764 {
+                                let v766 = C::def_inst(ctx, v765);
+                                if let Some(v767) = v766 {
+                                    let v768 = &C::inst_data(ctx, v767);
+                                    if let &InstructionData::UnaryImm {
+                                        opcode: ref v769,
+                                        imm: v770,
+                                    } = v768
+                                    {
+                                        if let &Opcode::Iconst = v769 {
+                                            let v771 = C::u64_from_imm64(ctx, v770);
+                                            let v772 = C::imm12_from_u64(ctx, v771);
+                                            if let Some(v773) = v772 {
+                                                let v41 = constructor_put_in_xreg(ctx, v38.0);
+                                                let v774 = constructor_shift_mask(ctx, v763);
+                                                let v775 = C::imm12_and(ctx, v773, v774);
+                                                let v776 = constructor_rv_slliw(ctx, v41, v775);
+                                                let v777 = constructor_output_xreg(ctx, v776);
+                                                // Rule at src/isa/riscv64/lower.isle line 821.
+                                                return Some(v777);
+                                            }
+                                        }
+                                    }
+                                }
+                            }
+                        }
+                        match v3 {
+                            I32 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v41 = constructor_put_in_xreg(ctx, v38.0);
+                                let v316 = C::put_in_regs(ctx, v38.1);
+                                let v753 = C::value_regs_get(ctx, v316, 0x0);
+                                let v754 = C::xreg_new(ctx, v753);
+                                let v758 = constructor_rv_sllw(ctx, v41, v754);
+                                let v759 = constructor_output_xreg(ctx, v758);
+                                // Rule at src/isa/riscv64/lower.isle line 813.
+                                return Some(v759);
+                            }
+                            I64 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v41 = constructor_put_in_xreg(ctx, v38.0);
+                                let v316 = C::put_in_regs(ctx, v38.1);
+                                let v753 = C::value_regs_get(ctx, v316, 0x0);
+                                let v754 = C::xreg_new(ctx, v753);
+                                let v760 = constructor_rv_sll(ctx, v41, v754);
+                                let v761 = constructor_output_xreg(ctx, v760);
+                                // Rule at src/isa/riscv64/lower.isle line 817.
+                                return Some(v761);
+                            }
+                            _ => {}
+                        }
+                        let v363 = C::ty_int(ctx, v3);
+                        if let Some(v364) = v363 {
+                            let v748 = C::ty_8_or_16(ctx, v364);
+                            if let Some(v749) = v748 {
+                                let v750 = constructor_shift_mask(ctx, v749);
+                                let v751 = constructor_u64_to_imm12(ctx, v750);
+                                if let Some(v752) = v751 {
+                                    let v38 = C::unpack_value_array_2(ctx, v37);
+                                    let v41 = constructor_put_in_xreg(ctx, v38.0);
+                                    let v316 = C::put_in_regs(ctx, v38.1);
+                                    let v753 = C::value_regs_get(ctx, v316, 0x0);
+                                    let v754 = C::xreg_new(ctx, v753);
+                                    let v755 = constructor_rv_andi(ctx, v754, v752);
+                                    let v756 = constructor_rv_sllw(ctx, v41, v755);
+                                    let v757 = constructor_output_xreg(ctx, v756);
+                                    // Rule at src/isa/riscv64/lower.isle line 808.
+                                    return Some(v757);
+                                }
+                            }
+                        }
+                    }
+                }
+                &Opcode::Ushr => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
+                        if let Some(v11) = v10 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v764 = C::maybe_uextend(ctx, v38.1);
+                            if let Some(v765) = v764 {
+                                let v766 = C::def_inst(ctx, v765);
+                                if let Some(v767) = v766 {
+                                    let v768 = &C::inst_data(ctx, v767);
+                                    if let &InstructionData::UnaryImm {
+                                        opcode: ref v769,
+                                        imm: v770,
+                                    } = v768
+                                    {
+                                        if let &Opcode::Iconst = v769 {
+                                            let v771 = C::u64_from_imm64(ctx, v770);
+                                            let v829 = C::uimm5_from_u64(ctx, v771);
+                                            if let Some(v830) = v829 {
+                                                let v163 = constructor_put_in_vreg(ctx, v38.0);
+                                                let v165 = &constructor_unmasked(ctx);
+                                                let v166 = C::vstate_from_type(ctx, v11);
+                                                let v885 = constructor_rv_vsrl_vi(
+                                                    ctx, v163, v830, v165, v166,
+                                                );
+                                                let v886 = constructor_output_vreg(ctx, v885);
+                                                // Rule at src/isa/riscv64/lower.isle line 914.
+                                                return Some(v886);
+                                            }
+                                        }
+                                    }
+                                }
+                            }
+                            let v163 = constructor_put_in_vreg(ctx, v38.0);
+                            let v316 = C::put_in_regs(ctx, v38.1);
+                            let v753 = C::value_regs_get(ctx, v316, 0x0);
+                            let v754 = C::xreg_new(ctx, v753);
+                            let v165 = &constructor_unmasked(ctx);
+                            let v166 = C::vstate_from_type(ctx, v11);
+                            let v883 = constructor_rv_vsrl_vx(ctx, v163, v754, v165, v166);
+                            let v884 = constructor_output_vreg(ctx, v883);
+                            // Rule at src/isa/riscv64/lower.isle line 911.
+                            return Some(v884);
+                        }
+                        match v3 {
+                            I32 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v764 = C::maybe_uextend(ctx, v38.1);
+                                if let Some(v765) = v764 {
+                                    let v766 = C::def_inst(ctx, v765);
+                                    if let Some(v767) = v766 {
+                                        let v768 = &C::inst_data(ctx, v767);
+                                        if let &InstructionData::UnaryImm {
+                                            opcode: ref v769,
+                                            imm: v770,
+                                        } = v768
+                                        {
+                                            if let &Opcode::Iconst = v769 {
+                                                let v771 = C::u64_from_imm64(ctx, v770);
+                                                let v772 = C::imm12_from_u64(ctx, v771);
+                                                if let Some(v773) = v772 {
+                                                    let v41 = constructor_put_in_xreg(ctx, v38.0);
+                                                    let v852 = constructor_rv_srliw(ctx, v41, v773);
+                                                    let v853 = constructor_output_xreg(ctx, v852);
+                                                    // Rule at src/isa/riscv64/lower.isle line 883.
+                                                    return Some(v853);
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                            }
+                            I64 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v764 = C::maybe_uextend(ctx, v38.1);
+                                if let Some(v765) = v764 {
+                                    let v766 = C::def_inst(ctx, v765);
+                                    if let Some(v767) = v766 {
+                                        let v768 = &C::inst_data(ctx, v767);
+                                        if let &InstructionData::UnaryImm {
+                                            opcode: ref v769,
+                                            imm: v770,
+                                        } = v768
+                                        {
+                                            if let &Opcode::Iconst = v769 {
+                                                let v771 = C::u64_from_imm64(ctx, v770);
+                                                let v772 = C::imm12_from_u64(ctx, v771);
+                                                if let Some(v773) = v772 {
+                                                    let v41 = constructor_put_in_xreg(ctx, v38.0);
+                                                    let v854 = constructor_rv_srli(ctx, v41, v773);
+                                                    let v855 = constructor_output_xreg(ctx, v854);
+                                                    // Rule at src/isa/riscv64/lower.isle line 886.
+                                                    return Some(v855);
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                            }
+                            I128 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v506 = C::put_in_regs(ctx, v38.1);
+                                let v507 = C::value_regs_get(ctx, v506, 0x0);
+                                let v508 = C::xreg_new(ctx, v507);
+                                let v785 = C::gen_shamt(ctx, I128, v508);
+                                let v786 = C::value_regs_get(ctx, v785, 0x0);
+                                let v787 = C::xreg_new(ctx, v786);
+                                let v788 = C::value_regs_get(ctx, v785, 0x1);
+                                let v789 = C::xreg_new(ctx, v788);
+                                let v790 = C::put_in_regs(ctx, v38.0);
+                                let v856 = C::value_regs_get(ctx, v790, 0x1);
+                                let v857 = C::xreg_new(ctx, v856);
+                                let v858 = constructor_rv_sll(ctx, v857, v789);
+                                let v859 = C::zero_reg(ctx);
+                                let v860 = C::xreg_new(ctx, v859);
+                                let v861 = C::zero_reg(ctx);
+                                let v862 = C::xreg_to_reg(ctx, v858);
+                                let v863 =
+                                    C::gen_select_reg(ctx, &IntCC::Equal, v787, v860, v861, v862);
+                                let v864 = C::xreg_new(ctx, v863);
+                                let v865 = C::put_in_regs(ctx, v38.0);
+                                let v866 = C::value_regs_get(ctx, v865, 0x0);
+                                let v867 = C::xreg_new(ctx, v866);
+                                let v868 = constructor_rv_srl(ctx, v867, v787);
+                                let v869 = constructor_rv_or(ctx, v864, v868);
+                                let v870 = C::load_u64_constant(ctx, 0x40);
+                                let v871 = C::xreg_new(ctx, v870);
+                                let v872 = C::put_in_regs(ctx, v38.0);
+                                let v873 = C::value_regs_get(ctx, v872, 0x1);
+                                let v874 = C::xreg_new(ctx, v873);
+                                let v875 = constructor_rv_srl(ctx, v874, v787);
+                                let v813 = C::put_in_regs(ctx, v38.1);
+                                let v814 = C::value_regs_get(ctx, v813, 0x0);
+                                let v815 = C::xreg_new(ctx, v814);
+                                let v817 = C::imm12_const(ctx, 0x7F);
+                                let v818 = constructor_rv_andi(ctx, v815, v817);
+                                let v876 = C::xreg_to_reg(ctx, v875);
+                                let v877 = C::xreg_to_reg(ctx, v869);
+                                let v878 = C::gen_select_reg(
+                                    ctx,
+                                    &IntCC::UnsignedGreaterThanOrEqual,
+                                    v818,
+                                    v871,
+                                    v876,
+                                    v877,
+                                );
+                                let v879 = C::zero_reg(ctx);
+                                let v880 = C::gen_select_reg(
+                                    ctx,
+                                    &IntCC::UnsignedGreaterThanOrEqual,
+                                    v818,
+                                    v871,
+                                    v879,
+                                    v876,
+                                );
+                                let v881 = C::value_regs(ctx, v878, v880);
+                                let v882 = C::output(ctx, v881);
+                                // Rule at src/isa/riscv64/lower.isle line 889.
+                                return Some(v882);
+                            }
+                            _ => {}
+                        }
+                        let v363 = C::ty_int(ctx, v3);
+                        if let Some(v364) = v363 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v764 = C::maybe_uextend(ctx, v38.1);
+                            if let Some(v765) = v764 {
+                                let v766 = C::def_inst(ctx, v765);
+                                if let Some(v767) = v766 {
+                                    let v768 = &C::inst_data(ctx, v767);
+                                    if let &InstructionData::UnaryImm {
+                                        opcode: ref v769,
+                                        imm: v770,
+                                    } = v768
+                                    {
+                                        if let &Opcode::Iconst = v769 {
+                                            let v771 = C::u64_from_imm64(ctx, v770);
+                                            let v772 = C::imm12_from_u64(ctx, v771);
+                                            if let Some(v773) = v772 {
+                                                let v833 = C::fits_in_16(ctx, v364);
+                                                if let Some(v834) = v833 {
+                                                    let v41 = constructor_put_in_xreg(ctx, v38.0);
+                                                    let v838 =
+                                                        constructor_zext(ctx, v41, v834, I64);
+                                                    let v835 = constructor_shift_mask(ctx, v834);
+                                                    let v849 = C::imm12_and(ctx, v773, v835);
+                                                    let v850 =
+                                                        constructor_rv_srliw(ctx, v838, v849);
+                                                    let v851 = constructor_output_xreg(ctx, v850);
+                                                    // Rule at src/isa/riscv64/lower.isle line 880.
+                                                    return Some(v851);
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                            }
+                        }
+                        match v3 {
+                            I32 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v41 = constructor_put_in_xreg(ctx, v38.0);
+                                let v316 = C::put_in_regs(ctx, v38.1);
+                                let v753 = C::value_regs_get(ctx, v316, 0x0);
+                                let v754 = C::xreg_new(ctx, v753);
+                                let v845 = constructor_rv_srlw(ctx, v41, v754);
+                                let v846 = constructor_output_xreg(ctx, v845);
+                                // Rule at src/isa/riscv64/lower.isle line 872.
+                                return Some(v846);
+                            }
+                            I64 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v41 = constructor_put_in_xreg(ctx, v38.0);
+                                let v316 = C::put_in_regs(ctx, v38.1);
+                                let v753 = C::value_regs_get(ctx, v316, 0x0);
+                                let v754 = C::xreg_new(ctx, v753);
+                                let v847 = constructor_rv_srl(ctx, v41, v754);
+                                let v848 = constructor_output_xreg(ctx, v847);
+                                // Rule at src/isa/riscv64/lower.isle line 876.
+                                return Some(v848);
+                            }
+                            _ => {}
+                        }
+                        if let Some(v364) = v363 {
+                            let v833 = C::fits_in_16(ctx, v364);
+                            if let Some(v834) = v833 {
+                                let v835 = constructor_shift_mask(ctx, v834);
+                                let v836 = constructor_u64_to_imm12(ctx, v835);
+                                if let Some(v837) = v836 {
+                                    let v38 = C::unpack_value_array_2(ctx, v37);
+                                    let v41 = constructor_put_in_xreg(ctx, v38.0);
+                                    let v838 = constructor_zext(ctx, v41, v834, I64);
+                                    let v839 = C::put_in_regs(ctx, v38.1);
+                                    let v840 = C::value_regs_get(ctx, v839, 0x0);
+                                    let v841 = C::xreg_new(ctx, v840);
+                                    let v842 = constructor_rv_andi(ctx, v841, v837);
+                                    let v843 = constructor_rv_srlw(ctx, v838, v842);
+                                    let v844 = constructor_output_xreg(ctx, v843);
+                                    // Rule at src/isa/riscv64/lower.isle line 867.
+                                    return Some(v844);
+                                }
+                            }
+                        }
+                    }
+                }
+                &Opcode::Sshr => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
+                        if let Some(v11) = v10 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v764 = C::maybe_uextend(ctx, v38.1);
+                            if let Some(v765) = v764 {
+                                let v766 = C::def_inst(ctx, v765);
+                                if let Some(v767) = v766 {
+                                    let v768 = &C::inst_data(ctx, v767);
+                                    if let &InstructionData::UnaryImm {
+                                        opcode: ref v769,
+                                        imm: v770,
+                                    } = v768
+                                    {
+                                        if let &Opcode::Iconst = v769 {
+                                            let v771 = C::u64_from_imm64(ctx, v770);
+                                            let v829 = C::uimm5_from_u64(ctx, v771);
+                                            if let Some(v830) = v829 {
+                                                let v163 = constructor_put_in_vreg(ctx, v38.0);
+                                                let v165 = &constructor_unmasked(ctx);
+                                                let v166 = C::vstate_from_type(ctx, v11);
+                                                let v927 = constructor_rv_vsra_vi(
+                                                    ctx, v163, v830, v165, v166,
+                                                );
+                                                let v928 = constructor_output_vreg(ctx, v927);
+                                                // Rule at src/isa/riscv64/lower.isle line 973.
+                                                return Some(v928);
+                                            }
+                                        }
+                                    }
+                                }
+                            }
+                            let v163 = constructor_put_in_vreg(ctx, v38.0);
+                            let v316 = C::put_in_regs(ctx, v38.1);
+                            let v753 = C::value_regs_get(ctx, v316, 0x0);
+                            let v754 = C::xreg_new(ctx, v753);
+                            let v165 = &constructor_unmasked(ctx);
+                            let v166 = C::vstate_from_type(ctx, v11);
+                            let v925 = constructor_rv_vsra_vx(ctx, v163, v754, v165, v166);
+                            let v926 = constructor_output_vreg(ctx, v925);
+                            // Rule at src/isa/riscv64/lower.isle line 970.
+                            return Some(v926);
+                        }
+                        match v3 {
+                            I32 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v764 = C::maybe_uextend(ctx, v38.1);
+                                if let Some(v765) = v764 {
+                                    let v766 = C::def_inst(ctx, v765);
+                                    if let Some(v767) = v766 {
+                                        let v768 = &C::inst_data(ctx, v767);
+                                        if let &InstructionData::UnaryImm {
+                                            opcode: ref v769,
+                                            imm: v770,
+                                        } = v768
+                                        {
+                                            if let &Opcode::Iconst = v769 {
+                                                let v771 = C::u64_from_imm64(ctx, v770);
+                                                let v772 = C::imm12_from_u64(ctx, v771);
+                                                if let Some(v773) = v772 {
+                                                    let v41 = constructor_put_in_xreg(ctx, v38.0);
+                                                    let v896 = constructor_rv_sraiw(ctx, v41, v773);
+                                                    let v897 = constructor_output_xreg(ctx, v896);
+                                                    // Rule at src/isa/riscv64/lower.isle line 937.
+                                                    return Some(v897);
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                            }
+                            I64 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v764 = C::maybe_uextend(ctx, v38.1);
+                                if let Some(v765) = v764 {
+                                    let v766 = C::def_inst(ctx, v765);
+                                    if let Some(v767) = v766 {
+                                        let v768 = &C::inst_data(ctx, v767);
+                                        if let &InstructionData::UnaryImm {
+                                            opcode: ref v769,
+                                            imm: v770,
+                                        } = v768
+                                        {
+                                            if let &Opcode::Iconst = v769 {
+                                                let v771 = C::u64_from_imm64(ctx, v770);
+                                                let v772 = C::imm12_from_u64(ctx, v771);
+                                                if let Some(v773) = v772 {
+                                                    let v41 = constructor_put_in_xreg(ctx, v38.0);
+                                                    let v898 = constructor_rv_srai(ctx, v41, v773);
+                                                    let v899 = constructor_output_xreg(ctx, v898);
+                                                    // Rule at src/isa/riscv64/lower.isle line 940.
+                                                    return Some(v899);
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                            }
+                            I128 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v506 = C::put_in_regs(ctx, v38.1);
+                                let v507 = C::value_regs_get(ctx, v506, 0x0);
+                                let v508 = C::xreg_new(ctx, v507);
+                                let v785 = C::gen_shamt(ctx, I128, v508);
+                                let v786 = C::value_regs_get(ctx, v785, 0x0);
+                                let v787 = C::xreg_new(ctx, v786);
+                                let v788 = C::value_regs_get(ctx, v785, 0x1);
+                                let v789 = C::xreg_new(ctx, v788);
+                                let v790 = C::put_in_regs(ctx, v38.0);
+                                let v856 = C::value_regs_get(ctx, v790, 0x1);
+                                let v857 = C::xreg_new(ctx, v856);
+                                let v858 = constructor_rv_sll(ctx, v857, v789);
+                                let v859 = C::zero_reg(ctx);
+                                let v860 = C::xreg_new(ctx, v859);
+                                let v861 = C::zero_reg(ctx);
+                                let v862 = C::xreg_to_reg(ctx, v858);
+                                let v863 =
+                                    C::gen_select_reg(ctx, &IntCC::Equal, v787, v860, v861, v862);
+                                let v864 = C::xreg_new(ctx, v863);
+                                let v865 = C::put_in_regs(ctx, v38.0);
+                                let v866 = C::value_regs_get(ctx, v865, 0x0);
+                                let v867 = C::xreg_new(ctx, v866);
+                                let v868 = constructor_rv_srl(ctx, v867, v787);
+                                let v869 = constructor_rv_or(ctx, v864, v868);
+                                let v870 = C::load_u64_constant(ctx, 0x40);
+                                let v871 = C::xreg_new(ctx, v870);
+                                let v872 = C::put_in_regs(ctx, v38.0);
+                                let v873 = C::value_regs_get(ctx, v872, 0x1);
+                                let v874 = C::xreg_new(ctx, v873);
+                                let v900 = constructor_rv_sra(ctx, v874, v787);
+                                let v902 = constructor_load_imm12(ctx, -0x1);
+                                let v903 = C::xreg_new(ctx, v902);
+                                let v905 = C::put_in_regs(ctx, v38.0);
+                                let v906 = C::value_regs_get(ctx, v905, 0x1);
+                                let v907 = C::xreg_new(ctx, v906);
+                                let v879 = C::zero_reg(ctx);
+                                let v908 = C::xreg_new(ctx, v879);
+                                let v910 = C::zero_reg(ctx);
+                                let v909 = C::xreg_to_reg(ctx, v903);
+                                let v911 = C::gen_select_reg(
+                                    ctx,
+                                    &IntCC::SignedLessThan,
+                                    v907,
+                                    v908,
+                                    v909,
+                                    v910,
+                                );
+                                let v912 = C::xreg_new(ctx, v911);
+                                let v913 = C::load_u64_constant(ctx, 0x40);
+                                let v914 = C::xreg_new(ctx, v913);
+                                let v915 = C::put_in_regs(ctx, v38.1);
+                                let v916 = C::value_regs_get(ctx, v915, 0x0);
+                                let v917 = C::xreg_new(ctx, v916);
+                                let v817 = C::imm12_const(ctx, 0x7F);
+                                let v918 = constructor_rv_andi(ctx, v917, v817);
+                                let v919 = C::xreg_to_reg(ctx, v900);
+                                let v877 = C::xreg_to_reg(ctx, v869);
+                                let v920 = C::gen_select_reg(
+                                    ctx,
+                                    &IntCC::UnsignedGreaterThanOrEqual,
+                                    v918,
+                                    v914,
+                                    v919,
+                                    v877,
+                                );
+                                let v921 = C::xreg_to_reg(ctx, v912);
+                                let v922 = C::gen_select_reg(
+                                    ctx,
+                                    &IntCC::UnsignedGreaterThanOrEqual,
+                                    v918,
+                                    v914,
+                                    v921,
+                                    v919,
+                                );
+                                let v923 = C::value_regs(ctx, v920, v922);
+                                let v924 = C::output(ctx, v923);
+                                // Rule at src/isa/riscv64/lower.isle line 943.
+                                return Some(v924);
+                            }
+                            _ => {}
+                        }
+                        let v363 = C::ty_int(ctx, v3);
+                        if let Some(v364) = v363 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v764 = C::maybe_uextend(ctx, v38.1);
+                            if let Some(v765) = v764 {
+                                let v766 = C::def_inst(ctx, v765);
+                                if let Some(v767) = v766 {
+                                    let v768 = &C::inst_data(ctx, v767);
+                                    if let &InstructionData::UnaryImm {
+                                        opcode: ref v769,
+                                        imm: v770,
+                                    } = v768
+                                    {
+                                        if let &Opcode::Iconst = v769 {
+                                            let v771 = C::u64_from_imm64(ctx, v770);
+                                            let v772 = C::imm12_from_u64(ctx, v771);
+                                            if let Some(v773) = v772 {
+                                                let v833 = C::fits_in_16(ctx, v364);
+                                                if let Some(v834) = v833 {
+                                                    let v41 = constructor_put_in_xreg(ctx, v38.0);
+                                                    let v887 =
+                                                        constructor_sext(ctx, v41, v834, I64);
+                                                    let v835 = constructor_shift_mask(ctx, v834);
+                                                    let v849 = C::imm12_and(ctx, v773, v835);
+                                                    let v894 =
+                                                        constructor_rv_sraiw(ctx, v887, v849);
+                                                    let v895 = constructor_output_xreg(ctx, v894);
+                                                    // Rule at src/isa/riscv64/lower.isle line 934.
+                                                    return Some(v895);
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                            }
+                        }
+                        match v3 {
+                            I32 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v41 = constructor_put_in_xreg(ctx, v38.0);
+                                let v316 = C::put_in_regs(ctx, v38.1);
+                                let v753 = C::value_regs_get(ctx, v316, 0x0);
+                                let v754 = C::xreg_new(ctx, v753);
+                                let v890 = constructor_rv_sraw(ctx, v41, v754);
+                                let v891 = constructor_output_xreg(ctx, v890);
+                                // Rule at src/isa/riscv64/lower.isle line 926.
+                                return Some(v891);
+                            }
+                            I64 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v41 = constructor_put_in_xreg(ctx, v38.0);
+                                let v316 = C::put_in_regs(ctx, v38.1);
+                                let v753 = C::value_regs_get(ctx, v316, 0x0);
+                                let v754 = C::xreg_new(ctx, v753);
+                                let v892 = constructor_rv_sra(ctx, v41, v754);
+                                let v893 = constructor_output_xreg(ctx, v892);
+                                // Rule at src/isa/riscv64/lower.isle line 930.
+                                return Some(v893);
+                            }
+                            _ => {}
+                        }
+                        if let Some(v364) = v363 {
+                            let v833 = C::fits_in_16(ctx, v364);
+                            if let Some(v834) = v833 {
+                                let v835 = constructor_shift_mask(ctx, v834);
+                                let v836 = constructor_u64_to_imm12(ctx, v835);
+                                if let Some(v837) = v836 {
+                                    let v38 = C::unpack_value_array_2(ctx, v37);
+                                    let v41 = constructor_put_in_xreg(ctx, v38.0);
+                                    let v887 = constructor_sext(ctx, v41, v834, I64);
+                                    let v839 = C::put_in_regs(ctx, v38.1);
+                                    let v840 = C::value_regs_get(ctx, v839, 0x0);
+                                    let v841 = C::xreg_new(ctx, v840);
+                                    let v842 = constructor_rv_andi(ctx, v841, v837);
+                                    let v888 = constructor_rv_sraw(ctx, v887, v842);
+                                    let v889 = constructor_output_xreg(ctx, v888);
+                                    // Rule at src/isa/riscv64/lower.isle line 921.
+                                    return Some(v889);
+                                }
+                            }
+                        }
+                    }
+                }
+                &Opcode::Fadd => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
+                        if let Some(v11) = v10 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v57 = C::def_inst(ctx, v38.0);
+                            if let Some(v58) = v57 {
+                                let v59 = &C::inst_data(ctx, v58);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v76,
+                                    arg: v77,
+                                } = v59
+                                {
+                                    if let &Opcode::Splat = v76 {
+                                        let v196 = constructor_put_in_vreg(ctx, v38.1);
+                                        let v1063 = constructor_put_in_freg(ctx, v77);
+                                        let v165 = &constructor_unmasked(ctx);
+                                        let v166 = C::vstate_from_type(ctx, v11);
+                                        let v1064 =
+                                            constructor_rv_vfadd_vf(ctx, v196, v1063, v165, v166);
+                                        let v1065 = constructor_output_vreg(ctx, v1064);
+                                        // Rule at src/isa/riscv64/lower.isle line 1146.
+                                        return Some(v1065);
+                                    }
+                                }
+                            }
+                            let v45 = C::def_inst(ctx, v38.1);
+                            if let Some(v46) = v45 {
+                                let v47 = &C::inst_data(ctx, v46);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v68,
+                                    arg: v69,
+                                } = v47
+                                {
+                                    if let &Opcode::Splat = v68 {
+                                        let v163 = constructor_put_in_vreg(ctx, v38.0);
+                                        let v951 = constructor_put_in_freg(ctx, v69);
+                                        let v165 = &constructor_unmasked(ctx);
+                                        let v166 = C::vstate_from_type(ctx, v11);
+                                        let v1061 =
+                                            constructor_rv_vfadd_vf(ctx, v163, v951, v165, v166);
+                                        let v1062 = constructor_output_vreg(ctx, v1061);
+                                        // Rule at src/isa/riscv64/lower.isle line 1143.
+                                        return Some(v1062);
+                                    }
+                                }
+                            }
+                            let v163 = constructor_put_in_vreg(ctx, v38.0);
+                            let v164 = constructor_put_in_vreg(ctx, v38.1);
+                            let v165 = &constructor_unmasked(ctx);
+                            let v166 = C::vstate_from_type(ctx, v11);
+                            let v1059 = constructor_rv_vfadd_vv(ctx, v163, v164, v165, v166);
+                            let v1060 = constructor_output_vreg(ctx, v1059);
+                            // Rule at src/isa/riscv64/lower.isle line 1140.
+                            return Some(v1060);
+                        }
+                        let v479 = C::ty_scalar_float(ctx, v3);
+                        if let Some(v480) = v479 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v482 = constructor_put_in_freg(ctx, v38.0);
+                            let v483 = constructor_put_in_freg(ctx, v38.1);
+                            let v1057 = constructor_rv_fadd(ctx, v480, v482, v483);
+                            let v1058 = constructor_output_freg(ctx, v1057);
+                            // Rule at src/isa/riscv64/lower.isle line 1137.
+                            return Some(v1058);
+                        }
+                    }
+                }
+                &Opcode::Fsub => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
+                        if let Some(v11) = v10 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v57 = C::def_inst(ctx, v38.0);
+                            if let Some(v58) = v57 {
+                                let v59 = &C::inst_data(ctx, v58);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v76,
+                                    arg: v77,
+                                } = v59
+                                {
+                                    if let &Opcode::Splat = v76 {
+                                        let v196 = constructor_put_in_vreg(ctx, v38.1);
+                                        let v1063 = constructor_put_in_freg(ctx, v77);
+                                        let v165 = &constructor_unmasked(ctx);
+                                        let v166 = C::vstate_from_type(ctx, v11);
+                                        let v1072 =
+                                            constructor_rv_vfrsub_vf(ctx, v196, v1063, v165, v166);
+                                        let v1073 = constructor_output_vreg(ctx, v1072);
+                                        // Rule at src/isa/riscv64/lower.isle line 1160.
+                                        return Some(v1073);
+                                    }
+                                }
+                            }
+                            let v45 = C::def_inst(ctx, v38.1);
+                            if let Some(v46) = v45 {
+                                let v47 = &C::inst_data(ctx, v46);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v68,
+                                    arg: v69,
+                                } = v47
+                                {
+                                    if let &Opcode::Splat = v68 {
+                                        let v163 = constructor_put_in_vreg(ctx, v38.0);
+                                        let v951 = constructor_put_in_freg(ctx, v69);
+                                        let v165 = &constructor_unmasked(ctx);
+                                        let v166 = C::vstate_from_type(ctx, v11);
+                                        let v1070 =
+                                            constructor_rv_vfsub_vf(ctx, v163, v951, v165, v166);
+                                        let v1071 = constructor_output_vreg(ctx, v1070);
+                                        // Rule at src/isa/riscv64/lower.isle line 1157.
+                                        return Some(v1071);
+                                    }
+                                }
+                            }
+                            let v163 = constructor_put_in_vreg(ctx, v38.0);
+                            let v164 = constructor_put_in_vreg(ctx, v38.1);
+                            let v165 = &constructor_unmasked(ctx);
+                            let v166 = C::vstate_from_type(ctx, v11);
+                            let v1068 = constructor_rv_vfsub_vv(ctx, v163, v164, v165, v166);
+                            let v1069 = constructor_output_vreg(ctx, v1068);
+                            // Rule at src/isa/riscv64/lower.isle line 1154.
+                            return Some(v1069);
+                        }
+                        let v479 = C::ty_scalar_float(ctx, v3);
+                        if let Some(v480) = v479 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v482 = constructor_put_in_freg(ctx, v38.0);
+                            let v483 = constructor_put_in_freg(ctx, v38.1);
+                            let v1066 = constructor_rv_fsub(ctx, v480, v482, v483);
+                            let v1067 = constructor_output_freg(ctx, v1066);
+                            // Rule at src/isa/riscv64/lower.isle line 1151.
+                            return Some(v1067);
+                        }
+                    }
+                }
+                &Opcode::Fmul => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
+                        if let Some(v11) = v10 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v57 = C::def_inst(ctx, v38.0);
+                            if let Some(v58) = v57 {
+                                let v59 = &C::inst_data(ctx, v58);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v76,
+                                    arg: v77,
+                                } = v59
+                                {
+                                    if let &Opcode::Splat = v76 {
+                                        let v196 = constructor_put_in_vreg(ctx, v38.1);
+                                        let v1063 = constructor_put_in_freg(ctx, v77);
+                                        let v165 = &constructor_unmasked(ctx);
+                                        let v166 = C::vstate_from_type(ctx, v11);
+                                        let v1080 =
+                                            constructor_rv_vfmul_vf(ctx, v196, v1063, v165, v166);
+                                        let v1081 = constructor_output_vreg(ctx, v1080);
+                                        // Rule at src/isa/riscv64/lower.isle line 1173.
+                                        return Some(v1081);
+                                    }
+                                }
+                            }
+                            let v45 = C::def_inst(ctx, v38.1);
+                            if let Some(v46) = v45 {
+                                let v47 = &C::inst_data(ctx, v46);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v68,
+                                    arg: v69,
+                                } = v47
+                                {
+                                    if let &Opcode::Splat = v68 {
+                                        let v163 = constructor_put_in_vreg(ctx, v38.0);
+                                        let v951 = constructor_put_in_freg(ctx, v69);
+                                        let v165 = &constructor_unmasked(ctx);
+                                        let v166 = C::vstate_from_type(ctx, v11);
+                                        let v1078 =
+                                            constructor_rv_vfmul_vf(ctx, v163, v951, v165, v166);
+                                        let v1079 = constructor_output_vreg(ctx, v1078);
+                                        // Rule at src/isa/riscv64/lower.isle line 1170.
+                                        return Some(v1079);
+                                    }
+                                }
+                            }
+                            let v163 = constructor_put_in_vreg(ctx, v38.0);
+                            let v164 = constructor_put_in_vreg(ctx, v38.1);
+                            let v165 = &constructor_unmasked(ctx);
+                            let v166 = C::vstate_from_type(ctx, v11);
+                            let v1076 = constructor_rv_vfmul_vv(ctx, v163, v164, v165, v166);
+                            let v1077 = constructor_output_vreg(ctx, v1076);
+                            // Rule at src/isa/riscv64/lower.isle line 1167.
+                            return Some(v1077);
+                        }
+                        let v479 = C::ty_scalar_float(ctx, v3);
+                        if let Some(v480) = v479 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v482 = constructor_put_in_freg(ctx, v38.0);
+                            let v483 = constructor_put_in_freg(ctx, v38.1);
+                            let v1074 = constructor_rv_fmul(ctx, v480, v482, v483);
+                            let v1075 = constructor_output_freg(ctx, v1074);
+                            // Rule at src/isa/riscv64/lower.isle line 1164.
+                            return Some(v1075);
+                        }
+                    }
+                }
+                &Opcode::Fdiv => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
+                        if let Some(v11) = v10 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v57 = C::def_inst(ctx, v38.0);
+                            if let Some(v58) = v57 {
+                                let v59 = &C::inst_data(ctx, v58);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v76,
+                                    arg: v77,
+                                } = v59
+                                {
+                                    if let &Opcode::Splat = v76 {
+                                        let v196 = constructor_put_in_vreg(ctx, v38.1);
+                                        let v1063 = constructor_put_in_freg(ctx, v77);
+                                        let v165 = &constructor_unmasked(ctx);
+                                        let v166 = C::vstate_from_type(ctx, v11);
+                                        let v1088 =
+                                            constructor_rv_vfrdiv_vf(ctx, v196, v1063, v165, v166);
+                                        let v1089 = constructor_output_vreg(ctx, v1088);
+                                        // Rule at src/isa/riscv64/lower.isle line 1187.
+                                        return Some(v1089);
+                                    }
+                                }
+                            }
+                            let v45 = C::def_inst(ctx, v38.1);
+                            if let Some(v46) = v45 {
+                                let v47 = &C::inst_data(ctx, v46);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v68,
+                                    arg: v69,
+                                } = v47
+                                {
+                                    if let &Opcode::Splat = v68 {
+                                        let v163 = constructor_put_in_vreg(ctx, v38.0);
+                                        let v951 = constructor_put_in_freg(ctx, v69);
+                                        let v165 = &constructor_unmasked(ctx);
+                                        let v166 = C::vstate_from_type(ctx, v11);
+                                        let v1086 =
+                                            constructor_rv_vfdiv_vf(ctx, v163, v951, v165, v166);
+                                        let v1087 = constructor_output_vreg(ctx, v1086);
+                                        // Rule at src/isa/riscv64/lower.isle line 1184.
+                                        return Some(v1087);
+                                    }
+                                }
+                            }
+                            let v163 = constructor_put_in_vreg(ctx, v38.0);
+                            let v164 = constructor_put_in_vreg(ctx, v38.1);
+                            let v165 = &constructor_unmasked(ctx);
+                            let v166 = C::vstate_from_type(ctx, v11);
+                            let v1084 = constructor_rv_vfdiv_vv(ctx, v163, v164, v165, v166);
+                            let v1085 = constructor_output_vreg(ctx, v1084);
+                            // Rule at src/isa/riscv64/lower.isle line 1181.
+                            return Some(v1085);
+                        }
+                        let v479 = C::ty_scalar_float(ctx, v3);
+                        if let Some(v480) = v479 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v482 = constructor_put_in_freg(ctx, v38.0);
+                            let v483 = constructor_put_in_freg(ctx, v38.1);
+                            let v1082 = constructor_rv_fdiv(ctx, v480, v482, v483);
+                            let v1083 = constructor_output_freg(ctx, v1082);
+                            // Rule at src/isa/riscv64/lower.isle line 1178.
+                            return Some(v1083);
+                        }
+                    }
+                }
+                &Opcode::Fcopysign => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
+                        if let Some(v11) = v10 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v45 = C::def_inst(ctx, v38.1);
+                            if let Some(v46) = v45 {
+                                let v47 = &C::inst_data(ctx, v46);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v68,
+                                    arg: v69,
+                                } = v47
+                                {
+                                    if let &Opcode::Splat = v68 {
+                                        let v163 = constructor_put_in_vreg(ctx, v38.0);
+                                        let v951 = constructor_put_in_freg(ctx, v69);
+                                        let v165 = &constructor_unmasked(ctx);
+                                        let v166 = C::vstate_from_type(ctx, v11);
+                                        let v952 =
+                                            constructor_rv_vfsgnj_vf(ctx, v163, v951, v165, v166);
+                                        let v953 = constructor_output_vreg(ctx, v952);
+                                        // Rule at src/isa/riscv64/lower.isle line 1013.
+                                        return Some(v953);
+                                    }
+                                }
+                            }
+                            let v163 = constructor_put_in_vreg(ctx, v38.0);
+                            let v164 = constructor_put_in_vreg(ctx, v38.1);
+                            let v165 = &constructor_unmasked(ctx);
+                            let v166 = C::vstate_from_type(ctx, v11);
+                            let v949 = constructor_rv_vfsgnj_vv(ctx, v163, v164, v165, v166);
+                            let v950 = constructor_output_vreg(ctx, v949);
+                            // Rule at src/isa/riscv64/lower.isle line 1010.
+                            return Some(v950);
+                        }
+                        let v479 = C::ty_scalar_float(ctx, v3);
+                        if let Some(v480) = v479 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v482 = constructor_put_in_freg(ctx, v38.0);
+                            let v483 = constructor_put_in_freg(ctx, v38.1);
+                            let v947 = constructor_rv_fsgnj(ctx, v480, v482, v483);
+                            let v948 = constructor_output_freg(ctx, v947);
+                            // Rule at src/isa/riscv64/lower.isle line 1007.
+                            return Some(v948);
+                        }
+                    }
+                }
+                &Opcode::Fmin => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
+                        if let Some(v11) = v10 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v1095 = constructor_gen_fcmp_mask(
+                                ctx,
+                                v11,
+                                &FloatCC::Ordered,
+                                v38.0,
+                                v38.1,
+                            );
+                            let v709 = C::lane_type(ctx, v11);
+                            let v1096 = constructor_canonical_nan_u64(ctx, v709);
+                            let v1097 = C::imm(ctx, I64, v1096);
+                            let v1098 = C::xreg_new(ctx, v1097);
+                            let v166 = C::vstate_from_type(ctx, v11);
+                            let v1099 = constructor_rv_vmv_vx(ctx, v1098, v166);
+                            let v1100 = constructor_put_in_vreg(ctx, v38.0);
+                            let v1101 = constructor_put_in_vreg(ctx, v38.1);
+                            let v165 = &constructor_unmasked(ctx);
+                            let v1102 = constructor_rv_vfmin_vv(ctx, v1100, v1101, v165, v166);
+                            let v1103 = constructor_rv_vmerge_vvm(ctx, v1099, v1102, v1095, v166);
+                            let v1104 = constructor_output_vreg(ctx, v1103);
+                            // Rule at src/isa/riscv64/lower.isle line 1201.
+                            return Some(v1104);
+                        }
+                        let v479 = C::ty_scalar_float(ctx, v3);
+                        if let Some(v480) = v479 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v1091 = C::put_in_reg(ctx, v38.0);
+                            let v65 = C::put_in_reg(ctx, v38.1);
+                            let v1092 = constructor_gen_float_select(
+                                ctx,
+                                &FloatSelectOP::Min,
+                                v1091,
+                                v65,
+                                v480,
+                            );
+                            let v1093 = constructor_output_reg(ctx, v1092);
+                            // Rule at src/isa/riscv64/lower.isle line 1192.
+                            return Some(v1093);
+                        }
+                    }
+                }
+                &Opcode::FminPseudo => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
+                        if let Some(v11) = v10 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v1114 = constructor_gen_fcmp_mask(
+                                ctx,
+                                v11,
+                                &FloatCC::LessThan,
+                                v38.1,
+                                v38.0,
+                            );
+                            let v1115 = constructor_put_in_vreg(ctx, v38.0);
+                            let v1116 = constructor_put_in_vreg(ctx, v38.1);
+                            let v166 = C::vstate_from_type(ctx, v11);
+                            let v1117 = constructor_rv_vmerge_vvm(ctx, v1115, v1116, v1114, v166);
+                            let v1118 = constructor_output_vreg(ctx, v1117);
+                            // Rule at src/isa/riscv64/lower.isle line 1231.
+                            return Some(v1118);
+                        }
+                        let v479 = C::ty_scalar_float(ctx, v3);
+                        if let Some(v480) = v479 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v1091 = C::put_in_reg(ctx, v38.0);
+                            let v65 = C::put_in_reg(ctx, v38.1);
+                            let v1111 = constructor_gen_float_select_pseudo(
+                                ctx,
+                                &FloatSelectOP::Min,
+                                v1091,
+                                v65,
+                                v480,
+                            );
+                            let v1112 = constructor_output_reg(ctx, v1111);
+                            // Rule at src/isa/riscv64/lower.isle line 1228.
+                            return Some(v1112);
+                        }
+                    }
+                }
+                &Opcode::Fmax => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
+                        if let Some(v11) = v10 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v1095 = constructor_gen_fcmp_mask(
+                                ctx,
+                                v11,
+                                &FloatCC::Ordered,
+                                v38.0,
+                                v38.1,
+                            );
+                            let v709 = C::lane_type(ctx, v11);
+                            let v1096 = constructor_canonical_nan_u64(ctx, v709);
+                            let v1097 = C::imm(ctx, I64, v1096);
+                            let v1098 = C::xreg_new(ctx, v1097);
+                            let v166 = C::vstate_from_type(ctx, v11);
+                            let v1099 = constructor_rv_vmv_vx(ctx, v1098, v166);
+                            let v1100 = constructor_put_in_vreg(ctx, v38.0);
+                            let v1101 = constructor_put_in_vreg(ctx, v38.1);
+                            let v165 = &constructor_unmasked(ctx);
+                            let v1108 = constructor_rv_vfmax_vv(ctx, v1100, v1101, v165, v166);
+                            let v1109 = constructor_rv_vmerge_vvm(ctx, v1099, v1108, v1095, v166);
+                            let v1110 = constructor_output_vreg(ctx, v1109);
+                            // Rule at src/isa/riscv64/lower.isle line 1219.
+                            return Some(v1110);
+                        }
+                        let v479 = C::ty_scalar_float(ctx, v3);
+                        if let Some(v480) = v479 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v1091 = C::put_in_reg(ctx, v38.0);
+                            let v65 = C::put_in_reg(ctx, v38.1);
+                            let v1106 = constructor_gen_float_select(
+                                ctx,
+                                &FloatSelectOP::Max,
+                                v1091,
+                                v65,
+                                v480,
+                            );
+                            let v1107 = constructor_output_reg(ctx, v1106);
+                            // Rule at src/isa/riscv64/lower.isle line 1210.
+                            return Some(v1107);
+                        }
+                    }
+                }
+                &Opcode::FmaxPseudo => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
+                        if let Some(v11) = v10 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v1121 = constructor_gen_fcmp_mask(
+                                ctx,
+                                v11,
+                                &FloatCC::LessThan,
+                                v38.0,
+                                v38.1,
+                            );
+                            let v1115 = constructor_put_in_vreg(ctx, v38.0);
+                            let v1116 = constructor_put_in_vreg(ctx, v38.1);
+                            let v166 = C::vstate_from_type(ctx, v11);
+                            let v1122 = constructor_rv_vmerge_vvm(ctx, v1115, v1116, v1121, v166);
+                            let v1123 = constructor_output_vreg(ctx, v1122);
+                            // Rule at src/isa/riscv64/lower.isle line 1240.
+                            return Some(v1123);
+                        }
+                        let v479 = C::ty_scalar_float(ctx, v3);
+                        if let Some(v480) = v479 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v1091 = C::put_in_reg(ctx, v38.0);
+                            let v65 = C::put_in_reg(ctx, v38.1);
+                            let v1119 = constructor_gen_float_select_pseudo(
+                                ctx,
+                                &FloatSelectOP::Max,
+                                v1091,
+                                v65,
+                                v480,
+                            );
+                            let v1120 = constructor_output_reg(ctx, v1119);
+                            // Rule at src/isa/riscv64/lower.isle line 1237.
+                            return Some(v1120);
+                        }
+                    }
+                }
+                &Opcode::Snarrow => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
+                        if let Some(v11) = v10 {
+                            let v1611 = C::ty_lane_count(ctx, v11);
+                            let v1653 = C::u64_udiv(ctx, v1611, 0x2);
+                            if let Some(v1654) = v1653 {
+                                let v1655 = constructor_u64_to_uimm5(ctx, v1654);
+                                if let Some(v1656) = v1655 {
+                                    let v1698 = constructor_u64_to_uimm5(ctx, 0x0);
+                                    if let Some(v1699) = v1698 {
+                                        let v38 = C::unpack_value_array_2(ctx, v37);
+                                        let v163 = constructor_put_in_vreg(ctx, v38.0);
+                                        let v165 = &constructor_unmasked(ctx);
+                                        let v1700 = C::ty_half_lanes(ctx, v11);
+                                        let v1701 = v1700?;
+                                        let v1702 = C::vstate_from_type(ctx, v1701);
+                                        let v1703 = C::vstate_mf2(ctx, v1702);
+                                        let v1704 =
+                                            constructor_rv_vnclip_wi(ctx, v163, v1699, v165, v1703);
+                                        let v1116 = constructor_put_in_vreg(ctx, v38.1);
+                                        let v1705 = constructor_rv_vnclip_wi(
+                                            ctx, v1116, v1699, v165, v1703,
+                                        );
+                                        let v166 = C::vstate_from_type(ctx, v11);
+                                        let v1706 = constructor_rv_vslideup_vvi(
+                                            ctx, v1704, v1705, v1656, v165, v166,
+                                        );
+                                        let v1707 = constructor_output_vreg(ctx, v1706);
+                                        // Rule at src/isa/riscv64/lower.isle line 1973.
+                                        return Some(v1707);
+                                    }
+                                }
+                            }
+                        }
+                    }
+                }
+                &Opcode::Unarrow => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
+                        if let Some(v11) = v10 {
+                            let v1611 = C::ty_lane_count(ctx, v11);
+                            let v1653 = C::u64_udiv(ctx, v1611, 0x2);
+                            if let Some(v1654) = v1653 {
+                                let v1655 = constructor_u64_to_uimm5(ctx, v1654);
+                                if let Some(v1656) = v1655 {
+                                    let v1698 = constructor_u64_to_uimm5(ctx, 0x0);
+                                    if let Some(v1699) = v1698 {
+                                        let v38 = C::unpack_value_array_2(ctx, v37);
+                                        let v163 = constructor_put_in_vreg(ctx, v38.0);
+                                        let v1568 = C::zero_reg(ctx);
+                                        let v1569 = C::xreg_new(ctx, v1568);
+                                        let v165 = &constructor_unmasked(ctx);
+                                        let v1697 = C::value_type(ctx, v38.0);
+                                        let v1712 = C::vstate_from_type(ctx, v1697);
+                                        let v1713 =
+                                            constructor_rv_vmax_vx(ctx, v163, v1569, v165, v1712);
+                                        let v1672 = constructor_put_in_vreg(ctx, v38.1);
+                                        let v1714 = C::zero_reg(ctx);
+                                        let v1715 = C::xreg_new(ctx, v1714);
+                                        let v1716 =
+                                            constructor_rv_vmax_vx(ctx, v1672, v1715, v165, v1712);
+                                        let v1700 = C::ty_half_lanes(ctx, v11);
+                                        let v1701 = v1700?;
+                                        let v1702 = C::vstate_from_type(ctx, v1701);
+                                        let v1703 = C::vstate_mf2(ctx, v1702);
+                                        let v1717 = constructor_rv_vnclipu_wi(
+                                            ctx, v1713, v1699, v165, v1703,
+                                        );
+                                        let v1718 = constructor_rv_vnclipu_wi(
+                                            ctx, v1716, v1699, v165, v1703,
+                                        );
+                                        let v166 = C::vstate_from_type(ctx, v11);
+                                        let v1719 = constructor_rv_vslideup_vvi(
+                                            ctx, v1717, v1718, v1656, v165, v166,
+                                        );
+                                        let v1720 = constructor_output_vreg(ctx, v1719);
+                                        // Rule at src/isa/riscv64/lower.isle line 1995.
+                                        return Some(v1720);
+                                    }
+                                }
+                            }
+                        }
+                    }
+                }
+                &Opcode::Uunarrow => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
+                        if let Some(v11) = v10 {
+                            let v1611 = C::ty_lane_count(ctx, v11);
+                            let v1653 = C::u64_udiv(ctx, v1611, 0x2);
+                            if let Some(v1654) = v1653 {
+                                let v1655 = constructor_u64_to_uimm5(ctx, v1654);
+                                if let Some(v1656) = v1655 {
+                                    let v1698 = constructor_u64_to_uimm5(ctx, 0x0);
+                                    if let Some(v1699) = v1698 {
+                                        let v38 = C::unpack_value_array_2(ctx, v37);
+                                        let v163 = constructor_put_in_vreg(ctx, v38.0);
+                                        let v165 = &constructor_unmasked(ctx);
+                                        let v1700 = C::ty_half_lanes(ctx, v11);
+                                        let v1701 = v1700?;
+                                        let v1702 = C::vstate_from_type(ctx, v1701);
+                                        let v1703 = C::vstate_mf2(ctx, v1702);
+                                        let v1708 = constructor_rv_vnclipu_wi(
+                                            ctx, v163, v1699, v165, v1703,
+                                        );
+                                        let v1116 = constructor_put_in_vreg(ctx, v38.1);
+                                        let v1709 = constructor_rv_vnclipu_wi(
+                                            ctx, v1116, v1699, v165, v1703,
+                                        );
+                                        let v166 = C::vstate_from_type(ctx, v11);
+                                        let v1710 = constructor_rv_vslideup_vvi(
+                                            ctx, v1708, v1709, v1656, v165, v166,
+                                        );
+                                        let v1711 = constructor_output_vreg(ctx, v1710);
+                                        // Rule at src/isa/riscv64/lower.isle line 1982.
+                                        return Some(v1711);
+                                    }
+                                }
+                            }
+                        }
+                    }
+                }
+                &Opcode::IaddPairwise => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
+                        if let Some(v11) = v10 {
+                            let v1611 = C::ty_lane_count(ctx, v11);
+                            let v1653 = C::u64_udiv(ctx, v1611, 0x2);
+                            if let Some(v1654) = v1653 {
+                                let v1655 = constructor_u64_to_uimm5(ctx, v1654);
+                                if let Some(v1656) = v1655 {
+                                    let v1657 = constructor_gen_vec_mask(ctx, 0x5555555555555555);
+                                    let v38 = C::unpack_value_array_2(ctx, v37);
+                                    let v1115 = constructor_put_in_vreg(ctx, v38.0);
+                                    let v166 = C::vstate_from_type(ctx, v11);
+                                    let v1658 =
+                                        constructor_rv_vcompress_vm(ctx, v1115, v1657, v166);
+                                    let v1659 = constructor_put_in_vreg(ctx, v38.1);
+                                    let v1660 =
+                                        constructor_rv_vcompress_vm(ctx, v1659, v1657, v166);
+                                    let v165 = &constructor_unmasked(ctx);
+                                    let v1661 = constructor_rv_vslideup_vvi(
+                                        ctx, v1658, v1660, v1656, v165, v166,
+                                    );
+                                    let v1663 = constructor_gen_vec_mask(ctx, 0xAAAAAAAAAAAAAAAA);
+                                    let v1664 = constructor_put_in_vreg(ctx, v38.0);
+                                    let v1665 =
+                                        constructor_rv_vcompress_vm(ctx, v1664, v1663, v166);
+                                    let v1666 = constructor_put_in_vreg(ctx, v38.1);
+                                    let v1667 =
+                                        constructor_rv_vcompress_vm(ctx, v1666, v1663, v166);
+                                    let v1668 = constructor_rv_vslideup_vvi(
+                                        ctx, v1665, v1667, v1656, v165, v166,
+                                    );
+                                    let v1669 =
+                                        constructor_rv_vadd_vv(ctx, v1661, v1668, v165, v166);
+                                    let v1670 = constructor_output_vreg(ctx, v1669);
+                                    // Rule at src/isa/riscv64/lower.isle line 1907.
+                                    return Some(v1670);
+                                }
+                            }
+                        }
+                    }
+                }
+                &Opcode::Iconcat => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        if v3 == I128 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v41 = constructor_put_in_xreg(ctx, v38.0);
+                            let v42 = constructor_put_in_xreg(ctx, v38.1);
+                            let v1196 = C::xreg_to_reg(ctx, v41);
+                            let v1197 = C::xreg_to_reg(ctx, v42);
+                            let v1198 = C::value_regs(ctx, v1196, v1197);
+                            let v1199 = C::output(ctx, v1198);
+                            // Rule at src/isa/riscv64/lower.isle line 1302.
+                            return Some(v1199);
+                        }
+                    }
+                }
+                _ => {}
+            }
+        }
+        &InstructionData::BinaryImm8 {
+            opcode: ref v1465,
+            arg: v1466,
+            imm: v1467,
+        } => {
+            if let &Opcode::Extractlane = v1465 {
+                let v1470 = constructor_put_in_vreg(ctx, v1466);
+                let v1468 = C::value_type(ctx, v1466);
+                let v1469 = C::u8_from_uimm8(ctx, v1467);
+                let v1471 = constructor_gen_extractlane(ctx, v1468, v1470, v1469);
+                let v1472 = constructor_output_reg(ctx, v1471);
+                // Rule at src/isa/riscv64/lower.isle line 1672.
+                return Some(v1472);
+            }
+        }
+        &InstructionData::Call {
+            opcode: ref v1445,
+            args: v1446,
+            func_ref: v1447,
+        } => {
+            match v1445 {
+                &Opcode::Call => {
+                    let v1449 = C::func_ref_data(ctx, v1447);
+                    let v1448 = C::value_list_slice(ctx, v1446);
+                    let v1453 = C::gen_call(ctx, v1449.0, v1449.1, v1449.2, v1448);
+                    // Rule at src/isa/riscv64/lower.isle line 1655.
+                    return Some(v1453);
+                }
+                &Opcode::ReturnCall => {
+                    let v1449 = C::func_ref_data(ctx, v1447);
+                    let v1448 = C::value_list_slice(ctx, v1446);
+                    let v1463 = C::gen_return_call(ctx, v1449.0, v1449.1, v1449.2, v1448);
+                    // Rule at src/isa/riscv64/lower.isle line 1663.
+                    return Some(v1463);
+                }
+                _ => {}
+            }
+        }
+        &InstructionData::CallIndirect {
+            opcode: ref v1454,
+            args: v1455,
+            sig_ref: v1456,
+        } => {
+            match v1454 {
+                &Opcode::CallIndirect => {
+                    let v1457 = C::value_list_slice(ctx, v1455);
+                    let v1458 = C::value_slice_unwrap(ctx, v1457);
+                    if let Some(v1459) = v1458 {
+                        let v1462 = C::gen_call_indirect(ctx, v1456, v1459.0, v1459.1);
+                        // Rule at src/isa/riscv64/lower.isle line 1658.
+                        return Some(v1462);
+                    }
+                }
+                &Opcode::ReturnCallIndirect => {
+                    let v1457 = C::value_list_slice(ctx, v1455);
+                    let v1458 = C::value_slice_unwrap(ctx, v1457);
+                    if let Some(v1459) = v1458 {
+                        let v1464 = C::gen_return_call_indirect(ctx, v1456, v1459.0, v1459.1);
+                        // Rule at src/isa/riscv64/lower.isle line 1666.
+                        return Some(v1464);
+                    }
+                }
+                _ => {}
+            }
+        }
+        &InstructionData::FloatCompare {
+            opcode: ref v1346,
+            args: ref v1347,
+            cond: ref v1348,
+        } => {
+            if let &Opcode::Fcmp = v1346 {
+                let v1349 = C::unpack_value_array_2(ctx, v1347);
+                let v1352 = C::value_type(ctx, v1349.0);
+                let v1360 = C::ty_vec_fits_in_register(ctx, v1352);
+                if let Some(v1361) = v1360 {
+                    let v1362 = constructor_gen_fcmp_mask(ctx, v1361, v1348, v1349.0, v1349.1);
+                    let v1363 = constructor_gen_expand_mask(ctx, v1361, v1362);
+                    let v1364 = constructor_output_vreg(ctx, v1363);
+                    // Rule at src/isa/riscv64/lower.isle line 1522.
+                    return Some(v1364);
+                }
+                let v1353 = C::ty_scalar_float(ctx, v1352);
+                if let Some(v1354) = v1353 {
+                    let v1355 = constructor_put_in_freg(ctx, v1349.0);
+                    let v1356 = constructor_put_in_freg(ctx, v1349.1);
+                    let v1357 = &constructor_emit_fcmp(ctx, v1348, v1354, v1355, v1356);
+                    let v1358 = constructor_cmp_value(ctx, v1357);
+                    let v1359 = constructor_output_xreg(ctx, v1358);
+                    // Rule at src/isa/riscv64/lower.isle line 1519.
+                    return Some(v1359);
+                }
+            }
+        }
+        &InstructionData::FuncAddr {
+            opcode: ref v1365,
+            func_ref: v1366,
+        } => {
+            if let &Opcode::FuncAddr = v1365 {
+                let v1367 = C::func_ref_data(ctx, v1366);
+                let v1372 = C::load_ext_name(ctx, v1367.1, 0x0);
+                let v1373 = constructor_output_reg(ctx, v1372);
+                // Rule at src/isa/riscv64/lower.isle line 1527.
+                return Some(v1373);
+            }
+        }
+        &InstructionData::IntAddTrap {
+            opcode: ref v294,
+            args: ref v295,
+            code: ref v296,
+        } => {
+            if let &Opcode::UaddOverflowTrap = v294 {
+                let v1 = C::first_result(ctx, arg0);
+                if let Some(v2) = v1 {
+                    let v3 = C::value_type(ctx, v2);
+                    let v292 = C::fits_in_64(ctx, v3);
+                    if let Some(v293) = v292 {
+                        let v297 = C::unpack_value_array_2(ctx, v295);
+                        let v300 = constructor_put_in_xreg(ctx, v297.0);
+                        let v301 = constructor_put_in_xreg(ctx, v297.1);
+                        let v302 = constructor_lower_uadd_overflow(ctx, v300, v301, v293);
+                        let v303 = C::value_regs_get(ctx, v302, 0x1);
+                        let v304 = C::xreg_new(ctx, v303);
+                        let v305 = constructor_gen_trapif(ctx, v304, v296);
+                        let v306 = C::value_regs_get(ctx, v302, 0x0);
+                        let v307 = constructor_output_reg(ctx, v306);
+                        // Rule at src/isa/riscv64/lower.isle line 255.
+                        return Some(v307);
+                    }
+                }
+            }
+        }
+        &InstructionData::IntCompare {
+            opcode: ref v1328,
+            args: ref v1329,
+            cond: ref v1330,
+        } => {
+            if let &Opcode::Icmp = v1328 {
+                let v1331 = C::unpack_value_array_2(ctx, v1329);
+                let v1334 = C::value_type(ctx, v1331.0);
+                let v1341 = C::ty_vec_fits_in_register(ctx, v1334);
+                if let Some(v1342) = v1341 {
+                    let v1343 = constructor_gen_icmp_mask(ctx, v1342, v1330, v1331.0, v1331.1);
+                    let v1344 = constructor_gen_expand_mask(ctx, v1342, v1343);
+                    let v1345 = constructor_output_vreg(ctx, v1344);
+                    // Rule at src/isa/riscv64/lower.isle line 1514.
+                    return Some(v1345);
+                }
+                let v1335 = C::ty_int(ctx, v1334);
+                if let Some(v1336) = v1335 {
+                    let v1337 = C::put_in_regs(ctx, v1331.0);
+                    let v1338 = C::put_in_regs(ctx, v1331.1);
+                    let v1339 = constructor_lower_icmp(ctx, v1330, v1337, v1338, v1336);
+                    let v1340 = constructor_output_reg(ctx, v1339);
+                    // Rule at src/isa/riscv64/lower.isle line 1511.
+                    return Some(v1340);
+                }
+            }
+        }
+        &InstructionData::Load {
+            opcode: ref v1252,
+            arg: v1253,
+            flags: v1254,
+            offset: v1255,
+        } => {
+            match v1252 {
+                &Opcode::Load => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v1256 = C::value_type(ctx, v1253);
+                        let v1257 = C::ty_addr64(ctx, v1256);
+                        if let Some(v1258) = v1257 {
+                            let v3 = C::value_type(ctx, v2);
+                            let v10 = C::ty_vec_fits_in_register(ctx, v3);
+                            if let Some(v11) = v10 {
+                                let v1259 = C::put_in_reg(ctx, v1253);
+                                let v1287 = C::gen_amode(ctx, v1259, v1255, I64);
+                                let v1286 = &constructor_element_width_from_type(ctx, v11);
+                                let v1288 = VecAMode::UnitStride { base: v1287 };
+                                let v165 = &constructor_unmasked(ctx);
+                                let v166 = C::vstate_from_type(ctx, v11);
+                                let v1289 =
+                                    constructor_vec_load(ctx, v1286, &v1288, v1254, v165, v166);
+                                let v1290 = constructor_output_reg(ctx, v1289);
+                                // Rule at src/isa/riscv64/lower.isle line 1423.
+                                return Some(v1290);
+                            }
+                            if v3 == I128 {
+                                let v1259 = C::put_in_reg(ctx, v1253);
+                                let v1284 = constructor_gen_load_128(ctx, v1259, v1255, v1254);
+                                let v1285 = C::output(ctx, v1284);
+                                // Rule at src/isa/riscv64/lower.isle line 1419.
+                                return Some(v1285);
+                            }
+                            let v1259 = C::put_in_reg(ctx, v1253);
+                            let v1281 = &C::load_op(ctx, v3);
+                            let v1282 = constructor_gen_load(ctx, v1259, v1255, v1281, v1254, v3);
+                            let v1283 = constructor_output_reg(ctx, v1282);
+                            // Rule at src/isa/riscv64/lower.isle line 1415.
+                            return Some(v1283);
+                        }
+                    }
+                }
+                &Opcode::Uload8 => {
+                    let v1256 = C::value_type(ctx, v1253);
+                    let v1257 = C::ty_addr64(ctx, v1256);
+                    if let Some(v1258) = v1257 {
+                        let v1259 = C::put_in_reg(ctx, v1253);
+                        let v1261 = &constructor_int_load_op(ctx, false, 0x8);
+                        let v1262 = constructor_gen_load(ctx, v1259, v1255, v1261, v1254, I64);
+                        let v1263 = constructor_output_reg(ctx, v1262);
+                        // Rule at src/isa/riscv64/lower.isle line 1388.
+                        return Some(v1263);
+                    }
+                }
+                &Opcode::Sload8 => {
+                    let v1256 = C::value_type(ctx, v1253);
+                    let v1257 = C::ty_addr64(ctx, v1256);
+                    if let Some(v1258) = v1257 {
+                        let v1259 = C::put_in_reg(ctx, v1253);
+                        let v1264 = &constructor_int_load_op(ctx, true, 0x8);
+                        let v1265 = constructor_gen_load(ctx, v1259, v1255, v1264, v1254, I64);
+                        let v1266 = constructor_output_reg(ctx, v1265);
+                        // Rule at src/isa/riscv64/lower.isle line 1392.
+                        return Some(v1266);
+                    }
+                }
+                &Opcode::Uload16 => {
+                    let v1256 = C::value_type(ctx, v1253);
+                    let v1257 = C::ty_addr64(ctx, v1256);
+                    if let Some(v1258) = v1257 {
+                        let v1259 = C::put_in_reg(ctx, v1253);
+                        let v1268 = &constructor_int_load_op(ctx, false, 0x10);
+                        let v1269 = constructor_gen_load(ctx, v1259, v1255, v1268, v1254, I64);
+                        let v1270 = constructor_output_reg(ctx, v1269);
+                        // Rule at src/isa/riscv64/lower.isle line 1396.
+                        return Some(v1270);
+                    }
+                }
+                &Opcode::Sload16 => {
+                    let v1256 = C::value_type(ctx, v1253);
+                    let v1257 = C::ty_addr64(ctx, v1256);
+                    if let Some(v1258) = v1257 {
+                        let v1259 = C::put_in_reg(ctx, v1253);
+                        let v1271 = &constructor_int_load_op(ctx, true, 0x10);
+                        let v1272 = constructor_gen_load(ctx, v1259, v1255, v1271, v1254, I64);
+                        let v1273 = constructor_output_reg(ctx, v1272);
+                        // Rule at src/isa/riscv64/lower.isle line 1401.
+                        return Some(v1273);
+                    }
+                }
+                &Opcode::Uload32 => {
+                    let v1256 = C::value_type(ctx, v1253);
+                    let v1257 = C::ty_addr64(ctx, v1256);
+                    if let Some(v1258) = v1257 {
+                        let v1259 = C::put_in_reg(ctx, v1253);
+                        let v1275 = &constructor_int_load_op(ctx, false, 0x20);
+                        let v1276 = constructor_gen_load(ctx, v1259, v1255, v1275, v1254, I64);
+                        let v1277 = constructor_output_reg(ctx, v1276);
+                        // Rule at src/isa/riscv64/lower.isle line 1406.
+                        return Some(v1277);
+                    }
+                }
+                &Opcode::Sload32 => {
+                    let v1256 = C::value_type(ctx, v1253);
+                    let v1257 = C::ty_addr64(ctx, v1256);
+                    if let Some(v1258) = v1257 {
+                        let v1259 = C::put_in_reg(ctx, v1253);
+                        let v1278 = &constructor_int_load_op(ctx, true, 0x20);
+                        let v1279 = constructor_gen_load(ctx, v1259, v1255, v1278, v1254, I64);
+                        let v1280 = constructor_output_reg(ctx, v1279);
+                        // Rule at src/isa/riscv64/lower.isle line 1411.
+                        return Some(v1280);
+                    }
+                }
+                &Opcode::Uload8x8 => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
+                        if let Some(v11) = v10 {
+                            if v11 == I16X8 {
+                                let v1256 = C::value_type(ctx, v1253);
+                                let v1257 = C::ty_addr64(ctx, v1256);
+                                if let Some(v1258) = v1257 {
+                                    let v1291 = constructor_put_in_xreg(ctx, v1253);
+                                    let v1292 = constructor_gen_load64_extend(
+                                        ctx,
+                                        v11,
+                                        &ExtendOp::Zero,
+                                        v1254,
+                                        v1291,
+                                        v1255,
+                                    );
+                                    let v1293 = constructor_output_vreg(ctx, v1292);
+                                    // Rule at src/isa/riscv64/lower.isle line 1450.
+                                    return Some(v1293);
+                                }
+                            }
+                        }
+                    }
+                }
+                &Opcode::Sload8x8 => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
+                        if let Some(v11) = v10 {
+                            if v11 == I16X8 {
+                                let v1256 = C::value_type(ctx, v1253);
+                                let v1257 = C::ty_addr64(ctx, v1256);
+                                if let Some(v1258) = v1257 {
+                                    let v1291 = constructor_put_in_xreg(ctx, v1253);
+                                    let v1294 = constructor_gen_load64_extend(
+                                        ctx,
+                                        v11,
+                                        &ExtendOp::Signed,
+                                        v1254,
+                                        v1291,
+                                        v1255,
+                                    );
+                                    let v1295 = constructor_output_vreg(ctx, v1294);
+                                    // Rule at src/isa/riscv64/lower.isle line 1462.
+                                    return Some(v1295);
+                                }
+                            }
+                        }
+                    }
+                }
+                &Opcode::Uload16x4 => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
+                        if let Some(v11) = v10 {
+                            if v11 == I32X4 {
+                                let v1256 = C::value_type(ctx, v1253);
+                                let v1257 = C::ty_addr64(ctx, v1256);
+                                if let Some(v1258) = v1257 {
+                                    let v1291 = constructor_put_in_xreg(ctx, v1253);
+                                    let v1292 = constructor_gen_load64_extend(
+                                        ctx,
+                                        v11,
+                                        &ExtendOp::Zero,
+                                        v1254,
+                                        v1291,
+                                        v1255,
+                                    );
+                                    let v1293 = constructor_output_vreg(ctx, v1292);
+                                    // Rule at src/isa/riscv64/lower.isle line 1454.
+                                    return Some(v1293);
+                                }
+                            }
+                        }
+                    }
+                }
+                &Opcode::Sload16x4 => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
+                        if let Some(v11) = v10 {
+                            if v11 == I32X4 {
+                                let v1256 = C::value_type(ctx, v1253);
+                                let v1257 = C::ty_addr64(ctx, v1256);
+                                if let Some(v1258) = v1257 {
+                                    let v1291 = constructor_put_in_xreg(ctx, v1253);
+                                    let v1294 = constructor_gen_load64_extend(
+                                        ctx,
+                                        v11,
+                                        &ExtendOp::Signed,
+                                        v1254,
+                                        v1291,
+                                        v1255,
+                                    );
+                                    let v1295 = constructor_output_vreg(ctx, v1294);
+                                    // Rule at src/isa/riscv64/lower.isle line 1466.
+                                    return Some(v1295);
+                                }
+                            }
+                        }
+                    }
+                }
+                &Opcode::Uload32x2 => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
+                        if let Some(v11) = v10 {
+                            if v11 == I64X2 {
+                                let v1256 = C::value_type(ctx, v1253);
+                                let v1257 = C::ty_addr64(ctx, v1256);
+                                if let Some(v1258) = v1257 {
+                                    let v1291 = constructor_put_in_xreg(ctx, v1253);
+                                    let v1292 = constructor_gen_load64_extend(
+                                        ctx,
+                                        v11,
+                                        &ExtendOp::Zero,
+                                        v1254,
+                                        v1291,
+                                        v1255,
+                                    );
+                                    let v1293 = constructor_output_vreg(ctx, v1292);
+                                    // Rule at src/isa/riscv64/lower.isle line 1458.
+                                    return Some(v1293);
+                                }
+                            }
+                        }
+                    }
+                }
+                &Opcode::Sload32x2 => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
+                        if let Some(v11) = v10 {
+                            if v11 == I64X2 {
+                                let v1256 = C::value_type(ctx, v1253);
+                                let v1257 = C::ty_addr64(ctx, v1256);
+                                if let Some(v1258) = v1257 {
+                                    let v1291 = constructor_put_in_xreg(ctx, v1253);
+                                    let v1294 = constructor_gen_load64_extend(
+                                        ctx,
+                                        v11,
+                                        &ExtendOp::Signed,
+                                        v1254,
+                                        v1291,
+                                        v1255,
+                                    );
+                                    let v1295 = constructor_output_vreg(ctx, v1294);
+                                    // Rule at src/isa/riscv64/lower.isle line 1470.
+                                    return Some(v1295);
+                                }
+                            }
+                        }
+                    }
+                }
+                _ => {}
+            }
+        }
+        &InstructionData::LoadNoOffset {
+            opcode: ref v1012,
+            arg: v1013,
+            flags: v1014,
+        } => {
+            match v1012 {
+                &Opcode::Bitcast => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v1015 = C::put_in_reg(ctx, v1013);
+                        let v1402 = C::value_type(ctx, v1013);
+                        let v3 = C::value_type(ctx, v2);
+                        let v1403 = constructor_gen_bitcast(ctx, v1015, v1402, v3);
+                        let v1404 = constructor_output_reg(ctx, v1403);
+                        // Rule at src/isa/riscv64/lower.isle line 1571.
+                        return Some(v1404);
+                    }
+                }
+                &Opcode::AtomicLoad => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v969 = C::valid_atomic_transaction(ctx, v3);
+                        if let Some(v970) = v969 {
+                            let v1015 = C::put_in_reg(ctx, v1013);
+                            let v1016 = constructor_gen_atomic_load(ctx, v1015, v970);
+                            let v1017 = constructor_output_reg(ctx, v1016);
+                            // Rule at src/isa/riscv64/lower.isle line 1085.
+                            return Some(v1017);
+                        }
+                    }
+                }
+                _ => {}
+            }
+        }
+        &InstructionData::MultiAry {
+            opcode: ref v1427,
+            args: v1428,
+        } => {
+            if let &Opcode::Return = v1427 {
+                let v1429 = C::value_list_slice(ctx, v1428);
+                let v1430 = constructor_lower_return(ctx, v1429);
+                // Rule at src/isa/riscv64/lower.isle line 1620.
+                return Some(v1430);
+            }
+        }
+        &InstructionData::NullAry { opcode: ref v30 } => {
+            match v30 {
+                &Opcode::Debugtrap => {
+                    let v1243 = SideEffectNoResult::Inst {
+                        inst: MInst::EBreak,
+                    };
+                    let v1244 = constructor_side_effect(ctx, &v1243);
+                    // Rule at src/isa/riscv64/lower.isle line 1368.
+                    return Some(v1244);
+                }
+                &Opcode::GetFramePointer => {
+                    let v1431 = C::fp_reg(ctx);
+                    let v1432 = constructor_gen_mov_from_preg(ctx, v1431);
+                    let v1433 = constructor_output_reg(ctx, v1432);
+                    // Rule at src/isa/riscv64/lower.isle line 1625.
+                    return Some(v1433);
+                }
+                &Opcode::GetStackPointer => {
+                    let v1434 = C::sp_reg(ctx);
+                    let v1435 = constructor_gen_mov_from_preg(ctx, v1434);
+                    let v1436 = constructor_output_reg(ctx, v1435);
+                    // Rule at src/isa/riscv64/lower.isle line 1628.
+                    return Some(v1436);
+                }
+                &Opcode::GetReturnAddress => {
+                    let v1437 = C::load_ra(ctx);
+                    let v1438 = constructor_output_reg(ctx, v1437);
+                    // Rule at src/isa/riscv64/lower.isle line 1631.
+                    return Some(v1438);
+                }
+                &Opcode::Null => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v32 = C::imm(ctx, v3, 0x0);
+                        let v33 = constructor_output_reg(ctx, v32);
+                        // Rule at src/isa/riscv64/lower.isle line 29.
+                        return Some(v33);
+                    }
+                }
+                &Opcode::Fence => {
+                    let v1246 = MInst::Fence {
+                        pred: 0xF,
+                        succ: 0xF,
+                    };
+                    let v1247 = SideEffectNoResult::Inst { inst: v1246 };
+                    let v1248 = constructor_side_effect(ctx, &v1247);
+                    // Rule at src/isa/riscv64/lower.isle line 1373.
+                    return Some(v1248);
+                }
+                _ => {}
+            }
+        }
+        &InstructionData::Shuffle {
+            opcode: ref v1585,
+            args: ref v1586,
+            imm: v1587,
+        } => {
+            if let &Opcode::Shuffle = v1585 {
+                let v1 = C::first_result(ctx, arg0);
+                if let Some(v2) = v1 {
+                    let v3 = C::value_type(ctx, v2);
+                    let v10 = C::ty_vec_fits_in_register(ctx, v3);
+                    if let Some(v11) = v10 {
+                        if v11 == I8X16 {
+                            let v1591 = C::vconst_from_immediate(ctx, v1587);
+                            if let Some(v1592) = v1591 {
+                                let v1594 = C::imm5_from_i8(ctx, -0x10);
+                                if let Some(v1595) = v1594 {
+                                    let v1596 = constructor_gen_constant(ctx, v11, v1592);
+                                    let v1588 = C::unpack_value_array_2(ctx, v1586);
+                                    let v1597 = constructor_put_in_vreg(ctx, v1588.0);
+                                    let v165 = &constructor_unmasked(ctx);
+                                    let v166 = C::vstate_from_type(ctx, v11);
+                                    let v1598 =
+                                        constructor_rv_vrgather_vv(ctx, v1597, v1596, v165, v166);
+                                    let v1599 =
+                                        constructor_rv_vadd_vi(ctx, v1596, v1595, v165, v166);
+                                    let v1600 = constructor_put_in_vreg(ctx, v1588.1);
+                                    let v1601 =
+                                        constructor_rv_vrgather_vv(ctx, v1600, v1599, v165, v166);
+                                    let v1602 =
+                                        constructor_rv_vor_vv(ctx, v1598, v1601, v165, v166);
+                                    let v1603 = constructor_output_vreg(ctx, v1602);
+                                    // Rule at src/isa/riscv64/lower.isle line 1834.
+                                    return Some(v1603);
+                                }
+                            }
+                        }
+                    }
+                }
+            }
+        }
+        &InstructionData::StackLoad {
+            opcode: ref v1124,
+            stack_slot: v1125,
+            offset: v1126,
+        } => {
+            if let &Opcode::StackAddr = v1124 {
+                let v1127 = C::gen_stack_addr(ctx, v1125, v1126);
+                let v1128 = constructor_output_reg(ctx, v1127);
+                // Rule at src/isa/riscv64/lower.isle line 1246.
+                return Some(v1128);
+            }
+        }
+        &InstructionData::Store {
+            opcode: ref v1296,
+            args: ref v1297,
+            flags: v1298,
+            offset: v1299,
+        } => {
+            match v1296 {
+                &Opcode::Store => {
+                    let v1300 = C::unpack_value_array_2(ctx, v1297);
+                    let v1303 = C::value_type(ctx, v1300.1);
+                    let v1304 = C::ty_addr64(ctx, v1303);
+                    if let Some(v1305) = v1304 {
+                        let v1314 = C::value_type(ctx, v1300.0);
+                        let v1320 = C::ty_vec_fits_in_register(ctx, v1314);
+                        if let Some(v1321) = v1320 {
+                            let v1306 = C::put_in_reg(ctx, v1300.1);
+                            let v1323 = C::gen_amode(ctx, v1306, v1299, I64);
+                            let v1325 = constructor_put_in_vreg(ctx, v1300.0);
+                            let v1322 = &constructor_element_width_from_type(ctx, v1321);
+                            let v1324 = VecAMode::UnitStride { base: v1323 };
+                            let v165 = &constructor_unmasked(ctx);
+                            let v1326 = C::vstate_from_type(ctx, v1321);
+                            let v1327 = constructor_vec_store(
+                                ctx, v1322, &v1324, v1325, v1298, v165, v1326,
+                            );
+                            // Rule at src/isa/riscv64/lower.isle line 1497.
+                            return Some(v1327);
+                        }
+                        if v1314 == I128 {
+                            let v1306 = C::put_in_reg(ctx, v1300.1);
+                            let v1318 = C::put_in_regs(ctx, v1300.0);
+                            let v1319 = constructor_gen_store_128(ctx, v1306, v1299, v1298, v1318);
+                            // Rule at src/isa/riscv64/lower.isle line 1493.
+                            return Some(v1319);
+                        }
+                        let v1306 = C::put_in_reg(ctx, v1300.1);
+                        let v1315 = &C::store_op(ctx, v1314);
+                        let v1316 = C::put_in_reg(ctx, v1300.0);
+                        let v1317 = constructor_gen_store(ctx, v1306, v1299, v1315, v1298, v1316);
+                        // Rule at src/isa/riscv64/lower.isle line 1489.
+                        return Some(v1317);
+                    }
+                }
+                &Opcode::Istore8 => {
+                    let v1300 = C::unpack_value_array_2(ctx, v1297);
+                    let v1303 = C::value_type(ctx, v1300.1);
+                    let v1304 = C::ty_addr64(ctx, v1303);
+                    if let Some(v1305) = v1304 {
+                        let v1306 = C::put_in_reg(ctx, v1300.1);
+                        let v1308 = C::put_in_reg(ctx, v1300.0);
+                        let v1309 =
+                            constructor_gen_store(ctx, v1306, v1299, &StoreOP::Sb, v1298, v1308);
+                        // Rule at src/isa/riscv64/lower.isle line 1475.
+                        return Some(v1309);
+                    }
+                }
+                &Opcode::Istore16 => {
+                    let v1300 = C::unpack_value_array_2(ctx, v1297);
+                    let v1303 = C::value_type(ctx, v1300.1);
+                    let v1304 = C::ty_addr64(ctx, v1303);
+                    if let Some(v1305) = v1304 {
+                        let v1306 = C::put_in_reg(ctx, v1300.1);
+                        let v1308 = C::put_in_reg(ctx, v1300.0);
+                        let v1311 =
+                            constructor_gen_store(ctx, v1306, v1299, &StoreOP::Sh, v1298, v1308);
+                        // Rule at src/isa/riscv64/lower.isle line 1479.
+                        return Some(v1311);
+                    }
+                }
+                &Opcode::Istore32 => {
+                    let v1300 = C::unpack_value_array_2(ctx, v1297);
+                    let v1303 = C::value_type(ctx, v1300.1);
+                    let v1304 = C::ty_addr64(ctx, v1303);
+                    if let Some(v1305) = v1304 {
+                        let v1306 = C::put_in_reg(ctx, v1300.1);
+                        let v1308 = C::put_in_reg(ctx, v1300.0);
+                        let v1313 =
+                            constructor_gen_store(ctx, v1306, v1299, &StoreOP::Sw, v1298, v1308);
+                        // Rule at src/isa/riscv64/lower.isle line 1484.
+                        return Some(v1313);
+                    }
+                }
+                _ => {}
+            }
+        }
+        &InstructionData::StoreNoOffset {
+            opcode: ref v1018,
+            args: ref v1019,
+            flags: v1020,
+        } => {
+            if let &Opcode::AtomicStore = v1018 {
+                let v1021 = C::unpack_value_array_2(ctx, v1019);
+                let v1024 = C::value_type(ctx, v1021.0);
+                let v1025 = C::valid_atomic_transaction(ctx, v1024);
+                if let Some(v1026) = v1025 {
+                    let v1027 = C::put_in_reg(ctx, v1021.1);
+                    let v1028 = C::put_in_reg(ctx, v1021.0);
+                    let v1029 = constructor_gen_atomic_store(ctx, v1027, v1026, v1028);
+                    // Rule at src/isa/riscv64/lower.isle line 1091.
+                    return Some(v1029);
+                }
+            }
+        }
+        &InstructionData::Ternary {
+            opcode: ref v954,
+            args: ref v955,
+        } => {
+            match v954 {
+                &Opcode::Select => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v292 = C::fits_in_64(ctx, v3);
+                        if let Some(v293) = v292 {
+                            let v956 = C::unpack_value_array_3(ctx, v955);
+                            let v1145 = C::def_inst(ctx, v956.0);
+                            if let Some(v1146) = v1145 {
+                                let v1147 = &C::inst_data(ctx, v1146);
+                                if let &InstructionData::IntCompare {
+                                    opcode: ref v1148,
+                                    args: ref v1149,
+                                    cond: ref v1150,
+                                } = v1147
+                                {
+                                    if let &Opcode::Icmp = v1148 {
+                                        let v1151 = C::unpack_value_array_2(ctx, v1149);
+                                        let v1154 = C::value_type(ctx, v1151.1);
+                                        let v1155 = C::fits_in_64(ctx, v1154);
+                                        if let Some(v1156) = v1155 {
+                                            let v1157 = C::put_in_regs(ctx, v1151.0);
+                                            let v1158 = &C::intcc_to_extend_op(ctx, v1150);
+                                            let v1159 = constructor_normalize_cmp_value(
+                                                ctx, v1156, v1157, v1158,
+                                            );
+                                            let v1160 =
+                                                constructor_truthy_to_reg(ctx, v1156, v1159);
+                                            let v1161 = C::put_in_regs(ctx, v1151.1);
+                                            let v1162 = &C::intcc_to_extend_op(ctx, v1150);
+                                            let v1163 = constructor_normalize_cmp_value(
+                                                ctx, v1156, v1161, v1162,
+                                            );
+                                            let v1164 =
+                                                constructor_truthy_to_reg(ctx, v1156, v1163);
+                                            let v1165 = C::put_in_reg(ctx, v956.1);
+                                            let v1166 = C::put_in_reg(ctx, v956.2);
+                                            let v1167 = C::gen_select_reg(
+                                                ctx, v1150, v1160, v1164, v1165, v1166,
+                                            );
+                                            let v1168 = constructor_output_reg(ctx, v1167);
+                                            // Rule at src/isa/riscv64/lower.isle line 1266.
+                                            return Some(v1168);
+                                        }
+                                    }
+                                }
+                            }
+                        }
+                        let v956 = C::unpack_value_array_3(ctx, v955);
+                        let v1137 = C::put_in_regs(ctx, v956.0);
+                        let v1136 = C::value_type(ctx, v956.0);
+                        let v1138 =
+                            constructor_normalize_cmp_value(ctx, v1136, v1137, &ExtendOp::Zero);
+                        let v1139 = constructor_truthy_to_reg(ctx, v1136, v1138);
+                        let v1141 = C::put_in_regs(ctx, v956.1);
+                        let v1142 = C::put_in_regs(ctx, v956.2);
+                        let v1140 = C::xreg_to_reg(ctx, v1139);
+                        let v1143 = constructor_gen_select(ctx, v3, v1140, v1141, v1142);
+                        let v1144 = C::output(ctx, v1143);
+                        // Rule at src/isa/riscv64/lower.isle line 1263.
+                        return Some(v1144);
+                    }
+                }
+                &Opcode::SelectSpectreGuard => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v956 = C::unpack_value_array_3(ctx, v955);
+                        let v1137 = C::put_in_regs(ctx, v956.0);
+                        let v1417 = C::value_type(ctx, v956.1);
+                        let v1136 = C::value_type(ctx, v956.0);
+                        let v1418 = constructor_lower_bmask(ctx, v1417, v1136, v1137);
+                        let v1419 = C::put_in_regs(ctx, v956.1);
+                        let v1420 = constructor_gen_and(ctx, v1417, v1419, v1418);
+                        let v1142 = C::put_in_regs(ctx, v956.2);
+                        let v1421 = constructor_gen_bnot(ctx, v1417, v1418);
+                        let v1422 = constructor_gen_and(ctx, v1417, v1142, v1421);
+                        let v1423 = constructor_gen_or(ctx, v1417, v1420, v1422);
+                        let v1424 = C::output(ctx, v1423);
+                        // Rule at src/isa/riscv64/lower.isle line 1602.
+                        return Some(v1424);
+                    }
+                }
+                &Opcode::Bitselect => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
+                        if let Some(v11) = v10 {
+                            let v956 = C::unpack_value_array_3(ctx, v955);
+                            let v1178 = constructor_put_in_vreg(ctx, v956.0);
+                            let v1179 = constructor_put_in_vreg(ctx, v956.1);
+                            let v165 = &constructor_unmasked(ctx);
+                            let v166 = C::vstate_from_type(ctx, v11);
+                            let v1180 = constructor_rv_vand_vv(ctx, v1178, v1179, v165, v166);
+                            let v1181 = constructor_put_in_vreg(ctx, v956.0);
+                            let v1182 = constructor_rv_vnot_v(ctx, v1181, v165, v166);
+                            let v1183 = constructor_put_in_vreg(ctx, v956.2);
+                            let v1184 = constructor_rv_vand_vv(ctx, v1182, v1183, v165, v166);
+                            let v1185 = constructor_rv_vor_vv(ctx, v1180, v1184, v165, v166);
+                            let v1186 = constructor_output_vreg(ctx, v1185);
+                            // Rule at src/isa/riscv64/lower.isle line 1286.
+                            return Some(v1186);
+                        }
+                        let v34 = C::ty_int_ref_scalar_64_extract(ctx, v3);
+                        if let Some(v35) = v34 {
+                            let v956 = C::unpack_value_array_3(ctx, v955);
+                            let v1169 = constructor_put_in_xreg(ctx, v956.0);
+                            let v1170 = constructor_put_in_xreg(ctx, v956.1);
+                            let v1171 = constructor_rv_and(ctx, v1169, v1170);
+                            let v1172 = constructor_put_in_xreg(ctx, v956.0);
+                            let v1173 = constructor_rv_not(ctx, v1172);
+                            let v1174 = constructor_put_in_xreg(ctx, v956.2);
+                            let v1175 = constructor_rv_and(ctx, v1173, v1174);
+                            let v1176 = constructor_rv_or(ctx, v1171, v1175);
+                            let v1177 = constructor_output_xreg(ctx, v1176);
+                            // Rule at src/isa/riscv64/lower.isle line 1275.
+                            return Some(v1177);
+                        }
+                    }
+                }
+                &Opcode::Fma => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v956 = C::unpack_value_array_3(ctx, v955);
+                        let v960 = constructor_put_in_freg(ctx, v956.0);
+                        let v961 = constructor_put_in_freg(ctx, v956.1);
+                        let v962 = constructor_put_in_freg(ctx, v956.2);
+                        let v3 = C::value_type(ctx, v2);
+                        let v963 = constructor_rv_fmadd(ctx, v3, v960, v961, v962);
+                        let v964 = constructor_output_freg(ctx, v963);
+                        // Rule at src/isa/riscv64/lower.isle line 1017.
+                        return Some(v964);
+                    }
+                }
+                _ => {}
+            }
+        }
+        &InstructionData::TernaryImm8 {
+            opcode: ref v1473,
+            args: ref v1474,
+            imm: v1475,
+        } => {
+            if let &Opcode::Insertlane = v1473 {
+                let v1476 = C::unpack_value_array_2(ctx, v1474);
+                let v1479 = C::value_type(ctx, v1476.0);
+                let v1480 = C::ty_vec_fits_in_register(ctx, v1479);
+                if let Some(v1481) = v1480 {
+                    let v1499 = C::def_inst(ctx, v1476.1);
+                    if let Some(v1500) = v1499 {
+                        let v1501 = &C::inst_data(ctx, v1500);
+                        if let &InstructionData::UnaryImm {
+                            opcode: ref v1502,
+                            imm: v1503,
+                        } = v1501
+                        {
+                            if let &Opcode::Iconst = v1502 {
+                                let v1504 = C::u64_from_imm64(ctx, v1503);
+                                let v1505 = C::imm5_from_u64(ctx, v1504);
+                                if let Some(v1506) = v1505 {
+                                    let v1485 = C::u8_from_uimm8(ctx, v1475);
+                                    let v1486 = C::u8_as_u64(ctx, v1485);
+                                    let v1487 = C::u64_shl(ctx, 0x1, v1486);
+                                    let v1488 = constructor_gen_vec_mask(ctx, v1487);
+                                    let v1489 = constructor_put_in_vreg(ctx, v1476.0);
+                                    let v1491 = C::vstate_from_type(ctx, v1481);
+                                    let v1507 =
+                                        constructor_rv_vmerge_vim(ctx, v1489, v1506, v1488, v1491);
+                                    let v1508 = constructor_output_vreg(ctx, v1507);
+                                    // Rule at src/isa/riscv64/lower.isle line 1695.
+                                    return Some(v1508);
+                                }
+                            }
+                        }
+                    }
+                    let v1482 = C::value_type(ctx, v1476.1);
+                    let v1494 = C::ty_scalar_float(ctx, v1482);
+                    if let Some(v1495) = v1494 {
+                        let v1485 = C::u8_from_uimm8(ctx, v1475);
+                        let v1486 = C::u8_as_u64(ctx, v1485);
+                        let v1487 = C::u64_shl(ctx, 0x1, v1486);
+                        let v1488 = constructor_gen_vec_mask(ctx, v1487);
+                        let v1489 = constructor_put_in_vreg(ctx, v1476.0);
+                        let v1496 = constructor_put_in_freg(ctx, v1476.1);
+                        let v1491 = C::vstate_from_type(ctx, v1481);
+                        let v1497 = constructor_rv_vfmerge_vfm(ctx, v1489, v1496, v1488, v1491);
+                        let v1498 = constructor_output_vreg(ctx, v1497);
+                        // Rule at src/isa/riscv64/lower.isle line 1687.
+                        return Some(v1498);
+                    }
+                    let v1483 = C::ty_int(ctx, v1482);
+                    if let Some(v1484) = v1483 {
+                        let v1485 = C::u8_from_uimm8(ctx, v1475);
+                        let v1486 = C::u8_as_u64(ctx, v1485);
+                        let v1487 = C::u64_shl(ctx, 0x1, v1486);
+                        let v1488 = constructor_gen_vec_mask(ctx, v1487);
+                        let v1489 = constructor_put_in_vreg(ctx, v1476.0);
+                        let v1490 = constructor_put_in_xreg(ctx, v1476.1);
+                        let v1491 = C::vstate_from_type(ctx, v1481);
+                        let v1492 = constructor_rv_vmerge_vxm(ctx, v1489, v1490, v1488, v1491);
+                        let v1493 = constructor_output_vreg(ctx, v1492);
+                        // Rule at src/isa/riscv64/lower.isle line 1680.
+                        return Some(v1493);
+                    }
+                }
+            }
+        }
+        &InstructionData::Trap {
+            opcode: ref v1249,
+            code: ref v1250,
+        } => {
+            match v1249 {
+                &Opcode::Trap => {
+                    let v1251 = constructor_udf(ctx, v1250);
+                    // Rule at src/isa/riscv64/lower.isle line 1378.
+                    return Some(v1251);
+                }
+                &Opcode::ResumableTrap => {
+                    let v1251 = constructor_udf(ctx, v1250);
+                    // Rule at src/isa/riscv64/lower.isle line 1383.
+                    return Some(v1251);
+                }
+                _ => {}
+            }
+        }
+        &InstructionData::Unary {
+            opcode: ref v365,
+            arg: v366,
+        } => {
+            match v365 {
+                &Opcode::Splat => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v643 = C::def_inst(ctx, v366);
+                        if let Some(v644) = v643 {
+                            let v648 = &C::inst_data(ctx, v644);
+                            if let &InstructionData::UnaryImm {
+                                opcode: ref v1518,
+                                imm: v1519,
+                            } = v648
+                            {
+                                if let &Opcode::Iconst = v1518 {
+                                    let v1520 = C::u64_from_imm64(ctx, v1519);
+                                    let v1521 = C::imm5_from_u64(ctx, v1520);
+                                    if let Some(v1522) = v1521 {
+                                        let v3 = C::value_type(ctx, v2);
+                                        let v1511 = C::vstate_from_type(ctx, v3);
+                                        let v1523 = constructor_rv_vmv_vi(ctx, v1522, v1511);
+                                        let v1524 = constructor_output_vreg(ctx, v1523);
+                                        // Rule at src/isa/riscv64/lower.isle line 1709.
+                                        return Some(v1524);
+                                    }
+                                }
+                            }
+                        }
+                        let v636 = C::value_type(ctx, v366);
+                        let v1514 = C::ty_int_ref_scalar_64_extract(ctx, v636);
+                        if let Some(v1515) = v1514 {
+                            let v610 = constructor_put_in_xreg(ctx, v366);
+                            let v3 = C::value_type(ctx, v2);
+                            let v1511 = C::vstate_from_type(ctx, v3);
+                            let v1516 = constructor_rv_vmv_vx(ctx, v610, v1511);
+                            let v1517 = constructor_output_vreg(ctx, v1516);
+                            // Rule at src/isa/riscv64/lower.isle line 1706.
+                            return Some(v1517);
+                        }
+                        let v1509 = C::ty_scalar_float(ctx, v636);
+                        if let Some(v1510) = v1509 {
+                            let v938 = constructor_put_in_freg(ctx, v366);
+                            let v3 = C::value_type(ctx, v2);
+                            let v1511 = C::vstate_from_type(ctx, v3);
+                            let v1512 = constructor_rv_vfmv_vf(ctx, v938, v1511);
+                            let v1513 = constructor_output_vreg(ctx, v1512);
+                            // Rule at src/isa/riscv64/lower.isle line 1703.
+                            return Some(v1513);
+                        }
+                    }
+                }
+                &Opcode::VanyTrue => {
+                    let v636 = C::value_type(ctx, v366);
+                    let v1553 = C::ty_vec_fits_in_register(ctx, v636);
+                    if let Some(v1554) = v1553 {
+                        let v370 = constructor_put_in_vreg(ctx, v366);
+                        let v1560 = constructor_put_in_vreg(ctx, v366);
+                        let v165 = &constructor_unmasked(ctx);
+                        let v1558 = C::vstate_from_type(ctx, v1554);
+                        let v1564 = constructor_rv_vredmaxu_vs(ctx, v370, v1560, v165, v1558);
+                        let v1565 = constructor_rv_vmv_xs(ctx, v1564, v1558);
+                        let v1566 = constructor_rv_snez(ctx, v1565);
+                        let v1567 = constructor_output_xreg(ctx, v1566);
+                        // Rule at src/isa/riscv64/lower.isle line 1790.
+                        return Some(v1567);
+                    }
+                }
+                &Opcode::VallTrue => {
+                    let v636 = C::value_type(ctx, v366);
+                    let v1553 = C::ty_vec_fits_in_register(ctx, v636);
+                    if let Some(v1554) = v1553 {
+                        let v1556 = C::imm5_from_i8(ctx, 0x1);
+                        if let Some(v1557) = v1556 {
+                            let v1558 = C::vstate_from_type(ctx, v1554);
+                            let v1559 = constructor_rv_vmv_vi(ctx, v1557, v1558);
+                            let v1560 = constructor_put_in_vreg(ctx, v366);
+                            let v165 = &constructor_unmasked(ctx);
+                            let v1561 = constructor_rv_vredminu_vs(ctx, v1560, v1559, v165, v1558);
+                            let v1562 = constructor_rv_vmv_xs(ctx, v1561, v1558);
+                            let v1563 = constructor_output_xreg(ctx, v1562);
+                            // Rule at src/isa/riscv64/lower.isle line 1776.
+                            return Some(v1563);
+                        }
+                    }
+                }
+                &Opcode::VhighBits => {
+                    let v636 = C::value_type(ctx, v366);
+                    let v1553 = C::ty_vec_fits_in_register(ctx, v636);
+                    if let Some(v1554) = v1553 {
+                        let v370 = constructor_put_in_vreg(ctx, v366);
+                        let v1568 = C::zero_reg(ctx);
+                        let v1569 = C::xreg_new(ctx, v1568);
+                        let v165 = &constructor_unmasked(ctx);
+                        let v1558 = C::vstate_from_type(ctx, v1554);
+                        let v1570 = constructor_rv_vmslt_vx(ctx, v370, v1569, v165, v1558);
+                        let v1572 = C::vstate_from_type(ctx, I64X2);
+                        let v1573 = constructor_rv_vmv_xs(ctx, v1570, v1572);
+                        let v1574 = C::ty_lane_mask(ctx, v1554);
+                        let v1575 = constructor_gen_andi(ctx, v1573, v1574);
+                        let v1576 = constructor_output_xreg(ctx, v1575);
+                        // Rule at src/isa/riscv64/lower.isle line 1806.
+                        return Some(v1576);
+                    }
+                }
+                &Opcode::Ineg => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
+                        if let Some(v11) = v10 {
+                            let v370 = constructor_put_in_vreg(ctx, v366);
+                            let v165 = &constructor_unmasked(ctx);
+                            let v166 = C::vstate_from_type(ctx, v11);
+                            let v371 = constructor_rv_vneg_v(ctx, v370, v165, v166);
+                            let v372 = constructor_output_vreg(ctx, v371);
+                            // Rule at src/isa/riscv64/lower.isle line 381.
+                            return Some(v372);
+                        }
+                        let v363 = C::ty_int(ctx, v3);
+                        if let Some(v364) = v363 {
+                            let v367 = C::put_in_regs(ctx, v366);
+                            let v368 = constructor_neg(ctx, v364, v367);
+                            let v369 = C::output(ctx, v368);
+                            // Rule at src/isa/riscv64/lower.isle line 378.
+                            return Some(v369);
+                        }
+                    }
+                }
+                &Opcode::Iabs => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
+                        if let Some(v11) = v10 {
+                            let v370 = constructor_put_in_vreg(ctx, v366);
+                            let v165 = &constructor_unmasked(ctx);
+                            let v166 = C::vstate_from_type(ctx, v11);
+                            let v371 = constructor_rv_vneg_v(ctx, v370, v165, v166);
+                            let v715 = constructor_put_in_vreg(ctx, v366);
+                            let v1443 = constructor_rv_vmax_vv(ctx, v715, v371, v165, v166);
+                            let v1444 = constructor_output_vreg(ctx, v1443);
+                            // Rule at src/isa/riscv64/lower.isle line 1649.
+                            return Some(v1444);
+                        }
+                        let v34 = C::ty_int_ref_scalar_64_extract(ctx, v3);
+                        if let Some(v35) = v34 {
+                            let v610 = constructor_put_in_xreg(ctx, v366);
+                            let v1439 = constructor_sext(ctx, v610, v35, I64);
+                            let v1440 = constructor_rv_neg(ctx, v1439);
+                            let v1441 = constructor_max(ctx, I64, v1439, v1440);
+                            let v1442 = constructor_output_xreg(ctx, v1441);
+                            // Rule at src/isa/riscv64/lower.isle line 1641.
+                            return Some(v1442);
+                        }
+                    }
+                }
+                &Opcode::Bnot => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
+                        if let Some(v11) = v10 {
+                            let v370 = constructor_put_in_vreg(ctx, v366);
+                            let v165 = &constructor_unmasked(ctx);
+                            let v166 = C::vstate_from_type(ctx, v11);
+                            let v595 = constructor_rv_vnot_v(ctx, v370, v165, v166);
+                            let v596 = constructor_output_vreg(ctx, v595);
+                            // Rule at src/isa/riscv64/lower.isle line 669.
+                            return Some(v596);
+                        }
+                        let v591 = C::ty_scalar(ctx, v3);
+                        if let Some(v592) = v591 {
+                            let v367 = C::put_in_regs(ctx, v366);
+                            let v593 = constructor_gen_bnot(ctx, v592, v367);
+                            let v594 = C::output(ctx, v593);
+                            // Rule at src/isa/riscv64/lower.isle line 666.
+                            return Some(v594);
+                        }
+                    }
+                }
+                &Opcode::Bitrev => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        if v3 == I128 {
+                            let v367 = C::put_in_regs(ctx, v366);
+                            let v600 = C::value_regs_get(ctx, v367, 0x0);
+                            let v601 = constructor_lower_bit_reverse(ctx, v600, I64);
+                            let v602 = C::xreg_new(ctx, v601);
+                            let v603 = C::value_regs_get(ctx, v367, 0x1);
+                            let v604 = constructor_lower_bit_reverse(ctx, v603, I64);
+                            let v605 = C::xreg_new(ctx, v604);
+                            let v606 = C::xreg_to_reg(ctx, v605);
+                            let v607 = C::xreg_to_reg(ctx, v602);
+                            let v608 = C::value_regs(ctx, v606, v607);
+                            let v609 = C::output(ctx, v608);
+                            // Rule at src/isa/riscv64/lower.isle line 676.
+                            return Some(v609);
+                        }
+                        let v292 = C::fits_in_64(ctx, v3);
+                        if let Some(v293) = v292 {
+                            let v473 = C::ty_int(ctx, v293);
+                            if let Some(v474) = v473 {
+                                let v597 = C::put_in_reg(ctx, v366);
+                                let v598 = constructor_lower_bit_reverse(ctx, v597, v474);
+                                let v599 = constructor_output_reg(ctx, v598);
+                                // Rule at src/isa/riscv64/lower.isle line 673.
+                                return Some(v599);
+                            }
+                        }
+                    }
+                }
+                &Opcode::Clz => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        if v3 == I128 {
+                            let v367 = C::put_in_regs(ctx, v366);
+                            let v630 = constructor_lower_clz_i128(ctx, v367);
+                            let v631 = C::output(ctx, v630);
+                            // Rule at src/isa/riscv64/lower.isle line 703.
+                            return Some(v631);
+                        }
+                        let v292 = C::fits_in_64(ctx, v3);
+                        if let Some(v293) = v292 {
+                            let v610 = constructor_put_in_xreg(ctx, v366);
+                            let v628 = constructor_lower_clz(ctx, v293, v610);
+                            let v629 = constructor_output_xreg(ctx, v628);
+                            // Rule at src/isa/riscv64/lower.isle line 700.
+                            return Some(v629);
+                        }
+                    }
+                }
+                &Opcode::Cls => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        if v3 == I128 {
+                            let v367 = C::put_in_regs(ctx, v366);
+                            let v634 = constructor_lower_cls_i128(ctx, v367);
+                            let v635 = C::output(ctx, v634);
+                            // Rule at src/isa/riscv64/lower.isle line 710.
+                            return Some(v635);
+                        }
+                        let v292 = C::fits_in_64(ctx, v3);
+                        if let Some(v293) = v292 {
+                            let v610 = constructor_put_in_xreg(ctx, v366);
+                            let v632 = constructor_lower_cls(ctx, v293, v610);
+                            let v633 = constructor_output_xreg(ctx, v632);
+                            // Rule at src/isa/riscv64/lower.isle line 707.
+                            return Some(v633);
+                        }
+                    }
+                }
+                &Opcode::Ctz => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        if v3 == I128 {
+                            let v367 = C::put_in_regs(ctx, v366);
+                            let v626 = constructor_lower_ctz_128(ctx, v367);
+                            let v627 = C::output(ctx, v626);
+                            // Rule at src/isa/riscv64/lower.isle line 696.
+                            return Some(v627);
+                        }
+                        let v292 = C::fits_in_64(ctx, v3);
+                        if let Some(v293) = v292 {
+                            let v597 = C::put_in_reg(ctx, v366);
+                            let v624 = constructor_lower_ctz(ctx, v293, v597);
+                            let v625 = constructor_output_reg(ctx, v624);
+                            // Rule at src/isa/riscv64/lower.isle line 693.
+                            return Some(v625);
+                        }
+                    }
+                }
+                &Opcode::Bswap => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        if v3 == I128 {
+                            let v367 = C::put_in_regs(ctx, v366);
+                            let v613 = C::value_regs_get(ctx, v367, 0x1);
+                            let v614 = C::xreg_new(ctx, v613);
+                            let v615 = constructor_gen_bswap(ctx, I64, v614);
+                            let v617 = C::put_in_regs(ctx, v366);
+                            let v618 = C::value_regs_get(ctx, v617, 0x0);
+                            let v619 = C::xreg_new(ctx, v618);
+                            let v620 = constructor_gen_bswap(ctx, I64, v619);
+                            let v616 = C::xreg_to_reg(ctx, v615);
+                            let v621 = C::xreg_to_reg(ctx, v620);
+                            let v622 = C::value_regs(ctx, v616, v621);
+                            let v623 = C::output(ctx, v622);
+                            // Rule at src/isa/riscv64/lower.isle line 686.
+                            return Some(v623);
+                        }
+                        let v292 = C::fits_in_64(ctx, v3);
+                        if let Some(v293) = v292 {
+                            let v473 = C::ty_int(ctx, v293);
+                            if let Some(v474) = v473 {
+                                let v610 = constructor_put_in_xreg(ctx, v366);
+                                let v611 = constructor_gen_bswap(ctx, v474, v610);
+                                let v612 = constructor_output_xreg(ctx, v611);
+                                // Rule at src/isa/riscv64/lower.isle line 683.
+                                return Some(v612);
+                            }
+                        }
+                    }
+                }
+                &Opcode::Popcnt => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
+                        if let Some(v11) = v10 {
+                            let v701 = constructor_u64_to_uimm5(ctx, 0x1);
+                            if let Some(v702) = v701 {
+                                let v704 = constructor_u64_to_uimm5(ctx, 0x2);
+                                if let Some(v705) = v704 {
+                                    let v707 = constructor_u64_to_uimm5(ctx, 0x4);
+                                    if let Some(v708) = v707 {
+                                        let v709 = C::lane_type(ctx, v11);
+                                        let v711 = C::ty_mask(ctx, v709);
+                                        let v712 = C::u64_and(ctx, 0x5555555555555555, v711);
+                                        let v713 = C::imm(ctx, v709, v712);
+                                        let v714 = C::xreg_new(ctx, v713);
+                                        let v715 = constructor_put_in_vreg(ctx, v366);
+                                        let v165 = &constructor_unmasked(ctx);
+                                        let v166 = C::vstate_from_type(ctx, v11);
+                                        let v716 =
+                                            constructor_rv_vsrl_vi(ctx, v715, v702, v165, v166);
+                                        let v717 =
+                                            constructor_rv_vand_vx(ctx, v716, v714, v165, v166);
+                                        let v718 = constructor_put_in_vreg(ctx, v366);
+                                        let v719 =
+                                            constructor_rv_vsub_vv(ctx, v718, v717, v165, v166);
+                                        let v721 = C::u64_and(ctx, 0x3333333333333333, v711);
+                                        let v722 = C::imm(ctx, v709, v721);
+                                        let v723 = C::xreg_new(ctx, v722);
+                                        let v724 =
+                                            constructor_rv_vsrl_vi(ctx, v719, v705, v165, v166);
+                                        let v725 =
+                                            constructor_rv_vand_vx(ctx, v724, v723, v165, v166);
+                                        let v726 =
+                                            constructor_rv_vand_vx(ctx, v719, v723, v165, v166);
+                                        let v727 =
+                                            constructor_rv_vadd_vv(ctx, v726, v725, v165, v166);
+                                        let v729 = C::u64_and(ctx, 0xF0F0F0F0F0F0F0F, v711);
+                                        let v730 = C::imm(ctx, v709, v729);
+                                        let v731 = C::xreg_new(ctx, v730);
+                                        let v732 =
+                                            constructor_rv_vsrl_vi(ctx, v727, v708, v165, v166);
+                                        let v733 =
+                                            constructor_rv_vadd_vv(ctx, v727, v732, v165, v166);
+                                        let v734 =
+                                            constructor_rv_vand_vx(ctx, v733, v731, v165, v166);
+                                        let v736 = C::u64_and(ctx, 0x101010101010101, v711);
+                                        let v737 = C::imm(ctx, v709, v736);
+                                        let v738 = C::xreg_new(ctx, v737);
+                                        let v739 =
+                                            constructor_rv_vmul_vx(ctx, v734, v738, v165, v166);
+                                        let v740 = C::ty_bits(ctx, v709);
+                                        let v741 = C::u8_as_u64(ctx, v740);
+                                        let v743 = C::u64_sub(ctx, v741, 0x8);
+                                        let v744 = C::imm(ctx, I64, v743);
+                                        let v745 = C::xreg_new(ctx, v744);
+                                        let v746 =
+                                            constructor_rv_vsrl_vx(ctx, v739, v745, v165, v166);
+                                        let v747 = constructor_output_vreg(ctx, v746);
+                                        // Rule at src/isa/riscv64/lower.isle line 774.
+                                        return Some(v747);
+                                    }
+                                }
+                            }
+                        }
+                        if v3 == I128 {
+                            let v367 = C::put_in_regs(ctx, v366);
+                            let v698 = constructor_lower_popcnt_i128(ctx, v367);
+                            let v699 = C::output(ctx, v698);
+                            // Rule at src/isa/riscv64/lower.isle line 759.
+                            return Some(v699);
+                        }
+                        let v34 = C::ty_int_ref_scalar_64_extract(ctx, v3);
+                        if let Some(v35) = v34 {
+                            let v610 = constructor_put_in_xreg(ctx, v366);
+                            let v696 = constructor_lower_popcnt(ctx, v610, v35);
+                            let v697 = constructor_output_xreg(ctx, v696);
+                            // Rule at src/isa/riscv64/lower.isle line 756.
+                            return Some(v697);
+                        }
+                    }
+                }
+                &Opcode::Sqrt => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
+                        if let Some(v11) = v10 {
+                            let v370 = constructor_put_in_vreg(ctx, v366);
+                            let v165 = &constructor_unmasked(ctx);
+                            let v166 = C::vstate_from_type(ctx, v11);
+                            let v967 = constructor_rv_vfsqrt_v(ctx, v370, v165, v166);
+                            let v968 = constructor_output_vreg(ctx, v967);
+                            // Rule at src/isa/riscv64/lower.isle line 1025.
+                            return Some(v968);
+                        }
+                        let v479 = C::ty_scalar_float(ctx, v3);
+                        if let Some(v480) = v479 {
+                            let v938 = constructor_put_in_freg(ctx, v366);
+                            let v965 = constructor_rv_fsqrt(ctx, v480, v938);
+                            let v966 = constructor_output_freg(ctx, v965);
+                            // Rule at src/isa/riscv64/lower.isle line 1022.
+                            return Some(v966);
+                        }
+                    }
+                }
+                &Opcode::Fneg => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
+                        if let Some(v11) = v10 {
+                            let v370 = constructor_put_in_vreg(ctx, v366);
+                            let v165 = &constructor_unmasked(ctx);
+                            let v166 = C::vstate_from_type(ctx, v11);
+                            let v945 = constructor_rv_vfneg_v(ctx, v370, v165, v166);
+                            let v946 = constructor_output_vreg(ctx, v945);
+                            // Rule at src/isa/riscv64/lower.isle line 1003.
+                            return Some(v946);
+                        }
+                        let v479 = C::ty_scalar_float(ctx, v3);
+                        if let Some(v480) = v479 {
+                            let v938 = constructor_put_in_freg(ctx, v366);
+                            let v943 = constructor_rv_fneg(ctx, v480, v938);
+                            let v944 = constructor_output_freg(ctx, v943);
+                            // Rule at src/isa/riscv64/lower.isle line 1000.
+                            return Some(v944);
+                        }
+                    }
+                }
+                &Opcode::Fabs => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
+                        if let Some(v11) = v10 {
+                            let v370 = constructor_put_in_vreg(ctx, v366);
+                            let v165 = &constructor_unmasked(ctx);
+                            let v166 = C::vstate_from_type(ctx, v11);
+                            let v941 = constructor_rv_vfabs_v(ctx, v370, v165, v166);
+                            let v942 = constructor_output_vreg(ctx, v941);
+                            // Rule at src/isa/riscv64/lower.isle line 996.
+                            return Some(v942);
+                        }
+                        let v479 = C::ty_scalar_float(ctx, v3);
+                        if let Some(v480) = v479 {
+                            let v938 = constructor_put_in_freg(ctx, v366);
+                            let v939 = constructor_rv_fabs(ctx, v480, v938);
+                            let v940 = constructor_output_freg(ctx, v939);
+                            // Rule at src/isa/riscv64/lower.isle line 993.
+                            return Some(v940);
+                        }
+                    }
+                }
+                &Opcode::Ceil => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v597 = C::put_in_reg(ctx, v366);
+                        let v3 = C::value_type(ctx, v2);
+                        let v1406 = constructor_gen_float_round(ctx, &FloatRoundOP::Ceil, v597, v3);
+                        let v1407 = constructor_output_reg(ctx, v1406);
+                        // Rule at src/isa/riscv64/lower.isle line 1576.
+                        return Some(v1407);
+                    }
+                }
+                &Opcode::Floor => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v597 = C::put_in_reg(ctx, v366);
+                        let v3 = C::value_type(ctx, v2);
+                        let v1409 =
+                            constructor_gen_float_round(ctx, &FloatRoundOP::Floor, v597, v3);
+                        let v1410 = constructor_output_reg(ctx, v1409);
+                        // Rule at src/isa/riscv64/lower.isle line 1582.
+                        return Some(v1410);
+                    }
+                }
+                &Opcode::Trunc => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v597 = C::put_in_reg(ctx, v366);
+                        let v3 = C::value_type(ctx, v2);
+                        let v1412 =
+                            constructor_gen_float_round(ctx, &FloatRoundOP::Trunc, v597, v3);
+                        let v1413 = constructor_output_reg(ctx, v1412);
+                        // Rule at src/isa/riscv64/lower.isle line 1586.
+                        return Some(v1413);
+                    }
+                }
+                &Opcode::Nearest => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v597 = C::put_in_reg(ctx, v366);
+                        let v3 = C::value_type(ctx, v2);
+                        let v1415 =
+                            constructor_gen_float_round(ctx, &FloatRoundOP::Nearest, v597, v3);
+                        let v1416 = constructor_output_reg(ctx, v1415);
+                        // Rule at src/isa/riscv64/lower.isle line 1591.
+                        return Some(v1416);
+                    }
+                }
+                &Opcode::IsNull => {
+                    let v610 = constructor_put_in_xreg(ctx, v366);
+                    let v1129 = constructor_rv_seqz(ctx, v610);
+                    let v1130 = constructor_output_xreg(ctx, v1129);
+                    // Rule at src/isa/riscv64/lower.isle line 1252.
+                    return Some(v1130);
+                }
+                &Opcode::IsInvalid => {
+                    let v610 = constructor_put_in_xreg(ctx, v366);
+                    let v1132 = C::imm12_const(ctx, 0x1);
+                    let v1133 = constructor_rv_addi(ctx, v610, v1132);
+                    let v1134 = constructor_rv_seqz(ctx, v1133);
+                    let v1135 = constructor_output_xreg(ctx, v1134);
+                    // Rule at src/isa/riscv64/lower.isle line 1258.
+                    return Some(v1135);
+                }
+                &Opcode::ScalarToVector => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
+                        if let Some(v11) = v10 {
+                            let v525 = C::ty_vector_not_float(ctx, v11);
+                            if let Some(v526) = v525 {
+                                let v1677 = C::zero_reg(ctx);
+                                let v1678 = C::xreg_new(ctx, v1677);
+                                let v166 = C::vstate_from_type(ctx, v11);
+                                let v1679 = constructor_rv_vmv_vx(ctx, v1678, v166);
+                                let v1680 = constructor_gen_vec_mask(ctx, 0x1);
+                                let v1681 = constructor_put_in_xreg(ctx, v366);
+                                let v1682 =
+                                    constructor_rv_vmerge_vxm(ctx, v1679, v1681, v1680, v166);
+                                let v1683 = constructor_output_vreg(ctx, v1682);
+                                // Rule at src/isa/riscv64/lower.isle line 1947.
+                                return Some(v1683);
+                            }
+                            let v1684 = C::ty_vector_float(ctx, v11);
+                            if let Some(v1685) = v1684 {
+                                let v1677 = C::zero_reg(ctx);
+                                let v1678 = C::xreg_new(ctx, v1677);
+                                let v166 = C::vstate_from_type(ctx, v11);
+                                let v1679 = constructor_rv_vmv_vx(ctx, v1678, v166);
+                                let v1686 = constructor_put_in_freg(ctx, v366);
+                                let v1687 = constructor_rv_vfmv_sf(ctx, v1686, v166);
+                                let v1688 = constructor_gen_vec_mask(ctx, 0x1);
+                                let v1689 =
+                                    constructor_rv_vmerge_vvm(ctx, v1679, v1687, v1688, v166);
+                                let v1690 = constructor_output_vreg(ctx, v1689);
+                                // Rule at src/isa/riscv64/lower.isle line 1953.
+                                return Some(v1690);
+                            }
+                        }
+                    }
+                }
+                &Opcode::Bmask => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v367 = C::put_in_regs(ctx, v366);
+                        let v3 = C::value_type(ctx, v2);
+                        let v636 = C::value_type(ctx, v366);
+                        let v1425 = constructor_lower_bmask(ctx, v3, v636, v367);
+                        let v1426 = C::output(ctx, v1425);
+                        // Rule at src/isa/riscv64/lower.isle line 1616.
+                        return Some(v1426);
+                    }
+                }
+                &Opcode::Ireduce => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v367 = C::put_in_regs(ctx, v366);
+                        let v600 = C::value_regs_get(ctx, v367, 0x0);
+                        let v1052 = constructor_output_reg(ctx, v600);
+                        // Rule at src/isa/riscv64/lower.isle line 1120.
+                        return Some(v1052);
+                    }
+                }
+                &Opcode::SwidenLow => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
+                        if let Some(v11) = v10 {
+                            let v643 = C::def_inst(ctx, v366);
+                            if let Some(v644) = v643 {
+                                let v648 = &C::inst_data(ctx, v644);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v1607,
+                                    arg: v1608,
+                                } = v648
+                                {
+                                    if let &Opcode::SwidenLow = v1607 {
+                                        let v1620 = C::def_inst(ctx, v1608);
+                                        if let Some(v1621) = v1620 {
+                                            let v1622 = &C::inst_data(ctx, v1621);
+                                            if let &InstructionData::Unary {
+                                                opcode: ref v1623,
+                                                arg: v1624,
+                                            } = v1622
+                                            {
+                                                if let &Opcode::SwidenLow = v1623 {
+                                                    let v1630 = constructor_put_in_vreg(ctx, v1624);
+                                                    let v165 = &constructor_unmasked(ctx);
+                                                    let v166 = C::vstate_from_type(ctx, v11);
+                                                    let v1645 = constructor_rv_vsext_vf8(
+                                                        ctx, v1630, v165, v166,
+                                                    );
+                                                    let v1646 = constructor_output_vreg(ctx, v1645);
+                                                    // Rule at src/isa/riscv64/lower.isle line 1878.
+                                                    return Some(v1646);
+                                                }
+                                            }
+                                        }
+                                        let v1615 = constructor_put_in_vreg(ctx, v1608);
+                                        let v165 = &constructor_unmasked(ctx);
+                                        let v166 = C::vstate_from_type(ctx, v11);
+                                        let v1643 =
+                                            constructor_rv_vsext_vf4(ctx, v1615, v165, v166);
+                                        let v1644 = constructor_output_vreg(ctx, v1643);
+                                        // Rule at src/isa/riscv64/lower.isle line 1875.
+                                        return Some(v1644);
+                                    }
+                                }
+                            }
+                            let v370 = constructor_put_in_vreg(ctx, v366);
+                            let v165 = &constructor_unmasked(ctx);
+                            let v166 = C::vstate_from_type(ctx, v11);
+                            let v1641 = constructor_rv_vsext_vf2(ctx, v370, v165, v166);
+                            let v1642 = constructor_output_vreg(ctx, v1641);
+                            // Rule at src/isa/riscv64/lower.isle line 1872.
+                            return Some(v1642);
+                        }
+                    }
+                }
+                &Opcode::SwidenHigh => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
+                        if let Some(v11) = v10 {
+                            let v643 = C::def_inst(ctx, v366);
+                            if let Some(v644) = v643 {
+                                let v648 = &C::inst_data(ctx, v644);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v1607,
+                                    arg: v1608,
+                                } = v648
+                                {
+                                    if let &Opcode::SwidenHigh = v1607 {
+                                        let v1620 = C::def_inst(ctx, v1608);
+                                        if let Some(v1621) = v1620 {
+                                            let v1622 = &C::inst_data(ctx, v1621);
+                                            if let &InstructionData::Unary {
+                                                opcode: ref v1623,
+                                                arg: v1624,
+                                            } = v1622
+                                            {
+                                                if let &Opcode::SwidenHigh = v1623 {
+                                                    let v1625 = C::value_type(ctx, v1624);
+                                                    let v1626 = C::ty_lane_count(ctx, v1625);
+                                                    let v1611 = C::ty_lane_count(ctx, v11);
+                                                    let v1627 = C::u64_sub(ctx, v1626, v1611);
+                                                    let v1628 = C::uimm5_from_u64(ctx, v1627);
+                                                    if let Some(v1629) = v1628 {
+                                                        let v1630 =
+                                                            constructor_put_in_vreg(ctx, v1624);
+                                                        let v165 = &constructor_unmasked(ctx);
+                                                        let v1631 = C::vstate_from_type(ctx, v1625);
+                                                        let v1632 = constructor_rv_vslidedown_vi(
+                                                            ctx, v1630, v1629, v165, v1631,
+                                                        );
+                                                        let v166 = C::vstate_from_type(ctx, v11);
+                                                        let v1633 = constructor_rv_vsext_vf8(
+                                                            ctx, v1632, v165, v166,
+                                                        );
+                                                        let v1634 =
+                                                            constructor_output_vreg(ctx, v1633);
+                                                        // Rule at src/isa/riscv64/lower.isle line 1852.
+                                                        return Some(v1634);
+                                                    }
+                                                }
+                                            }
+                                        }
+                                        let v1609 = C::value_type(ctx, v1608);
+                                        let v1610 = C::ty_lane_count(ctx, v1609);
+                                        let v1611 = C::ty_lane_count(ctx, v11);
+                                        let v1612 = C::u64_sub(ctx, v1610, v1611);
+                                        let v1613 = C::uimm5_from_u64(ctx, v1612);
+                                        if let Some(v1614) = v1613 {
+                                            let v1615 = constructor_put_in_vreg(ctx, v1608);
+                                            let v165 = &constructor_unmasked(ctx);
+                                            let v1616 = C::vstate_from_type(ctx, v1609);
+                                            let v1617 = constructor_rv_vslidedown_vi(
+                                                ctx, v1615, v1614, v165, v1616,
+                                            );
+                                            let v166 = C::vstate_from_type(ctx, v11);
+                                            let v1618 =
+                                                constructor_rv_vsext_vf4(ctx, v1617, v165, v166);
+                                            let v1619 = constructor_output_vreg(ctx, v1618);
+                                            // Rule at src/isa/riscv64/lower.isle line 1848.
+                                            return Some(v1619);
+                                        }
+                                    }
+                                }
+                            }
+                            let v370 = constructor_put_in_vreg(ctx, v366);
+                            let v636 = C::value_type(ctx, v366);
+                            let v1604 = constructor_gen_slidedown_half(ctx, v636, v370);
+                            let v165 = &constructor_unmasked(ctx);
+                            let v166 = C::vstate_from_type(ctx, v11);
+                            let v1605 = constructor_rv_vsext_vf2(ctx, v1604, v165, v166);
+                            let v1606 = constructor_output_vreg(ctx, v1605);
+                            // Rule at src/isa/riscv64/lower.isle line 1845.
+                            return Some(v1606);
+                        }
+                    }
+                }
+                &Opcode::UwidenLow => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
+                        if let Some(v11) = v10 {
+                            let v643 = C::def_inst(ctx, v366);
+                            if let Some(v644) = v643 {
+                                let v648 = &C::inst_data(ctx, v644);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v1607,
+                                    arg: v1608,
+                                } = v648
+                                {
+                                    if let &Opcode::UwidenLow = v1607 {
+                                        let v1620 = C::def_inst(ctx, v1608);
+                                        if let Some(v1621) = v1620 {
+                                            let v1622 = &C::inst_data(ctx, v1621);
+                                            if let &InstructionData::Unary {
+                                                opcode: ref v1623,
+                                                arg: v1624,
+                                            } = v1622
+                                            {
+                                                if let &Opcode::UwidenLow = v1623 {
+                                                    let v1630 = constructor_put_in_vreg(ctx, v1624);
+                                                    let v165 = &constructor_unmasked(ctx);
+                                                    let v166 = C::vstate_from_type(ctx, v11);
+                                                    let v1651 = constructor_rv_vzext_vf8(
+                                                        ctx, v1630, v165, v166,
+                                                    );
+                                                    let v1652 = constructor_output_vreg(ctx, v1651);
+                                                    // Rule at src/isa/riscv64/lower.isle line 1889.
+                                                    return Some(v1652);
+                                                }
+                                            }
+                                        }
+                                        let v1615 = constructor_put_in_vreg(ctx, v1608);
+                                        let v165 = &constructor_unmasked(ctx);
+                                        let v166 = C::vstate_from_type(ctx, v11);
+                                        let v1649 =
+                                            constructor_rv_vzext_vf4(ctx, v1615, v165, v166);
+                                        let v1650 = constructor_output_vreg(ctx, v1649);
+                                        // Rule at src/isa/riscv64/lower.isle line 1886.
+                                        return Some(v1650);
+                                    }
+                                }
+                            }
+                            let v370 = constructor_put_in_vreg(ctx, v366);
+                            let v165 = &constructor_unmasked(ctx);
+                            let v166 = C::vstate_from_type(ctx, v11);
+                            let v1647 = constructor_rv_vzext_vf2(ctx, v370, v165, v166);
+                            let v1648 = constructor_output_vreg(ctx, v1647);
+                            // Rule at src/isa/riscv64/lower.isle line 1883.
+                            return Some(v1648);
+                        }
+                    }
+                }
+                &Opcode::UwidenHigh => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
+                        if let Some(v11) = v10 {
+                            let v643 = C::def_inst(ctx, v366);
+                            if let Some(v644) = v643 {
+                                let v648 = &C::inst_data(ctx, v644);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v1607,
+                                    arg: v1608,
+                                } = v648
+                                {
+                                    if let &Opcode::UwidenHigh = v1607 {
+                                        let v1620 = C::def_inst(ctx, v1608);
+                                        if let Some(v1621) = v1620 {
+                                            let v1622 = &C::inst_data(ctx, v1621);
+                                            if let &InstructionData::Unary {
+                                                opcode: ref v1623,
+                                                arg: v1624,
+                                            } = v1622
+                                            {
+                                                if let &Opcode::UwidenHigh = v1623 {
+                                                    let v1625 = C::value_type(ctx, v1624);
+                                                    let v1626 = C::ty_lane_count(ctx, v1625);
+                                                    let v1611 = C::ty_lane_count(ctx, v11);
+                                                    let v1627 = C::u64_sub(ctx, v1626, v1611);
+                                                    let v1628 = C::uimm5_from_u64(ctx, v1627);
+                                                    if let Some(v1629) = v1628 {
+                                                        let v1630 =
+                                                            constructor_put_in_vreg(ctx, v1624);
+                                                        let v165 = &constructor_unmasked(ctx);
+                                                        let v1631 = C::vstate_from_type(ctx, v1625);
+                                                        let v1632 = constructor_rv_vslidedown_vi(
+                                                            ctx, v1630, v1629, v165, v1631,
+                                                        );
+                                                        let v166 = C::vstate_from_type(ctx, v11);
+                                                        let v1639 = constructor_rv_vzext_vf8(
+                                                            ctx, v1632, v165, v166,
+                                                        );
+                                                        let v1640 =
+                                                            constructor_output_vreg(ctx, v1639);
+                                                        // Rule at src/isa/riscv64/lower.isle line 1866.
+                                                        return Some(v1640);
+                                                    }
+                                                }
+                                            }
+                                        }
+                                        let v1609 = C::value_type(ctx, v1608);
+                                        let v1610 = C::ty_lane_count(ctx, v1609);
+                                        let v1611 = C::ty_lane_count(ctx, v11);
+                                        let v1612 = C::u64_sub(ctx, v1610, v1611);
+                                        let v1613 = C::uimm5_from_u64(ctx, v1612);
+                                        if let Some(v1614) = v1613 {
+                                            let v1615 = constructor_put_in_vreg(ctx, v1608);
+                                            let v165 = &constructor_unmasked(ctx);
+                                            let v1616 = C::vstate_from_type(ctx, v1609);
+                                            let v1617 = constructor_rv_vslidedown_vi(
+                                                ctx, v1615, v1614, v165, v1616,
+                                            );
+                                            let v166 = C::vstate_from_type(ctx, v11);
+                                            let v1637 =
+                                                constructor_rv_vzext_vf4(ctx, v1617, v165, v166);
+                                            let v1638 = constructor_output_vreg(ctx, v1637);
+                                            // Rule at src/isa/riscv64/lower.isle line 1862.
+                                            return Some(v1638);
+                                        }
+                                    }
+                                }
+                            }
+                            let v370 = constructor_put_in_vreg(ctx, v366);
+                            let v636 = C::value_type(ctx, v366);
+                            let v1604 = constructor_gen_slidedown_half(ctx, v636, v370);
+                            let v165 = &constructor_unmasked(ctx);
+                            let v166 = C::vstate_from_type(ctx, v11);
+                            let v1635 = constructor_rv_vzext_vf2(ctx, v1604, v165, v166);
+                            let v1636 = constructor_output_vreg(ctx, v1635);
+                            // Rule at src/isa/riscv64/lower.isle line 1859.
+                            return Some(v1636);
+                        }
+                    }
+                }
+                &Opcode::Uextend => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v367 = C::put_in_regs(ctx, v366);
+                        let v636 = C::value_type(ctx, v366);
+                        let v3 = C::value_type(ctx, v2);
+                        let v638 = constructor_extend(ctx, v367, &ExtendOp::Zero, v636, v3);
+                        let v639 = C::output(ctx, v638);
+                        // Rule at src/isa/riscv64/lower.isle line 714.
+                        return Some(v639);
+                    }
+                }
+                &Opcode::Sextend => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        if v3 == I64 {
+                            let v643 = C::def_inst(ctx, v366);
+                            if let Some(v644) = v643 {
+                                let v645 = C::first_result(ctx, v644);
+                                if let Some(v646) = v645 {
+                                    let v647 = C::value_type(ctx, v646);
+                                    if v647 == I32 {
+                                        let v648 = &C::inst_data(ctx, v644);
+                                        if let &InstructionData::Binary {
+                                            opcode: ref v649,
+                                            args: ref v650,
+                                        } = v648
+                                        {
+                                            match v649 {
+                                                &Opcode::Iadd => {
+                                                    let v651 = C::unpack_value_array_2(ctx, v650);
+                                                    let v679 = C::def_inst(ctx, v651.0);
+                                                    if let Some(v680) = v679 {
+                                                        let v681 = &C::inst_data(ctx, v680);
+                                                        if let &InstructionData::UnaryImm {
+                                                            opcode: ref v682,
+                                                            imm: v683,
+                                                        } = v681
+                                                        {
+                                                            if let &Opcode::Iconst = v682 {
+                                                                let v684 =
+                                                                    C::u64_from_imm64(ctx, v683);
+                                                                let v685 =
+                                                                    C::imm12_from_u64(ctx, v684);
+                                                                if let Some(v686) = v685 {
+                                                                    let v687 =
+                                                                        constructor_put_in_xreg(
+                                                                            ctx, v651.1,
+                                                                        );
+                                                                    let v688 = constructor_rv_addiw(
+                                                                        ctx, v687, v686,
+                                                                    );
+                                                                    let v689 =
+                                                                        constructor_output_xreg(
+                                                                            ctx, v688,
+                                                                        );
+                                                                    // Rule at src/isa/riscv64/lower.isle line 742.
+                                                                    return Some(v689);
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                    let v669 = C::def_inst(ctx, v651.1);
+                                                    if let Some(v670) = v669 {
+                                                        let v671 = &C::inst_data(ctx, v670);
+                                                        if let &InstructionData::UnaryImm {
+                                                            opcode: ref v672,
+                                                            imm: v673,
+                                                        } = v671
+                                                        {
+                                                            if let &Opcode::Iconst = v672 {
+                                                                let v674 =
+                                                                    C::u64_from_imm64(ctx, v673);
+                                                                let v675 =
+                                                                    C::imm12_from_u64(ctx, v674);
+                                                                if let Some(v676) = v675 {
+                                                                    let v654 =
+                                                                        constructor_put_in_xreg(
+                                                                            ctx, v651.0,
+                                                                        );
+                                                                    let v677 = constructor_rv_addiw(
+                                                                        ctx, v654, v676,
+                                                                    );
+                                                                    let v678 =
+                                                                        constructor_output_xreg(
+                                                                            ctx, v677,
+                                                                        );
+                                                                    // Rule at src/isa/riscv64/lower.isle line 739.
+                                                                    return Some(v678);
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                    let v654 = constructor_put_in_xreg(ctx, v651.0);
+                                                    let v655 = constructor_put_in_xreg(ctx, v651.1);
+                                                    let v656 = constructor_rv_addw(ctx, v654, v655);
+                                                    let v657 = constructor_output_xreg(ctx, v656);
+                                                    // Rule at src/isa/riscv64/lower.isle line 723.
+                                                    return Some(v657);
+                                                }
+                                                &Opcode::Isub => {
+                                                    let v651 = C::unpack_value_array_2(ctx, v650);
+                                                    let v654 = constructor_put_in_xreg(ctx, v651.0);
+                                                    let v655 = constructor_put_in_xreg(ctx, v651.1);
+                                                    let v658 = constructor_rv_subw(ctx, v654, v655);
+                                                    let v659 = constructor_output_xreg(ctx, v658);
+                                                    // Rule at src/isa/riscv64/lower.isle line 726.
+                                                    return Some(v659);
+                                                }
+                                                &Opcode::Ishl => {
+                                                    let v651 = C::unpack_value_array_2(ctx, v650);
+                                                    let v669 = C::def_inst(ctx, v651.1);
+                                                    if let Some(v670) = v669 {
+                                                        let v671 = &C::inst_data(ctx, v670);
+                                                        if let &InstructionData::UnaryImm {
+                                                            opcode: ref v672,
+                                                            imm: v673,
+                                                        } = v671
+                                                        {
+                                                            if let &Opcode::Iconst = v672 {
+                                                                let v674 =
+                                                                    C::u64_from_imm64(ctx, v673);
+                                                                let v675 =
+                                                                    C::imm12_from_u64(ctx, v674);
+                                                                if let Some(v676) = v675 {
+                                                                    let v654 =
+                                                                        constructor_put_in_xreg(
+                                                                            ctx, v651.0,
+                                                                        );
+                                                                    let v690 = constructor_rv_slliw(
+                                                                        ctx, v654, v676,
+                                                                    );
+                                                                    let v691 =
+                                                                        constructor_output_xreg(
+                                                                            ctx, v690,
+                                                                        );
+                                                                    // Rule at src/isa/riscv64/lower.isle line 745.
+                                                                    return Some(v691);
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                    let v654 = constructor_put_in_xreg(ctx, v651.0);
+                                                    let v660 = C::put_in_regs(ctx, v651.1);
+                                                    let v661 = C::value_regs_get(ctx, v660, 0x0);
+                                                    let v662 = C::xreg_new(ctx, v661);
+                                                    let v663 = constructor_rv_sllw(ctx, v654, v662);
+                                                    let v664 = constructor_output_xreg(ctx, v663);
+                                                    // Rule at src/isa/riscv64/lower.isle line 729.
+                                                    return Some(v664);
+                                                }
+                                                &Opcode::Ushr => {
+                                                    let v651 = C::unpack_value_array_2(ctx, v650);
+                                                    let v669 = C::def_inst(ctx, v651.1);
+                                                    if let Some(v670) = v669 {
+                                                        let v671 = &C::inst_data(ctx, v670);
+                                                        if let &InstructionData::UnaryImm {
+                                                            opcode: ref v672,
+                                                            imm: v673,
+                                                        } = v671
+                                                        {
+                                                            if let &Opcode::Iconst = v672 {
+                                                                let v674 =
+                                                                    C::u64_from_imm64(ctx, v673);
+                                                                let v675 =
+                                                                    C::imm12_from_u64(ctx, v674);
+                                                                if let Some(v676) = v675 {
+                                                                    let v654 =
+                                                                        constructor_put_in_xreg(
+                                                                            ctx, v651.0,
+                                                                        );
+                                                                    let v692 = constructor_rv_srliw(
+                                                                        ctx, v654, v676,
+                                                                    );
+                                                                    let v693 =
+                                                                        constructor_output_xreg(
+                                                                            ctx, v692,
+                                                                        );
+                                                                    // Rule at src/isa/riscv64/lower.isle line 748.
+                                                                    return Some(v693);
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                    let v654 = constructor_put_in_xreg(ctx, v651.0);
+                                                    let v660 = C::put_in_regs(ctx, v651.1);
+                                                    let v661 = C::value_regs_get(ctx, v660, 0x0);
+                                                    let v662 = C::xreg_new(ctx, v661);
+                                                    let v665 = constructor_rv_srlw(ctx, v654, v662);
+                                                    let v666 = constructor_output_xreg(ctx, v665);
+                                                    // Rule at src/isa/riscv64/lower.isle line 732.
+                                                    return Some(v666);
+                                                }
+                                                &Opcode::Sshr => {
+                                                    let v651 = C::unpack_value_array_2(ctx, v650);
+                                                    let v669 = C::def_inst(ctx, v651.1);
+                                                    if let Some(v670) = v669 {
+                                                        let v671 = &C::inst_data(ctx, v670);
+                                                        if let &InstructionData::UnaryImm {
+                                                            opcode: ref v672,
+                                                            imm: v673,
+                                                        } = v671
+                                                        {
+                                                            if let &Opcode::Iconst = v672 {
+                                                                let v674 =
+                                                                    C::u64_from_imm64(ctx, v673);
+                                                                let v675 =
+                                                                    C::imm12_from_u64(ctx, v674);
+                                                                if let Some(v676) = v675 {
+                                                                    let v654 =
+                                                                        constructor_put_in_xreg(
+                                                                            ctx, v651.0,
+                                                                        );
+                                                                    let v694 = constructor_rv_sraiw(
+                                                                        ctx, v654, v676,
+                                                                    );
+                                                                    let v695 =
+                                                                        constructor_output_xreg(
+                                                                            ctx, v694,
+                                                                        );
+                                                                    // Rule at src/isa/riscv64/lower.isle line 751.
+                                                                    return Some(v695);
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                    let v654 = constructor_put_in_xreg(ctx, v651.0);
+                                                    let v660 = C::put_in_regs(ctx, v651.1);
+                                                    let v661 = C::value_regs_get(ctx, v660, 0x0);
+                                                    let v662 = C::xreg_new(ctx, v661);
+                                                    let v667 = constructor_rv_sraw(ctx, v654, v662);
+                                                    let v668 = constructor_output_xreg(ctx, v667);
+                                                    // Rule at src/isa/riscv64/lower.isle line 735.
+                                                    return Some(v668);
+                                                }
+                                                _ => {}
+                                            }
+                                        }
+                                    }
+                                }
+                            }
+                        }
+                        let v367 = C::put_in_regs(ctx, v366);
+                        let v636 = C::value_type(ctx, v366);
+                        let v641 = constructor_extend(ctx, v367, &ExtendOp::Signed, v636, v3);
+                        let v642 = C::output(ctx, v641);
+                        // Rule at src/isa/riscv64/lower.isle line 718.
+                        return Some(v642);
+                    }
+                }
+                &Opcode::Fpromote => {
+                    let v938 = constructor_put_in_freg(ctx, v366);
+                    let v1053 = constructor_rv_fcvtds(ctx, v938);
+                    let v1054 = constructor_output_freg(ctx, v1053);
+                    // Rule at src/isa/riscv64/lower.isle line 1124.
+                    return Some(v1054);
+                }
+                &Opcode::Fdemote => {
+                    let v938 = constructor_put_in_freg(ctx, v366);
+                    let v1055 = constructor_rv_fcvtsd(ctx, v938);
+                    let v1056 = constructor_output_freg(ctx, v1055);
+                    // Rule at src/isa/riscv64/lower.isle line 1128.
+                    return Some(v1056);
+                }
+                &Opcode::FcvtToUint => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v938 = constructor_put_in_freg(ctx, v366);
+                        let v636 = C::value_type(ctx, v366);
+                        let v3 = C::value_type(ctx, v2);
+                        let v1374 = constructor_gen_fcvt_int(ctx, false, v938, false, v636, v3);
+                        let v1375 = constructor_output_xreg(ctx, v1374);
+                        // Rule at src/isa/riscv64/lower.isle line 1532.
+                        return Some(v1375);
+                    }
+                }
+                &Opcode::FcvtToSint => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v938 = constructor_put_in_freg(ctx, v366);
+                        let v636 = C::value_type(ctx, v366);
+                        let v3 = C::value_type(ctx, v2);
+                        let v1376 = constructor_gen_fcvt_int(ctx, false, v938, true, v636, v3);
+                        let v1377 = constructor_output_xreg(ctx, v1376);
+                        // Rule at src/isa/riscv64/lower.isle line 1537.
+                        return Some(v1377);
+                    }
+                }
+                &Opcode::FcvtToUintSat => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v938 = constructor_put_in_freg(ctx, v366);
+                        let v636 = C::value_type(ctx, v366);
+                        let v3 = C::value_type(ctx, v2);
+                        let v1380 = constructor_gen_fcvt_int(ctx, true, v938, false, v636, v3);
+                        let v1381 = constructor_output_xreg(ctx, v1380);
+                        // Rule at src/isa/riscv64/lower.isle line 1547.
+                        return Some(v1381);
+                    }
+                }
+                &Opcode::FcvtToSintSat => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v938 = constructor_put_in_freg(ctx, v366);
+                        let v636 = C::value_type(ctx, v366);
+                        let v3 = C::value_type(ctx, v2);
+                        let v1378 = constructor_gen_fcvt_int(ctx, true, v938, true, v636, v3);
+                        let v1379 = constructor_output_xreg(ctx, v1378);
+                        // Rule at src/isa/riscv64/lower.isle line 1542.
+                        return Some(v1379);
+                    }
+                }
+                &Opcode::FcvtFromUint => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v636 = C::value_type(ctx, v366);
+                        let v3 = C::value_type(ctx, v2);
+                        let v1388 = &C::int_convert_2_float_op(ctx, v636, false, v3);
+                        let v1383 = constructor_put_in_xreg(ctx, v366);
+                        let v1389 =
+                            constructor_normalize_fcvt_from_int(ctx, v1383, v636, &ExtendOp::Zero);
+                        let v1390 = C::xreg_to_reg(ctx, v1389);
+                        let v1391 = constructor_fpu_rr(ctx, v1388, v3, v1390);
+                        let v1392 = constructor_output_reg(ctx, v1391);
+                        // Rule at src/isa/riscv64/lower.isle line 1559.
+                        return Some(v1392);
+                    }
+                }
+                &Opcode::FcvtFromSint => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v636 = C::value_type(ctx, v366);
+                        let v3 = C::value_type(ctx, v2);
+                        let v1382 = &C::int_convert_2_float_op(ctx, v636, true, v3);
+                        let v1383 = constructor_put_in_xreg(ctx, v366);
+                        let v1384 = constructor_normalize_fcvt_from_int(
+                            ctx,
+                            v1383,
+                            v636,
+                            &ExtendOp::Signed,
+                        );
+                        let v1385 = C::xreg_to_reg(ctx, v1384);
+                        let v1386 = constructor_fpu_rr(ctx, v1382, v3, v1385);
+                        let v1387 = constructor_output_reg(ctx, v1386);
+                        // Rule at src/isa/riscv64/lower.isle line 1552.
+                        return Some(v1387);
+                    }
+                }
+                &Opcode::Isplit => {
+                    let v367 = C::put_in_regs(ctx, v366);
+                    let v600 = C::value_regs_get(ctx, v367, 0x0);
+                    let v1187 = C::xreg_new(ctx, v600);
+                    let v1188 = C::put_in_regs(ctx, v366);
+                    let v1189 = C::value_regs_get(ctx, v1188, 0x1);
+                    let v1190 = C::xreg_new(ctx, v1189);
+                    let v1191 = C::xreg_to_reg(ctx, v1187);
+                    let v1192 = C::value_reg(ctx, v1191);
+                    let v1193 = C::xreg_to_reg(ctx, v1190);
+                    let v1194 = C::value_reg(ctx, v1193);
+                    let v1195 = C::output_pair(ctx, v1192, v1194);
+                    // Rule at src/isa/riscv64/lower.isle line 1294.
+                    return Some(v1195);
+                }
+                _ => {}
+            }
+        }
+        &InstructionData::UnaryConst {
+            opcode: ref v12,
+            constant_handle: v13,
+        } => {
+            if let &Opcode::Vconst = v12 {
+                let v1 = C::first_result(ctx, arg0);
+                if let Some(v2) = v1 {
+                    let v3 = C::value_type(ctx, v2);
+                    let v10 = C::ty_vec_fits_in_register(ctx, v3);
+                    if let Some(v11) = v10 {
+                        let v14 = C::const_to_vconst(ctx, v13);
+                        let v15 = constructor_gen_constant(ctx, v11, v14);
+                        let v16 = constructor_output_vreg(ctx, v15);
+                        // Rule at src/isa/riscv64/lower.isle line 14.
+                        return Some(v16);
+                    }
+                }
+            }
+        }
+        &InstructionData::UnaryGlobalValue {
+            opcode: ref v1393,
+            global_value: v1394,
+        } => {
+            if let &Opcode::SymbolValue = v1393 {
+                let v1395 = C::symbol_value_data(ctx, v1394);
+                if let Some(v1396) = v1395 {
+                    let v1400 = C::load_ext_name(ctx, v1396.0, v1396.2);
+                    let v1401 = constructor_output_reg(ctx, v1400);
+                    // Rule at src/isa/riscv64/lower.isle line 1566.
+                    return Some(v1401);
+                }
+            }
+        }
+        &InstructionData::UnaryIeee32 {
+            opcode: ref v17,
+            imm: v18,
+        } => {
+            if let &Opcode::F32const = v17 {
+                let v19 = C::u32_from_ieee32(ctx, v18);
+                let v21 = C::u32_as_u64(ctx, v19);
+                let v22 = C::imm(ctx, F32, v21);
+                let v23 = constructor_output_reg(ctx, v22);
+                // Rule at src/isa/riscv64/lower.isle line 19.
+                return Some(v23);
+            }
+        }
+        &InstructionData::UnaryIeee64 {
+            opcode: ref v24,
+            imm: v25,
+        } => {
+            if let &Opcode::F64const = v24 {
+                let v26 = C::u64_from_ieee64(ctx, v25);
+                let v28 = C::imm(ctx, F64, v26);
+                let v29 = constructor_output_reg(ctx, v28);
+                // Rule at src/isa/riscv64/lower.isle line 24.
+                return Some(v29);
+            }
+        }
+        &InstructionData::UnaryImm {
+            opcode: ref v5,
+            imm: v6,
+        } => {
+            if let &Opcode::Iconst = v5 {
+                let v1 = C::first_result(ctx, arg0);
+                if let Some(v2) = v1 {
+                    let v3 = C::value_type(ctx, v2);
+                    let v7 = C::u64_from_imm64(ctx, v6);
+                    let v8 = C::imm(ctx, v3, v7);
+                    let v9 = constructor_output_reg(ctx, v8);
+                    // Rule at src/isa/riscv64/lower.isle line 9.
+                    return Some(v9);
+                }
+            }
+        }
+        _ => {}
+    }
+    None
+}
+
+// Generated as internal constructor for term match_shnadd.
+pub fn constructor_match_shnadd<C: Context>(ctx: &mut C, arg0: Imm64) -> Option<AluOPRRR> {
+    let v1 = C::u64_from_imm64(ctx, arg0);
+    match v1 {
+        0x1 => {
+            // Rule at src/isa/riscv64/lower.isle line 58.
+            return Some(AluOPRRR::Sh1add);
+        }
+        0x2 => {
+            // Rule at src/isa/riscv64/lower.isle line 59.
+            return Some(AluOPRRR::Sh2add);
+        }
+        0x3 => {
+            // Rule at src/isa/riscv64/lower.isle line 60.
+            return Some(AluOPRRR::Sh3add);
+        }
+        _ => {}
+    }
+    None
+}
+
+// Generated as internal constructor for term match_shnadd_uw.
+pub fn constructor_match_shnadd_uw<C: Context>(ctx: &mut C, arg0: Imm64) -> Option<AluOPRRR> {
+    let v1 = C::u64_from_imm64(ctx, arg0);
+    match v1 {
+        0x1 => {
+            // Rule at src/isa/riscv64/lower.isle line 80.
+            return Some(AluOPRRR::Sh1adduw);
+        }
+        0x2 => {
+            // Rule at src/isa/riscv64/lower.isle line 81.
+            return Some(AluOPRRR::Sh2adduw);
+        }
+        0x3 => {
+            // Rule at src/isa/riscv64/lower.isle line 82.
+            return Some(AluOPRRR::Sh3adduw);
+        }
+        _ => {}
+    }
+    None
+}
+
+// Generated as internal constructor for term gen_atomic_rmw_loop.
+pub fn constructor_gen_atomic_rmw_loop<C: Context>(
+    ctx: &mut C,
+    arg0: &AtomicRmwOp,
+    arg1: Type,
+    arg2: XReg,
+    arg3: XReg,
+) -> XReg {
+    let v4 = constructor_temp_writable_xreg(ctx);
+    let v5 = constructor_temp_writable_xreg(ctx);
+    let v6 = constructor_gen_atomic_offset(ctx, arg2, arg1);
+    let v9 = constructor_gen_atomic_p(ctx, arg2, arg1);
+    let v7 = C::xreg_to_reg(ctx, v6);
+    let v8 = C::writable_xreg_to_writable_reg(ctx, v4);
+    let v10 = C::xreg_to_reg(ctx, v9);
+    let v11 = C::xreg_to_reg(ctx, arg3);
+    let v12 = C::writable_xreg_to_writable_reg(ctx, v5);
+    let v13 = MInst::AtomicRmwLoop {
+        offset: v7,
+        op: arg0.clone(),
+        dst: v8,
+        ty: arg1,
+        p: v10,
+        x: v11,
+        t0: v12,
+    };
+    let v14 = C::emit(ctx, &v13);
+    let v15 = C::writable_reg_to_reg(ctx, v8);
+    let v16 = C::xreg_new(ctx, v15);
+    // Rule at src/isa/riscv64/lower.isle line 1067.
+    return v16;
+}
+
+// Generated as internal constructor for term gen_atomic_offset.
+pub fn constructor_gen_atomic_offset<C: Context>(ctx: &mut C, arg0: XReg, arg1: Type) -> XReg {
+    let v2 = C::fits_in_16(ctx, arg1);
+    if let Some(v3) = v2 {
+        let v5 = C::imm12_const(ctx, 0x3);
+        let v6 = constructor_rv_andi(ctx, arg0, v5);
+        let v7 = constructor_rv_slli(ctx, v6, v5);
+        // Rule at src/isa/riscv64/lower.isle line 1095.
+        return v7;
+    }
+    let v8 = C::zero_reg(ctx);
+    let v9 = C::xreg_new(ctx, v8);
+    // Rule at src/isa/riscv64/lower.isle line 1098.
+    return v9;
+}
+
+// Generated as internal constructor for term gen_atomic_p.
+pub fn constructor_gen_atomic_p<C: Context>(ctx: &mut C, arg0: XReg, arg1: Type) -> XReg {
+    let v2 = C::fits_in_16(ctx, arg1);
+    if let Some(v3) = v2 {
+        let v5 = C::imm12_const(ctx, -0x4);
+        let v6 = constructor_rv_andi(ctx, arg0, v5);
+        // Rule at src/isa/riscv64/lower.isle line 1102.
+        return v6;
+    }
+    // Rule at src/isa/riscv64/lower.isle line 1105.
+    return arg0;
+}
+
+// Generated as internal constructor for term gen_load64_extend.
+pub fn constructor_gen_load64_extend<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &ExtendOp,
+    arg2: MemFlags,
+    arg3: XReg,
+    arg4: Offset32,
+) -> VReg {
+    match arg1 {
+        &ExtendOp::Zero => {
+            let v8 = C::xreg_to_reg(ctx, arg3);
+            let v9 = C::gen_amode(ctx, v8, arg4, I64);
+            let v6 = &constructor_element_width_from_type(ctx, I64);
+            let v10 = VecAMode::UnitStride { base: v9 };
+            let v11 = &constructor_unmasked(ctx);
+            let v7 = C::vstate_from_type(ctx, I64);
+            let v12 = constructor_vec_load(ctx, v6, &v10, arg2, v11, v7);
+            let v13 = C::vreg_new(ctx, v12);
+            let v14 = C::vstate_from_type(ctx, arg0);
+            let v16 = constructor_rv_vzext_vf2(ctx, v13, v11, v14);
+            // Rule at src/isa/riscv64/lower.isle line 1443.
+            return v16;
+        }
+        &ExtendOp::Signed => {
+            let v8 = C::xreg_to_reg(ctx, arg3);
+            let v9 = C::gen_amode(ctx, v8, arg4, I64);
+            let v6 = &constructor_element_width_from_type(ctx, I64);
+            let v10 = VecAMode::UnitStride { base: v9 };
+            let v11 = &constructor_unmasked(ctx);
+            let v7 = C::vstate_from_type(ctx, I64);
+            let v12 = constructor_vec_load(ctx, v6, &v10, arg2, v11, v7);
+            let v13 = C::vreg_new(ctx, v12);
+            let v14 = C::vstate_from_type(ctx, arg0);
+            let v15 = constructor_rv_vsext_vf2(ctx, v13, v11, v14);
+            // Rule at src/isa/riscv64/lower.isle line 1437.
+            return v15;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "gen_load64_extend", "src/isa/riscv64/lower.isle line 1435"
+    )
+}
+
+// Generated as internal constructor for term gen_icmp.
+pub fn constructor_gen_icmp<C: Context>(
+    ctx: &mut C,
+    arg0: &IntCC,
+    arg1: ValueRegs,
+    arg2: ValueRegs,
+    arg3: Type,
+) -> XReg {
+    let v4 = constructor_temp_writable_xreg(ctx);
+    let v5 = C::writable_xreg_to_writable_reg(ctx, v4);
+    let v6 = MInst::Icmp {
+        cc: arg0.clone(),
+        rd: v5,
+        a: arg1,
+        b: arg2,
+        ty: arg3,
+    };
+    let v7 = C::emit(ctx, &v6);
+    let v8 = C::writable_xreg_to_xreg(ctx, v4);
+    // Rule at src/isa/riscv64/lower.isle line 1504.
+    return v8;
+}
diff --git a/cranelift/codegen/isle_generated_code/isle_s390x.rs b/cranelift/codegen/isle_generated_code/isle_s390x.rs
new file mode 100644
index 000000000000..a2f99fb6e477
--- /dev/null
+++ b/cranelift/codegen/isle_generated_code/isle_s390x.rs
@@ -0,0 +1,25403 @@
+// GENERATED BY ISLE. DO NOT EDIT!
+//
+// Generated automatically from the instruction-selection DSL code in:
+// - src/prelude.isle
+// - src/prelude_lower.isle
+// - src/isa/s390x/inst.isle
+// - src/isa/s390x/lower.isle
+// - /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_lower.isle
+
+use super::*; // Pulls in all external types.
+use std::marker::PhantomData;
+
+/// Context during lowering: an implementation of this trait
+/// must be provided with all external constructors and extractors.
+/// A mutable borrow is passed along through all lowering logic.
+pub trait Context {
+    fn unit(&mut self) -> Unit;
+    fn value_type(&mut self, arg0: Value) -> Type;
+    fn u32_nonnegative(&mut self, arg0: u32) -> Option<u32>;
+    fn offset32(&mut self, arg0: Offset32) -> u32;
+    fn u32_lteq(&mut self, arg0: u32, arg1: u32) -> Option<Unit>;
+    fn u8_lteq(&mut self, arg0: u8, arg1: u8) -> Option<Unit>;
+    fn u8_lt(&mut self, arg0: u8, arg1: u8) -> Option<Unit>;
+    fn simm32(&mut self, arg0: Imm64) -> Option<u32>;
+    fn uimm8(&mut self, arg0: Imm64) -> Option<u8>;
+    fn u8_as_u32(&mut self, arg0: u8) -> u32;
+    fn u8_as_u64(&mut self, arg0: u8) -> u64;
+    fn u16_as_u64(&mut self, arg0: u16) -> u64;
+    fn u32_as_u64(&mut self, arg0: u32) -> u64;
+    fn i64_as_u64(&mut self, arg0: i64) -> u64;
+    fn i64_neg(&mut self, arg0: i64) -> i64;
+    fn u128_as_u64(&mut self, arg0: u128) -> Option<u64>;
+    fn u64_as_u32(&mut self, arg0: u64) -> Option<u32>;
+    fn u64_as_i32(&mut self, arg0: u64) -> i32;
+    fn u8_and(&mut self, arg0: u8, arg1: u8) -> u8;
+    fn u8_shl(&mut self, arg0: u8, arg1: u8) -> u8;
+    fn u8_shr(&mut self, arg0: u8, arg1: u8) -> u8;
+    fn u32_add(&mut self, arg0: u32, arg1: u32) -> u32;
+    fn u32_sub(&mut self, arg0: u32, arg1: u32) -> u32;
+    fn u32_and(&mut self, arg0: u32, arg1: u32) -> u32;
+    fn s32_add_fallible(&mut self, arg0: u32, arg1: u32) -> Option<u32>;
+    fn u64_add(&mut self, arg0: u64, arg1: u64) -> u64;
+    fn u64_sub(&mut self, arg0: u64, arg1: u64) -> u64;
+    fn u64_mul(&mut self, arg0: u64, arg1: u64) -> u64;
+    fn u64_sdiv(&mut self, arg0: u64, arg1: u64) -> Option<u64>;
+    fn u64_udiv(&mut self, arg0: u64, arg1: u64) -> Option<u64>;
+    fn u64_and(&mut self, arg0: u64, arg1: u64) -> u64;
+    fn u64_or(&mut self, arg0: u64, arg1: u64) -> u64;
+    fn u64_xor(&mut self, arg0: u64, arg1: u64) -> u64;
+    fn u64_shl(&mut self, arg0: u64, arg1: u64) -> u64;
+    fn imm64_shl(&mut self, arg0: Type, arg1: Imm64, arg2: Imm64) -> Imm64;
+    fn imm64_ushr(&mut self, arg0: Type, arg1: Imm64, arg2: Imm64) -> Imm64;
+    fn imm64_sshr(&mut self, arg0: Type, arg1: Imm64, arg2: Imm64) -> Imm64;
+    fn u64_not(&mut self, arg0: u64) -> u64;
+    fn u64_eq(&mut self, arg0: u64, arg1: u64) -> bool;
+    fn u64_le(&mut self, arg0: u64, arg1: u64) -> bool;
+    fn u64_lt(&mut self, arg0: u64, arg1: u64) -> bool;
+    fn i64_sextend_imm64(&mut self, arg0: Type, arg1: Imm64) -> i64;
+    fn u64_uextend_imm64(&mut self, arg0: Type, arg1: Imm64) -> u64;
+    fn imm64_icmp(&mut self, arg0: Type, arg1: &IntCC, arg2: Imm64, arg3: Imm64) -> Imm64;
+    fn u64_is_zero(&mut self, arg0: u64) -> bool;
+    fn u64_is_odd(&mut self, arg0: u64) -> bool;
+    fn ty_umin(&mut self, arg0: Type) -> u64;
+    fn ty_umax(&mut self, arg0: Type) -> u64;
+    fn ty_smin(&mut self, arg0: Type) -> u64;
+    fn ty_smax(&mut self, arg0: Type) -> u64;
+    fn ty_bits(&mut self, arg0: Type) -> u8;
+    fn ty_bits_u16(&mut self, arg0: Type) -> u16;
+    fn ty_bits_u64(&mut self, arg0: Type) -> u64;
+    fn ty_mask(&mut self, arg0: Type) -> u64;
+    fn ty_lane_mask(&mut self, arg0: Type) -> u64;
+    fn ty_lane_count(&mut self, arg0: Type) -> u64;
+    fn ty_bytes(&mut self, arg0: Type) -> u16;
+    fn lane_type(&mut self, arg0: Type) -> Type;
+    fn ty_half_lanes(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_half_width(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_equal(&mut self, arg0: Type, arg1: Type) -> bool;
+    fn mem_flags_trusted(&mut self) -> MemFlags;
+    fn intcc_reverse(&mut self, arg0: &IntCC) -> IntCC;
+    fn intcc_inverse(&mut self, arg0: &IntCC) -> IntCC;
+    fn floatcc_reverse(&mut self, arg0: &FloatCC) -> FloatCC;
+    fn floatcc_inverse(&mut self, arg0: &FloatCC) -> FloatCC;
+    fn floatcc_unordered(&mut self, arg0: &FloatCC) -> bool;
+    fn fits_in_16(&mut self, arg0: Type) -> Option<Type>;
+    fn fits_in_32(&mut self, arg0: Type) -> Option<Type>;
+    fn lane_fits_in_32(&mut self, arg0: Type) -> Option<Type>;
+    fn fits_in_64(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_32(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_64(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_int_ref_scalar_64_extract(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_int_ref_scalar_64(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_32_or_64(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_8_or_16(&mut self, arg0: Type) -> Option<Type>;
+    fn int_fits_in_32(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_int_ref_64(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_int_ref_16_to_64(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_int(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_scalar(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_scalar_float(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_float_or_vec(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_vector_float(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_vector_not_float(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_vec64(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_vec64_ctor(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_vec128(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_dyn_vec64(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_dyn_vec128(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_vec64_int(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_vec128_int(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_addr64(&mut self, arg0: Type) -> Option<Type>;
+    fn not_vec32x2(&mut self, arg0: Type) -> Option<Type>;
+    fn not_i64x2(&mut self, arg0: Type) -> Option<()>;
+    fn u8_from_uimm8(&mut self, arg0: Uimm8) -> u8;
+    fn u64_from_bool(&mut self, arg0: bool) -> u64;
+    fn u64_from_imm64(&mut self, arg0: Imm64) -> u64;
+    fn nonzero_u64_from_imm64(&mut self, arg0: Imm64) -> Option<u64>;
+    fn imm64_power_of_two(&mut self, arg0: Imm64) -> Option<u64>;
+    fn imm64(&mut self, arg0: u64) -> Imm64;
+    fn imm64_masked(&mut self, arg0: Type, arg1: u64) -> Imm64;
+    fn u32_from_ieee32(&mut self, arg0: Ieee32) -> u32;
+    fn u64_from_ieee64(&mut self, arg0: Ieee64) -> u64;
+    fn multi_lane(&mut self, arg0: Type) -> Option<(u32, u32)>;
+    fn dynamic_lane(&mut self, arg0: Type) -> Option<(u32, u32)>;
+    fn dynamic_int_lane(&mut self, arg0: Type) -> Option<u32>;
+    fn dynamic_fp_lane(&mut self, arg0: Type) -> Option<u32>;
+    fn ty_dyn64_int(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_dyn128_int(&mut self, arg0: Type) -> Option<Type>;
+    fn offset32_to_u32(&mut self, arg0: Offset32) -> u32;
+    fn u32_to_offset32(&mut self, arg0: u32) -> Offset32;
+    fn intcc_unsigned(&mut self, arg0: &IntCC) -> IntCC;
+    fn signed_cond_code(&mut self, arg0: &IntCC) -> Option<IntCC>;
+    fn trap_code_division_by_zero(&mut self) -> TrapCode;
+    fn trap_code_integer_overflow(&mut self) -> TrapCode;
+    fn trap_code_bad_conversion_to_integer(&mut self) -> TrapCode;
+    fn range(&mut self, arg0: usize, arg1: usize) -> Range;
+    fn range_view(&mut self, arg0: Range) -> RangeView;
+    fn value_reg(&mut self, arg0: Reg) -> ValueRegs;
+    fn value_regs(&mut self, arg0: Reg, arg1: Reg) -> ValueRegs;
+    fn value_regs_invalid(&mut self) -> ValueRegs;
+    fn output_none(&mut self) -> InstOutput;
+    fn output(&mut self, arg0: ValueRegs) -> InstOutput;
+    fn output_pair(&mut self, arg0: ValueRegs, arg1: ValueRegs) -> InstOutput;
+    fn output_builder_new(&mut self) -> InstOutputBuilder;
+    fn output_builder_push(&mut self, arg0: &InstOutputBuilder, arg1: ValueRegs) -> Unit;
+    fn output_builder_finish(&mut self, arg0: &InstOutputBuilder) -> InstOutput;
+    fn temp_writable_reg(&mut self, arg0: Type) -> WritableReg;
+    fn is_valid_reg(&mut self, arg0: Reg) -> bool;
+    fn invalid_reg(&mut self) -> Reg;
+    fn mark_value_used(&mut self, arg0: Value) -> Unit;
+    fn put_in_reg(&mut self, arg0: Value) -> Reg;
+    fn put_in_regs(&mut self, arg0: Value) -> ValueRegs;
+    fn ensure_in_vreg(&mut self, arg0: Reg, arg1: Type) -> Reg;
+    fn value_regs_get(&mut self, arg0: ValueRegs, arg1: usize) -> Reg;
+    fn value_regs_len(&mut self, arg0: ValueRegs) -> usize;
+    fn preg_to_reg(&mut self, arg0: PReg) -> Reg;
+    fn value_list_slice(&mut self, arg0: ValueList) -> ValueSlice;
+    fn value_slice_empty(&mut self, arg0: ValueSlice) -> Option<()>;
+    fn value_slice_unwrap(&mut self, arg0: ValueSlice) -> Option<(Value, ValueSlice)>;
+    fn value_slice_len(&mut self, arg0: ValueSlice) -> usize;
+    fn value_slice_get(&mut self, arg0: ValueSlice, arg1: usize) -> Value;
+    fn writable_reg_to_reg(&mut self, arg0: WritableReg) -> Reg;
+    fn inst_results(&mut self, arg0: Inst) -> ValueSlice;
+    fn first_result(&mut self, arg0: Inst) -> Option<Value>;
+    fn inst_data(&mut self, arg0: Inst) -> InstructionData;
+    fn def_inst(&mut self, arg0: Value) -> Option<Inst>;
+    fn zero_value(&mut self, arg0: Value) -> Option<Value>;
+    fn is_sinkable_inst(&mut self, arg0: Value) -> Option<Inst>;
+    fn maybe_uextend(&mut self, arg0: Value) -> Option<Value>;
+    fn emit(&mut self, arg0: &MInst) -> Unit;
+    fn sink_inst(&mut self, arg0: Inst) -> Unit;
+    fn emit_u64_le_const(&mut self, arg0: u64) -> VCodeConstant;
+    fn emit_u128_le_const(&mut self, arg0: u128) -> VCodeConstant;
+    fn const_to_vconst(&mut self, arg0: Constant) -> VCodeConstant;
+    fn tls_model(&mut self, arg0: Type) -> TlsModel;
+    fn tls_model_is_elf_gd(&mut self) -> Option<Unit>;
+    fn tls_model_is_macho(&mut self) -> Option<Unit>;
+    fn tls_model_is_coff(&mut self) -> Option<Unit>;
+    fn preserve_frame_pointers(&mut self) -> Option<Unit>;
+    fn box_external_name(&mut self, arg0: ExternalName) -> BoxExternalName;
+    fn func_ref_data(&mut self, arg0: FuncRef) -> (SigRef, ExternalName, RelocDistance);
+    fn symbol_value_data(
+        &mut self,
+        arg0: GlobalValue,
+    ) -> Option<(ExternalName, RelocDistance, i64)>;
+    fn reloc_distance_near(&mut self, arg0: RelocDistance) -> Option<()>;
+    fn vec_mask_from_immediate(&mut self, arg0: Immediate) -> Option<VecMask>;
+    fn u128_from_immediate(&mut self, arg0: Immediate) -> Option<u128>;
+    fn vconst_from_immediate(&mut self, arg0: Immediate) -> Option<VCodeConstant>;
+    fn u128_from_constant(&mut self, arg0: Constant) -> Option<u128>;
+    fn u64_from_constant(&mut self, arg0: Constant) -> Option<u64>;
+    fn shuffle64_from_imm(&mut self, arg0: Immediate) -> Option<(u8, u8)>;
+    fn shuffle32_from_imm(&mut self, arg0: Immediate) -> Option<(u8, u8, u8, u8)>;
+    fn shuffle16_from_imm(&mut self, arg0: Immediate) -> Option<(u8, u8, u8, u8, u8, u8, u8, u8)>;
+    fn only_writable_reg(&mut self, arg0: WritableValueRegs) -> Option<WritableReg>;
+    fn writable_regs_get(&mut self, arg0: WritableValueRegs, arg1: usize) -> WritableReg;
+    fn abi_num_args(&mut self, arg0: Sig) -> usize;
+    fn abi_get_arg(&mut self, arg0: Sig, arg1: usize) -> ABIArg;
+    fn abi_num_rets(&mut self, arg0: Sig) -> usize;
+    fn abi_get_ret(&mut self, arg0: Sig, arg1: usize) -> ABIArg;
+    fn abi_ret_arg(&mut self, arg0: Sig) -> Option<ABIArg>;
+    fn abi_no_ret_arg(&mut self, arg0: Sig) -> Option<()>;
+    fn abi_sized_stack_arg_space(&mut self, arg0: Sig) -> i64;
+    fn abi_sized_stack_ret_space(&mut self, arg0: Sig) -> i64;
+    fn abi_stackslot_addr(&mut self, arg0: WritableReg, arg1: StackSlot, arg2: Offset32) -> MInst;
+    fn abi_dynamic_stackslot_addr(&mut self, arg0: WritableReg, arg1: DynamicStackSlot) -> MInst;
+    fn abi_arg_only_slot(&mut self, arg0: &ABIArg) -> Option<ABIArgSlot>;
+    fn abi_arg_struct_pointer(&mut self, arg0: &ABIArg) -> Option<(ABIArgSlot, i64, u64)>;
+    fn abi_arg_implicit_pointer(&mut self, arg0: &ABIArg) -> Option<(ABIArgSlot, i64, Type)>;
+    fn real_reg_to_reg(&mut self, arg0: RealReg) -> Reg;
+    fn real_reg_to_writable_reg(&mut self, arg0: RealReg) -> WritableReg;
+    fn gen_move(&mut self, arg0: Type, arg1: WritableReg, arg2: Reg) -> MInst;
+    fn gen_return(&mut self, arg0: ValueSlice) -> Unit;
+    fn gen_return_call(
+        &mut self,
+        arg0: SigRef,
+        arg1: ExternalName,
+        arg2: RelocDistance,
+        arg3: ValueSlice,
+    ) -> InstOutput;
+    fn gen_return_call_indirect(
+        &mut self,
+        arg0: SigRef,
+        arg1: Value,
+        arg2: ValueSlice,
+    ) -> InstOutput;
+    fn safe_divisor_from_imm64(&mut self, arg0: Type, arg1: Imm64) -> Option<u64>;
+    fn box_symbol_reloc(&mut self, arg0: &SymbolReloc) -> BoxSymbolReloc;
+    fn mie2_enabled(&mut self, arg0: Type) -> Option<()>;
+    fn mie2_disabled(&mut self, arg0: Type) -> Option<()>;
+    fn vxrs_ext2_enabled(&mut self, arg0: Type) -> Option<()>;
+    fn vxrs_ext2_disabled(&mut self, arg0: Type) -> Option<()>;
+    fn lane_order(&mut self) -> LaneOrder;
+    fn be_lane_idx(&mut self, arg0: Type, arg1: u8) -> u8;
+    fn be_vec_const(&mut self, arg0: Type, arg1: u128) -> u128;
+    fn writable_gpr(&mut self, arg0: u8) -> WritableReg;
+    fn zero_reg(&mut self) -> Reg;
+    fn gpr32_ty(&mut self, arg0: Type) -> Option<Type>;
+    fn gpr64_ty(&mut self, arg0: Type) -> Option<Type>;
+    fn vr128_ty(&mut self, arg0: Type) -> Option<Type>;
+    fn uimm32shifted(&mut self, arg0: u32, arg1: u8) -> UImm32Shifted;
+    fn uimm16shifted(&mut self, arg0: u16, arg1: u8) -> UImm16Shifted;
+    fn i64_nonequal(&mut self, arg0: i64, arg1: i64) -> Option<i64>;
+    fn u8_as_u16(&mut self, arg0: u8) -> u16;
+    fn u64_truncate_to_u32(&mut self, arg0: u64) -> u32;
+    fn u64_as_i16(&mut self, arg0: u64) -> i16;
+    fn u64_pair_split(&mut self, arg0: u128) -> (u64, u64);
+    fn u64_pair_concat(&mut self, arg0: u64, arg1: u64) -> u128;
+    fn u32_pair_split(&mut self, arg0: u64) -> (u32, u32);
+    fn u32_pair_concat(&mut self, arg0: u32, arg1: u32) -> u64;
+    fn u16_pair_split(&mut self, arg0: u32) -> (u16, u16);
+    fn u16_pair_concat(&mut self, arg0: u16, arg1: u16) -> u32;
+    fn u8_pair_split(&mut self, arg0: u16) -> (u8, u8);
+    fn u8_pair_concat(&mut self, arg0: u8, arg1: u8) -> u16;
+    fn lane_byte_mask(&mut self, arg0: Type, arg1: u8) -> u16;
+    fn shuffle_mask_from_u128(&mut self, arg0: u128) -> (u128, u16);
+    fn u64_nonzero_hipart(&mut self, arg0: u64) -> Option<u64>;
+    fn u64_nonzero_lopart(&mut self, arg0: u64) -> Option<u64>;
+    fn i32_from_u64(&mut self, arg0: u64) -> Option<i32>;
+    fn i16_from_u64(&mut self, arg0: u64) -> Option<i16>;
+    fn i16_from_u32(&mut self, arg0: u32) -> Option<i16>;
+    fn uimm32shifted_from_u64(&mut self, arg0: u64) -> Option<UImm32Shifted>;
+    fn uimm16shifted_from_u64(&mut self, arg0: u64) -> Option<UImm16Shifted>;
+    fn u64_from_value(&mut self, arg0: Value) -> Option<u64>;
+    fn u32_from_value(&mut self, arg0: Value) -> Option<u32>;
+    fn u8_from_value(&mut self, arg0: Value) -> Option<u8>;
+    fn u64_from_signed_value(&mut self, arg0: Value) -> Option<u64>;
+    fn u64_from_inverted_value(&mut self, arg0: Value) -> Option<u64>;
+    fn i64_from_value(&mut self, arg0: Value) -> Option<i64>;
+    fn i32_from_value(&mut self, arg0: Value) -> Option<i32>;
+    fn i16_from_value(&mut self, arg0: Value) -> Option<i16>;
+    fn i16_from_swapped_value(&mut self, arg0: Value) -> Option<i16>;
+    fn i64_from_negated_value(&mut self, arg0: Value) -> Option<i64>;
+    fn i32_from_negated_value(&mut self, arg0: Value) -> Option<i32>;
+    fn i16_from_negated_value(&mut self, arg0: Value) -> Option<i16>;
+    fn uimm16shifted_from_value(&mut self, arg0: Value) -> Option<UImm16Shifted>;
+    fn uimm32shifted_from_value(&mut self, arg0: Value) -> Option<UImm32Shifted>;
+    fn uimm16shifted_from_inverted_value(&mut self, arg0: Value) -> Option<UImm16Shifted>;
+    fn uimm32shifted_from_inverted_value(&mut self, arg0: Value) -> Option<UImm32Shifted>;
+    fn len_minus_one(&mut self, arg0: u64) -> Option<u8>;
+    fn mask_amt_imm(&mut self, arg0: Type, arg1: i64) -> u8;
+    fn mask_as_cond(&mut self, arg0: u8) -> Cond;
+    fn intcc_as_cond(&mut self, arg0: &IntCC) -> Cond;
+    fn floatcc_as_cond(&mut self, arg0: &FloatCC) -> Cond;
+    fn invert_cond(&mut self, arg0: &Cond) -> Cond;
+    fn signed(&mut self, arg0: &IntCC) -> Option<()>;
+    fn unsigned(&mut self, arg0: &IntCC) -> Option<()>;
+    fn vec_length_minus1(&mut self, arg0: &VecMachLabel) -> u32;
+    fn vec_element(&mut self, arg0: &VecMachLabel, arg1: u8) -> MachLabel;
+    fn zero_offset(&mut self) -> Offset32;
+    fn i64_from_offset(&mut self, arg0: Offset32) -> i64;
+    fn littleendian(&mut self, arg0: MemFlags) -> Option<()>;
+    fn bigendian(&mut self, arg0: MemFlags) -> Option<()>;
+    fn memflags_trusted(&mut self) -> MemFlags;
+    fn memarg_flags(&mut self, arg0: &MemArg) -> MemFlags;
+    fn memarg_reg_plus_reg(&mut self, arg0: Reg, arg1: Reg, arg2: u8, arg3: MemFlags) -> MemArg;
+    fn memarg_reg_plus_off(&mut self, arg0: Reg, arg1: i64, arg2: u8, arg3: MemFlags) -> MemArg;
+    fn memarg_symbol(&mut self, arg0: ExternalName, arg1: i32, arg2: MemFlags) -> MemArg;
+    fn memarg_got(&mut self) -> MemArg;
+    fn memarg_stack_off(&mut self, arg0: i64, arg1: i64) -> MemArg;
+    fn memarg_initial_sp_offset(&mut self, arg0: i64) -> MemArg;
+    fn memarg_symbol_offset_sum(&mut self, arg0: i64, arg1: i64) -> Option<i32>;
+    fn memarg_pair_from_memarg(&mut self, arg0: &MemArg) -> Option<MemArgPair>;
+    fn memarg_pair_from_reg(&mut self, arg0: Reg, arg1: MemFlags) -> MemArgPair;
+    fn sinkable_inst(&mut self, arg0: Value) -> Option<Inst>;
+    fn writable_regpair(&mut self, arg0: WritableReg, arg1: WritableReg) -> WritableRegPair;
+    fn writable_regpair_hi(&mut self, arg0: WritableRegPair) -> WritableReg;
+    fn writable_regpair_lo(&mut self, arg0: WritableRegPair) -> WritableReg;
+    fn regpair(&mut self, arg0: Reg, arg1: Reg) -> RegPair;
+    fn regpair_hi(&mut self, arg0: RegPair) -> Reg;
+    fn regpair_lo(&mut self, arg0: RegPair) -> Reg;
+    fn inst_builder_new(&mut self) -> VecMInstBuilder;
+    fn inst_builder_push(&mut self, arg0: &VecMInstBuilder, arg1: &MInst) -> Unit;
+    fn inst_builder_finish(&mut self, arg0: &VecMInstBuilder) -> VecMInst;
+    fn real_reg(&mut self, arg0: WritableReg) -> Option<WritableReg>;
+    fn same_reg(&mut self, arg0: WritableReg, arg1: Reg) -> Option<Reg>;
+    fn preg_stack(&mut self) -> PReg;
+    fn preg_gpr_0(&mut self) -> PReg;
+    fn args_builder_new(&mut self) -> CallArgListBuilder;
+    fn args_builder_push(&mut self, arg0: &CallArgListBuilder, arg1: Reg, arg2: RealReg) -> Unit;
+    fn args_builder_finish(&mut self, arg0: &CallArgListBuilder) -> CallArgList;
+    fn defs_init(&mut self, arg0: Sig) -> CallRetList;
+    fn defs_lookup(&mut self, arg0: &CallRetList, arg1: RealReg) -> Reg;
+    fn abi_sig(&mut self, arg0: SigRef) -> Sig;
+    fn abi_first_ret(&mut self, arg0: SigRef, arg1: Sig) -> usize;
+    fn abi_call_info(
+        &mut self,
+        arg0: Sig,
+        arg1: ExternalName,
+        arg2: &CallArgList,
+        arg3: &CallRetList,
+        arg4: &Opcode,
+    ) -> BoxCallInfo;
+    fn abi_call_ind_info(
+        &mut self,
+        arg0: Sig,
+        arg1: Reg,
+        arg2: &CallArgList,
+        arg3: &CallRetList,
+        arg4: &Opcode,
+    ) -> BoxCallIndInfo;
+    fn abi_accumulate_outgoing_args_size(&mut self, arg0: Sig) -> Unit;
+    fn abi_lane_order(&mut self, arg0: Sig) -> LaneOrder;
+    fn lib_call_info_memcpy(&mut self, arg0: Reg, arg1: Reg, arg2: Reg) -> LibCallInfo;
+    fn lib_call_info_tls_get_offset(
+        &mut self,
+        arg0: WritableReg,
+        arg1: Reg,
+        arg2: Reg,
+        arg3: &SymbolReloc,
+    ) -> LibCallInfo;
+    fn lib_call_info(&mut self, arg0: &LibCallInfo) -> BoxCallInfo;
+    fn lib_accumulate_outgoing_args_size(&mut self, arg0: &LibCallInfo) -> Unit;
+    fn fcvt_to_uint_ub32(&mut self, arg0: u8) -> u64;
+    fn fcvt_to_uint_lb32(&mut self) -> u64;
+    fn fcvt_to_uint_ub64(&mut self, arg0: u8) -> u64;
+    fn fcvt_to_uint_lb64(&mut self) -> u64;
+    fn fcvt_to_sint_ub32(&mut self, arg0: u8) -> u64;
+    fn fcvt_to_sint_lb32(&mut self, arg0: u8) -> u64;
+    fn fcvt_to_sint_ub64(&mut self, arg0: u8) -> u64;
+    fn fcvt_to_sint_lb64(&mut self, arg0: u8) -> u64;
+    fn unpack_value_array_2(&mut self, arg0: &ValueArray2) -> (Value, Value);
+    fn pack_value_array_2(&mut self, arg0: Value, arg1: Value) -> ValueArray2;
+    fn unpack_value_array_3(&mut self, arg0: &ValueArray3) -> (Value, Value, Value);
+    fn pack_value_array_3(&mut self, arg0: Value, arg1: Value, arg2: Value) -> ValueArray3;
+    fn unpack_block_array_2(&mut self, arg0: &BlockArray2) -> (BlockCall, BlockCall);
+    fn pack_block_array_2(&mut self, arg0: BlockCall, arg1: BlockCall) -> BlockArray2;
+}
+
+pub trait ContextIter {
+    type Context;
+    type Output;
+    fn next(&mut self, ctx: &mut Self::Context) -> Option<Self::Output>;
+}
+
+pub struct ContextIterWrapper<Item, I: Iterator<Item = Item>, C: Context> {
+    iter: I,
+    _ctx: PhantomData<C>,
+}
+impl<Item, I: Iterator<Item = Item>, C: Context> From<I> for ContextIterWrapper<Item, I, C> {
+    fn from(iter: I) -> Self {
+        Self {
+            iter,
+            _ctx: PhantomData,
+        }
+    }
+}
+impl<Item, I: Iterator<Item = Item>, C: Context> ContextIter for ContextIterWrapper<Item, I, C> {
+    type Context = C;
+    type Output = Item;
+    fn next(&mut self, _ctx: &mut Self::Context) -> Option<Self::Output> {
+        self.iter.next()
+    }
+}
+
+/// Internal type MultiReg: defined at src/prelude_lower.isle line 21.
+#[derive(Clone, Debug)]
+pub enum MultiReg {
+    Empty,
+    One { a: Reg },
+    Two { a: Reg, b: Reg },
+    Three { a: Reg, b: Reg, c: Reg },
+    Four { a: Reg, b: Reg, c: Reg, d: Reg },
+}
+
+/// Internal type SideEffectNoResult: defined at src/prelude_lower.isle line 309.
+#[derive(Clone, Debug)]
+pub enum SideEffectNoResult {
+    Inst {
+        inst: MInst,
+    },
+    Inst2 {
+        inst1: MInst,
+        inst2: MInst,
+    },
+    Inst3 {
+        inst1: MInst,
+        inst2: MInst,
+        inst3: MInst,
+    },
+}
+
+/// Internal type ProducesFlags: defined at src/prelude_lower.isle line 351.
+#[derive(Clone, Debug)]
+pub enum ProducesFlags {
+    AlreadyExistingFlags,
+    ProducesFlagsSideEffect { inst: MInst },
+    ProducesFlagsTwiceSideEffect { inst1: MInst, inst2: MInst },
+    ProducesFlagsReturnsReg { inst: MInst, result: Reg },
+    ProducesFlagsReturnsResultWithConsumer { inst: MInst, result: Reg },
+}
+
+/// Internal type ConsumesAndProducesFlags: defined at src/prelude_lower.isle line 370.
+#[derive(Clone, Debug)]
+pub enum ConsumesAndProducesFlags {
+    SideEffect { inst: MInst },
+    ReturnsReg { inst: MInst, result: Reg },
+}
+
+/// Internal type ConsumesFlags: defined at src/prelude_lower.isle line 378.
+#[derive(Clone, Debug)]
+pub enum ConsumesFlags {
+    ConsumesFlagsSideEffect {
+        inst: MInst,
+    },
+    ConsumesFlagsSideEffect2 {
+        inst1: MInst,
+        inst2: MInst,
+    },
+    ConsumesFlagsReturnsResultWithProducer {
+        inst: MInst,
+        result: Reg,
+    },
+    ConsumesFlagsReturnsReg {
+        inst: MInst,
+        result: Reg,
+    },
+    ConsumesFlagsTwiceReturnsValueRegs {
+        inst1: MInst,
+        inst2: MInst,
+        result: ValueRegs,
+    },
+    ConsumesFlagsFourTimesReturnsValueRegs {
+        inst1: MInst,
+        inst2: MInst,
+        inst3: MInst,
+        inst4: MInst,
+        result: ValueRegs,
+    },
+}
+
+/// Internal type MInst: defined at src/isa/s390x/inst.isle line 2.
+#[derive(Clone, Debug)]
+pub enum MInst {
+    Nop0,
+    Nop2,
+    AluRRR {
+        alu_op: ALUOp,
+        rd: WritableReg,
+        rn: Reg,
+        rm: Reg,
+    },
+    AluRRSImm16 {
+        alu_op: ALUOp,
+        rd: WritableReg,
+        rn: Reg,
+        imm: i16,
+    },
+    AluRR {
+        alu_op: ALUOp,
+        rd: WritableReg,
+        ri: Reg,
+        rm: Reg,
+    },
+    AluRX {
+        alu_op: ALUOp,
+        rd: WritableReg,
+        ri: Reg,
+        mem: MemArg,
+    },
+    AluRSImm16 {
+        alu_op: ALUOp,
+        rd: WritableReg,
+        ri: Reg,
+        imm: i16,
+    },
+    AluRSImm32 {
+        alu_op: ALUOp,
+        rd: WritableReg,
+        ri: Reg,
+        imm: i32,
+    },
+    AluRUImm32 {
+        alu_op: ALUOp,
+        rd: WritableReg,
+        ri: Reg,
+        imm: u32,
+    },
+    AluRUImm16Shifted {
+        alu_op: ALUOp,
+        rd: WritableReg,
+        ri: Reg,
+        imm: UImm16Shifted,
+    },
+    AluRUImm32Shifted {
+        alu_op: ALUOp,
+        rd: WritableReg,
+        ri: Reg,
+        imm: UImm32Shifted,
+    },
+    SMulWide {
+        rd: WritableRegPair,
+        rn: Reg,
+        rm: Reg,
+    },
+    UMulWide {
+        rd: WritableRegPair,
+        ri: Reg,
+        rn: Reg,
+    },
+    SDivMod32 {
+        rd: WritableRegPair,
+        ri: Reg,
+        rn: Reg,
+    },
+    SDivMod64 {
+        rd: WritableRegPair,
+        ri: Reg,
+        rn: Reg,
+    },
+    UDivMod32 {
+        rd: WritableRegPair,
+        ri: RegPair,
+        rn: Reg,
+    },
+    UDivMod64 {
+        rd: WritableRegPair,
+        ri: RegPair,
+        rn: Reg,
+    },
+    Flogr {
+        rd: WritableRegPair,
+        rn: Reg,
+    },
+    ShiftRR {
+        shift_op: ShiftOp,
+        rd: WritableReg,
+        rn: Reg,
+        shift_imm: u8,
+        shift_reg: Reg,
+    },
+    RxSBG {
+        op: RxSBGOp,
+        rd: WritableReg,
+        ri: Reg,
+        rn: Reg,
+        start_bit: u8,
+        end_bit: u8,
+        rotate_amt: i8,
+    },
+    RxSBGTest {
+        op: RxSBGOp,
+        rd: Reg,
+        rn: Reg,
+        start_bit: u8,
+        end_bit: u8,
+        rotate_amt: i8,
+    },
+    UnaryRR {
+        op: UnaryOp,
+        rd: WritableReg,
+        rn: Reg,
+    },
+    CmpRR {
+        op: CmpOp,
+        rn: Reg,
+        rm: Reg,
+    },
+    CmpRX {
+        op: CmpOp,
+        rn: Reg,
+        mem: MemArg,
+    },
+    CmpRSImm16 {
+        op: CmpOp,
+        rn: Reg,
+        imm: i16,
+    },
+    CmpRSImm32 {
+        op: CmpOp,
+        rn: Reg,
+        imm: i32,
+    },
+    CmpRUImm32 {
+        op: CmpOp,
+        rn: Reg,
+        imm: u32,
+    },
+    CmpTrapRR {
+        op: CmpOp,
+        rn: Reg,
+        rm: Reg,
+        cond: Cond,
+        trap_code: TrapCode,
+    },
+    CmpTrapRSImm16 {
+        op: CmpOp,
+        rn: Reg,
+        imm: i16,
+        cond: Cond,
+        trap_code: TrapCode,
+    },
+    CmpTrapRUImm16 {
+        op: CmpOp,
+        rn: Reg,
+        imm: u16,
+        cond: Cond,
+        trap_code: TrapCode,
+    },
+    AtomicRmw {
+        alu_op: ALUOp,
+        rd: WritableReg,
+        rn: Reg,
+        mem: MemArg,
+    },
+    AtomicCas32 {
+        rd: WritableReg,
+        ri: Reg,
+        rn: Reg,
+        mem: MemArg,
+    },
+    AtomicCas64 {
+        rd: WritableReg,
+        ri: Reg,
+        rn: Reg,
+        mem: MemArg,
+    },
+    Fence,
+    Load32 {
+        rd: WritableReg,
+        mem: MemArg,
+    },
+    Load32ZExt8 {
+        rd: WritableReg,
+        mem: MemArg,
+    },
+    Load32SExt8 {
+        rd: WritableReg,
+        mem: MemArg,
+    },
+    Load32ZExt16 {
+        rd: WritableReg,
+        mem: MemArg,
+    },
+    Load32SExt16 {
+        rd: WritableReg,
+        mem: MemArg,
+    },
+    Load64 {
+        rd: WritableReg,
+        mem: MemArg,
+    },
+    Load64ZExt8 {
+        rd: WritableReg,
+        mem: MemArg,
+    },
+    Load64SExt8 {
+        rd: WritableReg,
+        mem: MemArg,
+    },
+    Load64ZExt16 {
+        rd: WritableReg,
+        mem: MemArg,
+    },
+    Load64SExt16 {
+        rd: WritableReg,
+        mem: MemArg,
+    },
+    Load64ZExt32 {
+        rd: WritableReg,
+        mem: MemArg,
+    },
+    Load64SExt32 {
+        rd: WritableReg,
+        mem: MemArg,
+    },
+    LoadRev16 {
+        rd: WritableReg,
+        mem: MemArg,
+    },
+    LoadRev32 {
+        rd: WritableReg,
+        mem: MemArg,
+    },
+    LoadRev64 {
+        rd: WritableReg,
+        mem: MemArg,
+    },
+    Store8 {
+        rd: Reg,
+        mem: MemArg,
+    },
+    Store16 {
+        rd: Reg,
+        mem: MemArg,
+    },
+    Store32 {
+        rd: Reg,
+        mem: MemArg,
+    },
+    Store64 {
+        rd: Reg,
+        mem: MemArg,
+    },
+    StoreImm8 {
+        imm: u8,
+        mem: MemArg,
+    },
+    StoreImm16 {
+        imm: i16,
+        mem: MemArg,
+    },
+    StoreImm32SExt16 {
+        imm: i16,
+        mem: MemArg,
+    },
+    StoreImm64SExt16 {
+        imm: i16,
+        mem: MemArg,
+    },
+    StoreRev16 {
+        rd: Reg,
+        mem: MemArg,
+    },
+    StoreRev32 {
+        rd: Reg,
+        mem: MemArg,
+    },
+    StoreRev64 {
+        rd: Reg,
+        mem: MemArg,
+    },
+    Mvc {
+        dst: MemArgPair,
+        src: MemArgPair,
+        len_minus_one: u8,
+    },
+    LoadMultiple64 {
+        rt: WritableReg,
+        rt2: WritableReg,
+        mem: MemArg,
+    },
+    StoreMultiple64 {
+        rt: Reg,
+        rt2: Reg,
+        mem: MemArg,
+    },
+    Mov32 {
+        rd: WritableReg,
+        rm: Reg,
+    },
+    Mov64 {
+        rd: WritableReg,
+        rm: Reg,
+    },
+    MovPReg {
+        rd: WritableReg,
+        rm: PReg,
+    },
+    Mov32Imm {
+        rd: WritableReg,
+        imm: u32,
+    },
+    Mov32SImm16 {
+        rd: WritableReg,
+        imm: i16,
+    },
+    Mov64SImm16 {
+        rd: WritableReg,
+        imm: i16,
+    },
+    Mov64SImm32 {
+        rd: WritableReg,
+        imm: i32,
+    },
+    Mov64UImm16Shifted {
+        rd: WritableReg,
+        imm: UImm16Shifted,
+    },
+    Mov64UImm32Shifted {
+        rd: WritableReg,
+        imm: UImm32Shifted,
+    },
+    Insert64UImm16Shifted {
+        rd: WritableReg,
+        ri: Reg,
+        imm: UImm16Shifted,
+    },
+    Insert64UImm32Shifted {
+        rd: WritableReg,
+        ri: Reg,
+        imm: UImm32Shifted,
+    },
+    LoadAR {
+        rd: WritableReg,
+        ar: u8,
+    },
+    InsertAR {
+        rd: WritableReg,
+        ri: Reg,
+        ar: u8,
+    },
+    Extend {
+        rd: WritableReg,
+        rn: Reg,
+        signed: bool,
+        from_bits: u8,
+        to_bits: u8,
+    },
+    CMov32 {
+        rd: WritableReg,
+        cond: Cond,
+        ri: Reg,
+        rm: Reg,
+    },
+    CMov64 {
+        rd: WritableReg,
+        cond: Cond,
+        ri: Reg,
+        rm: Reg,
+    },
+    CMov32SImm16 {
+        rd: WritableReg,
+        cond: Cond,
+        ri: Reg,
+        imm: i16,
+    },
+    CMov64SImm16 {
+        rd: WritableReg,
+        cond: Cond,
+        ri: Reg,
+        imm: i16,
+    },
+    FpuMove32 {
+        rd: WritableReg,
+        rn: Reg,
+    },
+    FpuMove64 {
+        rd: WritableReg,
+        rn: Reg,
+    },
+    FpuCMov32 {
+        rd: WritableReg,
+        cond: Cond,
+        ri: Reg,
+        rm: Reg,
+    },
+    FpuCMov64 {
+        rd: WritableReg,
+        cond: Cond,
+        ri: Reg,
+        rm: Reg,
+    },
+    FpuRR {
+        fpu_op: FPUOp1,
+        rd: WritableReg,
+        rn: Reg,
+    },
+    FpuRRR {
+        fpu_op: FPUOp2,
+        rd: WritableReg,
+        rn: Reg,
+        rm: Reg,
+    },
+    FpuRRRR {
+        fpu_op: FPUOp3,
+        rd: WritableReg,
+        rn: Reg,
+        rm: Reg,
+        ra: Reg,
+    },
+    FpuRound {
+        op: FpuRoundOp,
+        mode: FpuRoundMode,
+        rd: WritableReg,
+        rn: Reg,
+    },
+    FpuCmp32 {
+        rn: Reg,
+        rm: Reg,
+    },
+    FpuCmp64 {
+        rn: Reg,
+        rm: Reg,
+    },
+    LoadFpuConst32 {
+        rd: WritableReg,
+        const_data: u32,
+    },
+    LoadFpuConst64 {
+        rd: WritableReg,
+        const_data: u64,
+    },
+    VecRRR {
+        op: VecBinaryOp,
+        rd: WritableReg,
+        rn: Reg,
+        rm: Reg,
+    },
+    VecRR {
+        op: VecUnaryOp,
+        rd: WritableReg,
+        rn: Reg,
+    },
+    VecShiftRR {
+        shift_op: VecShiftOp,
+        rd: WritableReg,
+        rn: Reg,
+        shift_imm: u8,
+        shift_reg: Reg,
+    },
+    VecSelect {
+        rd: WritableReg,
+        rn: Reg,
+        rm: Reg,
+        ra: Reg,
+    },
+    VecPermute {
+        rd: WritableReg,
+        rn: Reg,
+        rm: Reg,
+        ra: Reg,
+    },
+    VecPermuteDWImm {
+        rd: WritableReg,
+        rn: Reg,
+        rm: Reg,
+        idx1: u8,
+        idx2: u8,
+    },
+    VecIntCmp {
+        op: VecIntCmpOp,
+        rd: WritableReg,
+        rn: Reg,
+        rm: Reg,
+    },
+    VecIntCmpS {
+        op: VecIntCmpOp,
+        rd: WritableReg,
+        rn: Reg,
+        rm: Reg,
+    },
+    VecFloatCmp {
+        op: VecFloatCmpOp,
+        rd: WritableReg,
+        rn: Reg,
+        rm: Reg,
+    },
+    VecFloatCmpS {
+        op: VecFloatCmpOp,
+        rd: WritableReg,
+        rn: Reg,
+        rm: Reg,
+    },
+    VecInt128SCmpHi {
+        tmp: WritableReg,
+        rn: Reg,
+        rm: Reg,
+    },
+    VecInt128UCmpHi {
+        tmp: WritableReg,
+        rn: Reg,
+        rm: Reg,
+    },
+    VecLoad {
+        rd: WritableReg,
+        mem: MemArg,
+    },
+    VecLoadRev {
+        rd: WritableReg,
+        mem: MemArg,
+    },
+    VecLoadByte16Rev {
+        rd: WritableReg,
+        mem: MemArg,
+    },
+    VecLoadByte32Rev {
+        rd: WritableReg,
+        mem: MemArg,
+    },
+    VecLoadByte64Rev {
+        rd: WritableReg,
+        mem: MemArg,
+    },
+    VecLoadElt16Rev {
+        rd: WritableReg,
+        mem: MemArg,
+    },
+    VecLoadElt32Rev {
+        rd: WritableReg,
+        mem: MemArg,
+    },
+    VecLoadElt64Rev {
+        rd: WritableReg,
+        mem: MemArg,
+    },
+    VecStore {
+        rd: Reg,
+        mem: MemArg,
+    },
+    VecStoreRev {
+        rd: Reg,
+        mem: MemArg,
+    },
+    VecStoreByte16Rev {
+        rd: Reg,
+        mem: MemArg,
+    },
+    VecStoreByte32Rev {
+        rd: Reg,
+        mem: MemArg,
+    },
+    VecStoreByte64Rev {
+        rd: Reg,
+        mem: MemArg,
+    },
+    VecStoreElt16Rev {
+        rd: Reg,
+        mem: MemArg,
+    },
+    VecStoreElt32Rev {
+        rd: Reg,
+        mem: MemArg,
+    },
+    VecStoreElt64Rev {
+        rd: Reg,
+        mem: MemArg,
+    },
+    VecLoadReplicate {
+        size: u32,
+        rd: WritableReg,
+        mem: MemArg,
+    },
+    VecLoadReplicateRev {
+        size: u32,
+        rd: WritableReg,
+        mem: MemArg,
+    },
+    VecMov {
+        rd: WritableReg,
+        rn: Reg,
+    },
+    VecCMov {
+        rd: WritableReg,
+        cond: Cond,
+        ri: Reg,
+        rm: Reg,
+    },
+    MovToVec128 {
+        rd: WritableReg,
+        rn: Reg,
+        rm: Reg,
+    },
+    VecLoadConst {
+        rd: WritableReg,
+        const_data: u128,
+    },
+    VecLoadConstReplicate {
+        size: u32,
+        rd: WritableReg,
+        const_data: u64,
+    },
+    VecImmByteMask {
+        rd: WritableReg,
+        mask: u16,
+    },
+    VecImmBitMask {
+        size: u32,
+        rd: WritableReg,
+        start_bit: u8,
+        end_bit: u8,
+    },
+    VecImmReplicate {
+        size: u32,
+        rd: WritableReg,
+        imm: i16,
+    },
+    VecLoadLane {
+        size: u32,
+        rd: WritableReg,
+        ri: Reg,
+        mem: MemArg,
+        lane_imm: u8,
+    },
+    VecLoadLaneUndef {
+        size: u32,
+        rd: WritableReg,
+        mem: MemArg,
+        lane_imm: u8,
+    },
+    VecLoadLaneRev {
+        size: u32,
+        rd: WritableReg,
+        ri: Reg,
+        mem: MemArg,
+        lane_imm: u8,
+    },
+    VecLoadLaneRevUndef {
+        size: u32,
+        rd: WritableReg,
+        mem: MemArg,
+        lane_imm: u8,
+    },
+    VecStoreLane {
+        size: u32,
+        rd: Reg,
+        mem: MemArg,
+        lane_imm: u8,
+    },
+    VecStoreLaneRev {
+        size: u32,
+        rd: Reg,
+        mem: MemArg,
+        lane_imm: u8,
+    },
+    VecInsertLane {
+        size: u32,
+        rd: WritableReg,
+        ri: Reg,
+        rn: Reg,
+        lane_imm: u8,
+        lane_reg: Reg,
+    },
+    VecInsertLaneUndef {
+        size: u32,
+        rd: WritableReg,
+        rn: Reg,
+        lane_imm: u8,
+        lane_reg: Reg,
+    },
+    VecExtractLane {
+        size: u32,
+        rd: WritableReg,
+        rn: Reg,
+        lane_imm: u8,
+        lane_reg: Reg,
+    },
+    VecInsertLaneImm {
+        size: u32,
+        rd: WritableReg,
+        ri: Reg,
+        imm: i16,
+        lane_imm: u8,
+    },
+    VecReplicateLane {
+        size: u32,
+        rd: WritableReg,
+        rn: Reg,
+        lane_imm: u8,
+    },
+    Call {
+        link: WritableReg,
+        info: BoxCallInfo,
+    },
+    CallInd {
+        link: WritableReg,
+        info: BoxCallIndInfo,
+    },
+    Args {
+        args: VecArgPair,
+    },
+    Ret {
+        link: Reg,
+        rets: VecRetPair,
+        stack_bytes_to_pop: u32,
+    },
+    Jump {
+        dest: MachLabel,
+    },
+    CondBr {
+        taken: MachLabel,
+        not_taken: MachLabel,
+        cond: Cond,
+    },
+    TrapIf {
+        cond: Cond,
+        trap_code: TrapCode,
+    },
+    OneWayCondBr {
+        target: MachLabel,
+        cond: Cond,
+    },
+    IndirectBr {
+        rn: Reg,
+        targets: VecMachLabel,
+    },
+    Debugtrap,
+    Trap {
+        trap_code: TrapCode,
+    },
+    JTSequence {
+        ridx: Reg,
+        targets: VecMachLabel,
+    },
+    LoadSymbolReloc {
+        rd: WritableReg,
+        symbol_reloc: BoxSymbolReloc,
+    },
+    LoadAddr {
+        rd: WritableReg,
+        mem: MemArg,
+    },
+    Loop {
+        body: VecMInst,
+        cond: Cond,
+    },
+    CondBreak {
+        cond: Cond,
+    },
+    VirtualSPOffsetAdj {
+        offset: i64,
+    },
+    DummyUse {
+        reg: Reg,
+    },
+    Unwind {
+        inst: UnwindInst,
+    },
+}
+
+/// Internal type SymbolReloc: defined at src/isa/s390x/inst.isle line 1018.
+#[derive(Clone, Debug)]
+pub enum SymbolReloc {
+    Absolute { name: ExternalName, offset: i64 },
+    TlsGd { name: ExternalName },
+}
+
+/// Internal type ALUOp: defined at src/isa/s390x/inst.isle line 1035.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum ALUOp {
+    Add32,
+    Add32Ext16,
+    Add64,
+    Add64Ext16,
+    Add64Ext32,
+    AddLogical32,
+    AddLogical64,
+    AddLogical64Ext32,
+    Sub32,
+    Sub32Ext16,
+    Sub64,
+    Sub64Ext16,
+    Sub64Ext32,
+    SubLogical32,
+    SubLogical64,
+    SubLogical64Ext32,
+    Mul32,
+    Mul32Ext16,
+    Mul64,
+    Mul64Ext16,
+    Mul64Ext32,
+    And32,
+    And64,
+    Orr32,
+    Orr64,
+    Xor32,
+    Xor64,
+    NotAnd32,
+    NotAnd64,
+    NotOrr32,
+    NotOrr64,
+    NotXor32,
+    NotXor64,
+    AndNot32,
+    AndNot64,
+    OrrNot32,
+    OrrNot64,
+}
+
+/// Internal type UnaryOp: defined at src/isa/s390x/inst.isle line 1082.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum UnaryOp {
+    Abs32,
+    Abs64,
+    Abs64Ext32,
+    Neg32,
+    Neg64,
+    Neg64Ext32,
+    PopcntByte,
+    PopcntReg,
+    BSwap32,
+    BSwap64,
+}
+
+/// Internal type ShiftOp: defined at src/isa/s390x/inst.isle line 1097.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum ShiftOp {
+    RotL32,
+    RotL64,
+    LShL32,
+    LShL64,
+    LShR32,
+    LShR64,
+    AShR32,
+    AShR64,
+}
+
+/// Internal type RxSBGOp: defined at src/isa/s390x/inst.isle line 1110.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum RxSBGOp {
+    Insert,
+    And,
+    Or,
+    Xor,
+}
+
+/// Internal type CmpOp: defined at src/isa/s390x/inst.isle line 1119.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum CmpOp {
+    CmpS32,
+    CmpS32Ext16,
+    CmpS64,
+    CmpS64Ext16,
+    CmpS64Ext32,
+    CmpL32,
+    CmpL32Ext16,
+    CmpL64,
+    CmpL64Ext16,
+    CmpL64Ext32,
+}
+
+/// Internal type VecBinaryOp: defined at src/isa/s390x/inst.isle line 1134.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum VecBinaryOp {
+    Add8x16,
+    Add16x8,
+    Add32x4,
+    Add64x2,
+    Add128,
+    Sub8x16,
+    Sub16x8,
+    Sub32x4,
+    Sub64x2,
+    Sub128,
+    Mul8x16,
+    Mul16x8,
+    Mul32x4,
+    UMulHi8x16,
+    UMulHi16x8,
+    UMulHi32x4,
+    SMulHi8x16,
+    SMulHi16x8,
+    SMulHi32x4,
+    UMulEven8x16,
+    UMulEven16x8,
+    UMulEven32x4,
+    SMulEven8x16,
+    SMulEven16x8,
+    SMulEven32x4,
+    UMulOdd8x16,
+    UMulOdd16x8,
+    UMulOdd32x4,
+    SMulOdd8x16,
+    SMulOdd16x8,
+    SMulOdd32x4,
+    UMax8x16,
+    UMax16x8,
+    UMax32x4,
+    UMax64x2,
+    SMax8x16,
+    SMax16x8,
+    SMax32x4,
+    SMax64x2,
+    UMin8x16,
+    UMin16x8,
+    UMin32x4,
+    UMin64x2,
+    SMin8x16,
+    SMin16x8,
+    SMin32x4,
+    SMin64x2,
+    UAvg8x16,
+    UAvg16x8,
+    UAvg32x4,
+    UAvg64x2,
+    SAvg8x16,
+    SAvg16x8,
+    SAvg32x4,
+    SAvg64x2,
+    And128,
+    Orr128,
+    Xor128,
+    NotAnd128,
+    NotOrr128,
+    NotXor128,
+    AndNot128,
+    OrrNot128,
+    BitPermute128,
+    LShLByByte128,
+    LShRByByte128,
+    AShRByByte128,
+    LShLByBit128,
+    LShRByBit128,
+    AShRByBit128,
+    Pack16x8,
+    Pack32x4,
+    Pack64x2,
+    PackUSat16x8,
+    PackUSat32x4,
+    PackUSat64x2,
+    PackSSat16x8,
+    PackSSat32x4,
+    PackSSat64x2,
+    MergeLow8x16,
+    MergeLow16x8,
+    MergeLow32x4,
+    MergeLow64x2,
+    MergeHigh8x16,
+    MergeHigh16x8,
+    MergeHigh32x4,
+    MergeHigh64x2,
+}
+
+/// Internal type VecUnaryOp: defined at src/isa/s390x/inst.isle line 1236.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum VecUnaryOp {
+    Abs8x16,
+    Abs16x8,
+    Abs32x4,
+    Abs64x2,
+    Neg8x16,
+    Neg16x8,
+    Neg32x4,
+    Neg64x2,
+    Popcnt8x16,
+    Popcnt16x8,
+    Popcnt32x4,
+    Popcnt64x2,
+    Clz8x16,
+    Clz16x8,
+    Clz32x4,
+    Clz64x2,
+    Ctz8x16,
+    Ctz16x8,
+    Ctz32x4,
+    Ctz64x2,
+    UnpackULow8x16,
+    UnpackULow16x8,
+    UnpackULow32x4,
+    UnpackUHigh8x16,
+    UnpackUHigh16x8,
+    UnpackUHigh32x4,
+    UnpackSLow8x16,
+    UnpackSLow16x8,
+    UnpackSLow32x4,
+    UnpackSHigh8x16,
+    UnpackSHigh16x8,
+    UnpackSHigh32x4,
+}
+
+/// Internal type VecShiftOp: defined at src/isa/s390x/inst.isle line 1277.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum VecShiftOp {
+    RotL8x16,
+    RotL16x8,
+    RotL32x4,
+    RotL64x2,
+    LShL8x16,
+    LShL16x8,
+    LShL32x4,
+    LShL64x2,
+    LShR8x16,
+    LShR16x8,
+    LShR32x4,
+    LShR64x2,
+    AShR8x16,
+    AShR16x8,
+    AShR32x4,
+    AShR64x2,
+}
+
+/// Internal type VecIntCmpOp: defined at src/isa/s390x/inst.isle line 1298.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum VecIntCmpOp {
+    CmpEq8x16,
+    CmpEq16x8,
+    CmpEq32x4,
+    CmpEq64x2,
+    SCmpHi8x16,
+    SCmpHi16x8,
+    SCmpHi32x4,
+    SCmpHi64x2,
+    UCmpHi8x16,
+    UCmpHi16x8,
+    UCmpHi32x4,
+    UCmpHi64x2,
+}
+
+/// Internal type VecFloatCmpOp: defined at src/isa/s390x/inst.isle line 1315.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum VecFloatCmpOp {
+    CmpEq32x4,
+    CmpEq64x2,
+    CmpHi32x4,
+    CmpHi64x2,
+    CmpHiEq32x4,
+    CmpHiEq64x2,
+}
+
+/// Internal type FPUOp1: defined at src/isa/s390x/inst.isle line 1326.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum FPUOp1 {
+    Abs32,
+    Abs64,
+    Abs32x4,
+    Abs64x2,
+    Neg32,
+    Neg64,
+    Neg32x4,
+    Neg64x2,
+    NegAbs32,
+    NegAbs64,
+    NegAbs32x4,
+    NegAbs64x2,
+    Sqrt32,
+    Sqrt64,
+    Sqrt32x4,
+    Sqrt64x2,
+    Cvt32To64,
+    Cvt32x4To64x2,
+}
+
+/// Internal type FPUOp2: defined at src/isa/s390x/inst.isle line 1349.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum FPUOp2 {
+    Add32,
+    Add64,
+    Add32x4,
+    Add64x2,
+    Sub32,
+    Sub64,
+    Sub32x4,
+    Sub64x2,
+    Mul32,
+    Mul64,
+    Mul32x4,
+    Mul64x2,
+    Div32,
+    Div64,
+    Div32x4,
+    Div64x2,
+    Max32,
+    Max64,
+    Max32x4,
+    Max64x2,
+    Min32,
+    Min64,
+    Min32x4,
+    Min64x2,
+    MaxPseudo32,
+    MaxPseudo64,
+    MaxPseudo32x4,
+    MaxPseudo64x2,
+    MinPseudo32,
+    MinPseudo64,
+    MinPseudo32x4,
+    MinPseudo64x2,
+}
+
+/// Internal type FPUOp3: defined at src/isa/s390x/inst.isle line 1386.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum FPUOp3 {
+    MAdd32,
+    MAdd64,
+    MAdd32x4,
+    MAdd64x2,
+    MSub32,
+    MSub64,
+    MSub32x4,
+    MSub64x2,
+}
+
+/// Internal type FpuRoundOp: defined at src/isa/s390x/inst.isle line 1399.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum FpuRoundOp {
+    Cvt64To32,
+    Cvt64x2To32x4,
+    Round32,
+    Round64,
+    Round32x4,
+    Round64x2,
+    ToSInt32,
+    ToSInt64,
+    ToUInt32,
+    ToUInt64,
+    ToSInt32x4,
+    ToSInt64x2,
+    ToUInt32x4,
+    ToUInt64x2,
+    FromSInt32,
+    FromSInt64,
+    FromUInt32,
+    FromUInt64,
+    FromSInt32x4,
+    FromSInt64x2,
+    FromUInt32x4,
+    FromUInt64x2,
+}
+
+/// Internal type FpuRoundMode: defined at src/isa/s390x/inst.isle line 1426.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum FpuRoundMode {
+    Current,
+    ToNearest,
+    ShorterPrecision,
+    ToNearestTiesToEven,
+    ToZero,
+    ToPosInfinity,
+    ToNegInfinity,
+}
+
+/// Internal type LaneOrder: defined at src/isa/s390x/inst.isle line 1467.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum LaneOrder {
+    LittleEndian,
+    BigEndian,
+}
+
+/// Internal type ProducesBool: defined at src/isa/s390x/inst.isle line 3347.
+#[derive(Clone, Debug)]
+pub enum ProducesBool {
+    ProducesBool { producer: ProducesFlags, cond: Cond },
+}
+
+// Generated as internal constructor for term output_reg.
+pub fn constructor_output_reg<C: Context>(ctx: &mut C, arg0: Reg) -> InstOutput {
+    let v1 = C::value_reg(ctx, arg0);
+    let v2 = C::output(ctx, v1);
+    // Rule at src/prelude_lower.isle line 65.
+    return v2;
+}
+
+// Generated as internal constructor for term output_value.
+pub fn constructor_output_value<C: Context>(ctx: &mut C, arg0: Value) -> InstOutput {
+    let v1 = C::put_in_regs(ctx, arg0);
+    let v2 = C::output(ctx, v1);
+    // Rule at src/prelude_lower.isle line 69.
+    return v2;
+}
+
+// Generated as internal constructor for term temp_reg.
+pub fn constructor_temp_reg<C: Context>(ctx: &mut C, arg0: Type) -> Reg {
+    let v1 = C::temp_writable_reg(ctx, arg0);
+    let v2 = C::writable_reg_to_reg(ctx, v1);
+    // Rule at src/prelude_lower.isle line 89.
+    return v2;
+}
+
+// Generated as internal constructor for term value_regs_range.
+pub fn constructor_value_regs_range<C: Context>(ctx: &mut C, arg0: ValueRegs) -> Range {
+    let v2 = C::value_regs_len(ctx, arg0);
+    let v3 = C::range(ctx, 0x0, v2);
+    // Rule at src/prelude_lower.isle line 138.
+    return v3;
+}
+
+// Generated as internal constructor for term lo_reg.
+pub fn constructor_lo_reg<C: Context>(ctx: &mut C, arg0: Value) -> Reg {
+    let v1 = C::put_in_regs(ctx, arg0);
+    let v3 = C::value_regs_get(ctx, v1, 0x0);
+    // Rule at src/prelude_lower.isle line 149.
+    return v3;
+}
+
+// Generated as internal constructor for term multi_reg_to_pair_and_single.
+pub fn constructor_multi_reg_to_pair_and_single<C: Context>(
+    ctx: &mut C,
+    arg0: &MultiReg,
+) -> InstOutput {
+    if let &MultiReg::Three {
+        a: v1,
+        b: v2,
+        c: v3,
+    } = arg0
+    {
+        let v4 = C::value_regs(ctx, v1, v2);
+        let v5 = C::value_reg(ctx, v3);
+        let v6 = C::output_pair(ctx, v4, v5);
+        // Rule at src/prelude_lower.isle line 160.
+        return v6;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "multi_reg_to_pair_and_single", "src/prelude_lower.isle line 159"
+    )
+}
+
+// Generated as internal constructor for term multi_reg_to_pair.
+pub fn constructor_multi_reg_to_pair<C: Context>(ctx: &mut C, arg0: &MultiReg) -> InstOutput {
+    if let &MultiReg::Two { a: v1, b: v2 } = arg0 {
+        let v3 = C::value_regs(ctx, v1, v2);
+        let v4 = C::output(ctx, v3);
+        // Rule at src/prelude_lower.isle line 165.
+        return v4;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "multi_reg_to_pair", "src/prelude_lower.isle line 164"
+    )
+}
+
+// Generated as internal constructor for term multi_reg_to_single.
+pub fn constructor_multi_reg_to_single<C: Context>(ctx: &mut C, arg0: &MultiReg) -> InstOutput {
+    if let &MultiReg::One { a: v1 } = arg0 {
+        let v2 = C::value_reg(ctx, v1);
+        let v3 = C::output(ctx, v2);
+        // Rule at src/prelude_lower.isle line 170.
+        return v3;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "multi_reg_to_single", "src/prelude_lower.isle line 169"
+    )
+}
+
+// Generated as internal constructor for term emit_side_effect.
+pub fn constructor_emit_side_effect<C: Context>(ctx: &mut C, arg0: &SideEffectNoResult) -> Unit {
+    match arg0 {
+        &SideEffectNoResult::Inst { inst: ref v1 } => {
+            let v2 = C::emit(ctx, v1);
+            // Rule at src/prelude_lower.isle line 319.
+            return v2;
+        }
+        &SideEffectNoResult::Inst2 {
+            inst1: ref v3,
+            inst2: ref v4,
+        } => {
+            let v5 = C::emit(ctx, v3);
+            let v6 = C::emit(ctx, v4);
+            // Rule at src/prelude_lower.isle line 321.
+            return v6;
+        }
+        &SideEffectNoResult::Inst3 {
+            inst1: ref v7,
+            inst2: ref v8,
+            inst3: ref v9,
+        } => {
+            let v10 = C::emit(ctx, v7);
+            let v11 = C::emit(ctx, v8);
+            let v12 = C::emit(ctx, v9);
+            // Rule at src/prelude_lower.isle line 324.
+            return v12;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "emit_side_effect", "src/prelude_lower.isle line 318"
+    )
+}
+
+// Generated as internal constructor for term side_effect.
+pub fn constructor_side_effect<C: Context>(ctx: &mut C, arg0: &SideEffectNoResult) -> InstOutput {
+    let v1 = constructor_emit_side_effect(ctx, arg0);
+    let v2 = C::output_none(ctx);
+    // Rule at src/prelude_lower.isle line 332.
+    return v2;
+}
+
+// Generated as internal constructor for term side_effect_concat.
+pub fn constructor_side_effect_concat<C: Context>(
+    ctx: &mut C,
+    arg0: &SideEffectNoResult,
+    arg1: &SideEffectNoResult,
+) -> SideEffectNoResult {
+    match arg0 {
+        &SideEffectNoResult::Inst { inst: ref v1 } => {
+            match arg1 {
+                &SideEffectNoResult::Inst { inst: ref v3 } => {
+                    let v4 = SideEffectNoResult::Inst2 {
+                        inst1: v1.clone(),
+                        inst2: v3.clone(),
+                    };
+                    // Rule at src/prelude_lower.isle line 337.
+                    return v4;
+                }
+                &SideEffectNoResult::Inst2 {
+                    inst1: ref v5,
+                    inst2: ref v6,
+                } => {
+                    let v7 = SideEffectNoResult::Inst3 {
+                        inst1: v1.clone(),
+                        inst2: v5.clone(),
+                        inst3: v6.clone(),
+                    };
+                    // Rule at src/prelude_lower.isle line 339.
+                    return v7;
+                }
+                _ => {}
+            }
+        }
+        &SideEffectNoResult::Inst2 {
+            inst1: ref v8,
+            inst2: ref v9,
+        } => {
+            if let &SideEffectNoResult::Inst { inst: ref v3 } = arg1 {
+                let v10 = SideEffectNoResult::Inst3 {
+                    inst1: v8.clone(),
+                    inst2: v9.clone(),
+                    inst3: v3.clone(),
+                };
+                // Rule at src/prelude_lower.isle line 341.
+                return v10;
+            }
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "side_effect_concat", "src/prelude_lower.isle line 336"
+    )
+}
+
+// Generated as internal constructor for term produces_flags_concat.
+pub fn constructor_produces_flags_concat<C: Context>(
+    ctx: &mut C,
+    arg0: &ProducesFlags,
+    arg1: &ProducesFlags,
+) -> ProducesFlags {
+    if let &ProducesFlags::ProducesFlagsSideEffect { inst: ref v1 } = arg0 {
+        if let &ProducesFlags::ProducesFlagsSideEffect { inst: ref v3 } = arg1 {
+            let v4 = ProducesFlags::ProducesFlagsTwiceSideEffect {
+                inst1: v1.clone(),
+                inst2: v3.clone(),
+            };
+            // Rule at src/prelude_lower.isle line 366.
+            return v4;
+        }
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "produces_flags_concat", "src/prelude_lower.isle line 365"
+    )
+}
+
+// Generated as internal constructor for term produces_flags_get_reg.
+pub fn constructor_produces_flags_get_reg<C: Context>(ctx: &mut C, arg0: &ProducesFlags) -> Reg {
+    match arg0 {
+        &ProducesFlags::ProducesFlagsReturnsReg {
+            inst: ref v1,
+            result: v2,
+        } => {
+            // Rule at src/prelude_lower.isle line 396.
+            return v2;
+        }
+        &ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
+            inst: ref v3,
+            result: v4,
+        } => {
+            // Rule at src/prelude_lower.isle line 397.
+            return v4;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "produces_flags_get_reg", "src/prelude_lower.isle line 395"
+    )
+}
+
+// Generated as internal constructor for term produces_flags_ignore.
+pub fn constructor_produces_flags_ignore<C: Context>(
+    ctx: &mut C,
+    arg0: &ProducesFlags,
+) -> ProducesFlags {
+    match arg0 {
+        &ProducesFlags::ProducesFlagsReturnsReg {
+            inst: ref v1,
+            result: v2,
+        } => {
+            let v3 = ProducesFlags::ProducesFlagsSideEffect { inst: v1.clone() };
+            // Rule at src/prelude_lower.isle line 402.
+            return v3;
+        }
+        &ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
+            inst: ref v4,
+            result: v5,
+        } => {
+            let v6 = ProducesFlags::ProducesFlagsSideEffect { inst: v4.clone() };
+            // Rule at src/prelude_lower.isle line 404.
+            return v6;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "produces_flags_ignore", "src/prelude_lower.isle line 401"
+    )
+}
+
+// Generated as internal constructor for term consumes_flags_concat.
+pub fn constructor_consumes_flags_concat<C: Context>(
+    ctx: &mut C,
+    arg0: &ConsumesFlags,
+    arg1: &ConsumesFlags,
+) -> ConsumesFlags {
+    match arg0 {
+        &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v8 } => {
+            if let &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v9 } = arg1 {
+                let v10 = ConsumesFlags::ConsumesFlagsSideEffect2 {
+                    inst1: v8.clone(),
+                    inst2: v9.clone(),
+                };
+                // Rule at src/prelude_lower.isle line 417.
+                return v10;
+            }
+        }
+        &ConsumesFlags::ConsumesFlagsReturnsReg {
+            inst: ref v1,
+            result: v2,
+        } => {
+            if let &ConsumesFlags::ConsumesFlagsReturnsReg {
+                inst: ref v4,
+                result: v5,
+            } = arg1
+            {
+                let v6 = C::value_regs(ctx, v2, v5);
+                let v7 = ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
+                    inst1: v1.clone(),
+                    inst2: v4.clone(),
+                    result: v6,
+                };
+                // Rule at src/prelude_lower.isle line 411.
+                return v7;
+            }
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "consumes_flags_concat", "src/prelude_lower.isle line 410"
+    )
+}
+
+// Generated as internal constructor for term with_flags.
+pub fn constructor_with_flags<C: Context>(
+    ctx: &mut C,
+    arg0: &ProducesFlags,
+    arg1: &ConsumesFlags,
+) -> ValueRegs {
+    match arg0 {
+        &ProducesFlags::ProducesFlagsSideEffect { inst: ref v12 } => {
+            match arg1 {
+                &ConsumesFlags::ConsumesFlagsReturnsReg {
+                    inst: ref v13,
+                    result: v14,
+                } => {
+                    let v15 = C::emit(ctx, v12);
+                    let v16 = C::emit(ctx, v13);
+                    let v17 = C::value_reg(ctx, v14);
+                    // Rule at src/prelude_lower.isle line 448.
+                    return v17;
+                }
+                &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
+                    inst1: ref v18,
+                    inst2: ref v19,
+                    result: v20,
+                } => {
+                    let v15 = C::emit(ctx, v12);
+                    let v21 = C::emit(ctx, v18);
+                    let v22 = C::emit(ctx, v19);
+                    // Rule at src/prelude_lower.isle line 454.
+                    return v20;
+                }
+                &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
+                    inst1: ref v23,
+                    inst2: ref v24,
+                    inst3: ref v25,
+                    inst4: ref v26,
+                    result: v27,
+                } => {
+                    let v15 = C::emit(ctx, v12);
+                    let v28 = C::emit(ctx, v23);
+                    let v29 = C::emit(ctx, v24);
+                    let v30 = C::emit(ctx, v25);
+                    let v31 = C::emit(ctx, v26);
+                    // Rule at src/prelude_lower.isle line 466.
+                    return v27;
+                }
+                _ => {}
+            }
+        }
+        &ProducesFlags::ProducesFlagsTwiceSideEffect {
+            inst1: ref v32,
+            inst2: ref v33,
+        } => {
+            match arg1 {
+                &ConsumesFlags::ConsumesFlagsReturnsReg {
+                    inst: ref v13,
+                    result: v14,
+                } => {
+                    let v34 = C::emit(ctx, v32);
+                    let v35 = C::emit(ctx, v33);
+                    let v36 = C::emit(ctx, v13);
+                    let v37 = C::value_reg(ctx, v14);
+                    // Rule at src/prelude_lower.isle line 482.
+                    return v37;
+                }
+                &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
+                    inst1: ref v18,
+                    inst2: ref v19,
+                    result: v20,
+                } => {
+                    let v34 = C::emit(ctx, v32);
+                    let v35 = C::emit(ctx, v33);
+                    let v38 = C::emit(ctx, v18);
+                    let v39 = C::emit(ctx, v19);
+                    // Rule at src/prelude_lower.isle line 489.
+                    return v20;
+                }
+                &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
+                    inst1: ref v23,
+                    inst2: ref v24,
+                    inst3: ref v25,
+                    inst4: ref v26,
+                    result: v27,
+                } => {
+                    let v34 = C::emit(ctx, v32);
+                    let v35 = C::emit(ctx, v33);
+                    let v40 = C::emit(ctx, v23);
+                    let v41 = C::emit(ctx, v24);
+                    let v42 = C::emit(ctx, v25);
+                    let v43 = C::emit(ctx, v26);
+                    // Rule at src/prelude_lower.isle line 502.
+                    return v27;
+                }
+                _ => {}
+            }
+        }
+        &ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
+            inst: ref v1,
+            result: v2,
+        } => {
+            match arg1 {
+                &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v9 } => {
+                    let v6 = C::emit(ctx, v1);
+                    let v10 = C::emit(ctx, v9);
+                    let v11 = C::value_reg(ctx, v2);
+                    // Rule at src/prelude_lower.isle line 442.
+                    return v11;
+                }
+                &ConsumesFlags::ConsumesFlagsReturnsResultWithProducer {
+                    inst: ref v4,
+                    result: v5,
+                } => {
+                    let v6 = C::emit(ctx, v1);
+                    let v7 = C::emit(ctx, v4);
+                    let v8 = C::value_regs(ctx, v2, v5);
+                    // Rule at src/prelude_lower.isle line 434.
+                    return v8;
+                }
+                _ => {}
+            }
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "with_flags", "src/prelude_lower.isle line 432"
+    )
+}
+
+// Generated as internal constructor for term with_flags_reg.
+pub fn constructor_with_flags_reg<C: Context>(
+    ctx: &mut C,
+    arg0: &ProducesFlags,
+    arg1: &ConsumesFlags,
+) -> Reg {
+    let v2 = constructor_with_flags(ctx, arg0, arg1);
+    let v4 = C::value_regs_get(ctx, v2, 0x0);
+    // Rule at src/prelude_lower.isle line 520.
+    return v4;
+}
+
+// Generated as internal constructor for term flags_to_producesflags.
+pub fn constructor_flags_to_producesflags<C: Context>(ctx: &mut C, arg0: Value) -> ProducesFlags {
+    let v1 = C::mark_value_used(ctx, arg0);
+    // Rule at src/prelude_lower.isle line 527.
+    return ProducesFlags::AlreadyExistingFlags;
+}
+
+// Generated as internal constructor for term with_flags_side_effect.
+pub fn constructor_with_flags_side_effect<C: Context>(
+    ctx: &mut C,
+    arg0: &ProducesFlags,
+    arg1: &ConsumesFlags,
+) -> SideEffectNoResult {
+    match arg0 {
+        &ProducesFlags::AlreadyExistingFlags => {
+            match arg1 {
+                &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v2 } => {
+                    let v3 = SideEffectNoResult::Inst { inst: v2.clone() };
+                    // Rule at src/prelude_lower.isle line 538.
+                    return v3;
+                }
+                &ConsumesFlags::ConsumesFlagsSideEffect2 {
+                    inst1: ref v4,
+                    inst2: ref v5,
+                } => {
+                    let v6 = SideEffectNoResult::Inst2 {
+                        inst1: v4.clone(),
+                        inst2: v5.clone(),
+                    };
+                    // Rule at src/prelude_lower.isle line 543.
+                    return v6;
+                }
+                _ => {}
+            }
+        }
+        &ProducesFlags::ProducesFlagsSideEffect { inst: ref v7 } => {
+            match arg1 {
+                &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v2 } => {
+                    let v8 = SideEffectNoResult::Inst2 {
+                        inst1: v7.clone(),
+                        inst2: v2.clone(),
+                    };
+                    // Rule at src/prelude_lower.isle line 548.
+                    return v8;
+                }
+                &ConsumesFlags::ConsumesFlagsSideEffect2 {
+                    inst1: ref v4,
+                    inst2: ref v5,
+                } => {
+                    let v9 = SideEffectNoResult::Inst3 {
+                        inst1: v7.clone(),
+                        inst2: v4.clone(),
+                        inst3: v5.clone(),
+                    };
+                    // Rule at src/prelude_lower.isle line 553.
+                    return v9;
+                }
+                _ => {}
+            }
+        }
+        &ProducesFlags::ProducesFlagsTwiceSideEffect {
+            inst1: ref v10,
+            inst2: ref v11,
+        } => {
+            if let &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v2 } = arg1 {
+                let v12 = SideEffectNoResult::Inst3 {
+                    inst1: v10.clone(),
+                    inst2: v11.clone(),
+                    inst3: v2.clone(),
+                };
+                // Rule at src/prelude_lower.isle line 558.
+                return v12;
+            }
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "with_flags_side_effect", "src/prelude_lower.isle line 536"
+    )
+}
+
+// Generated as internal constructor for term with_flags_chained.
+pub fn constructor_with_flags_chained<C: Context>(
+    ctx: &mut C,
+    arg0: &ProducesFlags,
+    arg1: &ConsumesAndProducesFlags,
+    arg2: &ConsumesFlags,
+) -> MultiReg {
+    match arg0 {
+        &ProducesFlags::ProducesFlagsSideEffect { inst: ref v1 } => {
+            match arg1 {
+                &ConsumesAndProducesFlags::SideEffect { inst: ref v3 } => {
+                    match arg2 {
+                        &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v5 } => {
+                            let v6 = C::emit(ctx, v1);
+                            let v7 = C::emit(ctx, v3);
+                            let v8 = C::emit(ctx, v5);
+                            // Rule at src/prelude_lower.isle line 567.
+                            return MultiReg::Empty;
+                        }
+                        &ConsumesFlags::ConsumesFlagsSideEffect2 {
+                            inst1: ref v10,
+                            inst2: ref v11,
+                        } => {
+                            let v6 = C::emit(ctx, v1);
+                            let v7 = C::emit(ctx, v3);
+                            let v12 = C::emit(ctx, v10);
+                            let v13 = C::emit(ctx, v11);
+                            // Rule at src/prelude_lower.isle line 575.
+                            return MultiReg::Empty;
+                        }
+                        &ConsumesFlags::ConsumesFlagsReturnsReg {
+                            inst: ref v14,
+                            result: v15,
+                        } => {
+                            let v6 = C::emit(ctx, v1);
+                            let v7 = C::emit(ctx, v3);
+                            let v16 = C::emit(ctx, v14);
+                            let v17 = MultiReg::One { a: v15 };
+                            // Rule at src/prelude_lower.isle line 584.
+                            return v17;
+                        }
+                        &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
+                            inst1: ref v18,
+                            inst2: ref v19,
+                            result: v20,
+                        } => {
+                            let v6 = C::emit(ctx, v1);
+                            let v7 = C::emit(ctx, v3);
+                            let v21 = C::emit(ctx, v18);
+                            let v22 = C::emit(ctx, v19);
+                            let v24 = C::value_regs_get(ctx, v20, 0x0);
+                            let v26 = C::value_regs_get(ctx, v20, 0x1);
+                            let v27 = MultiReg::Two { a: v24, b: v26 };
+                            // Rule at src/prelude_lower.isle line 592.
+                            return v27;
+                        }
+                        &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
+                            inst1: ref v28,
+                            inst2: ref v29,
+                            inst3: ref v30,
+                            inst4: ref v31,
+                            result: v32,
+                        } => {
+                            let v6 = C::emit(ctx, v1);
+                            let v7 = C::emit(ctx, v3);
+                            let v33 = C::emit(ctx, v28);
+                            let v34 = C::emit(ctx, v29);
+                            let v35 = C::emit(ctx, v30);
+                            let v36 = C::emit(ctx, v31);
+                            let v37 = C::value_regs_get(ctx, v32, 0x0);
+                            let v38 = C::value_regs_get(ctx, v32, 0x1);
+                            let v39 = MultiReg::Two { a: v37, b: v38 };
+                            // Rule at src/prelude_lower.isle line 601.
+                            return v39;
+                        }
+                        _ => {}
+                    }
+                }
+                &ConsumesAndProducesFlags::ReturnsReg {
+                    inst: ref v47,
+                    result: v48,
+                } => {
+                    match arg2 {
+                        &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v5 } => {
+                            let v6 = C::emit(ctx, v1);
+                            let v49 = C::emit(ctx, v47);
+                            let v8 = C::emit(ctx, v5);
+                            let v50 = MultiReg::One { a: v48 };
+                            // Rule at src/prelude_lower.isle line 661.
+                            return v50;
+                        }
+                        &ConsumesFlags::ConsumesFlagsSideEffect2 {
+                            inst1: ref v10,
+                            inst2: ref v11,
+                        } => {
+                            let v6 = C::emit(ctx, v1);
+                            let v49 = C::emit(ctx, v47);
+                            let v12 = C::emit(ctx, v10);
+                            let v13 = C::emit(ctx, v11);
+                            let v50 = MultiReg::One { a: v48 };
+                            // Rule at src/prelude_lower.isle line 669.
+                            return v50;
+                        }
+                        &ConsumesFlags::ConsumesFlagsReturnsReg {
+                            inst: ref v14,
+                            result: v15,
+                        } => {
+                            let v6 = C::emit(ctx, v1);
+                            let v49 = C::emit(ctx, v47);
+                            let v16 = C::emit(ctx, v14);
+                            let v51 = MultiReg::Two { a: v48, b: v15 };
+                            // Rule at src/prelude_lower.isle line 678.
+                            return v51;
+                        }
+                        &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
+                            inst1: ref v18,
+                            inst2: ref v19,
+                            result: v20,
+                        } => {
+                            let v6 = C::emit(ctx, v1);
+                            let v49 = C::emit(ctx, v47);
+                            let v21 = C::emit(ctx, v18);
+                            let v22 = C::emit(ctx, v19);
+                            let v24 = C::value_regs_get(ctx, v20, 0x0);
+                            let v26 = C::value_regs_get(ctx, v20, 0x1);
+                            let v52 = MultiReg::Three {
+                                a: v48,
+                                b: v24,
+                                c: v26,
+                            };
+                            // Rule at src/prelude_lower.isle line 686.
+                            return v52;
+                        }
+                        &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
+                            inst1: ref v28,
+                            inst2: ref v29,
+                            inst3: ref v30,
+                            inst4: ref v31,
+                            result: v32,
+                        } => {
+                            let v6 = C::emit(ctx, v1);
+                            let v49 = C::emit(ctx, v47);
+                            let v33 = C::emit(ctx, v28);
+                            let v34 = C::emit(ctx, v29);
+                            let v35 = C::emit(ctx, v30);
+                            let v36 = C::emit(ctx, v31);
+                            let v37 = C::value_regs_get(ctx, v32, 0x0);
+                            let v38 = C::value_regs_get(ctx, v32, 0x1);
+                            let v53 = MultiReg::Three {
+                                a: v48,
+                                b: v37,
+                                c: v38,
+                            };
+                            // Rule at src/prelude_lower.isle line 695.
+                            return v53;
+                        }
+                        _ => {}
+                    }
+                }
+                _ => {}
+            }
+        }
+        &ProducesFlags::ProducesFlagsReturnsReg {
+            inst: ref v40,
+            result: v41,
+        } => {
+            match arg1 {
+                &ConsumesAndProducesFlags::SideEffect { inst: ref v3 } => {
+                    match arg2 {
+                        &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v5 } => {
+                            let v42 = C::emit(ctx, v40);
+                            let v7 = C::emit(ctx, v3);
+                            let v8 = C::emit(ctx, v5);
+                            let v43 = MultiReg::One { a: v41 };
+                            // Rule at src/prelude_lower.isle line 614.
+                            return v43;
+                        }
+                        &ConsumesFlags::ConsumesFlagsSideEffect2 {
+                            inst1: ref v10,
+                            inst2: ref v11,
+                        } => {
+                            let v42 = C::emit(ctx, v40);
+                            let v7 = C::emit(ctx, v3);
+                            let v12 = C::emit(ctx, v10);
+                            let v13 = C::emit(ctx, v11);
+                            let v43 = MultiReg::One { a: v41 };
+                            // Rule at src/prelude_lower.isle line 622.
+                            return v43;
+                        }
+                        &ConsumesFlags::ConsumesFlagsReturnsReg {
+                            inst: ref v14,
+                            result: v15,
+                        } => {
+                            let v42 = C::emit(ctx, v40);
+                            let v7 = C::emit(ctx, v3);
+                            let v16 = C::emit(ctx, v14);
+                            let v44 = MultiReg::Two { a: v41, b: v15 };
+                            // Rule at src/prelude_lower.isle line 631.
+                            return v44;
+                        }
+                        &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
+                            inst1: ref v18,
+                            inst2: ref v19,
+                            result: v20,
+                        } => {
+                            let v42 = C::emit(ctx, v40);
+                            let v7 = C::emit(ctx, v3);
+                            let v21 = C::emit(ctx, v18);
+                            let v22 = C::emit(ctx, v19);
+                            let v24 = C::value_regs_get(ctx, v20, 0x0);
+                            let v26 = C::value_regs_get(ctx, v20, 0x1);
+                            let v45 = MultiReg::Three {
+                                a: v41,
+                                b: v24,
+                                c: v26,
+                            };
+                            // Rule at src/prelude_lower.isle line 639.
+                            return v45;
+                        }
+                        &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
+                            inst1: ref v28,
+                            inst2: ref v29,
+                            inst3: ref v30,
+                            inst4: ref v31,
+                            result: v32,
+                        } => {
+                            let v42 = C::emit(ctx, v40);
+                            let v7 = C::emit(ctx, v3);
+                            let v33 = C::emit(ctx, v28);
+                            let v34 = C::emit(ctx, v29);
+                            let v35 = C::emit(ctx, v30);
+                            let v36 = C::emit(ctx, v31);
+                            let v37 = C::value_regs_get(ctx, v32, 0x0);
+                            let v38 = C::value_regs_get(ctx, v32, 0x1);
+                            let v46 = MultiReg::Three {
+                                a: v41,
+                                b: v37,
+                                c: v38,
+                            };
+                            // Rule at src/prelude_lower.isle line 648.
+                            return v46;
+                        }
+                        _ => {}
+                    }
+                }
+                &ConsumesAndProducesFlags::ReturnsReg {
+                    inst: ref v47,
+                    result: v48,
+                } => {
+                    match arg2 {
+                        &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v5 } => {
+                            let v42 = C::emit(ctx, v40);
+                            let v49 = C::emit(ctx, v47);
+                            let v8 = C::emit(ctx, v5);
+                            let v54 = MultiReg::Two { a: v41, b: v48 };
+                            // Rule at src/prelude_lower.isle line 708.
+                            return v54;
+                        }
+                        &ConsumesFlags::ConsumesFlagsSideEffect2 {
+                            inst1: ref v10,
+                            inst2: ref v11,
+                        } => {
+                            let v42 = C::emit(ctx, v40);
+                            let v49 = C::emit(ctx, v47);
+                            let v12 = C::emit(ctx, v10);
+                            let v13 = C::emit(ctx, v11);
+                            let v54 = MultiReg::Two { a: v41, b: v48 };
+                            // Rule at src/prelude_lower.isle line 716.
+                            return v54;
+                        }
+                        &ConsumesFlags::ConsumesFlagsReturnsReg {
+                            inst: ref v14,
+                            result: v15,
+                        } => {
+                            let v42 = C::emit(ctx, v40);
+                            let v49 = C::emit(ctx, v47);
+                            let v16 = C::emit(ctx, v14);
+                            let v55 = MultiReg::Three {
+                                a: v41,
+                                b: v48,
+                                c: v15,
+                            };
+                            // Rule at src/prelude_lower.isle line 725.
+                            return v55;
+                        }
+                        &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
+                            inst1: ref v18,
+                            inst2: ref v19,
+                            result: v20,
+                        } => {
+                            let v42 = C::emit(ctx, v40);
+                            let v49 = C::emit(ctx, v47);
+                            let v21 = C::emit(ctx, v18);
+                            let v22 = C::emit(ctx, v19);
+                            let v24 = C::value_regs_get(ctx, v20, 0x0);
+                            let v26 = C::value_regs_get(ctx, v20, 0x1);
+                            let v56 = MultiReg::Four {
+                                a: v41,
+                                b: v48,
+                                c: v24,
+                                d: v26,
+                            };
+                            // Rule at src/prelude_lower.isle line 733.
+                            return v56;
+                        }
+                        &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
+                            inst1: ref v28,
+                            inst2: ref v29,
+                            inst3: ref v30,
+                            inst4: ref v31,
+                            result: v32,
+                        } => {
+                            let v42 = C::emit(ctx, v40);
+                            let v49 = C::emit(ctx, v47);
+                            let v33 = C::emit(ctx, v28);
+                            let v34 = C::emit(ctx, v29);
+                            let v35 = C::emit(ctx, v30);
+                            let v36 = C::emit(ctx, v31);
+                            let v37 = C::value_regs_get(ctx, v32, 0x0);
+                            let v38 = C::value_regs_get(ctx, v32, 0x1);
+                            let v57 = MultiReg::Four {
+                                a: v41,
+                                b: v48,
+                                c: v37,
+                                d: v38,
+                            };
+                            // Rule at src/prelude_lower.isle line 742.
+                            return v57;
+                        }
+                        _ => {}
+                    }
+                }
+                _ => {}
+            }
+        }
+        &ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
+            inst: ref v58,
+            result: v59,
+        } => {
+            if let &ConsumesAndProducesFlags::ReturnsReg {
+                inst: ref v47,
+                result: v48,
+            } = arg1
+            {
+                match arg2 {
+                    &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v5 } => {
+                        let v60 = C::emit(ctx, v58);
+                        let v49 = C::emit(ctx, v47);
+                        let v8 = C::emit(ctx, v5);
+                        let v61 = MultiReg::Two { a: v59, b: v48 };
+                        // Rule at src/prelude_lower.isle line 754.
+                        return v61;
+                    }
+                    &ConsumesFlags::ConsumesFlagsSideEffect2 {
+                        inst1: ref v10,
+                        inst2: ref v11,
+                    } => {
+                        let v60 = C::emit(ctx, v58);
+                        let v49 = C::emit(ctx, v47);
+                        let v12 = C::emit(ctx, v10);
+                        let v13 = C::emit(ctx, v11);
+                        let v61 = MultiReg::Two { a: v59, b: v48 };
+                        // Rule at src/prelude_lower.isle line 762.
+                        return v61;
+                    }
+                    &ConsumesFlags::ConsumesFlagsReturnsResultWithProducer {
+                        inst: ref v63,
+                        result: v64,
+                    } => {
+                        let v60 = C::emit(ctx, v58);
+                        let v49 = C::emit(ctx, v47);
+                        let v65 = C::emit(ctx, v63);
+                        let v66 = MultiReg::Three {
+                            a: v59,
+                            b: v48,
+                            c: v64,
+                        };
+                        // Rule at src/prelude_lower.isle line 779.
+                        return v66;
+                    }
+                    &ConsumesFlags::ConsumesFlagsReturnsReg {
+                        inst: ref v14,
+                        result: v15,
+                    } => {
+                        let v60 = C::emit(ctx, v58);
+                        let v49 = C::emit(ctx, v47);
+                        let v16 = C::emit(ctx, v14);
+                        let v62 = MultiReg::Three {
+                            a: v59,
+                            b: v48,
+                            c: v15,
+                        };
+                        // Rule at src/prelude_lower.isle line 771.
+                        return v62;
+                    }
+                    &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
+                        inst1: ref v18,
+                        inst2: ref v19,
+                        result: v20,
+                    } => {
+                        let v60 = C::emit(ctx, v58);
+                        let v49 = C::emit(ctx, v47);
+                        let v21 = C::emit(ctx, v18);
+                        let v22 = C::emit(ctx, v19);
+                        let v24 = C::value_regs_get(ctx, v20, 0x0);
+                        let v26 = C::value_regs_get(ctx, v20, 0x1);
+                        let v67 = MultiReg::Four {
+                            a: v59,
+                            b: v48,
+                            c: v24,
+                            d: v26,
+                        };
+                        // Rule at src/prelude_lower.isle line 787.
+                        return v67;
+                    }
+                    &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
+                        inst1: ref v28,
+                        inst2: ref v29,
+                        inst3: ref v30,
+                        inst4: ref v31,
+                        result: v32,
+                    } => {
+                        let v60 = C::emit(ctx, v58);
+                        let v49 = C::emit(ctx, v47);
+                        let v33 = C::emit(ctx, v28);
+                        let v34 = C::emit(ctx, v29);
+                        let v35 = C::emit(ctx, v30);
+                        let v36 = C::emit(ctx, v31);
+                        let v37 = C::value_regs_get(ctx, v32, 0x0);
+                        let v38 = C::value_regs_get(ctx, v32, 0x1);
+                        let v68 = MultiReg::Four {
+                            a: v59,
+                            b: v48,
+                            c: v37,
+                            d: v38,
+                        };
+                        // Rule at src/prelude_lower.isle line 796.
+                        return v68;
+                    }
+                    _ => {}
+                }
+            }
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "with_flags_chained", "src/prelude_lower.isle line 564"
+    )
+}
+
+// Generated as internal constructor for term lower_return.
+pub fn constructor_lower_return<C: Context>(ctx: &mut C, arg0: ValueSlice) -> InstOutput {
+    let v1 = C::gen_return(ctx, arg0);
+    let v2 = C::output_none(ctx);
+    // Rule at src/prelude_lower.isle line 996.
+    return v2;
+}
+
+// Generated as internal constructor for term lane_order_equal.
+pub fn constructor_lane_order_equal<C: Context>(
+    ctx: &mut C,
+    arg0: &LaneOrder,
+    arg1: &LaneOrder,
+) -> bool {
+    match arg0 {
+        &LaneOrder::LittleEndian => {
+            match arg1 {
+                &LaneOrder::LittleEndian => {
+                    // Rule at src/isa/s390x/inst.isle line 1481.
+                    return true;
+                }
+                &LaneOrder::BigEndian => {
+                    // Rule at src/isa/s390x/inst.isle line 1482.
+                    return false;
+                }
+                _ => {}
+            }
+        }
+        &LaneOrder::BigEndian => {
+            match arg1 {
+                &LaneOrder::LittleEndian => {
+                    // Rule at src/isa/s390x/inst.isle line 1483.
+                    return false;
+                }
+                &LaneOrder::BigEndian => {
+                    // Rule at src/isa/s390x/inst.isle line 1484.
+                    return true;
+                }
+                _ => {}
+            }
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "lane_order_equal", "src/isa/s390x/inst.isle line 1480"
+    )
+}
+
+// Generated as internal constructor for term lane_order_from_memflags.
+pub fn constructor_lane_order_from_memflags<C: Context>(ctx: &mut C, arg0: MemFlags) -> LaneOrder {
+    let v4 = C::bigendian(ctx, arg0);
+    if let Some(v5) = v4 {
+        // Rule at src/isa/s390x/inst.isle line 1489.
+        return LaneOrder::BigEndian;
+    }
+    let v1 = C::littleendian(ctx, arg0);
+    if let Some(v2) = v1 {
+        // Rule at src/isa/s390x/inst.isle line 1488.
+        return LaneOrder::LittleEndian;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "lane_order_from_memflags", "src/isa/s390x/inst.isle line 1487"
+    )
+}
+
+// Generated as internal constructor for term i64_nonzero.
+pub fn constructor_i64_nonzero<C: Context>(ctx: &mut C, arg0: i64) -> Option<i64> {
+    let v2 = C::i64_nonequal(ctx, arg0, 0x0);
+    if let Some(v3) = v2 {
+        // Rule at src/isa/s390x/inst.isle line 1541.
+        return Some(arg0);
+    }
+    None
+}
+
+// Generated as internal constructor for term i64_not_neg1.
+pub fn constructor_i64_not_neg1<C: Context>(ctx: &mut C, arg0: i64) -> Option<i64> {
+    let v2 = C::i64_nonequal(ctx, arg0, -0x1);
+    if let Some(v3) = v2 {
+        // Rule at src/isa/s390x/inst.isle line 1546.
+        return Some(arg0);
+    }
+    None
+}
+
+// Generated as internal constructor for term imm8x16.
+pub fn constructor_imm8x16<C: Context>(
+    ctx: &mut C,
+    arg0: u8,
+    arg1: u8,
+    arg2: u8,
+    arg3: u8,
+    arg4: u8,
+    arg5: u8,
+    arg6: u8,
+    arg7: u8,
+    arg8: u8,
+    arg9: u8,
+    arg10: u8,
+    arg11: u8,
+    arg12: u8,
+    arg13: u8,
+    arg14: u8,
+    arg15: u8,
+) -> u128 {
+    let v16 = C::u8_pair_concat(ctx, arg0, arg1);
+    let v17 = C::u8_pair_concat(ctx, arg2, arg3);
+    let v18 = C::u16_pair_concat(ctx, v16, v17);
+    let v19 = C::u8_pair_concat(ctx, arg4, arg5);
+    let v20 = C::u8_pair_concat(ctx, arg6, arg7);
+    let v21 = C::u16_pair_concat(ctx, v19, v20);
+    let v22 = C::u32_pair_concat(ctx, v18, v21);
+    let v23 = C::u8_pair_concat(ctx, arg8, arg9);
+    let v24 = C::u8_pair_concat(ctx, arg10, arg11);
+    let v25 = C::u16_pair_concat(ctx, v23, v24);
+    let v26 = C::u8_pair_concat(ctx, arg12, arg13);
+    let v27 = C::u8_pair_concat(ctx, arg14, arg15);
+    let v28 = C::u16_pair_concat(ctx, v26, v27);
+    let v29 = C::u32_pair_concat(ctx, v25, v28);
+    let v30 = C::u64_pair_concat(ctx, v22, v29);
+    // Rule at src/isa/s390x/inst.isle line 1585.
+    return v30;
+}
+
+// Generated as internal constructor for term mask_amt_reg.
+pub fn constructor_mask_amt_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
+    let v10 = C::gpr64_ty(ctx, arg0);
+    if let Some(v11) = v10 {
+        // Rule at src/isa/s390x/inst.isle line 1697.
+        return arg1;
+    }
+    let v1 = C::gpr32_ty(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v5 = C::mask_amt_imm(ctx, v2, -0x1);
+        let v6 = C::u8_as_u16(ctx, v5);
+        let v8 = C::uimm16shifted(ctx, v6, 0x0);
+        let v9 = constructor_and_uimm16shifted(ctx, v2, arg1, v8);
+        // Rule at src/isa/s390x/inst.isle line 1694.
+        return v9;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "mask_amt_reg", "src/isa/s390x/inst.isle line 1693"
+    )
+}
+
+// Generated as internal constructor for term amt_reg.
+pub fn constructor_amt_reg<C: Context>(ctx: &mut C, arg0: Value) -> Reg {
+    let v1 = C::value_type(ctx, arg0);
+    let v2 = C::fits_in_64(ctx, v1);
+    if let Some(v3) = v2 {
+        let v4 = C::put_in_reg(ctx, arg0);
+        // Rule at src/isa/s390x/inst.isle line 1701.
+        return v4;
+    }
+    let v5 = C::vr128_ty(ctx, v1);
+    if let Some(v6) = v5 {
+        let v4 = C::put_in_reg(ctx, arg0);
+        let v9 = C::zero_reg(ctx);
+        let v10 = constructor_vec_extract_lane(ctx, I64X2, v4, 0x1, v9);
+        // Rule at src/isa/s390x/inst.isle line 1702.
+        return v10;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "amt_reg", "src/isa/s390x/inst.isle line 1700"
+    )
+}
+
+// Generated as internal constructor for term amt_vr.
+pub fn constructor_amt_vr<C: Context>(ctx: &mut C, arg0: Value) -> Reg {
+    let v14 = C::u64_from_value(ctx, arg0);
+    if let Some(v15) = v14 {
+        let v16 = constructor_vec_imm_splat(ctx, I8X16, v15);
+        // Rule at src/isa/s390x/inst.isle line 1712.
+        return v16;
+    }
+    let v1 = C::value_type(ctx, arg0);
+    let v10 = C::vr128_ty(ctx, v1);
+    if let Some(v11) = v10 {
+        let v5 = C::put_in_reg(ctx, arg0);
+        let v13 = constructor_vec_replicate_lane(ctx, I8X16, v5, 0xF);
+        // Rule at src/isa/s390x/inst.isle line 1710.
+        return v13;
+    }
+    let v2 = C::fits_in_64(ctx, v1);
+    if let Some(v3) = v2 {
+        let v5 = C::put_in_reg(ctx, arg0);
+        let v7 = C::zero_reg(ctx);
+        let v8 = constructor_vec_insert_lane_undef(ctx, I8X16, v5, 0x0, v7);
+        let v9 = constructor_vec_replicate_lane(ctx, I8X16, v8, 0x0);
+        // Rule at src/isa/s390x/inst.isle line 1707.
+        return v9;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "amt_vr", "src/isa/s390x/inst.isle line 1706"
+    )
+}
+
+// Generated as internal constructor for term memarg_symbol_offset.
+pub fn constructor_memarg_symbol_offset<C: Context>(ctx: &mut C, arg0: i64) -> Option<i32> {
+    let v2 = C::memarg_symbol_offset_sum(ctx, arg0, 0x0);
+    let v3 = v2?;
+    // Rule at src/isa/s390x/inst.isle line 1804.
+    return Some(v3);
+}
+
+// Generated as internal constructor for term lower_address.
+pub fn constructor_lower_address<C: Context>(
+    ctx: &mut C,
+    arg0: MemFlags,
+    arg1: Value,
+    arg2: Offset32,
+) -> MemArg {
+    let v10 = C::def_inst(ctx, arg1);
+    if let Some(v11) = v10 {
+        let v17 = &C::inst_data(ctx, v11);
+        match v17 {
+            &InstructionData::Binary {
+                opcode: ref v18,
+                args: ref v19,
+            } => {
+                if let &Opcode::Iadd = v18 {
+                    let v6 = C::i64_from_offset(ctx, arg2);
+                    if v6 == 0x0 {
+                        let v12 = C::first_result(ctx, v11);
+                        if let Some(v13) = v12 {
+                            let v14 = C::value_type(ctx, v13);
+                            let v15 = C::ty_addr64(ctx, v14);
+                            if let Some(v16) = v15 {
+                                let v20 = C::unpack_value_array_2(ctx, v19);
+                                let v23 = C::put_in_reg(ctx, v20.0);
+                                let v24 = C::put_in_reg(ctx, v20.1);
+                                let v25 = &C::memarg_reg_plus_reg(ctx, v23, v24, 0x0, arg0);
+                                // Rule at src/isa/s390x/inst.isle line 1814.
+                                return v25.clone();
+                            }
+                        }
+                    }
+                }
+            }
+            &InstructionData::UnaryGlobalValue {
+                opcode: ref v26,
+                global_value: v27,
+            } => {
+                if let &Opcode::SymbolValue = v26 {
+                    let v28 = C::symbol_value_data(ctx, v27);
+                    if let Some(v29) = v28 {
+                        let v33 = C::reloc_distance_near(ctx, v29.1);
+                        if let Some(v34) = v33 {
+                            let v6 = C::i64_from_offset(ctx, arg2);
+                            let v35 = C::memarg_symbol_offset_sum(ctx, v6, v29.2);
+                            if let Some(v36) = v35 {
+                                let v37 = &C::memarg_symbol(ctx, v29.0, v36, arg0);
+                                // Rule at src/isa/s390x/inst.isle line 1817.
+                                return v37.clone();
+                            }
+                        }
+                    }
+                }
+            }
+            _ => {}
+        }
+    }
+    let v2 = C::value_type(ctx, arg1);
+    let v3 = C::ty_addr64(ctx, v2);
+    if let Some(v4) = v3 {
+        let v7 = C::put_in_reg(ctx, arg1);
+        let v6 = C::i64_from_offset(ctx, arg2);
+        let v9 = &C::memarg_reg_plus_off(ctx, v7, v6, 0x0, arg0);
+        // Rule at src/isa/s390x/inst.isle line 1811.
+        return v9.clone();
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "lower_address", "src/isa/s390x/inst.isle line 1809"
+    )
+}
+
+// Generated as internal constructor for term lower_address_bias.
+pub fn constructor_lower_address_bias<C: Context>(
+    ctx: &mut C,
+    arg0: MemFlags,
+    arg1: Value,
+    arg2: Offset32,
+    arg3: u8,
+) -> MemArg {
+    let v4 = C::i64_from_offset(ctx, arg2);
+    if v4 == 0x0 {
+        let v8 = C::def_inst(ctx, arg1);
+        if let Some(v9) = v8 {
+            let v10 = C::first_result(ctx, v9);
+            if let Some(v11) = v10 {
+                let v12 = C::value_type(ctx, v11);
+                if v12 == I64 {
+                    let v13 = &C::inst_data(ctx, v9);
+                    if let &InstructionData::Binary {
+                        opcode: ref v14,
+                        args: ref v15,
+                    } = v13
+                    {
+                        if let &Opcode::Iadd = v14 {
+                            let v16 = C::unpack_value_array_2(ctx, v15);
+                            let v19 = C::put_in_reg(ctx, v16.0);
+                            let v20 = C::put_in_reg(ctx, v16.1);
+                            let v21 = &C::memarg_reg_plus_reg(ctx, v19, v20, arg3, arg0);
+                            // Rule at src/isa/s390x/inst.isle line 1831.
+                            return v21.clone();
+                        }
+                    }
+                }
+            }
+        }
+    }
+    let v2 = C::value_type(ctx, arg1);
+    if v2 == I64 {
+        let v6 = C::put_in_reg(ctx, arg1);
+        let v7 = &C::memarg_reg_plus_off(ctx, v6, v4, arg3, arg0);
+        // Rule at src/isa/s390x/inst.isle line 1828.
+        return v7.clone();
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "lower_address_bias", "src/isa/s390x/inst.isle line 1826"
+    )
+}
+
+// Generated as internal constructor for term load_sym.
+pub fn constructor_load_sym<C: Context>(ctx: &mut C, arg0: Inst) -> Option<Inst> {
+    let v1 = &C::inst_data(ctx, arg0);
+    if let &InstructionData::Load {
+        opcode: ref v2,
+        arg: v3,
+        flags: v4,
+        offset: v5,
+    } = v1
+    {
+        if let &Opcode::Load = v2 {
+            let v6 = C::def_inst(ctx, v3);
+            if let Some(v7) = v6 {
+                let v8 = &C::inst_data(ctx, v7);
+                if let &InstructionData::UnaryGlobalValue {
+                    opcode: ref v9,
+                    global_value: v10,
+                } = v8
+                {
+                    if let &Opcode::SymbolValue = v9 {
+                        let v11 = C::symbol_value_data(ctx, v10);
+                        if let Some(v12) = v11 {
+                            let v16 = C::reloc_distance_near(ctx, v12.1);
+                            if let Some(v17) = v16 {
+                                let v18 = C::i64_from_offset(ctx, v5);
+                                let v19 = C::memarg_symbol_offset_sum(ctx, v12.2, v18);
+                                if let Some(v20) = v19 {
+                                    // Rule at src/isa/s390x/inst.isle line 1838.
+                                    return Some(arg0);
+                                }
+                            }
+                        }
+                    }
+                }
+            }
+        }
+    }
+    None
+}
+
+// Generated as internal constructor for term uload16_sym.
+pub fn constructor_uload16_sym<C: Context>(ctx: &mut C, arg0: Inst) -> Option<Inst> {
+    let v1 = &C::inst_data(ctx, arg0);
+    if let &InstructionData::Load {
+        opcode: ref v2,
+        arg: v3,
+        flags: v4,
+        offset: v5,
+    } = v1
+    {
+        if let &Opcode::Uload16 = v2 {
+            let v6 = C::def_inst(ctx, v3);
+            if let Some(v7) = v6 {
+                let v8 = &C::inst_data(ctx, v7);
+                if let &InstructionData::UnaryGlobalValue {
+                    opcode: ref v9,
+                    global_value: v10,
+                } = v8
+                {
+                    if let &Opcode::SymbolValue = v9 {
+                        let v11 = C::symbol_value_data(ctx, v10);
+                        if let Some(v12) = v11 {
+                            let v16 = C::reloc_distance_near(ctx, v12.1);
+                            if let Some(v17) = v16 {
+                                let v18 = C::i64_from_offset(ctx, v5);
+                                let v19 = C::memarg_symbol_offset_sum(ctx, v12.2, v18);
+                                if let Some(v20) = v19 {
+                                    // Rule at src/isa/s390x/inst.isle line 1846.
+                                    return Some(arg0);
+                                }
+                            }
+                        }
+                    }
+                }
+            }
+        }
+    }
+    None
+}
+
+// Generated as internal constructor for term memarg_pair.
+pub fn constructor_memarg_pair<C: Context>(ctx: &mut C, arg0: &MemArg) -> MemArgPair {
+    let v1 = &C::memarg_pair_from_memarg(ctx, arg0);
+    if let Some(v2) = v1 {
+        // Rule at src/isa/s390x/inst.isle line 1860.
+        return v2.clone();
+    }
+    let v3 = constructor_load_addr(ctx, arg0);
+    let v4 = C::memarg_flags(ctx, arg0);
+    let v5 = &C::memarg_pair_from_reg(ctx, v3, v4);
+    // Rule at src/isa/s390x/inst.isle line 1861.
+    return v5.clone();
+}
+
+// Generated as internal constructor for term stack_addr_impl.
+pub fn constructor_stack_addr_impl<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: StackSlot,
+    arg2: Offset32,
+) -> Reg {
+    let v3 = C::temp_writable_reg(ctx, arg0);
+    let v4 = &C::abi_stackslot_addr(ctx, v3, arg1, arg2);
+    let v5 = C::emit(ctx, v4);
+    let v6 = C::writable_reg_to_reg(ctx, v3);
+    // Rule at src/isa/s390x/inst.isle line 1876.
+    return v6;
+}
+
+// Generated as internal constructor for term sink_load.
+pub fn constructor_sink_load<C: Context>(ctx: &mut C, arg0: Inst) -> MemArg {
+    let v1 = &C::inst_data(ctx, arg0);
+    if let &InstructionData::Load {
+        opcode: ref v2,
+        arg: v3,
+        flags: v4,
+        offset: v5,
+    } = v1
+    {
+        if let &Opcode::Load = v2 {
+            let v6 = C::sink_inst(ctx, arg0);
+            let v7 = &constructor_lower_address(ctx, v4, v3, v5);
+            // Rule at src/isa/s390x/inst.isle line 1942.
+            return v7.clone();
+        }
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "sink_load", "src/isa/s390x/inst.isle line 1941"
+    )
+}
+
+// Generated as internal constructor for term sink_sload16.
+pub fn constructor_sink_sload16<C: Context>(ctx: &mut C, arg0: Inst) -> MemArg {
+    let v1 = &C::inst_data(ctx, arg0);
+    if let &InstructionData::Load {
+        opcode: ref v2,
+        arg: v3,
+        flags: v4,
+        offset: v5,
+    } = v1
+    {
+        if let &Opcode::Sload16 = v2 {
+            let v6 = C::sink_inst(ctx, arg0);
+            let v7 = &constructor_lower_address(ctx, v4, v3, v5);
+            // Rule at src/isa/s390x/inst.isle line 1949.
+            return v7.clone();
+        }
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "sink_sload16", "src/isa/s390x/inst.isle line 1948"
+    )
+}
+
+// Generated as internal constructor for term sink_sload32.
+pub fn constructor_sink_sload32<C: Context>(ctx: &mut C, arg0: Inst) -> MemArg {
+    let v1 = &C::inst_data(ctx, arg0);
+    if let &InstructionData::Load {
+        opcode: ref v2,
+        arg: v3,
+        flags: v4,
+        offset: v5,
+    } = v1
+    {
+        if let &Opcode::Sload32 = v2 {
+            let v6 = C::sink_inst(ctx, arg0);
+            let v7 = &constructor_lower_address(ctx, v4, v3, v5);
+            // Rule at src/isa/s390x/inst.isle line 1956.
+            return v7.clone();
+        }
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "sink_sload32", "src/isa/s390x/inst.isle line 1955"
+    )
+}
+
+// Generated as internal constructor for term sink_uload16.
+pub fn constructor_sink_uload16<C: Context>(ctx: &mut C, arg0: Inst) -> MemArg {
+    let v1 = &C::inst_data(ctx, arg0);
+    if let &InstructionData::Load {
+        opcode: ref v2,
+        arg: v3,
+        flags: v4,
+        offset: v5,
+    } = v1
+    {
+        if let &Opcode::Uload16 = v2 {
+            let v6 = C::sink_inst(ctx, arg0);
+            let v7 = &constructor_lower_address(ctx, v4, v3, v5);
+            // Rule at src/isa/s390x/inst.isle line 1963.
+            return v7.clone();
+        }
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "sink_uload16", "src/isa/s390x/inst.isle line 1962"
+    )
+}
+
+// Generated as internal constructor for term sink_uload32.
+pub fn constructor_sink_uload32<C: Context>(ctx: &mut C, arg0: Inst) -> MemArg {
+    let v1 = &C::inst_data(ctx, arg0);
+    if let &InstructionData::Load {
+        opcode: ref v2,
+        arg: v3,
+        flags: v4,
+        offset: v5,
+    } = v1
+    {
+        if let &Opcode::Uload32 = v2 {
+            let v6 = C::sink_inst(ctx, arg0);
+            let v7 = &constructor_lower_address(ctx, v4, v3, v5);
+            // Rule at src/isa/s390x/inst.isle line 1970.
+            return v7.clone();
+        }
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "sink_uload32", "src/isa/s390x/inst.isle line 1969"
+    )
+}
+
+// Generated as internal constructor for term temp_writable_regpair.
+pub fn constructor_temp_writable_regpair<C: Context>(ctx: &mut C) -> WritableRegPair {
+    let v1 = C::temp_writable_reg(ctx, I64);
+    let v2 = C::temp_writable_reg(ctx, I64);
+    let v3 = C::writable_regpair(ctx, v1, v2);
+    // Rule at src/isa/s390x/inst.isle line 1986.
+    return v3;
+}
+
+// Generated as internal constructor for term writable_regpair_to_regpair.
+pub fn constructor_writable_regpair_to_regpair<C: Context>(
+    ctx: &mut C,
+    arg0: WritableRegPair,
+) -> RegPair {
+    let v1 = C::writable_regpair_hi(ctx, arg0);
+    let v3 = C::writable_regpair_lo(ctx, arg0);
+    let v2 = C::writable_reg_to_reg(ctx, v1);
+    let v4 = C::writable_reg_to_reg(ctx, v3);
+    let v5 = C::regpair(ctx, v2, v4);
+    // Rule at src/isa/s390x/inst.isle line 2002.
+    return v5;
+}
+
+// Generated as internal constructor for term alu_rrr.
+pub fn constructor_alu_rrr<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &ALUOp,
+    arg2: Reg,
+    arg3: Reg,
+) -> Reg {
+    let v4 = C::temp_writable_reg(ctx, arg0);
+    let v5 = MInst::AluRRR {
+        alu_op: arg1.clone(),
+        rd: v4,
+        rn: arg2,
+        rm: arg3,
+    };
+    let v6 = C::emit(ctx, &v5);
+    let v7 = C::writable_reg_to_reg(ctx, v4);
+    // Rule at src/isa/s390x/inst.isle line 2022.
+    return v7;
+}
+
+// Generated as internal constructor for term alu_rrr_with_flags_paired.
+pub fn constructor_alu_rrr_with_flags_paired<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &ALUOp,
+    arg2: Reg,
+    arg3: Reg,
+) -> ProducesFlags {
+    let v4 = C::temp_writable_reg(ctx, arg0);
+    let v5 = MInst::AluRRR {
+        alu_op: arg1.clone(),
+        rd: v4,
+        rn: arg2,
+        rm: arg3,
+    };
+    let v6 = C::writable_reg_to_reg(ctx, v4);
+    let v7 = ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
+        inst: v5,
+        result: v6,
+    };
+    // Rule at src/isa/s390x/inst.isle line 2029.
+    return v7;
+}
+
+// Generated as internal constructor for term alu_rrsimm16.
+pub fn constructor_alu_rrsimm16<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &ALUOp,
+    arg2: Reg,
+    arg3: i16,
+) -> Reg {
+    let v4 = C::temp_writable_reg(ctx, arg0);
+    let v5 = MInst::AluRRSImm16 {
+        alu_op: arg1.clone(),
+        rd: v4,
+        rn: arg2,
+        imm: arg3,
+    };
+    let v6 = C::emit(ctx, &v5);
+    let v7 = C::writable_reg_to_reg(ctx, v4);
+    // Rule at src/isa/s390x/inst.isle line 2036.
+    return v7;
+}
+
+// Generated as internal constructor for term alu_rr.
+pub fn constructor_alu_rr<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &ALUOp,
+    arg2: Reg,
+    arg3: Reg,
+) -> Reg {
+    let v4 = C::temp_writable_reg(ctx, arg0);
+    let v5 = MInst::AluRR {
+        alu_op: arg1.clone(),
+        rd: v4,
+        ri: arg2,
+        rm: arg3,
+    };
+    let v6 = C::emit(ctx, &v5);
+    let v7 = C::writable_reg_to_reg(ctx, v4);
+    // Rule at src/isa/s390x/inst.isle line 2043.
+    return v7;
+}
+
+// Generated as internal constructor for term alu_rr_with_flags_paired.
+pub fn constructor_alu_rr_with_flags_paired<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &ALUOp,
+    arg2: Reg,
+    arg3: Reg,
+) -> ProducesFlags {
+    let v4 = C::temp_writable_reg(ctx, arg0);
+    let v5 = MInst::AluRR {
+        alu_op: arg1.clone(),
+        rd: v4,
+        ri: arg2,
+        rm: arg3,
+    };
+    let v6 = C::writable_reg_to_reg(ctx, v4);
+    let v7 = ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
+        inst: v5,
+        result: v6,
+    };
+    // Rule at src/isa/s390x/inst.isle line 2050.
+    return v7;
+}
+
+// Generated as internal constructor for term alu_rx.
+pub fn constructor_alu_rx<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &ALUOp,
+    arg2: Reg,
+    arg3: &MemArg,
+) -> Reg {
+    let v4 = C::temp_writable_reg(ctx, arg0);
+    let v5 = MInst::AluRX {
+        alu_op: arg1.clone(),
+        rd: v4,
+        ri: arg2,
+        mem: arg3.clone(),
+    };
+    let v6 = C::emit(ctx, &v5);
+    let v7 = C::writable_reg_to_reg(ctx, v4);
+    // Rule at src/isa/s390x/inst.isle line 2057.
+    return v7;
+}
+
+// Generated as internal constructor for term alu_rx_with_flags_paired.
+pub fn constructor_alu_rx_with_flags_paired<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &ALUOp,
+    arg2: Reg,
+    arg3: &MemArg,
+) -> ProducesFlags {
+    let v4 = C::temp_writable_reg(ctx, arg0);
+    let v5 = MInst::AluRX {
+        alu_op: arg1.clone(),
+        rd: v4,
+        ri: arg2,
+        mem: arg3.clone(),
+    };
+    let v6 = C::writable_reg_to_reg(ctx, v4);
+    let v7 = ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
+        inst: v5,
+        result: v6,
+    };
+    // Rule at src/isa/s390x/inst.isle line 2064.
+    return v7;
+}
+
+// Generated as internal constructor for term alu_rsimm16.
+pub fn constructor_alu_rsimm16<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &ALUOp,
+    arg2: Reg,
+    arg3: i16,
+) -> Reg {
+    let v4 = C::temp_writable_reg(ctx, arg0);
+    let v5 = MInst::AluRSImm16 {
+        alu_op: arg1.clone(),
+        rd: v4,
+        ri: arg2,
+        imm: arg3,
+    };
+    let v6 = C::emit(ctx, &v5);
+    let v7 = C::writable_reg_to_reg(ctx, v4);
+    // Rule at src/isa/s390x/inst.isle line 2071.
+    return v7;
+}
+
+// Generated as internal constructor for term alu_rsimm32.
+pub fn constructor_alu_rsimm32<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &ALUOp,
+    arg2: Reg,
+    arg3: i32,
+) -> Reg {
+    let v4 = C::temp_writable_reg(ctx, arg0);
+    let v5 = MInst::AluRSImm32 {
+        alu_op: arg1.clone(),
+        rd: v4,
+        ri: arg2,
+        imm: arg3,
+    };
+    let v6 = C::emit(ctx, &v5);
+    let v7 = C::writable_reg_to_reg(ctx, v4);
+    // Rule at src/isa/s390x/inst.isle line 2078.
+    return v7;
+}
+
+// Generated as internal constructor for term alu_ruimm32.
+pub fn constructor_alu_ruimm32<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &ALUOp,
+    arg2: Reg,
+    arg3: u32,
+) -> Reg {
+    let v4 = C::temp_writable_reg(ctx, arg0);
+    let v5 = MInst::AluRUImm32 {
+        alu_op: arg1.clone(),
+        rd: v4,
+        ri: arg2,
+        imm: arg3,
+    };
+    let v6 = C::emit(ctx, &v5);
+    let v7 = C::writable_reg_to_reg(ctx, v4);
+    // Rule at src/isa/s390x/inst.isle line 2085.
+    return v7;
+}
+
+// Generated as internal constructor for term alu_ruimm32_with_flags_paired.
+pub fn constructor_alu_ruimm32_with_flags_paired<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &ALUOp,
+    arg2: Reg,
+    arg3: u32,
+) -> ProducesFlags {
+    let v4 = C::temp_writable_reg(ctx, arg0);
+    let v5 = MInst::AluRUImm32 {
+        alu_op: arg1.clone(),
+        rd: v4,
+        ri: arg2,
+        imm: arg3,
+    };
+    let v6 = C::writable_reg_to_reg(ctx, v4);
+    let v7 = ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
+        inst: v5,
+        result: v6,
+    };
+    // Rule at src/isa/s390x/inst.isle line 2092.
+    return v7;
+}
+
+// Generated as internal constructor for term alu_ruimm16shifted.
+pub fn constructor_alu_ruimm16shifted<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &ALUOp,
+    arg2: Reg,
+    arg3: UImm16Shifted,
+) -> Reg {
+    let v4 = C::temp_writable_reg(ctx, arg0);
+    let v5 = MInst::AluRUImm16Shifted {
+        alu_op: arg1.clone(),
+        rd: v4,
+        ri: arg2,
+        imm: arg3,
+    };
+    let v6 = C::emit(ctx, &v5);
+    let v7 = C::writable_reg_to_reg(ctx, v4);
+    // Rule at src/isa/s390x/inst.isle line 2099.
+    return v7;
+}
+
+// Generated as internal constructor for term alu_ruimm32shifted.
+pub fn constructor_alu_ruimm32shifted<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &ALUOp,
+    arg2: Reg,
+    arg3: UImm32Shifted,
+) -> Reg {
+    let v4 = C::temp_writable_reg(ctx, arg0);
+    let v5 = MInst::AluRUImm32Shifted {
+        alu_op: arg1.clone(),
+        rd: v4,
+        ri: arg2,
+        imm: arg3,
+    };
+    let v6 = C::emit(ctx, &v5);
+    let v7 = C::writable_reg_to_reg(ctx, v4);
+    // Rule at src/isa/s390x/inst.isle line 2106.
+    return v7;
+}
+
+// Generated as internal constructor for term smul_wide.
+pub fn constructor_smul_wide<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg) -> RegPair {
+    let v2 = constructor_temp_writable_regpair(ctx);
+    let v3 = MInst::SMulWide {
+        rd: v2,
+        rn: arg0,
+        rm: arg1,
+    };
+    let v4 = C::emit(ctx, &v3);
+    let v5 = constructor_writable_regpair_to_regpair(ctx, v2);
+    // Rule at src/isa/s390x/inst.isle line 2113.
+    return v5;
+}
+
+// Generated as internal constructor for term umul_wide.
+pub fn constructor_umul_wide<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg) -> RegPair {
+    let v2 = constructor_temp_writable_regpair(ctx);
+    let v3 = MInst::UMulWide {
+        rd: v2,
+        ri: arg0,
+        rn: arg1,
+    };
+    let v4 = C::emit(ctx, &v3);
+    let v5 = constructor_writable_regpair_to_regpair(ctx, v2);
+    // Rule at src/isa/s390x/inst.isle line 2120.
+    return v5;
+}
+
+// Generated as internal constructor for term sdivmod32.
+pub fn constructor_sdivmod32<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg) -> RegPair {
+    let v2 = constructor_temp_writable_regpair(ctx);
+    let v3 = MInst::SDivMod32 {
+        rd: v2,
+        ri: arg0,
+        rn: arg1,
+    };
+    let v4 = C::emit(ctx, &v3);
+    let v5 = constructor_writable_regpair_to_regpair(ctx, v2);
+    // Rule at src/isa/s390x/inst.isle line 2127.
+    return v5;
+}
+
+// Generated as internal constructor for term sdivmod64.
+pub fn constructor_sdivmod64<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg) -> RegPair {
+    let v2 = constructor_temp_writable_regpair(ctx);
+    let v3 = MInst::SDivMod64 {
+        rd: v2,
+        ri: arg0,
+        rn: arg1,
+    };
+    let v4 = C::emit(ctx, &v3);
+    let v5 = constructor_writable_regpair_to_regpair(ctx, v2);
+    // Rule at src/isa/s390x/inst.isle line 2134.
+    return v5;
+}
+
+// Generated as internal constructor for term udivmod32.
+pub fn constructor_udivmod32<C: Context>(ctx: &mut C, arg0: RegPair, arg1: Reg) -> RegPair {
+    let v2 = constructor_temp_writable_regpair(ctx);
+    let v3 = MInst::UDivMod32 {
+        rd: v2,
+        ri: arg0,
+        rn: arg1,
+    };
+    let v4 = C::emit(ctx, &v3);
+    let v5 = constructor_writable_regpair_to_regpair(ctx, v2);
+    // Rule at src/isa/s390x/inst.isle line 2141.
+    return v5;
+}
+
+// Generated as internal constructor for term udivmod64.
+pub fn constructor_udivmod64<C: Context>(ctx: &mut C, arg0: RegPair, arg1: Reg) -> RegPair {
+    let v2 = constructor_temp_writable_regpair(ctx);
+    let v3 = MInst::UDivMod64 {
+        rd: v2,
+        ri: arg0,
+        rn: arg1,
+    };
+    let v4 = C::emit(ctx, &v3);
+    let v5 = constructor_writable_regpair_to_regpair(ctx, v2);
+    // Rule at src/isa/s390x/inst.isle line 2148.
+    return v5;
+}
+
+// Generated as internal constructor for term shift_rr.
+pub fn constructor_shift_rr<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &ShiftOp,
+    arg2: Reg,
+    arg3: u8,
+    arg4: Reg,
+) -> Reg {
+    let v5 = C::temp_writable_reg(ctx, arg0);
+    let v6 = MInst::ShiftRR {
+        shift_op: arg1.clone(),
+        rd: v5,
+        rn: arg2,
+        shift_imm: arg3,
+        shift_reg: arg4,
+    };
+    let v7 = C::emit(ctx, &v6);
+    let v8 = C::writable_reg_to_reg(ctx, v5);
+    // Rule at src/isa/s390x/inst.isle line 2155.
+    return v8;
+}
+
+// Generated as internal constructor for term rxsbg_test.
+pub fn constructor_rxsbg_test<C: Context>(
+    ctx: &mut C,
+    arg0: &RxSBGOp,
+    arg1: Reg,
+    arg2: Reg,
+    arg3: u8,
+    arg4: u8,
+    arg5: i8,
+) -> ProducesFlags {
+    let v6 = MInst::RxSBGTest {
+        op: arg0.clone(),
+        rd: arg1,
+        rn: arg2,
+        start_bit: arg3,
+        end_bit: arg4,
+        rotate_amt: arg5,
+    };
+    let v7 = ProducesFlags::ProducesFlagsSideEffect { inst: v6 };
+    // Rule at src/isa/s390x/inst.isle line 2162.
+    return v7;
+}
+
+// Generated as internal constructor for term unary_rr.
+pub fn constructor_unary_rr<C: Context>(ctx: &mut C, arg0: Type, arg1: &UnaryOp, arg2: Reg) -> Reg {
+    let v3 = C::temp_writable_reg(ctx, arg0);
+    let v4 = MInst::UnaryRR {
+        op: arg1.clone(),
+        rd: v3,
+        rn: arg2,
+    };
+    let v5 = C::emit(ctx, &v4);
+    let v6 = C::writable_reg_to_reg(ctx, v3);
+    // Rule at src/isa/s390x/inst.isle line 2168.
+    return v6;
+}
+
+// Generated as internal constructor for term cmp_rr.
+pub fn constructor_cmp_rr<C: Context>(
+    ctx: &mut C,
+    arg0: &CmpOp,
+    arg1: Reg,
+    arg2: Reg,
+) -> ProducesFlags {
+    let v3 = MInst::CmpRR {
+        op: arg0.clone(),
+        rn: arg1,
+        rm: arg2,
+    };
+    let v4 = ProducesFlags::ProducesFlagsSideEffect { inst: v3 };
+    // Rule at src/isa/s390x/inst.isle line 2175.
+    return v4;
+}
+
+// Generated as internal constructor for term cmp_rx.
+pub fn constructor_cmp_rx<C: Context>(
+    ctx: &mut C,
+    arg0: &CmpOp,
+    arg1: Reg,
+    arg2: &MemArg,
+) -> ProducesFlags {
+    let v3 = MInst::CmpRX {
+        op: arg0.clone(),
+        rn: arg1,
+        mem: arg2.clone(),
+    };
+    let v4 = ProducesFlags::ProducesFlagsSideEffect { inst: v3 };
+    // Rule at src/isa/s390x/inst.isle line 2180.
+    return v4;
+}
+
+// Generated as internal constructor for term cmp_rsimm16.
+pub fn constructor_cmp_rsimm16<C: Context>(
+    ctx: &mut C,
+    arg0: &CmpOp,
+    arg1: Reg,
+    arg2: i16,
+) -> ProducesFlags {
+    let v3 = MInst::CmpRSImm16 {
+        op: arg0.clone(),
+        rn: arg1,
+        imm: arg2,
+    };
+    let v4 = ProducesFlags::ProducesFlagsSideEffect { inst: v3 };
+    // Rule at src/isa/s390x/inst.isle line 2185.
+    return v4;
+}
+
+// Generated as internal constructor for term cmp_rsimm32.
+pub fn constructor_cmp_rsimm32<C: Context>(
+    ctx: &mut C,
+    arg0: &CmpOp,
+    arg1: Reg,
+    arg2: i32,
+) -> ProducesFlags {
+    let v3 = MInst::CmpRSImm32 {
+        op: arg0.clone(),
+        rn: arg1,
+        imm: arg2,
+    };
+    let v4 = ProducesFlags::ProducesFlagsSideEffect { inst: v3 };
+    // Rule at src/isa/s390x/inst.isle line 2190.
+    return v4;
+}
+
+// Generated as internal constructor for term cmp_ruimm32.
+pub fn constructor_cmp_ruimm32<C: Context>(
+    ctx: &mut C,
+    arg0: &CmpOp,
+    arg1: Reg,
+    arg2: u32,
+) -> ProducesFlags {
+    let v3 = MInst::CmpRUImm32 {
+        op: arg0.clone(),
+        rn: arg1,
+        imm: arg2,
+    };
+    let v4 = ProducesFlags::ProducesFlagsSideEffect { inst: v3 };
+    // Rule at src/isa/s390x/inst.isle line 2195.
+    return v4;
+}
+
+// Generated as internal constructor for term atomic_rmw_impl.
+pub fn constructor_atomic_rmw_impl<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &ALUOp,
+    arg2: Reg,
+    arg3: &MemArg,
+) -> Reg {
+    let v4 = C::temp_writable_reg(ctx, arg0);
+    let v5 = MInst::AtomicRmw {
+        alu_op: arg1.clone(),
+        rd: v4,
+        rn: arg2,
+        mem: arg3.clone(),
+    };
+    let v6 = C::emit(ctx, &v5);
+    let v7 = C::writable_reg_to_reg(ctx, v4);
+    // Rule at src/isa/s390x/inst.isle line 2200.
+    return v7;
+}
+
+// Generated as internal constructor for term atomic_cas32.
+pub fn constructor_atomic_cas32<C: Context>(
+    ctx: &mut C,
+    arg0: Reg,
+    arg1: Reg,
+    arg2: &MemArg,
+) -> Reg {
+    let v4 = C::temp_writable_reg(ctx, I32);
+    let v5 = MInst::AtomicCas32 {
+        rd: v4,
+        ri: arg0,
+        rn: arg1,
+        mem: arg2.clone(),
+    };
+    let v6 = C::emit(ctx, &v5);
+    let v7 = C::writable_reg_to_reg(ctx, v4);
+    // Rule at src/isa/s390x/inst.isle line 2207.
+    return v7;
+}
+
+// Generated as internal constructor for term atomic_cas64.
+pub fn constructor_atomic_cas64<C: Context>(
+    ctx: &mut C,
+    arg0: Reg,
+    arg1: Reg,
+    arg2: &MemArg,
+) -> Reg {
+    let v4 = C::temp_writable_reg(ctx, I64);
+    let v5 = MInst::AtomicCas64 {
+        rd: v4,
+        ri: arg0,
+        rn: arg1,
+        mem: arg2.clone(),
+    };
+    let v6 = C::emit(ctx, &v5);
+    let v7 = C::writable_reg_to_reg(ctx, v4);
+    // Rule at src/isa/s390x/inst.isle line 2214.
+    return v7;
+}
+
+// Generated as internal constructor for term fence_impl.
+pub fn constructor_fence_impl<C: Context>(ctx: &mut C) -> SideEffectNoResult {
+    let v1 = SideEffectNoResult::Inst { inst: MInst::Fence };
+    // Rule at src/isa/s390x/inst.isle line 2221.
+    return v1;
+}
+
+// Generated as internal constructor for term load32.
+pub fn constructor_load32<C: Context>(ctx: &mut C, arg0: &MemArg) -> Reg {
+    let v2 = C::temp_writable_reg(ctx, I32);
+    let v3 = MInst::Load32 {
+        rd: v2,
+        mem: arg0.clone(),
+    };
+    let v4 = C::emit(ctx, &v3);
+    let v5 = C::writable_reg_to_reg(ctx, v2);
+    // Rule at src/isa/s390x/inst.isle line 2226.
+    return v5;
+}
+
+// Generated as internal constructor for term load64.
+pub fn constructor_load64<C: Context>(ctx: &mut C, arg0: &MemArg) -> Reg {
+    let v2 = C::temp_writable_reg(ctx, I64);
+    let v3 = MInst::Load64 {
+        rd: v2,
+        mem: arg0.clone(),
+    };
+    let v4 = C::emit(ctx, &v3);
+    let v5 = C::writable_reg_to_reg(ctx, v2);
+    // Rule at src/isa/s390x/inst.isle line 2233.
+    return v5;
+}
+
+// Generated as internal constructor for term loadrev16.
+pub fn constructor_loadrev16<C: Context>(ctx: &mut C, arg0: &MemArg) -> Reg {
+    let v2 = C::temp_writable_reg(ctx, I32);
+    let v3 = MInst::LoadRev16 {
+        rd: v2,
+        mem: arg0.clone(),
+    };
+    let v4 = C::emit(ctx, &v3);
+    let v5 = C::writable_reg_to_reg(ctx, v2);
+    // Rule at src/isa/s390x/inst.isle line 2240.
+    return v5;
+}
+
+// Generated as internal constructor for term loadrev32.
+pub fn constructor_loadrev32<C: Context>(ctx: &mut C, arg0: &MemArg) -> Reg {
+    let v2 = C::temp_writable_reg(ctx, I32);
+    let v3 = MInst::LoadRev32 {
+        rd: v2,
+        mem: arg0.clone(),
+    };
+    let v4 = C::emit(ctx, &v3);
+    let v5 = C::writable_reg_to_reg(ctx, v2);
+    // Rule at src/isa/s390x/inst.isle line 2247.
+    return v5;
+}
+
+// Generated as internal constructor for term loadrev64.
+pub fn constructor_loadrev64<C: Context>(ctx: &mut C, arg0: &MemArg) -> Reg {
+    let v2 = C::temp_writable_reg(ctx, I64);
+    let v3 = MInst::LoadRev64 {
+        rd: v2,
+        mem: arg0.clone(),
+    };
+    let v4 = C::emit(ctx, &v3);
+    let v5 = C::writable_reg_to_reg(ctx, v2);
+    // Rule at src/isa/s390x/inst.isle line 2254.
+    return v5;
+}
+
+// Generated as internal constructor for term store8.
+pub fn constructor_store8<C: Context>(ctx: &mut C, arg0: Reg, arg1: &MemArg) -> SideEffectNoResult {
+    let v2 = MInst::Store8 {
+        rd: arg0,
+        mem: arg1.clone(),
+    };
+    let v3 = SideEffectNoResult::Inst { inst: v2 };
+    // Rule at src/isa/s390x/inst.isle line 2261.
+    return v3;
+}
+
+// Generated as internal constructor for term store16.
+pub fn constructor_store16<C: Context>(
+    ctx: &mut C,
+    arg0: Reg,
+    arg1: &MemArg,
+) -> SideEffectNoResult {
+    let v2 = MInst::Store16 {
+        rd: arg0,
+        mem: arg1.clone(),
+    };
+    let v3 = SideEffectNoResult::Inst { inst: v2 };
+    // Rule at src/isa/s390x/inst.isle line 2266.
+    return v3;
+}
+
+// Generated as internal constructor for term store32.
+pub fn constructor_store32<C: Context>(
+    ctx: &mut C,
+    arg0: Reg,
+    arg1: &MemArg,
+) -> SideEffectNoResult {
+    let v2 = MInst::Store32 {
+        rd: arg0,
+        mem: arg1.clone(),
+    };
+    let v3 = SideEffectNoResult::Inst { inst: v2 };
+    // Rule at src/isa/s390x/inst.isle line 2271.
+    return v3;
+}
+
+// Generated as internal constructor for term store64.
+pub fn constructor_store64<C: Context>(
+    ctx: &mut C,
+    arg0: Reg,
+    arg1: &MemArg,
+) -> SideEffectNoResult {
+    let v2 = MInst::Store64 {
+        rd: arg0,
+        mem: arg1.clone(),
+    };
+    let v3 = SideEffectNoResult::Inst { inst: v2 };
+    // Rule at src/isa/s390x/inst.isle line 2276.
+    return v3;
+}
+
+// Generated as internal constructor for term store8_imm.
+pub fn constructor_store8_imm<C: Context>(
+    ctx: &mut C,
+    arg0: u8,
+    arg1: &MemArg,
+) -> SideEffectNoResult {
+    let v2 = MInst::StoreImm8 {
+        imm: arg0,
+        mem: arg1.clone(),
+    };
+    let v3 = SideEffectNoResult::Inst { inst: v2 };
+    // Rule at src/isa/s390x/inst.isle line 2281.
+    return v3;
+}
+
+// Generated as internal constructor for term store16_imm.
+pub fn constructor_store16_imm<C: Context>(
+    ctx: &mut C,
+    arg0: i16,
+    arg1: &MemArg,
+) -> SideEffectNoResult {
+    let v2 = MInst::StoreImm16 {
+        imm: arg0,
+        mem: arg1.clone(),
+    };
+    let v3 = SideEffectNoResult::Inst { inst: v2 };
+    // Rule at src/isa/s390x/inst.isle line 2286.
+    return v3;
+}
+
+// Generated as internal constructor for term store32_simm16.
+pub fn constructor_store32_simm16<C: Context>(
+    ctx: &mut C,
+    arg0: i16,
+    arg1: &MemArg,
+) -> SideEffectNoResult {
+    let v2 = MInst::StoreImm32SExt16 {
+        imm: arg0,
+        mem: arg1.clone(),
+    };
+    let v3 = SideEffectNoResult::Inst { inst: v2 };
+    // Rule at src/isa/s390x/inst.isle line 2291.
+    return v3;
+}
+
+// Generated as internal constructor for term store64_simm16.
+pub fn constructor_store64_simm16<C: Context>(
+    ctx: &mut C,
+    arg0: i16,
+    arg1: &MemArg,
+) -> SideEffectNoResult {
+    let v2 = MInst::StoreImm64SExt16 {
+        imm: arg0,
+        mem: arg1.clone(),
+    };
+    let v3 = SideEffectNoResult::Inst { inst: v2 };
+    // Rule at src/isa/s390x/inst.isle line 2296.
+    return v3;
+}
+
+// Generated as internal constructor for term storerev16.
+pub fn constructor_storerev16<C: Context>(
+    ctx: &mut C,
+    arg0: Reg,
+    arg1: &MemArg,
+) -> SideEffectNoResult {
+    let v2 = MInst::StoreRev16 {
+        rd: arg0,
+        mem: arg1.clone(),
+    };
+    let v3 = SideEffectNoResult::Inst { inst: v2 };
+    // Rule at src/isa/s390x/inst.isle line 2301.
+    return v3;
+}
+
+// Generated as internal constructor for term storerev32.
+pub fn constructor_storerev32<C: Context>(
+    ctx: &mut C,
+    arg0: Reg,
+    arg1: &MemArg,
+) -> SideEffectNoResult {
+    let v2 = MInst::StoreRev32 {
+        rd: arg0,
+        mem: arg1.clone(),
+    };
+    let v3 = SideEffectNoResult::Inst { inst: v2 };
+    // Rule at src/isa/s390x/inst.isle line 2306.
+    return v3;
+}
+
+// Generated as internal constructor for term storerev64.
+pub fn constructor_storerev64<C: Context>(
+    ctx: &mut C,
+    arg0: Reg,
+    arg1: &MemArg,
+) -> SideEffectNoResult {
+    let v2 = MInst::StoreRev64 {
+        rd: arg0,
+        mem: arg1.clone(),
+    };
+    let v3 = SideEffectNoResult::Inst { inst: v2 };
+    // Rule at src/isa/s390x/inst.isle line 2311.
+    return v3;
+}
+
+// Generated as internal constructor for term mvc.
+pub fn constructor_mvc<C: Context>(
+    ctx: &mut C,
+    arg0: &MemArgPair,
+    arg1: &MemArgPair,
+    arg2: u8,
+) -> SideEffectNoResult {
+    let v3 = MInst::Mvc {
+        dst: arg0.clone(),
+        src: arg1.clone(),
+        len_minus_one: arg2,
+    };
+    let v4 = SideEffectNoResult::Inst { inst: v3 };
+    // Rule at src/isa/s390x/inst.isle line 2316.
+    return v4;
+}
+
+// Generated as internal constructor for term load_ar.
+pub fn constructor_load_ar<C: Context>(ctx: &mut C, arg0: u8) -> Reg {
+    let v2 = C::temp_writable_reg(ctx, I64);
+    let v3 = MInst::LoadAR { rd: v2, ar: arg0 };
+    let v4 = C::emit(ctx, &v3);
+    let v5 = C::writable_reg_to_reg(ctx, v2);
+    // Rule at src/isa/s390x/inst.isle line 2321.
+    return v5;
+}
+
+// Generated as internal constructor for term insert_ar.
+pub fn constructor_insert_ar<C: Context>(ctx: &mut C, arg0: Reg, arg1: u8) -> Reg {
+    let v3 = C::temp_writable_reg(ctx, I64);
+    let v4 = MInst::InsertAR {
+        rd: v3,
+        ri: arg0,
+        ar: arg1,
+    };
+    let v5 = C::emit(ctx, &v4);
+    let v6 = C::writable_reg_to_reg(ctx, v3);
+    // Rule at src/isa/s390x/inst.isle line 2328.
+    return v6;
+}
+
+// Generated as internal constructor for term fpu_rr.
+pub fn constructor_fpu_rr<C: Context>(ctx: &mut C, arg0: Type, arg1: &FPUOp1, arg2: Reg) -> Reg {
+    let v3 = C::temp_writable_reg(ctx, arg0);
+    let v4 = MInst::FpuRR {
+        fpu_op: arg1.clone(),
+        rd: v3,
+        rn: arg2,
+    };
+    let v5 = C::emit(ctx, &v4);
+    let v6 = C::writable_reg_to_reg(ctx, v3);
+    // Rule at src/isa/s390x/inst.isle line 2335.
+    return v6;
+}
+
+// Generated as internal constructor for term fpu_rrr.
+pub fn constructor_fpu_rrr<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &FPUOp2,
+    arg2: Reg,
+    arg3: Reg,
+) -> Reg {
+    let v4 = C::temp_writable_reg(ctx, arg0);
+    let v5 = MInst::FpuRRR {
+        fpu_op: arg1.clone(),
+        rd: v4,
+        rn: arg2,
+        rm: arg3,
+    };
+    let v6 = C::emit(ctx, &v5);
+    let v7 = C::writable_reg_to_reg(ctx, v4);
+    // Rule at src/isa/s390x/inst.isle line 2342.
+    return v7;
+}
+
+// Generated as internal constructor for term fpu_rrrr.
+pub fn constructor_fpu_rrrr<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &FPUOp3,
+    arg2: Reg,
+    arg3: Reg,
+    arg4: Reg,
+) -> Reg {
+    let v5 = C::temp_writable_reg(ctx, arg0);
+    let v6 = MInst::FpuRRRR {
+        fpu_op: arg1.clone(),
+        rd: v5,
+        rn: arg2,
+        rm: arg3,
+        ra: arg4,
+    };
+    let v7 = C::emit(ctx, &v6);
+    let v8 = C::writable_reg_to_reg(ctx, v5);
+    // Rule at src/isa/s390x/inst.isle line 2349.
+    return v8;
+}
+
+// Generated as internal constructor for term fpu_cmp32.
+pub fn constructor_fpu_cmp32<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg) -> ProducesFlags {
+    let v2 = MInst::FpuCmp32 { rn: arg0, rm: arg1 };
+    let v3 = ProducesFlags::ProducesFlagsSideEffect { inst: v2 };
+    // Rule at src/isa/s390x/inst.isle line 2356.
+    return v3;
+}
+
+// Generated as internal constructor for term fpu_cmp64.
+pub fn constructor_fpu_cmp64<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg) -> ProducesFlags {
+    let v2 = MInst::FpuCmp64 { rn: arg0, rm: arg1 };
+    let v3 = ProducesFlags::ProducesFlagsSideEffect { inst: v2 };
+    // Rule at src/isa/s390x/inst.isle line 2361.
+    return v3;
+}
+
+// Generated as internal constructor for term fpu_round.
+pub fn constructor_fpu_round<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &FpuRoundOp,
+    arg2: &FpuRoundMode,
+    arg3: Reg,
+) -> Reg {
+    let v4 = C::temp_writable_reg(ctx, arg0);
+    let v5 = MInst::FpuRound {
+        op: arg1.clone(),
+        mode: arg2.clone(),
+        rd: v4,
+        rn: arg3,
+    };
+    let v6 = C::emit(ctx, &v5);
+    let v7 = C::writable_reg_to_reg(ctx, v4);
+    // Rule at src/isa/s390x/inst.isle line 2366.
+    return v7;
+}
+
+// Generated as internal constructor for term vec_rrr.
+pub fn constructor_vec_rrr<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &VecBinaryOp,
+    arg2: Reg,
+    arg3: Reg,
+) -> Reg {
+    let v4 = C::temp_writable_reg(ctx, arg0);
+    let v5 = MInst::VecRRR {
+        op: arg1.clone(),
+        rd: v4,
+        rn: arg2,
+        rm: arg3,
+    };
+    let v6 = C::emit(ctx, &v5);
+    let v7 = C::writable_reg_to_reg(ctx, v4);
+    // Rule at src/isa/s390x/inst.isle line 2373.
+    return v7;
+}
+
+// Generated as internal constructor for term vec_rr.
+pub fn constructor_vec_rr<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &VecUnaryOp,
+    arg2: Reg,
+) -> Reg {
+    let v3 = C::temp_writable_reg(ctx, arg0);
+    let v4 = MInst::VecRR {
+        op: arg1.clone(),
+        rd: v3,
+        rn: arg2,
+    };
+    let v5 = C::emit(ctx, &v4);
+    let v6 = C::writable_reg_to_reg(ctx, v3);
+    // Rule at src/isa/s390x/inst.isle line 2380.
+    return v6;
+}
+
+// Generated as internal constructor for term vec_shift_rr.
+pub fn constructor_vec_shift_rr<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &VecShiftOp,
+    arg2: Reg,
+    arg3: u8,
+    arg4: Reg,
+) -> Reg {
+    let v5 = C::temp_writable_reg(ctx, arg0);
+    let v6 = MInst::VecShiftRR {
+        shift_op: arg1.clone(),
+        rd: v5,
+        rn: arg2,
+        shift_imm: arg3,
+        shift_reg: arg4,
+    };
+    let v7 = C::emit(ctx, &v6);
+    let v8 = C::writable_reg_to_reg(ctx, v5);
+    // Rule at src/isa/s390x/inst.isle line 2387.
+    return v8;
+}
+
+// Generated as internal constructor for term vec_select.
+pub fn constructor_vec_select<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: Reg,
+    arg3: Reg,
+) -> Reg {
+    let v4 = C::temp_writable_reg(ctx, arg0);
+    let v5 = MInst::VecSelect {
+        rd: v4,
+        rn: arg1,
+        rm: arg2,
+        ra: arg3,
+    };
+    let v6 = C::emit(ctx, &v5);
+    let v7 = C::writable_reg_to_reg(ctx, v4);
+    // Rule at src/isa/s390x/inst.isle line 2394.
+    return v7;
+}
+
+// Generated as internal constructor for term vec_permute.
+pub fn constructor_vec_permute<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: Reg,
+    arg3: Reg,
+) -> Reg {
+    let v4 = C::temp_writable_reg(ctx, arg0);
+    let v5 = MInst::VecPermute {
+        rd: v4,
+        rn: arg1,
+        rm: arg2,
+        ra: arg3,
+    };
+    let v6 = C::emit(ctx, &v5);
+    let v7 = C::writable_reg_to_reg(ctx, v4);
+    // Rule at src/isa/s390x/inst.isle line 2401.
+    return v7;
+}
+
+// Generated as internal constructor for term vec_permute_dw_imm.
+pub fn constructor_vec_permute_dw_imm<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: u8,
+    arg3: Reg,
+    arg4: u8,
+) -> Reg {
+    let v5 = C::temp_writable_reg(ctx, arg0);
+    let v6 = MInst::VecPermuteDWImm {
+        rd: v5,
+        rn: arg1,
+        rm: arg3,
+        idx1: arg2,
+        idx2: arg4,
+    };
+    let v7 = C::emit(ctx, &v6);
+    let v8 = C::writable_reg_to_reg(ctx, v5);
+    // Rule at src/isa/s390x/inst.isle line 2408.
+    return v8;
+}
+
+// Generated as internal constructor for term vec_int_cmp.
+pub fn constructor_vec_int_cmp<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &VecIntCmpOp,
+    arg2: Reg,
+    arg3: Reg,
+) -> Reg {
+    let v4 = C::temp_writable_reg(ctx, arg0);
+    let v5 = MInst::VecIntCmp {
+        op: arg1.clone(),
+        rd: v4,
+        rn: arg2,
+        rm: arg3,
+    };
+    let v6 = C::emit(ctx, &v5);
+    let v7 = C::writable_reg_to_reg(ctx, v4);
+    // Rule at src/isa/s390x/inst.isle line 2415.
+    return v7;
+}
+
+// Generated as internal constructor for term vec_int_cmps.
+pub fn constructor_vec_int_cmps<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &VecIntCmpOp,
+    arg2: Reg,
+    arg3: Reg,
+) -> ProducesFlags {
+    let v4 = C::temp_writable_reg(ctx, arg0);
+    let v5 = MInst::VecIntCmpS {
+        op: arg1.clone(),
+        rd: v4,
+        rn: arg2,
+        rm: arg3,
+    };
+    let v6 = ProducesFlags::ProducesFlagsSideEffect { inst: v5 };
+    // Rule at src/isa/s390x/inst.isle line 2422.
+    return v6;
+}
+
+// Generated as internal constructor for term vec_float_cmp.
+pub fn constructor_vec_float_cmp<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &VecFloatCmpOp,
+    arg2: Reg,
+    arg3: Reg,
+) -> Reg {
+    let v4 = C::temp_writable_reg(ctx, arg0);
+    let v5 = MInst::VecFloatCmp {
+        op: arg1.clone(),
+        rd: v4,
+        rn: arg2,
+        rm: arg3,
+    };
+    let v6 = C::emit(ctx, &v5);
+    let v7 = C::writable_reg_to_reg(ctx, v4);
+    // Rule at src/isa/s390x/inst.isle line 2428.
+    return v7;
+}
+
+// Generated as internal constructor for term vec_float_cmps.
+pub fn constructor_vec_float_cmps<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &VecFloatCmpOp,
+    arg2: Reg,
+    arg3: Reg,
+) -> ProducesFlags {
+    let v4 = C::temp_writable_reg(ctx, arg0);
+    let v5 = MInst::VecFloatCmpS {
+        op: arg1.clone(),
+        rd: v4,
+        rn: arg2,
+        rm: arg3,
+    };
+    let v6 = ProducesFlags::ProducesFlagsSideEffect { inst: v5 };
+    // Rule at src/isa/s390x/inst.isle line 2435.
+    return v6;
+}
+
+// Generated as internal constructor for term vec_int128_scmphi.
+pub fn constructor_vec_int128_scmphi<C: Context>(
+    ctx: &mut C,
+    arg0: Reg,
+    arg1: Reg,
+) -> ProducesBool {
+    let v3 = C::temp_writable_reg(ctx, I128);
+    let v7 = &C::mask_as_cond(ctx, 0x4);
+    let v4 = MInst::VecInt128SCmpHi {
+        tmp: v3,
+        rn: arg0,
+        rm: arg1,
+    };
+    let v5 = ProducesFlags::ProducesFlagsSideEffect { inst: v4 };
+    let v8 = &constructor_bool(ctx, &v5, v7);
+    // Rule at src/isa/s390x/inst.isle line 2441.
+    return v8.clone();
+}
+
+// Generated as internal constructor for term vec_int128_ucmphi.
+pub fn constructor_vec_int128_ucmphi<C: Context>(
+    ctx: &mut C,
+    arg0: Reg,
+    arg1: Reg,
+) -> ProducesBool {
+    let v3 = C::temp_writable_reg(ctx, I128);
+    let v7 = &C::mask_as_cond(ctx, 0x4);
+    let v4 = MInst::VecInt128UCmpHi {
+        tmp: v3,
+        rn: arg0,
+        rm: arg1,
+    };
+    let v5 = ProducesFlags::ProducesFlagsSideEffect { inst: v4 };
+    let v8 = &constructor_bool(ctx, &v5, v7);
+    // Rule at src/isa/s390x/inst.isle line 2448.
+    return v8.clone();
+}
+
+// Generated as internal constructor for term vec_load.
+pub fn constructor_vec_load<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Reg {
+    let v2 = C::temp_writable_reg(ctx, arg0);
+    let v3 = MInst::VecLoad {
+        rd: v2,
+        mem: arg1.clone(),
+    };
+    let v4 = C::emit(ctx, &v3);
+    let v5 = C::writable_reg_to_reg(ctx, v2);
+    // Rule at src/isa/s390x/inst.isle line 2455.
+    return v5;
+}
+
+// Generated as internal constructor for term vec_loadrev.
+pub fn constructor_vec_loadrev<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Reg {
+    let v2 = C::temp_writable_reg(ctx, arg0);
+    let v3 = MInst::VecLoadRev {
+        rd: v2,
+        mem: arg1.clone(),
+    };
+    let v4 = C::emit(ctx, &v3);
+    let v5 = C::writable_reg_to_reg(ctx, v2);
+    // Rule at src/isa/s390x/inst.isle line 2462.
+    return v5;
+}
+
+// Generated as internal constructor for term vec_load_byte16rev.
+pub fn constructor_vec_load_byte16rev<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Reg {
+    let v2 = C::temp_writable_reg(ctx, arg0);
+    let v3 = MInst::VecLoadByte16Rev {
+        rd: v2,
+        mem: arg1.clone(),
+    };
+    let v4 = C::emit(ctx, &v3);
+    let v5 = C::writable_reg_to_reg(ctx, v2);
+    // Rule at src/isa/s390x/inst.isle line 2469.
+    return v5;
+}
+
+// Generated as internal constructor for term vec_load_byte32rev.
+pub fn constructor_vec_load_byte32rev<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Reg {
+    let v2 = C::temp_writable_reg(ctx, arg0);
+    let v3 = MInst::VecLoadByte32Rev {
+        rd: v2,
+        mem: arg1.clone(),
+    };
+    let v4 = C::emit(ctx, &v3);
+    let v5 = C::writable_reg_to_reg(ctx, v2);
+    // Rule at src/isa/s390x/inst.isle line 2476.
+    return v5;
+}
+
+// Generated as internal constructor for term vec_load_byte64rev.
+pub fn constructor_vec_load_byte64rev<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Reg {
+    let v2 = C::temp_writable_reg(ctx, arg0);
+    let v3 = MInst::VecLoadByte64Rev {
+        rd: v2,
+        mem: arg1.clone(),
+    };
+    let v4 = C::emit(ctx, &v3);
+    let v5 = C::writable_reg_to_reg(ctx, v2);
+    // Rule at src/isa/s390x/inst.isle line 2483.
+    return v5;
+}
+
+// Generated as internal constructor for term vec_load_elt16rev.
+pub fn constructor_vec_load_elt16rev<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Reg {
+    let v2 = C::temp_writable_reg(ctx, arg0);
+    let v3 = MInst::VecLoadElt16Rev {
+        rd: v2,
+        mem: arg1.clone(),
+    };
+    let v4 = C::emit(ctx, &v3);
+    let v5 = C::writable_reg_to_reg(ctx, v2);
+    // Rule at src/isa/s390x/inst.isle line 2490.
+    return v5;
+}
+
+// Generated as internal constructor for term vec_load_elt32rev.
+pub fn constructor_vec_load_elt32rev<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Reg {
+    let v2 = C::temp_writable_reg(ctx, arg0);
+    let v3 = MInst::VecLoadElt32Rev {
+        rd: v2,
+        mem: arg1.clone(),
+    };
+    let v4 = C::emit(ctx, &v3);
+    let v5 = C::writable_reg_to_reg(ctx, v2);
+    // Rule at src/isa/s390x/inst.isle line 2497.
+    return v5;
+}
+
+// Generated as internal constructor for term vec_load_elt64rev.
+pub fn constructor_vec_load_elt64rev<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Reg {
+    let v2 = C::temp_writable_reg(ctx, arg0);
+    let v3 = MInst::VecLoadElt64Rev {
+        rd: v2,
+        mem: arg1.clone(),
+    };
+    let v4 = C::emit(ctx, &v3);
+    let v5 = C::writable_reg_to_reg(ctx, v2);
+    // Rule at src/isa/s390x/inst.isle line 2504.
+    return v5;
+}
+
+// Generated as internal constructor for term vec_store.
+pub fn constructor_vec_store<C: Context>(
+    ctx: &mut C,
+    arg0: Reg,
+    arg1: &MemArg,
+) -> SideEffectNoResult {
+    let v2 = MInst::VecStore {
+        rd: arg0,
+        mem: arg1.clone(),
+    };
+    let v3 = SideEffectNoResult::Inst { inst: v2 };
+    // Rule at src/isa/s390x/inst.isle line 2511.
+    return v3;
+}
+
+// Generated as internal constructor for term vec_storerev.
+pub fn constructor_vec_storerev<C: Context>(
+    ctx: &mut C,
+    arg0: Reg,
+    arg1: &MemArg,
+) -> SideEffectNoResult {
+    let v2 = MInst::VecStoreRev {
+        rd: arg0,
+        mem: arg1.clone(),
+    };
+    let v3 = SideEffectNoResult::Inst { inst: v2 };
+    // Rule at src/isa/s390x/inst.isle line 2516.
+    return v3;
+}
+
+// Generated as internal constructor for term vec_store_byte16rev.
+pub fn constructor_vec_store_byte16rev<C: Context>(
+    ctx: &mut C,
+    arg0: Reg,
+    arg1: &MemArg,
+) -> SideEffectNoResult {
+    let v2 = MInst::VecStoreByte16Rev {
+        rd: arg0,
+        mem: arg1.clone(),
+    };
+    let v3 = SideEffectNoResult::Inst { inst: v2 };
+    // Rule at src/isa/s390x/inst.isle line 2521.
+    return v3;
+}
+
+// Generated as internal constructor for term vec_store_byte32rev.
+pub fn constructor_vec_store_byte32rev<C: Context>(
+    ctx: &mut C,
+    arg0: Reg,
+    arg1: &MemArg,
+) -> SideEffectNoResult {
+    let v2 = MInst::VecStoreByte32Rev {
+        rd: arg0,
+        mem: arg1.clone(),
+    };
+    let v3 = SideEffectNoResult::Inst { inst: v2 };
+    // Rule at src/isa/s390x/inst.isle line 2526.
+    return v3;
+}
+
+// Generated as internal constructor for term vec_store_byte64rev.
+pub fn constructor_vec_store_byte64rev<C: Context>(
+    ctx: &mut C,
+    arg0: Reg,
+    arg1: &MemArg,
+) -> SideEffectNoResult {
+    let v2 = MInst::VecStoreByte64Rev {
+        rd: arg0,
+        mem: arg1.clone(),
+    };
+    let v3 = SideEffectNoResult::Inst { inst: v2 };
+    // Rule at src/isa/s390x/inst.isle line 2531.
+    return v3;
+}
+
+// Generated as internal constructor for term vec_store_elt16rev.
+pub fn constructor_vec_store_elt16rev<C: Context>(
+    ctx: &mut C,
+    arg0: Reg,
+    arg1: &MemArg,
+) -> SideEffectNoResult {
+    let v2 = MInst::VecStoreElt16Rev {
+        rd: arg0,
+        mem: arg1.clone(),
+    };
+    let v3 = SideEffectNoResult::Inst { inst: v2 };
+    // Rule at src/isa/s390x/inst.isle line 2536.
+    return v3;
+}
+
+// Generated as internal constructor for term vec_store_elt32rev.
+pub fn constructor_vec_store_elt32rev<C: Context>(
+    ctx: &mut C,
+    arg0: Reg,
+    arg1: &MemArg,
+) -> SideEffectNoResult {
+    let v2 = MInst::VecStoreElt32Rev {
+        rd: arg0,
+        mem: arg1.clone(),
+    };
+    let v3 = SideEffectNoResult::Inst { inst: v2 };
+    // Rule at src/isa/s390x/inst.isle line 2541.
+    return v3;
+}
+
+// Generated as internal constructor for term vec_store_elt64rev.
+pub fn constructor_vec_store_elt64rev<C: Context>(
+    ctx: &mut C,
+    arg0: Reg,
+    arg1: &MemArg,
+) -> SideEffectNoResult {
+    let v2 = MInst::VecStoreElt64Rev {
+        rd: arg0,
+        mem: arg1.clone(),
+    };
+    let v3 = SideEffectNoResult::Inst { inst: v2 };
+    // Rule at src/isa/s390x/inst.isle line 2546.
+    return v3;
+}
+
+// Generated as internal constructor for term vec_load_replicate.
+pub fn constructor_vec_load_replicate<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Reg {
+    let v1 = C::ty_vec128(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v3 = C::multi_lane(ctx, v2);
+        if let Some(v4) = v3 {
+            let v8 = C::temp_writable_reg(ctx, v2);
+            let v9 = MInst::VecLoadReplicate {
+                size: v4.0,
+                rd: v8,
+                mem: arg1.clone(),
+            };
+            let v10 = C::emit(ctx, &v9);
+            let v11 = C::writable_reg_to_reg(ctx, v8);
+            // Rule at src/isa/s390x/inst.isle line 2551.
+            return v11;
+        }
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_load_replicate", "src/isa/s390x/inst.isle line 2550"
+    )
+}
+
+// Generated as internal constructor for term vec_load_replicate_rev.
+pub fn constructor_vec_load_replicate_rev<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &MemArg,
+) -> Reg {
+    let v1 = C::ty_vec128(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v3 = C::multi_lane(ctx, v2);
+        if let Some(v4) = v3 {
+            let v8 = C::temp_writable_reg(ctx, v2);
+            let v9 = MInst::VecLoadReplicateRev {
+                size: v4.0,
+                rd: v8,
+                mem: arg1.clone(),
+            };
+            let v10 = C::emit(ctx, &v9);
+            let v11 = C::writable_reg_to_reg(ctx, v8);
+            // Rule at src/isa/s390x/inst.isle line 2558.
+            return v11;
+        }
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_load_replicate_rev", "src/isa/s390x/inst.isle line 2557"
+    )
+}
+
+// Generated as internal constructor for term mov_to_vec128.
+pub fn constructor_mov_to_vec128<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v3 = C::temp_writable_reg(ctx, arg0);
+    let v4 = MInst::MovToVec128 {
+        rd: v3,
+        rn: arg1,
+        rm: arg2,
+    };
+    let v5 = C::emit(ctx, &v4);
+    let v6 = C::writable_reg_to_reg(ctx, v3);
+    // Rule at src/isa/s390x/inst.isle line 2565.
+    return v6;
+}
+
+// Generated as internal constructor for term vec_load_const.
+pub fn constructor_vec_load_const<C: Context>(ctx: &mut C, arg0: Type, arg1: u128) -> Reg {
+    let v1 = C::vr128_ty(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v4 = C::temp_writable_reg(ctx, v2);
+        let v5 = MInst::VecLoadConst {
+            rd: v4,
+            const_data: arg1,
+        };
+        let v6 = C::emit(ctx, &v5);
+        let v7 = C::writable_reg_to_reg(ctx, v4);
+        // Rule at src/isa/s390x/inst.isle line 2572.
+        return v7;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_load_const", "src/isa/s390x/inst.isle line 2571"
+    )
+}
+
+// Generated as internal constructor for term vec_load_const_replicate.
+pub fn constructor_vec_load_const_replicate<C: Context>(ctx: &mut C, arg0: Type, arg1: u64) -> Reg {
+    let v1 = C::multi_lane(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v6 = C::temp_writable_reg(ctx, arg0);
+        let v7 = MInst::VecLoadConstReplicate {
+            size: v2.0,
+            rd: v6,
+            const_data: arg1,
+        };
+        let v8 = C::emit(ctx, &v7);
+        let v9 = C::writable_reg_to_reg(ctx, v6);
+        // Rule at src/isa/s390x/inst.isle line 2579.
+        return v9;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_load_const_replicate", "src/isa/s390x/inst.isle line 2578"
+    )
+}
+
+// Generated as internal constructor for term vec_imm_byte_mask.
+pub fn constructor_vec_imm_byte_mask<C: Context>(ctx: &mut C, arg0: Type, arg1: u16) -> Reg {
+    let v1 = C::vr128_ty(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v4 = C::temp_writable_reg(ctx, v2);
+        let v5 = MInst::VecImmByteMask { rd: v4, mask: arg1 };
+        let v6 = C::emit(ctx, &v5);
+        let v7 = C::writable_reg_to_reg(ctx, v4);
+        // Rule at src/isa/s390x/inst.isle line 2586.
+        return v7;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_imm_byte_mask", "src/isa/s390x/inst.isle line 2585"
+    )
+}
+
+// Generated as internal constructor for term vec_imm_bit_mask.
+pub fn constructor_vec_imm_bit_mask<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: u8,
+    arg2: u8,
+) -> Reg {
+    let v1 = C::ty_vec128(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v3 = C::multi_lane(ctx, v2);
+        if let Some(v4) = v3 {
+            let v9 = C::temp_writable_reg(ctx, v2);
+            let v10 = MInst::VecImmBitMask {
+                size: v4.0,
+                rd: v9,
+                start_bit: arg1,
+                end_bit: arg2,
+            };
+            let v11 = C::emit(ctx, &v10);
+            let v12 = C::writable_reg_to_reg(ctx, v9);
+            // Rule at src/isa/s390x/inst.isle line 2593.
+            return v12;
+        }
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_imm_bit_mask", "src/isa/s390x/inst.isle line 2592"
+    )
+}
+
+// Generated as internal constructor for term vec_imm_replicate.
+pub fn constructor_vec_imm_replicate<C: Context>(ctx: &mut C, arg0: Type, arg1: i16) -> Reg {
+    let v1 = C::ty_vec128(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v3 = C::multi_lane(ctx, v2);
+        if let Some(v4) = v3 {
+            let v8 = C::temp_writable_reg(ctx, v2);
+            let v9 = MInst::VecImmReplicate {
+                size: v4.0,
+                rd: v8,
+                imm: arg1,
+            };
+            let v10 = C::emit(ctx, &v9);
+            let v11 = C::writable_reg_to_reg(ctx, v8);
+            // Rule at src/isa/s390x/inst.isle line 2600.
+            return v11;
+        }
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_imm_replicate", "src/isa/s390x/inst.isle line 2599"
+    )
+}
+
+// Generated as internal constructor for term vec_load_lane.
+pub fn constructor_vec_load_lane<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: &MemArg,
+    arg3: u8,
+) -> Reg {
+    let v1 = C::multi_lane(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v8 = C::temp_writable_reg(ctx, arg0);
+        let v9 = MInst::VecLoadLane {
+            size: v2.0,
+            rd: v8,
+            ri: arg1,
+            mem: arg2.clone(),
+            lane_imm: arg3,
+        };
+        let v10 = C::emit(ctx, &v9);
+        let v11 = C::writable_reg_to_reg(ctx, v8);
+        // Rule at src/isa/s390x/inst.isle line 2607.
+        return v11;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_load_lane", "src/isa/s390x/inst.isle line 2606"
+    )
+}
+
+// Generated as internal constructor for term vec_load_lane_undef.
+pub fn constructor_vec_load_lane_undef<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &MemArg,
+    arg2: u8,
+) -> Reg {
+    let v1 = C::multi_lane(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v7 = C::temp_writable_reg(ctx, arg0);
+        let v8 = MInst::VecLoadLaneUndef {
+            size: v2.0,
+            rd: v7,
+            mem: arg1.clone(),
+            lane_imm: arg2,
+        };
+        let v9 = C::emit(ctx, &v8);
+        let v10 = C::writable_reg_to_reg(ctx, v7);
+        // Rule at src/isa/s390x/inst.isle line 2614.
+        return v10;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_load_lane_undef", "src/isa/s390x/inst.isle line 2613"
+    )
+}
+
+// Generated as internal constructor for term vec_load_lane_rev.
+pub fn constructor_vec_load_lane_rev<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: &MemArg,
+    arg3: u8,
+) -> Reg {
+    let v1 = C::multi_lane(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v8 = C::temp_writable_reg(ctx, arg0);
+        let v9 = MInst::VecLoadLaneRev {
+            size: v2.0,
+            rd: v8,
+            ri: arg1,
+            mem: arg2.clone(),
+            lane_imm: arg3,
+        };
+        let v10 = C::emit(ctx, &v9);
+        let v11 = C::writable_reg_to_reg(ctx, v8);
+        // Rule at src/isa/s390x/inst.isle line 2621.
+        return v11;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_load_lane_rev", "src/isa/s390x/inst.isle line 2620"
+    )
+}
+
+// Generated as internal constructor for term vec_load_lane_rev_undef.
+pub fn constructor_vec_load_lane_rev_undef<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &MemArg,
+    arg2: u8,
+) -> Reg {
+    let v1 = C::multi_lane(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v7 = C::temp_writable_reg(ctx, arg0);
+        let v8 = MInst::VecLoadLaneRevUndef {
+            size: v2.0,
+            rd: v7,
+            mem: arg1.clone(),
+            lane_imm: arg2,
+        };
+        let v9 = C::emit(ctx, &v8);
+        let v10 = C::writable_reg_to_reg(ctx, v7);
+        // Rule at src/isa/s390x/inst.isle line 2628.
+        return v10;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_load_lane_rev_undef", "src/isa/s390x/inst.isle line 2627"
+    )
+}
+
+// Generated as internal constructor for term vec_store_lane.
+pub fn constructor_vec_store_lane<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: &MemArg,
+    arg3: u8,
+) -> SideEffectNoResult {
+    let v1 = C::multi_lane(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v8 = MInst::VecStoreLane {
+            size: v2.0,
+            rd: arg1,
+            mem: arg2.clone(),
+            lane_imm: arg3,
+        };
+        let v9 = SideEffectNoResult::Inst { inst: v8 };
+        // Rule at src/isa/s390x/inst.isle line 2635.
+        return v9;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_store_lane", "src/isa/s390x/inst.isle line 2634"
+    )
+}
+
+// Generated as internal constructor for term vec_store_lane_rev.
+pub fn constructor_vec_store_lane_rev<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: &MemArg,
+    arg3: u8,
+) -> SideEffectNoResult {
+    let v1 = C::multi_lane(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v8 = MInst::VecStoreLaneRev {
+            size: v2.0,
+            rd: arg1,
+            mem: arg2.clone(),
+            lane_imm: arg3,
+        };
+        let v9 = SideEffectNoResult::Inst { inst: v8 };
+        // Rule at src/isa/s390x/inst.isle line 2640.
+        return v9;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_store_lane_rev", "src/isa/s390x/inst.isle line 2639"
+    )
+}
+
+// Generated as internal constructor for term vec_insert_lane.
+pub fn constructor_vec_insert_lane<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: Reg,
+    arg3: u8,
+    arg4: Reg,
+) -> Reg {
+    let v1 = C::multi_lane(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v9 = C::temp_writable_reg(ctx, arg0);
+        let v10 = MInst::VecInsertLane {
+            size: v2.0,
+            rd: v9,
+            ri: arg1,
+            rn: arg2,
+            lane_imm: arg3,
+            lane_reg: arg4,
+        };
+        let v11 = C::emit(ctx, &v10);
+        let v12 = C::writable_reg_to_reg(ctx, v9);
+        // Rule at src/isa/s390x/inst.isle line 2645.
+        return v12;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_insert_lane", "src/isa/s390x/inst.isle line 2644"
+    )
+}
+
+// Generated as internal constructor for term vec_insert_lane_undef.
+pub fn constructor_vec_insert_lane_undef<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: u8,
+    arg3: Reg,
+) -> Reg {
+    let v1 = C::multi_lane(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v8 = C::temp_writable_reg(ctx, arg0);
+        let v9 = MInst::VecInsertLaneUndef {
+            size: v2.0,
+            rd: v8,
+            rn: arg1,
+            lane_imm: arg2,
+            lane_reg: arg3,
+        };
+        let v10 = C::emit(ctx, &v9);
+        let v11 = C::writable_reg_to_reg(ctx, v8);
+        // Rule at src/isa/s390x/inst.isle line 2652.
+        return v11;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_insert_lane_undef", "src/isa/s390x/inst.isle line 2651"
+    )
+}
+
+// Generated as internal constructor for term vec_extract_lane.
+pub fn constructor_vec_extract_lane<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: u8,
+    arg3: Reg,
+) -> Reg {
+    let v1 = C::multi_lane(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v9 = C::temp_writable_reg(ctx, I64);
+        let v10 = MInst::VecExtractLane {
+            size: v2.0,
+            rd: v9,
+            rn: arg1,
+            lane_imm: arg2,
+            lane_reg: arg3,
+        };
+        let v11 = C::emit(ctx, &v10);
+        let v12 = C::writable_reg_to_reg(ctx, v9);
+        // Rule at src/isa/s390x/inst.isle line 2659.
+        return v12;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_extract_lane", "src/isa/s390x/inst.isle line 2658"
+    )
+}
+
+// Generated as internal constructor for term vec_insert_lane_imm.
+pub fn constructor_vec_insert_lane_imm<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: i16,
+    arg3: u8,
+) -> Reg {
+    let v1 = C::multi_lane(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v8 = C::temp_writable_reg(ctx, arg0);
+        let v9 = MInst::VecInsertLaneImm {
+            size: v2.0,
+            rd: v8,
+            ri: arg1,
+            imm: arg2,
+            lane_imm: arg3,
+        };
+        let v10 = C::emit(ctx, &v9);
+        let v11 = C::writable_reg_to_reg(ctx, v8);
+        // Rule at src/isa/s390x/inst.isle line 2666.
+        return v11;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_insert_lane_imm", "src/isa/s390x/inst.isle line 2665"
+    )
+}
+
+// Generated as internal constructor for term vec_replicate_lane.
+pub fn constructor_vec_replicate_lane<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: u8,
+) -> Reg {
+    let v1 = C::multi_lane(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v7 = C::temp_writable_reg(ctx, arg0);
+        let v8 = MInst::VecReplicateLane {
+            size: v2.0,
+            rd: v7,
+            rn: arg1,
+            lane_imm: arg2,
+        };
+        let v9 = C::emit(ctx, &v8);
+        let v10 = C::writable_reg_to_reg(ctx, v7);
+        // Rule at src/isa/s390x/inst.isle line 2673.
+        return v10;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_replicate_lane", "src/isa/s390x/inst.isle line 2672"
+    )
+}
+
+// Generated as internal constructor for term load_symbol_reloc.
+pub fn constructor_load_symbol_reloc<C: Context>(ctx: &mut C, arg0: &SymbolReloc) -> Reg {
+    let v2 = C::temp_writable_reg(ctx, I64);
+    let v3 = C::box_symbol_reloc(ctx, arg0);
+    let v4 = MInst::LoadSymbolReloc {
+        rd: v2,
+        symbol_reloc: v3,
+    };
+    let v5 = C::emit(ctx, &v4);
+    let v6 = C::writable_reg_to_reg(ctx, v2);
+    // Rule at src/isa/s390x/inst.isle line 2680.
+    return v6;
+}
+
+// Generated as internal constructor for term load_addr.
+pub fn constructor_load_addr<C: Context>(ctx: &mut C, arg0: &MemArg) -> Reg {
+    let v2 = C::temp_writable_reg(ctx, I64);
+    let v3 = MInst::LoadAddr {
+        rd: v2,
+        mem: arg0.clone(),
+    };
+    let v4 = C::emit(ctx, &v3);
+    let v5 = C::writable_reg_to_reg(ctx, v2);
+    // Rule at src/isa/s390x/inst.isle line 2687.
+    return v5;
+}
+
+// Generated as internal constructor for term call_impl.
+pub fn constructor_call_impl<C: Context>(
+    ctx: &mut C,
+    arg0: WritableReg,
+    arg1: BoxCallInfo,
+) -> SideEffectNoResult {
+    let v2 = MInst::Call {
+        link: arg0,
+        info: arg1,
+    };
+    let v3 = SideEffectNoResult::Inst { inst: v2 };
+    // Rule at src/isa/s390x/inst.isle line 2694.
+    return v3;
+}
+
+// Generated as internal constructor for term call_ind_impl.
+pub fn constructor_call_ind_impl<C: Context>(
+    ctx: &mut C,
+    arg0: WritableReg,
+    arg1: BoxCallIndInfo,
+) -> SideEffectNoResult {
+    let v2 = MInst::CallInd {
+        link: arg0,
+        info: arg1,
+    };
+    let v3 = SideEffectNoResult::Inst { inst: v2 };
+    // Rule at src/isa/s390x/inst.isle line 2699.
+    return v3;
+}
+
+// Generated as internal constructor for term jump_impl.
+pub fn constructor_jump_impl<C: Context>(ctx: &mut C, arg0: MachLabel) -> SideEffectNoResult {
+    let v1 = MInst::Jump { dest: arg0 };
+    let v2 = SideEffectNoResult::Inst { inst: v1 };
+    // Rule at src/isa/s390x/inst.isle line 2704.
+    return v2;
+}
+
+// Generated as internal constructor for term cond_br.
+pub fn constructor_cond_br<C: Context>(
+    ctx: &mut C,
+    arg0: MachLabel,
+    arg1: MachLabel,
+    arg2: &Cond,
+) -> ConsumesFlags {
+    let v3 = MInst::CondBr {
+        taken: arg0,
+        not_taken: arg1,
+        cond: arg2.clone(),
+    };
+    let v4 = ConsumesFlags::ConsumesFlagsSideEffect { inst: v3 };
+    // Rule at src/isa/s390x/inst.isle line 2709.
+    return v4;
+}
+
+// Generated as internal constructor for term oneway_cond_br.
+pub fn constructor_oneway_cond_br<C: Context>(
+    ctx: &mut C,
+    arg0: MachLabel,
+    arg1: &Cond,
+) -> ConsumesFlags {
+    let v2 = MInst::OneWayCondBr {
+        target: arg0,
+        cond: arg1.clone(),
+    };
+    let v3 = ConsumesFlags::ConsumesFlagsSideEffect { inst: v2 };
+    // Rule at src/isa/s390x/inst.isle line 2714.
+    return v3;
+}
+
+// Generated as internal constructor for term jt_sequence.
+pub fn constructor_jt_sequence<C: Context>(
+    ctx: &mut C,
+    arg0: Reg,
+    arg1: &VecMachLabel,
+) -> SideEffectNoResult {
+    let v2 = MInst::JTSequence {
+        ridx: arg0,
+        targets: arg1.clone(),
+    };
+    let v3 = SideEffectNoResult::Inst { inst: v2 };
+    // Rule at src/isa/s390x/inst.isle line 2719.
+    return v3;
+}
+
+// Generated as internal constructor for term push_alu_reg.
+pub fn constructor_push_alu_reg<C: Context>(
+    ctx: &mut C,
+    arg0: &VecMInstBuilder,
+    arg1: &ALUOp,
+    arg2: WritableReg,
+    arg3: Reg,
+    arg4: Reg,
+) -> Reg {
+    let v3 = C::real_reg(ctx, arg2);
+    if let Some(v4) = v3 {
+        let v7 = MInst::AluRRR {
+            alu_op: arg1.clone(),
+            rd: v4,
+            rn: arg3,
+            rm: arg4,
+        };
+        let v8 = C::inst_builder_push(ctx, arg0, &v7);
+        let v9 = C::writable_reg_to_reg(ctx, v4);
+        // Rule at src/isa/s390x/inst.isle line 2757.
+        return v9;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "push_alu_reg", "src/isa/s390x/inst.isle line 2756"
+    )
+}
+
+// Generated as internal constructor for term push_alu_uimm32shifted.
+pub fn constructor_push_alu_uimm32shifted<C: Context>(
+    ctx: &mut C,
+    arg0: &VecMInstBuilder,
+    arg1: &ALUOp,
+    arg2: WritableReg,
+    arg3: Reg,
+    arg4: UImm32Shifted,
+) -> Reg {
+    let v3 = C::real_reg(ctx, arg2);
+    if let Some(v4) = v3 {
+        let v7 = MInst::AluRUImm32Shifted {
+            alu_op: arg1.clone(),
+            rd: v4,
+            ri: arg3,
+            imm: arg4,
+        };
+        let v8 = C::inst_builder_push(ctx, arg0, &v7);
+        let v9 = C::writable_reg_to_reg(ctx, v4);
+        // Rule at src/isa/s390x/inst.isle line 2763.
+        return v9;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "push_alu_uimm32shifted", "src/isa/s390x/inst.isle line 2762"
+    )
+}
+
+// Generated as internal constructor for term push_shift.
+pub fn constructor_push_shift<C: Context>(
+    ctx: &mut C,
+    arg0: &VecMInstBuilder,
+    arg1: &ShiftOp,
+    arg2: WritableReg,
+    arg3: Reg,
+    arg4: u8,
+    arg5: Reg,
+) -> Reg {
+    let v3 = C::real_reg(ctx, arg2);
+    if let Some(v4) = v3 {
+        let v8 = MInst::ShiftRR {
+            shift_op: arg1.clone(),
+            rd: v4,
+            rn: arg3,
+            shift_imm: arg4,
+            shift_reg: arg5,
+        };
+        let v9 = C::inst_builder_push(ctx, arg0, &v8);
+        let v10 = C::writable_reg_to_reg(ctx, v4);
+        // Rule at src/isa/s390x/inst.isle line 2769.
+        return v10;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "push_shift", "src/isa/s390x/inst.isle line 2768"
+    )
+}
+
+// Generated as internal constructor for term push_rxsbg.
+pub fn constructor_push_rxsbg<C: Context>(
+    ctx: &mut C,
+    arg0: &VecMInstBuilder,
+    arg1: &RxSBGOp,
+    arg2: WritableReg,
+    arg3: Reg,
+    arg4: Reg,
+    arg5: u8,
+    arg6: u8,
+    arg7: i8,
+) -> Reg {
+    let v3 = C::real_reg(ctx, arg2);
+    if let Some(v4) = v3 {
+        let v10 = C::same_reg(ctx, v4, arg3);
+        if let Some(v11) = v10 {
+            let v12 = MInst::RxSBG {
+                op: arg1.clone(),
+                rd: v4,
+                ri: arg3,
+                rn: arg4,
+                start_bit: arg5,
+                end_bit: arg6,
+                rotate_amt: arg7,
+            };
+            let v13 = C::inst_builder_push(ctx, arg0, &v12);
+            let v14 = C::writable_reg_to_reg(ctx, v4);
+            // Rule at src/isa/s390x/inst.isle line 2776.
+            return v14;
+        }
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "push_rxsbg", "src/isa/s390x/inst.isle line 2775"
+    )
+}
+
+// Generated as internal constructor for term push_unary.
+pub fn constructor_push_unary<C: Context>(
+    ctx: &mut C,
+    arg0: &VecMInstBuilder,
+    arg1: &UnaryOp,
+    arg2: WritableReg,
+    arg3: Reg,
+) -> Reg {
+    let v3 = C::real_reg(ctx, arg2);
+    if let Some(v4) = v3 {
+        let v6 = MInst::UnaryRR {
+            op: arg1.clone(),
+            rd: v4,
+            rn: arg3,
+        };
+        let v7 = C::inst_builder_push(ctx, arg0, &v6);
+        let v8 = C::writable_reg_to_reg(ctx, v4);
+        // Rule at src/isa/s390x/inst.isle line 2784.
+        return v8;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "push_unary", "src/isa/s390x/inst.isle line 2783"
+    )
+}
+
+// Generated as internal constructor for term push_atomic_cas32.
+pub fn constructor_push_atomic_cas32<C: Context>(
+    ctx: &mut C,
+    arg0: &VecMInstBuilder,
+    arg1: WritableReg,
+    arg2: Reg,
+    arg3: &MemArg,
+) -> Reg {
+    let v2 = C::real_reg(ctx, arg1);
+    if let Some(v3) = v2 {
+        let v6 = C::writable_reg_to_reg(ctx, v3);
+        let v7 = MInst::AtomicCas32 {
+            rd: v3,
+            ri: v6,
+            rn: arg2,
+            mem: arg3.clone(),
+        };
+        let v8 = C::inst_builder_push(ctx, arg0, &v7);
+        // Rule at src/isa/s390x/inst.isle line 2790.
+        return v6;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "push_atomic_cas32", "src/isa/s390x/inst.isle line 2789"
+    )
+}
+
+// Generated as internal constructor for term push_atomic_cas64.
+pub fn constructor_push_atomic_cas64<C: Context>(
+    ctx: &mut C,
+    arg0: &VecMInstBuilder,
+    arg1: WritableReg,
+    arg2: Reg,
+    arg3: &MemArg,
+) -> Reg {
+    let v2 = C::real_reg(ctx, arg1);
+    if let Some(v3) = v2 {
+        let v6 = C::writable_reg_to_reg(ctx, v3);
+        let v7 = MInst::AtomicCas64 {
+            rd: v3,
+            ri: v6,
+            rn: arg2,
+            mem: arg3.clone(),
+        };
+        let v8 = C::inst_builder_push(ctx, arg0, &v7);
+        // Rule at src/isa/s390x/inst.isle line 2796.
+        return v6;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "push_atomic_cas64", "src/isa/s390x/inst.isle line 2795"
+    )
+}
+
+// Generated as internal constructor for term push_break_if.
+pub fn constructor_push_break_if<C: Context>(
+    ctx: &mut C,
+    arg0: &VecMInstBuilder,
+    arg1: &ProducesFlags,
+    arg2: &Cond,
+) -> Reg {
+    if let &ProducesFlags::ProducesFlagsSideEffect { inst: ref v2 } = arg1 {
+        let v4 = C::inst_builder_push(ctx, arg0, v2);
+        let v5 = MInst::CondBreak { cond: arg2.clone() };
+        let v6 = C::inst_builder_push(ctx, arg0, &v5);
+        let v7 = C::invalid_reg(ctx);
+        // Rule at src/isa/s390x/inst.isle line 2802.
+        return v7;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "push_break_if", "src/isa/s390x/inst.isle line 2801"
+    )
+}
+
+// Generated as internal constructor for term emit_loop.
+pub fn constructor_emit_loop<C: Context>(ctx: &mut C, arg0: &VecMInstBuilder, arg1: &Cond) -> Unit {
+    let v2 = C::inst_builder_finish(ctx, arg0);
+    let v3 = MInst::Loop {
+        body: v2,
+        cond: arg1.clone(),
+    };
+    let v4 = C::emit(ctx, &v3);
+    // Rule at src/isa/s390x/inst.isle line 2809.
+    return v4;
+}
+
+// Generated as internal constructor for term copy_reg.
+pub fn constructor_copy_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
+    let v8 = C::gpr64_ty(ctx, arg0);
+    if let Some(v9) = v8 {
+        let v10 = C::temp_writable_reg(ctx, v9);
+        let v11 = MInst::Mov64 { rd: v10, rm: arg1 };
+        let v12 = C::emit(ctx, &v11);
+        let v13 = C::writable_reg_to_reg(ctx, v10);
+        // Rule at src/isa/s390x/inst.isle line 2821.
+        return v13;
+    }
+    let v1 = C::gpr32_ty(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v4 = C::temp_writable_reg(ctx, v2);
+        let v5 = MInst::Mov32 { rd: v4, rm: arg1 };
+        let v6 = C::emit(ctx, &v5);
+        let v7 = C::writable_reg_to_reg(ctx, v4);
+        // Rule at src/isa/s390x/inst.isle line 2817.
+        return v7;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "copy_reg", "src/isa/s390x/inst.isle line 2816"
+    )
+}
+
+// Generated as internal constructor for term emit_load.
+pub fn constructor_emit_load<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: WritableReg,
+    arg2: &MemArg,
+) -> Unit {
+    match arg0 {
+        I32 => {
+            let v3 = MInst::Load32 {
+                rd: arg1,
+                mem: arg2.clone(),
+            };
+            let v4 = C::emit(ctx, &v3);
+            // Rule at src/isa/s390x/inst.isle line 2828.
+            return v4;
+        }
+        I64 => {
+            let v5 = MInst::Load64 {
+                rd: arg1,
+                mem: arg2.clone(),
+            };
+            let v6 = C::emit(ctx, &v5);
+            // Rule at src/isa/s390x/inst.isle line 2830.
+            return v6;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "emit_load", "src/isa/s390x/inst.isle line 2827"
+    )
+}
+
+// Generated as internal constructor for term mov_preg.
+pub fn constructor_mov_preg<C: Context>(ctx: &mut C, arg0: PReg) -> Reg {
+    let v2 = C::temp_writable_reg(ctx, I64);
+    let v3 = MInst::MovPReg { rd: v2, rm: arg0 };
+    let v4 = C::emit(ctx, &v3);
+    let v5 = C::writable_reg_to_reg(ctx, v2);
+    // Rule at src/isa/s390x/inst.isle line 2835.
+    return v5;
+}
+
+// Generated as internal constructor for term sp.
+pub fn constructor_sp<C: Context>(ctx: &mut C) -> Reg {
+    let v0 = C::preg_stack(ctx);
+    let v1 = constructor_mov_preg(ctx, v0);
+    // Rule at src/isa/s390x/inst.isle line 2848.
+    return v1;
+}
+
+// Generated as internal constructor for term arg_store.
+pub fn constructor_arg_store<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: &MemArg,
+) -> SideEffectNoResult {
+    match arg0 {
+        I8 => {
+            let v3 = &constructor_store8(ctx, arg1, arg2);
+            // Rule at src/isa/s390x/inst.isle line 2854.
+            return v3.clone();
+        }
+        I16 => {
+            let v4 = &constructor_store16(ctx, arg1, arg2);
+            // Rule at src/isa/s390x/inst.isle line 2855.
+            return v4.clone();
+        }
+        I32 => {
+            let v5 = &constructor_store32(ctx, arg1, arg2);
+            // Rule at src/isa/s390x/inst.isle line 2856.
+            return v5.clone();
+        }
+        I64 => {
+            let v6 = &constructor_store64(ctx, arg1, arg2);
+            // Rule at src/isa/s390x/inst.isle line 2857.
+            return v6.clone();
+        }
+        R64 => {
+            let v6 = &constructor_store64(ctx, arg1, arg2);
+            // Rule at src/isa/s390x/inst.isle line 2858.
+            return v6.clone();
+        }
+        F32 => {
+            let v9 = &constructor_vec_store_lane(ctx, F32X4, arg1, arg2, 0x0);
+            // Rule at src/isa/s390x/inst.isle line 2859.
+            return v9.clone();
+        }
+        F64 => {
+            let v11 = &constructor_vec_store_lane(ctx, F64X2, arg1, arg2, 0x0);
+            // Rule at src/isa/s390x/inst.isle line 2860.
+            return v11.clone();
+        }
+        _ => {}
+    }
+    let v12 = C::vr128_ty(ctx, arg0);
+    if let Some(v13) = v12 {
+        let v14 = &constructor_vec_store(ctx, arg1, arg2);
+        // Rule at src/isa/s390x/inst.isle line 2861.
+        return v14.clone();
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "arg_store", "src/isa/s390x/inst.isle line 2853"
+    )
+}
+
+// Generated as internal constructor for term arg_load.
+pub fn constructor_arg_load<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Reg {
+    match arg0 {
+        I8 => {
+            let v3 = constructor_zext32_mem(ctx, I8, arg1);
+            // Rule at src/isa/s390x/inst.isle line 2864.
+            return v3;
+        }
+        I16 => {
+            let v5 = constructor_zext32_mem(ctx, I16, arg1);
+            // Rule at src/isa/s390x/inst.isle line 2865.
+            return v5;
+        }
+        I32 => {
+            let v6 = constructor_load32(ctx, arg1);
+            // Rule at src/isa/s390x/inst.isle line 2866.
+            return v6;
+        }
+        I64 => {
+            let v7 = constructor_load64(ctx, arg1);
+            // Rule at src/isa/s390x/inst.isle line 2867.
+            return v7;
+        }
+        R64 => {
+            let v7 = constructor_load64(ctx, arg1);
+            // Rule at src/isa/s390x/inst.isle line 2868.
+            return v7;
+        }
+        F32 => {
+            let v10 = constructor_vec_load_lane_undef(ctx, F32X4, arg1, 0x0);
+            // Rule at src/isa/s390x/inst.isle line 2869.
+            return v10;
+        }
+        F64 => {
+            let v12 = constructor_vec_load_lane_undef(ctx, F64X2, arg1, 0x0);
+            // Rule at src/isa/s390x/inst.isle line 2870.
+            return v12;
+        }
+        _ => {}
+    }
+    let v13 = C::vr128_ty(ctx, arg0);
+    if let Some(v14) = v13 {
+        let v15 = constructor_vec_load(ctx, v14, arg1);
+        // Rule at src/isa/s390x/inst.isle line 2871.
+        return v15;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "arg_load", "src/isa/s390x/inst.isle line 2863"
+    )
+}
+
+// Generated as internal constructor for term vec_elt_rev.
+pub fn constructor_vec_elt_rev<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
+    let v1 = C::multi_lane(ctx, arg0);
+    if let Some(v2) = v1 {
+        match v2.0 {
+            0x8 => {
+                if v2.1 == 0x10 {
+                    let v9 = constructor_vec_permute_dw_imm(ctx, I64X2, arg1, 0x1, arg1, 0x0);
+                    let v11 = constructor_vec_rot_imm(ctx, I64X2, v9, 0x20);
+                    let v14 = constructor_vec_rot_imm(ctx, I32X4, v11, 0x10);
+                    let v17 = constructor_vec_rot_imm(ctx, I16X8, v14, 0x8);
+                    // Rule at src/isa/s390x/inst.isle line 2883.
+                    return v17;
+                }
+            }
+            0x10 => {
+                if v2.1 == 0x8 {
+                    let v9 = constructor_vec_permute_dw_imm(ctx, I64X2, arg1, 0x1, arg1, 0x0);
+                    let v11 = constructor_vec_rot_imm(ctx, I64X2, v9, 0x20);
+                    let v14 = constructor_vec_rot_imm(ctx, I32X4, v11, 0x10);
+                    // Rule at src/isa/s390x/inst.isle line 2880.
+                    return v14;
+                }
+            }
+            0x20 => {
+                if v2.1 == 0x4 {
+                    let v9 = constructor_vec_permute_dw_imm(ctx, I64X2, arg1, 0x1, arg1, 0x0);
+                    let v11 = constructor_vec_rot_imm(ctx, I64X2, v9, 0x20);
+                    // Rule at src/isa/s390x/inst.isle line 2877.
+                    return v11;
+                }
+            }
+            0x40 => {
+                if v2.1 == 0x2 {
+                    let v9 = constructor_vec_permute_dw_imm(ctx, I64X2, arg1, 0x1, arg1, 0x0);
+                    // Rule at src/isa/s390x/inst.isle line 2875.
+                    return v9;
+                }
+            }
+            _ => {}
+        }
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_elt_rev", "src/isa/s390x/inst.isle line 2874"
+    )
+}
+
+// Generated as internal constructor for term abi_vec_elt_rev.
+pub fn constructor_abi_vec_elt_rev<C: Context>(
+    ctx: &mut C,
+    arg0: &LaneOrder,
+    arg1: Type,
+    arg2: Reg,
+) -> Reg {
+    let v2 = C::gpr32_ty(ctx, arg1);
+    if let Some(v3) = v2 {
+        // Rule at src/isa/s390x/inst.isle line 2891.
+        return arg2;
+    }
+    let v5 = C::gpr64_ty(ctx, arg1);
+    if let Some(v6) = v5 {
+        // Rule at src/isa/s390x/inst.isle line 2892.
+        return arg2;
+    }
+    let v7 = C::ty_scalar_float(ctx, arg1);
+    if let Some(v8) = v7 {
+        // Rule at src/isa/s390x/inst.isle line 2893.
+        return arg2;
+    }
+    let v9 = &C::lane_order(ctx);
+    let v10 = constructor_lane_order_equal(ctx, arg0, v9);
+    match v10 {
+        true => {
+            // Rule at src/isa/s390x/inst.isle line 2894.
+            return arg2;
+        }
+        false => {
+            let v11 = C::vr128_ty(ctx, arg1);
+            if let Some(v12) = v11 {
+                let v13 = constructor_vec_elt_rev(ctx, v12, arg2);
+                // Rule at src/isa/s390x/inst.isle line 2897.
+                return v13;
+            }
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "abi_vec_elt_rev", "src/isa/s390x/inst.isle line 2890"
+    )
+}
+
+// Generated as internal constructor for term memcpy.
+pub fn constructor_memcpy<C: Context>(
+    ctx: &mut C,
+    arg0: &MemArg,
+    arg1: &MemArg,
+    arg2: u64,
+) -> SideEffectNoResult {
+    let v3 = C::len_minus_one(ctx, arg2);
+    if let Some(v4) = v3 {
+        let v5 = &constructor_memarg_pair(ctx, arg0);
+        let v6 = &constructor_memarg_pair(ctx, arg1);
+        let v7 = &constructor_mvc(ctx, v5, v6, v4);
+        // Rule at src/isa/s390x/inst.isle line 2903.
+        return v7.clone();
+    }
+    let v8 = constructor_load_addr(ctx, arg0);
+    let v9 = constructor_load_addr(ctx, arg1);
+    let v11 = constructor_imm(ctx, I64, arg2);
+    let v12 = &C::lib_call_info_memcpy(ctx, v8, v9, v11);
+    let v13 = C::lib_accumulate_outgoing_args_size(ctx, v12);
+    let v14 = &constructor_lib_call(ctx, v12);
+    // Rule at src/isa/s390x/inst.isle line 2905.
+    return v14.clone();
+}
+
+// Generated as internal constructor for term copy_to_buffer.
+pub fn constructor_copy_to_buffer<C: Context>(
+    ctx: &mut C,
+    arg0: i64,
+    arg1: &ABIArg,
+    arg2: Value,
+) -> InstOutput {
+    let v2 = &C::abi_arg_only_slot(ctx, arg1);
+    if let Some(v3) = v2 {
+        let v5 = C::output_none(ctx);
+        // Rule at src/isa/s390x/inst.isle line 2912.
+        return v5;
+    }
+    let v6 = C::abi_arg_struct_pointer(ctx, arg1);
+    if let Some(v7) = v6 {
+        let v11 = &C::memarg_stack_off(ctx, arg0, v7.1);
+        let v12 = C::put_in_reg(ctx, arg2);
+        let v15 = C::memflags_trusted(ctx);
+        let v16 = &C::memarg_reg_plus_off(ctx, v12, 0x0, 0x0, v15);
+        let v17 = &constructor_memcpy(ctx, v11, v16, v7.2);
+        let v18 = constructor_side_effect(ctx, v17);
+        // Rule at src/isa/s390x/inst.isle line 2913.
+        return v18;
+    }
+    let v19 = C::abi_arg_implicit_pointer(ctx, arg1);
+    if let Some(v20) = v19 {
+        let v24 = C::value_type(ctx, arg2);
+        if v20.2 == v24 {
+            let v25 = C::put_in_reg(ctx, arg2);
+            let v26 = &C::memarg_stack_off(ctx, arg0, v20.1);
+            let v27 = &constructor_arg_store(ctx, v20.2, v25, v26);
+            let v28 = constructor_side_effect(ctx, v27);
+            // Rule at src/isa/s390x/inst.isle line 2917.
+            return v28;
+        }
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "copy_to_buffer", "src/isa/s390x/inst.isle line 2911"
+    )
+}
+
+// Generated as internal constructor for term copy_to_arg.
+pub fn constructor_copy_to_arg<C: Context>(
+    ctx: &mut C,
+    arg0: &CallArgListBuilder,
+    arg1: &LaneOrder,
+    arg2: i64,
+    arg3: &ABIArg,
+    arg4: Value,
+) -> InstOutput {
+    let v4 = &C::abi_arg_only_slot(ctx, arg3);
+    if let Some(v5) = v4 {
+        let v7 = constructor_prepare_arg_val(ctx, v5, arg4);
+        let v8 = constructor_copy_reg_to_arg_slot(ctx, arg0, arg1, arg2, v5, v7);
+        // Rule at src/isa/s390x/inst.isle line 2924.
+        return v8;
+    }
+    let v9 = C::abi_arg_struct_pointer(ctx, arg3);
+    if let Some(v10) = v9 {
+        let v14 = &C::memarg_stack_off(ctx, arg2, v10.1);
+        let v15 = constructor_load_addr(ctx, v14);
+        let v16 = constructor_copy_reg_to_arg_slot(ctx, arg0, arg1, arg2, &v10.0, v15);
+        // Rule at src/isa/s390x/inst.isle line 2926.
+        return v16;
+    }
+    let v17 = C::abi_arg_implicit_pointer(ctx, arg3);
+    if let Some(v18) = v17 {
+        let v22 = &C::memarg_stack_off(ctx, arg2, v18.1);
+        let v23 = constructor_load_addr(ctx, v22);
+        let v24 = constructor_copy_reg_to_arg_slot(ctx, arg0, arg1, arg2, &v18.0, v23);
+        // Rule at src/isa/s390x/inst.isle line 2929.
+        return v24;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "copy_to_arg", "src/isa/s390x/inst.isle line 2923"
+    )
+}
+
+// Generated as internal constructor for term copy_from_arg.
+pub fn constructor_copy_from_arg<C: Context>(
+    ctx: &mut C,
+    arg0: &CallRetList,
+    arg1: &LaneOrder,
+    arg2: i64,
+    arg3: &ABIArg,
+) -> ValueRegs {
+    let v4 = &C::abi_arg_only_slot(ctx, arg3);
+    if let Some(v5) = v4 {
+        let v6 = constructor_copy_reg_from_arg_slot(ctx, arg0, arg1, arg2, v5);
+        let v7 = C::value_reg(ctx, v6);
+        // Rule at src/isa/s390x/inst.isle line 2935.
+        return v7;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "copy_from_arg", "src/isa/s390x/inst.isle line 2934"
+    )
+}
+
+// Generated as internal constructor for term prepare_arg_val.
+pub fn constructor_prepare_arg_val<C: Context>(ctx: &mut C, arg0: &ABIArgSlot, arg1: Value) -> Reg {
+    match arg0 {
+        &ABIArgSlot::Reg {
+            reg: v1,
+            ty: v2,
+            extension: ref v3,
+        } => {
+            match v3 {
+                &ArgumentExtension::None => {
+                    if v2 == R64 {
+                        let v6 = C::put_in_reg(ctx, arg1);
+                        let v7 = constructor_copy_reg(ctx, I64, v6);
+                        // Rule at src/isa/s390x/inst.isle line 2942.
+                        return v7;
+                    }
+                    let v6 = C::put_in_reg(ctx, arg1);
+                    // Rule at src/isa/s390x/inst.isle line 2944.
+                    return v6;
+                }
+                &ArgumentExtension::Uext => {
+                    let v8 = constructor_put_in_reg_zext64(ctx, arg1);
+                    // Rule at src/isa/s390x/inst.isle line 2946.
+                    return v8;
+                }
+                &ArgumentExtension::Sext => {
+                    let v9 = constructor_put_in_reg_sext64(ctx, arg1);
+                    // Rule at src/isa/s390x/inst.isle line 2948.
+                    return v9;
+                }
+                _ => {}
+            }
+        }
+        &ABIArgSlot::Stack {
+            offset: v10,
+            ty: v11,
+            extension: ref v12,
+        } => {
+            match v12 {
+                &ArgumentExtension::None => {
+                    let v6 = C::put_in_reg(ctx, arg1);
+                    // Rule at src/isa/s390x/inst.isle line 2950.
+                    return v6;
+                }
+                &ArgumentExtension::Uext => {
+                    let v8 = constructor_put_in_reg_zext64(ctx, arg1);
+                    // Rule at src/isa/s390x/inst.isle line 2952.
+                    return v8;
+                }
+                &ArgumentExtension::Sext => {
+                    let v9 = constructor_put_in_reg_sext64(ctx, arg1);
+                    // Rule at src/isa/s390x/inst.isle line 2954.
+                    return v9;
+                }
+                _ => {}
+            }
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "prepare_arg_val", "src/isa/s390x/inst.isle line 2941"
+    )
+}
+
+// Generated as internal constructor for term copy_reg_to_arg_slot.
+pub fn constructor_copy_reg_to_arg_slot<C: Context>(
+    ctx: &mut C,
+    arg0: &CallArgListBuilder,
+    arg1: &LaneOrder,
+    arg2: i64,
+    arg3: &ABIArgSlot,
+    arg4: Reg,
+) -> InstOutput {
+    match arg3 {
+        &ABIArgSlot::Reg {
+            reg: v4,
+            ty: v5,
+            extension: ref v6,
+        } => {
+            let v8 = constructor_abi_vec_elt_rev(ctx, arg1, v5, arg4);
+            let v9 = C::args_builder_push(ctx, arg0, v8, v4);
+            let v10 = C::output_none(ctx);
+            // Rule at src/isa/s390x/inst.isle line 2960.
+            return v10;
+        }
+        &ABIArgSlot::Stack {
+            offset: v11,
+            ty: v12,
+            extension: ref v13,
+        } => {
+            let v14 = constructor_abi_ext_ty(ctx, v13, v12);
+            let v15 = &C::memarg_stack_off(ctx, arg2, v11);
+            let v16 = &constructor_arg_store(ctx, v14, arg4, v15);
+            let v17 = constructor_side_effect(ctx, v16);
+            // Rule at src/isa/s390x/inst.isle line 2963.
+            return v17;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "copy_reg_to_arg_slot", "src/isa/s390x/inst.isle line 2959"
+    )
+}
+
+// Generated as internal constructor for term copy_reg_from_arg_slot.
+pub fn constructor_copy_reg_from_arg_slot<C: Context>(
+    ctx: &mut C,
+    arg0: &CallRetList,
+    arg1: &LaneOrder,
+    arg2: i64,
+    arg3: &ABIArgSlot,
+) -> Reg {
+    match arg3 {
+        &ABIArgSlot::Reg {
+            reg: v4,
+            ty: v5,
+            extension: ref v6,
+        } => {
+            let v7 = C::defs_lookup(ctx, arg0, v4);
+            let v8 = constructor_abi_vec_elt_rev(ctx, arg1, v5, v7);
+            // Rule at src/isa/s390x/inst.isle line 2968.
+            return v8;
+        }
+        &ABIArgSlot::Stack {
+            offset: v9,
+            ty: v10,
+            extension: ref v11,
+        } => {
+            let v12 = constructor_abi_ext_ty(ctx, v11, v10);
+            let v13 = &C::memarg_stack_off(ctx, arg2, v9);
+            let v14 = constructor_arg_load(ctx, v12, v13);
+            // Rule at src/isa/s390x/inst.isle line 2970.
+            return v14;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "copy_reg_from_arg_slot", "src/isa/s390x/inst.isle line 2967"
+    )
+}
+
+// Generated as internal constructor for term abi_ext_ty.
+pub fn constructor_abi_ext_ty<C: Context>(
+    ctx: &mut C,
+    arg0: &ArgumentExtension,
+    arg1: Type,
+) -> Type {
+    match arg0 {
+        &ArgumentExtension::Uext => {
+            let v2 = C::gpr32_ty(ctx, arg1);
+            if let Some(v3) = v2 {
+                // Rule at src/isa/s390x/inst.isle line 2976.
+                return I64;
+            }
+        }
+        &ArgumentExtension::Sext => {
+            let v2 = C::gpr32_ty(ctx, arg1);
+            if let Some(v3) = v2 {
+                // Rule at src/isa/s390x/inst.isle line 2977.
+                return I64;
+            }
+        }
+        _ => {}
+    }
+    // Rule at src/isa/s390x/inst.isle line 2975.
+    return arg1;
+}
+
+// Generated as internal constructor for term imm.
+pub fn constructor_imm<C: Context>(ctx: &mut C, arg0: Type, arg1: u64) -> Reg {
+    match arg0 {
+        F32 => {
+            let v45 = C::temp_writable_reg(ctx, F32);
+            let v17 = C::u64_truncate_to_u32(ctx, arg1);
+            let v46 = MInst::LoadFpuConst32 {
+                rd: v45,
+                const_data: v17,
+            };
+            let v47 = C::emit(ctx, &v46);
+            let v48 = C::writable_reg_to_reg(ctx, v45);
+            // Rule at src/isa/s390x/inst.isle line 3049.
+            return v48;
+        }
+        F64 => {
+            let v50 = C::temp_writable_reg(ctx, F64);
+            let v51 = MInst::LoadFpuConst64 {
+                rd: v50,
+                const_data: arg1,
+            };
+            let v52 = C::emit(ctx, &v51);
+            let v53 = C::writable_reg_to_reg(ctx, v50);
+            // Rule at src/isa/s390x/inst.isle line 3056.
+            return v53;
+        }
+        _ => {}
+    }
+    let v1 = C::fits_in_16(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v4 = C::temp_writable_reg(ctx, v2);
+        let v5 = C::u64_as_i16(ctx, arg1);
+        let v6 = MInst::Mov32SImm16 { rd: v4, imm: v5 };
+        let v7 = C::emit(ctx, &v6);
+        let v8 = C::writable_reg_to_reg(ctx, v4);
+        // Rule at src/isa/s390x/inst.isle line 2986.
+        return v8;
+    }
+    let v9 = C::gpr32_ty(ctx, arg0);
+    if let Some(v10) = v9 {
+        let v11 = C::i16_from_u64(ctx, arg1);
+        if let Some(v12) = v11 {
+            let v13 = C::temp_writable_reg(ctx, v10);
+            let v14 = MInst::Mov32SImm16 { rd: v13, imm: v12 };
+            let v15 = C::emit(ctx, &v14);
+            let v16 = C::writable_reg_to_reg(ctx, v13);
+            // Rule at src/isa/s390x/inst.isle line 2992.
+            return v16;
+        }
+        let v13 = C::temp_writable_reg(ctx, v10);
+        let v17 = C::u64_truncate_to_u32(ctx, arg1);
+        let v18 = MInst::Mov32Imm { rd: v13, imm: v17 };
+        let v19 = C::emit(ctx, &v18);
+        let v16 = C::writable_reg_to_reg(ctx, v13);
+        // Rule at src/isa/s390x/inst.isle line 2998.
+        return v16;
+    }
+    let v20 = C::gpr64_ty(ctx, arg0);
+    if let Some(v21) = v20 {
+        let v11 = C::i16_from_u64(ctx, arg1);
+        if let Some(v12) = v11 {
+            let v22 = C::temp_writable_reg(ctx, v21);
+            let v23 = MInst::Mov64SImm16 { rd: v22, imm: v12 };
+            let v24 = C::emit(ctx, &v23);
+            let v25 = C::writable_reg_to_reg(ctx, v22);
+            // Rule at src/isa/s390x/inst.isle line 3004.
+            return v25;
+        }
+        let v26 = C::i32_from_u64(ctx, arg1);
+        if let Some(v27) = v26 {
+            let v22 = C::temp_writable_reg(ctx, v21);
+            let v28 = MInst::Mov64SImm32 { rd: v22, imm: v27 };
+            let v29 = C::emit(ctx, &v28);
+            let v25 = C::writable_reg_to_reg(ctx, v22);
+            // Rule at src/isa/s390x/inst.isle line 3010.
+            return v25;
+        }
+        let v30 = C::uimm16shifted_from_u64(ctx, arg1);
+        if let Some(v31) = v30 {
+            let v22 = C::temp_writable_reg(ctx, v21);
+            let v32 = MInst::Mov64UImm16Shifted { rd: v22, imm: v31 };
+            let v33 = C::emit(ctx, &v32);
+            let v25 = C::writable_reg_to_reg(ctx, v22);
+            // Rule at src/isa/s390x/inst.isle line 3016.
+            return v25;
+        }
+        let v34 = C::uimm32shifted_from_u64(ctx, arg1);
+        if let Some(v35) = v34 {
+            let v22 = C::temp_writable_reg(ctx, v21);
+            let v36 = MInst::Mov64UImm32Shifted { rd: v22, imm: v35 };
+            let v37 = C::emit(ctx, &v36);
+            let v25 = C::writable_reg_to_reg(ctx, v22);
+            // Rule at src/isa/s390x/inst.isle line 3022.
+            return v25;
+        }
+        let v38 = C::u64_nonzero_hipart(ctx, arg1);
+        if let Some(v39) = v38 {
+            let v40 = C::u64_nonzero_lopart(ctx, arg1);
+            if let Some(v41) = v40 {
+                let v42 = constructor_imm(ctx, v21, v39);
+                let v43 = constructor_insert_imm(ctx, v21, v42, v41);
+                // Rule at src/isa/s390x/inst.isle line 3028.
+                return v43;
+            }
+        }
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "imm", "src/isa/s390x/inst.isle line 2983"
+    )
+}
+
+// Generated as internal constructor for term insert_imm.
+pub fn constructor_insert_imm<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: u64) -> Reg {
+    let v3 = C::uimm16shifted_from_u64(ctx, arg2);
+    if let Some(v4) = v3 {
+        let v5 = C::temp_writable_reg(ctx, arg0);
+        let v6 = MInst::Insert64UImm16Shifted {
+            rd: v5,
+            ri: arg1,
+            imm: v4,
+        };
+        let v7 = C::emit(ctx, &v6);
+        let v8 = C::writable_reg_to_reg(ctx, v5);
+        // Rule at src/isa/s390x/inst.isle line 3036.
+        return v8;
+    }
+    let v9 = C::uimm32shifted_from_u64(ctx, arg2);
+    if let Some(v10) = v9 {
+        let v5 = C::temp_writable_reg(ctx, arg0);
+        let v11 = MInst::Insert64UImm32Shifted {
+            rd: v5,
+            ri: arg1,
+            imm: v10,
+        };
+        let v12 = C::emit(ctx, &v11);
+        let v8 = C::writable_reg_to_reg(ctx, v5);
+        // Rule at src/isa/s390x/inst.isle line 3042.
+        return v8;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "insert_imm", "src/isa/s390x/inst.isle line 3033"
+    )
+}
+
+// Generated as internal constructor for term imm32.
+pub fn constructor_imm32<C: Context>(ctx: &mut C, arg0: Type, arg1: i32) -> Reg {
+    if arg0 == I64 {
+        let v3 = C::temp_writable_reg(ctx, I64);
+        let v4 = MInst::Mov64SImm32 { rd: v3, imm: arg1 };
+        let v5 = C::emit(ctx, &v4);
+        let v6 = C::writable_reg_to_reg(ctx, v3);
+        // Rule at src/isa/s390x/inst.isle line 3063.
+        return v6;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "imm32", "src/isa/s390x/inst.isle line 3062"
+    )
+}
+
+// Generated as internal constructor for term vec_imm.
+pub fn constructor_vec_imm<C: Context>(ctx: &mut C, arg0: Type, arg1: u128) -> Reg {
+    let v1 = C::vr128_ty(ctx, arg0);
+    if let Some(v2) = v1 {
+        if arg1 == 0x0 {
+            let v5 = constructor_vec_imm_byte_mask(ctx, v2, 0x0);
+            // Rule at src/isa/s390x/inst.isle line 3070.
+            return v5;
+        }
+        let v6 = C::u64_pair_split(ctx, arg1);
+        if v6.0 == v6.1 {
+            let v10 = constructor_vec_imm_splat(ctx, I64X2, v6.0);
+            // Rule at src/isa/s390x/inst.isle line 3072.
+            return v10;
+        }
+        let v11 = constructor_vec_load_const(ctx, v2, arg1);
+        // Rule at src/isa/s390x/inst.isle line 3074.
+        return v11;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_imm", "src/isa/s390x/inst.isle line 3069"
+    )
+}
+
+// Generated as internal constructor for term vec_imm_splat.
+pub fn constructor_vec_imm_splat<C: Context>(ctx: &mut C, arg0: Type, arg1: u64) -> Reg {
+    let v6 = C::multi_lane(ctx, arg0);
+    if let Some(v7) = v6 {
+        match v7.0 {
+            0x8 => {
+                let v10 = C::u64_as_i16(ctx, arg1);
+                let v11 = constructor_vec_imm_replicate(ctx, arg0, v10);
+                // Rule at src/isa/s390x/inst.isle line 3081.
+                return v11;
+            }
+            0x10 => {
+                let v12 = C::u32_pair_split(ctx, arg1);
+                let v21 = C::u16_pair_split(ctx, v12.1);
+                let v24 = C::u8_pair_split(ctx, v21.1);
+                if v24.0 == v24.1 {
+                    let v28 = C::u8_as_u64(ctx, v24.0);
+                    let v29 = constructor_vec_imm_splat(ctx, I8X16, v28);
+                    // Rule at src/isa/s390x/inst.isle line 3089.
+                    return v29;
+                }
+                let v10 = C::u64_as_i16(ctx, arg1);
+                let v11 = constructor_vec_imm_replicate(ctx, arg0, v10);
+                // Rule at src/isa/s390x/inst.isle line 3083.
+                return v11;
+            }
+            0x20 => {
+                let v12 = C::u32_pair_split(ctx, arg1);
+                let v21 = C::u16_pair_split(ctx, v12.1);
+                if v21.0 == v21.1 {
+                    let v31 = C::u16_as_u64(ctx, v21.0);
+                    let v32 = constructor_vec_imm_splat(ctx, I16X8, v31);
+                    // Rule at src/isa/s390x/inst.isle line 3091.
+                    return v32;
+                }
+                let v15 = C::i16_from_u32(ctx, v12.1);
+                if let Some(v16) = v15 {
+                    let v17 = constructor_vec_imm_replicate(ctx, arg0, v16);
+                    // Rule at src/isa/s390x/inst.isle line 3085.
+                    return v17;
+                }
+            }
+            0x40 => {
+                let v12 = C::u32_pair_split(ctx, arg1);
+                if v12.0 == v12.1 {
+                    let v34 = C::u32_as_u64(ctx, v12.0);
+                    let v35 = constructor_vec_imm_splat(ctx, I32X4, v34);
+                    // Rule at src/isa/s390x/inst.isle line 3093.
+                    return v35;
+                }
+                let v18 = C::i16_from_u64(ctx, arg1);
+                if let Some(v19) = v18 {
+                    let v20 = constructor_vec_imm_replicate(ctx, arg0, v19);
+                    // Rule at src/isa/s390x/inst.isle line 3087.
+                    return v20;
+                }
+            }
+            _ => {}
+        }
+    }
+    let v1 = C::ty_vec128(ctx, arg0);
+    if let Some(v2) = v1 {
+        if arg1 == 0x0 {
+            let v5 = constructor_vec_imm_byte_mask(ctx, v2, 0x0);
+            // Rule at src/isa/s390x/inst.isle line 3079.
+            return v5;
+        }
+        let v36 = constructor_vec_load_const_replicate(ctx, v2, arg1);
+        // Rule at src/isa/s390x/inst.isle line 3095.
+        return v36;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_imm_splat", "src/isa/s390x/inst.isle line 3078"
+    )
+}
+
+// Generated as internal constructor for term ty_ext32.
+pub fn constructor_ty_ext32<C: Context>(ctx: &mut C, arg0: Type) -> Type {
+    match arg0 {
+        I8 => {
+            // Rule at src/isa/s390x/inst.isle line 3103.
+            return I32;
+        }
+        I16 => {
+            // Rule at src/isa/s390x/inst.isle line 3104.
+            return I32;
+        }
+        I32 => {
+            // Rule at src/isa/s390x/inst.isle line 3105.
+            return I32;
+        }
+        I64 => {
+            // Rule at src/isa/s390x/inst.isle line 3106.
+            return I64;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "ty_ext32", "src/isa/s390x/inst.isle line 3102"
+    )
+}
+
+// Generated as internal constructor for term ty_ext64.
+pub fn constructor_ty_ext64<C: Context>(ctx: &mut C, arg0: Type) -> Type {
+    match arg0 {
+        I8 => {
+            // Rule at src/isa/s390x/inst.isle line 3110.
+            return I64;
+        }
+        I16 => {
+            // Rule at src/isa/s390x/inst.isle line 3111.
+            return I64;
+        }
+        I32 => {
+            // Rule at src/isa/s390x/inst.isle line 3112.
+            return I64;
+        }
+        I64 => {
+            // Rule at src/isa/s390x/inst.isle line 3113.
+            return I64;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "ty_ext64", "src/isa/s390x/inst.isle line 3109"
+    )
+}
+
+// Generated as internal constructor for term zext32_reg.
+pub fn constructor_zext32_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
+    let v3 = C::temp_writable_reg(ctx, I32);
+    let v5 = C::ty_bits(ctx, arg0);
+    let v7 = MInst::Extend {
+        rd: v3,
+        rn: arg1,
+        signed: false,
+        from_bits: v5,
+        to_bits: 0x20,
+    };
+    let v8 = C::emit(ctx, &v7);
+    let v9 = C::writable_reg_to_reg(ctx, v3);
+    // Rule at src/isa/s390x/inst.isle line 3118.
+    return v9;
+}
+
+// Generated as internal constructor for term sext32_reg.
+pub fn constructor_sext32_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
+    let v3 = C::temp_writable_reg(ctx, I32);
+    let v5 = C::ty_bits(ctx, arg0);
+    let v7 = MInst::Extend {
+        rd: v3,
+        rn: arg1,
+        signed: true,
+        from_bits: v5,
+        to_bits: 0x20,
+    };
+    let v8 = C::emit(ctx, &v7);
+    let v9 = C::writable_reg_to_reg(ctx, v3);
+    // Rule at src/isa/s390x/inst.isle line 3125.
+    return v9;
+}
+
+// Generated as internal constructor for term zext64_reg.
+pub fn constructor_zext64_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
+    let v3 = C::temp_writable_reg(ctx, I64);
+    let v5 = C::ty_bits(ctx, arg0);
+    let v7 = MInst::Extend {
+        rd: v3,
+        rn: arg1,
+        signed: false,
+        from_bits: v5,
+        to_bits: 0x40,
+    };
+    let v8 = C::emit(ctx, &v7);
+    let v9 = C::writable_reg_to_reg(ctx, v3);
+    // Rule at src/isa/s390x/inst.isle line 3132.
+    return v9;
+}
+
+// Generated as internal constructor for term sext64_reg.
+pub fn constructor_sext64_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
+    let v3 = C::temp_writable_reg(ctx, I64);
+    let v5 = C::ty_bits(ctx, arg0);
+    let v7 = MInst::Extend {
+        rd: v3,
+        rn: arg1,
+        signed: true,
+        from_bits: v5,
+        to_bits: 0x40,
+    };
+    let v8 = C::emit(ctx, &v7);
+    let v9 = C::writable_reg_to_reg(ctx, v3);
+    // Rule at src/isa/s390x/inst.isle line 3139.
+    return v9;
+}
+
+// Generated as internal constructor for term zext32_mem.
+pub fn constructor_zext32_mem<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Reg {
+    match arg0 {
+        I8 => {
+            let v3 = C::temp_writable_reg(ctx, I32);
+            let v4 = MInst::Load32ZExt8 {
+                rd: v3,
+                mem: arg1.clone(),
+            };
+            let v5 = C::emit(ctx, &v4);
+            let v6 = C::writable_reg_to_reg(ctx, v3);
+            // Rule at src/isa/s390x/inst.isle line 3147.
+            return v6;
+        }
+        I16 => {
+            let v3 = C::temp_writable_reg(ctx, I32);
+            let v7 = MInst::Load32ZExt16 {
+                rd: v3,
+                mem: arg1.clone(),
+            };
+            let v8 = C::emit(ctx, &v7);
+            let v6 = C::writable_reg_to_reg(ctx, v3);
+            // Rule at src/isa/s390x/inst.isle line 3151.
+            return v6;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "zext32_mem", "src/isa/s390x/inst.isle line 3146"
+    )
+}
+
+// Generated as internal constructor for term sext32_mem.
+pub fn constructor_sext32_mem<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Reg {
+    match arg0 {
+        I8 => {
+            let v3 = C::temp_writable_reg(ctx, I32);
+            let v4 = MInst::Load32SExt8 {
+                rd: v3,
+                mem: arg1.clone(),
+            };
+            let v5 = C::emit(ctx, &v4);
+            let v6 = C::writable_reg_to_reg(ctx, v3);
+            // Rule at src/isa/s390x/inst.isle line 3158.
+            return v6;
+        }
+        I16 => {
+            let v3 = C::temp_writable_reg(ctx, I32);
+            let v7 = MInst::Load32SExt16 {
+                rd: v3,
+                mem: arg1.clone(),
+            };
+            let v8 = C::emit(ctx, &v7);
+            let v6 = C::writable_reg_to_reg(ctx, v3);
+            // Rule at src/isa/s390x/inst.isle line 3162.
+            return v6;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "sext32_mem", "src/isa/s390x/inst.isle line 3157"
+    )
+}
+
+// Generated as internal constructor for term zext64_mem.
+pub fn constructor_zext64_mem<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Reg {
+    match arg0 {
+        I8 => {
+            let v3 = C::temp_writable_reg(ctx, I64);
+            let v4 = MInst::Load64ZExt8 {
+                rd: v3,
+                mem: arg1.clone(),
+            };
+            let v5 = C::emit(ctx, &v4);
+            let v6 = C::writable_reg_to_reg(ctx, v3);
+            // Rule at src/isa/s390x/inst.isle line 3169.
+            return v6;
+        }
+        I16 => {
+            let v3 = C::temp_writable_reg(ctx, I64);
+            let v7 = MInst::Load64ZExt16 {
+                rd: v3,
+                mem: arg1.clone(),
+            };
+            let v8 = C::emit(ctx, &v7);
+            let v6 = C::writable_reg_to_reg(ctx, v3);
+            // Rule at src/isa/s390x/inst.isle line 3173.
+            return v6;
+        }
+        I32 => {
+            let v3 = C::temp_writable_reg(ctx, I64);
+            let v9 = MInst::Load64ZExt32 {
+                rd: v3,
+                mem: arg1.clone(),
+            };
+            let v10 = C::emit(ctx, &v9);
+            let v6 = C::writable_reg_to_reg(ctx, v3);
+            // Rule at src/isa/s390x/inst.isle line 3177.
+            return v6;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "zext64_mem", "src/isa/s390x/inst.isle line 3168"
+    )
+}
+
+// Generated as internal constructor for term sext64_mem.
+pub fn constructor_sext64_mem<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Reg {
+    match arg0 {
+        I8 => {
+            let v3 = C::temp_writable_reg(ctx, I64);
+            let v4 = MInst::Load64SExt8 {
+                rd: v3,
+                mem: arg1.clone(),
+            };
+            let v5 = C::emit(ctx, &v4);
+            let v6 = C::writable_reg_to_reg(ctx, v3);
+            // Rule at src/isa/s390x/inst.isle line 3184.
+            return v6;
+        }
+        I16 => {
+            let v3 = C::temp_writable_reg(ctx, I64);
+            let v7 = MInst::Load64SExt16 {
+                rd: v3,
+                mem: arg1.clone(),
+            };
+            let v8 = C::emit(ctx, &v7);
+            let v6 = C::writable_reg_to_reg(ctx, v3);
+            // Rule at src/isa/s390x/inst.isle line 3188.
+            return v6;
+        }
+        I32 => {
+            let v3 = C::temp_writable_reg(ctx, I64);
+            let v9 = MInst::Load64SExt32 {
+                rd: v3,
+                mem: arg1.clone(),
+            };
+            let v10 = C::emit(ctx, &v9);
+            let v6 = C::writable_reg_to_reg(ctx, v3);
+            // Rule at src/isa/s390x/inst.isle line 3192.
+            return v6;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "sext64_mem", "src/isa/s390x/inst.isle line 3183"
+    )
+}
+
+// Generated as internal constructor for term put_in_reg_zext32.
+pub fn constructor_put_in_reg_zext32<C: Context>(ctx: &mut C, arg0: Value) -> Reg {
+    let v2 = C::u64_from_value(ctx, arg0);
+    if let Some(v3) = v2 {
+        let v1 = C::value_type(ctx, arg0);
+        let v4 = constructor_ty_ext32(ctx, v1);
+        let v5 = constructor_imm(ctx, v4, v3);
+        // Rule at src/isa/s390x/inst.isle line 3200.
+        return v5;
+    }
+    let v1 = C::value_type(ctx, arg0);
+    let v21 = C::ty_32_or_64(ctx, v1);
+    if let Some(v22) = v21 {
+        let v19 = C::put_in_reg(ctx, arg0);
+        // Rule at src/isa/s390x/inst.isle line 3206.
+        return v19;
+    }
+    let v6 = C::fits_in_16(ctx, v1);
+    if let Some(v7) = v6 {
+        let v8 = C::sinkable_inst(ctx, arg0);
+        if let Some(v9) = v8 {
+            let v10 = &C::inst_data(ctx, v9);
+            if let &InstructionData::Load {
+                opcode: ref v11,
+                arg: v12,
+                flags: v13,
+                offset: v14,
+            } = v10
+            {
+                if let &Opcode::Load = v11 {
+                    let v15 = C::bigendian(ctx, v13);
+                    if let Some(v16) = v15 {
+                        let v17 = &constructor_sink_load(ctx, v9);
+                        let v18 = constructor_zext32_mem(ctx, v7, v17);
+                        // Rule at src/isa/s390x/inst.isle line 3202.
+                        return v18;
+                    }
+                }
+            }
+        }
+        let v19 = C::put_in_reg(ctx, arg0);
+        let v20 = constructor_zext32_reg(ctx, v7, v19);
+        // Rule at src/isa/s390x/inst.isle line 3204.
+        return v20;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "put_in_reg_zext32", "src/isa/s390x/inst.isle line 3199"
+    )
+}
+
+// Generated as internal constructor for term put_in_reg_sext32.
+pub fn constructor_put_in_reg_sext32<C: Context>(ctx: &mut C, arg0: Value) -> Reg {
+    let v2 = C::u64_from_signed_value(ctx, arg0);
+    if let Some(v3) = v2 {
+        let v1 = C::value_type(ctx, arg0);
+        let v4 = constructor_ty_ext32(ctx, v1);
+        let v5 = constructor_imm(ctx, v4, v3);
+        // Rule at src/isa/s390x/inst.isle line 3211.
+        return v5;
+    }
+    let v1 = C::value_type(ctx, arg0);
+    let v21 = C::ty_32_or_64(ctx, v1);
+    if let Some(v22) = v21 {
+        let v19 = C::put_in_reg(ctx, arg0);
+        // Rule at src/isa/s390x/inst.isle line 3217.
+        return v19;
+    }
+    let v6 = C::fits_in_16(ctx, v1);
+    if let Some(v7) = v6 {
+        let v8 = C::sinkable_inst(ctx, arg0);
+        if let Some(v9) = v8 {
+            let v10 = &C::inst_data(ctx, v9);
+            if let &InstructionData::Load {
+                opcode: ref v11,
+                arg: v12,
+                flags: v13,
+                offset: v14,
+            } = v10
+            {
+                if let &Opcode::Load = v11 {
+                    let v15 = C::bigendian(ctx, v13);
+                    if let Some(v16) = v15 {
+                        let v17 = &constructor_sink_load(ctx, v9);
+                        let v18 = constructor_sext32_mem(ctx, v7, v17);
+                        // Rule at src/isa/s390x/inst.isle line 3213.
+                        return v18;
+                    }
+                }
+            }
+        }
+        let v19 = C::put_in_reg(ctx, arg0);
+        let v20 = constructor_sext32_reg(ctx, v7, v19);
+        // Rule at src/isa/s390x/inst.isle line 3215.
+        return v20;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "put_in_reg_sext32", "src/isa/s390x/inst.isle line 3210"
+    )
+}
+
+// Generated as internal constructor for term put_in_reg_zext64.
+pub fn constructor_put_in_reg_zext64<C: Context>(ctx: &mut C, arg0: Value) -> Reg {
+    let v2 = C::u64_from_value(ctx, arg0);
+    if let Some(v3) = v2 {
+        let v1 = C::value_type(ctx, arg0);
+        let v4 = constructor_ty_ext64(ctx, v1);
+        let v5 = constructor_imm(ctx, v4, v3);
+        // Rule at src/isa/s390x/inst.isle line 3222.
+        return v5;
+    }
+    let v1 = C::value_type(ctx, arg0);
+    let v21 = C::gpr64_ty(ctx, v1);
+    if let Some(v22) = v21 {
+        let v19 = C::put_in_reg(ctx, arg0);
+        // Rule at src/isa/s390x/inst.isle line 3228.
+        return v19;
+    }
+    let v6 = C::gpr32_ty(ctx, v1);
+    if let Some(v7) = v6 {
+        let v8 = C::sinkable_inst(ctx, arg0);
+        if let Some(v9) = v8 {
+            let v10 = &C::inst_data(ctx, v9);
+            if let &InstructionData::Load {
+                opcode: ref v11,
+                arg: v12,
+                flags: v13,
+                offset: v14,
+            } = v10
+            {
+                if let &Opcode::Load = v11 {
+                    let v15 = C::bigendian(ctx, v13);
+                    if let Some(v16) = v15 {
+                        let v17 = &constructor_sink_load(ctx, v9);
+                        let v18 = constructor_zext64_mem(ctx, v7, v17);
+                        // Rule at src/isa/s390x/inst.isle line 3224.
+                        return v18;
+                    }
+                }
+            }
+        }
+        let v19 = C::put_in_reg(ctx, arg0);
+        let v20 = constructor_zext64_reg(ctx, v7, v19);
+        // Rule at src/isa/s390x/inst.isle line 3226.
+        return v20;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "put_in_reg_zext64", "src/isa/s390x/inst.isle line 3221"
+    )
+}
+
+// Generated as internal constructor for term put_in_reg_sext64.
+pub fn constructor_put_in_reg_sext64<C: Context>(ctx: &mut C, arg0: Value) -> Reg {
+    let v2 = C::u64_from_signed_value(ctx, arg0);
+    if let Some(v3) = v2 {
+        let v1 = C::value_type(ctx, arg0);
+        let v4 = constructor_ty_ext64(ctx, v1);
+        let v5 = constructor_imm(ctx, v4, v3);
+        // Rule at src/isa/s390x/inst.isle line 3233.
+        return v5;
+    }
+    let v1 = C::value_type(ctx, arg0);
+    let v21 = C::gpr64_ty(ctx, v1);
+    if let Some(v22) = v21 {
+        let v19 = C::put_in_reg(ctx, arg0);
+        // Rule at src/isa/s390x/inst.isle line 3239.
+        return v19;
+    }
+    let v6 = C::gpr32_ty(ctx, v1);
+    if let Some(v7) = v6 {
+        let v8 = C::sinkable_inst(ctx, arg0);
+        if let Some(v9) = v8 {
+            let v10 = &C::inst_data(ctx, v9);
+            if let &InstructionData::Load {
+                opcode: ref v11,
+                arg: v12,
+                flags: v13,
+                offset: v14,
+            } = v10
+            {
+                if let &Opcode::Load = v11 {
+                    let v15 = C::bigendian(ctx, v13);
+                    if let Some(v16) = v15 {
+                        let v17 = &constructor_sink_load(ctx, v9);
+                        let v18 = constructor_sext64_mem(ctx, v7, v17);
+                        // Rule at src/isa/s390x/inst.isle line 3235.
+                        return v18;
+                    }
+                }
+            }
+        }
+        let v19 = C::put_in_reg(ctx, arg0);
+        let v20 = constructor_sext64_reg(ctx, v7, v19);
+        // Rule at src/isa/s390x/inst.isle line 3237.
+        return v20;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "put_in_reg_sext64", "src/isa/s390x/inst.isle line 3232"
+    )
+}
+
+// Generated as internal constructor for term cmov_imm.
+pub fn constructor_cmov_imm<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &Cond,
+    arg2: i16,
+    arg3: Reg,
+) -> ConsumesFlags {
+    let v10 = C::gpr64_ty(ctx, arg0);
+    if let Some(v11) = v10 {
+        let v12 = C::temp_writable_reg(ctx, v11);
+        let v13 = MInst::CMov64SImm16 {
+            rd: v12,
+            cond: arg1.clone(),
+            ri: arg3,
+            imm: arg2,
+        };
+        let v14 = C::writable_reg_to_reg(ctx, v12);
+        let v15 = ConsumesFlags::ConsumesFlagsReturnsReg {
+            inst: v13,
+            result: v14,
+        };
+        // Rule at src/isa/s390x/inst.isle line 3251.
+        return v15;
+    }
+    let v1 = C::gpr32_ty(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v6 = C::temp_writable_reg(ctx, v2);
+        let v7 = MInst::CMov32SImm16 {
+            rd: v6,
+            cond: arg1.clone(),
+            ri: arg3,
+            imm: arg2,
+        };
+        let v8 = C::writable_reg_to_reg(ctx, v6);
+        let v9 = ConsumesFlags::ConsumesFlagsReturnsReg {
+            inst: v7,
+            result: v8,
+        };
+        // Rule at src/isa/s390x/inst.isle line 3247.
+        return v9;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "cmov_imm", "src/isa/s390x/inst.isle line 3246"
+    )
+}
+
+// Generated as internal constructor for term cmov_imm_imm.
+pub fn constructor_cmov_imm_imm<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &Cond,
+    arg2: i16,
+    arg3: i16,
+) -> ConsumesFlags {
+    let v14 = C::gpr64_ty(ctx, arg0);
+    if let Some(v15) = v14 {
+        let v16 = C::temp_writable_reg(ctx, v15);
+        let v17 = C::temp_writable_reg(ctx, v15);
+        let v21 = C::writable_reg_to_reg(ctx, v17);
+        let v22 = C::value_reg(ctx, v21);
+        let v18 = MInst::Mov64SImm16 { rd: v16, imm: arg3 };
+        let v19 = C::writable_reg_to_reg(ctx, v16);
+        let v20 = MInst::CMov64SImm16 {
+            rd: v17,
+            cond: arg1.clone(),
+            ri: v19,
+            imm: arg2,
+        };
+        let v23 = ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
+            inst1: v18,
+            inst2: v20,
+            result: v22,
+        };
+        // Rule at src/isa/s390x/inst.isle line 3265.
+        return v23;
+    }
+    let v1 = C::gpr32_ty(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v6 = C::temp_writable_reg(ctx, v2);
+        let v7 = C::temp_writable_reg(ctx, v2);
+        let v11 = C::writable_reg_to_reg(ctx, v7);
+        let v12 = C::value_reg(ctx, v11);
+        let v8 = MInst::Mov32SImm16 { rd: v6, imm: arg3 };
+        let v9 = C::writable_reg_to_reg(ctx, v6);
+        let v10 = MInst::CMov32SImm16 {
+            rd: v7,
+            cond: arg1.clone(),
+            ri: v9,
+            imm: arg2,
+        };
+        let v13 = ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
+            inst1: v8,
+            inst2: v10,
+            result: v12,
+        };
+        // Rule at src/isa/s390x/inst.isle line 3258.
+        return v13;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "cmov_imm_imm", "src/isa/s390x/inst.isle line 3257"
+    )
+}
+
+// Generated as internal constructor for term cmov_reg_reg.
+pub fn constructor_cmov_reg_reg<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &Cond,
+    arg2: Reg,
+    arg3: Reg,
+) -> ConsumesFlags {
+    match arg0 {
+        F32 => {
+            let v17 = C::temp_writable_reg(ctx, F32);
+            let v18 = MInst::FpuCMov32 {
+                rd: v17,
+                cond: arg1.clone(),
+                ri: arg3,
+                rm: arg2,
+            };
+            let v19 = C::writable_reg_to_reg(ctx, v17);
+            let v20 = ConsumesFlags::ConsumesFlagsReturnsReg {
+                inst: v18,
+                result: v19,
+            };
+            // Rule at src/isa/s390x/inst.isle line 3283.
+            return v20;
+        }
+        F64 => {
+            let v22 = C::temp_writable_reg(ctx, F64);
+            let v23 = MInst::FpuCMov64 {
+                rd: v22,
+                cond: arg1.clone(),
+                ri: arg3,
+                rm: arg2,
+            };
+            let v24 = C::writable_reg_to_reg(ctx, v22);
+            let v25 = ConsumesFlags::ConsumesFlagsReturnsReg {
+                inst: v23,
+                result: v24,
+            };
+            // Rule at src/isa/s390x/inst.isle line 3287.
+            return v25;
+        }
+        _ => {}
+    }
+    let v10 = C::gpr64_ty(ctx, arg0);
+    if let Some(v11) = v10 {
+        let v12 = C::temp_writable_reg(ctx, v11);
+        let v13 = MInst::CMov64 {
+            rd: v12,
+            cond: arg1.clone(),
+            ri: arg3,
+            rm: arg2,
+        };
+        let v14 = C::writable_reg_to_reg(ctx, v12);
+        let v15 = ConsumesFlags::ConsumesFlagsReturnsReg {
+            inst: v13,
+            result: v14,
+        };
+        // Rule at src/isa/s390x/inst.isle line 3279.
+        return v15;
+    }
+    let v1 = C::gpr32_ty(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v6 = C::temp_writable_reg(ctx, v2);
+        let v7 = MInst::CMov32 {
+            rd: v6,
+            cond: arg1.clone(),
+            ri: arg3,
+            rm: arg2,
+        };
+        let v8 = C::writable_reg_to_reg(ctx, v6);
+        let v9 = ConsumesFlags::ConsumesFlagsReturnsReg {
+            inst: v7,
+            result: v8,
+        };
+        // Rule at src/isa/s390x/inst.isle line 3275.
+        return v9;
+    }
+    let v26 = C::vr128_ty(ctx, arg0);
+    if let Some(v27) = v26 {
+        let v22 = C::temp_writable_reg(ctx, F64);
+        let v28 = MInst::VecCMov {
+            rd: v22,
+            cond: arg1.clone(),
+            ri: arg3,
+            rm: arg2,
+        };
+        let v24 = C::writable_reg_to_reg(ctx, v22);
+        let v29 = ConsumesFlags::ConsumesFlagsReturnsReg {
+            inst: v28,
+            result: v24,
+        };
+        // Rule at src/isa/s390x/inst.isle line 3291.
+        return v29;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "cmov_reg_reg", "src/isa/s390x/inst.isle line 3274"
+    )
+}
+
+// Generated as internal constructor for term trap_if.
+pub fn constructor_trap_if<C: Context>(
+    ctx: &mut C,
+    arg0: &ProducesFlags,
+    arg1: &Cond,
+    arg2: &TrapCode,
+) -> Reg {
+    let v3 = &constructor_trap_if_impl(ctx, arg1, arg2);
+    let v4 = &constructor_with_flags_side_effect(ctx, arg0, v3);
+    let v5 = constructor_side_effect(ctx, v4);
+    let v6 = C::invalid_reg(ctx);
+    // Rule at src/isa/s390x/inst.isle line 3300.
+    return v6;
+}
+
+// Generated as internal constructor for term icmps_reg_and_trap.
+pub fn constructor_icmps_reg_and_trap<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: Reg,
+    arg3: &Cond,
+    arg4: &TrapCode,
+) -> Reg {
+    let v5 = &constructor_cmpop_cmps(ctx, arg0);
+    let v6 = MInst::CmpTrapRR {
+        op: v5.clone(),
+        rn: arg1,
+        rm: arg2,
+        cond: arg3.clone(),
+        trap_code: arg4.clone(),
+    };
+    let v7 = C::emit(ctx, &v6);
+    let v8 = C::invalid_reg(ctx);
+    // Rule at src/isa/s390x/inst.isle line 3306.
+    return v8;
+}
+
+// Generated as internal constructor for term icmps_simm16_and_trap.
+pub fn constructor_icmps_simm16_and_trap<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: i16,
+    arg3: &Cond,
+    arg4: &TrapCode,
+) -> Reg {
+    let v5 = &constructor_cmpop_cmps(ctx, arg0);
+    let v6 = MInst::CmpTrapRSImm16 {
+        op: v5.clone(),
+        rn: arg1,
+        imm: arg2,
+        cond: arg3.clone(),
+        trap_code: arg4.clone(),
+    };
+    let v7 = C::emit(ctx, &v6);
+    let v8 = C::invalid_reg(ctx);
+    // Rule at src/isa/s390x/inst.isle line 3312.
+    return v8;
+}
+
+// Generated as internal constructor for term icmpu_reg_and_trap.
+pub fn constructor_icmpu_reg_and_trap<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: Reg,
+    arg3: &Cond,
+    arg4: &TrapCode,
+) -> Reg {
+    let v5 = &constructor_cmpop_cmpu(ctx, arg0);
+    let v6 = MInst::CmpTrapRR {
+        op: v5.clone(),
+        rn: arg1,
+        rm: arg2,
+        cond: arg3.clone(),
+        trap_code: arg4.clone(),
+    };
+    let v7 = C::emit(ctx, &v6);
+    let v8 = C::invalid_reg(ctx);
+    // Rule at src/isa/s390x/inst.isle line 3318.
+    return v8;
+}
+
+// Generated as internal constructor for term icmpu_uimm16_and_trap.
+pub fn constructor_icmpu_uimm16_and_trap<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: u16,
+    arg3: &Cond,
+    arg4: &TrapCode,
+) -> Reg {
+    let v5 = &constructor_cmpop_cmpu(ctx, arg0);
+    let v6 = MInst::CmpTrapRUImm16 {
+        op: v5.clone(),
+        rn: arg1,
+        imm: arg2,
+        cond: arg3.clone(),
+        trap_code: arg4.clone(),
+    };
+    let v7 = C::emit(ctx, &v6);
+    let v8 = C::invalid_reg(ctx);
+    // Rule at src/isa/s390x/inst.isle line 3324.
+    return v8;
+}
+
+// Generated as internal constructor for term trap_impl.
+pub fn constructor_trap_impl<C: Context>(ctx: &mut C, arg0: &TrapCode) -> SideEffectNoResult {
+    let v1 = MInst::Trap {
+        trap_code: arg0.clone(),
+    };
+    let v2 = SideEffectNoResult::Inst { inst: v1 };
+    // Rule at src/isa/s390x/inst.isle line 3330.
+    return v2;
+}
+
+// Generated as internal constructor for term trap_if_impl.
+pub fn constructor_trap_if_impl<C: Context>(
+    ctx: &mut C,
+    arg0: &Cond,
+    arg1: &TrapCode,
+) -> ConsumesFlags {
+    let v2 = MInst::TrapIf {
+        cond: arg0.clone(),
+        trap_code: arg1.clone(),
+    };
+    let v3 = ConsumesFlags::ConsumesFlagsSideEffect { inst: v2 };
+    // Rule at src/isa/s390x/inst.isle line 3334.
+    return v3;
+}
+
+// Generated as internal constructor for term debugtrap_impl.
+pub fn constructor_debugtrap_impl<C: Context>(ctx: &mut C) -> SideEffectNoResult {
+    let v1 = SideEffectNoResult::Inst {
+        inst: MInst::Debugtrap,
+    };
+    // Rule at src/isa/s390x/inst.isle line 3338.
+    return v1;
+}
+
+// Generated as internal constructor for term bool.
+pub fn constructor_bool<C: Context>(
+    ctx: &mut C,
+    arg0: &ProducesFlags,
+    arg1: &Cond,
+) -> ProducesBool {
+    let v2 = ProducesBool::ProducesBool {
+        producer: arg0.clone(),
+        cond: arg1.clone(),
+    };
+    // Rule at src/isa/s390x/inst.isle line 3349.
+    return v2;
+}
+
+// Generated as internal constructor for term invert_bool.
+pub fn constructor_invert_bool<C: Context>(ctx: &mut C, arg0: &ProducesBool) -> ProducesBool {
+    if let &ProducesBool::ProducesBool {
+        producer: ref v1,
+        cond: ref v2,
+    } = arg0
+    {
+        let v3 = &C::invert_cond(ctx, v2);
+        let v4 = &constructor_bool(ctx, v1, v3);
+        // Rule at src/isa/s390x/inst.isle line 3353.
+        return v4.clone();
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "invert_bool", "src/isa/s390x/inst.isle line 3352"
+    )
+}
+
+// Generated as internal constructor for term select_bool_reg.
+pub fn constructor_select_bool_reg<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &ProducesBool,
+    arg2: Reg,
+    arg3: Reg,
+) -> Reg {
+    if let &ProducesBool::ProducesBool {
+        producer: ref v2,
+        cond: ref v3,
+    } = arg1
+    {
+        let v6 = &constructor_cmov_reg_reg(ctx, arg0, v3, arg2, arg3);
+        let v7 = constructor_with_flags_reg(ctx, v2, v6);
+        // Rule at src/isa/s390x/inst.isle line 3358.
+        return v7;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "select_bool_reg", "src/isa/s390x/inst.isle line 3357"
+    )
+}
+
+// Generated as internal constructor for term select_bool_imm.
+pub fn constructor_select_bool_imm<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &ProducesBool,
+    arg2: i16,
+    arg3: i16,
+) -> Reg {
+    if let &ProducesBool::ProducesBool {
+        producer: ref v2,
+        cond: ref v3,
+    } = arg1
+    {
+        let v6 = &constructor_cmov_imm_imm(ctx, arg0, v3, arg2, arg3);
+        let v7 = constructor_with_flags_reg(ctx, v2, v6);
+        // Rule at src/isa/s390x/inst.isle line 3363.
+        return v7;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "select_bool_imm", "src/isa/s390x/inst.isle line 3362"
+    )
+}
+
+// Generated as internal constructor for term lower_bool.
+pub fn constructor_lower_bool<C: Context>(ctx: &mut C, arg0: Type, arg1: &ProducesBool) -> Reg {
+    if arg0 == I8 {
+        let v5 = constructor_select_bool_imm(ctx, I8, arg1, 0x1, 0x0);
+        // Rule at src/isa/s390x/inst.isle line 3369.
+        return v5;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "lower_bool", "src/isa/s390x/inst.isle line 3368"
+    )
+}
+
+// Generated as internal constructor for term lower_bool_to_mask.
+pub fn constructor_lower_bool_to_mask<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &ProducesBool,
+) -> Reg {
+    if arg0 == I128 {
+        let v8 = constructor_lower_bool_to_mask(ctx, I64, arg1);
+        let v10 = constructor_mov_to_vec128(ctx, I128, v8, v8);
+        // Rule at src/isa/s390x/inst.isle line 3376.
+        return v10;
+    }
+    let v1 = C::fits_in_64(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v6 = constructor_select_bool_imm(ctx, v2, arg1, -0x1, 0x0);
+        // Rule at src/isa/s390x/inst.isle line 3373.
+        return v6;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "lower_bool_to_mask", "src/isa/s390x/inst.isle line 3372"
+    )
+}
+
+// Generated as internal constructor for term cond_br_bool.
+pub fn constructor_cond_br_bool<C: Context>(
+    ctx: &mut C,
+    arg0: &ProducesBool,
+    arg1: MachLabel,
+    arg2: MachLabel,
+) -> SideEffectNoResult {
+    if let &ProducesBool::ProducesBool {
+        producer: ref v1,
+        cond: ref v2,
+    } = arg0
+    {
+        let v5 = &constructor_cond_br(ctx, arg1, arg2, v2);
+        let v6 = &constructor_with_flags_side_effect(ctx, v1, v5);
+        // Rule at src/isa/s390x/inst.isle line 3382.
+        return v6.clone();
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "cond_br_bool", "src/isa/s390x/inst.isle line 3381"
+    )
+}
+
+// Generated as internal constructor for term oneway_cond_br_bool.
+pub fn constructor_oneway_cond_br_bool<C: Context>(
+    ctx: &mut C,
+    arg0: &ProducesBool,
+    arg1: MachLabel,
+) -> SideEffectNoResult {
+    if let &ProducesBool::ProducesBool {
+        producer: ref v1,
+        cond: ref v2,
+    } = arg0
+    {
+        let v4 = &constructor_oneway_cond_br(ctx, arg1, v2);
+        let v5 = &constructor_with_flags_side_effect(ctx, v1, v4);
+        // Rule at src/isa/s390x/inst.isle line 3387.
+        return v5.clone();
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "oneway_cond_br_bool", "src/isa/s390x/inst.isle line 3386"
+    )
+}
+
+// Generated as internal constructor for term trap_if_bool.
+pub fn constructor_trap_if_bool<C: Context>(
+    ctx: &mut C,
+    arg0: &ProducesBool,
+    arg1: &TrapCode,
+) -> SideEffectNoResult {
+    if let &ProducesBool::ProducesBool {
+        producer: ref v1,
+        cond: ref v2,
+    } = arg0
+    {
+        let v4 = &constructor_trap_if_impl(ctx, v2, arg1);
+        let v5 = &constructor_with_flags_side_effect(ctx, v1, v4);
+        // Rule at src/isa/s390x/inst.isle line 3392.
+        return v5.clone();
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "trap_if_bool", "src/isa/s390x/inst.isle line 3391"
+    )
+}
+
+// Generated as internal constructor for term casloop_val_reg.
+pub fn constructor_casloop_val_reg<C: Context>(ctx: &mut C) -> WritableReg {
+    let v1 = C::writable_gpr(ctx, 0x0);
+    // Rule at src/isa/s390x/inst.isle line 3405.
+    return v1;
+}
+
+// Generated as internal constructor for term casloop_tmp_reg.
+pub fn constructor_casloop_tmp_reg<C: Context>(ctx: &mut C) -> WritableReg {
+    let v1 = C::writable_gpr(ctx, 0x1);
+    // Rule at src/isa/s390x/inst.isle line 3409.
+    return v1;
+}
+
+// Generated as internal constructor for term casloop_emit.
+pub fn constructor_casloop_emit<C: Context>(
+    ctx: &mut C,
+    arg0: &VecMInstBuilder,
+    arg1: Type,
+    arg2: MemFlags,
+    arg3: Reg,
+    arg4: Reg,
+) -> PReg {
+    let v7 = &C::memarg_reg_plus_off(ctx, arg3, 0x0, 0x0, arg2);
+    let v8 = constructor_ty_ext32(ctx, arg1);
+    let v9 = constructor_casloop_val_reg(ctx);
+    let v10 = constructor_push_atomic_cas(ctx, arg0, v8, v9, arg4, v7);
+    let v11 = constructor_ty_ext32(ctx, arg1);
+    let v12 = constructor_casloop_val_reg(ctx);
+    let v13 = constructor_emit_load(ctx, v11, v12, v7);
+    let v15 = &C::intcc_as_cond(ctx, &IntCC::NotEqual);
+    let v16 = constructor_emit_loop(ctx, arg0, v15);
+    let v17 = C::preg_gpr_0(ctx);
+    // Rule at src/isa/s390x/inst.isle line 3418.
+    return v17;
+}
+
+// Generated as internal constructor for term casloop_result.
+pub fn constructor_casloop_result<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: MemFlags,
+    arg2: PReg,
+) -> Reg {
+    let v1 = C::ty_32_or_64(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v4 = C::bigendian(ctx, arg1);
+        if let Some(v5) = v4 {
+            let v7 = constructor_mov_preg(ctx, arg2);
+            // Rule at src/isa/s390x/inst.isle line 3440.
+            return v7;
+        }
+        let v8 = C::littleendian(ctx, arg1);
+        if let Some(v9) = v8 {
+            let v10 = C::preg_to_reg(ctx, arg2);
+            let v11 = constructor_bswap_reg(ctx, v2, v10);
+            // Rule at src/isa/s390x/inst.isle line 3442.
+            return v11;
+        }
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "casloop_result", "src/isa/s390x/inst.isle line 3439"
+    )
+}
+
+// Generated as internal constructor for term casloop.
+pub fn constructor_casloop<C: Context>(
+    ctx: &mut C,
+    arg0: &VecMInstBuilder,
+    arg1: Type,
+    arg2: MemFlags,
+    arg3: Reg,
+    arg4: Reg,
+) -> Reg {
+    let v5 = constructor_casloop_emit(ctx, arg0, arg1, arg2, arg3, arg4);
+    let v6 = constructor_casloop_result(ctx, arg1, arg2, v5);
+    // Rule at src/isa/s390x/inst.isle line 3447.
+    return v6;
+}
+
+// Generated as internal constructor for term casloop_bitshift.
+pub fn constructor_casloop_bitshift<C: Context>(ctx: &mut C, arg0: Reg) -> Reg {
+    let v3 = constructor_lshl_imm(ctx, I32, arg0, 0x3);
+    // Rule at src/isa/s390x/inst.isle line 3462.
+    return v3;
+}
+
+// Generated as internal constructor for term casloop_aligned_addr.
+pub fn constructor_casloop_aligned_addr<C: Context>(ctx: &mut C, arg0: Reg) -> Reg {
+    let v4 = C::uimm16shifted(ctx, 0xFFFC, 0x0);
+    let v5 = constructor_and_uimm16shifted(ctx, I64, arg0, v4);
+    // Rule at src/isa/s390x/inst.isle line 3467.
+    return v5;
+}
+
+// Generated as internal constructor for term casloop_rotate_in.
+pub fn constructor_casloop_rotate_in<C: Context>(
+    ctx: &mut C,
+    arg0: &VecMInstBuilder,
+    arg1: Type,
+    arg2: MemFlags,
+    arg3: Reg,
+    arg4: Reg,
+) -> Reg {
+    match arg1 {
+        I8 => {
+            let v6 = constructor_casloop_tmp_reg(ctx);
+            let v8 = constructor_push_rot_imm_reg(ctx, arg0, I32, v6, arg4, 0x0, arg3);
+            // Rule at src/isa/s390x/inst.isle line 3477.
+            return v8;
+        }
+        I16 => {
+            let v9 = C::bigendian(ctx, arg2);
+            if let Some(v10) = v9 {
+                let v6 = constructor_casloop_tmp_reg(ctx);
+                let v8 = constructor_push_rot_imm_reg(ctx, arg0, I32, v6, arg4, 0x0, arg3);
+                // Rule at src/isa/s390x/inst.isle line 3479.
+                return v8;
+            }
+            let v11 = C::littleendian(ctx, arg2);
+            if let Some(v12) = v11 {
+                let v6 = constructor_casloop_tmp_reg(ctx);
+                let v14 = constructor_push_rot_imm_reg(ctx, arg0, I32, v6, arg4, 0x10, arg3);
+                // Rule at src/isa/s390x/inst.isle line 3481.
+                return v14;
+            }
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "casloop_rotate_in", "src/isa/s390x/inst.isle line 3476"
+    )
+}
+
+// Generated as internal constructor for term casloop_rotate_out.
+pub fn constructor_casloop_rotate_out<C: Context>(
+    ctx: &mut C,
+    arg0: &VecMInstBuilder,
+    arg1: Type,
+    arg2: MemFlags,
+    arg3: Reg,
+    arg4: Reg,
+) -> Reg {
+    match arg1 {
+        I8 => {
+            let v6 = constructor_casloop_tmp_reg(ctx);
+            let v8 = constructor_neg_reg(ctx, I32, arg3);
+            let v9 = constructor_push_rot_imm_reg(ctx, arg0, I32, v6, arg4, 0x0, v8);
+            // Rule at src/isa/s390x/inst.isle line 3490.
+            return v9;
+        }
+        I16 => {
+            let v10 = C::bigendian(ctx, arg2);
+            if let Some(v11) = v10 {
+                let v6 = constructor_casloop_tmp_reg(ctx);
+                let v12 = constructor_push_rot_imm_reg(ctx, arg0, I32, v6, arg4, 0x0, arg3);
+                // Rule at src/isa/s390x/inst.isle line 3492.
+                return v12;
+            }
+            let v13 = C::littleendian(ctx, arg2);
+            if let Some(v14) = v13 {
+                let v6 = constructor_casloop_tmp_reg(ctx);
+                let v16 = constructor_push_rot_imm_reg(ctx, arg0, I32, v6, arg4, 0x10, arg3);
+                // Rule at src/isa/s390x/inst.isle line 3494.
+                return v16;
+            }
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "casloop_rotate_out", "src/isa/s390x/inst.isle line 3489"
+    )
+}
+
+// Generated as internal constructor for term casloop_rotate_result.
+pub fn constructor_casloop_rotate_result<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: MemFlags,
+    arg2: Reg,
+    arg3: Reg,
+) -> Reg {
+    match arg0 {
+        I8 => {
+            let v6 = constructor_rot_imm_reg(ctx, I32, arg3, 0x8, arg2);
+            // Rule at src/isa/s390x/inst.isle line 3505.
+            return v6;
+        }
+        I16 => {
+            let v7 = C::bigendian(ctx, arg1);
+            if let Some(v8) = v7 {
+                let v10 = constructor_rot_imm_reg(ctx, I32, arg3, 0x10, arg2);
+                // Rule at src/isa/s390x/inst.isle line 3507.
+                return v10;
+            }
+            let v11 = C::littleendian(ctx, arg1);
+            if let Some(v12) = v11 {
+                let v13 = constructor_rot_reg(ctx, I32, arg3, arg2);
+                let v14 = constructor_bswap_reg(ctx, I32, v13);
+                // Rule at src/isa/s390x/inst.isle line 3509.
+                return v14;
+            }
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "casloop_rotate_result", "src/isa/s390x/inst.isle line 3504"
+    )
+}
+
+// Generated as internal constructor for term casloop_subword.
+pub fn constructor_casloop_subword<C: Context>(
+    ctx: &mut C,
+    arg0: &VecMInstBuilder,
+    arg1: Type,
+    arg2: MemFlags,
+    arg3: Reg,
+    arg4: Reg,
+    arg5: Reg,
+) -> Reg {
+    let v6 = constructor_casloop_emit(ctx, arg0, arg1, arg2, arg3, arg5);
+    let v7 = C::preg_to_reg(ctx, v6);
+    let v8 = constructor_casloop_rotate_result(ctx, arg1, arg2, arg4, v7);
+    // Rule at src/isa/s390x/inst.isle line 3514.
+    return v8;
+}
+
+// Generated as internal constructor for term writable_link_reg.
+pub fn constructor_writable_link_reg<C: Context>(ctx: &mut C) -> WritableReg {
+    let v1 = C::writable_gpr(ctx, 0xE);
+    // Rule at src/isa/s390x/inst.isle line 3560.
+    return v1;
+}
+
+// Generated as internal constructor for term abi_call.
+pub fn constructor_abi_call<C: Context>(
+    ctx: &mut C,
+    arg0: Sig,
+    arg1: ExternalName,
+    arg2: &CallArgList,
+    arg3: &CallRetList,
+    arg4: &Opcode,
+) -> SideEffectNoResult {
+    let v5 = constructor_writable_link_reg(ctx);
+    let v6 = C::abi_call_info(ctx, arg0, arg1, arg2, arg3, arg4);
+    let v7 = &constructor_call_impl(ctx, v5, v6);
+    // Rule at src/isa/s390x/inst.isle line 3563.
+    return v7.clone();
+}
+
+// Generated as internal constructor for term abi_call_ind.
+pub fn constructor_abi_call_ind<C: Context>(
+    ctx: &mut C,
+    arg0: Sig,
+    arg1: Reg,
+    arg2: &CallArgList,
+    arg3: &CallRetList,
+    arg4: &Opcode,
+) -> SideEffectNoResult {
+    let v5 = constructor_writable_link_reg(ctx);
+    let v6 = C::abi_call_ind_info(ctx, arg0, arg1, arg2, arg3, arg4);
+    let v7 = &constructor_call_ind_impl(ctx, v5, v6);
+    // Rule at src/isa/s390x/inst.isle line 3567.
+    return v7.clone();
+}
+
+// Generated as internal constructor for term lib_call.
+pub fn constructor_lib_call<C: Context>(ctx: &mut C, arg0: &LibCallInfo) -> SideEffectNoResult {
+    let v1 = constructor_writable_link_reg(ctx);
+    let v2 = C::lib_call_info(ctx, arg0);
+    let v3 = &constructor_call_impl(ctx, v1, v2);
+    // Rule at src/isa/s390x/inst.isle line 3591.
+    return v3.clone();
+}
+
+// Generated as internal constructor for term vec_widen_type.
+pub fn constructor_vec_widen_type<C: Context>(ctx: &mut C, arg0: Type) -> Type {
+    match arg0 {
+        I8X16 => {
+            // Rule at src/isa/s390x/inst.isle line 3601.
+            return I16X8;
+        }
+        I16X8 => {
+            // Rule at src/isa/s390x/inst.isle line 3602.
+            return I32X4;
+        }
+        I32X4 => {
+            // Rule at src/isa/s390x/inst.isle line 3603.
+            return I64X2;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_widen_type", "src/isa/s390x/inst.isle line 3600"
+    )
+}
+
+// Generated as internal constructor for term vecop_pack.
+pub fn constructor_vecop_pack<C: Context>(ctx: &mut C, arg0: Type) -> VecBinaryOp {
+    match arg0 {
+        I16X8 => {
+            // Rule at src/isa/s390x/inst.isle line 3606.
+            return VecBinaryOp::Pack16x8;
+        }
+        I32X4 => {
+            // Rule at src/isa/s390x/inst.isle line 3607.
+            return VecBinaryOp::Pack32x4;
+        }
+        I64X2 => {
+            // Rule at src/isa/s390x/inst.isle line 3608.
+            return VecBinaryOp::Pack64x2;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vecop_pack", "src/isa/s390x/inst.isle line 3605"
+    )
+}
+
+// Generated as internal constructor for term vec_pack.
+pub fn constructor_vec_pack<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v3 = &constructor_vecop_pack(ctx, arg0);
+    let v4 = constructor_vec_rrr(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 3611.
+    return v4;
+}
+
+// Generated as internal constructor for term vecop_pack_ssat.
+pub fn constructor_vecop_pack_ssat<C: Context>(ctx: &mut C, arg0: Type) -> VecBinaryOp {
+    match arg0 {
+        I16X8 => {
+            // Rule at src/isa/s390x/inst.isle line 3614.
+            return VecBinaryOp::PackSSat16x8;
+        }
+        I32X4 => {
+            // Rule at src/isa/s390x/inst.isle line 3615.
+            return VecBinaryOp::PackSSat32x4;
+        }
+        I64X2 => {
+            // Rule at src/isa/s390x/inst.isle line 3616.
+            return VecBinaryOp::PackSSat64x2;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vecop_pack_ssat", "src/isa/s390x/inst.isle line 3613"
+    )
+}
+
+// Generated as internal constructor for term vec_pack_ssat.
+pub fn constructor_vec_pack_ssat<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v3 = &constructor_vecop_pack_ssat(ctx, arg0);
+    let v4 = constructor_vec_rrr(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 3619.
+    return v4;
+}
+
+// Generated as internal constructor for term vecop_pack_usat.
+pub fn constructor_vecop_pack_usat<C: Context>(ctx: &mut C, arg0: Type) -> VecBinaryOp {
+    match arg0 {
+        I16X8 => {
+            // Rule at src/isa/s390x/inst.isle line 3622.
+            return VecBinaryOp::PackUSat16x8;
+        }
+        I32X4 => {
+            // Rule at src/isa/s390x/inst.isle line 3623.
+            return VecBinaryOp::PackUSat32x4;
+        }
+        I64X2 => {
+            // Rule at src/isa/s390x/inst.isle line 3624.
+            return VecBinaryOp::PackUSat64x2;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vecop_pack_usat", "src/isa/s390x/inst.isle line 3621"
+    )
+}
+
+// Generated as internal constructor for term vec_pack_usat.
+pub fn constructor_vec_pack_usat<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v3 = &constructor_vecop_pack_usat(ctx, arg0);
+    let v4 = constructor_vec_rrr(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 3627.
+    return v4;
+}
+
+// Generated as internal constructor for term vecop_unpacks_low.
+pub fn constructor_vecop_unpacks_low<C: Context>(ctx: &mut C, arg0: Type) -> VecUnaryOp {
+    match arg0 {
+        I8X16 => {
+            // Rule at src/isa/s390x/inst.isle line 3630.
+            return VecUnaryOp::UnpackSLow8x16;
+        }
+        I16X8 => {
+            // Rule at src/isa/s390x/inst.isle line 3631.
+            return VecUnaryOp::UnpackSLow16x8;
+        }
+        I32X4 => {
+            // Rule at src/isa/s390x/inst.isle line 3632.
+            return VecUnaryOp::UnpackSLow32x4;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vecop_unpacks_low", "src/isa/s390x/inst.isle line 3629"
+    )
+}
+
+// Generated as internal constructor for term vec_unpacks_low.
+pub fn constructor_vec_unpacks_low<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
+    let v2 = &constructor_vecop_unpacks_low(ctx, arg0);
+    let v3 = constructor_vec_rr(ctx, arg0, v2, arg1);
+    // Rule at src/isa/s390x/inst.isle line 3635.
+    return v3;
+}
+
+// Generated as internal constructor for term vecop_unpacks_high.
+pub fn constructor_vecop_unpacks_high<C: Context>(ctx: &mut C, arg0: Type) -> VecUnaryOp {
+    match arg0 {
+        I8X16 => {
+            // Rule at src/isa/s390x/inst.isle line 3638.
+            return VecUnaryOp::UnpackSHigh8x16;
+        }
+        I16X8 => {
+            // Rule at src/isa/s390x/inst.isle line 3639.
+            return VecUnaryOp::UnpackSHigh16x8;
+        }
+        I32X4 => {
+            // Rule at src/isa/s390x/inst.isle line 3640.
+            return VecUnaryOp::UnpackSHigh32x4;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vecop_unpacks_high", "src/isa/s390x/inst.isle line 3637"
+    )
+}
+
+// Generated as internal constructor for term vec_unpacks_high.
+pub fn constructor_vec_unpacks_high<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
+    let v2 = &constructor_vecop_unpacks_high(ctx, arg0);
+    let v3 = constructor_vec_rr(ctx, arg0, v2, arg1);
+    // Rule at src/isa/s390x/inst.isle line 3643.
+    return v3;
+}
+
+// Generated as internal constructor for term vecop_unpacku_low.
+pub fn constructor_vecop_unpacku_low<C: Context>(ctx: &mut C, arg0: Type) -> VecUnaryOp {
+    match arg0 {
+        I8X16 => {
+            // Rule at src/isa/s390x/inst.isle line 3646.
+            return VecUnaryOp::UnpackULow8x16;
+        }
+        I16X8 => {
+            // Rule at src/isa/s390x/inst.isle line 3647.
+            return VecUnaryOp::UnpackULow16x8;
+        }
+        I32X4 => {
+            // Rule at src/isa/s390x/inst.isle line 3648.
+            return VecUnaryOp::UnpackULow32x4;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vecop_unpacku_low", "src/isa/s390x/inst.isle line 3645"
+    )
+}
+
+// Generated as internal constructor for term vec_unpacku_low.
+pub fn constructor_vec_unpacku_low<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
+    let v2 = &constructor_vecop_unpacku_low(ctx, arg0);
+    let v3 = constructor_vec_rr(ctx, arg0, v2, arg1);
+    // Rule at src/isa/s390x/inst.isle line 3651.
+    return v3;
+}
+
+// Generated as internal constructor for term vecop_unpacku_high.
+pub fn constructor_vecop_unpacku_high<C: Context>(ctx: &mut C, arg0: Type) -> VecUnaryOp {
+    match arg0 {
+        I8X16 => {
+            // Rule at src/isa/s390x/inst.isle line 3654.
+            return VecUnaryOp::UnpackUHigh8x16;
+        }
+        I16X8 => {
+            // Rule at src/isa/s390x/inst.isle line 3655.
+            return VecUnaryOp::UnpackUHigh16x8;
+        }
+        I32X4 => {
+            // Rule at src/isa/s390x/inst.isle line 3656.
+            return VecUnaryOp::UnpackUHigh32x4;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vecop_unpacku_high", "src/isa/s390x/inst.isle line 3653"
+    )
+}
+
+// Generated as internal constructor for term vec_unpacku_high.
+pub fn constructor_vec_unpacku_high<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
+    let v2 = &constructor_vecop_unpacku_high(ctx, arg0);
+    let v3 = constructor_vec_rr(ctx, arg0, v2, arg1);
+    // Rule at src/isa/s390x/inst.isle line 3659.
+    return v3;
+}
+
+// Generated as internal constructor for term vec_pack_lane_order.
+pub fn constructor_vec_pack_lane_order<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: Reg,
+) -> Reg {
+    let v3 = &C::lane_order(ctx);
+    match v3 {
+        &LaneOrder::LittleEndian => {
+            let v5 = constructor_vec_pack(ctx, arg0, arg2, arg1);
+            // Rule at src/isa/s390x/inst.isle line 3670.
+            return v5;
+        }
+        &LaneOrder::BigEndian => {
+            let v4 = constructor_vec_pack(ctx, arg0, arg1, arg2);
+            // Rule at src/isa/s390x/inst.isle line 3667.
+            return v4;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_pack_lane_order", "src/isa/s390x/inst.isle line 3666"
+    )
+}
+
+// Generated as internal constructor for term vec_pack_ssat_lane_order.
+pub fn constructor_vec_pack_ssat_lane_order<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: Reg,
+) -> Reg {
+    let v3 = &C::lane_order(ctx);
+    match v3 {
+        &LaneOrder::LittleEndian => {
+            let v5 = constructor_vec_pack_ssat(ctx, arg0, arg2, arg1);
+            // Rule at src/isa/s390x/inst.isle line 3678.
+            return v5;
+        }
+        &LaneOrder::BigEndian => {
+            let v4 = constructor_vec_pack_ssat(ctx, arg0, arg1, arg2);
+            // Rule at src/isa/s390x/inst.isle line 3675.
+            return v4;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_pack_ssat_lane_order", "src/isa/s390x/inst.isle line 3674"
+    )
+}
+
+// Generated as internal constructor for term vec_pack_usat_lane_order.
+pub fn constructor_vec_pack_usat_lane_order<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: Reg,
+) -> Reg {
+    let v3 = &C::lane_order(ctx);
+    match v3 {
+        &LaneOrder::LittleEndian => {
+            let v5 = constructor_vec_pack_usat(ctx, arg0, arg2, arg1);
+            // Rule at src/isa/s390x/inst.isle line 3686.
+            return v5;
+        }
+        &LaneOrder::BigEndian => {
+            let v4 = constructor_vec_pack_usat(ctx, arg0, arg1, arg2);
+            // Rule at src/isa/s390x/inst.isle line 3683.
+            return v4;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_pack_usat_lane_order", "src/isa/s390x/inst.isle line 3682"
+    )
+}
+
+// Generated as internal constructor for term vec_unpacks_low_lane_order.
+pub fn constructor_vec_unpacks_low_lane_order<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+) -> Reg {
+    let v2 = &C::lane_order(ctx);
+    match v2 {
+        &LaneOrder::LittleEndian => {
+            let v4 = constructor_vec_unpacks_low(ctx, arg0, arg1);
+            // Rule at src/isa/s390x/inst.isle line 3699.
+            return v4;
+        }
+        &LaneOrder::BigEndian => {
+            let v3 = constructor_vec_unpacks_high(ctx, arg0, arg1);
+            // Rule at src/isa/s390x/inst.isle line 3696.
+            return v3;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_unpacks_low_lane_order", "src/isa/s390x/inst.isle line 3695"
+    )
+}
+
+// Generated as internal constructor for term vec_unpacks_high_lane_order.
+pub fn constructor_vec_unpacks_high_lane_order<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+) -> Reg {
+    let v2 = &C::lane_order(ctx);
+    match v2 {
+        &LaneOrder::LittleEndian => {
+            let v4 = constructor_vec_unpacks_high(ctx, arg0, arg1);
+            // Rule at src/isa/s390x/inst.isle line 3707.
+            return v4;
+        }
+        &LaneOrder::BigEndian => {
+            let v3 = constructor_vec_unpacks_low(ctx, arg0, arg1);
+            // Rule at src/isa/s390x/inst.isle line 3704.
+            return v3;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_unpacks_high_lane_order", "src/isa/s390x/inst.isle line 3703"
+    )
+}
+
+// Generated as internal constructor for term vec_unpacku_low_lane_order.
+pub fn constructor_vec_unpacku_low_lane_order<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+) -> Reg {
+    let v2 = &C::lane_order(ctx);
+    match v2 {
+        &LaneOrder::LittleEndian => {
+            let v4 = constructor_vec_unpacku_low(ctx, arg0, arg1);
+            // Rule at src/isa/s390x/inst.isle line 3715.
+            return v4;
+        }
+        &LaneOrder::BigEndian => {
+            let v3 = constructor_vec_unpacku_high(ctx, arg0, arg1);
+            // Rule at src/isa/s390x/inst.isle line 3712.
+            return v3;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_unpacku_low_lane_order", "src/isa/s390x/inst.isle line 3711"
+    )
+}
+
+// Generated as internal constructor for term vec_unpacku_high_lane_order.
+pub fn constructor_vec_unpacku_high_lane_order<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+) -> Reg {
+    let v2 = &C::lane_order(ctx);
+    match v2 {
+        &LaneOrder::LittleEndian => {
+            let v4 = constructor_vec_unpacku_high(ctx, arg0, arg1);
+            // Rule at src/isa/s390x/inst.isle line 3723.
+            return v4;
+        }
+        &LaneOrder::BigEndian => {
+            let v3 = constructor_vec_unpacku_low(ctx, arg0, arg1);
+            // Rule at src/isa/s390x/inst.isle line 3720.
+            return v3;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_unpacku_high_lane_order", "src/isa/s390x/inst.isle line 3719"
+    )
+}
+
+// Generated as internal constructor for term vecop_merge_low.
+pub fn constructor_vecop_merge_low<C: Context>(ctx: &mut C, arg0: Type) -> VecBinaryOp {
+    match arg0 {
+        I8X16 => {
+            // Rule at src/isa/s390x/inst.isle line 3731.
+            return VecBinaryOp::MergeLow8x16;
+        }
+        I16X8 => {
+            // Rule at src/isa/s390x/inst.isle line 3732.
+            return VecBinaryOp::MergeLow16x8;
+        }
+        I32X4 => {
+            // Rule at src/isa/s390x/inst.isle line 3733.
+            return VecBinaryOp::MergeLow32x4;
+        }
+        I64X2 => {
+            // Rule at src/isa/s390x/inst.isle line 3734.
+            return VecBinaryOp::MergeLow64x2;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vecop_merge_low", "src/isa/s390x/inst.isle line 3730"
+    )
+}
+
+// Generated as internal constructor for term vec_merge_low.
+pub fn constructor_vec_merge_low<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v3 = &constructor_vecop_merge_low(ctx, arg0);
+    let v4 = constructor_vec_rrr(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 3737.
+    return v4;
+}
+
+// Generated as internal constructor for term vecop_merge_high.
+pub fn constructor_vecop_merge_high<C: Context>(ctx: &mut C, arg0: Type) -> VecBinaryOp {
+    match arg0 {
+        I8X16 => {
+            // Rule at src/isa/s390x/inst.isle line 3740.
+            return VecBinaryOp::MergeHigh8x16;
+        }
+        I16X8 => {
+            // Rule at src/isa/s390x/inst.isle line 3741.
+            return VecBinaryOp::MergeHigh16x8;
+        }
+        I32X4 => {
+            // Rule at src/isa/s390x/inst.isle line 3742.
+            return VecBinaryOp::MergeHigh32x4;
+        }
+        I64X2 => {
+            // Rule at src/isa/s390x/inst.isle line 3743.
+            return VecBinaryOp::MergeHigh64x2;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vecop_merge_high", "src/isa/s390x/inst.isle line 3739"
+    )
+}
+
+// Generated as internal constructor for term vec_merge_high.
+pub fn constructor_vec_merge_high<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: Reg,
+) -> Reg {
+    let v3 = &constructor_vecop_merge_high(ctx, arg0);
+    let v4 = constructor_vec_rrr(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 3746.
+    return v4;
+}
+
+// Generated as internal constructor for term vec_merge_low_lane_order.
+pub fn constructor_vec_merge_low_lane_order<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: Reg,
+) -> Reg {
+    let v3 = &C::lane_order(ctx);
+    match v3 {
+        &LaneOrder::LittleEndian => {
+            let v5 = constructor_vec_merge_low(ctx, arg0, arg2, arg1);
+            // Rule at src/isa/s390x/inst.isle line 3760.
+            return v5;
+        }
+        &LaneOrder::BigEndian => {
+            let v4 = constructor_vec_merge_high(ctx, arg0, arg1, arg2);
+            // Rule at src/isa/s390x/inst.isle line 3757.
+            return v4;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_merge_low_lane_order", "src/isa/s390x/inst.isle line 3756"
+    )
+}
+
+// Generated as internal constructor for term vec_merge_high_lane_order.
+pub fn constructor_vec_merge_high_lane_order<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: Reg,
+) -> Reg {
+    let v3 = &C::lane_order(ctx);
+    match v3 {
+        &LaneOrder::LittleEndian => {
+            let v5 = constructor_vec_merge_high(ctx, arg0, arg2, arg1);
+            // Rule at src/isa/s390x/inst.isle line 3768.
+            return v5;
+        }
+        &LaneOrder::BigEndian => {
+            let v4 = constructor_vec_merge_low(ctx, arg0, arg1, arg2);
+            // Rule at src/isa/s390x/inst.isle line 3765.
+            return v4;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_merge_high_lane_order", "src/isa/s390x/inst.isle line 3764"
+    )
+}
+
+// Generated as internal constructor for term clz_reg.
+pub fn constructor_clz_reg<C: Context>(ctx: &mut C, arg0: i16, arg1: Reg) -> Reg {
+    if arg0 == 0x40 {
+        let v2 = constructor_temp_writable_regpair(ctx);
+        let v3 = MInst::Flogr { rd: v2, rn: arg1 };
+        let v4 = C::emit(ctx, &v3);
+        let v5 = constructor_writable_regpair_to_regpair(ctx, v2);
+        let v6 = C::regpair_hi(ctx, v5);
+        // Rule at src/isa/s390x/inst.isle line 3779.
+        return v6;
+    }
+    let v2 = constructor_temp_writable_regpair(ctx);
+    let v10 = &C::intcc_as_cond(ctx, &IntCC::Equal);
+    let v5 = constructor_writable_regpair_to_regpair(ctx, v2);
+    let v6 = C::regpair_hi(ctx, v5);
+    let v11 = &constructor_cmov_imm(ctx, I64, v10, arg0, v6);
+    let v3 = MInst::Flogr { rd: v2, rn: arg1 };
+    let v7 = ProducesFlags::ProducesFlagsSideEffect { inst: v3 };
+    let v12 = constructor_with_flags_reg(ctx, &v7, v11);
+    // Rule at src/isa/s390x/inst.isle line 3785.
+    return v12;
+}
+
+// Generated as internal constructor for term vecop_clz.
+pub fn constructor_vecop_clz<C: Context>(ctx: &mut C, arg0: Type) -> VecUnaryOp {
+    match arg0 {
+        I8X16 => {
+            // Rule at src/isa/s390x/inst.isle line 3793.
+            return VecUnaryOp::Clz8x16;
+        }
+        I16X8 => {
+            // Rule at src/isa/s390x/inst.isle line 3794.
+            return VecUnaryOp::Clz16x8;
+        }
+        I32X4 => {
+            // Rule at src/isa/s390x/inst.isle line 3795.
+            return VecUnaryOp::Clz32x4;
+        }
+        I64X2 => {
+            // Rule at src/isa/s390x/inst.isle line 3796.
+            return VecUnaryOp::Clz64x2;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vecop_clz", "src/isa/s390x/inst.isle line 3792"
+    )
+}
+
+// Generated as internal constructor for term vec_clz.
+pub fn constructor_vec_clz<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
+    let v2 = &constructor_vecop_clz(ctx, arg0);
+    let v3 = constructor_vec_rr(ctx, arg0, v2, arg1);
+    // Rule at src/isa/s390x/inst.isle line 3799.
+    return v3;
+}
+
+// Generated as internal constructor for term vecop_ctz.
+pub fn constructor_vecop_ctz<C: Context>(ctx: &mut C, arg0: Type) -> VecUnaryOp {
+    match arg0 {
+        I8X16 => {
+            // Rule at src/isa/s390x/inst.isle line 3803.
+            return VecUnaryOp::Ctz8x16;
+        }
+        I16X8 => {
+            // Rule at src/isa/s390x/inst.isle line 3804.
+            return VecUnaryOp::Ctz16x8;
+        }
+        I32X4 => {
+            // Rule at src/isa/s390x/inst.isle line 3805.
+            return VecUnaryOp::Ctz32x4;
+        }
+        I64X2 => {
+            // Rule at src/isa/s390x/inst.isle line 3806.
+            return VecUnaryOp::Ctz64x2;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vecop_ctz", "src/isa/s390x/inst.isle line 3802"
+    )
+}
+
+// Generated as internal constructor for term vec_ctz.
+pub fn constructor_vec_ctz<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
+    let v2 = &constructor_vecop_ctz(ctx, arg0);
+    let v3 = constructor_vec_rr(ctx, arg0, v2, arg1);
+    // Rule at src/isa/s390x/inst.isle line 3809.
+    return v3;
+}
+
+// Generated as internal constructor for term uint_sat_reg.
+pub fn constructor_uint_sat_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Type, arg2: Reg) -> Reg {
+    if arg0 == arg1 {
+        // Rule at src/isa/s390x/inst.isle line 3815.
+        return arg2;
+    }
+    match arg0 {
+        I8 => {
+            let v3 = C::ty_32_or_64(ctx, arg1);
+            if let Some(v4) = v3 {
+                let v6 = &constructor_icmpu_uimm32(ctx, v4, arg2, 0x100);
+                let v8 = &C::intcc_as_cond(ctx, &IntCC::UnsignedGreaterThan);
+                let v10 = &constructor_cmov_imm(ctx, v4, v8, 0xFF, arg2);
+                let v11 = constructor_with_flags_reg(ctx, v6, v10);
+                // Rule at src/isa/s390x/inst.isle line 3816.
+                return v11;
+            }
+        }
+        I16 => {
+            let v3 = C::ty_32_or_64(ctx, arg1);
+            if let Some(v4) = v3 {
+                let v13 = &constructor_icmpu_uimm32(ctx, v4, arg2, 0xFFFF);
+                let v8 = &C::intcc_as_cond(ctx, &IntCC::UnsignedGreaterThan);
+                let v15 = &constructor_cmov_imm(ctx, v4, v8, -0x1, arg2);
+                let v16 = constructor_with_flags_reg(ctx, v13, v15);
+                // Rule at src/isa/s390x/inst.isle line 3819.
+                return v16;
+            }
+        }
+        I32 => {
+            if arg1 == I64 {
+                let v19 = constructor_imm(ctx, I64, 0xFFFFFFFF);
+                let v20 = &constructor_icmpu_reg(ctx, I64, arg2, v19);
+                let v21 = &C::intcc_as_cond(ctx, &IntCC::UnsignedGreaterThan);
+                let v22 = &constructor_bool(ctx, v20, v21);
+                let v23 = constructor_select_bool_reg(ctx, I64, v22, v19, arg2);
+                // Rule at src/isa/s390x/inst.isle line 3822.
+                return v23;
+            }
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "uint_sat_reg", "src/isa/s390x/inst.isle line 3814"
+    )
+}
+
+// Generated as internal constructor for term sint_sat_reg.
+pub fn constructor_sint_sat_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Type, arg2: Reg) -> Reg {
+    if arg0 == arg1 {
+        // Rule at src/isa/s390x/inst.isle line 3830.
+        return arg2;
+    }
+    match arg0 {
+        I8 => {
+            let v3 = C::ty_32_or_64(ctx, arg1);
+            if let Some(v4) = v3 {
+                let v6 = &constructor_icmps_simm16(ctx, v4, arg2, 0x7F);
+                let v8 = &C::intcc_as_cond(ctx, &IntCC::SignedGreaterThan);
+                let v9 = &constructor_cmov_imm(ctx, v4, v8, 0x7F, arg2);
+                let v10 = constructor_with_flags_reg(ctx, v6, v9);
+                let v12 = &constructor_icmps_simm16(ctx, v4, v10, -0x80);
+                let v14 = &C::intcc_as_cond(ctx, &IntCC::SignedLessThan);
+                let v15 = &constructor_cmov_imm(ctx, v4, v14, -0x80, v10);
+                let v16 = constructor_with_flags_reg(ctx, v12, v15);
+                // Rule at src/isa/s390x/inst.isle line 3831.
+                return v16;
+            }
+        }
+        I16 => {
+            let v3 = C::ty_32_or_64(ctx, arg1);
+            if let Some(v4) = v3 {
+                let v18 = &constructor_icmps_simm16(ctx, v4, arg2, 0x7FFF);
+                let v8 = &C::intcc_as_cond(ctx, &IntCC::SignedGreaterThan);
+                let v19 = &constructor_cmov_imm(ctx, v4, v8, 0x7FFF, arg2);
+                let v20 = constructor_with_flags_reg(ctx, v18, v19);
+                let v22 = &constructor_icmps_simm16(ctx, v4, v20, -0x8000);
+                let v14 = &C::intcc_as_cond(ctx, &IntCC::SignedLessThan);
+                let v23 = &constructor_cmov_imm(ctx, v4, v14, -0x8000, v20);
+                let v24 = constructor_with_flags_reg(ctx, v22, v23);
+                // Rule at src/isa/s390x/inst.isle line 3837.
+                return v24;
+            }
+        }
+        I32 => {
+            if arg1 == I64 {
+                let v27 = constructor_imm32(ctx, I64, 0x7FFFFFFF);
+                let v28 = &constructor_icmps_reg(ctx, I64, arg2, v27);
+                let v29 = &C::intcc_as_cond(ctx, &IntCC::SignedGreaterThan);
+                let v30 = &constructor_bool(ctx, v28, v29);
+                let v31 = constructor_select_bool_reg(ctx, I64, v30, v27, arg2);
+                let v33 = constructor_imm32(ctx, I64, -0x80000000);
+                let v34 = &constructor_icmps_reg(ctx, I64, v31, v33);
+                let v35 = &C::intcc_as_cond(ctx, &IntCC::SignedLessThan);
+                let v36 = &constructor_bool(ctx, v34, v35);
+                let v37 = constructor_select_bool_reg(ctx, I64, v36, v33, v31);
+                // Rule at src/isa/s390x/inst.isle line 3843.
+                return v37;
+            }
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "sint_sat_reg", "src/isa/s390x/inst.isle line 3829"
+    )
+}
+
+// Generated as internal constructor for term aluop_add.
+pub fn constructor_aluop_add<C: Context>(ctx: &mut C, arg0: Type) -> ALUOp {
+    match arg0 {
+        I8 => {
+            // Rule at src/isa/s390x/inst.isle line 3859.
+            return ALUOp::Add32;
+        }
+        I16 => {
+            // Rule at src/isa/s390x/inst.isle line 3860.
+            return ALUOp::Add32;
+        }
+        I32 => {
+            // Rule at src/isa/s390x/inst.isle line 3861.
+            return ALUOp::Add32;
+        }
+        I64 => {
+            // Rule at src/isa/s390x/inst.isle line 3862.
+            return ALUOp::Add64;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "aluop_add", "src/isa/s390x/inst.isle line 3858"
+    )
+}
+
+// Generated as internal constructor for term aluop_add_sext16.
+pub fn constructor_aluop_add_sext16<C: Context>(ctx: &mut C, arg0: Type) -> ALUOp {
+    match arg0 {
+        I16 => {
+            // Rule at src/isa/s390x/inst.isle line 3865.
+            return ALUOp::Add32Ext16;
+        }
+        I32 => {
+            // Rule at src/isa/s390x/inst.isle line 3866.
+            return ALUOp::Add32Ext16;
+        }
+        I64 => {
+            // Rule at src/isa/s390x/inst.isle line 3867.
+            return ALUOp::Add64Ext16;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "aluop_add_sext16", "src/isa/s390x/inst.isle line 3864"
+    )
+}
+
+// Generated as internal constructor for term aluop_add_sext32.
+pub fn constructor_aluop_add_sext32<C: Context>(ctx: &mut C, arg0: Type) -> ALUOp {
+    if arg0 == I64 {
+        // Rule at src/isa/s390x/inst.isle line 3870.
+        return ALUOp::Add64Ext32;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "aluop_add_sext32", "src/isa/s390x/inst.isle line 3869"
+    )
+}
+
+// Generated as internal constructor for term add_reg.
+pub fn constructor_add_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v3 = &constructor_aluop_add(ctx, arg0);
+    let v4 = constructor_alu_rrr(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 3873.
+    return v4;
+}
+
+// Generated as internal constructor for term add_reg_sext32.
+pub fn constructor_add_reg_sext32<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: Reg,
+) -> Reg {
+    let v3 = &constructor_aluop_add_sext32(ctx, arg0);
+    let v4 = constructor_alu_rr(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 3876.
+    return v4;
+}
+
+// Generated as internal constructor for term add_simm16.
+pub fn constructor_add_simm16<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: i16) -> Reg {
+    let v3 = &constructor_aluop_add(ctx, arg0);
+    let v4 = constructor_alu_rrsimm16(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 3879.
+    return v4;
+}
+
+// Generated as internal constructor for term add_simm32.
+pub fn constructor_add_simm32<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: i32) -> Reg {
+    let v3 = &constructor_aluop_add(ctx, arg0);
+    let v4 = constructor_alu_rsimm32(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 3882.
+    return v4;
+}
+
+// Generated as internal constructor for term add_mem.
+pub fn constructor_add_mem<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: &MemArg) -> Reg {
+    let v3 = &constructor_aluop_add(ctx, arg0);
+    let v4 = constructor_alu_rx(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 3885.
+    return v4;
+}
+
+// Generated as internal constructor for term add_mem_sext16.
+pub fn constructor_add_mem_sext16<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: &MemArg,
+) -> Reg {
+    let v3 = &constructor_aluop_add_sext16(ctx, arg0);
+    let v4 = constructor_alu_rx(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 3888.
+    return v4;
+}
+
+// Generated as internal constructor for term add_mem_sext32.
+pub fn constructor_add_mem_sext32<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: &MemArg,
+) -> Reg {
+    let v3 = &constructor_aluop_add_sext32(ctx, arg0);
+    let v4 = constructor_alu_rx(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 3891.
+    return v4;
+}
+
+// Generated as internal constructor for term vecop_add.
+pub fn constructor_vecop_add<C: Context>(ctx: &mut C, arg0: Type) -> VecBinaryOp {
+    match arg0 {
+        I128 => {
+            // Rule at src/isa/s390x/inst.isle line 3898.
+            return VecBinaryOp::Add128;
+        }
+        I8X16 => {
+            // Rule at src/isa/s390x/inst.isle line 3894.
+            return VecBinaryOp::Add8x16;
+        }
+        I16X8 => {
+            // Rule at src/isa/s390x/inst.isle line 3895.
+            return VecBinaryOp::Add16x8;
+        }
+        I32X4 => {
+            // Rule at src/isa/s390x/inst.isle line 3896.
+            return VecBinaryOp::Add32x4;
+        }
+        I64X2 => {
+            // Rule at src/isa/s390x/inst.isle line 3897.
+            return VecBinaryOp::Add64x2;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vecop_add", "src/isa/s390x/inst.isle line 3893"
+    )
+}
+
+// Generated as internal constructor for term vec_add.
+pub fn constructor_vec_add<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v3 = &constructor_vecop_add(ctx, arg0);
+    let v4 = constructor_vec_rrr(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 3901.
+    return v4;
+}
+
+// Generated as internal constructor for term aluop_add_logical.
+pub fn constructor_aluop_add_logical<C: Context>(ctx: &mut C, arg0: Type) -> ALUOp {
+    match arg0 {
+        I32 => {
+            // Rule at src/isa/s390x/inst.isle line 3907.
+            return ALUOp::AddLogical32;
+        }
+        I64 => {
+            // Rule at src/isa/s390x/inst.isle line 3908.
+            return ALUOp::AddLogical64;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "aluop_add_logical", "src/isa/s390x/inst.isle line 3906"
+    )
+}
+
+// Generated as internal constructor for term aluop_add_logical_zext32.
+pub fn constructor_aluop_add_logical_zext32<C: Context>(ctx: &mut C, arg0: Type) -> ALUOp {
+    if arg0 == I64 {
+        // Rule at src/isa/s390x/inst.isle line 3911.
+        return ALUOp::AddLogical64Ext32;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "aluop_add_logical_zext32", "src/isa/s390x/inst.isle line 3910"
+    )
+}
+
+// Generated as internal constructor for term add_logical_reg.
+pub fn constructor_add_logical_reg<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: Reg,
+) -> Reg {
+    let v3 = &constructor_aluop_add_logical(ctx, arg0);
+    let v4 = constructor_alu_rrr(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 3914.
+    return v4;
+}
+
+// Generated as internal constructor for term add_logical_reg_with_flags_paired.
+pub fn constructor_add_logical_reg_with_flags_paired<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: Reg,
+) -> ProducesFlags {
+    let v3 = &constructor_aluop_add_logical(ctx, arg0);
+    let v4 = &constructor_alu_rrr_with_flags_paired(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 3917.
+    return v4.clone();
+}
+
+// Generated as internal constructor for term add_logical_reg_zext32.
+pub fn constructor_add_logical_reg_zext32<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: Reg,
+) -> Reg {
+    let v3 = &constructor_aluop_add_logical_zext32(ctx, arg0);
+    let v4 = constructor_alu_rr(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 3921.
+    return v4;
+}
+
+// Generated as internal constructor for term add_logical_reg_zext32_with_flags_paired.
+pub fn constructor_add_logical_reg_zext32_with_flags_paired<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: Reg,
+) -> ProducesFlags {
+    let v3 = &constructor_aluop_add_logical_zext32(ctx, arg0);
+    let v4 = &constructor_alu_rr_with_flags_paired(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 3924.
+    return v4.clone();
+}
+
+// Generated as internal constructor for term add_logical_zimm32.
+pub fn constructor_add_logical_zimm32<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: u32,
+) -> Reg {
+    let v3 = &constructor_aluop_add_logical(ctx, arg0);
+    let v4 = constructor_alu_ruimm32(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 3928.
+    return v4;
+}
+
+// Generated as internal constructor for term add_logical_zimm32_with_flags_paired.
+pub fn constructor_add_logical_zimm32_with_flags_paired<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: u32,
+) -> ProducesFlags {
+    let v3 = &constructor_aluop_add_logical(ctx, arg0);
+    let v4 = &constructor_alu_ruimm32_with_flags_paired(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 3931.
+    return v4.clone();
+}
+
+// Generated as internal constructor for term add_logical_mem.
+pub fn constructor_add_logical_mem<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: &MemArg,
+) -> Reg {
+    let v3 = &constructor_aluop_add_logical(ctx, arg0);
+    let v4 = constructor_alu_rx(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 3935.
+    return v4;
+}
+
+// Generated as internal constructor for term add_logical_mem_with_flags_paired.
+pub fn constructor_add_logical_mem_with_flags_paired<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: &MemArg,
+) -> ProducesFlags {
+    let v3 = &constructor_aluop_add_logical(ctx, arg0);
+    let v4 = &constructor_alu_rx_with_flags_paired(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 3938.
+    return v4.clone();
+}
+
+// Generated as internal constructor for term add_logical_mem_zext32.
+pub fn constructor_add_logical_mem_zext32<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: &MemArg,
+) -> Reg {
+    let v3 = &constructor_aluop_add_logical_zext32(ctx, arg0);
+    let v4 = constructor_alu_rx(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 3942.
+    return v4;
+}
+
+// Generated as internal constructor for term add_logical_mem_zext32_with_flags_paired.
+pub fn constructor_add_logical_mem_zext32_with_flags_paired<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: &MemArg,
+) -> ProducesFlags {
+    let v3 = &constructor_aluop_add_logical_zext32(ctx, arg0);
+    let v4 = &constructor_alu_rx_with_flags_paired(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 3945.
+    return v4.clone();
+}
+
+// Generated as internal constructor for term aluop_sub.
+pub fn constructor_aluop_sub<C: Context>(ctx: &mut C, arg0: Type) -> ALUOp {
+    match arg0 {
+        I8 => {
+            // Rule at src/isa/s390x/inst.isle line 3952.
+            return ALUOp::Sub32;
+        }
+        I16 => {
+            // Rule at src/isa/s390x/inst.isle line 3953.
+            return ALUOp::Sub32;
+        }
+        I32 => {
+            // Rule at src/isa/s390x/inst.isle line 3954.
+            return ALUOp::Sub32;
+        }
+        I64 => {
+            // Rule at src/isa/s390x/inst.isle line 3955.
+            return ALUOp::Sub64;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "aluop_sub", "src/isa/s390x/inst.isle line 3951"
+    )
+}
+
+// Generated as internal constructor for term aluop_sub_sext16.
+pub fn constructor_aluop_sub_sext16<C: Context>(ctx: &mut C, arg0: Type) -> ALUOp {
+    match arg0 {
+        I16 => {
+            // Rule at src/isa/s390x/inst.isle line 3958.
+            return ALUOp::Sub32Ext16;
+        }
+        I32 => {
+            // Rule at src/isa/s390x/inst.isle line 3959.
+            return ALUOp::Sub32Ext16;
+        }
+        I64 => {
+            // Rule at src/isa/s390x/inst.isle line 3960.
+            return ALUOp::Sub64Ext16;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "aluop_sub_sext16", "src/isa/s390x/inst.isle line 3957"
+    )
+}
+
+// Generated as internal constructor for term aluop_sub_sext32.
+pub fn constructor_aluop_sub_sext32<C: Context>(ctx: &mut C, arg0: Type) -> ALUOp {
+    if arg0 == I64 {
+        // Rule at src/isa/s390x/inst.isle line 3963.
+        return ALUOp::Sub64Ext32;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "aluop_sub_sext32", "src/isa/s390x/inst.isle line 3962"
+    )
+}
+
+// Generated as internal constructor for term sub_reg.
+pub fn constructor_sub_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v3 = &constructor_aluop_sub(ctx, arg0);
+    let v4 = constructor_alu_rrr(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 3966.
+    return v4;
+}
+
+// Generated as internal constructor for term sub_reg_sext32.
+pub fn constructor_sub_reg_sext32<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: Reg,
+) -> Reg {
+    let v3 = &constructor_aluop_sub_sext32(ctx, arg0);
+    let v4 = constructor_alu_rr(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 3969.
+    return v4;
+}
+
+// Generated as internal constructor for term sub_mem.
+pub fn constructor_sub_mem<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: &MemArg) -> Reg {
+    let v3 = &constructor_aluop_sub(ctx, arg0);
+    let v4 = constructor_alu_rx(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 3972.
+    return v4;
+}
+
+// Generated as internal constructor for term sub_mem_sext16.
+pub fn constructor_sub_mem_sext16<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: &MemArg,
+) -> Reg {
+    let v3 = &constructor_aluop_sub_sext16(ctx, arg0);
+    let v4 = constructor_alu_rx(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 3975.
+    return v4;
+}
+
+// Generated as internal constructor for term sub_mem_sext32.
+pub fn constructor_sub_mem_sext32<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: &MemArg,
+) -> Reg {
+    let v3 = &constructor_aluop_sub_sext32(ctx, arg0);
+    let v4 = constructor_alu_rx(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 3978.
+    return v4;
+}
+
+// Generated as internal constructor for term vecop_sub.
+pub fn constructor_vecop_sub<C: Context>(ctx: &mut C, arg0: Type) -> VecBinaryOp {
+    match arg0 {
+        I128 => {
+            // Rule at src/isa/s390x/inst.isle line 3985.
+            return VecBinaryOp::Sub128;
+        }
+        I8X16 => {
+            // Rule at src/isa/s390x/inst.isle line 3981.
+            return VecBinaryOp::Sub8x16;
+        }
+        I16X8 => {
+            // Rule at src/isa/s390x/inst.isle line 3982.
+            return VecBinaryOp::Sub16x8;
+        }
+        I32X4 => {
+            // Rule at src/isa/s390x/inst.isle line 3983.
+            return VecBinaryOp::Sub32x4;
+        }
+        I64X2 => {
+            // Rule at src/isa/s390x/inst.isle line 3984.
+            return VecBinaryOp::Sub64x2;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vecop_sub", "src/isa/s390x/inst.isle line 3980"
+    )
+}
+
+// Generated as internal constructor for term vec_sub.
+pub fn constructor_vec_sub<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v3 = &constructor_vecop_sub(ctx, arg0);
+    let v4 = constructor_vec_rrr(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 3988.
+    return v4;
+}
+
+// Generated as internal constructor for term aluop_sub_logical.
+pub fn constructor_aluop_sub_logical<C: Context>(ctx: &mut C, arg0: Type) -> ALUOp {
+    match arg0 {
+        I32 => {
+            // Rule at src/isa/s390x/inst.isle line 3994.
+            return ALUOp::SubLogical32;
+        }
+        I64 => {
+            // Rule at src/isa/s390x/inst.isle line 3995.
+            return ALUOp::SubLogical64;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "aluop_sub_logical", "src/isa/s390x/inst.isle line 3993"
+    )
+}
+
+// Generated as internal constructor for term aluop_sub_logical_zext32.
+pub fn constructor_aluop_sub_logical_zext32<C: Context>(ctx: &mut C, arg0: Type) -> ALUOp {
+    if arg0 == I64 {
+        // Rule at src/isa/s390x/inst.isle line 3998.
+        return ALUOp::SubLogical64Ext32;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "aluop_sub_logical_zext32", "src/isa/s390x/inst.isle line 3997"
+    )
+}
+
+// Generated as internal constructor for term sub_logical_reg.
+pub fn constructor_sub_logical_reg<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: Reg,
+) -> Reg {
+    let v3 = &constructor_aluop_sub_logical(ctx, arg0);
+    let v4 = constructor_alu_rrr(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4001.
+    return v4;
+}
+
+// Generated as internal constructor for term sub_logical_reg_zext32.
+pub fn constructor_sub_logical_reg_zext32<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: Reg,
+) -> Reg {
+    let v3 = &constructor_aluop_sub_logical_zext32(ctx, arg0);
+    let v4 = constructor_alu_rr(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4004.
+    return v4;
+}
+
+// Generated as internal constructor for term sub_logical_zimm32.
+pub fn constructor_sub_logical_zimm32<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: u32,
+) -> Reg {
+    let v3 = &constructor_aluop_sub_logical(ctx, arg0);
+    let v4 = constructor_alu_ruimm32(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4007.
+    return v4;
+}
+
+// Generated as internal constructor for term sub_logical_mem.
+pub fn constructor_sub_logical_mem<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: &MemArg,
+) -> Reg {
+    let v3 = &constructor_aluop_sub_logical(ctx, arg0);
+    let v4 = constructor_alu_rx(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4010.
+    return v4;
+}
+
+// Generated as internal constructor for term sub_logical_mem_zext32.
+pub fn constructor_sub_logical_mem_zext32<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: &MemArg,
+) -> Reg {
+    let v3 = &constructor_aluop_sub_logical(ctx, arg0);
+    let v4 = constructor_alu_rx(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4013.
+    return v4;
+}
+
+// Generated as internal constructor for term aluop_mul.
+pub fn constructor_aluop_mul<C: Context>(ctx: &mut C, arg0: Type) -> ALUOp {
+    match arg0 {
+        I8 => {
+            // Rule at src/isa/s390x/inst.isle line 4019.
+            return ALUOp::Mul32;
+        }
+        I16 => {
+            // Rule at src/isa/s390x/inst.isle line 4020.
+            return ALUOp::Mul32;
+        }
+        I32 => {
+            // Rule at src/isa/s390x/inst.isle line 4021.
+            return ALUOp::Mul32;
+        }
+        I64 => {
+            // Rule at src/isa/s390x/inst.isle line 4022.
+            return ALUOp::Mul64;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "aluop_mul", "src/isa/s390x/inst.isle line 4018"
+    )
+}
+
+// Generated as internal constructor for term aluop_mul_sext16.
+pub fn constructor_aluop_mul_sext16<C: Context>(ctx: &mut C, arg0: Type) -> ALUOp {
+    match arg0 {
+        I16 => {
+            // Rule at src/isa/s390x/inst.isle line 4025.
+            return ALUOp::Mul32Ext16;
+        }
+        I32 => {
+            // Rule at src/isa/s390x/inst.isle line 4026.
+            return ALUOp::Mul32Ext16;
+        }
+        I64 => {
+            // Rule at src/isa/s390x/inst.isle line 4027.
+            return ALUOp::Mul64Ext16;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "aluop_mul_sext16", "src/isa/s390x/inst.isle line 4024"
+    )
+}
+
+// Generated as internal constructor for term aluop_mul_sext32.
+pub fn constructor_aluop_mul_sext32<C: Context>(ctx: &mut C, arg0: Type) -> ALUOp {
+    if arg0 == I64 {
+        // Rule at src/isa/s390x/inst.isle line 4030.
+        return ALUOp::Mul64Ext32;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "aluop_mul_sext32", "src/isa/s390x/inst.isle line 4029"
+    )
+}
+
+// Generated as internal constructor for term mul_reg.
+pub fn constructor_mul_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v3 = &constructor_aluop_mul(ctx, arg0);
+    let v4 = constructor_alu_rrr(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4033.
+    return v4;
+}
+
+// Generated as internal constructor for term mul_reg_sext32.
+pub fn constructor_mul_reg_sext32<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: Reg,
+) -> Reg {
+    let v3 = &constructor_aluop_mul_sext32(ctx, arg0);
+    let v4 = constructor_alu_rr(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4036.
+    return v4;
+}
+
+// Generated as internal constructor for term mul_simm16.
+pub fn constructor_mul_simm16<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: i16) -> Reg {
+    let v3 = &constructor_aluop_mul(ctx, arg0);
+    let v4 = constructor_alu_rsimm16(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4039.
+    return v4;
+}
+
+// Generated as internal constructor for term mul_simm32.
+pub fn constructor_mul_simm32<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: i32) -> Reg {
+    let v3 = &constructor_aluop_mul(ctx, arg0);
+    let v4 = constructor_alu_rsimm32(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4042.
+    return v4;
+}
+
+// Generated as internal constructor for term mul_mem.
+pub fn constructor_mul_mem<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: &MemArg) -> Reg {
+    let v3 = &constructor_aluop_mul(ctx, arg0);
+    let v4 = constructor_alu_rx(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4045.
+    return v4;
+}
+
+// Generated as internal constructor for term mul_mem_sext16.
+pub fn constructor_mul_mem_sext16<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: &MemArg,
+) -> Reg {
+    let v3 = &constructor_aluop_mul_sext16(ctx, arg0);
+    let v4 = constructor_alu_rx(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4048.
+    return v4;
+}
+
+// Generated as internal constructor for term mul_mem_sext32.
+pub fn constructor_mul_mem_sext32<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: &MemArg,
+) -> Reg {
+    let v3 = &constructor_aluop_mul_sext32(ctx, arg0);
+    let v4 = constructor_alu_rx(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4051.
+    return v4;
+}
+
+// Generated as internal constructor for term vecop_mul.
+pub fn constructor_vecop_mul<C: Context>(ctx: &mut C, arg0: Type) -> VecBinaryOp {
+    match arg0 {
+        I8X16 => {
+            // Rule at src/isa/s390x/inst.isle line 4054.
+            return VecBinaryOp::Mul8x16;
+        }
+        I16X8 => {
+            // Rule at src/isa/s390x/inst.isle line 4055.
+            return VecBinaryOp::Mul16x8;
+        }
+        I32X4 => {
+            // Rule at src/isa/s390x/inst.isle line 4056.
+            return VecBinaryOp::Mul32x4;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vecop_mul", "src/isa/s390x/inst.isle line 4053"
+    )
+}
+
+// Generated as internal constructor for term vec_mul.
+pub fn constructor_vec_mul<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v3 = &constructor_vecop_mul(ctx, arg0);
+    let v4 = constructor_vec_rrr(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4060.
+    return v4;
+}
+
+// Generated as internal constructor for term vecop_umulhi.
+pub fn constructor_vecop_umulhi<C: Context>(ctx: &mut C, arg0: Type) -> VecBinaryOp {
+    match arg0 {
+        I8X16 => {
+            // Rule at src/isa/s390x/inst.isle line 4063.
+            return VecBinaryOp::UMulHi8x16;
+        }
+        I16X8 => {
+            // Rule at src/isa/s390x/inst.isle line 4064.
+            return VecBinaryOp::UMulHi16x8;
+        }
+        I32X4 => {
+            // Rule at src/isa/s390x/inst.isle line 4065.
+            return VecBinaryOp::UMulHi32x4;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vecop_umulhi", "src/isa/s390x/inst.isle line 4062"
+    )
+}
+
+// Generated as internal constructor for term vec_umulhi.
+pub fn constructor_vec_umulhi<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v3 = &constructor_vecop_umulhi(ctx, arg0);
+    let v4 = constructor_vec_rrr(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4069.
+    return v4;
+}
+
+// Generated as internal constructor for term vecop_smulhi.
+pub fn constructor_vecop_smulhi<C: Context>(ctx: &mut C, arg0: Type) -> VecBinaryOp {
+    match arg0 {
+        I8X16 => {
+            // Rule at src/isa/s390x/inst.isle line 4072.
+            return VecBinaryOp::SMulHi8x16;
+        }
+        I16X8 => {
+            // Rule at src/isa/s390x/inst.isle line 4073.
+            return VecBinaryOp::SMulHi16x8;
+        }
+        I32X4 => {
+            // Rule at src/isa/s390x/inst.isle line 4074.
+            return VecBinaryOp::SMulHi32x4;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vecop_smulhi", "src/isa/s390x/inst.isle line 4071"
+    )
+}
+
+// Generated as internal constructor for term vec_smulhi.
+pub fn constructor_vec_smulhi<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v3 = &constructor_vecop_smulhi(ctx, arg0);
+    let v4 = constructor_vec_rrr(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4078.
+    return v4;
+}
+
+// Generated as internal constructor for term vecop_umul_even.
+pub fn constructor_vecop_umul_even<C: Context>(ctx: &mut C, arg0: Type) -> VecBinaryOp {
+    match arg0 {
+        I8X16 => {
+            // Rule at src/isa/s390x/inst.isle line 4081.
+            return VecBinaryOp::UMulEven8x16;
+        }
+        I16X8 => {
+            // Rule at src/isa/s390x/inst.isle line 4082.
+            return VecBinaryOp::UMulEven16x8;
+        }
+        I32X4 => {
+            // Rule at src/isa/s390x/inst.isle line 4083.
+            return VecBinaryOp::UMulEven32x4;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vecop_umul_even", "src/isa/s390x/inst.isle line 4080"
+    )
+}
+
+// Generated as internal constructor for term vec_umul_even.
+pub fn constructor_vec_umul_even<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v3 = &constructor_vecop_umul_even(ctx, arg0);
+    let v4 = constructor_vec_rrr(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4087.
+    return v4;
+}
+
+// Generated as internal constructor for term vecop_smul_even.
+pub fn constructor_vecop_smul_even<C: Context>(ctx: &mut C, arg0: Type) -> VecBinaryOp {
+    match arg0 {
+        I8X16 => {
+            // Rule at src/isa/s390x/inst.isle line 4090.
+            return VecBinaryOp::SMulEven8x16;
+        }
+        I16X8 => {
+            // Rule at src/isa/s390x/inst.isle line 4091.
+            return VecBinaryOp::SMulEven16x8;
+        }
+        I32X4 => {
+            // Rule at src/isa/s390x/inst.isle line 4092.
+            return VecBinaryOp::SMulEven32x4;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vecop_smul_even", "src/isa/s390x/inst.isle line 4089"
+    )
+}
+
+// Generated as internal constructor for term vec_smul_even.
+pub fn constructor_vec_smul_even<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v3 = &constructor_vecop_smul_even(ctx, arg0);
+    let v4 = constructor_vec_rrr(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4096.
+    return v4;
+}
+
+// Generated as internal constructor for term vecop_umul_odd.
+pub fn constructor_vecop_umul_odd<C: Context>(ctx: &mut C, arg0: Type) -> VecBinaryOp {
+    match arg0 {
+        I8X16 => {
+            // Rule at src/isa/s390x/inst.isle line 4099.
+            return VecBinaryOp::UMulOdd8x16;
+        }
+        I16X8 => {
+            // Rule at src/isa/s390x/inst.isle line 4100.
+            return VecBinaryOp::UMulOdd16x8;
+        }
+        I32X4 => {
+            // Rule at src/isa/s390x/inst.isle line 4101.
+            return VecBinaryOp::UMulOdd32x4;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vecop_umul_odd", "src/isa/s390x/inst.isle line 4098"
+    )
+}
+
+// Generated as internal constructor for term vec_umul_odd.
+pub fn constructor_vec_umul_odd<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v3 = &constructor_vecop_umul_odd(ctx, arg0);
+    let v4 = constructor_vec_rrr(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4105.
+    return v4;
+}
+
+// Generated as internal constructor for term vecop_smul_odd.
+pub fn constructor_vecop_smul_odd<C: Context>(ctx: &mut C, arg0: Type) -> VecBinaryOp {
+    match arg0 {
+        I8X16 => {
+            // Rule at src/isa/s390x/inst.isle line 4108.
+            return VecBinaryOp::SMulOdd8x16;
+        }
+        I16X8 => {
+            // Rule at src/isa/s390x/inst.isle line 4109.
+            return VecBinaryOp::SMulOdd16x8;
+        }
+        I32X4 => {
+            // Rule at src/isa/s390x/inst.isle line 4110.
+            return VecBinaryOp::SMulOdd32x4;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vecop_smul_odd", "src/isa/s390x/inst.isle line 4107"
+    )
+}
+
+// Generated as internal constructor for term vec_smul_odd.
+pub fn constructor_vec_smul_odd<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v3 = &constructor_vecop_smul_odd(ctx, arg0);
+    let v4 = constructor_vec_rrr(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4114.
+    return v4;
+}
+
+// Generated as internal constructor for term udivmod.
+pub fn constructor_udivmod<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: RegPair,
+    arg2: Reg,
+) -> RegPair {
+    match arg0 {
+        I32 => {
+            let v3 = constructor_udivmod32(ctx, arg1, arg2);
+            // Rule at src/isa/s390x/inst.isle line 4120.
+            return v3;
+        }
+        I64 => {
+            let v4 = constructor_udivmod64(ctx, arg1, arg2);
+            // Rule at src/isa/s390x/inst.isle line 4121.
+            return v4;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "udivmod", "src/isa/s390x/inst.isle line 4119"
+    )
+}
+
+// Generated as internal constructor for term sdivmod.
+pub fn constructor_sdivmod<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> RegPair {
+    match arg0 {
+        I32 => {
+            let v3 = constructor_sdivmod32(ctx, arg1, arg2);
+            // Rule at src/isa/s390x/inst.isle line 4127.
+            return v3;
+        }
+        I64 => {
+            let v4 = constructor_sdivmod64(ctx, arg1, arg2);
+            // Rule at src/isa/s390x/inst.isle line 4128.
+            return v4;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "sdivmod", "src/isa/s390x/inst.isle line 4126"
+    )
+}
+
+// Generated as internal constructor for term vecop_umax.
+pub fn constructor_vecop_umax<C: Context>(ctx: &mut C, arg0: Type) -> VecBinaryOp {
+    match arg0 {
+        I8X16 => {
+            // Rule at src/isa/s390x/inst.isle line 4134.
+            return VecBinaryOp::UMax8x16;
+        }
+        I16X8 => {
+            // Rule at src/isa/s390x/inst.isle line 4135.
+            return VecBinaryOp::UMax16x8;
+        }
+        I32X4 => {
+            // Rule at src/isa/s390x/inst.isle line 4136.
+            return VecBinaryOp::UMax32x4;
+        }
+        I64X2 => {
+            // Rule at src/isa/s390x/inst.isle line 4137.
+            return VecBinaryOp::UMax64x2;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vecop_umax", "src/isa/s390x/inst.isle line 4133"
+    )
+}
+
+// Generated as internal constructor for term vec_umax.
+pub fn constructor_vec_umax<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v3 = &constructor_vecop_umax(ctx, arg0);
+    let v4 = constructor_vec_rrr(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4140.
+    return v4;
+}
+
+// Generated as internal constructor for term vecop_smax.
+pub fn constructor_vecop_smax<C: Context>(ctx: &mut C, arg0: Type) -> VecBinaryOp {
+    match arg0 {
+        I8X16 => {
+            // Rule at src/isa/s390x/inst.isle line 4146.
+            return VecBinaryOp::SMax8x16;
+        }
+        I16X8 => {
+            // Rule at src/isa/s390x/inst.isle line 4147.
+            return VecBinaryOp::SMax16x8;
+        }
+        I32X4 => {
+            // Rule at src/isa/s390x/inst.isle line 4148.
+            return VecBinaryOp::SMax32x4;
+        }
+        I64X2 => {
+            // Rule at src/isa/s390x/inst.isle line 4149.
+            return VecBinaryOp::SMax64x2;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vecop_smax", "src/isa/s390x/inst.isle line 4145"
+    )
+}
+
+// Generated as internal constructor for term vec_smax.
+pub fn constructor_vec_smax<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v3 = &constructor_vecop_smax(ctx, arg0);
+    let v4 = constructor_vec_rrr(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4152.
+    return v4;
+}
+
+// Generated as internal constructor for term vecop_umin.
+pub fn constructor_vecop_umin<C: Context>(ctx: &mut C, arg0: Type) -> VecBinaryOp {
+    match arg0 {
+        I8X16 => {
+            // Rule at src/isa/s390x/inst.isle line 4158.
+            return VecBinaryOp::UMin8x16;
+        }
+        I16X8 => {
+            // Rule at src/isa/s390x/inst.isle line 4159.
+            return VecBinaryOp::UMin16x8;
+        }
+        I32X4 => {
+            // Rule at src/isa/s390x/inst.isle line 4160.
+            return VecBinaryOp::UMin32x4;
+        }
+        I64X2 => {
+            // Rule at src/isa/s390x/inst.isle line 4161.
+            return VecBinaryOp::UMin64x2;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vecop_umin", "src/isa/s390x/inst.isle line 4157"
+    )
+}
+
+// Generated as internal constructor for term vec_umin.
+pub fn constructor_vec_umin<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v3 = &constructor_vecop_umin(ctx, arg0);
+    let v4 = constructor_vec_rrr(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4164.
+    return v4;
+}
+
+// Generated as internal constructor for term vecop_smin.
+pub fn constructor_vecop_smin<C: Context>(ctx: &mut C, arg0: Type) -> VecBinaryOp {
+    match arg0 {
+        I8X16 => {
+            // Rule at src/isa/s390x/inst.isle line 4170.
+            return VecBinaryOp::SMin8x16;
+        }
+        I16X8 => {
+            // Rule at src/isa/s390x/inst.isle line 4171.
+            return VecBinaryOp::SMin16x8;
+        }
+        I32X4 => {
+            // Rule at src/isa/s390x/inst.isle line 4172.
+            return VecBinaryOp::SMin32x4;
+        }
+        I64X2 => {
+            // Rule at src/isa/s390x/inst.isle line 4173.
+            return VecBinaryOp::SMin64x2;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vecop_smin", "src/isa/s390x/inst.isle line 4169"
+    )
+}
+
+// Generated as internal constructor for term vec_smin.
+pub fn constructor_vec_smin<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v3 = &constructor_vecop_smin(ctx, arg0);
+    let v4 = constructor_vec_rrr(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4176.
+    return v4;
+}
+
+// Generated as internal constructor for term vecop_uavg.
+pub fn constructor_vecop_uavg<C: Context>(ctx: &mut C, arg0: Type) -> VecBinaryOp {
+    match arg0 {
+        I8X16 => {
+            // Rule at src/isa/s390x/inst.isle line 4182.
+            return VecBinaryOp::UAvg8x16;
+        }
+        I16X8 => {
+            // Rule at src/isa/s390x/inst.isle line 4183.
+            return VecBinaryOp::UAvg16x8;
+        }
+        I32X4 => {
+            // Rule at src/isa/s390x/inst.isle line 4184.
+            return VecBinaryOp::UAvg32x4;
+        }
+        I64X2 => {
+            // Rule at src/isa/s390x/inst.isle line 4185.
+            return VecBinaryOp::UAvg64x2;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vecop_uavg", "src/isa/s390x/inst.isle line 4181"
+    )
+}
+
+// Generated as internal constructor for term vec_uavg.
+pub fn constructor_vec_uavg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v3 = &constructor_vecop_uavg(ctx, arg0);
+    let v4 = constructor_vec_rrr(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4188.
+    return v4;
+}
+
+// Generated as internal constructor for term aluop_and.
+pub fn constructor_aluop_and<C: Context>(ctx: &mut C, arg0: Type) -> ALUOp {
+    let v4 = C::gpr64_ty(ctx, arg0);
+    if let Some(v5) = v4 {
+        // Rule at src/isa/s390x/inst.isle line 4195.
+        return ALUOp::And64;
+    }
+    let v1 = C::gpr32_ty(ctx, arg0);
+    if let Some(v2) = v1 {
+        // Rule at src/isa/s390x/inst.isle line 4194.
+        return ALUOp::And32;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "aluop_and", "src/isa/s390x/inst.isle line 4193"
+    )
+}
+
+// Generated as internal constructor for term and_reg.
+pub fn constructor_and_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v3 = &constructor_aluop_and(ctx, arg0);
+    let v4 = constructor_alu_rrr(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4198.
+    return v4;
+}
+
+// Generated as internal constructor for term and_uimm16shifted.
+pub fn constructor_and_uimm16shifted<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: UImm16Shifted,
+) -> Reg {
+    let v3 = &constructor_aluop_and(ctx, arg0);
+    let v4 = constructor_alu_ruimm16shifted(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4201.
+    return v4;
+}
+
+// Generated as internal constructor for term and_uimm32shifted.
+pub fn constructor_and_uimm32shifted<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: UImm32Shifted,
+) -> Reg {
+    let v3 = &constructor_aluop_and(ctx, arg0);
+    let v4 = constructor_alu_ruimm32shifted(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4204.
+    return v4;
+}
+
+// Generated as internal constructor for term and_mem.
+pub fn constructor_and_mem<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: &MemArg) -> Reg {
+    let v3 = &constructor_aluop_and(ctx, arg0);
+    let v4 = constructor_alu_rx(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4207.
+    return v4;
+}
+
+// Generated as internal constructor for term vec_and.
+pub fn constructor_vec_and<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v1 = C::vr128_ty(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v6 = constructor_vec_rrr(ctx, v2, &VecBinaryOp::And128, arg1, arg2);
+        // Rule at src/isa/s390x/inst.isle line 4210.
+        return v6;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_and", "src/isa/s390x/inst.isle line 4209"
+    )
+}
+
+// Generated as internal constructor for term aluop_or.
+pub fn constructor_aluop_or<C: Context>(ctx: &mut C, arg0: Type) -> ALUOp {
+    let v4 = C::gpr64_ty(ctx, arg0);
+    if let Some(v5) = v4 {
+        // Rule at src/isa/s390x/inst.isle line 4217.
+        return ALUOp::Orr64;
+    }
+    let v1 = C::gpr32_ty(ctx, arg0);
+    if let Some(v2) = v1 {
+        // Rule at src/isa/s390x/inst.isle line 4216.
+        return ALUOp::Orr32;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "aluop_or", "src/isa/s390x/inst.isle line 4215"
+    )
+}
+
+// Generated as internal constructor for term or_reg.
+pub fn constructor_or_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v3 = &constructor_aluop_or(ctx, arg0);
+    let v4 = constructor_alu_rrr(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4220.
+    return v4;
+}
+
+// Generated as internal constructor for term or_uimm16shifted.
+pub fn constructor_or_uimm16shifted<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: UImm16Shifted,
+) -> Reg {
+    let v3 = &constructor_aluop_or(ctx, arg0);
+    let v4 = constructor_alu_ruimm16shifted(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4223.
+    return v4;
+}
+
+// Generated as internal constructor for term or_uimm32shifted.
+pub fn constructor_or_uimm32shifted<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: UImm32Shifted,
+) -> Reg {
+    let v3 = &constructor_aluop_or(ctx, arg0);
+    let v4 = constructor_alu_ruimm32shifted(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4226.
+    return v4;
+}
+
+// Generated as internal constructor for term or_mem.
+pub fn constructor_or_mem<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: &MemArg) -> Reg {
+    let v3 = &constructor_aluop_or(ctx, arg0);
+    let v4 = constructor_alu_rx(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4229.
+    return v4;
+}
+
+// Generated as internal constructor for term vec_or.
+pub fn constructor_vec_or<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v1 = C::vr128_ty(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v6 = constructor_vec_rrr(ctx, v2, &VecBinaryOp::Orr128, arg1, arg2);
+        // Rule at src/isa/s390x/inst.isle line 4232.
+        return v6;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_or", "src/isa/s390x/inst.isle line 4231"
+    )
+}
+
+// Generated as internal constructor for term aluop_xor.
+pub fn constructor_aluop_xor<C: Context>(ctx: &mut C, arg0: Type) -> ALUOp {
+    let v4 = C::gpr64_ty(ctx, arg0);
+    if let Some(v5) = v4 {
+        // Rule at src/isa/s390x/inst.isle line 4239.
+        return ALUOp::Xor64;
+    }
+    let v1 = C::gpr32_ty(ctx, arg0);
+    if let Some(v2) = v1 {
+        // Rule at src/isa/s390x/inst.isle line 4238.
+        return ALUOp::Xor32;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "aluop_xor", "src/isa/s390x/inst.isle line 4237"
+    )
+}
+
+// Generated as internal constructor for term xor_reg.
+pub fn constructor_xor_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v3 = &constructor_aluop_xor(ctx, arg0);
+    let v4 = constructor_alu_rrr(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4242.
+    return v4;
+}
+
+// Generated as internal constructor for term xor_uimm32shifted.
+pub fn constructor_xor_uimm32shifted<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: UImm32Shifted,
+) -> Reg {
+    let v3 = &constructor_aluop_xor(ctx, arg0);
+    let v4 = constructor_alu_ruimm32shifted(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4245.
+    return v4;
+}
+
+// Generated as internal constructor for term xor_mem.
+pub fn constructor_xor_mem<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: &MemArg) -> Reg {
+    let v3 = &constructor_aluop_xor(ctx, arg0);
+    let v4 = constructor_alu_rx(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4248.
+    return v4;
+}
+
+// Generated as internal constructor for term push_xor_uimm32shifted.
+pub fn constructor_push_xor_uimm32shifted<C: Context>(
+    ctx: &mut C,
+    arg0: &VecMInstBuilder,
+    arg1: Type,
+    arg2: WritableReg,
+    arg3: Reg,
+    arg4: UImm32Shifted,
+) -> Reg {
+    let v5 = &constructor_aluop_xor(ctx, arg1);
+    let v6 = constructor_push_alu_uimm32shifted(ctx, arg0, v5, arg2, arg3, arg4);
+    // Rule at src/isa/s390x/inst.isle line 4251.
+    return v6;
+}
+
+// Generated as internal constructor for term vec_xor.
+pub fn constructor_vec_xor<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v1 = C::vr128_ty(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v6 = constructor_vec_rrr(ctx, v2, &VecBinaryOp::Xor128, arg1, arg2);
+        // Rule at src/isa/s390x/inst.isle line 4255.
+        return v6;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_xor", "src/isa/s390x/inst.isle line 4254"
+    )
+}
+
+// Generated as internal constructor for term not_reg.
+pub fn constructor_not_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
+    let v8 = C::gpr64_ty(ctx, arg0);
+    if let Some(v9) = v8 {
+        let v6 = C::uimm32shifted(ctx, 0xFFFFFFFF, 0x0);
+        let v10 = constructor_xor_uimm32shifted(ctx, v9, arg1, v6);
+        let v12 = C::uimm32shifted(ctx, 0xFFFFFFFF, 0x20);
+        let v13 = constructor_xor_uimm32shifted(ctx, v9, v10, v12);
+        // Rule at src/isa/s390x/inst.isle line 4263.
+        return v13;
+    }
+    let v1 = C::gpr32_ty(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v6 = C::uimm32shifted(ctx, 0xFFFFFFFF, 0x0);
+        let v7 = constructor_xor_uimm32shifted(ctx, v2, arg1, v6);
+        // Rule at src/isa/s390x/inst.isle line 4261.
+        return v7;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "not_reg", "src/isa/s390x/inst.isle line 4260"
+    )
+}
+
+// Generated as internal constructor for term push_not_reg.
+pub fn constructor_push_not_reg<C: Context>(
+    ctx: &mut C,
+    arg0: &VecMInstBuilder,
+    arg1: Type,
+    arg2: WritableReg,
+    arg3: Reg,
+) -> Reg {
+    let v10 = C::gpr64_ty(ctx, arg1);
+    if let Some(v11) = v10 {
+        let v8 = C::uimm32shifted(ctx, 0xFFFFFFFF, 0x0);
+        let v12 = constructor_push_xor_uimm32shifted(ctx, arg0, v11, arg2, arg3, v8);
+        let v14 = C::uimm32shifted(ctx, 0xFFFFFFFF, 0x20);
+        let v15 = constructor_push_xor_uimm32shifted(ctx, arg0, v11, arg2, v12, v14);
+        // Rule at src/isa/s390x/inst.isle line 4271.
+        return v15;
+    }
+    let v2 = C::gpr32_ty(ctx, arg1);
+    if let Some(v3) = v2 {
+        let v8 = C::uimm32shifted(ctx, 0xFFFFFFFF, 0x0);
+        let v9 = constructor_push_xor_uimm32shifted(ctx, arg0, v3, arg2, arg3, v8);
+        // Rule at src/isa/s390x/inst.isle line 4269.
+        return v9;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "push_not_reg", "src/isa/s390x/inst.isle line 4268"
+    )
+}
+
+// Generated as internal constructor for term vec_not.
+pub fn constructor_vec_not<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
+    let v2 = constructor_vec_not_or(ctx, arg0, arg1, arg1);
+    // Rule at src/isa/s390x/inst.isle line 4276.
+    return v2;
+}
+
+// Generated as internal constructor for term aluop_not_and.
+pub fn constructor_aluop_not_and<C: Context>(ctx: &mut C, arg0: Type) -> ALUOp {
+    let v4 = C::gpr64_ty(ctx, arg0);
+    if let Some(v5) = v4 {
+        // Rule at src/isa/s390x/inst.isle line 4283.
+        return ALUOp::NotAnd64;
+    }
+    let v1 = C::gpr32_ty(ctx, arg0);
+    if let Some(v2) = v1 {
+        // Rule at src/isa/s390x/inst.isle line 4282.
+        return ALUOp::NotAnd32;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "aluop_not_and", "src/isa/s390x/inst.isle line 4281"
+    )
+}
+
+// Generated as internal constructor for term not_and_reg.
+pub fn constructor_not_and_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v3 = &constructor_aluop_not_and(ctx, arg0);
+    let v4 = constructor_alu_rrr(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4286.
+    return v4;
+}
+
+// Generated as internal constructor for term vec_not_and.
+pub fn constructor_vec_not_and<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v1 = C::vr128_ty(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v6 = constructor_vec_rrr(ctx, v2, &VecBinaryOp::NotAnd128, arg1, arg2);
+        // Rule at src/isa/s390x/inst.isle line 4289.
+        return v6;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_not_and", "src/isa/s390x/inst.isle line 4288"
+    )
+}
+
+// Generated as internal constructor for term aluop_not_or.
+pub fn constructor_aluop_not_or<C: Context>(ctx: &mut C, arg0: Type) -> ALUOp {
+    let v4 = C::gpr64_ty(ctx, arg0);
+    if let Some(v5) = v4 {
+        // Rule at src/isa/s390x/inst.isle line 4296.
+        return ALUOp::NotOrr64;
+    }
+    let v1 = C::gpr32_ty(ctx, arg0);
+    if let Some(v2) = v1 {
+        // Rule at src/isa/s390x/inst.isle line 4295.
+        return ALUOp::NotOrr32;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "aluop_not_or", "src/isa/s390x/inst.isle line 4294"
+    )
+}
+
+// Generated as internal constructor for term not_or_reg.
+pub fn constructor_not_or_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v3 = &constructor_aluop_not_or(ctx, arg0);
+    let v4 = constructor_alu_rrr(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4299.
+    return v4;
+}
+
+// Generated as internal constructor for term vec_not_or.
+pub fn constructor_vec_not_or<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v1 = C::vr128_ty(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v6 = constructor_vec_rrr(ctx, v2, &VecBinaryOp::NotOrr128, arg1, arg2);
+        // Rule at src/isa/s390x/inst.isle line 4302.
+        return v6;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_not_or", "src/isa/s390x/inst.isle line 4301"
+    )
+}
+
+// Generated as internal constructor for term aluop_not_xor.
+pub fn constructor_aluop_not_xor<C: Context>(ctx: &mut C, arg0: Type) -> ALUOp {
+    let v4 = C::gpr64_ty(ctx, arg0);
+    if let Some(v5) = v4 {
+        // Rule at src/isa/s390x/inst.isle line 4309.
+        return ALUOp::NotXor64;
+    }
+    let v1 = C::gpr32_ty(ctx, arg0);
+    if let Some(v2) = v1 {
+        // Rule at src/isa/s390x/inst.isle line 4308.
+        return ALUOp::NotXor32;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "aluop_not_xor", "src/isa/s390x/inst.isle line 4307"
+    )
+}
+
+// Generated as internal constructor for term not_xor_reg.
+pub fn constructor_not_xor_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v3 = &constructor_aluop_not_xor(ctx, arg0);
+    let v4 = constructor_alu_rrr(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4312.
+    return v4;
+}
+
+// Generated as internal constructor for term vec_not_xor.
+pub fn constructor_vec_not_xor<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v1 = C::vr128_ty(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v6 = constructor_vec_rrr(ctx, v2, &VecBinaryOp::NotXor128, arg1, arg2);
+        // Rule at src/isa/s390x/inst.isle line 4315.
+        return v6;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_not_xor", "src/isa/s390x/inst.isle line 4314"
+    )
+}
+
+// Generated as internal constructor for term aluop_and_not.
+pub fn constructor_aluop_and_not<C: Context>(ctx: &mut C, arg0: Type) -> ALUOp {
+    let v4 = C::gpr64_ty(ctx, arg0);
+    if let Some(v5) = v4 {
+        // Rule at src/isa/s390x/inst.isle line 4322.
+        return ALUOp::AndNot64;
+    }
+    let v1 = C::gpr32_ty(ctx, arg0);
+    if let Some(v2) = v1 {
+        // Rule at src/isa/s390x/inst.isle line 4321.
+        return ALUOp::AndNot32;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "aluop_and_not", "src/isa/s390x/inst.isle line 4320"
+    )
+}
+
+// Generated as internal constructor for term and_not_reg.
+pub fn constructor_and_not_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v3 = &constructor_aluop_and_not(ctx, arg0);
+    let v4 = constructor_alu_rrr(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4325.
+    return v4;
+}
+
+// Generated as internal constructor for term vec_and_not.
+pub fn constructor_vec_and_not<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v1 = C::vr128_ty(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v6 = constructor_vec_rrr(ctx, v2, &VecBinaryOp::AndNot128, arg1, arg2);
+        // Rule at src/isa/s390x/inst.isle line 4328.
+        return v6;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_and_not", "src/isa/s390x/inst.isle line 4327"
+    )
+}
+
+// Generated as internal constructor for term aluop_or_not.
+pub fn constructor_aluop_or_not<C: Context>(ctx: &mut C, arg0: Type) -> ALUOp {
+    let v4 = C::gpr64_ty(ctx, arg0);
+    if let Some(v5) = v4 {
+        // Rule at src/isa/s390x/inst.isle line 4335.
+        return ALUOp::OrrNot64;
+    }
+    let v1 = C::gpr32_ty(ctx, arg0);
+    if let Some(v2) = v1 {
+        // Rule at src/isa/s390x/inst.isle line 4334.
+        return ALUOp::OrrNot32;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "aluop_or_not", "src/isa/s390x/inst.isle line 4333"
+    )
+}
+
+// Generated as internal constructor for term or_not_reg.
+pub fn constructor_or_not_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v3 = &constructor_aluop_or_not(ctx, arg0);
+    let v4 = constructor_alu_rrr(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4338.
+    return v4;
+}
+
+// Generated as internal constructor for term vec_or_not.
+pub fn constructor_vec_or_not<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v1 = C::vr128_ty(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v6 = constructor_vec_rrr(ctx, v2, &VecBinaryOp::OrrNot128, arg1, arg2);
+        // Rule at src/isa/s390x/inst.isle line 4341.
+        return v6;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_or_not", "src/isa/s390x/inst.isle line 4340"
+    )
+}
+
+// Generated as internal constructor for term vec_bitpermute.
+pub fn constructor_vec_bitpermute<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg) -> Reg {
+    let v4 = constructor_vec_rrr(ctx, I64X2, &VecBinaryOp::BitPermute128, arg0, arg1);
+    // Rule at src/isa/s390x/inst.isle line 4347.
+    return v4;
+}
+
+// Generated as internal constructor for term unaryop_abs.
+pub fn constructor_unaryop_abs<C: Context>(ctx: &mut C, arg0: Type) -> UnaryOp {
+    match arg0 {
+        I32 => {
+            // Rule at src/isa/s390x/inst.isle line 4353.
+            return UnaryOp::Abs32;
+        }
+        I64 => {
+            // Rule at src/isa/s390x/inst.isle line 4354.
+            return UnaryOp::Abs64;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "unaryop_abs", "src/isa/s390x/inst.isle line 4352"
+    )
+}
+
+// Generated as internal constructor for term unaryop_abs_sext32.
+pub fn constructor_unaryop_abs_sext32<C: Context>(ctx: &mut C, arg0: Type) -> UnaryOp {
+    if arg0 == I64 {
+        // Rule at src/isa/s390x/inst.isle line 4357.
+        return UnaryOp::Abs64Ext32;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "unaryop_abs_sext32", "src/isa/s390x/inst.isle line 4356"
+    )
+}
+
+// Generated as internal constructor for term abs_reg.
+pub fn constructor_abs_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
+    let v2 = &constructor_unaryop_abs(ctx, arg0);
+    let v3 = constructor_unary_rr(ctx, arg0, v2, arg1);
+    // Rule at src/isa/s390x/inst.isle line 4360.
+    return v3;
+}
+
+// Generated as internal constructor for term abs_reg_sext32.
+pub fn constructor_abs_reg_sext32<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
+    let v2 = &constructor_unaryop_abs_sext32(ctx, arg0);
+    let v3 = constructor_unary_rr(ctx, arg0, v2, arg1);
+    // Rule at src/isa/s390x/inst.isle line 4363.
+    return v3;
+}
+
+// Generated as internal constructor for term vecop_abs.
+pub fn constructor_vecop_abs<C: Context>(ctx: &mut C, arg0: Type) -> VecUnaryOp {
+    match arg0 {
+        I8X16 => {
+            // Rule at src/isa/s390x/inst.isle line 4366.
+            return VecUnaryOp::Abs8x16;
+        }
+        I16X8 => {
+            // Rule at src/isa/s390x/inst.isle line 4367.
+            return VecUnaryOp::Abs16x8;
+        }
+        I32X4 => {
+            // Rule at src/isa/s390x/inst.isle line 4368.
+            return VecUnaryOp::Abs32x4;
+        }
+        I64X2 => {
+            // Rule at src/isa/s390x/inst.isle line 4369.
+            return VecUnaryOp::Abs64x2;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vecop_abs", "src/isa/s390x/inst.isle line 4365"
+    )
+}
+
+// Generated as internal constructor for term vec_abs.
+pub fn constructor_vec_abs<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
+    let v2 = &constructor_vecop_abs(ctx, arg0);
+    let v3 = constructor_vec_rr(ctx, arg0, v2, arg1);
+    // Rule at src/isa/s390x/inst.isle line 4372.
+    return v3;
+}
+
+// Generated as internal constructor for term unaryop_neg.
+pub fn constructor_unaryop_neg<C: Context>(ctx: &mut C, arg0: Type) -> UnaryOp {
+    match arg0 {
+        I8 => {
+            // Rule at src/isa/s390x/inst.isle line 4378.
+            return UnaryOp::Neg32;
+        }
+        I16 => {
+            // Rule at src/isa/s390x/inst.isle line 4379.
+            return UnaryOp::Neg32;
+        }
+        I32 => {
+            // Rule at src/isa/s390x/inst.isle line 4380.
+            return UnaryOp::Neg32;
+        }
+        I64 => {
+            // Rule at src/isa/s390x/inst.isle line 4381.
+            return UnaryOp::Neg64;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "unaryop_neg", "src/isa/s390x/inst.isle line 4377"
+    )
+}
+
+// Generated as internal constructor for term unaryop_neg_sext32.
+pub fn constructor_unaryop_neg_sext32<C: Context>(ctx: &mut C, arg0: Type) -> UnaryOp {
+    if arg0 == I64 {
+        // Rule at src/isa/s390x/inst.isle line 4384.
+        return UnaryOp::Neg64Ext32;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "unaryop_neg_sext32", "src/isa/s390x/inst.isle line 4383"
+    )
+}
+
+// Generated as internal constructor for term neg_reg.
+pub fn constructor_neg_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
+    let v2 = &constructor_unaryop_neg(ctx, arg0);
+    let v3 = constructor_unary_rr(ctx, arg0, v2, arg1);
+    // Rule at src/isa/s390x/inst.isle line 4387.
+    return v3;
+}
+
+// Generated as internal constructor for term neg_reg_sext32.
+pub fn constructor_neg_reg_sext32<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
+    let v2 = &constructor_unaryop_neg_sext32(ctx, arg0);
+    let v3 = constructor_unary_rr(ctx, arg0, v2, arg1);
+    // Rule at src/isa/s390x/inst.isle line 4390.
+    return v3;
+}
+
+// Generated as internal constructor for term vecop_neg.
+pub fn constructor_vecop_neg<C: Context>(ctx: &mut C, arg0: Type) -> VecUnaryOp {
+    match arg0 {
+        I8X16 => {
+            // Rule at src/isa/s390x/inst.isle line 4393.
+            return VecUnaryOp::Neg8x16;
+        }
+        I16X8 => {
+            // Rule at src/isa/s390x/inst.isle line 4394.
+            return VecUnaryOp::Neg16x8;
+        }
+        I32X4 => {
+            // Rule at src/isa/s390x/inst.isle line 4395.
+            return VecUnaryOp::Neg32x4;
+        }
+        I64X2 => {
+            // Rule at src/isa/s390x/inst.isle line 4396.
+            return VecUnaryOp::Neg64x2;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vecop_neg", "src/isa/s390x/inst.isle line 4392"
+    )
+}
+
+// Generated as internal constructor for term vec_neg.
+pub fn constructor_vec_neg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
+    let v2 = &constructor_vecop_neg(ctx, arg0);
+    let v3 = constructor_vec_rr(ctx, arg0, v2, arg1);
+    // Rule at src/isa/s390x/inst.isle line 4399.
+    return v3;
+}
+
+// Generated as internal constructor for term unaryop_bswap.
+pub fn constructor_unaryop_bswap<C: Context>(ctx: &mut C, arg0: Type) -> UnaryOp {
+    match arg0 {
+        I32 => {
+            // Rule at src/isa/s390x/inst.isle line 4405.
+            return UnaryOp::BSwap32;
+        }
+        I64 => {
+            // Rule at src/isa/s390x/inst.isle line 4406.
+            return UnaryOp::BSwap64;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "unaryop_bswap", "src/isa/s390x/inst.isle line 4404"
+    )
+}
+
+// Generated as internal constructor for term bswap_reg.
+pub fn constructor_bswap_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
+    let v2 = &constructor_unaryop_bswap(ctx, arg0);
+    let v3 = constructor_unary_rr(ctx, arg0, v2, arg1);
+    // Rule at src/isa/s390x/inst.isle line 4409.
+    return v3;
+}
+
+// Generated as internal constructor for term push_bswap_reg.
+pub fn constructor_push_bswap_reg<C: Context>(
+    ctx: &mut C,
+    arg0: &VecMInstBuilder,
+    arg1: Type,
+    arg2: WritableReg,
+    arg3: Reg,
+) -> Reg {
+    let v4 = &constructor_unaryop_bswap(ctx, arg1);
+    let v5 = constructor_push_unary(ctx, arg0, v4, arg2, arg3);
+    // Rule at src/isa/s390x/inst.isle line 4412.
+    return v5;
+}
+
+// Generated as internal constructor for term shiftop_rot.
+pub fn constructor_shiftop_rot<C: Context>(ctx: &mut C, arg0: Type) -> ShiftOp {
+    match arg0 {
+        I32 => {
+            // Rule at src/isa/s390x/inst.isle line 4418.
+            return ShiftOp::RotL32;
+        }
+        I64 => {
+            // Rule at src/isa/s390x/inst.isle line 4419.
+            return ShiftOp::RotL64;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "shiftop_rot", "src/isa/s390x/inst.isle line 4417"
+    )
+}
+
+// Generated as internal constructor for term rot_reg.
+pub fn constructor_rot_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v3 = &constructor_shiftop_rot(ctx, arg0);
+    let v5 = constructor_shift_rr(ctx, arg0, v3, arg1, 0x0, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4422.
+    return v5;
+}
+
+// Generated as internal constructor for term rot_imm.
+pub fn constructor_rot_imm<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: u8) -> Reg {
+    let v3 = &constructor_shiftop_rot(ctx, arg0);
+    let v4 = C::zero_reg(ctx);
+    let v5 = constructor_shift_rr(ctx, arg0, v3, arg1, arg2, v4);
+    // Rule at src/isa/s390x/inst.isle line 4426.
+    return v5;
+}
+
+// Generated as internal constructor for term rot_imm_reg.
+pub fn constructor_rot_imm_reg<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: u8,
+    arg3: Reg,
+) -> Reg {
+    let v4 = &constructor_shiftop_rot(ctx, arg0);
+    let v5 = constructor_shift_rr(ctx, arg0, v4, arg1, arg2, arg3);
+    // Rule at src/isa/s390x/inst.isle line 4430.
+    return v5;
+}
+
+// Generated as internal constructor for term push_rot_imm_reg.
+pub fn constructor_push_rot_imm_reg<C: Context>(
+    ctx: &mut C,
+    arg0: &VecMInstBuilder,
+    arg1: Type,
+    arg2: WritableReg,
+    arg3: Reg,
+    arg4: u8,
+    arg5: Reg,
+) -> Reg {
+    let v6 = &constructor_shiftop_rot(ctx, arg1);
+    let v7 = constructor_push_shift(ctx, arg0, v6, arg2, arg3, arg4, arg5);
+    // Rule at src/isa/s390x/inst.isle line 4434.
+    return v7;
+}
+
+// Generated as internal constructor for term vec_shiftop_rot.
+pub fn constructor_vec_shiftop_rot<C: Context>(ctx: &mut C, arg0: Type) -> VecShiftOp {
+    match arg0 {
+        I8X16 => {
+            // Rule at src/isa/s390x/inst.isle line 4438.
+            return VecShiftOp::RotL8x16;
+        }
+        I16X8 => {
+            // Rule at src/isa/s390x/inst.isle line 4439.
+            return VecShiftOp::RotL16x8;
+        }
+        I32X4 => {
+            // Rule at src/isa/s390x/inst.isle line 4440.
+            return VecShiftOp::RotL32x4;
+        }
+        I64X2 => {
+            // Rule at src/isa/s390x/inst.isle line 4441.
+            return VecShiftOp::RotL64x2;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_shiftop_rot", "src/isa/s390x/inst.isle line 4437"
+    )
+}
+
+// Generated as internal constructor for term vec_rot_reg.
+pub fn constructor_vec_rot_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v3 = &constructor_vec_shiftop_rot(ctx, arg0);
+    let v5 = constructor_vec_shift_rr(ctx, arg0, v3, arg1, 0x0, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4444.
+    return v5;
+}
+
+// Generated as internal constructor for term vec_rot_imm.
+pub fn constructor_vec_rot_imm<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: u8) -> Reg {
+    let v3 = &constructor_vec_shiftop_rot(ctx, arg0);
+    let v4 = C::zero_reg(ctx);
+    let v5 = constructor_vec_shift_rr(ctx, arg0, v3, arg1, arg2, v4);
+    // Rule at src/isa/s390x/inst.isle line 4448.
+    return v5;
+}
+
+// Generated as internal constructor for term shiftop_lshl.
+pub fn constructor_shiftop_lshl<C: Context>(ctx: &mut C, arg0: Type) -> ShiftOp {
+    match arg0 {
+        I8 => {
+            // Rule at src/isa/s390x/inst.isle line 4455.
+            return ShiftOp::LShL32;
+        }
+        I16 => {
+            // Rule at src/isa/s390x/inst.isle line 4456.
+            return ShiftOp::LShL32;
+        }
+        I32 => {
+            // Rule at src/isa/s390x/inst.isle line 4457.
+            return ShiftOp::LShL32;
+        }
+        I64 => {
+            // Rule at src/isa/s390x/inst.isle line 4458.
+            return ShiftOp::LShL64;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "shiftop_lshl", "src/isa/s390x/inst.isle line 4454"
+    )
+}
+
+// Generated as internal constructor for term lshl_reg.
+pub fn constructor_lshl_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v3 = &constructor_shiftop_lshl(ctx, arg0);
+    let v5 = constructor_shift_rr(ctx, arg0, v3, arg1, 0x0, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4461.
+    return v5;
+}
+
+// Generated as internal constructor for term lshl_imm.
+pub fn constructor_lshl_imm<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: u8) -> Reg {
+    let v3 = &constructor_shiftop_lshl(ctx, arg0);
+    let v4 = C::zero_reg(ctx);
+    let v5 = constructor_shift_rr(ctx, arg0, v3, arg1, arg2, v4);
+    // Rule at src/isa/s390x/inst.isle line 4465.
+    return v5;
+}
+
+// Generated as internal constructor for term vec_shiftop_lshl.
+pub fn constructor_vec_shiftop_lshl<C: Context>(ctx: &mut C, arg0: Type) -> VecShiftOp {
+    match arg0 {
+        I8X16 => {
+            // Rule at src/isa/s390x/inst.isle line 4469.
+            return VecShiftOp::LShL8x16;
+        }
+        I16X8 => {
+            // Rule at src/isa/s390x/inst.isle line 4470.
+            return VecShiftOp::LShL16x8;
+        }
+        I32X4 => {
+            // Rule at src/isa/s390x/inst.isle line 4471.
+            return VecShiftOp::LShL32x4;
+        }
+        I64X2 => {
+            // Rule at src/isa/s390x/inst.isle line 4472.
+            return VecShiftOp::LShL64x2;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_shiftop_lshl", "src/isa/s390x/inst.isle line 4468"
+    )
+}
+
+// Generated as internal constructor for term vec_lshl_reg.
+pub fn constructor_vec_lshl_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v3 = &constructor_vec_shiftop_lshl(ctx, arg0);
+    let v5 = constructor_vec_shift_rr(ctx, arg0, v3, arg1, 0x0, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4475.
+    return v5;
+}
+
+// Generated as internal constructor for term vec_lshl_imm.
+pub fn constructor_vec_lshl_imm<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: u8) -> Reg {
+    let v3 = &constructor_vec_shiftop_lshl(ctx, arg0);
+    let v4 = C::zero_reg(ctx);
+    let v5 = constructor_vec_shift_rr(ctx, arg0, v3, arg1, arg2, v4);
+    // Rule at src/isa/s390x/inst.isle line 4479.
+    return v5;
+}
+
+// Generated as internal constructor for term vec_lshl_by_byte.
+pub fn constructor_vec_lshl_by_byte<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg) -> Reg {
+    let v4 = constructor_vec_rrr(ctx, I8X16, &VecBinaryOp::LShLByByte128, arg0, arg1);
+    // Rule at src/isa/s390x/inst.isle line 4483.
+    return v4;
+}
+
+// Generated as internal constructor for term vec_lshl_by_bit.
+pub fn constructor_vec_lshl_by_bit<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg) -> Reg {
+    let v4 = constructor_vec_rrr(ctx, I8X16, &VecBinaryOp::LShLByBit128, arg0, arg1);
+    // Rule at src/isa/s390x/inst.isle line 4486.
+    return v4;
+}
+
+// Generated as internal constructor for term shiftop_lshr.
+pub fn constructor_shiftop_lshr<C: Context>(ctx: &mut C, arg0: Type) -> ShiftOp {
+    match arg0 {
+        I32 => {
+            // Rule at src/isa/s390x/inst.isle line 4492.
+            return ShiftOp::LShR32;
+        }
+        I64 => {
+            // Rule at src/isa/s390x/inst.isle line 4493.
+            return ShiftOp::LShR64;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "shiftop_lshr", "src/isa/s390x/inst.isle line 4491"
+    )
+}
+
+// Generated as internal constructor for term lshr_reg.
+pub fn constructor_lshr_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v3 = &constructor_shiftop_lshr(ctx, arg0);
+    let v5 = constructor_shift_rr(ctx, arg0, v3, arg1, 0x0, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4496.
+    return v5;
+}
+
+// Generated as internal constructor for term lshr_imm.
+pub fn constructor_lshr_imm<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: u8) -> Reg {
+    let v3 = &constructor_shiftop_lshr(ctx, arg0);
+    let v4 = C::zero_reg(ctx);
+    let v5 = constructor_shift_rr(ctx, arg0, v3, arg1, arg2, v4);
+    // Rule at src/isa/s390x/inst.isle line 4500.
+    return v5;
+}
+
+// Generated as internal constructor for term vec_shiftop_lshr.
+pub fn constructor_vec_shiftop_lshr<C: Context>(ctx: &mut C, arg0: Type) -> VecShiftOp {
+    match arg0 {
+        I8X16 => {
+            // Rule at src/isa/s390x/inst.isle line 4504.
+            return VecShiftOp::LShR8x16;
+        }
+        I16X8 => {
+            // Rule at src/isa/s390x/inst.isle line 4505.
+            return VecShiftOp::LShR16x8;
+        }
+        I32X4 => {
+            // Rule at src/isa/s390x/inst.isle line 4506.
+            return VecShiftOp::LShR32x4;
+        }
+        I64X2 => {
+            // Rule at src/isa/s390x/inst.isle line 4507.
+            return VecShiftOp::LShR64x2;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_shiftop_lshr", "src/isa/s390x/inst.isle line 4503"
+    )
+}
+
+// Generated as internal constructor for term vec_lshr_reg.
+pub fn constructor_vec_lshr_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v3 = &constructor_vec_shiftop_lshr(ctx, arg0);
+    let v5 = constructor_vec_shift_rr(ctx, arg0, v3, arg1, 0x0, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4510.
+    return v5;
+}
+
+// Generated as internal constructor for term vec_lshr_imm.
+pub fn constructor_vec_lshr_imm<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: u8) -> Reg {
+    let v3 = &constructor_vec_shiftop_lshr(ctx, arg0);
+    let v4 = C::zero_reg(ctx);
+    let v5 = constructor_vec_shift_rr(ctx, arg0, v3, arg1, arg2, v4);
+    // Rule at src/isa/s390x/inst.isle line 4514.
+    return v5;
+}
+
+// Generated as internal constructor for term vec_lshr_by_byte.
+pub fn constructor_vec_lshr_by_byte<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg) -> Reg {
+    let v4 = constructor_vec_rrr(ctx, I8X16, &VecBinaryOp::LShRByByte128, arg0, arg1);
+    // Rule at src/isa/s390x/inst.isle line 4518.
+    return v4;
+}
+
+// Generated as internal constructor for term vec_lshr_by_bit.
+pub fn constructor_vec_lshr_by_bit<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg) -> Reg {
+    let v4 = constructor_vec_rrr(ctx, I8X16, &VecBinaryOp::LShRByBit128, arg0, arg1);
+    // Rule at src/isa/s390x/inst.isle line 4521.
+    return v4;
+}
+
+// Generated as internal constructor for term shiftop_ashr.
+pub fn constructor_shiftop_ashr<C: Context>(ctx: &mut C, arg0: Type) -> ShiftOp {
+    match arg0 {
+        I32 => {
+            // Rule at src/isa/s390x/inst.isle line 4527.
+            return ShiftOp::AShR32;
+        }
+        I64 => {
+            // Rule at src/isa/s390x/inst.isle line 4528.
+            return ShiftOp::AShR64;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "shiftop_ashr", "src/isa/s390x/inst.isle line 4526"
+    )
+}
+
+// Generated as internal constructor for term ashr_reg.
+pub fn constructor_ashr_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v3 = &constructor_shiftop_ashr(ctx, arg0);
+    let v5 = constructor_shift_rr(ctx, arg0, v3, arg1, 0x0, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4531.
+    return v5;
+}
+
+// Generated as internal constructor for term ashr_imm.
+pub fn constructor_ashr_imm<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: u8) -> Reg {
+    let v3 = &constructor_shiftop_ashr(ctx, arg0);
+    let v4 = C::zero_reg(ctx);
+    let v5 = constructor_shift_rr(ctx, arg0, v3, arg1, arg2, v4);
+    // Rule at src/isa/s390x/inst.isle line 4535.
+    return v5;
+}
+
+// Generated as internal constructor for term vec_shiftop_ashr.
+pub fn constructor_vec_shiftop_ashr<C: Context>(ctx: &mut C, arg0: Type) -> VecShiftOp {
+    match arg0 {
+        I8X16 => {
+            // Rule at src/isa/s390x/inst.isle line 4539.
+            return VecShiftOp::AShR8x16;
+        }
+        I16X8 => {
+            // Rule at src/isa/s390x/inst.isle line 4540.
+            return VecShiftOp::AShR16x8;
+        }
+        I32X4 => {
+            // Rule at src/isa/s390x/inst.isle line 4541.
+            return VecShiftOp::AShR32x4;
+        }
+        I64X2 => {
+            // Rule at src/isa/s390x/inst.isle line 4542.
+            return VecShiftOp::AShR64x2;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_shiftop_ashr", "src/isa/s390x/inst.isle line 4538"
+    )
+}
+
+// Generated as internal constructor for term vec_ashr_reg.
+pub fn constructor_vec_ashr_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v3 = &constructor_vec_shiftop_ashr(ctx, arg0);
+    let v5 = constructor_vec_shift_rr(ctx, arg0, v3, arg1, 0x0, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4545.
+    return v5;
+}
+
+// Generated as internal constructor for term vec_ashr_imm.
+pub fn constructor_vec_ashr_imm<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: u8) -> Reg {
+    let v3 = &constructor_vec_shiftop_ashr(ctx, arg0);
+    let v4 = C::zero_reg(ctx);
+    let v5 = constructor_vec_shift_rr(ctx, arg0, v3, arg1, arg2, v4);
+    // Rule at src/isa/s390x/inst.isle line 4549.
+    return v5;
+}
+
+// Generated as internal constructor for term vec_ashr_by_byte.
+pub fn constructor_vec_ashr_by_byte<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg) -> Reg {
+    let v4 = constructor_vec_rrr(ctx, I8X16, &VecBinaryOp::AShRByByte128, arg0, arg1);
+    // Rule at src/isa/s390x/inst.isle line 4553.
+    return v4;
+}
+
+// Generated as internal constructor for term vec_ashr_by_bit.
+pub fn constructor_vec_ashr_by_bit<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg) -> Reg {
+    let v4 = constructor_vec_rrr(ctx, I8X16, &VecBinaryOp::AShRByBit128, arg0, arg1);
+    // Rule at src/isa/s390x/inst.isle line 4556.
+    return v4;
+}
+
+// Generated as internal constructor for term popcnt_byte.
+pub fn constructor_popcnt_byte<C: Context>(ctx: &mut C, arg0: Reg) -> Reg {
+    let v3 = constructor_unary_rr(ctx, I64, &UnaryOp::PopcntByte, arg0);
+    // Rule at src/isa/s390x/inst.isle line 4562.
+    return v3;
+}
+
+// Generated as internal constructor for term popcnt_reg.
+pub fn constructor_popcnt_reg<C: Context>(ctx: &mut C, arg0: Reg) -> Reg {
+    let v3 = constructor_unary_rr(ctx, I64, &UnaryOp::PopcntReg, arg0);
+    // Rule at src/isa/s390x/inst.isle line 4565.
+    return v3;
+}
+
+// Generated as internal constructor for term vecop_popcnt.
+pub fn constructor_vecop_popcnt<C: Context>(ctx: &mut C, arg0: Type) -> VecUnaryOp {
+    match arg0 {
+        I8X16 => {
+            // Rule at src/isa/s390x/inst.isle line 4568.
+            return VecUnaryOp::Popcnt8x16;
+        }
+        I16X8 => {
+            // Rule at src/isa/s390x/inst.isle line 4569.
+            return VecUnaryOp::Popcnt16x8;
+        }
+        I32X4 => {
+            // Rule at src/isa/s390x/inst.isle line 4570.
+            return VecUnaryOp::Popcnt32x4;
+        }
+        I64X2 => {
+            // Rule at src/isa/s390x/inst.isle line 4571.
+            return VecUnaryOp::Popcnt64x2;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vecop_popcnt", "src/isa/s390x/inst.isle line 4567"
+    )
+}
+
+// Generated as internal constructor for term vec_popcnt.
+pub fn constructor_vec_popcnt<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
+    let v2 = &constructor_vecop_popcnt(ctx, arg0);
+    let v3 = constructor_vec_rr(ctx, arg0, v2, arg1);
+    // Rule at src/isa/s390x/inst.isle line 4574.
+    return v3;
+}
+
+// Generated as internal constructor for term atomic_rmw_and.
+pub fn constructor_atomic_rmw_and<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: &MemArg,
+) -> Reg {
+    match arg0 {
+        I32 => {
+            let v5 = constructor_atomic_rmw_impl(ctx, I32, &ALUOp::And32, arg1, arg2);
+            // Rule at src/isa/s390x/inst.isle line 4580.
+            return v5;
+        }
+        I64 => {
+            let v8 = constructor_atomic_rmw_impl(ctx, I64, &ALUOp::And64, arg1, arg2);
+            // Rule at src/isa/s390x/inst.isle line 4581.
+            return v8;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "atomic_rmw_and", "src/isa/s390x/inst.isle line 4579"
+    )
+}
+
+// Generated as internal constructor for term atomic_rmw_or.
+pub fn constructor_atomic_rmw_or<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: &MemArg,
+) -> Reg {
+    match arg0 {
+        I32 => {
+            let v5 = constructor_atomic_rmw_impl(ctx, I32, &ALUOp::Orr32, arg1, arg2);
+            // Rule at src/isa/s390x/inst.isle line 4584.
+            return v5;
+        }
+        I64 => {
+            let v8 = constructor_atomic_rmw_impl(ctx, I64, &ALUOp::Orr64, arg1, arg2);
+            // Rule at src/isa/s390x/inst.isle line 4585.
+            return v8;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "atomic_rmw_or", "src/isa/s390x/inst.isle line 4583"
+    )
+}
+
+// Generated as internal constructor for term atomic_rmw_xor.
+pub fn constructor_atomic_rmw_xor<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: &MemArg,
+) -> Reg {
+    match arg0 {
+        I32 => {
+            let v5 = constructor_atomic_rmw_impl(ctx, I32, &ALUOp::Xor32, arg1, arg2);
+            // Rule at src/isa/s390x/inst.isle line 4588.
+            return v5;
+        }
+        I64 => {
+            let v8 = constructor_atomic_rmw_impl(ctx, I64, &ALUOp::Xor64, arg1, arg2);
+            // Rule at src/isa/s390x/inst.isle line 4589.
+            return v8;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "atomic_rmw_xor", "src/isa/s390x/inst.isle line 4587"
+    )
+}
+
+// Generated as internal constructor for term atomic_rmw_add.
+pub fn constructor_atomic_rmw_add<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: &MemArg,
+) -> Reg {
+    match arg0 {
+        I32 => {
+            let v5 = constructor_atomic_rmw_impl(ctx, I32, &ALUOp::Add32, arg1, arg2);
+            // Rule at src/isa/s390x/inst.isle line 4592.
+            return v5;
+        }
+        I64 => {
+            let v8 = constructor_atomic_rmw_impl(ctx, I64, &ALUOp::Add64, arg1, arg2);
+            // Rule at src/isa/s390x/inst.isle line 4593.
+            return v8;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "atomic_rmw_add", "src/isa/s390x/inst.isle line 4591"
+    )
+}
+
+// Generated as internal constructor for term atomic_cas_impl.
+pub fn constructor_atomic_cas_impl<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: Reg,
+    arg3: &MemArg,
+) -> Reg {
+    match arg0 {
+        I32 => {
+            let v4 = constructor_atomic_cas32(ctx, arg1, arg2, arg3);
+            // Rule at src/isa/s390x/inst.isle line 4599.
+            return v4;
+        }
+        I64 => {
+            let v5 = constructor_atomic_cas64(ctx, arg1, arg2, arg3);
+            // Rule at src/isa/s390x/inst.isle line 4600.
+            return v5;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "atomic_cas_impl", "src/isa/s390x/inst.isle line 4598"
+    )
+}
+
+// Generated as internal constructor for term push_atomic_cas.
+pub fn constructor_push_atomic_cas<C: Context>(
+    ctx: &mut C,
+    arg0: &VecMInstBuilder,
+    arg1: Type,
+    arg2: WritableReg,
+    arg3: Reg,
+    arg4: &MemArg,
+) -> Reg {
+    match arg1 {
+        I32 => {
+            let v5 = constructor_push_atomic_cas32(ctx, arg0, arg2, arg3, arg4);
+            // Rule at src/isa/s390x/inst.isle line 4603.
+            return v5;
+        }
+        I64 => {
+            let v6 = constructor_push_atomic_cas64(ctx, arg0, arg2, arg3, arg4);
+            // Rule at src/isa/s390x/inst.isle line 4604.
+            return v6;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "push_atomic_cas", "src/isa/s390x/inst.isle line 4602"
+    )
+}
+
+// Generated as internal constructor for term fpuop2_add.
+pub fn constructor_fpuop2_add<C: Context>(ctx: &mut C, arg0: Type) -> FPUOp2 {
+    match arg0 {
+        F32 => {
+            // Rule at src/isa/s390x/inst.isle line 4610.
+            return FPUOp2::Add32;
+        }
+        F64 => {
+            // Rule at src/isa/s390x/inst.isle line 4611.
+            return FPUOp2::Add64;
+        }
+        F32X4 => {
+            // Rule at src/isa/s390x/inst.isle line 4612.
+            return FPUOp2::Add32x4;
+        }
+        F64X2 => {
+            // Rule at src/isa/s390x/inst.isle line 4613.
+            return FPUOp2::Add64x2;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "fpuop2_add", "src/isa/s390x/inst.isle line 4609"
+    )
+}
+
+// Generated as internal constructor for term fadd_reg.
+pub fn constructor_fadd_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v3 = &constructor_fpuop2_add(ctx, arg0);
+    let v4 = constructor_fpu_rrr(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4616.
+    return v4;
+}
+
+// Generated as internal constructor for term fpuop2_sub.
+pub fn constructor_fpuop2_sub<C: Context>(ctx: &mut C, arg0: Type) -> FPUOp2 {
+    match arg0 {
+        F32 => {
+            // Rule at src/isa/s390x/inst.isle line 4622.
+            return FPUOp2::Sub32;
+        }
+        F64 => {
+            // Rule at src/isa/s390x/inst.isle line 4623.
+            return FPUOp2::Sub64;
+        }
+        F32X4 => {
+            // Rule at src/isa/s390x/inst.isle line 4624.
+            return FPUOp2::Sub32x4;
+        }
+        F64X2 => {
+            // Rule at src/isa/s390x/inst.isle line 4625.
+            return FPUOp2::Sub64x2;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "fpuop2_sub", "src/isa/s390x/inst.isle line 4621"
+    )
+}
+
+// Generated as internal constructor for term fsub_reg.
+pub fn constructor_fsub_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v3 = &constructor_fpuop2_sub(ctx, arg0);
+    let v4 = constructor_fpu_rrr(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4628.
+    return v4;
+}
+
+// Generated as internal constructor for term fpuop2_mul.
+pub fn constructor_fpuop2_mul<C: Context>(ctx: &mut C, arg0: Type) -> FPUOp2 {
+    match arg0 {
+        F32 => {
+            // Rule at src/isa/s390x/inst.isle line 4634.
+            return FPUOp2::Mul32;
+        }
+        F64 => {
+            // Rule at src/isa/s390x/inst.isle line 4635.
+            return FPUOp2::Mul64;
+        }
+        F32X4 => {
+            // Rule at src/isa/s390x/inst.isle line 4636.
+            return FPUOp2::Mul32x4;
+        }
+        F64X2 => {
+            // Rule at src/isa/s390x/inst.isle line 4637.
+            return FPUOp2::Mul64x2;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "fpuop2_mul", "src/isa/s390x/inst.isle line 4633"
+    )
+}
+
+// Generated as internal constructor for term fmul_reg.
+pub fn constructor_fmul_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v3 = &constructor_fpuop2_mul(ctx, arg0);
+    let v4 = constructor_fpu_rrr(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4640.
+    return v4;
+}
+
+// Generated as internal constructor for term fpuop2_div.
+pub fn constructor_fpuop2_div<C: Context>(ctx: &mut C, arg0: Type) -> FPUOp2 {
+    match arg0 {
+        F32 => {
+            // Rule at src/isa/s390x/inst.isle line 4646.
+            return FPUOp2::Div32;
+        }
+        F64 => {
+            // Rule at src/isa/s390x/inst.isle line 4647.
+            return FPUOp2::Div64;
+        }
+        F32X4 => {
+            // Rule at src/isa/s390x/inst.isle line 4648.
+            return FPUOp2::Div32x4;
+        }
+        F64X2 => {
+            // Rule at src/isa/s390x/inst.isle line 4649.
+            return FPUOp2::Div64x2;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "fpuop2_div", "src/isa/s390x/inst.isle line 4645"
+    )
+}
+
+// Generated as internal constructor for term fdiv_reg.
+pub fn constructor_fdiv_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v3 = &constructor_fpuop2_div(ctx, arg0);
+    let v4 = constructor_fpu_rrr(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4652.
+    return v4;
+}
+
+// Generated as internal constructor for term fpuop2_min.
+pub fn constructor_fpuop2_min<C: Context>(ctx: &mut C, arg0: Type) -> FPUOp2 {
+    match arg0 {
+        F32 => {
+            // Rule at src/isa/s390x/inst.isle line 4658.
+            return FPUOp2::Min32;
+        }
+        F64 => {
+            // Rule at src/isa/s390x/inst.isle line 4659.
+            return FPUOp2::Min64;
+        }
+        F32X4 => {
+            // Rule at src/isa/s390x/inst.isle line 4660.
+            return FPUOp2::Min32x4;
+        }
+        F64X2 => {
+            // Rule at src/isa/s390x/inst.isle line 4661.
+            return FPUOp2::Min64x2;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "fpuop2_min", "src/isa/s390x/inst.isle line 4657"
+    )
+}
+
+// Generated as internal constructor for term fmin_reg.
+pub fn constructor_fmin_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v3 = &constructor_fpuop2_min(ctx, arg0);
+    let v4 = constructor_fpu_rrr(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4664.
+    return v4;
+}
+
+// Generated as internal constructor for term fpuop2_max.
+pub fn constructor_fpuop2_max<C: Context>(ctx: &mut C, arg0: Type) -> FPUOp2 {
+    match arg0 {
+        F32 => {
+            // Rule at src/isa/s390x/inst.isle line 4670.
+            return FPUOp2::Max32;
+        }
+        F64 => {
+            // Rule at src/isa/s390x/inst.isle line 4671.
+            return FPUOp2::Max64;
+        }
+        F32X4 => {
+            // Rule at src/isa/s390x/inst.isle line 4672.
+            return FPUOp2::Max32x4;
+        }
+        F64X2 => {
+            // Rule at src/isa/s390x/inst.isle line 4673.
+            return FPUOp2::Max64x2;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "fpuop2_max", "src/isa/s390x/inst.isle line 4669"
+    )
+}
+
+// Generated as internal constructor for term fmax_reg.
+pub fn constructor_fmax_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v3 = &constructor_fpuop2_max(ctx, arg0);
+    let v4 = constructor_fpu_rrr(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4676.
+    return v4;
+}
+
+// Generated as internal constructor for term fpuop2_min_pseudo.
+pub fn constructor_fpuop2_min_pseudo<C: Context>(ctx: &mut C, arg0: Type) -> FPUOp2 {
+    match arg0 {
+        F32 => {
+            // Rule at src/isa/s390x/inst.isle line 4682.
+            return FPUOp2::MinPseudo32;
+        }
+        F64 => {
+            // Rule at src/isa/s390x/inst.isle line 4683.
+            return FPUOp2::MinPseudo64;
+        }
+        F32X4 => {
+            // Rule at src/isa/s390x/inst.isle line 4684.
+            return FPUOp2::MinPseudo32x4;
+        }
+        F64X2 => {
+            // Rule at src/isa/s390x/inst.isle line 4685.
+            return FPUOp2::MinPseudo64x2;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "fpuop2_min_pseudo", "src/isa/s390x/inst.isle line 4681"
+    )
+}
+
+// Generated as internal constructor for term fmin_pseudo_reg.
+pub fn constructor_fmin_pseudo_reg<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: Reg,
+) -> Reg {
+    let v3 = &constructor_fpuop2_min_pseudo(ctx, arg0);
+    let v4 = constructor_fpu_rrr(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4688.
+    return v4;
+}
+
+// Generated as internal constructor for term fpuop2_max_pseudo.
+pub fn constructor_fpuop2_max_pseudo<C: Context>(ctx: &mut C, arg0: Type) -> FPUOp2 {
+    match arg0 {
+        F32 => {
+            // Rule at src/isa/s390x/inst.isle line 4694.
+            return FPUOp2::MaxPseudo32;
+        }
+        F64 => {
+            // Rule at src/isa/s390x/inst.isle line 4695.
+            return FPUOp2::MaxPseudo64;
+        }
+        F32X4 => {
+            // Rule at src/isa/s390x/inst.isle line 4696.
+            return FPUOp2::MaxPseudo32x4;
+        }
+        F64X2 => {
+            // Rule at src/isa/s390x/inst.isle line 4697.
+            return FPUOp2::MaxPseudo64x2;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "fpuop2_max_pseudo", "src/isa/s390x/inst.isle line 4693"
+    )
+}
+
+// Generated as internal constructor for term fmax_pseudo_reg.
+pub fn constructor_fmax_pseudo_reg<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: Reg,
+) -> Reg {
+    let v3 = &constructor_fpuop2_max_pseudo(ctx, arg0);
+    let v4 = constructor_fpu_rrr(ctx, arg0, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4700.
+    return v4;
+}
+
+// Generated as internal constructor for term fpuop3_fma.
+pub fn constructor_fpuop3_fma<C: Context>(ctx: &mut C, arg0: Type) -> FPUOp3 {
+    match arg0 {
+        F32 => {
+            // Rule at src/isa/s390x/inst.isle line 4706.
+            return FPUOp3::MAdd32;
+        }
+        F64 => {
+            // Rule at src/isa/s390x/inst.isle line 4707.
+            return FPUOp3::MAdd64;
+        }
+        F32X4 => {
+            // Rule at src/isa/s390x/inst.isle line 4708.
+            return FPUOp3::MAdd32x4;
+        }
+        F64X2 => {
+            // Rule at src/isa/s390x/inst.isle line 4709.
+            return FPUOp3::MAdd64x2;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "fpuop3_fma", "src/isa/s390x/inst.isle line 4705"
+    )
+}
+
+// Generated as internal constructor for term fma_reg.
+pub fn constructor_fma_reg<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: Reg,
+    arg3: Reg,
+) -> Reg {
+    let v4 = &constructor_fpuop3_fma(ctx, arg0);
+    let v5 = constructor_fpu_rrrr(ctx, arg0, v4, arg1, arg2, arg3);
+    // Rule at src/isa/s390x/inst.isle line 4712.
+    return v5;
+}
+
+// Generated as internal constructor for term fpuop1_sqrt.
+pub fn constructor_fpuop1_sqrt<C: Context>(ctx: &mut C, arg0: Type) -> FPUOp1 {
+    match arg0 {
+        F32 => {
+            // Rule at src/isa/s390x/inst.isle line 4718.
+            return FPUOp1::Sqrt32;
+        }
+        F64 => {
+            // Rule at src/isa/s390x/inst.isle line 4719.
+            return FPUOp1::Sqrt64;
+        }
+        F32X4 => {
+            // Rule at src/isa/s390x/inst.isle line 4720.
+            return FPUOp1::Sqrt32x4;
+        }
+        F64X2 => {
+            // Rule at src/isa/s390x/inst.isle line 4721.
+            return FPUOp1::Sqrt64x2;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "fpuop1_sqrt", "src/isa/s390x/inst.isle line 4717"
+    )
+}
+
+// Generated as internal constructor for term sqrt_reg.
+pub fn constructor_sqrt_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
+    let v2 = &constructor_fpuop1_sqrt(ctx, arg0);
+    let v3 = constructor_fpu_rr(ctx, arg0, v2, arg1);
+    // Rule at src/isa/s390x/inst.isle line 4724.
+    return v3;
+}
+
+// Generated as internal constructor for term fpuop1_neg.
+pub fn constructor_fpuop1_neg<C: Context>(ctx: &mut C, arg0: Type) -> FPUOp1 {
+    match arg0 {
+        F32 => {
+            // Rule at src/isa/s390x/inst.isle line 4730.
+            return FPUOp1::Neg32;
+        }
+        F64 => {
+            // Rule at src/isa/s390x/inst.isle line 4731.
+            return FPUOp1::Neg64;
+        }
+        F32X4 => {
+            // Rule at src/isa/s390x/inst.isle line 4732.
+            return FPUOp1::Neg32x4;
+        }
+        F64X2 => {
+            // Rule at src/isa/s390x/inst.isle line 4733.
+            return FPUOp1::Neg64x2;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "fpuop1_neg", "src/isa/s390x/inst.isle line 4729"
+    )
+}
+
+// Generated as internal constructor for term fneg_reg.
+pub fn constructor_fneg_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
+    let v2 = &constructor_fpuop1_neg(ctx, arg0);
+    let v3 = constructor_fpu_rr(ctx, arg0, v2, arg1);
+    // Rule at src/isa/s390x/inst.isle line 4736.
+    return v3;
+}
+
+// Generated as internal constructor for term fpuop1_abs.
+pub fn constructor_fpuop1_abs<C: Context>(ctx: &mut C, arg0: Type) -> FPUOp1 {
+    match arg0 {
+        F32 => {
+            // Rule at src/isa/s390x/inst.isle line 4742.
+            return FPUOp1::Abs32;
+        }
+        F64 => {
+            // Rule at src/isa/s390x/inst.isle line 4743.
+            return FPUOp1::Abs64;
+        }
+        F32X4 => {
+            // Rule at src/isa/s390x/inst.isle line 4744.
+            return FPUOp1::Abs32x4;
+        }
+        F64X2 => {
+            // Rule at src/isa/s390x/inst.isle line 4745.
+            return FPUOp1::Abs64x2;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "fpuop1_abs", "src/isa/s390x/inst.isle line 4741"
+    )
+}
+
+// Generated as internal constructor for term fabs_reg.
+pub fn constructor_fabs_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
+    let v2 = &constructor_fpuop1_abs(ctx, arg0);
+    let v3 = constructor_fpu_rr(ctx, arg0, v2, arg1);
+    // Rule at src/isa/s390x/inst.isle line 4748.
+    return v3;
+}
+
+// Generated as internal constructor for term fpuroundop_round.
+pub fn constructor_fpuroundop_round<C: Context>(ctx: &mut C, arg0: Type) -> FpuRoundOp {
+    match arg0 {
+        F32 => {
+            // Rule at src/isa/s390x/inst.isle line 4754.
+            return FpuRoundOp::Round32;
+        }
+        F64 => {
+            // Rule at src/isa/s390x/inst.isle line 4755.
+            return FpuRoundOp::Round64;
+        }
+        F32X4 => {
+            // Rule at src/isa/s390x/inst.isle line 4756.
+            return FpuRoundOp::Round32x4;
+        }
+        F64X2 => {
+            // Rule at src/isa/s390x/inst.isle line 4757.
+            return FpuRoundOp::Round64x2;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "fpuroundop_round", "src/isa/s390x/inst.isle line 4753"
+    )
+}
+
+// Generated as internal constructor for term ceil_reg.
+pub fn constructor_ceil_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
+    let v2 = &constructor_fpuroundop_round(ctx, arg0);
+    let v4 = constructor_fpu_round(ctx, arg0, v2, &FpuRoundMode::ToPosInfinity, arg1);
+    // Rule at src/isa/s390x/inst.isle line 4760.
+    return v4;
+}
+
+// Generated as internal constructor for term floor_reg.
+pub fn constructor_floor_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
+    let v2 = &constructor_fpuroundop_round(ctx, arg0);
+    let v4 = constructor_fpu_round(ctx, arg0, v2, &FpuRoundMode::ToNegInfinity, arg1);
+    // Rule at src/isa/s390x/inst.isle line 4764.
+    return v4;
+}
+
+// Generated as internal constructor for term trunc_reg.
+pub fn constructor_trunc_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
+    let v2 = &constructor_fpuroundop_round(ctx, arg0);
+    let v4 = constructor_fpu_round(ctx, arg0, v2, &FpuRoundMode::ToZero, arg1);
+    // Rule at src/isa/s390x/inst.isle line 4768.
+    return v4;
+}
+
+// Generated as internal constructor for term nearest_reg.
+pub fn constructor_nearest_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
+    let v2 = &constructor_fpuroundop_round(ctx, arg0);
+    let v4 = constructor_fpu_round(ctx, arg0, v2, &FpuRoundMode::ToNearestTiesToEven, arg1);
+    // Rule at src/isa/s390x/inst.isle line 4772.
+    return v4;
+}
+
+// Generated as internal constructor for term fpromote_reg.
+pub fn constructor_fpromote_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Type, arg2: Reg) -> Reg {
+    if arg0 == arg1 {
+        // Rule at src/isa/s390x/inst.isle line 4779.
+        return arg2;
+    }
+    match arg0 {
+        F64 => {
+            if arg1 == F32 {
+                let v5 = constructor_fpu_rr(ctx, F64, &FPUOp1::Cvt32To64, arg2);
+                // Rule at src/isa/s390x/inst.isle line 4780.
+                return v5;
+            }
+        }
+        F64X2 => {
+            if arg1 == F32X4 {
+                let v7 = constructor_fpu_rr(ctx, F64, &FPUOp1::Cvt32x4To64x2, arg2);
+                // Rule at src/isa/s390x/inst.isle line 4782.
+                return v7;
+            }
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "fpromote_reg", "src/isa/s390x/inst.isle line 4778"
+    )
+}
+
+// Generated as internal constructor for term fdemote_reg.
+pub fn constructor_fdemote_reg<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Type,
+    arg2: &FpuRoundMode,
+    arg3: Reg,
+) -> Reg {
+    if arg0 == arg1 {
+        // Rule at src/isa/s390x/inst.isle line 4789.
+        return arg3;
+    }
+    match arg0 {
+        F32 => {
+            if arg1 == F64 {
+                let v6 = constructor_fpu_round(ctx, F32, &FpuRoundOp::Cvt64To32, arg2, arg3);
+                // Rule at src/isa/s390x/inst.isle line 4790.
+                return v6;
+            }
+        }
+        F32X4 => {
+            if arg1 == F64X2 {
+                let v9 = constructor_fpu_round(ctx, F32X4, &FpuRoundOp::Cvt64x2To32x4, arg2, arg3);
+                // Rule at src/isa/s390x/inst.isle line 4792.
+                return v9;
+            }
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "fdemote_reg", "src/isa/s390x/inst.isle line 4788"
+    )
+}
+
+// Generated as internal constructor for term fcvt_from_uint_reg.
+pub fn constructor_fcvt_from_uint_reg<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &FpuRoundMode,
+    arg2: Reg,
+) -> Reg {
+    match arg0 {
+        F32 => {
+            let v7 = C::zero_reg(ctx);
+            let v8 = constructor_vec_insert_lane_undef(ctx, I32X4, arg2, 0x0, v7);
+            let v9 = constructor_fpu_round(ctx, F32, &FpuRoundOp::FromUInt32, arg1, v8);
+            // Rule at src/isa/s390x/inst.isle line 4799.
+            return v9;
+        }
+        F64 => {
+            let v7 = C::zero_reg(ctx);
+            let v13 = constructor_vec_insert_lane_undef(ctx, I64X2, arg2, 0x0, v7);
+            let v14 = constructor_fpu_round(ctx, F64, &FpuRoundOp::FromUInt64, arg1, v13);
+            // Rule at src/isa/s390x/inst.isle line 4801.
+            return v14;
+        }
+        F32X4 => {
+            let v17 = constructor_fpu_round(ctx, F32X4, &FpuRoundOp::FromUInt32x4, arg1, arg2);
+            // Rule at src/isa/s390x/inst.isle line 4803.
+            return v17;
+        }
+        F64X2 => {
+            let v20 = constructor_fpu_round(ctx, F64X2, &FpuRoundOp::FromUInt64x2, arg1, arg2);
+            // Rule at src/isa/s390x/inst.isle line 4805.
+            return v20;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "fcvt_from_uint_reg", "src/isa/s390x/inst.isle line 4798"
+    )
+}
+
+// Generated as internal constructor for term fcvt_from_sint_reg.
+pub fn constructor_fcvt_from_sint_reg<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &FpuRoundMode,
+    arg2: Reg,
+) -> Reg {
+    match arg0 {
+        F32 => {
+            let v7 = C::zero_reg(ctx);
+            let v8 = constructor_vec_insert_lane_undef(ctx, I32X4, arg2, 0x0, v7);
+            let v9 = constructor_fpu_round(ctx, F32, &FpuRoundOp::FromSInt32, arg1, v8);
+            // Rule at src/isa/s390x/inst.isle line 4812.
+            return v9;
+        }
+        F64 => {
+            let v7 = C::zero_reg(ctx);
+            let v13 = constructor_vec_insert_lane_undef(ctx, I64X2, arg2, 0x0, v7);
+            let v14 = constructor_fpu_round(ctx, F64, &FpuRoundOp::FromSInt64, arg1, v13);
+            // Rule at src/isa/s390x/inst.isle line 4814.
+            return v14;
+        }
+        F32X4 => {
+            let v17 = constructor_fpu_round(ctx, F32X4, &FpuRoundOp::FromSInt32x4, arg1, arg2);
+            // Rule at src/isa/s390x/inst.isle line 4816.
+            return v17;
+        }
+        F64X2 => {
+            let v20 = constructor_fpu_round(ctx, F64X2, &FpuRoundOp::FromSInt64x2, arg1, arg2);
+            // Rule at src/isa/s390x/inst.isle line 4818.
+            return v20;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "fcvt_from_sint_reg", "src/isa/s390x/inst.isle line 4811"
+    )
+}
+
+// Generated as internal constructor for term fcvt_flt_ty.
+pub fn constructor_fcvt_flt_ty<C: Context>(ctx: &mut C, arg0: Type, arg1: Type) -> Type {
+    match arg1 {
+        F32 => {
+            let v1 = C::fits_in_32(ctx, arg0);
+            if let Some(v2) = v1 {
+                let v4 = C::vxrs_ext2_enabled(ctx, arg1);
+                if let Some(v5) = v4 {
+                    // Rule at src/isa/s390x/inst.isle line 4825.
+                    return F32;
+                }
+            }
+            let v7 = C::fits_in_64(ctx, arg0);
+            if let Some(v8) = v7 {
+                // Rule at src/isa/s390x/inst.isle line 4826.
+                return F64;
+            }
+        }
+        F64 => {
+            let v7 = C::fits_in_64(ctx, arg0);
+            if let Some(v8) = v7 {
+                // Rule at src/isa/s390x/inst.isle line 4827.
+                return F64;
+            }
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "fcvt_flt_ty", "src/isa/s390x/inst.isle line 4824"
+    )
+}
+
+// Generated as internal constructor for term fcvt_int_ty.
+pub fn constructor_fcvt_int_ty<C: Context>(ctx: &mut C, arg0: Type, arg1: Type) -> Type {
+    match arg1 {
+        F32 => {
+            let v1 = C::fits_in_32(ctx, arg0);
+            if let Some(v2) = v1 {
+                let v4 = C::vxrs_ext2_enabled(ctx, arg1);
+                if let Some(v5) = v4 {
+                    // Rule at src/isa/s390x/inst.isle line 4830.
+                    return I32;
+                }
+            }
+            let v7 = C::fits_in_64(ctx, arg0);
+            if let Some(v8) = v7 {
+                // Rule at src/isa/s390x/inst.isle line 4831.
+                return I64;
+            }
+        }
+        F64 => {
+            let v7 = C::fits_in_64(ctx, arg0);
+            if let Some(v8) = v7 {
+                // Rule at src/isa/s390x/inst.isle line 4832.
+                return I64;
+            }
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "fcvt_int_ty", "src/isa/s390x/inst.isle line 4829"
+    )
+}
+
+// Generated as internal constructor for term fcvt_to_uint_reg.
+pub fn constructor_fcvt_to_uint_reg<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &FpuRoundMode,
+    arg2: Reg,
+) -> Reg {
+    match arg0 {
+        F32 => {
+            let v6 = constructor_fpu_round(ctx, F32, &FpuRoundOp::ToUInt32, arg1, arg2);
+            let v8 = C::zero_reg(ctx);
+            let v9 = constructor_vec_extract_lane(ctx, I32X4, v6, 0x0, v8);
+            // Rule at src/isa/s390x/inst.isle line 4838.
+            return v9;
+        }
+        F64 => {
+            let v13 = constructor_fpu_round(ctx, F64, &FpuRoundOp::ToUInt64, arg1, arg2);
+            let v8 = C::zero_reg(ctx);
+            let v14 = constructor_vec_extract_lane(ctx, I64X2, v13, 0x0, v8);
+            // Rule at src/isa/s390x/inst.isle line 4840.
+            return v14;
+        }
+        F32X4 => {
+            let v17 = constructor_fpu_round(ctx, F32X4, &FpuRoundOp::ToUInt32x4, arg1, arg2);
+            // Rule at src/isa/s390x/inst.isle line 4842.
+            return v17;
+        }
+        F64X2 => {
+            let v20 = constructor_fpu_round(ctx, F64X2, &FpuRoundOp::ToUInt64x2, arg1, arg2);
+            // Rule at src/isa/s390x/inst.isle line 4844.
+            return v20;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "fcvt_to_uint_reg", "src/isa/s390x/inst.isle line 4837"
+    )
+}
+
+// Generated as internal constructor for term fcvt_to_uint_ub.
+pub fn constructor_fcvt_to_uint_ub<C: Context>(ctx: &mut C, arg0: Type, arg1: Type) -> Reg {
+    match arg0 {
+        F32 => {
+            let v3 = C::ty_bits(ctx, arg1);
+            let v4 = C::fcvt_to_uint_ub32(ctx, v3);
+            let v5 = constructor_imm(ctx, F32, v4);
+            // Rule at src/isa/s390x/inst.isle line 4848.
+            return v5;
+        }
+        F64 => {
+            let v3 = C::ty_bits(ctx, arg1);
+            let v7 = C::fcvt_to_uint_ub64(ctx, v3);
+            let v8 = constructor_imm(ctx, F64, v7);
+            // Rule at src/isa/s390x/inst.isle line 4850.
+            return v8;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "fcvt_to_uint_ub", "src/isa/s390x/inst.isle line 4847"
+    )
+}
+
+// Generated as internal constructor for term fcvt_to_uint_lb.
+pub fn constructor_fcvt_to_uint_lb<C: Context>(ctx: &mut C, arg0: Type) -> Reg {
+    match arg0 {
+        F32 => {
+            let v2 = C::fcvt_to_uint_lb32(ctx);
+            let v3 = constructor_imm(ctx, F32, v2);
+            // Rule at src/isa/s390x/inst.isle line 4854.
+            return v3;
+        }
+        F64 => {
+            let v5 = C::fcvt_to_uint_lb64(ctx);
+            let v6 = constructor_imm(ctx, F64, v5);
+            // Rule at src/isa/s390x/inst.isle line 4855.
+            return v6;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "fcvt_to_uint_lb", "src/isa/s390x/inst.isle line 4853"
+    )
+}
+
+// Generated as internal constructor for term fcvt_to_sint_reg.
+pub fn constructor_fcvt_to_sint_reg<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &FpuRoundMode,
+    arg2: Reg,
+) -> Reg {
+    match arg0 {
+        F32 => {
+            let v6 = constructor_fpu_round(ctx, F32, &FpuRoundOp::ToSInt32, arg1, arg2);
+            let v8 = C::zero_reg(ctx);
+            let v9 = constructor_vec_extract_lane(ctx, F32X4, v6, 0x0, v8);
+            // Rule at src/isa/s390x/inst.isle line 4870.
+            return v9;
+        }
+        F64 => {
+            let v13 = constructor_fpu_round(ctx, F64, &FpuRoundOp::ToSInt64, arg1, arg2);
+            let v8 = C::zero_reg(ctx);
+            let v14 = constructor_vec_extract_lane(ctx, F64X2, v13, 0x0, v8);
+            // Rule at src/isa/s390x/inst.isle line 4872.
+            return v14;
+        }
+        F32X4 => {
+            let v16 = constructor_fpu_round(ctx, F32X4, &FpuRoundOp::ToSInt32x4, arg1, arg2);
+            // Rule at src/isa/s390x/inst.isle line 4874.
+            return v16;
+        }
+        F64X2 => {
+            let v18 = constructor_fpu_round(ctx, F64X2, &FpuRoundOp::ToSInt64x2, arg1, arg2);
+            // Rule at src/isa/s390x/inst.isle line 4876.
+            return v18;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "fcvt_to_sint_reg", "src/isa/s390x/inst.isle line 4869"
+    )
+}
+
+// Generated as internal constructor for term fcvt_to_sint_ub.
+pub fn constructor_fcvt_to_sint_ub<C: Context>(ctx: &mut C, arg0: Type, arg1: Type) -> Reg {
+    match arg0 {
+        F32 => {
+            let v3 = C::ty_bits(ctx, arg1);
+            let v4 = C::fcvt_to_sint_ub32(ctx, v3);
+            let v5 = constructor_imm(ctx, F32, v4);
+            // Rule at src/isa/s390x/inst.isle line 4880.
+            return v5;
+        }
+        F64 => {
+            let v3 = C::ty_bits(ctx, arg1);
+            let v7 = C::fcvt_to_sint_ub64(ctx, v3);
+            let v8 = constructor_imm(ctx, F64, v7);
+            // Rule at src/isa/s390x/inst.isle line 4882.
+            return v8;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "fcvt_to_sint_ub", "src/isa/s390x/inst.isle line 4879"
+    )
+}
+
+// Generated as internal constructor for term fcvt_to_sint_lb.
+pub fn constructor_fcvt_to_sint_lb<C: Context>(ctx: &mut C, arg0: Type, arg1: Type) -> Reg {
+    match arg0 {
+        F32 => {
+            let v3 = C::ty_bits(ctx, arg1);
+            let v4 = C::fcvt_to_sint_lb32(ctx, v3);
+            let v5 = constructor_imm(ctx, F32, v4);
+            // Rule at src/isa/s390x/inst.isle line 4886.
+            return v5;
+        }
+        F64 => {
+            let v3 = C::ty_bits(ctx, arg1);
+            let v7 = C::fcvt_to_sint_lb64(ctx, v3);
+            let v8 = constructor_imm(ctx, F64, v7);
+            // Rule at src/isa/s390x/inst.isle line 4888.
+            return v8;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "fcvt_to_sint_lb", "src/isa/s390x/inst.isle line 4885"
+    )
+}
+
+// Generated as internal constructor for term cmpop_cmps.
+pub fn constructor_cmpop_cmps<C: Context>(ctx: &mut C, arg0: Type) -> CmpOp {
+    match arg0 {
+        I32 => {
+            // Rule at src/isa/s390x/inst.isle line 4904.
+            return CmpOp::CmpS32;
+        }
+        I64 => {
+            // Rule at src/isa/s390x/inst.isle line 4905.
+            return CmpOp::CmpS64;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "cmpop_cmps", "src/isa/s390x/inst.isle line 4903"
+    )
+}
+
+// Generated as internal constructor for term cmpop_cmps_sext16.
+pub fn constructor_cmpop_cmps_sext16<C: Context>(ctx: &mut C, arg0: Type) -> CmpOp {
+    match arg0 {
+        I32 => {
+            // Rule at src/isa/s390x/inst.isle line 4908.
+            return CmpOp::CmpS32Ext16;
+        }
+        I64 => {
+            // Rule at src/isa/s390x/inst.isle line 4909.
+            return CmpOp::CmpS64Ext16;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "cmpop_cmps_sext16", "src/isa/s390x/inst.isle line 4907"
+    )
+}
+
+// Generated as internal constructor for term cmpop_cmps_sext32.
+pub fn constructor_cmpop_cmps_sext32<C: Context>(ctx: &mut C, arg0: Type) -> CmpOp {
+    if arg0 == I64 {
+        // Rule at src/isa/s390x/inst.isle line 4912.
+        return CmpOp::CmpS64Ext32;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "cmpop_cmps_sext32", "src/isa/s390x/inst.isle line 4911"
+    )
+}
+
+// Generated as internal constructor for term icmps_reg.
+pub fn constructor_icmps_reg<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: Reg,
+) -> ProducesFlags {
+    let v3 = &constructor_cmpop_cmps(ctx, arg0);
+    let v4 = &constructor_cmp_rr(ctx, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4915.
+    return v4.clone();
+}
+
+// Generated as internal constructor for term icmps_reg_sext32.
+pub fn constructor_icmps_reg_sext32<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: Reg,
+) -> ProducesFlags {
+    let v3 = &constructor_cmpop_cmps_sext32(ctx, arg0);
+    let v4 = &constructor_cmp_rr(ctx, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4918.
+    return v4.clone();
+}
+
+// Generated as internal constructor for term icmps_simm16.
+pub fn constructor_icmps_simm16<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: i16,
+) -> ProducesFlags {
+    let v3 = &constructor_cmpop_cmps(ctx, arg0);
+    let v4 = &constructor_cmp_rsimm16(ctx, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4921.
+    return v4.clone();
+}
+
+// Generated as internal constructor for term icmps_simm32.
+pub fn constructor_icmps_simm32<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: i32,
+) -> ProducesFlags {
+    let v3 = &constructor_cmpop_cmps(ctx, arg0);
+    let v4 = &constructor_cmp_rsimm32(ctx, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4924.
+    return v4.clone();
+}
+
+// Generated as internal constructor for term icmps_mem.
+pub fn constructor_icmps_mem<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: &MemArg,
+) -> ProducesFlags {
+    let v3 = &constructor_cmpop_cmps(ctx, arg0);
+    let v4 = &constructor_cmp_rx(ctx, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4927.
+    return v4.clone();
+}
+
+// Generated as internal constructor for term icmps_mem_sext16.
+pub fn constructor_icmps_mem_sext16<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: &MemArg,
+) -> ProducesFlags {
+    let v3 = &constructor_cmpop_cmps_sext16(ctx, arg0);
+    let v4 = &constructor_cmp_rx(ctx, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4930.
+    return v4.clone();
+}
+
+// Generated as internal constructor for term icmps_mem_sext32.
+pub fn constructor_icmps_mem_sext32<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: &MemArg,
+) -> ProducesFlags {
+    let v3 = &constructor_cmpop_cmps_sext32(ctx, arg0);
+    let v4 = &constructor_cmp_rx(ctx, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4933.
+    return v4.clone();
+}
+
+// Generated as internal constructor for term cmpop_cmpu.
+pub fn constructor_cmpop_cmpu<C: Context>(ctx: &mut C, arg0: Type) -> CmpOp {
+    match arg0 {
+        I32 => {
+            // Rule at src/isa/s390x/inst.isle line 4939.
+            return CmpOp::CmpL32;
+        }
+        I64 => {
+            // Rule at src/isa/s390x/inst.isle line 4940.
+            return CmpOp::CmpL64;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "cmpop_cmpu", "src/isa/s390x/inst.isle line 4938"
+    )
+}
+
+// Generated as internal constructor for term cmpop_cmpu_zext16.
+pub fn constructor_cmpop_cmpu_zext16<C: Context>(ctx: &mut C, arg0: Type) -> CmpOp {
+    match arg0 {
+        I32 => {
+            // Rule at src/isa/s390x/inst.isle line 4943.
+            return CmpOp::CmpL32Ext16;
+        }
+        I64 => {
+            // Rule at src/isa/s390x/inst.isle line 4944.
+            return CmpOp::CmpL64Ext16;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "cmpop_cmpu_zext16", "src/isa/s390x/inst.isle line 4942"
+    )
+}
+
+// Generated as internal constructor for term cmpop_cmpu_zext32.
+pub fn constructor_cmpop_cmpu_zext32<C: Context>(ctx: &mut C, arg0: Type) -> CmpOp {
+    if arg0 == I64 {
+        // Rule at src/isa/s390x/inst.isle line 4947.
+        return CmpOp::CmpL64Ext32;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "cmpop_cmpu_zext32", "src/isa/s390x/inst.isle line 4946"
+    )
+}
+
+// Generated as internal constructor for term icmpu_reg.
+pub fn constructor_icmpu_reg<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: Reg,
+) -> ProducesFlags {
+    let v3 = &constructor_cmpop_cmpu(ctx, arg0);
+    let v4 = &constructor_cmp_rr(ctx, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4950.
+    return v4.clone();
+}
+
+// Generated as internal constructor for term icmpu_reg_zext32.
+pub fn constructor_icmpu_reg_zext32<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: Reg,
+) -> ProducesFlags {
+    let v3 = &constructor_cmpop_cmpu_zext32(ctx, arg0);
+    let v4 = &constructor_cmp_rr(ctx, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4953.
+    return v4.clone();
+}
+
+// Generated as internal constructor for term icmpu_uimm32.
+pub fn constructor_icmpu_uimm32<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: u32,
+) -> ProducesFlags {
+    let v3 = &constructor_cmpop_cmpu(ctx, arg0);
+    let v4 = &constructor_cmp_ruimm32(ctx, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4956.
+    return v4.clone();
+}
+
+// Generated as internal constructor for term icmpu_mem.
+pub fn constructor_icmpu_mem<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: &MemArg,
+) -> ProducesFlags {
+    let v3 = &constructor_cmpop_cmpu(ctx, arg0);
+    let v4 = &constructor_cmp_rx(ctx, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4959.
+    return v4.clone();
+}
+
+// Generated as internal constructor for term icmpu_mem_zext16.
+pub fn constructor_icmpu_mem_zext16<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: &MemArg,
+) -> ProducesFlags {
+    let v3 = &constructor_cmpop_cmpu_zext16(ctx, arg0);
+    let v4 = &constructor_cmp_rx(ctx, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4962.
+    return v4.clone();
+}
+
+// Generated as internal constructor for term icmpu_mem_zext32.
+pub fn constructor_icmpu_mem_zext32<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: &MemArg,
+) -> ProducesFlags {
+    let v3 = &constructor_cmpop_cmpu_zext32(ctx, arg0);
+    let v4 = &constructor_cmp_rx(ctx, v3, arg1, arg2);
+    // Rule at src/isa/s390x/inst.isle line 4965.
+    return v4.clone();
+}
+
+// Generated as internal constructor for term vecop_int_cmpeq.
+pub fn constructor_vecop_int_cmpeq<C: Context>(ctx: &mut C, arg0: Type) -> VecIntCmpOp {
+    let v1 = C::multi_lane(ctx, arg0);
+    if let Some(v2) = v1 {
+        match v2.0 {
+            0x8 => {
+                if v2.1 == 0x10 {
+                    // Rule at src/isa/s390x/inst.isle line 4971.
+                    return VecIntCmpOp::CmpEq8x16;
+                }
+            }
+            0x10 => {
+                if v2.1 == 0x8 {
+                    // Rule at src/isa/s390x/inst.isle line 4972.
+                    return VecIntCmpOp::CmpEq16x8;
+                }
+            }
+            0x20 => {
+                if v2.1 == 0x4 {
+                    // Rule at src/isa/s390x/inst.isle line 4973.
+                    return VecIntCmpOp::CmpEq32x4;
+                }
+            }
+            0x40 => {
+                if v2.1 == 0x2 {
+                    // Rule at src/isa/s390x/inst.isle line 4974.
+                    return VecIntCmpOp::CmpEq64x2;
+                }
+            }
+            _ => {}
+        }
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vecop_int_cmpeq", "src/isa/s390x/inst.isle line 4970"
+    )
+}
+
+// Generated as internal constructor for term vec_cmpeq.
+pub fn constructor_vec_cmpeq<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v1 = C::ty_vec128(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v5 = &constructor_vecop_int_cmpeq(ctx, v2);
+        let v6 = constructor_vec_int_cmp(ctx, v2, v5, arg1, arg2);
+        // Rule at src/isa/s390x/inst.isle line 4977.
+        return v6;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_cmpeq", "src/isa/s390x/inst.isle line 4976"
+    )
+}
+
+// Generated as internal constructor for term vec_cmpeqs.
+pub fn constructor_vec_cmpeqs<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: Reg,
+) -> ProducesFlags {
+    let v1 = C::ty_vec128(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v5 = &constructor_vecop_int_cmpeq(ctx, v2);
+        let v6 = &constructor_vec_int_cmps(ctx, v2, v5, arg1, arg2);
+        // Rule at src/isa/s390x/inst.isle line 4979.
+        return v6.clone();
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_cmpeqs", "src/isa/s390x/inst.isle line 4978"
+    )
+}
+
+// Generated as internal constructor for term vecop_int_cmph.
+pub fn constructor_vecop_int_cmph<C: Context>(ctx: &mut C, arg0: Type) -> VecIntCmpOp {
+    let v1 = C::multi_lane(ctx, arg0);
+    if let Some(v2) = v1 {
+        match v2.0 {
+            0x8 => {
+                if v2.1 == 0x10 {
+                    // Rule at src/isa/s390x/inst.isle line 4982.
+                    return VecIntCmpOp::SCmpHi8x16;
+                }
+            }
+            0x10 => {
+                if v2.1 == 0x8 {
+                    // Rule at src/isa/s390x/inst.isle line 4983.
+                    return VecIntCmpOp::SCmpHi16x8;
+                }
+            }
+            0x20 => {
+                if v2.1 == 0x4 {
+                    // Rule at src/isa/s390x/inst.isle line 4984.
+                    return VecIntCmpOp::SCmpHi32x4;
+                }
+            }
+            0x40 => {
+                if v2.1 == 0x2 {
+                    // Rule at src/isa/s390x/inst.isle line 4985.
+                    return VecIntCmpOp::SCmpHi64x2;
+                }
+            }
+            _ => {}
+        }
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vecop_int_cmph", "src/isa/s390x/inst.isle line 4981"
+    )
+}
+
+// Generated as internal constructor for term vec_cmph.
+pub fn constructor_vec_cmph<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v1 = C::ty_vec128(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v5 = &constructor_vecop_int_cmph(ctx, v2);
+        let v6 = constructor_vec_int_cmp(ctx, v2, v5, arg1, arg2);
+        // Rule at src/isa/s390x/inst.isle line 4988.
+        return v6;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_cmph", "src/isa/s390x/inst.isle line 4987"
+    )
+}
+
+// Generated as internal constructor for term vec_cmphs.
+pub fn constructor_vec_cmphs<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: Reg,
+) -> ProducesFlags {
+    let v1 = C::ty_vec128(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v5 = &constructor_vecop_int_cmph(ctx, v2);
+        let v6 = &constructor_vec_int_cmps(ctx, v2, v5, arg1, arg2);
+        // Rule at src/isa/s390x/inst.isle line 4990.
+        return v6.clone();
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_cmphs", "src/isa/s390x/inst.isle line 4989"
+    )
+}
+
+// Generated as internal constructor for term vecop_int_cmphl.
+pub fn constructor_vecop_int_cmphl<C: Context>(ctx: &mut C, arg0: Type) -> VecIntCmpOp {
+    let v1 = C::multi_lane(ctx, arg0);
+    if let Some(v2) = v1 {
+        match v2.0 {
+            0x8 => {
+                if v2.1 == 0x10 {
+                    // Rule at src/isa/s390x/inst.isle line 4993.
+                    return VecIntCmpOp::UCmpHi8x16;
+                }
+            }
+            0x10 => {
+                if v2.1 == 0x8 {
+                    // Rule at src/isa/s390x/inst.isle line 4994.
+                    return VecIntCmpOp::UCmpHi16x8;
+                }
+            }
+            0x20 => {
+                if v2.1 == 0x4 {
+                    // Rule at src/isa/s390x/inst.isle line 4995.
+                    return VecIntCmpOp::UCmpHi32x4;
+                }
+            }
+            0x40 => {
+                if v2.1 == 0x2 {
+                    // Rule at src/isa/s390x/inst.isle line 4996.
+                    return VecIntCmpOp::UCmpHi64x2;
+                }
+            }
+            _ => {}
+        }
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vecop_int_cmphl", "src/isa/s390x/inst.isle line 4992"
+    )
+}
+
+// Generated as internal constructor for term vec_cmphl.
+pub fn constructor_vec_cmphl<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v1 = C::ty_vec128(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v5 = &constructor_vecop_int_cmphl(ctx, v2);
+        let v6 = constructor_vec_int_cmp(ctx, v2, v5, arg1, arg2);
+        // Rule at src/isa/s390x/inst.isle line 4999.
+        return v6;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_cmphl", "src/isa/s390x/inst.isle line 4998"
+    )
+}
+
+// Generated as internal constructor for term vec_cmphls.
+pub fn constructor_vec_cmphls<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: Reg,
+) -> ProducesFlags {
+    let v1 = C::ty_vec128(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v5 = &constructor_vecop_int_cmphl(ctx, v2);
+        let v6 = &constructor_vec_int_cmps(ctx, v2, v5, arg1, arg2);
+        // Rule at src/isa/s390x/inst.isle line 5001.
+        return v6.clone();
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_cmphls", "src/isa/s390x/inst.isle line 5000"
+    )
+}
+
+// Generated as internal constructor for term fcmp_reg.
+pub fn constructor_fcmp_reg<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: Reg,
+) -> ProducesFlags {
+    match arg0 {
+        F32 => {
+            let v3 = &constructor_fpu_cmp32(ctx, arg1, arg2);
+            // Rule at src/isa/s390x/inst.isle line 5007.
+            return v3.clone();
+        }
+        F64 => {
+            let v4 = &constructor_fpu_cmp64(ctx, arg1, arg2);
+            // Rule at src/isa/s390x/inst.isle line 5008.
+            return v4.clone();
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "fcmp_reg", "src/isa/s390x/inst.isle line 5006"
+    )
+}
+
+// Generated as internal constructor for term vecop_float_cmpeq.
+pub fn constructor_vecop_float_cmpeq<C: Context>(ctx: &mut C, arg0: Type) -> VecFloatCmpOp {
+    let v1 = C::multi_lane(ctx, arg0);
+    if let Some(v2) = v1 {
+        match v2.0 {
+            0x20 => {
+                if v2.1 == 0x4 {
+                    // Rule at src/isa/s390x/inst.isle line 5014.
+                    return VecFloatCmpOp::CmpEq32x4;
+                }
+            }
+            0x40 => {
+                if v2.1 == 0x2 {
+                    // Rule at src/isa/s390x/inst.isle line 5015.
+                    return VecFloatCmpOp::CmpEq64x2;
+                }
+            }
+            _ => {}
+        }
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vecop_float_cmpeq", "src/isa/s390x/inst.isle line 5013"
+    )
+}
+
+// Generated as internal constructor for term vec_fcmpeq.
+pub fn constructor_vec_fcmpeq<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v1 = C::ty_vec128(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v5 = &constructor_vecop_float_cmpeq(ctx, v2);
+        let v6 = constructor_vec_float_cmp(ctx, v2, v5, arg1, arg2);
+        // Rule at src/isa/s390x/inst.isle line 5018.
+        return v6;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_fcmpeq", "src/isa/s390x/inst.isle line 5017"
+    )
+}
+
+// Generated as internal constructor for term vec_fcmpeqs.
+pub fn constructor_vec_fcmpeqs<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: Reg,
+) -> ProducesFlags {
+    let v1 = C::ty_vec128(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v5 = &constructor_vecop_float_cmpeq(ctx, v2);
+        let v6 = &constructor_vec_float_cmps(ctx, v2, v5, arg1, arg2);
+        // Rule at src/isa/s390x/inst.isle line 5020.
+        return v6.clone();
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_fcmpeqs", "src/isa/s390x/inst.isle line 5019"
+    )
+}
+
+// Generated as internal constructor for term vecop_float_cmph.
+pub fn constructor_vecop_float_cmph<C: Context>(ctx: &mut C, arg0: Type) -> VecFloatCmpOp {
+    let v1 = C::multi_lane(ctx, arg0);
+    if let Some(v2) = v1 {
+        match v2.0 {
+            0x20 => {
+                if v2.1 == 0x4 {
+                    // Rule at src/isa/s390x/inst.isle line 5023.
+                    return VecFloatCmpOp::CmpHi32x4;
+                }
+            }
+            0x40 => {
+                if v2.1 == 0x2 {
+                    // Rule at src/isa/s390x/inst.isle line 5024.
+                    return VecFloatCmpOp::CmpHi64x2;
+                }
+            }
+            _ => {}
+        }
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vecop_float_cmph", "src/isa/s390x/inst.isle line 5022"
+    )
+}
+
+// Generated as internal constructor for term vec_fcmph.
+pub fn constructor_vec_fcmph<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v1 = C::ty_vec128(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v5 = &constructor_vecop_float_cmph(ctx, v2);
+        let v6 = constructor_vec_float_cmp(ctx, v2, v5, arg1, arg2);
+        // Rule at src/isa/s390x/inst.isle line 5027.
+        return v6;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_fcmph", "src/isa/s390x/inst.isle line 5026"
+    )
+}
+
+// Generated as internal constructor for term vec_fcmphs.
+pub fn constructor_vec_fcmphs<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: Reg,
+) -> ProducesFlags {
+    let v1 = C::ty_vec128(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v5 = &constructor_vecop_float_cmph(ctx, v2);
+        let v6 = &constructor_vec_float_cmps(ctx, v2, v5, arg1, arg2);
+        // Rule at src/isa/s390x/inst.isle line 5029.
+        return v6.clone();
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_fcmphs", "src/isa/s390x/inst.isle line 5028"
+    )
+}
+
+// Generated as internal constructor for term vecop_float_cmphe.
+pub fn constructor_vecop_float_cmphe<C: Context>(ctx: &mut C, arg0: Type) -> VecFloatCmpOp {
+    let v1 = C::multi_lane(ctx, arg0);
+    if let Some(v2) = v1 {
+        match v2.0 {
+            0x20 => {
+                if v2.1 == 0x4 {
+                    // Rule at src/isa/s390x/inst.isle line 5032.
+                    return VecFloatCmpOp::CmpHiEq32x4;
+                }
+            }
+            0x40 => {
+                if v2.1 == 0x2 {
+                    // Rule at src/isa/s390x/inst.isle line 5033.
+                    return VecFloatCmpOp::CmpHiEq64x2;
+                }
+            }
+            _ => {}
+        }
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vecop_float_cmphe", "src/isa/s390x/inst.isle line 5031"
+    )
+}
+
+// Generated as internal constructor for term vec_fcmphe.
+pub fn constructor_vec_fcmphe<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    let v1 = C::ty_vec128(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v5 = &constructor_vecop_float_cmphe(ctx, v2);
+        let v6 = constructor_vec_float_cmp(ctx, v2, v5, arg1, arg2);
+        // Rule at src/isa/s390x/inst.isle line 5036.
+        return v6;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_fcmphe", "src/isa/s390x/inst.isle line 5035"
+    )
+}
+
+// Generated as internal constructor for term vec_fcmphes.
+pub fn constructor_vec_fcmphes<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: Reg,
+) -> ProducesFlags {
+    let v1 = C::ty_vec128(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v5 = &constructor_vecop_float_cmphe(ctx, v2);
+        let v6 = &constructor_vec_float_cmps(ctx, v2, v5, arg1, arg2);
+        // Rule at src/isa/s390x/inst.isle line 5038.
+        return v6.clone();
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_fcmphes", "src/isa/s390x/inst.isle line 5037"
+    )
+}
+
+// Generated as internal constructor for term lower.
+pub fn constructor_lower<C: Context>(ctx: &mut C, arg0: Inst) -> Option<InstOutput> {
+    let v4 = &C::inst_data(ctx, arg0);
+    match v4 {
+        &InstructionData::AtomicCas {
+            opcode: ref v1664,
+            args: ref v1665,
+            flags: v1666,
+        } => {
+            if let &Opcode::AtomicCas = v1664 {
+                let v1 = C::first_result(ctx, arg0);
+                if let Some(v2) = v1 {
+                    let v3 = C::value_type(ctx, v2);
+                    let v507 = C::ty_32_or_64(ctx, v3);
+                    if let Some(v508) = v507 {
+                        let v1671 = C::bigendian(ctx, v1666);
+                        if let Some(v1672) = v1671 {
+                            let v1667 = C::unpack_value_array_3(ctx, v1665);
+                            let v1673 = C::put_in_reg(ctx, v1667.1);
+                            let v1674 = C::put_in_reg(ctx, v1667.2);
+                            let v1625 = C::zero_offset(ctx);
+                            let v1675 = &constructor_lower_address(ctx, v1666, v1667.0, v1625);
+                            let v1676 = constructor_atomic_cas_impl(ctx, v508, v1673, v1674, v1675);
+                            let v1677 = constructor_output_reg(ctx, v1676);
+                            // Rule at src/isa/s390x/lower.isle line 3131.
+                            return Some(v1677);
+                        }
+                        let v1678 = C::littleendian(ctx, v1666);
+                        if let Some(v1679) = v1678 {
+                            let v1667 = C::unpack_value_array_3(ctx, v1665);
+                            let v1673 = C::put_in_reg(ctx, v1667.1);
+                            let v1680 = constructor_bswap_reg(ctx, v508, v1673);
+                            let v1681 = C::put_in_reg(ctx, v1667.2);
+                            let v1682 = constructor_bswap_reg(ctx, v508, v1681);
+                            let v1683 = C::zero_offset(ctx);
+                            let v1684 = &constructor_lower_address(ctx, v1666, v1667.0, v1683);
+                            let v1685 = constructor_atomic_cas_impl(ctx, v508, v1680, v1682, v1684);
+                            let v1686 = constructor_bswap_reg(ctx, v508, v1685);
+                            let v1687 = constructor_output_reg(ctx, v1686);
+                            // Rule at src/isa/s390x/lower.isle line 3138.
+                            return Some(v1687);
+                        }
+                    }
+                    let v368 = C::ty_8_or_16(ctx, v3);
+                    if let Some(v369) = v368 {
+                        let v1667 = C::unpack_value_array_3(ctx, v1665);
+                        let v1673 = C::put_in_reg(ctx, v1667.1);
+                        let v1674 = C::put_in_reg(ctx, v1667.2);
+                        let v1688 = C::put_in_reg(ctx, v1667.0);
+                        let v1689 = constructor_casloop_bitshift(ctx, v1688);
+                        let v1690 = constructor_casloop_aligned_addr(ctx, v1688);
+                        let v1691 = &C::inst_builder_new(ctx);
+                        let v1692 = constructor_casloop_val_reg(ctx);
+                        let v1693 = C::writable_reg_to_reg(ctx, v1692);
+                        let v1694 =
+                            constructor_casloop_rotate_in(ctx, v1691, v369, v1666, v1689, v1693);
+                        let v1695 = constructor_casloop_tmp_reg(ctx);
+                        let v1696 = constructor_atomic_cas_body(
+                            ctx, v1691, v369, v1666, v1695, v1694, v1673, v1674,
+                        );
+                        let v1697 =
+                            constructor_casloop_rotate_out(ctx, v1691, v369, v1666, v1689, v1696);
+                        let v1698 = constructor_casloop_subword(
+                            ctx, v1691, v369, v1666, v1690, v1689, v1697,
+                        );
+                        let v1699 = constructor_output_reg(ctx, v1698);
+                        // Rule at src/isa/s390x/lower.isle line 3145.
+                        return Some(v1699);
+                    }
+                }
+            }
+        }
+        &InstructionData::AtomicRmw {
+            opcode: ref v1608,
+            args: ref v1609,
+            flags: v1610,
+            op: ref v1611,
+        } => {
+            if let &Opcode::AtomicRmw = v1608 {
+                let v1 = C::first_result(ctx, arg0);
+                if let Some(v2) = v1 {
+                    let v3 = C::value_type(ctx, v2);
+                    let v507 = C::ty_32_or_64(ctx, v3);
+                    if let Some(v508) = v507 {
+                        match v1611 {
+                            &AtomicRmwOp::Add => {
+                                let v1615 = C::bigendian(ctx, v1610);
+                                if let Some(v1616) = v1615 {
+                                    let v1612 = C::unpack_value_array_2(ctx, v1609);
+                                    let v1617 = C::put_in_reg(ctx, v1612.1);
+                                    let v1618 = C::zero_offset(ctx);
+                                    let v1619 =
+                                        &constructor_lower_address(ctx, v1610, v1612.0, v1618);
+                                    let v1640 = constructor_atomic_rmw_add(ctx, v508, v1617, v1619);
+                                    let v1641 = constructor_output_reg(ctx, v1640);
+                                    // Rule at src/isa/s390x/lower.isle line 2911.
+                                    return Some(v1641);
+                                }
+                            }
+                            &AtomicRmwOp::And => {
+                                let v1615 = C::bigendian(ctx, v1610);
+                                if let Some(v1616) = v1615 {
+                                    let v1612 = C::unpack_value_array_2(ctx, v1609);
+                                    let v1617 = C::put_in_reg(ctx, v1612.1);
+                                    let v1618 = C::zero_offset(ctx);
+                                    let v1619 =
+                                        &constructor_lower_address(ctx, v1610, v1612.0, v1618);
+                                    let v1620 = constructor_atomic_rmw_and(ctx, v508, v1617, v1619);
+                                    let v1621 = constructor_output_reg(ctx, v1620);
+                                    // Rule at src/isa/s390x/lower.isle line 2875.
+                                    return Some(v1621);
+                                }
+                                let v1622 = C::littleendian(ctx, v1610);
+                                if let Some(v1623) = v1622 {
+                                    let v1612 = C::unpack_value_array_2(ctx, v1609);
+                                    let v1617 = C::put_in_reg(ctx, v1612.1);
+                                    let v1624 = constructor_bswap_reg(ctx, v508, v1617);
+                                    let v1625 = C::zero_offset(ctx);
+                                    let v1626 =
+                                        &constructor_lower_address(ctx, v1610, v1612.0, v1625);
+                                    let v1627 = constructor_atomic_rmw_and(ctx, v508, v1624, v1626);
+                                    let v1628 = constructor_bswap_reg(ctx, v508, v1627);
+                                    let v1629 = constructor_output_reg(ctx, v1628);
+                                    // Rule at src/isa/s390x/lower.isle line 2881.
+                                    return Some(v1629);
+                                }
+                            }
+                            &AtomicRmwOp::Or => {
+                                let v1615 = C::bigendian(ctx, v1610);
+                                if let Some(v1616) = v1615 {
+                                    let v1612 = C::unpack_value_array_2(ctx, v1609);
+                                    let v1617 = C::put_in_reg(ctx, v1612.1);
+                                    let v1618 = C::zero_offset(ctx);
+                                    let v1619 =
+                                        &constructor_lower_address(ctx, v1610, v1612.0, v1618);
+                                    let v1630 = constructor_atomic_rmw_or(ctx, v508, v1617, v1619);
+                                    let v1631 = constructor_output_reg(ctx, v1630);
+                                    // Rule at src/isa/s390x/lower.isle line 2887.
+                                    return Some(v1631);
+                                }
+                                let v1622 = C::littleendian(ctx, v1610);
+                                if let Some(v1623) = v1622 {
+                                    let v1612 = C::unpack_value_array_2(ctx, v1609);
+                                    let v1617 = C::put_in_reg(ctx, v1612.1);
+                                    let v1624 = constructor_bswap_reg(ctx, v508, v1617);
+                                    let v1625 = C::zero_offset(ctx);
+                                    let v1626 =
+                                        &constructor_lower_address(ctx, v1610, v1612.0, v1625);
+                                    let v1632 = constructor_atomic_rmw_or(ctx, v508, v1624, v1626);
+                                    let v1633 = constructor_bswap_reg(ctx, v508, v1632);
+                                    let v1634 = constructor_output_reg(ctx, v1633);
+                                    // Rule at src/isa/s390x/lower.isle line 2893.
+                                    return Some(v1634);
+                                }
+                            }
+                            &AtomicRmwOp::Sub => {
+                                let v1615 = C::bigendian(ctx, v1610);
+                                if let Some(v1616) = v1615 {
+                                    let v1612 = C::unpack_value_array_2(ctx, v1609);
+                                    let v1617 = C::put_in_reg(ctx, v1612.1);
+                                    let v1642 = constructor_neg_reg(ctx, v508, v1617);
+                                    let v1625 = C::zero_offset(ctx);
+                                    let v1626 =
+                                        &constructor_lower_address(ctx, v1610, v1612.0, v1625);
+                                    let v1643 = constructor_atomic_rmw_add(ctx, v508, v1642, v1626);
+                                    let v1644 = constructor_output_reg(ctx, v1643);
+                                    // Rule at src/isa/s390x/lower.isle line 2917.
+                                    return Some(v1644);
+                                }
+                            }
+                            &AtomicRmwOp::Xor => {
+                                let v1615 = C::bigendian(ctx, v1610);
+                                if let Some(v1616) = v1615 {
+                                    let v1612 = C::unpack_value_array_2(ctx, v1609);
+                                    let v1617 = C::put_in_reg(ctx, v1612.1);
+                                    let v1618 = C::zero_offset(ctx);
+                                    let v1619 =
+                                        &constructor_lower_address(ctx, v1610, v1612.0, v1618);
+                                    let v1635 = constructor_atomic_rmw_xor(ctx, v508, v1617, v1619);
+                                    let v1636 = constructor_output_reg(ctx, v1635);
+                                    // Rule at src/isa/s390x/lower.isle line 2899.
+                                    return Some(v1636);
+                                }
+                                let v1622 = C::littleendian(ctx, v1610);
+                                if let Some(v1623) = v1622 {
+                                    let v1612 = C::unpack_value_array_2(ctx, v1609);
+                                    let v1617 = C::put_in_reg(ctx, v1612.1);
+                                    let v1624 = constructor_bswap_reg(ctx, v508, v1617);
+                                    let v1625 = C::zero_offset(ctx);
+                                    let v1626 =
+                                        &constructor_lower_address(ctx, v1610, v1612.0, v1625);
+                                    let v1637 = constructor_atomic_rmw_xor(ctx, v508, v1624, v1626);
+                                    let v1638 = constructor_bswap_reg(ctx, v508, v1637);
+                                    let v1639 = constructor_output_reg(ctx, v1638);
+                                    // Rule at src/isa/s390x/lower.isle line 2905.
+                                    return Some(v1639);
+                                }
+                            }
+                            _ => {}
+                        }
+                        let v1612 = C::unpack_value_array_2(ctx, v1609);
+                        let v1617 = C::put_in_reg(ctx, v1612.1);
+                        let v1645 = C::put_in_reg(ctx, v1612.0);
+                        let v1646 = &C::inst_builder_new(ctx);
+                        let v1647 = constructor_casloop_val_reg(ctx);
+                        let v1649 = constructor_casloop_tmp_reg(ctx);
+                        let v1648 = C::writable_reg_to_reg(ctx, v1647);
+                        let v1650 = constructor_atomic_rmw_body(
+                            ctx, v1646, v508, v1610, v1611, v1649, v1648, v1617,
+                        );
+                        let v1651 = constructor_casloop(ctx, v1646, v508, v1610, v1645, v1650);
+                        let v1652 = constructor_output_reg(ctx, v1651);
+                        // Rule at src/isa/s390x/lower.isle line 2926.
+                        return Some(v1652);
+                    }
+                    let v368 = C::ty_8_or_16(ctx, v3);
+                    if let Some(v369) = v368 {
+                        let v1612 = C::unpack_value_array_2(ctx, v1609);
+                        let v1617 = C::put_in_reg(ctx, v1612.1);
+                        let v1645 = C::put_in_reg(ctx, v1612.0);
+                        let v1653 = constructor_casloop_bitshift(ctx, v1645);
+                        let v1654 = constructor_casloop_aligned_addr(ctx, v1645);
+                        let v1655 = &C::inst_builder_new(ctx);
+                        let v1656 = constructor_casloop_val_reg(ctx);
+                        let v1657 = C::writable_reg_to_reg(ctx, v1656);
+                        let v1658 =
+                            constructor_casloop_rotate_in(ctx, v1655, v369, v1610, v1653, v1657);
+                        let v1659 = constructor_casloop_tmp_reg(ctx);
+                        let v1660 = constructor_atomic_rmw_body(
+                            ctx, v1655, v369, v1610, v1611, v1659, v1658, v1617,
+                        );
+                        let v1661 =
+                            constructor_casloop_rotate_out(ctx, v1655, v369, v1610, v1653, v1660);
+                        let v1662 = constructor_casloop_subword(
+                            ctx, v1655, v369, v1610, v1654, v1653, v1661,
+                        );
+                        let v1663 = constructor_output_reg(ctx, v1662);
+                        // Rule at src/isa/s390x/lower.isle line 2938.
+                        return Some(v1663);
+                    }
+                }
+            }
+        }
+        &InstructionData::Binary {
+            opcode: ref v38,
+            args: ref v39,
+        } => {
+            match v38 {
+                &Opcode::Swizzle => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v149 = C::ty_vec128(ctx, v3);
+                        if let Some(v150) = v149 {
+                            let v1433 = &C::lane_order(ctx);
+                            match v1433 {
+                                &LaneOrder::LittleEndian => {
+                                    let v1440 = constructor_vec_imm(ctx, v150, 0x0);
+                                    let v40 = C::unpack_value_array_2(ctx, v39);
+                                    let v44 = C::put_in_reg(ctx, v40.0);
+                                    let v1442 = constructor_vec_imm_splat(ctx, I8X16, 0xEF);
+                                    let v394 = C::put_in_reg(ctx, v40.1);
+                                    let v1443 = constructor_vec_not(ctx, I8X16, v394);
+                                    let v1444 = constructor_vec_umax(ctx, I8X16, v1442, v1443);
+                                    let v1445 =
+                                        constructor_vec_permute(ctx, v150, v1440, v44, v1444);
+                                    let v1446 = constructor_output_reg(ctx, v1445);
+                                    // Rule at src/isa/s390x/lower.isle line 2228.
+                                    return Some(v1446);
+                                }
+                                &LaneOrder::BigEndian => {
+                                    let v40 = C::unpack_value_array_2(ctx, v39);
+                                    let v63 = C::put_in_reg(ctx, v40.0);
+                                    let v1434 = constructor_vec_imm(ctx, v150, 0x0);
+                                    let v1436 = constructor_vec_imm_splat(ctx, I8X16, 0x10);
+                                    let v394 = C::put_in_reg(ctx, v40.1);
+                                    let v1437 = constructor_vec_umin(ctx, I8X16, v1436, v394);
+                                    let v1438 =
+                                        constructor_vec_permute(ctx, v150, v63, v1434, v1437);
+                                    let v1439 = constructor_output_reg(ctx, v1438);
+                                    // Rule at src/isa/s390x/lower.isle line 2209.
+                                    return Some(v1439);
+                                }
+                                _ => {}
+                            }
+                        }
+                    }
+                }
+                &Opcode::Smin => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v61 = C::fits_in_64(ctx, v3);
+                        if let Some(v62) = v61 {
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v311 = constructor_put_in_reg_sext32(ctx, v40.0);
+                            let v312 = constructor_put_in_reg_sext32(ctx, v40.1);
+                            let v289 = constructor_ty_ext32(ctx, v62);
+                            let v313 = &constructor_icmps_reg(ctx, v289, v311, v312);
+                            let v325 = &C::intcc_as_cond(ctx, &IntCC::SignedGreaterThan);
+                            let v326 = &constructor_bool(ctx, v313, v325);
+                            let v327 = constructor_select_bool_reg(ctx, v62, v326, v312, v311);
+                            let v328 = constructor_output_reg(ctx, v327);
+                            // Rule at src/isa/s390x/lower.isle line 316.
+                            return Some(v328);
+                        }
+                        if v3 == I128 {
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v63 = C::put_in_reg(ctx, v40.0);
+                            let v64 = C::put_in_reg(ctx, v40.1);
+                            let v329 = &constructor_vec_int128_scmphi(ctx, v63, v64);
+                            let v330 = constructor_select_bool_reg(ctx, I128, v329, v64, v63);
+                            let v331 = constructor_output_reg(ctx, v330);
+                            // Rule at src/isa/s390x/lower.isle line 324.
+                            return Some(v331);
+                        }
+                        let v149 = C::ty_vec128(ctx, v3);
+                        if let Some(v150) = v149 {
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v63 = C::put_in_reg(ctx, v40.0);
+                            let v64 = C::put_in_reg(ctx, v40.1);
+                            let v332 = constructor_vec_smin(ctx, v150, v63, v64);
+                            let v333 = constructor_output_reg(ctx, v332);
+                            // Rule at src/isa/s390x/lower.isle line 331.
+                            return Some(v333);
+                        }
+                    }
+                }
+                &Opcode::Umin => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v61 = C::fits_in_64(ctx, v3);
+                        if let Some(v62) = v61 {
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v287 = constructor_put_in_reg_zext32(ctx, v40.0);
+                            let v288 = constructor_put_in_reg_zext32(ctx, v40.1);
+                            let v289 = constructor_ty_ext32(ctx, v62);
+                            let v290 = &constructor_icmpu_reg(ctx, v289, v287, v288);
+                            let v302 = &C::intcc_as_cond(ctx, &IntCC::UnsignedGreaterThan);
+                            let v303 = &constructor_bool(ctx, v290, v302);
+                            let v304 = constructor_select_bool_reg(ctx, v62, v303, v288, v287);
+                            let v305 = constructor_output_reg(ctx, v304);
+                            // Rule at src/isa/s390x/lower.isle line 272.
+                            return Some(v305);
+                        }
+                        if v3 == I128 {
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v63 = C::put_in_reg(ctx, v40.0);
+                            let v64 = C::put_in_reg(ctx, v40.1);
+                            let v306 = &constructor_vec_int128_ucmphi(ctx, v63, v64);
+                            let v307 = constructor_select_bool_reg(ctx, I128, v306, v64, v63);
+                            let v308 = constructor_output_reg(ctx, v307);
+                            // Rule at src/isa/s390x/lower.isle line 280.
+                            return Some(v308);
+                        }
+                        let v149 = C::ty_vec128(ctx, v3);
+                        if let Some(v150) = v149 {
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v63 = C::put_in_reg(ctx, v40.0);
+                            let v64 = C::put_in_reg(ctx, v40.1);
+                            let v309 = constructor_vec_umin(ctx, v150, v63, v64);
+                            let v310 = constructor_output_reg(ctx, v309);
+                            // Rule at src/isa/s390x/lower.isle line 287.
+                            return Some(v310);
+                        }
+                    }
+                }
+                &Opcode::Smax => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v61 = C::fits_in_64(ctx, v3);
+                        if let Some(v62) = v61 {
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v311 = constructor_put_in_reg_sext32(ctx, v40.0);
+                            let v312 = constructor_put_in_reg_sext32(ctx, v40.1);
+                            let v289 = constructor_ty_ext32(ctx, v62);
+                            let v313 = &constructor_icmps_reg(ctx, v289, v311, v312);
+                            let v315 = &C::intcc_as_cond(ctx, &IntCC::SignedLessThan);
+                            let v316 = &constructor_bool(ctx, v313, v315);
+                            let v317 = constructor_select_bool_reg(ctx, v62, v316, v312, v311);
+                            let v318 = constructor_output_reg(ctx, v317);
+                            // Rule at src/isa/s390x/lower.isle line 294.
+                            return Some(v318);
+                        }
+                        if v3 == I128 {
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v63 = C::put_in_reg(ctx, v40.0);
+                            let v64 = C::put_in_reg(ctx, v40.1);
+                            let v319 = &constructor_vec_int128_scmphi(ctx, v64, v63);
+                            let v320 = constructor_select_bool_reg(ctx, I128, v319, v64, v63);
+                            let v321 = constructor_output_reg(ctx, v320);
+                            // Rule at src/isa/s390x/lower.isle line 302.
+                            return Some(v321);
+                        }
+                        let v149 = C::ty_vec128(ctx, v3);
+                        if let Some(v150) = v149 {
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v63 = C::put_in_reg(ctx, v40.0);
+                            let v64 = C::put_in_reg(ctx, v40.1);
+                            let v322 = constructor_vec_smax(ctx, v150, v63, v64);
+                            let v323 = constructor_output_reg(ctx, v322);
+                            // Rule at src/isa/s390x/lower.isle line 309.
+                            return Some(v323);
+                        }
+                    }
+                }
+                &Opcode::Umax => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v61 = C::fits_in_64(ctx, v3);
+                        if let Some(v62) = v61 {
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v287 = constructor_put_in_reg_zext32(ctx, v40.0);
+                            let v288 = constructor_put_in_reg_zext32(ctx, v40.1);
+                            let v289 = constructor_ty_ext32(ctx, v62);
+                            let v290 = &constructor_icmpu_reg(ctx, v289, v287, v288);
+                            let v292 = &C::intcc_as_cond(ctx, &IntCC::UnsignedLessThan);
+                            let v293 = &constructor_bool(ctx, v290, v292);
+                            let v294 = constructor_select_bool_reg(ctx, v62, v293, v288, v287);
+                            let v295 = constructor_output_reg(ctx, v294);
+                            // Rule at src/isa/s390x/lower.isle line 250.
+                            return Some(v295);
+                        }
+                        if v3 == I128 {
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v63 = C::put_in_reg(ctx, v40.0);
+                            let v64 = C::put_in_reg(ctx, v40.1);
+                            let v296 = &constructor_vec_int128_ucmphi(ctx, v64, v63);
+                            let v297 = constructor_select_bool_reg(ctx, I128, v296, v64, v63);
+                            let v298 = constructor_output_reg(ctx, v297);
+                            // Rule at src/isa/s390x/lower.isle line 258.
+                            return Some(v298);
+                        }
+                        let v149 = C::ty_vec128(ctx, v3);
+                        if let Some(v150) = v149 {
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v63 = C::put_in_reg(ctx, v40.0);
+                            let v64 = C::put_in_reg(ctx, v40.1);
+                            let v299 = constructor_vec_umax(ctx, v150, v63, v64);
+                            let v300 = constructor_output_reg(ctx, v299);
+                            // Rule at src/isa/s390x/lower.isle line 265.
+                            return Some(v300);
+                        }
+                    }
+                }
+                &Opcode::AvgRound => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v149 = C::ty_vec128(ctx, v3);
+                        if let Some(v150) = v149 {
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v63 = C::put_in_reg(ctx, v40.0);
+                            let v64 = C::put_in_reg(ctx, v40.1);
+                            let v334 = constructor_vec_uavg(ctx, v150, v63, v64);
+                            let v335 = constructor_output_reg(ctx, v334);
+                            // Rule at src/isa/s390x/lower.isle line 338.
+                            return Some(v335);
+                        }
+                    }
+                }
+                &Opcode::UaddSat => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v149 = C::ty_vec128(ctx, v3);
+                        if let Some(v150) = v149 {
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v63 = C::put_in_reg(ctx, v40.0);
+                            let v64 = C::put_in_reg(ctx, v40.1);
+                            let v151 = constructor_vec_add(ctx, v150, v63, v64);
+                            let v152 = C::put_in_reg(ctx, v40.0);
+                            let v153 = constructor_vec_cmphl(ctx, v150, v152, v151);
+                            let v154 = constructor_vec_or(ctx, v150, v151, v153);
+                            let v155 = constructor_output_reg(ctx, v154);
+                            // Rule at src/isa/s390x/lower.isle line 116.
+                            return Some(v155);
+                        }
+                    }
+                }
+                &Opcode::SaddSat => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v149 = C::ty_vec128(ctx, v3);
+                        if let Some(v150) = v149 {
+                            let v156 = constructor_vec_widen_type(ctx, v150);
+                            let v157 = constructor_vec_widen_type(ctx, v150);
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v158 = C::put_in_reg(ctx, v40.0);
+                            let v159 = constructor_vec_unpacks_high(ctx, v150, v158);
+                            let v160 = C::put_in_reg(ctx, v40.1);
+                            let v161 = constructor_vec_unpacks_high(ctx, v150, v160);
+                            let v162 = constructor_vec_add(ctx, v157, v159, v161);
+                            let v163 = constructor_vec_widen_type(ctx, v150);
+                            let v164 = C::put_in_reg(ctx, v40.0);
+                            let v165 = constructor_vec_unpacks_low(ctx, v150, v164);
+                            let v166 = C::put_in_reg(ctx, v40.1);
+                            let v167 = constructor_vec_unpacks_low(ctx, v150, v166);
+                            let v168 = constructor_vec_add(ctx, v163, v165, v167);
+                            let v169 = constructor_vec_pack_ssat(ctx, v156, v162, v168);
+                            let v170 = constructor_output_reg(ctx, v169);
+                            // Rule at src/isa/s390x/lower.isle line 124.
+                            return Some(v170);
+                        }
+                    }
+                }
+                &Opcode::UsubSat => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v149 = C::ty_vec128(ctx, v3);
+                        if let Some(v150) = v149 {
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v63 = C::put_in_reg(ctx, v40.0);
+                            let v64 = C::put_in_reg(ctx, v40.1);
+                            let v248 = constructor_vec_sub(ctx, v150, v63, v64);
+                            let v152 = C::put_in_reg(ctx, v40.0);
+                            let v160 = C::put_in_reg(ctx, v40.1);
+                            let v249 = constructor_vec_cmphl(ctx, v150, v152, v160);
+                            let v250 = constructor_vec_and(ctx, v150, v248, v249);
+                            let v251 = constructor_output_reg(ctx, v250);
+                            // Rule at src/isa/s390x/lower.isle line 188.
+                            return Some(v251);
+                        }
+                    }
+                }
+                &Opcode::SsubSat => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v149 = C::ty_vec128(ctx, v3);
+                        if let Some(v150) = v149 {
+                            let v156 = constructor_vec_widen_type(ctx, v150);
+                            let v157 = constructor_vec_widen_type(ctx, v150);
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v158 = C::put_in_reg(ctx, v40.0);
+                            let v159 = constructor_vec_unpacks_high(ctx, v150, v158);
+                            let v160 = C::put_in_reg(ctx, v40.1);
+                            let v161 = constructor_vec_unpacks_high(ctx, v150, v160);
+                            let v252 = constructor_vec_sub(ctx, v157, v159, v161);
+                            let v163 = constructor_vec_widen_type(ctx, v150);
+                            let v164 = C::put_in_reg(ctx, v40.0);
+                            let v165 = constructor_vec_unpacks_low(ctx, v150, v164);
+                            let v166 = C::put_in_reg(ctx, v40.1);
+                            let v167 = constructor_vec_unpacks_low(ctx, v150, v166);
+                            let v253 = constructor_vec_sub(ctx, v163, v165, v167);
+                            let v254 = constructor_vec_pack_ssat(ctx, v156, v252, v253);
+                            let v255 = constructor_output_reg(ctx, v254);
+                            // Rule at src/isa/s390x/lower.isle line 195.
+                            return Some(v255);
+                        }
+                    }
+                }
+                &Opcode::Iadd => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v61 = C::fits_in_64(ctx, v3);
+                        if let Some(v62) = v61 {
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v76 = C::def_inst(ctx, v40.0);
+                            if let Some(v77) = v76 {
+                                let v78 = &C::inst_data(ctx, v77);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v79,
+                                    arg: v80,
+                                } = v78
+                                {
+                                    if let &Opcode::Sextend = v79 {
+                                        let v81 = C::value_type(ctx, v80);
+                                        if v81 == I32 {
+                                            let v43 = C::put_in_reg(ctx, v40.1);
+                                            let v82 = C::put_in_reg(ctx, v80);
+                                            let v83 =
+                                                constructor_add_reg_sext32(ctx, v62, v43, v82);
+                                            let v84 = constructor_output_reg(ctx, v83);
+                                            // Rule at src/isa/s390x/lower.isle line 73.
+                                            return Some(v84);
+                                        }
+                                    }
+                                }
+                            }
+                            let v89 = C::i16_from_value(ctx, v40.0);
+                            if let Some(v90) = v89 {
+                                let v43 = C::put_in_reg(ctx, v40.1);
+                                let v91 = constructor_add_simm16(ctx, v62, v43, v90);
+                                let v92 = constructor_output_reg(ctx, v91);
+                                // Rule at src/isa/s390x/lower.isle line 79.
+                                return Some(v92);
+                            }
+                            let v97 = C::i32_from_value(ctx, v40.0);
+                            if let Some(v98) = v97 {
+                                let v43 = C::put_in_reg(ctx, v40.1);
+                                let v99 = constructor_add_simm32(ctx, v62, v43, v98);
+                                let v100 = constructor_output_reg(ctx, v99);
+                                // Rule at src/isa/s390x/lower.isle line 83.
+                                return Some(v100);
+                            }
+                            let v119 = C::sinkable_inst(ctx, v40.0);
+                            if let Some(v120) = v119 {
+                                let v121 = &C::inst_data(ctx, v120);
+                                if let &InstructionData::Load {
+                                    opcode: ref v122,
+                                    arg: v123,
+                                    flags: v124,
+                                    offset: v125,
+                                } = v121
+                                {
+                                    match v122 {
+                                        &Opcode::Load => {
+                                            let v126 = C::bigendian(ctx, v124);
+                                            if let Some(v127) = v126 {
+                                                let v116 = C::value_type(ctx, v40.0);
+                                                let v117 = C::ty_32_or_64(ctx, v116);
+                                                if let Some(v118) = v117 {
+                                                    let v43 = C::put_in_reg(ctx, v40.1);
+                                                    let v128 = &constructor_sink_load(ctx, v120);
+                                                    let v129 =
+                                                        constructor_add_mem(ctx, v62, v43, v128);
+                                                    let v130 = constructor_output_reg(ctx, v129);
+                                                    // Rule at src/isa/s390x/lower.isle line 89.
+                                                    return Some(v130);
+                                                }
+                                                if v116 == I16 {
+                                                    let v43 = C::put_in_reg(ctx, v40.1);
+                                                    let v128 = &constructor_sink_load(ctx, v120);
+                                                    let v133 = constructor_add_mem_sext16(
+                                                        ctx, v62, v43, v128,
+                                                    );
+                                                    let v134 = constructor_output_reg(ctx, v133);
+                                                    // Rule at src/isa/s390x/lower.isle line 95.
+                                                    return Some(v134);
+                                                }
+                                            }
+                                        }
+                                        &Opcode::Sload16 => {
+                                            let v126 = C::bigendian(ctx, v124);
+                                            if let Some(v127) = v126 {
+                                                let v43 = C::put_in_reg(ctx, v40.1);
+                                                let v138 = &constructor_sink_sload16(ctx, v120);
+                                                let v139 =
+                                                    constructor_add_mem_sext16(ctx, v62, v43, v138);
+                                                let v140 = constructor_output_reg(ctx, v139);
+                                                // Rule at src/isa/s390x/lower.isle line 101.
+                                                return Some(v140);
+                                            }
+                                        }
+                                        &Opcode::Sload32 => {
+                                            let v126 = C::bigendian(ctx, v124);
+                                            if let Some(v127) = v126 {
+                                                let v43 = C::put_in_reg(ctx, v40.1);
+                                                let v144 = &constructor_sink_sload32(ctx, v120);
+                                                let v145 =
+                                                    constructor_add_mem_sext32(ctx, v62, v43, v144);
+                                                let v146 = constructor_output_reg(ctx, v145);
+                                                // Rule at src/isa/s390x/lower.isle line 105.
+                                                return Some(v146);
+                                            }
+                                        }
+                                        _ => {}
+                                    }
+                                }
+                            }
+                            let v67 = C::def_inst(ctx, v40.1);
+                            if let Some(v68) = v67 {
+                                let v69 = &C::inst_data(ctx, v68);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v70,
+                                    arg: v71,
+                                } = v69
+                                {
+                                    if let &Opcode::Sextend = v70 {
+                                        let v72 = C::value_type(ctx, v71);
+                                        if v72 == I32 {
+                                            let v63 = C::put_in_reg(ctx, v40.0);
+                                            let v73 = C::put_in_reg(ctx, v71);
+                                            let v74 =
+                                                constructor_add_reg_sext32(ctx, v62, v63, v73);
+                                            let v75 = constructor_output_reg(ctx, v74);
+                                            // Rule at src/isa/s390x/lower.isle line 71.
+                                            return Some(v75);
+                                        }
+                                    }
+                                }
+                            }
+                            let v85 = C::i16_from_value(ctx, v40.1);
+                            if let Some(v86) = v85 {
+                                let v63 = C::put_in_reg(ctx, v40.0);
+                                let v87 = constructor_add_simm16(ctx, v62, v63, v86);
+                                let v88 = constructor_output_reg(ctx, v87);
+                                // Rule at src/isa/s390x/lower.isle line 77.
+                                return Some(v88);
+                            }
+                            let v93 = C::i32_from_value(ctx, v40.1);
+                            if let Some(v94) = v93 {
+                                let v63 = C::put_in_reg(ctx, v40.0);
+                                let v95 = constructor_add_simm32(ctx, v62, v63, v94);
+                                let v96 = constructor_output_reg(ctx, v95);
+                                // Rule at src/isa/s390x/lower.isle line 81.
+                                return Some(v96);
+                            }
+                            let v104 = C::sinkable_inst(ctx, v40.1);
+                            if let Some(v105) = v104 {
+                                let v106 = &C::inst_data(ctx, v105);
+                                if let &InstructionData::Load {
+                                    opcode: ref v107,
+                                    arg: v108,
+                                    flags: v109,
+                                    offset: v110,
+                                } = v106
+                                {
+                                    match v107 {
+                                        &Opcode::Load => {
+                                            let v111 = C::bigendian(ctx, v109);
+                                            if let Some(v112) = v111 {
+                                                let v101 = C::value_type(ctx, v40.1);
+                                                let v102 = C::ty_32_or_64(ctx, v101);
+                                                if let Some(v103) = v102 {
+                                                    let v63 = C::put_in_reg(ctx, v40.0);
+                                                    let v113 = &constructor_sink_load(ctx, v105);
+                                                    let v114 =
+                                                        constructor_add_mem(ctx, v62, v63, v113);
+                                                    let v115 = constructor_output_reg(ctx, v114);
+                                                    // Rule at src/isa/s390x/lower.isle line 87.
+                                                    return Some(v115);
+                                                }
+                                                if v101 == I16 {
+                                                    let v63 = C::put_in_reg(ctx, v40.0);
+                                                    let v113 = &constructor_sink_load(ctx, v105);
+                                                    let v131 = constructor_add_mem_sext16(
+                                                        ctx, v62, v63, v113,
+                                                    );
+                                                    let v132 = constructor_output_reg(ctx, v131);
+                                                    // Rule at src/isa/s390x/lower.isle line 93.
+                                                    return Some(v132);
+                                                }
+                                            }
+                                        }
+                                        &Opcode::Sload16 => {
+                                            let v111 = C::bigendian(ctx, v109);
+                                            if let Some(v112) = v111 {
+                                                let v63 = C::put_in_reg(ctx, v40.0);
+                                                let v135 = &constructor_sink_sload16(ctx, v105);
+                                                let v136 =
+                                                    constructor_add_mem_sext16(ctx, v62, v63, v135);
+                                                let v137 = constructor_output_reg(ctx, v136);
+                                                // Rule at src/isa/s390x/lower.isle line 99.
+                                                return Some(v137);
+                                            }
+                                        }
+                                        &Opcode::Sload32 => {
+                                            let v111 = C::bigendian(ctx, v109);
+                                            if let Some(v112) = v111 {
+                                                let v63 = C::put_in_reg(ctx, v40.0);
+                                                let v141 = &constructor_sink_sload32(ctx, v105);
+                                                let v142 =
+                                                    constructor_add_mem_sext32(ctx, v62, v63, v141);
+                                                let v143 = constructor_output_reg(ctx, v142);
+                                                // Rule at src/isa/s390x/lower.isle line 103.
+                                                return Some(v143);
+                                            }
+                                        }
+                                        _ => {}
+                                    }
+                                }
+                            }
+                        }
+                        let v36 = C::vr128_ty(ctx, v3);
+                        if let Some(v37) = v36 {
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v63 = C::put_in_reg(ctx, v40.0);
+                            let v64 = C::put_in_reg(ctx, v40.1);
+                            let v147 = constructor_vec_add(ctx, v37, v63, v64);
+                            let v148 = constructor_output_reg(ctx, v147);
+                            // Rule at src/isa/s390x/lower.isle line 109.
+                            return Some(v148);
+                        }
+                        if let Some(v62) = v61 {
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v63 = C::put_in_reg(ctx, v40.0);
+                            let v64 = C::put_in_reg(ctx, v40.1);
+                            let v65 = constructor_add_reg(ctx, v62, v63, v64);
+                            let v66 = constructor_output_reg(ctx, v65);
+                            // Rule at src/isa/s390x/lower.isle line 67.
+                            return Some(v66);
+                        }
+                    }
+                }
+                &Opcode::Isub => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v61 = C::fits_in_64(ctx, v3);
+                        if let Some(v62) = v61 {
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v67 = C::def_inst(ctx, v40.1);
+                            if let Some(v68) = v67 {
+                                let v69 = &C::inst_data(ctx, v68);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v70,
+                                    arg: v71,
+                                } = v69
+                                {
+                                    if let &Opcode::Sextend = v70 {
+                                        let v72 = C::value_type(ctx, v71);
+                                        if v72 == I32 {
+                                            let v63 = C::put_in_reg(ctx, v40.0);
+                                            let v73 = C::put_in_reg(ctx, v71);
+                                            let v228 =
+                                                constructor_sub_reg_sext32(ctx, v62, v63, v73);
+                                            let v229 = constructor_output_reg(ctx, v228);
+                                            // Rule at src/isa/s390x/lower.isle line 157.
+                                            return Some(v229);
+                                        }
+                                    }
+                                }
+                            }
+                            let v230 = C::i16_from_negated_value(ctx, v40.1);
+                            if let Some(v231) = v230 {
+                                let v63 = C::put_in_reg(ctx, v40.0);
+                                let v232 = constructor_add_simm16(ctx, v62, v63, v231);
+                                let v233 = constructor_output_reg(ctx, v232);
+                                // Rule at src/isa/s390x/lower.isle line 161.
+                                return Some(v233);
+                            }
+                            let v234 = C::i32_from_negated_value(ctx, v40.1);
+                            if let Some(v235) = v234 {
+                                let v63 = C::put_in_reg(ctx, v40.0);
+                                let v236 = constructor_add_simm32(ctx, v62, v63, v235);
+                                let v237 = constructor_output_reg(ctx, v236);
+                                // Rule at src/isa/s390x/lower.isle line 163.
+                                return Some(v237);
+                            }
+                            let v104 = C::sinkable_inst(ctx, v40.1);
+                            if let Some(v105) = v104 {
+                                let v106 = &C::inst_data(ctx, v105);
+                                if let &InstructionData::Load {
+                                    opcode: ref v107,
+                                    arg: v108,
+                                    flags: v109,
+                                    offset: v110,
+                                } = v106
+                                {
+                                    match v107 {
+                                        &Opcode::Load => {
+                                            let v111 = C::bigendian(ctx, v109);
+                                            if let Some(v112) = v111 {
+                                                let v101 = C::value_type(ctx, v40.1);
+                                                let v102 = C::ty_32_or_64(ctx, v101);
+                                                if let Some(v103) = v102 {
+                                                    let v63 = C::put_in_reg(ctx, v40.0);
+                                                    let v113 = &constructor_sink_load(ctx, v105);
+                                                    let v238 =
+                                                        constructor_sub_mem(ctx, v62, v63, v113);
+                                                    let v239 = constructor_output_reg(ctx, v238);
+                                                    // Rule at src/isa/s390x/lower.isle line 167.
+                                                    return Some(v239);
+                                                }
+                                                if v101 == I16 {
+                                                    let v63 = C::put_in_reg(ctx, v40.0);
+                                                    let v113 = &constructor_sink_load(ctx, v105);
+                                                    let v240 = constructor_sub_mem_sext16(
+                                                        ctx, v62, v63, v113,
+                                                    );
+                                                    let v241 = constructor_output_reg(ctx, v240);
+                                                    // Rule at src/isa/s390x/lower.isle line 171.
+                                                    return Some(v241);
+                                                }
+                                            }
+                                        }
+                                        &Opcode::Sload16 => {
+                                            let v111 = C::bigendian(ctx, v109);
+                                            if let Some(v112) = v111 {
+                                                let v63 = C::put_in_reg(ctx, v40.0);
+                                                let v135 = &constructor_sink_sload16(ctx, v105);
+                                                let v242 =
+                                                    constructor_sub_mem_sext16(ctx, v62, v63, v135);
+                                                let v243 = constructor_output_reg(ctx, v242);
+                                                // Rule at src/isa/s390x/lower.isle line 175.
+                                                return Some(v243);
+                                            }
+                                        }
+                                        &Opcode::Sload32 => {
+                                            let v111 = C::bigendian(ctx, v109);
+                                            if let Some(v112) = v111 {
+                                                let v63 = C::put_in_reg(ctx, v40.0);
+                                                let v141 = &constructor_sink_sload32(ctx, v105);
+                                                let v244 =
+                                                    constructor_sub_mem_sext32(ctx, v62, v63, v141);
+                                                let v245 = constructor_output_reg(ctx, v244);
+                                                // Rule at src/isa/s390x/lower.isle line 177.
+                                                return Some(v245);
+                                            }
+                                        }
+                                        _ => {}
+                                    }
+                                }
+                            }
+                        }
+                        let v36 = C::vr128_ty(ctx, v3);
+                        if let Some(v37) = v36 {
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v63 = C::put_in_reg(ctx, v40.0);
+                            let v64 = C::put_in_reg(ctx, v40.1);
+                            let v246 = constructor_vec_sub(ctx, v37, v63, v64);
+                            let v247 = constructor_output_reg(ctx, v246);
+                            // Rule at src/isa/s390x/lower.isle line 181.
+                            return Some(v247);
+                        }
+                        if let Some(v62) = v61 {
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v63 = C::put_in_reg(ctx, v40.0);
+                            let v64 = C::put_in_reg(ctx, v40.1);
+                            let v226 = constructor_sub_reg(ctx, v62, v63, v64);
+                            let v227 = constructor_output_reg(ctx, v226);
+                            // Rule at src/isa/s390x/lower.isle line 153.
+                            return Some(v227);
+                        }
+                    }
+                }
+                &Opcode::Imul => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v61 = C::fits_in_64(ctx, v3);
+                        if let Some(v62) = v61 {
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v76 = C::def_inst(ctx, v40.0);
+                            if let Some(v77) = v76 {
+                                let v78 = &C::inst_data(ctx, v77);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v79,
+                                    arg: v80,
+                                } = v78
+                                {
+                                    if let &Opcode::Sextend = v79 {
+                                        let v81 = C::value_type(ctx, v80);
+                                        if v81 == I32 {
+                                            let v43 = C::put_in_reg(ctx, v40.1);
+                                            let v82 = C::put_in_reg(ctx, v80);
+                                            let v340 =
+                                                constructor_mul_reg_sext32(ctx, v62, v43, v82);
+                                            let v341 = constructor_output_reg(ctx, v340);
+                                            // Rule at src/isa/s390x/lower.isle line 351.
+                                            return Some(v341);
+                                        }
+                                    }
+                                }
+                            }
+                            let v89 = C::i16_from_value(ctx, v40.0);
+                            if let Some(v90) = v89 {
+                                let v43 = C::put_in_reg(ctx, v40.1);
+                                let v344 = constructor_mul_simm16(ctx, v62, v43, v90);
+                                let v345 = constructor_output_reg(ctx, v344);
+                                // Rule at src/isa/s390x/lower.isle line 357.
+                                return Some(v345);
+                            }
+                            let v97 = C::i32_from_value(ctx, v40.0);
+                            if let Some(v98) = v97 {
+                                let v43 = C::put_in_reg(ctx, v40.1);
+                                let v348 = constructor_mul_simm32(ctx, v62, v43, v98);
+                                let v349 = constructor_output_reg(ctx, v348);
+                                // Rule at src/isa/s390x/lower.isle line 361.
+                                return Some(v349);
+                            }
+                            let v119 = C::sinkable_inst(ctx, v40.0);
+                            if let Some(v120) = v119 {
+                                let v121 = &C::inst_data(ctx, v120);
+                                if let &InstructionData::Load {
+                                    opcode: ref v122,
+                                    arg: v123,
+                                    flags: v124,
+                                    offset: v125,
+                                } = v121
+                                {
+                                    match v122 {
+                                        &Opcode::Load => {
+                                            let v126 = C::bigendian(ctx, v124);
+                                            if let Some(v127) = v126 {
+                                                let v116 = C::value_type(ctx, v40.0);
+                                                let v117 = C::ty_32_or_64(ctx, v116);
+                                                if let Some(v118) = v117 {
+                                                    let v43 = C::put_in_reg(ctx, v40.1);
+                                                    let v128 = &constructor_sink_load(ctx, v120);
+                                                    let v352 =
+                                                        constructor_mul_mem(ctx, v62, v43, v128);
+                                                    let v353 = constructor_output_reg(ctx, v352);
+                                                    // Rule at src/isa/s390x/lower.isle line 367.
+                                                    return Some(v353);
+                                                }
+                                                if v116 == I16 {
+                                                    let v43 = C::put_in_reg(ctx, v40.1);
+                                                    let v128 = &constructor_sink_load(ctx, v120);
+                                                    let v356 = constructor_mul_mem_sext16(
+                                                        ctx, v62, v43, v128,
+                                                    );
+                                                    let v357 = constructor_output_reg(ctx, v356);
+                                                    // Rule at src/isa/s390x/lower.isle line 373.
+                                                    return Some(v357);
+                                                }
+                                            }
+                                        }
+                                        &Opcode::Sload16 => {
+                                            let v126 = C::bigendian(ctx, v124);
+                                            if let Some(v127) = v126 {
+                                                let v43 = C::put_in_reg(ctx, v40.1);
+                                                let v138 = &constructor_sink_sload16(ctx, v120);
+                                                let v360 =
+                                                    constructor_mul_mem_sext16(ctx, v62, v43, v138);
+                                                let v361 = constructor_output_reg(ctx, v360);
+                                                // Rule at src/isa/s390x/lower.isle line 379.
+                                                return Some(v361);
+                                            }
+                                        }
+                                        &Opcode::Sload32 => {
+                                            let v126 = C::bigendian(ctx, v124);
+                                            if let Some(v127) = v126 {
+                                                let v43 = C::put_in_reg(ctx, v40.1);
+                                                let v144 = &constructor_sink_sload32(ctx, v120);
+                                                let v364 =
+                                                    constructor_mul_mem_sext32(ctx, v62, v43, v144);
+                                                let v365 = constructor_output_reg(ctx, v364);
+                                                // Rule at src/isa/s390x/lower.isle line 383.
+                                                return Some(v365);
+                                            }
+                                        }
+                                        _ => {}
+                                    }
+                                }
+                            }
+                            let v67 = C::def_inst(ctx, v40.1);
+                            if let Some(v68) = v67 {
+                                let v69 = &C::inst_data(ctx, v68);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v70,
+                                    arg: v71,
+                                } = v69
+                                {
+                                    if let &Opcode::Sextend = v70 {
+                                        let v72 = C::value_type(ctx, v71);
+                                        if v72 == I32 {
+                                            let v63 = C::put_in_reg(ctx, v40.0);
+                                            let v73 = C::put_in_reg(ctx, v71);
+                                            let v338 =
+                                                constructor_mul_reg_sext32(ctx, v62, v63, v73);
+                                            let v339 = constructor_output_reg(ctx, v338);
+                                            // Rule at src/isa/s390x/lower.isle line 349.
+                                            return Some(v339);
+                                        }
+                                    }
+                                }
+                            }
+                            let v85 = C::i16_from_value(ctx, v40.1);
+                            if let Some(v86) = v85 {
+                                let v63 = C::put_in_reg(ctx, v40.0);
+                                let v342 = constructor_mul_simm16(ctx, v62, v63, v86);
+                                let v343 = constructor_output_reg(ctx, v342);
+                                // Rule at src/isa/s390x/lower.isle line 355.
+                                return Some(v343);
+                            }
+                            let v93 = C::i32_from_value(ctx, v40.1);
+                            if let Some(v94) = v93 {
+                                let v63 = C::put_in_reg(ctx, v40.0);
+                                let v346 = constructor_mul_simm32(ctx, v62, v63, v94);
+                                let v347 = constructor_output_reg(ctx, v346);
+                                // Rule at src/isa/s390x/lower.isle line 359.
+                                return Some(v347);
+                            }
+                            let v104 = C::sinkable_inst(ctx, v40.1);
+                            if let Some(v105) = v104 {
+                                let v106 = &C::inst_data(ctx, v105);
+                                if let &InstructionData::Load {
+                                    opcode: ref v107,
+                                    arg: v108,
+                                    flags: v109,
+                                    offset: v110,
+                                } = v106
+                                {
+                                    match v107 {
+                                        &Opcode::Load => {
+                                            let v111 = C::bigendian(ctx, v109);
+                                            if let Some(v112) = v111 {
+                                                let v101 = C::value_type(ctx, v40.1);
+                                                let v102 = C::ty_32_or_64(ctx, v101);
+                                                if let Some(v103) = v102 {
+                                                    let v63 = C::put_in_reg(ctx, v40.0);
+                                                    let v113 = &constructor_sink_load(ctx, v105);
+                                                    let v350 =
+                                                        constructor_mul_mem(ctx, v62, v63, v113);
+                                                    let v351 = constructor_output_reg(ctx, v350);
+                                                    // Rule at src/isa/s390x/lower.isle line 365.
+                                                    return Some(v351);
+                                                }
+                                                if v101 == I16 {
+                                                    let v63 = C::put_in_reg(ctx, v40.0);
+                                                    let v113 = &constructor_sink_load(ctx, v105);
+                                                    let v354 = constructor_mul_mem_sext16(
+                                                        ctx, v62, v63, v113,
+                                                    );
+                                                    let v355 = constructor_output_reg(ctx, v354);
+                                                    // Rule at src/isa/s390x/lower.isle line 371.
+                                                    return Some(v355);
+                                                }
+                                            }
+                                        }
+                                        &Opcode::Sload16 => {
+                                            let v111 = C::bigendian(ctx, v109);
+                                            if let Some(v112) = v111 {
+                                                let v63 = C::put_in_reg(ctx, v40.0);
+                                                let v135 = &constructor_sink_sload16(ctx, v105);
+                                                let v358 =
+                                                    constructor_mul_mem_sext16(ctx, v62, v63, v135);
+                                                let v359 = constructor_output_reg(ctx, v358);
+                                                // Rule at src/isa/s390x/lower.isle line 377.
+                                                return Some(v359);
+                                            }
+                                        }
+                                        &Opcode::Sload32 => {
+                                            let v111 = C::bigendian(ctx, v109);
+                                            if let Some(v112) = v111 {
+                                                let v63 = C::put_in_reg(ctx, v40.0);
+                                                let v141 = &constructor_sink_sload32(ctx, v105);
+                                                let v362 =
+                                                    constructor_mul_mem_sext32(ctx, v62, v63, v141);
+                                                let v363 = constructor_output_reg(ctx, v362);
+                                                // Rule at src/isa/s390x/lower.isle line 381.
+                                                return Some(v363);
+                                            }
+                                        }
+                                        _ => {}
+                                    }
+                                }
+                            }
+                        }
+                        let v36 = C::vr128_ty(ctx, v3);
+                        if let Some(v37) = v36 {
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v63 = C::put_in_reg(ctx, v40.0);
+                            let v64 = C::put_in_reg(ctx, v40.1);
+                            let v366 = constructor_vec_mul_impl(ctx, v37, v63, v64);
+                            let v367 = constructor_output_reg(ctx, v366);
+                            // Rule at src/isa/s390x/lower.isle line 388.
+                            return Some(v367);
+                        }
+                        if let Some(v62) = v61 {
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v63 = C::put_in_reg(ctx, v40.0);
+                            let v64 = C::put_in_reg(ctx, v40.1);
+                            let v336 = constructor_mul_reg(ctx, v62, v63, v64);
+                            let v337 = constructor_output_reg(ctx, v336);
+                            // Rule at src/isa/s390x/lower.isle line 345.
+                            return Some(v337);
+                        }
+                    }
+                }
+                &Opcode::Umulhi => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            I32 => {
+                                let v40 = C::unpack_value_array_2(ctx, v39);
+                                let v375 = constructor_put_in_reg_zext64(ctx, v40.0);
+                                let v376 = constructor_put_in_reg_zext64(ctx, v40.1);
+                                let v378 = constructor_mul_reg(ctx, I64, v375, v376);
+                                let v380 = constructor_lshr_imm(ctx, I64, v378, 0x20);
+                                let v381 = constructor_output_reg(ctx, v380);
+                                // Rule at src/isa/s390x/lower.isle line 429.
+                                return Some(v381);
+                            }
+                            I64 => {
+                                let v40 = C::unpack_value_array_2(ctx, v39);
+                                let v63 = C::put_in_reg(ctx, v40.0);
+                                let v64 = C::put_in_reg(ctx, v40.1);
+                                let v382 = constructor_umul_wide(ctx, v63, v64);
+                                let v383 = C::regpair_hi(ctx, v382);
+                                let v384 = constructor_output_reg(ctx, v383);
+                                // Rule at src/isa/s390x/lower.isle line 436.
+                                return Some(v384);
+                            }
+                            I8X16 => {
+                                let v40 = C::unpack_value_array_2(ctx, v39);
+                                let v63 = C::put_in_reg(ctx, v40.0);
+                                let v64 = C::put_in_reg(ctx, v40.1);
+                                let v385 = constructor_vec_umulhi(ctx, I8X16, v63, v64);
+                                let v386 = constructor_output_reg(ctx, v385);
+                                // Rule at src/isa/s390x/lower.isle line 441.
+                                return Some(v386);
+                            }
+                            I16X8 => {
+                                let v40 = C::unpack_value_array_2(ctx, v39);
+                                let v63 = C::put_in_reg(ctx, v40.0);
+                                let v64 = C::put_in_reg(ctx, v40.1);
+                                let v388 = constructor_vec_umulhi(ctx, I16X8, v63, v64);
+                                let v389 = constructor_output_reg(ctx, v388);
+                                // Rule at src/isa/s390x/lower.isle line 442.
+                                return Some(v389);
+                            }
+                            I32X4 => {
+                                let v40 = C::unpack_value_array_2(ctx, v39);
+                                let v63 = C::put_in_reg(ctx, v40.0);
+                                let v64 = C::put_in_reg(ctx, v40.1);
+                                let v391 = constructor_vec_umulhi(ctx, I32X4, v63, v64);
+                                let v392 = constructor_output_reg(ctx, v391);
+                                // Rule at src/isa/s390x/lower.isle line 443.
+                                return Some(v392);
+                            }
+                            I64X2 => {
+                                let v40 = C::unpack_value_array_2(ctx, v39);
+                                let v63 = C::put_in_reg(ctx, v40.0);
+                                let v53 = C::zero_reg(ctx);
+                                let v393 = constructor_vec_extract_lane(ctx, I64X2, v63, 0x0, v53);
+                                let v394 = C::put_in_reg(ctx, v40.1);
+                                let v395 = C::zero_reg(ctx);
+                                let v396 =
+                                    constructor_vec_extract_lane(ctx, I64X2, v394, 0x0, v395);
+                                let v397 = constructor_umul_wide(ctx, v393, v396);
+                                let v398 = C::regpair_hi(ctx, v397);
+                                let v164 = C::put_in_reg(ctx, v40.0);
+                                let v399 = C::zero_reg(ctx);
+                                let v400 =
+                                    constructor_vec_extract_lane(ctx, I64X2, v164, 0x1, v399);
+                                let v401 = C::put_in_reg(ctx, v40.1);
+                                let v402 = C::zero_reg(ctx);
+                                let v403 =
+                                    constructor_vec_extract_lane(ctx, I64X2, v401, 0x1, v402);
+                                let v404 = constructor_umul_wide(ctx, v400, v403);
+                                let v405 = C::regpair_hi(ctx, v404);
+                                let v406 = constructor_mov_to_vec128(ctx, I64X2, v398, v405);
+                                let v407 = constructor_output_reg(ctx, v406);
+                                // Rule at src/isa/s390x/lower.isle line 447.
+                                return Some(v407);
+                            }
+                            _ => {}
+                        }
+                        let v368 = C::ty_8_or_16(ctx, v3);
+                        if let Some(v369) = v368 {
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v287 = constructor_put_in_reg_zext32(ctx, v40.0);
+                            let v288 = constructor_put_in_reg_zext32(ctx, v40.1);
+                            let v371 = constructor_mul_reg(ctx, I32, v287, v288);
+                            let v372 = C::ty_bits(ctx, v369);
+                            let v373 = constructor_lshr_imm(ctx, I32, v371, v372);
+                            let v374 = constructor_output_reg(ctx, v373);
+                            // Rule at src/isa/s390x/lower.isle line 422.
+                            return Some(v374);
+                        }
+                    }
+                }
+                &Opcode::Smulhi => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            I32 => {
+                                let v40 = C::unpack_value_array_2(ctx, v39);
+                                let v411 = constructor_put_in_reg_sext64(ctx, v40.0);
+                                let v412 = constructor_put_in_reg_sext64(ctx, v40.1);
+                                let v413 = constructor_mul_reg(ctx, I64, v411, v412);
+                                let v414 = constructor_ashr_imm(ctx, I64, v413, 0x20);
+                                let v415 = constructor_output_reg(ctx, v414);
+                                // Rule at src/isa/s390x/lower.isle line 467.
+                                return Some(v415);
+                            }
+                            I64 => {
+                                let v40 = C::unpack_value_array_2(ctx, v39);
+                                let v63 = C::put_in_reg(ctx, v40.0);
+                                let v64 = C::put_in_reg(ctx, v40.1);
+                                let v416 = constructor_smul_wide(ctx, v63, v64);
+                                let v417 = C::regpair_hi(ctx, v416);
+                                let v418 = constructor_output_reg(ctx, v417);
+                                // Rule at src/isa/s390x/lower.isle line 474.
+                                return Some(v418);
+                            }
+                            I8X16 => {
+                                let v40 = C::unpack_value_array_2(ctx, v39);
+                                let v63 = C::put_in_reg(ctx, v40.0);
+                                let v64 = C::put_in_reg(ctx, v40.1);
+                                let v419 = constructor_vec_smulhi(ctx, I8X16, v63, v64);
+                                let v420 = constructor_output_reg(ctx, v419);
+                                // Rule at src/isa/s390x/lower.isle line 479.
+                                return Some(v420);
+                            }
+                            I16X8 => {
+                                let v40 = C::unpack_value_array_2(ctx, v39);
+                                let v63 = C::put_in_reg(ctx, v40.0);
+                                let v64 = C::put_in_reg(ctx, v40.1);
+                                let v421 = constructor_vec_smulhi(ctx, I16X8, v63, v64);
+                                let v422 = constructor_output_reg(ctx, v421);
+                                // Rule at src/isa/s390x/lower.isle line 480.
+                                return Some(v422);
+                            }
+                            I32X4 => {
+                                let v40 = C::unpack_value_array_2(ctx, v39);
+                                let v63 = C::put_in_reg(ctx, v40.0);
+                                let v64 = C::put_in_reg(ctx, v40.1);
+                                let v423 = constructor_vec_smulhi(ctx, I32X4, v63, v64);
+                                let v424 = constructor_output_reg(ctx, v423);
+                                // Rule at src/isa/s390x/lower.isle line 481.
+                                return Some(v424);
+                            }
+                            I64X2 => {
+                                let v40 = C::unpack_value_array_2(ctx, v39);
+                                let v63 = C::put_in_reg(ctx, v40.0);
+                                let v53 = C::zero_reg(ctx);
+                                let v393 = constructor_vec_extract_lane(ctx, I64X2, v63, 0x0, v53);
+                                let v394 = C::put_in_reg(ctx, v40.1);
+                                let v395 = C::zero_reg(ctx);
+                                let v396 =
+                                    constructor_vec_extract_lane(ctx, I64X2, v394, 0x0, v395);
+                                let v425 = constructor_smul_wide(ctx, v393, v396);
+                                let v426 = C::regpair_hi(ctx, v425);
+                                let v427 = constructor_copy_reg(ctx, I64, v426);
+                                let v428 = C::put_in_reg(ctx, v40.0);
+                                let v429 = C::zero_reg(ctx);
+                                let v430 =
+                                    constructor_vec_extract_lane(ctx, I64X2, v428, 0x1, v429);
+                                let v431 = C::put_in_reg(ctx, v40.1);
+                                let v432 = C::zero_reg(ctx);
+                                let v433 =
+                                    constructor_vec_extract_lane(ctx, I64X2, v431, 0x1, v432);
+                                let v434 = constructor_smul_wide(ctx, v430, v433);
+                                let v435 = C::regpair_hi(ctx, v434);
+                                let v436 = constructor_mov_to_vec128(ctx, I64X2, v427, v435);
+                                let v437 = constructor_output_reg(ctx, v436);
+                                // Rule at src/isa/s390x/lower.isle line 485.
+                                return Some(v437);
+                            }
+                            _ => {}
+                        }
+                        let v368 = C::ty_8_or_16(ctx, v3);
+                        if let Some(v369) = v368 {
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v311 = constructor_put_in_reg_sext32(ctx, v40.0);
+                            let v312 = constructor_put_in_reg_sext32(ctx, v40.1);
+                            let v408 = constructor_mul_reg(ctx, I32, v311, v312);
+                            let v372 = C::ty_bits(ctx, v369);
+                            let v409 = constructor_ashr_imm(ctx, I32, v408, v372);
+                            let v410 = constructor_output_reg(ctx, v409);
+                            // Rule at src/isa/s390x/lower.isle line 460.
+                            return Some(v410);
+                        }
+                    }
+                }
+                &Opcode::SqmulRoundSat => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v149 = C::ty_vec128(ctx, v3);
+                        if let Some(v150) = v149 {
+                            let v156 = constructor_vec_widen_type(ctx, v150);
+                            let v157 = constructor_vec_widen_type(ctx, v150);
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v158 = C::put_in_reg(ctx, v40.0);
+                            let v159 = constructor_vec_unpacks_high(ctx, v150, v158);
+                            let v160 = C::put_in_reg(ctx, v40.1);
+                            let v161 = constructor_vec_unpacks_high(ctx, v150, v160);
+                            let v438 = constructor_sqmul_impl(ctx, v157, v159, v161);
+                            let v163 = constructor_vec_widen_type(ctx, v150);
+                            let v164 = C::put_in_reg(ctx, v40.0);
+                            let v165 = constructor_vec_unpacks_low(ctx, v150, v164);
+                            let v166 = C::put_in_reg(ctx, v40.1);
+                            let v167 = constructor_vec_unpacks_low(ctx, v150, v166);
+                            let v439 = constructor_sqmul_impl(ctx, v163, v165, v167);
+                            let v440 = constructor_vec_pack_ssat(ctx, v156, v438, v439);
+                            let v441 = constructor_output_reg(ctx, v440);
+                            // Rule at src/isa/s390x/lower.isle line 498.
+                            return Some(v441);
+                        }
+                    }
+                }
+                &Opcode::Udiv => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v61 = C::fits_in_64(ctx, v3);
+                        if let Some(v62) = v61 {
+                            let v256 = constructor_ty_ext32(ctx, v62);
+                            let v442 = constructor_imm(ctx, v256, 0x0);
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v443 = constructor_put_in_reg_zext32(ctx, v40.0);
+                            let v444 = C::regpair(ctx, v442, v443);
+                            let v445 = constructor_put_in_reg_zext32(ctx, v40.1);
+                            let v446 = constructor_ty_ext32(ctx, v62);
+                            let v447 = constructor_udivmod(ctx, v446, v444, v445);
+                            let v448 = C::regpair_lo(ctx, v447);
+                            let v449 = constructor_output_reg(ctx, v448);
+                            // Rule at src/isa/s390x/lower.isle line 536.
+                            return Some(v449);
+                        }
+                    }
+                }
+                &Opcode::Sdiv => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v61 = C::fits_in_64(ctx, v3);
+                        if let Some(v62) = v61 {
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v452 = constructor_div_overflow_check_needed(ctx, v40.1);
+                            let v453 = constructor_put_in_reg_sext64(ctx, v40.0);
+                            let v454 = constructor_put_in_reg_sext32(ctx, v40.1);
+                            let v455 = constructor_ty_ext32(ctx, v62);
+                            let v456 = constructor_maybe_trap_if_sdiv_overflow(
+                                ctx, v452, v455, v62, v453, v454,
+                            );
+                            let v457 = constructor_sdivmod(ctx, v455, v453, v454);
+                            let v458 = C::regpair_lo(ctx, v457);
+                            let v459 = constructor_output_reg(ctx, v458);
+                            // Rule at src/isa/s390x/lower.isle line 580.
+                            return Some(v459);
+                        }
+                    }
+                }
+                &Opcode::Urem => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v61 = C::fits_in_64(ctx, v3);
+                        if let Some(v62) = v61 {
+                            let v256 = constructor_ty_ext32(ctx, v62);
+                            let v442 = constructor_imm(ctx, v256, 0x0);
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v443 = constructor_put_in_reg_zext32(ctx, v40.0);
+                            let v444 = C::regpair(ctx, v442, v443);
+                            let v445 = constructor_put_in_reg_zext32(ctx, v40.1);
+                            let v446 = constructor_ty_ext32(ctx, v62);
+                            let v447 = constructor_udivmod(ctx, v446, v444, v445);
+                            let v450 = C::regpair_hi(ctx, v447);
+                            let v451 = constructor_output_reg(ctx, v450);
+                            // Rule at src/isa/s390x/lower.isle line 554.
+                            return Some(v451);
+                        }
+                    }
+                }
+                &Opcode::Srem => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v61 = C::fits_in_64(ctx, v3);
+                        if let Some(v62) = v61 {
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v452 = constructor_div_overflow_check_needed(ctx, v40.1);
+                            let v453 = constructor_put_in_reg_sext64(ctx, v40.0);
+                            let v454 = constructor_put_in_reg_sext32(ctx, v40.1);
+                            let v455 = constructor_ty_ext32(ctx, v62);
+                            let v460 =
+                                constructor_maybe_avoid_srem_overflow(ctx, v452, v455, v453, v454);
+                            let v461 = constructor_sdivmod(ctx, v455, v460, v454);
+                            let v462 = C::regpair_hi(ctx, v461);
+                            let v463 = constructor_output_reg(ctx, v462);
+                            // Rule at src/isa/s390x/lower.isle line 599.
+                            return Some(v463);
+                        }
+                    }
+                }
+                &Opcode::Band => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v36 = C::vr128_ty(ctx, v3);
+                        if let Some(v37) = v36 {
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v76 = C::def_inst(ctx, v40.0);
+                            if let Some(v77) = v76 {
+                                let v78 = &C::inst_data(ctx, v77);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v79,
+                                    arg: v80,
+                                } = v78
+                                {
+                                    if let &Opcode::Bnot = v79 {
+                                        let v43 = C::put_in_reg(ctx, v40.1);
+                                        let v82 = C::put_in_reg(ctx, v80);
+                                        let v675 = constructor_vec_and_not(ctx, v37, v43, v82);
+                                        let v676 = constructor_output_reg(ctx, v675);
+                                        // Rule at src/isa/s390x/lower.isle line 1032.
+                                        return Some(v676);
+                                    }
+                                }
+                            }
+                            let v67 = C::def_inst(ctx, v40.1);
+                            if let Some(v68) = v67 {
+                                let v69 = &C::inst_data(ctx, v68);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v70,
+                                    arg: v71,
+                                } = v69
+                                {
+                                    if let &Opcode::Bnot = v70 {
+                                        let v63 = C::put_in_reg(ctx, v40.0);
+                                        let v73 = C::put_in_reg(ctx, v71);
+                                        let v673 = constructor_vec_and_not(ctx, v37, v63, v73);
+                                        let v674 = constructor_output_reg(ctx, v673);
+                                        // Rule at src/isa/s390x/lower.isle line 1030.
+                                        return Some(v674);
+                                    }
+                                }
+                            }
+                        }
+                        let v61 = C::fits_in_64(ctx, v3);
+                        if let Some(v62) = v61 {
+                            let v624 = C::mie2_enabled(ctx, v3);
+                            if let Some(v625) = v624 {
+                                let v40 = C::unpack_value_array_2(ctx, v39);
+                                let v76 = C::def_inst(ctx, v40.0);
+                                if let Some(v77) = v76 {
+                                    let v78 = &C::inst_data(ctx, v77);
+                                    if let &InstructionData::Unary {
+                                        opcode: ref v79,
+                                        arg: v80,
+                                    } = v78
+                                    {
+                                        if let &Opcode::Bnot = v79 {
+                                            let v43 = C::put_in_reg(ctx, v40.1);
+                                            let v82 = C::put_in_reg(ctx, v80);
+                                            let v671 = constructor_and_not_reg(ctx, v62, v43, v82);
+                                            let v672 = constructor_output_reg(ctx, v671);
+                                            // Rule at src/isa/s390x/lower.isle line 1026.
+                                            return Some(v672);
+                                        }
+                                    }
+                                }
+                                let v67 = C::def_inst(ctx, v40.1);
+                                if let Some(v68) = v67 {
+                                    let v69 = &C::inst_data(ctx, v68);
+                                    if let &InstructionData::Unary {
+                                        opcode: ref v70,
+                                        arg: v71,
+                                    } = v69
+                                    {
+                                        if let &Opcode::Bnot = v70 {
+                                            let v63 = C::put_in_reg(ctx, v40.0);
+                                            let v73 = C::put_in_reg(ctx, v71);
+                                            let v669 = constructor_and_not_reg(ctx, v62, v63, v73);
+                                            let v670 = constructor_output_reg(ctx, v669);
+                                            // Rule at src/isa/s390x/lower.isle line 1024.
+                                            return Some(v670);
+                                        }
+                                    }
+                                }
+                            }
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v651 = C::uimm16shifted_from_inverted_value(ctx, v40.0);
+                            if let Some(v652) = v651 {
+                                let v43 = C::put_in_reg(ctx, v40.1);
+                                let v653 = constructor_and_uimm16shifted(ctx, v62, v43, v652);
+                                let v654 = constructor_output_reg(ctx, v653);
+                                // Rule at src/isa/s390x/lower.isle line 1002.
+                                return Some(v654);
+                            }
+                            let v647 = C::uimm16shifted_from_inverted_value(ctx, v40.1);
+                            if let Some(v648) = v647 {
+                                let v63 = C::put_in_reg(ctx, v40.0);
+                                let v649 = constructor_and_uimm16shifted(ctx, v62, v63, v648);
+                                let v650 = constructor_output_reg(ctx, v649);
+                                // Rule at src/isa/s390x/lower.isle line 1000.
+                                return Some(v650);
+                            }
+                            let v659 = C::uimm32shifted_from_inverted_value(ctx, v40.0);
+                            if let Some(v660) = v659 {
+                                let v43 = C::put_in_reg(ctx, v40.1);
+                                let v661 = constructor_and_uimm32shifted(ctx, v62, v43, v660);
+                                let v662 = constructor_output_reg(ctx, v661);
+                                // Rule at src/isa/s390x/lower.isle line 1006.
+                                return Some(v662);
+                            }
+                            let v655 = C::uimm32shifted_from_inverted_value(ctx, v40.1);
+                            if let Some(v656) = v655 {
+                                let v63 = C::put_in_reg(ctx, v40.0);
+                                let v657 = constructor_and_uimm32shifted(ctx, v62, v63, v656);
+                                let v658 = constructor_output_reg(ctx, v657);
+                                // Rule at src/isa/s390x/lower.isle line 1004.
+                                return Some(v658);
+                            }
+                            let v116 = C::value_type(ctx, v40.0);
+                            let v117 = C::ty_32_or_64(ctx, v116);
+                            if let Some(v118) = v117 {
+                                let v119 = C::sinkable_inst(ctx, v40.0);
+                                if let Some(v120) = v119 {
+                                    let v121 = &C::inst_data(ctx, v120);
+                                    if let &InstructionData::Load {
+                                        opcode: ref v122,
+                                        arg: v123,
+                                        flags: v124,
+                                        offset: v125,
+                                    } = v121
+                                    {
+                                        if let &Opcode::Load = v122 {
+                                            let v126 = C::bigendian(ctx, v124);
+                                            if let Some(v127) = v126 {
+                                                let v43 = C::put_in_reg(ctx, v40.1);
+                                                let v128 = &constructor_sink_load(ctx, v120);
+                                                let v665 = constructor_and_mem(ctx, v62, v43, v128);
+                                                let v666 = constructor_output_reg(ctx, v665);
+                                                // Rule at src/isa/s390x/lower.isle line 1012.
+                                                return Some(v666);
+                                            }
+                                        }
+                                    }
+                                }
+                            }
+                            let v101 = C::value_type(ctx, v40.1);
+                            let v102 = C::ty_32_or_64(ctx, v101);
+                            if let Some(v103) = v102 {
+                                let v104 = C::sinkable_inst(ctx, v40.1);
+                                if let Some(v105) = v104 {
+                                    let v106 = &C::inst_data(ctx, v105);
+                                    if let &InstructionData::Load {
+                                        opcode: ref v107,
+                                        arg: v108,
+                                        flags: v109,
+                                        offset: v110,
+                                    } = v106
+                                    {
+                                        if let &Opcode::Load = v107 {
+                                            let v111 = C::bigendian(ctx, v109);
+                                            if let Some(v112) = v111 {
+                                                let v63 = C::put_in_reg(ctx, v40.0);
+                                                let v113 = &constructor_sink_load(ctx, v105);
+                                                let v663 = constructor_and_mem(ctx, v62, v63, v113);
+                                                let v664 = constructor_output_reg(ctx, v663);
+                                                // Rule at src/isa/s390x/lower.isle line 1010.
+                                                return Some(v664);
+                                            }
+                                        }
+                                    }
+                                }
+                            }
+                        }
+                        if let Some(v37) = v36 {
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v63 = C::put_in_reg(ctx, v40.0);
+                            let v64 = C::put_in_reg(ctx, v40.1);
+                            let v667 = constructor_vec_and(ctx, v37, v63, v64);
+                            let v668 = constructor_output_reg(ctx, v667);
+                            // Rule at src/isa/s390x/lower.isle line 1016.
+                            return Some(v668);
+                        }
+                        if let Some(v62) = v61 {
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v63 = C::put_in_reg(ctx, v40.0);
+                            let v64 = C::put_in_reg(ctx, v40.1);
+                            let v645 = constructor_and_reg(ctx, v62, v63, v64);
+                            let v646 = constructor_output_reg(ctx, v645);
+                            // Rule at src/isa/s390x/lower.isle line 996.
+                            return Some(v646);
+                        }
+                    }
+                }
+                &Opcode::Bor => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v36 = C::vr128_ty(ctx, v3);
+                        if let Some(v37) = v36 {
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v76 = C::def_inst(ctx, v40.0);
+                            if let Some(v77) = v76 {
+                                let v78 = &C::inst_data(ctx, v77);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v79,
+                                    arg: v80,
+                                } = v78
+                                {
+                                    if let &Opcode::Bnot = v79 {
+                                        let v43 = C::put_in_reg(ctx, v40.1);
+                                        let v82 = C::put_in_reg(ctx, v80);
+                                        let v707 = constructor_vec_or_not(ctx, v37, v43, v82);
+                                        let v708 = constructor_output_reg(ctx, v707);
+                                        // Rule at src/isa/s390x/lower.isle line 1074.
+                                        return Some(v708);
+                                    }
+                                }
+                            }
+                            let v67 = C::def_inst(ctx, v40.1);
+                            if let Some(v68) = v67 {
+                                let v69 = &C::inst_data(ctx, v68);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v70,
+                                    arg: v71,
+                                } = v69
+                                {
+                                    if let &Opcode::Bnot = v70 {
+                                        let v63 = C::put_in_reg(ctx, v40.0);
+                                        let v73 = C::put_in_reg(ctx, v71);
+                                        let v705 = constructor_vec_or_not(ctx, v37, v63, v73);
+                                        let v706 = constructor_output_reg(ctx, v705);
+                                        // Rule at src/isa/s390x/lower.isle line 1072.
+                                        return Some(v706);
+                                    }
+                                }
+                            }
+                        }
+                        let v61 = C::fits_in_64(ctx, v3);
+                        if let Some(v62) = v61 {
+                            let v624 = C::mie2_enabled(ctx, v3);
+                            if let Some(v625) = v624 {
+                                let v40 = C::unpack_value_array_2(ctx, v39);
+                                let v76 = C::def_inst(ctx, v40.0);
+                                if let Some(v77) = v76 {
+                                    let v78 = &C::inst_data(ctx, v77);
+                                    if let &InstructionData::Unary {
+                                        opcode: ref v79,
+                                        arg: v80,
+                                    } = v78
+                                    {
+                                        if let &Opcode::Bnot = v79 {
+                                            let v43 = C::put_in_reg(ctx, v40.1);
+                                            let v82 = C::put_in_reg(ctx, v80);
+                                            let v703 = constructor_or_not_reg(ctx, v62, v43, v82);
+                                            let v704 = constructor_output_reg(ctx, v703);
+                                            // Rule at src/isa/s390x/lower.isle line 1068.
+                                            return Some(v704);
+                                        }
+                                    }
+                                }
+                                let v67 = C::def_inst(ctx, v40.1);
+                                if let Some(v68) = v67 {
+                                    let v69 = &C::inst_data(ctx, v68);
+                                    if let &InstructionData::Unary {
+                                        opcode: ref v70,
+                                        arg: v71,
+                                    } = v69
+                                    {
+                                        if let &Opcode::Bnot = v70 {
+                                            let v63 = C::put_in_reg(ctx, v40.0);
+                                            let v73 = C::put_in_reg(ctx, v71);
+                                            let v701 = constructor_or_not_reg(ctx, v62, v63, v73);
+                                            let v702 = constructor_output_reg(ctx, v701);
+                                            // Rule at src/isa/s390x/lower.isle line 1066.
+                                            return Some(v702);
+                                        }
+                                    }
+                                }
+                            }
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v683 = C::uimm16shifted_from_value(ctx, v40.0);
+                            if let Some(v684) = v683 {
+                                let v43 = C::put_in_reg(ctx, v40.1);
+                                let v685 = constructor_or_uimm16shifted(ctx, v62, v43, v684);
+                                let v686 = constructor_output_reg(ctx, v685);
+                                // Rule at src/isa/s390x/lower.isle line 1044.
+                                return Some(v686);
+                            }
+                            let v679 = C::uimm16shifted_from_value(ctx, v40.1);
+                            if let Some(v680) = v679 {
+                                let v63 = C::put_in_reg(ctx, v40.0);
+                                let v681 = constructor_or_uimm16shifted(ctx, v62, v63, v680);
+                                let v682 = constructor_output_reg(ctx, v681);
+                                // Rule at src/isa/s390x/lower.isle line 1042.
+                                return Some(v682);
+                            }
+                            let v691 = C::uimm32shifted_from_value(ctx, v40.0);
+                            if let Some(v692) = v691 {
+                                let v43 = C::put_in_reg(ctx, v40.1);
+                                let v693 = constructor_or_uimm32shifted(ctx, v62, v43, v692);
+                                let v694 = constructor_output_reg(ctx, v693);
+                                // Rule at src/isa/s390x/lower.isle line 1048.
+                                return Some(v694);
+                            }
+                            let v687 = C::uimm32shifted_from_value(ctx, v40.1);
+                            if let Some(v688) = v687 {
+                                let v63 = C::put_in_reg(ctx, v40.0);
+                                let v689 = constructor_or_uimm32shifted(ctx, v62, v63, v688);
+                                let v690 = constructor_output_reg(ctx, v689);
+                                // Rule at src/isa/s390x/lower.isle line 1046.
+                                return Some(v690);
+                            }
+                            let v116 = C::value_type(ctx, v40.0);
+                            let v117 = C::ty_32_or_64(ctx, v116);
+                            if let Some(v118) = v117 {
+                                let v119 = C::sinkable_inst(ctx, v40.0);
+                                if let Some(v120) = v119 {
+                                    let v121 = &C::inst_data(ctx, v120);
+                                    if let &InstructionData::Load {
+                                        opcode: ref v122,
+                                        arg: v123,
+                                        flags: v124,
+                                        offset: v125,
+                                    } = v121
+                                    {
+                                        if let &Opcode::Load = v122 {
+                                            let v126 = C::bigendian(ctx, v124);
+                                            if let Some(v127) = v126 {
+                                                let v43 = C::put_in_reg(ctx, v40.1);
+                                                let v128 = &constructor_sink_load(ctx, v120);
+                                                let v697 = constructor_or_mem(ctx, v62, v43, v128);
+                                                let v698 = constructor_output_reg(ctx, v697);
+                                                // Rule at src/isa/s390x/lower.isle line 1054.
+                                                return Some(v698);
+                                            }
+                                        }
+                                    }
+                                }
+                            }
+                            let v101 = C::value_type(ctx, v40.1);
+                            let v102 = C::ty_32_or_64(ctx, v101);
+                            if let Some(v103) = v102 {
+                                let v104 = C::sinkable_inst(ctx, v40.1);
+                                if let Some(v105) = v104 {
+                                    let v106 = &C::inst_data(ctx, v105);
+                                    if let &InstructionData::Load {
+                                        opcode: ref v107,
+                                        arg: v108,
+                                        flags: v109,
+                                        offset: v110,
+                                    } = v106
+                                    {
+                                        if let &Opcode::Load = v107 {
+                                            let v111 = C::bigendian(ctx, v109);
+                                            if let Some(v112) = v111 {
+                                                let v63 = C::put_in_reg(ctx, v40.0);
+                                                let v113 = &constructor_sink_load(ctx, v105);
+                                                let v695 = constructor_or_mem(ctx, v62, v63, v113);
+                                                let v696 = constructor_output_reg(ctx, v695);
+                                                // Rule at src/isa/s390x/lower.isle line 1052.
+                                                return Some(v696);
+                                            }
+                                        }
+                                    }
+                                }
+                            }
+                        }
+                        if let Some(v37) = v36 {
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v63 = C::put_in_reg(ctx, v40.0);
+                            let v64 = C::put_in_reg(ctx, v40.1);
+                            let v699 = constructor_vec_or(ctx, v37, v63, v64);
+                            let v700 = constructor_output_reg(ctx, v699);
+                            // Rule at src/isa/s390x/lower.isle line 1058.
+                            return Some(v700);
+                        }
+                        if let Some(v62) = v61 {
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v63 = C::put_in_reg(ctx, v40.0);
+                            let v64 = C::put_in_reg(ctx, v40.1);
+                            let v677 = constructor_or_reg(ctx, v62, v63, v64);
+                            let v678 = constructor_output_reg(ctx, v677);
+                            // Rule at src/isa/s390x/lower.isle line 1038.
+                            return Some(v678);
+                        }
+                    }
+                }
+                &Opcode::Bxor => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v36 = C::vr128_ty(ctx, v3);
+                        if let Some(v37) = v36 {
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v76 = C::def_inst(ctx, v40.0);
+                            if let Some(v77) = v76 {
+                                let v78 = &C::inst_data(ctx, v77);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v79,
+                                    arg: v80,
+                                } = v78
+                                {
+                                    if let &Opcode::Bnot = v79 {
+                                        let v43 = C::put_in_reg(ctx, v40.1);
+                                        let v82 = C::put_in_reg(ctx, v80);
+                                        let v727 = constructor_vec_not_xor(ctx, v37, v43, v82);
+                                        let v728 = constructor_output_reg(ctx, v727);
+                                        // Rule at src/isa/s390x/lower.isle line 1113.
+                                        return Some(v728);
+                                    }
+                                }
+                            }
+                            let v67 = C::def_inst(ctx, v40.1);
+                            if let Some(v68) = v67 {
+                                let v69 = &C::inst_data(ctx, v68);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v70,
+                                    arg: v71,
+                                } = v69
+                                {
+                                    if let &Opcode::Bnot = v70 {
+                                        let v63 = C::put_in_reg(ctx, v40.0);
+                                        let v73 = C::put_in_reg(ctx, v71);
+                                        let v725 = constructor_vec_not_xor(ctx, v37, v63, v73);
+                                        let v726 = constructor_output_reg(ctx, v725);
+                                        // Rule at src/isa/s390x/lower.isle line 1111.
+                                        return Some(v726);
+                                    }
+                                }
+                            }
+                        }
+                        let v61 = C::fits_in_64(ctx, v3);
+                        if let Some(v62) = v61 {
+                            let v624 = C::mie2_enabled(ctx, v3);
+                            if let Some(v625) = v624 {
+                                let v40 = C::unpack_value_array_2(ctx, v39);
+                                let v76 = C::def_inst(ctx, v40.0);
+                                if let Some(v77) = v76 {
+                                    let v78 = &C::inst_data(ctx, v77);
+                                    if let &InstructionData::Unary {
+                                        opcode: ref v79,
+                                        arg: v80,
+                                    } = v78
+                                    {
+                                        if let &Opcode::Bnot = v79 {
+                                            let v43 = C::put_in_reg(ctx, v40.1);
+                                            let v82 = C::put_in_reg(ctx, v80);
+                                            let v723 = constructor_not_xor_reg(ctx, v62, v43, v82);
+                                            let v724 = constructor_output_reg(ctx, v723);
+                                            // Rule at src/isa/s390x/lower.isle line 1107.
+                                            return Some(v724);
+                                        }
+                                    }
+                                }
+                                let v67 = C::def_inst(ctx, v40.1);
+                                if let Some(v68) = v67 {
+                                    let v69 = &C::inst_data(ctx, v68);
+                                    if let &InstructionData::Unary {
+                                        opcode: ref v70,
+                                        arg: v71,
+                                    } = v69
+                                    {
+                                        if let &Opcode::Bnot = v70 {
+                                            let v63 = C::put_in_reg(ctx, v40.0);
+                                            let v73 = C::put_in_reg(ctx, v71);
+                                            let v721 = constructor_not_xor_reg(ctx, v62, v63, v73);
+                                            let v722 = constructor_output_reg(ctx, v721);
+                                            // Rule at src/isa/s390x/lower.isle line 1105.
+                                            return Some(v722);
+                                        }
+                                    }
+                                }
+                            }
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v691 = C::uimm32shifted_from_value(ctx, v40.0);
+                            if let Some(v692) = v691 {
+                                let v43 = C::put_in_reg(ctx, v40.1);
+                                let v713 = constructor_xor_uimm32shifted(ctx, v62, v43, v692);
+                                let v714 = constructor_output_reg(ctx, v713);
+                                // Rule at src/isa/s390x/lower.isle line 1087.
+                                return Some(v714);
+                            }
+                            let v687 = C::uimm32shifted_from_value(ctx, v40.1);
+                            if let Some(v688) = v687 {
+                                let v63 = C::put_in_reg(ctx, v40.0);
+                                let v711 = constructor_xor_uimm32shifted(ctx, v62, v63, v688);
+                                let v712 = constructor_output_reg(ctx, v711);
+                                // Rule at src/isa/s390x/lower.isle line 1085.
+                                return Some(v712);
+                            }
+                            let v116 = C::value_type(ctx, v40.0);
+                            let v117 = C::ty_32_or_64(ctx, v116);
+                            if let Some(v118) = v117 {
+                                let v119 = C::sinkable_inst(ctx, v40.0);
+                                if let Some(v120) = v119 {
+                                    let v121 = &C::inst_data(ctx, v120);
+                                    if let &InstructionData::Load {
+                                        opcode: ref v122,
+                                        arg: v123,
+                                        flags: v124,
+                                        offset: v125,
+                                    } = v121
+                                    {
+                                        if let &Opcode::Load = v122 {
+                                            let v126 = C::bigendian(ctx, v124);
+                                            if let Some(v127) = v126 {
+                                                let v43 = C::put_in_reg(ctx, v40.1);
+                                                let v128 = &constructor_sink_load(ctx, v120);
+                                                let v717 = constructor_xor_mem(ctx, v62, v43, v128);
+                                                let v718 = constructor_output_reg(ctx, v717);
+                                                // Rule at src/isa/s390x/lower.isle line 1093.
+                                                return Some(v718);
+                                            }
+                                        }
+                                    }
+                                }
+                            }
+                            let v101 = C::value_type(ctx, v40.1);
+                            let v102 = C::ty_32_or_64(ctx, v101);
+                            if let Some(v103) = v102 {
+                                let v104 = C::sinkable_inst(ctx, v40.1);
+                                if let Some(v105) = v104 {
+                                    let v106 = &C::inst_data(ctx, v105);
+                                    if let &InstructionData::Load {
+                                        opcode: ref v107,
+                                        arg: v108,
+                                        flags: v109,
+                                        offset: v110,
+                                    } = v106
+                                    {
+                                        if let &Opcode::Load = v107 {
+                                            let v111 = C::bigendian(ctx, v109);
+                                            if let Some(v112) = v111 {
+                                                let v63 = C::put_in_reg(ctx, v40.0);
+                                                let v113 = &constructor_sink_load(ctx, v105);
+                                                let v715 = constructor_xor_mem(ctx, v62, v63, v113);
+                                                let v716 = constructor_output_reg(ctx, v715);
+                                                // Rule at src/isa/s390x/lower.isle line 1091.
+                                                return Some(v716);
+                                            }
+                                        }
+                                    }
+                                }
+                            }
+                        }
+                        if let Some(v37) = v36 {
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v63 = C::put_in_reg(ctx, v40.0);
+                            let v64 = C::put_in_reg(ctx, v40.1);
+                            let v719 = constructor_vec_xor(ctx, v37, v63, v64);
+                            let v720 = constructor_output_reg(ctx, v719);
+                            // Rule at src/isa/s390x/lower.isle line 1097.
+                            return Some(v720);
+                        }
+                        if let Some(v62) = v61 {
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v63 = C::put_in_reg(ctx, v40.0);
+                            let v64 = C::put_in_reg(ctx, v40.1);
+                            let v709 = constructor_xor_reg(ctx, v62, v63, v64);
+                            let v710 = constructor_output_reg(ctx, v709);
+                            // Rule at src/isa/s390x/lower.isle line 1081.
+                            return Some(v710);
+                        }
+                    }
+                }
+                &Opcode::Rotl => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        if v3 == I128 {
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v63 = C::put_in_reg(ctx, v40.0);
+                            let v535 = constructor_amt_vr(ctx, v40.1);
+                            let v536 = constructor_vec_neg(ctx, I8X16, v535);
+                            let v537 = constructor_vec_lshl_by_byte(ctx, v63, v535);
+                            let v538 = constructor_vec_lshl_by_bit(ctx, v537, v535);
+                            let v539 = constructor_vec_lshr_by_byte(ctx, v63, v536);
+                            let v540 = constructor_vec_lshr_by_bit(ctx, v539, v536);
+                            let v541 = constructor_vec_or(ctx, I128, v538, v540);
+                            let v542 = constructor_output_reg(ctx, v541);
+                            // Rule at src/isa/s390x/lower.isle line 808.
+                            return Some(v542);
+                        }
+                        let v149 = C::ty_vec128(ctx, v3);
+                        if let Some(v150) = v149 {
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v468 = C::i64_from_value(ctx, v40.1);
+                            if let Some(v469) = v468 {
+                                let v476 = C::mask_amt_imm(ctx, v150, v469);
+                                let v44 = C::put_in_reg(ctx, v40.0);
+                                let v533 = constructor_vec_rot_imm(ctx, v150, v44, v476);
+                                let v534 = constructor_output_reg(ctx, v533);
+                                // Rule at src/isa/s390x/lower.isle line 802.
+                                return Some(v534);
+                            }
+                            let v63 = C::put_in_reg(ctx, v40.0);
+                            let v473 = constructor_amt_reg(ctx, v40.1);
+                            let v531 = constructor_vec_rot_reg(ctx, v150, v63, v473);
+                            let v532 = constructor_output_reg(ctx, v531);
+                            // Rule at src/isa/s390x/lower.isle line 798.
+                            return Some(v532);
+                        }
+                        let v368 = C::ty_8_or_16(ctx, v3);
+                        if let Some(v369) = v368 {
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v468 = C::i64_from_value(ctx, v40.1);
+                            if let Some(v469) = v468 {
+                                let v523 = C::i64_from_negated_value(ctx, v40.1);
+                                if let Some(v524) = v523 {
+                                    let v287 = constructor_put_in_reg_zext32(ctx, v40.0);
+                                    let v514 = constructor_ty_ext32(ctx, v369);
+                                    let v525 = C::mask_amt_imm(ctx, v369, v469);
+                                    let v526 = C::mask_amt_imm(ctx, v369, v524);
+                                    let v527 = constructor_lshl_imm(ctx, v514, v287, v525);
+                                    let v528 = constructor_lshr_imm(ctx, v514, v287, v526);
+                                    let v529 = constructor_or_reg(ctx, v369, v527, v528);
+                                    let v530 = constructor_output_reg(ctx, v529);
+                                    // Rule at src/isa/s390x/lower.isle line 788.
+                                    return Some(v530);
+                                }
+                            }
+                            let v287 = constructor_put_in_reg_zext32(ctx, v40.0);
+                            let v514 = constructor_ty_ext32(ctx, v369);
+                            let v515 = constructor_amt_reg(ctx, v40.1);
+                            let v516 = constructor_neg_reg(ctx, I32, v515);
+                            let v517 = constructor_mask_amt_reg(ctx, v369, v515);
+                            let v518 = constructor_mask_amt_reg(ctx, v369, v516);
+                            let v519 = constructor_lshl_reg(ctx, v514, v287, v517);
+                            let v520 = constructor_lshr_reg(ctx, v514, v287, v518);
+                            let v521 = constructor_or_reg(ctx, v369, v519, v520);
+                            let v522 = constructor_output_reg(ctx, v521);
+                            // Rule at src/isa/s390x/lower.isle line 776.
+                            return Some(v522);
+                        }
+                        let v507 = C::ty_32_or_64(ctx, v3);
+                        if let Some(v508) = v507 {
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v468 = C::i64_from_value(ctx, v40.1);
+                            if let Some(v469) = v468 {
+                                let v511 = C::mask_amt_imm(ctx, v508, v469);
+                                let v44 = C::put_in_reg(ctx, v40.0);
+                                let v512 = constructor_rot_imm(ctx, v508, v44, v511);
+                                let v513 = constructor_output_reg(ctx, v512);
+                                // Rule at src/isa/s390x/lower.isle line 770.
+                                return Some(v513);
+                            }
+                            let v63 = C::put_in_reg(ctx, v40.0);
+                            let v473 = constructor_amt_reg(ctx, v40.1);
+                            let v509 = constructor_rot_reg(ctx, v508, v63, v473);
+                            let v510 = constructor_output_reg(ctx, v509);
+                            // Rule at src/isa/s390x/lower.isle line 766.
+                            return Some(v510);
+                        }
+                    }
+                }
+                &Opcode::Rotr => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        if v3 == I128 {
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v63 = C::put_in_reg(ctx, v40.0);
+                            let v535 = constructor_amt_vr(ctx, v40.1);
+                            let v536 = constructor_vec_neg(ctx, I8X16, v535);
+                            let v562 = constructor_vec_lshl_by_byte(ctx, v63, v536);
+                            let v563 = constructor_vec_lshl_by_bit(ctx, v562, v536);
+                            let v564 = constructor_vec_lshr_by_byte(ctx, v63, v535);
+                            let v565 = constructor_vec_lshr_by_bit(ctx, v564, v535);
+                            let v566 = constructor_vec_or(ctx, I128, v563, v565);
+                            let v567 = constructor_output_reg(ctx, v566);
+                            // Rule at src/isa/s390x/lower.isle line 868.
+                            return Some(v567);
+                        }
+                        let v149 = C::ty_vec128(ctx, v3);
+                        if let Some(v150) = v149 {
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v523 = C::i64_from_negated_value(ctx, v40.1);
+                            if let Some(v524) = v523 {
+                                let v559 = C::mask_amt_imm(ctx, v150, v524);
+                                let v44 = C::put_in_reg(ctx, v40.0);
+                                let v560 = constructor_vec_rot_imm(ctx, v150, v44, v559);
+                                let v561 = constructor_output_reg(ctx, v560);
+                                // Rule at src/isa/s390x/lower.isle line 862.
+                                return Some(v561);
+                            }
+                            let v464 = constructor_amt_reg(ctx, v40.1);
+                            let v543 = constructor_neg_reg(ctx, I32, v464);
+                            let v158 = C::put_in_reg(ctx, v40.0);
+                            let v557 = constructor_vec_rot_reg(ctx, v150, v158, v543);
+                            let v558 = constructor_output_reg(ctx, v557);
+                            // Rule at src/isa/s390x/lower.isle line 856.
+                            return Some(v558);
+                        }
+                        let v368 = C::ty_8_or_16(ctx, v3);
+                        if let Some(v369) = v368 {
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v468 = C::i64_from_value(ctx, v40.1);
+                            if let Some(v469) = v468 {
+                                let v523 = C::i64_from_negated_value(ctx, v40.1);
+                                if let Some(v524) = v523 {
+                                    let v287 = constructor_put_in_reg_zext32(ctx, v40.0);
+                                    let v514 = constructor_ty_ext32(ctx, v369);
+                                    let v525 = C::mask_amt_imm(ctx, v369, v469);
+                                    let v526 = C::mask_amt_imm(ctx, v369, v524);
+                                    let v553 = constructor_lshl_imm(ctx, v514, v287, v526);
+                                    let v554 = constructor_lshr_imm(ctx, v514, v287, v525);
+                                    let v555 = constructor_or_reg(ctx, v369, v553, v554);
+                                    let v556 = constructor_output_reg(ctx, v555);
+                                    // Rule at src/isa/s390x/lower.isle line 845.
+                                    return Some(v556);
+                                }
+                            }
+                            let v287 = constructor_put_in_reg_zext32(ctx, v40.0);
+                            let v514 = constructor_ty_ext32(ctx, v369);
+                            let v515 = constructor_amt_reg(ctx, v40.1);
+                            let v516 = constructor_neg_reg(ctx, I32, v515);
+                            let v517 = constructor_mask_amt_reg(ctx, v369, v515);
+                            let v518 = constructor_mask_amt_reg(ctx, v369, v516);
+                            let v549 = constructor_lshl_reg(ctx, v514, v287, v518);
+                            let v550 = constructor_lshr_reg(ctx, v514, v287, v517);
+                            let v551 = constructor_or_reg(ctx, v369, v549, v550);
+                            let v552 = constructor_output_reg(ctx, v551);
+                            // Rule at src/isa/s390x/lower.isle line 833.
+                            return Some(v552);
+                        }
+                        let v507 = C::ty_32_or_64(ctx, v3);
+                        if let Some(v508) = v507 {
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v523 = C::i64_from_negated_value(ctx, v40.1);
+                            if let Some(v524) = v523 {
+                                let v546 = C::mask_amt_imm(ctx, v508, v524);
+                                let v44 = C::put_in_reg(ctx, v40.0);
+                                let v547 = constructor_rot_imm(ctx, v508, v44, v546);
+                                let v548 = constructor_output_reg(ctx, v547);
+                                // Rule at src/isa/s390x/lower.isle line 827.
+                                return Some(v548);
+                            }
+                            let v464 = constructor_amt_reg(ctx, v40.1);
+                            let v543 = constructor_neg_reg(ctx, I32, v464);
+                            let v158 = C::put_in_reg(ctx, v40.0);
+                            let v544 = constructor_rot_reg(ctx, v508, v158, v543);
+                            let v545 = constructor_output_reg(ctx, v544);
+                            // Rule at src/isa/s390x/lower.isle line 821.
+                            return Some(v545);
+                        }
+                    }
+                }
+                &Opcode::Ishl => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        if v3 == I128 {
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v479 = constructor_amt_vr(ctx, v40.1);
+                            let v44 = C::put_in_reg(ctx, v40.0);
+                            let v480 = constructor_vec_lshl_by_byte(ctx, v44, v479);
+                            let v481 = constructor_vec_lshl_by_bit(ctx, v480, v479);
+                            let v482 = constructor_output_reg(ctx, v481);
+                            // Rule at src/isa/s390x/lower.isle line 696.
+                            return Some(v482);
+                        }
+                        let v149 = C::ty_vec128(ctx, v3);
+                        if let Some(v150) = v149 {
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v468 = C::i64_from_value(ctx, v40.1);
+                            if let Some(v469) = v468 {
+                                let v476 = C::mask_amt_imm(ctx, v150, v469);
+                                let v44 = C::put_in_reg(ctx, v40.0);
+                                let v477 = constructor_vec_lshl_imm(ctx, v150, v44, v476);
+                                let v478 = constructor_output_reg(ctx, v477);
+                                // Rule at src/isa/s390x/lower.isle line 691.
+                                return Some(v478);
+                            }
+                            let v63 = C::put_in_reg(ctx, v40.0);
+                            let v473 = constructor_amt_reg(ctx, v40.1);
+                            let v474 = constructor_vec_lshl_reg(ctx, v150, v63, v473);
+                            let v475 = constructor_output_reg(ctx, v474);
+                            // Rule at src/isa/s390x/lower.isle line 687.
+                            return Some(v475);
+                        }
+                        let v61 = C::fits_in_64(ctx, v3);
+                        if let Some(v62) = v61 {
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v468 = C::i64_from_value(ctx, v40.1);
+                            if let Some(v469) = v468 {
+                                let v470 = C::mask_amt_imm(ctx, v62, v469);
+                                let v44 = C::put_in_reg(ctx, v40.0);
+                                let v471 = constructor_lshl_imm(ctx, v62, v44, v470);
+                                let v472 = constructor_output_reg(ctx, v471);
+                                // Rule at src/isa/s390x/lower.isle line 682.
+                                return Some(v472);
+                            }
+                            let v464 = constructor_amt_reg(ctx, v40.1);
+                            let v465 = constructor_mask_amt_reg(ctx, v62, v464);
+                            let v158 = C::put_in_reg(ctx, v40.0);
+                            let v466 = constructor_lshl_reg(ctx, v62, v158, v465);
+                            let v467 = constructor_output_reg(ctx, v466);
+                            // Rule at src/isa/s390x/lower.isle line 677.
+                            return Some(v467);
+                        }
+                    }
+                }
+                &Opcode::Ushr => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        if v3 == I128 {
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v479 = constructor_amt_vr(ctx, v40.1);
+                            let v44 = C::put_in_reg(ctx, v40.0);
+                            let v493 = constructor_vec_lshr_by_byte(ctx, v44, v479);
+                            let v494 = constructor_vec_lshr_by_bit(ctx, v493, v479);
+                            let v495 = constructor_output_reg(ctx, v494);
+                            // Rule at src/isa/s390x/lower.isle line 727.
+                            return Some(v495);
+                        }
+                        let v149 = C::ty_vec128(ctx, v3);
+                        if let Some(v150) = v149 {
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v468 = C::i64_from_value(ctx, v40.1);
+                            if let Some(v469) = v468 {
+                                let v476 = C::mask_amt_imm(ctx, v150, v469);
+                                let v44 = C::put_in_reg(ctx, v40.0);
+                                let v491 = constructor_vec_lshr_imm(ctx, v150, v44, v476);
+                                let v492 = constructor_output_reg(ctx, v491);
+                                // Rule at src/isa/s390x/lower.isle line 722.
+                                return Some(v492);
+                            }
+                            let v63 = C::put_in_reg(ctx, v40.0);
+                            let v473 = constructor_amt_reg(ctx, v40.1);
+                            let v489 = constructor_vec_lshr_reg(ctx, v150, v63, v473);
+                            let v490 = constructor_output_reg(ctx, v489);
+                            // Rule at src/isa/s390x/lower.isle line 718.
+                            return Some(v490);
+                        }
+                        let v61 = C::fits_in_64(ctx, v3);
+                        if let Some(v62) = v61 {
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v468 = C::i64_from_value(ctx, v40.1);
+                            if let Some(v469) = v468 {
+                                let v287 = constructor_put_in_reg_zext32(ctx, v40.0);
+                                let v486 = C::mask_amt_imm(ctx, v62, v469);
+                                let v289 = constructor_ty_ext32(ctx, v62);
+                                let v487 = constructor_lshr_imm(ctx, v289, v287, v486);
+                                let v488 = constructor_output_reg(ctx, v487);
+                                // Rule at src/isa/s390x/lower.isle line 712.
+                                return Some(v488);
+                            }
+                            let v287 = constructor_put_in_reg_zext32(ctx, v40.0);
+                            let v473 = constructor_amt_reg(ctx, v40.1);
+                            let v483 = constructor_mask_amt_reg(ctx, v62, v473);
+                            let v455 = constructor_ty_ext32(ctx, v62);
+                            let v484 = constructor_lshr_reg(ctx, v455, v287, v483);
+                            let v485 = constructor_output_reg(ctx, v484);
+                            // Rule at src/isa/s390x/lower.isle line 705.
+                            return Some(v485);
+                        }
+                    }
+                }
+                &Opcode::Sshr => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        if v3 == I128 {
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v479 = constructor_amt_vr(ctx, v40.1);
+                            let v44 = C::put_in_reg(ctx, v40.0);
+                            let v504 = constructor_vec_ashr_by_byte(ctx, v44, v479);
+                            let v505 = constructor_vec_ashr_by_bit(ctx, v504, v479);
+                            let v506 = constructor_output_reg(ctx, v505);
+                            // Rule at src/isa/s390x/lower.isle line 758.
+                            return Some(v506);
+                        }
+                        let v149 = C::ty_vec128(ctx, v3);
+                        if let Some(v150) = v149 {
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v468 = C::i64_from_value(ctx, v40.1);
+                            if let Some(v469) = v468 {
+                                let v476 = C::mask_amt_imm(ctx, v150, v469);
+                                let v44 = C::put_in_reg(ctx, v40.0);
+                                let v502 = constructor_vec_ashr_imm(ctx, v150, v44, v476);
+                                let v503 = constructor_output_reg(ctx, v502);
+                                // Rule at src/isa/s390x/lower.isle line 753.
+                                return Some(v503);
+                            }
+                            let v63 = C::put_in_reg(ctx, v40.0);
+                            let v473 = constructor_amt_reg(ctx, v40.1);
+                            let v500 = constructor_vec_ashr_reg(ctx, v150, v63, v473);
+                            let v501 = constructor_output_reg(ctx, v500);
+                            // Rule at src/isa/s390x/lower.isle line 749.
+                            return Some(v501);
+                        }
+                        let v61 = C::fits_in_64(ctx, v3);
+                        if let Some(v62) = v61 {
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v468 = C::i64_from_value(ctx, v40.1);
+                            if let Some(v469) = v468 {
+                                let v311 = constructor_put_in_reg_sext32(ctx, v40.0);
+                                let v486 = C::mask_amt_imm(ctx, v62, v469);
+                                let v289 = constructor_ty_ext32(ctx, v62);
+                                let v498 = constructor_ashr_imm(ctx, v289, v311, v486);
+                                let v499 = constructor_output_reg(ctx, v498);
+                                // Rule at src/isa/s390x/lower.isle line 743.
+                                return Some(v499);
+                            }
+                            let v311 = constructor_put_in_reg_sext32(ctx, v40.0);
+                            let v473 = constructor_amt_reg(ctx, v40.1);
+                            let v483 = constructor_mask_amt_reg(ctx, v62, v473);
+                            let v455 = constructor_ty_ext32(ctx, v62);
+                            let v496 = constructor_ashr_reg(ctx, v455, v311, v483);
+                            let v497 = constructor_output_reg(ctx, v496);
+                            // Rule at src/isa/s390x/lower.isle line 736.
+                            return Some(v497);
+                        }
+                    }
+                }
+                &Opcode::Fadd => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v40 = C::unpack_value_array_2(ctx, v39);
+                        let v63 = C::put_in_reg(ctx, v40.0);
+                        let v64 = C::put_in_reg(ctx, v40.1);
+                        let v3 = C::value_type(ctx, v2);
+                        let v857 = constructor_fadd_reg(ctx, v3, v63, v64);
+                        let v858 = constructor_output_reg(ctx, v857);
+                        // Rule at src/isa/s390x/lower.isle line 1353.
+                        return Some(v858);
+                    }
+                }
+                &Opcode::Fsub => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v40 = C::unpack_value_array_2(ctx, v39);
+                        let v63 = C::put_in_reg(ctx, v40.0);
+                        let v64 = C::put_in_reg(ctx, v40.1);
+                        let v3 = C::value_type(ctx, v2);
+                        let v859 = constructor_fsub_reg(ctx, v3, v63, v64);
+                        let v860 = constructor_output_reg(ctx, v859);
+                        // Rule at src/isa/s390x/lower.isle line 1360.
+                        return Some(v860);
+                    }
+                }
+                &Opcode::Fmul => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v40 = C::unpack_value_array_2(ctx, v39);
+                        let v63 = C::put_in_reg(ctx, v40.0);
+                        let v64 = C::put_in_reg(ctx, v40.1);
+                        let v3 = C::value_type(ctx, v2);
+                        let v861 = constructor_fmul_reg(ctx, v3, v63, v64);
+                        let v862 = constructor_output_reg(ctx, v861);
+                        // Rule at src/isa/s390x/lower.isle line 1367.
+                        return Some(v862);
+                    }
+                }
+                &Opcode::Fdiv => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v40 = C::unpack_value_array_2(ctx, v39);
+                        let v63 = C::put_in_reg(ctx, v40.0);
+                        let v64 = C::put_in_reg(ctx, v40.1);
+                        let v3 = C::value_type(ctx, v2);
+                        let v863 = constructor_fdiv_reg(ctx, v3, v63, v64);
+                        let v864 = constructor_output_reg(ctx, v863);
+                        // Rule at src/isa/s390x/lower.isle line 1374.
+                        return Some(v864);
+                    }
+                }
+                &Opcode::Fcopysign => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            F32 => {
+                                let v40 = C::unpack_value_array_2(ctx, v39);
+                                let v63 = C::put_in_reg(ctx, v40.0);
+                                let v64 = C::put_in_reg(ctx, v40.1);
+                                let v874 = constructor_imm(ctx, F32, 0x7FFFFFFF);
+                                let v875 = constructor_vec_select(ctx, F32, v63, v64, v874);
+                                let v876 = constructor_output_reg(ctx, v875);
+                                // Rule at src/isa/s390x/lower.isle line 1409.
+                                return Some(v876);
+                            }
+                            F64 => {
+                                let v40 = C::unpack_value_array_2(ctx, v39);
+                                let v63 = C::put_in_reg(ctx, v40.0);
+                                let v64 = C::put_in_reg(ctx, v40.1);
+                                let v878 = constructor_imm(ctx, F64, 0x7FFFFFFFFFFFFFFF);
+                                let v879 = constructor_vec_select(ctx, F64, v63, v64, v878);
+                                let v880 = constructor_output_reg(ctx, v879);
+                                // Rule at src/isa/s390x/lower.isle line 1411.
+                                return Some(v880);
+                            }
+                            F32X4 => {
+                                let v40 = C::unpack_value_array_2(ctx, v39);
+                                let v63 = C::put_in_reg(ctx, v40.0);
+                                let v64 = C::put_in_reg(ctx, v40.1);
+                                let v883 = constructor_vec_imm_bit_mask(ctx, F32X4, 0x1, 0x1F);
+                                let v884 = constructor_vec_select(ctx, F32X4, v63, v64, v883);
+                                let v885 = constructor_output_reg(ctx, v884);
+                                // Rule at src/isa/s390x/lower.isle line 1413.
+                                return Some(v885);
+                            }
+                            F64X2 => {
+                                let v40 = C::unpack_value_array_2(ctx, v39);
+                                let v63 = C::put_in_reg(ctx, v40.0);
+                                let v64 = C::put_in_reg(ctx, v40.1);
+                                let v887 = constructor_vec_imm_bit_mask(ctx, F64X2, 0x1, 0x3F);
+                                let v888 = constructor_vec_select(ctx, F64X2, v63, v64, v887);
+                                let v889 = constructor_output_reg(ctx, v888);
+                                // Rule at src/isa/s390x/lower.isle line 1415.
+                                return Some(v889);
+                            }
+                            _ => {}
+                        }
+                    }
+                }
+                &Opcode::Fmin => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v40 = C::unpack_value_array_2(ctx, v39);
+                        let v63 = C::put_in_reg(ctx, v40.0);
+                        let v64 = C::put_in_reg(ctx, v40.1);
+                        let v3 = C::value_type(ctx, v2);
+                        let v865 = constructor_fmin_reg(ctx, v3, v63, v64);
+                        let v866 = constructor_output_reg(ctx, v865);
+                        // Rule at src/isa/s390x/lower.isle line 1381.
+                        return Some(v866);
+                    }
+                }
+                &Opcode::FminPseudo => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v40 = C::unpack_value_array_2(ctx, v39);
+                        let v63 = C::put_in_reg(ctx, v40.0);
+                        let v64 = C::put_in_reg(ctx, v40.1);
+                        let v3 = C::value_type(ctx, v2);
+                        let v869 = constructor_fmin_pseudo_reg(ctx, v3, v63, v64);
+                        let v870 = constructor_output_reg(ctx, v869);
+                        // Rule at src/isa/s390x/lower.isle line 1395.
+                        return Some(v870);
+                    }
+                }
+                &Opcode::Fmax => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v40 = C::unpack_value_array_2(ctx, v39);
+                        let v63 = C::put_in_reg(ctx, v40.0);
+                        let v64 = C::put_in_reg(ctx, v40.1);
+                        let v3 = C::value_type(ctx, v2);
+                        let v867 = constructor_fmax_reg(ctx, v3, v63, v64);
+                        let v868 = constructor_output_reg(ctx, v867);
+                        // Rule at src/isa/s390x/lower.isle line 1388.
+                        return Some(v868);
+                    }
+                }
+                &Opcode::FmaxPseudo => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v40 = C::unpack_value_array_2(ctx, v39);
+                        let v63 = C::put_in_reg(ctx, v40.0);
+                        let v64 = C::put_in_reg(ctx, v40.1);
+                        let v3 = C::value_type(ctx, v2);
+                        let v871 = constructor_fmax_pseudo_reg(ctx, v3, v63, v64);
+                        let v872 = constructor_output_reg(ctx, v871);
+                        // Rule at src/isa/s390x/lower.isle line 1402.
+                        return Some(v872);
+                    }
+                }
+                &Opcode::Snarrow => {
+                    let v40 = C::unpack_value_array_2(ctx, v39);
+                    let v116 = C::value_type(ctx, v40.0);
+                    let v603 = C::ty_vec128(ctx, v116);
+                    if let Some(v604) = v603 {
+                        let v63 = C::put_in_reg(ctx, v40.0);
+                        let v64 = C::put_in_reg(ctx, v40.1);
+                        let v605 = constructor_vec_pack_ssat_lane_order(ctx, v604, v63, v64);
+                        let v606 = constructor_output_reg(ctx, v605);
+                        // Rule at src/isa/s390x/lower.isle line 927.
+                        return Some(v606);
+                    }
+                }
+                &Opcode::Unarrow => {
+                    let v40 = C::unpack_value_array_2(ctx, v39);
+                    let v116 = C::value_type(ctx, v40.0);
+                    let v603 = C::ty_vec128(ctx, v116);
+                    if let Some(v604) = v603 {
+                        let v609 = constructor_vec_imm(ctx, v604, 0x0);
+                        let v44 = C::put_in_reg(ctx, v40.0);
+                        let v610 = constructor_vec_smax(ctx, v604, v44, v609);
+                        let v394 = C::put_in_reg(ctx, v40.1);
+                        let v611 = constructor_vec_smax(ctx, v604, v394, v609);
+                        let v612 = constructor_vec_pack_usat_lane_order(ctx, v604, v610, v611);
+                        let v613 = constructor_output_reg(ctx, v612);
+                        // Rule at src/isa/s390x/lower.isle line 939.
+                        return Some(v613);
+                    }
+                }
+                &Opcode::Uunarrow => {
+                    let v40 = C::unpack_value_array_2(ctx, v39);
+                    let v116 = C::value_type(ctx, v40.0);
+                    let v603 = C::ty_vec128(ctx, v116);
+                    if let Some(v604) = v603 {
+                        let v63 = C::put_in_reg(ctx, v40.0);
+                        let v64 = C::put_in_reg(ctx, v40.1);
+                        let v607 = constructor_vec_pack_usat_lane_order(ctx, v604, v63, v64);
+                        let v608 = constructor_output_reg(ctx, v607);
+                        // Rule at src/isa/s390x/lower.isle line 933.
+                        return Some(v608);
+                    }
+                }
+                &Opcode::IaddPairwise => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v40 = C::unpack_value_array_2(ctx, v39);
+                        let v67 = C::def_inst(ctx, v40.1);
+                        if let Some(v68) = v67 {
+                            let v69 = &C::inst_data(ctx, v68);
+                            if let &InstructionData::Binary {
+                                opcode: ref v203,
+                                args: ref v204,
+                            } = v69
+                            {
+                                if let &Opcode::Imul = v203 {
+                                    let v76 = C::def_inst(ctx, v40.0);
+                                    if let Some(v77) = v76 {
+                                        let v78 = &C::inst_data(ctx, v77);
+                                        if let &InstructionData::Binary {
+                                            opcode: ref v187,
+                                            args: ref v188,
+                                        } = v78
+                                        {
+                                            if let &Opcode::Imul = v187 {
+                                                let v189 = C::unpack_value_array_2(ctx, v188);
+                                                let v192 = C::def_inst(ctx, v189.0);
+                                                if let Some(v193) = v192 {
+                                                    let v194 = &C::inst_data(ctx, v193);
+                                                    if let &InstructionData::Unary {
+                                                        opcode: ref v195,
+                                                        arg: v196,
+                                                    } = v194
+                                                    {
+                                                        if let &Opcode::SwidenLow = v195 {
+                                                            let v198 = C::def_inst(ctx, v189.1);
+                                                            if let Some(v199) = v198 {
+                                                                let v200 = &C::inst_data(ctx, v199);
+                                                                if let &InstructionData::Unary {
+                                                                    opcode: ref v201,
+                                                                    arg: v202,
+                                                                } = v200
+                                                                {
+                                                                    if let &Opcode::SwidenLow = v201
+                                                                    {
+                                                                        let v205 =
+                                                                            C::unpack_value_array_2(
+                                                                                ctx, v204,
+                                                                            );
+                                                                        let v208 = C::def_inst(
+                                                                            ctx, v205.0,
+                                                                        );
+                                                                        if let Some(v209) = v208 {
+                                                                            let v210 =
+                                                                                &C::inst_data(
+                                                                                    ctx, v209,
+                                                                                );
+                                                                            if let &InstructionData::Unary {
+                                                                                opcode: ref v211,
+                                                                                arg: v212,
+                                                                            } = v210 {
+                                                                                if let &Opcode::SwidenHigh = v211 {
+                                                                                    if v196 == v212 {
+                                                                                        let v213 = C::def_inst(ctx, v205.1);
+                                                                                        if let Some(v214) = v213 {
+                                                                                            let v215 = &C::inst_data(ctx, v214);
+                                                                                            if let &InstructionData::Unary {
+                                                                                                opcode: ref v216,
+                                                                                                arg: v217,
+                                                                                            } = v215 {
+                                                                                                if let &Opcode::SwidenHigh = v216 {
+                                                                                                    if v202 == v217 {
+                                                                                                        let v218 = C::put_in_reg(ctx, v196);
+                                                                                                        let v219 = C::put_in_reg(ctx, v202);
+                                                                                                        let v197 = C::value_type(ctx, v196);
+                                                                                                        let v220 = constructor_vec_smul_even(ctx, v197, v218, v219);
+                                                                                                        let v221 = C::put_in_reg(ctx, v196);
+                                                                                                        let v222 = C::put_in_reg(ctx, v202);
+                                                                                                        let v223 = constructor_vec_smul_odd(ctx, v197, v221, v222);
+                                                                                                        let v3 = C::value_type(ctx, v2);
+                                                                                                        let v224 = constructor_vec_add(ctx, v3, v220, v223);
+                                                                                                        let v225 = constructor_output_reg(ctx, v224);
+                                                                                                        // Rule at src/isa/s390x/lower.isle line 142.
+                                                                                                        return Some(v225);
+                                                                                                    }
+                                                                                                }
+                                                                                            }
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                            }
+                        }
+                        let v3 = C::value_type(ctx, v2);
+                        let v171 = C::multi_lane(ctx, v3);
+                        if let Some(v172) = v171 {
+                            let v176 = C::u32_as_u64(ctx, v172.0);
+                            let v177 = constructor_vec_imm_splat(ctx, I8X16, v176);
+                            let v178 = constructor_vec_widen_type(ctx, v3);
+                            let v158 = C::put_in_reg(ctx, v40.0);
+                            let v152 = C::put_in_reg(ctx, v40.0);
+                            let v179 = constructor_vec_lshr_by_byte(ctx, v152, v177);
+                            let v180 = constructor_vec_add(ctx, v3, v158, v179);
+                            let v181 = C::put_in_reg(ctx, v40.1);
+                            let v182 = C::put_in_reg(ctx, v40.1);
+                            let v183 = constructor_vec_lshr_by_byte(ctx, v182, v177);
+                            let v184 = constructor_vec_add(ctx, v3, v181, v183);
+                            let v185 = constructor_vec_pack_lane_order(ctx, v178, v180, v184);
+                            let v186 = constructor_output_reg(ctx, v185);
+                            // Rule at src/isa/s390x/lower.isle line 135.
+                            return Some(v186);
+                        }
+                    }
+                }
+                &Opcode::Iconcat => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v36 = C::vr128_ty(ctx, v3);
+                        if let Some(v37) = v36 {
+                            let v40 = C::unpack_value_array_2(ctx, v39);
+                            let v43 = C::put_in_reg(ctx, v40.1);
+                            let v44 = C::put_in_reg(ctx, v40.0);
+                            let v45 = constructor_mov_to_vec128(ctx, v37, v43, v44);
+                            let v46 = constructor_output_reg(ctx, v45);
+                            // Rule at src/isa/s390x/lower.isle line 51.
+                            return Some(v46);
+                        }
+                    }
+                }
+                _ => {}
+            }
+        }
+        &InstructionData::BinaryImm8 {
+            opcode: ref v1141,
+            arg: v1142,
+            imm: v1143,
+        } => {
+            if let &Opcode::Extractlane = v1141 {
+                let v1 = C::first_result(ctx, arg0);
+                if let Some(v2) = v1 {
+                    let v3 = C::value_type(ctx, v2);
+                    let v1146 = C::ty_int_ref_scalar_64(ctx, v3);
+                    if let Some(v1147) = v1146 {
+                        let v1148 = C::put_in_reg(ctx, v1142);
+                        let v1144 = C::value_type(ctx, v1142);
+                        let v1145 = C::u8_from_uimm8(ctx, v1143);
+                        let v1149 = C::be_lane_idx(ctx, v1144, v1145);
+                        let v584 = C::zero_reg(ctx);
+                        let v1150 = constructor_vec_extract_lane(ctx, v1144, v1148, v1149, v584);
+                        let v1151 = constructor_output_reg(ctx, v1150);
+                        // Rule at src/isa/s390x/lower.isle line 1883.
+                        return Some(v1151);
+                    }
+                    let v1074 = C::ty_scalar_float(ctx, v3);
+                    if let Some(v1075) = v1074 {
+                        let v1148 = C::put_in_reg(ctx, v1142);
+                        let v1144 = C::value_type(ctx, v1142);
+                        let v1145 = C::u8_from_uimm8(ctx, v1143);
+                        let v1149 = C::be_lane_idx(ctx, v1144, v1145);
+                        let v1152 = constructor_vec_replicate_lane(ctx, v1144, v1148, v1149);
+                        let v1153 = constructor_output_reg(ctx, v1152);
+                        // Rule at src/isa/s390x/lower.isle line 1889.
+                        return Some(v1153);
+                    }
+                }
+            }
+        }
+        &InstructionData::Call {
+            opcode: ref v1996,
+            args: v1997,
+            func_ref: v1998,
+        } => {
+            if let &Opcode::Call = v1996 {
+                let v2000 = C::func_ref_data(ctx, v1998);
+                let v2004 = C::reloc_distance_near(ctx, v2000.2);
+                if let Some(v2005) = v2004 {
+                    let v2006 = C::abi_sig(ctx, v2000.0);
+                    let v2007 = C::abi_accumulate_outgoing_args_size(ctx, v2006);
+                    let v2009 = C::abi_num_args(ctx, v2006);
+                    let v2010 = C::range(ctx, 0x0, v2009);
+                    let v1999 = C::value_list_slice(ctx, v1997);
+                    let v2011 = &constructor_lower_call_args(ctx, v2006, v2010, v1999);
+                    let v2012 = &C::defs_init(ctx, v2006);
+                    let v2014 =
+                        &constructor_abi_call(ctx, v2006, v2000.1, v2011, v2012, &Opcode::Call);
+                    let v2015 = constructor_side_effect(ctx, v2014);
+                    let v2016 = C::abi_first_ret(ctx, v2000.0, v2006);
+                    let v2017 = C::abi_num_rets(ctx, v2006);
+                    let v2019 = &C::output_builder_new(ctx);
+                    let v2018 = C::range(ctx, v2016, v2017);
+                    let v2020 = constructor_lower_call_rets(ctx, v2006, v2012, v2018, v2019);
+                    // Rule at src/isa/s390x/lower.isle line 3898.
+                    return Some(v2020);
+                }
+                let v2006 = C::abi_sig(ctx, v2000.0);
+                let v2007 = C::abi_accumulate_outgoing_args_size(ctx, v2006);
+                let v2009 = C::abi_num_args(ctx, v2006);
+                let v2010 = C::range(ctx, 0x0, v2009);
+                let v1999 = C::value_list_slice(ctx, v1997);
+                let v2011 = &constructor_lower_call_args(ctx, v2006, v2010, v1999);
+                let v2012 = &C::defs_init(ctx, v2006);
+                let v2021 = SymbolReloc::Absolute {
+                    name: v2000.1,
+                    offset: 0x0,
+                };
+                let v2022 = constructor_load_symbol_reloc(ctx, &v2021);
+                let v2023 =
+                    &constructor_abi_call_ind(ctx, v2006, v2022, v2011, v2012, &Opcode::Call);
+                let v2024 = constructor_side_effect(ctx, v2023);
+                let v2025 = C::abi_first_ret(ctx, v2000.0, v2006);
+                let v2026 = C::abi_num_rets(ctx, v2006);
+                let v2028 = &C::output_builder_new(ctx);
+                let v2027 = C::range(ctx, v2025, v2026);
+                let v2029 = constructor_lower_call_rets(ctx, v2006, v2012, v2027, v2028);
+                // Rule at src/isa/s390x/lower.isle line 3908.
+                return Some(v2029);
+            }
+        }
+        &InstructionData::CallIndirect {
+            opcode: ref v2030,
+            args: v2031,
+            sig_ref: v2032,
+        } => {
+            if let &Opcode::CallIndirect = v2030 {
+                let v2033 = C::value_list_slice(ctx, v2031);
+                let v2034 = C::value_slice_unwrap(ctx, v2033);
+                if let Some(v2035) = v2034 {
+                    let v2038 = C::abi_sig(ctx, v2032);
+                    let v2039 = C::put_in_reg(ctx, v2035.0);
+                    let v2040 = C::abi_accumulate_outgoing_args_size(ctx, v2038);
+                    let v2041 = C::abi_num_args(ctx, v2038);
+                    let v2042 = C::range(ctx, 0x0, v2041);
+                    let v2043 = &constructor_lower_call_args(ctx, v2038, v2042, v2035.1);
+                    let v2044 = &C::defs_init(ctx, v2038);
+                    let v2046 = &constructor_abi_call_ind(
+                        ctx,
+                        v2038,
+                        v2039,
+                        v2043,
+                        v2044,
+                        &Opcode::CallIndirect,
+                    );
+                    let v2047 = constructor_side_effect(ctx, v2046);
+                    let v2048 = C::abi_first_ret(ctx, v2032, v2038);
+                    let v2049 = C::abi_num_rets(ctx, v2038);
+                    let v2028 = &C::output_builder_new(ctx);
+                    let v2050 = C::range(ctx, v2048, v2049);
+                    let v2051 = constructor_lower_call_rets(ctx, v2038, v2044, v2050, v2028);
+                    // Rule at src/isa/s390x/lower.isle line 3919.
+                    return Some(v2051);
+                }
+            }
+        }
+        &InstructionData::CondTrap {
+            opcode: ref v1895,
+            arg: v1896,
+            code: ref v1897,
+        } => {
+            match v1895 {
+                &Opcode::Trapz => {
+                    let v1898 = &constructor_value_nonzero(ctx, v1896);
+                    let v1899 = &constructor_invert_bool(ctx, v1898);
+                    let v1900 = &constructor_trap_if_bool(ctx, v1899, v1897);
+                    let v1901 = constructor_side_effect(ctx, v1900);
+                    // Rule at src/isa/s390x/lower.isle line 3799.
+                    return Some(v1901);
+                }
+                &Opcode::Trapnz => {
+                    let v1898 = &constructor_value_nonzero(ctx, v1896);
+                    let v1902 = &constructor_trap_if_bool(ctx, v1898, v1897);
+                    let v1903 = constructor_side_effect(ctx, v1902);
+                    // Rule at src/isa/s390x/lower.isle line 3805.
+                    return Some(v1903);
+                }
+                &Opcode::ResumableTrapnz => {
+                    let v1898 = &constructor_value_nonzero(ctx, v1896);
+                    let v1902 = &constructor_trap_if_bool(ctx, v1898, v1897);
+                    let v1903 = constructor_side_effect(ctx, v1902);
+                    // Rule at src/isa/s390x/lower.isle line 3811.
+                    return Some(v1903);
+                }
+                _ => {}
+            }
+        }
+        &InstructionData::FloatCompare {
+            opcode: ref v1771,
+            args: ref v1772,
+            cond: ref v1773,
+        } => {
+            if let &Opcode::Fcmp = v1771 {
+                let v1 = C::first_result(ctx, arg0);
+                if let Some(v2) = v1 {
+                    match v1773 {
+                        &FloatCC::Equal => {
+                            let v3 = C::value_type(ctx, v2);
+                            let v149 = C::ty_vec128(ctx, v3);
+                            if let Some(v150) = v149 {
+                                let v1774 = C::unpack_value_array_2(ctx, v1772);
+                                let v1780 = C::put_in_reg(ctx, v1774.0);
+                                let v1781 = C::put_in_reg(ctx, v1774.1);
+                                let v1782 = constructor_vec_fcmpeq(ctx, v150, v1780, v1781);
+                                let v1783 = constructor_output_reg(ctx, v1782);
+                                // Rule at src/isa/s390x/lower.isle line 3451.
+                                return Some(v1783);
+                            }
+                        }
+                        &FloatCC::GreaterThan => {
+                            let v3 = C::value_type(ctx, v2);
+                            let v149 = C::ty_vec128(ctx, v3);
+                            if let Some(v150) = v149 {
+                                let v1774 = C::unpack_value_array_2(ctx, v1772);
+                                let v1780 = C::put_in_reg(ctx, v1774.0);
+                                let v1781 = C::put_in_reg(ctx, v1774.1);
+                                let v1786 = constructor_vec_fcmph(ctx, v150, v1780, v1781);
+                                let v1787 = constructor_output_reg(ctx, v1786);
+                                // Rule at src/isa/s390x/lower.isle line 3455.
+                                return Some(v1787);
+                            }
+                        }
+                        &FloatCC::GreaterThanOrEqual => {
+                            let v3 = C::value_type(ctx, v2);
+                            let v149 = C::ty_vec128(ctx, v3);
+                            if let Some(v150) = v149 {
+                                let v1774 = C::unpack_value_array_2(ctx, v1772);
+                                let v1780 = C::put_in_reg(ctx, v1774.0);
+                                let v1781 = C::put_in_reg(ctx, v1774.1);
+                                let v1790 = constructor_vec_fcmphe(ctx, v150, v1780, v1781);
+                                let v1791 = constructor_output_reg(ctx, v1790);
+                                // Rule at src/isa/s390x/lower.isle line 3459.
+                                return Some(v1791);
+                            }
+                        }
+                        &FloatCC::LessThan => {
+                            let v3 = C::value_type(ctx, v2);
+                            let v149 = C::ty_vec128(ctx, v3);
+                            if let Some(v150) = v149 {
+                                let v1774 = C::unpack_value_array_2(ctx, v1772);
+                                let v1794 = C::put_in_reg(ctx, v1774.1);
+                                let v1795 = C::put_in_reg(ctx, v1774.0);
+                                let v1796 = constructor_vec_fcmph(ctx, v150, v1794, v1795);
+                                let v1797 = constructor_output_reg(ctx, v1796);
+                                // Rule at src/isa/s390x/lower.isle line 3463.
+                                return Some(v1797);
+                            }
+                        }
+                        &FloatCC::LessThanOrEqual => {
+                            let v3 = C::value_type(ctx, v2);
+                            let v149 = C::ty_vec128(ctx, v3);
+                            if let Some(v150) = v149 {
+                                let v1774 = C::unpack_value_array_2(ctx, v1772);
+                                let v1794 = C::put_in_reg(ctx, v1774.1);
+                                let v1795 = C::put_in_reg(ctx, v1774.0);
+                                let v1800 = constructor_vec_fcmphe(ctx, v150, v1794, v1795);
+                                let v1801 = constructor_output_reg(ctx, v1800);
+                                // Rule at src/isa/s390x/lower.isle line 3467.
+                                return Some(v1801);
+                            }
+                        }
+                        &FloatCC::NotEqual => {
+                            let v3 = C::value_type(ctx, v2);
+                            let v149 = C::ty_vec128(ctx, v3);
+                            if let Some(v150) = v149 {
+                                let v1774 = C::unpack_value_array_2(ctx, v1772);
+                                let v1780 = C::put_in_reg(ctx, v1774.0);
+                                let v1781 = C::put_in_reg(ctx, v1774.1);
+                                let v1782 = constructor_vec_fcmpeq(ctx, v150, v1780, v1781);
+                                let v1784 = constructor_vec_not(ctx, v150, v1782);
+                                let v1785 = constructor_output_reg(ctx, v1784);
+                                // Rule at src/isa/s390x/lower.isle line 3453.
+                                return Some(v1785);
+                            }
+                        }
+                        &FloatCC::Ordered => {
+                            let v3 = C::value_type(ctx, v2);
+                            let v149 = C::ty_vec128(ctx, v3);
+                            if let Some(v150) = v149 {
+                                let v1774 = C::unpack_value_array_2(ctx, v1772);
+                                let v1780 = C::put_in_reg(ctx, v1774.0);
+                                let v1781 = C::put_in_reg(ctx, v1774.1);
+                                let v1790 = constructor_vec_fcmphe(ctx, v150, v1780, v1781);
+                                let v1804 = C::put_in_reg(ctx, v1774.1);
+                                let v1805 = C::put_in_reg(ctx, v1774.0);
+                                let v1806 = constructor_vec_fcmphe(ctx, v150, v1804, v1805);
+                                let v1807 = constructor_vec_or(ctx, v150, v1790, v1806);
+                                let v1808 = constructor_output_reg(ctx, v1807);
+                                // Rule at src/isa/s390x/lower.isle line 3471.
+                                return Some(v1808);
+                            }
+                        }
+                        &FloatCC::OrderedNotEqual => {
+                            let v3 = C::value_type(ctx, v2);
+                            let v149 = C::ty_vec128(ctx, v3);
+                            if let Some(v150) = v149 {
+                                let v1774 = C::unpack_value_array_2(ctx, v1772);
+                                let v1780 = C::put_in_reg(ctx, v1774.0);
+                                let v1781 = C::put_in_reg(ctx, v1774.1);
+                                let v1786 = constructor_vec_fcmph(ctx, v150, v1780, v1781);
+                                let v1804 = C::put_in_reg(ctx, v1774.1);
+                                let v1805 = C::put_in_reg(ctx, v1774.0);
+                                let v1811 = constructor_vec_fcmph(ctx, v150, v1804, v1805);
+                                let v1812 = constructor_vec_or(ctx, v150, v1786, v1811);
+                                let v1813 = constructor_output_reg(ctx, v1812);
+                                // Rule at src/isa/s390x/lower.isle line 3475.
+                                return Some(v1813);
+                            }
+                        }
+                        &FloatCC::Unordered => {
+                            let v3 = C::value_type(ctx, v2);
+                            let v149 = C::ty_vec128(ctx, v3);
+                            if let Some(v150) = v149 {
+                                let v1774 = C::unpack_value_array_2(ctx, v1772);
+                                let v1780 = C::put_in_reg(ctx, v1774.0);
+                                let v1781 = C::put_in_reg(ctx, v1774.1);
+                                let v1790 = constructor_vec_fcmphe(ctx, v150, v1780, v1781);
+                                let v1804 = C::put_in_reg(ctx, v1774.1);
+                                let v1805 = C::put_in_reg(ctx, v1774.0);
+                                let v1806 = constructor_vec_fcmphe(ctx, v150, v1804, v1805);
+                                let v1809 = constructor_vec_not_or(ctx, v150, v1790, v1806);
+                                let v1810 = constructor_output_reg(ctx, v1809);
+                                // Rule at src/isa/s390x/lower.isle line 3473.
+                                return Some(v1810);
+                            }
+                        }
+                        &FloatCC::UnorderedOrEqual => {
+                            let v3 = C::value_type(ctx, v2);
+                            let v149 = C::ty_vec128(ctx, v3);
+                            if let Some(v150) = v149 {
+                                let v1774 = C::unpack_value_array_2(ctx, v1772);
+                                let v1780 = C::put_in_reg(ctx, v1774.0);
+                                let v1781 = C::put_in_reg(ctx, v1774.1);
+                                let v1786 = constructor_vec_fcmph(ctx, v150, v1780, v1781);
+                                let v1804 = C::put_in_reg(ctx, v1774.1);
+                                let v1805 = C::put_in_reg(ctx, v1774.0);
+                                let v1811 = constructor_vec_fcmph(ctx, v150, v1804, v1805);
+                                let v1814 = constructor_vec_not_or(ctx, v150, v1786, v1811);
+                                let v1815 = constructor_output_reg(ctx, v1814);
+                                // Rule at src/isa/s390x/lower.isle line 3477.
+                                return Some(v1815);
+                            }
+                        }
+                        &FloatCC::UnorderedOrGreaterThan => {
+                            let v3 = C::value_type(ctx, v2);
+                            let v149 = C::ty_vec128(ctx, v3);
+                            if let Some(v150) = v149 {
+                                let v1774 = C::unpack_value_array_2(ctx, v1772);
+                                let v1794 = C::put_in_reg(ctx, v1774.1);
+                                let v1795 = C::put_in_reg(ctx, v1774.0);
+                                let v1800 = constructor_vec_fcmphe(ctx, v150, v1794, v1795);
+                                let v1802 = constructor_vec_not(ctx, v150, v1800);
+                                let v1803 = constructor_output_reg(ctx, v1802);
+                                // Rule at src/isa/s390x/lower.isle line 3469.
+                                return Some(v1803);
+                            }
+                        }
+                        &FloatCC::UnorderedOrGreaterThanOrEqual => {
+                            let v3 = C::value_type(ctx, v2);
+                            let v149 = C::ty_vec128(ctx, v3);
+                            if let Some(v150) = v149 {
+                                let v1774 = C::unpack_value_array_2(ctx, v1772);
+                                let v1794 = C::put_in_reg(ctx, v1774.1);
+                                let v1795 = C::put_in_reg(ctx, v1774.0);
+                                let v1796 = constructor_vec_fcmph(ctx, v150, v1794, v1795);
+                                let v1798 = constructor_vec_not(ctx, v150, v1796);
+                                let v1799 = constructor_output_reg(ctx, v1798);
+                                // Rule at src/isa/s390x/lower.isle line 3465.
+                                return Some(v1799);
+                            }
+                        }
+                        &FloatCC::UnorderedOrLessThan => {
+                            let v3 = C::value_type(ctx, v2);
+                            let v149 = C::ty_vec128(ctx, v3);
+                            if let Some(v150) = v149 {
+                                let v1774 = C::unpack_value_array_2(ctx, v1772);
+                                let v1780 = C::put_in_reg(ctx, v1774.0);
+                                let v1781 = C::put_in_reg(ctx, v1774.1);
+                                let v1790 = constructor_vec_fcmphe(ctx, v150, v1780, v1781);
+                                let v1792 = constructor_vec_not(ctx, v150, v1790);
+                                let v1793 = constructor_output_reg(ctx, v1792);
+                                // Rule at src/isa/s390x/lower.isle line 3461.
+                                return Some(v1793);
+                            }
+                        }
+                        &FloatCC::UnorderedOrLessThanOrEqual => {
+                            let v3 = C::value_type(ctx, v2);
+                            let v149 = C::ty_vec128(ctx, v3);
+                            if let Some(v150) = v149 {
+                                let v1774 = C::unpack_value_array_2(ctx, v1772);
+                                let v1780 = C::put_in_reg(ctx, v1774.0);
+                                let v1781 = C::put_in_reg(ctx, v1774.1);
+                                let v1786 = constructor_vec_fcmph(ctx, v150, v1780, v1781);
+                                let v1788 = constructor_vec_not(ctx, v150, v1786);
+                                let v1789 = constructor_output_reg(ctx, v1788);
+                                // Rule at src/isa/s390x/lower.isle line 3457.
+                                return Some(v1789);
+                            }
+                        }
+                        _ => {}
+                    }
+                    let v3 = C::value_type(ctx, v2);
+                    let v61 = C::fits_in_64(ctx, v3);
+                    if let Some(v62) = v61 {
+                        let v1774 = C::unpack_value_array_2(ctx, v1772);
+                        let v1777 = &constructor_fcmp_val(ctx, v1773, v1774.0, v1774.1);
+                        let v1778 = constructor_lower_bool(ctx, v62, v1777);
+                        let v1779 = constructor_output_reg(ctx, v1778);
+                        // Rule at src/isa/s390x/lower.isle line 3439.
+                        return Some(v1779);
+                    }
+                }
+            }
+        }
+        &InstructionData::FuncAddr {
+            opcode: ref v1452,
+            func_ref: v1453,
+        } => {
+            if let &Opcode::FuncAddr = v1452 {
+                let v1454 = C::func_ref_data(ctx, v1453);
+                let v1458 = C::reloc_distance_near(ctx, v1454.2);
+                if let Some(v1459) = v1458 {
+                    let v1461 = C::memflags_trusted(ctx);
+                    let v1462 = &C::memarg_symbol(ctx, v1454.1, 0x0, v1461);
+                    let v1463 = constructor_load_addr(ctx, v1462);
+                    let v1464 = constructor_output_reg(ctx, v1463);
+                    // Rule at src/isa/s390x/lower.isle line 2245.
+                    return Some(v1464);
+                }
+                let v1466 = SymbolReloc::Absolute {
+                    name: v1454.1,
+                    offset: 0x0,
+                };
+                let v1467 = constructor_load_symbol_reloc(ctx, &v1466);
+                let v1468 = constructor_output_reg(ctx, v1467);
+                // Rule at src/isa/s390x/lower.isle line 2249.
+                return Some(v1468);
+            }
+        }
+        &InstructionData::IntAddTrap {
+            opcode: ref v1906,
+            args: ref v1907,
+            code: ref v1908,
+        } => {
+            if let &Opcode::UaddOverflowTrap = v1906 {
+                let v1 = C::first_result(ctx, arg0);
+                if let Some(v2) = v1 {
+                    let v3 = C::value_type(ctx, v2);
+                    let v61 = C::fits_in_64(ctx, v3);
+                    if let Some(v62) = v61 {
+                        let v1909 = C::unpack_value_array_2(ctx, v1907);
+                        let v1929 = C::def_inst(ctx, v1909.0);
+                        if let Some(v1930) = v1929 {
+                            let v1931 = &C::inst_data(ctx, v1930);
+                            if let &InstructionData::Unary {
+                                opcode: ref v1932,
+                                arg: v1933,
+                            } = v1931
+                            {
+                                if let &Opcode::Uextend = v1932 {
+                                    let v1934 = C::value_type(ctx, v1933);
+                                    if v1934 == I32 {
+                                        let v1935 = C::put_in_reg(ctx, v1909.1);
+                                        let v1936 = C::put_in_reg(ctx, v1933);
+                                        let v1937 =
+                                            &constructor_add_logical_reg_zext32_with_flags_paired(
+                                                ctx, v62, v1935, v1936,
+                                            );
+                                        let v1915 = &C::mask_as_cond(ctx, 0x3);
+                                        let v1916 = &constructor_trap_if_impl(ctx, v1915, v1908);
+                                        let v1938 = constructor_with_flags(ctx, v1937, v1916);
+                                        let v1939 = C::output(ctx, v1938);
+                                        // Rule at src/isa/s390x/lower.isle line 3847.
+                                        return Some(v1939);
+                                    }
+                                }
+                            }
+                        }
+                        let v1947 = C::u32_from_value(ctx, v1909.0);
+                        if let Some(v1948) = v1947 {
+                            let v1935 = C::put_in_reg(ctx, v1909.1);
+                            let v1949 = &constructor_add_logical_zimm32_with_flags_paired(
+                                ctx, v62, v1935, v1948,
+                            );
+                            let v1943 = &C::mask_as_cond(ctx, 0x3);
+                            let v1944 = &constructor_trap_if_impl(ctx, v1943, v1908);
+                            let v1950 = constructor_with_flags(ctx, v1949, v1944);
+                            let v1951 = C::output(ctx, v1950);
+                            // Rule at src/isa/s390x/lower.isle line 3859.
+                            return Some(v1951);
+                        }
+                        let v1971 = C::sinkable_inst(ctx, v1909.0);
+                        if let Some(v1972) = v1971 {
+                            let v1973 = &C::inst_data(ctx, v1972);
+                            if let &InstructionData::Load {
+                                opcode: ref v1974,
+                                arg: v1975,
+                                flags: v1976,
+                                offset: v1977,
+                            } = v1973
+                            {
+                                match v1974 {
+                                    &Opcode::Load => {
+                                        let v1968 = C::value_type(ctx, v1909.0);
+                                        let v1969 = C::ty_32_or_64(ctx, v1968);
+                                        if let Some(v1970) = v1969 {
+                                            let v1978 = C::bigendian(ctx, v1976);
+                                            if let Some(v1979) = v1978 {
+                                                let v1935 = C::put_in_reg(ctx, v1909.1);
+                                                let v1980 = &constructor_sink_load(ctx, v1972);
+                                                let v1981 =
+                                                    &constructor_add_logical_mem_with_flags_paired(
+                                                        ctx, v62, v1935, v1980,
+                                                    );
+                                                let v1915 = &C::mask_as_cond(ctx, 0x3);
+                                                let v1916 =
+                                                    &constructor_trap_if_impl(ctx, v1915, v1908);
+                                                let v1982 =
+                                                    constructor_with_flags(ctx, v1981, v1916);
+                                                let v1983 = C::output(ctx, v1982);
+                                                // Rule at src/isa/s390x/lower.isle line 3871.
+                                                return Some(v1983);
+                                            }
+                                        }
+                                    }
+                                    &Opcode::Uload32 => {
+                                        let v1978 = C::bigendian(ctx, v1976);
+                                        if let Some(v1979) = v1978 {
+                                            let v1935 = C::put_in_reg(ctx, v1909.1);
+                                            let v1988 = &constructor_sink_uload32(ctx, v1972);
+                                            let v1989 = &constructor_add_logical_mem_zext32_with_flags_paired(ctx, v62, v1935, v1988);
+                                            let v1915 = &C::mask_as_cond(ctx, 0x3);
+                                            let v1916 =
+                                                &constructor_trap_if_impl(ctx, v1915, v1908);
+                                            let v1990 = constructor_with_flags(ctx, v1989, v1916);
+                                            let v1991 = C::output(ctx, v1990);
+                                            // Rule at src/isa/s390x/lower.isle line 3883.
+                                            return Some(v1991);
+                                        }
+                                    }
+                                    _ => {}
+                                }
+                            }
+                        }
+                        let v1919 = C::def_inst(ctx, v1909.1);
+                        if let Some(v1920) = v1919 {
+                            let v1921 = &C::inst_data(ctx, v1920);
+                            if let &InstructionData::Unary {
+                                opcode: ref v1922,
+                                arg: v1923,
+                            } = v1921
+                            {
+                                if let &Opcode::Uextend = v1922 {
+                                    let v1924 = C::value_type(ctx, v1923);
+                                    if v1924 == I32 {
+                                        let v1912 = C::put_in_reg(ctx, v1909.0);
+                                        let v1925 = C::put_in_reg(ctx, v1923);
+                                        let v1926 =
+                                            &constructor_add_logical_reg_zext32_with_flags_paired(
+                                                ctx, v62, v1912, v1925,
+                                            );
+                                        let v1915 = &C::mask_as_cond(ctx, 0x3);
+                                        let v1916 = &constructor_trap_if_impl(ctx, v1915, v1908);
+                                        let v1927 = constructor_with_flags(ctx, v1926, v1916);
+                                        let v1928 = C::output(ctx, v1927);
+                                        // Rule at src/isa/s390x/lower.isle line 3842.
+                                        return Some(v1928);
+                                    }
+                                }
+                            }
+                        }
+                        let v1940 = C::u32_from_value(ctx, v1909.1);
+                        if let Some(v1941) = v1940 {
+                            let v1912 = C::put_in_reg(ctx, v1909.0);
+                            let v1942 = &constructor_add_logical_zimm32_with_flags_paired(
+                                ctx, v62, v1912, v1941,
+                            );
+                            let v1943 = &C::mask_as_cond(ctx, 0x3);
+                            let v1944 = &constructor_trap_if_impl(ctx, v1943, v1908);
+                            let v1945 = constructor_with_flags(ctx, v1942, v1944);
+                            let v1946 = C::output(ctx, v1945);
+                            // Rule at src/isa/s390x/lower.isle line 3854.
+                            return Some(v1946);
+                        }
+                        let v1955 = C::sinkable_inst(ctx, v1909.1);
+                        if let Some(v1956) = v1955 {
+                            let v1957 = &C::inst_data(ctx, v1956);
+                            if let &InstructionData::Load {
+                                opcode: ref v1958,
+                                arg: v1959,
+                                flags: v1960,
+                                offset: v1961,
+                            } = v1957
+                            {
+                                match v1958 {
+                                    &Opcode::Load => {
+                                        let v1952 = C::value_type(ctx, v1909.1);
+                                        let v1953 = C::ty_32_or_64(ctx, v1952);
+                                        if let Some(v1954) = v1953 {
+                                            let v1962 = C::bigendian(ctx, v1960);
+                                            if let Some(v1963) = v1962 {
+                                                let v1912 = C::put_in_reg(ctx, v1909.0);
+                                                let v1964 = &constructor_sink_load(ctx, v1956);
+                                                let v1965 =
+                                                    &constructor_add_logical_mem_with_flags_paired(
+                                                        ctx, v62, v1912, v1964,
+                                                    );
+                                                let v1915 = &C::mask_as_cond(ctx, 0x3);
+                                                let v1916 =
+                                                    &constructor_trap_if_impl(ctx, v1915, v1908);
+                                                let v1966 =
+                                                    constructor_with_flags(ctx, v1965, v1916);
+                                                let v1967 = C::output(ctx, v1966);
+                                                // Rule at src/isa/s390x/lower.isle line 3866.
+                                                return Some(v1967);
+                                            }
+                                        }
+                                    }
+                                    &Opcode::Uload32 => {
+                                        let v1962 = C::bigendian(ctx, v1960);
+                                        if let Some(v1963) = v1962 {
+                                            let v1912 = C::put_in_reg(ctx, v1909.0);
+                                            let v1984 = &constructor_sink_uload32(ctx, v1956);
+                                            let v1985 = &constructor_add_logical_mem_zext32_with_flags_paired(ctx, v62, v1912, v1984);
+                                            let v1915 = &C::mask_as_cond(ctx, 0x3);
+                                            let v1916 =
+                                                &constructor_trap_if_impl(ctx, v1915, v1908);
+                                            let v1986 = constructor_with_flags(ctx, v1985, v1916);
+                                            let v1987 = C::output(ctx, v1986);
+                                            // Rule at src/isa/s390x/lower.isle line 3878.
+                                            return Some(v1987);
+                                        }
+                                    }
+                                    _ => {}
+                                }
+                            }
+                        }
+                        let v1912 = C::put_in_reg(ctx, v1909.0);
+                        let v1913 = C::put_in_reg(ctx, v1909.1);
+                        let v1914 =
+                            &constructor_add_logical_reg_with_flags_paired(ctx, v62, v1912, v1913);
+                        let v1915 = &C::mask_as_cond(ctx, 0x3);
+                        let v1916 = &constructor_trap_if_impl(ctx, v1915, v1908);
+                        let v1917 = constructor_with_flags(ctx, v1914, v1916);
+                        let v1918 = C::output(ctx, v1917);
+                        // Rule at src/isa/s390x/lower.isle line 3836.
+                        return Some(v1918);
+                    }
+                }
+            }
+        }
+        &InstructionData::IntCompare {
+            opcode: ref v1737,
+            args: ref v1738,
+            cond: ref v1739,
+        } => {
+            if let &Opcode::Icmp = v1737 {
+                let v1 = C::first_result(ctx, arg0);
+                if let Some(v2) = v1 {
+                    match v1739 {
+                        &IntCC::Equal => {
+                            let v3 = C::value_type(ctx, v2);
+                            let v149 = C::ty_vec128(ctx, v3);
+                            if let Some(v150) = v149 {
+                                let v1740 = C::unpack_value_array_2(ctx, v1738);
+                                let v1747 = C::put_in_reg(ctx, v1740.0);
+                                let v1748 = C::put_in_reg(ctx, v1740.1);
+                                let v1749 = constructor_vec_cmpeq(ctx, v150, v1747, v1748);
+                                let v1750 = constructor_output_reg(ctx, v1749);
+                                // Rule at src/isa/s390x/lower.isle line 3413.
+                                return Some(v1750);
+                            }
+                        }
+                        &IntCC::NotEqual => {
+                            let v3 = C::value_type(ctx, v2);
+                            let v149 = C::ty_vec128(ctx, v3);
+                            if let Some(v150) = v149 {
+                                let v1740 = C::unpack_value_array_2(ctx, v1738);
+                                let v1747 = C::put_in_reg(ctx, v1740.0);
+                                let v1748 = C::put_in_reg(ctx, v1740.1);
+                                let v1749 = constructor_vec_cmpeq(ctx, v150, v1747, v1748);
+                                let v1751 = constructor_vec_not(ctx, v150, v1749);
+                                let v1752 = constructor_output_reg(ctx, v1751);
+                                // Rule at src/isa/s390x/lower.isle line 3415.
+                                return Some(v1752);
+                            }
+                        }
+                        &IntCC::SignedGreaterThan => {
+                            let v3 = C::value_type(ctx, v2);
+                            let v149 = C::ty_vec128(ctx, v3);
+                            if let Some(v150) = v149 {
+                                let v1740 = C::unpack_value_array_2(ctx, v1738);
+                                let v1747 = C::put_in_reg(ctx, v1740.0);
+                                let v1748 = C::put_in_reg(ctx, v1740.1);
+                                let v1753 = constructor_vec_cmph(ctx, v150, v1747, v1748);
+                                let v1754 = constructor_output_reg(ctx, v1753);
+                                // Rule at src/isa/s390x/lower.isle line 3417.
+                                return Some(v1754);
+                            }
+                        }
+                        &IntCC::SignedGreaterThanOrEqual => {
+                            let v3 = C::value_type(ctx, v2);
+                            let v149 = C::ty_vec128(ctx, v3);
+                            if let Some(v150) = v149 {
+                                let v1740 = C::unpack_value_array_2(ctx, v1738);
+                                let v1757 = C::put_in_reg(ctx, v1740.1);
+                                let v1758 = C::put_in_reg(ctx, v1740.0);
+                                let v1759 = constructor_vec_cmph(ctx, v150, v1757, v1758);
+                                let v1761 = constructor_vec_not(ctx, v150, v1759);
+                                let v1762 = constructor_output_reg(ctx, v1761);
+                                // Rule at src/isa/s390x/lower.isle line 3423.
+                                return Some(v1762);
+                            }
+                        }
+                        &IntCC::SignedLessThan => {
+                            let v3 = C::value_type(ctx, v2);
+                            let v149 = C::ty_vec128(ctx, v3);
+                            if let Some(v150) = v149 {
+                                let v1740 = C::unpack_value_array_2(ctx, v1738);
+                                let v1757 = C::put_in_reg(ctx, v1740.1);
+                                let v1758 = C::put_in_reg(ctx, v1740.0);
+                                let v1759 = constructor_vec_cmph(ctx, v150, v1757, v1758);
+                                let v1760 = constructor_output_reg(ctx, v1759);
+                                // Rule at src/isa/s390x/lower.isle line 3421.
+                                return Some(v1760);
+                            }
+                        }
+                        &IntCC::SignedLessThanOrEqual => {
+                            let v3 = C::value_type(ctx, v2);
+                            let v149 = C::ty_vec128(ctx, v3);
+                            if let Some(v150) = v149 {
+                                let v1740 = C::unpack_value_array_2(ctx, v1738);
+                                let v1747 = C::put_in_reg(ctx, v1740.0);
+                                let v1748 = C::put_in_reg(ctx, v1740.1);
+                                let v1753 = constructor_vec_cmph(ctx, v150, v1747, v1748);
+                                let v1755 = constructor_vec_not(ctx, v150, v1753);
+                                let v1756 = constructor_output_reg(ctx, v1755);
+                                // Rule at src/isa/s390x/lower.isle line 3419.
+                                return Some(v1756);
+                            }
+                        }
+                        &IntCC::UnsignedGreaterThan => {
+                            let v3 = C::value_type(ctx, v2);
+                            let v149 = C::ty_vec128(ctx, v3);
+                            if let Some(v150) = v149 {
+                                let v1740 = C::unpack_value_array_2(ctx, v1738);
+                                let v1747 = C::put_in_reg(ctx, v1740.0);
+                                let v1748 = C::put_in_reg(ctx, v1740.1);
+                                let v1763 = constructor_vec_cmphl(ctx, v150, v1747, v1748);
+                                let v1764 = constructor_output_reg(ctx, v1763);
+                                // Rule at src/isa/s390x/lower.isle line 3425.
+                                return Some(v1764);
+                            }
+                        }
+                        &IntCC::UnsignedGreaterThanOrEqual => {
+                            let v3 = C::value_type(ctx, v2);
+                            let v149 = C::ty_vec128(ctx, v3);
+                            if let Some(v150) = v149 {
+                                let v1740 = C::unpack_value_array_2(ctx, v1738);
+                                let v1757 = C::put_in_reg(ctx, v1740.1);
+                                let v1758 = C::put_in_reg(ctx, v1740.0);
+                                let v1767 = constructor_vec_cmphl(ctx, v150, v1757, v1758);
+                                let v1769 = constructor_vec_not(ctx, v150, v1767);
+                                let v1770 = constructor_output_reg(ctx, v1769);
+                                // Rule at src/isa/s390x/lower.isle line 3431.
+                                return Some(v1770);
+                            }
+                        }
+                        &IntCC::UnsignedLessThan => {
+                            let v3 = C::value_type(ctx, v2);
+                            let v149 = C::ty_vec128(ctx, v3);
+                            if let Some(v150) = v149 {
+                                let v1740 = C::unpack_value_array_2(ctx, v1738);
+                                let v1757 = C::put_in_reg(ctx, v1740.1);
+                                let v1758 = C::put_in_reg(ctx, v1740.0);
+                                let v1767 = constructor_vec_cmphl(ctx, v150, v1757, v1758);
+                                let v1768 = constructor_output_reg(ctx, v1767);
+                                // Rule at src/isa/s390x/lower.isle line 3429.
+                                return Some(v1768);
+                            }
+                        }
+                        &IntCC::UnsignedLessThanOrEqual => {
+                            let v3 = C::value_type(ctx, v2);
+                            let v149 = C::ty_vec128(ctx, v3);
+                            if let Some(v150) = v149 {
+                                let v1740 = C::unpack_value_array_2(ctx, v1738);
+                                let v1747 = C::put_in_reg(ctx, v1740.0);
+                                let v1748 = C::put_in_reg(ctx, v1740.1);
+                                let v1763 = constructor_vec_cmphl(ctx, v150, v1747, v1748);
+                                let v1765 = constructor_vec_not(ctx, v150, v1763);
+                                let v1766 = constructor_output_reg(ctx, v1765);
+                                // Rule at src/isa/s390x/lower.isle line 3427.
+                                return Some(v1766);
+                            }
+                        }
+                        _ => {}
+                    }
+                    let v3 = C::value_type(ctx, v2);
+                    let v61 = C::fits_in_64(ctx, v3);
+                    if let Some(v62) = v61 {
+                        let v1740 = C::unpack_value_array_2(ctx, v1738);
+                        let v1744 = &constructor_icmp_val(ctx, true, v1739, v1740.0, v1740.1);
+                        let v1745 = constructor_lower_bool(ctx, v62, v1744);
+                        let v1746 = constructor_output_reg(ctx, v1745);
+                        // Rule at src/isa/s390x/lower.isle line 3291.
+                        return Some(v1746);
+                    }
+                }
+            }
+        }
+        &InstructionData::Load {
+            opcode: ref v1496,
+            arg: v1497,
+            flags: v1498,
+            offset: v1499,
+        } => {
+            match v1496 {
+                &Opcode::Load => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v36 = C::vr128_ty(ctx, v3);
+                        if let Some(v37) = v36 {
+                            let v1433 = &C::lane_order(ctx);
+                            match v1433 {
+                                &LaneOrder::LittleEndian => {
+                                    let v1504 = C::bigendian(ctx, v1498);
+                                    if let Some(v1505) = v1504 {
+                                        let v1533 = constructor_vec_load_elt_rev(
+                                            ctx, v37, v1498, v1497, v1499,
+                                        );
+                                        let v1534 = constructor_output_reg(ctx, v1533);
+                                        // Rule at src/isa/s390x/lower.isle line 2357.
+                                        return Some(v1534);
+                                    }
+                                    let v1509 = C::littleendian(ctx, v1498);
+                                    if let Some(v1510) = v1509 {
+                                        let v1535 = constructor_vec_load_full_rev(
+                                            ctx, v37, v1498, v1497, v1499,
+                                        );
+                                        let v1536 = constructor_output_reg(ctx, v1535);
+                                        // Rule at src/isa/s390x/lower.isle line 2362.
+                                        return Some(v1536);
+                                    }
+                                }
+                                &LaneOrder::BigEndian => {
+                                    let v1504 = C::bigendian(ctx, v1498);
+                                    if let Some(v1505) = v1504 {
+                                        let v1501 =
+                                            &constructor_lower_address(ctx, v1498, v1497, v1499);
+                                        let v1529 = constructor_vec_load(ctx, v37, v1501);
+                                        let v1530 = constructor_output_reg(ctx, v1529);
+                                        // Rule at src/isa/s390x/lower.isle line 2347.
+                                        return Some(v1530);
+                                    }
+                                    let v1509 = C::littleendian(ctx, v1498);
+                                    if let Some(v1510) = v1509 {
+                                        let v1531 = constructor_vec_load_byte_rev(
+                                            ctx, v37, v1498, v1497, v1499,
+                                        );
+                                        let v1532 = constructor_output_reg(ctx, v1531);
+                                        // Rule at src/isa/s390x/lower.isle line 2352.
+                                        return Some(v1532);
+                                    }
+                                }
+                                _ => {}
+                            }
+                        }
+                        match v3 {
+                            I8 => {
+                                let v1501 = &constructor_lower_address(ctx, v1498, v1497, v1499);
+                                let v1502 = constructor_zext32_mem(ctx, I8, v1501);
+                                let v1503 = constructor_output_reg(ctx, v1502);
+                                // Rule at src/isa/s390x/lower.isle line 2295.
+                                return Some(v1503);
+                            }
+                            I16 => {
+                                let v1504 = C::bigendian(ctx, v1498);
+                                if let Some(v1505) = v1504 {
+                                    let v1501 =
+                                        &constructor_lower_address(ctx, v1498, v1497, v1499);
+                                    let v1507 = constructor_zext32_mem(ctx, I16, v1501);
+                                    let v1508 = constructor_output_reg(ctx, v1507);
+                                    // Rule at src/isa/s390x/lower.isle line 2299.
+                                    return Some(v1508);
+                                }
+                                let v1509 = C::littleendian(ctx, v1498);
+                                if let Some(v1510) = v1509 {
+                                    let v1501 =
+                                        &constructor_lower_address(ctx, v1498, v1497, v1499);
+                                    let v1511 = constructor_loadrev16(ctx, v1501);
+                                    let v1512 = constructor_output_reg(ctx, v1511);
+                                    // Rule at src/isa/s390x/lower.isle line 2303.
+                                    return Some(v1512);
+                                }
+                            }
+                            I32 => {
+                                let v1504 = C::bigendian(ctx, v1498);
+                                if let Some(v1505) = v1504 {
+                                    let v1501 =
+                                        &constructor_lower_address(ctx, v1498, v1497, v1499);
+                                    let v1513 = constructor_load32(ctx, v1501);
+                                    let v1514 = constructor_output_reg(ctx, v1513);
+                                    // Rule at src/isa/s390x/lower.isle line 2307.
+                                    return Some(v1514);
+                                }
+                                let v1509 = C::littleendian(ctx, v1498);
+                                if let Some(v1510) = v1509 {
+                                    let v1501 =
+                                        &constructor_lower_address(ctx, v1498, v1497, v1499);
+                                    let v1515 = constructor_loadrev32(ctx, v1501);
+                                    let v1516 = constructor_output_reg(ctx, v1515);
+                                    // Rule at src/isa/s390x/lower.isle line 2311.
+                                    return Some(v1516);
+                                }
+                            }
+                            I64 => {
+                                let v1504 = C::bigendian(ctx, v1498);
+                                if let Some(v1505) = v1504 {
+                                    let v1501 =
+                                        &constructor_lower_address(ctx, v1498, v1497, v1499);
+                                    let v1517 = constructor_load64(ctx, v1501);
+                                    let v1518 = constructor_output_reg(ctx, v1517);
+                                    // Rule at src/isa/s390x/lower.isle line 2315.
+                                    return Some(v1518);
+                                }
+                                let v1509 = C::littleendian(ctx, v1498);
+                                if let Some(v1510) = v1509 {
+                                    let v1501 =
+                                        &constructor_lower_address(ctx, v1498, v1497, v1499);
+                                    let v1519 = constructor_loadrev64(ctx, v1501);
+                                    let v1520 = constructor_output_reg(ctx, v1519);
+                                    // Rule at src/isa/s390x/lower.isle line 2319.
+                                    return Some(v1520);
+                                }
+                            }
+                            R64 => {
+                                let v1504 = C::bigendian(ctx, v1498);
+                                if let Some(v1505) = v1504 {
+                                    let v1501 =
+                                        &constructor_lower_address(ctx, v1498, v1497, v1499);
+                                    let v1517 = constructor_load64(ctx, v1501);
+                                    let v1518 = constructor_output_reg(ctx, v1517);
+                                    // Rule at src/isa/s390x/lower.isle line 2323.
+                                    return Some(v1518);
+                                }
+                                let v1509 = C::littleendian(ctx, v1498);
+                                if let Some(v1510) = v1509 {
+                                    let v1501 =
+                                        &constructor_lower_address(ctx, v1498, v1497, v1499);
+                                    let v1519 = constructor_loadrev64(ctx, v1501);
+                                    let v1520 = constructor_output_reg(ctx, v1519);
+                                    // Rule at src/isa/s390x/lower.isle line 2327.
+                                    return Some(v1520);
+                                }
+                            }
+                            F32 => {
+                                let v1504 = C::bigendian(ctx, v1498);
+                                if let Some(v1505) = v1504 {
+                                    let v1501 =
+                                        &constructor_lower_address(ctx, v1498, v1497, v1499);
+                                    let v1521 =
+                                        constructor_vec_load_lane_undef(ctx, F32X4, v1501, 0x0);
+                                    let v1522 = constructor_output_reg(ctx, v1521);
+                                    // Rule at src/isa/s390x/lower.isle line 2331.
+                                    return Some(v1522);
+                                }
+                                let v1509 = C::littleendian(ctx, v1498);
+                                if let Some(v1510) = v1509 {
+                                    let v1501 =
+                                        &constructor_lower_address(ctx, v1498, v1497, v1499);
+                                    let v1523 = constructor_vec_load_lane_little_undef(
+                                        ctx, F32X4, v1501, 0x0,
+                                    );
+                                    let v1524 = constructor_output_reg(ctx, v1523);
+                                    // Rule at src/isa/s390x/lower.isle line 2335.
+                                    return Some(v1524);
+                                }
+                            }
+                            F64 => {
+                                let v1504 = C::bigendian(ctx, v1498);
+                                if let Some(v1505) = v1504 {
+                                    let v1501 =
+                                        &constructor_lower_address(ctx, v1498, v1497, v1499);
+                                    let v1525 =
+                                        constructor_vec_load_lane_undef(ctx, F64X2, v1501, 0x0);
+                                    let v1526 = constructor_output_reg(ctx, v1525);
+                                    // Rule at src/isa/s390x/lower.isle line 2339.
+                                    return Some(v1526);
+                                }
+                                let v1509 = C::littleendian(ctx, v1498);
+                                if let Some(v1510) = v1509 {
+                                    let v1501 =
+                                        &constructor_lower_address(ctx, v1498, v1497, v1499);
+                                    let v1527 = constructor_vec_load_lane_little_undef(
+                                        ctx, F64X2, v1501, 0x0,
+                                    );
+                                    let v1528 = constructor_output_reg(ctx, v1527);
+                                    // Rule at src/isa/s390x/lower.isle line 2343.
+                                    return Some(v1528);
+                                }
+                            }
+                            _ => {}
+                        }
+                    }
+                }
+                &Opcode::Uload8 => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v579 = C::gpr64_ty(ctx, v3);
+                        if let Some(v580) = v579 {
+                            let v1501 = &constructor_lower_address(ctx, v1498, v1497, v1499);
+                            let v1537 = constructor_zext64_mem(ctx, I8, v1501);
+                            let v1538 = constructor_output_reg(ctx, v1537);
+                            // Rule at src/isa/s390x/lower.isle line 2459.
+                            return Some(v1538);
+                        }
+                        let v575 = C::gpr32_ty(ctx, v3);
+                        if let Some(v576) = v575 {
+                            let v1501 = &constructor_lower_address(ctx, v1498, v1497, v1499);
+                            let v1502 = constructor_zext32_mem(ctx, I8, v1501);
+                            let v1503 = constructor_output_reg(ctx, v1502);
+                            // Rule at src/isa/s390x/lower.isle line 2455.
+                            return Some(v1503);
+                        }
+                    }
+                }
+                &Opcode::Sload8 => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v579 = C::gpr64_ty(ctx, v3);
+                        if let Some(v580) = v579 {
+                            let v1501 = &constructor_lower_address(ctx, v1498, v1497, v1499);
+                            let v1541 = constructor_sext64_mem(ctx, I8, v1501);
+                            let v1542 = constructor_output_reg(ctx, v1541);
+                            // Rule at src/isa/s390x/lower.isle line 2470.
+                            return Some(v1542);
+                        }
+                        let v575 = C::gpr32_ty(ctx, v3);
+                        if let Some(v576) = v575 {
+                            let v1501 = &constructor_lower_address(ctx, v1498, v1497, v1499);
+                            let v1539 = constructor_sext32_mem(ctx, I8, v1501);
+                            let v1540 = constructor_output_reg(ctx, v1539);
+                            // Rule at src/isa/s390x/lower.isle line 2466.
+                            return Some(v1540);
+                        }
+                    }
+                }
+                &Opcode::Uload16 => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v1504 = C::bigendian(ctx, v1498);
+                        if let Some(v1505) = v1504 {
+                            let v3 = C::value_type(ctx, v2);
+                            let v579 = C::gpr64_ty(ctx, v3);
+                            if let Some(v580) = v579 {
+                                let v1501 = &constructor_lower_address(ctx, v1498, v1497, v1499);
+                                let v1545 = constructor_zext64_mem(ctx, I16, v1501);
+                                let v1546 = constructor_output_reg(ctx, v1545);
+                                // Rule at src/isa/s390x/lower.isle line 2488.
+                                return Some(v1546);
+                            }
+                            let v575 = C::gpr32_ty(ctx, v3);
+                            if let Some(v576) = v575 {
+                                let v1501 = &constructor_lower_address(ctx, v1498, v1497, v1499);
+                                let v1507 = constructor_zext32_mem(ctx, I16, v1501);
+                                let v1508 = constructor_output_reg(ctx, v1507);
+                                // Rule at src/isa/s390x/lower.isle line 2477.
+                                return Some(v1508);
+                            }
+                        }
+                        let v1509 = C::littleendian(ctx, v1498);
+                        if let Some(v1510) = v1509 {
+                            let v3 = C::value_type(ctx, v2);
+                            let v579 = C::gpr64_ty(ctx, v3);
+                            if let Some(v580) = v579 {
+                                let v1501 = &constructor_lower_address(ctx, v1498, v1497, v1499);
+                                let v1511 = constructor_loadrev16(ctx, v1501);
+                                let v1547 = constructor_zext64_reg(ctx, I16, v1511);
+                                let v1548 = constructor_output_reg(ctx, v1547);
+                                // Rule at src/isa/s390x/lower.isle line 2493.
+                                return Some(v1548);
+                            }
+                            let v575 = C::gpr32_ty(ctx, v3);
+                            if let Some(v576) = v575 {
+                                let v1501 = &constructor_lower_address(ctx, v1498, v1497, v1499);
+                                let v1511 = constructor_loadrev16(ctx, v1501);
+                                let v1543 = constructor_zext32_reg(ctx, I16, v1511);
+                                let v1544 = constructor_output_reg(ctx, v1543);
+                                // Rule at src/isa/s390x/lower.isle line 2482.
+                                return Some(v1544);
+                            }
+                        }
+                    }
+                }
+                &Opcode::Sload16 => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v1504 = C::bigendian(ctx, v1498);
+                        if let Some(v1505) = v1504 {
+                            let v3 = C::value_type(ctx, v2);
+                            let v579 = C::gpr64_ty(ctx, v3);
+                            if let Some(v580) = v579 {
+                                let v1501 = &constructor_lower_address(ctx, v1498, v1497, v1499);
+                                let v1553 = constructor_sext64_mem(ctx, I16, v1501);
+                                let v1554 = constructor_output_reg(ctx, v1553);
+                                // Rule at src/isa/s390x/lower.isle line 2513.
+                                return Some(v1554);
+                            }
+                            let v575 = C::gpr32_ty(ctx, v3);
+                            if let Some(v576) = v575 {
+                                let v1501 = &constructor_lower_address(ctx, v1498, v1497, v1499);
+                                let v1549 = constructor_sext32_mem(ctx, I16, v1501);
+                                let v1550 = constructor_output_reg(ctx, v1549);
+                                // Rule at src/isa/s390x/lower.isle line 2502.
+                                return Some(v1550);
+                            }
+                        }
+                        let v1509 = C::littleendian(ctx, v1498);
+                        if let Some(v1510) = v1509 {
+                            let v3 = C::value_type(ctx, v2);
+                            let v579 = C::gpr64_ty(ctx, v3);
+                            if let Some(v580) = v579 {
+                                let v1501 = &constructor_lower_address(ctx, v1498, v1497, v1499);
+                                let v1511 = constructor_loadrev16(ctx, v1501);
+                                let v1555 = constructor_sext64_reg(ctx, I16, v1511);
+                                let v1556 = constructor_output_reg(ctx, v1555);
+                                // Rule at src/isa/s390x/lower.isle line 2518.
+                                return Some(v1556);
+                            }
+                            let v575 = C::gpr32_ty(ctx, v3);
+                            if let Some(v576) = v575 {
+                                let v1501 = &constructor_lower_address(ctx, v1498, v1497, v1499);
+                                let v1511 = constructor_loadrev16(ctx, v1501);
+                                let v1551 = constructor_sext32_reg(ctx, I16, v1511);
+                                let v1552 = constructor_output_reg(ctx, v1551);
+                                // Rule at src/isa/s390x/lower.isle line 2507.
+                                return Some(v1552);
+                            }
+                        }
+                    }
+                }
+                &Opcode::Uload32 => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v579 = C::gpr64_ty(ctx, v3);
+                        if let Some(v580) = v579 {
+                            let v1504 = C::bigendian(ctx, v1498);
+                            if let Some(v1505) = v1504 {
+                                let v1501 = &constructor_lower_address(ctx, v1498, v1497, v1499);
+                                let v1557 = constructor_zext64_mem(ctx, I32, v1501);
+                                let v1558 = constructor_output_reg(ctx, v1557);
+                                // Rule at src/isa/s390x/lower.isle line 2527.
+                                return Some(v1558);
+                            }
+                            let v1509 = C::littleendian(ctx, v1498);
+                            if let Some(v1510) = v1509 {
+                                let v1501 = &constructor_lower_address(ctx, v1498, v1497, v1499);
+                                let v1515 = constructor_loadrev32(ctx, v1501);
+                                let v1559 = constructor_zext64_reg(ctx, I32, v1515);
+                                let v1560 = constructor_output_reg(ctx, v1559);
+                                // Rule at src/isa/s390x/lower.isle line 2532.
+                                return Some(v1560);
+                            }
+                        }
+                    }
+                }
+                &Opcode::Sload32 => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v579 = C::gpr64_ty(ctx, v3);
+                        if let Some(v580) = v579 {
+                            let v1504 = C::bigendian(ctx, v1498);
+                            if let Some(v1505) = v1504 {
+                                let v1501 = &constructor_lower_address(ctx, v1498, v1497, v1499);
+                                let v1561 = constructor_sext64_mem(ctx, I32, v1501);
+                                let v1562 = constructor_output_reg(ctx, v1561);
+                                // Rule at src/isa/s390x/lower.isle line 2541.
+                                return Some(v1562);
+                            }
+                            let v1509 = C::littleendian(ctx, v1498);
+                            if let Some(v1510) = v1509 {
+                                let v1501 = &constructor_lower_address(ctx, v1498, v1497, v1499);
+                                let v1515 = constructor_loadrev32(ctx, v1501);
+                                let v1563 = constructor_sext64_reg(ctx, I32, v1515);
+                                let v1564 = constructor_output_reg(ctx, v1563);
+                                // Rule at src/isa/s390x/lower.isle line 2546.
+                                return Some(v1564);
+                            }
+                        }
+                    }
+                }
+                &Opcode::Uload8x8 => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        if v3 == I16X8 {
+                            let v1565 = constructor_load_v64(ctx, I8X16, v1498, v1497, v1499);
+                            let v1566 = constructor_vec_unpacku_high(ctx, I8X16, v1565);
+                            let v1567 = constructor_output_reg(ctx, v1566);
+                            // Rule at src/isa/s390x/lower.isle line 2555.
+                            return Some(v1567);
+                        }
+                    }
+                }
+                &Opcode::Sload8x8 => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        if v3 == I16X8 {
+                            let v1565 = constructor_load_v64(ctx, I8X16, v1498, v1497, v1499);
+                            let v1568 = constructor_vec_unpacks_high(ctx, I8X16, v1565);
+                            let v1569 = constructor_output_reg(ctx, v1568);
+                            // Rule at src/isa/s390x/lower.isle line 2559.
+                            return Some(v1569);
+                        }
+                    }
+                }
+                &Opcode::Uload16x4 => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        if v3 == I32X4 {
+                            let v1570 = constructor_load_v64(ctx, I16X8, v1498, v1497, v1499);
+                            let v1571 = constructor_vec_unpacku_high(ctx, I16X8, v1570);
+                            let v1572 = constructor_output_reg(ctx, v1571);
+                            // Rule at src/isa/s390x/lower.isle line 2563.
+                            return Some(v1572);
+                        }
+                    }
+                }
+                &Opcode::Sload16x4 => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        if v3 == I32X4 {
+                            let v1570 = constructor_load_v64(ctx, I16X8, v1498, v1497, v1499);
+                            let v1573 = constructor_vec_unpacks_high(ctx, I16X8, v1570);
+                            let v1574 = constructor_output_reg(ctx, v1573);
+                            // Rule at src/isa/s390x/lower.isle line 2567.
+                            return Some(v1574);
+                        }
+                    }
+                }
+                &Opcode::Uload32x2 => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        if v3 == I64X2 {
+                            let v1575 = constructor_load_v64(ctx, I32X4, v1498, v1497, v1499);
+                            let v1576 = constructor_vec_unpacku_high(ctx, I32X4, v1575);
+                            let v1577 = constructor_output_reg(ctx, v1576);
+                            // Rule at src/isa/s390x/lower.isle line 2571.
+                            return Some(v1577);
+                        }
+                    }
+                }
+                &Opcode::Sload32x2 => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        if v3 == I64X2 {
+                            let v1575 = constructor_load_v64(ctx, I32X4, v1498, v1497, v1499);
+                            let v1578 = constructor_vec_unpacks_high(ctx, I32X4, v1575);
+                            let v1579 = constructor_output_reg(ctx, v1578);
+                            // Rule at src/isa/s390x/lower.isle line 2575.
+                            return Some(v1579);
+                        }
+                    }
+                }
+                _ => {}
+            }
+        }
+        &InstructionData::LoadNoOffset {
+            opcode: ref v1056,
+            arg: v1057,
+            flags: v1058,
+        } => {
+            match v1056 {
+                &Opcode::Bitcast => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v171 = C::multi_lane(ctx, v3);
+                        if let Some(v172) = v171 {
+                            let v1059 = C::value_type(ctx, v1057);
+                            let v1078 = C::multi_lane(ctx, v1059);
+                            if let Some(v1079) = v1078 {
+                                if v172.0 == v1079.0 {
+                                    if v172.1 == v1079.1 {
+                                        let v1071 = constructor_output_value(ctx, v1057);
+                                        // Rule at src/isa/s390x/lower.isle line 1747.
+                                        return Some(v1071);
+                                    }
+                                }
+                            }
+                        }
+                        let v36 = C::vr128_ty(ctx, v3);
+                        if let Some(v37) = v36 {
+                            let v1059 = C::value_type(ctx, v1057);
+                            let v1082 = C::vr128_ty(ctx, v1059);
+                            if let Some(v1083) = v1082 {
+                                let v1060 = C::put_in_reg(ctx, v1057);
+                                let v1084 = &constructor_lane_order_from_memflags(ctx, v1058);
+                                let v1085 = constructor_abi_vec_elt_rev(ctx, v1084, v1083, v1060);
+                                let v1086 = constructor_abi_vec_elt_rev(ctx, v1084, v37, v1085);
+                                let v1087 = constructor_output_reg(ctx, v1086);
+                                // Rule at src/isa/s390x/lower.isle line 1757.
+                                return Some(v1087);
+                            }
+                        }
+                        let v1074 = C::ty_scalar_float(ctx, v3);
+                        if let Some(v1075) = v1074 {
+                            let v1059 = C::value_type(ctx, v1057);
+                            let v1076 = C::ty_scalar_float(ctx, v1059);
+                            if let Some(v1077) = v1076 {
+                                let v1071 = constructor_output_value(ctx, v1057);
+                                // Rule at src/isa/s390x/lower.isle line 1743.
+                                return Some(v1071);
+                            }
+                        }
+                        let v579 = C::gpr64_ty(ctx, v3);
+                        if let Some(v580) = v579 {
+                            let v1059 = C::value_type(ctx, v1057);
+                            let v1072 = C::gpr64_ty(ctx, v1059);
+                            if let Some(v1073) = v1072 {
+                                let v1071 = constructor_output_value(ctx, v1057);
+                                // Rule at src/isa/s390x/lower.isle line 1739.
+                                return Some(v1071);
+                            }
+                        }
+                        let v575 = C::gpr32_ty(ctx, v3);
+                        if let Some(v576) = v575 {
+                            let v1059 = C::value_type(ctx, v1057);
+                            let v1069 = C::gpr32_ty(ctx, v1059);
+                            if let Some(v1070) = v1069 {
+                                let v1071 = constructor_output_value(ctx, v1057);
+                                // Rule at src/isa/s390x/lower.isle line 1737.
+                                return Some(v1071);
+                            }
+                        }
+                        match v3 {
+                            I32 => {
+                                let v1059 = C::value_type(ctx, v1057);
+                                if v1059 == F32 {
+                                    let v1060 = C::put_in_reg(ctx, v1057);
+                                    let v53 = C::zero_reg(ctx);
+                                    let v1067 =
+                                        constructor_vec_extract_lane(ctx, F32X4, v1060, 0x0, v53);
+                                    let v1068 = constructor_output_reg(ctx, v1067);
+                                    // Rule at src/isa/s390x/lower.isle line 1733.
+                                    return Some(v1068);
+                                }
+                            }
+                            I64 => {
+                                let v1059 = C::value_type(ctx, v1057);
+                                if v1059 == F64 {
+                                    let v1060 = C::put_in_reg(ctx, v1057);
+                                    let v53 = C::zero_reg(ctx);
+                                    let v1063 =
+                                        constructor_vec_extract_lane(ctx, F64X2, v1060, 0x0, v53);
+                                    let v1064 = constructor_output_reg(ctx, v1063);
+                                    // Rule at src/isa/s390x/lower.isle line 1725.
+                                    return Some(v1064);
+                                }
+                            }
+                            F32 => {
+                                let v1059 = C::value_type(ctx, v1057);
+                                if v1059 == I32 {
+                                    let v1060 = C::put_in_reg(ctx, v1057);
+                                    let v53 = C::zero_reg(ctx);
+                                    let v1065 = constructor_vec_insert_lane_undef(
+                                        ctx, F32X4, v1060, 0x0, v53,
+                                    );
+                                    let v1066 = constructor_output_reg(ctx, v1065);
+                                    // Rule at src/isa/s390x/lower.isle line 1729.
+                                    return Some(v1066);
+                                }
+                            }
+                            F64 => {
+                                let v1059 = C::value_type(ctx, v1057);
+                                if v1059 == I64 {
+                                    let v1060 = C::put_in_reg(ctx, v1057);
+                                    let v53 = C::zero_reg(ctx);
+                                    let v1061 = constructor_vec_insert_lane_undef(
+                                        ctx, F64X2, v1060, 0x0, v53,
+                                    );
+                                    let v1062 = constructor_output_reg(ctx, v1061);
+                                    // Rule at src/isa/s390x/lower.isle line 1721.
+                                    return Some(v1062);
+                                }
+                            }
+                            _ => {}
+                        }
+                    }
+                }
+                &Opcode::AtomicLoad => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            I8 => {
+                                let v1700 = C::zero_offset(ctx);
+                                let v1701 = &constructor_lower_address(ctx, v1058, v1057, v1700);
+                                let v1702 = constructor_zext32_mem(ctx, I8, v1701);
+                                let v1703 = constructor_output_reg(ctx, v1702);
+                                // Rule at src/isa/s390x/lower.isle line 3202.
+                                return Some(v1703);
+                            }
+                            I16 => {
+                                let v1704 = C::bigendian(ctx, v1058);
+                                if let Some(v1705) = v1704 {
+                                    let v1700 = C::zero_offset(ctx);
+                                    let v1701 =
+                                        &constructor_lower_address(ctx, v1058, v1057, v1700);
+                                    let v1706 = constructor_zext32_mem(ctx, I16, v1701);
+                                    let v1707 = constructor_output_reg(ctx, v1706);
+                                    // Rule at src/isa/s390x/lower.isle line 3206.
+                                    return Some(v1707);
+                                }
+                                let v1708 = C::littleendian(ctx, v1058);
+                                if let Some(v1709) = v1708 {
+                                    let v1700 = C::zero_offset(ctx);
+                                    let v1701 =
+                                        &constructor_lower_address(ctx, v1058, v1057, v1700);
+                                    let v1710 = constructor_loadrev16(ctx, v1701);
+                                    let v1711 = constructor_output_reg(ctx, v1710);
+                                    // Rule at src/isa/s390x/lower.isle line 3210.
+                                    return Some(v1711);
+                                }
+                            }
+                            I32 => {
+                                let v1704 = C::bigendian(ctx, v1058);
+                                if let Some(v1705) = v1704 {
+                                    let v1700 = C::zero_offset(ctx);
+                                    let v1701 =
+                                        &constructor_lower_address(ctx, v1058, v1057, v1700);
+                                    let v1712 = constructor_load32(ctx, v1701);
+                                    let v1713 = constructor_output_reg(ctx, v1712);
+                                    // Rule at src/isa/s390x/lower.isle line 3214.
+                                    return Some(v1713);
+                                }
+                                let v1708 = C::littleendian(ctx, v1058);
+                                if let Some(v1709) = v1708 {
+                                    let v1700 = C::zero_offset(ctx);
+                                    let v1701 =
+                                        &constructor_lower_address(ctx, v1058, v1057, v1700);
+                                    let v1714 = constructor_loadrev32(ctx, v1701);
+                                    let v1715 = constructor_output_reg(ctx, v1714);
+                                    // Rule at src/isa/s390x/lower.isle line 3218.
+                                    return Some(v1715);
+                                }
+                            }
+                            I64 => {
+                                let v1704 = C::bigendian(ctx, v1058);
+                                if let Some(v1705) = v1704 {
+                                    let v1700 = C::zero_offset(ctx);
+                                    let v1701 =
+                                        &constructor_lower_address(ctx, v1058, v1057, v1700);
+                                    let v1716 = constructor_load64(ctx, v1701);
+                                    let v1717 = constructor_output_reg(ctx, v1716);
+                                    // Rule at src/isa/s390x/lower.isle line 3222.
+                                    return Some(v1717);
+                                }
+                                let v1708 = C::littleendian(ctx, v1058);
+                                if let Some(v1709) = v1708 {
+                                    let v1700 = C::zero_offset(ctx);
+                                    let v1701 =
+                                        &constructor_lower_address(ctx, v1058, v1057, v1700);
+                                    let v1718 = constructor_loadrev64(ctx, v1701);
+                                    let v1719 = constructor_output_reg(ctx, v1718);
+                                    // Rule at src/isa/s390x/lower.isle line 3226.
+                                    return Some(v1719);
+                                }
+                            }
+                            _ => {}
+                        }
+                    }
+                }
+                _ => {}
+            }
+        }
+        &InstructionData::MultiAry {
+            opcode: ref v1992,
+            args: v1993,
+        } => {
+            if let &Opcode::Return = v1992 {
+                let v1994 = C::value_list_slice(ctx, v1993);
+                let v1995 = constructor_lower_return(ctx, v1994);
+                // Rule at src/isa/s390x/lower.isle line 3891.
+                return Some(v1995);
+            }
+        }
+        &InstructionData::NullAry { opcode: ref v30 } => {
+            match v30 {
+                &Opcode::Debugtrap => {
+                    let v1904 = &constructor_debugtrap_impl(ctx);
+                    let v1905 = constructor_side_effect(ctx, v1904);
+                    // Rule at src/isa/s390x/lower.isle line 3817.
+                    return Some(v1905);
+                }
+                &Opcode::GetFramePointer => {
+                    let v2054 = &C::memarg_stack_off(ctx, 0x0, 0x0);
+                    let v2055 = constructor_load64(ctx, v2054);
+                    let v2056 = constructor_output_reg(ctx, v2055);
+                    // Rule at src/isa/s390x/lower.isle line 3977.
+                    return Some(v2056);
+                }
+                &Opcode::GetStackPointer => {
+                    let v2052 = constructor_sp(ctx);
+                    let v2053 = constructor_output_reg(ctx, v2052);
+                    // Rule at src/isa/s390x/lower.isle line 3974.
+                    return Some(v2053);
+                }
+                &Opcode::GetReturnAddress => {
+                    let v2058 = &C::memarg_initial_sp_offset(ctx, 0x70);
+                    let v2059 = constructor_load64(ctx, v2058);
+                    let v2060 = constructor_output_reg(ctx, v2059);
+                    // Rule at src/isa/s390x/lower.isle line 3980.
+                    return Some(v2060);
+                }
+                &Opcode::Null => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v32 = constructor_imm(ctx, v3, 0x0);
+                        let v33 = constructor_output_reg(ctx, v32);
+                        // Rule at src/isa/s390x/lower.isle line 39.
+                        return Some(v33);
+                    }
+                }
+                &Opcode::Nop => {
+                    let v34 = C::invalid_reg(ctx);
+                    let v35 = constructor_output_reg(ctx, v34);
+                    // Rule at src/isa/s390x/lower.isle line 45.
+                    return Some(v35);
+                }
+                &Opcode::Fence => {
+                    let v1735 = &constructor_fence_impl(ctx);
+                    let v1736 = constructor_side_effect(ctx, v1735);
+                    // Rule at src/isa/s390x/lower.isle line 3258.
+                    return Some(v1736);
+                }
+                _ => {}
+            }
+        }
+        &InstructionData::Shuffle {
+            opcode: ref v1236,
+            args: ref v1237,
+            imm: v1238,
+        } => {
+            if let &Opcode::Shuffle = v1236 {
+                let v1242 = C::u128_from_immediate(ctx, v1238);
+                if let Some(v1243) = v1242 {
+                    let v1244 = C::shuffle_mask_from_u128(ctx, v1243);
+                    match v1244.1 {
+                        0xF0F => {
+                            let v1259 = C::u64_pair_split(ctx, v1244.0);
+                            let v1262 = C::u32_pair_split(ctx, v1259.0);
+                            let v1274 = C::u16_pair_split(ctx, v1262.1);
+                            let v1277 = C::u8_pair_split(ctx, v1274.0);
+                            match v1277.0 {
+                                0x0 => {
+                                    if v1277.1 == 0x1 {
+                                        let v1280 = C::u8_pair_split(ctx, v1274.1);
+                                        if v1280.0 == 0x2 {
+                                            if v1280.1 == 0x3 {
+                                                let v1283 = C::u32_pair_split(ctx, v1259.1);
+                                                let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                let v1298 = C::u8_pair_split(ctx, v1295.0);
+                                                if v1298.0 == 0x4 {
+                                                    if v1298.1 == 0x5 {
+                                                        let v1301 = C::u8_pair_split(ctx, v1295.1);
+                                                        if v1301.0 == 0x6 {
+                                                            if v1301.1 == 0x7 {
+                                                                let v1239 = C::unpack_value_array_2(
+                                                                    ctx, v1237,
+                                                                );
+                                                                let v1254 =
+                                                                    C::put_in_reg(ctx, v1239.0);
+                                                                let v1393 =
+                                                                    constructor_vec_unpacku_high(
+                                                                        ctx, I32X4, v1254,
+                                                                    );
+                                                                let v1394 = constructor_output_reg(
+                                                                    ctx, v1393,
+                                                                );
+                                                                // Rule at src/isa/s390x/lower.isle line 2154.
+                                                                return Some(v1394);
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                                0x8 => {
+                                    if v1277.1 == 0x9 {
+                                        let v1280 = C::u8_pair_split(ctx, v1274.1);
+                                        if v1280.0 == 0xA {
+                                            if v1280.1 == 0xB {
+                                                let v1283 = C::u32_pair_split(ctx, v1259.1);
+                                                let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                let v1298 = C::u8_pair_split(ctx, v1295.0);
+                                                if v1298.0 == 0xC {
+                                                    if v1298.1 == 0xD {
+                                                        let v1301 = C::u8_pair_split(ctx, v1295.1);
+                                                        if v1301.0 == 0xE {
+                                                            if v1301.1 == 0xF {
+                                                                let v1239 = C::unpack_value_array_2(
+                                                                    ctx, v1237,
+                                                                );
+                                                                let v1254 =
+                                                                    C::put_in_reg(ctx, v1239.0);
+                                                                let v1405 =
+                                                                    constructor_vec_unpacku_low(
+                                                                        ctx, I32X4, v1254,
+                                                                    );
+                                                                let v1406 = constructor_output_reg(
+                                                                    ctx, v1405,
+                                                                );
+                                                                // Rule at src/isa/s390x/lower.isle line 2168.
+                                                                return Some(v1406);
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                                0x10 => {
+                                    if v1277.1 == 0x11 {
+                                        let v1280 = C::u8_pair_split(ctx, v1274.1);
+                                        if v1280.0 == 0x12 {
+                                            if v1280.1 == 0x13 {
+                                                let v1283 = C::u32_pair_split(ctx, v1259.1);
+                                                let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                let v1298 = C::u8_pair_split(ctx, v1295.0);
+                                                if v1298.0 == 0x14 {
+                                                    if v1298.1 == 0x15 {
+                                                        let v1301 = C::u8_pair_split(ctx, v1295.1);
+                                                        if v1301.0 == 0x16 {
+                                                            if v1301.1 == 0x17 {
+                                                                let v1239 = C::unpack_value_array_2(
+                                                                    ctx, v1237,
+                                                                );
+                                                                let v1312 =
+                                                                    C::put_in_reg(ctx, v1239.1);
+                                                                let v1399 =
+                                                                    constructor_vec_unpacku_high(
+                                                                        ctx, I32X4, v1312,
+                                                                    );
+                                                                let v1400 = constructor_output_reg(
+                                                                    ctx, v1399,
+                                                                );
+                                                                // Rule at src/isa/s390x/lower.isle line 2160.
+                                                                return Some(v1400);
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                                0x18 => {
+                                    if v1277.1 == 0x19 {
+                                        let v1280 = C::u8_pair_split(ctx, v1274.1);
+                                        if v1280.0 == 0x1A {
+                                            if v1280.1 == 0x1B {
+                                                let v1283 = C::u32_pair_split(ctx, v1259.1);
+                                                let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                let v1298 = C::u8_pair_split(ctx, v1295.0);
+                                                if v1298.0 == 0x1C {
+                                                    if v1298.1 == 0x1D {
+                                                        let v1301 = C::u8_pair_split(ctx, v1295.1);
+                                                        if v1301.0 == 0x1E {
+                                                            if v1301.1 == 0x1F {
+                                                                let v1239 = C::unpack_value_array_2(
+                                                                    ctx, v1237,
+                                                                );
+                                                                let v1312 =
+                                                                    C::put_in_reg(ctx, v1239.1);
+                                                                let v1411 =
+                                                                    constructor_vec_unpacku_low(
+                                                                        ctx, I32X4, v1312,
+                                                                    );
+                                                                let v1412 = constructor_output_reg(
+                                                                    ctx, v1411,
+                                                                );
+                                                                // Rule at src/isa/s390x/lower.isle line 2174.
+                                                                return Some(v1412);
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                                _ => {}
+                            }
+                        }
+                        0x3333 => {
+                            let v1259 = C::u64_pair_split(ctx, v1244.0);
+                            let v1262 = C::u32_pair_split(ctx, v1259.0);
+                            let v1265 = C::u16_pair_split(ctx, v1262.0);
+                            let v1271 = C::u8_pair_split(ctx, v1265.1);
+                            match v1271.0 {
+                                0x0 => {
+                                    if v1271.1 == 0x1 {
+                                        let v1274 = C::u16_pair_split(ctx, v1262.1);
+                                        let v1280 = C::u8_pair_split(ctx, v1274.1);
+                                        if v1280.0 == 0x2 {
+                                            if v1280.1 == 0x3 {
+                                                let v1283 = C::u32_pair_split(ctx, v1259.1);
+                                                let v1286 = C::u16_pair_split(ctx, v1283.0);
+                                                let v1292 = C::u8_pair_split(ctx, v1286.1);
+                                                if v1292.0 == 0x4 {
+                                                    if v1292.1 == 0x5 {
+                                                        let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                        let v1301 = C::u8_pair_split(ctx, v1295.1);
+                                                        if v1301.0 == 0x6 {
+                                                            if v1301.1 == 0x7 {
+                                                                let v1239 = C::unpack_value_array_2(
+                                                                    ctx, v1237,
+                                                                );
+                                                                let v1254 =
+                                                                    C::put_in_reg(ctx, v1239.0);
+                                                                let v1395 =
+                                                                    constructor_vec_unpacku_high(
+                                                                        ctx, I16X8, v1254,
+                                                                    );
+                                                                let v1396 = constructor_output_reg(
+                                                                    ctx, v1395,
+                                                                );
+                                                                // Rule at src/isa/s390x/lower.isle line 2156.
+                                                                return Some(v1396);
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                                0x8 => {
+                                    if v1271.1 == 0x9 {
+                                        let v1274 = C::u16_pair_split(ctx, v1262.1);
+                                        let v1280 = C::u8_pair_split(ctx, v1274.1);
+                                        if v1280.0 == 0xA {
+                                            if v1280.1 == 0xB {
+                                                let v1283 = C::u32_pair_split(ctx, v1259.1);
+                                                let v1286 = C::u16_pair_split(ctx, v1283.0);
+                                                let v1292 = C::u8_pair_split(ctx, v1286.1);
+                                                if v1292.0 == 0xC {
+                                                    if v1292.1 == 0xD {
+                                                        let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                        let v1301 = C::u8_pair_split(ctx, v1295.1);
+                                                        if v1301.0 == 0xE {
+                                                            if v1301.1 == 0xF {
+                                                                let v1239 = C::unpack_value_array_2(
+                                                                    ctx, v1237,
+                                                                );
+                                                                let v1254 =
+                                                                    C::put_in_reg(ctx, v1239.0);
+                                                                let v1407 =
+                                                                    constructor_vec_unpacku_low(
+                                                                        ctx, I16X8, v1254,
+                                                                    );
+                                                                let v1408 = constructor_output_reg(
+                                                                    ctx, v1407,
+                                                                );
+                                                                // Rule at src/isa/s390x/lower.isle line 2170.
+                                                                return Some(v1408);
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                                0x10 => {
+                                    if v1271.1 == 0x11 {
+                                        let v1274 = C::u16_pair_split(ctx, v1262.1);
+                                        let v1280 = C::u8_pair_split(ctx, v1274.1);
+                                        if v1280.0 == 0x12 {
+                                            if v1280.1 == 0x13 {
+                                                let v1283 = C::u32_pair_split(ctx, v1259.1);
+                                                let v1286 = C::u16_pair_split(ctx, v1283.0);
+                                                let v1292 = C::u8_pair_split(ctx, v1286.1);
+                                                if v1292.0 == 0x14 {
+                                                    if v1292.1 == 0x15 {
+                                                        let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                        let v1301 = C::u8_pair_split(ctx, v1295.1);
+                                                        if v1301.0 == 0x16 {
+                                                            if v1301.1 == 0x17 {
+                                                                let v1239 = C::unpack_value_array_2(
+                                                                    ctx, v1237,
+                                                                );
+                                                                let v1312 =
+                                                                    C::put_in_reg(ctx, v1239.1);
+                                                                let v1401 =
+                                                                    constructor_vec_unpacku_high(
+                                                                        ctx, I16X8, v1312,
+                                                                    );
+                                                                let v1402 = constructor_output_reg(
+                                                                    ctx, v1401,
+                                                                );
+                                                                // Rule at src/isa/s390x/lower.isle line 2162.
+                                                                return Some(v1402);
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                                0x18 => {
+                                    if v1271.1 == 0x19 {
+                                        let v1274 = C::u16_pair_split(ctx, v1262.1);
+                                        let v1280 = C::u8_pair_split(ctx, v1274.1);
+                                        if v1280.0 == 0x1A {
+                                            if v1280.1 == 0x1B {
+                                                let v1283 = C::u32_pair_split(ctx, v1259.1);
+                                                let v1286 = C::u16_pair_split(ctx, v1283.0);
+                                                let v1292 = C::u8_pair_split(ctx, v1286.1);
+                                                if v1292.0 == 0x1C {
+                                                    if v1292.1 == 0x1D {
+                                                        let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                        let v1301 = C::u8_pair_split(ctx, v1295.1);
+                                                        if v1301.0 == 0x1E {
+                                                            if v1301.1 == 0x1F {
+                                                                let v1239 = C::unpack_value_array_2(
+                                                                    ctx, v1237,
+                                                                );
+                                                                let v1312 =
+                                                                    C::put_in_reg(ctx, v1239.1);
+                                                                let v1413 =
+                                                                    constructor_vec_unpacku_low(
+                                                                        ctx, I16X8, v1312,
+                                                                    );
+                                                                let v1414 = constructor_output_reg(
+                                                                    ctx, v1413,
+                                                                );
+                                                                // Rule at src/isa/s390x/lower.isle line 2176.
+                                                                return Some(v1414);
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                                _ => {}
+                            }
+                        }
+                        0x5555 => {
+                            let v1259 = C::u64_pair_split(ctx, v1244.0);
+                            let v1262 = C::u32_pair_split(ctx, v1259.0);
+                            let v1265 = C::u16_pair_split(ctx, v1262.0);
+                            let v1268 = C::u8_pair_split(ctx, v1265.0);
+                            match v1268.1 {
+                                0x0 => {
+                                    let v1271 = C::u8_pair_split(ctx, v1265.1);
+                                    if v1271.1 == 0x1 {
+                                        let v1274 = C::u16_pair_split(ctx, v1262.1);
+                                        let v1277 = C::u8_pair_split(ctx, v1274.0);
+                                        if v1277.1 == 0x2 {
+                                            let v1280 = C::u8_pair_split(ctx, v1274.1);
+                                            if v1280.1 == 0x3 {
+                                                let v1283 = C::u32_pair_split(ctx, v1259.1);
+                                                let v1286 = C::u16_pair_split(ctx, v1283.0);
+                                                let v1289 = C::u8_pair_split(ctx, v1286.0);
+                                                if v1289.1 == 0x4 {
+                                                    let v1292 = C::u8_pair_split(ctx, v1286.1);
+                                                    if v1292.1 == 0x5 {
+                                                        let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                        let v1298 = C::u8_pair_split(ctx, v1295.0);
+                                                        if v1298.1 == 0x6 {
+                                                            let v1301 =
+                                                                C::u8_pair_split(ctx, v1295.1);
+                                                            if v1301.1 == 0x7 {
+                                                                let v1239 = C::unpack_value_array_2(
+                                                                    ctx, v1237,
+                                                                );
+                                                                let v1254 =
+                                                                    C::put_in_reg(ctx, v1239.0);
+                                                                let v1397 =
+                                                                    constructor_vec_unpacku_high(
+                                                                        ctx, I8X16, v1254,
+                                                                    );
+                                                                let v1398 = constructor_output_reg(
+                                                                    ctx, v1397,
+                                                                );
+                                                                // Rule at src/isa/s390x/lower.isle line 2158.
+                                                                return Some(v1398);
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                                0x8 => {
+                                    let v1271 = C::u8_pair_split(ctx, v1265.1);
+                                    if v1271.1 == 0x9 {
+                                        let v1274 = C::u16_pair_split(ctx, v1262.1);
+                                        let v1277 = C::u8_pair_split(ctx, v1274.0);
+                                        if v1277.1 == 0xA {
+                                            let v1280 = C::u8_pair_split(ctx, v1274.1);
+                                            if v1280.1 == 0xB {
+                                                let v1283 = C::u32_pair_split(ctx, v1259.1);
+                                                let v1286 = C::u16_pair_split(ctx, v1283.0);
+                                                let v1289 = C::u8_pair_split(ctx, v1286.0);
+                                                if v1289.1 == 0xC {
+                                                    let v1292 = C::u8_pair_split(ctx, v1286.1);
+                                                    if v1292.1 == 0xD {
+                                                        let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                        let v1298 = C::u8_pair_split(ctx, v1295.0);
+                                                        if v1298.1 == 0xE {
+                                                            let v1301 =
+                                                                C::u8_pair_split(ctx, v1295.1);
+                                                            if v1301.1 == 0xF {
+                                                                let v1239 = C::unpack_value_array_2(
+                                                                    ctx, v1237,
+                                                                );
+                                                                let v1254 =
+                                                                    C::put_in_reg(ctx, v1239.0);
+                                                                let v1409 =
+                                                                    constructor_vec_unpacku_low(
+                                                                        ctx, I8X16, v1254,
+                                                                    );
+                                                                let v1410 = constructor_output_reg(
+                                                                    ctx, v1409,
+                                                                );
+                                                                // Rule at src/isa/s390x/lower.isle line 2172.
+                                                                return Some(v1410);
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                                0x10 => {
+                                    let v1271 = C::u8_pair_split(ctx, v1265.1);
+                                    if v1271.1 == 0x11 {
+                                        let v1274 = C::u16_pair_split(ctx, v1262.1);
+                                        let v1277 = C::u8_pair_split(ctx, v1274.0);
+                                        if v1277.1 == 0x12 {
+                                            let v1280 = C::u8_pair_split(ctx, v1274.1);
+                                            if v1280.1 == 0x13 {
+                                                let v1283 = C::u32_pair_split(ctx, v1259.1);
+                                                let v1286 = C::u16_pair_split(ctx, v1283.0);
+                                                let v1289 = C::u8_pair_split(ctx, v1286.0);
+                                                if v1289.1 == 0x14 {
+                                                    let v1292 = C::u8_pair_split(ctx, v1286.1);
+                                                    if v1292.1 == 0x15 {
+                                                        let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                        let v1298 = C::u8_pair_split(ctx, v1295.0);
+                                                        if v1298.1 == 0x16 {
+                                                            let v1301 =
+                                                                C::u8_pair_split(ctx, v1295.1);
+                                                            if v1301.1 == 0x17 {
+                                                                let v1239 = C::unpack_value_array_2(
+                                                                    ctx, v1237,
+                                                                );
+                                                                let v1312 =
+                                                                    C::put_in_reg(ctx, v1239.1);
+                                                                let v1403 =
+                                                                    constructor_vec_unpacku_high(
+                                                                        ctx, I8X16, v1312,
+                                                                    );
+                                                                let v1404 = constructor_output_reg(
+                                                                    ctx, v1403,
+                                                                );
+                                                                // Rule at src/isa/s390x/lower.isle line 2164.
+                                                                return Some(v1404);
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                                0x18 => {
+                                    let v1271 = C::u8_pair_split(ctx, v1265.1);
+                                    if v1271.1 == 0x19 {
+                                        let v1274 = C::u16_pair_split(ctx, v1262.1);
+                                        let v1277 = C::u8_pair_split(ctx, v1274.0);
+                                        if v1277.1 == 0x1A {
+                                            let v1280 = C::u8_pair_split(ctx, v1274.1);
+                                            if v1280.1 == 0x1B {
+                                                let v1283 = C::u32_pair_split(ctx, v1259.1);
+                                                let v1286 = C::u16_pair_split(ctx, v1283.0);
+                                                let v1289 = C::u8_pair_split(ctx, v1286.0);
+                                                if v1289.1 == 0x1C {
+                                                    let v1292 = C::u8_pair_split(ctx, v1286.1);
+                                                    if v1292.1 == 0x1D {
+                                                        let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                        let v1298 = C::u8_pair_split(ctx, v1295.0);
+                                                        if v1298.1 == 0x1E {
+                                                            let v1301 =
+                                                                C::u8_pair_split(ctx, v1295.1);
+                                                            if v1301.1 == 0x1F {
+                                                                let v1239 = C::unpack_value_array_2(
+                                                                    ctx, v1237,
+                                                                );
+                                                                let v1312 =
+                                                                    C::put_in_reg(ctx, v1239.1);
+                                                                let v1415 =
+                                                                    constructor_vec_unpacku_low(
+                                                                        ctx, I8X16, v1312,
+                                                                    );
+                                                                let v1416 = constructor_output_reg(
+                                                                    ctx, v1415,
+                                                                );
+                                                                // Rule at src/isa/s390x/lower.isle line 2178.
+                                                                return Some(v1416);
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                                _ => {}
+                            }
+                        }
+                        0xFFFF => {
+                            let v1259 = C::u64_pair_split(ctx, v1244.0);
+                            let v1262 = C::u32_pair_split(ctx, v1259.0);
+                            let v1265 = C::u16_pair_split(ctx, v1262.0);
+                            let v1268 = C::u8_pair_split(ctx, v1265.0);
+                            match v1268.0 {
+                                0x0 => {
+                                    match v1268.1 {
+                                        0x0 => {
+                                            let v1271 = C::u8_pair_split(ctx, v1265.1);
+                                            if v1271.0 == 0x1 {
+                                                if v1271.1 == 0x1 {
+                                                    let v1274 = C::u16_pair_split(ctx, v1262.1);
+                                                    let v1277 = C::u8_pair_split(ctx, v1274.0);
+                                                    if v1277.0 == 0x2 {
+                                                        if v1277.1 == 0x2 {
+                                                            let v1280 =
+                                                                C::u8_pair_split(ctx, v1274.1);
+                                                            if v1280.0 == 0x3 {
+                                                                if v1280.1 == 0x3 {
+                                                                    let v1283 = C::u32_pair_split(
+                                                                        ctx, v1259.1,
+                                                                    );
+                                                                    let v1286 = C::u16_pair_split(
+                                                                        ctx, v1283.0,
+                                                                    );
+                                                                    let v1289 = C::u8_pair_split(
+                                                                        ctx, v1286.0,
+                                                                    );
+                                                                    if v1289.0 == 0x4 {
+                                                                        if v1289.1 == 0x4 {
+                                                                            let v1292 =
+                                                                                C::u8_pair_split(
+                                                                                    ctx, v1286.1,
+                                                                                );
+                                                                            if v1292.0 == 0x5 {
+                                                                                if v1292.1 == 0x5 {
+                                                                                    let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                                                    let v1298 = C::u8_pair_split(ctx, v1295.0);
+                                                                                    if v1298.0
+                                                                                        == 0x6
+                                                                                    {
+                                                                                        if v1298.1
+                                                                                            == 0x6
+                                                                                        {
+                                                                                            let v1301 = C::u8_pair_split(ctx, v1295.1);
+                                                                                            if v1301.0 == 0x7 {
+                                                                                                if v1301.1 == 0x7 {
+                                                                                                    let v1239 = C::unpack_value_array_2(ctx, v1237);
+                                                                                                    let v1254 = C::put_in_reg(ctx, v1239.0);
+                                                                                                    let v1248 = C::put_in_reg(ctx, v1239.0);
+                                                                                                    let v1327 = constructor_vec_merge_high(ctx, I8X16, v1254, v1248);
+                                                                                                    let v1328 = constructor_output_reg(ctx, v1327);
+                                                                                                    // Rule at src/isa/s390x/lower.isle line 2082.
+                                                                                                    return Some(v1328);
+                                                                                                }
+                                                                                            }
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                        0x1 => {
+                                            let v1271 = C::u8_pair_split(ctx, v1265.1);
+                                            match v1271.0 {
+                                                0x0 => {
+                                                    if v1271.1 == 0x1 {
+                                                        let v1274 = C::u16_pair_split(ctx, v1262.1);
+                                                        let v1277 = C::u8_pair_split(ctx, v1274.0);
+                                                        if v1277.0 == 0x2 {
+                                                            if v1277.1 == 0x3 {
+                                                                let v1280 =
+                                                                    C::u8_pair_split(ctx, v1274.1);
+                                                                if v1280.0 == 0x2 {
+                                                                    if v1280.1 == 0x3 {
+                                                                        let v1283 =
+                                                                            C::u32_pair_split(
+                                                                                ctx, v1259.1,
+                                                                            );
+                                                                        let v1286 =
+                                                                            C::u16_pair_split(
+                                                                                ctx, v1283.0,
+                                                                            );
+                                                                        let v1289 =
+                                                                            C::u8_pair_split(
+                                                                                ctx, v1286.0,
+                                                                            );
+                                                                        if v1289.0 == 0x4 {
+                                                                            if v1289.1 == 0x5 {
+                                                                                let v1292 = C::u8_pair_split(ctx, v1286.1);
+                                                                                if v1292.0 == 0x4 {
+                                                                                    if v1292.1
+                                                                                        == 0x5
+                                                                                    {
+                                                                                        let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                                                        let v1298 = C::u8_pair_split(ctx, v1295.0);
+                                                                                        if v1298.0
+                                                                                            == 0x6
+                                                                                        {
+                                                                                            if v1298.1 == 0x7 {
+                                                                                                let v1301 = C::u8_pair_split(ctx, v1295.1);
+                                                                                                if v1301.0 == 0x6 {
+                                                                                                    if v1301.1 == 0x7 {
+                                                                                                        let v1239 = C::unpack_value_array_2(ctx, v1237);
+                                                                                                        let v1254 = C::put_in_reg(ctx, v1239.0);
+                                                                                                        let v1248 = C::put_in_reg(ctx, v1239.0);
+                                                                                                        let v1325 = constructor_vec_merge_high(ctx, I16X8, v1254, v1248);
+                                                                                                        let v1326 = constructor_output_reg(ctx, v1325);
+                                                                                                        // Rule at src/isa/s390x/lower.isle line 2080.
+                                                                                                        return Some(v1326);
+                                                                                                    }
+                                                                                                }
+                                                                                            }
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                                0x2 => {
+                                                    if v1271.1 == 0x3 {
+                                                        let v1274 = C::u16_pair_split(ctx, v1262.1);
+                                                        let v1277 = C::u8_pair_split(ctx, v1274.0);
+                                                        match v1277.0 {
+                                                            0x0 => {
+                                                                if v1277.1 == 0x1 {
+                                                                    let v1280 = C::u8_pair_split(
+                                                                        ctx, v1274.1,
+                                                                    );
+                                                                    if v1280.0 == 0x2 {
+                                                                        if v1280.1 == 0x3 {
+                                                                            let v1283 =
+                                                                                C::u32_pair_split(
+                                                                                    ctx, v1259.1,
+                                                                                );
+                                                                            let v1286 =
+                                                                                C::u16_pair_split(
+                                                                                    ctx, v1283.0,
+                                                                                );
+                                                                            let v1289 =
+                                                                                C::u8_pair_split(
+                                                                                    ctx, v1286.0,
+                                                                                );
+                                                                            if v1289.0 == 0x4 {
+                                                                                if v1289.1 == 0x5 {
+                                                                                    let v1292 = C::u8_pair_split(ctx, v1286.1);
+                                                                                    if v1292.0
+                                                                                        == 0x6
+                                                                                    {
+                                                                                        if v1292.1
+                                                                                            == 0x7
+                                                                                        {
+                                                                                            let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                                                            let v1298 = C::u8_pair_split(ctx, v1295.0);
+                                                                                            if v1298.0 == 0x4 {
+                                                                                                if v1298.1 == 0x5 {
+                                                                                                    let v1301 = C::u8_pair_split(ctx, v1295.1);
+                                                                                                    if v1301.0 == 0x6 {
+                                                                                                        if v1301.1 == 0x7 {
+                                                                                                            let v1239 = C::unpack_value_array_2(ctx, v1237);
+                                                                                                            let v1254 = C::put_in_reg(ctx, v1239.0);
+                                                                                                            let v1248 = C::put_in_reg(ctx, v1239.0);
+                                                                                                            let v1323 = constructor_vec_merge_high(ctx, I32X4, v1254, v1248);
+                                                                                                            let v1324 = constructor_output_reg(ctx, v1323);
+                                                                                                            // Rule at src/isa/s390x/lower.isle line 2078.
+                                                                                                            return Some(v1324);
+                                                                                                        }
+                                                                                                    }
+                                                                                                }
+                                                                                            }
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                            0x4 => {
+                                                                if v1277.1 == 0x5 {
+                                                                    let v1280 = C::u8_pair_split(
+                                                                        ctx, v1274.1,
+                                                                    );
+                                                                    if v1280.0 == 0x6 {
+                                                                        if v1280.1 == 0x7 {
+                                                                            let v1283 =
+                                                                                C::u32_pair_split(
+                                                                                    ctx, v1259.1,
+                                                                                );
+                                                                            let v1286 =
+                                                                                C::u16_pair_split(
+                                                                                    ctx, v1283.0,
+                                                                                );
+                                                                            let v1289 =
+                                                                                C::u8_pair_split(
+                                                                                    ctx, v1286.0,
+                                                                                );
+                                                                            match v1289.0 {
+                                                                                0x0 => {
+                                                                                    if v1289.1
+                                                                                        == 0x1
+                                                                                    {
+                                                                                        let v1292 = C::u8_pair_split(ctx, v1286.1);
+                                                                                        if v1292.0
+                                                                                            == 0x2
+                                                                                        {
+                                                                                            if v1292.1 == 0x3 {
+                                                                                                let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                                                                let v1298 = C::u8_pair_split(ctx, v1295.0);
+                                                                                                if v1298.0 == 0x4 {
+                                                                                                    if v1298.1 == 0x5 {
+                                                                                                        let v1301 = C::u8_pair_split(ctx, v1295.1);
+                                                                                                        if v1301.0 == 0x6 {
+                                                                                                            if v1301.1 == 0x7 {
+                                                                                                                let v1239 = C::unpack_value_array_2(ctx, v1237);
+                                                                                                                let v1254 = C::put_in_reg(ctx, v1239.0);
+                                                                                                                let v1248 = C::put_in_reg(ctx, v1239.0);
+                                                                                                                let v1321 = constructor_vec_merge_high(ctx, I64X2, v1254, v1248);
+                                                                                                                let v1322 = constructor_output_reg(ctx, v1321);
+                                                                                                                // Rule at src/isa/s390x/lower.isle line 2076.
+                                                                                                                return Some(v1322);
+                                                                                                            }
+                                                                                                        }
+                                                                                                    }
+                                                                                                }
+                                                                                            }
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                                0x8 => {
+                                                                                    if v1289.1
+                                                                                        == 0x9
+                                                                                    {
+                                                                                        let v1292 = C::u8_pair_split(ctx, v1286.1);
+                                                                                        if v1292.0
+                                                                                            == 0xA
+                                                                                        {
+                                                                                            if v1292.1 == 0xB {
+                                                                                                let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                                                                let v1298 = C::u8_pair_split(ctx, v1295.0);
+                                                                                                if v1298.0 == 0xC {
+                                                                                                    if v1298.1 == 0xD {
+                                                                                                        let v1301 = C::u8_pair_split(ctx, v1295.1);
+                                                                                                        if v1301.0 == 0xE {
+                                                                                                            if v1301.1 == 0xF {
+                                                                                                                let v1239 = C::unpack_value_array_2(ctx, v1237);
+                                                                                                                let v1254 = C::put_in_reg(ctx, v1239.0);
+                                                                                                                let v1248 = C::put_in_reg(ctx, v1239.0);
+                                                                                                                let v1425 = constructor_vec_permute_dw_imm(ctx, I8X16, v1254, 0x0, v1248, 0x1);
+                                                                                                                let v1426 = constructor_output_reg(ctx, v1425);
+                                                                                                                // Rule at src/isa/s390x/lower.isle line 2190.
+                                                                                                                return Some(v1426);
+                                                                                                            }
+                                                                                                        }
+                                                                                                    }
+                                                                                                }
+                                                                                            }
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                                0x10 => {
+                                                                                    if v1289.1
+                                                                                        == 0x11
+                                                                                    {
+                                                                                        let v1292 = C::u8_pair_split(ctx, v1286.1);
+                                                                                        if v1292.0
+                                                                                            == 0x12
+                                                                                        {
+                                                                                            if v1292.1 == 0x13 {
+                                                                                                let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                                                                let v1298 = C::u8_pair_split(ctx, v1295.0);
+                                                                                                if v1298.0 == 0x14 {
+                                                                                                    if v1298.1 == 0x15 {
+                                                                                                        let v1301 = C::u8_pair_split(ctx, v1295.1);
+                                                                                                        if v1301.0 == 0x16 {
+                                                                                                            if v1301.1 == 0x17 {
+                                                                                                                let v1239 = C::unpack_value_array_2(ctx, v1237);
+                                                                                                                let v1254 = C::put_in_reg(ctx, v1239.0);
+                                                                                                                let v1255 = C::put_in_reg(ctx, v1239.1);
+                                                                                                                let v1304 = constructor_vec_merge_high(ctx, I64X2, v1254, v1255);
+                                                                                                                let v1305 = constructor_output_reg(ctx, v1304);
+                                                                                                                // Rule at src/isa/s390x/lower.isle line 2060.
+                                                                                                                return Some(v1305);
+                                                                                                            }
+                                                                                                        }
+                                                                                                    }
+                                                                                                }
+                                                                                            }
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                                0x18 => {
+                                                                                    if v1289.1
+                                                                                        == 0x19
+                                                                                    {
+                                                                                        let v1292 = C::u8_pair_split(ctx, v1286.1);
+                                                                                        if v1292.0
+                                                                                            == 0x1A
+                                                                                        {
+                                                                                            if v1292.1 == 0x1B {
+                                                                                                let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                                                                let v1298 = C::u8_pair_split(ctx, v1295.0);
+                                                                                                if v1298.0 == 0x1C {
+                                                                                                    if v1298.1 == 0x1D {
+                                                                                                        let v1301 = C::u8_pair_split(ctx, v1295.1);
+                                                                                                        if v1301.0 == 0x1E {
+                                                                                                            if v1301.1 == 0x1F {
+                                                                                                                let v1239 = C::unpack_value_array_2(ctx, v1237);
+                                                                                                                let v1254 = C::put_in_reg(ctx, v1239.0);
+                                                                                                                let v1255 = C::put_in_reg(ctx, v1239.1);
+                                                                                                                let v1417 = constructor_vec_permute_dw_imm(ctx, I8X16, v1254, 0x0, v1255, 0x1);
+                                                                                                                let v1418 = constructor_output_reg(ctx, v1417);
+                                                                                                                // Rule at src/isa/s390x/lower.isle line 2182.
+                                                                                                                return Some(v1418);
+                                                                                                            }
+                                                                                                        }
+                                                                                                    }
+                                                                                                }
+                                                                                            }
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                                _ => {}
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                            0x10 => {
+                                                                if v1277.1 == 0x11 {
+                                                                    let v1280 = C::u8_pair_split(
+                                                                        ctx, v1274.1,
+                                                                    );
+                                                                    if v1280.0 == 0x12 {
+                                                                        if v1280.1 == 0x13 {
+                                                                            let v1283 =
+                                                                                C::u32_pair_split(
+                                                                                    ctx, v1259.1,
+                                                                                );
+                                                                            let v1286 =
+                                                                                C::u16_pair_split(
+                                                                                    ctx, v1283.0,
+                                                                                );
+                                                                            let v1289 =
+                                                                                C::u8_pair_split(
+                                                                                    ctx, v1286.0,
+                                                                                );
+                                                                            if v1289.0 == 0x4 {
+                                                                                if v1289.1 == 0x5 {
+                                                                                    let v1292 = C::u8_pair_split(ctx, v1286.1);
+                                                                                    if v1292.0
+                                                                                        == 0x6
+                                                                                    {
+                                                                                        if v1292.1
+                                                                                            == 0x7
+                                                                                        {
+                                                                                            let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                                                            let v1298 = C::u8_pair_split(ctx, v1295.0);
+                                                                                            if v1298.0 == 0x14 {
+                                                                                                if v1298.1 == 0x15 {
+                                                                                                    let v1301 = C::u8_pair_split(ctx, v1295.1);
+                                                                                                    if v1301.0 == 0x16 {
+                                                                                                        if v1301.1 == 0x17 {
+                                                                                                            let v1239 = C::unpack_value_array_2(ctx, v1237);
+                                                                                                            let v1254 = C::put_in_reg(ctx, v1239.0);
+                                                                                                            let v1255 = C::put_in_reg(ctx, v1239.1);
+                                                                                                            let v1306 = constructor_vec_merge_high(ctx, I32X4, v1254, v1255);
+                                                                                                            let v1307 = constructor_output_reg(ctx, v1306);
+                                                                                                            // Rule at src/isa/s390x/lower.isle line 2062.
+                                                                                                            return Some(v1307);
+                                                                                                        }
+                                                                                                    }
+                                                                                                }
+                                                                                            }
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                            _ => {}
+                                                        }
+                                                    }
+                                                }
+                                                0x10 => {
+                                                    if v1271.1 == 0x11 {
+                                                        let v1274 = C::u16_pair_split(ctx, v1262.1);
+                                                        let v1277 = C::u8_pair_split(ctx, v1274.0);
+                                                        if v1277.0 == 0x2 {
+                                                            if v1277.1 == 0x3 {
+                                                                let v1280 =
+                                                                    C::u8_pair_split(ctx, v1274.1);
+                                                                if v1280.0 == 0x12 {
+                                                                    if v1280.1 == 0x13 {
+                                                                        let v1283 =
+                                                                            C::u32_pair_split(
+                                                                                ctx, v1259.1,
+                                                                            );
+                                                                        let v1286 =
+                                                                            C::u16_pair_split(
+                                                                                ctx, v1283.0,
+                                                                            );
+                                                                        let v1289 =
+                                                                            C::u8_pair_split(
+                                                                                ctx, v1286.0,
+                                                                            );
+                                                                        if v1289.0 == 0x4 {
+                                                                            if v1289.1 == 0x5 {
+                                                                                let v1292 = C::u8_pair_split(ctx, v1286.1);
+                                                                                if v1292.0 == 0x14 {
+                                                                                    if v1292.1
+                                                                                        == 0x15
+                                                                                    {
+                                                                                        let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                                                        let v1298 = C::u8_pair_split(ctx, v1295.0);
+                                                                                        if v1298.0
+                                                                                            == 0x6
+                                                                                        {
+                                                                                            if v1298.1 == 0x7 {
+                                                                                                let v1301 = C::u8_pair_split(ctx, v1295.1);
+                                                                                                if v1301.0 == 0x16 {
+                                                                                                    if v1301.1 == 0x17 {
+                                                                                                        let v1239 = C::unpack_value_array_2(ctx, v1237);
+                                                                                                        let v1254 = C::put_in_reg(ctx, v1239.0);
+                                                                                                        let v1255 = C::put_in_reg(ctx, v1239.1);
+                                                                                                        let v1308 = constructor_vec_merge_high(ctx, I16X8, v1254, v1255);
+                                                                                                        let v1309 = constructor_output_reg(ctx, v1308);
+                                                                                                        // Rule at src/isa/s390x/lower.isle line 2064.
+                                                                                                        return Some(v1309);
+                                                                                                    }
+                                                                                                }
+                                                                                            }
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                                _ => {}
+                                            }
+                                        }
+                                        0x10 => {
+                                            let v1271 = C::u8_pair_split(ctx, v1265.1);
+                                            if v1271.0 == 0x1 {
+                                                if v1271.1 == 0x11 {
+                                                    let v1274 = C::u16_pair_split(ctx, v1262.1);
+                                                    let v1277 = C::u8_pair_split(ctx, v1274.0);
+                                                    if v1277.0 == 0x2 {
+                                                        if v1277.1 == 0x12 {
+                                                            let v1280 =
+                                                                C::u8_pair_split(ctx, v1274.1);
+                                                            if v1280.0 == 0x3 {
+                                                                if v1280.1 == 0x13 {
+                                                                    let v1283 = C::u32_pair_split(
+                                                                        ctx, v1259.1,
+                                                                    );
+                                                                    let v1286 = C::u16_pair_split(
+                                                                        ctx, v1283.0,
+                                                                    );
+                                                                    let v1289 = C::u8_pair_split(
+                                                                        ctx, v1286.0,
+                                                                    );
+                                                                    if v1289.0 == 0x4 {
+                                                                        if v1289.1 == 0x14 {
+                                                                            let v1292 =
+                                                                                C::u8_pair_split(
+                                                                                    ctx, v1286.1,
+                                                                                );
+                                                                            if v1292.0 == 0x5 {
+                                                                                if v1292.1 == 0x15 {
+                                                                                    let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                                                    let v1298 = C::u8_pair_split(ctx, v1295.0);
+                                                                                    if v1298.0
+                                                                                        == 0x6
+                                                                                    {
+                                                                                        if v1298.1
+                                                                                            == 0x16
+                                                                                        {
+                                                                                            let v1301 = C::u8_pair_split(ctx, v1295.1);
+                                                                                            if v1301.0 == 0x7 {
+                                                                                                if v1301.1 == 0x17 {
+                                                                                                    let v1239 = C::unpack_value_array_2(ctx, v1237);
+                                                                                                    let v1254 = C::put_in_reg(ctx, v1239.0);
+                                                                                                    let v1255 = C::put_in_reg(ctx, v1239.1);
+                                                                                                    let v1310 = constructor_vec_merge_high(ctx, I8X16, v1254, v1255);
+                                                                                                    let v1311 = constructor_output_reg(ctx, v1310);
+                                                                                                    // Rule at src/isa/s390x/lower.isle line 2066.
+                                                                                                    return Some(v1311);
+                                                                                                }
+                                                                                            }
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                        _ => {}
+                                    }
+                                }
+                                0x1 => {
+                                    if v1268.1 == 0x3 {
+                                        let v1271 = C::u8_pair_split(ctx, v1265.1);
+                                        if v1271.0 == 0x5 {
+                                            if v1271.1 == 0x7 {
+                                                let v1274 = C::u16_pair_split(ctx, v1262.1);
+                                                let v1277 = C::u8_pair_split(ctx, v1274.0);
+                                                if v1277.0 == 0x9 {
+                                                    if v1277.1 == 0xB {
+                                                        let v1280 = C::u8_pair_split(ctx, v1274.1);
+                                                        if v1280.0 == 0xD {
+                                                            if v1280.1 == 0xF {
+                                                                let v1283 =
+                                                                    C::u32_pair_split(ctx, v1259.1);
+                                                                let v1286 =
+                                                                    C::u16_pair_split(ctx, v1283.0);
+                                                                let v1289 =
+                                                                    C::u8_pair_split(ctx, v1286.0);
+                                                                match v1289.0 {
+                                                                    0x1 => {
+                                                                        if v1289.1 == 0x3 {
+                                                                            let v1292 =
+                                                                                C::u8_pair_split(
+                                                                                    ctx, v1286.1,
+                                                                                );
+                                                                            if v1292.0 == 0x5 {
+                                                                                if v1292.1 == 0x7 {
+                                                                                    let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                                                    let v1298 = C::u8_pair_split(ctx, v1295.0);
+                                                                                    if v1298.0
+                                                                                        == 0x9
+                                                                                    {
+                                                                                        if v1298.1
+                                                                                            == 0xB
+                                                                                        {
+                                                                                            let v1301 = C::u8_pair_split(ctx, v1295.1);
+                                                                                            if v1301.0 == 0xD {
+                                                                                                if v1301.1 == 0xF {
+                                                                                                    let v1239 = C::unpack_value_array_2(ctx, v1237);
+                                                                                                    let v1254 = C::put_in_reg(ctx, v1239.0);
+                                                                                                    let v1248 = C::put_in_reg(ctx, v1239.0);
+                                                                                                    let v1385 = constructor_vec_pack(ctx, I16X8, v1254, v1248);
+                                                                                                    let v1386 = constructor_output_reg(ctx, v1385);
+                                                                                                    // Rule at src/isa/s390x/lower.isle line 2144.
+                                                                                                    return Some(v1386);
+                                                                                                }
+                                                                                            }
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                    0x11 => {
+                                                                        if v1289.1 == 0x13 {
+                                                                            let v1292 =
+                                                                                C::u8_pair_split(
+                                                                                    ctx, v1286.1,
+                                                                                );
+                                                                            if v1292.0 == 0x15 {
+                                                                                if v1292.1 == 0x17 {
+                                                                                    let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                                                    let v1298 = C::u8_pair_split(ctx, v1295.0);
+                                                                                    if v1298.0
+                                                                                        == 0x19
+                                                                                    {
+                                                                                        if v1298.1
+                                                                                            == 0x1B
+                                                                                        {
+                                                                                            let v1301 = C::u8_pair_split(ctx, v1295.1);
+                                                                                            if v1301.0 == 0x1D {
+                                                                                                if v1301.1 == 0x1F {
+                                                                                                    let v1239 = C::unpack_value_array_2(ctx, v1237);
+                                                                                                    let v1254 = C::put_in_reg(ctx, v1239.0);
+                                                                                                    let v1255 = C::put_in_reg(ctx, v1239.1);
+                                                                                                    let v1373 = constructor_vec_pack(ctx, I16X8, v1254, v1255);
+                                                                                                    let v1374 = constructor_output_reg(ctx, v1373);
+                                                                                                    // Rule at src/isa/s390x/lower.isle line 2132.
+                                                                                                    return Some(v1374);
+                                                                                                }
+                                                                                            }
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                    _ => {}
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                                0x2 => {
+                                    if v1268.1 == 0x3 {
+                                        let v1271 = C::u8_pair_split(ctx, v1265.1);
+                                        if v1271.0 == 0x6 {
+                                            if v1271.1 == 0x7 {
+                                                let v1274 = C::u16_pair_split(ctx, v1262.1);
+                                                let v1277 = C::u8_pair_split(ctx, v1274.0);
+                                                if v1277.0 == 0xA {
+                                                    if v1277.1 == 0xB {
+                                                        let v1280 = C::u8_pair_split(ctx, v1274.1);
+                                                        if v1280.0 == 0xE {
+                                                            if v1280.1 == 0xF {
+                                                                let v1283 =
+                                                                    C::u32_pair_split(ctx, v1259.1);
+                                                                let v1286 =
+                                                                    C::u16_pair_split(ctx, v1283.0);
+                                                                let v1289 =
+                                                                    C::u8_pair_split(ctx, v1286.0);
+                                                                match v1289.0 {
+                                                                    0x2 => {
+                                                                        if v1289.1 == 0x3 {
+                                                                            let v1292 =
+                                                                                C::u8_pair_split(
+                                                                                    ctx, v1286.1,
+                                                                                );
+                                                                            if v1292.0 == 0x6 {
+                                                                                if v1292.1 == 0x7 {
+                                                                                    let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                                                    let v1298 = C::u8_pair_split(ctx, v1295.0);
+                                                                                    if v1298.0
+                                                                                        == 0xA
+                                                                                    {
+                                                                                        if v1298.1
+                                                                                            == 0xB
+                                                                                        {
+                                                                                            let v1301 = C::u8_pair_split(ctx, v1295.1);
+                                                                                            if v1301.0 == 0xE {
+                                                                                                if v1301.1 == 0xF {
+                                                                                                    let v1239 = C::unpack_value_array_2(ctx, v1237);
+                                                                                                    let v1254 = C::put_in_reg(ctx, v1239.0);
+                                                                                                    let v1248 = C::put_in_reg(ctx, v1239.0);
+                                                                                                    let v1383 = constructor_vec_pack(ctx, I32X4, v1254, v1248);
+                                                                                                    let v1384 = constructor_output_reg(ctx, v1383);
+                                                                                                    // Rule at src/isa/s390x/lower.isle line 2142.
+                                                                                                    return Some(v1384);
+                                                                                                }
+                                                                                            }
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                    0x12 => {
+                                                                        if v1289.1 == 0x13 {
+                                                                            let v1292 =
+                                                                                C::u8_pair_split(
+                                                                                    ctx, v1286.1,
+                                                                                );
+                                                                            if v1292.0 == 0x16 {
+                                                                                if v1292.1 == 0x17 {
+                                                                                    let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                                                    let v1298 = C::u8_pair_split(ctx, v1295.0);
+                                                                                    if v1298.0
+                                                                                        == 0x1A
+                                                                                    {
+                                                                                        if v1298.1
+                                                                                            == 0x1B
+                                                                                        {
+                                                                                            let v1301 = C::u8_pair_split(ctx, v1295.1);
+                                                                                            if v1301.0 == 0x1E {
+                                                                                                if v1301.1 == 0x1F {
+                                                                                                    let v1239 = C::unpack_value_array_2(ctx, v1237);
+                                                                                                    let v1254 = C::put_in_reg(ctx, v1239.0);
+                                                                                                    let v1255 = C::put_in_reg(ctx, v1239.1);
+                                                                                                    let v1371 = constructor_vec_pack(ctx, I32X4, v1254, v1255);
+                                                                                                    let v1372 = constructor_output_reg(ctx, v1371);
+                                                                                                    // Rule at src/isa/s390x/lower.isle line 2130.
+                                                                                                    return Some(v1372);
+                                                                                                }
+                                                                                            }
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                    _ => {}
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                                0x4 => {
+                                    if v1268.1 == 0x5 {
+                                        let v1271 = C::u8_pair_split(ctx, v1265.1);
+                                        if v1271.0 == 0x6 {
+                                            if v1271.1 == 0x7 {
+                                                let v1274 = C::u16_pair_split(ctx, v1262.1);
+                                                let v1277 = C::u8_pair_split(ctx, v1274.0);
+                                                if v1277.0 == 0xC {
+                                                    if v1277.1 == 0xD {
+                                                        let v1280 = C::u8_pair_split(ctx, v1274.1);
+                                                        if v1280.0 == 0xE {
+                                                            if v1280.1 == 0xF {
+                                                                let v1283 =
+                                                                    C::u32_pair_split(ctx, v1259.1);
+                                                                let v1286 =
+                                                                    C::u16_pair_split(ctx, v1283.0);
+                                                                let v1289 =
+                                                                    C::u8_pair_split(ctx, v1286.0);
+                                                                match v1289.0 {
+                                                                    0x4 => {
+                                                                        if v1289.1 == 0x5 {
+                                                                            let v1292 =
+                                                                                C::u8_pair_split(
+                                                                                    ctx, v1286.1,
+                                                                                );
+                                                                            if v1292.0 == 0x6 {
+                                                                                if v1292.1 == 0x7 {
+                                                                                    let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                                                    let v1298 = C::u8_pair_split(ctx, v1295.0);
+                                                                                    if v1298.0
+                                                                                        == 0xC
+                                                                                    {
+                                                                                        if v1298.1
+                                                                                            == 0xD
+                                                                                        {
+                                                                                            let v1301 = C::u8_pair_split(ctx, v1295.1);
+                                                                                            if v1301.0 == 0xE {
+                                                                                                if v1301.1 == 0xF {
+                                                                                                    let v1239 = C::unpack_value_array_2(ctx, v1237);
+                                                                                                    let v1254 = C::put_in_reg(ctx, v1239.0);
+                                                                                                    let v1248 = C::put_in_reg(ctx, v1239.0);
+                                                                                                    let v1381 = constructor_vec_pack(ctx, I64X2, v1254, v1248);
+                                                                                                    let v1382 = constructor_output_reg(ctx, v1381);
+                                                                                                    // Rule at src/isa/s390x/lower.isle line 2140.
+                                                                                                    return Some(v1382);
+                                                                                                }
+                                                                                            }
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                    0x14 => {
+                                                                        if v1289.1 == 0x15 {
+                                                                            let v1292 =
+                                                                                C::u8_pair_split(
+                                                                                    ctx, v1286.1,
+                                                                                );
+                                                                            if v1292.0 == 0x16 {
+                                                                                if v1292.1 == 0x17 {
+                                                                                    let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                                                    let v1298 = C::u8_pair_split(ctx, v1295.0);
+                                                                                    if v1298.0
+                                                                                        == 0x1C
+                                                                                    {
+                                                                                        if v1298.1
+                                                                                            == 0x1D
+                                                                                        {
+                                                                                            let v1301 = C::u8_pair_split(ctx, v1295.1);
+                                                                                            if v1301.0 == 0x1E {
+                                                                                                if v1301.1 == 0x1F {
+                                                                                                    let v1239 = C::unpack_value_array_2(ctx, v1237);
+                                                                                                    let v1254 = C::put_in_reg(ctx, v1239.0);
+                                                                                                    let v1255 = C::put_in_reg(ctx, v1239.1);
+                                                                                                    let v1369 = constructor_vec_pack(ctx, I64X2, v1254, v1255);
+                                                                                                    let v1370 = constructor_output_reg(ctx, v1369);
+                                                                                                    // Rule at src/isa/s390x/lower.isle line 2128.
+                                                                                                    return Some(v1370);
+                                                                                                }
+                                                                                            }
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                    _ => {}
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                                0x8 => {
+                                    match v1268.1 {
+                                        0x8 => {
+                                            let v1271 = C::u8_pair_split(ctx, v1265.1);
+                                            if v1271.0 == 0x9 {
+                                                if v1271.1 == 0x9 {
+                                                    let v1274 = C::u16_pair_split(ctx, v1262.1);
+                                                    let v1277 = C::u8_pair_split(ctx, v1274.0);
+                                                    if v1277.0 == 0xA {
+                                                        if v1277.1 == 0xA {
+                                                            let v1280 =
+                                                                C::u8_pair_split(ctx, v1274.1);
+                                                            if v1280.0 == 0xB {
+                                                                if v1280.1 == 0xB {
+                                                                    let v1283 = C::u32_pair_split(
+                                                                        ctx, v1259.1,
+                                                                    );
+                                                                    let v1286 = C::u16_pair_split(
+                                                                        ctx, v1283.0,
+                                                                    );
+                                                                    let v1289 = C::u8_pair_split(
+                                                                        ctx, v1286.0,
+                                                                    );
+                                                                    if v1289.0 == 0xC {
+                                                                        if v1289.1 == 0xC {
+                                                                            let v1292 =
+                                                                                C::u8_pair_split(
+                                                                                    ctx, v1286.1,
+                                                                                );
+                                                                            if v1292.0 == 0xD {
+                                                                                if v1292.1 == 0xD {
+                                                                                    let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                                                    let v1298 = C::u8_pair_split(ctx, v1295.0);
+                                                                                    if v1298.0
+                                                                                        == 0xE
+                                                                                    {
+                                                                                        if v1298.1
+                                                                                            == 0xE
+                                                                                        {
+                                                                                            let v1301 = C::u8_pair_split(ctx, v1295.1);
+                                                                                            if v1301.0 == 0xF {
+                                                                                                if v1301.1 == 0xF {
+                                                                                                    let v1239 = C::unpack_value_array_2(ctx, v1237);
+                                                                                                    let v1254 = C::put_in_reg(ctx, v1239.0);
+                                                                                                    let v1248 = C::put_in_reg(ctx, v1239.0);
+                                                                                                    let v1359 = constructor_vec_merge_low(ctx, I8X16, v1254, v1248);
+                                                                                                    let v1360 = constructor_output_reg(ctx, v1359);
+                                                                                                    // Rule at src/isa/s390x/lower.isle line 2116.
+                                                                                                    return Some(v1360);
+                                                                                                }
+                                                                                            }
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                        0x9 => {
+                                            let v1271 = C::u8_pair_split(ctx, v1265.1);
+                                            match v1271.0 {
+                                                0x8 => {
+                                                    if v1271.1 == 0x9 {
+                                                        let v1274 = C::u16_pair_split(ctx, v1262.1);
+                                                        let v1277 = C::u8_pair_split(ctx, v1274.0);
+                                                        if v1277.0 == 0xA {
+                                                            if v1277.1 == 0xB {
+                                                                let v1280 =
+                                                                    C::u8_pair_split(ctx, v1274.1);
+                                                                if v1280.0 == 0xA {
+                                                                    if v1280.1 == 0xB {
+                                                                        let v1283 =
+                                                                            C::u32_pair_split(
+                                                                                ctx, v1259.1,
+                                                                            );
+                                                                        let v1286 =
+                                                                            C::u16_pair_split(
+                                                                                ctx, v1283.0,
+                                                                            );
+                                                                        let v1289 =
+                                                                            C::u8_pair_split(
+                                                                                ctx, v1286.0,
+                                                                            );
+                                                                        if v1289.0 == 0xC {
+                                                                            if v1289.1 == 0xD {
+                                                                                let v1292 = C::u8_pair_split(ctx, v1286.1);
+                                                                                if v1292.0 == 0xC {
+                                                                                    if v1292.1
+                                                                                        == 0xD
+                                                                                    {
+                                                                                        let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                                                        let v1298 = C::u8_pair_split(ctx, v1295.0);
+                                                                                        if v1298.0
+                                                                                            == 0xE
+                                                                                        {
+                                                                                            if v1298.1 == 0xF {
+                                                                                                let v1301 = C::u8_pair_split(ctx, v1295.1);
+                                                                                                if v1301.0 == 0xE {
+                                                                                                    if v1301.1 == 0xF {
+                                                                                                        let v1239 = C::unpack_value_array_2(ctx, v1237);
+                                                                                                        let v1254 = C::put_in_reg(ctx, v1239.0);
+                                                                                                        let v1248 = C::put_in_reg(ctx, v1239.0);
+                                                                                                        let v1357 = constructor_vec_merge_low(ctx, I16X8, v1254, v1248);
+                                                                                                        let v1358 = constructor_output_reg(ctx, v1357);
+                                                                                                        // Rule at src/isa/s390x/lower.isle line 2114.
+                                                                                                        return Some(v1358);
+                                                                                                    }
+                                                                                                }
+                                                                                            }
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                                0xA => {
+                                                    if v1271.1 == 0xB {
+                                                        let v1274 = C::u16_pair_split(ctx, v1262.1);
+                                                        let v1277 = C::u8_pair_split(ctx, v1274.0);
+                                                        match v1277.0 {
+                                                            0x8 => {
+                                                                if v1277.1 == 0x9 {
+                                                                    let v1280 = C::u8_pair_split(
+                                                                        ctx, v1274.1,
+                                                                    );
+                                                                    if v1280.0 == 0xA {
+                                                                        if v1280.1 == 0xB {
+                                                                            let v1283 =
+                                                                                C::u32_pair_split(
+                                                                                    ctx, v1259.1,
+                                                                                );
+                                                                            let v1286 =
+                                                                                C::u16_pair_split(
+                                                                                    ctx, v1283.0,
+                                                                                );
+                                                                            let v1289 =
+                                                                                C::u8_pair_split(
+                                                                                    ctx, v1286.0,
+                                                                                );
+                                                                            if v1289.0 == 0xC {
+                                                                                if v1289.1 == 0xD {
+                                                                                    let v1292 = C::u8_pair_split(ctx, v1286.1);
+                                                                                    if v1292.0
+                                                                                        == 0xE
+                                                                                    {
+                                                                                        if v1292.1
+                                                                                            == 0xF
+                                                                                        {
+                                                                                            let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                                                            let v1298 = C::u8_pair_split(ctx, v1295.0);
+                                                                                            if v1298.0 == 0xC {
+                                                                                                if v1298.1 == 0xD {
+                                                                                                    let v1301 = C::u8_pair_split(ctx, v1295.1);
+                                                                                                    if v1301.0 == 0xE {
+                                                                                                        if v1301.1 == 0xF {
+                                                                                                            let v1239 = C::unpack_value_array_2(ctx, v1237);
+                                                                                                            let v1254 = C::put_in_reg(ctx, v1239.0);
+                                                                                                            let v1248 = C::put_in_reg(ctx, v1239.0);
+                                                                                                            let v1355 = constructor_vec_merge_low(ctx, I32X4, v1254, v1248);
+                                                                                                            let v1356 = constructor_output_reg(ctx, v1355);
+                                                                                                            // Rule at src/isa/s390x/lower.isle line 2112.
+                                                                                                            return Some(v1356);
+                                                                                                        }
+                                                                                                    }
+                                                                                                }
+                                                                                            }
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                            0xC => {
+                                                                if v1277.1 == 0xD {
+                                                                    let v1280 = C::u8_pair_split(
+                                                                        ctx, v1274.1,
+                                                                    );
+                                                                    if v1280.0 == 0xE {
+                                                                        if v1280.1 == 0xF {
+                                                                            let v1283 =
+                                                                                C::u32_pair_split(
+                                                                                    ctx, v1259.1,
+                                                                                );
+                                                                            let v1286 =
+                                                                                C::u16_pair_split(
+                                                                                    ctx, v1283.0,
+                                                                                );
+                                                                            let v1289 =
+                                                                                C::u8_pair_split(
+                                                                                    ctx, v1286.0,
+                                                                                );
+                                                                            match v1289.0 {
+                                                                                0x0 => {
+                                                                                    if v1289.1
+                                                                                        == 0x1
+                                                                                    {
+                                                                                        let v1292 = C::u8_pair_split(ctx, v1286.1);
+                                                                                        if v1292.0
+                                                                                            == 0x2
+                                                                                        {
+                                                                                            if v1292.1 == 0x3 {
+                                                                                                let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                                                                let v1298 = C::u8_pair_split(ctx, v1295.0);
+                                                                                                if v1298.0 == 0x4 {
+                                                                                                    if v1298.1 == 0x5 {
+                                                                                                        let v1301 = C::u8_pair_split(ctx, v1295.1);
+                                                                                                        if v1301.0 == 0x6 {
+                                                                                                            if v1301.1 == 0x7 {
+                                                                                                                let v1239 = C::unpack_value_array_2(ctx, v1237);
+                                                                                                                let v1254 = C::put_in_reg(ctx, v1239.0);
+                                                                                                                let v1248 = C::put_in_reg(ctx, v1239.0);
+                                                                                                                let v1427 = constructor_vec_permute_dw_imm(ctx, I8X16, v1254, 0x1, v1248, 0x0);
+                                                                                                                let v1428 = constructor_output_reg(ctx, v1427);
+                                                                                                                // Rule at src/isa/s390x/lower.isle line 2192.
+                                                                                                                return Some(v1428);
+                                                                                                            }
+                                                                                                        }
+                                                                                                    }
+                                                                                                }
+                                                                                            }
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                                0x8 => {
+                                                                                    if v1289.1
+                                                                                        == 0x9
+                                                                                    {
+                                                                                        let v1292 = C::u8_pair_split(ctx, v1286.1);
+                                                                                        if v1292.0
+                                                                                            == 0xA
+                                                                                        {
+                                                                                            if v1292.1 == 0xB {
+                                                                                                let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                                                                let v1298 = C::u8_pair_split(ctx, v1295.0);
+                                                                                                if v1298.0 == 0xC {
+                                                                                                    if v1298.1 == 0xD {
+                                                                                                        let v1301 = C::u8_pair_split(ctx, v1295.1);
+                                                                                                        if v1301.0 == 0xE {
+                                                                                                            if v1301.1 == 0xF {
+                                                                                                                let v1239 = C::unpack_value_array_2(ctx, v1237);
+                                                                                                                let v1254 = C::put_in_reg(ctx, v1239.0);
+                                                                                                                let v1248 = C::put_in_reg(ctx, v1239.0);
+                                                                                                                let v1353 = constructor_vec_merge_low(ctx, I64X2, v1254, v1248);
+                                                                                                                let v1354 = constructor_output_reg(ctx, v1353);
+                                                                                                                // Rule at src/isa/s390x/lower.isle line 2110.
+                                                                                                                return Some(v1354);
+                                                                                                            }
+                                                                                                        }
+                                                                                                    }
+                                                                                                }
+                                                                                            }
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                                0x10 => {
+                                                                                    if v1289.1
+                                                                                        == 0x11
+                                                                                    {
+                                                                                        let v1292 = C::u8_pair_split(ctx, v1286.1);
+                                                                                        if v1292.0
+                                                                                            == 0x12
+                                                                                        {
+                                                                                            if v1292.1 == 0x13 {
+                                                                                                let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                                                                let v1298 = C::u8_pair_split(ctx, v1295.0);
+                                                                                                if v1298.0 == 0x14 {
+                                                                                                    if v1298.1 == 0x15 {
+                                                                                                        let v1301 = C::u8_pair_split(ctx, v1295.1);
+                                                                                                        if v1301.0 == 0x16 {
+                                                                                                            if v1301.1 == 0x17 {
+                                                                                                                let v1239 = C::unpack_value_array_2(ctx, v1237);
+                                                                                                                let v1254 = C::put_in_reg(ctx, v1239.0);
+                                                                                                                let v1255 = C::put_in_reg(ctx, v1239.1);
+                                                                                                                let v1419 = constructor_vec_permute_dw_imm(ctx, I8X16, v1254, 0x1, v1255, 0x0);
+                                                                                                                let v1420 = constructor_output_reg(ctx, v1419);
+                                                                                                                // Rule at src/isa/s390x/lower.isle line 2184.
+                                                                                                                return Some(v1420);
+                                                                                                            }
+                                                                                                        }
+                                                                                                    }
+                                                                                                }
+                                                                                            }
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                                0x18 => {
+                                                                                    if v1289.1
+                                                                                        == 0x19
+                                                                                    {
+                                                                                        let v1292 = C::u8_pair_split(ctx, v1286.1);
+                                                                                        if v1292.0
+                                                                                            == 0x1A
+                                                                                        {
+                                                                                            if v1292.1 == 0x1B {
+                                                                                                let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                                                                let v1298 = C::u8_pair_split(ctx, v1295.0);
+                                                                                                if v1298.0 == 0x1C {
+                                                                                                    if v1298.1 == 0x1D {
+                                                                                                        let v1301 = C::u8_pair_split(ctx, v1295.1);
+                                                                                                        if v1301.0 == 0x1E {
+                                                                                                            if v1301.1 == 0x1F {
+                                                                                                                let v1239 = C::unpack_value_array_2(ctx, v1237);
+                                                                                                                let v1254 = C::put_in_reg(ctx, v1239.0);
+                                                                                                                let v1255 = C::put_in_reg(ctx, v1239.1);
+                                                                                                                let v1337 = constructor_vec_merge_low(ctx, I64X2, v1254, v1255);
+                                                                                                                let v1338 = constructor_output_reg(ctx, v1337);
+                                                                                                                // Rule at src/isa/s390x/lower.isle line 2094.
+                                                                                                                return Some(v1338);
+                                                                                                            }
+                                                                                                        }
+                                                                                                    }
+                                                                                                }
+                                                                                            }
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                                _ => {}
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                            0x18 => {
+                                                                if v1277.1 == 0x19 {
+                                                                    let v1280 = C::u8_pair_split(
+                                                                        ctx, v1274.1,
+                                                                    );
+                                                                    if v1280.0 == 0x1A {
+                                                                        if v1280.1 == 0x1B {
+                                                                            let v1283 =
+                                                                                C::u32_pair_split(
+                                                                                    ctx, v1259.1,
+                                                                                );
+                                                                            let v1286 =
+                                                                                C::u16_pair_split(
+                                                                                    ctx, v1283.0,
+                                                                                );
+                                                                            let v1289 =
+                                                                                C::u8_pair_split(
+                                                                                    ctx, v1286.0,
+                                                                                );
+                                                                            if v1289.0 == 0xC {
+                                                                                if v1289.1 == 0xD {
+                                                                                    let v1292 = C::u8_pair_split(ctx, v1286.1);
+                                                                                    if v1292.0
+                                                                                        == 0xE
+                                                                                    {
+                                                                                        if v1292.1
+                                                                                            == 0xF
+                                                                                        {
+                                                                                            let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                                                            let v1298 = C::u8_pair_split(ctx, v1295.0);
+                                                                                            if v1298.0 == 0x1C {
+                                                                                                if v1298.1 == 0x1D {
+                                                                                                    let v1301 = C::u8_pair_split(ctx, v1295.1);
+                                                                                                    if v1301.0 == 0x1E {
+                                                                                                        if v1301.1 == 0x1F {
+                                                                                                            let v1239 = C::unpack_value_array_2(ctx, v1237);
+                                                                                                            let v1254 = C::put_in_reg(ctx, v1239.0);
+                                                                                                            let v1255 = C::put_in_reg(ctx, v1239.1);
+                                                                                                            let v1339 = constructor_vec_merge_low(ctx, I32X4, v1254, v1255);
+                                                                                                            let v1340 = constructor_output_reg(ctx, v1339);
+                                                                                                            // Rule at src/isa/s390x/lower.isle line 2096.
+                                                                                                            return Some(v1340);
+                                                                                                        }
+                                                                                                    }
+                                                                                                }
+                                                                                            }
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                            _ => {}
+                                                        }
+                                                    }
+                                                }
+                                                0x18 => {
+                                                    if v1271.1 == 0x19 {
+                                                        let v1274 = C::u16_pair_split(ctx, v1262.1);
+                                                        let v1277 = C::u8_pair_split(ctx, v1274.0);
+                                                        if v1277.0 == 0xA {
+                                                            if v1277.1 == 0xB {
+                                                                let v1280 =
+                                                                    C::u8_pair_split(ctx, v1274.1);
+                                                                if v1280.0 == 0x1A {
+                                                                    if v1280.1 == 0x1B {
+                                                                        let v1283 =
+                                                                            C::u32_pair_split(
+                                                                                ctx, v1259.1,
+                                                                            );
+                                                                        let v1286 =
+                                                                            C::u16_pair_split(
+                                                                                ctx, v1283.0,
+                                                                            );
+                                                                        let v1289 =
+                                                                            C::u8_pair_split(
+                                                                                ctx, v1286.0,
+                                                                            );
+                                                                        if v1289.0 == 0xC {
+                                                                            if v1289.1 == 0xD {
+                                                                                let v1292 = C::u8_pair_split(ctx, v1286.1);
+                                                                                if v1292.0 == 0x1C {
+                                                                                    if v1292.1
+                                                                                        == 0x1D
+                                                                                    {
+                                                                                        let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                                                        let v1298 = C::u8_pair_split(ctx, v1295.0);
+                                                                                        if v1298.0
+                                                                                            == 0xE
+                                                                                        {
+                                                                                            if v1298.1 == 0xF {
+                                                                                                let v1301 = C::u8_pair_split(ctx, v1295.1);
+                                                                                                if v1301.0 == 0x1E {
+                                                                                                    if v1301.1 == 0x1F {
+                                                                                                        let v1239 = C::unpack_value_array_2(ctx, v1237);
+                                                                                                        let v1254 = C::put_in_reg(ctx, v1239.0);
+                                                                                                        let v1255 = C::put_in_reg(ctx, v1239.1);
+                                                                                                        let v1341 = constructor_vec_merge_low(ctx, I16X8, v1254, v1255);
+                                                                                                        let v1342 = constructor_output_reg(ctx, v1341);
+                                                                                                        // Rule at src/isa/s390x/lower.isle line 2098.
+                                                                                                        return Some(v1342);
+                                                                                                    }
+                                                                                                }
+                                                                                            }
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                                _ => {}
+                                            }
+                                        }
+                                        0x18 => {
+                                            let v1271 = C::u8_pair_split(ctx, v1265.1);
+                                            if v1271.0 == 0x9 {
+                                                if v1271.1 == 0x19 {
+                                                    let v1274 = C::u16_pair_split(ctx, v1262.1);
+                                                    let v1277 = C::u8_pair_split(ctx, v1274.0);
+                                                    if v1277.0 == 0xA {
+                                                        if v1277.1 == 0x1A {
+                                                            let v1280 =
+                                                                C::u8_pair_split(ctx, v1274.1);
+                                                            if v1280.0 == 0xB {
+                                                                if v1280.1 == 0x1B {
+                                                                    let v1283 = C::u32_pair_split(
+                                                                        ctx, v1259.1,
+                                                                    );
+                                                                    let v1286 = C::u16_pair_split(
+                                                                        ctx, v1283.0,
+                                                                    );
+                                                                    let v1289 = C::u8_pair_split(
+                                                                        ctx, v1286.0,
+                                                                    );
+                                                                    if v1289.0 == 0xC {
+                                                                        if v1289.1 == 0x1C {
+                                                                            let v1292 =
+                                                                                C::u8_pair_split(
+                                                                                    ctx, v1286.1,
+                                                                                );
+                                                                            if v1292.0 == 0xD {
+                                                                                if v1292.1 == 0x1D {
+                                                                                    let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                                                    let v1298 = C::u8_pair_split(ctx, v1295.0);
+                                                                                    if v1298.0
+                                                                                        == 0xE
+                                                                                    {
+                                                                                        if v1298.1
+                                                                                            == 0x1E
+                                                                                        {
+                                                                                            let v1301 = C::u8_pair_split(ctx, v1295.1);
+                                                                                            if v1301.0 == 0xF {
+                                                                                                if v1301.1 == 0x1F {
+                                                                                                    let v1239 = C::unpack_value_array_2(ctx, v1237);
+                                                                                                    let v1254 = C::put_in_reg(ctx, v1239.0);
+                                                                                                    let v1255 = C::put_in_reg(ctx, v1239.1);
+                                                                                                    let v1343 = constructor_vec_merge_low(ctx, I8X16, v1254, v1255);
+                                                                                                    let v1344 = constructor_output_reg(ctx, v1343);
+                                                                                                    // Rule at src/isa/s390x/lower.isle line 2100.
+                                                                                                    return Some(v1344);
+                                                                                                }
+                                                                                            }
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                        _ => {}
+                                    }
+                                }
+                                0x10 => {
+                                    match v1268.1 {
+                                        0x0 => {
+                                            let v1271 = C::u8_pair_split(ctx, v1265.1);
+                                            if v1271.0 == 0x11 {
+                                                if v1271.1 == 0x1 {
+                                                    let v1274 = C::u16_pair_split(ctx, v1262.1);
+                                                    let v1277 = C::u8_pair_split(ctx, v1274.0);
+                                                    if v1277.0 == 0x12 {
+                                                        if v1277.1 == 0x2 {
+                                                            let v1280 =
+                                                                C::u8_pair_split(ctx, v1274.1);
+                                                            if v1280.0 == 0x13 {
+                                                                if v1280.1 == 0x3 {
+                                                                    let v1283 = C::u32_pair_split(
+                                                                        ctx, v1259.1,
+                                                                    );
+                                                                    let v1286 = C::u16_pair_split(
+                                                                        ctx, v1283.0,
+                                                                    );
+                                                                    let v1289 = C::u8_pair_split(
+                                                                        ctx, v1286.0,
+                                                                    );
+                                                                    if v1289.0 == 0x14 {
+                                                                        if v1289.1 == 0x4 {
+                                                                            let v1292 =
+                                                                                C::u8_pair_split(
+                                                                                    ctx, v1286.1,
+                                                                                );
+                                                                            if v1292.0 == 0x15 {
+                                                                                if v1292.1 == 0x5 {
+                                                                                    let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                                                    let v1298 = C::u8_pair_split(ctx, v1295.0);
+                                                                                    if v1298.0
+                                                                                        == 0x16
+                                                                                    {
+                                                                                        if v1298.1
+                                                                                            == 0x6
+                                                                                        {
+                                                                                            let v1301 = C::u8_pair_split(ctx, v1295.1);
+                                                                                            if v1301.0 == 0x17 {
+                                                                                                if v1301.1 == 0x7 {
+                                                                                                    let v1239 = C::unpack_value_array_2(ctx, v1237);
+                                                                                                    let v1312 = C::put_in_reg(ctx, v1239.1);
+                                                                                                    let v1248 = C::put_in_reg(ctx, v1239.0);
+                                                                                                    let v1319 = constructor_vec_merge_high(ctx, I8X16, v1312, v1248);
+                                                                                                    let v1320 = constructor_output_reg(ctx, v1319);
+                                                                                                    // Rule at src/isa/s390x/lower.isle line 2074.
+                                                                                                    return Some(v1320);
+                                                                                                }
+                                                                                            }
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                        0x10 => {
+                                            let v1271 = C::u8_pair_split(ctx, v1265.1);
+                                            if v1271.0 == 0x11 {
+                                                if v1271.1 == 0x11 {
+                                                    let v1274 = C::u16_pair_split(ctx, v1262.1);
+                                                    let v1277 = C::u8_pair_split(ctx, v1274.0);
+                                                    if v1277.0 == 0x12 {
+                                                        if v1277.1 == 0x12 {
+                                                            let v1280 =
+                                                                C::u8_pair_split(ctx, v1274.1);
+                                                            if v1280.0 == 0x13 {
+                                                                if v1280.1 == 0x13 {
+                                                                    let v1283 = C::u32_pair_split(
+                                                                        ctx, v1259.1,
+                                                                    );
+                                                                    let v1286 = C::u16_pair_split(
+                                                                        ctx, v1283.0,
+                                                                    );
+                                                                    let v1289 = C::u8_pair_split(
+                                                                        ctx, v1286.0,
+                                                                    );
+                                                                    if v1289.0 == 0x14 {
+                                                                        if v1289.1 == 0x14 {
+                                                                            let v1292 =
+                                                                                C::u8_pair_split(
+                                                                                    ctx, v1286.1,
+                                                                                );
+                                                                            if v1292.0 == 0x15 {
+                                                                                if v1292.1 == 0x15 {
+                                                                                    let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                                                    let v1298 = C::u8_pair_split(ctx, v1295.0);
+                                                                                    if v1298.0
+                                                                                        == 0x16
+                                                                                    {
+                                                                                        if v1298.1
+                                                                                            == 0x16
+                                                                                        {
+                                                                                            let v1301 = C::u8_pair_split(ctx, v1295.1);
+                                                                                            if v1301.0 == 0x17 {
+                                                                                                if v1301.1 == 0x17 {
+                                                                                                    let v1239 = C::unpack_value_array_2(ctx, v1237);
+                                                                                                    let v1312 = C::put_in_reg(ctx, v1239.1);
+                                                                                                    let v1255 = C::put_in_reg(ctx, v1239.1);
+                                                                                                    let v1335 = constructor_vec_merge_high(ctx, I8X16, v1312, v1255);
+                                                                                                    let v1336 = constructor_output_reg(ctx, v1335);
+                                                                                                    // Rule at src/isa/s390x/lower.isle line 2090.
+                                                                                                    return Some(v1336);
+                                                                                                }
+                                                                                            }
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                        0x11 => {
+                                            let v1271 = C::u8_pair_split(ctx, v1265.1);
+                                            match v1271.0 {
+                                                0x0 => {
+                                                    if v1271.1 == 0x1 {
+                                                        let v1274 = C::u16_pair_split(ctx, v1262.1);
+                                                        let v1277 = C::u8_pair_split(ctx, v1274.0);
+                                                        if v1277.0 == 0x12 {
+                                                            if v1277.1 == 0x13 {
+                                                                let v1280 =
+                                                                    C::u8_pair_split(ctx, v1274.1);
+                                                                if v1280.0 == 0x2 {
+                                                                    if v1280.1 == 0x3 {
+                                                                        let v1283 =
+                                                                            C::u32_pair_split(
+                                                                                ctx, v1259.1,
+                                                                            );
+                                                                        let v1286 =
+                                                                            C::u16_pair_split(
+                                                                                ctx, v1283.0,
+                                                                            );
+                                                                        let v1289 =
+                                                                            C::u8_pair_split(
+                                                                                ctx, v1286.0,
+                                                                            );
+                                                                        if v1289.0 == 0x14 {
+                                                                            if v1289.1 == 0x15 {
+                                                                                let v1292 = C::u8_pair_split(ctx, v1286.1);
+                                                                                if v1292.0 == 0x4 {
+                                                                                    if v1292.1
+                                                                                        == 0x5
+                                                                                    {
+                                                                                        let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                                                        let v1298 = C::u8_pair_split(ctx, v1295.0);
+                                                                                        if v1298.0
+                                                                                            == 0x16
+                                                                                        {
+                                                                                            if v1298.1 == 0x17 {
+                                                                                                let v1301 = C::u8_pair_split(ctx, v1295.1);
+                                                                                                if v1301.0 == 0x6 {
+                                                                                                    if v1301.1 == 0x7 {
+                                                                                                        let v1239 = C::unpack_value_array_2(ctx, v1237);
+                                                                                                        let v1312 = C::put_in_reg(ctx, v1239.1);
+                                                                                                        let v1248 = C::put_in_reg(ctx, v1239.0);
+                                                                                                        let v1317 = constructor_vec_merge_high(ctx, I16X8, v1312, v1248);
+                                                                                                        let v1318 = constructor_output_reg(ctx, v1317);
+                                                                                                        // Rule at src/isa/s390x/lower.isle line 2072.
+                                                                                                        return Some(v1318);
+                                                                                                    }
+                                                                                                }
+                                                                                            }
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                                0x10 => {
+                                                    if v1271.1 == 0x11 {
+                                                        let v1274 = C::u16_pair_split(ctx, v1262.1);
+                                                        let v1277 = C::u8_pair_split(ctx, v1274.0);
+                                                        if v1277.0 == 0x12 {
+                                                            if v1277.1 == 0x13 {
+                                                                let v1280 =
+                                                                    C::u8_pair_split(ctx, v1274.1);
+                                                                if v1280.0 == 0x12 {
+                                                                    if v1280.1 == 0x13 {
+                                                                        let v1283 =
+                                                                            C::u32_pair_split(
+                                                                                ctx, v1259.1,
+                                                                            );
+                                                                        let v1286 =
+                                                                            C::u16_pair_split(
+                                                                                ctx, v1283.0,
+                                                                            );
+                                                                        let v1289 =
+                                                                            C::u8_pair_split(
+                                                                                ctx, v1286.0,
+                                                                            );
+                                                                        if v1289.0 == 0x14 {
+                                                                            if v1289.1 == 0x15 {
+                                                                                let v1292 = C::u8_pair_split(ctx, v1286.1);
+                                                                                if v1292.0 == 0x14 {
+                                                                                    if v1292.1
+                                                                                        == 0x15
+                                                                                    {
+                                                                                        let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                                                        let v1298 = C::u8_pair_split(ctx, v1295.0);
+                                                                                        if v1298.0
+                                                                                            == 0x16
+                                                                                        {
+                                                                                            if v1298.1 == 0x17 {
+                                                                                                let v1301 = C::u8_pair_split(ctx, v1295.1);
+                                                                                                if v1301.0 == 0x16 {
+                                                                                                    if v1301.1 == 0x17 {
+                                                                                                        let v1239 = C::unpack_value_array_2(ctx, v1237);
+                                                                                                        let v1312 = C::put_in_reg(ctx, v1239.1);
+                                                                                                        let v1255 = C::put_in_reg(ctx, v1239.1);
+                                                                                                        let v1333 = constructor_vec_merge_high(ctx, I16X8, v1312, v1255);
+                                                                                                        let v1334 = constructor_output_reg(ctx, v1333);
+                                                                                                        // Rule at src/isa/s390x/lower.isle line 2088.
+                                                                                                        return Some(v1334);
+                                                                                                    }
+                                                                                                }
+                                                                                            }
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                                0x12 => {
+                                                    if v1271.1 == 0x13 {
+                                                        let v1274 = C::u16_pair_split(ctx, v1262.1);
+                                                        let v1277 = C::u8_pair_split(ctx, v1274.0);
+                                                        match v1277.0 {
+                                                            0x0 => {
+                                                                if v1277.1 == 0x1 {
+                                                                    let v1280 = C::u8_pair_split(
+                                                                        ctx, v1274.1,
+                                                                    );
+                                                                    if v1280.0 == 0x2 {
+                                                                        if v1280.1 == 0x3 {
+                                                                            let v1283 =
+                                                                                C::u32_pair_split(
+                                                                                    ctx, v1259.1,
+                                                                                );
+                                                                            let v1286 =
+                                                                                C::u16_pair_split(
+                                                                                    ctx, v1283.0,
+                                                                                );
+                                                                            let v1289 =
+                                                                                C::u8_pair_split(
+                                                                                    ctx, v1286.0,
+                                                                                );
+                                                                            if v1289.0 == 0x14 {
+                                                                                if v1289.1 == 0x15 {
+                                                                                    let v1292 = C::u8_pair_split(ctx, v1286.1);
+                                                                                    if v1292.0
+                                                                                        == 0x16
+                                                                                    {
+                                                                                        if v1292.1
+                                                                                            == 0x17
+                                                                                        {
+                                                                                            let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                                                            let v1298 = C::u8_pair_split(ctx, v1295.0);
+                                                                                            if v1298.0 == 0x4 {
+                                                                                                if v1298.1 == 0x5 {
+                                                                                                    let v1301 = C::u8_pair_split(ctx, v1295.1);
+                                                                                                    if v1301.0 == 0x6 {
+                                                                                                        if v1301.1 == 0x7 {
+                                                                                                            let v1239 = C::unpack_value_array_2(ctx, v1237);
+                                                                                                            let v1312 = C::put_in_reg(ctx, v1239.1);
+                                                                                                            let v1248 = C::put_in_reg(ctx, v1239.0);
+                                                                                                            let v1315 = constructor_vec_merge_high(ctx, I32X4, v1312, v1248);
+                                                                                                            let v1316 = constructor_output_reg(ctx, v1315);
+                                                                                                            // Rule at src/isa/s390x/lower.isle line 2070.
+                                                                                                            return Some(v1316);
+                                                                                                        }
+                                                                                                    }
+                                                                                                }
+                                                                                            }
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                            0x10 => {
+                                                                if v1277.1 == 0x11 {
+                                                                    let v1280 = C::u8_pair_split(
+                                                                        ctx, v1274.1,
+                                                                    );
+                                                                    if v1280.0 == 0x12 {
+                                                                        if v1280.1 == 0x13 {
+                                                                            let v1283 =
+                                                                                C::u32_pair_split(
+                                                                                    ctx, v1259.1,
+                                                                                );
+                                                                            let v1286 =
+                                                                                C::u16_pair_split(
+                                                                                    ctx, v1283.0,
+                                                                                );
+                                                                            let v1289 =
+                                                                                C::u8_pair_split(
+                                                                                    ctx, v1286.0,
+                                                                                );
+                                                                            if v1289.0 == 0x14 {
+                                                                                if v1289.1 == 0x15 {
+                                                                                    let v1292 = C::u8_pair_split(ctx, v1286.1);
+                                                                                    if v1292.0
+                                                                                        == 0x16
+                                                                                    {
+                                                                                        if v1292.1
+                                                                                            == 0x17
+                                                                                        {
+                                                                                            let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                                                            let v1298 = C::u8_pair_split(ctx, v1295.0);
+                                                                                            if v1298.0 == 0x14 {
+                                                                                                if v1298.1 == 0x15 {
+                                                                                                    let v1301 = C::u8_pair_split(ctx, v1295.1);
+                                                                                                    if v1301.0 == 0x16 {
+                                                                                                        if v1301.1 == 0x17 {
+                                                                                                            let v1239 = C::unpack_value_array_2(ctx, v1237);
+                                                                                                            let v1312 = C::put_in_reg(ctx, v1239.1);
+                                                                                                            let v1255 = C::put_in_reg(ctx, v1239.1);
+                                                                                                            let v1331 = constructor_vec_merge_high(ctx, I32X4, v1312, v1255);
+                                                                                                            let v1332 = constructor_output_reg(ctx, v1331);
+                                                                                                            // Rule at src/isa/s390x/lower.isle line 2086.
+                                                                                                            return Some(v1332);
+                                                                                                        }
+                                                                                                    }
+                                                                                                }
+                                                                                            }
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                            0x14 => {
+                                                                if v1277.1 == 0x15 {
+                                                                    let v1280 = C::u8_pair_split(
+                                                                        ctx, v1274.1,
+                                                                    );
+                                                                    if v1280.0 == 0x16 {
+                                                                        if v1280.1 == 0x17 {
+                                                                            let v1283 =
+                                                                                C::u32_pair_split(
+                                                                                    ctx, v1259.1,
+                                                                                );
+                                                                            let v1286 =
+                                                                                C::u16_pair_split(
+                                                                                    ctx, v1283.0,
+                                                                                );
+                                                                            let v1289 =
+                                                                                C::u8_pair_split(
+                                                                                    ctx, v1286.0,
+                                                                                );
+                                                                            match v1289.0 {
+                                                                                0x0 => {
+                                                                                    if v1289.1
+                                                                                        == 0x1
+                                                                                    {
+                                                                                        let v1292 = C::u8_pair_split(ctx, v1286.1);
+                                                                                        if v1292.0
+                                                                                            == 0x2
+                                                                                        {
+                                                                                            if v1292.1 == 0x3 {
+                                                                                                let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                                                                let v1298 = C::u8_pair_split(ctx, v1295.0);
+                                                                                                if v1298.0 == 0x4 {
+                                                                                                    if v1298.1 == 0x5 {
+                                                                                                        let v1301 = C::u8_pair_split(ctx, v1295.1);
+                                                                                                        if v1301.0 == 0x6 {
+                                                                                                            if v1301.1 == 0x7 {
+                                                                                                                let v1239 = C::unpack_value_array_2(ctx, v1237);
+                                                                                                                let v1312 = C::put_in_reg(ctx, v1239.1);
+                                                                                                                let v1248 = C::put_in_reg(ctx, v1239.0);
+                                                                                                                let v1313 = constructor_vec_merge_high(ctx, I64X2, v1312, v1248);
+                                                                                                                let v1314 = constructor_output_reg(ctx, v1313);
+                                                                                                                // Rule at src/isa/s390x/lower.isle line 2068.
+                                                                                                                return Some(v1314);
+                                                                                                            }
+                                                                                                        }
+                                                                                                    }
+                                                                                                }
+                                                                                            }
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                                0x8 => {
+                                                                                    if v1289.1
+                                                                                        == 0x9
+                                                                                    {
+                                                                                        let v1292 = C::u8_pair_split(ctx, v1286.1);
+                                                                                        if v1292.0
+                                                                                            == 0xA
+                                                                                        {
+                                                                                            if v1292.1 == 0xB {
+                                                                                                let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                                                                let v1298 = C::u8_pair_split(ctx, v1295.0);
+                                                                                                if v1298.0 == 0xC {
+                                                                                                    if v1298.1 == 0xD {
+                                                                                                        let v1301 = C::u8_pair_split(ctx, v1295.1);
+                                                                                                        if v1301.0 == 0xE {
+                                                                                                            if v1301.1 == 0xF {
+                                                                                                                let v1239 = C::unpack_value_array_2(ctx, v1237);
+                                                                                                                let v1312 = C::put_in_reg(ctx, v1239.1);
+                                                                                                                let v1248 = C::put_in_reg(ctx, v1239.0);
+                                                                                                                let v1421 = constructor_vec_permute_dw_imm(ctx, I8X16, v1312, 0x0, v1248, 0x1);
+                                                                                                                let v1422 = constructor_output_reg(ctx, v1421);
+                                                                                                                // Rule at src/isa/s390x/lower.isle line 2186.
+                                                                                                                return Some(v1422);
+                                                                                                            }
+                                                                                                        }
+                                                                                                    }
+                                                                                                }
+                                                                                            }
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                                0x10 => {
+                                                                                    if v1289.1
+                                                                                        == 0x11
+                                                                                    {
+                                                                                        let v1292 = C::u8_pair_split(ctx, v1286.1);
+                                                                                        if v1292.0
+                                                                                            == 0x12
+                                                                                        {
+                                                                                            if v1292.1 == 0x13 {
+                                                                                                let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                                                                let v1298 = C::u8_pair_split(ctx, v1295.0);
+                                                                                                if v1298.0 == 0x14 {
+                                                                                                    if v1298.1 == 0x15 {
+                                                                                                        let v1301 = C::u8_pair_split(ctx, v1295.1);
+                                                                                                        if v1301.0 == 0x16 {
+                                                                                                            if v1301.1 == 0x17 {
+                                                                                                                let v1239 = C::unpack_value_array_2(ctx, v1237);
+                                                                                                                let v1312 = C::put_in_reg(ctx, v1239.1);
+                                                                                                                let v1255 = C::put_in_reg(ctx, v1239.1);
+                                                                                                                let v1329 = constructor_vec_merge_high(ctx, I64X2, v1312, v1255);
+                                                                                                                let v1330 = constructor_output_reg(ctx, v1329);
+                                                                                                                // Rule at src/isa/s390x/lower.isle line 2084.
+                                                                                                                return Some(v1330);
+                                                                                                            }
+                                                                                                        }
+                                                                                                    }
+                                                                                                }
+                                                                                            }
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                                0x18 => {
+                                                                                    if v1289.1
+                                                                                        == 0x19
+                                                                                    {
+                                                                                        let v1292 = C::u8_pair_split(ctx, v1286.1);
+                                                                                        if v1292.0
+                                                                                            == 0x1A
+                                                                                        {
+                                                                                            if v1292.1 == 0x1B {
+                                                                                                let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                                                                let v1298 = C::u8_pair_split(ctx, v1295.0);
+                                                                                                if v1298.0 == 0x1C {
+                                                                                                    if v1298.1 == 0x1D {
+                                                                                                        let v1301 = C::u8_pair_split(ctx, v1295.1);
+                                                                                                        if v1301.0 == 0x1E {
+                                                                                                            if v1301.1 == 0x1F {
+                                                                                                                let v1239 = C::unpack_value_array_2(ctx, v1237);
+                                                                                                                let v1312 = C::put_in_reg(ctx, v1239.1);
+                                                                                                                let v1255 = C::put_in_reg(ctx, v1239.1);
+                                                                                                                let v1429 = constructor_vec_permute_dw_imm(ctx, I8X16, v1312, 0x0, v1255, 0x1);
+                                                                                                                let v1430 = constructor_output_reg(ctx, v1429);
+                                                                                                                // Rule at src/isa/s390x/lower.isle line 2194.
+                                                                                                                return Some(v1430);
+                                                                                                            }
+                                                                                                        }
+                                                                                                    }
+                                                                                                }
+                                                                                            }
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                                _ => {}
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                            _ => {}
+                                                        }
+                                                    }
+                                                }
+                                                _ => {}
+                                            }
+                                        }
+                                        _ => {}
+                                    }
+                                }
+                                0x11 => {
+                                    if v1268.1 == 0x13 {
+                                        let v1271 = C::u8_pair_split(ctx, v1265.1);
+                                        if v1271.0 == 0x15 {
+                                            if v1271.1 == 0x17 {
+                                                let v1274 = C::u16_pair_split(ctx, v1262.1);
+                                                let v1277 = C::u8_pair_split(ctx, v1274.0);
+                                                if v1277.0 == 0x19 {
+                                                    if v1277.1 == 0x1B {
+                                                        let v1280 = C::u8_pair_split(ctx, v1274.1);
+                                                        if v1280.0 == 0x1D {
+                                                            if v1280.1 == 0x1F {
+                                                                let v1283 =
+                                                                    C::u32_pair_split(ctx, v1259.1);
+                                                                let v1286 =
+                                                                    C::u16_pair_split(ctx, v1283.0);
+                                                                let v1289 =
+                                                                    C::u8_pair_split(ctx, v1286.0);
+                                                                match v1289.0 {
+                                                                    0x1 => {
+                                                                        if v1289.1 == 0x3 {
+                                                                            let v1292 =
+                                                                                C::u8_pair_split(
+                                                                                    ctx, v1286.1,
+                                                                                );
+                                                                            if v1292.0 == 0x5 {
+                                                                                if v1292.1 == 0x7 {
+                                                                                    let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                                                    let v1298 = C::u8_pair_split(ctx, v1295.0);
+                                                                                    if v1298.0
+                                                                                        == 0x9
+                                                                                    {
+                                                                                        if v1298.1
+                                                                                            == 0xB
+                                                                                        {
+                                                                                            let v1301 = C::u8_pair_split(ctx, v1295.1);
+                                                                                            if v1301.0 == 0xD {
+                                                                                                if v1301.1 == 0xF {
+                                                                                                    let v1239 = C::unpack_value_array_2(ctx, v1237);
+                                                                                                    let v1312 = C::put_in_reg(ctx, v1239.1);
+                                                                                                    let v1248 = C::put_in_reg(ctx, v1239.0);
+                                                                                                    let v1379 = constructor_vec_pack(ctx, I16X8, v1312, v1248);
+                                                                                                    let v1380 = constructor_output_reg(ctx, v1379);
+                                                                                                    // Rule at src/isa/s390x/lower.isle line 2138.
+                                                                                                    return Some(v1380);
+                                                                                                }
+                                                                                            }
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                    0x11 => {
+                                                                        if v1289.1 == 0x13 {
+                                                                            let v1292 =
+                                                                                C::u8_pair_split(
+                                                                                    ctx, v1286.1,
+                                                                                );
+                                                                            if v1292.0 == 0x15 {
+                                                                                if v1292.1 == 0x17 {
+                                                                                    let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                                                    let v1298 = C::u8_pair_split(ctx, v1295.0);
+                                                                                    if v1298.0
+                                                                                        == 0x19
+                                                                                    {
+                                                                                        if v1298.1
+                                                                                            == 0x1B
+                                                                                        {
+                                                                                            let v1301 = C::u8_pair_split(ctx, v1295.1);
+                                                                                            if v1301.0 == 0x1D {
+                                                                                                if v1301.1 == 0x1F {
+                                                                                                    let v1239 = C::unpack_value_array_2(ctx, v1237);
+                                                                                                    let v1312 = C::put_in_reg(ctx, v1239.1);
+                                                                                                    let v1255 = C::put_in_reg(ctx, v1239.1);
+                                                                                                    let v1391 = constructor_vec_pack(ctx, I16X8, v1312, v1255);
+                                                                                                    let v1392 = constructor_output_reg(ctx, v1391);
+                                                                                                    // Rule at src/isa/s390x/lower.isle line 2150.
+                                                                                                    return Some(v1392);
+                                                                                                }
+                                                                                            }
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                    _ => {}
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                                0x12 => {
+                                    if v1268.1 == 0x13 {
+                                        let v1271 = C::u8_pair_split(ctx, v1265.1);
+                                        if v1271.0 == 0x16 {
+                                            if v1271.1 == 0x17 {
+                                                let v1274 = C::u16_pair_split(ctx, v1262.1);
+                                                let v1277 = C::u8_pair_split(ctx, v1274.0);
+                                                if v1277.0 == 0x1A {
+                                                    if v1277.1 == 0x1B {
+                                                        let v1280 = C::u8_pair_split(ctx, v1274.1);
+                                                        if v1280.0 == 0x1E {
+                                                            if v1280.1 == 0x1F {
+                                                                let v1283 =
+                                                                    C::u32_pair_split(ctx, v1259.1);
+                                                                let v1286 =
+                                                                    C::u16_pair_split(ctx, v1283.0);
+                                                                let v1289 =
+                                                                    C::u8_pair_split(ctx, v1286.0);
+                                                                match v1289.0 {
+                                                                    0x2 => {
+                                                                        if v1289.1 == 0x3 {
+                                                                            let v1292 =
+                                                                                C::u8_pair_split(
+                                                                                    ctx, v1286.1,
+                                                                                );
+                                                                            if v1292.0 == 0x6 {
+                                                                                if v1292.1 == 0x7 {
+                                                                                    let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                                                    let v1298 = C::u8_pair_split(ctx, v1295.0);
+                                                                                    if v1298.0
+                                                                                        == 0xA
+                                                                                    {
+                                                                                        if v1298.1
+                                                                                            == 0xB
+                                                                                        {
+                                                                                            let v1301 = C::u8_pair_split(ctx, v1295.1);
+                                                                                            if v1301.0 == 0xE {
+                                                                                                if v1301.1 == 0xF {
+                                                                                                    let v1239 = C::unpack_value_array_2(ctx, v1237);
+                                                                                                    let v1312 = C::put_in_reg(ctx, v1239.1);
+                                                                                                    let v1248 = C::put_in_reg(ctx, v1239.0);
+                                                                                                    let v1377 = constructor_vec_pack(ctx, I32X4, v1312, v1248);
+                                                                                                    let v1378 = constructor_output_reg(ctx, v1377);
+                                                                                                    // Rule at src/isa/s390x/lower.isle line 2136.
+                                                                                                    return Some(v1378);
+                                                                                                }
+                                                                                            }
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                    0x12 => {
+                                                                        if v1289.1 == 0x13 {
+                                                                            let v1292 =
+                                                                                C::u8_pair_split(
+                                                                                    ctx, v1286.1,
+                                                                                );
+                                                                            if v1292.0 == 0x16 {
+                                                                                if v1292.1 == 0x17 {
+                                                                                    let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                                                    let v1298 = C::u8_pair_split(ctx, v1295.0);
+                                                                                    if v1298.0
+                                                                                        == 0x1A
+                                                                                    {
+                                                                                        if v1298.1
+                                                                                            == 0x1B
+                                                                                        {
+                                                                                            let v1301 = C::u8_pair_split(ctx, v1295.1);
+                                                                                            if v1301.0 == 0x1E {
+                                                                                                if v1301.1 == 0x1F {
+                                                                                                    let v1239 = C::unpack_value_array_2(ctx, v1237);
+                                                                                                    let v1312 = C::put_in_reg(ctx, v1239.1);
+                                                                                                    let v1255 = C::put_in_reg(ctx, v1239.1);
+                                                                                                    let v1389 = constructor_vec_pack(ctx, I32X4, v1312, v1255);
+                                                                                                    let v1390 = constructor_output_reg(ctx, v1389);
+                                                                                                    // Rule at src/isa/s390x/lower.isle line 2148.
+                                                                                                    return Some(v1390);
+                                                                                                }
+                                                                                            }
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                    _ => {}
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                                0x14 => {
+                                    if v1268.1 == 0x15 {
+                                        let v1271 = C::u8_pair_split(ctx, v1265.1);
+                                        if v1271.0 == 0x16 {
+                                            if v1271.1 == 0x17 {
+                                                let v1274 = C::u16_pair_split(ctx, v1262.1);
+                                                let v1277 = C::u8_pair_split(ctx, v1274.0);
+                                                if v1277.0 == 0x1C {
+                                                    if v1277.1 == 0x1D {
+                                                        let v1280 = C::u8_pair_split(ctx, v1274.1);
+                                                        if v1280.0 == 0x1E {
+                                                            if v1280.1 == 0x1F {
+                                                                let v1283 =
+                                                                    C::u32_pair_split(ctx, v1259.1);
+                                                                let v1286 =
+                                                                    C::u16_pair_split(ctx, v1283.0);
+                                                                let v1289 =
+                                                                    C::u8_pair_split(ctx, v1286.0);
+                                                                match v1289.0 {
+                                                                    0x4 => {
+                                                                        if v1289.1 == 0x5 {
+                                                                            let v1292 =
+                                                                                C::u8_pair_split(
+                                                                                    ctx, v1286.1,
+                                                                                );
+                                                                            if v1292.0 == 0x6 {
+                                                                                if v1292.1 == 0x7 {
+                                                                                    let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                                                    let v1298 = C::u8_pair_split(ctx, v1295.0);
+                                                                                    if v1298.0
+                                                                                        == 0xC
+                                                                                    {
+                                                                                        if v1298.1
+                                                                                            == 0xD
+                                                                                        {
+                                                                                            let v1301 = C::u8_pair_split(ctx, v1295.1);
+                                                                                            if v1301.0 == 0xE {
+                                                                                                if v1301.1 == 0xF {
+                                                                                                    let v1239 = C::unpack_value_array_2(ctx, v1237);
+                                                                                                    let v1312 = C::put_in_reg(ctx, v1239.1);
+                                                                                                    let v1248 = C::put_in_reg(ctx, v1239.0);
+                                                                                                    let v1375 = constructor_vec_pack(ctx, I64X2, v1312, v1248);
+                                                                                                    let v1376 = constructor_output_reg(ctx, v1375);
+                                                                                                    // Rule at src/isa/s390x/lower.isle line 2134.
+                                                                                                    return Some(v1376);
+                                                                                                }
+                                                                                            }
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                    0x14 => {
+                                                                        if v1289.1 == 0x15 {
+                                                                            let v1292 =
+                                                                                C::u8_pair_split(
+                                                                                    ctx, v1286.1,
+                                                                                );
+                                                                            if v1292.0 == 0x16 {
+                                                                                if v1292.1 == 0x17 {
+                                                                                    let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                                                    let v1298 = C::u8_pair_split(ctx, v1295.0);
+                                                                                    if v1298.0
+                                                                                        == 0x1C
+                                                                                    {
+                                                                                        if v1298.1
+                                                                                            == 0x1D
+                                                                                        {
+                                                                                            let v1301 = C::u8_pair_split(ctx, v1295.1);
+                                                                                            if v1301.0 == 0x1E {
+                                                                                                if v1301.1 == 0x1F {
+                                                                                                    let v1239 = C::unpack_value_array_2(ctx, v1237);
+                                                                                                    let v1312 = C::put_in_reg(ctx, v1239.1);
+                                                                                                    let v1255 = C::put_in_reg(ctx, v1239.1);
+                                                                                                    let v1387 = constructor_vec_pack(ctx, I64X2, v1312, v1255);
+                                                                                                    let v1388 = constructor_output_reg(ctx, v1387);
+                                                                                                    // Rule at src/isa/s390x/lower.isle line 2146.
+                                                                                                    return Some(v1388);
+                                                                                                }
+                                                                                            }
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                    _ => {}
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                                0x18 => {
+                                    match v1268.1 {
+                                        0x8 => {
+                                            let v1271 = C::u8_pair_split(ctx, v1265.1);
+                                            if v1271.0 == 0x19 {
+                                                if v1271.1 == 0x9 {
+                                                    let v1274 = C::u16_pair_split(ctx, v1262.1);
+                                                    let v1277 = C::u8_pair_split(ctx, v1274.0);
+                                                    if v1277.0 == 0x1A {
+                                                        if v1277.1 == 0xA {
+                                                            let v1280 =
+                                                                C::u8_pair_split(ctx, v1274.1);
+                                                            if v1280.0 == 0x1B {
+                                                                if v1280.1 == 0xB {
+                                                                    let v1283 = C::u32_pair_split(
+                                                                        ctx, v1259.1,
+                                                                    );
+                                                                    let v1286 = C::u16_pair_split(
+                                                                        ctx, v1283.0,
+                                                                    );
+                                                                    let v1289 = C::u8_pair_split(
+                                                                        ctx, v1286.0,
+                                                                    );
+                                                                    if v1289.0 == 0x1C {
+                                                                        if v1289.1 == 0xC {
+                                                                            let v1292 =
+                                                                                C::u8_pair_split(
+                                                                                    ctx, v1286.1,
+                                                                                );
+                                                                            if v1292.0 == 0x1D {
+                                                                                if v1292.1 == 0xD {
+                                                                                    let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                                                    let v1298 = C::u8_pair_split(ctx, v1295.0);
+                                                                                    if v1298.0
+                                                                                        == 0x1E
+                                                                                    {
+                                                                                        if v1298.1
+                                                                                            == 0xE
+                                                                                        {
+                                                                                            let v1301 = C::u8_pair_split(ctx, v1295.1);
+                                                                                            if v1301.0 == 0x1F {
+                                                                                                if v1301.1 == 0xF {
+                                                                                                    let v1239 = C::unpack_value_array_2(ctx, v1237);
+                                                                                                    let v1312 = C::put_in_reg(ctx, v1239.1);
+                                                                                                    let v1248 = C::put_in_reg(ctx, v1239.0);
+                                                                                                    let v1351 = constructor_vec_merge_low(ctx, I8X16, v1312, v1248);
+                                                                                                    let v1352 = constructor_output_reg(ctx, v1351);
+                                                                                                    // Rule at src/isa/s390x/lower.isle line 2108.
+                                                                                                    return Some(v1352);
+                                                                                                }
+                                                                                            }
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                        0x18 => {
+                                            let v1271 = C::u8_pair_split(ctx, v1265.1);
+                                            if v1271.0 == 0x19 {
+                                                if v1271.1 == 0x19 {
+                                                    let v1274 = C::u16_pair_split(ctx, v1262.1);
+                                                    let v1277 = C::u8_pair_split(ctx, v1274.0);
+                                                    if v1277.0 == 0x1A {
+                                                        if v1277.1 == 0x1A {
+                                                            let v1280 =
+                                                                C::u8_pair_split(ctx, v1274.1);
+                                                            if v1280.0 == 0x1B {
+                                                                if v1280.1 == 0x1B {
+                                                                    let v1283 = C::u32_pair_split(
+                                                                        ctx, v1259.1,
+                                                                    );
+                                                                    let v1286 = C::u16_pair_split(
+                                                                        ctx, v1283.0,
+                                                                    );
+                                                                    let v1289 = C::u8_pair_split(
+                                                                        ctx, v1286.0,
+                                                                    );
+                                                                    if v1289.0 == 0x1C {
+                                                                        if v1289.1 == 0x1C {
+                                                                            let v1292 =
+                                                                                C::u8_pair_split(
+                                                                                    ctx, v1286.1,
+                                                                                );
+                                                                            if v1292.0 == 0x1D {
+                                                                                if v1292.1 == 0x1D {
+                                                                                    let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                                                    let v1298 = C::u8_pair_split(ctx, v1295.0);
+                                                                                    if v1298.0
+                                                                                        == 0x1E
+                                                                                    {
+                                                                                        if v1298.1
+                                                                                            == 0x1E
+                                                                                        {
+                                                                                            let v1301 = C::u8_pair_split(ctx, v1295.1);
+                                                                                            if v1301.0 == 0x1F {
+                                                                                                if v1301.1 == 0x1F {
+                                                                                                    let v1239 = C::unpack_value_array_2(ctx, v1237);
+                                                                                                    let v1312 = C::put_in_reg(ctx, v1239.1);
+                                                                                                    let v1255 = C::put_in_reg(ctx, v1239.1);
+                                                                                                    let v1367 = constructor_vec_merge_low(ctx, I8X16, v1312, v1255);
+                                                                                                    let v1368 = constructor_output_reg(ctx, v1367);
+                                                                                                    // Rule at src/isa/s390x/lower.isle line 2124.
+                                                                                                    return Some(v1368);
+                                                                                                }
+                                                                                            }
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                        0x19 => {
+                                            let v1271 = C::u8_pair_split(ctx, v1265.1);
+                                            match v1271.0 {
+                                                0x8 => {
+                                                    if v1271.1 == 0x9 {
+                                                        let v1274 = C::u16_pair_split(ctx, v1262.1);
+                                                        let v1277 = C::u8_pair_split(ctx, v1274.0);
+                                                        if v1277.0 == 0x1A {
+                                                            if v1277.1 == 0x1B {
+                                                                let v1280 =
+                                                                    C::u8_pair_split(ctx, v1274.1);
+                                                                if v1280.0 == 0xA {
+                                                                    if v1280.1 == 0xB {
+                                                                        let v1283 =
+                                                                            C::u32_pair_split(
+                                                                                ctx, v1259.1,
+                                                                            );
+                                                                        let v1286 =
+                                                                            C::u16_pair_split(
+                                                                                ctx, v1283.0,
+                                                                            );
+                                                                        let v1289 =
+                                                                            C::u8_pair_split(
+                                                                                ctx, v1286.0,
+                                                                            );
+                                                                        if v1289.0 == 0x1C {
+                                                                            if v1289.1 == 0x1D {
+                                                                                let v1292 = C::u8_pair_split(ctx, v1286.1);
+                                                                                if v1292.0 == 0xC {
+                                                                                    if v1292.1
+                                                                                        == 0xD
+                                                                                    {
+                                                                                        let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                                                        let v1298 = C::u8_pair_split(ctx, v1295.0);
+                                                                                        if v1298.0
+                                                                                            == 0x1E
+                                                                                        {
+                                                                                            if v1298.1 == 0x1F {
+                                                                                                let v1301 = C::u8_pair_split(ctx, v1295.1);
+                                                                                                if v1301.0 == 0xE {
+                                                                                                    if v1301.1 == 0xF {
+                                                                                                        let v1239 = C::unpack_value_array_2(ctx, v1237);
+                                                                                                        let v1312 = C::put_in_reg(ctx, v1239.1);
+                                                                                                        let v1248 = C::put_in_reg(ctx, v1239.0);
+                                                                                                        let v1349 = constructor_vec_merge_low(ctx, I16X8, v1312, v1248);
+                                                                                                        let v1350 = constructor_output_reg(ctx, v1349);
+                                                                                                        // Rule at src/isa/s390x/lower.isle line 2106.
+                                                                                                        return Some(v1350);
+                                                                                                    }
+                                                                                                }
+                                                                                            }
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                                0x18 => {
+                                                    if v1271.1 == 0x19 {
+                                                        let v1274 = C::u16_pair_split(ctx, v1262.1);
+                                                        let v1277 = C::u8_pair_split(ctx, v1274.0);
+                                                        if v1277.0 == 0x1A {
+                                                            if v1277.1 == 0x1B {
+                                                                let v1280 =
+                                                                    C::u8_pair_split(ctx, v1274.1);
+                                                                if v1280.0 == 0x1A {
+                                                                    if v1280.1 == 0x1B {
+                                                                        let v1283 =
+                                                                            C::u32_pair_split(
+                                                                                ctx, v1259.1,
+                                                                            );
+                                                                        let v1286 =
+                                                                            C::u16_pair_split(
+                                                                                ctx, v1283.0,
+                                                                            );
+                                                                        let v1289 =
+                                                                            C::u8_pair_split(
+                                                                                ctx, v1286.0,
+                                                                            );
+                                                                        if v1289.0 == 0x1C {
+                                                                            if v1289.1 == 0x1D {
+                                                                                let v1292 = C::u8_pair_split(ctx, v1286.1);
+                                                                                if v1292.0 == 0x1C {
+                                                                                    if v1292.1
+                                                                                        == 0x1D
+                                                                                    {
+                                                                                        let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                                                        let v1298 = C::u8_pair_split(ctx, v1295.0);
+                                                                                        if v1298.0
+                                                                                            == 0x1E
+                                                                                        {
+                                                                                            if v1298.1 == 0x1F {
+                                                                                                let v1301 = C::u8_pair_split(ctx, v1295.1);
+                                                                                                if v1301.0 == 0x1E {
+                                                                                                    if v1301.1 == 0x1F {
+                                                                                                        let v1239 = C::unpack_value_array_2(ctx, v1237);
+                                                                                                        let v1312 = C::put_in_reg(ctx, v1239.1);
+                                                                                                        let v1255 = C::put_in_reg(ctx, v1239.1);
+                                                                                                        let v1365 = constructor_vec_merge_low(ctx, I16X8, v1312, v1255);
+                                                                                                        let v1366 = constructor_output_reg(ctx, v1365);
+                                                                                                        // Rule at src/isa/s390x/lower.isle line 2122.
+                                                                                                        return Some(v1366);
+                                                                                                    }
+                                                                                                }
+                                                                                            }
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                                0x1A => {
+                                                    if v1271.1 == 0x1B {
+                                                        let v1274 = C::u16_pair_split(ctx, v1262.1);
+                                                        let v1277 = C::u8_pair_split(ctx, v1274.0);
+                                                        match v1277.0 {
+                                                            0x8 => {
+                                                                if v1277.1 == 0x9 {
+                                                                    let v1280 = C::u8_pair_split(
+                                                                        ctx, v1274.1,
+                                                                    );
+                                                                    if v1280.0 == 0xA {
+                                                                        if v1280.1 == 0xB {
+                                                                            let v1283 =
+                                                                                C::u32_pair_split(
+                                                                                    ctx, v1259.1,
+                                                                                );
+                                                                            let v1286 =
+                                                                                C::u16_pair_split(
+                                                                                    ctx, v1283.0,
+                                                                                );
+                                                                            let v1289 =
+                                                                                C::u8_pair_split(
+                                                                                    ctx, v1286.0,
+                                                                                );
+                                                                            if v1289.0 == 0x1C {
+                                                                                if v1289.1 == 0x1D {
+                                                                                    let v1292 = C::u8_pair_split(ctx, v1286.1);
+                                                                                    if v1292.0
+                                                                                        == 0x1E
+                                                                                    {
+                                                                                        if v1292.1
+                                                                                            == 0x1F
+                                                                                        {
+                                                                                            let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                                                            let v1298 = C::u8_pair_split(ctx, v1295.0);
+                                                                                            if v1298.0 == 0xC {
+                                                                                                if v1298.1 == 0xD {
+                                                                                                    let v1301 = C::u8_pair_split(ctx, v1295.1);
+                                                                                                    if v1301.0 == 0xE {
+                                                                                                        if v1301.1 == 0xF {
+                                                                                                            let v1239 = C::unpack_value_array_2(ctx, v1237);
+                                                                                                            let v1312 = C::put_in_reg(ctx, v1239.1);
+                                                                                                            let v1248 = C::put_in_reg(ctx, v1239.0);
+                                                                                                            let v1347 = constructor_vec_merge_low(ctx, I32X4, v1312, v1248);
+                                                                                                            let v1348 = constructor_output_reg(ctx, v1347);
+                                                                                                            // Rule at src/isa/s390x/lower.isle line 2104.
+                                                                                                            return Some(v1348);
+                                                                                                        }
+                                                                                                    }
+                                                                                                }
+                                                                                            }
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                            0x18 => {
+                                                                if v1277.1 == 0x19 {
+                                                                    let v1280 = C::u8_pair_split(
+                                                                        ctx, v1274.1,
+                                                                    );
+                                                                    if v1280.0 == 0x1A {
+                                                                        if v1280.1 == 0x1B {
+                                                                            let v1283 =
+                                                                                C::u32_pair_split(
+                                                                                    ctx, v1259.1,
+                                                                                );
+                                                                            let v1286 =
+                                                                                C::u16_pair_split(
+                                                                                    ctx, v1283.0,
+                                                                                );
+                                                                            let v1289 =
+                                                                                C::u8_pair_split(
+                                                                                    ctx, v1286.0,
+                                                                                );
+                                                                            if v1289.0 == 0x1C {
+                                                                                if v1289.1 == 0x1D {
+                                                                                    let v1292 = C::u8_pair_split(ctx, v1286.1);
+                                                                                    if v1292.0
+                                                                                        == 0x1E
+                                                                                    {
+                                                                                        if v1292.1
+                                                                                            == 0x1F
+                                                                                        {
+                                                                                            let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                                                            let v1298 = C::u8_pair_split(ctx, v1295.0);
+                                                                                            if v1298.0 == 0x1C {
+                                                                                                if v1298.1 == 0x1D {
+                                                                                                    let v1301 = C::u8_pair_split(ctx, v1295.1);
+                                                                                                    if v1301.0 == 0x1E {
+                                                                                                        if v1301.1 == 0x1F {
+                                                                                                            let v1239 = C::unpack_value_array_2(ctx, v1237);
+                                                                                                            let v1312 = C::put_in_reg(ctx, v1239.1);
+                                                                                                            let v1255 = C::put_in_reg(ctx, v1239.1);
+                                                                                                            let v1363 = constructor_vec_merge_low(ctx, I32X4, v1312, v1255);
+                                                                                                            let v1364 = constructor_output_reg(ctx, v1363);
+                                                                                                            // Rule at src/isa/s390x/lower.isle line 2120.
+                                                                                                            return Some(v1364);
+                                                                                                        }
+                                                                                                    }
+                                                                                                }
+                                                                                            }
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                            0x1C => {
+                                                                if v1277.1 == 0x1D {
+                                                                    let v1280 = C::u8_pair_split(
+                                                                        ctx, v1274.1,
+                                                                    );
+                                                                    if v1280.0 == 0x1E {
+                                                                        if v1280.1 == 0x1F {
+                                                                            let v1283 =
+                                                                                C::u32_pair_split(
+                                                                                    ctx, v1259.1,
+                                                                                );
+                                                                            let v1286 =
+                                                                                C::u16_pair_split(
+                                                                                    ctx, v1283.0,
+                                                                                );
+                                                                            let v1289 =
+                                                                                C::u8_pair_split(
+                                                                                    ctx, v1286.0,
+                                                                                );
+                                                                            match v1289.0 {
+                                                                                0x0 => {
+                                                                                    if v1289.1
+                                                                                        == 0x1
+                                                                                    {
+                                                                                        let v1292 = C::u8_pair_split(ctx, v1286.1);
+                                                                                        if v1292.0
+                                                                                            == 0x2
+                                                                                        {
+                                                                                            if v1292.1 == 0x3 {
+                                                                                                let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                                                                let v1298 = C::u8_pair_split(ctx, v1295.0);
+                                                                                                if v1298.0 == 0x4 {
+                                                                                                    if v1298.1 == 0x5 {
+                                                                                                        let v1301 = C::u8_pair_split(ctx, v1295.1);
+                                                                                                        if v1301.0 == 0x6 {
+                                                                                                            if v1301.1 == 0x7 {
+                                                                                                                let v1239 = C::unpack_value_array_2(ctx, v1237);
+                                                                                                                let v1312 = C::put_in_reg(ctx, v1239.1);
+                                                                                                                let v1248 = C::put_in_reg(ctx, v1239.0);
+                                                                                                                let v1423 = constructor_vec_permute_dw_imm(ctx, I8X16, v1312, 0x1, v1248, 0x0);
+                                                                                                                let v1424 = constructor_output_reg(ctx, v1423);
+                                                                                                                // Rule at src/isa/s390x/lower.isle line 2188.
+                                                                                                                return Some(v1424);
+                                                                                                            }
+                                                                                                        }
+                                                                                                    }
+                                                                                                }
+                                                                                            }
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                                0x8 => {
+                                                                                    if v1289.1
+                                                                                        == 0x9
+                                                                                    {
+                                                                                        let v1292 = C::u8_pair_split(ctx, v1286.1);
+                                                                                        if v1292.0
+                                                                                            == 0xA
+                                                                                        {
+                                                                                            if v1292.1 == 0xB {
+                                                                                                let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                                                                let v1298 = C::u8_pair_split(ctx, v1295.0);
+                                                                                                if v1298.0 == 0xC {
+                                                                                                    if v1298.1 == 0xD {
+                                                                                                        let v1301 = C::u8_pair_split(ctx, v1295.1);
+                                                                                                        if v1301.0 == 0xE {
+                                                                                                            if v1301.1 == 0xF {
+                                                                                                                let v1239 = C::unpack_value_array_2(ctx, v1237);
+                                                                                                                let v1312 = C::put_in_reg(ctx, v1239.1);
+                                                                                                                let v1248 = C::put_in_reg(ctx, v1239.0);
+                                                                                                                let v1345 = constructor_vec_merge_low(ctx, I64X2, v1312, v1248);
+                                                                                                                let v1346 = constructor_output_reg(ctx, v1345);
+                                                                                                                // Rule at src/isa/s390x/lower.isle line 2102.
+                                                                                                                return Some(v1346);
+                                                                                                            }
+                                                                                                        }
+                                                                                                    }
+                                                                                                }
+                                                                                            }
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                                0x10 => {
+                                                                                    if v1289.1
+                                                                                        == 0x11
+                                                                                    {
+                                                                                        let v1292 = C::u8_pair_split(ctx, v1286.1);
+                                                                                        if v1292.0
+                                                                                            == 0x12
+                                                                                        {
+                                                                                            if v1292.1 == 0x13 {
+                                                                                                let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                                                                let v1298 = C::u8_pair_split(ctx, v1295.0);
+                                                                                                if v1298.0 == 0x14 {
+                                                                                                    if v1298.1 == 0x15 {
+                                                                                                        let v1301 = C::u8_pair_split(ctx, v1295.1);
+                                                                                                        if v1301.0 == 0x16 {
+                                                                                                            if v1301.1 == 0x17 {
+                                                                                                                let v1239 = C::unpack_value_array_2(ctx, v1237);
+                                                                                                                let v1312 = C::put_in_reg(ctx, v1239.1);
+                                                                                                                let v1255 = C::put_in_reg(ctx, v1239.1);
+                                                                                                                let v1431 = constructor_vec_permute_dw_imm(ctx, I8X16, v1312, 0x1, v1255, 0x0);
+                                                                                                                let v1432 = constructor_output_reg(ctx, v1431);
+                                                                                                                // Rule at src/isa/s390x/lower.isle line 2196.
+                                                                                                                return Some(v1432);
+                                                                                                            }
+                                                                                                        }
+                                                                                                    }
+                                                                                                }
+                                                                                            }
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                                0x18 => {
+                                                                                    if v1289.1
+                                                                                        == 0x19
+                                                                                    {
+                                                                                        let v1292 = C::u8_pair_split(ctx, v1286.1);
+                                                                                        if v1292.0
+                                                                                            == 0x1A
+                                                                                        {
+                                                                                            if v1292.1 == 0x1B {
+                                                                                                let v1295 = C::u16_pair_split(ctx, v1283.1);
+                                                                                                let v1298 = C::u8_pair_split(ctx, v1295.0);
+                                                                                                if v1298.0 == 0x1C {
+                                                                                                    if v1298.1 == 0x1D {
+                                                                                                        let v1301 = C::u8_pair_split(ctx, v1295.1);
+                                                                                                        if v1301.0 == 0x1E {
+                                                                                                            if v1301.1 == 0x1F {
+                                                                                                                let v1239 = C::unpack_value_array_2(ctx, v1237);
+                                                                                                                let v1312 = C::put_in_reg(ctx, v1239.1);
+                                                                                                                let v1255 = C::put_in_reg(ctx, v1239.1);
+                                                                                                                let v1361 = constructor_vec_merge_low(ctx, I64X2, v1312, v1255);
+                                                                                                                let v1362 = constructor_output_reg(ctx, v1361);
+                                                                                                                // Rule at src/isa/s390x/lower.isle line 2118.
+                                                                                                                return Some(v1362);
+                                                                                                            }
+                                                                                                        }
+                                                                                                    }
+                                                                                                }
+                                                                                            }
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                                _ => {}
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                            _ => {}
+                                                        }
+                                                    }
+                                                }
+                                                _ => {}
+                                            }
+                                        }
+                                        _ => {}
+                                    }
+                                }
+                                _ => {}
+                            }
+                            let v1239 = C::unpack_value_array_2(ctx, v1237);
+                            let v1254 = C::put_in_reg(ctx, v1239.0);
+                            let v1255 = C::put_in_reg(ctx, v1239.1);
+                            let v1256 = constructor_vec_imm(ctx, I8X16, v1244.0);
+                            let v1257 = constructor_vec_permute(ctx, I8X16, v1254, v1255, v1256);
+                            let v1258 = constructor_output_reg(ctx, v1257);
+                            // Rule at src/isa/s390x/lower.isle line 2056.
+                            return Some(v1258);
+                        }
+                        _ => {}
+                    }
+                    let v1247 = constructor_vec_imm_byte_mask(ctx, I8X16, v1244.1);
+                    let v1239 = C::unpack_value_array_2(ctx, v1237);
+                    let v1248 = C::put_in_reg(ctx, v1239.0);
+                    let v1249 = C::put_in_reg(ctx, v1239.1);
+                    let v1250 = constructor_vec_imm(ctx, I8X16, v1244.0);
+                    let v1251 = constructor_vec_permute(ctx, I8X16, v1248, v1249, v1250);
+                    let v1252 = constructor_vec_and(ctx, I8X16, v1247, v1251);
+                    let v1253 = constructor_output_reg(ctx, v1252);
+                    // Rule at src/isa/s390x/lower.isle line 2051.
+                    return Some(v1253);
+                }
+            }
+        }
+        &InstructionData::StackLoad {
+            opcode: ref v1447,
+            stack_slot: v1448,
+            offset: v1449,
+        } => {
+            if let &Opcode::StackAddr = v1447 {
+                let v1 = C::first_result(ctx, arg0);
+                if let Some(v2) = v1 {
+                    let v3 = C::value_type(ctx, v2);
+                    let v1450 = constructor_stack_addr_impl(ctx, v3, v1448, v1449);
+                    let v1451 = constructor_output_reg(ctx, v1450);
+                    // Rule at src/isa/s390x/lower.isle line 2238.
+                    return Some(v1451);
+                }
+            }
+        }
+        &InstructionData::Store {
+            opcode: ref v1154,
+            args: ref v1155,
+            flags: v1156,
+            offset: v1157,
+        } => {
+            match v1154 {
+                &Opcode::Store => {
+                    let v1158 = C::unpack_value_array_2(ctx, v1155);
+                    let v1161 = C::def_inst(ctx, v1158.0);
+                    if let Some(v1162) = v1161 {
+                        let v1163 = &C::inst_data(ctx, v1162);
+                        if let &InstructionData::BinaryImm8 {
+                            opcode: ref v1164,
+                            arg: v1165,
+                            imm: v1166,
+                        } = v1163
+                        {
+                            if let &Opcode::Extractlane = v1164 {
+                                let v1169 = C::bigendian(ctx, v1156);
+                                if let Some(v1170) = v1169 {
+                                    let v1171 = C::put_in_reg(ctx, v1165);
+                                    let v1172 =
+                                        &constructor_lower_address(ctx, v1156, v1158.1, v1157);
+                                    let v1167 = C::value_type(ctx, v1165);
+                                    let v1168 = C::u8_from_uimm8(ctx, v1166);
+                                    let v1173 = C::be_lane_idx(ctx, v1167, v1168);
+                                    let v1174 = &constructor_vec_store_lane(
+                                        ctx, v1167, v1171, v1172, v1173,
+                                    );
+                                    let v1175 = constructor_side_effect(ctx, v1174);
+                                    // Rule at src/isa/s390x/lower.isle line 1894.
+                                    return Some(v1175);
+                                }
+                                let v1176 = C::littleendian(ctx, v1156);
+                                if let Some(v1177) = v1176 {
+                                    let v1171 = C::put_in_reg(ctx, v1165);
+                                    let v1172 =
+                                        &constructor_lower_address(ctx, v1156, v1158.1, v1157);
+                                    let v1167 = C::value_type(ctx, v1165);
+                                    let v1168 = C::u8_from_uimm8(ctx, v1166);
+                                    let v1173 = C::be_lane_idx(ctx, v1167, v1168);
+                                    let v1178 = &constructor_vec_store_lane_little(
+                                        ctx, v1167, v1171, v1172, v1173,
+                                    );
+                                    let v1179 = constructor_side_effect(ctx, v1178);
+                                    // Rule at src/isa/s390x/lower.isle line 1901.
+                                    return Some(v1179);
+                                }
+                            }
+                        }
+                    }
+                    let v1433 = &C::lane_order(ctx);
+                    match v1433 {
+                        &LaneOrder::LittleEndian => {
+                            let v1580 = C::value_type(ctx, v1158.0);
+                            let v1598 = C::vr128_ty(ctx, v1580);
+                            if let Some(v1599) = v1598 {
+                                let v1169 = C::bigendian(ctx, v1156);
+                                if let Some(v1170) = v1169 {
+                                    let v1589 = C::put_in_reg(ctx, v1158.0);
+                                    let v1604 = &constructor_vec_store_elt_rev(
+                                        ctx, v1599, v1589, v1156, v1158.1, v1157,
+                                    );
+                                    let v1605 = constructor_side_effect(ctx, v1604);
+                                    // Rule at src/isa/s390x/lower.isle line 2689.
+                                    return Some(v1605);
+                                }
+                                let v1176 = C::littleendian(ctx, v1156);
+                                if let Some(v1177) = v1176 {
+                                    let v1589 = C::put_in_reg(ctx, v1158.0);
+                                    let v1606 = &constructor_vec_store_full_rev(
+                                        ctx, v1599, v1589, v1156, v1158.1, v1157,
+                                    );
+                                    let v1607 = constructor_side_effect(ctx, v1606);
+                                    // Rule at src/isa/s390x/lower.isle line 2695.
+                                    return Some(v1607);
+                                }
+                            }
+                        }
+                        &LaneOrder::BigEndian => {
+                            let v1580 = C::value_type(ctx, v1158.0);
+                            let v1598 = C::vr128_ty(ctx, v1580);
+                            if let Some(v1599) = v1598 {
+                                let v1169 = C::bigendian(ctx, v1156);
+                                if let Some(v1170) = v1169 {
+                                    let v1589 = C::put_in_reg(ctx, v1158.0);
+                                    let v1172 =
+                                        &constructor_lower_address(ctx, v1156, v1158.1, v1157);
+                                    let v1600 = &constructor_vec_store(ctx, v1589, v1172);
+                                    let v1601 = constructor_side_effect(ctx, v1600);
+                                    // Rule at src/isa/s390x/lower.isle line 2677.
+                                    return Some(v1601);
+                                }
+                                let v1176 = C::littleendian(ctx, v1156);
+                                if let Some(v1177) = v1176 {
+                                    let v1589 = C::put_in_reg(ctx, v1158.0);
+                                    let v1602 = &constructor_vec_store_byte_rev(
+                                        ctx, v1599, v1589, v1156, v1158.1, v1157,
+                                    );
+                                    let v1603 = constructor_side_effect(ctx, v1602);
+                                    // Rule at src/isa/s390x/lower.isle line 2683.
+                                    return Some(v1603);
+                                }
+                            }
+                        }
+                        _ => {}
+                    }
+                    let v1580 = C::value_type(ctx, v1158.0);
+                    match v1580 {
+                        I8 => {
+                            let v1581 =
+                                &constructor_istore8_impl(ctx, v1156, v1158.0, v1158.1, v1157);
+                            let v1582 = constructor_side_effect(ctx, v1581);
+                            // Rule at src/isa/s390x/lower.isle line 2633.
+                            return Some(v1582);
+                        }
+                        I16 => {
+                            let v1583 =
+                                &constructor_istore16_impl(ctx, v1156, v1158.0, v1158.1, v1157);
+                            let v1584 = constructor_side_effect(ctx, v1583);
+                            // Rule at src/isa/s390x/lower.isle line 2637.
+                            return Some(v1584);
+                        }
+                        I32 => {
+                            let v1585 =
+                                &constructor_istore32_impl(ctx, v1156, v1158.0, v1158.1, v1157);
+                            let v1586 = constructor_side_effect(ctx, v1585);
+                            // Rule at src/isa/s390x/lower.isle line 2641.
+                            return Some(v1586);
+                        }
+                        I64 => {
+                            let v1587 =
+                                &constructor_istore64_impl(ctx, v1156, v1158.0, v1158.1, v1157);
+                            let v1588 = constructor_side_effect(ctx, v1587);
+                            // Rule at src/isa/s390x/lower.isle line 2645.
+                            return Some(v1588);
+                        }
+                        R64 => {
+                            let v1587 =
+                                &constructor_istore64_impl(ctx, v1156, v1158.0, v1158.1, v1157);
+                            let v1588 = constructor_side_effect(ctx, v1587);
+                            // Rule at src/isa/s390x/lower.isle line 2649.
+                            return Some(v1588);
+                        }
+                        F32 => {
+                            let v1176 = C::littleendian(ctx, v1156);
+                            if let Some(v1177) = v1176 {
+                                let v1589 = C::put_in_reg(ctx, v1158.0);
+                                let v1172 = &constructor_lower_address(ctx, v1156, v1158.1, v1157);
+                                let v1592 = &constructor_vec_store_lane_little(
+                                    ctx, F32X4, v1589, v1172, 0x0,
+                                );
+                                let v1593 = constructor_side_effect(ctx, v1592);
+                                // Rule at src/isa/s390x/lower.isle line 2659.
+                                return Some(v1593);
+                            }
+                            let v1169 = C::bigendian(ctx, v1156);
+                            if let Some(v1170) = v1169 {
+                                let v1589 = C::put_in_reg(ctx, v1158.0);
+                                let v1172 = &constructor_lower_address(ctx, v1156, v1158.1, v1157);
+                                let v1590 =
+                                    &constructor_vec_store_lane(ctx, F32X4, v1589, v1172, 0x0);
+                                let v1591 = constructor_side_effect(ctx, v1590);
+                                // Rule at src/isa/s390x/lower.isle line 2653.
+                                return Some(v1591);
+                            }
+                        }
+                        F64 => {
+                            let v1176 = C::littleendian(ctx, v1156);
+                            if let Some(v1177) = v1176 {
+                                let v1589 = C::put_in_reg(ctx, v1158.0);
+                                let v1172 = &constructor_lower_address(ctx, v1156, v1158.1, v1157);
+                                let v1596 = &constructor_vec_store_lane_little(
+                                    ctx, F64X2, v1589, v1172, 0x0,
+                                );
+                                let v1597 = constructor_side_effect(ctx, v1596);
+                                // Rule at src/isa/s390x/lower.isle line 2671.
+                                return Some(v1597);
+                            }
+                            let v1169 = C::bigendian(ctx, v1156);
+                            if let Some(v1170) = v1169 {
+                                let v1589 = C::put_in_reg(ctx, v1158.0);
+                                let v1172 = &constructor_lower_address(ctx, v1156, v1158.1, v1157);
+                                let v1594 =
+                                    &constructor_vec_store_lane(ctx, F64X2, v1589, v1172, 0x0);
+                                let v1595 = constructor_side_effect(ctx, v1594);
+                                // Rule at src/isa/s390x/lower.isle line 2665.
+                                return Some(v1595);
+                            }
+                        }
+                        _ => {}
+                    }
+                }
+                &Opcode::Istore8 => {
+                    let v1158 = C::unpack_value_array_2(ctx, v1155);
+                    let v1581 = &constructor_istore8_impl(ctx, v1156, v1158.0, v1158.1, v1157);
+                    let v1582 = constructor_side_effect(ctx, v1581);
+                    // Rule at src/isa/s390x/lower.isle line 2789.
+                    return Some(v1582);
+                }
+                &Opcode::Istore16 => {
+                    let v1158 = C::unpack_value_array_2(ctx, v1155);
+                    let v1583 = &constructor_istore16_impl(ctx, v1156, v1158.0, v1158.1, v1157);
+                    let v1584 = constructor_side_effect(ctx, v1583);
+                    // Rule at src/isa/s390x/lower.isle line 2807.
+                    return Some(v1584);
+                }
+                &Opcode::Istore32 => {
+                    let v1158 = C::unpack_value_array_2(ctx, v1155);
+                    let v1585 = &constructor_istore32_impl(ctx, v1156, v1158.0, v1158.1, v1157);
+                    let v1586 = constructor_side_effect(ctx, v1585);
+                    // Rule at src/isa/s390x/lower.isle line 2833.
+                    return Some(v1586);
+                }
+                _ => {}
+            }
+        }
+        &InstructionData::StoreNoOffset {
+            opcode: ref v1720,
+            args: ref v1721,
+            flags: v1722,
+        } => {
+            if let &Opcode::AtomicStore = v1720 {
+                let v1723 = C::unpack_value_array_2(ctx, v1721);
+                let v1726 = C::value_type(ctx, v1723.0);
+                match v1726 {
+                    I8 => {
+                        let v1700 = C::zero_offset(ctx);
+                        let v1727 = &constructor_istore8_impl(ctx, v1722, v1723.0, v1723.1, v1700);
+                        let v1728 = constructor_atomic_store_impl(ctx, v1727);
+                        // Rule at src/isa/s390x/lower.isle line 3239.
+                        return Some(v1728);
+                    }
+                    I16 => {
+                        let v1700 = C::zero_offset(ctx);
+                        let v1729 = &constructor_istore16_impl(ctx, v1722, v1723.0, v1723.1, v1700);
+                        let v1730 = constructor_atomic_store_impl(ctx, v1729);
+                        // Rule at src/isa/s390x/lower.isle line 3243.
+                        return Some(v1730);
+                    }
+                    I32 => {
+                        let v1700 = C::zero_offset(ctx);
+                        let v1731 = &constructor_istore32_impl(ctx, v1722, v1723.0, v1723.1, v1700);
+                        let v1732 = constructor_atomic_store_impl(ctx, v1731);
+                        // Rule at src/isa/s390x/lower.isle line 3247.
+                        return Some(v1732);
+                    }
+                    I64 => {
+                        let v1700 = C::zero_offset(ctx);
+                        let v1733 = &constructor_istore64_impl(ctx, v1722, v1723.0, v1723.1, v1700);
+                        let v1734 = constructor_atomic_store_impl(ctx, v1733);
+                        // Rule at src/isa/s390x/lower.isle line 3251.
+                        return Some(v1734);
+                    }
+                    _ => {}
+                }
+            }
+        }
+        &InstructionData::Ternary {
+            opcode: ref v729,
+            args: ref v730,
+        } => {
+            match v729 {
+                &Opcode::Select => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v731 = C::unpack_value_array_3(ctx, v730);
+                        let v1888 = &constructor_value_nonzero(ctx, v731.0);
+                        let v736 = C::put_in_reg(ctx, v731.1);
+                        let v890 = C::put_in_reg(ctx, v731.2);
+                        let v3 = C::value_type(ctx, v2);
+                        let v1889 = constructor_select_bool_reg(ctx, v3, v1888, v736, v890);
+                        let v1890 = constructor_output_reg(ctx, v1889);
+                        // Rule at src/isa/s390x/lower.isle line 3718.
+                        return Some(v1890);
+                    }
+                }
+                &Opcode::SelectSpectreGuard => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v731 = C::unpack_value_array_3(ctx, v730);
+                        let v1888 = &constructor_value_nonzero(ctx, v731.0);
+                        let v736 = C::put_in_reg(ctx, v731.1);
+                        let v890 = C::put_in_reg(ctx, v731.2);
+                        let v3 = C::value_type(ctx, v2);
+                        let v1889 = constructor_select_bool_reg(ctx, v3, v1888, v736, v890);
+                        let v1890 = constructor_output_reg(ctx, v1889);
+                        // Rule at src/isa/s390x/lower.isle line 3728.
+                        return Some(v1890);
+                    }
+                }
+                &Opcode::Bitselect => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v61 = C::fits_in_64(ctx, v3);
+                        if let Some(v62) = v61 {
+                            let v624 = C::mie2_enabled(ctx, v3);
+                            if let Some(v625) = v624 {
+                                let v731 = C::unpack_value_array_3(ctx, v730);
+                                let v735 = C::put_in_reg(ctx, v731.0);
+                                let v736 = C::put_in_reg(ctx, v731.1);
+                                let v737 = constructor_and_reg(ctx, v62, v736, v735);
+                                let v738 = C::put_in_reg(ctx, v731.2);
+                                let v739 = constructor_and_not_reg(ctx, v62, v738, v735);
+                                let v740 = constructor_or_reg(ctx, v62, v739, v737);
+                                let v741 = constructor_output_reg(ctx, v740);
+                                // Rule at src/isa/s390x/lower.isle line 1120.
+                                return Some(v741);
+                            }
+                            let v628 = C::mie2_disabled(ctx, v3);
+                            if let Some(v629) = v628 {
+                                let v731 = C::unpack_value_array_3(ctx, v730);
+                                let v735 = C::put_in_reg(ctx, v731.0);
+                                let v736 = C::put_in_reg(ctx, v731.1);
+                                let v737 = constructor_and_reg(ctx, v62, v736, v735);
+                                let v738 = C::put_in_reg(ctx, v731.2);
+                                let v742 = constructor_not_reg(ctx, v62, v735);
+                                let v743 = constructor_and_reg(ctx, v62, v738, v742);
+                                let v744 = constructor_or_reg(ctx, v62, v743, v737);
+                                let v745 = constructor_output_reg(ctx, v744);
+                                // Rule at src/isa/s390x/lower.isle line 1127.
+                                return Some(v745);
+                            }
+                        }
+                        let v36 = C::vr128_ty(ctx, v3);
+                        if let Some(v37) = v36 {
+                            let v731 = C::unpack_value_array_3(ctx, v730);
+                            let v746 = C::put_in_reg(ctx, v731.1);
+                            let v747 = C::put_in_reg(ctx, v731.2);
+                            let v748 = C::put_in_reg(ctx, v731.0);
+                            let v749 = constructor_vec_select(ctx, v37, v746, v747, v748);
+                            let v750 = constructor_output_reg(ctx, v749);
+                            // Rule at src/isa/s390x/lower.isle line 1134.
+                            return Some(v750);
+                        }
+                    }
+                }
+                &Opcode::Fma => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v731 = C::unpack_value_array_3(ctx, v730);
+                        let v735 = C::put_in_reg(ctx, v731.0);
+                        let v736 = C::put_in_reg(ctx, v731.1);
+                        let v890 = C::put_in_reg(ctx, v731.2);
+                        let v3 = C::value_type(ctx, v2);
+                        let v891 = constructor_fma_reg(ctx, v3, v735, v736, v890);
+                        let v892 = constructor_output_reg(ctx, v891);
+                        // Rule at src/isa/s390x/lower.isle line 1422.
+                        return Some(v892);
+                    }
+                }
+                _ => {}
+            }
+        }
+        &InstructionData::TernaryImm8 {
+            opcode: ref v1088,
+            args: ref v1089,
+            imm: v1090,
+        } => {
+            if let &Opcode::Insertlane = v1088 {
+                let v1091 = C::unpack_value_array_2(ctx, v1089);
+                let v1125 = C::sinkable_inst(ctx, v1091.1);
+                if let Some(v1126) = v1125 {
+                    let v1127 = &C::inst_data(ctx, v1126);
+                    if let &InstructionData::Load {
+                        opcode: ref v1128,
+                        arg: v1129,
+                        flags: v1130,
+                        offset: v1131,
+                    } = v1127
+                    {
+                        if let &Opcode::Load = v1128 {
+                            let v1137 = C::littleendian(ctx, v1130);
+                            if let Some(v1138) = v1137 {
+                                let v1099 = C::put_in_reg(ctx, v1091.0);
+                                let v1134 = &constructor_sink_load(ctx, v1126);
+                                let v1094 = C::value_type(ctx, v1091.0);
+                                let v1096 = C::u8_from_uimm8(ctx, v1090);
+                                let v1101 = C::be_lane_idx(ctx, v1094, v1096);
+                                let v1139 = constructor_vec_load_lane_little(
+                                    ctx, v1094, v1099, v1134, v1101,
+                                );
+                                let v1140 = constructor_output_reg(ctx, v1139);
+                                // Rule at src/isa/s390x/lower.isle line 1796.
+                                return Some(v1140);
+                            }
+                            let v1132 = C::bigendian(ctx, v1130);
+                            if let Some(v1133) = v1132 {
+                                let v1099 = C::put_in_reg(ctx, v1091.0);
+                                let v1134 = &constructor_sink_load(ctx, v1126);
+                                let v1094 = C::value_type(ctx, v1091.0);
+                                let v1096 = C::u8_from_uimm8(ctx, v1090);
+                                let v1101 = C::be_lane_idx(ctx, v1094, v1096);
+                                let v1135 =
+                                    constructor_vec_load_lane(ctx, v1094, v1099, v1134, v1101);
+                                let v1136 = constructor_output_reg(ctx, v1135);
+                                // Rule at src/isa/s390x/lower.isle line 1791.
+                                return Some(v1136);
+                            }
+                        }
+                    }
+                }
+                let v1121 = C::i16_from_value(ctx, v1091.1);
+                if let Some(v1122) = v1121 {
+                    let v1099 = C::put_in_reg(ctx, v1091.0);
+                    let v1094 = C::value_type(ctx, v1091.0);
+                    let v1096 = C::u8_from_uimm8(ctx, v1090);
+                    let v1106 = C::be_lane_idx(ctx, v1094, v1096);
+                    let v1123 = constructor_vec_insert_lane_imm(ctx, v1094, v1099, v1122, v1106);
+                    let v1124 = constructor_output_reg(ctx, v1123);
+                    // Rule at src/isa/s390x/lower.isle line 1786.
+                    return Some(v1124);
+                }
+                let v1110 = C::def_inst(ctx, v1091.1);
+                if let Some(v1111) = v1110 {
+                    let v1112 = &C::inst_data(ctx, v1111);
+                    if let &InstructionData::BinaryImm8 {
+                        opcode: ref v1113,
+                        arg: v1114,
+                        imm: v1115,
+                    } = v1112
+                    {
+                        if let &Opcode::Extractlane = v1113 {
+                            let v1099 = C::put_in_reg(ctx, v1091.0);
+                            let v1094 = C::value_type(ctx, v1091.0);
+                            let v1096 = C::u8_from_uimm8(ctx, v1090);
+                            let v1106 = C::be_lane_idx(ctx, v1094, v1096);
+                            let v1117 = C::put_in_reg(ctx, v1114);
+                            let v1116 = C::u8_from_uimm8(ctx, v1115);
+                            let v1118 = C::be_lane_idx(ctx, v1094, v1116);
+                            let v1119 = constructor_vec_move_lane_and_insert(
+                                ctx, v1094, v1099, v1106, v1117, v1118,
+                            );
+                            let v1120 = constructor_output_reg(ctx, v1119);
+                            // Rule at src/isa/s390x/lower.isle line 1779.
+                            return Some(v1120);
+                        }
+                    }
+                }
+                let v1095 = C::value_type(ctx, v1091.1);
+                let v1097 = C::ty_int_ref_scalar_64(ctx, v1095);
+                if let Some(v1098) = v1097 {
+                    let v1099 = C::put_in_reg(ctx, v1091.0);
+                    let v1100 = C::put_in_reg(ctx, v1091.1);
+                    let v1094 = C::value_type(ctx, v1091.0);
+                    let v1096 = C::u8_from_uimm8(ctx, v1090);
+                    let v1101 = C::be_lane_idx(ctx, v1094, v1096);
+                    let v56 = C::zero_reg(ctx);
+                    let v1102 = constructor_vec_insert_lane(ctx, v1094, v1099, v1100, v1101, v56);
+                    let v1103 = constructor_output_reg(ctx, v1102);
+                    // Rule at src/isa/s390x/lower.isle line 1766.
+                    return Some(v1103);
+                }
+                let v1104 = C::ty_scalar_float(ctx, v1095);
+                if let Some(v1105) = v1104 {
+                    let v1099 = C::put_in_reg(ctx, v1091.0);
+                    let v1094 = C::value_type(ctx, v1091.0);
+                    let v1096 = C::u8_from_uimm8(ctx, v1090);
+                    let v1106 = C::be_lane_idx(ctx, v1094, v1096);
+                    let v1107 = C::put_in_reg(ctx, v1091.1);
+                    let v1108 =
+                        constructor_vec_move_lane_and_insert(ctx, v1094, v1099, v1106, v1107, 0x0);
+                    let v1109 = constructor_output_reg(ctx, v1108);
+                    // Rule at src/isa/s390x/lower.isle line 1773.
+                    return Some(v1109);
+                }
+            }
+        }
+        &InstructionData::Trap {
+            opcode: ref v1891,
+            code: ref v1892,
+        } => {
+            match v1891 {
+                &Opcode::Trap => {
+                    let v1893 = &constructor_trap_impl(ctx, v1892);
+                    let v1894 = constructor_side_effect(ctx, v1893);
+                    // Rule at src/isa/s390x/lower.isle line 3787.
+                    return Some(v1894);
+                }
+                &Opcode::ResumableTrap => {
+                    let v1893 = &constructor_trap_impl(ctx, v1892);
+                    let v1894 = constructor_side_effect(ctx, v1893);
+                    // Rule at src/isa/s390x/lower.isle line 3793.
+                    return Some(v1894);
+                }
+                _ => {}
+            }
+        }
+        &InstructionData::Unary {
+            opcode: ref v47,
+            arg: v48,
+        } => {
+            match v47 {
+                &Opcode::Splat => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v1201 = C::sinkable_inst(ctx, v48);
+                        if let Some(v1202) = v1201 {
+                            let v1203 = &C::inst_data(ctx, v1202);
+                            if let &InstructionData::Load {
+                                opcode: ref v1204,
+                                arg: v1205,
+                                flags: v1206,
+                                offset: v1207,
+                            } = v1203
+                            {
+                                if let &Opcode::Load = v1204 {
+                                    let v1213 = C::littleendian(ctx, v1206);
+                                    if let Some(v1214) = v1213 {
+                                        let v1210 = &constructor_sink_load(ctx, v1202);
+                                        let v3 = C::value_type(ctx, v2);
+                                        let v1215 =
+                                            constructor_vec_load_replicate_little(ctx, v3, v1210);
+                                        let v1216 = constructor_output_reg(ctx, v1215);
+                                        // Rule at src/isa/s390x/lower.isle line 1963.
+                                        return Some(v1216);
+                                    }
+                                    let v1208 = C::bigendian(ctx, v1206);
+                                    if let Some(v1209) = v1208 {
+                                        let v1210 = &constructor_sink_load(ctx, v1202);
+                                        let v3 = C::value_type(ctx, v2);
+                                        let v1211 = constructor_vec_load_replicate(ctx, v3, v1210);
+                                        let v1212 = constructor_output_reg(ctx, v1211);
+                                        // Rule at src/isa/s390x/lower.isle line 1959.
+                                        return Some(v1212);
+                                    }
+                                }
+                            }
+                        }
+                        let v1197 = C::i16_from_value(ctx, v48);
+                        if let Some(v1198) = v1197 {
+                            let v3 = C::value_type(ctx, v2);
+                            let v1199 = constructor_vec_imm_replicate(ctx, v3, v1198);
+                            let v1200 = constructor_output_reg(ctx, v1199);
+                            // Rule at src/isa/s390x/lower.isle line 1955.
+                            return Some(v1200);
+                        }
+                        let v260 = C::def_inst(ctx, v48);
+                        if let Some(v261) = v260 {
+                            let v262 = &C::inst_data(ctx, v261);
+                            if let &InstructionData::BinaryImm8 {
+                                opcode: ref v1189,
+                                arg: v1190,
+                                imm: v1191,
+                            } = v262
+                            {
+                                if let &Opcode::Extractlane = v1189 {
+                                    let v1193 = C::put_in_reg(ctx, v1190);
+                                    let v3 = C::value_type(ctx, v2);
+                                    let v1192 = C::u8_from_uimm8(ctx, v1191);
+                                    let v1194 = C::be_lane_idx(ctx, v3, v1192);
+                                    let v1195 =
+                                        constructor_vec_replicate_lane(ctx, v3, v1193, v1194);
+                                    let v1196 = constructor_output_reg(ctx, v1195);
+                                    // Rule at src/isa/s390x/lower.isle line 1951.
+                                    return Some(v1196);
+                                }
+                            }
+                        }
+                        let v49 = C::value_type(ctx, v48);
+                        let v1180 = C::ty_int_ref_scalar_64(ctx, v49);
+                        if let Some(v1181) = v1180 {
+                            let v50 = C::put_in_reg(ctx, v48);
+                            let v53 = C::zero_reg(ctx);
+                            let v3 = C::value_type(ctx, v2);
+                            let v1182 = constructor_vec_insert_lane_undef(ctx, v3, v50, 0x0, v53);
+                            let v1183 = constructor_vec_replicate_lane(ctx, v3, v1182, 0x0);
+                            let v1184 = constructor_output_reg(ctx, v1183);
+                            // Rule at src/isa/s390x/lower.isle line 1941.
+                            return Some(v1184);
+                        }
+                        let v1185 = C::ty_scalar_float(ctx, v49);
+                        if let Some(v1186) = v1185 {
+                            let v50 = C::put_in_reg(ctx, v48);
+                            let v3 = C::value_type(ctx, v2);
+                            let v1187 = constructor_vec_replicate_lane(ctx, v3, v50, 0x0);
+                            let v1188 = constructor_output_reg(ctx, v1187);
+                            // Rule at src/isa/s390x/lower.isle line 1946.
+                            return Some(v1188);
+                        }
+                    }
+                }
+                &Opcode::VanyTrue => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v61 = C::fits_in_64(ctx, v3);
+                        if let Some(v62) = v61 {
+                            let v1819 = &constructor_vany_true_val(ctx, v48);
+                            let v1820 = constructor_lower_bool(ctx, v62, v1819);
+                            let v1821 = constructor_output_reg(ctx, v1820);
+                            // Rule at src/isa/s390x/lower.isle line 3563.
+                            return Some(v1821);
+                        }
+                    }
+                }
+                &Opcode::VallTrue => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v61 = C::fits_in_64(ctx, v3);
+                        if let Some(v62) = v61 {
+                            let v1816 = &constructor_vall_true_val(ctx, v48);
+                            let v1817 = constructor_lower_bool(ctx, v62, v1816);
+                            let v1818 = constructor_output_reg(ctx, v1817);
+                            // Rule at src/isa/s390x/lower.isle line 3485.
+                            return Some(v1818);
+                        }
+                    }
+                }
+                &Opcode::VhighBits => {
+                    let v1433 = &C::lane_order(ctx);
+                    match v1433 {
+                        &LaneOrder::LittleEndian => {
+                            let v49 = C::value_type(ctx, v48);
+                            let v1822 = C::multi_lane(ctx, v49);
+                            if let Some(v1823) = v1822 {
+                                match v1823.0 {
+                                    0x8 => {
+                                        if v1823.1 == 0x10 {
+                                            let v1836 = constructor_imm8x16(
+                                                ctx, 0x0, 0x8, 0x10, 0x18, 0x20, 0x28, 0x30, 0x38,
+                                                0x40, 0x48, 0x50, 0x58, 0x60, 0x68, 0x70, 0x78,
+                                            );
+                                            let v1837 = constructor_vec_imm(ctx, I8X16, v1836);
+                                            let v1838 = C::put_in_reg(ctx, v48);
+                                            let v1839 =
+                                                constructor_vec_bitpermute(ctx, v1838, v1837);
+                                            let v395 = C::zero_reg(ctx);
+                                            let v1840 = constructor_vec_extract_lane(
+                                                ctx, I64X2, v1839, 0x0, v395,
+                                            );
+                                            let v1841 = constructor_output_reg(ctx, v1840);
+                                            // Rule at src/isa/s390x/lower.isle line 3639.
+                                            return Some(v1841);
+                                        }
+                                    }
+                                    0x10 => {
+                                        if v1823.1 == 0x8 {
+                                            let v1848 = constructor_imm8x16(
+                                                ctx, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80,
+                                                0x80, 0x0, 0x10, 0x20, 0x30, 0x40, 0x50, 0x60,
+                                                0x70,
+                                            );
+                                            let v1849 = constructor_vec_imm(ctx, I8X16, v1848);
+                                            let v1838 = C::put_in_reg(ctx, v48);
+                                            let v1850 =
+                                                constructor_vec_bitpermute(ctx, v1838, v1849);
+                                            let v395 = C::zero_reg(ctx);
+                                            let v1851 = constructor_vec_extract_lane(
+                                                ctx, I64X2, v1850, 0x0, v395,
+                                            );
+                                            let v1852 = constructor_output_reg(ctx, v1851);
+                                            // Rule at src/isa/s390x/lower.isle line 3650.
+                                            return Some(v1852);
+                                        }
+                                    }
+                                    0x20 => {
+                                        if v1823.1 == 0x4 {
+                                            let v1858 = constructor_imm8x16(
+                                                ctx, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80,
+                                                0x80, 0x80, 0x80, 0x80, 0x80, 0x0, 0x20, 0x40,
+                                                0x60,
+                                            );
+                                            let v1859 = constructor_vec_imm(ctx, I8X16, v1858);
+                                            let v1838 = C::put_in_reg(ctx, v48);
+                                            let v1860 =
+                                                constructor_vec_bitpermute(ctx, v1838, v1859);
+                                            let v395 = C::zero_reg(ctx);
+                                            let v1861 = constructor_vec_extract_lane(
+                                                ctx, I64X2, v1860, 0x0, v395,
+                                            );
+                                            let v1862 = constructor_output_reg(ctx, v1861);
+                                            // Rule at src/isa/s390x/lower.isle line 3661.
+                                            return Some(v1862);
+                                        }
+                                    }
+                                    0x40 => {
+                                        if v1823.1 == 0x2 {
+                                            let v1868 = constructor_imm8x16(
+                                                ctx, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80,
+                                                0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x0,
+                                                0x40,
+                                            );
+                                            let v1869 = constructor_vec_imm(ctx, I8X16, v1868);
+                                            let v1838 = C::put_in_reg(ctx, v48);
+                                            let v1870 =
+                                                constructor_vec_bitpermute(ctx, v1838, v1869);
+                                            let v395 = C::zero_reg(ctx);
+                                            let v1871 = constructor_vec_extract_lane(
+                                                ctx, I64X2, v1870, 0x0, v395,
+                                            );
+                                            let v1872 = constructor_output_reg(ctx, v1871);
+                                            // Rule at src/isa/s390x/lower.isle line 3672.
+                                            return Some(v1872);
+                                        }
+                                    }
+                                    _ => {}
+                                }
+                            }
+                        }
+                        &LaneOrder::BigEndian => {
+                            let v49 = C::value_type(ctx, v48);
+                            let v1822 = C::multi_lane(ctx, v49);
+                            if let Some(v1823) = v1822 {
+                                match v1823.0 {
+                                    0x8 => {
+                                        if v1823.1 == 0x10 {
+                                            let v1842 = constructor_imm8x16(
+                                                ctx, 0x78, 0x70, 0x68, 0x60, 0x58, 0x50, 0x48,
+                                                0x40, 0x38, 0x30, 0x28, 0x20, 0x18, 0x10, 0x8, 0x0,
+                                            );
+                                            let v1843 = constructor_vec_imm(ctx, I8X16, v1842);
+                                            let v1838 = C::put_in_reg(ctx, v48);
+                                            let v1844 =
+                                                constructor_vec_bitpermute(ctx, v1838, v1843);
+                                            let v395 = C::zero_reg(ctx);
+                                            let v1845 = constructor_vec_extract_lane(
+                                                ctx, I64X2, v1844, 0x0, v395,
+                                            );
+                                            let v1846 = constructor_output_reg(ctx, v1845);
+                                            // Rule at src/isa/s390x/lower.isle line 3644.
+                                            return Some(v1846);
+                                        }
+                                    }
+                                    0x10 => {
+                                        if v1823.1 == 0x8 {
+                                            let v1853 = constructor_imm8x16(
+                                                ctx, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80,
+                                                0x80, 0x70, 0x60, 0x50, 0x40, 0x30, 0x20, 0x10,
+                                                0x0,
+                                            );
+                                            let v1854 = constructor_vec_imm(ctx, I8X16, v1853);
+                                            let v1838 = C::put_in_reg(ctx, v48);
+                                            let v1855 =
+                                                constructor_vec_bitpermute(ctx, v1838, v1854);
+                                            let v395 = C::zero_reg(ctx);
+                                            let v1856 = constructor_vec_extract_lane(
+                                                ctx, I64X2, v1855, 0x0, v395,
+                                            );
+                                            let v1857 = constructor_output_reg(ctx, v1856);
+                                            // Rule at src/isa/s390x/lower.isle line 3655.
+                                            return Some(v1857);
+                                        }
+                                    }
+                                    0x20 => {
+                                        if v1823.1 == 0x4 {
+                                            let v1863 = constructor_imm8x16(
+                                                ctx, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80,
+                                                0x80, 0x80, 0x80, 0x80, 0x80, 0x60, 0x40, 0x20,
+                                                0x0,
+                                            );
+                                            let v1864 = constructor_vec_imm(ctx, I8X16, v1863);
+                                            let v1838 = C::put_in_reg(ctx, v48);
+                                            let v1865 =
+                                                constructor_vec_bitpermute(ctx, v1838, v1864);
+                                            let v395 = C::zero_reg(ctx);
+                                            let v1866 = constructor_vec_extract_lane(
+                                                ctx, I64X2, v1865, 0x0, v395,
+                                            );
+                                            let v1867 = constructor_output_reg(ctx, v1866);
+                                            // Rule at src/isa/s390x/lower.isle line 3666.
+                                            return Some(v1867);
+                                        }
+                                    }
+                                    0x40 => {
+                                        if v1823.1 == 0x2 {
+                                            let v1873 = constructor_imm8x16(
+                                                ctx, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80,
+                                                0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x40,
+                                                0x0,
+                                            );
+                                            let v1874 = constructor_vec_imm(ctx, I8X16, v1873);
+                                            let v1838 = C::put_in_reg(ctx, v48);
+                                            let v1875 =
+                                                constructor_vec_bitpermute(ctx, v1838, v1874);
+                                            let v395 = C::zero_reg(ctx);
+                                            let v1876 = constructor_vec_extract_lane(
+                                                ctx, I64X2, v1875, 0x0, v395,
+                                            );
+                                            let v1877 = constructor_output_reg(ctx, v1876);
+                                            // Rule at src/isa/s390x/lower.isle line 3677.
+                                            return Some(v1877);
+                                        }
+                                    }
+                                    _ => {}
+                                }
+                            }
+                        }
+                        _ => {}
+                    }
+                }
+                &Opcode::Ineg => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v61 = C::fits_in_64(ctx, v3);
+                        if let Some(v62) = v61 {
+                            let v260 = C::def_inst(ctx, v48);
+                            if let Some(v261) = v260 {
+                                let v262 = &C::inst_data(ctx, v261);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v263,
+                                    arg: v264,
+                                } = v262
+                                {
+                                    if let &Opcode::Sextend = v263 {
+                                        let v265 = C::value_type(ctx, v264);
+                                        if v265 == I32 {
+                                            let v266 = C::put_in_reg(ctx, v264);
+                                            let v282 = constructor_neg_reg_sext32(ctx, v62, v266);
+                                            let v283 = constructor_output_reg(ctx, v282);
+                                            // Rule at src/isa/s390x/lower.isle line 235.
+                                            return Some(v283);
+                                        }
+                                    }
+                                }
+                            }
+                            let v50 = C::put_in_reg(ctx, v48);
+                            let v280 = constructor_neg_reg(ctx, v62, v50);
+                            let v281 = constructor_output_reg(ctx, v280);
+                            // Rule at src/isa/s390x/lower.isle line 231.
+                            return Some(v281);
+                        }
+                        let v149 = C::ty_vec128(ctx, v3);
+                        if let Some(v150) = v149 {
+                            let v50 = C::put_in_reg(ctx, v48);
+                            let v284 = constructor_vec_neg(ctx, v150, v50);
+                            let v285 = constructor_output_reg(ctx, v284);
+                            // Rule at src/isa/s390x/lower.isle line 239.
+                            return Some(v285);
+                        }
+                        if v3 == I128 {
+                            let v273 = constructor_vec_imm(ctx, I128, 0x0);
+                            let v274 = C::put_in_reg(ctx, v48);
+                            let v275 = constructor_vec_sub(ctx, I128, v273, v274);
+                            let v286 = constructor_output_reg(ctx, v275);
+                            // Rule at src/isa/s390x/lower.isle line 243.
+                            return Some(v286);
+                        }
+                    }
+                }
+                &Opcode::Iabs => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v61 = C::fits_in_64(ctx, v3);
+                        if let Some(v62) = v61 {
+                            let v260 = C::def_inst(ctx, v48);
+                            if let Some(v261) = v260 {
+                                let v262 = &C::inst_data(ctx, v261);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v263,
+                                    arg: v264,
+                                } = v262
+                                {
+                                    if let &Opcode::Sextend = v263 {
+                                        let v265 = C::value_type(ctx, v264);
+                                        if v265 == I32 {
+                                            let v266 = C::put_in_reg(ctx, v264);
+                                            let v267 = constructor_abs_reg_sext32(ctx, v62, v266);
+                                            let v268 = constructor_output_reg(ctx, v267);
+                                            // Rule at src/isa/s390x/lower.isle line 211.
+                                            return Some(v268);
+                                        }
+                                    }
+                                }
+                            }
+                            let v256 = constructor_ty_ext32(ctx, v62);
+                            let v257 = constructor_put_in_reg_sext32(ctx, v48);
+                            let v258 = constructor_abs_reg(ctx, v256, v257);
+                            let v259 = constructor_output_reg(ctx, v258);
+                            // Rule at src/isa/s390x/lower.isle line 207.
+                            return Some(v259);
+                        }
+                        let v149 = C::ty_vec128(ctx, v3);
+                        if let Some(v150) = v149 {
+                            let v50 = C::put_in_reg(ctx, v48);
+                            let v269 = constructor_vec_abs(ctx, v150, v50);
+                            let v270 = constructor_output_reg(ctx, v269);
+                            // Rule at src/isa/s390x/lower.isle line 215.
+                            return Some(v270);
+                        }
+                        if v3 == I128 {
+                            let v273 = constructor_vec_imm(ctx, I128, 0x0);
+                            let v274 = C::put_in_reg(ctx, v48);
+                            let v275 = constructor_vec_sub(ctx, I128, v273, v274);
+                            let v276 = constructor_vec_replicate_lane(ctx, I64X2, v274, 0x0);
+                            let v277 = constructor_vec_cmph(ctx, I64X2, v273, v276);
+                            let v278 = constructor_vec_select(ctx, I128, v275, v274, v277);
+                            let v279 = constructor_output_reg(ctx, v278);
+                            // Rule at src/isa/s390x/lower.isle line 219.
+                            return Some(v279);
+                        }
+                    }
+                }
+                &Opcode::Bnot => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v260 = C::def_inst(ctx, v48);
+                        if let Some(v261) = v260 {
+                            let v262 = &C::inst_data(ctx, v261);
+                            if let &InstructionData::Binary {
+                                opcode: ref v634,
+                                args: ref v635,
+                            } = v262
+                            {
+                                if let &Opcode::Bxor = v634 {
+                                    let v3 = C::value_type(ctx, v2);
+                                    let v36 = C::vr128_ty(ctx, v3);
+                                    if let Some(v37) = v36 {
+                                        let v636 = C::unpack_value_array_2(ctx, v635);
+                                        let v639 = C::put_in_reg(ctx, v636.0);
+                                        let v640 = C::put_in_reg(ctx, v636.1);
+                                        let v643 = constructor_vec_not_xor(ctx, v37, v639, v640);
+                                        let v644 = constructor_output_reg(ctx, v643);
+                                        // Rule at src/isa/s390x/lower.isle line 989.
+                                        return Some(v644);
+                                    }
+                                    let v61 = C::fits_in_64(ctx, v3);
+                                    if let Some(v62) = v61 {
+                                        let v624 = C::mie2_enabled(ctx, v3);
+                                        if let Some(v625) = v624 {
+                                            let v636 = C::unpack_value_array_2(ctx, v635);
+                                            let v639 = C::put_in_reg(ctx, v636.0);
+                                            let v640 = C::put_in_reg(ctx, v636.1);
+                                            let v641 =
+                                                constructor_not_xor_reg(ctx, v62, v639, v640);
+                                            let v642 = constructor_output_reg(ctx, v641);
+                                            // Rule at src/isa/s390x/lower.isle line 985.
+                                            return Some(v642);
+                                        }
+                                    }
+                                }
+                            }
+                        }
+                        let v3 = C::value_type(ctx, v2);
+                        let v61 = C::fits_in_64(ctx, v3);
+                        if let Some(v62) = v61 {
+                            let v624 = C::mie2_enabled(ctx, v3);
+                            if let Some(v625) = v624 {
+                                let v50 = C::put_in_reg(ctx, v48);
+                                let v626 = constructor_not_or_reg(ctx, v62, v50, v50);
+                                let v627 = constructor_output_reg(ctx, v626);
+                                // Rule at src/isa/s390x/lower.isle line 971.
+                                return Some(v627);
+                            }
+                            let v628 = C::mie2_disabled(ctx, v3);
+                            if let Some(v629) = v628 {
+                                let v50 = C::put_in_reg(ctx, v48);
+                                let v630 = constructor_not_reg(ctx, v62, v50);
+                                let v631 = constructor_output_reg(ctx, v630);
+                                // Rule at src/isa/s390x/lower.isle line 976.
+                                return Some(v631);
+                            }
+                        }
+                        let v36 = C::vr128_ty(ctx, v3);
+                        if let Some(v37) = v36 {
+                            let v50 = C::put_in_reg(ctx, v48);
+                            let v632 = constructor_vec_not(ctx, v37, v50);
+                            let v633 = constructor_output_reg(ctx, v632);
+                            // Rule at src/isa/s390x/lower.isle line 980.
+                            return Some(v633);
+                        }
+                    }
+                }
+                &Opcode::Bitrev => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v50 = C::put_in_reg(ctx, v48);
+                        let v3 = C::value_type(ctx, v2);
+                        let v759 = constructor_bitrev_bits(ctx, 0x1, 0xAAAAAAAAAAAAAAAA, v3, v50);
+                        let v760 = constructor_bitrev_bits(ctx, 0x2, 0xCCCCCCCCCCCCCCCC, v3, v759);
+                        let v761 = constructor_bitrev_bits(ctx, 0x4, 0xF0F0F0F0F0F0F0F0, v3, v760);
+                        let v762 = constructor_bitrev_bytes(ctx, v3, v761);
+                        let v763 = constructor_output_reg(ctx, v762);
+                        // Rule at src/isa/s390x/lower.isle line 1146.
+                        return Some(v763);
+                    }
+                }
+                &Opcode::Clz => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v61 = C::fits_in_64(ctx, v3);
+                        if let Some(v62) = v61 {
+                            let v581 = constructor_put_in_reg_zext64(ctx, v48);
+                            let v767 = constructor_clz_reg(ctx, 0x40, v581);
+                            let v768 = constructor_clz_offset(ctx, v62, v767);
+                            let v769 = constructor_output_reg(ctx, v768);
+                            // Rule at src/isa/s390x/lower.isle line 1197.
+                            return Some(v769);
+                        }
+                        if v3 == I128 {
+                            let v50 = C::put_in_reg(ctx, v48);
+                            let v770 = constructor_vec_clz(ctx, I64X2, v50);
+                            let v771 = constructor_vec_imm(ctx, I64X2, 0x0);
+                            let v772 =
+                                constructor_vec_permute_dw_imm(ctx, I64X2, v771, 0x0, v770, 0x0);
+                            let v773 =
+                                constructor_vec_permute_dw_imm(ctx, I64X2, v771, 0x0, v770, 0x1);
+                            let v774 = constructor_vec_add(ctx, I64X2, v772, v773);
+                            let v776 = constructor_vec_imm_splat(ctx, I64X2, 0x40);
+                            let v777 = constructor_vec_cmpeq(ctx, I64X2, v772, v776);
+                            let v778 = constructor_vec_select(ctx, I128, v774, v772, v777);
+                            let v779 = constructor_output_reg(ctx, v778);
+                            // Rule at src/isa/s390x/lower.isle line 1205.
+                            return Some(v779);
+                        }
+                    }
+                }
+                &Opcode::Cls => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v61 = C::fits_in_64(ctx, v3);
+                        if let Some(v62) = v61 {
+                            let v597 = constructor_put_in_reg_sext64(ctx, v48);
+                            let v600 = constructor_ashr_imm(ctx, I64, v597, 0x3F);
+                            let v780 = constructor_xor_reg(ctx, I64, v597, v600);
+                            let v781 = constructor_clz_reg(ctx, 0x40, v780);
+                            let v782 = constructor_cls_offset(ctx, v62, v781);
+                            let v783 = constructor_output_reg(ctx, v782);
+                            // Rule at src/isa/s390x/lower.isle line 1231.
+                            return Some(v783);
+                        }
+                        if v3 == I128 {
+                            let v50 = C::put_in_reg(ctx, v48);
+                            let v785 = constructor_vec_imm_splat(ctx, I8X16, 0xFF);
+                            let v786 = constructor_vec_ashr_by_byte(ctx, v50, v785);
+                            let v787 = constructor_vec_ashr_by_bit(ctx, v786, v785);
+                            let v788 = constructor_vec_xor(ctx, I128, v50, v787);
+                            let v789 = constructor_vec_clz(ctx, I64X2, v788);
+                            let v790 = constructor_vec_imm(ctx, I64X2, 0x0);
+                            let v791 =
+                                constructor_vec_permute_dw_imm(ctx, I64X2, v790, 0x0, v789, 0x0);
+                            let v792 =
+                                constructor_vec_permute_dw_imm(ctx, I64X2, v790, 0x0, v789, 0x1);
+                            let v793 = constructor_vec_add(ctx, I64X2, v791, v792);
+                            let v794 = constructor_vec_imm_splat(ctx, I64X2, 0x40);
+                            let v795 = constructor_vec_cmpeq(ctx, I64X2, v791, v794);
+                            let v796 = constructor_vec_select(ctx, I128, v793, v791, v795);
+                            let v797 = constructor_vec_add(ctx, I128, v796, v785);
+                            let v798 = constructor_output_reg(ctx, v797);
+                            // Rule at src/isa/s390x/lower.isle line 1239.
+                            return Some(v798);
+                        }
+                    }
+                }
+                &Opcode::Ctz => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v575 = C::gpr32_ty(ctx, v3);
+                        if let Some(v576) = v575 {
+                            let v50 = C::put_in_reg(ctx, v48);
+                            let v799 = constructor_ctz_guardbit(ctx, v576);
+                            let v800 = constructor_or_uimm16shifted(ctx, I64, v50, v799);
+                            let v801 = constructor_neg_reg(ctx, I64, v800);
+                            let v802 = constructor_and_reg(ctx, I64, v800, v801);
+                            let v803 = constructor_clz_reg(ctx, 0x40, v802);
+                            let v805 = constructor_imm(ctx, v576, 0x3F);
+                            let v806 = constructor_sub_reg(ctx, v576, v805, v803);
+                            let v807 = constructor_output_reg(ctx, v806);
+                            // Rule at src/isa/s390x/lower.isle line 1268.
+                            return Some(v807);
+                        }
+                        let v579 = C::gpr64_ty(ctx, v3);
+                        if let Some(v580) = v579 {
+                            let v50 = C::put_in_reg(ctx, v48);
+                            let v808 = constructor_neg_reg(ctx, I64, v50);
+                            let v809 = constructor_and_reg(ctx, I64, v50, v808);
+                            let v811 = constructor_clz_reg(ctx, -0x1, v809);
+                            let v812 = constructor_imm(ctx, I64, 0x3F);
+                            let v813 = constructor_sub_reg(ctx, I64, v812, v811);
+                            let v814 = constructor_output_reg(ctx, v813);
+                            // Rule at src/isa/s390x/lower.isle line 1283.
+                            return Some(v814);
+                        }
+                        if v3 == I128 {
+                            let v50 = C::put_in_reg(ctx, v48);
+                            let v815 = constructor_vec_ctz(ctx, I64X2, v50);
+                            let v771 = constructor_vec_imm(ctx, I64X2, 0x0);
+                            let v816 =
+                                constructor_vec_permute_dw_imm(ctx, I64X2, v771, 0x0, v815, 0x0);
+                            let v817 =
+                                constructor_vec_permute_dw_imm(ctx, I64X2, v771, 0x0, v815, 0x1);
+                            let v818 = constructor_vec_add(ctx, I64X2, v816, v817);
+                            let v776 = constructor_vec_imm_splat(ctx, I64X2, 0x40);
+                            let v819 = constructor_vec_cmpeq(ctx, I64X2, v817, v776);
+                            let v820 = constructor_vec_select(ctx, I128, v818, v817, v819);
+                            let v821 = constructor_output_reg(ctx, v820);
+                            // Rule at src/isa/s390x/lower.isle line 1290.
+                            return Some(v821);
+                        }
+                    }
+                }
+                &Opcode::Bswap => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v50 = C::put_in_reg(ctx, v48);
+                        let v3 = C::value_type(ctx, v2);
+                        let v764 = constructor_bitrev_bytes(ctx, v3, v50);
+                        let v765 = constructor_output_reg(ctx, v764);
+                        // Rule at src/isa/s390x/lower.isle line 1181.
+                        return Some(v765);
+                    }
+                }
+                &Opcode::Popcnt => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v149 = C::ty_vec128(ctx, v3);
+                        if let Some(v150) = v149 {
+                            let v50 = C::put_in_reg(ctx, v48);
+                            let v850 = constructor_vec_popcnt(ctx, v150, v50);
+                            let v851 = constructor_output_reg(ctx, v850);
+                            // Rule at src/isa/s390x/lower.isle line 1338.
+                            return Some(v851);
+                        }
+                        match v3 {
+                            I8 => {
+                                let v50 = C::put_in_reg(ctx, v48);
+                                let v822 = constructor_popcnt_byte(ctx, v50);
+                                let v823 = constructor_output_reg(ctx, v822);
+                                // Rule at src/isa/s390x/lower.isle line 1303.
+                                return Some(v823);
+                            }
+                            I16 => {
+                                let v628 = C::mie2_disabled(ctx, v3);
+                                if let Some(v629) = v628 {
+                                    let v50 = C::put_in_reg(ctx, v48);
+                                    let v822 = constructor_popcnt_byte(ctx, v50);
+                                    let v827 = constructor_lshr_imm(ctx, I32, v822, 0x8);
+                                    let v828 = constructor_add_reg(ctx, I32, v822, v827);
+                                    let v830 = C::uimm16shifted(ctx, 0xFF, 0x0);
+                                    let v831 = constructor_and_uimm16shifted(ctx, I32, v828, v830);
+                                    let v832 = constructor_output_reg(ctx, v831);
+                                    // Rule at src/isa/s390x/lower.isle line 1319.
+                                    return Some(v832);
+                                }
+                            }
+                            I32 => {
+                                let v628 = C::mie2_disabled(ctx, v3);
+                                if let Some(v629) = v628 {
+                                    let v50 = C::put_in_reg(ctx, v48);
+                                    let v822 = constructor_popcnt_byte(ctx, v50);
+                                    let v834 = constructor_lshl_imm(ctx, I32, v822, 0x10);
+                                    let v835 = constructor_add_reg(ctx, I32, v822, v834);
+                                    let v836 = constructor_lshl_imm(ctx, I32, v835, 0x8);
+                                    let v837 = constructor_add_reg(ctx, I32, v835, v836);
+                                    let v839 = constructor_lshr_imm(ctx, I32, v837, 0x18);
+                                    let v840 = constructor_output_reg(ctx, v839);
+                                    // Rule at src/isa/s390x/lower.isle line 1324.
+                                    return Some(v840);
+                                }
+                            }
+                            I64 => {
+                                let v628 = C::mie2_disabled(ctx, v3);
+                                if let Some(v629) = v628 {
+                                    let v50 = C::put_in_reg(ctx, v48);
+                                    let v822 = constructor_popcnt_byte(ctx, v50);
+                                    let v841 = constructor_lshl_imm(ctx, I64, v822, 0x20);
+                                    let v842 = constructor_add_reg(ctx, I64, v822, v841);
+                                    let v843 = constructor_lshl_imm(ctx, I64, v842, 0x10);
+                                    let v844 = constructor_add_reg(ctx, I64, v842, v843);
+                                    let v845 = constructor_lshl_imm(ctx, I64, v844, 0x8);
+                                    let v846 = constructor_add_reg(ctx, I64, v844, v845);
+                                    let v848 = constructor_lshr_imm(ctx, I64, v846, 0x38);
+                                    let v849 = constructor_output_reg(ctx, v848);
+                                    // Rule at src/isa/s390x/lower.isle line 1330.
+                                    return Some(v849);
+                                }
+                            }
+                            I128 => {
+                                let v50 = C::put_in_reg(ctx, v48);
+                                let v852 = constructor_vec_popcnt(ctx, I64X2, v50);
+                                let v771 = constructor_vec_imm(ctx, I64X2, 0x0);
+                                let v853 = constructor_vec_permute_dw_imm(
+                                    ctx, I64X2, v771, 0x0, v852, 0x0,
+                                );
+                                let v854 = constructor_vec_permute_dw_imm(
+                                    ctx, I64X2, v771, 0x0, v852, 0x1,
+                                );
+                                let v855 = constructor_vec_add(ctx, I64X2, v853, v854);
+                                let v856 = constructor_output_reg(ctx, v855);
+                                // Rule at src/isa/s390x/lower.isle line 1342.
+                                return Some(v856);
+                            }
+                            _ => {}
+                        }
+                        let v61 = C::fits_in_64(ctx, v3);
+                        if let Some(v62) = v61 {
+                            let v624 = C::mie2_enabled(ctx, v3);
+                            if let Some(v625) = v624 {
+                                let v581 = constructor_put_in_reg_zext64(ctx, v48);
+                                let v824 = constructor_popcnt_reg(ctx, v581);
+                                let v825 = constructor_output_reg(ctx, v824);
+                                // Rule at src/isa/s390x/lower.isle line 1308.
+                                return Some(v825);
+                            }
+                        }
+                    }
+                }
+                &Opcode::Sqrt => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v50 = C::put_in_reg(ctx, v48);
+                        let v3 = C::value_type(ctx, v2);
+                        let v893 = constructor_sqrt_reg(ctx, v3, v50);
+                        let v894 = constructor_output_reg(ctx, v893);
+                        // Rule at src/isa/s390x/lower.isle line 1429.
+                        return Some(v894);
+                    }
+                }
+                &Opcode::Fneg => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v50 = C::put_in_reg(ctx, v48);
+                        let v3 = C::value_type(ctx, v2);
+                        let v895 = constructor_fneg_reg(ctx, v3, v50);
+                        let v896 = constructor_output_reg(ctx, v895);
+                        // Rule at src/isa/s390x/lower.isle line 1436.
+                        return Some(v896);
+                    }
+                }
+                &Opcode::Fabs => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v50 = C::put_in_reg(ctx, v48);
+                        let v3 = C::value_type(ctx, v2);
+                        let v897 = constructor_fabs_reg(ctx, v3, v50);
+                        let v898 = constructor_output_reg(ctx, v897);
+                        // Rule at src/isa/s390x/lower.isle line 1443.
+                        return Some(v898);
+                    }
+                }
+                &Opcode::Ceil => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v50 = C::put_in_reg(ctx, v48);
+                        let v3 = C::value_type(ctx, v2);
+                        let v899 = constructor_ceil_reg(ctx, v3, v50);
+                        let v900 = constructor_output_reg(ctx, v899);
+                        // Rule at src/isa/s390x/lower.isle line 1450.
+                        return Some(v900);
+                    }
+                }
+                &Opcode::Floor => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v50 = C::put_in_reg(ctx, v48);
+                        let v3 = C::value_type(ctx, v2);
+                        let v901 = constructor_floor_reg(ctx, v3, v50);
+                        let v902 = constructor_output_reg(ctx, v901);
+                        // Rule at src/isa/s390x/lower.isle line 1457.
+                        return Some(v902);
+                    }
+                }
+                &Opcode::Trunc => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v50 = C::put_in_reg(ctx, v48);
+                        let v3 = C::value_type(ctx, v2);
+                        let v903 = constructor_trunc_reg(ctx, v3, v50);
+                        let v904 = constructor_output_reg(ctx, v903);
+                        // Rule at src/isa/s390x/lower.isle line 1464.
+                        return Some(v904);
+                    }
+                }
+                &Opcode::Nearest => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v50 = C::put_in_reg(ctx, v48);
+                        let v3 = C::value_type(ctx, v2);
+                        let v905 = constructor_nearest_reg(ctx, v3, v50);
+                        let v906 = constructor_output_reg(ctx, v905);
+                        // Rule at src/isa/s390x/lower.isle line 1471.
+                        return Some(v906);
+                    }
+                }
+                &Opcode::IsNull => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        if v3 == I8 {
+                            let v49 = C::value_type(ctx, v48);
+                            if v49 == R64 {
+                                let v50 = C::put_in_reg(ctx, v48);
+                                let v1878 = &constructor_icmps_simm16(ctx, I64, v50, 0x0);
+                                let v1880 = &C::intcc_as_cond(ctx, &IntCC::Equal);
+                                let v1881 = &constructor_bool(ctx, v1878, v1880);
+                                let v1882 = constructor_lower_bool(ctx, I8, v1881);
+                                let v1883 = constructor_output_reg(ctx, v1882);
+                                // Rule at src/isa/s390x/lower.isle line 3687.
+                                return Some(v1883);
+                            }
+                        }
+                    }
+                }
+                &Opcode::IsInvalid => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        if v3 == I8 {
+                            let v49 = C::value_type(ctx, v48);
+                            if v49 == R64 {
+                                let v50 = C::put_in_reg(ctx, v48);
+                                let v1884 = &constructor_icmps_simm16(ctx, I64, v50, -0x1);
+                                let v1880 = &C::intcc_as_cond(ctx, &IntCC::Equal);
+                                let v1885 = &constructor_bool(ctx, v1884, v1880);
+                                let v1886 = constructor_lower_bool(ctx, I8, v1885);
+                                let v1887 = constructor_output_reg(ctx, v1886);
+                                // Rule at src/isa/s390x/lower.isle line 3693.
+                                return Some(v1887);
+                            }
+                        }
+                    }
+                }
+                &Opcode::ScalarToVector => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v1201 = C::sinkable_inst(ctx, v48);
+                        if let Some(v1202) = v1201 {
+                            let v1203 = &C::inst_data(ctx, v1202);
+                            if let &InstructionData::Load {
+                                opcode: ref v1204,
+                                arg: v1205,
+                                flags: v1206,
+                                offset: v1207,
+                            } = v1203
+                            {
+                                if let &Opcode::Load = v1204 {
+                                    let v1213 = C::littleendian(ctx, v1206);
+                                    if let Some(v1214) = v1213 {
+                                        let v3 = C::value_type(ctx, v2);
+                                        let v1217 = constructor_vec_imm(ctx, v3, 0x0);
+                                        let v1231 = &constructor_sink_load(ctx, v1202);
+                                        let v1218 = C::be_lane_idx(ctx, v3, 0x0);
+                                        let v1234 = constructor_vec_load_lane_little(
+                                            ctx, v3, v1217, v1231, v1218,
+                                        );
+                                        let v1235 = constructor_output_reg(ctx, v1234);
+                                        // Rule at src/isa/s390x/lower.isle line 2024.
+                                        return Some(v1235);
+                                    }
+                                    let v1208 = C::bigendian(ctx, v1206);
+                                    if let Some(v1209) = v1208 {
+                                        let v3 = C::value_type(ctx, v2);
+                                        let v1217 = constructor_vec_imm(ctx, v3, 0x0);
+                                        let v1231 = &constructor_sink_load(ctx, v1202);
+                                        let v1218 = C::be_lane_idx(ctx, v3, 0x0);
+                                        let v1232 =
+                                            constructor_vec_load_lane(ctx, v3, v1217, v1231, v1218);
+                                        let v1233 = constructor_output_reg(ctx, v1232);
+                                        // Rule at src/isa/s390x/lower.isle line 2020.
+                                        return Some(v1233);
+                                    }
+                                }
+                            }
+                        }
+                        let v1197 = C::i16_from_value(ctx, v48);
+                        if let Some(v1198) = v1197 {
+                            let v3 = C::value_type(ctx, v2);
+                            let v1217 = constructor_vec_imm(ctx, v3, 0x0);
+                            let v1228 = C::be_lane_idx(ctx, v3, 0x0);
+                            let v1229 =
+                                constructor_vec_insert_lane_imm(ctx, v3, v1217, v1198, v1228);
+                            let v1230 = constructor_output_reg(ctx, v1229);
+                            // Rule at src/isa/s390x/lower.isle line 2016.
+                            return Some(v1230);
+                        }
+                        let v260 = C::def_inst(ctx, v48);
+                        if let Some(v261) = v260 {
+                            let v262 = &C::inst_data(ctx, v261);
+                            if let &InstructionData::BinaryImm8 {
+                                opcode: ref v1189,
+                                arg: v1190,
+                                imm: v1191,
+                            } = v262
+                            {
+                                if let &Opcode::Extractlane = v1189 {
+                                    let v3 = C::value_type(ctx, v2);
+                                    let v1221 = C::be_lane_idx(ctx, v3, 0x0);
+                                    let v1224 = C::put_in_reg(ctx, v1190);
+                                    let v1192 = C::u8_from_uimm8(ctx, v1191);
+                                    let v1225 = C::be_lane_idx(ctx, v3, v1192);
+                                    let v1226 = constructor_vec_move_lane_and_zero(
+                                        ctx, v3, v1221, v1224, v1225,
+                                    );
+                                    let v1227 = constructor_output_reg(ctx, v1226);
+                                    // Rule at src/isa/s390x/lower.isle line 2011.
+                                    return Some(v1227);
+                                }
+                            }
+                        }
+                        let v49 = C::value_type(ctx, v48);
+                        let v1180 = C::ty_int_ref_scalar_64(ctx, v49);
+                        if let Some(v1181) = v1180 {
+                            let v3 = C::value_type(ctx, v2);
+                            let v1217 = constructor_vec_imm(ctx, v3, 0x0);
+                            let v274 = C::put_in_reg(ctx, v48);
+                            let v1218 = C::be_lane_idx(ctx, v3, 0x0);
+                            let v56 = C::zero_reg(ctx);
+                            let v1219 =
+                                constructor_vec_insert_lane(ctx, v3, v1217, v274, v1218, v56);
+                            let v1220 = constructor_output_reg(ctx, v1219);
+                            // Rule at src/isa/s390x/lower.isle line 2000.
+                            return Some(v1220);
+                        }
+                        let v1185 = C::ty_scalar_float(ctx, v49);
+                        if let Some(v1186) = v1185 {
+                            let v3 = C::value_type(ctx, v2);
+                            let v1221 = C::be_lane_idx(ctx, v3, 0x0);
+                            let v274 = C::put_in_reg(ctx, v48);
+                            let v1222 =
+                                constructor_vec_move_lane_and_zero(ctx, v3, v1221, v274, 0x0);
+                            let v1223 = constructor_output_reg(ctx, v1222);
+                            // Rule at src/isa/s390x/lower.isle line 2006.
+                            return Some(v1223);
+                        }
+                    }
+                }
+                &Opcode::Bmask => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v751 = &constructor_value_nonzero(ctx, v48);
+                        let v3 = C::value_type(ctx, v2);
+                        let v752 = constructor_lower_bool_to_mask(ctx, v3, v751);
+                        let v753 = constructor_output_reg(ctx, v752);
+                        // Rule at src/isa/s390x/lower.isle line 1140.
+                        return Some(v753);
+                    }
+                }
+                &Opcode::Ireduce => {
+                    let v49 = C::value_type(ctx, v48);
+                    let v568 = C::fits_in_64(ctx, v49);
+                    if let Some(v569) = v568 {
+                        let v570 = constructor_output_value(ctx, v48);
+                        // Rule at src/isa/s390x/lower.isle line 880.
+                        return Some(v570);
+                    }
+                    let v571 = C::vr128_ty(ctx, v49);
+                    if let Some(v572) = v571 {
+                        let v50 = C::put_in_reg(ctx, v48);
+                        let v53 = C::zero_reg(ctx);
+                        let v573 = constructor_vec_extract_lane(ctx, I64X2, v50, 0x1, v53);
+                        let v574 = constructor_output_reg(ctx, v573);
+                        // Rule at src/isa/s390x/lower.isle line 884.
+                        return Some(v574);
+                    }
+                }
+                &Opcode::SwidenLow => {
+                    let v49 = C::value_type(ctx, v48);
+                    let v614 = C::ty_vec128(ctx, v49);
+                    if let Some(v615) = v614 {
+                        let v50 = C::put_in_reg(ctx, v48);
+                        let v616 = constructor_vec_unpacks_low_lane_order(ctx, v615, v50);
+                        let v617 = constructor_output_reg(ctx, v616);
+                        // Rule at src/isa/s390x/lower.isle line 946.
+                        return Some(v617);
+                    }
+                }
+                &Opcode::SwidenHigh => {
+                    let v49 = C::value_type(ctx, v48);
+                    let v614 = C::ty_vec128(ctx, v49);
+                    if let Some(v615) = v614 {
+                        let v50 = C::put_in_reg(ctx, v48);
+                        let v618 = constructor_vec_unpacks_high_lane_order(ctx, v615, v50);
+                        let v619 = constructor_output_reg(ctx, v618);
+                        // Rule at src/isa/s390x/lower.isle line 952.
+                        return Some(v619);
+                    }
+                }
+                &Opcode::UwidenLow => {
+                    let v49 = C::value_type(ctx, v48);
+                    let v614 = C::ty_vec128(ctx, v49);
+                    if let Some(v615) = v614 {
+                        let v50 = C::put_in_reg(ctx, v48);
+                        let v620 = constructor_vec_unpacku_low_lane_order(ctx, v615, v50);
+                        let v621 = constructor_output_reg(ctx, v620);
+                        // Rule at src/isa/s390x/lower.isle line 958.
+                        return Some(v621);
+                    }
+                }
+                &Opcode::UwidenHigh => {
+                    let v49 = C::value_type(ctx, v48);
+                    let v614 = C::ty_vec128(ctx, v49);
+                    if let Some(v615) = v614 {
+                        let v50 = C::put_in_reg(ctx, v48);
+                        let v622 = constructor_vec_unpacku_high_lane_order(ctx, v615, v50);
+                        let v623 = constructor_output_reg(ctx, v622);
+                        // Rule at src/isa/s390x/lower.isle line 964.
+                        return Some(v623);
+                    }
+                }
+                &Opcode::Uextend => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v579 = C::gpr64_ty(ctx, v3);
+                        if let Some(v580) = v579 {
+                            let v581 = constructor_put_in_reg_zext64(ctx, v48);
+                            let v582 = constructor_output_reg(ctx, v581);
+                            // Rule at src/isa/s390x/lower.isle line 895.
+                            return Some(v582);
+                        }
+                        let v575 = C::gpr32_ty(ctx, v3);
+                        if let Some(v576) = v575 {
+                            let v577 = constructor_put_in_reg_zext32(ctx, v48);
+                            let v578 = constructor_output_reg(ctx, v577);
+                            // Rule at src/isa/s390x/lower.isle line 891.
+                            return Some(v578);
+                        }
+                        if v3 == I128 {
+                            let v49 = C::value_type(ctx, v48);
+                            match v49 {
+                                I8 => {
+                                    let v273 = constructor_vec_imm(ctx, I128, 0x0);
+                                    let v274 = C::put_in_reg(ctx, v48);
+                                    let v584 = C::zero_reg(ctx);
+                                    let v585 = constructor_vec_insert_lane(
+                                        ctx, I8X16, v273, v274, 0xF, v584,
+                                    );
+                                    let v586 = constructor_output_reg(ctx, v585);
+                                    // Rule at src/isa/s390x/lower.isle line 899.
+                                    return Some(v586);
+                                }
+                                I16 => {
+                                    let v273 = constructor_vec_imm(ctx, I128, 0x0);
+                                    let v274 = C::put_in_reg(ctx, v48);
+                                    let v584 = C::zero_reg(ctx);
+                                    let v588 = constructor_vec_insert_lane(
+                                        ctx, I16X8, v273, v274, 0x7, v584,
+                                    );
+                                    let v589 = constructor_output_reg(ctx, v588);
+                                    // Rule at src/isa/s390x/lower.isle line 901.
+                                    return Some(v589);
+                                }
+                                I32 => {
+                                    let v273 = constructor_vec_imm(ctx, I128, 0x0);
+                                    let v274 = C::put_in_reg(ctx, v48);
+                                    let v584 = C::zero_reg(ctx);
+                                    let v591 = constructor_vec_insert_lane(
+                                        ctx, I32X4, v273, v274, 0x3, v584,
+                                    );
+                                    let v592 = constructor_output_reg(ctx, v591);
+                                    // Rule at src/isa/s390x/lower.isle line 903.
+                                    return Some(v592);
+                                }
+                                I64 => {
+                                    let v273 = constructor_vec_imm(ctx, I128, 0x0);
+                                    let v274 = C::put_in_reg(ctx, v48);
+                                    let v584 = C::zero_reg(ctx);
+                                    let v593 = constructor_vec_insert_lane(
+                                        ctx, I64X2, v273, v274, 0x1, v584,
+                                    );
+                                    let v594 = constructor_output_reg(ctx, v593);
+                                    // Rule at src/isa/s390x/lower.isle line 905.
+                                    return Some(v594);
+                                }
+                                _ => {}
+                            }
+                        }
+                    }
+                }
+                &Opcode::Sextend => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v579 = C::gpr64_ty(ctx, v3);
+                        if let Some(v580) = v579 {
+                            let v597 = constructor_put_in_reg_sext64(ctx, v48);
+                            let v598 = constructor_output_reg(ctx, v597);
+                            // Rule at src/isa/s390x/lower.isle line 916.
+                            return Some(v598);
+                        }
+                        let v575 = C::gpr32_ty(ctx, v3);
+                        if let Some(v576) = v575 {
+                            let v595 = constructor_put_in_reg_sext32(ctx, v48);
+                            let v596 = constructor_output_reg(ctx, v595);
+                            // Rule at src/isa/s390x/lower.isle line 912.
+                            return Some(v596);
+                        }
+                        if v3 == I128 {
+                            let v597 = constructor_put_in_reg_sext64(ctx, v48);
+                            let v600 = constructor_ashr_imm(ctx, I64, v597, 0x3F);
+                            let v601 = constructor_mov_to_vec128(ctx, I128, v600, v597);
+                            let v602 = constructor_output_reg(ctx, v601);
+                            // Rule at src/isa/s390x/lower.isle line 920.
+                            return Some(v602);
+                        }
+                    }
+                }
+                &Opcode::Fpromote => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v61 = C::fits_in_64(ctx, v3);
+                        if let Some(v62) = v61 {
+                            let v50 = C::put_in_reg(ctx, v48);
+                            let v49 = C::value_type(ctx, v48);
+                            let v907 = constructor_fpromote_reg(ctx, v62, v49, v50);
+                            let v908 = constructor_output_reg(ctx, v907);
+                            // Rule at src/isa/s390x/lower.isle line 1478.
+                            return Some(v908);
+                        }
+                    }
+                }
+                &Opcode::Fdemote => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v61 = C::fits_in_64(ctx, v3);
+                        if let Some(v62) = v61 {
+                            let v50 = C::put_in_reg(ctx, v48);
+                            let v49 = C::value_type(ctx, v48);
+                            let v913 =
+                                constructor_fdemote_reg(ctx, v62, v49, &FpuRoundMode::Current, v50);
+                            let v914 = constructor_output_reg(ctx, v913);
+                            // Rule at src/isa/s390x/lower.isle line 1492.
+                            return Some(v914);
+                        }
+                    }
+                }
+                &Opcode::Fvdemote => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        if v3 == F32X4 {
+                            let v49 = C::value_type(ctx, v48);
+                            if v49 == F64X2 {
+                                let v50 = C::put_in_reg(ctx, v48);
+                                let v915 = constructor_fdemote_reg(
+                                    ctx,
+                                    F32X4,
+                                    F64X2,
+                                    &FpuRoundMode::Current,
+                                    v50,
+                                );
+                                let v916 = constructor_vec_lshr_imm(ctx, I64X2, v915, 0x20);
+                                let v917 = constructor_vec_imm(ctx, I64X2, 0x0);
+                                let v918 = constructor_vec_pack_lane_order(ctx, I64X2, v916, v917);
+                                let v919 = constructor_output_reg(ctx, v918);
+                                // Rule at src/isa/s390x/lower.isle line 1499.
+                                return Some(v919);
+                            }
+                        }
+                    }
+                }
+                &Opcode::FvpromoteLow => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        if v3 == F64X2 {
+                            let v49 = C::value_type(ctx, v48);
+                            if v49 == F32X4 {
+                                let v50 = C::put_in_reg(ctx, v48);
+                                let v274 = C::put_in_reg(ctx, v48);
+                                let v909 =
+                                    constructor_vec_merge_low_lane_order(ctx, I32X4, v50, v274);
+                                let v910 = constructor_fpromote_reg(ctx, F64X2, F32X4, v909);
+                                let v911 = constructor_output_reg(ctx, v910);
+                                // Rule at src/isa/s390x/lower.isle line 1485.
+                                return Some(v911);
+                            }
+                        }
+                    }
+                }
+                &Opcode::FcvtToUint => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v61 = C::fits_in_64(ctx, v3);
+                        if let Some(v62) = v61 {
+                            let v50 = C::put_in_reg(ctx, v48);
+                            let v49 = C::value_type(ctx, v48);
+                            let v980 = &constructor_fcmp_reg(ctx, v49, v50, v50);
+                            let v982 = &C::floatcc_as_cond(ctx, &FloatCC::Unordered);
+                            let v983 = &C::trap_code_bad_conversion_to_integer(ctx);
+                            let v984 = constructor_trap_if(ctx, v980, v982, v983);
+                            let v985 = constructor_fcvt_to_uint_ub(ctx, v49, v62);
+                            let v986 = &constructor_fcmp_reg(ctx, v49, v50, v985);
+                            let v988 = &C::floatcc_as_cond(ctx, &FloatCC::GreaterThanOrEqual);
+                            let v989 = &C::trap_code_integer_overflow(ctx);
+                            let v990 = constructor_trap_if(ctx, v986, v988, v989);
+                            let v991 = constructor_fcvt_to_uint_lb(ctx, v49);
+                            let v992 = &constructor_fcmp_reg(ctx, v49, v50, v991);
+                            let v994 = &C::floatcc_as_cond(ctx, &FloatCC::LessThanOrEqual);
+                            let v995 = constructor_trap_if(ctx, v992, v994, v989);
+                            let v996 = constructor_fcvt_flt_ty(ctx, v62, v49);
+                            let v997 = constructor_fpromote_reg(ctx, v996, v49, v50);
+                            let v999 = constructor_fcvt_to_uint_reg(
+                                ctx,
+                                v996,
+                                &FpuRoundMode::ToZero,
+                                v997,
+                            );
+                            let v1000 = constructor_output_reg(ctx, v999);
+                            // Rule at src/isa/s390x/lower.isle line 1591.
+                            return Some(v1000);
+                        }
+                    }
+                }
+                &Opcode::FcvtToSint => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v61 = C::fits_in_64(ctx, v3);
+                        if let Some(v62) = v61 {
+                            let v50 = C::put_in_reg(ctx, v48);
+                            let v49 = C::value_type(ctx, v48);
+                            let v980 = &constructor_fcmp_reg(ctx, v49, v50, v50);
+                            let v982 = &C::floatcc_as_cond(ctx, &FloatCC::Unordered);
+                            let v983 = &C::trap_code_bad_conversion_to_integer(ctx);
+                            let v984 = constructor_trap_if(ctx, v980, v982, v983);
+                            let v1001 = constructor_fcvt_to_sint_ub(ctx, v49, v62);
+                            let v1002 = &constructor_fcmp_reg(ctx, v49, v50, v1001);
+                            let v988 = &C::floatcc_as_cond(ctx, &FloatCC::GreaterThanOrEqual);
+                            let v989 = &C::trap_code_integer_overflow(ctx);
+                            let v1003 = constructor_trap_if(ctx, v1002, v988, v989);
+                            let v1004 = constructor_fcvt_to_sint_lb(ctx, v49, v62);
+                            let v1005 = &constructor_fcmp_reg(ctx, v49, v50, v1004);
+                            let v994 = &C::floatcc_as_cond(ctx, &FloatCC::LessThanOrEqual);
+                            let v1006 = constructor_trap_if(ctx, v1005, v994, v989);
+                            let v996 = constructor_fcvt_flt_ty(ctx, v62, v49);
+                            let v997 = constructor_fpromote_reg(ctx, v996, v49, v50);
+                            let v1007 = constructor_fcvt_to_sint_reg(
+                                ctx,
+                                v996,
+                                &FpuRoundMode::ToZero,
+                                v997,
+                            );
+                            let v1008 = constructor_output_reg(ctx, v1007);
+                            // Rule at src/isa/s390x/lower.isle line 1615.
+                            return Some(v1008);
+                        }
+                    }
+                }
+                &Opcode::FcvtToUintSat => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            I32X4 => {
+                                let v49 = C::value_type(ctx, v48);
+                                if v49 == F32X4 {
+                                    let v933 = C::vxrs_ext2_enabled(ctx, v3);
+                                    if let Some(v934) = v933 {
+                                        let v50 = C::put_in_reg(ctx, v48);
+                                        let v1015 = constructor_fcvt_to_uint_reg(
+                                            ctx,
+                                            F32X4,
+                                            &FpuRoundMode::ToZero,
+                                            v50,
+                                        );
+                                        let v1016 = constructor_output_reg(ctx, v1015);
+                                        // Rule at src/isa/s390x/lower.isle line 1651.
+                                        return Some(v1016);
+                                    }
+                                    let v937 = C::vxrs_ext2_disabled(ctx, v3);
+                                    if let Some(v938) = v937 {
+                                        let v50 = C::put_in_reg(ctx, v48);
+                                        let v274 = C::put_in_reg(ctx, v48);
+                                        let v1017 =
+                                            constructor_vec_merge_high(ctx, I32X4, v50, v274);
+                                        let v1018 =
+                                            constructor_fpromote_reg(ctx, F64X2, F32X4, v1017);
+                                        let v1019 = constructor_fcvt_to_uint_reg(
+                                            ctx,
+                                            F64X2,
+                                            &FpuRoundMode::ToZero,
+                                            v1018,
+                                        );
+                                        let v1020 = C::put_in_reg(ctx, v48);
+                                        let v1021 = C::put_in_reg(ctx, v48);
+                                        let v1022 =
+                                            constructor_vec_merge_low(ctx, I32X4, v1020, v1021);
+                                        let v1023 =
+                                            constructor_fpromote_reg(ctx, F64X2, F32X4, v1022);
+                                        let v1024 = constructor_fcvt_to_uint_reg(
+                                            ctx,
+                                            F64X2,
+                                            &FpuRoundMode::ToZero,
+                                            v1023,
+                                        );
+                                        let v1025 =
+                                            constructor_vec_pack_usat(ctx, I64X2, v1019, v1024);
+                                        let v1026 = constructor_output_reg(ctx, v1025);
+                                        // Rule at src/isa/s390x/lower.isle line 1656.
+                                        return Some(v1026);
+                                    }
+                                }
+                            }
+                            I64X2 => {
+                                let v49 = C::value_type(ctx, v48);
+                                if v49 == F64X2 {
+                                    let v50 = C::put_in_reg(ctx, v48);
+                                    let v1027 = constructor_fcvt_to_uint_reg(
+                                        ctx,
+                                        F64X2,
+                                        &FpuRoundMode::ToZero,
+                                        v50,
+                                    );
+                                    let v1028 = constructor_output_reg(ctx, v1027);
+                                    // Rule at src/isa/s390x/lower.isle line 1665.
+                                    return Some(v1028);
+                                }
+                            }
+                            _ => {}
+                        }
+                        let v61 = C::fits_in_64(ctx, v3);
+                        if let Some(v62) = v61 {
+                            let v50 = C::put_in_reg(ctx, v48);
+                            let v49 = C::value_type(ctx, v48);
+                            let v1009 = constructor_fcvt_flt_ty(ctx, v62, v49);
+                            let v1010 = constructor_fcvt_int_ty(ctx, v62, v49);
+                            let v1011 = constructor_fpromote_reg(ctx, v1009, v49, v50);
+                            let v1012 = constructor_fcvt_to_uint_reg(
+                                ctx,
+                                v1009,
+                                &FpuRoundMode::ToZero,
+                                v1011,
+                            );
+                            let v1013 = constructor_uint_sat_reg(ctx, v62, v1010, v1012);
+                            let v1014 = constructor_output_reg(ctx, v1013);
+                            // Rule at src/isa/s390x/lower.isle line 1639.
+                            return Some(v1014);
+                        }
+                    }
+                }
+                &Opcode::FcvtToSintSat => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            I32X4 => {
+                                let v49 = C::value_type(ctx, v48);
+                                if v49 == F32X4 {
+                                    let v933 = C::vxrs_ext2_enabled(ctx, v3);
+                                    if let Some(v934) = v933 {
+                                        let v50 = C::put_in_reg(ctx, v48);
+                                        let v1037 = constructor_fcvt_to_sint_reg(
+                                            ctx,
+                                            F32X4,
+                                            &FpuRoundMode::ToZero,
+                                            v50,
+                                        );
+                                        let v1038 = constructor_vec_imm(ctx, I32X4, 0x0);
+                                        let v1039 = C::put_in_reg(ctx, v48);
+                                        let v942 = C::put_in_reg(ctx, v48);
+                                        let v1040 = constructor_vec_fcmpeq(ctx, F32X4, v1039, v942);
+                                        let v1041 =
+                                            constructor_vec_select(ctx, I32X4, v1037, v1038, v1040);
+                                        let v1042 = constructor_output_reg(ctx, v1041);
+                                        // Rule at src/isa/s390x/lower.isle line 1691.
+                                        return Some(v1042);
+                                    }
+                                    let v937 = C::vxrs_ext2_disabled(ctx, v3);
+                                    if let Some(v938) = v937 {
+                                        let v50 = C::put_in_reg(ctx, v48);
+                                        let v274 = C::put_in_reg(ctx, v48);
+                                        let v1017 =
+                                            constructor_vec_merge_high(ctx, I32X4, v50, v274);
+                                        let v1018 =
+                                            constructor_fpromote_reg(ctx, F64X2, F32X4, v1017);
+                                        let v1043 = constructor_fcvt_to_sint_reg(
+                                            ctx,
+                                            F64X2,
+                                            &FpuRoundMode::ToZero,
+                                            v1018,
+                                        );
+                                        let v1020 = C::put_in_reg(ctx, v48);
+                                        let v1021 = C::put_in_reg(ctx, v48);
+                                        let v1022 =
+                                            constructor_vec_merge_low(ctx, I32X4, v1020, v1021);
+                                        let v1023 =
+                                            constructor_fpromote_reg(ctx, F64X2, F32X4, v1022);
+                                        let v1044 = constructor_fcvt_to_sint_reg(
+                                            ctx,
+                                            F64X2,
+                                            &FpuRoundMode::ToZero,
+                                            v1023,
+                                        );
+                                        let v1045 =
+                                            constructor_vec_pack_ssat(ctx, I64X2, v1043, v1044);
+                                        let v1046 = constructor_vec_imm(ctx, I32X4, 0x0);
+                                        let v1047 = C::put_in_reg(ctx, v48);
+                                        let v1048 = C::put_in_reg(ctx, v48);
+                                        let v1049 =
+                                            constructor_vec_fcmpeq(ctx, F32X4, v1047, v1048);
+                                        let v1050 =
+                                            constructor_vec_select(ctx, I32X4, v1045, v1046, v1049);
+                                        let v1051 = constructor_output_reg(ctx, v1050);
+                                        // Rule at src/isa/s390x/lower.isle line 1699.
+                                        return Some(v1051);
+                                    }
+                                }
+                            }
+                            I64X2 => {
+                                let v49 = C::value_type(ctx, v48);
+                                if v49 == F64X2 {
+                                    let v50 = C::put_in_reg(ctx, v48);
+                                    let v1052 = constructor_fcvt_to_sint_reg(
+                                        ctx,
+                                        F64X2,
+                                        &FpuRoundMode::ToZero,
+                                        v50,
+                                    );
+                                    let v771 = constructor_vec_imm(ctx, I64X2, 0x0);
+                                    let v1039 = C::put_in_reg(ctx, v48);
+                                    let v942 = C::put_in_reg(ctx, v48);
+                                    let v1053 = constructor_vec_fcmpeq(ctx, F64X2, v1039, v942);
+                                    let v1054 =
+                                        constructor_vec_select(ctx, I64X2, v1052, v771, v1053);
+                                    let v1055 = constructor_output_reg(ctx, v1054);
+                                    // Rule at src/isa/s390x/lower.isle line 1711.
+                                    return Some(v1055);
+                                }
+                            }
+                            _ => {}
+                        }
+                        let v61 = C::fits_in_64(ctx, v3);
+                        if let Some(v62) = v61 {
+                            let v50 = C::put_in_reg(ctx, v48);
+                            let v49 = C::value_type(ctx, v48);
+                            let v1009 = constructor_fcvt_flt_ty(ctx, v62, v49);
+                            let v1010 = constructor_fcvt_int_ty(ctx, v62, v49);
+                            let v1011 = constructor_fpromote_reg(ctx, v1009, v49, v50);
+                            let v1029 = constructor_fcvt_to_sint_reg(
+                                ctx,
+                                v1009,
+                                &FpuRoundMode::ToZero,
+                                v1011,
+                            );
+                            let v1030 = &constructor_fcmp_reg(ctx, v49, v50, v50);
+                            let v1031 = &C::floatcc_as_cond(ctx, &FloatCC::Unordered);
+                            let v1033 = &constructor_cmov_imm(ctx, v1010, v1031, 0x0, v1029);
+                            let v1034 = constructor_with_flags_reg(ctx, v1030, v1033);
+                            let v1035 = constructor_sint_sat_reg(ctx, v62, v1010, v1034);
+                            let v1036 = constructor_output_reg(ctx, v1035);
+                            // Rule at src/isa/s390x/lower.isle line 1672.
+                            return Some(v1036);
+                        }
+                    }
+                }
+                &Opcode::FcvtFromUint => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            F32 => {
+                                let v49 = C::value_type(ctx, v48);
+                                let v920 = C::vxrs_ext2_enabled(ctx, v49);
+                                if let Some(v921) = v920 {
+                                    let v922 = C::fits_in_32(ctx, v49);
+                                    if let Some(v923) = v922 {
+                                        let v577 = constructor_put_in_reg_zext32(ctx, v48);
+                                        let v925 = constructor_fcvt_from_uint_reg(
+                                            ctx,
+                                            F32,
+                                            &FpuRoundMode::ToNearestTiesToEven,
+                                            v577,
+                                        );
+                                        let v926 = constructor_output_reg(ctx, v925);
+                                        // Rule at src/isa/s390x/lower.isle line 1508.
+                                        return Some(v926);
+                                    }
+                                }
+                                let v568 = C::fits_in_64(ctx, v49);
+                                if let Some(v569) = v568 {
+                                    let v581 = constructor_put_in_reg_zext64(ctx, v48);
+                                    let v928 = constructor_fcvt_from_uint_reg(
+                                        ctx,
+                                        F64,
+                                        &FpuRoundMode::ShorterPrecision,
+                                        v581,
+                                    );
+                                    let v929 = constructor_fdemote_reg(
+                                        ctx,
+                                        F32,
+                                        F64,
+                                        &FpuRoundMode::ToNearestTiesToEven,
+                                        v928,
+                                    );
+                                    let v930 = constructor_output_reg(ctx, v929);
+                                    // Rule at src/isa/s390x/lower.isle line 1514.
+                                    return Some(v930);
+                                }
+                            }
+                            F64 => {
+                                let v49 = C::value_type(ctx, v48);
+                                let v568 = C::fits_in_64(ctx, v49);
+                                if let Some(v569) = v568 {
+                                    let v581 = constructor_put_in_reg_zext64(ctx, v48);
+                                    let v931 = constructor_fcvt_from_uint_reg(
+                                        ctx,
+                                        F64,
+                                        &FpuRoundMode::ToNearestTiesToEven,
+                                        v581,
+                                    );
+                                    let v932 = constructor_output_reg(ctx, v931);
+                                    // Rule at src/isa/s390x/lower.isle line 1520.
+                                    return Some(v932);
+                                }
+                            }
+                            F32X4 => {
+                                let v49 = C::value_type(ctx, v48);
+                                if v49 == I32X4 {
+                                    let v933 = C::vxrs_ext2_enabled(ctx, v3);
+                                    if let Some(v934) = v933 {
+                                        let v50 = C::put_in_reg(ctx, v48);
+                                        let v935 = constructor_fcvt_from_uint_reg(
+                                            ctx,
+                                            F32X4,
+                                            &FpuRoundMode::ToNearestTiesToEven,
+                                            v50,
+                                        );
+                                        let v936 = constructor_output_reg(ctx, v935);
+                                        // Rule at src/isa/s390x/lower.isle line 1525.
+                                        return Some(v936);
+                                    }
+                                    let v937 = C::vxrs_ext2_disabled(ctx, v3);
+                                    if let Some(v938) = v937 {
+                                        let v50 = C::put_in_reg(ctx, v48);
+                                        let v939 = constructor_vec_unpacku_high(ctx, I32X4, v50);
+                                        let v940 = constructor_fcvt_from_uint_reg(
+                                            ctx,
+                                            F64X2,
+                                            &FpuRoundMode::ShorterPrecision,
+                                            v939,
+                                        );
+                                        let v941 = constructor_fdemote_reg(
+                                            ctx,
+                                            F32X4,
+                                            F64X2,
+                                            &FpuRoundMode::ToNearestTiesToEven,
+                                            v940,
+                                        );
+                                        let v942 = C::put_in_reg(ctx, v48);
+                                        let v943 = constructor_vec_unpacku_low(ctx, I32X4, v942);
+                                        let v944 = constructor_fcvt_from_uint_reg(
+                                            ctx,
+                                            F64X2,
+                                            &FpuRoundMode::ShorterPrecision,
+                                            v943,
+                                        );
+                                        let v945 = constructor_fdemote_reg(
+                                            ctx,
+                                            F32X4,
+                                            F64X2,
+                                            &FpuRoundMode::ToNearestTiesToEven,
+                                            v944,
+                                        );
+                                        let v955 = constructor_imm8x16(
+                                            ctx, 0x0, 0x1, 0x2, 0x3, 0x8, 0x9, 0xA, 0xB, 0x10,
+                                            0x11, 0x12, 0x13, 0x18, 0x19, 0x1A, 0x1B,
+                                        );
+                                        let v956 = constructor_vec_imm(ctx, I8X16, v955);
+                                        let v957 =
+                                            constructor_vec_permute(ctx, F32X4, v941, v945, v956);
+                                        let v958 = constructor_output_reg(ctx, v957);
+                                        // Rule at src/isa/s390x/lower.isle line 1530.
+                                        return Some(v958);
+                                    }
+                                }
+                            }
+                            F64X2 => {
+                                let v49 = C::value_type(ctx, v48);
+                                if v49 == I64X2 {
+                                    let v50 = C::put_in_reg(ctx, v48);
+                                    let v959 = constructor_fcvt_from_uint_reg(
+                                        ctx,
+                                        F64X2,
+                                        &FpuRoundMode::ToNearestTiesToEven,
+                                        v50,
+                                    );
+                                    let v960 = constructor_output_reg(ctx, v959);
+                                    // Rule at src/isa/s390x/lower.isle line 1542.
+                                    return Some(v960);
+                                }
+                            }
+                            _ => {}
+                        }
+                    }
+                }
+                &Opcode::FcvtFromSint => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            F32 => {
+                                let v49 = C::value_type(ctx, v48);
+                                let v920 = C::vxrs_ext2_enabled(ctx, v49);
+                                if let Some(v921) = v920 {
+                                    let v922 = C::fits_in_32(ctx, v49);
+                                    if let Some(v923) = v922 {
+                                        let v595 = constructor_put_in_reg_sext32(ctx, v48);
+                                        let v961 = constructor_fcvt_from_sint_reg(
+                                            ctx,
+                                            F32,
+                                            &FpuRoundMode::ToNearestTiesToEven,
+                                            v595,
+                                        );
+                                        let v962 = constructor_output_reg(ctx, v961);
+                                        // Rule at src/isa/s390x/lower.isle line 1549.
+                                        return Some(v962);
+                                    }
+                                }
+                                let v568 = C::fits_in_64(ctx, v49);
+                                if let Some(v569) = v568 {
+                                    let v597 = constructor_put_in_reg_sext64(ctx, v48);
+                                    let v963 = constructor_fcvt_from_sint_reg(
+                                        ctx,
+                                        F64,
+                                        &FpuRoundMode::ShorterPrecision,
+                                        v597,
+                                    );
+                                    let v964 = constructor_fdemote_reg(
+                                        ctx,
+                                        F32,
+                                        F64,
+                                        &FpuRoundMode::ToNearestTiesToEven,
+                                        v963,
+                                    );
+                                    let v965 = constructor_output_reg(ctx, v964);
+                                    // Rule at src/isa/s390x/lower.isle line 1555.
+                                    return Some(v965);
+                                }
+                            }
+                            F64 => {
+                                let v49 = C::value_type(ctx, v48);
+                                let v568 = C::fits_in_64(ctx, v49);
+                                if let Some(v569) = v568 {
+                                    let v597 = constructor_put_in_reg_sext64(ctx, v48);
+                                    let v966 = constructor_fcvt_from_sint_reg(
+                                        ctx,
+                                        F64,
+                                        &FpuRoundMode::ToNearestTiesToEven,
+                                        v597,
+                                    );
+                                    let v967 = constructor_output_reg(ctx, v966);
+                                    // Rule at src/isa/s390x/lower.isle line 1561.
+                                    return Some(v967);
+                                }
+                            }
+                            F32X4 => {
+                                let v49 = C::value_type(ctx, v48);
+                                if v49 == I32X4 {
+                                    let v933 = C::vxrs_ext2_enabled(ctx, v3);
+                                    if let Some(v934) = v933 {
+                                        let v50 = C::put_in_reg(ctx, v48);
+                                        let v968 = constructor_fcvt_from_sint_reg(
+                                            ctx,
+                                            F32X4,
+                                            &FpuRoundMode::ToNearestTiesToEven,
+                                            v50,
+                                        );
+                                        let v969 = constructor_output_reg(ctx, v968);
+                                        // Rule at src/isa/s390x/lower.isle line 1566.
+                                        return Some(v969);
+                                    }
+                                    let v937 = C::vxrs_ext2_disabled(ctx, v3);
+                                    if let Some(v938) = v937 {
+                                        let v50 = C::put_in_reg(ctx, v48);
+                                        let v970 = constructor_vec_unpacks_high(ctx, I32X4, v50);
+                                        let v971 = constructor_fcvt_from_sint_reg(
+                                            ctx,
+                                            F64X2,
+                                            &FpuRoundMode::ShorterPrecision,
+                                            v970,
+                                        );
+                                        let v972 = constructor_fdemote_reg(
+                                            ctx,
+                                            F32X4,
+                                            F64X2,
+                                            &FpuRoundMode::ToNearestTiesToEven,
+                                            v971,
+                                        );
+                                        let v942 = C::put_in_reg(ctx, v48);
+                                        let v973 = constructor_vec_unpacks_low(ctx, I32X4, v942);
+                                        let v974 = constructor_fcvt_from_sint_reg(
+                                            ctx,
+                                            F64X2,
+                                            &FpuRoundMode::ShorterPrecision,
+                                            v973,
+                                        );
+                                        let v975 = constructor_fdemote_reg(
+                                            ctx,
+                                            F32X4,
+                                            F64X2,
+                                            &FpuRoundMode::ToNearestTiesToEven,
+                                            v974,
+                                        );
+                                        let v955 = constructor_imm8x16(
+                                            ctx, 0x0, 0x1, 0x2, 0x3, 0x8, 0x9, 0xA, 0xB, 0x10,
+                                            0x11, 0x12, 0x13, 0x18, 0x19, 0x1A, 0x1B,
+                                        );
+                                        let v956 = constructor_vec_imm(ctx, I8X16, v955);
+                                        let v976 =
+                                            constructor_vec_permute(ctx, F32X4, v972, v975, v956);
+                                        let v977 = constructor_output_reg(ctx, v976);
+                                        // Rule at src/isa/s390x/lower.isle line 1571.
+                                        return Some(v977);
+                                    }
+                                }
+                            }
+                            F64X2 => {
+                                let v49 = C::value_type(ctx, v48);
+                                if v49 == I64X2 {
+                                    let v50 = C::put_in_reg(ctx, v48);
+                                    let v978 = constructor_fcvt_from_sint_reg(
+                                        ctx,
+                                        F64X2,
+                                        &FpuRoundMode::ToNearestTiesToEven,
+                                        v50,
+                                    );
+                                    let v979 = constructor_output_reg(ctx, v978);
+                                    // Rule at src/isa/s390x/lower.isle line 1583.
+                                    return Some(v979);
+                                }
+                            }
+                            _ => {}
+                        }
+                    }
+                }
+                &Opcode::Isplit => {
+                    let v49 = C::value_type(ctx, v48);
+                    if v49 == I128 {
+                        let v50 = C::put_in_reg(ctx, v48);
+                        let v53 = C::zero_reg(ctx);
+                        let v54 = constructor_vec_extract_lane(ctx, I64X2, v50, 0x0, v53);
+                        let v56 = C::zero_reg(ctx);
+                        let v57 = constructor_vec_extract_lane(ctx, I64X2, v50, 0x1, v56);
+                        let v58 = C::value_reg(ctx, v57);
+                        let v59 = C::value_reg(ctx, v54);
+                        let v60 = C::output_pair(ctx, v58, v59);
+                        // Rule at src/isa/s390x/lower.isle line 57.
+                        return Some(v60);
+                    }
+                }
+                _ => {}
+            }
+        }
+        &InstructionData::UnaryConst {
+            opcode: ref v23,
+            constant_handle: v24,
+        } => {
+            if let &Opcode::Vconst = v23 {
+                let v1 = C::first_result(ctx, arg0);
+                if let Some(v2) = v1 {
+                    let v25 = C::u128_from_constant(ctx, v24);
+                    if let Some(v26) = v25 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v27 = C::be_vec_const(ctx, v3, v26);
+                        let v28 = constructor_vec_imm(ctx, v3, v27);
+                        let v29 = constructor_output_reg(ctx, v28);
+                        // Rule at src/isa/s390x/lower.isle line 33.
+                        return Some(v29);
+                    }
+                }
+            }
+        }
+        &InstructionData::UnaryGlobalValue {
+            opcode: ref v1469,
+            global_value: v1470,
+        } => {
+            match v1469 {
+                &Opcode::SymbolValue => {
+                    let v1471 = C::symbol_value_data(ctx, v1470);
+                    if let Some(v1472) = v1471 {
+                        let v1476 = C::reloc_distance_near(ctx, v1472.1);
+                        if let Some(v1477) = v1476 {
+                            let v1478 = constructor_memarg_symbol_offset(ctx, v1472.2);
+                            if let Some(v1479) = v1478 {
+                                let v1461 = C::memflags_trusted(ctx);
+                                let v1480 = &C::memarg_symbol(ctx, v1472.0, v1479, v1461);
+                                let v1481 = constructor_load_addr(ctx, v1480);
+                                let v1482 = constructor_output_reg(ctx, v1481);
+                                // Rule at src/isa/s390x/lower.isle line 2256.
+                                return Some(v1482);
+                            }
+                        }
+                        let v1483 = SymbolReloc::Absolute {
+                            name: v1472.0,
+                            offset: v1472.2,
+                        };
+                        let v1484 = constructor_load_symbol_reloc(ctx, &v1483);
+                        let v1485 = constructor_output_reg(ctx, v1484);
+                        // Rule at src/isa/s390x/lower.isle line 2262.
+                        return Some(v1485);
+                    }
+                }
+                &Opcode::TlsValue => {
+                    let v1471 = C::symbol_value_data(ctx, v1470);
+                    if let Some(v1472) = v1471 {
+                        if v1472.2 == 0x0 {
+                            let v1486 = C::tls_model_is_elf_gd(ctx);
+                            if let Some(v1487) = v1486 {
+                                let v1489 = &C::memarg_got(ctx);
+                                let v1490 = constructor_load_addr(ctx, v1489);
+                                let v1488 = SymbolReloc::TlsGd { name: v1472.0 };
+                                let v1491 = constructor_load_symbol_reloc(ctx, &v1488);
+                                let v1492 =
+                                    constructor_lib_call_tls_get_offset(ctx, v1490, v1491, &v1488);
+                                let v1493 = constructor_thread_pointer(ctx);
+                                let v1494 = constructor_add_reg(ctx, I64, v1492, v1493);
+                                let v1495 = constructor_output_reg(ctx, v1494);
+                                // Rule at src/isa/s390x/lower.isle line 2269.
+                                return Some(v1495);
+                            }
+                        }
+                    }
+                }
+                _ => {}
+            }
+        }
+        &InstructionData::UnaryIeee32 {
+            opcode: ref v10,
+            imm: v11,
+        } => {
+            if let &Opcode::F32const = v10 {
+                let v12 = C::u32_from_ieee32(ctx, v11);
+                let v14 = C::u32_as_u64(ctx, v12);
+                let v15 = constructor_imm(ctx, F32, v14);
+                let v16 = constructor_output_reg(ctx, v15);
+                // Rule at src/isa/s390x/lower.isle line 21.
+                return Some(v16);
+            }
+        }
+        &InstructionData::UnaryIeee64 {
+            opcode: ref v17,
+            imm: v18,
+        } => {
+            if let &Opcode::F64const = v17 {
+                let v19 = C::u64_from_ieee64(ctx, v18);
+                let v21 = constructor_imm(ctx, F64, v19);
+                let v22 = constructor_output_reg(ctx, v21);
+                // Rule at src/isa/s390x/lower.isle line 27.
+                return Some(v22);
+            }
+        }
+        &InstructionData::UnaryImm {
+            opcode: ref v5,
+            imm: v6,
+        } => {
+            if let &Opcode::Iconst = v5 {
+                let v1 = C::first_result(ctx, arg0);
+                if let Some(v2) = v1 {
+                    let v3 = C::value_type(ctx, v2);
+                    let v7 = C::u64_from_imm64(ctx, v6);
+                    let v8 = constructor_imm(ctx, v3, v7);
+                    let v9 = constructor_output_reg(ctx, v8);
+                    // Rule at src/isa/s390x/lower.isle line 15.
+                    return Some(v9);
+                }
+            }
+        }
+        _ => {}
+    }
+    None
+}
+
+// Generated as internal constructor for term lower_branch.
+pub fn constructor_lower_branch<C: Context>(
+    ctx: &mut C,
+    arg0: Inst,
+    arg1: &VecMachLabel,
+) -> Option<Unit> {
+    let v1 = &C::inst_data(ctx, arg0);
+    match v1 {
+        &InstructionData::BranchTable {
+            opcode: ref v9,
+            arg: v10,
+            table: v11,
+        } => {
+            if let &Opcode::BrTable = v9 {
+                let v12 = constructor_put_in_reg_zext64(ctx, v10);
+                let v14 = C::vec_length_minus1(ctx, arg1);
+                let v15 = &constructor_icmpu_uimm32(ctx, I64, v12, v14);
+                let v17 = &C::intcc_as_cond(ctx, &IntCC::UnsignedGreaterThanOrEqual);
+                let v18 = &constructor_bool(ctx, v15, v17);
+                let v19 = C::vec_element(ctx, arg1, 0x0);
+                let v20 = &constructor_oneway_cond_br_bool(ctx, v18, v19);
+                let v21 = constructor_emit_side_effect(ctx, v20);
+                let v23 = constructor_lshl_imm(ctx, I64, v12, 0x2);
+                let v24 = &constructor_jt_sequence(ctx, v23, arg1);
+                let v25 = constructor_emit_side_effect(ctx, v24);
+                // Rule at src/isa/s390x/lower.isle line 3746.
+                return Some(v25);
+            }
+        }
+        &InstructionData::Brif {
+            opcode: ref v26,
+            arg: v27,
+            blocks: ref v28,
+        } => {
+            if let &Opcode::Brif = v26 {
+                let v32 = &constructor_value_nonzero(ctx, v27);
+                let v33 = C::vec_element(ctx, arg1, 0x0);
+                let v35 = C::vec_element(ctx, arg1, 0x1);
+                let v36 = &constructor_cond_br_bool(ctx, v32, v33, v35);
+                let v37 = constructor_emit_side_effect(ctx, v36);
+                // Rule at src/isa/s390x/lower.isle line 3779.
+                return Some(v37);
+            }
+        }
+        &InstructionData::Jump {
+            opcode: ref v2,
+            destination: v3,
+        } => {
+            if let &Opcode::Jump = v2 {
+                let v6 = C::vec_element(ctx, arg1, 0x0);
+                let v7 = &constructor_jump_impl(ctx, v6);
+                let v8 = constructor_emit_side_effect(ctx, v7);
+                // Rule at src/isa/s390x/lower.isle line 3738.
+                return Some(v8);
+            }
+        }
+        _ => {}
+    }
+    None
+}
+
+// Generated as internal constructor for term vec_mul_impl.
+pub fn constructor_vec_mul_impl<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    match arg0 {
+        I128 => {
+            let v12 = C::zero_reg(ctx);
+            let v13 = constructor_vec_extract_lane(ctx, I64X2, arg1, 0x0, v12);
+            let v14 = C::zero_reg(ctx);
+            let v24 = constructor_vec_extract_lane(ctx, I64X2, arg1, 0x1, v14);
+            let v25 = C::zero_reg(ctx);
+            let v26 = constructor_vec_extract_lane(ctx, I64X2, arg2, 0x0, v25);
+            let v27 = C::zero_reg(ctx);
+            let v28 = constructor_vec_extract_lane(ctx, I64X2, arg2, 0x1, v27);
+            let v29 = constructor_umul_wide(ctx, v24, v28);
+            let v30 = C::regpair_lo(ctx, v29);
+            let v31 = C::regpair_hi(ctx, v29);
+            let v32 = constructor_mul_reg(ctx, I64, v24, v26);
+            let v33 = constructor_mul_reg(ctx, I64, v13, v28);
+            let v34 = constructor_add_reg(ctx, I64, v32, v31);
+            let v35 = constructor_add_reg(ctx, I64, v33, v34);
+            let v36 = constructor_mov_to_vec128(ctx, I64X2, v35, v30);
+            // Rule at src/isa/s390x/lower.isle line 405.
+            return v36;
+        }
+        I8X16 => {
+            let v4 = constructor_vec_mul(ctx, I8X16, arg1, arg2);
+            // Rule at src/isa/s390x/lower.isle line 392.
+            return v4;
+        }
+        I16X8 => {
+            let v6 = constructor_vec_mul(ctx, I16X8, arg1, arg2);
+            // Rule at src/isa/s390x/lower.isle line 393.
+            return v6;
+        }
+        I32X4 => {
+            let v8 = constructor_vec_mul(ctx, I32X4, arg1, arg2);
+            // Rule at src/isa/s390x/lower.isle line 394.
+            return v8;
+        }
+        I64X2 => {
+            let v12 = C::zero_reg(ctx);
+            let v13 = constructor_vec_extract_lane(ctx, I64X2, arg1, 0x0, v12);
+            let v14 = C::zero_reg(ctx);
+            let v15 = constructor_vec_extract_lane(ctx, I64X2, arg2, 0x0, v14);
+            let v16 = constructor_mul_reg(ctx, I64, v13, v15);
+            let v18 = C::zero_reg(ctx);
+            let v19 = constructor_vec_extract_lane(ctx, I64X2, arg1, 0x1, v18);
+            let v20 = C::zero_reg(ctx);
+            let v21 = constructor_vec_extract_lane(ctx, I64X2, arg2, 0x1, v20);
+            let v22 = constructor_mul_reg(ctx, I64, v19, v21);
+            let v23 = constructor_mov_to_vec128(ctx, I64X2, v16, v22);
+            // Rule at src/isa/s390x/lower.isle line 397.
+            return v23;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_mul_impl", "src/isa/s390x/lower.isle line 387"
+    )
+}
+
+// Generated as internal constructor for term sqmul_impl.
+pub fn constructor_sqmul_impl<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
+    match arg0 {
+        I32X4 => {
+            let v4 = constructor_vec_mul_impl(ctx, I32X4, arg1, arg2);
+            let v6 = constructor_vec_imm_bit_mask(ctx, I32X4, 0x11, 0x11);
+            let v7 = constructor_vec_add(ctx, I32X4, v4, v6);
+            let v9 = constructor_vec_ashr_imm(ctx, I32X4, v7, 0xF);
+            // Rule at src/isa/s390x/lower.isle line 509.
+            return v9;
+        }
+        I64X2 => {
+            let v11 = constructor_vec_mul_impl(ctx, I64X2, arg1, arg2);
+            let v13 = constructor_vec_imm_bit_mask(ctx, I64X2, 0x21, 0x21);
+            let v14 = constructor_vec_add(ctx, I64X2, v11, v13);
+            let v16 = constructor_vec_ashr_imm(ctx, I64X2, v14, 0x1F);
+            // Rule at src/isa/s390x/lower.isle line 513.
+            return v16;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "sqmul_impl", "src/isa/s390x/lower.isle line 508"
+    )
+}
+
+// Generated as internal constructor for term div_overflow_check_needed.
+pub fn constructor_div_overflow_check_needed<C: Context>(ctx: &mut C, arg0: Value) -> bool {
+    let v1 = C::i64_from_value(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v3 = constructor_i64_not_neg1(ctx, v2);
+        if let Some(v4) = v3 {
+            // Rule at src/isa/s390x/lower.isle line 624.
+            return false;
+        }
+    }
+    // Rule at src/isa/s390x/lower.isle line 627.
+    return true;
+}
+
+// Generated as internal constructor for term maybe_trap_if_sdiv_overflow.
+pub fn constructor_maybe_trap_if_sdiv_overflow<C: Context>(
+    ctx: &mut C,
+    arg0: bool,
+    arg1: Type,
+    arg2: Type,
+    arg3: Reg,
+    arg4: Reg,
+) -> Reg {
+    match arg0 {
+        true => {
+            let v6 = constructor_int_max(ctx, arg2);
+            let v7 = constructor_imm(ctx, arg1, v6);
+            let v8 = constructor_xor_reg(ctx, arg1, v7, arg3);
+            let v9 = constructor_and_reg(ctx, arg1, v8, arg4);
+            let v12 = &C::intcc_as_cond(ctx, &IntCC::Equal);
+            let v13 = &C::trap_code_integer_overflow(ctx);
+            let v14 = constructor_icmps_simm16_and_trap(ctx, arg1, v9, -0x1, v12, v13);
+            // Rule at src/isa/s390x/lower.isle line 640.
+            return v14;
+        }
+        false => {
+            let v5 = C::invalid_reg(ctx);
+            // Rule at src/isa/s390x/lower.isle line 639.
+            return v5;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "maybe_trap_if_sdiv_overflow", "src/isa/s390x/lower.isle line 638"
+    )
+}
+
+// Generated as internal constructor for term int_max.
+pub fn constructor_int_max<C: Context>(ctx: &mut C, arg0: Type) -> u64 {
+    match arg0 {
+        I8 => {
+            // Rule at src/isa/s390x/lower.isle line 647.
+            return 0x7F;
+        }
+        I16 => {
+            // Rule at src/isa/s390x/lower.isle line 648.
+            return 0x7FFF;
+        }
+        I32 => {
+            // Rule at src/isa/s390x/lower.isle line 649.
+            return 0x7FFFFFFF;
+        }
+        I64 => {
+            // Rule at src/isa/s390x/lower.isle line 650.
+            return 0x7FFFFFFFFFFFFFFF;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "int_max", "src/isa/s390x/lower.isle line 646"
+    )
+}
+
+// Generated as internal constructor for term maybe_avoid_srem_overflow.
+pub fn constructor_maybe_avoid_srem_overflow<C: Context>(
+    ctx: &mut C,
+    arg0: bool,
+    arg1: Type,
+    arg2: Reg,
+    arg3: Reg,
+) -> Reg {
+    match arg0 {
+        true => {
+            match arg1 {
+                I32 => {
+                    // Rule at src/isa/s390x/lower.isle line 668.
+                    return arg2;
+                }
+                I64 => {
+                    let v6 = &constructor_icmps_simm16(ctx, I64, arg3, -0x1);
+                    let v8 = &C::intcc_as_cond(ctx, &IntCC::Equal);
+                    let v10 = &constructor_cmov_imm(ctx, I64, v8, 0x0, arg2);
+                    let v11 = constructor_with_flags_reg(ctx, v6, v10);
+                    // Rule at src/isa/s390x/lower.isle line 669.
+                    return v11;
+                }
+                _ => {}
+            }
+        }
+        false => {
+            // Rule at src/isa/s390x/lower.isle line 667.
+            return arg2;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "maybe_avoid_srem_overflow", "src/isa/s390x/lower.isle line 666"
+    )
+}
+
+// Generated as internal constructor for term bitrev_bits.
+pub fn constructor_bitrev_bits<C: Context>(
+    ctx: &mut C,
+    arg0: u8,
+    arg1: u64,
+    arg2: Type,
+    arg3: Reg,
+) -> Reg {
+    let v3 = C::fits_in_64(ctx, arg2);
+    if let Some(v4) = v3 {
+        let v6 = constructor_imm(ctx, v4, arg1);
+        let v7 = constructor_ty_ext32(ctx, v4);
+        let v8 = constructor_lshl_imm(ctx, v7, arg3, arg0);
+        let v9 = constructor_ty_ext32(ctx, v4);
+        let v10 = constructor_lshr_imm(ctx, v9, arg3, arg0);
+        let v11 = constructor_and_reg(ctx, v4, v8, v6);
+        let v12 = constructor_not_reg(ctx, v4, v6);
+        let v13 = constructor_and_reg(ctx, v4, v10, v12);
+        let v14 = constructor_or_reg(ctx, v4, v11, v13);
+        // Rule at src/isa/s390x/lower.isle line 1153.
+        return v14;
+    }
+    let v15 = C::vr128_ty(ctx, arg2);
+    if let Some(v16) = v15 {
+        let v18 = constructor_vec_imm_splat(ctx, I64X2, arg1);
+        let v20 = C::u8_as_u64(ctx, arg0);
+        let v21 = constructor_vec_imm_splat(ctx, I8X16, v20);
+        let v22 = constructor_vec_lshl_by_bit(ctx, arg3, v21);
+        let v23 = constructor_vec_lshr_by_bit(ctx, arg3, v21);
+        let v24 = constructor_vec_select(ctx, v16, v22, v23, v18);
+        // Rule at src/isa/s390x/lower.isle line 1161.
+        return v24;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "bitrev_bits", "src/isa/s390x/lower.isle line 1152"
+    )
+}
+
+// Generated as internal constructor for term bitrev_bytes.
+pub fn constructor_bitrev_bytes<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
+    match arg0 {
+        I8 => {
+            // Rule at src/isa/s390x/lower.isle line 1169.
+            return arg1;
+        }
+        I16 => {
+            let v3 = constructor_bswap_reg(ctx, I32, arg1);
+            let v5 = constructor_lshr_imm(ctx, I32, v3, 0x10);
+            // Rule at src/isa/s390x/lower.isle line 1170.
+            return v5;
+        }
+        I32 => {
+            let v3 = constructor_bswap_reg(ctx, I32, arg1);
+            // Rule at src/isa/s390x/lower.isle line 1171.
+            return v3;
+        }
+        I64 => {
+            let v7 = constructor_bswap_reg(ctx, I64, arg1);
+            // Rule at src/isa/s390x/lower.isle line 1172.
+            return v7;
+        }
+        I128 => {
+            let v26 = constructor_imm8x16(
+                ctx, 0xF, 0xE, 0xD, 0xC, 0xB, 0xA, 0x9, 0x8, 0x7, 0x6, 0x5, 0x4, 0x3, 0x2, 0x1, 0x0,
+            );
+            let v27 = constructor_vec_imm(ctx, I8X16, v26);
+            let v28 = constructor_vec_permute(ctx, I128, arg1, arg1, v27);
+            // Rule at src/isa/s390x/lower.isle line 1173.
+            return v28;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "bitrev_bytes", "src/isa/s390x/lower.isle line 1168"
+    )
+}
+
+// Generated as internal constructor for term clz_offset.
+pub fn constructor_clz_offset<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
+    match arg0 {
+        I8 => {
+            let v4 = constructor_add_simm16(ctx, I8, arg1, -0x38);
+            // Rule at src/isa/s390x/lower.isle line 1190.
+            return v4;
+        }
+        I16 => {
+            let v7 = constructor_add_simm16(ctx, I16, arg1, -0x30);
+            // Rule at src/isa/s390x/lower.isle line 1191.
+            return v7;
+        }
+        I32 => {
+            let v10 = constructor_add_simm16(ctx, I32, arg1, -0x20);
+            // Rule at src/isa/s390x/lower.isle line 1192.
+            return v10;
+        }
+        I64 => {
+            // Rule at src/isa/s390x/lower.isle line 1193.
+            return arg1;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "clz_offset", "src/isa/s390x/lower.isle line 1189"
+    )
+}
+
+// Generated as internal constructor for term cls_offset.
+pub fn constructor_cls_offset<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
+    match arg0 {
+        I8 => {
+            let v4 = constructor_add_simm16(ctx, I8, arg1, -0x39);
+            // Rule at src/isa/s390x/lower.isle line 1221.
+            return v4;
+        }
+        I16 => {
+            let v7 = constructor_add_simm16(ctx, I16, arg1, -0x31);
+            // Rule at src/isa/s390x/lower.isle line 1222.
+            return v7;
+        }
+        I32 => {
+            let v10 = constructor_add_simm16(ctx, I32, arg1, -0x21);
+            // Rule at src/isa/s390x/lower.isle line 1223.
+            return v10;
+        }
+        I64 => {
+            let v13 = constructor_add_simm16(ctx, I64, arg1, -0x1);
+            // Rule at src/isa/s390x/lower.isle line 1224.
+            return v13;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "cls_offset", "src/isa/s390x/lower.isle line 1220"
+    )
+}
+
+// Generated as internal constructor for term ctz_guardbit.
+pub fn constructor_ctz_guardbit<C: Context>(ctx: &mut C, arg0: Type) -> UImm16Shifted {
+    match arg0 {
+        I8 => {
+            let v3 = C::uimm16shifted(ctx, 0x100, 0x0);
+            // Rule at src/isa/s390x/lower.isle line 1275.
+            return v3;
+        }
+        I16 => {
+            let v6 = C::uimm16shifted(ctx, 0x1, 0x10);
+            // Rule at src/isa/s390x/lower.isle line 1276.
+            return v6;
+        }
+        I32 => {
+            let v8 = C::uimm16shifted(ctx, 0x1, 0x20);
+            // Rule at src/isa/s390x/lower.isle line 1277.
+            return v8;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "ctz_guardbit", "src/isa/s390x/lower.isle line 1274"
+    )
+}
+
+// Generated as internal constructor for term vec_move_lane_and_insert.
+pub fn constructor_vec_move_lane_and_insert<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: u8,
+    arg3: Reg,
+    arg4: u8,
+) -> Reg {
+    let v1 = C::multi_lane(ctx, arg0);
+    if let Some(v2) = v1 {
+        if v2.0 == 0x40 {
+            match arg2 {
+                0x0 => {
+                    let v10 = constructor_vec_permute_dw_imm(ctx, arg0, arg3, arg4, arg1, 0x1);
+                    // Rule at src/isa/s390x/lower.isle line 1805.
+                    return v10;
+                }
+                0x1 => {
+                    let v12 = constructor_vec_permute_dw_imm(ctx, arg0, arg1, 0x0, arg3, arg4);
+                    // Rule at src/isa/s390x/lower.isle line 1807.
+                    return v12;
+                }
+                _ => {}
+            }
+        }
+    }
+    if arg2 == arg4 {
+        let v13 = C::lane_byte_mask(ctx, arg0, arg2);
+        let v14 = constructor_vec_imm_byte_mask(ctx, arg0, v13);
+        let v15 = constructor_vec_select(ctx, arg0, arg3, arg1, v14);
+        // Rule at src/isa/s390x/lower.isle line 1811.
+        return v15;
+    }
+    let v16 = constructor_vec_replicate_lane(ctx, arg0, arg3, arg4);
+    let v17 = C::lane_byte_mask(ctx, arg0, arg2);
+    let v18 = constructor_vec_imm_byte_mask(ctx, arg0, v17);
+    let v19 = constructor_vec_select(ctx, arg0, v16, arg1, v18);
+    // Rule at src/isa/s390x/lower.isle line 1816.
+    return v19;
+}
+
+// Generated as internal constructor for term vec_load_lane_little.
+pub fn constructor_vec_load_lane_little<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: &MemArg,
+    arg3: u8,
+) -> Reg {
+    let v1 = C::multi_lane(ctx, arg0);
+    if let Some(v2) = v1 {
+        match v2.0 {
+            0x8 => {
+                let v8 = constructor_vec_load_lane(ctx, arg0, arg1, arg2, arg3);
+                // Rule at src/isa/s390x/lower.isle line 1825.
+                return v8;
+            }
+            0x10 => {
+                let v9 = C::vxrs_ext2_enabled(ctx, arg0);
+                if let Some(v10) = v9 {
+                    let v11 = constructor_vec_load_lane_rev(ctx, arg0, arg1, arg2, arg3);
+                    // Rule at src/isa/s390x/lower.isle line 1829.
+                    return v11;
+                }
+                let v12 = C::vxrs_ext2_disabled(ctx, arg0);
+                if let Some(v13) = v12 {
+                    let v14 = constructor_loadrev16(ctx, arg2);
+                    let v15 = C::zero_reg(ctx);
+                    let v16 = constructor_vec_insert_lane(ctx, arg0, arg1, v14, arg3, v15);
+                    // Rule at src/isa/s390x/lower.isle line 1840.
+                    return v16;
+                }
+            }
+            0x20 => {
+                let v9 = C::vxrs_ext2_enabled(ctx, arg0);
+                if let Some(v10) = v9 {
+                    let v11 = constructor_vec_load_lane_rev(ctx, arg0, arg1, arg2, arg3);
+                    // Rule at src/isa/s390x/lower.isle line 1832.
+                    return v11;
+                }
+                let v12 = C::vxrs_ext2_disabled(ctx, arg0);
+                if let Some(v13) = v12 {
+                    let v17 = constructor_loadrev32(ctx, arg2);
+                    let v15 = C::zero_reg(ctx);
+                    let v18 = constructor_vec_insert_lane(ctx, arg0, arg1, v17, arg3, v15);
+                    // Rule at src/isa/s390x/lower.isle line 1843.
+                    return v18;
+                }
+            }
+            0x40 => {
+                let v9 = C::vxrs_ext2_enabled(ctx, arg0);
+                if let Some(v10) = v9 {
+                    let v11 = constructor_vec_load_lane_rev(ctx, arg0, arg1, arg2, arg3);
+                    // Rule at src/isa/s390x/lower.isle line 1835.
+                    return v11;
+                }
+                let v12 = C::vxrs_ext2_disabled(ctx, arg0);
+                if let Some(v13) = v12 {
+                    let v19 = constructor_loadrev64(ctx, arg2);
+                    let v15 = C::zero_reg(ctx);
+                    let v20 = constructor_vec_insert_lane(ctx, arg0, arg1, v19, arg3, v15);
+                    // Rule at src/isa/s390x/lower.isle line 1846.
+                    return v20;
+                }
+            }
+            _ => {}
+        }
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_load_lane_little", "src/isa/s390x/lower.isle line 1822"
+    )
+}
+
+// Generated as internal constructor for term vec_load_lane_little_undef.
+pub fn constructor_vec_load_lane_little_undef<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &MemArg,
+    arg2: u8,
+) -> Reg {
+    let v1 = C::multi_lane(ctx, arg0);
+    if let Some(v2) = v1 {
+        match v2.0 {
+            0x8 => {
+                let v7 = constructor_vec_load_lane_undef(ctx, arg0, arg1, arg2);
+                // Rule at src/isa/s390x/lower.isle line 1854.
+                return v7;
+            }
+            0x10 => {
+                let v8 = C::vxrs_ext2_enabled(ctx, arg0);
+                if let Some(v9) = v8 {
+                    let v10 = constructor_vec_load_lane_rev_undef(ctx, arg0, arg1, arg2);
+                    // Rule at src/isa/s390x/lower.isle line 1858.
+                    return v10;
+                }
+                let v11 = C::vxrs_ext2_disabled(ctx, arg0);
+                if let Some(v12) = v11 {
+                    let v13 = constructor_loadrev16(ctx, arg1);
+                    let v14 = C::zero_reg(ctx);
+                    let v15 = constructor_vec_insert_lane_undef(ctx, arg0, v13, arg2, v14);
+                    // Rule at src/isa/s390x/lower.isle line 1869.
+                    return v15;
+                }
+            }
+            0x20 => {
+                let v8 = C::vxrs_ext2_enabled(ctx, arg0);
+                if let Some(v9) = v8 {
+                    let v10 = constructor_vec_load_lane_rev_undef(ctx, arg0, arg1, arg2);
+                    // Rule at src/isa/s390x/lower.isle line 1861.
+                    return v10;
+                }
+                let v11 = C::vxrs_ext2_disabled(ctx, arg0);
+                if let Some(v12) = v11 {
+                    let v16 = constructor_loadrev32(ctx, arg1);
+                    let v14 = C::zero_reg(ctx);
+                    let v17 = constructor_vec_insert_lane_undef(ctx, arg0, v16, arg2, v14);
+                    // Rule at src/isa/s390x/lower.isle line 1872.
+                    return v17;
+                }
+            }
+            0x40 => {
+                let v8 = C::vxrs_ext2_enabled(ctx, arg0);
+                if let Some(v9) = v8 {
+                    let v10 = constructor_vec_load_lane_rev_undef(ctx, arg0, arg1, arg2);
+                    // Rule at src/isa/s390x/lower.isle line 1864.
+                    return v10;
+                }
+                let v11 = C::vxrs_ext2_disabled(ctx, arg0);
+                if let Some(v12) = v11 {
+                    let v18 = constructor_loadrev64(ctx, arg1);
+                    let v14 = C::zero_reg(ctx);
+                    let v19 = constructor_vec_insert_lane_undef(ctx, arg0, v18, arg2, v14);
+                    // Rule at src/isa/s390x/lower.isle line 1875.
+                    return v19;
+                }
+            }
+            _ => {}
+        }
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_load_lane_little_undef", "src/isa/s390x/lower.isle line 1851"
+    )
+}
+
+// Generated as internal constructor for term vec_store_lane_little.
+pub fn constructor_vec_store_lane_little<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: &MemArg,
+    arg3: u8,
+) -> SideEffectNoResult {
+    let v1 = C::multi_lane(ctx, arg0);
+    if let Some(v2) = v1 {
+        match v2.0 {
+            0x8 => {
+                let v8 = &constructor_vec_store_lane(ctx, arg0, arg1, arg2, arg3);
+                // Rule at src/isa/s390x/lower.isle line 1912.
+                return v8.clone();
+            }
+            0x10 => {
+                let v9 = C::vxrs_ext2_enabled(ctx, arg0);
+                if let Some(v10) = v9 {
+                    let v11 = &constructor_vec_store_lane_rev(ctx, arg0, arg1, arg2, arg3);
+                    // Rule at src/isa/s390x/lower.isle line 1916.
+                    return v11.clone();
+                }
+                let v12 = C::vxrs_ext2_disabled(ctx, arg0);
+                if let Some(v13) = v12 {
+                    let v14 = C::zero_reg(ctx);
+                    let v15 = constructor_vec_extract_lane(ctx, arg0, arg1, arg3, v14);
+                    let v16 = &constructor_storerev16(ctx, v15, arg2);
+                    // Rule at src/isa/s390x/lower.isle line 1927.
+                    return v16.clone();
+                }
+            }
+            0x20 => {
+                let v9 = C::vxrs_ext2_enabled(ctx, arg0);
+                if let Some(v10) = v9 {
+                    let v11 = &constructor_vec_store_lane_rev(ctx, arg0, arg1, arg2, arg3);
+                    // Rule at src/isa/s390x/lower.isle line 1919.
+                    return v11.clone();
+                }
+                let v12 = C::vxrs_ext2_disabled(ctx, arg0);
+                if let Some(v13) = v12 {
+                    let v14 = C::zero_reg(ctx);
+                    let v15 = constructor_vec_extract_lane(ctx, arg0, arg1, arg3, v14);
+                    let v17 = &constructor_storerev32(ctx, v15, arg2);
+                    // Rule at src/isa/s390x/lower.isle line 1930.
+                    return v17.clone();
+                }
+            }
+            0x40 => {
+                let v9 = C::vxrs_ext2_enabled(ctx, arg0);
+                if let Some(v10) = v9 {
+                    let v11 = &constructor_vec_store_lane_rev(ctx, arg0, arg1, arg2, arg3);
+                    // Rule at src/isa/s390x/lower.isle line 1922.
+                    return v11.clone();
+                }
+                let v12 = C::vxrs_ext2_disabled(ctx, arg0);
+                if let Some(v13) = v12 {
+                    let v14 = C::zero_reg(ctx);
+                    let v15 = constructor_vec_extract_lane(ctx, arg0, arg1, arg3, v14);
+                    let v18 = &constructor_storerev64(ctx, v15, arg2);
+                    // Rule at src/isa/s390x/lower.isle line 1933.
+                    return v18.clone();
+                }
+            }
+            _ => {}
+        }
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_store_lane_little", "src/isa/s390x/lower.isle line 1909"
+    )
+}
+
+// Generated as internal constructor for term vec_load_replicate_little.
+pub fn constructor_vec_load_replicate_little<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &MemArg,
+) -> Reg {
+    let v1 = C::multi_lane(ctx, arg0);
+    if let Some(v2) = v1 {
+        match v2.0 {
+            0x8 => {
+                let v6 = constructor_vec_load_replicate(ctx, arg0, arg1);
+                // Rule at src/isa/s390x/lower.isle line 1971.
+                return v6;
+            }
+            0x10 => {
+                let v7 = C::vxrs_ext2_enabled(ctx, arg0);
+                if let Some(v8) = v7 {
+                    let v9 = constructor_vec_load_replicate_rev(ctx, arg0, arg1);
+                    // Rule at src/isa/s390x/lower.isle line 1975.
+                    return v9;
+                }
+                let v10 = C::vxrs_ext2_disabled(ctx, arg0);
+                if let Some(v11) = v10 {
+                    let v13 = constructor_vec_load_lane_little_undef(ctx, arg0, arg1, 0x0);
+                    let v14 = constructor_vec_replicate_lane(ctx, arg0, v13, 0x0);
+                    // Rule at src/isa/s390x/lower.isle line 1986.
+                    return v14;
+                }
+            }
+            0x20 => {
+                let v7 = C::vxrs_ext2_enabled(ctx, arg0);
+                if let Some(v8) = v7 {
+                    let v9 = constructor_vec_load_replicate_rev(ctx, arg0, arg1);
+                    // Rule at src/isa/s390x/lower.isle line 1978.
+                    return v9;
+                }
+                let v10 = C::vxrs_ext2_disabled(ctx, arg0);
+                if let Some(v11) = v10 {
+                    let v13 = constructor_vec_load_lane_little_undef(ctx, arg0, arg1, 0x0);
+                    let v14 = constructor_vec_replicate_lane(ctx, arg0, v13, 0x0);
+                    // Rule at src/isa/s390x/lower.isle line 1989.
+                    return v14;
+                }
+            }
+            0x40 => {
+                let v7 = C::vxrs_ext2_enabled(ctx, arg0);
+                if let Some(v8) = v7 {
+                    let v9 = constructor_vec_load_replicate_rev(ctx, arg0, arg1);
+                    // Rule at src/isa/s390x/lower.isle line 1981.
+                    return v9;
+                }
+                let v10 = C::vxrs_ext2_disabled(ctx, arg0);
+                if let Some(v11) = v10 {
+                    let v13 = constructor_vec_load_lane_little_undef(ctx, arg0, arg1, 0x0);
+                    let v14 = constructor_vec_replicate_lane(ctx, arg0, v13, 0x0);
+                    // Rule at src/isa/s390x/lower.isle line 1992.
+                    return v14;
+                }
+            }
+            _ => {}
+        }
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_load_replicate_little", "src/isa/s390x/lower.isle line 1968"
+    )
+}
+
+// Generated as internal constructor for term vec_move_lane_and_zero.
+pub fn constructor_vec_move_lane_and_zero<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: u8,
+    arg2: Reg,
+    arg3: u8,
+) -> Reg {
+    let v1 = C::multi_lane(ctx, arg0);
+    if let Some(v2) = v1 {
+        if v2.0 == 0x40 {
+            match arg1 {
+                0x0 => {
+                    let v9 = constructor_vec_imm(ctx, arg0, 0x0);
+                    let v11 = constructor_vec_permute_dw_imm(ctx, arg0, arg2, arg3, v9, 0x0);
+                    // Rule at src/isa/s390x/lower.isle line 2032.
+                    return v11;
+                }
+                0x1 => {
+                    let v9 = constructor_vec_imm(ctx, arg0, 0x0);
+                    let v12 = constructor_vec_permute_dw_imm(ctx, arg0, v9, 0x0, arg2, arg3);
+                    // Rule at src/isa/s390x/lower.isle line 2034.
+                    return v12;
+                }
+                _ => {}
+            }
+        }
+    }
+    if arg1 == arg3 {
+        let v13 = C::lane_byte_mask(ctx, arg0, arg1);
+        let v14 = constructor_vec_imm_byte_mask(ctx, arg0, v13);
+        let v15 = constructor_vec_and(ctx, arg0, arg2, v14);
+        // Rule at src/isa/s390x/lower.isle line 2038.
+        return v15;
+    }
+    let v16 = constructor_vec_replicate_lane(ctx, arg0, arg2, arg3);
+    let v17 = C::lane_byte_mask(ctx, arg0, arg1);
+    let v18 = constructor_vec_imm_byte_mask(ctx, arg0, v17);
+    let v19 = constructor_vec_and(ctx, arg0, v16, v18);
+    // Rule at src/isa/s390x/lower.isle line 2043.
+    return v19;
+}
+
+// Generated as internal constructor for term lib_call_tls_get_offset.
+pub fn constructor_lib_call_tls_get_offset<C: Context>(
+    ctx: &mut C,
+    arg0: Reg,
+    arg1: Reg,
+    arg2: &SymbolReloc,
+) -> Reg {
+    let v4 = C::temp_writable_reg(ctx, I64);
+    let v5 = &C::lib_call_info_tls_get_offset(ctx, v4, arg0, arg1, arg2);
+    let v6 = C::lib_accumulate_outgoing_args_size(ctx, v5);
+    let v7 = &constructor_lib_call(ctx, v5);
+    let v8 = constructor_side_effect(ctx, v7);
+    let v9 = C::writable_reg_to_reg(ctx, v4);
+    // Rule at src/isa/s390x/lower.isle line 2279.
+    return v9;
+}
+
+// Generated as internal constructor for term thread_pointer.
+pub fn constructor_thread_pointer<C: Context>(ctx: &mut C) -> Reg {
+    let v2 = constructor_load_ar(ctx, 0x0);
+    let v4 = constructor_lshl_imm(ctx, I64, v2, 0x20);
+    let v6 = constructor_insert_ar(ctx, v4, 0x1);
+    // Rule at src/isa/s390x/lower.isle line 2288.
+    return v6;
+}
+
+// Generated as internal constructor for term vec_load_full_rev.
+pub fn constructor_vec_load_full_rev<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: MemFlags,
+    arg2: Value,
+    arg3: Offset32,
+) -> Reg {
+    let v3 = C::vr128_ty(ctx, arg0);
+    if let Some(v4) = v3 {
+        let v1 = C::vxrs_ext2_enabled(ctx, arg0);
+        if let Some(v2) = v1 {
+            let v8 = &constructor_lower_address(ctx, arg1, arg2, arg3);
+            let v9 = constructor_vec_loadrev(ctx, v4, v8);
+            // Rule at src/isa/s390x/lower.isle line 2371.
+            return v9;
+        }
+        let v10 = C::vxrs_ext2_disabled(ctx, arg0);
+        if let Some(v11) = v10 {
+            let v13 = &constructor_lower_address_bias(ctx, arg1, arg2, arg3, 0x0);
+            let v15 = &constructor_lower_address_bias(ctx, arg1, arg2, arg3, 0x8);
+            let v16 = constructor_loadrev64(ctx, v13);
+            let v17 = constructor_loadrev64(ctx, v15);
+            let v18 = constructor_mov_to_vec128(ctx, v4, v17, v16);
+            // Rule at src/isa/s390x/lower.isle line 2375.
+            return v18;
+        }
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_load_full_rev", "src/isa/s390x/lower.isle line 2368"
+    )
+}
+
+// Generated as internal constructor for term vec_load_byte_rev.
+pub fn constructor_vec_load_byte_rev<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: MemFlags,
+    arg2: Value,
+    arg3: Offset32,
+) -> Reg {
+    let v6 = C::multi_lane(ctx, arg0);
+    if let Some(v7) = v6 {
+        match v7.0 {
+            0x8 => {
+                if v7.1 == 0x10 {
+                    let v10 = &constructor_lower_address(ctx, arg1, arg2, arg3);
+                    let v11 = constructor_vec_load(ctx, arg0, v10);
+                    // Rule at src/isa/s390x/lower.isle line 2391.
+                    return v11;
+                }
+            }
+            0x10 => {
+                if v7.1 == 0x8 {
+                    let v12 = C::vxrs_ext2_enabled(ctx, arg0);
+                    if let Some(v13) = v12 {
+                        let v10 = &constructor_lower_address(ctx, arg1, arg2, arg3);
+                        let v16 = constructor_vec_load_byte16rev(ctx, arg0, v10);
+                        // Rule at src/isa/s390x/lower.isle line 2401.
+                        return v16;
+                    }
+                    let v17 = C::vxrs_ext2_disabled(ctx, arg0);
+                    if let Some(v18) = v17 {
+                        let v19 = constructor_vec_load_full_rev(ctx, arg0, arg1, arg2, arg3);
+                        let v20 = constructor_vec_elt_rev(ctx, arg0, v19);
+                        // Rule at src/isa/s390x/lower.isle line 2412.
+                        return v20;
+                    }
+                }
+            }
+            0x20 => {
+                if v7.1 == 0x4 {
+                    let v12 = C::vxrs_ext2_enabled(ctx, arg0);
+                    if let Some(v13) = v12 {
+                        let v10 = &constructor_lower_address(ctx, arg1, arg2, arg3);
+                        let v15 = constructor_vec_load_byte32rev(ctx, arg0, v10);
+                        // Rule at src/isa/s390x/lower.isle line 2398.
+                        return v15;
+                    }
+                    let v17 = C::vxrs_ext2_disabled(ctx, arg0);
+                    if let Some(v18) = v17 {
+                        let v19 = constructor_vec_load_full_rev(ctx, arg0, arg1, arg2, arg3);
+                        let v20 = constructor_vec_elt_rev(ctx, arg0, v19);
+                        // Rule at src/isa/s390x/lower.isle line 2409.
+                        return v20;
+                    }
+                }
+            }
+            0x40 => {
+                if v7.1 == 0x2 {
+                    let v12 = C::vxrs_ext2_enabled(ctx, arg0);
+                    if let Some(v13) = v12 {
+                        let v10 = &constructor_lower_address(ctx, arg1, arg2, arg3);
+                        let v14 = constructor_vec_load_byte64rev(ctx, arg0, v10);
+                        // Rule at src/isa/s390x/lower.isle line 2395.
+                        return v14;
+                    }
+                    let v17 = C::vxrs_ext2_disabled(ctx, arg0);
+                    if let Some(v18) = v17 {
+                        let v19 = constructor_vec_load_full_rev(ctx, arg0, arg1, arg2, arg3);
+                        let v20 = constructor_vec_elt_rev(ctx, arg0, v19);
+                        // Rule at src/isa/s390x/lower.isle line 2406.
+                        return v20;
+                    }
+                }
+            }
+            _ => {}
+        }
+    }
+    if arg0 == I128 {
+        let v5 = constructor_vec_load_full_rev(ctx, I128, arg1, arg2, arg3);
+        // Rule at src/isa/s390x/lower.isle line 2387.
+        return v5;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_load_byte_rev", "src/isa/s390x/lower.isle line 2384"
+    )
+}
+
+// Generated as internal constructor for term vec_load_elt_rev.
+pub fn constructor_vec_load_elt_rev<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: MemFlags,
+    arg2: Value,
+    arg3: Offset32,
+) -> Reg {
+    let v7 = C::multi_lane(ctx, arg0);
+    if let Some(v8) = v7 {
+        match v8.0 {
+            0x8 => {
+                if v8.1 == 0x10 {
+                    let v11 = constructor_vec_load_full_rev(ctx, arg0, arg1, arg2, arg3);
+                    // Rule at src/isa/s390x/lower.isle line 2426.
+                    return v11;
+                }
+            }
+            0x10 => {
+                if v8.1 == 0x8 {
+                    let v12 = C::vxrs_ext2_enabled(ctx, arg0);
+                    if let Some(v13) = v12 {
+                        let v5 = &constructor_lower_address(ctx, arg1, arg2, arg3);
+                        let v16 = constructor_vec_load_elt16rev(ctx, arg0, v5);
+                        // Rule at src/isa/s390x/lower.isle line 2436.
+                        return v16;
+                    }
+                    let v17 = C::vxrs_ext2_disabled(ctx, arg0);
+                    if let Some(v18) = v17 {
+                        let v5 = &constructor_lower_address(ctx, arg1, arg2, arg3);
+                        let v19 = constructor_vec_load(ctx, arg0, v5);
+                        let v20 = constructor_vec_elt_rev(ctx, arg0, v19);
+                        // Rule at src/isa/s390x/lower.isle line 2447.
+                        return v20;
+                    }
+                }
+            }
+            0x20 => {
+                if v8.1 == 0x4 {
+                    let v12 = C::vxrs_ext2_enabled(ctx, arg0);
+                    if let Some(v13) = v12 {
+                        let v5 = &constructor_lower_address(ctx, arg1, arg2, arg3);
+                        let v15 = constructor_vec_load_elt32rev(ctx, arg0, v5);
+                        // Rule at src/isa/s390x/lower.isle line 2433.
+                        return v15;
+                    }
+                    let v17 = C::vxrs_ext2_disabled(ctx, arg0);
+                    if let Some(v18) = v17 {
+                        let v5 = &constructor_lower_address(ctx, arg1, arg2, arg3);
+                        let v19 = constructor_vec_load(ctx, arg0, v5);
+                        let v20 = constructor_vec_elt_rev(ctx, arg0, v19);
+                        // Rule at src/isa/s390x/lower.isle line 2444.
+                        return v20;
+                    }
+                }
+            }
+            0x40 => {
+                if v8.1 == 0x2 {
+                    let v12 = C::vxrs_ext2_enabled(ctx, arg0);
+                    if let Some(v13) = v12 {
+                        let v5 = &constructor_lower_address(ctx, arg1, arg2, arg3);
+                        let v14 = constructor_vec_load_elt64rev(ctx, arg0, v5);
+                        // Rule at src/isa/s390x/lower.isle line 2430.
+                        return v14;
+                    }
+                    let v17 = C::vxrs_ext2_disabled(ctx, arg0);
+                    if let Some(v18) = v17 {
+                        let v5 = &constructor_lower_address(ctx, arg1, arg2, arg3);
+                        let v19 = constructor_vec_load(ctx, arg0, v5);
+                        let v20 = constructor_vec_elt_rev(ctx, arg0, v19);
+                        // Rule at src/isa/s390x/lower.isle line 2441.
+                        return v20;
+                    }
+                }
+            }
+            _ => {}
+        }
+    }
+    if arg0 == I128 {
+        let v5 = &constructor_lower_address(ctx, arg1, arg2, arg3);
+        let v6 = constructor_vec_load(ctx, I128, v5);
+        // Rule at src/isa/s390x/lower.isle line 2422.
+        return v6;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_load_elt_rev", "src/isa/s390x/lower.isle line 2418"
+    )
+}
+
+// Generated as internal constructor for term load_v64.
+pub fn constructor_load_v64<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: MemFlags,
+    arg2: Value,
+    arg3: Offset32,
+) -> Reg {
+    let v6 = &C::lane_order(ctx);
+    match v6 {
+        &LaneOrder::LittleEndian => {
+            let v14 = C::multi_lane(ctx, arg0);
+            if let Some(v15) = v14 {
+                match v15.0 {
+                    0x8 => {
+                        if v15.1 == 0x10 {
+                            let v8 = &constructor_lower_address(ctx, arg1, arg2, arg3);
+                            let v13 = constructor_vec_load_lane_little_undef(ctx, I64X2, v8, 0x0);
+                            // Rule at src/isa/s390x/lower.isle line 2598.
+                            return v13;
+                        }
+                    }
+                    0x10 => {
+                        let v2 = C::bigendian(ctx, arg1);
+                        if let Some(v3) = v2 {
+                            if v15.1 == 0x8 {
+                                let v8 = &constructor_lower_address(ctx, arg1, arg2, arg3);
+                                let v13 =
+                                    constructor_vec_load_lane_little_undef(ctx, I64X2, v8, 0x0);
+                                let v21 = constructor_vec_rot_imm(ctx, I16X8, v13, 0x8);
+                                // Rule at src/isa/s390x/lower.isle line 2609.
+                                return v21;
+                            }
+                        }
+                    }
+                    0x20 => {
+                        let v2 = C::bigendian(ctx, arg1);
+                        if let Some(v3) = v2 {
+                            if v15.1 == 0x4 {
+                                let v8 = &constructor_lower_address(ctx, arg1, arg2, arg3);
+                                let v10 = constructor_vec_load_lane_undef(ctx, I64X2, v8, 0x0);
+                                let v24 = constructor_vec_rot_imm(ctx, I64X2, v10, 0x20);
+                                // Rule at src/isa/s390x/lower.isle line 2621.
+                                return v24;
+                            }
+                        }
+                    }
+                    _ => {}
+                }
+            }
+            let v11 = C::littleendian(ctx, arg1);
+            if let Some(v12) = v11 {
+                let v8 = &constructor_lower_address(ctx, arg1, arg2, arg3);
+                let v13 = constructor_vec_load_lane_little_undef(ctx, I64X2, v8, 0x0);
+                // Rule at src/isa/s390x/lower.isle line 2588.
+                return v13;
+            }
+        }
+        &LaneOrder::BigEndian => {
+            let v14 = C::multi_lane(ctx, arg0);
+            if let Some(v15) = v14 {
+                match v15.0 {
+                    0x8 => {
+                        if v15.1 == 0x10 {
+                            let v8 = &constructor_lower_address(ctx, arg1, arg2, arg3);
+                            let v10 = constructor_vec_load_lane_undef(ctx, I64X2, v8, 0x0);
+                            // Rule at src/isa/s390x/lower.isle line 2593.
+                            return v10;
+                        }
+                    }
+                    0x10 => {
+                        let v11 = C::littleendian(ctx, arg1);
+                        if let Some(v12) = v11 {
+                            if v15.1 == 0x8 {
+                                let v8 = &constructor_lower_address(ctx, arg1, arg2, arg3);
+                                let v10 = constructor_vec_load_lane_undef(ctx, I64X2, v8, 0x0);
+                                let v20 = constructor_vec_rot_imm(ctx, I16X8, v10, 0x8);
+                                // Rule at src/isa/s390x/lower.isle line 2603.
+                                return v20;
+                            }
+                        }
+                    }
+                    0x20 => {
+                        let v11 = C::littleendian(ctx, arg1);
+                        if let Some(v12) = v11 {
+                            if v15.1 == 0x4 {
+                                let v8 = &constructor_lower_address(ctx, arg1, arg2, arg3);
+                                let v13 =
+                                    constructor_vec_load_lane_little_undef(ctx, I64X2, v8, 0x0);
+                                let v23 = constructor_vec_rot_imm(ctx, I64X2, v13, 0x20);
+                                // Rule at src/isa/s390x/lower.isle line 2615.
+                                return v23;
+                            }
+                        }
+                    }
+                    _ => {}
+                }
+            }
+            let v2 = C::bigendian(ctx, arg1);
+            if let Some(v3) = v2 {
+                let v8 = &constructor_lower_address(ctx, arg1, arg2, arg3);
+                let v10 = constructor_vec_load_lane_undef(ctx, I64X2, v8, 0x0);
+                // Rule at src/isa/s390x/lower.isle line 2583.
+                return v10;
+            }
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "load_v64", "src/isa/s390x/lower.isle line 2580"
+    )
+}
+
+// Generated as internal constructor for term vec_store_full_rev.
+pub fn constructor_vec_store_full_rev<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: MemFlags,
+    arg3: Value,
+    arg4: Offset32,
+) -> SideEffectNoResult {
+    let v1 = C::vxrs_ext2_enabled(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v7 = &constructor_lower_address(ctx, arg2, arg3, arg4);
+        let v8 = &constructor_vec_storerev(ctx, arg1, v7);
+        // Rule at src/isa/s390x/lower.isle line 2705.
+        return v8.clone();
+    }
+    let v9 = C::vxrs_ext2_disabled(ctx, arg0);
+    if let Some(v10) = v9 {
+        let v12 = &constructor_lower_address_bias(ctx, arg2, arg3, arg4, 0x0);
+        let v14 = &constructor_lower_address_bias(ctx, arg2, arg3, arg4, 0x8);
+        let v17 = C::zero_reg(ctx);
+        let v18 = constructor_vec_extract_lane(ctx, I64X2, arg1, 0x1, v17);
+        let v19 = C::zero_reg(ctx);
+        let v20 = constructor_vec_extract_lane(ctx, I64X2, arg1, 0x0, v19);
+        let v21 = &constructor_storerev64(ctx, v18, v12);
+        let v22 = &constructor_storerev64(ctx, v20, v14);
+        let v23 = &constructor_side_effect_concat(ctx, v21, v22);
+        // Rule at src/isa/s390x/lower.isle line 2709.
+        return v23.clone();
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_store_full_rev", "src/isa/s390x/lower.isle line 2702"
+    )
+}
+
+// Generated as internal constructor for term vec_store_byte_rev.
+pub fn constructor_vec_store_byte_rev<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: MemFlags,
+    arg3: Value,
+    arg4: Offset32,
+) -> SideEffectNoResult {
+    let v7 = C::multi_lane(ctx, arg0);
+    if let Some(v8) = v7 {
+        match v8.0 {
+            0x8 => {
+                if v8.1 == 0x10 {
+                    let v11 = &constructor_lower_address(ctx, arg2, arg3, arg4);
+                    let v12 = &constructor_vec_store(ctx, arg1, v11);
+                    // Rule at src/isa/s390x/lower.isle line 2726.
+                    return v12.clone();
+                }
+            }
+            0x10 => {
+                if v8.1 == 0x8 {
+                    let v13 = C::vxrs_ext2_enabled(ctx, arg0);
+                    if let Some(v14) = v13 {
+                        let v11 = &constructor_lower_address(ctx, arg2, arg3, arg4);
+                        let v17 = &constructor_vec_store_byte16rev(ctx, arg1, v11);
+                        // Rule at src/isa/s390x/lower.isle line 2736.
+                        return v17.clone();
+                    }
+                    let v18 = C::vxrs_ext2_disabled(ctx, arg0);
+                    if let Some(v19) = v18 {
+                        let v20 = constructor_vec_elt_rev(ctx, arg0, arg1);
+                        let v21 = &constructor_vec_store_full_rev(ctx, arg0, v20, arg2, arg3, arg4);
+                        // Rule at src/isa/s390x/lower.isle line 2747.
+                        return v21.clone();
+                    }
+                }
+            }
+            0x20 => {
+                if v8.1 == 0x4 {
+                    let v13 = C::vxrs_ext2_enabled(ctx, arg0);
+                    if let Some(v14) = v13 {
+                        let v11 = &constructor_lower_address(ctx, arg2, arg3, arg4);
+                        let v16 = &constructor_vec_store_byte32rev(ctx, arg1, v11);
+                        // Rule at src/isa/s390x/lower.isle line 2733.
+                        return v16.clone();
+                    }
+                    let v18 = C::vxrs_ext2_disabled(ctx, arg0);
+                    if let Some(v19) = v18 {
+                        let v20 = constructor_vec_elt_rev(ctx, arg0, arg1);
+                        let v21 = &constructor_vec_store_full_rev(ctx, arg0, v20, arg2, arg3, arg4);
+                        // Rule at src/isa/s390x/lower.isle line 2744.
+                        return v21.clone();
+                    }
+                }
+            }
+            0x40 => {
+                if v8.1 == 0x2 {
+                    let v13 = C::vxrs_ext2_enabled(ctx, arg0);
+                    if let Some(v14) = v13 {
+                        let v11 = &constructor_lower_address(ctx, arg2, arg3, arg4);
+                        let v15 = &constructor_vec_store_byte64rev(ctx, arg1, v11);
+                        // Rule at src/isa/s390x/lower.isle line 2730.
+                        return v15.clone();
+                    }
+                    let v18 = C::vxrs_ext2_disabled(ctx, arg0);
+                    if let Some(v19) = v18 {
+                        let v20 = constructor_vec_elt_rev(ctx, arg0, arg1);
+                        let v21 = &constructor_vec_store_full_rev(ctx, arg0, v20, arg2, arg3, arg4);
+                        // Rule at src/isa/s390x/lower.isle line 2741.
+                        return v21.clone();
+                    }
+                }
+            }
+            _ => {}
+        }
+    }
+    if arg0 == I128 {
+        let v6 = &constructor_vec_store_full_rev(ctx, I128, arg1, arg2, arg3, arg4);
+        // Rule at src/isa/s390x/lower.isle line 2722.
+        return v6.clone();
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_store_byte_rev", "src/isa/s390x/lower.isle line 2719"
+    )
+}
+
+// Generated as internal constructor for term vec_store_elt_rev.
+pub fn constructor_vec_store_elt_rev<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Reg,
+    arg2: MemFlags,
+    arg3: Value,
+    arg4: Offset32,
+) -> SideEffectNoResult {
+    let v7 = C::multi_lane(ctx, arg0);
+    if let Some(v8) = v7 {
+        match v8.0 {
+            0x8 => {
+                if v8.1 == 0x10 {
+                    let v11 = &constructor_vec_store_full_rev(ctx, arg0, arg1, arg2, arg3, arg4);
+                    // Rule at src/isa/s390x/lower.isle line 2760.
+                    return v11.clone();
+                }
+            }
+            0x10 => {
+                if v8.1 == 0x8 {
+                    let v12 = C::vxrs_ext2_enabled(ctx, arg0);
+                    if let Some(v13) = v12 {
+                        let v5 = &constructor_lower_address(ctx, arg2, arg3, arg4);
+                        let v16 = &constructor_vec_store_elt16rev(ctx, arg1, v5);
+                        // Rule at src/isa/s390x/lower.isle line 2770.
+                        return v16.clone();
+                    }
+                    let v17 = C::vxrs_ext2_disabled(ctx, arg0);
+                    if let Some(v18) = v17 {
+                        let v19 = constructor_vec_elt_rev(ctx, arg0, arg1);
+                        let v20 = &constructor_lower_address(ctx, arg2, arg3, arg4);
+                        let v21 = &constructor_vec_store(ctx, v19, v20);
+                        // Rule at src/isa/s390x/lower.isle line 2781.
+                        return v21.clone();
+                    }
+                }
+            }
+            0x20 => {
+                if v8.1 == 0x4 {
+                    let v12 = C::vxrs_ext2_enabled(ctx, arg0);
+                    if let Some(v13) = v12 {
+                        let v5 = &constructor_lower_address(ctx, arg2, arg3, arg4);
+                        let v15 = &constructor_vec_store_elt32rev(ctx, arg1, v5);
+                        // Rule at src/isa/s390x/lower.isle line 2767.
+                        return v15.clone();
+                    }
+                    let v17 = C::vxrs_ext2_disabled(ctx, arg0);
+                    if let Some(v18) = v17 {
+                        let v19 = constructor_vec_elt_rev(ctx, arg0, arg1);
+                        let v20 = &constructor_lower_address(ctx, arg2, arg3, arg4);
+                        let v21 = &constructor_vec_store(ctx, v19, v20);
+                        // Rule at src/isa/s390x/lower.isle line 2778.
+                        return v21.clone();
+                    }
+                }
+            }
+            0x40 => {
+                if v8.1 == 0x2 {
+                    let v12 = C::vxrs_ext2_enabled(ctx, arg0);
+                    if let Some(v13) = v12 {
+                        let v5 = &constructor_lower_address(ctx, arg2, arg3, arg4);
+                        let v14 = &constructor_vec_store_elt64rev(ctx, arg1, v5);
+                        // Rule at src/isa/s390x/lower.isle line 2764.
+                        return v14.clone();
+                    }
+                    let v17 = C::vxrs_ext2_disabled(ctx, arg0);
+                    if let Some(v18) = v17 {
+                        let v19 = constructor_vec_elt_rev(ctx, arg0, arg1);
+                        let v20 = &constructor_lower_address(ctx, arg2, arg3, arg4);
+                        let v21 = &constructor_vec_store(ctx, v19, v20);
+                        // Rule at src/isa/s390x/lower.isle line 2775.
+                        return v21.clone();
+                    }
+                }
+            }
+            _ => {}
+        }
+    }
+    if arg0 == I128 {
+        let v5 = &constructor_lower_address(ctx, arg2, arg3, arg4);
+        let v6 = &constructor_vec_store(ctx, arg1, v5);
+        // Rule at src/isa/s390x/lower.isle line 2756.
+        return v6.clone();
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_store_elt_rev", "src/isa/s390x/lower.isle line 2753"
+    )
+}
+
+// Generated as internal constructor for term istore8_impl.
+pub fn constructor_istore8_impl<C: Context>(
+    ctx: &mut C,
+    arg0: MemFlags,
+    arg1: Value,
+    arg2: Value,
+    arg3: Offset32,
+) -> SideEffectNoResult {
+    let v7 = C::u8_from_value(ctx, arg1);
+    if let Some(v8) = v7 {
+        let v9 = &constructor_lower_address(ctx, arg0, arg2, arg3);
+        let v10 = &constructor_store8_imm(ctx, v8, v9);
+        // Rule at src/isa/s390x/lower.isle line 2800.
+        return v10.clone();
+    }
+    let v4 = C::put_in_reg(ctx, arg1);
+    let v5 = &constructor_lower_address(ctx, arg0, arg2, arg3);
+    let v6 = &constructor_store8(ctx, v4, v5);
+    // Rule at src/isa/s390x/lower.isle line 2796.
+    return v6.clone();
+}
+
+// Generated as internal constructor for term istore16_impl.
+pub fn constructor_istore16_impl<C: Context>(
+    ctx: &mut C,
+    arg0: MemFlags,
+    arg1: Value,
+    arg2: Value,
+    arg3: Offset32,
+) -> SideEffectNoResult {
+    let v1 = C::bigendian(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v12 = C::i16_from_value(ctx, arg1);
+        if let Some(v13) = v12 {
+            let v14 = &constructor_lower_address(ctx, arg0, arg2, arg3);
+            let v15 = &constructor_store16_imm(ctx, v13, v14);
+            // Rule at src/isa/s390x/lower.isle line 2822.
+            return v15.clone();
+        }
+        let v6 = C::put_in_reg(ctx, arg1);
+        let v7 = &constructor_lower_address(ctx, arg0, arg2, arg3);
+        let v8 = &constructor_store16(ctx, v6, v7);
+        // Rule at src/isa/s390x/lower.isle line 2814.
+        return v8.clone();
+    }
+    let v9 = C::littleendian(ctx, arg0);
+    if let Some(v10) = v9 {
+        let v16 = C::i16_from_swapped_value(ctx, arg1);
+        if let Some(v17) = v16 {
+            let v14 = &constructor_lower_address(ctx, arg0, arg2, arg3);
+            let v18 = &constructor_store16_imm(ctx, v17, v14);
+            // Rule at src/isa/s390x/lower.isle line 2826.
+            return v18.clone();
+        }
+        let v6 = C::put_in_reg(ctx, arg1);
+        let v7 = &constructor_lower_address(ctx, arg0, arg2, arg3);
+        let v11 = &constructor_storerev16(ctx, v6, v7);
+        // Rule at src/isa/s390x/lower.isle line 2818.
+        return v11.clone();
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "istore16_impl", "src/isa/s390x/lower.isle line 2811"
+    )
+}
+
+// Generated as internal constructor for term istore32_impl.
+pub fn constructor_istore32_impl<C: Context>(
+    ctx: &mut C,
+    arg0: MemFlags,
+    arg1: Value,
+    arg2: Value,
+    arg3: Offset32,
+) -> SideEffectNoResult {
+    let v1 = C::bigendian(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v9 = C::i16_from_value(ctx, arg1);
+        if let Some(v10) = v9 {
+            let v11 = &constructor_lower_address(ctx, arg0, arg2, arg3);
+            let v12 = &constructor_store32_simm16(ctx, v10, v11);
+            // Rule at src/isa/s390x/lower.isle line 2844.
+            return v12.clone();
+        }
+        let v6 = C::put_in_reg(ctx, arg1);
+        let v7 = &constructor_lower_address(ctx, arg0, arg2, arg3);
+        let v8 = &constructor_store32(ctx, v6, v7);
+        // Rule at src/isa/s390x/lower.isle line 2840.
+        return v8.clone();
+    }
+    let v13 = C::littleendian(ctx, arg0);
+    if let Some(v14) = v13 {
+        let v6 = C::put_in_reg(ctx, arg1);
+        let v7 = &constructor_lower_address(ctx, arg0, arg2, arg3);
+        let v15 = &constructor_storerev32(ctx, v6, v7);
+        // Rule at src/isa/s390x/lower.isle line 2848.
+        return v15.clone();
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "istore32_impl", "src/isa/s390x/lower.isle line 2837"
+    )
+}
+
+// Generated as internal constructor for term istore64_impl.
+pub fn constructor_istore64_impl<C: Context>(
+    ctx: &mut C,
+    arg0: MemFlags,
+    arg1: Value,
+    arg2: Value,
+    arg3: Offset32,
+) -> SideEffectNoResult {
+    let v1 = C::bigendian(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v9 = C::i16_from_value(ctx, arg1);
+        if let Some(v10) = v9 {
+            let v11 = &constructor_lower_address(ctx, arg0, arg2, arg3);
+            let v12 = &constructor_store64_simm16(ctx, v10, v11);
+            // Rule at src/isa/s390x/lower.isle line 2862.
+            return v12.clone();
+        }
+        let v6 = C::put_in_reg(ctx, arg1);
+        let v7 = &constructor_lower_address(ctx, arg0, arg2, arg3);
+        let v8 = &constructor_store64(ctx, v6, v7);
+        // Rule at src/isa/s390x/lower.isle line 2858.
+        return v8.clone();
+    }
+    let v13 = C::littleendian(ctx, arg0);
+    if let Some(v14) = v13 {
+        let v6 = C::put_in_reg(ctx, arg1);
+        let v7 = &constructor_lower_address(ctx, arg0, arg2, arg3);
+        let v15 = &constructor_storerev64(ctx, v6, v7);
+        // Rule at src/isa/s390x/lower.isle line 2866.
+        return v15.clone();
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "istore64_impl", "src/isa/s390x/lower.isle line 2855"
+    )
+}
+
+// Generated as internal constructor for term atomic_rmw_body.
+pub fn constructor_atomic_rmw_body<C: Context>(
+    ctx: &mut C,
+    arg0: &VecMInstBuilder,
+    arg1: Type,
+    arg2: MemFlags,
+    arg3: &AtomicRmwOp,
+    arg4: WritableReg,
+    arg5: Reg,
+    arg6: Reg,
+) -> Reg {
+    match arg3 {
+        &AtomicRmwOp::Add => {
+            let v38 = constructor_ty_ext32(ctx, arg1);
+            let v39 = &constructor_aluop_add(ctx, v38);
+            let v40 =
+                constructor_atomic_rmw_body_addsub(ctx, arg0, arg1, arg2, v39, arg4, arg5, arg6);
+            // Rule at src/isa/s390x/lower.isle line 3029.
+            return v40;
+        }
+        &AtomicRmwOp::And => {
+            let v27 = C::ty_8_or_16(ctx, arg1);
+            if let Some(v28) = v27 {
+                let v32 = constructor_atomic_rmw_body_rxsbg(
+                    ctx,
+                    arg0,
+                    v28,
+                    arg2,
+                    &RxSBGOp::And,
+                    arg4,
+                    arg5,
+                    arg6,
+                );
+                // Rule at src/isa/s390x/lower.isle line 2991.
+                return v32;
+            }
+        }
+        &AtomicRmwOp::Nand => {
+            let v2 = C::ty_32_or_64(ctx, arg1);
+            if let Some(v3) = v2 {
+                let v14 = C::mie2_enabled(ctx, arg1);
+                if let Some(v15) = v14 {
+                    let v5 = C::bigendian(ctx, arg2);
+                    if let Some(v6) = v5 {
+                        let v16 = &constructor_aluop_not_and(ctx, v3);
+                        let v17 = constructor_push_alu_reg(ctx, arg0, v16, arg4, arg5, arg6);
+                        // Rule at src/isa/s390x/lower.isle line 2971.
+                        return v17;
+                    }
+                    let v11 = C::littleendian(ctx, arg2);
+                    if let Some(v12) = v11 {
+                        let v16 = &constructor_aluop_not_and(ctx, v3);
+                        let v18 = constructor_bswap_reg(ctx, v3, arg6);
+                        let v19 = constructor_push_alu_reg(ctx, arg0, v16, arg4, arg5, v18);
+                        // Rule at src/isa/s390x/lower.isle line 2974.
+                        return v19;
+                    }
+                }
+                let v20 = C::mie2_disabled(ctx, arg1);
+                if let Some(v21) = v20 {
+                    let v5 = C::bigendian(ctx, arg2);
+                    if let Some(v6) = v5 {
+                        let v22 = &constructor_aluop_and(ctx, v3);
+                        let v23 = constructor_push_alu_reg(ctx, arg0, v22, arg4, arg5, arg6);
+                        let v24 = constructor_push_not_reg(ctx, arg0, v3, arg4, v23);
+                        // Rule at src/isa/s390x/lower.isle line 2977.
+                        return v24;
+                    }
+                    let v11 = C::littleendian(ctx, arg2);
+                    if let Some(v12) = v11 {
+                        let v22 = &constructor_aluop_and(ctx, v3);
+                        let v18 = constructor_bswap_reg(ctx, v3, arg6);
+                        let v25 = constructor_push_alu_reg(ctx, arg0, v22, arg4, arg5, v18);
+                        let v26 = constructor_push_not_reg(ctx, arg0, v3, arg4, v25);
+                        // Rule at src/isa/s390x/lower.isle line 2981.
+                        return v26;
+                    }
+                }
+            }
+            let v27 = C::ty_8_or_16(ctx, arg1);
+            if let Some(v28) = v27 {
+                let v32 = constructor_atomic_rmw_body_rxsbg(
+                    ctx,
+                    arg0,
+                    v28,
+                    arg2,
+                    &RxSBGOp::And,
+                    arg4,
+                    arg5,
+                    arg6,
+                );
+                let v37 = constructor_atomic_rmw_body_invert(ctx, arg0, v28, arg2, arg4, v32);
+                // Rule at src/isa/s390x/lower.isle line 2997.
+                return v37;
+            }
+        }
+        &AtomicRmwOp::Or => {
+            let v27 = C::ty_8_or_16(ctx, arg1);
+            if let Some(v28) = v27 {
+                let v34 = constructor_atomic_rmw_body_rxsbg(
+                    ctx,
+                    arg0,
+                    v28,
+                    arg2,
+                    &RxSBGOp::Or,
+                    arg4,
+                    arg5,
+                    arg6,
+                );
+                // Rule at src/isa/s390x/lower.isle line 2993.
+                return v34;
+            }
+        }
+        &AtomicRmwOp::Smax => {
+            let v38 = constructor_ty_ext32(ctx, arg1);
+            let v43 = &constructor_cmpop_cmps(ctx, v38);
+            let v48 = &C::intcc_as_cond(ctx, &IntCC::SignedGreaterThan);
+            let v49 = constructor_atomic_rmw_body_minmax(
+                ctx, arg0, arg1, arg2, v43, v48, arg4, arg5, arg6,
+            );
+            // Rule at src/isa/s390x/lower.isle line 3070.
+            return v49;
+        }
+        &AtomicRmwOp::Smin => {
+            let v38 = constructor_ty_ext32(ctx, arg1);
+            let v43 = &constructor_cmpop_cmps(ctx, v38);
+            let v45 = &C::intcc_as_cond(ctx, &IntCC::SignedLessThan);
+            let v46 = constructor_atomic_rmw_body_minmax(
+                ctx, arg0, arg1, arg2, v43, v45, arg4, arg5, arg6,
+            );
+            // Rule at src/isa/s390x/lower.isle line 3067.
+            return v46;
+        }
+        &AtomicRmwOp::Sub => {
+            let v38 = constructor_ty_ext32(ctx, arg1);
+            let v41 = &constructor_aluop_sub(ctx, v38);
+            let v42 =
+                constructor_atomic_rmw_body_addsub(ctx, arg0, arg1, arg2, v41, arg4, arg5, arg6);
+            // Rule at src/isa/s390x/lower.isle line 3031.
+            return v42;
+        }
+        &AtomicRmwOp::Umax => {
+            let v38 = constructor_ty_ext32(ctx, arg1);
+            let v50 = &constructor_cmpop_cmpu(ctx, v38);
+            let v55 = &C::intcc_as_cond(ctx, &IntCC::UnsignedGreaterThan);
+            let v56 = constructor_atomic_rmw_body_minmax(
+                ctx, arg0, arg1, arg2, v50, v55, arg4, arg5, arg6,
+            );
+            // Rule at src/isa/s390x/lower.isle line 3076.
+            return v56;
+        }
+        &AtomicRmwOp::Umin => {
+            let v38 = constructor_ty_ext32(ctx, arg1);
+            let v50 = &constructor_cmpop_cmpu(ctx, v38);
+            let v52 = &C::intcc_as_cond(ctx, &IntCC::UnsignedLessThan);
+            let v53 = constructor_atomic_rmw_body_minmax(
+                ctx, arg0, arg1, arg2, v50, v52, arg4, arg5, arg6,
+            );
+            // Rule at src/isa/s390x/lower.isle line 3073.
+            return v53;
+        }
+        &AtomicRmwOp::Xchg => {
+            let v2 = C::ty_32_or_64(ctx, arg1);
+            if let Some(v3) = v2 {
+                let v5 = C::bigendian(ctx, arg2);
+                if let Some(v6) = v5 {
+                    // Rule at src/isa/s390x/lower.isle line 2960.
+                    return arg6;
+                }
+                let v11 = C::littleendian(ctx, arg2);
+                if let Some(v12) = v11 {
+                    let v13 = constructor_bswap_reg(ctx, v3, arg6);
+                    // Rule at src/isa/s390x/lower.isle line 2963.
+                    return v13;
+                }
+            }
+            let v27 = C::ty_8_or_16(ctx, arg1);
+            if let Some(v28) = v27 {
+                let v30 = constructor_atomic_rmw_body_rxsbg(
+                    ctx,
+                    arg0,
+                    v28,
+                    arg2,
+                    &RxSBGOp::Insert,
+                    arg4,
+                    arg5,
+                    arg6,
+                );
+                // Rule at src/isa/s390x/lower.isle line 2989.
+                return v30;
+            }
+        }
+        &AtomicRmwOp::Xor => {
+            let v27 = C::ty_8_or_16(ctx, arg1);
+            if let Some(v28) = v27 {
+                let v36 = constructor_atomic_rmw_body_rxsbg(
+                    ctx,
+                    arg0,
+                    v28,
+                    arg2,
+                    &RxSBGOp::Xor,
+                    arg4,
+                    arg5,
+                    arg6,
+                );
+                // Rule at src/isa/s390x/lower.isle line 2995.
+                return v36;
+            }
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "atomic_rmw_body", "src/isa/s390x/lower.isle line 2955"
+    )
+}
+
+// Generated as internal constructor for term atomic_rmw_body_rxsbg.
+pub fn constructor_atomic_rmw_body_rxsbg<C: Context>(
+    ctx: &mut C,
+    arg0: &VecMInstBuilder,
+    arg1: Type,
+    arg2: MemFlags,
+    arg3: &RxSBGOp,
+    arg4: WritableReg,
+    arg5: Reg,
+    arg6: Reg,
+) -> Reg {
+    match arg1 {
+        I8 => {
+            let v10 = constructor_push_rxsbg(ctx, arg0, arg3, arg4, arg5, arg6, 0x20, 0x28, 0x18);
+            // Rule at src/isa/s390x/lower.isle line 3005.
+            return v10;
+        }
+        I16 => {
+            let v11 = C::bigendian(ctx, arg2);
+            if let Some(v12) = v11 {
+                let v15 =
+                    constructor_push_rxsbg(ctx, arg0, arg3, arg4, arg5, arg6, 0x20, 0x30, 0x10);
+                // Rule at src/isa/s390x/lower.isle line 3009.
+                return v15;
+            }
+            let v16 = C::littleendian(ctx, arg2);
+            if let Some(v17) = v16 {
+                let v19 = constructor_bswap_reg(ctx, I32, arg6);
+                let v22 =
+                    constructor_push_rxsbg(ctx, arg0, arg3, arg4, arg5, v19, 0x30, 0x40, -0x10);
+                // Rule at src/isa/s390x/lower.isle line 3013.
+                return v22;
+            }
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "atomic_rmw_body_rxsbg", "src/isa/s390x/lower.isle line 3002"
+    )
+}
+
+// Generated as internal constructor for term atomic_rmw_body_invert.
+pub fn constructor_atomic_rmw_body_invert<C: Context>(
+    ctx: &mut C,
+    arg0: &VecMInstBuilder,
+    arg1: Type,
+    arg2: MemFlags,
+    arg3: WritableReg,
+    arg4: Reg,
+) -> Reg {
+    match arg1 {
+        I8 => {
+            let v8 = C::uimm32shifted(ctx, 0xFF000000, 0x0);
+            let v9 = constructor_push_xor_uimm32shifted(ctx, arg0, I32, arg3, arg4, v8);
+            // Rule at src/isa/s390x/lower.isle line 3019.
+            return v9;
+        }
+        I16 => {
+            let v10 = C::bigendian(ctx, arg2);
+            if let Some(v11) = v10 {
+                let v13 = C::uimm32shifted(ctx, 0xFFFF0000, 0x0);
+                let v14 = constructor_push_xor_uimm32shifted(ctx, arg0, I32, arg3, arg4, v13);
+                // Rule at src/isa/s390x/lower.isle line 3022.
+                return v14;
+            }
+            let v15 = C::littleendian(ctx, arg2);
+            if let Some(v16) = v15 {
+                let v18 = C::uimm32shifted(ctx, 0xFFFF, 0x0);
+                let v19 = constructor_push_xor_uimm32shifted(ctx, arg0, I32, arg3, arg4, v18);
+                // Rule at src/isa/s390x/lower.isle line 3025.
+                return v19;
+            }
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "atomic_rmw_body_invert", "src/isa/s390x/lower.isle line 3017"
+    )
+}
+
+// Generated as internal constructor for term atomic_rmw_body_addsub.
+pub fn constructor_atomic_rmw_body_addsub<C: Context>(
+    ctx: &mut C,
+    arg0: &VecMInstBuilder,
+    arg1: Type,
+    arg2: MemFlags,
+    arg3: &ALUOp,
+    arg4: WritableReg,
+    arg5: Reg,
+    arg6: Reg,
+) -> Reg {
+    let v5 = C::bigendian(ctx, arg2);
+    if let Some(v6) = v5 {
+        if arg1 == I16 {
+            let v22 = constructor_lshl_imm(ctx, I32, arg6, 0x10);
+            let v23 = constructor_push_alu_reg(ctx, arg0, arg3, arg4, arg5, v22);
+            // Rule at src/isa/s390x/lower.isle line 3052.
+            return v23;
+        }
+        let v2 = C::ty_32_or_64(ctx, arg1);
+        if let Some(v3) = v2 {
+            let v11 = constructor_push_alu_reg(ctx, arg0, arg3, arg4, arg5, arg6);
+            // Rule at src/isa/s390x/lower.isle line 3038.
+            return v11;
+        }
+    }
+    let v12 = C::littleendian(ctx, arg2);
+    if let Some(v13) = v12 {
+        let v2 = C::ty_32_or_64(ctx, arg1);
+        if let Some(v3) = v2 {
+            let v14 = constructor_push_bswap_reg(ctx, arg0, v3, arg4, arg5);
+            let v15 = constructor_push_alu_reg(ctx, arg0, arg3, arg4, v14, arg6);
+            let v16 = constructor_push_bswap_reg(ctx, arg0, v3, arg4, v15);
+            // Rule at src/isa/s390x/lower.isle line 3042.
+            return v16;
+        }
+        if arg1 == I16 {
+            let v22 = constructor_lshl_imm(ctx, I32, arg6, 0x10);
+            let v24 = constructor_push_bswap_reg(ctx, arg0, I32, arg4, arg5);
+            let v25 = constructor_push_alu_reg(ctx, arg0, arg3, arg4, v24, v22);
+            let v26 = constructor_push_bswap_reg(ctx, arg0, I32, arg4, v25);
+            // Rule at src/isa/s390x/lower.isle line 3060.
+            return v26;
+        }
+    }
+    if arg1 == I8 {
+        let v19 = constructor_lshl_imm(ctx, I32, arg6, 0x18);
+        let v20 = constructor_push_alu_reg(ctx, arg0, arg3, arg4, arg5, v19);
+        // Rule at src/isa/s390x/lower.isle line 3048.
+        return v20;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "atomic_rmw_body_addsub", "src/isa/s390x/lower.isle line 3035"
+    )
+}
+
+// Generated as internal constructor for term atomic_rmw_body_minmax.
+pub fn constructor_atomic_rmw_body_minmax<C: Context>(
+    ctx: &mut C,
+    arg0: &VecMInstBuilder,
+    arg1: Type,
+    arg2: MemFlags,
+    arg3: &CmpOp,
+    arg4: &Cond,
+    arg5: WritableReg,
+    arg6: Reg,
+    arg7: Reg,
+) -> Reg {
+    let v5 = C::bigendian(ctx, arg2);
+    if let Some(v6) = v5 {
+        if arg1 == I16 {
+            let v33 = constructor_lshl_imm(ctx, I32, arg7, 0x10);
+            let v34 = &constructor_cmp_rr(ctx, arg3, v33, arg6);
+            let v19 = &C::invert_cond(ctx, arg4);
+            let v35 = constructor_push_break_if(ctx, arg0, v34, v19);
+            let v37 = constructor_push_rxsbg(
+                ctx,
+                arg0,
+                &RxSBGOp::Insert,
+                arg5,
+                arg6,
+                v33,
+                0x20,
+                0x30,
+                0x0,
+            );
+            // Rule at src/isa/s390x/lower.isle line 3111.
+            return v37;
+        }
+        let v2 = C::ty_32_or_64(ctx, arg1);
+        if let Some(v3) = v2 {
+            let v12 = &constructor_cmp_rr(ctx, arg3, arg7, arg6);
+            let v13 = &C::invert_cond(ctx, arg4);
+            let v14 = constructor_push_break_if(ctx, arg0, v12, v13);
+            // Rule at src/isa/s390x/lower.isle line 3086.
+            return arg7;
+        }
+    }
+    let v15 = C::littleendian(ctx, arg2);
+    if let Some(v16) = v15 {
+        let v2 = C::ty_32_or_64(ctx, arg1);
+        if let Some(v3) = v2 {
+            let v17 = constructor_push_bswap_reg(ctx, arg0, v3, arg5, arg6);
+            let v18 = &constructor_cmp_rr(ctx, arg3, arg7, v17);
+            let v19 = &C::invert_cond(ctx, arg4);
+            let v20 = constructor_push_break_if(ctx, arg0, v18, v19);
+            let v21 = constructor_push_bswap_reg(ctx, arg0, v3, arg5, arg7);
+            // Rule at src/isa/s390x/lower.isle line 3093.
+            return v21;
+        }
+        if arg1 == I16 {
+            let v33 = constructor_lshl_imm(ctx, I32, arg7, 0x10);
+            let v38 = constructor_push_bswap_reg(ctx, arg0, I32, arg5, arg6);
+            let v39 = &constructor_cmp_rr(ctx, arg3, v33, v38);
+            let v40 = &C::invert_cond(ctx, arg4);
+            let v41 = constructor_push_break_if(ctx, arg0, v39, v40);
+            let v42 = constructor_push_rxsbg(
+                ctx,
+                arg0,
+                &RxSBGOp::Insert,
+                arg5,
+                v38,
+                v33,
+                0x20,
+                0x30,
+                0x0,
+            );
+            let v43 = constructor_push_bswap_reg(ctx, arg0, I32, arg5, v42);
+            // Rule at src/isa/s390x/lower.isle line 3118.
+            return v43;
+        }
+    }
+    if arg1 == I8 {
+        let v24 = constructor_lshl_imm(ctx, I32, arg7, 0x18);
+        let v25 = &constructor_cmp_rr(ctx, arg3, v24, arg6);
+        let v19 = &C::invert_cond(ctx, arg4);
+        let v26 = constructor_push_break_if(ctx, arg0, v25, v19);
+        let v31 = constructor_push_rxsbg(
+            ctx,
+            arg0,
+            &RxSBGOp::Insert,
+            arg5,
+            arg6,
+            v24,
+            0x20,
+            0x28,
+            0x0,
+        );
+        // Rule at src/isa/s390x/lower.isle line 3105.
+        return v31;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "atomic_rmw_body_minmax", "src/isa/s390x/lower.isle line 3081"
+    )
+}
+
+// Generated as internal constructor for term atomic_cas_body.
+pub fn constructor_atomic_cas_body<C: Context>(
+    ctx: &mut C,
+    arg0: &VecMInstBuilder,
+    arg1: Type,
+    arg2: MemFlags,
+    arg3: WritableReg,
+    arg4: Reg,
+    arg5: Reg,
+    arg6: Reg,
+) -> Reg {
+    match arg1 {
+        I8 => {
+            let v11 = &constructor_rxsbg_test(ctx, &RxSBGOp::Xor, arg4, arg5, 0x20, 0x28, 0x18);
+            let v13 = &C::intcc_as_cond(ctx, &IntCC::NotEqual);
+            let v14 = constructor_push_break_if(ctx, arg0, v11, v13);
+            let v16 = constructor_push_rxsbg(
+                ctx,
+                arg0,
+                &RxSBGOp::Insert,
+                arg3,
+                arg4,
+                arg6,
+                0x20,
+                0x28,
+                0x18,
+            );
+            // Rule at src/isa/s390x/lower.isle line 3170.
+            return v16;
+        }
+        I16 => {
+            let v17 = C::bigendian(ctx, arg2);
+            if let Some(v18) = v17 {
+                let v21 = &constructor_rxsbg_test(ctx, &RxSBGOp::Xor, arg4, arg5, 0x20, 0x30, 0x10);
+                let v13 = &C::intcc_as_cond(ctx, &IntCC::NotEqual);
+                let v22 = constructor_push_break_if(ctx, arg0, v21, v13);
+                let v23 = constructor_push_rxsbg(
+                    ctx,
+                    arg0,
+                    &RxSBGOp::Insert,
+                    arg3,
+                    arg4,
+                    arg6,
+                    0x20,
+                    0x30,
+                    0x10,
+                );
+                // Rule at src/isa/s390x/lower.isle line 3177.
+                return v23;
+            }
+            let v24 = C::littleendian(ctx, arg2);
+            if let Some(v25) = v24 {
+                let v27 = constructor_bswap_reg(ctx, I32, arg5);
+                let v28 = constructor_bswap_reg(ctx, I32, arg6);
+                let v31 = &constructor_rxsbg_test(ctx, &RxSBGOp::Xor, arg4, v27, 0x30, 0x40, -0x10);
+                let v32 = &C::intcc_as_cond(ctx, &IntCC::NotEqual);
+                let v33 = constructor_push_break_if(ctx, arg0, v31, v32);
+                let v34 = constructor_push_rxsbg(
+                    ctx,
+                    arg0,
+                    &RxSBGOp::Insert,
+                    arg3,
+                    arg4,
+                    v28,
+                    0x30,
+                    0x40,
+                    -0x10,
+                );
+                // Rule at src/isa/s390x/lower.isle line 3188.
+                return v34;
+            }
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "atomic_cas_body", "src/isa/s390x/lower.isle line 3163"
+    )
+}
+
+// Generated as internal constructor for term atomic_store_impl.
+pub fn constructor_atomic_store_impl<C: Context>(
+    ctx: &mut C,
+    arg0: &SideEffectNoResult,
+) -> InstOutput {
+    let v1 = constructor_side_effect(ctx, arg0);
+    let v2 = &constructor_fence_impl(ctx);
+    let v3 = constructor_side_effect(ctx, v2);
+    // Rule at src/isa/s390x/lower.isle line 3234.
+    return v3;
+}
+
+// Generated as internal constructor for term icmp_val.
+pub fn constructor_icmp_val<C: Context>(
+    ctx: &mut C,
+    arg0: bool,
+    arg1: &IntCC,
+    arg2: Value,
+    arg3: Value,
+) -> ProducesBool {
+    match arg1 {
+        &IntCC::Equal => {
+            let v5 = C::value_type(ctx, arg2);
+            let v16 = C::vr128_ty(ctx, v5);
+            if let Some(v17) = v16 {
+                let v19 = C::put_in_reg(ctx, arg2);
+                let v20 = C::put_in_reg(ctx, arg3);
+                let v21 = &constructor_vec_cmpeqs(ctx, I64X2, v19, v20);
+                let v23 = &C::floatcc_as_cond(ctx, &FloatCC::Equal);
+                let v24 = &constructor_bool(ctx, v21, v23);
+                // Rule at src/isa/s390x/lower.isle line 3380.
+                return v24.clone();
+            }
+        }
+        &IntCC::NotEqual => {
+            let v5 = C::value_type(ctx, arg2);
+            let v16 = C::vr128_ty(ctx, v5);
+            if let Some(v17) = v16 {
+                let v19 = C::put_in_reg(ctx, arg2);
+                let v20 = C::put_in_reg(ctx, arg3);
+                let v21 = &constructor_vec_cmpeqs(ctx, I64X2, v19, v20);
+                let v26 = &C::floatcc_as_cond(ctx, &FloatCC::NotEqual);
+                let v27 = &constructor_bool(ctx, v21, v26);
+                // Rule at src/isa/s390x/lower.isle line 3383.
+                return v27.clone();
+            }
+        }
+        &IntCC::SignedGreaterThan => {
+            let v5 = C::value_type(ctx, arg2);
+            let v16 = C::vr128_ty(ctx, v5);
+            if let Some(v17) = v16 {
+                let v19 = C::put_in_reg(ctx, arg2);
+                let v20 = C::put_in_reg(ctx, arg3);
+                let v28 = &constructor_vec_int128_scmphi(ctx, v19, v20);
+                // Rule at src/isa/s390x/lower.isle line 3389.
+                return v28.clone();
+            }
+        }
+        &IntCC::SignedGreaterThanOrEqual => {
+            let v5 = C::value_type(ctx, arg2);
+            let v16 = C::vr128_ty(ctx, v5);
+            if let Some(v17) = v16 {
+                let v29 = C::put_in_reg(ctx, arg3);
+                let v30 = C::put_in_reg(ctx, arg2);
+                let v31 = &constructor_vec_int128_scmphi(ctx, v29, v30);
+                let v32 = &constructor_invert_bool(ctx, v31);
+                // Rule at src/isa/s390x/lower.isle line 3393.
+                return v32.clone();
+            }
+        }
+        &IntCC::SignedLessThan => {
+            let v5 = C::value_type(ctx, arg2);
+            let v16 = C::vr128_ty(ctx, v5);
+            if let Some(v17) = v16 {
+                let v29 = C::put_in_reg(ctx, arg3);
+                let v30 = C::put_in_reg(ctx, arg2);
+                let v31 = &constructor_vec_int128_scmphi(ctx, v29, v30);
+                // Rule at src/isa/s390x/lower.isle line 3391.
+                return v31.clone();
+            }
+        }
+        &IntCC::SignedLessThanOrEqual => {
+            let v5 = C::value_type(ctx, arg2);
+            let v16 = C::vr128_ty(ctx, v5);
+            if let Some(v17) = v16 {
+                let v19 = C::put_in_reg(ctx, arg2);
+                let v20 = C::put_in_reg(ctx, arg3);
+                let v28 = &constructor_vec_int128_scmphi(ctx, v19, v20);
+                let v33 = &constructor_invert_bool(ctx, v28);
+                // Rule at src/isa/s390x/lower.isle line 3395.
+                return v33.clone();
+            }
+        }
+        &IntCC::UnsignedGreaterThan => {
+            let v5 = C::value_type(ctx, arg2);
+            let v16 = C::vr128_ty(ctx, v5);
+            if let Some(v17) = v16 {
+                let v19 = C::put_in_reg(ctx, arg2);
+                let v20 = C::put_in_reg(ctx, arg3);
+                let v34 = &constructor_vec_int128_ucmphi(ctx, v19, v20);
+                // Rule at src/isa/s390x/lower.isle line 3400.
+                return v34.clone();
+            }
+        }
+        &IntCC::UnsignedGreaterThanOrEqual => {
+            let v5 = C::value_type(ctx, arg2);
+            let v16 = C::vr128_ty(ctx, v5);
+            if let Some(v17) = v16 {
+                let v29 = C::put_in_reg(ctx, arg3);
+                let v30 = C::put_in_reg(ctx, arg2);
+                let v35 = &constructor_vec_int128_ucmphi(ctx, v29, v30);
+                let v36 = &constructor_invert_bool(ctx, v35);
+                // Rule at src/isa/s390x/lower.isle line 3404.
+                return v36.clone();
+            }
+        }
+        &IntCC::UnsignedLessThan => {
+            let v5 = C::value_type(ctx, arg2);
+            let v16 = C::vr128_ty(ctx, v5);
+            if let Some(v17) = v16 {
+                let v29 = C::put_in_reg(ctx, arg3);
+                let v30 = C::put_in_reg(ctx, arg2);
+                let v35 = &constructor_vec_int128_ucmphi(ctx, v29, v30);
+                // Rule at src/isa/s390x/lower.isle line 3402.
+                return v35.clone();
+            }
+        }
+        &IntCC::UnsignedLessThanOrEqual => {
+            let v5 = C::value_type(ctx, arg2);
+            let v16 = C::vr128_ty(ctx, v5);
+            if let Some(v17) = v16 {
+                let v19 = C::put_in_reg(ctx, arg2);
+                let v20 = C::put_in_reg(ctx, arg3);
+                let v34 = &constructor_vec_int128_ucmphi(ctx, v19, v20);
+                let v37 = &constructor_invert_bool(ctx, v34);
+                // Rule at src/isa/s390x/lower.isle line 3406.
+                return v37.clone();
+            }
+        }
+        _ => {}
+    }
+    let v5 = C::value_type(ctx, arg2);
+    let v6 = C::fits_in_64(ctx, v5);
+    if let Some(v7) = v6 {
+        let v2 = C::signed(ctx, arg1);
+        if let Some(v3) = v2 {
+            let v9 = &constructor_icmps_val(ctx, arg0, arg2, arg3);
+            let v10 = &C::intcc_as_cond(ctx, arg1);
+            let v11 = &constructor_bool(ctx, v9, v10);
+            // Rule at src/isa/s390x/lower.isle line 3301.
+            return v11.clone();
+        }
+        let v12 = C::unsigned(ctx, arg1);
+        if let Some(v13) = v12 {
+            let v14 = &constructor_icmpu_val(ctx, arg0, arg2, arg3);
+            let v10 = &C::intcc_as_cond(ctx, arg1);
+            let v15 = &constructor_bool(ctx, v14, v10);
+            // Rule at src/isa/s390x/lower.isle line 3304.
+            return v15.clone();
+        }
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "icmp_val", "src/isa/s390x/lower.isle line 3298"
+    )
+}
+
+// Generated as internal constructor for term icmps_val.
+pub fn constructor_icmps_val<C: Context>(
+    ctx: &mut C,
+    arg0: bool,
+    arg1: Value,
+    arg2: Value,
+) -> ProducesFlags {
+    let v2 = C::value_type(ctx, arg1);
+    let v3 = C::fits_in_64(ctx, v2);
+    if let Some(v4) = v3 {
+        if arg0 == true {
+            let v28 = C::sinkable_inst(ctx, arg2);
+            if let Some(v29) = v28 {
+                let v30 = &C::inst_data(ctx, v29);
+                if let &InstructionData::Load {
+                    opcode: ref v31,
+                    arg: v32,
+                    flags: v33,
+                    offset: v34,
+                } = v30
+                {
+                    match v31 {
+                        &Opcode::Load => {
+                            let v35 = C::bigendian(ctx, v33);
+                            if let Some(v36) = v35 {
+                                let v25 = C::value_type(ctx, arg2);
+                                if v25 == I16 {
+                                    let v6 = constructor_ty_ext32(ctx, v4);
+                                    let v7 = constructor_put_in_reg_sext32(ctx, arg1);
+                                    let v39 = &constructor_sink_load(ctx, v29);
+                                    let v40 = &constructor_icmps_mem_sext16(ctx, v6, v7, v39);
+                                    // Rule at src/isa/s390x/lower.isle line 3330.
+                                    return v40.clone();
+                                }
+                                let v26 = C::ty_32_or_64(ctx, v25);
+                                if let Some(v27) = v26 {
+                                    let v16 = C::put_in_reg(ctx, arg1);
+                                    let v37 = &constructor_sink_load(ctx, v29);
+                                    let v38 = &constructor_icmps_mem(ctx, v4, v16, v37);
+                                    // Rule at src/isa/s390x/lower.isle line 3326.
+                                    return v38.clone();
+                                }
+                            }
+                        }
+                        &Opcode::Sload16 => {
+                            let v35 = C::bigendian(ctx, v33);
+                            if let Some(v36) = v35 {
+                                let v16 = C::put_in_reg(ctx, arg1);
+                                let v41 = &constructor_sink_sload16(ctx, v29);
+                                let v42 = &constructor_icmps_mem_sext16(ctx, v4, v16, v41);
+                                // Rule at src/isa/s390x/lower.isle line 3334.
+                                return v42.clone();
+                            }
+                        }
+                        &Opcode::Sload32 => {
+                            let v35 = C::bigendian(ctx, v33);
+                            if let Some(v36) = v35 {
+                                let v16 = C::put_in_reg(ctx, arg1);
+                                let v43 = &constructor_sink_sload32(ctx, v29);
+                                let v44 = &constructor_icmps_mem_sext32(ctx, v4, v16, v43);
+                                // Rule at src/isa/s390x/lower.isle line 3336.
+                                return v44.clone();
+                            }
+                        }
+                        _ => {}
+                    }
+                }
+            }
+        }
+        let v10 = C::def_inst(ctx, arg2);
+        if let Some(v11) = v10 {
+            let v12 = &C::inst_data(ctx, v11);
+            if let &InstructionData::Unary {
+                opcode: ref v13,
+                arg: v14,
+            } = v12
+            {
+                if let &Opcode::Sextend = v13 {
+                    let v15 = C::value_type(ctx, v14);
+                    if v15 == I32 {
+                        let v16 = C::put_in_reg(ctx, arg1);
+                        let v17 = C::put_in_reg(ctx, v14);
+                        let v18 = &constructor_icmps_reg_sext32(ctx, v4, v16, v17);
+                        // Rule at src/isa/s390x/lower.isle line 3316.
+                        return v18.clone();
+                    }
+                }
+            }
+        }
+        let v19 = C::i16_from_value(ctx, arg2);
+        if let Some(v20) = v19 {
+            let v6 = constructor_ty_ext32(ctx, v4);
+            let v7 = constructor_put_in_reg_sext32(ctx, arg1);
+            let v21 = &constructor_icmps_simm16(ctx, v6, v7, v20);
+            // Rule at src/isa/s390x/lower.isle line 3320.
+            return v21.clone();
+        }
+        let v22 = C::i32_from_value(ctx, arg2);
+        if let Some(v23) = v22 {
+            let v6 = constructor_ty_ext32(ctx, v4);
+            let v7 = constructor_put_in_reg_sext32(ctx, arg1);
+            let v24 = &constructor_icmps_simm32(ctx, v6, v7, v23);
+            // Rule at src/isa/s390x/lower.isle line 3322.
+            return v24.clone();
+        }
+        let v6 = constructor_ty_ext32(ctx, v4);
+        let v7 = constructor_put_in_reg_sext32(ctx, arg1);
+        let v8 = constructor_put_in_reg_sext32(ctx, arg2);
+        let v9 = &constructor_icmps_reg(ctx, v6, v7, v8);
+        // Rule at src/isa/s390x/lower.isle line 3312.
+        return v9.clone();
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "icmps_val", "src/isa/s390x/lower.isle line 3309"
+    )
+}
+
+// Generated as internal constructor for term icmpu_val.
+pub fn constructor_icmpu_val<C: Context>(
+    ctx: &mut C,
+    arg0: bool,
+    arg1: Value,
+    arg2: Value,
+) -> ProducesFlags {
+    let v2 = C::value_type(ctx, arg1);
+    let v3 = C::fits_in_64(ctx, v2);
+    if let Some(v4) = v3 {
+        if arg0 == true {
+            let v25 = C::sinkable_inst(ctx, arg2);
+            if let Some(v26) = v25 {
+                let v27 = &C::inst_data(ctx, v26);
+                if let &InstructionData::Load {
+                    opcode: ref v28,
+                    arg: v29,
+                    flags: v30,
+                    offset: v31,
+                } = v27
+                {
+                    match v28 {
+                        &Opcode::Load => {
+                            let v32 = C::bigendian(ctx, v30);
+                            if let Some(v33) = v32 {
+                                let v22 = C::value_type(ctx, arg2);
+                                let v23 = C::ty_32_or_64(ctx, v22);
+                                if let Some(v24) = v23 {
+                                    let v16 = C::put_in_reg(ctx, arg1);
+                                    let v34 = &constructor_sink_load(ctx, v26);
+                                    let v35 = &constructor_icmpu_mem(ctx, v4, v16, v34);
+                                    // Rule at src/isa/s390x/lower.isle line 3356.
+                                    return v35.clone();
+                                }
+                                if v22 == I16 {
+                                    let v36 = constructor_load_sym(ctx, v26);
+                                    if let Some(v37) = v36 {
+                                        let v6 = constructor_ty_ext32(ctx, v4);
+                                        let v7 = constructor_put_in_reg_zext32(ctx, arg1);
+                                        let v38 = &constructor_sink_load(ctx, v37);
+                                        let v39 = &constructor_icmpu_mem_zext16(ctx, v6, v7, v38);
+                                        // Rule at src/isa/s390x/lower.isle line 3362.
+                                        return v39.clone();
+                                    }
+                                }
+                            }
+                        }
+                        &Opcode::Uload16 => {
+                            let v32 = C::bigendian(ctx, v30);
+                            if let Some(v33) = v32 {
+                                let v40 = constructor_uload16_sym(ctx, v26);
+                                if let Some(v41) = v40 {
+                                    let v16 = C::put_in_reg(ctx, arg1);
+                                    let v42 = &constructor_sink_uload16(ctx, v41);
+                                    let v43 = &constructor_icmpu_mem_zext16(ctx, v4, v16, v42);
+                                    // Rule at src/isa/s390x/lower.isle line 3370.
+                                    return v43.clone();
+                                }
+                            }
+                        }
+                        &Opcode::Uload32 => {
+                            let v32 = C::bigendian(ctx, v30);
+                            if let Some(v33) = v32 {
+                                let v16 = C::put_in_reg(ctx, arg1);
+                                let v44 = &constructor_sink_uload32(ctx, v26);
+                                let v45 = &constructor_icmpu_mem_zext32(ctx, v4, v16, v44);
+                                // Rule at src/isa/s390x/lower.isle line 3374.
+                                return v45.clone();
+                            }
+                        }
+                        _ => {}
+                    }
+                }
+            }
+        }
+        let v19 = C::u32_from_value(ctx, arg2);
+        if let Some(v20) = v19 {
+            let v6 = constructor_ty_ext32(ctx, v4);
+            let v7 = constructor_put_in_reg_zext32(ctx, arg1);
+            let v21 = &constructor_icmpu_uimm32(ctx, v6, v7, v20);
+            // Rule at src/isa/s390x/lower.isle line 3352.
+            return v21.clone();
+        }
+        let v10 = C::def_inst(ctx, arg2);
+        if let Some(v11) = v10 {
+            let v12 = &C::inst_data(ctx, v11);
+            if let &InstructionData::Unary {
+                opcode: ref v13,
+                arg: v14,
+            } = v12
+            {
+                if let &Opcode::Uextend = v13 {
+                    let v15 = C::value_type(ctx, v14);
+                    if v15 == I32 {
+                        let v16 = C::put_in_reg(ctx, arg1);
+                        let v17 = C::put_in_reg(ctx, v14);
+                        let v18 = &constructor_icmpu_reg_zext32(ctx, v4, v16, v17);
+                        // Rule at src/isa/s390x/lower.isle line 3348.
+                        return v18.clone();
+                    }
+                }
+            }
+        }
+        let v6 = constructor_ty_ext32(ctx, v4);
+        let v7 = constructor_put_in_reg_zext32(ctx, arg1);
+        let v8 = constructor_put_in_reg_zext32(ctx, arg2);
+        let v9 = &constructor_icmpu_reg(ctx, v6, v7, v8);
+        // Rule at src/isa/s390x/lower.isle line 3344.
+        return v9.clone();
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "icmpu_val", "src/isa/s390x/lower.isle line 3341"
+    )
+}
+
+// Generated as internal constructor for term fcmp_val.
+pub fn constructor_fcmp_val<C: Context>(
+    ctx: &mut C,
+    arg0: &FloatCC,
+    arg1: Value,
+    arg2: Value,
+) -> ProducesBool {
+    let v4 = C::put_in_reg(ctx, arg1);
+    let v5 = C::put_in_reg(ctx, arg2);
+    let v2 = C::value_type(ctx, arg1);
+    let v6 = &constructor_fcmp_reg(ctx, v2, v4, v5);
+    let v7 = &C::floatcc_as_cond(ctx, arg0);
+    let v8 = &constructor_bool(ctx, v6, v7);
+    // Rule at src/isa/s390x/lower.isle line 3444.
+    return v8.clone();
+}
+
+// Generated as internal constructor for term vall_true_val.
+pub fn constructor_vall_true_val<C: Context>(ctx: &mut C, arg0: Value) -> ProducesBool {
+    let v9 = C::def_inst(ctx, arg0);
+    if let Some(v10) = v9 {
+        let v11 = C::first_result(ctx, v10);
+        if let Some(v12) = v11 {
+            let v14 = &C::inst_data(ctx, v10);
+            match v14 {
+                &InstructionData::FloatCompare {
+                    opcode: ref v42,
+                    args: ref v43,
+                    cond: ref v44,
+                } => {
+                    if let &Opcode::Fcmp = v42 {
+                        match v44 {
+                            &FloatCC::Equal => {
+                                let v45 = C::unpack_value_array_2(ctx, v43);
+                                let v48 = C::put_in_reg(ctx, v45.0);
+                                let v49 = C::put_in_reg(ctx, v45.1);
+                                let v13 = C::value_type(ctx, v12);
+                                let v50 = &constructor_vec_fcmpeqs(ctx, v13, v48, v49);
+                                let v25 = &C::floatcc_as_cond(ctx, &FloatCC::Equal);
+                                let v51 = &constructor_bool(ctx, v50, v25);
+                                // Rule at src/isa/s390x/lower.isle line 3527.
+                                return v51.clone();
+                            }
+                            &FloatCC::GreaterThan => {
+                                let v45 = C::unpack_value_array_2(ctx, v43);
+                                let v48 = C::put_in_reg(ctx, v45.0);
+                                let v49 = C::put_in_reg(ctx, v45.1);
+                                let v13 = C::value_type(ctx, v12);
+                                let v53 = &constructor_vec_fcmphs(ctx, v13, v48, v49);
+                                let v25 = &C::floatcc_as_cond(ctx, &FloatCC::Equal);
+                                let v54 = &constructor_bool(ctx, v53, v25);
+                                // Rule at src/isa/s390x/lower.isle line 3533.
+                                return v54.clone();
+                            }
+                            &FloatCC::GreaterThanOrEqual => {
+                                let v45 = C::unpack_value_array_2(ctx, v43);
+                                let v48 = C::put_in_reg(ctx, v45.0);
+                                let v49 = C::put_in_reg(ctx, v45.1);
+                                let v13 = C::value_type(ctx, v12);
+                                let v56 = &constructor_vec_fcmphes(ctx, v13, v48, v49);
+                                let v25 = &C::floatcc_as_cond(ctx, &FloatCC::Equal);
+                                let v57 = &constructor_bool(ctx, v56, v25);
+                                // Rule at src/isa/s390x/lower.isle line 3539.
+                                return v57.clone();
+                            }
+                            &FloatCC::LessThan => {
+                                let v45 = C::unpack_value_array_2(ctx, v43);
+                                let v59 = C::put_in_reg(ctx, v45.1);
+                                let v60 = C::put_in_reg(ctx, v45.0);
+                                let v13 = C::value_type(ctx, v12);
+                                let v61 = &constructor_vec_fcmphs(ctx, v13, v59, v60);
+                                let v25 = &C::floatcc_as_cond(ctx, &FloatCC::Equal);
+                                let v62 = &constructor_bool(ctx, v61, v25);
+                                // Rule at src/isa/s390x/lower.isle line 3545.
+                                return v62.clone();
+                            }
+                            &FloatCC::LessThanOrEqual => {
+                                let v45 = C::unpack_value_array_2(ctx, v43);
+                                let v59 = C::put_in_reg(ctx, v45.1);
+                                let v60 = C::put_in_reg(ctx, v45.0);
+                                let v13 = C::value_type(ctx, v12);
+                                let v64 = &constructor_vec_fcmphes(ctx, v13, v59, v60);
+                                let v25 = &C::floatcc_as_cond(ctx, &FloatCC::Equal);
+                                let v65 = &constructor_bool(ctx, v64, v25);
+                                // Rule at src/isa/s390x/lower.isle line 3551.
+                                return v65.clone();
+                            }
+                            &FloatCC::NotEqual => {
+                                let v45 = C::unpack_value_array_2(ctx, v43);
+                                let v48 = C::put_in_reg(ctx, v45.0);
+                                let v49 = C::put_in_reg(ctx, v45.1);
+                                let v13 = C::value_type(ctx, v12);
+                                let v50 = &constructor_vec_fcmpeqs(ctx, v13, v48, v49);
+                                let v7 = &C::floatcc_as_cond(ctx, &FloatCC::Unordered);
+                                let v52 = &constructor_bool(ctx, v50, v7);
+                                // Rule at src/isa/s390x/lower.isle line 3530.
+                                return v52.clone();
+                            }
+                            &FloatCC::UnorderedOrGreaterThan => {
+                                let v45 = C::unpack_value_array_2(ctx, v43);
+                                let v59 = C::put_in_reg(ctx, v45.1);
+                                let v60 = C::put_in_reg(ctx, v45.0);
+                                let v13 = C::value_type(ctx, v12);
+                                let v64 = &constructor_vec_fcmphes(ctx, v13, v59, v60);
+                                let v7 = &C::floatcc_as_cond(ctx, &FloatCC::Unordered);
+                                let v66 = &constructor_bool(ctx, v64, v7);
+                                // Rule at src/isa/s390x/lower.isle line 3554.
+                                return v66.clone();
+                            }
+                            &FloatCC::UnorderedOrGreaterThanOrEqual => {
+                                let v45 = C::unpack_value_array_2(ctx, v43);
+                                let v59 = C::put_in_reg(ctx, v45.1);
+                                let v60 = C::put_in_reg(ctx, v45.0);
+                                let v13 = C::value_type(ctx, v12);
+                                let v61 = &constructor_vec_fcmphs(ctx, v13, v59, v60);
+                                let v7 = &C::floatcc_as_cond(ctx, &FloatCC::Unordered);
+                                let v63 = &constructor_bool(ctx, v61, v7);
+                                // Rule at src/isa/s390x/lower.isle line 3548.
+                                return v63.clone();
+                            }
+                            &FloatCC::UnorderedOrLessThan => {
+                                let v45 = C::unpack_value_array_2(ctx, v43);
+                                let v48 = C::put_in_reg(ctx, v45.0);
+                                let v49 = C::put_in_reg(ctx, v45.1);
+                                let v13 = C::value_type(ctx, v12);
+                                let v56 = &constructor_vec_fcmphes(ctx, v13, v48, v49);
+                                let v7 = &C::floatcc_as_cond(ctx, &FloatCC::Unordered);
+                                let v58 = &constructor_bool(ctx, v56, v7);
+                                // Rule at src/isa/s390x/lower.isle line 3542.
+                                return v58.clone();
+                            }
+                            &FloatCC::UnorderedOrLessThanOrEqual => {
+                                let v45 = C::unpack_value_array_2(ctx, v43);
+                                let v48 = C::put_in_reg(ctx, v45.0);
+                                let v49 = C::put_in_reg(ctx, v45.1);
+                                let v13 = C::value_type(ctx, v12);
+                                let v53 = &constructor_vec_fcmphs(ctx, v13, v48, v49);
+                                let v7 = &C::floatcc_as_cond(ctx, &FloatCC::Unordered);
+                                let v55 = &constructor_bool(ctx, v53, v7);
+                                // Rule at src/isa/s390x/lower.isle line 3536.
+                                return v55.clone();
+                            }
+                            _ => {}
+                        }
+                    }
+                }
+                &InstructionData::IntCompare {
+                    opcode: ref v15,
+                    args: ref v16,
+                    cond: ref v17,
+                } => {
+                    if let &Opcode::Icmp = v15 {
+                        match v17 {
+                            &IntCC::Equal => {
+                                let v18 = C::unpack_value_array_2(ctx, v16);
+                                let v21 = C::put_in_reg(ctx, v18.0);
+                                let v22 = C::put_in_reg(ctx, v18.1);
+                                let v13 = C::value_type(ctx, v12);
+                                let v23 = &constructor_vec_cmpeqs(ctx, v13, v21, v22);
+                                let v25 = &C::floatcc_as_cond(ctx, &FloatCC::Equal);
+                                let v26 = &constructor_bool(ctx, v23, v25);
+                                // Rule at src/isa/s390x/lower.isle line 3495.
+                                return v26.clone();
+                            }
+                            &IntCC::NotEqual => {
+                                let v18 = C::unpack_value_array_2(ctx, v16);
+                                let v21 = C::put_in_reg(ctx, v18.0);
+                                let v22 = C::put_in_reg(ctx, v18.1);
+                                let v13 = C::value_type(ctx, v12);
+                                let v23 = &constructor_vec_cmpeqs(ctx, v13, v21, v22);
+                                let v7 = &C::floatcc_as_cond(ctx, &FloatCC::Unordered);
+                                let v27 = &constructor_bool(ctx, v23, v7);
+                                // Rule at src/isa/s390x/lower.isle line 3498.
+                                return v27.clone();
+                            }
+                            &IntCC::SignedGreaterThan => {
+                                let v18 = C::unpack_value_array_2(ctx, v16);
+                                let v21 = C::put_in_reg(ctx, v18.0);
+                                let v22 = C::put_in_reg(ctx, v18.1);
+                                let v13 = C::value_type(ctx, v12);
+                                let v28 = &constructor_vec_cmphs(ctx, v13, v21, v22);
+                                let v25 = &C::floatcc_as_cond(ctx, &FloatCC::Equal);
+                                let v29 = &constructor_bool(ctx, v28, v25);
+                                // Rule at src/isa/s390x/lower.isle line 3501.
+                                return v29.clone();
+                            }
+                            &IntCC::SignedGreaterThanOrEqual => {
+                                let v18 = C::unpack_value_array_2(ctx, v16);
+                                let v31 = C::put_in_reg(ctx, v18.1);
+                                let v32 = C::put_in_reg(ctx, v18.0);
+                                let v13 = C::value_type(ctx, v12);
+                                let v33 = &constructor_vec_cmphs(ctx, v13, v31, v32);
+                                let v7 = &C::floatcc_as_cond(ctx, &FloatCC::Unordered);
+                                let v35 = &constructor_bool(ctx, v33, v7);
+                                // Rule at src/isa/s390x/lower.isle line 3510.
+                                return v35.clone();
+                            }
+                            &IntCC::SignedLessThan => {
+                                let v18 = C::unpack_value_array_2(ctx, v16);
+                                let v31 = C::put_in_reg(ctx, v18.1);
+                                let v32 = C::put_in_reg(ctx, v18.0);
+                                let v13 = C::value_type(ctx, v12);
+                                let v33 = &constructor_vec_cmphs(ctx, v13, v31, v32);
+                                let v25 = &C::floatcc_as_cond(ctx, &FloatCC::Equal);
+                                let v34 = &constructor_bool(ctx, v33, v25);
+                                // Rule at src/isa/s390x/lower.isle line 3507.
+                                return v34.clone();
+                            }
+                            &IntCC::SignedLessThanOrEqual => {
+                                let v18 = C::unpack_value_array_2(ctx, v16);
+                                let v21 = C::put_in_reg(ctx, v18.0);
+                                let v22 = C::put_in_reg(ctx, v18.1);
+                                let v13 = C::value_type(ctx, v12);
+                                let v28 = &constructor_vec_cmphs(ctx, v13, v21, v22);
+                                let v7 = &C::floatcc_as_cond(ctx, &FloatCC::Unordered);
+                                let v30 = &constructor_bool(ctx, v28, v7);
+                                // Rule at src/isa/s390x/lower.isle line 3504.
+                                return v30.clone();
+                            }
+                            &IntCC::UnsignedGreaterThan => {
+                                let v18 = C::unpack_value_array_2(ctx, v16);
+                                let v21 = C::put_in_reg(ctx, v18.0);
+                                let v22 = C::put_in_reg(ctx, v18.1);
+                                let v13 = C::value_type(ctx, v12);
+                                let v36 = &constructor_vec_cmphls(ctx, v13, v21, v22);
+                                let v25 = &C::floatcc_as_cond(ctx, &FloatCC::Equal);
+                                let v37 = &constructor_bool(ctx, v36, v25);
+                                // Rule at src/isa/s390x/lower.isle line 3513.
+                                return v37.clone();
+                            }
+                            &IntCC::UnsignedGreaterThanOrEqual => {
+                                let v18 = C::unpack_value_array_2(ctx, v16);
+                                let v31 = C::put_in_reg(ctx, v18.1);
+                                let v32 = C::put_in_reg(ctx, v18.0);
+                                let v13 = C::value_type(ctx, v12);
+                                let v39 = &constructor_vec_cmphls(ctx, v13, v31, v32);
+                                let v7 = &C::floatcc_as_cond(ctx, &FloatCC::Unordered);
+                                let v41 = &constructor_bool(ctx, v39, v7);
+                                // Rule at src/isa/s390x/lower.isle line 3522.
+                                return v41.clone();
+                            }
+                            &IntCC::UnsignedLessThan => {
+                                let v18 = C::unpack_value_array_2(ctx, v16);
+                                let v31 = C::put_in_reg(ctx, v18.1);
+                                let v32 = C::put_in_reg(ctx, v18.0);
+                                let v13 = C::value_type(ctx, v12);
+                                let v39 = &constructor_vec_cmphls(ctx, v13, v31, v32);
+                                let v25 = &C::floatcc_as_cond(ctx, &FloatCC::Equal);
+                                let v40 = &constructor_bool(ctx, v39, v25);
+                                // Rule at src/isa/s390x/lower.isle line 3519.
+                                return v40.clone();
+                            }
+                            &IntCC::UnsignedLessThanOrEqual => {
+                                let v18 = C::unpack_value_array_2(ctx, v16);
+                                let v21 = C::put_in_reg(ctx, v18.0);
+                                let v22 = C::put_in_reg(ctx, v18.1);
+                                let v13 = C::value_type(ctx, v12);
+                                let v36 = &constructor_vec_cmphls(ctx, v13, v21, v22);
+                                let v7 = &C::floatcc_as_cond(ctx, &FloatCC::Unordered);
+                                let v38 = &constructor_bool(ctx, v36, v7);
+                                // Rule at src/isa/s390x/lower.isle line 3516.
+                                return v38.clone();
+                            }
+                            _ => {}
+                        }
+                    }
+                }
+                _ => {}
+            }
+        }
+    }
+    let v2 = C::put_in_reg(ctx, arg0);
+    let v1 = C::value_type(ctx, arg0);
+    let v4 = constructor_vec_imm(ctx, v1, 0x0);
+    let v5 = &constructor_vec_cmpeqs(ctx, v1, v2, v4);
+    let v7 = &C::floatcc_as_cond(ctx, &FloatCC::Unordered);
+    let v8 = &constructor_bool(ctx, v5, v7);
+    // Rule at src/isa/s390x/lower.isle line 3490.
+    return v8.clone();
+}
+
+// Generated as internal constructor for term vany_true_val.
+pub fn constructor_vany_true_val<C: Context>(ctx: &mut C, arg0: Value) -> ProducesBool {
+    let v9 = C::def_inst(ctx, arg0);
+    if let Some(v10) = v9 {
+        let v11 = C::first_result(ctx, v10);
+        if let Some(v12) = v11 {
+            let v14 = &C::inst_data(ctx, v10);
+            match v14 {
+                &InstructionData::FloatCompare {
+                    opcode: ref v42,
+                    args: ref v43,
+                    cond: ref v44,
+                } => {
+                    if let &Opcode::Fcmp = v42 {
+                        match v44 {
+                            &FloatCC::Equal => {
+                                let v45 = C::unpack_value_array_2(ctx, v43);
+                                let v48 = C::put_in_reg(ctx, v45.0);
+                                let v49 = C::put_in_reg(ctx, v45.1);
+                                let v13 = C::value_type(ctx, v12);
+                                let v50 = &constructor_vec_fcmpeqs(ctx, v13, v48, v49);
+                                let v25 = &C::floatcc_as_cond(ctx, &FloatCC::Ordered);
+                                let v51 = &constructor_bool(ctx, v50, v25);
+                                // Rule at src/isa/s390x/lower.isle line 3605.
+                                return v51.clone();
+                            }
+                            &FloatCC::GreaterThan => {
+                                let v45 = C::unpack_value_array_2(ctx, v43);
+                                let v48 = C::put_in_reg(ctx, v45.0);
+                                let v49 = C::put_in_reg(ctx, v45.1);
+                                let v13 = C::value_type(ctx, v12);
+                                let v53 = &constructor_vec_fcmphs(ctx, v13, v48, v49);
+                                let v25 = &C::floatcc_as_cond(ctx, &FloatCC::Ordered);
+                                let v54 = &constructor_bool(ctx, v53, v25);
+                                // Rule at src/isa/s390x/lower.isle line 3611.
+                                return v54.clone();
+                            }
+                            &FloatCC::GreaterThanOrEqual => {
+                                let v45 = C::unpack_value_array_2(ctx, v43);
+                                let v48 = C::put_in_reg(ctx, v45.0);
+                                let v49 = C::put_in_reg(ctx, v45.1);
+                                let v13 = C::value_type(ctx, v12);
+                                let v56 = &constructor_vec_fcmphes(ctx, v13, v48, v49);
+                                let v25 = &C::floatcc_as_cond(ctx, &FloatCC::Ordered);
+                                let v57 = &constructor_bool(ctx, v56, v25);
+                                // Rule at src/isa/s390x/lower.isle line 3617.
+                                return v57.clone();
+                            }
+                            &FloatCC::LessThan => {
+                                let v45 = C::unpack_value_array_2(ctx, v43);
+                                let v59 = C::put_in_reg(ctx, v45.1);
+                                let v60 = C::put_in_reg(ctx, v45.0);
+                                let v13 = C::value_type(ctx, v12);
+                                let v61 = &constructor_vec_fcmphs(ctx, v13, v59, v60);
+                                let v25 = &C::floatcc_as_cond(ctx, &FloatCC::Ordered);
+                                let v62 = &constructor_bool(ctx, v61, v25);
+                                // Rule at src/isa/s390x/lower.isle line 3623.
+                                return v62.clone();
+                            }
+                            &FloatCC::LessThanOrEqual => {
+                                let v45 = C::unpack_value_array_2(ctx, v43);
+                                let v59 = C::put_in_reg(ctx, v45.1);
+                                let v60 = C::put_in_reg(ctx, v45.0);
+                                let v13 = C::value_type(ctx, v12);
+                                let v64 = &constructor_vec_fcmphes(ctx, v13, v59, v60);
+                                let v25 = &C::floatcc_as_cond(ctx, &FloatCC::Ordered);
+                                let v65 = &constructor_bool(ctx, v64, v25);
+                                // Rule at src/isa/s390x/lower.isle line 3629.
+                                return v65.clone();
+                            }
+                            &FloatCC::NotEqual => {
+                                let v45 = C::unpack_value_array_2(ctx, v43);
+                                let v48 = C::put_in_reg(ctx, v45.0);
+                                let v49 = C::put_in_reg(ctx, v45.1);
+                                let v13 = C::value_type(ctx, v12);
+                                let v50 = &constructor_vec_fcmpeqs(ctx, v13, v48, v49);
+                                let v7 = &C::floatcc_as_cond(ctx, &FloatCC::NotEqual);
+                                let v52 = &constructor_bool(ctx, v50, v7);
+                                // Rule at src/isa/s390x/lower.isle line 3608.
+                                return v52.clone();
+                            }
+                            &FloatCC::UnorderedOrGreaterThan => {
+                                let v45 = C::unpack_value_array_2(ctx, v43);
+                                let v59 = C::put_in_reg(ctx, v45.1);
+                                let v60 = C::put_in_reg(ctx, v45.0);
+                                let v13 = C::value_type(ctx, v12);
+                                let v64 = &constructor_vec_fcmphes(ctx, v13, v59, v60);
+                                let v7 = &C::floatcc_as_cond(ctx, &FloatCC::NotEqual);
+                                let v66 = &constructor_bool(ctx, v64, v7);
+                                // Rule at src/isa/s390x/lower.isle line 3632.
+                                return v66.clone();
+                            }
+                            &FloatCC::UnorderedOrGreaterThanOrEqual => {
+                                let v45 = C::unpack_value_array_2(ctx, v43);
+                                let v59 = C::put_in_reg(ctx, v45.1);
+                                let v60 = C::put_in_reg(ctx, v45.0);
+                                let v13 = C::value_type(ctx, v12);
+                                let v61 = &constructor_vec_fcmphs(ctx, v13, v59, v60);
+                                let v7 = &C::floatcc_as_cond(ctx, &FloatCC::NotEqual);
+                                let v63 = &constructor_bool(ctx, v61, v7);
+                                // Rule at src/isa/s390x/lower.isle line 3626.
+                                return v63.clone();
+                            }
+                            &FloatCC::UnorderedOrLessThan => {
+                                let v45 = C::unpack_value_array_2(ctx, v43);
+                                let v48 = C::put_in_reg(ctx, v45.0);
+                                let v49 = C::put_in_reg(ctx, v45.1);
+                                let v13 = C::value_type(ctx, v12);
+                                let v56 = &constructor_vec_fcmphes(ctx, v13, v48, v49);
+                                let v7 = &C::floatcc_as_cond(ctx, &FloatCC::NotEqual);
+                                let v58 = &constructor_bool(ctx, v56, v7);
+                                // Rule at src/isa/s390x/lower.isle line 3620.
+                                return v58.clone();
+                            }
+                            &FloatCC::UnorderedOrLessThanOrEqual => {
+                                let v45 = C::unpack_value_array_2(ctx, v43);
+                                let v48 = C::put_in_reg(ctx, v45.0);
+                                let v49 = C::put_in_reg(ctx, v45.1);
+                                let v13 = C::value_type(ctx, v12);
+                                let v53 = &constructor_vec_fcmphs(ctx, v13, v48, v49);
+                                let v7 = &C::floatcc_as_cond(ctx, &FloatCC::NotEqual);
+                                let v55 = &constructor_bool(ctx, v53, v7);
+                                // Rule at src/isa/s390x/lower.isle line 3614.
+                                return v55.clone();
+                            }
+                            _ => {}
+                        }
+                    }
+                }
+                &InstructionData::IntCompare {
+                    opcode: ref v15,
+                    args: ref v16,
+                    cond: ref v17,
+                } => {
+                    if let &Opcode::Icmp = v15 {
+                        match v17 {
+                            &IntCC::Equal => {
+                                let v18 = C::unpack_value_array_2(ctx, v16);
+                                let v21 = C::put_in_reg(ctx, v18.0);
+                                let v22 = C::put_in_reg(ctx, v18.1);
+                                let v13 = C::value_type(ctx, v12);
+                                let v23 = &constructor_vec_cmpeqs(ctx, v13, v21, v22);
+                                let v25 = &C::floatcc_as_cond(ctx, &FloatCC::Ordered);
+                                let v26 = &constructor_bool(ctx, v23, v25);
+                                // Rule at src/isa/s390x/lower.isle line 3573.
+                                return v26.clone();
+                            }
+                            &IntCC::NotEqual => {
+                                let v18 = C::unpack_value_array_2(ctx, v16);
+                                let v21 = C::put_in_reg(ctx, v18.0);
+                                let v22 = C::put_in_reg(ctx, v18.1);
+                                let v13 = C::value_type(ctx, v12);
+                                let v23 = &constructor_vec_cmpeqs(ctx, v13, v21, v22);
+                                let v7 = &C::floatcc_as_cond(ctx, &FloatCC::NotEqual);
+                                let v27 = &constructor_bool(ctx, v23, v7);
+                                // Rule at src/isa/s390x/lower.isle line 3576.
+                                return v27.clone();
+                            }
+                            &IntCC::SignedGreaterThan => {
+                                let v18 = C::unpack_value_array_2(ctx, v16);
+                                let v21 = C::put_in_reg(ctx, v18.0);
+                                let v22 = C::put_in_reg(ctx, v18.1);
+                                let v13 = C::value_type(ctx, v12);
+                                let v28 = &constructor_vec_cmphs(ctx, v13, v21, v22);
+                                let v25 = &C::floatcc_as_cond(ctx, &FloatCC::Ordered);
+                                let v29 = &constructor_bool(ctx, v28, v25);
+                                // Rule at src/isa/s390x/lower.isle line 3579.
+                                return v29.clone();
+                            }
+                            &IntCC::SignedGreaterThanOrEqual => {
+                                let v18 = C::unpack_value_array_2(ctx, v16);
+                                let v31 = C::put_in_reg(ctx, v18.1);
+                                let v32 = C::put_in_reg(ctx, v18.0);
+                                let v13 = C::value_type(ctx, v12);
+                                let v33 = &constructor_vec_cmphs(ctx, v13, v31, v32);
+                                let v7 = &C::floatcc_as_cond(ctx, &FloatCC::NotEqual);
+                                let v35 = &constructor_bool(ctx, v33, v7);
+                                // Rule at src/isa/s390x/lower.isle line 3588.
+                                return v35.clone();
+                            }
+                            &IntCC::SignedLessThan => {
+                                let v18 = C::unpack_value_array_2(ctx, v16);
+                                let v31 = C::put_in_reg(ctx, v18.1);
+                                let v32 = C::put_in_reg(ctx, v18.0);
+                                let v13 = C::value_type(ctx, v12);
+                                let v33 = &constructor_vec_cmphs(ctx, v13, v31, v32);
+                                let v25 = &C::floatcc_as_cond(ctx, &FloatCC::Ordered);
+                                let v34 = &constructor_bool(ctx, v33, v25);
+                                // Rule at src/isa/s390x/lower.isle line 3585.
+                                return v34.clone();
+                            }
+                            &IntCC::SignedLessThanOrEqual => {
+                                let v18 = C::unpack_value_array_2(ctx, v16);
+                                let v21 = C::put_in_reg(ctx, v18.0);
+                                let v22 = C::put_in_reg(ctx, v18.1);
+                                let v13 = C::value_type(ctx, v12);
+                                let v28 = &constructor_vec_cmphs(ctx, v13, v21, v22);
+                                let v7 = &C::floatcc_as_cond(ctx, &FloatCC::NotEqual);
+                                let v30 = &constructor_bool(ctx, v28, v7);
+                                // Rule at src/isa/s390x/lower.isle line 3582.
+                                return v30.clone();
+                            }
+                            &IntCC::UnsignedGreaterThan => {
+                                let v18 = C::unpack_value_array_2(ctx, v16);
+                                let v21 = C::put_in_reg(ctx, v18.0);
+                                let v22 = C::put_in_reg(ctx, v18.1);
+                                let v13 = C::value_type(ctx, v12);
+                                let v36 = &constructor_vec_cmphls(ctx, v13, v21, v22);
+                                let v25 = &C::floatcc_as_cond(ctx, &FloatCC::Ordered);
+                                let v37 = &constructor_bool(ctx, v36, v25);
+                                // Rule at src/isa/s390x/lower.isle line 3591.
+                                return v37.clone();
+                            }
+                            &IntCC::UnsignedGreaterThanOrEqual => {
+                                let v18 = C::unpack_value_array_2(ctx, v16);
+                                let v31 = C::put_in_reg(ctx, v18.1);
+                                let v32 = C::put_in_reg(ctx, v18.0);
+                                let v13 = C::value_type(ctx, v12);
+                                let v39 = &constructor_vec_cmphls(ctx, v13, v31, v32);
+                                let v7 = &C::floatcc_as_cond(ctx, &FloatCC::NotEqual);
+                                let v41 = &constructor_bool(ctx, v39, v7);
+                                // Rule at src/isa/s390x/lower.isle line 3600.
+                                return v41.clone();
+                            }
+                            &IntCC::UnsignedLessThan => {
+                                let v18 = C::unpack_value_array_2(ctx, v16);
+                                let v31 = C::put_in_reg(ctx, v18.1);
+                                let v32 = C::put_in_reg(ctx, v18.0);
+                                let v13 = C::value_type(ctx, v12);
+                                let v39 = &constructor_vec_cmphls(ctx, v13, v31, v32);
+                                let v25 = &C::floatcc_as_cond(ctx, &FloatCC::Ordered);
+                                let v40 = &constructor_bool(ctx, v39, v25);
+                                // Rule at src/isa/s390x/lower.isle line 3597.
+                                return v40.clone();
+                            }
+                            &IntCC::UnsignedLessThanOrEqual => {
+                                let v18 = C::unpack_value_array_2(ctx, v16);
+                                let v21 = C::put_in_reg(ctx, v18.0);
+                                let v22 = C::put_in_reg(ctx, v18.1);
+                                let v13 = C::value_type(ctx, v12);
+                                let v36 = &constructor_vec_cmphls(ctx, v13, v21, v22);
+                                let v7 = &C::floatcc_as_cond(ctx, &FloatCC::NotEqual);
+                                let v38 = &constructor_bool(ctx, v36, v7);
+                                // Rule at src/isa/s390x/lower.isle line 3594.
+                                return v38.clone();
+                            }
+                            _ => {}
+                        }
+                    }
+                }
+                _ => {}
+            }
+        }
+    }
+    let v2 = C::put_in_reg(ctx, arg0);
+    let v1 = C::value_type(ctx, arg0);
+    let v4 = constructor_vec_imm(ctx, v1, 0x0);
+    let v5 = &constructor_vec_cmpeqs(ctx, v1, v2, v4);
+    let v7 = &C::floatcc_as_cond(ctx, &FloatCC::NotEqual);
+    let v8 = &constructor_bool(ctx, v5, v7);
+    // Rule at src/isa/s390x/lower.isle line 3568.
+    return v8.clone();
+}
+
+// Generated as internal constructor for term value_nonzero.
+pub fn constructor_value_nonzero<C: Context>(ctx: &mut C, arg0: Value) -> ProducesBool {
+    let v1 = C::def_inst(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v3 = &C::inst_data(ctx, v2);
+        match v3 {
+            &InstructionData::FloatCompare {
+                opcode: ref v12,
+                args: ref v13,
+                cond: ref v14,
+            } => {
+                if let &Opcode::Fcmp = v12 {
+                    let v15 = C::unpack_value_array_2(ctx, v13);
+                    let v18 = &constructor_fcmp_val(ctx, v14, v15.0, v15.1);
+                    // Rule at src/isa/s390x/lower.isle line 3706.
+                    return v18.clone();
+                }
+            }
+            &InstructionData::IntCompare {
+                opcode: ref v4,
+                args: ref v5,
+                cond: ref v6,
+            } => {
+                if let &Opcode::Icmp = v4 {
+                    let v7 = C::unpack_value_array_2(ctx, v5);
+                    let v11 = &constructor_icmp_val(ctx, false, v6, v7.0, v7.1);
+                    // Rule at src/isa/s390x/lower.isle line 3705.
+                    return v11.clone();
+                }
+            }
+            _ => {}
+        }
+    }
+    let v19 = C::value_type(ctx, arg0);
+    let v20 = C::gpr32_ty(ctx, v19);
+    if let Some(v21) = v20 {
+        let v23 = constructor_put_in_reg_sext32(ctx, arg0);
+        let v25 = &constructor_icmps_simm16(ctx, I32, v23, 0x0);
+        let v27 = &C::intcc_as_cond(ctx, &IntCC::NotEqual);
+        let v28 = &constructor_bool(ctx, v25, v27);
+        // Rule at src/isa/s390x/lower.isle line 3707.
+        return v28.clone();
+    }
+    let v29 = C::gpr64_ty(ctx, v19);
+    if let Some(v30) = v29 {
+        let v32 = C::put_in_reg(ctx, arg0);
+        let v33 = &constructor_icmps_simm16(ctx, I64, v32, 0x0);
+        let v27 = &C::intcc_as_cond(ctx, &IntCC::NotEqual);
+        let v34 = &constructor_bool(ctx, v33, v27);
+        // Rule at src/isa/s390x/lower.isle line 3710.
+        return v34.clone();
+    }
+    let v35 = C::vr128_ty(ctx, v19);
+    if let Some(v36) = v35 {
+        let v32 = C::put_in_reg(ctx, arg0);
+        let v39 = constructor_vec_imm(ctx, I64X2, 0x0);
+        let v40 = &constructor_vec_cmpeqs(ctx, I64X2, v32, v39);
+        let v42 = &C::floatcc_as_cond(ctx, &FloatCC::NotEqual);
+        let v43 = &constructor_bool(ctx, v40, v42);
+        // Rule at src/isa/s390x/lower.isle line 3713.
+        return v43.clone();
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "value_nonzero", "src/isa/s390x/lower.isle line 3704"
+    )
+}
+
+// Generated as internal constructor for term lower_call_args.
+pub fn constructor_lower_call_args<C: Context>(
+    ctx: &mut C,
+    arg0: Sig,
+    arg1: Range,
+    arg2: ValueSlice,
+) -> CallArgList {
+    let v3 = &C::args_builder_new(ctx);
+    let v4 = constructor_lower_call_args_buffer(ctx, arg0, arg1, arg2);
+    let v5 = constructor_lower_call_args_slots(ctx, arg0, v3, arg1, arg2);
+    let v6 = constructor_lower_call_ret_arg(ctx, arg0, v3);
+    let v7 = &C::args_builder_finish(ctx, v3);
+    // Rule at src/isa/s390x/lower.isle line 3931.
+    return v7.clone();
+}
+
+// Generated as internal constructor for term lower_call_args_buffer.
+pub fn constructor_lower_call_args_buffer<C: Context>(
+    ctx: &mut C,
+    arg0: Sig,
+    arg1: Range,
+    arg2: ValueSlice,
+) -> InstOutput {
+    let v2 = &C::range_view(ctx, arg1);
+    match v2 {
+        &RangeView::Empty => {
+            let v4 = C::output_none(ctx);
+            // Rule at src/isa/s390x/lower.isle line 3940.
+            return v4;
+        }
+        &RangeView::NonEmpty {
+            index: v5,
+            rest: v6,
+        } => {
+            let v8 = &C::abi_get_arg(ctx, arg0, v5);
+            let v9 = C::value_slice_get(ctx, arg2, v5);
+            let v10 = constructor_copy_to_buffer(ctx, 0x0, v8, v9);
+            let v11 = constructor_lower_call_args_buffer(ctx, arg0, v6, arg2);
+            // Rule at src/isa/s390x/lower.isle line 3941.
+            return v11;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "lower_call_args_buffer", "src/isa/s390x/lower.isle line 3939"
+    )
+}
+
+// Generated as internal constructor for term lower_call_args_slots.
+pub fn constructor_lower_call_args_slots<C: Context>(
+    ctx: &mut C,
+    arg0: Sig,
+    arg1: &CallArgListBuilder,
+    arg2: Range,
+    arg3: ValueSlice,
+) -> InstOutput {
+    let v3 = &C::range_view(ctx, arg2);
+    match v3 {
+        &RangeView::Empty => {
+            let v5 = C::output_none(ctx);
+            // Rule at src/isa/s390x/lower.isle line 3948.
+            return v5;
+        }
+        &RangeView::NonEmpty {
+            index: v6,
+            rest: v7,
+        } => {
+            let v8 = &C::abi_lane_order(ctx, arg0);
+            let v10 = &C::abi_get_arg(ctx, arg0, v6);
+            let v11 = C::value_slice_get(ctx, arg3, v6);
+            let v12 = constructor_copy_to_arg(ctx, arg1, v8, 0x0, v10, v11);
+            let v13 = constructor_lower_call_args_slots(ctx, arg0, arg1, v7, arg3);
+            // Rule at src/isa/s390x/lower.isle line 3949.
+            return v13;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "lower_call_args_slots", "src/isa/s390x/lower.isle line 3947"
+    )
+}
+
+// Generated as internal constructor for term lower_call_ret_arg.
+pub fn constructor_lower_call_ret_arg<C: Context>(
+    ctx: &mut C,
+    arg0: Sig,
+    arg1: &CallArgListBuilder,
+) -> InstOutput {
+    let v5 = &C::abi_ret_arg(ctx, arg0);
+    if let Some(v6) = v5 {
+        let v7 = &C::abi_arg_only_slot(ctx, v6);
+        if let Some(v8) = v7 {
+            let v9 = C::abi_sized_stack_arg_space(ctx, arg0);
+            let v11 = &C::memarg_stack_off(ctx, v9, 0x0);
+            let v12 = &C::abi_lane_order(ctx, arg0);
+            let v13 = constructor_load_addr(ctx, v11);
+            let v14 = constructor_copy_reg_to_arg_slot(ctx, arg1, v12, 0x0, v8, v13);
+            // Rule at src/isa/s390x/lower.isle line 3958.
+            return v14;
+        }
+    }
+    let v1 = C::abi_no_ret_arg(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v4 = C::output_none(ctx);
+        // Rule at src/isa/s390x/lower.isle line 3957.
+        return v4;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "lower_call_ret_arg", "src/isa/s390x/lower.isle line 3956"
+    )
+}
+
+// Generated as internal constructor for term lower_call_rets.
+pub fn constructor_lower_call_rets<C: Context>(
+    ctx: &mut C,
+    arg0: Sig,
+    arg1: &CallRetList,
+    arg2: Range,
+    arg3: &InstOutputBuilder,
+) -> InstOutput {
+    let v3 = &C::range_view(ctx, arg2);
+    match v3 {
+        &RangeView::Empty => {
+            let v5 = C::output_builder_finish(ctx, arg3);
+            // Rule at src/isa/s390x/lower.isle line 3964.
+            return v5;
+        }
+        &RangeView::NonEmpty {
+            index: v6,
+            rest: v7,
+        } => {
+            let v8 = &C::abi_lane_order(ctx, arg0);
+            let v9 = C::abi_sized_stack_arg_space(ctx, arg0);
+            let v10 = &C::abi_get_ret(ctx, arg0, v6);
+            let v11 = constructor_copy_from_arg(ctx, arg1, v8, v9, v10);
+            let v12 = C::output_builder_push(ctx, arg3, v11);
+            let v13 = constructor_lower_call_rets(ctx, arg0, arg1, v7, arg3);
+            // Rule at src/isa/s390x/lower.isle line 3965.
+            return v13;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "lower_call_rets", "src/isa/s390x/lower.isle line 3963"
+    )
+}
diff --git a/cranelift/codegen/isle_generated_code/isle_x64.rs b/cranelift/codegen/isle_generated_code/isle_x64.rs
new file mode 100644
index 000000000000..e0452b9e0ef8
--- /dev/null
+++ b/cranelift/codegen/isle_generated_code/isle_x64.rs
@@ -0,0 +1,20315 @@
+// GENERATED BY ISLE. DO NOT EDIT!
+//
+// Generated automatically from the instruction-selection DSL code in:
+// - src/prelude.isle
+// - src/prelude_lower.isle
+// - src/isa/x64/inst.isle
+// - src/isa/x64/lower.isle
+// - /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_lower.isle
+
+use super::*; // Pulls in all external types.
+use std::marker::PhantomData;
+
+/// Context during lowering: an implementation of this trait
+/// must be provided with all external constructors and extractors.
+/// A mutable borrow is passed along through all lowering logic.
+pub trait Context {
+    fn unit(&mut self) -> Unit;
+    fn value_type(&mut self, arg0: Value) -> Type;
+    fn u32_nonnegative(&mut self, arg0: u32) -> Option<u32>;
+    fn offset32(&mut self, arg0: Offset32) -> u32;
+    fn u32_lteq(&mut self, arg0: u32, arg1: u32) -> Option<Unit>;
+    fn u8_lteq(&mut self, arg0: u8, arg1: u8) -> Option<Unit>;
+    fn u8_lt(&mut self, arg0: u8, arg1: u8) -> Option<Unit>;
+    fn simm32(&mut self, arg0: Imm64) -> Option<u32>;
+    fn uimm8(&mut self, arg0: Imm64) -> Option<u8>;
+    fn u8_as_u32(&mut self, arg0: u8) -> u32;
+    fn u8_as_u64(&mut self, arg0: u8) -> u64;
+    fn u16_as_u64(&mut self, arg0: u16) -> u64;
+    fn u32_as_u64(&mut self, arg0: u32) -> u64;
+    fn i64_as_u64(&mut self, arg0: i64) -> u64;
+    fn i64_neg(&mut self, arg0: i64) -> i64;
+    fn u128_as_u64(&mut self, arg0: u128) -> Option<u64>;
+    fn u64_as_u32(&mut self, arg0: u64) -> Option<u32>;
+    fn u64_as_i32(&mut self, arg0: u64) -> i32;
+    fn u8_and(&mut self, arg0: u8, arg1: u8) -> u8;
+    fn u8_shl(&mut self, arg0: u8, arg1: u8) -> u8;
+    fn u8_shr(&mut self, arg0: u8, arg1: u8) -> u8;
+    fn u32_add(&mut self, arg0: u32, arg1: u32) -> u32;
+    fn u32_sub(&mut self, arg0: u32, arg1: u32) -> u32;
+    fn u32_and(&mut self, arg0: u32, arg1: u32) -> u32;
+    fn s32_add_fallible(&mut self, arg0: u32, arg1: u32) -> Option<u32>;
+    fn u64_add(&mut self, arg0: u64, arg1: u64) -> u64;
+    fn u64_sub(&mut self, arg0: u64, arg1: u64) -> u64;
+    fn u64_mul(&mut self, arg0: u64, arg1: u64) -> u64;
+    fn u64_sdiv(&mut self, arg0: u64, arg1: u64) -> Option<u64>;
+    fn u64_udiv(&mut self, arg0: u64, arg1: u64) -> Option<u64>;
+    fn u64_and(&mut self, arg0: u64, arg1: u64) -> u64;
+    fn u64_or(&mut self, arg0: u64, arg1: u64) -> u64;
+    fn u64_xor(&mut self, arg0: u64, arg1: u64) -> u64;
+    fn u64_shl(&mut self, arg0: u64, arg1: u64) -> u64;
+    fn imm64_shl(&mut self, arg0: Type, arg1: Imm64, arg2: Imm64) -> Imm64;
+    fn imm64_ushr(&mut self, arg0: Type, arg1: Imm64, arg2: Imm64) -> Imm64;
+    fn imm64_sshr(&mut self, arg0: Type, arg1: Imm64, arg2: Imm64) -> Imm64;
+    fn u64_not(&mut self, arg0: u64) -> u64;
+    fn u64_eq(&mut self, arg0: u64, arg1: u64) -> bool;
+    fn u64_le(&mut self, arg0: u64, arg1: u64) -> bool;
+    fn u64_lt(&mut self, arg0: u64, arg1: u64) -> bool;
+    fn i64_sextend_imm64(&mut self, arg0: Type, arg1: Imm64) -> i64;
+    fn u64_uextend_imm64(&mut self, arg0: Type, arg1: Imm64) -> u64;
+    fn imm64_icmp(&mut self, arg0: Type, arg1: &IntCC, arg2: Imm64, arg3: Imm64) -> Imm64;
+    fn u64_is_zero(&mut self, arg0: u64) -> bool;
+    fn u64_is_odd(&mut self, arg0: u64) -> bool;
+    fn ty_umin(&mut self, arg0: Type) -> u64;
+    fn ty_umax(&mut self, arg0: Type) -> u64;
+    fn ty_smin(&mut self, arg0: Type) -> u64;
+    fn ty_smax(&mut self, arg0: Type) -> u64;
+    fn ty_bits(&mut self, arg0: Type) -> u8;
+    fn ty_bits_u16(&mut self, arg0: Type) -> u16;
+    fn ty_bits_u64(&mut self, arg0: Type) -> u64;
+    fn ty_mask(&mut self, arg0: Type) -> u64;
+    fn ty_lane_mask(&mut self, arg0: Type) -> u64;
+    fn ty_lane_count(&mut self, arg0: Type) -> u64;
+    fn ty_bytes(&mut self, arg0: Type) -> u16;
+    fn lane_type(&mut self, arg0: Type) -> Type;
+    fn ty_half_lanes(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_half_width(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_equal(&mut self, arg0: Type, arg1: Type) -> bool;
+    fn mem_flags_trusted(&mut self) -> MemFlags;
+    fn intcc_reverse(&mut self, arg0: &IntCC) -> IntCC;
+    fn intcc_inverse(&mut self, arg0: &IntCC) -> IntCC;
+    fn floatcc_reverse(&mut self, arg0: &FloatCC) -> FloatCC;
+    fn floatcc_inverse(&mut self, arg0: &FloatCC) -> FloatCC;
+    fn floatcc_unordered(&mut self, arg0: &FloatCC) -> bool;
+    fn fits_in_16(&mut self, arg0: Type) -> Option<Type>;
+    fn fits_in_32(&mut self, arg0: Type) -> Option<Type>;
+    fn lane_fits_in_32(&mut self, arg0: Type) -> Option<Type>;
+    fn fits_in_64(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_32(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_64(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_int_ref_scalar_64_extract(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_int_ref_scalar_64(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_32_or_64(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_8_or_16(&mut self, arg0: Type) -> Option<Type>;
+    fn int_fits_in_32(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_int_ref_64(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_int_ref_16_to_64(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_int(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_scalar(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_scalar_float(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_float_or_vec(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_vector_float(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_vector_not_float(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_vec64(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_vec64_ctor(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_vec128(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_dyn_vec64(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_dyn_vec128(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_vec64_int(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_vec128_int(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_addr64(&mut self, arg0: Type) -> Option<Type>;
+    fn not_vec32x2(&mut self, arg0: Type) -> Option<Type>;
+    fn not_i64x2(&mut self, arg0: Type) -> Option<()>;
+    fn u8_from_uimm8(&mut self, arg0: Uimm8) -> u8;
+    fn u64_from_bool(&mut self, arg0: bool) -> u64;
+    fn u64_from_imm64(&mut self, arg0: Imm64) -> u64;
+    fn nonzero_u64_from_imm64(&mut self, arg0: Imm64) -> Option<u64>;
+    fn imm64_power_of_two(&mut self, arg0: Imm64) -> Option<u64>;
+    fn imm64(&mut self, arg0: u64) -> Imm64;
+    fn imm64_masked(&mut self, arg0: Type, arg1: u64) -> Imm64;
+    fn u32_from_ieee32(&mut self, arg0: Ieee32) -> u32;
+    fn u64_from_ieee64(&mut self, arg0: Ieee64) -> u64;
+    fn multi_lane(&mut self, arg0: Type) -> Option<(u32, u32)>;
+    fn dynamic_lane(&mut self, arg0: Type) -> Option<(u32, u32)>;
+    fn dynamic_int_lane(&mut self, arg0: Type) -> Option<u32>;
+    fn dynamic_fp_lane(&mut self, arg0: Type) -> Option<u32>;
+    fn ty_dyn64_int(&mut self, arg0: Type) -> Option<Type>;
+    fn ty_dyn128_int(&mut self, arg0: Type) -> Option<Type>;
+    fn offset32_to_u32(&mut self, arg0: Offset32) -> u32;
+    fn u32_to_offset32(&mut self, arg0: u32) -> Offset32;
+    fn intcc_unsigned(&mut self, arg0: &IntCC) -> IntCC;
+    fn signed_cond_code(&mut self, arg0: &IntCC) -> Option<IntCC>;
+    fn trap_code_division_by_zero(&mut self) -> TrapCode;
+    fn trap_code_integer_overflow(&mut self) -> TrapCode;
+    fn trap_code_bad_conversion_to_integer(&mut self) -> TrapCode;
+    fn range(&mut self, arg0: usize, arg1: usize) -> Range;
+    fn range_view(&mut self, arg0: Range) -> RangeView;
+    fn value_reg(&mut self, arg0: Reg) -> ValueRegs;
+    fn value_regs(&mut self, arg0: Reg, arg1: Reg) -> ValueRegs;
+    fn value_regs_invalid(&mut self) -> ValueRegs;
+    fn output_none(&mut self) -> InstOutput;
+    fn output(&mut self, arg0: ValueRegs) -> InstOutput;
+    fn output_pair(&mut self, arg0: ValueRegs, arg1: ValueRegs) -> InstOutput;
+    fn output_builder_new(&mut self) -> InstOutputBuilder;
+    fn output_builder_push(&mut self, arg0: &InstOutputBuilder, arg1: ValueRegs) -> Unit;
+    fn output_builder_finish(&mut self, arg0: &InstOutputBuilder) -> InstOutput;
+    fn temp_writable_reg(&mut self, arg0: Type) -> WritableReg;
+    fn is_valid_reg(&mut self, arg0: Reg) -> bool;
+    fn invalid_reg(&mut self) -> Reg;
+    fn mark_value_used(&mut self, arg0: Value) -> Unit;
+    fn put_in_reg(&mut self, arg0: Value) -> Reg;
+    fn put_in_regs(&mut self, arg0: Value) -> ValueRegs;
+    fn ensure_in_vreg(&mut self, arg0: Reg, arg1: Type) -> Reg;
+    fn value_regs_get(&mut self, arg0: ValueRegs, arg1: usize) -> Reg;
+    fn value_regs_len(&mut self, arg0: ValueRegs) -> usize;
+    fn preg_to_reg(&mut self, arg0: PReg) -> Reg;
+    fn value_list_slice(&mut self, arg0: ValueList) -> ValueSlice;
+    fn value_slice_empty(&mut self, arg0: ValueSlice) -> Option<()>;
+    fn value_slice_unwrap(&mut self, arg0: ValueSlice) -> Option<(Value, ValueSlice)>;
+    fn value_slice_len(&mut self, arg0: ValueSlice) -> usize;
+    fn value_slice_get(&mut self, arg0: ValueSlice, arg1: usize) -> Value;
+    fn writable_reg_to_reg(&mut self, arg0: WritableReg) -> Reg;
+    fn inst_results(&mut self, arg0: Inst) -> ValueSlice;
+    fn first_result(&mut self, arg0: Inst) -> Option<Value>;
+    fn inst_data(&mut self, arg0: Inst) -> InstructionData;
+    fn def_inst(&mut self, arg0: Value) -> Option<Inst>;
+    fn zero_value(&mut self, arg0: Value) -> Option<Value>;
+    fn is_sinkable_inst(&mut self, arg0: Value) -> Option<Inst>;
+    fn maybe_uextend(&mut self, arg0: Value) -> Option<Value>;
+    fn emit(&mut self, arg0: &MInst) -> Unit;
+    fn sink_inst(&mut self, arg0: Inst) -> Unit;
+    fn emit_u64_le_const(&mut self, arg0: u64) -> VCodeConstant;
+    fn emit_u128_le_const(&mut self, arg0: u128) -> VCodeConstant;
+    fn const_to_vconst(&mut self, arg0: Constant) -> VCodeConstant;
+    fn tls_model(&mut self, arg0: Type) -> TlsModel;
+    fn tls_model_is_elf_gd(&mut self) -> Option<Unit>;
+    fn tls_model_is_macho(&mut self) -> Option<Unit>;
+    fn tls_model_is_coff(&mut self) -> Option<Unit>;
+    fn preserve_frame_pointers(&mut self) -> Option<Unit>;
+    fn box_external_name(&mut self, arg0: ExternalName) -> BoxExternalName;
+    fn func_ref_data(&mut self, arg0: FuncRef) -> (SigRef, ExternalName, RelocDistance);
+    fn symbol_value_data(
+        &mut self,
+        arg0: GlobalValue,
+    ) -> Option<(ExternalName, RelocDistance, i64)>;
+    fn reloc_distance_near(&mut self, arg0: RelocDistance) -> Option<()>;
+    fn vec_mask_from_immediate(&mut self, arg0: Immediate) -> Option<VecMask>;
+    fn u128_from_immediate(&mut self, arg0: Immediate) -> Option<u128>;
+    fn vconst_from_immediate(&mut self, arg0: Immediate) -> Option<VCodeConstant>;
+    fn u128_from_constant(&mut self, arg0: Constant) -> Option<u128>;
+    fn u64_from_constant(&mut self, arg0: Constant) -> Option<u64>;
+    fn shuffle64_from_imm(&mut self, arg0: Immediate) -> Option<(u8, u8)>;
+    fn shuffle32_from_imm(&mut self, arg0: Immediate) -> Option<(u8, u8, u8, u8)>;
+    fn shuffle16_from_imm(&mut self, arg0: Immediate) -> Option<(u8, u8, u8, u8, u8, u8, u8, u8)>;
+    fn only_writable_reg(&mut self, arg0: WritableValueRegs) -> Option<WritableReg>;
+    fn writable_regs_get(&mut self, arg0: WritableValueRegs, arg1: usize) -> WritableReg;
+    fn abi_num_args(&mut self, arg0: Sig) -> usize;
+    fn abi_get_arg(&mut self, arg0: Sig, arg1: usize) -> ABIArg;
+    fn abi_num_rets(&mut self, arg0: Sig) -> usize;
+    fn abi_get_ret(&mut self, arg0: Sig, arg1: usize) -> ABIArg;
+    fn abi_ret_arg(&mut self, arg0: Sig) -> Option<ABIArg>;
+    fn abi_no_ret_arg(&mut self, arg0: Sig) -> Option<()>;
+    fn abi_sized_stack_arg_space(&mut self, arg0: Sig) -> i64;
+    fn abi_sized_stack_ret_space(&mut self, arg0: Sig) -> i64;
+    fn abi_stackslot_addr(&mut self, arg0: WritableReg, arg1: StackSlot, arg2: Offset32) -> MInst;
+    fn abi_dynamic_stackslot_addr(&mut self, arg0: WritableReg, arg1: DynamicStackSlot) -> MInst;
+    fn abi_arg_only_slot(&mut self, arg0: &ABIArg) -> Option<ABIArgSlot>;
+    fn abi_arg_struct_pointer(&mut self, arg0: &ABIArg) -> Option<(ABIArgSlot, i64, u64)>;
+    fn abi_arg_implicit_pointer(&mut self, arg0: &ABIArg) -> Option<(ABIArgSlot, i64, Type)>;
+    fn real_reg_to_reg(&mut self, arg0: RealReg) -> Reg;
+    fn real_reg_to_writable_reg(&mut self, arg0: RealReg) -> WritableReg;
+    fn gen_move(&mut self, arg0: Type, arg1: WritableReg, arg2: Reg) -> MInst;
+    fn gen_return(&mut self, arg0: ValueSlice) -> Unit;
+    fn gen_return_call(
+        &mut self,
+        arg0: SigRef,
+        arg1: ExternalName,
+        arg2: RelocDistance,
+        arg3: ValueSlice,
+    ) -> InstOutput;
+    fn gen_return_call_indirect(
+        &mut self,
+        arg0: SigRef,
+        arg1: Value,
+        arg2: ValueSlice,
+    ) -> InstOutput;
+    fn safe_divisor_from_imm64(&mut self, arg0: Type, arg1: Imm64) -> Option<u64>;
+    fn jump_table_size(&mut self, arg0: &BoxVecMachLabel) -> u32;
+    fn single_target(&mut self, arg0: &MachLabelSlice) -> Option<MachLabel>;
+    fn two_targets(&mut self, arg0: &MachLabelSlice) -> Option<(MachLabel, MachLabel)>;
+    fn jump_table_targets(&mut self, arg0: &MachLabelSlice)
+        -> Option<(MachLabel, BoxVecMachLabel)>;
+    fn operand_size_of_type_32_64(&mut self, arg0: Type) -> OperandSize;
+    fn raw_operand_size_of_type(&mut self, arg0: Type) -> OperandSize;
+    fn put_in_reg_mem_imm(&mut self, arg0: Value) -> RegMemImm;
+    fn put_in_reg_mem(&mut self, arg0: Value) -> RegMem;
+    fn synthetic_amode_to_reg_mem(&mut self, arg0: &SyntheticAmode) -> RegMem;
+    fn amode_to_synthetic_amode(&mut self, arg0: &Amode) -> SyntheticAmode;
+    fn sum_extend_fits_in_32_bits(
+        &mut self,
+        arg0: Type,
+        arg1: Imm64,
+        arg2: Offset32,
+    ) -> Option<u32>;
+    fn amode_offset(&mut self, arg0: &Amode, arg1: u32) -> Amode;
+    fn zero_offset(&mut self) -> Offset32;
+    fn intcc_to_cc(&mut self, arg0: &IntCC) -> CC;
+    fn cc_invert(&mut self, arg0: &CC) -> CC;
+    fn cc_nz_or_z(&mut self, arg0: &CC) -> Option<CC>;
+    fn encode_fcmp_imm(&mut self, arg0: &FcmpImm) -> u8;
+    fn encode_round_imm(&mut self, arg0: &RoundImm) -> u8;
+    fn imm8_reg_to_imm8_gpr(&mut self, arg0: &Imm8Reg) -> Imm8Gpr;
+    fn writable_gpr_to_reg(&mut self, arg0: WritableGpr) -> WritableReg;
+    fn writable_xmm_to_reg(&mut self, arg0: WritableXmm) -> WritableReg;
+    fn writable_reg_to_xmm(&mut self, arg0: WritableReg) -> WritableXmm;
+    fn writable_xmm_to_xmm(&mut self, arg0: WritableXmm) -> Xmm;
+    fn writable_gpr_to_gpr(&mut self, arg0: WritableGpr) -> Gpr;
+    fn gpr_to_reg(&mut self, arg0: Gpr) -> Reg;
+    fn gpr_to_gpr_mem(&mut self, arg0: Gpr) -> GprMem;
+    fn gpr_to_gpr_mem_imm(&mut self, arg0: Gpr) -> GprMemImm;
+    fn xmm_to_reg(&mut self, arg0: Xmm) -> Reg;
+    fn xmm_to_xmm_mem_imm(&mut self, arg0: Xmm) -> XmmMemImm;
+    fn xmm_mem_to_xmm_mem_imm(&mut self, arg0: &XmmMem) -> XmmMemImm;
+    fn xmm_mem_to_xmm_mem_aligned(&mut self, arg0: &XmmMem) -> XmmMemAligned;
+    fn xmm_mem_imm_to_xmm_mem_aligned_imm(&mut self, arg0: &XmmMemImm) -> XmmMemAlignedImm;
+    fn temp_writable_gpr(&mut self) -> WritableGpr;
+    fn temp_writable_xmm(&mut self) -> WritableXmm;
+    fn reg_mem_to_xmm_mem(&mut self, arg0: &RegMem) -> XmmMem;
+    fn reg_to_reg_mem_imm(&mut self, arg0: Reg) -> RegMemImm;
+    fn gpr_mem_imm_new(&mut self, arg0: &RegMemImm) -> GprMemImm;
+    fn xmm_mem_imm_new(&mut self, arg0: &RegMemImm) -> XmmMemImm;
+    fn xmm_to_xmm_mem(&mut self, arg0: Xmm) -> XmmMem;
+    fn xmm_mem_to_reg_mem(&mut self, arg0: &XmmMem) -> RegMem;
+    fn gpr_mem_to_reg_mem(&mut self, arg0: &GprMem) -> RegMem;
+    fn xmm_new(&mut self, arg0: Reg) -> Xmm;
+    fn gpr_new(&mut self, arg0: Reg) -> Gpr;
+    fn reg_mem_to_gpr_mem(&mut self, arg0: &RegMem) -> GprMem;
+    fn reg_to_gpr_mem(&mut self, arg0: Reg) -> GprMem;
+    fn put_in_xmm_mem(&mut self, arg0: Value) -> XmmMem;
+    fn put_in_xmm_mem_imm(&mut self, arg0: Value) -> XmmMemImm;
+    fn gpr_to_imm8_gpr(&mut self, arg0: Gpr) -> Imm8Gpr;
+    fn imm8_to_imm8_gpr(&mut self, arg0: u8) -> Imm8Gpr;
+    fn xmi_imm(&mut self, arg0: u32) -> XmmMemImm;
+    fn intcc_without_eq(&mut self, arg0: &IntCC) -> IntCC;
+    fn type_register_class(&mut self, arg0: Type) -> Option<RegisterClass>;
+    fn use_avx512vl(&mut self) -> bool;
+    fn use_avx512dq(&mut self) -> bool;
+    fn use_avx512f(&mut self) -> bool;
+    fn use_avx512bitalg(&mut self) -> bool;
+    fn use_avx512vbmi(&mut self) -> bool;
+    fn use_lzcnt(&mut self) -> bool;
+    fn use_bmi1(&mut self) -> bool;
+    fn use_popcnt(&mut self) -> bool;
+    fn use_fma(&mut self) -> bool;
+    fn use_ssse3(&mut self) -> bool;
+    fn use_sse41(&mut self) -> bool;
+    fn use_sse42(&mut self) -> bool;
+    fn use_avx(&mut self) -> bool;
+    fn use_avx2(&mut self) -> bool;
+    fn imm8_from_value(&mut self, arg0: Value) -> Option<Imm8Reg>;
+    fn const_to_type_masked_imm8(&mut self, arg0: u64, arg1: Type) -> Imm8Gpr;
+    fn shift_mask(&mut self, arg0: Type) -> u8;
+    fn shift_amount_masked(&mut self, arg0: Type, arg1: Imm64) -> u8;
+    fn simm32_from_value(&mut self, arg0: Value) -> Option<GprMemImm>;
+    fn simm32_from_imm64(&mut self, arg0: Imm64) -> Option<GprMemImm>;
+    fn sinkable_load(&mut self, arg0: Value) -> Option<SinkableLoad>;
+    fn sinkable_load_exact(&mut self, arg0: Value) -> Option<SinkableLoad>;
+    fn sink_load(&mut self, arg0: &SinkableLoad) -> SyntheticAmode;
+    fn ext_mode(&mut self, arg0: u16, arg1: u16) -> ExtMode;
+    fn gen_call(
+        &mut self,
+        arg0: SigRef,
+        arg1: ExternalName,
+        arg2: RelocDistance,
+        arg3: ValueSlice,
+    ) -> InstOutput;
+    fn gen_call_indirect(&mut self, arg0: SigRef, arg1: Value, arg2: ValueSlice) -> InstOutput;
+    fn nonzero_u64_fits_in_u32(&mut self, arg0: u64) -> Option<u64>;
+    fn ty_int_bool_or_ref(&mut self, arg0: Type) -> Option<()>;
+    fn atomic_rmw_op_to_mach_atomic_rmw_op(&mut self, arg0: &AtomicRmwOp) -> MachAtomicRmwOp;
+    fn shuffle_0_31_mask(&mut self, arg0: &VecMask) -> VCodeConstant;
+    fn shuffle_0_15_mask(&mut self, arg0: &VecMask) -> VCodeConstant;
+    fn shuffle_16_31_mask(&mut self, arg0: &VecMask) -> VCodeConstant;
+    fn perm_from_mask(&mut self, arg0: &VecMask) -> VCodeConstant;
+    fn perm_from_mask_with_zeros(
+        &mut self,
+        arg0: &VecMask,
+    ) -> Option<(VCodeConstant, VCodeConstant)>;
+    fn const_to_synthetic_amode(&mut self, arg0: VCodeConstant) -> SyntheticAmode;
+    fn preg_rbp(&mut self) -> PReg;
+    fn preg_rsp(&mut self) -> PReg;
+    fn preg_pinned(&mut self) -> PReg;
+    fn libcall_1(&mut self, arg0: &LibCall, arg1: Reg) -> Reg;
+    fn libcall_2(&mut self, arg0: &LibCall, arg1: Reg, arg2: Reg) -> Reg;
+    fn libcall_3(&mut self, arg0: &LibCall, arg1: Reg, arg2: Reg, arg3: Reg) -> Reg;
+    fn ishl_i8x16_mask_for_const(&mut self, arg0: u32) -> SyntheticAmode;
+    fn ishl_i8x16_mask_table(&mut self) -> SyntheticAmode;
+    fn ushr_i8x16_mask_for_const(&mut self, arg0: u32) -> SyntheticAmode;
+    fn ushr_i8x16_mask_table(&mut self) -> SyntheticAmode;
+    fn vconst_all_ones_or_all_zeros(&mut self, arg0: Constant) -> Option<()>;
+    fn insert_i8x16_lane_hole(&mut self, arg0: u8) -> VCodeConstant;
+    fn sse_insertps_lane_imm(&mut self, arg0: u8) -> u8;
+    fn pblendw_imm(&mut self, arg0: Immediate) -> Option<u8>;
+    fn palignr_imm_from_immediate(&mut self, arg0: Immediate) -> Option<u8>;
+    fn pshuflw_lhs_imm(&mut self, arg0: Immediate) -> Option<u8>;
+    fn pshuflw_rhs_imm(&mut self, arg0: Immediate) -> Option<u8>;
+    fn pshufhw_lhs_imm(&mut self, arg0: Immediate) -> Option<u8>;
+    fn pshufhw_rhs_imm(&mut self, arg0: Immediate) -> Option<u8>;
+    fn pshufd_lhs_imm(&mut self, arg0: Immediate) -> Option<u8>;
+    fn pshufd_rhs_imm(&mut self, arg0: Immediate) -> Option<u8>;
+    fn shufps_imm(&mut self, arg0: Immediate) -> Option<u8>;
+    fn shufps_rev_imm(&mut self, arg0: Immediate) -> Option<u8>;
+    fn unpack_value_array_2(&mut self, arg0: &ValueArray2) -> (Value, Value);
+    fn pack_value_array_2(&mut self, arg0: Value, arg1: Value) -> ValueArray2;
+    fn unpack_value_array_3(&mut self, arg0: &ValueArray3) -> (Value, Value, Value);
+    fn pack_value_array_3(&mut self, arg0: Value, arg1: Value, arg2: Value) -> ValueArray3;
+    fn unpack_block_array_2(&mut self, arg0: &BlockArray2) -> (BlockCall, BlockCall);
+    fn pack_block_array_2(&mut self, arg0: BlockCall, arg1: BlockCall) -> BlockArray2;
+}
+
+pub trait ContextIter {
+    type Context;
+    type Output;
+    fn next(&mut self, ctx: &mut Self::Context) -> Option<Self::Output>;
+}
+
+pub struct ContextIterWrapper<Item, I: Iterator<Item = Item>, C: Context> {
+    iter: I,
+    _ctx: PhantomData<C>,
+}
+impl<Item, I: Iterator<Item = Item>, C: Context> From<I> for ContextIterWrapper<Item, I, C> {
+    fn from(iter: I) -> Self {
+        Self {
+            iter,
+            _ctx: PhantomData,
+        }
+    }
+}
+impl<Item, I: Iterator<Item = Item>, C: Context> ContextIter for ContextIterWrapper<Item, I, C> {
+    type Context = C;
+    type Output = Item;
+    fn next(&mut self, _ctx: &mut Self::Context) -> Option<Self::Output> {
+        self.iter.next()
+    }
+}
+
+/// Internal type MultiReg: defined at src/prelude_lower.isle line 21.
+#[derive(Clone, Debug)]
+pub enum MultiReg {
+    Empty,
+    One { a: Reg },
+    Two { a: Reg, b: Reg },
+    Three { a: Reg, b: Reg, c: Reg },
+    Four { a: Reg, b: Reg, c: Reg, d: Reg },
+}
+
+/// Internal type SideEffectNoResult: defined at src/prelude_lower.isle line 309.
+#[derive(Clone, Debug)]
+pub enum SideEffectNoResult {
+    Inst {
+        inst: MInst,
+    },
+    Inst2 {
+        inst1: MInst,
+        inst2: MInst,
+    },
+    Inst3 {
+        inst1: MInst,
+        inst2: MInst,
+        inst3: MInst,
+    },
+}
+
+/// Internal type ProducesFlags: defined at src/prelude_lower.isle line 351.
+#[derive(Clone, Debug)]
+pub enum ProducesFlags {
+    AlreadyExistingFlags,
+    ProducesFlagsSideEffect { inst: MInst },
+    ProducesFlagsTwiceSideEffect { inst1: MInst, inst2: MInst },
+    ProducesFlagsReturnsReg { inst: MInst, result: Reg },
+    ProducesFlagsReturnsResultWithConsumer { inst: MInst, result: Reg },
+}
+
+/// Internal type ConsumesAndProducesFlags: defined at src/prelude_lower.isle line 370.
+#[derive(Clone, Debug)]
+pub enum ConsumesAndProducesFlags {
+    SideEffect { inst: MInst },
+    ReturnsReg { inst: MInst, result: Reg },
+}
+
+/// Internal type ConsumesFlags: defined at src/prelude_lower.isle line 378.
+#[derive(Clone, Debug)]
+pub enum ConsumesFlags {
+    ConsumesFlagsSideEffect {
+        inst: MInst,
+    },
+    ConsumesFlagsSideEffect2 {
+        inst1: MInst,
+        inst2: MInst,
+    },
+    ConsumesFlagsReturnsResultWithProducer {
+        inst: MInst,
+        result: Reg,
+    },
+    ConsumesFlagsReturnsReg {
+        inst: MInst,
+        result: Reg,
+    },
+    ConsumesFlagsTwiceReturnsValueRegs {
+        inst1: MInst,
+        inst2: MInst,
+        result: ValueRegs,
+    },
+    ConsumesFlagsFourTimesReturnsValueRegs {
+        inst1: MInst,
+        inst2: MInst,
+        inst3: MInst,
+        inst4: MInst,
+        result: ValueRegs,
+    },
+}
+
+/// Internal type MInst: defined at src/isa/x64/inst.isle line 8.
+#[derive(Clone)]
+pub enum MInst {
+    Nop {
+        len: u8,
+    },
+    AluRmiR {
+        size: OperandSize,
+        op: AluRmiROpcode,
+        src1: Gpr,
+        src2: GprMemImm,
+        dst: WritableGpr,
+    },
+    AluRM {
+        size: OperandSize,
+        op: AluRmiROpcode,
+        src1_dst: SyntheticAmode,
+        src2: Gpr,
+    },
+    AluRmRVex {
+        size: OperandSize,
+        op: AluRmROpcode,
+        src1: Gpr,
+        src2: Gpr,
+        dst: WritableGpr,
+    },
+    AluConstOp {
+        op: AluRmiROpcode,
+        size: OperandSize,
+        dst: WritableGpr,
+    },
+    UnaryRmR {
+        size: OperandSize,
+        op: UnaryRmROpcode,
+        src: GprMem,
+        dst: WritableGpr,
+    },
+    UnaryRmRVex {
+        size: OperandSize,
+        op: UnaryRmRVexOpcode,
+        src: GprMem,
+        dst: WritableGpr,
+    },
+    Not {
+        size: OperandSize,
+        src: Gpr,
+        dst: WritableGpr,
+    },
+    Neg {
+        size: OperandSize,
+        src: Gpr,
+        dst: WritableGpr,
+    },
+    Div {
+        size: OperandSize,
+        sign: DivSignedness,
+        trap: TrapCode,
+        divisor: GprMem,
+        dividend_lo: Gpr,
+        dividend_hi: Gpr,
+        dst_quotient: WritableGpr,
+        dst_remainder: WritableGpr,
+    },
+    Div8 {
+        sign: DivSignedness,
+        trap: TrapCode,
+        divisor: GprMem,
+        dividend: Gpr,
+        dst: WritableGpr,
+    },
+    MulHi {
+        size: OperandSize,
+        signed: bool,
+        src1: Gpr,
+        src2: GprMem,
+        dst_lo: WritableGpr,
+        dst_hi: WritableGpr,
+    },
+    UMulLo {
+        size: OperandSize,
+        src1: Gpr,
+        src2: GprMem,
+        dst: WritableGpr,
+    },
+    CheckedSRemSeq {
+        size: OperandSize,
+        dividend_lo: Gpr,
+        dividend_hi: Gpr,
+        divisor: Gpr,
+        dst_quotient: WritableGpr,
+        dst_remainder: WritableGpr,
+    },
+    CheckedSRemSeq8 {
+        dividend: Gpr,
+        divisor: Gpr,
+        dst: WritableGpr,
+    },
+    SignExtendData {
+        size: OperandSize,
+        src: Gpr,
+        dst: WritableGpr,
+    },
+    Imm {
+        dst_size: OperandSize,
+        simm64: u64,
+        dst: WritableGpr,
+    },
+    MovRR {
+        size: OperandSize,
+        src: Gpr,
+        dst: WritableGpr,
+    },
+    MovFromPReg {
+        src: PReg,
+        dst: WritableGpr,
+    },
+    MovToPReg {
+        src: Gpr,
+        dst: PReg,
+    },
+    MovzxRmR {
+        ext_mode: ExtMode,
+        src: GprMem,
+        dst: WritableGpr,
+    },
+    Mov64MR {
+        src: SyntheticAmode,
+        dst: WritableGpr,
+    },
+    LoadEffectiveAddress {
+        addr: SyntheticAmode,
+        dst: WritableGpr,
+        size: OperandSize,
+    },
+    MovsxRmR {
+        ext_mode: ExtMode,
+        src: GprMem,
+        dst: WritableGpr,
+    },
+    MovImmM {
+        size: OperandSize,
+        simm64: u64,
+        dst: SyntheticAmode,
+    },
+    MovRM {
+        size: OperandSize,
+        src: Gpr,
+        dst: SyntheticAmode,
+    },
+    ShiftR {
+        size: OperandSize,
+        kind: ShiftKind,
+        src: Gpr,
+        num_bits: Imm8Gpr,
+        dst: WritableGpr,
+    },
+    XmmRmiReg {
+        opcode: SseOpcode,
+        src1: Xmm,
+        src2: XmmMemAlignedImm,
+        dst: WritableXmm,
+    },
+    CmpRmiR {
+        size: OperandSize,
+        opcode: CmpOpcode,
+        src: GprMemImm,
+        dst: Gpr,
+    },
+    Setcc {
+        cc: CC,
+        dst: WritableGpr,
+    },
+    Bswap {
+        size: OperandSize,
+        src: Gpr,
+        dst: WritableGpr,
+    },
+    Cmove {
+        size: OperandSize,
+        cc: CC,
+        consequent: GprMem,
+        alternative: Gpr,
+        dst: WritableGpr,
+    },
+    XmmCmove {
+        ty: Type,
+        cc: CC,
+        consequent: XmmMemAligned,
+        alternative: Xmm,
+        dst: WritableXmm,
+    },
+    Push64 {
+        src: GprMemImm,
+    },
+    Pop64 {
+        dst: WritableGpr,
+    },
+    StackProbeLoop {
+        tmp: WritableReg,
+        frame_size: u32,
+        guard_size: u32,
+    },
+    XmmRmR {
+        op: SseOpcode,
+        src1: Xmm,
+        src2: XmmMemAligned,
+        dst: WritableXmm,
+    },
+    XmmRmRUnaligned {
+        op: SseOpcode,
+        src1: Xmm,
+        src2: XmmMem,
+        dst: WritableXmm,
+    },
+    XmmRmRBlend {
+        op: SseOpcode,
+        src1: Xmm,
+        src2: XmmMemAligned,
+        mask: Xmm,
+        dst: WritableXmm,
+    },
+    XmmRmiRVex {
+        op: AvxOpcode,
+        src1: Xmm,
+        src2: XmmMemImm,
+        dst: WritableXmm,
+    },
+    XmmRmRImmVex {
+        op: AvxOpcode,
+        src1: Xmm,
+        src2: XmmMem,
+        dst: WritableXmm,
+        imm: u8,
+    },
+    XmmVexPinsr {
+        op: AvxOpcode,
+        src1: Xmm,
+        src2: GprMem,
+        dst: WritableXmm,
+        imm: u8,
+    },
+    XmmRmRVex3 {
+        op: AvxOpcode,
+        src1: Xmm,
+        src2: Xmm,
+        src3: XmmMem,
+        dst: WritableXmm,
+    },
+    XmmRmRBlendVex {
+        op: AvxOpcode,
+        src1: Xmm,
+        src2: XmmMem,
+        mask: Xmm,
+        dst: WritableXmm,
+    },
+    XmmUnaryRmRVex {
+        op: AvxOpcode,
+        src: XmmMem,
+        dst: WritableXmm,
+    },
+    XmmUnaryRmRImmVex {
+        op: AvxOpcode,
+        src: XmmMem,
+        dst: WritableXmm,
+        imm: u8,
+    },
+    XmmMovRMVex {
+        op: AvxOpcode,
+        src: Xmm,
+        dst: SyntheticAmode,
+    },
+    XmmMovRMImmVex {
+        op: AvxOpcode,
+        src: Xmm,
+        dst: SyntheticAmode,
+        imm: u8,
+    },
+    XmmToGprImmVex {
+        op: AvxOpcode,
+        src: Xmm,
+        dst: WritableGpr,
+        imm: u8,
+    },
+    GprToXmmVex {
+        op: AvxOpcode,
+        src: GprMem,
+        dst: WritableXmm,
+        src_size: OperandSize,
+    },
+    XmmToGprVex {
+        op: AvxOpcode,
+        src: Xmm,
+        dst: WritableGpr,
+        dst_size: OperandSize,
+    },
+    XmmRmREvex {
+        op: Avx512Opcode,
+        src1: Xmm,
+        src2: XmmMem,
+        dst: WritableXmm,
+    },
+    XmmUnaryRmRImmEvex {
+        op: Avx512Opcode,
+        src: XmmMem,
+        dst: WritableXmm,
+        imm: u8,
+    },
+    XmmRmREvex3 {
+        op: Avx512Opcode,
+        src1: Xmm,
+        src2: Xmm,
+        src3: XmmMem,
+        dst: WritableXmm,
+    },
+    XmmUnaryRmR {
+        op: SseOpcode,
+        src: XmmMemAligned,
+        dst: WritableXmm,
+    },
+    XmmUnaryRmRUnaligned {
+        op: SseOpcode,
+        src: XmmMem,
+        dst: WritableXmm,
+    },
+    XmmUnaryRmRImm {
+        op: SseOpcode,
+        src: XmmMemAligned,
+        imm: u8,
+        dst: WritableXmm,
+    },
+    XmmUnaryRmREvex {
+        op: Avx512Opcode,
+        src: XmmMem,
+        dst: WritableXmm,
+    },
+    XmmMovRM {
+        op: SseOpcode,
+        src: Xmm,
+        dst: SyntheticAmode,
+    },
+    XmmMovRMImm {
+        op: SseOpcode,
+        src: Xmm,
+        dst: SyntheticAmode,
+        imm: u8,
+    },
+    XmmToGpr {
+        op: SseOpcode,
+        src: Xmm,
+        dst: WritableGpr,
+        dst_size: OperandSize,
+    },
+    XmmToGprImm {
+        op: SseOpcode,
+        src: Xmm,
+        dst: WritableGpr,
+        imm: u8,
+    },
+    GprToXmm {
+        op: SseOpcode,
+        src: GprMem,
+        dst: WritableXmm,
+        src_size: OperandSize,
+    },
+    CvtUint64ToFloatSeq {
+        dst_size: OperandSize,
+        src: Gpr,
+        dst: WritableXmm,
+        tmp_gpr1: WritableGpr,
+        tmp_gpr2: WritableGpr,
+    },
+    CvtFloatToSintSeq {
+        dst_size: OperandSize,
+        src_size: OperandSize,
+        is_saturating: bool,
+        src: Xmm,
+        dst: WritableGpr,
+        tmp_gpr: WritableGpr,
+        tmp_xmm: WritableXmm,
+    },
+    CvtFloatToUintSeq {
+        dst_size: OperandSize,
+        src_size: OperandSize,
+        is_saturating: bool,
+        src: Xmm,
+        dst: WritableGpr,
+        tmp_gpr: WritableGpr,
+        tmp_xmm: WritableXmm,
+        tmp_xmm2: WritableXmm,
+    },
+    XmmMinMaxSeq {
+        size: OperandSize,
+        is_min: bool,
+        lhs: Xmm,
+        rhs: Xmm,
+        dst: WritableXmm,
+    },
+    XmmCmpRmR {
+        op: SseOpcode,
+        src: XmmMemAligned,
+        dst: Xmm,
+    },
+    XmmRmRImm {
+        op: SseOpcode,
+        src1: Reg,
+        src2: RegMem,
+        dst: WritableReg,
+        imm: u8,
+        size: OperandSize,
+    },
+    CallKnown {
+        dest: ExternalName,
+        info: BoxCallInfo,
+    },
+    CallUnknown {
+        dest: RegMem,
+        info: BoxCallInfo,
+    },
+    ReturnCallKnown {
+        callee: ExternalName,
+        info: BoxReturnCallInfo,
+    },
+    ReturnCallUnknown {
+        callee: RegMem,
+        info: BoxReturnCallInfo,
+    },
+    Args {
+        args: VecArgPair,
+    },
+    Ret {
+        rets: VecRetPair,
+        stack_bytes_to_pop: u32,
+    },
+    JmpKnown {
+        dst: MachLabel,
+    },
+    JmpIf {
+        cc: CC,
+        taken: MachLabel,
+    },
+    JmpCond {
+        cc: CC,
+        taken: MachLabel,
+        not_taken: MachLabel,
+    },
+    JmpTableSeq {
+        idx: Reg,
+        tmp1: WritableReg,
+        tmp2: WritableReg,
+        default_target: MachLabel,
+        targets: BoxVecMachLabel,
+    },
+    JmpUnknown {
+        target: RegMem,
+    },
+    TrapIf {
+        cc: CC,
+        trap_code: TrapCode,
+    },
+    TrapIfAnd {
+        cc1: CC,
+        cc2: CC,
+        trap_code: TrapCode,
+    },
+    TrapIfOr {
+        cc1: CC,
+        cc2: CC,
+        trap_code: TrapCode,
+    },
+    Hlt,
+    Ud2 {
+        trap_code: TrapCode,
+    },
+    LoadExtName {
+        dst: WritableReg,
+        name: BoxExternalName,
+        offset: i64,
+        distance: RelocDistance,
+    },
+    LockCmpxchg {
+        ty: Type,
+        replacement: Reg,
+        expected: Reg,
+        mem: SyntheticAmode,
+        dst_old: WritableReg,
+    },
+    AtomicRmwSeq {
+        ty: Type,
+        op: MachAtomicRmwOp,
+        mem: SyntheticAmode,
+        operand: Reg,
+        temp: WritableReg,
+        dst_old: WritableReg,
+    },
+    Fence {
+        kind: FenceKind,
+    },
+    VirtualSPOffsetAdj {
+        offset: i64,
+    },
+    XmmUninitializedValue {
+        dst: WritableXmm,
+    },
+    ElfTlsGetAddr {
+        symbol: ExternalName,
+        dst: WritableGpr,
+    },
+    MachOTlsGetAddr {
+        symbol: ExternalName,
+        dst: WritableGpr,
+    },
+    CoffTlsGetAddr {
+        symbol: ExternalName,
+        dst: WritableGpr,
+        tmp: WritableGpr,
+    },
+    Unwind {
+        inst: UnwindInst,
+    },
+    DummyUse {
+        reg: Reg,
+    },
+}
+
+/// Internal type DivSignedness: defined at src/isa/x64/inst.isle line 692.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum DivSignedness {
+    Signed,
+    Unsigned,
+}
+
+/// Internal type UnaryRmRVexOpcode: defined at src/isa/x64/inst.isle line 759.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum UnaryRmRVexOpcode {
+    Blsi,
+    Blsmsk,
+    Blsr,
+}
+
+/// Internal type Amode: defined at src/isa/x64/inst.isle line 1007.
+#[derive(Clone, Debug)]
+pub enum Amode {
+    ImmReg {
+        simm32: u32,
+        base: Reg,
+        flags: MemFlags,
+    },
+    ImmRegRegShift {
+        simm32: u32,
+        base: Gpr,
+        index: Gpr,
+        shift: u8,
+        flags: MemFlags,
+    },
+    RipRelative {
+        target: MachLabel,
+    },
+}
+
+/// Internal type AvxOpcode: defined at src/isa/x64/inst.isle line 1156.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum AvxOpcode {
+    Vfmadd213ss,
+    Vfmadd213sd,
+    Vfmadd213ps,
+    Vfmadd213pd,
+    Vfmadd132ss,
+    Vfmadd132sd,
+    Vfmadd132ps,
+    Vfmadd132pd,
+    Vfnmadd213ss,
+    Vfnmadd213sd,
+    Vfnmadd213ps,
+    Vfnmadd213pd,
+    Vfnmadd132ss,
+    Vfnmadd132sd,
+    Vfnmadd132ps,
+    Vfnmadd132pd,
+    Vcmpps,
+    Vcmppd,
+    Vpsrlw,
+    Vpsrld,
+    Vpsrlq,
+    Vpaddb,
+    Vpaddw,
+    Vpaddd,
+    Vpaddq,
+    Vpaddsb,
+    Vpaddsw,
+    Vpaddusb,
+    Vpaddusw,
+    Vpsubb,
+    Vpsubw,
+    Vpsubd,
+    Vpsubq,
+    Vpsubsb,
+    Vpsubsw,
+    Vpsubusb,
+    Vpsubusw,
+    Vpavgb,
+    Vpavgw,
+    Vpand,
+    Vandps,
+    Vandpd,
+    Vpor,
+    Vorps,
+    Vorpd,
+    Vpxor,
+    Vxorps,
+    Vxorpd,
+    Vpmullw,
+    Vpmulld,
+    Vpmulhw,
+    Vpmulhd,
+    Vpmulhrsw,
+    Vpmulhuw,
+    Vpmuldq,
+    Vpmuludq,
+    Vpunpckhwd,
+    Vpunpcklwd,
+    Vunpcklps,
+    Vunpckhps,
+    Vandnps,
+    Vandnpd,
+    Vpandn,
+    Vaddps,
+    Vaddpd,
+    Vsubps,
+    Vsubpd,
+    Vmulps,
+    Vmulpd,
+    Vdivps,
+    Vdivpd,
+    Vpcmpeqb,
+    Vpcmpeqw,
+    Vpcmpeqd,
+    Vpcmpeqq,
+    Vpcmpgtb,
+    Vpcmpgtw,
+    Vpcmpgtd,
+    Vpcmpgtq,
+    Vminps,
+    Vminpd,
+    Vmaxps,
+    Vmaxpd,
+    Vblendvpd,
+    Vblendvps,
+    Vpblendvb,
+    Vmovlhps,
+    Vpmaxsb,
+    Vpmaxsw,
+    Vpmaxsd,
+    Vpminsb,
+    Vpminsw,
+    Vpminsd,
+    Vpmaxub,
+    Vpmaxuw,
+    Vpmaxud,
+    Vpminub,
+    Vpminuw,
+    Vpminud,
+    Vpunpcklbw,
+    Vpunpckhbw,
+    Vpacksswb,
+    Vpackssdw,
+    Vpackuswb,
+    Vpackusdw,
+    Vpalignr,
+    Vpinsrb,
+    Vpinsrw,
+    Vpinsrd,
+    Vpinsrq,
+    Vpmaddwd,
+    Vpmaddubsw,
+    Vinsertps,
+    Vpshufb,
+    Vshufps,
+    Vpsllw,
+    Vpslld,
+    Vpsllq,
+    Vpsraw,
+    Vpsrad,
+    Vpmovsxbw,
+    Vpmovzxbw,
+    Vpmovsxwd,
+    Vpmovzxwd,
+    Vpmovsxdq,
+    Vpmovzxdq,
+    Vaddss,
+    Vaddsd,
+    Vmulss,
+    Vmulsd,
+    Vsubss,
+    Vsubsd,
+    Vdivss,
+    Vdivsd,
+    Vpabsb,
+    Vpabsw,
+    Vpabsd,
+    Vminss,
+    Vminsd,
+    Vmaxss,
+    Vmaxsd,
+    Vsqrtps,
+    Vsqrtpd,
+    Vroundps,
+    Vroundpd,
+    Vcvtdq2pd,
+    Vcvtdq2ps,
+    Vcvtpd2ps,
+    Vcvtps2pd,
+    Vcvttpd2dq,
+    Vcvttps2dq,
+    Vphaddw,
+    Vphaddd,
+    Vpunpckhdq,
+    Vpunpckldq,
+    Vpunpckhqdq,
+    Vpunpcklqdq,
+    Vpshuflw,
+    Vpshufhw,
+    Vpshufd,
+    Vmovss,
+    Vmovsd,
+    Vmovups,
+    Vmovupd,
+    Vmovdqu,
+    Vpextrb,
+    Vpextrw,
+    Vpextrd,
+    Vpextrq,
+    Vpblendw,
+    Vmovddup,
+    Vpbroadcastb,
+    Vpbroadcastw,
+    Vpbroadcastd,
+    Vbroadcastss,
+    Vmovd,
+    Vmovq,
+    Vmovmskps,
+    Vmovmskpd,
+    Vpmovmskb,
+    Vcvtsi2ss,
+    Vcvtsi2sd,
+    Vcvtss2sd,
+    Vcvtsd2ss,
+    Vsqrtss,
+    Vsqrtsd,
+    Vroundss,
+    Vroundsd,
+}
+
+/// Internal type Avx512Opcode: defined at src/isa/x64/inst.isle line 1347.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum Avx512Opcode {
+    Vcvtudq2ps,
+    Vpabsq,
+    Vpermi2b,
+    Vpmullq,
+    Vpopcntb,
+    Vpsraq,
+    VpsraqImm,
+}
+
+/// Internal type RegisterClass: defined at src/isa/x64/inst.isle line 1624.
+#[derive(Clone, Debug)]
+pub enum RegisterClass {
+    Gpr { single_register: bool },
+    Xmm,
+}
+
+/// Internal type ExtendKind: defined at src/isa/x64/inst.isle line 2072.
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+pub enum ExtendKind {
+    Sign,
+    Zero,
+}
+
+/// Internal type IcmpCondResult: defined at src/isa/x64/inst.isle line 4521.
+#[derive(Clone, Debug)]
+pub enum IcmpCondResult {
+    Condition { producer: ProducesFlags, cc: CC },
+}
+
+/// Internal type FcmpCondResult: defined at src/isa/x64/inst.isle line 4634.
+#[derive(Clone, Debug)]
+pub enum FcmpCondResult {
+    Condition {
+        producer: ProducesFlags,
+        cc: CC,
+    },
+    AndCondition {
+        producer: ProducesFlags,
+        cc1: CC,
+        cc2: CC,
+    },
+    OrCondition {
+        producer: ProducesFlags,
+        cc1: CC,
+        cc2: CC,
+    },
+}
+
+// Generated as internal constructor for term output_reg.
+pub fn constructor_output_reg<C: Context>(ctx: &mut C, arg0: Reg) -> InstOutput {
+    let v1 = C::value_reg(ctx, arg0);
+    let v2 = C::output(ctx, v1);
+    // Rule at src/prelude_lower.isle line 65.
+    return v2;
+}
+
+// Generated as internal constructor for term output_value.
+pub fn constructor_output_value<C: Context>(ctx: &mut C, arg0: Value) -> InstOutput {
+    let v1 = C::put_in_regs(ctx, arg0);
+    let v2 = C::output(ctx, v1);
+    // Rule at src/prelude_lower.isle line 69.
+    return v2;
+}
+
+// Generated as internal constructor for term temp_reg.
+pub fn constructor_temp_reg<C: Context>(ctx: &mut C, arg0: Type) -> Reg {
+    let v1 = C::temp_writable_reg(ctx, arg0);
+    let v2 = C::writable_reg_to_reg(ctx, v1);
+    // Rule at src/prelude_lower.isle line 89.
+    return v2;
+}
+
+// Generated as internal constructor for term value_regs_range.
+pub fn constructor_value_regs_range<C: Context>(ctx: &mut C, arg0: ValueRegs) -> Range {
+    let v2 = C::value_regs_len(ctx, arg0);
+    let v3 = C::range(ctx, 0x0, v2);
+    // Rule at src/prelude_lower.isle line 138.
+    return v3;
+}
+
+// Generated as internal constructor for term lo_reg.
+pub fn constructor_lo_reg<C: Context>(ctx: &mut C, arg0: Value) -> Reg {
+    let v1 = C::put_in_regs(ctx, arg0);
+    let v3 = C::value_regs_get(ctx, v1, 0x0);
+    // Rule at src/prelude_lower.isle line 149.
+    return v3;
+}
+
+// Generated as internal constructor for term multi_reg_to_pair_and_single.
+pub fn constructor_multi_reg_to_pair_and_single<C: Context>(
+    ctx: &mut C,
+    arg0: &MultiReg,
+) -> InstOutput {
+    if let &MultiReg::Three {
+        a: v1,
+        b: v2,
+        c: v3,
+    } = arg0
+    {
+        let v4 = C::value_regs(ctx, v1, v2);
+        let v5 = C::value_reg(ctx, v3);
+        let v6 = C::output_pair(ctx, v4, v5);
+        // Rule at src/prelude_lower.isle line 160.
+        return v6;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "multi_reg_to_pair_and_single", "src/prelude_lower.isle line 159"
+    )
+}
+
+// Generated as internal constructor for term multi_reg_to_pair.
+pub fn constructor_multi_reg_to_pair<C: Context>(ctx: &mut C, arg0: &MultiReg) -> InstOutput {
+    if let &MultiReg::Two { a: v1, b: v2 } = arg0 {
+        let v3 = C::value_regs(ctx, v1, v2);
+        let v4 = C::output(ctx, v3);
+        // Rule at src/prelude_lower.isle line 165.
+        return v4;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "multi_reg_to_pair", "src/prelude_lower.isle line 164"
+    )
+}
+
+// Generated as internal constructor for term multi_reg_to_single.
+pub fn constructor_multi_reg_to_single<C: Context>(ctx: &mut C, arg0: &MultiReg) -> InstOutput {
+    if let &MultiReg::One { a: v1 } = arg0 {
+        let v2 = C::value_reg(ctx, v1);
+        let v3 = C::output(ctx, v2);
+        // Rule at src/prelude_lower.isle line 170.
+        return v3;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "multi_reg_to_single", "src/prelude_lower.isle line 169"
+    )
+}
+
+// Generated as internal constructor for term emit_side_effect.
+pub fn constructor_emit_side_effect<C: Context>(ctx: &mut C, arg0: &SideEffectNoResult) -> Unit {
+    match arg0 {
+        &SideEffectNoResult::Inst { inst: ref v1 } => {
+            let v2 = C::emit(ctx, v1);
+            // Rule at src/prelude_lower.isle line 319.
+            return v2;
+        }
+        &SideEffectNoResult::Inst2 {
+            inst1: ref v3,
+            inst2: ref v4,
+        } => {
+            let v5 = C::emit(ctx, v3);
+            let v6 = C::emit(ctx, v4);
+            // Rule at src/prelude_lower.isle line 321.
+            return v6;
+        }
+        &SideEffectNoResult::Inst3 {
+            inst1: ref v7,
+            inst2: ref v8,
+            inst3: ref v9,
+        } => {
+            let v10 = C::emit(ctx, v7);
+            let v11 = C::emit(ctx, v8);
+            let v12 = C::emit(ctx, v9);
+            // Rule at src/prelude_lower.isle line 324.
+            return v12;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "emit_side_effect", "src/prelude_lower.isle line 318"
+    )
+}
+
+// Generated as internal constructor for term side_effect.
+pub fn constructor_side_effect<C: Context>(ctx: &mut C, arg0: &SideEffectNoResult) -> InstOutput {
+    let v1 = constructor_emit_side_effect(ctx, arg0);
+    let v2 = C::output_none(ctx);
+    // Rule at src/prelude_lower.isle line 332.
+    return v2;
+}
+
+// Generated as internal constructor for term side_effect_concat.
+pub fn constructor_side_effect_concat<C: Context>(
+    ctx: &mut C,
+    arg0: &SideEffectNoResult,
+    arg1: &SideEffectNoResult,
+) -> SideEffectNoResult {
+    match arg0 {
+        &SideEffectNoResult::Inst { inst: ref v1 } => {
+            match arg1 {
+                &SideEffectNoResult::Inst { inst: ref v3 } => {
+                    let v4 = SideEffectNoResult::Inst2 {
+                        inst1: v1.clone(),
+                        inst2: v3.clone(),
+                    };
+                    // Rule at src/prelude_lower.isle line 337.
+                    return v4;
+                }
+                &SideEffectNoResult::Inst2 {
+                    inst1: ref v5,
+                    inst2: ref v6,
+                } => {
+                    let v7 = SideEffectNoResult::Inst3 {
+                        inst1: v1.clone(),
+                        inst2: v5.clone(),
+                        inst3: v6.clone(),
+                    };
+                    // Rule at src/prelude_lower.isle line 339.
+                    return v7;
+                }
+                _ => {}
+            }
+        }
+        &SideEffectNoResult::Inst2 {
+            inst1: ref v8,
+            inst2: ref v9,
+        } => {
+            if let &SideEffectNoResult::Inst { inst: ref v3 } = arg1 {
+                let v10 = SideEffectNoResult::Inst3 {
+                    inst1: v8.clone(),
+                    inst2: v9.clone(),
+                    inst3: v3.clone(),
+                };
+                // Rule at src/prelude_lower.isle line 341.
+                return v10;
+            }
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "side_effect_concat", "src/prelude_lower.isle line 336"
+    )
+}
+
+// Generated as internal constructor for term produces_flags_concat.
+pub fn constructor_produces_flags_concat<C: Context>(
+    ctx: &mut C,
+    arg0: &ProducesFlags,
+    arg1: &ProducesFlags,
+) -> ProducesFlags {
+    if let &ProducesFlags::ProducesFlagsSideEffect { inst: ref v1 } = arg0 {
+        if let &ProducesFlags::ProducesFlagsSideEffect { inst: ref v3 } = arg1 {
+            let v4 = ProducesFlags::ProducesFlagsTwiceSideEffect {
+                inst1: v1.clone(),
+                inst2: v3.clone(),
+            };
+            // Rule at src/prelude_lower.isle line 366.
+            return v4;
+        }
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "produces_flags_concat", "src/prelude_lower.isle line 365"
+    )
+}
+
+// Generated as internal constructor for term produces_flags_get_reg.
+pub fn constructor_produces_flags_get_reg<C: Context>(ctx: &mut C, arg0: &ProducesFlags) -> Reg {
+    match arg0 {
+        &ProducesFlags::ProducesFlagsReturnsReg {
+            inst: ref v1,
+            result: v2,
+        } => {
+            // Rule at src/prelude_lower.isle line 396.
+            return v2;
+        }
+        &ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
+            inst: ref v3,
+            result: v4,
+        } => {
+            // Rule at src/prelude_lower.isle line 397.
+            return v4;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "produces_flags_get_reg", "src/prelude_lower.isle line 395"
+    )
+}
+
+// Generated as internal constructor for term produces_flags_ignore.
+pub fn constructor_produces_flags_ignore<C: Context>(
+    ctx: &mut C,
+    arg0: &ProducesFlags,
+) -> ProducesFlags {
+    match arg0 {
+        &ProducesFlags::ProducesFlagsReturnsReg {
+            inst: ref v1,
+            result: v2,
+        } => {
+            let v3 = ProducesFlags::ProducesFlagsSideEffect { inst: v1.clone() };
+            // Rule at src/prelude_lower.isle line 402.
+            return v3;
+        }
+        &ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
+            inst: ref v4,
+            result: v5,
+        } => {
+            let v6 = ProducesFlags::ProducesFlagsSideEffect { inst: v4.clone() };
+            // Rule at src/prelude_lower.isle line 404.
+            return v6;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "produces_flags_ignore", "src/prelude_lower.isle line 401"
+    )
+}
+
+// Generated as internal constructor for term consumes_flags_concat.
+pub fn constructor_consumes_flags_concat<C: Context>(
+    ctx: &mut C,
+    arg0: &ConsumesFlags,
+    arg1: &ConsumesFlags,
+) -> ConsumesFlags {
+    match arg0 {
+        &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v8 } => {
+            if let &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v9 } = arg1 {
+                let v10 = ConsumesFlags::ConsumesFlagsSideEffect2 {
+                    inst1: v8.clone(),
+                    inst2: v9.clone(),
+                };
+                // Rule at src/prelude_lower.isle line 417.
+                return v10;
+            }
+        }
+        &ConsumesFlags::ConsumesFlagsReturnsReg {
+            inst: ref v1,
+            result: v2,
+        } => {
+            if let &ConsumesFlags::ConsumesFlagsReturnsReg {
+                inst: ref v4,
+                result: v5,
+            } = arg1
+            {
+                let v6 = C::value_regs(ctx, v2, v5);
+                let v7 = ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
+                    inst1: v1.clone(),
+                    inst2: v4.clone(),
+                    result: v6,
+                };
+                // Rule at src/prelude_lower.isle line 411.
+                return v7;
+            }
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "consumes_flags_concat", "src/prelude_lower.isle line 410"
+    )
+}
+
+// Generated as internal constructor for term with_flags.
+pub fn constructor_with_flags<C: Context>(
+    ctx: &mut C,
+    arg0: &ProducesFlags,
+    arg1: &ConsumesFlags,
+) -> ValueRegs {
+    match arg0 {
+        &ProducesFlags::ProducesFlagsSideEffect { inst: ref v12 } => {
+            match arg1 {
+                &ConsumesFlags::ConsumesFlagsReturnsReg {
+                    inst: ref v13,
+                    result: v14,
+                } => {
+                    let v15 = C::emit(ctx, v12);
+                    let v16 = C::emit(ctx, v13);
+                    let v17 = C::value_reg(ctx, v14);
+                    // Rule at src/prelude_lower.isle line 448.
+                    return v17;
+                }
+                &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
+                    inst1: ref v18,
+                    inst2: ref v19,
+                    result: v20,
+                } => {
+                    let v15 = C::emit(ctx, v12);
+                    let v21 = C::emit(ctx, v18);
+                    let v22 = C::emit(ctx, v19);
+                    // Rule at src/prelude_lower.isle line 454.
+                    return v20;
+                }
+                &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
+                    inst1: ref v23,
+                    inst2: ref v24,
+                    inst3: ref v25,
+                    inst4: ref v26,
+                    result: v27,
+                } => {
+                    let v15 = C::emit(ctx, v12);
+                    let v28 = C::emit(ctx, v23);
+                    let v29 = C::emit(ctx, v24);
+                    let v30 = C::emit(ctx, v25);
+                    let v31 = C::emit(ctx, v26);
+                    // Rule at src/prelude_lower.isle line 466.
+                    return v27;
+                }
+                _ => {}
+            }
+        }
+        &ProducesFlags::ProducesFlagsTwiceSideEffect {
+            inst1: ref v32,
+            inst2: ref v33,
+        } => {
+            match arg1 {
+                &ConsumesFlags::ConsumesFlagsReturnsReg {
+                    inst: ref v13,
+                    result: v14,
+                } => {
+                    let v34 = C::emit(ctx, v32);
+                    let v35 = C::emit(ctx, v33);
+                    let v36 = C::emit(ctx, v13);
+                    let v37 = C::value_reg(ctx, v14);
+                    // Rule at src/prelude_lower.isle line 482.
+                    return v37;
+                }
+                &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
+                    inst1: ref v18,
+                    inst2: ref v19,
+                    result: v20,
+                } => {
+                    let v34 = C::emit(ctx, v32);
+                    let v35 = C::emit(ctx, v33);
+                    let v38 = C::emit(ctx, v18);
+                    let v39 = C::emit(ctx, v19);
+                    // Rule at src/prelude_lower.isle line 489.
+                    return v20;
+                }
+                &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
+                    inst1: ref v23,
+                    inst2: ref v24,
+                    inst3: ref v25,
+                    inst4: ref v26,
+                    result: v27,
+                } => {
+                    let v34 = C::emit(ctx, v32);
+                    let v35 = C::emit(ctx, v33);
+                    let v40 = C::emit(ctx, v23);
+                    let v41 = C::emit(ctx, v24);
+                    let v42 = C::emit(ctx, v25);
+                    let v43 = C::emit(ctx, v26);
+                    // Rule at src/prelude_lower.isle line 502.
+                    return v27;
+                }
+                _ => {}
+            }
+        }
+        &ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
+            inst: ref v1,
+            result: v2,
+        } => {
+            match arg1 {
+                &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v9 } => {
+                    let v6 = C::emit(ctx, v1);
+                    let v10 = C::emit(ctx, v9);
+                    let v11 = C::value_reg(ctx, v2);
+                    // Rule at src/prelude_lower.isle line 442.
+                    return v11;
+                }
+                &ConsumesFlags::ConsumesFlagsReturnsResultWithProducer {
+                    inst: ref v4,
+                    result: v5,
+                } => {
+                    let v6 = C::emit(ctx, v1);
+                    let v7 = C::emit(ctx, v4);
+                    let v8 = C::value_regs(ctx, v2, v5);
+                    // Rule at src/prelude_lower.isle line 434.
+                    return v8;
+                }
+                _ => {}
+            }
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "with_flags", "src/prelude_lower.isle line 432"
+    )
+}
+
+// Generated as internal constructor for term with_flags_reg.
+pub fn constructor_with_flags_reg<C: Context>(
+    ctx: &mut C,
+    arg0: &ProducesFlags,
+    arg1: &ConsumesFlags,
+) -> Reg {
+    let v2 = constructor_with_flags(ctx, arg0, arg1);
+    let v4 = C::value_regs_get(ctx, v2, 0x0);
+    // Rule at src/prelude_lower.isle line 520.
+    return v4;
+}
+
+// Generated as internal constructor for term flags_to_producesflags.
+pub fn constructor_flags_to_producesflags<C: Context>(ctx: &mut C, arg0: Value) -> ProducesFlags {
+    let v1 = C::mark_value_used(ctx, arg0);
+    // Rule at src/prelude_lower.isle line 527.
+    return ProducesFlags::AlreadyExistingFlags;
+}
+
+// Generated as internal constructor for term with_flags_side_effect.
+pub fn constructor_with_flags_side_effect<C: Context>(
+    ctx: &mut C,
+    arg0: &ProducesFlags,
+    arg1: &ConsumesFlags,
+) -> SideEffectNoResult {
+    match arg0 {
+        &ProducesFlags::AlreadyExistingFlags => {
+            match arg1 {
+                &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v2 } => {
+                    let v3 = SideEffectNoResult::Inst { inst: v2.clone() };
+                    // Rule at src/prelude_lower.isle line 538.
+                    return v3;
+                }
+                &ConsumesFlags::ConsumesFlagsSideEffect2 {
+                    inst1: ref v4,
+                    inst2: ref v5,
+                } => {
+                    let v6 = SideEffectNoResult::Inst2 {
+                        inst1: v4.clone(),
+                        inst2: v5.clone(),
+                    };
+                    // Rule at src/prelude_lower.isle line 543.
+                    return v6;
+                }
+                _ => {}
+            }
+        }
+        &ProducesFlags::ProducesFlagsSideEffect { inst: ref v7 } => {
+            match arg1 {
+                &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v2 } => {
+                    let v8 = SideEffectNoResult::Inst2 {
+                        inst1: v7.clone(),
+                        inst2: v2.clone(),
+                    };
+                    // Rule at src/prelude_lower.isle line 548.
+                    return v8;
+                }
+                &ConsumesFlags::ConsumesFlagsSideEffect2 {
+                    inst1: ref v4,
+                    inst2: ref v5,
+                } => {
+                    let v9 = SideEffectNoResult::Inst3 {
+                        inst1: v7.clone(),
+                        inst2: v4.clone(),
+                        inst3: v5.clone(),
+                    };
+                    // Rule at src/prelude_lower.isle line 553.
+                    return v9;
+                }
+                _ => {}
+            }
+        }
+        &ProducesFlags::ProducesFlagsTwiceSideEffect {
+            inst1: ref v10,
+            inst2: ref v11,
+        } => {
+            if let &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v2 } = arg1 {
+                let v12 = SideEffectNoResult::Inst3 {
+                    inst1: v10.clone(),
+                    inst2: v11.clone(),
+                    inst3: v2.clone(),
+                };
+                // Rule at src/prelude_lower.isle line 558.
+                return v12;
+            }
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "with_flags_side_effect", "src/prelude_lower.isle line 536"
+    )
+}
+
+// Generated as internal constructor for term with_flags_chained.
+pub fn constructor_with_flags_chained<C: Context>(
+    ctx: &mut C,
+    arg0: &ProducesFlags,
+    arg1: &ConsumesAndProducesFlags,
+    arg2: &ConsumesFlags,
+) -> MultiReg {
+    match arg0 {
+        &ProducesFlags::ProducesFlagsSideEffect { inst: ref v1 } => {
+            match arg1 {
+                &ConsumesAndProducesFlags::SideEffect { inst: ref v3 } => {
+                    match arg2 {
+                        &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v5 } => {
+                            let v6 = C::emit(ctx, v1);
+                            let v7 = C::emit(ctx, v3);
+                            let v8 = C::emit(ctx, v5);
+                            // Rule at src/prelude_lower.isle line 567.
+                            return MultiReg::Empty;
+                        }
+                        &ConsumesFlags::ConsumesFlagsSideEffect2 {
+                            inst1: ref v10,
+                            inst2: ref v11,
+                        } => {
+                            let v6 = C::emit(ctx, v1);
+                            let v7 = C::emit(ctx, v3);
+                            let v12 = C::emit(ctx, v10);
+                            let v13 = C::emit(ctx, v11);
+                            // Rule at src/prelude_lower.isle line 575.
+                            return MultiReg::Empty;
+                        }
+                        &ConsumesFlags::ConsumesFlagsReturnsReg {
+                            inst: ref v14,
+                            result: v15,
+                        } => {
+                            let v6 = C::emit(ctx, v1);
+                            let v7 = C::emit(ctx, v3);
+                            let v16 = C::emit(ctx, v14);
+                            let v17 = MultiReg::One { a: v15 };
+                            // Rule at src/prelude_lower.isle line 584.
+                            return v17;
+                        }
+                        &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
+                            inst1: ref v18,
+                            inst2: ref v19,
+                            result: v20,
+                        } => {
+                            let v6 = C::emit(ctx, v1);
+                            let v7 = C::emit(ctx, v3);
+                            let v21 = C::emit(ctx, v18);
+                            let v22 = C::emit(ctx, v19);
+                            let v24 = C::value_regs_get(ctx, v20, 0x0);
+                            let v26 = C::value_regs_get(ctx, v20, 0x1);
+                            let v27 = MultiReg::Two { a: v24, b: v26 };
+                            // Rule at src/prelude_lower.isle line 592.
+                            return v27;
+                        }
+                        &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
+                            inst1: ref v28,
+                            inst2: ref v29,
+                            inst3: ref v30,
+                            inst4: ref v31,
+                            result: v32,
+                        } => {
+                            let v6 = C::emit(ctx, v1);
+                            let v7 = C::emit(ctx, v3);
+                            let v33 = C::emit(ctx, v28);
+                            let v34 = C::emit(ctx, v29);
+                            let v35 = C::emit(ctx, v30);
+                            let v36 = C::emit(ctx, v31);
+                            let v37 = C::value_regs_get(ctx, v32, 0x0);
+                            let v38 = C::value_regs_get(ctx, v32, 0x1);
+                            let v39 = MultiReg::Two { a: v37, b: v38 };
+                            // Rule at src/prelude_lower.isle line 601.
+                            return v39;
+                        }
+                        _ => {}
+                    }
+                }
+                &ConsumesAndProducesFlags::ReturnsReg {
+                    inst: ref v47,
+                    result: v48,
+                } => {
+                    match arg2 {
+                        &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v5 } => {
+                            let v6 = C::emit(ctx, v1);
+                            let v49 = C::emit(ctx, v47);
+                            let v8 = C::emit(ctx, v5);
+                            let v50 = MultiReg::One { a: v48 };
+                            // Rule at src/prelude_lower.isle line 661.
+                            return v50;
+                        }
+                        &ConsumesFlags::ConsumesFlagsSideEffect2 {
+                            inst1: ref v10,
+                            inst2: ref v11,
+                        } => {
+                            let v6 = C::emit(ctx, v1);
+                            let v49 = C::emit(ctx, v47);
+                            let v12 = C::emit(ctx, v10);
+                            let v13 = C::emit(ctx, v11);
+                            let v50 = MultiReg::One { a: v48 };
+                            // Rule at src/prelude_lower.isle line 669.
+                            return v50;
+                        }
+                        &ConsumesFlags::ConsumesFlagsReturnsReg {
+                            inst: ref v14,
+                            result: v15,
+                        } => {
+                            let v6 = C::emit(ctx, v1);
+                            let v49 = C::emit(ctx, v47);
+                            let v16 = C::emit(ctx, v14);
+                            let v51 = MultiReg::Two { a: v48, b: v15 };
+                            // Rule at src/prelude_lower.isle line 678.
+                            return v51;
+                        }
+                        &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
+                            inst1: ref v18,
+                            inst2: ref v19,
+                            result: v20,
+                        } => {
+                            let v6 = C::emit(ctx, v1);
+                            let v49 = C::emit(ctx, v47);
+                            let v21 = C::emit(ctx, v18);
+                            let v22 = C::emit(ctx, v19);
+                            let v24 = C::value_regs_get(ctx, v20, 0x0);
+                            let v26 = C::value_regs_get(ctx, v20, 0x1);
+                            let v52 = MultiReg::Three {
+                                a: v48,
+                                b: v24,
+                                c: v26,
+                            };
+                            // Rule at src/prelude_lower.isle line 686.
+                            return v52;
+                        }
+                        &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
+                            inst1: ref v28,
+                            inst2: ref v29,
+                            inst3: ref v30,
+                            inst4: ref v31,
+                            result: v32,
+                        } => {
+                            let v6 = C::emit(ctx, v1);
+                            let v49 = C::emit(ctx, v47);
+                            let v33 = C::emit(ctx, v28);
+                            let v34 = C::emit(ctx, v29);
+                            let v35 = C::emit(ctx, v30);
+                            let v36 = C::emit(ctx, v31);
+                            let v37 = C::value_regs_get(ctx, v32, 0x0);
+                            let v38 = C::value_regs_get(ctx, v32, 0x1);
+                            let v53 = MultiReg::Three {
+                                a: v48,
+                                b: v37,
+                                c: v38,
+                            };
+                            // Rule at src/prelude_lower.isle line 695.
+                            return v53;
+                        }
+                        _ => {}
+                    }
+                }
+                _ => {}
+            }
+        }
+        &ProducesFlags::ProducesFlagsReturnsReg {
+            inst: ref v40,
+            result: v41,
+        } => {
+            match arg1 {
+                &ConsumesAndProducesFlags::SideEffect { inst: ref v3 } => {
+                    match arg2 {
+                        &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v5 } => {
+                            let v42 = C::emit(ctx, v40);
+                            let v7 = C::emit(ctx, v3);
+                            let v8 = C::emit(ctx, v5);
+                            let v43 = MultiReg::One { a: v41 };
+                            // Rule at src/prelude_lower.isle line 614.
+                            return v43;
+                        }
+                        &ConsumesFlags::ConsumesFlagsSideEffect2 {
+                            inst1: ref v10,
+                            inst2: ref v11,
+                        } => {
+                            let v42 = C::emit(ctx, v40);
+                            let v7 = C::emit(ctx, v3);
+                            let v12 = C::emit(ctx, v10);
+                            let v13 = C::emit(ctx, v11);
+                            let v43 = MultiReg::One { a: v41 };
+                            // Rule at src/prelude_lower.isle line 622.
+                            return v43;
+                        }
+                        &ConsumesFlags::ConsumesFlagsReturnsReg {
+                            inst: ref v14,
+                            result: v15,
+                        } => {
+                            let v42 = C::emit(ctx, v40);
+                            let v7 = C::emit(ctx, v3);
+                            let v16 = C::emit(ctx, v14);
+                            let v44 = MultiReg::Two { a: v41, b: v15 };
+                            // Rule at src/prelude_lower.isle line 631.
+                            return v44;
+                        }
+                        &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
+                            inst1: ref v18,
+                            inst2: ref v19,
+                            result: v20,
+                        } => {
+                            let v42 = C::emit(ctx, v40);
+                            let v7 = C::emit(ctx, v3);
+                            let v21 = C::emit(ctx, v18);
+                            let v22 = C::emit(ctx, v19);
+                            let v24 = C::value_regs_get(ctx, v20, 0x0);
+                            let v26 = C::value_regs_get(ctx, v20, 0x1);
+                            let v45 = MultiReg::Three {
+                                a: v41,
+                                b: v24,
+                                c: v26,
+                            };
+                            // Rule at src/prelude_lower.isle line 639.
+                            return v45;
+                        }
+                        &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
+                            inst1: ref v28,
+                            inst2: ref v29,
+                            inst3: ref v30,
+                            inst4: ref v31,
+                            result: v32,
+                        } => {
+                            let v42 = C::emit(ctx, v40);
+                            let v7 = C::emit(ctx, v3);
+                            let v33 = C::emit(ctx, v28);
+                            let v34 = C::emit(ctx, v29);
+                            let v35 = C::emit(ctx, v30);
+                            let v36 = C::emit(ctx, v31);
+                            let v37 = C::value_regs_get(ctx, v32, 0x0);
+                            let v38 = C::value_regs_get(ctx, v32, 0x1);
+                            let v46 = MultiReg::Three {
+                                a: v41,
+                                b: v37,
+                                c: v38,
+                            };
+                            // Rule at src/prelude_lower.isle line 648.
+                            return v46;
+                        }
+                        _ => {}
+                    }
+                }
+                &ConsumesAndProducesFlags::ReturnsReg {
+                    inst: ref v47,
+                    result: v48,
+                } => {
+                    match arg2 {
+                        &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v5 } => {
+                            let v42 = C::emit(ctx, v40);
+                            let v49 = C::emit(ctx, v47);
+                            let v8 = C::emit(ctx, v5);
+                            let v54 = MultiReg::Two { a: v41, b: v48 };
+                            // Rule at src/prelude_lower.isle line 708.
+                            return v54;
+                        }
+                        &ConsumesFlags::ConsumesFlagsSideEffect2 {
+                            inst1: ref v10,
+                            inst2: ref v11,
+                        } => {
+                            let v42 = C::emit(ctx, v40);
+                            let v49 = C::emit(ctx, v47);
+                            let v12 = C::emit(ctx, v10);
+                            let v13 = C::emit(ctx, v11);
+                            let v54 = MultiReg::Two { a: v41, b: v48 };
+                            // Rule at src/prelude_lower.isle line 716.
+                            return v54;
+                        }
+                        &ConsumesFlags::ConsumesFlagsReturnsReg {
+                            inst: ref v14,
+                            result: v15,
+                        } => {
+                            let v42 = C::emit(ctx, v40);
+                            let v49 = C::emit(ctx, v47);
+                            let v16 = C::emit(ctx, v14);
+                            let v55 = MultiReg::Three {
+                                a: v41,
+                                b: v48,
+                                c: v15,
+                            };
+                            // Rule at src/prelude_lower.isle line 725.
+                            return v55;
+                        }
+                        &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
+                            inst1: ref v18,
+                            inst2: ref v19,
+                            result: v20,
+                        } => {
+                            let v42 = C::emit(ctx, v40);
+                            let v49 = C::emit(ctx, v47);
+                            let v21 = C::emit(ctx, v18);
+                            let v22 = C::emit(ctx, v19);
+                            let v24 = C::value_regs_get(ctx, v20, 0x0);
+                            let v26 = C::value_regs_get(ctx, v20, 0x1);
+                            let v56 = MultiReg::Four {
+                                a: v41,
+                                b: v48,
+                                c: v24,
+                                d: v26,
+                            };
+                            // Rule at src/prelude_lower.isle line 733.
+                            return v56;
+                        }
+                        &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
+                            inst1: ref v28,
+                            inst2: ref v29,
+                            inst3: ref v30,
+                            inst4: ref v31,
+                            result: v32,
+                        } => {
+                            let v42 = C::emit(ctx, v40);
+                            let v49 = C::emit(ctx, v47);
+                            let v33 = C::emit(ctx, v28);
+                            let v34 = C::emit(ctx, v29);
+                            let v35 = C::emit(ctx, v30);
+                            let v36 = C::emit(ctx, v31);
+                            let v37 = C::value_regs_get(ctx, v32, 0x0);
+                            let v38 = C::value_regs_get(ctx, v32, 0x1);
+                            let v57 = MultiReg::Four {
+                                a: v41,
+                                b: v48,
+                                c: v37,
+                                d: v38,
+                            };
+                            // Rule at src/prelude_lower.isle line 742.
+                            return v57;
+                        }
+                        _ => {}
+                    }
+                }
+                _ => {}
+            }
+        }
+        &ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
+            inst: ref v58,
+            result: v59,
+        } => {
+            if let &ConsumesAndProducesFlags::ReturnsReg {
+                inst: ref v47,
+                result: v48,
+            } = arg1
+            {
+                match arg2 {
+                    &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v5 } => {
+                        let v60 = C::emit(ctx, v58);
+                        let v49 = C::emit(ctx, v47);
+                        let v8 = C::emit(ctx, v5);
+                        let v61 = MultiReg::Two { a: v59, b: v48 };
+                        // Rule at src/prelude_lower.isle line 754.
+                        return v61;
+                    }
+                    &ConsumesFlags::ConsumesFlagsSideEffect2 {
+                        inst1: ref v10,
+                        inst2: ref v11,
+                    } => {
+                        let v60 = C::emit(ctx, v58);
+                        let v49 = C::emit(ctx, v47);
+                        let v12 = C::emit(ctx, v10);
+                        let v13 = C::emit(ctx, v11);
+                        let v61 = MultiReg::Two { a: v59, b: v48 };
+                        // Rule at src/prelude_lower.isle line 762.
+                        return v61;
+                    }
+                    &ConsumesFlags::ConsumesFlagsReturnsResultWithProducer {
+                        inst: ref v63,
+                        result: v64,
+                    } => {
+                        let v60 = C::emit(ctx, v58);
+                        let v49 = C::emit(ctx, v47);
+                        let v65 = C::emit(ctx, v63);
+                        let v66 = MultiReg::Three {
+                            a: v59,
+                            b: v48,
+                            c: v64,
+                        };
+                        // Rule at src/prelude_lower.isle line 779.
+                        return v66;
+                    }
+                    &ConsumesFlags::ConsumesFlagsReturnsReg {
+                        inst: ref v14,
+                        result: v15,
+                    } => {
+                        let v60 = C::emit(ctx, v58);
+                        let v49 = C::emit(ctx, v47);
+                        let v16 = C::emit(ctx, v14);
+                        let v62 = MultiReg::Three {
+                            a: v59,
+                            b: v48,
+                            c: v15,
+                        };
+                        // Rule at src/prelude_lower.isle line 771.
+                        return v62;
+                    }
+                    &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
+                        inst1: ref v18,
+                        inst2: ref v19,
+                        result: v20,
+                    } => {
+                        let v60 = C::emit(ctx, v58);
+                        let v49 = C::emit(ctx, v47);
+                        let v21 = C::emit(ctx, v18);
+                        let v22 = C::emit(ctx, v19);
+                        let v24 = C::value_regs_get(ctx, v20, 0x0);
+                        let v26 = C::value_regs_get(ctx, v20, 0x1);
+                        let v67 = MultiReg::Four {
+                            a: v59,
+                            b: v48,
+                            c: v24,
+                            d: v26,
+                        };
+                        // Rule at src/prelude_lower.isle line 787.
+                        return v67;
+                    }
+                    &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
+                        inst1: ref v28,
+                        inst2: ref v29,
+                        inst3: ref v30,
+                        inst4: ref v31,
+                        result: v32,
+                    } => {
+                        let v60 = C::emit(ctx, v58);
+                        let v49 = C::emit(ctx, v47);
+                        let v33 = C::emit(ctx, v28);
+                        let v34 = C::emit(ctx, v29);
+                        let v35 = C::emit(ctx, v30);
+                        let v36 = C::emit(ctx, v31);
+                        let v37 = C::value_regs_get(ctx, v32, 0x0);
+                        let v38 = C::value_regs_get(ctx, v32, 0x1);
+                        let v68 = MultiReg::Four {
+                            a: v59,
+                            b: v48,
+                            c: v37,
+                            d: v38,
+                        };
+                        // Rule at src/prelude_lower.isle line 796.
+                        return v68;
+                    }
+                    _ => {}
+                }
+            }
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "with_flags_chained", "src/prelude_lower.isle line 564"
+    )
+}
+
+// Generated as internal constructor for term lower_return.
+pub fn constructor_lower_return<C: Context>(ctx: &mut C, arg0: ValueSlice) -> InstOutput {
+    let v1 = C::gen_return(ctx, arg0);
+    let v2 = C::output_none(ctx);
+    // Rule at src/prelude_lower.isle line 996.
+    return v2;
+}
+
+// Generated as internal constructor for term operand_size_bits.
+pub fn constructor_operand_size_bits<C: Context>(ctx: &mut C, arg0: &OperandSize) -> u16 {
+    match arg0 {
+        &OperandSize::Size8 => {
+            // Rule at src/isa/x64/inst.isle line 734.
+            return 0x8;
+        }
+        &OperandSize::Size16 => {
+            // Rule at src/isa/x64/inst.isle line 735.
+            return 0x10;
+        }
+        &OperandSize::Size32 => {
+            // Rule at src/isa/x64/inst.isle line 736.
+            return 0x20;
+        }
+        &OperandSize::Size64 => {
+            // Rule at src/isa/x64/inst.isle line 737.
+            return 0x40;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "operand_size_bits", "src/isa/x64/inst.isle line 733"
+    )
+}
+
+// Generated as internal constructor for term reg_mem_to_reg_mem_imm.
+pub fn constructor_reg_mem_to_reg_mem_imm<C: Context>(ctx: &mut C, arg0: &RegMem) -> RegMemImm {
+    match arg0 {
+        &RegMem::Reg { reg: v1 } => {
+            let v2 = RegMemImm::Reg { reg: v1 };
+            // Rule at src/isa/x64/inst.isle line 981.
+            return v2;
+        }
+        &RegMem::Mem { addr: ref v3 } => {
+            let v4 = RegMemImm::Mem { addr: v3.clone() };
+            // Rule at src/isa/x64/inst.isle line 983.
+            return v4;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "reg_mem_to_reg_mem_imm", "src/isa/x64/inst.isle line 980"
+    )
+}
+
+// Generated as internal constructor for term to_amode.
+pub fn constructor_to_amode<C: Context>(
+    ctx: &mut C,
+    arg0: MemFlags,
+    arg1: Value,
+    arg2: Offset32,
+) -> Amode {
+    let v6 = C::def_inst(ctx, arg1);
+    if let Some(v7) = v6 {
+        let v8 = &C::inst_data(ctx, v7);
+        if let &InstructionData::Binary {
+            opcode: ref v9,
+            args: ref v10,
+        } = v8
+        {
+            if let &Opcode::Iadd = v9 {
+                let v11 = C::unpack_value_array_2(ctx, v10);
+                let v14 = &constructor_to_amode_add(ctx, arg0, v11.0, v11.1, arg2);
+                // Rule at src/isa/x64/inst.isle line 1045.
+                return v14.clone();
+            }
+        }
+    }
+    let v4 = C::put_in_reg(ctx, arg1);
+    let v3 = C::offset32_to_u32(ctx, arg2);
+    let v5 = Amode::ImmReg {
+        simm32: v3,
+        base: v4,
+        flags: arg0,
+    };
+    // Rule at src/isa/x64/inst.isle line 1040.
+    return v5;
+}
+
+// Generated as internal constructor for term to_amode_add.
+pub fn constructor_to_amode_add<C: Context>(
+    ctx: &mut C,
+    arg0: MemFlags,
+    arg1: Value,
+    arg2: Value,
+    arg3: Offset32,
+) -> Amode {
+    let v30 = C::def_inst(ctx, arg1);
+    if let Some(v31) = v30 {
+        let v32 = &C::inst_data(ctx, v31);
+        if let &InstructionData::UnaryImm {
+            opcode: ref v71,
+            imm: v72,
+        } = v32
+        {
+            if let &Opcode::Iconst = v71 {
+                let v73 = C::simm32(ctx, v72);
+                if let Some(v74) = v73 {
+                    let v4 = C::offset32_to_u32(ctx, arg3);
+                    let v75 = C::s32_add_fallible(ctx, v4, v74);
+                    if let Some(v76) = v75 {
+                        let v77 = C::u32_to_offset32(ctx, v76);
+                        let v78 = &constructor_to_amode(ctx, arg0, arg2, v77);
+                        // Rule at src/isa/x64/inst.isle line 1084.
+                        return v78.clone();
+                    }
+                }
+            }
+        }
+    }
+    let v9 = C::def_inst(ctx, arg2);
+    if let Some(v10) = v9 {
+        let v11 = &C::inst_data(ctx, v10);
+        match v11 {
+            &InstructionData::Binary {
+                opcode: ref v12,
+                args: ref v13,
+            } => {
+                if let &Opcode::Iadd = v12 {
+                    let v14 = C::unpack_value_array_2(ctx, v13);
+                    let v17 = C::def_inst(ctx, v14.1);
+                    if let Some(v18) = v17 {
+                        let v19 = &C::inst_data(ctx, v18);
+                        if let &InstructionData::UnaryImm {
+                            opcode: ref v20,
+                            imm: v21,
+                        } = v19
+                        {
+                            if let &Opcode::Iconst = v20 {
+                                let v57 = C::simm32(ctx, v21);
+                                if let Some(v58) = v57 {
+                                    let v4 = C::offset32_to_u32(ctx, arg3);
+                                    let v59 = C::s32_add_fallible(ctx, v4, v58);
+                                    if let Some(v60) = v59 {
+                                        let v61 = C::u32_to_offset32(ctx, v60);
+                                        let v62 =
+                                            &constructor_to_amode_add(ctx, arg0, arg1, v14.0, v61);
+                                        // Rule at src/isa/x64/inst.isle line 1078.
+                                        return v62.clone();
+                                    }
+                                }
+                            }
+                        }
+                    }
+                }
+            }
+            &InstructionData::UnaryImm {
+                opcode: ref v63,
+                imm: v64,
+            } => {
+                if let &Opcode::Iconst = v63 {
+                    let v65 = C::simm32(ctx, v64);
+                    if let Some(v66) = v65 {
+                        let v4 = C::offset32_to_u32(ctx, arg3);
+                        let v67 = C::s32_add_fallible(ctx, v4, v66);
+                        if let Some(v68) = v67 {
+                            let v69 = C::u32_to_offset32(ctx, v68);
+                            let v70 = &constructor_to_amode(ctx, arg0, arg1, v69);
+                            // Rule at src/isa/x64/inst.isle line 1081.
+                            return v70.clone();
+                        }
+                    }
+                }
+            }
+            _ => {}
+        }
+    }
+    if let Some(v31) = v30 {
+        let v32 = &C::inst_data(ctx, v31);
+        if let &InstructionData::Binary {
+            opcode: ref v33,
+            args: ref v34,
+        } = v32
+        {
+            match v33 {
+                &Opcode::Iadd => {
+                    let v35 = C::unpack_value_array_2(ctx, v34);
+                    let v38 = C::def_inst(ctx, v35.1);
+                    if let Some(v39) = v38 {
+                        let v40 = &C::inst_data(ctx, v39);
+                        if let &InstructionData::UnaryImm {
+                            opcode: ref v41,
+                            imm: v42,
+                        } = v40
+                        {
+                            if let &Opcode::Iconst = v41 {
+                                let v51 = C::simm32(ctx, v42);
+                                if let Some(v52) = v51 {
+                                    let v4 = C::offset32_to_u32(ctx, arg3);
+                                    let v53 = C::s32_add_fallible(ctx, v4, v52);
+                                    if let Some(v54) = v53 {
+                                        let v55 = C::u32_to_offset32(ctx, v54);
+                                        let v56 =
+                                            &constructor_to_amode_add(ctx, arg0, v35.0, arg2, v55);
+                                        // Rule at src/isa/x64/inst.isle line 1075.
+                                        return v56.clone();
+                                    }
+                                }
+                            }
+                        }
+                    }
+                }
+                &Opcode::Ishl => {
+                    let v35 = C::unpack_value_array_2(ctx, v34);
+                    let v38 = C::def_inst(ctx, v35.1);
+                    if let Some(v39) = v38 {
+                        let v40 = &C::inst_data(ctx, v39);
+                        if let &InstructionData::UnaryImm {
+                            opcode: ref v41,
+                            imm: v42,
+                        } = v40
+                        {
+                            if let &Opcode::Iconst = v41 {
+                                let v43 = C::uimm8(ctx, v42);
+                                if let Some(v44) = v43 {
+                                    let v45 = C::u8_as_u32(ctx, v44);
+                                    let v46 = C::u32_lteq(ctx, v45, 0x3);
+                                    if let Some(v47) = v46 {
+                                        let v48 = constructor_put_in_gpr(ctx, arg2);
+                                        let v49 = constructor_put_in_gpr(ctx, v35.0);
+                                        let v4 = C::offset32_to_u32(ctx, arg3);
+                                        let v50 = Amode::ImmRegRegShift {
+                                            simm32: v4,
+                                            base: v48,
+                                            index: v49,
+                                            shift: v44,
+                                            flags: arg0,
+                                        };
+                                        // Rule at src/isa/x64/inst.isle line 1062.
+                                        return v50;
+                                    }
+                                }
+                            }
+                        }
+                    }
+                }
+                _ => {}
+            }
+        }
+    }
+    if let Some(v10) = v9 {
+        let v11 = &C::inst_data(ctx, v10);
+        if let &InstructionData::Binary {
+            opcode: ref v12,
+            args: ref v13,
+        } = v11
+        {
+            if let &Opcode::Ishl = v12 {
+                let v14 = C::unpack_value_array_2(ctx, v13);
+                let v17 = C::def_inst(ctx, v14.1);
+                if let Some(v18) = v17 {
+                    let v19 = &C::inst_data(ctx, v18);
+                    if let &InstructionData::UnaryImm {
+                        opcode: ref v20,
+                        imm: v21,
+                    } = v19
+                    {
+                        if let &Opcode::Iconst = v20 {
+                            let v22 = C::uimm8(ctx, v21);
+                            if let Some(v23) = v22 {
+                                let v24 = C::u8_as_u32(ctx, v23);
+                                let v26 = C::u32_lteq(ctx, v24, 0x3);
+                                if let Some(v27) = v26 {
+                                    let v5 = constructor_put_in_gpr(ctx, arg1);
+                                    let v28 = constructor_put_in_gpr(ctx, v14.0);
+                                    let v4 = C::offset32_to_u32(ctx, arg3);
+                                    let v29 = Amode::ImmRegRegShift {
+                                        simm32: v4,
+                                        base: v5,
+                                        index: v28,
+                                        shift: v23,
+                                        flags: arg0,
+                                    };
+                                    // Rule at src/isa/x64/inst.isle line 1059.
+                                    return v29;
+                                }
+                            }
+                        }
+                    }
+                }
+            }
+        }
+    }
+    let v5 = constructor_put_in_gpr(ctx, arg1);
+    let v6 = constructor_put_in_gpr(ctx, arg2);
+    let v4 = C::offset32_to_u32(ctx, arg3);
+    let v8 = Amode::ImmRegRegShift {
+        simm32: v4,
+        base: v5,
+        index: v6,
+        shift: 0x0,
+        flags: arg0,
+    };
+    // Rule at src/isa/x64/inst.isle line 1054.
+    return v8;
+}
+
+// Generated as internal constructor for term put_masked_in_imm8_gpr.
+pub fn constructor_put_masked_in_imm8_gpr<C: Context>(
+    ctx: &mut C,
+    arg0: Value,
+    arg1: Type,
+) -> Imm8Gpr {
+    let v1 = C::def_inst(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v3 = &C::inst_data(ctx, v2);
+        if let &InstructionData::UnaryImm {
+            opcode: ref v4,
+            imm: v5,
+        } = v3
+        {
+            if let &Opcode::Iconst = v4 {
+                let v6 = C::u64_from_imm64(ctx, v5);
+                let v8 = &C::const_to_type_masked_imm8(ctx, v6, arg1);
+                // Rule at src/isa/x64/inst.isle line 1120.
+                return v8.clone();
+            }
+        }
+    }
+    let v9 = C::fits_in_16(ctx, arg1);
+    if let Some(v10) = v9 {
+        let v12 = C::put_in_regs(ctx, arg0);
+        let v14 = constructor_value_regs_get_gpr(ctx, v12, 0x0);
+        let v15 = C::shift_mask(ctx, v10);
+        let v16 = C::u8_as_u32(ctx, v15);
+        let v17 = RegMemImm::Imm { simm32: v16 };
+        let v18 = &C::gpr_mem_imm_new(ctx, &v17);
+        let v19 = constructor_x64_and(ctx, I64, v14, v18);
+        let v20 = &C::gpr_to_imm8_gpr(ctx, v19);
+        // Rule at src/isa/x64/inst.isle line 1122.
+        return v20.clone();
+    }
+    let v12 = C::put_in_regs(ctx, arg0);
+    let v14 = constructor_value_regs_get_gpr(ctx, v12, 0x0);
+    let v21 = &C::gpr_to_imm8_gpr(ctx, v14);
+    // Rule at src/isa/x64/inst.isle line 1124.
+    return v21.clone();
+}
+
+// Generated as internal constructor for term reg_to_gpr_mem_imm.
+pub fn constructor_reg_to_gpr_mem_imm<C: Context>(ctx: &mut C, arg0: Reg) -> GprMemImm {
+    let v1 = C::gpr_new(ctx, arg0);
+    let v2 = &C::gpr_to_gpr_mem_imm(ctx, v1);
+    // Rule at src/isa/x64/inst.isle line 1532.
+    return v2.clone();
+}
+
+// Generated as internal constructor for term put_in_gpr.
+pub fn constructor_put_in_gpr<C: Context>(ctx: &mut C, arg0: Value) -> Gpr {
+    let v1 = C::put_in_reg(ctx, arg0);
+    let v2 = C::gpr_new(ctx, v1);
+    // Rule at src/isa/x64/inst.isle line 1539.
+    return v2;
+}
+
+// Generated as internal constructor for term put_in_gpr_mem.
+pub fn constructor_put_in_gpr_mem<C: Context>(ctx: &mut C, arg0: Value) -> GprMem {
+    let v1 = &C::put_in_reg_mem(ctx, arg0);
+    let v2 = &C::reg_mem_to_gpr_mem(ctx, v1);
+    // Rule at src/isa/x64/inst.isle line 1546.
+    return v2.clone();
+}
+
+// Generated as internal constructor for term put_in_gpr_mem_imm.
+pub fn constructor_put_in_gpr_mem_imm<C: Context>(ctx: &mut C, arg0: Value) -> GprMemImm {
+    let v1 = &C::put_in_reg_mem_imm(ctx, arg0);
+    let v2 = &C::gpr_mem_imm_new(ctx, v1);
+    // Rule at src/isa/x64/inst.isle line 1553.
+    return v2.clone();
+}
+
+// Generated as internal constructor for term put_in_xmm.
+pub fn constructor_put_in_xmm<C: Context>(ctx: &mut C, arg0: Value) -> Xmm {
+    let v1 = C::put_in_reg(ctx, arg0);
+    let v2 = C::xmm_new(ctx, v1);
+    // Rule at src/isa/x64/inst.isle line 1560.
+    return v2;
+}
+
+// Generated as internal constructor for term output_gpr.
+pub fn constructor_output_gpr<C: Context>(ctx: &mut C, arg0: Gpr) -> InstOutput {
+    let v1 = C::gpr_to_reg(ctx, arg0);
+    let v2 = constructor_output_reg(ctx, v1);
+    // Rule at src/isa/x64/inst.isle line 1577.
+    return v2;
+}
+
+// Generated as internal constructor for term value_gprs.
+pub fn constructor_value_gprs<C: Context>(ctx: &mut C, arg0: Gpr, arg1: Gpr) -> ValueRegs {
+    let v2 = C::gpr_to_reg(ctx, arg0);
+    let v3 = C::gpr_to_reg(ctx, arg1);
+    let v4 = C::value_regs(ctx, v2, v3);
+    // Rule at src/isa/x64/inst.isle line 1582.
+    return v4;
+}
+
+// Generated as internal constructor for term output_xmm.
+pub fn constructor_output_xmm<C: Context>(ctx: &mut C, arg0: Xmm) -> InstOutput {
+    let v1 = C::xmm_to_reg(ctx, arg0);
+    let v2 = constructor_output_reg(ctx, v1);
+    // Rule at src/isa/x64/inst.isle line 1587.
+    return v2;
+}
+
+// Generated as internal constructor for term value_regs_get_gpr.
+pub fn constructor_value_regs_get_gpr<C: Context>(
+    ctx: &mut C,
+    arg0: ValueRegs,
+    arg1: usize,
+) -> Gpr {
+    let v2 = C::value_regs_get(ctx, arg0, arg1);
+    let v3 = C::gpr_new(ctx, v2);
+    // Rule at src/isa/x64/inst.isle line 1594.
+    return v3;
+}
+
+// Generated as internal constructor for term lo_gpr.
+pub fn constructor_lo_gpr<C: Context>(ctx: &mut C, arg0: Value) -> Gpr {
+    let v1 = constructor_lo_reg(ctx, arg0);
+    let v2 = C::gpr_new(ctx, v1);
+    // Rule at src/isa/x64/inst.isle line 1607.
+    return v2;
+}
+
+// Generated as internal constructor for term sink_load_to_gpr_mem_imm.
+pub fn constructor_sink_load_to_gpr_mem_imm<C: Context>(
+    ctx: &mut C,
+    arg0: &SinkableLoad,
+) -> GprMemImm {
+    let v1 = &constructor_sink_load_to_reg_mem_imm(ctx, arg0);
+    let v2 = &C::gpr_mem_imm_new(ctx, v1);
+    // Rule at src/isa/x64/inst.isle line 1748.
+    return v2.clone();
+}
+
+// Generated as internal constructor for term sink_load_to_xmm_mem.
+pub fn constructor_sink_load_to_xmm_mem<C: Context>(ctx: &mut C, arg0: &SinkableLoad) -> XmmMem {
+    let v1 = &constructor_sink_load_to_reg_mem(ctx, arg0);
+    let v2 = &C::reg_mem_to_xmm_mem(ctx, v1);
+    // Rule at src/isa/x64/inst.isle line 1752.
+    return v2.clone();
+}
+
+// Generated as internal constructor for term sink_load_to_reg_mem.
+pub fn constructor_sink_load_to_reg_mem<C: Context>(ctx: &mut C, arg0: &SinkableLoad) -> RegMem {
+    let v1 = &C::sink_load(ctx, arg0);
+    let v2 = RegMem::Mem { addr: v1.clone() };
+    // Rule at src/isa/x64/inst.isle line 1756.
+    return v2;
+}
+
+// Generated as internal constructor for term sink_load_to_gpr_mem.
+pub fn constructor_sink_load_to_gpr_mem<C: Context>(ctx: &mut C, arg0: &SinkableLoad) -> GprMem {
+    let v1 = &C::sink_load(ctx, arg0);
+    let v2 = RegMem::Mem { addr: v1.clone() };
+    let v3 = &C::reg_mem_to_gpr_mem(ctx, &v2);
+    // Rule at src/isa/x64/inst.isle line 1759.
+    return v3.clone();
+}
+
+// Generated as internal constructor for term sink_load_to_reg_mem_imm.
+pub fn constructor_sink_load_to_reg_mem_imm<C: Context>(
+    ctx: &mut C,
+    arg0: &SinkableLoad,
+) -> RegMemImm {
+    let v1 = &C::sink_load(ctx, arg0);
+    let v2 = RegMemImm::Mem { addr: v1.clone() };
+    // Rule at src/isa/x64/inst.isle line 1762.
+    return v2;
+}
+
+// Generated as internal constructor for term xmm_uninit_value.
+pub fn constructor_xmm_uninit_value<C: Context>(ctx: &mut C) -> Xmm {
+    let v0 = C::temp_writable_xmm(ctx);
+    let v1 = MInst::XmmUninitializedValue { dst: v0 };
+    let v2 = C::emit(ctx, &v1);
+    let v3 = C::writable_xmm_to_xmm(ctx, v0);
+    // Rule at src/isa/x64/inst.isle line 1774.
+    return v3;
+}
+
+// Generated as internal constructor for term load_ext_name.
+pub fn constructor_load_ext_name<C: Context>(
+    ctx: &mut C,
+    arg0: ExternalName,
+    arg1: i64,
+    arg2: RelocDistance,
+) -> Reg {
+    let v3 = C::temp_writable_gpr(ctx);
+    let v4 = C::writable_gpr_to_reg(ctx, v3);
+    let v5 = C::box_external_name(ctx, arg0);
+    let v6 = MInst::LoadExtName {
+        dst: v4,
+        name: v5,
+        offset: arg1,
+        distance: arg2,
+    };
+    let v7 = C::emit(ctx, &v6);
+    let v8 = constructor_writable_gpr_to_r_reg(ctx, v3);
+    // Rule at src/isa/x64/inst.isle line 1781.
+    return v8;
+}
+
+// Generated as internal constructor for term mov64_mr.
+pub fn constructor_mov64_mr<C: Context>(ctx: &mut C, arg0: &SyntheticAmode) -> Reg {
+    let v1 = C::temp_writable_gpr(ctx);
+    let v2 = MInst::Mov64MR {
+        src: arg0.clone(),
+        dst: v1,
+    };
+    let v3 = C::emit(ctx, &v2);
+    let v4 = constructor_writable_gpr_to_r_reg(ctx, v1);
+    // Rule at src/isa/x64/inst.isle line 1788.
+    return v4;
+}
+
+// Generated as internal constructor for term alu_rmi_r.
+pub fn constructor_alu_rmi_r<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &AluRmiROpcode,
+    arg2: Gpr,
+    arg3: &GprMemImm,
+) -> Gpr {
+    let v4 = C::temp_writable_gpr(ctx);
+    let v5 = &C::operand_size_of_type_32_64(ctx, arg0);
+    let v6 = MInst::AluRmiR {
+        size: v5.clone(),
+        op: arg1.clone(),
+        src1: arg2,
+        src2: arg3.clone(),
+        dst: v4,
+    };
+    let v7 = C::emit(ctx, &v6);
+    let v8 = C::writable_gpr_to_gpr(ctx, v4);
+    // Rule at src/isa/x64/inst.isle line 1795.
+    return v8;
+}
+
+// Generated as internal constructor for term alu_rm_r_vex.
+pub fn constructor_alu_rm_r_vex<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &AluRmROpcode,
+    arg2: Gpr,
+    arg3: Gpr,
+) -> Gpr {
+    let v4 = C::temp_writable_gpr(ctx);
+    let v5 = &C::operand_size_of_type_32_64(ctx, arg0);
+    let v6 = MInst::AluRmRVex {
+        size: v5.clone(),
+        op: arg1.clone(),
+        src1: arg2,
+        src2: arg3,
+        dst: v4,
+    };
+    let v7 = C::emit(ctx, &v6);
+    let v8 = C::writable_gpr_to_gpr(ctx, v4);
+    // Rule at src/isa/x64/inst.isle line 1803.
+    return v8;
+}
+
+// Generated as internal constructor for term xmm_rm_r.
+pub fn constructor_xmm_rm_r<C: Context>(
+    ctx: &mut C,
+    arg0: &SseOpcode,
+    arg1: Xmm,
+    arg2: &XmmMemAligned,
+) -> Xmm {
+    let v3 = C::temp_writable_xmm(ctx);
+    let v4 = MInst::XmmRmR {
+        op: arg0.clone(),
+        src1: arg1,
+        src2: arg2.clone(),
+        dst: v3,
+    };
+    let v5 = C::emit(ctx, &v4);
+    let v6 = C::writable_xmm_to_xmm(ctx, v3);
+    // Rule at src/isa/x64/inst.isle line 1811.
+    return v6;
+}
+
+// Generated as internal constructor for term xmm_rm_r_unaligned.
+pub fn constructor_xmm_rm_r_unaligned<C: Context>(
+    ctx: &mut C,
+    arg0: &SseOpcode,
+    arg1: Xmm,
+    arg2: &XmmMem,
+) -> Xmm {
+    let v3 = C::temp_writable_xmm(ctx);
+    let v4 = MInst::XmmRmRUnaligned {
+        op: arg0.clone(),
+        src1: arg1,
+        src2: arg2.clone(),
+        dst: v3,
+    };
+    let v5 = C::emit(ctx, &v4);
+    let v6 = C::writable_xmm_to_xmm(ctx, v3);
+    // Rule at src/isa/x64/inst.isle line 1818.
+    return v6;
+}
+
+// Generated as internal constructor for term xmm_rm_r_blend.
+pub fn constructor_xmm_rm_r_blend<C: Context>(
+    ctx: &mut C,
+    arg0: &SseOpcode,
+    arg1: Xmm,
+    arg2: &XmmMemAligned,
+    arg3: Xmm,
+) -> Xmm {
+    let v4 = C::temp_writable_xmm(ctx);
+    let v5 = MInst::XmmRmRBlend {
+        op: arg0.clone(),
+        src1: arg1,
+        src2: arg2.clone(),
+        mask: arg3,
+        dst: v4,
+    };
+    let v6 = C::emit(ctx, &v5);
+    let v7 = C::writable_xmm_to_xmm(ctx, v4);
+    // Rule at src/isa/x64/inst.isle line 1825.
+    return v7;
+}
+
+// Generated as internal constructor for term xmm_rmr_blend_vex.
+pub fn constructor_xmm_rmr_blend_vex<C: Context>(
+    ctx: &mut C,
+    arg0: &AvxOpcode,
+    arg1: Xmm,
+    arg2: &XmmMem,
+    arg3: Xmm,
+) -> Xmm {
+    let v4 = C::temp_writable_xmm(ctx);
+    let v5 = MInst::XmmRmRBlendVex {
+        op: arg0.clone(),
+        src1: arg1,
+        src2: arg2.clone(),
+        mask: arg3,
+        dst: v4,
+    };
+    let v6 = C::emit(ctx, &v5);
+    let v7 = C::writable_xmm_to_xmm(ctx, v4);
+    // Rule at src/isa/x64/inst.isle line 1832.
+    return v7;
+}
+
+// Generated as internal constructor for term xmm_unary_rm_r_vex.
+pub fn constructor_xmm_unary_rm_r_vex<C: Context>(
+    ctx: &mut C,
+    arg0: &AvxOpcode,
+    arg1: &XmmMem,
+) -> Xmm {
+    let v2 = C::temp_writable_xmm(ctx);
+    let v3 = MInst::XmmUnaryRmRVex {
+        op: arg0.clone(),
+        src: arg1.clone(),
+        dst: v2,
+    };
+    let v4 = C::emit(ctx, &v3);
+    let v5 = C::writable_xmm_to_xmm(ctx, v2);
+    // Rule at src/isa/x64/inst.isle line 1839.
+    return v5;
+}
+
+// Generated as internal constructor for term xmm_unary_rm_r_imm_vex.
+pub fn constructor_xmm_unary_rm_r_imm_vex<C: Context>(
+    ctx: &mut C,
+    arg0: &AvxOpcode,
+    arg1: &XmmMem,
+    arg2: u8,
+) -> Xmm {
+    let v3 = C::temp_writable_xmm(ctx);
+    let v4 = MInst::XmmUnaryRmRImmVex {
+        op: arg0.clone(),
+        src: arg1.clone(),
+        dst: v3,
+        imm: arg2,
+    };
+    let v5 = C::emit(ctx, &v4);
+    let v6 = C::writable_xmm_to_xmm(ctx, v3);
+    // Rule at src/isa/x64/inst.isle line 1846.
+    return v6;
+}
+
+// Generated as internal constructor for term xmm_rm_r_imm.
+pub fn constructor_xmm_rm_r_imm<C: Context>(
+    ctx: &mut C,
+    arg0: &SseOpcode,
+    arg1: Reg,
+    arg2: &RegMem,
+    arg3: u8,
+    arg4: &OperandSize,
+) -> Xmm {
+    let v5 = C::temp_writable_xmm(ctx);
+    let v6 = C::writable_xmm_to_reg(ctx, v5);
+    let v7 = MInst::XmmRmRImm {
+        op: arg0.clone(),
+        src1: arg1,
+        src2: arg2.clone(),
+        dst: v6,
+        imm: arg3,
+        size: arg4.clone(),
+    };
+    let v8 = C::emit(ctx, &v7);
+    let v9 = C::writable_xmm_to_xmm(ctx, v5);
+    // Rule at src/isa/x64/inst.isle line 1853.
+    return v9;
+}
+
+// Generated as internal constructor for term xmm_vex_pinsr.
+pub fn constructor_xmm_vex_pinsr<C: Context>(
+    ctx: &mut C,
+    arg0: &AvxOpcode,
+    arg1: Xmm,
+    arg2: &GprMem,
+    arg3: u8,
+) -> Xmm {
+    let v4 = C::temp_writable_xmm(ctx);
+    let v5 = MInst::XmmVexPinsr {
+        op: arg0.clone(),
+        src1: arg1,
+        src2: arg2.clone(),
+        dst: v4,
+        imm: arg3,
+    };
+    let v6 = C::emit(ctx, &v5);
+    let v7 = C::writable_xmm_to_xmm(ctx, v4);
+    // Rule at src/isa/x64/inst.isle line 1865.
+    return v7;
+}
+
+// Generated as internal constructor for term xmm_unary_rm_r_imm.
+pub fn constructor_xmm_unary_rm_r_imm<C: Context>(
+    ctx: &mut C,
+    arg0: &SseOpcode,
+    arg1: &XmmMemAligned,
+    arg2: u8,
+) -> Xmm {
+    let v3 = C::temp_writable_xmm(ctx);
+    let v4 = MInst::XmmUnaryRmRImm {
+        op: arg0.clone(),
+        src: arg1.clone(),
+        imm: arg2,
+        dst: v3,
+    };
+    let v5 = C::emit(ctx, &v4);
+    let v6 = C::writable_xmm_to_xmm(ctx, v3);
+    // Rule at src/isa/x64/inst.isle line 1872.
+    return v6;
+}
+
+// Generated as internal constructor for term xmm_unary_rm_r.
+pub fn constructor_xmm_unary_rm_r<C: Context>(
+    ctx: &mut C,
+    arg0: &SseOpcode,
+    arg1: &XmmMemAligned,
+) -> Xmm {
+    let v2 = C::temp_writable_xmm(ctx);
+    let v3 = MInst::XmmUnaryRmR {
+        op: arg0.clone(),
+        src: arg1.clone(),
+        dst: v2,
+    };
+    let v4 = C::emit(ctx, &v3);
+    let v5 = C::writable_xmm_to_xmm(ctx, v2);
+    // Rule at src/isa/x64/inst.isle line 1879.
+    return v5;
+}
+
+// Generated as internal constructor for term xmm_unary_rm_r_unaligned.
+pub fn constructor_xmm_unary_rm_r_unaligned<C: Context>(
+    ctx: &mut C,
+    arg0: &SseOpcode,
+    arg1: &XmmMem,
+) -> Xmm {
+    let v2 = C::temp_writable_xmm(ctx);
+    let v3 = MInst::XmmUnaryRmRUnaligned {
+        op: arg0.clone(),
+        src: arg1.clone(),
+        dst: v2,
+    };
+    let v4 = C::emit(ctx, &v3);
+    let v5 = C::writable_xmm_to_xmm(ctx, v2);
+    // Rule at src/isa/x64/inst.isle line 1886.
+    return v5;
+}
+
+// Generated as internal constructor for term xmm_unary_rm_r_evex.
+pub fn constructor_xmm_unary_rm_r_evex<C: Context>(
+    ctx: &mut C,
+    arg0: &Avx512Opcode,
+    arg1: &XmmMem,
+) -> Xmm {
+    let v2 = C::temp_writable_xmm(ctx);
+    let v3 = MInst::XmmUnaryRmREvex {
+        op: arg0.clone(),
+        src: arg1.clone(),
+        dst: v2,
+    };
+    let v4 = C::emit(ctx, &v3);
+    let v5 = C::writable_xmm_to_xmm(ctx, v2);
+    // Rule at src/isa/x64/inst.isle line 1893.
+    return v5;
+}
+
+// Generated as internal constructor for term xmm_rm_r_evex.
+pub fn constructor_xmm_rm_r_evex<C: Context>(
+    ctx: &mut C,
+    arg0: &Avx512Opcode,
+    arg1: Xmm,
+    arg2: &XmmMem,
+) -> Xmm {
+    let v3 = C::temp_writable_xmm(ctx);
+    let v4 = MInst::XmmRmREvex {
+        op: arg0.clone(),
+        src1: arg1,
+        src2: arg2.clone(),
+        dst: v3,
+    };
+    let v5 = C::emit(ctx, &v4);
+    let v6 = C::writable_xmm_to_xmm(ctx, v3);
+    // Rule at src/isa/x64/inst.isle line 1900.
+    return v6;
+}
+
+// Generated as internal constructor for term xmm_unary_rm_r_imm_evex.
+pub fn constructor_xmm_unary_rm_r_imm_evex<C: Context>(
+    ctx: &mut C,
+    arg0: &Avx512Opcode,
+    arg1: &XmmMem,
+    arg2: u8,
+) -> Xmm {
+    let v3 = C::temp_writable_xmm(ctx);
+    let v4 = MInst::XmmUnaryRmRImmEvex {
+        op: arg0.clone(),
+        src: arg1.clone(),
+        dst: v3,
+        imm: arg2,
+    };
+    let v5 = C::emit(ctx, &v4);
+    let v6 = C::writable_xmm_to_xmm(ctx, v3);
+    // Rule at src/isa/x64/inst.isle line 1910.
+    return v6;
+}
+
+// Generated as internal constructor for term xmm_rmi_xmm.
+pub fn constructor_xmm_rmi_xmm<C: Context>(
+    ctx: &mut C,
+    arg0: &SseOpcode,
+    arg1: Xmm,
+    arg2: &XmmMemAlignedImm,
+) -> Xmm {
+    let v3 = C::temp_writable_xmm(ctx);
+    let v4 = MInst::XmmRmiReg {
+        opcode: arg0.clone(),
+        src1: arg1,
+        src2: arg2.clone(),
+        dst: v3,
+    };
+    let v5 = C::emit(ctx, &v4);
+    let v6 = C::writable_xmm_to_xmm(ctx, v3);
+    // Rule at src/isa/x64/inst.isle line 1917.
+    return v6;
+}
+
+// Generated as internal constructor for term xmm_to_gpr_imm.
+pub fn constructor_xmm_to_gpr_imm<C: Context>(
+    ctx: &mut C,
+    arg0: &SseOpcode,
+    arg1: Xmm,
+    arg2: u8,
+) -> Gpr {
+    let v3 = C::temp_writable_gpr(ctx);
+    let v4 = MInst::XmmToGprImm {
+        op: arg0.clone(),
+        src: arg1,
+        dst: v3,
+        imm: arg2,
+    };
+    let v5 = C::emit(ctx, &v4);
+    let v6 = C::writable_gpr_to_gpr(ctx, v3);
+    // Rule at src/isa/x64/inst.isle line 1927.
+    return v6;
+}
+
+// Generated as internal constructor for term xmm_to_gpr_imm_vex.
+pub fn constructor_xmm_to_gpr_imm_vex<C: Context>(
+    ctx: &mut C,
+    arg0: &AvxOpcode,
+    arg1: Xmm,
+    arg2: u8,
+) -> Gpr {
+    let v3 = C::temp_writable_gpr(ctx);
+    let v4 = MInst::XmmToGprImmVex {
+        op: arg0.clone(),
+        src: arg1,
+        dst: v3,
+        imm: arg2,
+    };
+    let v5 = C::emit(ctx, &v4);
+    let v6 = C::writable_gpr_to_gpr(ctx, v3);
+    // Rule at src/isa/x64/inst.isle line 1934.
+    return v6;
+}
+
+// Generated as internal constructor for term gpr_to_xmm.
+pub fn constructor_gpr_to_xmm<C: Context>(
+    ctx: &mut C,
+    arg0: &SseOpcode,
+    arg1: &GprMem,
+    arg2: &OperandSize,
+) -> Xmm {
+    let v3 = C::temp_writable_xmm(ctx);
+    let v4 = MInst::GprToXmm {
+        op: arg0.clone(),
+        src: arg1.clone(),
+        dst: v3,
+        src_size: arg2.clone(),
+    };
+    let v5 = C::emit(ctx, &v4);
+    let v6 = C::writable_xmm_to_xmm(ctx, v3);
+    // Rule at src/isa/x64/inst.isle line 1941.
+    return v6;
+}
+
+// Generated as internal constructor for term gpr_to_xmm_vex.
+pub fn constructor_gpr_to_xmm_vex<C: Context>(
+    ctx: &mut C,
+    arg0: &AvxOpcode,
+    arg1: &GprMem,
+    arg2: &OperandSize,
+) -> Xmm {
+    let v3 = C::temp_writable_xmm(ctx);
+    let v4 = MInst::GprToXmmVex {
+        op: arg0.clone(),
+        src: arg1.clone(),
+        dst: v3,
+        src_size: arg2.clone(),
+    };
+    let v5 = C::emit(ctx, &v4);
+    let v6 = C::writable_xmm_to_xmm(ctx, v3);
+    // Rule at src/isa/x64/inst.isle line 1948.
+    return v6;
+}
+
+// Generated as internal constructor for term xmm_to_gpr.
+pub fn constructor_xmm_to_gpr<C: Context>(
+    ctx: &mut C,
+    arg0: &SseOpcode,
+    arg1: Xmm,
+    arg2: &OperandSize,
+) -> Gpr {
+    let v3 = C::temp_writable_gpr(ctx);
+    let v4 = MInst::XmmToGpr {
+        op: arg0.clone(),
+        src: arg1,
+        dst: v3,
+        dst_size: arg2.clone(),
+    };
+    let v5 = C::emit(ctx, &v4);
+    let v6 = C::writable_gpr_to_gpr(ctx, v3);
+    // Rule at src/isa/x64/inst.isle line 1955.
+    return v6;
+}
+
+// Generated as internal constructor for term xmm_to_gpr_vex.
+pub fn constructor_xmm_to_gpr_vex<C: Context>(
+    ctx: &mut C,
+    arg0: &AvxOpcode,
+    arg1: Xmm,
+    arg2: &OperandSize,
+) -> Gpr {
+    let v3 = C::temp_writable_gpr(ctx);
+    let v4 = MInst::XmmToGprVex {
+        op: arg0.clone(),
+        src: arg1,
+        dst: v3,
+        dst_size: arg2.clone(),
+    };
+    let v5 = C::emit(ctx, &v4);
+    let v6 = C::writable_gpr_to_gpr(ctx, v3);
+    // Rule at src/isa/x64/inst.isle line 1962.
+    return v6;
+}
+
+// Generated as internal constructor for term xmm_min_max_seq.
+pub fn constructor_xmm_min_max_seq<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: bool,
+    arg2: Xmm,
+    arg3: Xmm,
+) -> Xmm {
+    let v4 = C::temp_writable_xmm(ctx);
+    let v5 = &C::operand_size_of_type_32_64(ctx, arg0);
+    let v6 = MInst::XmmMinMaxSeq {
+        size: v5.clone(),
+        is_min: arg1,
+        lhs: arg2,
+        rhs: arg3,
+        dst: v4,
+    };
+    let v7 = C::emit(ctx, &v6);
+    let v8 = C::writable_xmm_to_xmm(ctx, v4);
+    // Rule at src/isa/x64/inst.isle line 1969.
+    return v8;
+}
+
+// Generated as internal constructor for term xmm_rmir_vex.
+pub fn constructor_xmm_rmir_vex<C: Context>(
+    ctx: &mut C,
+    arg0: &AvxOpcode,
+    arg1: Xmm,
+    arg2: &XmmMemImm,
+) -> Xmm {
+    let v3 = C::temp_writable_xmm(ctx);
+    let v4 = MInst::XmmRmiRVex {
+        op: arg0.clone(),
+        src1: arg1,
+        src2: arg2.clone(),
+        dst: v3,
+    };
+    let v5 = C::emit(ctx, &v4);
+    let v6 = C::writable_xmm_to_xmm(ctx, v3);
+    // Rule at src/isa/x64/inst.isle line 1977.
+    return v6;
+}
+
+// Generated as internal constructor for term xmm_rmr_imm_vex.
+pub fn constructor_xmm_rmr_imm_vex<C: Context>(
+    ctx: &mut C,
+    arg0: &AvxOpcode,
+    arg1: Xmm,
+    arg2: &XmmMem,
+    arg3: u8,
+) -> Xmm {
+    let v4 = C::temp_writable_xmm(ctx);
+    let v5 = MInst::XmmRmRImmVex {
+        op: arg0.clone(),
+        src1: arg1,
+        src2: arg2.clone(),
+        dst: v4,
+        imm: arg3,
+    };
+    let v6 = C::emit(ctx, &v5);
+    let v7 = C::writable_xmm_to_xmm(ctx, v4);
+    // Rule at src/isa/x64/inst.isle line 1984.
+    return v7;
+}
+
+// Generated as internal constructor for term xmm_rmr_vex3.
+pub fn constructor_xmm_rmr_vex3<C: Context>(
+    ctx: &mut C,
+    arg0: &AvxOpcode,
+    arg1: Xmm,
+    arg2: Xmm,
+    arg3: &XmmMem,
+) -> Xmm {
+    let v4 = C::temp_writable_xmm(ctx);
+    let v5 = MInst::XmmRmRVex3 {
+        op: arg0.clone(),
+        src1: arg1,
+        src2: arg2,
+        src3: arg3.clone(),
+        dst: v4,
+    };
+    let v6 = C::emit(ctx, &v5);
+    let v7 = C::writable_xmm_to_xmm(ctx, v4);
+    // Rule at src/isa/x64/inst.isle line 1991.
+    return v7;
+}
+
+// Generated as internal constructor for term mul_hi.
+pub fn constructor_mul_hi<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: bool,
+    arg2: Gpr,
+    arg3: &GprMem,
+) -> ValueRegs {
+    let v4 = C::temp_writable_gpr(ctx);
+    let v5 = C::temp_writable_gpr(ctx);
+    let v6 = &C::raw_operand_size_of_type(ctx, arg0);
+    let v7 = MInst::MulHi {
+        size: v6.clone(),
+        signed: arg1,
+        src1: arg2,
+        src2: arg3.clone(),
+        dst_lo: v4,
+        dst_hi: v5,
+    };
+    let v8 = C::emit(ctx, &v7);
+    let v9 = C::writable_gpr_to_gpr(ctx, v4);
+    let v10 = C::writable_gpr_to_gpr(ctx, v5);
+    let v11 = constructor_value_gprs(ctx, v9, v10);
+    // Rule at src/isa/x64/inst.isle line 2000.
+    return v11;
+}
+
+// Generated as internal constructor for term unary_rm_r.
+pub fn constructor_unary_rm_r<C: Context>(
+    ctx: &mut C,
+    arg0: &UnaryRmROpcode,
+    arg1: Gpr,
+    arg2: &OperandSize,
+) -> Gpr {
+    let v3 = C::temp_writable_gpr(ctx);
+    let v4 = &C::gpr_to_gpr_mem(ctx, arg1);
+    let v5 = MInst::UnaryRmR {
+        size: arg2.clone(),
+        op: arg0.clone(),
+        src: v4.clone(),
+        dst: v3,
+    };
+    let v6 = C::emit(ctx, &v5);
+    let v7 = C::writable_gpr_to_gpr(ctx, v3);
+    // Rule at src/isa/x64/inst.isle line 2014.
+    return v7;
+}
+
+// Generated as internal constructor for term unary_rm_r_vex.
+pub fn constructor_unary_rm_r_vex<C: Context>(
+    ctx: &mut C,
+    arg0: &UnaryRmRVexOpcode,
+    arg1: &GprMem,
+    arg2: &OperandSize,
+) -> Gpr {
+    let v3 = C::temp_writable_gpr(ctx);
+    let v4 = MInst::UnaryRmRVex {
+        size: arg2.clone(),
+        op: arg0.clone(),
+        src: arg1.clone(),
+        dst: v3,
+    };
+    let v5 = C::emit(ctx, &v4);
+    let v6 = C::writable_gpr_to_gpr(ctx, v3);
+    // Rule at src/isa/x64/inst.isle line 2021.
+    return v6;
+}
+
+// Generated as internal constructor for term cvt_u64_to_float_seq.
+pub fn constructor_cvt_u64_to_float_seq<C: Context>(ctx: &mut C, arg0: Type, arg1: Gpr) -> Xmm {
+    let v2 = &C::raw_operand_size_of_type(ctx, arg0);
+    let v3 = C::temp_writable_xmm(ctx);
+    let v4 = C::temp_writable_gpr(ctx);
+    let v5 = C::temp_writable_gpr(ctx);
+    let v6 = MInst::CvtUint64ToFloatSeq {
+        dst_size: v2.clone(),
+        src: arg1,
+        dst: v3,
+        tmp_gpr1: v4,
+        tmp_gpr2: v5,
+    };
+    let v7 = C::emit(ctx, &v6);
+    let v8 = C::writable_xmm_to_xmm(ctx, v3);
+    // Rule at src/isa/x64/inst.isle line 2027.
+    return v8;
+}
+
+// Generated as internal constructor for term cvt_float_to_uint_seq.
+pub fn constructor_cvt_float_to_uint_seq<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Value,
+    arg2: bool,
+) -> Gpr {
+    let v4 = &C::raw_operand_size_of_type(ctx, arg0);
+    let v2 = C::value_type(ctx, arg1);
+    let v5 = &C::raw_operand_size_of_type(ctx, v2);
+    let v6 = C::temp_writable_gpr(ctx);
+    let v7 = C::temp_writable_xmm(ctx);
+    let v8 = C::temp_writable_xmm(ctx);
+    let v9 = C::temp_writable_gpr(ctx);
+    let v10 = constructor_put_in_xmm(ctx, arg1);
+    let v11 = MInst::CvtFloatToUintSeq {
+        dst_size: v4.clone(),
+        src_size: v5.clone(),
+        is_saturating: arg2,
+        src: v10,
+        dst: v6,
+        tmp_gpr: v9,
+        tmp_xmm: v7,
+        tmp_xmm2: v8,
+    };
+    let v12 = C::emit(ctx, &v11);
+    let v13 = C::writable_gpr_to_gpr(ctx, v6);
+    // Rule at src/isa/x64/inst.isle line 2036.
+    return v13;
+}
+
+// Generated as internal constructor for term cvt_float_to_sint_seq.
+pub fn constructor_cvt_float_to_sint_seq<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Value,
+    arg2: bool,
+) -> Gpr {
+    let v4 = &C::raw_operand_size_of_type(ctx, arg0);
+    let v2 = C::value_type(ctx, arg1);
+    let v5 = &C::raw_operand_size_of_type(ctx, v2);
+    let v6 = C::temp_writable_gpr(ctx);
+    let v7 = C::temp_writable_xmm(ctx);
+    let v8 = C::temp_writable_gpr(ctx);
+    let v9 = constructor_put_in_xmm(ctx, arg1);
+    let v10 = MInst::CvtFloatToSintSeq {
+        dst_size: v4.clone(),
+        src_size: v5.clone(),
+        is_saturating: arg2,
+        src: v9,
+        dst: v6,
+        tmp_gpr: v8,
+        tmp_xmm: v7,
+    };
+    let v11 = C::emit(ctx, &v10);
+    let v12 = C::writable_gpr_to_gpr(ctx, v6);
+    // Rule at src/isa/x64/inst.isle line 2048.
+    return v12;
+}
+
+// Generated as internal constructor for term mov_from_preg.
+pub fn constructor_mov_from_preg<C: Context>(ctx: &mut C, arg0: PReg) -> Reg {
+    let v1 = C::temp_writable_gpr(ctx);
+    let v2 = MInst::MovFromPReg { src: arg0, dst: v1 };
+    let v3 = C::emit(ctx, &v2);
+    let v4 = constructor_writable_gpr_to_r_reg(ctx, v1);
+    // Rule at src/isa/x64/inst.isle line 2060.
+    return v4;
+}
+
+// Generated as internal constructor for term extend_to_gpr.
+pub fn constructor_extend_to_gpr<C: Context>(
+    ctx: &mut C,
+    arg0: Value,
+    arg1: Type,
+    arg2: &ExtendKind,
+) -> Gpr {
+    let v1 = C::value_type(ctx, arg0);
+    if v1 == arg1 {
+        let v4 = constructor_put_in_gpr(ctx, arg0);
+        // Rule at src/isa/x64/inst.isle line 2084.
+        return v4;
+    }
+    if v1 == I32 {
+        if arg1 == I64 {
+            if let &ExtendKind::Zero = arg2 {
+                let v5 = constructor_value32_zeros_upper32(ctx, arg0);
+                if v5 == true {
+                    let v4 = constructor_put_in_gpr(ctx, arg0);
+                    // Rule at src/isa/x64/inst.isle line 2092.
+                    return v4;
+                }
+            }
+        }
+    }
+    let v7 = &C::operand_size_of_type_32_64(ctx, arg1);
+    let v8 = constructor_operand_size_bits(ctx, v7);
+    let v6 = C::ty_bits_u16(ctx, v1);
+    let v9 = &C::ext_mode(ctx, v6, v8);
+    let v10 = &constructor_put_in_gpr_mem(ctx, arg0);
+    let v11 = constructor_extend(ctx, arg2, arg1, v9, v10);
+    // Rule at src/isa/x64/inst.isle line 2096.
+    return v11;
+}
+
+// Generated as internal constructor for term extend.
+pub fn constructor_extend<C: Context>(
+    ctx: &mut C,
+    arg0: &ExtendKind,
+    arg1: Type,
+    arg2: &ExtMode,
+    arg3: &GprMem,
+) -> Gpr {
+    match arg0 {
+        &ExtendKind::Sign => {
+            let v5 = constructor_x64_movsx(ctx, arg2, arg3);
+            // Rule at src/isa/x64/inst.isle line 2116.
+            return v5;
+        }
+        &ExtendKind::Zero => {
+            let v4 = constructor_x64_movzx(ctx, arg2, arg3);
+            // Rule at src/isa/x64/inst.isle line 2112.
+            return v4;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "extend", "src/isa/x64/inst.isle line 2109"
+    )
+}
+
+// Generated as internal constructor for term value32_zeros_upper32.
+pub fn constructor_value32_zeros_upper32<C: Context>(ctx: &mut C, arg0: Value) -> bool {
+    let v1 = C::def_inst(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v3 = &C::inst_data(ctx, v2);
+        match v3 {
+            &InstructionData::Binary {
+                opcode: ref v4,
+                args: ref v5,
+            } => {
+                match v4 {
+                    &Opcode::Iadd => {
+                        // Rule at src/isa/x64/inst.isle line 2123.
+                        return true;
+                    }
+                    &Opcode::Isub => {
+                        // Rule at src/isa/x64/inst.isle line 2124.
+                        return true;
+                    }
+                    &Opcode::Imul => {
+                        // Rule at src/isa/x64/inst.isle line 2125.
+                        return true;
+                    }
+                    &Opcode::Band => {
+                        // Rule at src/isa/x64/inst.isle line 2126.
+                        return true;
+                    }
+                    &Opcode::Bor => {
+                        // Rule at src/isa/x64/inst.isle line 2127.
+                        return true;
+                    }
+                    &Opcode::Bxor => {
+                        // Rule at src/isa/x64/inst.isle line 2128.
+                        return true;
+                    }
+                    &Opcode::Ishl => {
+                        // Rule at src/isa/x64/inst.isle line 2129.
+                        return true;
+                    }
+                    &Opcode::Ushr => {
+                        // Rule at src/isa/x64/inst.isle line 2130.
+                        return true;
+                    }
+                    _ => {}
+                }
+            }
+            &InstructionData::Load {
+                opcode: ref v10,
+                arg: v11,
+                flags: v12,
+                offset: v13,
+            } => {
+                if let &Opcode::Uload32 = v10 {
+                    // Rule at src/isa/x64/inst.isle line 2131.
+                    return true;
+                }
+            }
+            _ => {}
+        }
+    }
+    // Rule at src/isa/x64/inst.isle line 2132.
+    return false;
+}
+
+// Generated as internal constructor for term vec_int_type.
+pub fn constructor_vec_int_type<C: Context>(ctx: &mut C, arg0: Type) -> Type {
+    let v1 = C::multi_lane(ctx, arg0);
+    if let Some(v2) = v1 {
+        match v2.0 {
+            0x8 => {
+                if v2.1 == 0x10 {
+                    // Rule at src/isa/x64/inst.isle line 2138.
+                    return I8X16;
+                }
+            }
+            0x10 => {
+                if v2.1 == 0x8 {
+                    // Rule at src/isa/x64/inst.isle line 2139.
+                    return I16X8;
+                }
+            }
+            0x20 => {
+                if v2.1 == 0x4 {
+                    // Rule at src/isa/x64/inst.isle line 2140.
+                    return I32X4;
+                }
+            }
+            0x40 => {
+                if v2.1 == 0x2 {
+                    // Rule at src/isa/x64/inst.isle line 2141.
+                    return I64X2;
+                }
+            }
+            _ => {}
+        }
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_int_type", "src/isa/x64/inst.isle line 2137"
+    )
+}
+
+// Generated as internal constructor for term x64_xor_vector.
+pub fn constructor_x64_xor_vector<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Xmm,
+    arg2: &XmmMem,
+) -> Xmm {
+    match arg0 {
+        F32 => {
+            let v3 = constructor_x64_xorps(ctx, arg1, arg2);
+            // Rule at src/isa/x64/inst.isle line 2145.
+            return v3;
+        }
+        F64 => {
+            let v4 = constructor_x64_xorpd(ctx, arg1, arg2);
+            // Rule at src/isa/x64/inst.isle line 2146.
+            return v4;
+        }
+        F32X4 => {
+            let v3 = constructor_x64_xorps(ctx, arg1, arg2);
+            // Rule at src/isa/x64/inst.isle line 2147.
+            return v3;
+        }
+        F64X2 => {
+            let v4 = constructor_x64_xorpd(ctx, arg1, arg2);
+            // Rule at src/isa/x64/inst.isle line 2148.
+            return v4;
+        }
+        _ => {}
+    }
+    let v5 = C::multi_lane(ctx, arg0);
+    if let Some(v6) = v5 {
+        let v9 = constructor_x64_pxor(ctx, arg1, arg2);
+        // Rule at src/isa/x64/inst.isle line 2149.
+        return v9;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "x64_xor_vector", "src/isa/x64/inst.isle line 2144"
+    )
+}
+
+// Generated as internal constructor for term vector_all_ones.
+pub fn constructor_vector_all_ones<C: Context>(ctx: &mut C) -> Xmm {
+    let v0 = constructor_xmm_uninit_value(ctx);
+    let v1 = &C::xmm_to_xmm_mem(ctx, v0);
+    let v2 = constructor_x64_pcmpeqd(ctx, v0, v1);
+    // Rule at src/isa/x64/inst.isle line 2161.
+    return v2;
+}
+
+// Generated as internal constructor for term mov_rmi_to_xmm.
+pub fn constructor_mov_rmi_to_xmm<C: Context>(ctx: &mut C, arg0: &RegMemImm) -> XmmMemImm {
+    match arg0 {
+        &RegMemImm::Reg { reg: v4 } => {
+            let v5 = &C::reg_to_gpr_mem(ctx, v4);
+            let v6 = constructor_x64_movd_to_xmm(ctx, v5);
+            let v7 = &C::xmm_to_xmm_mem_imm(ctx, v6);
+            // Rule at src/isa/x64/inst.isle line 2169.
+            return v7.clone();
+        }
+        &RegMemImm::Mem { addr: ref v1 } => {
+            let v2 = &C::xmm_mem_imm_new(ctx, arg0);
+            // Rule at src/isa/x64/inst.isle line 2167.
+            return v2.clone();
+        }
+        &RegMemImm::Imm { simm32: v3 } => {
+            let v2 = &C::xmm_mem_imm_new(ctx, arg0);
+            // Rule at src/isa/x64/inst.isle line 2168.
+            return v2.clone();
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "mov_rmi_to_xmm", "src/isa/x64/inst.isle line 2166"
+    )
+}
+
+// Generated as internal constructor for term x64_load.
+pub fn constructor_x64_load<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &SyntheticAmode,
+    arg2: &ExtKind,
+) -> Reg {
+    match arg0 {
+        I64 => {
+            let v11 = constructor_mov64_mr(ctx, arg1);
+            // Rule at src/isa/x64/inst.isle line 2188.
+            return v11;
+        }
+        F32 => {
+            let v12 = constructor_x64_movss_load(ctx, arg1);
+            let v13 = C::xmm_to_reg(ctx, v12);
+            // Rule at src/isa/x64/inst.isle line 2191.
+            return v13;
+        }
+        F64 => {
+            let v14 = constructor_x64_movsd_load(ctx, arg1);
+            let v15 = C::xmm_to_reg(ctx, v14);
+            // Rule at src/isa/x64/inst.isle line 2194.
+            return v15;
+        }
+        F32X4 => {
+            let v16 = constructor_x64_movups_load(ctx, arg1);
+            let v17 = C::xmm_to_reg(ctx, v16);
+            // Rule at src/isa/x64/inst.isle line 2197.
+            return v17;
+        }
+        F64X2 => {
+            let v18 = constructor_x64_movupd_load(ctx, arg1);
+            let v19 = C::xmm_to_reg(ctx, v18);
+            // Rule at src/isa/x64/inst.isle line 2200.
+            return v19;
+        }
+        _ => {}
+    }
+    let v1 = C::fits_in_32(ctx, arg0);
+    if let Some(v2) = v1 {
+        if let &ExtKind::SignExtend = arg2 {
+            let v5 = C::ty_bytes(ctx, v2);
+            let v7 = &C::ext_mode(ctx, v5, 0x8);
+            let v8 = &constructor_synthetic_amode_to_gpr_mem(ctx, arg1);
+            let v9 = constructor_x64_movsx(ctx, v7, v8);
+            let v10 = C::gpr_to_reg(ctx, v9);
+            // Rule at src/isa/x64/inst.isle line 2184.
+            return v10;
+        }
+    }
+    let v20 = C::multi_lane(ctx, arg0);
+    if let Some(v21) = v20 {
+        let v24 = &constructor_synthetic_amode_to_xmm_mem(ctx, arg1);
+        let v25 = constructor_x64_movdqu_load(ctx, v24);
+        let v26 = C::xmm_to_reg(ctx, v25);
+        // Rule at src/isa/x64/inst.isle line 2203.
+        return v26;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "x64_load", "src/isa/x64/inst.isle line 2182"
+    )
+}
+
+// Generated as internal constructor for term x64_mov.
+pub fn constructor_x64_mov<C: Context>(ctx: &mut C, arg0: &Amode) -> Reg {
+    let v1 = &C::amode_to_synthetic_amode(ctx, arg0);
+    let v2 = constructor_mov64_mr(ctx, v1);
+    // Rule at src/isa/x64/inst.isle line 2207.
+    return v2;
+}
+
+// Generated as internal constructor for term x64_movzx.
+pub fn constructor_x64_movzx<C: Context>(ctx: &mut C, arg0: &ExtMode, arg1: &GprMem) -> Gpr {
+    let v2 = C::temp_writable_gpr(ctx);
+    let v3 = MInst::MovzxRmR {
+        ext_mode: arg0.clone(),
+        src: arg1.clone(),
+        dst: v2,
+    };
+    let v4 = C::emit(ctx, &v3);
+    let v5 = C::writable_gpr_to_gpr(ctx, v2);
+    // Rule at src/isa/x64/inst.isle line 2211.
+    return v5;
+}
+
+// Generated as internal constructor for term x64_movsx.
+pub fn constructor_x64_movsx<C: Context>(ctx: &mut C, arg0: &ExtMode, arg1: &GprMem) -> Gpr {
+    let v2 = C::temp_writable_gpr(ctx);
+    let v3 = MInst::MovsxRmR {
+        ext_mode: arg0.clone(),
+        src: arg1.clone(),
+        dst: v2,
+    };
+    let v4 = C::emit(ctx, &v3);
+    let v5 = C::writable_gpr_to_gpr(ctx, v2);
+    // Rule at src/isa/x64/inst.isle line 2217.
+    return v5;
+}
+
+// Generated as internal constructor for term x64_movss_load.
+pub fn constructor_x64_movss_load<C: Context>(ctx: &mut C, arg0: &SyntheticAmode) -> Xmm {
+    let v4 = C::use_avx(ctx);
+    if v4 == true {
+        let v2 = &constructor_synthetic_amode_to_xmm_mem(ctx, arg0);
+        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vmovss, v2);
+        // Rule at src/isa/x64/inst.isle line 2225.
+        return v6;
+    }
+    let v2 = &constructor_synthetic_amode_to_xmm_mem(ctx, arg0);
+    let v3 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Movss, v2);
+    // Rule at src/isa/x64/inst.isle line 2223.
+    return v3;
+}
+
+// Generated as internal constructor for term x64_movss_store.
+pub fn constructor_x64_movss_store<C: Context>(
+    ctx: &mut C,
+    arg0: &SyntheticAmode,
+    arg1: Xmm,
+) -> SideEffectNoResult {
+    let v4 = C::use_avx(ctx);
+    if v4 == true {
+        let v6 = &constructor_xmm_movrm_vex(ctx, &AvxOpcode::Vmovss, arg0, arg1);
+        // Rule at src/isa/x64/inst.isle line 2232.
+        return v6.clone();
+    }
+    let v3 = &constructor_xmm_movrm(ctx, &SseOpcode::Movss, arg0, arg1);
+    // Rule at src/isa/x64/inst.isle line 2230.
+    return v3.clone();
+}
+
+// Generated as internal constructor for term x64_movsd_load.
+pub fn constructor_x64_movsd_load<C: Context>(ctx: &mut C, arg0: &SyntheticAmode) -> Xmm {
+    let v4 = C::use_avx(ctx);
+    if v4 == true {
+        let v2 = &constructor_synthetic_amode_to_xmm_mem(ctx, arg0);
+        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vmovsd, v2);
+        // Rule at src/isa/x64/inst.isle line 2239.
+        return v6;
+    }
+    let v2 = &constructor_synthetic_amode_to_xmm_mem(ctx, arg0);
+    let v3 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Movsd, v2);
+    // Rule at src/isa/x64/inst.isle line 2237.
+    return v3;
+}
+
+// Generated as internal constructor for term x64_movsd_store.
+pub fn constructor_x64_movsd_store<C: Context>(
+    ctx: &mut C,
+    arg0: &SyntheticAmode,
+    arg1: Xmm,
+) -> SideEffectNoResult {
+    let v4 = C::use_avx(ctx);
+    if v4 == true {
+        let v6 = &constructor_xmm_movrm_vex(ctx, &AvxOpcode::Vmovsd, arg0, arg1);
+        // Rule at src/isa/x64/inst.isle line 2246.
+        return v6.clone();
+    }
+    let v3 = &constructor_xmm_movrm(ctx, &SseOpcode::Movsd, arg0, arg1);
+    // Rule at src/isa/x64/inst.isle line 2244.
+    return v3.clone();
+}
+
+// Generated as internal constructor for term x64_movups_load.
+pub fn constructor_x64_movups_load<C: Context>(ctx: &mut C, arg0: &SyntheticAmode) -> Xmm {
+    let v4 = C::use_avx(ctx);
+    if v4 == true {
+        let v2 = &constructor_synthetic_amode_to_xmm_mem(ctx, arg0);
+        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vmovups, v2);
+        // Rule at src/isa/x64/inst.isle line 2253.
+        return v6;
+    }
+    let v2 = &constructor_synthetic_amode_to_xmm_mem(ctx, arg0);
+    let v3 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Movups, v2);
+    // Rule at src/isa/x64/inst.isle line 2251.
+    return v3;
+}
+
+// Generated as internal constructor for term x64_movups_store.
+pub fn constructor_x64_movups_store<C: Context>(
+    ctx: &mut C,
+    arg0: &SyntheticAmode,
+    arg1: Xmm,
+) -> SideEffectNoResult {
+    let v4 = C::use_avx(ctx);
+    if v4 == true {
+        let v6 = &constructor_xmm_movrm_vex(ctx, &AvxOpcode::Vmovups, arg0, arg1);
+        // Rule at src/isa/x64/inst.isle line 2260.
+        return v6.clone();
+    }
+    let v3 = &constructor_xmm_movrm(ctx, &SseOpcode::Movups, arg0, arg1);
+    // Rule at src/isa/x64/inst.isle line 2258.
+    return v3.clone();
+}
+
+// Generated as internal constructor for term x64_movupd_load.
+pub fn constructor_x64_movupd_load<C: Context>(ctx: &mut C, arg0: &SyntheticAmode) -> Xmm {
+    let v4 = C::use_avx(ctx);
+    if v4 == true {
+        let v2 = &constructor_synthetic_amode_to_xmm_mem(ctx, arg0);
+        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vmovupd, v2);
+        // Rule at src/isa/x64/inst.isle line 2267.
+        return v6;
+    }
+    let v2 = &constructor_synthetic_amode_to_xmm_mem(ctx, arg0);
+    let v3 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Movupd, v2);
+    // Rule at src/isa/x64/inst.isle line 2265.
+    return v3;
+}
+
+// Generated as internal constructor for term x64_movupd_store.
+pub fn constructor_x64_movupd_store<C: Context>(
+    ctx: &mut C,
+    arg0: &SyntheticAmode,
+    arg1: Xmm,
+) -> SideEffectNoResult {
+    let v4 = C::use_avx(ctx);
+    if v4 == true {
+        let v6 = &constructor_xmm_movrm_vex(ctx, &AvxOpcode::Vmovupd, arg0, arg1);
+        // Rule at src/isa/x64/inst.isle line 2274.
+        return v6.clone();
+    }
+    let v3 = &constructor_xmm_movrm(ctx, &SseOpcode::Movupd, arg0, arg1);
+    // Rule at src/isa/x64/inst.isle line 2272.
+    return v3.clone();
+}
+
+// Generated as internal constructor for term x64_movd_to_gpr.
+pub fn constructor_x64_movd_to_gpr<C: Context>(ctx: &mut C, arg0: Xmm) -> Gpr {
+    let v4 = C::use_avx(ctx);
+    if v4 == true {
+        let v6 = constructor_xmm_to_gpr_vex(ctx, &AvxOpcode::Vmovd, arg0, &OperandSize::Size32);
+        // Rule at src/isa/x64/inst.isle line 2282.
+        return v6;
+    }
+    let v3 = constructor_xmm_to_gpr(ctx, &SseOpcode::Movd, arg0, &OperandSize::Size32);
+    // Rule at src/isa/x64/inst.isle line 2280.
+    return v3;
+}
+
+// Generated as internal constructor for term x64_movd_to_xmm.
+pub fn constructor_x64_movd_to_xmm<C: Context>(ctx: &mut C, arg0: &GprMem) -> Xmm {
+    let v4 = C::use_avx(ctx);
+    if v4 == true {
+        let v6 = constructor_gpr_to_xmm_vex(ctx, &AvxOpcode::Vmovd, arg0, &OperandSize::Size32);
+        // Rule at src/isa/x64/inst.isle line 2290.
+        return v6;
+    }
+    let v3 = constructor_gpr_to_xmm(ctx, &SseOpcode::Movd, arg0, &OperandSize::Size32);
+    // Rule at src/isa/x64/inst.isle line 2288.
+    return v3;
+}
+
+// Generated as internal constructor for term x64_movq_to_xmm.
+pub fn constructor_x64_movq_to_xmm<C: Context>(ctx: &mut C, arg0: &GprMem) -> Xmm {
+    let v4 = C::use_avx(ctx);
+    if v4 == true {
+        let v6 = constructor_gpr_to_xmm_vex(ctx, &AvxOpcode::Vmovq, arg0, &OperandSize::Size64);
+        // Rule at src/isa/x64/inst.isle line 2298.
+        return v6;
+    }
+    let v3 = constructor_gpr_to_xmm(ctx, &SseOpcode::Movq, arg0, &OperandSize::Size64);
+    // Rule at src/isa/x64/inst.isle line 2296.
+    return v3;
+}
+
+// Generated as internal constructor for term x64_movq_to_gpr.
+pub fn constructor_x64_movq_to_gpr<C: Context>(ctx: &mut C, arg0: Xmm) -> Gpr {
+    let v4 = C::use_avx(ctx);
+    if v4 == true {
+        let v6 = constructor_xmm_to_gpr_vex(ctx, &AvxOpcode::Vmovq, arg0, &OperandSize::Size64);
+        // Rule at src/isa/x64/inst.isle line 2306.
+        return v6;
+    }
+    let v3 = constructor_xmm_to_gpr(ctx, &SseOpcode::Movq, arg0, &OperandSize::Size64);
+    // Rule at src/isa/x64/inst.isle line 2304.
+    return v3;
+}
+
+// Generated as internal constructor for term x64_movdqu_load.
+pub fn constructor_x64_movdqu_load<C: Context>(ctx: &mut C, arg0: &XmmMem) -> Xmm {
+    let v3 = C::use_avx(ctx);
+    if v3 == true {
+        let v5 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vmovdqu, arg0);
+        // Rule at src/isa/x64/inst.isle line 2313.
+        return v5;
+    }
+    let v2 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Movdqu, arg0);
+    // Rule at src/isa/x64/inst.isle line 2311.
+    return v2;
+}
+
+// Generated as internal constructor for term x64_movdqu_store.
+pub fn constructor_x64_movdqu_store<C: Context>(
+    ctx: &mut C,
+    arg0: &SyntheticAmode,
+    arg1: Xmm,
+) -> SideEffectNoResult {
+    let v4 = C::use_avx(ctx);
+    if v4 == true {
+        let v6 = &constructor_xmm_movrm_vex(ctx, &AvxOpcode::Vmovdqu, arg0, arg1);
+        // Rule at src/isa/x64/inst.isle line 2320.
+        return v6.clone();
+    }
+    let v3 = &constructor_xmm_movrm(ctx, &SseOpcode::Movdqu, arg0, arg1);
+    // Rule at src/isa/x64/inst.isle line 2318.
+    return v3.clone();
+}
+
+// Generated as internal constructor for term x64_pmovsxbw.
+pub fn constructor_x64_pmovsxbw<C: Context>(ctx: &mut C, arg0: &XmmMem) -> Xmm {
+    let v3 = C::use_avx(ctx);
+    if v3 == true {
+        let v5 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vpmovsxbw, arg0);
+        // Rule at src/isa/x64/inst.isle line 2327.
+        return v5;
+    }
+    let v2 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Pmovsxbw, arg0);
+    // Rule at src/isa/x64/inst.isle line 2325.
+    return v2;
+}
+
+// Generated as internal constructor for term x64_pmovzxbw.
+pub fn constructor_x64_pmovzxbw<C: Context>(ctx: &mut C, arg0: &XmmMem) -> Xmm {
+    let v3 = C::use_avx(ctx);
+    if v3 == true {
+        let v5 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vpmovzxbw, arg0);
+        // Rule at src/isa/x64/inst.isle line 2334.
+        return v5;
+    }
+    let v2 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Pmovzxbw, arg0);
+    // Rule at src/isa/x64/inst.isle line 2332.
+    return v2;
+}
+
+// Generated as internal constructor for term x64_pmovsxwd.
+pub fn constructor_x64_pmovsxwd<C: Context>(ctx: &mut C, arg0: &XmmMem) -> Xmm {
+    let v3 = C::use_avx(ctx);
+    if v3 == true {
+        let v5 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vpmovsxwd, arg0);
+        // Rule at src/isa/x64/inst.isle line 2341.
+        return v5;
+    }
+    let v2 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Pmovsxwd, arg0);
+    // Rule at src/isa/x64/inst.isle line 2339.
+    return v2;
+}
+
+// Generated as internal constructor for term x64_pmovzxwd.
+pub fn constructor_x64_pmovzxwd<C: Context>(ctx: &mut C, arg0: &XmmMem) -> Xmm {
+    let v3 = C::use_avx(ctx);
+    if v3 == true {
+        let v5 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vpmovzxwd, arg0);
+        // Rule at src/isa/x64/inst.isle line 2348.
+        return v5;
+    }
+    let v2 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Pmovzxwd, arg0);
+    // Rule at src/isa/x64/inst.isle line 2346.
+    return v2;
+}
+
+// Generated as internal constructor for term x64_pmovsxdq.
+pub fn constructor_x64_pmovsxdq<C: Context>(ctx: &mut C, arg0: &XmmMem) -> Xmm {
+    let v3 = C::use_avx(ctx);
+    if v3 == true {
+        let v5 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vpmovsxdq, arg0);
+        // Rule at src/isa/x64/inst.isle line 2355.
+        return v5;
+    }
+    let v2 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Pmovsxdq, arg0);
+    // Rule at src/isa/x64/inst.isle line 2353.
+    return v2;
+}
+
+// Generated as internal constructor for term x64_pmovzxdq.
+pub fn constructor_x64_pmovzxdq<C: Context>(ctx: &mut C, arg0: &XmmMem) -> Xmm {
+    let v3 = C::use_avx(ctx);
+    if v3 == true {
+        let v5 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vpmovzxdq, arg0);
+        // Rule at src/isa/x64/inst.isle line 2362.
+        return v5;
+    }
+    let v2 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Pmovzxdq, arg0);
+    // Rule at src/isa/x64/inst.isle line 2360.
+    return v2;
+}
+
+// Generated as internal constructor for term x64_movrm.
+pub fn constructor_x64_movrm<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &SyntheticAmode,
+    arg2: Gpr,
+) -> SideEffectNoResult {
+    let v3 = &C::raw_operand_size_of_type(ctx, arg0);
+    let v4 = MInst::MovRM {
+        size: v3.clone(),
+        src: arg2,
+        dst: arg1.clone(),
+    };
+    let v5 = SideEffectNoResult::Inst { inst: v4 };
+    // Rule at src/isa/x64/inst.isle line 2367.
+    return v5;
+}
+
+// Generated as internal constructor for term xmm_movrm.
+pub fn constructor_xmm_movrm<C: Context>(
+    ctx: &mut C,
+    arg0: &SseOpcode,
+    arg1: &SyntheticAmode,
+    arg2: Xmm,
+) -> SideEffectNoResult {
+    let v3 = MInst::XmmMovRM {
+        op: arg0.clone(),
+        src: arg2,
+        dst: arg1.clone(),
+    };
+    let v4 = SideEffectNoResult::Inst { inst: v3 };
+    // Rule at src/isa/x64/inst.isle line 2372.
+    return v4;
+}
+
+// Generated as internal constructor for term xmm_movrm_imm.
+pub fn constructor_xmm_movrm_imm<C: Context>(
+    ctx: &mut C,
+    arg0: &SseOpcode,
+    arg1: &SyntheticAmode,
+    arg2: Xmm,
+    arg3: u8,
+) -> SideEffectNoResult {
+    let v4 = MInst::XmmMovRMImm {
+        op: arg0.clone(),
+        src: arg2,
+        dst: arg1.clone(),
+        imm: arg3,
+    };
+    let v5 = SideEffectNoResult::Inst { inst: v4 };
+    // Rule at src/isa/x64/inst.isle line 2376.
+    return v5;
+}
+
+// Generated as internal constructor for term xmm_movrm_vex.
+pub fn constructor_xmm_movrm_vex<C: Context>(
+    ctx: &mut C,
+    arg0: &AvxOpcode,
+    arg1: &SyntheticAmode,
+    arg2: Xmm,
+) -> SideEffectNoResult {
+    let v3 = MInst::XmmMovRMVex {
+        op: arg0.clone(),
+        src: arg2,
+        dst: arg1.clone(),
+    };
+    let v4 = SideEffectNoResult::Inst { inst: v3 };
+    // Rule at src/isa/x64/inst.isle line 2380.
+    return v4;
+}
+
+// Generated as internal constructor for term xmm_movrm_imm_vex.
+pub fn constructor_xmm_movrm_imm_vex<C: Context>(
+    ctx: &mut C,
+    arg0: &AvxOpcode,
+    arg1: &SyntheticAmode,
+    arg2: Xmm,
+    arg3: u8,
+) -> SideEffectNoResult {
+    let v4 = MInst::XmmMovRMImmVex {
+        op: arg0.clone(),
+        src: arg2,
+        dst: arg1.clone(),
+        imm: arg3,
+    };
+    let v5 = SideEffectNoResult::Inst { inst: v4 };
+    // Rule at src/isa/x64/inst.isle line 2384.
+    return v5;
+}
+
+// Generated as internal constructor for term x64_xmm_load_const.
+pub fn constructor_x64_xmm_load_const<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: VCodeConstant,
+) -> Xmm {
+    let v2 = &C::const_to_synthetic_amode(ctx, arg1);
+    let v4 = constructor_x64_load(ctx, arg0, v2, &ExtKind::None);
+    let v5 = C::xmm_new(ctx, v4);
+    // Rule at src/isa/x64/inst.isle line 2389.
+    return v5;
+}
+
+// Generated as internal constructor for term x64_add.
+pub fn constructor_x64_add<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Gpr,
+    arg2: &GprMemImm,
+) -> Gpr {
+    let v4 = constructor_alu_rmi_r(ctx, arg0, &AluRmiROpcode::Add, arg1, arg2);
+    // Rule at src/isa/x64/inst.isle line 2400.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_add_with_flags_paired.
+pub fn constructor_x64_add_with_flags_paired<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Gpr,
+    arg2: &GprMemImm,
+) -> ProducesFlags {
+    let v3 = C::temp_writable_gpr(ctx);
+    let v4 = &C::operand_size_of_type_32_64(ctx, arg0);
+    let v7 = constructor_writable_gpr_to_r_reg(ctx, v3);
+    let v6 = MInst::AluRmiR {
+        size: v4.clone(),
+        op: AluRmiROpcode::Add,
+        src1: arg1,
+        src2: arg2.clone(),
+        dst: v3,
+    };
+    let v8 = ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
+        inst: v6,
+        result: v7,
+    };
+    // Rule at src/isa/x64/inst.isle line 2408.
+    return v8;
+}
+
+// Generated as internal constructor for term x64_alurmi_with_flags_paired.
+pub fn constructor_x64_alurmi_with_flags_paired<C: Context>(
+    ctx: &mut C,
+    arg0: &AluRmiROpcode,
+    arg1: Type,
+    arg2: Gpr,
+    arg3: &GprMemImm,
+) -> ProducesFlags {
+    let v2 = C::fits_in_64(ctx, arg1);
+    if let Some(v3) = v2 {
+        let v6 = C::temp_writable_gpr(ctx);
+        let v7 = &C::raw_operand_size_of_type(ctx, v3);
+        let v9 = constructor_writable_gpr_to_r_reg(ctx, v6);
+        let v8 = MInst::AluRmiR {
+            size: v7.clone(),
+            op: arg0.clone(),
+            src1: arg2,
+            src2: arg3.clone(),
+            dst: v6,
+        };
+        let v10 = ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
+            inst: v8,
+            result: v9,
+        };
+        // Rule at src/isa/x64/inst.isle line 2419.
+        return v10;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "x64_alurmi_with_flags_paired", "src/isa/x64/inst.isle line 2418"
+    )
+}
+
+// Generated as internal constructor for term x64_alurmi_with_flags_chained.
+pub fn constructor_x64_alurmi_with_flags_chained<C: Context>(
+    ctx: &mut C,
+    arg0: &AluRmiROpcode,
+    arg1: Type,
+    arg2: Gpr,
+    arg3: &GprMemImm,
+) -> ConsumesAndProducesFlags {
+    let v2 = C::fits_in_64(ctx, arg1);
+    if let Some(v3) = v2 {
+        let v6 = C::temp_writable_gpr(ctx);
+        let v7 = &C::raw_operand_size_of_type(ctx, v3);
+        let v9 = constructor_writable_gpr_to_r_reg(ctx, v6);
+        let v8 = MInst::AluRmiR {
+            size: v7.clone(),
+            op: arg0.clone(),
+            src1: arg2,
+            src2: arg3.clone(),
+            dst: v6,
+        };
+        let v10 = ConsumesAndProducesFlags::ReturnsReg {
+            inst: v8,
+            result: v9,
+        };
+        // Rule at src/isa/x64/inst.isle line 2431.
+        return v10;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "x64_alurmi_with_flags_chained", "src/isa/x64/inst.isle line 2430"
+    )
+}
+
+// Generated as internal constructor for term x64_adc_paired.
+pub fn constructor_x64_adc_paired<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Gpr,
+    arg2: &GprMemImm,
+) -> ConsumesFlags {
+    let v3 = C::temp_writable_gpr(ctx);
+    let v4 = &C::operand_size_of_type_32_64(ctx, arg0);
+    let v7 = constructor_writable_gpr_to_r_reg(ctx, v3);
+    let v6 = MInst::AluRmiR {
+        size: v4.clone(),
+        op: AluRmiROpcode::Adc,
+        src1: arg1,
+        src2: arg2.clone(),
+        dst: v3,
+    };
+    let v8 = ConsumesFlags::ConsumesFlagsReturnsResultWithProducer {
+        inst: v6,
+        result: v7,
+    };
+    // Rule at src/isa/x64/inst.isle line 2443.
+    return v8;
+}
+
+// Generated as internal constructor for term x64_sub.
+pub fn constructor_x64_sub<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Gpr,
+    arg2: &GprMemImm,
+) -> Gpr {
+    let v4 = constructor_alu_rmi_r(ctx, arg0, &AluRmiROpcode::Sub, arg1, arg2);
+    // Rule at src/isa/x64/inst.isle line 2455.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_sub_with_flags_paired.
+pub fn constructor_x64_sub_with_flags_paired<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Gpr,
+    arg2: &GprMemImm,
+) -> ProducesFlags {
+    let v3 = C::temp_writable_gpr(ctx);
+    let v4 = &C::operand_size_of_type_32_64(ctx, arg0);
+    let v7 = constructor_writable_gpr_to_r_reg(ctx, v3);
+    let v6 = MInst::AluRmiR {
+        size: v4.clone(),
+        op: AluRmiROpcode::Sub,
+        src1: arg1,
+        src2: arg2.clone(),
+        dst: v3,
+    };
+    let v8 = ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
+        inst: v6,
+        result: v7,
+    };
+    // Rule at src/isa/x64/inst.isle line 2463.
+    return v8;
+}
+
+// Generated as internal constructor for term x64_sbb_paired.
+pub fn constructor_x64_sbb_paired<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Gpr,
+    arg2: &GprMemImm,
+) -> ConsumesFlags {
+    let v3 = C::temp_writable_gpr(ctx);
+    let v4 = &C::operand_size_of_type_32_64(ctx, arg0);
+    let v7 = constructor_writable_gpr_to_r_reg(ctx, v3);
+    let v6 = MInst::AluRmiR {
+        size: v4.clone(),
+        op: AluRmiROpcode::Sbb,
+        src1: arg1,
+        src2: arg2.clone(),
+        dst: v3,
+    };
+    let v8 = ConsumesFlags::ConsumesFlagsReturnsResultWithProducer {
+        inst: v6,
+        result: v7,
+    };
+    // Rule at src/isa/x64/inst.isle line 2475.
+    return v8;
+}
+
+// Generated as internal constructor for term x64_mul.
+pub fn constructor_x64_mul<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Gpr,
+    arg2: &GprMemImm,
+) -> Gpr {
+    let v4 = constructor_alu_rmi_r(ctx, arg0, &AluRmiROpcode::Mul, arg1, arg2);
+    // Rule at src/isa/x64/inst.isle line 2487.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_umullo.
+pub fn constructor_x64_umullo<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Gpr,
+    arg2: &GprMem,
+) -> Gpr {
+    let v3 = C::temp_writable_gpr(ctx);
+    let v4 = &C::raw_operand_size_of_type(ctx, arg0);
+    let v5 = MInst::UMulLo {
+        size: v4.clone(),
+        src1: arg1,
+        src2: arg2.clone(),
+        dst: v3,
+    };
+    let v6 = C::emit(ctx, &v5);
+    let v7 = C::writable_gpr_to_gpr(ctx, v3);
+    // Rule at src/isa/x64/inst.isle line 2495.
+    return v7;
+}
+
+// Generated as internal constructor for term x64_umullo_with_flags_paired.
+pub fn constructor_x64_umullo_with_flags_paired<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Gpr,
+    arg2: &GprMem,
+) -> ProducesFlags {
+    let v3 = C::temp_writable_gpr(ctx);
+    let v4 = &C::raw_operand_size_of_type(ctx, arg0);
+    let v6 = constructor_writable_gpr_to_r_reg(ctx, v3);
+    let v5 = MInst::UMulLo {
+        size: v4.clone(),
+        src1: arg1,
+        src2: arg2.clone(),
+        dst: v3,
+    };
+    let v7 = ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
+        inst: v5,
+        result: v6,
+    };
+    // Rule at src/isa/x64/inst.isle line 2502.
+    return v7;
+}
+
+// Generated as internal constructor for term x64_and.
+pub fn constructor_x64_and<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Gpr,
+    arg2: &GprMemImm,
+) -> Gpr {
+    let v4 = constructor_alu_rmi_r(ctx, arg0, &AluRmiROpcode::And, arg1, arg2);
+    // Rule at src/isa/x64/inst.isle line 2513.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_and_with_flags_paired.
+pub fn constructor_x64_and_with_flags_paired<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Gpr,
+    arg2: &GprMemImm,
+) -> ProducesFlags {
+    let v3 = C::temp_writable_gpr(ctx);
+    let v4 = &C::operand_size_of_type_32_64(ctx, arg0);
+    let v6 = MInst::AluRmiR {
+        size: v4.clone(),
+        op: AluRmiROpcode::And,
+        src1: arg1,
+        src2: arg2.clone(),
+        dst: v3,
+    };
+    let v7 = ProducesFlags::ProducesFlagsSideEffect { inst: v6 };
+    // Rule at src/isa/x64/inst.isle line 2520.
+    return v7;
+}
+
+// Generated as internal constructor for term x64_or.
+pub fn constructor_x64_or<C: Context>(ctx: &mut C, arg0: Type, arg1: Gpr, arg2: &GprMemImm) -> Gpr {
+    let v4 = constructor_alu_rmi_r(ctx, arg0, &AluRmiROpcode::Or, arg1, arg2);
+    // Rule at src/isa/x64/inst.isle line 2531.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_xor.
+pub fn constructor_x64_xor<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Gpr,
+    arg2: &GprMemImm,
+) -> Gpr {
+    let v4 = constructor_alu_rmi_r(ctx, arg0, &AluRmiROpcode::Xor, arg1, arg2);
+    // Rule at src/isa/x64/inst.isle line 2539.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_andn.
+pub fn constructor_x64_andn<C: Context>(ctx: &mut C, arg0: Type, arg1: Gpr, arg2: Gpr) -> Gpr {
+    let v4 = constructor_alu_rm_r_vex(ctx, arg0, &AluRmROpcode::Andn, arg1, arg2);
+    // Rule at src/isa/x64/inst.isle line 2546.
+    return v4;
+}
+
+// Generated as internal constructor for term imm_i64.
+pub fn constructor_imm_i64<C: Context>(ctx: &mut C, arg0: Type, arg1: i64) -> Reg {
+    let v2 = C::i64_as_u64(ctx, arg1);
+    let v3 = constructor_imm(ctx, arg0, v2);
+    // Rule at src/isa/x64/inst.isle line 2553.
+    return v3;
+}
+
+// Generated as internal constructor for term imm.
+pub fn constructor_imm<C: Context>(ctx: &mut C, arg0: Type, arg1: u64) -> Reg {
+    match arg0 {
+        I64 => {
+            let v20 = C::nonzero_u64_fits_in_u32(ctx, arg1);
+            if let Some(v21) = v20 {
+                let v5 = C::temp_writable_gpr(ctx);
+                let v23 = MInst::Imm {
+                    dst_size: OperandSize::Size32,
+                    simm64: v21,
+                    dst: v5,
+                };
+                let v24 = C::emit(ctx, &v23);
+                let v25 = constructor_writable_gpr_to_r_reg(ctx, v5);
+                // Rule at src/isa/x64/inst.isle line 2584.
+                return v25;
+            }
+        }
+        F32 => {
+            let v4 = C::u64_is_zero(ctx, arg1);
+            match v4 {
+                true => {
+                    let v35 = constructor_xmm_zero(ctx, arg0);
+                    let v36 = C::xmm_to_reg(ctx, v35);
+                    // Rule at src/isa/x64/inst.isle line 2602.
+                    return v36;
+                }
+                false => {
+                    let v11 = constructor_imm(ctx, I32, arg1);
+                    let v12 = &C::reg_to_gpr_mem(ctx, v11);
+                    let v13 = constructor_x64_movd_to_xmm(ctx, v12);
+                    let v14 = C::xmm_to_reg(ctx, v13);
+                    // Rule at src/isa/x64/inst.isle line 2575.
+                    return v14;
+                }
+                _ => {}
+            }
+        }
+        F64 => {
+            let v4 = C::u64_is_zero(ctx, arg1);
+            match v4 {
+                true => {
+                    let v35 = constructor_xmm_zero(ctx, arg0);
+                    let v36 = C::xmm_to_reg(ctx, v35);
+                    // Rule at src/isa/x64/inst.isle line 2607.
+                    return v36;
+                }
+                false => {
+                    let v16 = constructor_imm(ctx, I64, arg1);
+                    let v17 = &C::reg_to_gpr_mem(ctx, v16);
+                    let v18 = constructor_x64_movq_to_xmm(ctx, v17);
+                    let v19 = C::xmm_to_reg(ctx, v18);
+                    // Rule at src/isa/x64/inst.isle line 2579.
+                    return v19;
+                }
+                _ => {}
+            }
+        }
+        _ => {}
+    }
+    let v1 = C::fits_in_64(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v4 = C::u64_is_zero(ctx, arg1);
+        match v4 {
+            true => {
+                let v5 = C::temp_writable_gpr(ctx);
+                let v6 = &C::operand_size_of_type_32_64(ctx, v2);
+                let v27 = MInst::AluConstOp {
+                    op: AluRmiROpcode::Xor,
+                    size: v6.clone(),
+                    dst: v5,
+                };
+                let v28 = C::emit(ctx, &v27);
+                let v29 = C::writable_gpr_to_gpr(ctx, v5);
+                let v30 = C::gpr_to_reg(ctx, v29);
+                // Rule at src/isa/x64/inst.isle line 2590.
+                return v30;
+            }
+            false => {
+                let v5 = C::temp_writable_gpr(ctx);
+                let v6 = &C::operand_size_of_type_32_64(ctx, v2);
+                let v7 = MInst::Imm {
+                    dst_size: v6.clone(),
+                    simm64: arg1,
+                    dst: v5,
+                };
+                let v8 = C::emit(ctx, &v7);
+                let v9 = constructor_writable_gpr_to_r_reg(ctx, v5);
+                // Rule at src/isa/x64/inst.isle line 2568.
+                return v9;
+            }
+            _ => {}
+        }
+    }
+    if arg1 == 0x0 {
+        let v31 = C::multi_lane(ctx, arg0);
+        if let Some(v32) = v31 {
+            let v35 = constructor_xmm_zero(ctx, arg0);
+            let v36 = C::xmm_to_reg(ctx, v35);
+            // Rule at src/isa/x64/inst.isle line 2598.
+            return v36;
+        }
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "imm", "src/isa/x64/inst.isle line 2565"
+    )
+}
+
+// Generated as internal constructor for term xmm_zero.
+pub fn constructor_xmm_zero<C: Context>(ctx: &mut C, arg0: Type) -> Xmm {
+    let v1 = constructor_xmm_uninit_value(ctx);
+    let v2 = &C::xmm_to_xmm_mem(ctx, v1);
+    let v3 = constructor_x64_xor_vector(ctx, arg0, v1, v2);
+    // Rule at src/isa/x64/inst.isle line 2612.
+    return v3;
+}
+
+// Generated as internal constructor for term shift_r.
+pub fn constructor_shift_r<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &ShiftKind,
+    arg2: Gpr,
+    arg3: &Imm8Gpr,
+) -> Gpr {
+    let v4 = C::temp_writable_gpr(ctx);
+    let v5 = &C::raw_operand_size_of_type(ctx, arg0);
+    let v6 = MInst::ShiftR {
+        size: v5.clone(),
+        kind: arg1.clone(),
+        src: arg2,
+        num_bits: arg3.clone(),
+        dst: v4,
+    };
+    let v7 = C::emit(ctx, &v6);
+    let v8 = C::writable_gpr_to_gpr(ctx, v4);
+    // Rule at src/isa/x64/inst.isle line 2618.
+    return v8;
+}
+
+// Generated as internal constructor for term x64_rotl.
+pub fn constructor_x64_rotl<C: Context>(ctx: &mut C, arg0: Type, arg1: Gpr, arg2: &Imm8Gpr) -> Gpr {
+    let v4 = constructor_shift_r(ctx, arg0, &ShiftKind::RotateLeft, arg1, arg2);
+    // Rule at src/isa/x64/inst.isle line 2628.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_rotr.
+pub fn constructor_x64_rotr<C: Context>(ctx: &mut C, arg0: Type, arg1: Gpr, arg2: &Imm8Gpr) -> Gpr {
+    let v4 = constructor_shift_r(ctx, arg0, &ShiftKind::RotateRight, arg1, arg2);
+    // Rule at src/isa/x64/inst.isle line 2633.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_shl.
+pub fn constructor_x64_shl<C: Context>(ctx: &mut C, arg0: Type, arg1: Gpr, arg2: &Imm8Gpr) -> Gpr {
+    let v4 = constructor_shift_r(ctx, arg0, &ShiftKind::ShiftLeft, arg1, arg2);
+    // Rule at src/isa/x64/inst.isle line 2638.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_shr.
+pub fn constructor_x64_shr<C: Context>(ctx: &mut C, arg0: Type, arg1: Gpr, arg2: &Imm8Gpr) -> Gpr {
+    let v4 = constructor_shift_r(ctx, arg0, &ShiftKind::ShiftRightLogical, arg1, arg2);
+    // Rule at src/isa/x64/inst.isle line 2643.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_sar.
+pub fn constructor_x64_sar<C: Context>(ctx: &mut C, arg0: Type, arg1: Gpr, arg2: &Imm8Gpr) -> Gpr {
+    let v4 = constructor_shift_r(ctx, arg0, &ShiftKind::ShiftRightArithmetic, arg1, arg2);
+    // Rule at src/isa/x64/inst.isle line 2648.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_bswap.
+pub fn constructor_x64_bswap<C: Context>(ctx: &mut C, arg0: Type, arg1: Gpr) -> Gpr {
+    let v2 = C::temp_writable_gpr(ctx);
+    let v3 = &C::operand_size_of_type_32_64(ctx, arg0);
+    let v4 = MInst::Bswap {
+        size: v3.clone(),
+        src: arg1,
+        dst: v2,
+    };
+    let v5 = C::emit(ctx, &v4);
+    let v6 = C::writable_gpr_to_gpr(ctx, v2);
+    // Rule at src/isa/x64/inst.isle line 2655.
+    return v6;
+}
+
+// Generated as internal constructor for term cmp_rmi_r.
+pub fn constructor_cmp_rmi_r<C: Context>(
+    ctx: &mut C,
+    arg0: &OperandSize,
+    arg1: &CmpOpcode,
+    arg2: &GprMemImm,
+    arg3: Gpr,
+) -> ProducesFlags {
+    let v4 = MInst::CmpRmiR {
+        size: arg0.clone(),
+        opcode: arg1.clone(),
+        src: arg2.clone(),
+        dst: arg3,
+    };
+    let v5 = ProducesFlags::ProducesFlagsSideEffect { inst: v4 };
+    // Rule at src/isa/x64/inst.isle line 2663.
+    return v5;
+}
+
+// Generated as internal constructor for term x64_cmp.
+pub fn constructor_x64_cmp<C: Context>(
+    ctx: &mut C,
+    arg0: &OperandSize,
+    arg1: &GprMemImm,
+    arg2: Gpr,
+) -> ProducesFlags {
+    let v4 = &constructor_cmp_rmi_r(ctx, arg0, &CmpOpcode::Cmp, arg1, arg2);
+    // Rule at src/isa/x64/inst.isle line 2672.
+    return v4.clone();
+}
+
+// Generated as internal constructor for term x64_cmp_imm.
+pub fn constructor_x64_cmp_imm<C: Context>(
+    ctx: &mut C,
+    arg0: &OperandSize,
+    arg1: u32,
+    arg2: Gpr,
+) -> ProducesFlags {
+    let v4 = RegMemImm::Imm { simm32: arg1 };
+    let v5 = &C::gpr_mem_imm_new(ctx, &v4);
+    let v6 = &constructor_cmp_rmi_r(ctx, arg0, &CmpOpcode::Cmp, v5, arg2);
+    // Rule at src/isa/x64/inst.isle line 2677.
+    return v6.clone();
+}
+
+// Generated as internal constructor for term xmm_cmp_rm_r.
+pub fn constructor_xmm_cmp_rm_r<C: Context>(
+    ctx: &mut C,
+    arg0: &SseOpcode,
+    arg1: &XmmMemAligned,
+    arg2: Xmm,
+) -> ProducesFlags {
+    let v3 = MInst::XmmCmpRmR {
+        op: arg0.clone(),
+        src: arg1.clone(),
+        dst: arg2,
+    };
+    let v4 = ProducesFlags::ProducesFlagsSideEffect { inst: v3 };
+    // Rule at src/isa/x64/inst.isle line 2682.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_ucomis.
+pub fn constructor_x64_ucomis<C: Context>(ctx: &mut C, arg0: Value, arg1: Value) -> ProducesFlags {
+    let v1 = C::value_type(ctx, arg0);
+    match v1 {
+        F32 => {
+            let v4 = constructor_put_in_xmm(ctx, arg0);
+            let v5 = &constructor_xmm_to_xmm_mem_aligned(ctx, v4);
+            let v6 = constructor_put_in_xmm(ctx, arg1);
+            let v7 = &constructor_xmm_cmp_rm_r(ctx, &SseOpcode::Ucomiss, v5, v6);
+            // Rule at src/isa/x64/inst.isle line 2688.
+            return v7.clone();
+        }
+        F64 => {
+            let v4 = constructor_put_in_xmm(ctx, arg0);
+            let v5 = &constructor_xmm_to_xmm_mem_aligned(ctx, v4);
+            let v6 = constructor_put_in_xmm(ctx, arg1);
+            let v9 = &constructor_xmm_cmp_rm_r(ctx, &SseOpcode::Ucomisd, v5, v6);
+            // Rule at src/isa/x64/inst.isle line 2692.
+            return v9.clone();
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "x64_ucomis", "src/isa/x64/inst.isle line 2687"
+    )
+}
+
+// Generated as internal constructor for term x64_test.
+pub fn constructor_x64_test<C: Context>(
+    ctx: &mut C,
+    arg0: &OperandSize,
+    arg1: &GprMemImm,
+    arg2: Gpr,
+) -> ProducesFlags {
+    let v4 = &constructor_cmp_rmi_r(ctx, arg0, &CmpOpcode::Test, arg1, arg2);
+    // Rule at src/isa/x64/inst.isle line 2697.
+    return v4.clone();
+}
+
+// Generated as internal constructor for term x64_ptest.
+pub fn constructor_x64_ptest<C: Context>(ctx: &mut C, arg0: &XmmMem, arg1: Xmm) -> ProducesFlags {
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
+    let v4 = &constructor_xmm_cmp_rm_r(ctx, &SseOpcode::Ptest, v3, arg1);
+    // Rule at src/isa/x64/inst.isle line 2702.
+    return v4.clone();
+}
+
+// Generated as internal constructor for term cmove.
+pub fn constructor_cmove<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &CC,
+    arg2: &GprMem,
+    arg3: Gpr,
+) -> ConsumesFlags {
+    let v4 = C::temp_writable_gpr(ctx);
+    let v5 = &C::operand_size_of_type_32_64(ctx, arg0);
+    let v7 = constructor_writable_gpr_to_r_reg(ctx, v4);
+    let v6 = MInst::Cmove {
+        size: v5.clone(),
+        cc: arg1.clone(),
+        consequent: arg2.clone(),
+        alternative: arg3,
+        dst: v4,
+    };
+    let v8 = ConsumesFlags::ConsumesFlagsReturnsReg {
+        inst: v6,
+        result: v7,
+    };
+    // Rule at src/isa/x64/inst.isle line 2709.
+    return v8;
+}
+
+// Generated as internal constructor for term cmove_xmm.
+pub fn constructor_cmove_xmm<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &CC,
+    arg2: &XmmMemAligned,
+    arg3: Xmm,
+) -> ConsumesFlags {
+    let v4 = C::temp_writable_xmm(ctx);
+    let v6 = constructor_writable_xmm_to_r_reg(ctx, v4);
+    let v5 = MInst::XmmCmove {
+        ty: arg0,
+        cc: arg1.clone(),
+        consequent: arg2.clone(),
+        alternative: arg3,
+        dst: v4,
+    };
+    let v7 = ConsumesFlags::ConsumesFlagsReturnsReg {
+        inst: v5,
+        result: v6,
+    };
+    // Rule at src/isa/x64/inst.isle line 2717.
+    return v7;
+}
+
+// Generated as internal constructor for term cmove_from_values.
+pub fn constructor_cmove_from_values<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &CC,
+    arg2: Value,
+    arg3: Value,
+) -> ConsumesFlags {
+    let v1 = &C::type_register_class(ctx, arg0);
+    if let Some(v2) = v1 {
+        match v2 {
+            &RegisterClass::Gpr {
+                single_register: v3,
+            } => {
+                match v3 {
+                    true => {
+                        let v26 = &constructor_put_in_gpr_mem(ctx, arg2);
+                        let v27 = constructor_put_in_gpr(ctx, arg3);
+                        let v28 = &constructor_cmove(ctx, arg0, arg1, v26, v27);
+                        // Rule at src/isa/x64/inst.isle line 2748.
+                        return v28.clone();
+                    }
+                    false => {
+                        if arg0 == I128 {
+                            let v7 = C::put_in_regs(ctx, arg2);
+                            let v8 = C::put_in_regs(ctx, arg3);
+                            let v9 = C::temp_writable_gpr(ctx);
+                            let v10 = C::temp_writable_gpr(ctx);
+                            let v13 = constructor_value_regs_get_gpr(ctx, v7, 0x0);
+                            let v14 = &C::gpr_to_gpr_mem(ctx, v13);
+                            let v15 = constructor_value_regs_get_gpr(ctx, v8, 0x0);
+                            let v18 = constructor_value_regs_get_gpr(ctx, v7, 0x1);
+                            let v19 = &C::gpr_to_gpr_mem(ctx, v18);
+                            let v20 = constructor_value_regs_get_gpr(ctx, v8, 0x1);
+                            let v22 = constructor_writable_gpr_to_r_reg(ctx, v9);
+                            let v23 = constructor_writable_gpr_to_r_reg(ctx, v10);
+                            let v24 = C::value_regs(ctx, v22, v23);
+                            let v16 = MInst::Cmove {
+                                size: OperandSize::Size64,
+                                cc: arg1.clone(),
+                                consequent: v14.clone(),
+                                alternative: v15,
+                                dst: v9,
+                            };
+                            let v21 = MInst::Cmove {
+                                size: OperandSize::Size64,
+                                cc: arg1.clone(),
+                                consequent: v19.clone(),
+                                alternative: v20,
+                                dst: v10,
+                            };
+                            let v25 = ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
+                                inst1: v16,
+                                inst2: v21,
+                                result: v24,
+                            };
+                            // Rule at src/isa/x64/inst.isle line 2727.
+                            return v25;
+                        }
+                    }
+                    _ => {}
+                }
+            }
+            &RegisterClass::Xmm => {
+                let v29 = &constructor_put_in_xmm_mem_aligned(ctx, arg2);
+                let v30 = constructor_put_in_xmm(ctx, arg3);
+                let v31 = &constructor_cmove_xmm(ctx, arg0, arg1, v29, v30);
+                // Rule at src/isa/x64/inst.isle line 2751.
+                return v31.clone();
+            }
+            _ => {}
+        }
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "cmove_from_values", "src/isa/x64/inst.isle line 2726"
+    )
+}
+
+// Generated as internal constructor for term cmove_or.
+pub fn constructor_cmove_or<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &CC,
+    arg2: &CC,
+    arg3: &GprMem,
+    arg4: Gpr,
+) -> ConsumesFlags {
+    let v5 = C::temp_writable_gpr(ctx);
+    let v6 = C::temp_writable_gpr(ctx);
+    let v7 = &C::operand_size_of_type_32_64(ctx, arg0);
+    let v9 = C::writable_gpr_to_gpr(ctx, v6);
+    let v11 = constructor_writable_gpr_to_value_regs(ctx, v5);
+    let v8 = MInst::Cmove {
+        size: v7.clone(),
+        cc: arg1.clone(),
+        consequent: arg3.clone(),
+        alternative: arg4,
+        dst: v6,
+    };
+    let v10 = MInst::Cmove {
+        size: v7.clone(),
+        cc: arg2.clone(),
+        consequent: arg3.clone(),
+        alternative: v9,
+        dst: v5,
+    };
+    let v12 = ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
+        inst1: v8,
+        inst2: v10,
+        result: v11,
+    };
+    // Rule at src/isa/x64/inst.isle line 2758.
+    return v12;
+}
+
+// Generated as internal constructor for term cmove_or_xmm.
+pub fn constructor_cmove_or_xmm<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &CC,
+    arg2: &CC,
+    arg3: &XmmMemAligned,
+    arg4: Xmm,
+) -> ConsumesFlags {
+    let v5 = C::temp_writable_xmm(ctx);
+    let v6 = C::temp_writable_xmm(ctx);
+    let v8 = C::writable_xmm_to_xmm(ctx, v6);
+    let v10 = constructor_writable_xmm_to_value_regs(ctx, v5);
+    let v7 = MInst::XmmCmove {
+        ty: arg0,
+        cc: arg1.clone(),
+        consequent: arg3.clone(),
+        alternative: arg4,
+        dst: v6,
+    };
+    let v9 = MInst::XmmCmove {
+        ty: arg0,
+        cc: arg2.clone(),
+        consequent: arg3.clone(),
+        alternative: v8,
+        dst: v5,
+    };
+    let v11 = ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
+        inst1: v7,
+        inst2: v9,
+        result: v10,
+    };
+    // Rule at src/isa/x64/inst.isle line 2770.
+    return v11;
+}
+
+// Generated as internal constructor for term cmove_or_from_values.
+pub fn constructor_cmove_or_from_values<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &CC,
+    arg2: &CC,
+    arg3: Value,
+    arg4: Value,
+) -> ConsumesFlags {
+    let v1 = &C::type_register_class(ctx, arg0);
+    if let Some(v2) = v1 {
+        match v2 {
+            &RegisterClass::Gpr {
+                single_register: v3,
+            } => {
+                match v3 {
+                    true => {
+                        let v37 = &constructor_put_in_gpr_mem(ctx, arg3);
+                        let v38 = constructor_put_in_gpr(ctx, arg4);
+                        let v39 = &constructor_cmove_or(ctx, arg0, arg1, arg2, v37, v38);
+                        // Rule at src/isa/x64/inst.isle line 2803.
+                        return v39.clone();
+                    }
+                    false => {
+                        if arg0 == I128 {
+                            let v8 = C::put_in_regs(ctx, arg3);
+                            let v9 = C::put_in_regs(ctx, arg4);
+                            let v10 = C::temp_writable_gpr(ctx);
+                            let v11 = C::temp_writable_gpr(ctx);
+                            let v12 = C::temp_writable_gpr(ctx);
+                            let v13 = C::temp_writable_gpr(ctx);
+                            let v16 = constructor_value_regs_get_gpr(ctx, v8, 0x0);
+                            let v17 = &C::gpr_to_gpr_mem(ctx, v16);
+                            let v18 = constructor_value_regs_get_gpr(ctx, v9, 0x0);
+                            let v20 = constructor_value_regs_get_gpr(ctx, v8, 0x0);
+                            let v21 = &C::gpr_to_gpr_mem(ctx, v20);
+                            let v22 = C::writable_gpr_to_gpr(ctx, v12);
+                            let v25 = constructor_value_regs_get_gpr(ctx, v8, 0x1);
+                            let v26 = &C::gpr_to_gpr_mem(ctx, v25);
+                            let v27 = constructor_value_regs_get_gpr(ctx, v9, 0x1);
+                            let v29 = constructor_value_regs_get_gpr(ctx, v8, 0x1);
+                            let v30 = &C::gpr_to_gpr_mem(ctx, v29);
+                            let v31 = C::writable_gpr_to_gpr(ctx, v13);
+                            let v33 = constructor_writable_gpr_to_r_reg(ctx, v10);
+                            let v34 = constructor_writable_gpr_to_r_reg(ctx, v11);
+                            let v35 = C::value_regs(ctx, v33, v34);
+                            let v19 = MInst::Cmove {
+                                size: OperandSize::Size64,
+                                cc: arg1.clone(),
+                                consequent: v17.clone(),
+                                alternative: v18,
+                                dst: v12,
+                            };
+                            let v23 = MInst::Cmove {
+                                size: OperandSize::Size64,
+                                cc: arg2.clone(),
+                                consequent: v21.clone(),
+                                alternative: v22,
+                                dst: v10,
+                            };
+                            let v28 = MInst::Cmove {
+                                size: OperandSize::Size64,
+                                cc: arg1.clone(),
+                                consequent: v26.clone(),
+                                alternative: v27,
+                                dst: v13,
+                            };
+                            let v32 = MInst::Cmove {
+                                size: OperandSize::Size64,
+                                cc: arg2.clone(),
+                                consequent: v30.clone(),
+                                alternative: v31,
+                                dst: v11,
+                            };
+                            let v36 = ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
+                                inst1: v19,
+                                inst2: v23,
+                                inst3: v28,
+                                inst4: v32,
+                                result: v35,
+                            };
+                            // Rule at src/isa/x64/inst.isle line 2784.
+                            return v36;
+                        }
+                    }
+                    _ => {}
+                }
+            }
+            &RegisterClass::Xmm => {
+                let v40 = &constructor_put_in_xmm_mem_aligned(ctx, arg3);
+                let v41 = constructor_put_in_xmm(ctx, arg4);
+                let v42 = &constructor_cmove_or_xmm(ctx, arg0, arg1, arg2, v40, v41);
+                // Rule at src/isa/x64/inst.isle line 2806.
+                return v42.clone();
+            }
+            _ => {}
+        }
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "cmove_or_from_values", "src/isa/x64/inst.isle line 2783"
+    )
+}
+
+// Generated as internal constructor for term x64_setcc.
+pub fn constructor_x64_setcc<C: Context>(ctx: &mut C, arg0: &CC) -> ConsumesFlags {
+    let v1 = C::temp_writable_gpr(ctx);
+    let v3 = constructor_writable_gpr_to_r_reg(ctx, v1);
+    let v2 = MInst::Setcc {
+        cc: arg0.clone(),
+        dst: v1,
+    };
+    let v4 = ConsumesFlags::ConsumesFlagsReturnsReg {
+        inst: v2,
+        result: v3,
+    };
+    // Rule at src/isa/x64/inst.isle line 2811.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_setcc_paired.
+pub fn constructor_x64_setcc_paired<C: Context>(ctx: &mut C, arg0: &CC) -> ConsumesFlags {
+    let v1 = C::temp_writable_gpr(ctx);
+    let v3 = constructor_writable_gpr_to_r_reg(ctx, v1);
+    let v2 = MInst::Setcc {
+        cc: arg0.clone(),
+        dst: v1,
+    };
+    let v4 = ConsumesFlags::ConsumesFlagsReturnsResultWithProducer {
+        inst: v2,
+        result: v3,
+    };
+    // Rule at src/isa/x64/inst.isle line 2820.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_paddb.
+pub fn constructor_x64_paddb<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpaddb, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 2830.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Paddb, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 2828.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_paddw.
+pub fn constructor_x64_paddw<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpaddw, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 2838.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Paddw, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 2836.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_paddd.
+pub fn constructor_x64_paddd<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpaddd, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 2846.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Paddd, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 2844.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_paddq.
+pub fn constructor_x64_paddq<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpaddq, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 2854.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Paddq, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 2852.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_paddsb.
+pub fn constructor_x64_paddsb<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpaddsb, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 2862.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Paddsb, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 2860.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_paddsw.
+pub fn constructor_x64_paddsw<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpaddsw, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 2870.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Paddsw, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 2868.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_phaddw.
+pub fn constructor_x64_phaddw<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vphaddw, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 2878.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Phaddw, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 2876.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_phaddd.
+pub fn constructor_x64_phaddd<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vphaddd, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 2886.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Phaddd, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 2884.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_paddusb.
+pub fn constructor_x64_paddusb<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpaddusb, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 2894.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Paddusb, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 2892.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_paddusw.
+pub fn constructor_x64_paddusw<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpaddusw, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 2902.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Paddusw, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 2900.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_psubb.
+pub fn constructor_x64_psubb<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsubb, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 2910.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Psubb, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 2908.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_psubw.
+pub fn constructor_x64_psubw<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsubw, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 2918.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Psubw, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 2916.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_psubd.
+pub fn constructor_x64_psubd<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsubd, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 2926.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Psubd, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 2924.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_psubq.
+pub fn constructor_x64_psubq<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsubq, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 2934.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Psubq, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 2932.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_psubsb.
+pub fn constructor_x64_psubsb<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsubsb, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 2942.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Psubsb, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 2940.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_psubsw.
+pub fn constructor_x64_psubsw<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsubsw, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 2950.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Psubsw, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 2948.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_psubusb.
+pub fn constructor_x64_psubusb<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsubusb, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 2958.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Psubusb, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 2956.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_psubusw.
+pub fn constructor_x64_psubusw<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsubusw, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 2966.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Psubusw, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 2964.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_pavgb.
+pub fn constructor_x64_pavgb<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpavgb, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 2974.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pavgb, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 2972.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_pavgw.
+pub fn constructor_x64_pavgw<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpavgw, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 2982.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pavgw, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 2980.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_pand.
+pub fn constructor_x64_pand<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpand, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 2990.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pand, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 2988.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_andps.
+pub fn constructor_x64_andps<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vandps, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 2998.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Andps, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 2996.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_andpd.
+pub fn constructor_x64_andpd<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vandpd, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 3006.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Andpd, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3004.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_por.
+pub fn constructor_x64_por<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpor, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 3014.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Por, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3012.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_orps.
+pub fn constructor_x64_orps<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vorps, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 3022.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Orps, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3020.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_orpd.
+pub fn constructor_x64_orpd<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vorpd, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 3030.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Orpd, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3028.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_pxor.
+pub fn constructor_x64_pxor<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpxor, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 3038.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pxor, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3036.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_xorps.
+pub fn constructor_x64_xorps<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vxorps, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 3046.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Xorps, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3044.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_xorpd.
+pub fn constructor_x64_xorpd<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vxorpd, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 3054.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Xorpd, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3052.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_pmullw.
+pub fn constructor_x64_pmullw<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmullw, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 3062.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmullw, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3060.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_pmulld.
+pub fn constructor_x64_pmulld<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmulld, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 3070.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmulld, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3068.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_pmulhw.
+pub fn constructor_x64_pmulhw<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmulhw, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 3078.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmulhw, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3076.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_pmulhrsw.
+pub fn constructor_x64_pmulhrsw<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmulhrsw, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 3086.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmulhrsw, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3084.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_pmulhuw.
+pub fn constructor_x64_pmulhuw<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmulhuw, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 3094.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmulhuw, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3092.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_pmuldq.
+pub fn constructor_x64_pmuldq<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmuldq, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 3102.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmuldq, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3100.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_pmuludq.
+pub fn constructor_x64_pmuludq<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmuludq, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 3110.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmuludq, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3108.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_punpckhwd.
+pub fn constructor_x64_punpckhwd<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpunpckhwd, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 3118.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Punpckhwd, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3116.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_punpcklwd.
+pub fn constructor_x64_punpcklwd<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpunpcklwd, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 3126.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Punpcklwd, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3124.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_punpckldq.
+pub fn constructor_x64_punpckldq<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpunpckldq, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 3134.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Punpckldq, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3132.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_punpckhdq.
+pub fn constructor_x64_punpckhdq<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpunpckhdq, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 3142.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Punpckhdq, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3140.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_punpcklqdq.
+pub fn constructor_x64_punpcklqdq<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpunpcklqdq, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 3150.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Punpcklqdq, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3148.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_punpckhqdq.
+pub fn constructor_x64_punpckhqdq<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpunpckhqdq, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 3158.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Punpckhqdq, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3156.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_unpcklps.
+pub fn constructor_x64_unpcklps<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vunpcklps, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 3166.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Unpcklps, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3164.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_unpckhps.
+pub fn constructor_x64_unpckhps<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vunpckhps, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 3174.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Unpckhps, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3172.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_andnps.
+pub fn constructor_x64_andnps<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vandnps, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 3182.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Andnps, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3180.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_andnpd.
+pub fn constructor_x64_andnpd<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vandnpd, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 3190.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Andnpd, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3188.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_pandn.
+pub fn constructor_x64_pandn<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpandn, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 3198.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pandn, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3196.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_addss.
+pub fn constructor_x64_addss<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v4 = C::use_avx(ctx);
+    if v4 == true {
+        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vaddss, arg0, v6);
+        // Rule at src/isa/x64/inst.isle line 3206.
+        return v7;
+    }
+    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Addss, arg0, arg1);
+    // Rule at src/isa/x64/inst.isle line 3204.
+    return v3;
+}
+
+// Generated as internal constructor for term x64_addsd.
+pub fn constructor_x64_addsd<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v4 = C::use_avx(ctx);
+    if v4 == true {
+        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vaddsd, arg0, v6);
+        // Rule at src/isa/x64/inst.isle line 3214.
+        return v7;
+    }
+    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Addsd, arg0, arg1);
+    // Rule at src/isa/x64/inst.isle line 3212.
+    return v3;
+}
+
+// Generated as internal constructor for term x64_addps.
+pub fn constructor_x64_addps<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vaddps, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 3222.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Addps, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3220.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_addpd.
+pub fn constructor_x64_addpd<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vaddpd, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 3230.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Addpd, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3228.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_subss.
+pub fn constructor_x64_subss<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v4 = C::use_avx(ctx);
+    if v4 == true {
+        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vsubss, arg0, v6);
+        // Rule at src/isa/x64/inst.isle line 3238.
+        return v7;
+    }
+    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Subss, arg0, arg1);
+    // Rule at src/isa/x64/inst.isle line 3236.
+    return v3;
+}
+
+// Generated as internal constructor for term x64_subsd.
+pub fn constructor_x64_subsd<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v4 = C::use_avx(ctx);
+    if v4 == true {
+        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vsubsd, arg0, v6);
+        // Rule at src/isa/x64/inst.isle line 3246.
+        return v7;
+    }
+    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Subsd, arg0, arg1);
+    // Rule at src/isa/x64/inst.isle line 3244.
+    return v3;
+}
+
+// Generated as internal constructor for term x64_subps.
+pub fn constructor_x64_subps<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vsubps, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 3254.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Subps, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3252.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_subpd.
+pub fn constructor_x64_subpd<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vsubpd, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 3262.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Subpd, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3260.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_mulss.
+pub fn constructor_x64_mulss<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v4 = C::use_avx(ctx);
+    if v4 == true {
+        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vmulss, arg0, v6);
+        // Rule at src/isa/x64/inst.isle line 3270.
+        return v7;
+    }
+    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Mulss, arg0, arg1);
+    // Rule at src/isa/x64/inst.isle line 3268.
+    return v3;
+}
+
+// Generated as internal constructor for term x64_mulsd.
+pub fn constructor_x64_mulsd<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v4 = C::use_avx(ctx);
+    if v4 == true {
+        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vmulsd, arg0, v6);
+        // Rule at src/isa/x64/inst.isle line 3278.
+        return v7;
+    }
+    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Mulsd, arg0, arg1);
+    // Rule at src/isa/x64/inst.isle line 3276.
+    return v3;
+}
+
+// Generated as internal constructor for term x64_mulps.
+pub fn constructor_x64_mulps<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vmulps, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 3286.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Mulps, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3284.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_mulpd.
+pub fn constructor_x64_mulpd<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vmulpd, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 3294.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Mulpd, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3292.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_divss.
+pub fn constructor_x64_divss<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v4 = C::use_avx(ctx);
+    if v4 == true {
+        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vdivss, arg0, v6);
+        // Rule at src/isa/x64/inst.isle line 3302.
+        return v7;
+    }
+    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Divss, arg0, arg1);
+    // Rule at src/isa/x64/inst.isle line 3300.
+    return v3;
+}
+
+// Generated as internal constructor for term x64_divsd.
+pub fn constructor_x64_divsd<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v4 = C::use_avx(ctx);
+    if v4 == true {
+        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vdivsd, arg0, v6);
+        // Rule at src/isa/x64/inst.isle line 3310.
+        return v7;
+    }
+    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Divsd, arg0, arg1);
+    // Rule at src/isa/x64/inst.isle line 3308.
+    return v3;
+}
+
+// Generated as internal constructor for term x64_divps.
+pub fn constructor_x64_divps<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vdivps, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 3318.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Divps, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3316.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_divpd.
+pub fn constructor_x64_divpd<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vdivpd, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 3326.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Divpd, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3324.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_blend.
+pub fn constructor_x64_blend<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Xmm,
+    arg2: &XmmMem,
+    arg3: Xmm,
+) -> Xmm {
+    match arg0 {
+        F32X4 => {
+            let v4 = constructor_x64_blendvps(ctx, arg3, arg2, arg1);
+            // Rule at src/isa/x64/inst.isle line 3332.
+            return v4;
+        }
+        F64X2 => {
+            let v5 = constructor_x64_blendvpd(ctx, arg3, arg2, arg1);
+            // Rule at src/isa/x64/inst.isle line 3333.
+            return v5;
+        }
+        _ => {}
+    }
+    let v6 = C::multi_lane(ctx, arg0);
+    if let Some(v7) = v6 {
+        let v10 = constructor_x64_pblendvb(ctx, arg3, arg2, arg1);
+        // Rule at src/isa/x64/inst.isle line 3334.
+        return v10;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "x64_blend", "src/isa/x64/inst.isle line 3331"
+    )
+}
+
+// Generated as internal constructor for term x64_blendvpd.
+pub fn constructor_x64_blendvpd<C: Context>(
+    ctx: &mut C,
+    arg0: Xmm,
+    arg1: &XmmMem,
+    arg2: Xmm,
+) -> Xmm {
+    let v6 = C::use_avx(ctx);
+    if v6 == true {
+        let v8 = constructor_xmm_rmr_blend_vex(ctx, &AvxOpcode::Vblendvpd, arg0, arg1, arg2);
+        // Rule at src/isa/x64/inst.isle line 3340.
+        return v8;
+    }
+    let v4 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v5 = constructor_xmm_rm_r_blend(ctx, &SseOpcode::Blendvpd, arg0, v4, arg2);
+    // Rule at src/isa/x64/inst.isle line 3338.
+    return v5;
+}
+
+// Generated as internal constructor for term x64_blendvps.
+pub fn constructor_x64_blendvps<C: Context>(
+    ctx: &mut C,
+    arg0: Xmm,
+    arg1: &XmmMem,
+    arg2: Xmm,
+) -> Xmm {
+    let v6 = C::use_avx(ctx);
+    if v6 == true {
+        let v8 = constructor_xmm_rmr_blend_vex(ctx, &AvxOpcode::Vblendvps, arg0, arg1, arg2);
+        // Rule at src/isa/x64/inst.isle line 3348.
+        return v8;
+    }
+    let v4 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v5 = constructor_xmm_rm_r_blend(ctx, &SseOpcode::Blendvps, arg0, v4, arg2);
+    // Rule at src/isa/x64/inst.isle line 3346.
+    return v5;
+}
+
+// Generated as internal constructor for term x64_pblendvb.
+pub fn constructor_x64_pblendvb<C: Context>(
+    ctx: &mut C,
+    arg0: Xmm,
+    arg1: &XmmMem,
+    arg2: Xmm,
+) -> Xmm {
+    let v6 = C::use_avx(ctx);
+    if v6 == true {
+        let v8 = constructor_xmm_rmr_blend_vex(ctx, &AvxOpcode::Vpblendvb, arg0, arg1, arg2);
+        // Rule at src/isa/x64/inst.isle line 3356.
+        return v8;
+    }
+    let v4 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v5 = constructor_xmm_rm_r_blend(ctx, &SseOpcode::Pblendvb, arg0, v4, arg2);
+    // Rule at src/isa/x64/inst.isle line 3354.
+    return v5;
+}
+
+// Generated as internal constructor for term x64_pblendw.
+pub fn constructor_x64_pblendw<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem, arg2: u8) -> Xmm {
+    let v8 = C::use_avx(ctx);
+    if v8 == true {
+        let v10 = constructor_xmm_rmr_imm_vex(ctx, &AvxOpcode::Vpblendw, arg0, arg1, arg2);
+        // Rule at src/isa/x64/inst.isle line 3364.
+        return v10;
+    }
+    let v4 = C::xmm_to_reg(ctx, arg0);
+    let v5 = &C::xmm_mem_to_reg_mem(ctx, arg1);
+    let v7 = constructor_xmm_rm_r_imm(ctx, &SseOpcode::Pblendw, v4, v5, arg2, &OperandSize::Size32);
+    // Rule at src/isa/x64/inst.isle line 3362.
+    return v7;
+}
+
+// Generated as internal constructor for term x64_movsd_regmove.
+pub fn constructor_x64_movsd_regmove<C: Context>(ctx: &mut C, arg0: Xmm, arg1: Xmm) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vmovsd, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 3379.
+        return v8;
+    }
+    let v3 = &C::xmm_to_xmm_mem(ctx, arg1);
+    let v4 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Movsd, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3377.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_movss_regmove.
+pub fn constructor_x64_movss_regmove<C: Context>(ctx: &mut C, arg0: Xmm, arg1: Xmm) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vmovss, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 3386.
+        return v8;
+    }
+    let v3 = &C::xmm_to_xmm_mem(ctx, arg1);
+    let v4 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Movss, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3384.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_movlhps.
+pub fn constructor_x64_movlhps<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vmovlhps, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 3394.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Movlhps, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3392.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_pmaxs.
+pub fn constructor_x64_pmaxs<C: Context>(ctx: &mut C, arg0: Type, arg1: Xmm, arg2: &XmmMem) -> Xmm {
+    match arg0 {
+        I8X16 => {
+            let v3 = constructor_x64_pmaxsb(ctx, arg1, arg2);
+            // Rule at src/isa/x64/inst.isle line 3400.
+            return v3;
+        }
+        I16X8 => {
+            let v4 = constructor_x64_pmaxsw(ctx, arg1, arg2);
+            // Rule at src/isa/x64/inst.isle line 3401.
+            return v4;
+        }
+        I32X4 => {
+            let v5 = constructor_x64_pmaxsd(ctx, arg1, arg2);
+            // Rule at src/isa/x64/inst.isle line 3402.
+            return v5;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "x64_pmaxs", "src/isa/x64/inst.isle line 3399"
+    )
+}
+
+// Generated as internal constructor for term x64_pmaxsb.
+pub fn constructor_x64_pmaxsb<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmaxsb, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 3406.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmaxsb, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3405.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_pmaxsw.
+pub fn constructor_x64_pmaxsw<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmaxsw, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 3411.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmaxsw, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3410.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_pmaxsd.
+pub fn constructor_x64_pmaxsd<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmaxsd, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 3416.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmaxsd, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3415.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_pmins.
+pub fn constructor_x64_pmins<C: Context>(ctx: &mut C, arg0: Type, arg1: Xmm, arg2: &XmmMem) -> Xmm {
+    match arg0 {
+        I8X16 => {
+            let v3 = constructor_x64_pminsb(ctx, arg1, arg2);
+            // Rule at src/isa/x64/inst.isle line 3422.
+            return v3;
+        }
+        I16X8 => {
+            let v4 = constructor_x64_pminsw(ctx, arg1, arg2);
+            // Rule at src/isa/x64/inst.isle line 3423.
+            return v4;
+        }
+        I32X4 => {
+            let v5 = constructor_x64_pminsd(ctx, arg1, arg2);
+            // Rule at src/isa/x64/inst.isle line 3424.
+            return v5;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "x64_pmins", "src/isa/x64/inst.isle line 3421"
+    )
+}
+
+// Generated as internal constructor for term x64_pminsb.
+pub fn constructor_x64_pminsb<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpminsb, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 3428.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pminsb, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3427.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_pminsw.
+pub fn constructor_x64_pminsw<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpminsw, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 3433.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pminsw, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3432.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_pminsd.
+pub fn constructor_x64_pminsd<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpminsd, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 3438.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pminsd, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3437.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_pmaxu.
+pub fn constructor_x64_pmaxu<C: Context>(ctx: &mut C, arg0: Type, arg1: Xmm, arg2: &XmmMem) -> Xmm {
+    match arg0 {
+        I8X16 => {
+            let v3 = constructor_x64_pmaxub(ctx, arg1, arg2);
+            // Rule at src/isa/x64/inst.isle line 3444.
+            return v3;
+        }
+        I16X8 => {
+            let v4 = constructor_x64_pmaxuw(ctx, arg1, arg2);
+            // Rule at src/isa/x64/inst.isle line 3445.
+            return v4;
+        }
+        I32X4 => {
+            let v5 = constructor_x64_pmaxud(ctx, arg1, arg2);
+            // Rule at src/isa/x64/inst.isle line 3446.
+            return v5;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "x64_pmaxu", "src/isa/x64/inst.isle line 3443"
+    )
+}
+
+// Generated as internal constructor for term x64_pmaxub.
+pub fn constructor_x64_pmaxub<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmaxub, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 3450.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmaxub, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3449.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_pmaxuw.
+pub fn constructor_x64_pmaxuw<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmaxuw, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 3455.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmaxuw, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3454.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_pmaxud.
+pub fn constructor_x64_pmaxud<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmaxud, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 3460.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmaxud, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3459.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_pminu.
+pub fn constructor_x64_pminu<C: Context>(ctx: &mut C, arg0: Type, arg1: Xmm, arg2: &XmmMem) -> Xmm {
+    match arg0 {
+        I8X16 => {
+            let v3 = constructor_x64_pminub(ctx, arg1, arg2);
+            // Rule at src/isa/x64/inst.isle line 3466.
+            return v3;
+        }
+        I16X8 => {
+            let v4 = constructor_x64_pminuw(ctx, arg1, arg2);
+            // Rule at src/isa/x64/inst.isle line 3467.
+            return v4;
+        }
+        I32X4 => {
+            let v5 = constructor_x64_pminud(ctx, arg1, arg2);
+            // Rule at src/isa/x64/inst.isle line 3468.
+            return v5;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "x64_pminu", "src/isa/x64/inst.isle line 3465"
+    )
+}
+
+// Generated as internal constructor for term x64_pminub.
+pub fn constructor_x64_pminub<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpminub, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 3472.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pminub, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3471.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_pminuw.
+pub fn constructor_x64_pminuw<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpminuw, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 3477.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pminuw, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3476.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_pminud.
+pub fn constructor_x64_pminud<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpminud, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 3482.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pminud, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3481.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_punpcklbw.
+pub fn constructor_x64_punpcklbw<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpunpcklbw, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 3490.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Punpcklbw, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3488.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_punpckhbw.
+pub fn constructor_x64_punpckhbw<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpunpckhbw, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 3498.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Punpckhbw, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3496.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_packsswb.
+pub fn constructor_x64_packsswb<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpacksswb, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 3506.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Packsswb, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3504.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_packssdw.
+pub fn constructor_x64_packssdw<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpackssdw, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 3514.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Packssdw, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3512.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_packuswb.
+pub fn constructor_x64_packuswb<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpackuswb, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 3522.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Packuswb, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3520.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_packusdw.
+pub fn constructor_x64_packusdw<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpackusdw, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 3530.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Packusdw, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3528.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_palignr.
+pub fn constructor_x64_palignr<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem, arg2: u8) -> Xmm {
+    let v8 = C::use_avx(ctx);
+    if v8 == true {
+        let v10 = constructor_xmm_rmr_imm_vex(ctx, &AvxOpcode::Vpalignr, arg0, arg1, arg2);
+        // Rule at src/isa/x64/inst.isle line 3542.
+        return v10;
+    }
+    let v4 = C::xmm_to_reg(ctx, arg0);
+    let v5 = &C::xmm_mem_to_reg_mem(ctx, arg1);
+    let v7 = constructor_xmm_rm_r_imm(ctx, &SseOpcode::Palignr, v4, v5, arg2, &OperandSize::Size32);
+    // Rule at src/isa/x64/inst.isle line 3536.
+    return v7;
+}
+
+// Generated as internal constructor for term x64_cmpp.
+pub fn constructor_x64_cmpp<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Xmm,
+    arg2: &XmmMem,
+    arg3: &FcmpImm,
+) -> Xmm {
+    match arg0 {
+        F32X4 => {
+            let v4 = constructor_x64_cmpps(ctx, arg1, arg2, arg3);
+            // Rule at src/isa/x64/inst.isle line 3548.
+            return v4;
+        }
+        F64X2 => {
+            let v5 = constructor_x64_cmppd(ctx, arg1, arg2, arg3);
+            // Rule at src/isa/x64/inst.isle line 3549.
+            return v5;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "x64_cmpp", "src/isa/x64/inst.isle line 3547"
+    )
+}
+
+// Generated as internal constructor for term x64_cmpps.
+pub fn constructor_x64_cmpps<C: Context>(
+    ctx: &mut C,
+    arg0: Xmm,
+    arg1: &XmmMem,
+    arg2: &FcmpImm,
+) -> Xmm {
+    let v9 = C::use_avx(ctx);
+    if v9 == true {
+        let v11 = C::encode_fcmp_imm(ctx, arg2);
+        let v12 = constructor_xmm_rmr_imm_vex(ctx, &AvxOpcode::Vcmpps, arg0, arg1, v11);
+        // Rule at src/isa/x64/inst.isle line 3558.
+        return v12;
+    }
+    let v4 = C::xmm_to_reg(ctx, arg0);
+    let v5 = &C::xmm_mem_to_reg_mem(ctx, arg1);
+    let v6 = C::encode_fcmp_imm(ctx, arg2);
+    let v8 = constructor_xmm_rm_r_imm(ctx, &SseOpcode::Cmpps, v4, v5, v6, &OperandSize::Size32);
+    // Rule at src/isa/x64/inst.isle line 3552.
+    return v8;
+}
+
+// Generated as internal constructor for term x64_cmppd.
+pub fn constructor_x64_cmppd<C: Context>(
+    ctx: &mut C,
+    arg0: Xmm,
+    arg1: &XmmMem,
+    arg2: &FcmpImm,
+) -> Xmm {
+    let v9 = C::use_avx(ctx);
+    if v9 == true {
+        let v11 = C::encode_fcmp_imm(ctx, arg2);
+        let v12 = constructor_xmm_rmr_imm_vex(ctx, &AvxOpcode::Vcmppd, arg0, arg1, v11);
+        // Rule at src/isa/x64/inst.isle line 3575.
+        return v12;
+    }
+    let v4 = C::xmm_to_reg(ctx, arg0);
+    let v5 = &C::xmm_mem_to_reg_mem(ctx, arg1);
+    let v6 = C::encode_fcmp_imm(ctx, arg2);
+    let v8 = constructor_xmm_rm_r_imm(ctx, &SseOpcode::Cmppd, v4, v5, v6, &OperandSize::Size32);
+    // Rule at src/isa/x64/inst.isle line 3569.
+    return v8;
+}
+
+// Generated as internal constructor for term x64_pinsrb.
+pub fn constructor_x64_pinsrb<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &GprMem, arg2: u8) -> Xmm {
+    let v8 = C::use_avx(ctx);
+    if v8 == true {
+        let v10 = constructor_xmm_vex_pinsr(ctx, &AvxOpcode::Vpinsrb, arg0, arg1, arg2);
+        // Rule at src/isa/x64/inst.isle line 3590.
+        return v10;
+    }
+    let v4 = C::xmm_to_reg(ctx, arg0);
+    let v5 = &C::gpr_mem_to_reg_mem(ctx, arg1);
+    let v7 = constructor_xmm_rm_r_imm(ctx, &SseOpcode::Pinsrb, v4, v5, arg2, &OperandSize::Size32);
+    // Rule at src/isa/x64/inst.isle line 3584.
+    return v7;
+}
+
+// Generated as internal constructor for term x64_pinsrw.
+pub fn constructor_x64_pinsrw<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &GprMem, arg2: u8) -> Xmm {
+    let v8 = C::use_avx(ctx);
+    if v8 == true {
+        let v10 = constructor_xmm_vex_pinsr(ctx, &AvxOpcode::Vpinsrw, arg0, arg1, arg2);
+        // Rule at src/isa/x64/inst.isle line 3602.
+        return v10;
+    }
+    let v4 = C::xmm_to_reg(ctx, arg0);
+    let v5 = &C::gpr_mem_to_reg_mem(ctx, arg1);
+    let v7 = constructor_xmm_rm_r_imm(ctx, &SseOpcode::Pinsrw, v4, v5, arg2, &OperandSize::Size32);
+    // Rule at src/isa/x64/inst.isle line 3596.
+    return v7;
+}
+
+// Generated as internal constructor for term x64_pinsrd.
+pub fn constructor_x64_pinsrd<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &GprMem, arg2: u8) -> Xmm {
+    let v8 = C::use_avx(ctx);
+    if v8 == true {
+        let v10 = constructor_xmm_vex_pinsr(ctx, &AvxOpcode::Vpinsrd, arg0, arg1, arg2);
+        // Rule at src/isa/x64/inst.isle line 3614.
+        return v10;
+    }
+    let v4 = C::xmm_to_reg(ctx, arg0);
+    let v5 = &C::gpr_mem_to_reg_mem(ctx, arg1);
+    let v7 = constructor_xmm_rm_r_imm(ctx, &SseOpcode::Pinsrd, v4, v5, arg2, &OperandSize::Size32);
+    // Rule at src/isa/x64/inst.isle line 3608.
+    return v7;
+}
+
+// Generated as internal constructor for term x64_pinsrq.
+pub fn constructor_x64_pinsrq<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &GprMem, arg2: u8) -> Xmm {
+    let v8 = C::use_avx(ctx);
+    if v8 == true {
+        let v10 = constructor_xmm_vex_pinsr(ctx, &AvxOpcode::Vpinsrq, arg0, arg1, arg2);
+        // Rule at src/isa/x64/inst.isle line 3626.
+        return v10;
+    }
+    let v4 = C::xmm_to_reg(ctx, arg0);
+    let v5 = &C::gpr_mem_to_reg_mem(ctx, arg1);
+    let v7 = constructor_xmm_rm_r_imm(ctx, &SseOpcode::Pinsrd, v4, v5, arg2, &OperandSize::Size64);
+    // Rule at src/isa/x64/inst.isle line 3620.
+    return v7;
+}
+
+// Generated as internal constructor for term x64_roundss.
+pub fn constructor_x64_roundss<C: Context>(ctx: &mut C, arg0: &XmmMem, arg1: &RoundImm) -> Xmm {
+    let v6 = C::use_avx(ctx);
+    if v6 == true {
+        let v8 = C::encode_round_imm(ctx, arg1);
+        let v9 = constructor_xmm_unary_rm_r_imm_vex(ctx, &AvxOpcode::Vroundss, arg0, v8);
+        // Rule at src/isa/x64/inst.isle line 3634.
+        return v9;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
+    let v4 = C::encode_round_imm(ctx, arg1);
+    let v5 = constructor_xmm_unary_rm_r_imm(ctx, &SseOpcode::Roundss, v3, v4);
+    // Rule at src/isa/x64/inst.isle line 3632.
+    return v5;
+}
+
+// Generated as internal constructor for term x64_roundsd.
+pub fn constructor_x64_roundsd<C: Context>(ctx: &mut C, arg0: &XmmMem, arg1: &RoundImm) -> Xmm {
+    let v6 = C::use_avx(ctx);
+    if v6 == true {
+        let v8 = C::encode_round_imm(ctx, arg1);
+        let v9 = constructor_xmm_unary_rm_r_imm_vex(ctx, &AvxOpcode::Vroundsd, arg0, v8);
+        // Rule at src/isa/x64/inst.isle line 3642.
+        return v9;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
+    let v4 = C::encode_round_imm(ctx, arg1);
+    let v5 = constructor_xmm_unary_rm_r_imm(ctx, &SseOpcode::Roundsd, v3, v4);
+    // Rule at src/isa/x64/inst.isle line 3640.
+    return v5;
+}
+
+// Generated as internal constructor for term x64_roundps.
+pub fn constructor_x64_roundps<C: Context>(ctx: &mut C, arg0: &XmmMem, arg1: &RoundImm) -> Xmm {
+    let v6 = C::use_avx(ctx);
+    if v6 == true {
+        let v8 = C::encode_round_imm(ctx, arg1);
+        let v9 = constructor_xmm_unary_rm_r_imm_vex(ctx, &AvxOpcode::Vroundps, arg0, v8);
+        // Rule at src/isa/x64/inst.isle line 3650.
+        return v9;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
+    let v4 = C::encode_round_imm(ctx, arg1);
+    let v5 = constructor_xmm_unary_rm_r_imm(ctx, &SseOpcode::Roundps, v3, v4);
+    // Rule at src/isa/x64/inst.isle line 3648.
+    return v5;
+}
+
+// Generated as internal constructor for term x64_roundpd.
+pub fn constructor_x64_roundpd<C: Context>(ctx: &mut C, arg0: &XmmMem, arg1: &RoundImm) -> Xmm {
+    let v6 = C::use_avx(ctx);
+    if v6 == true {
+        let v8 = C::encode_round_imm(ctx, arg1);
+        let v9 = constructor_xmm_unary_rm_r_imm_vex(ctx, &AvxOpcode::Vroundpd, arg0, v8);
+        // Rule at src/isa/x64/inst.isle line 3658.
+        return v9;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
+    let v4 = C::encode_round_imm(ctx, arg1);
+    let v5 = constructor_xmm_unary_rm_r_imm(ctx, &SseOpcode::Roundpd, v3, v4);
+    // Rule at src/isa/x64/inst.isle line 3656.
+    return v5;
+}
+
+// Generated as internal constructor for term x64_pmaddwd.
+pub fn constructor_x64_pmaddwd<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmaddwd, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 3666.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmaddwd, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3664.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_pmaddubsw.
+pub fn constructor_x64_pmaddubsw<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmaddubsw, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 3673.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmaddubsw, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3671.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_insertps.
+pub fn constructor_x64_insertps<C: Context>(
+    ctx: &mut C,
+    arg0: Xmm,
+    arg1: &XmmMem,
+    arg2: u8,
+) -> Xmm {
+    let v8 = C::use_avx(ctx);
+    if v8 == true {
+        let v10 = constructor_xmm_rmr_imm_vex(ctx, &AvxOpcode::Vinsertps, arg0, arg1, arg2);
+        // Rule at src/isa/x64/inst.isle line 3685.
+        return v10;
+    }
+    let v4 = C::xmm_to_reg(ctx, arg0);
+    let v5 = &C::xmm_mem_to_reg_mem(ctx, arg1);
+    let v7 = constructor_xmm_rm_r_imm(
+        ctx,
+        &SseOpcode::Insertps,
+        v4,
+        v5,
+        arg2,
+        &OperandSize::Size32,
+    );
+    // Rule at src/isa/x64/inst.isle line 3679.
+    return v7;
+}
+
+// Generated as internal constructor for term x64_pshufd.
+pub fn constructor_x64_pshufd<C: Context>(ctx: &mut C, arg0: &XmmMem, arg1: u8) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = constructor_xmm_unary_rm_r_imm_vex(ctx, &AvxOpcode::Vpshufd, arg0, arg1);
+        // Rule at src/isa/x64/inst.isle line 3693.
+        return v7;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
+    let v4 = constructor_xmm_unary_rm_r_imm(ctx, &SseOpcode::Pshufd, v3, arg1);
+    // Rule at src/isa/x64/inst.isle line 3691.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_pshufb.
+pub fn constructor_x64_pshufb<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpshufb, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 3701.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pshufb, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3699.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_pshuflw.
+pub fn constructor_x64_pshuflw<C: Context>(ctx: &mut C, arg0: &XmmMem, arg1: u8) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = constructor_xmm_unary_rm_r_imm_vex(ctx, &AvxOpcode::Vpshuflw, arg0, arg1);
+        // Rule at src/isa/x64/inst.isle line 3709.
+        return v7;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
+    let v4 = constructor_xmm_unary_rm_r_imm(ctx, &SseOpcode::Pshuflw, v3, arg1);
+    // Rule at src/isa/x64/inst.isle line 3707.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_pshufhw.
+pub fn constructor_x64_pshufhw<C: Context>(ctx: &mut C, arg0: &XmmMem, arg1: u8) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = constructor_xmm_unary_rm_r_imm_vex(ctx, &AvxOpcode::Vpshufhw, arg0, arg1);
+        // Rule at src/isa/x64/inst.isle line 3717.
+        return v7;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
+    let v4 = constructor_xmm_unary_rm_r_imm(ctx, &SseOpcode::Pshufhw, v3, arg1);
+    // Rule at src/isa/x64/inst.isle line 3715.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_shufps.
+pub fn constructor_x64_shufps<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem, arg2: u8) -> Xmm {
+    let v8 = C::use_avx(ctx);
+    if v8 == true {
+        let v10 = constructor_xmm_rmr_imm_vex(ctx, &AvxOpcode::Vshufps, arg0, arg1, arg2);
+        // Rule at src/isa/x64/inst.isle line 3729.
+        return v10;
+    }
+    let v4 = C::xmm_to_reg(ctx, arg0);
+    let v5 = &C::xmm_mem_to_reg_mem(ctx, arg1);
+    let v7 = constructor_xmm_rm_r_imm(ctx, &SseOpcode::Shufps, v4, v5, arg2, &OperandSize::Size32);
+    // Rule at src/isa/x64/inst.isle line 3723.
+    return v7;
+}
+
+// Generated as internal constructor for term x64_pabsb.
+pub fn constructor_x64_pabsb<C: Context>(ctx: &mut C, arg0: &XmmMem) -> Xmm {
+    let v4 = C::use_avx(ctx);
+    if v4 == true {
+        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vpabsb, arg0);
+        // Rule at src/isa/x64/inst.isle line 3737.
+        return v6;
+    }
+    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
+    let v3 = constructor_xmm_unary_rm_r(ctx, &SseOpcode::Pabsb, v2);
+    // Rule at src/isa/x64/inst.isle line 3735.
+    return v3;
+}
+
+// Generated as internal constructor for term x64_pabsw.
+pub fn constructor_x64_pabsw<C: Context>(ctx: &mut C, arg0: &XmmMem) -> Xmm {
+    let v4 = C::use_avx(ctx);
+    if v4 == true {
+        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vpabsw, arg0);
+        // Rule at src/isa/x64/inst.isle line 3745.
+        return v6;
+    }
+    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
+    let v3 = constructor_xmm_unary_rm_r(ctx, &SseOpcode::Pabsw, v2);
+    // Rule at src/isa/x64/inst.isle line 3743.
+    return v3;
+}
+
+// Generated as internal constructor for term x64_pabsd.
+pub fn constructor_x64_pabsd<C: Context>(ctx: &mut C, arg0: &XmmMem) -> Xmm {
+    let v4 = C::use_avx(ctx);
+    if v4 == true {
+        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vpabsd, arg0);
+        // Rule at src/isa/x64/inst.isle line 3753.
+        return v6;
+    }
+    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
+    let v3 = constructor_xmm_unary_rm_r(ctx, &SseOpcode::Pabsd, v2);
+    // Rule at src/isa/x64/inst.isle line 3751.
+    return v3;
+}
+
+// Generated as internal constructor for term x64_vcvtudq2ps.
+pub fn constructor_x64_vcvtudq2ps<C: Context>(ctx: &mut C, arg0: &XmmMem) -> Xmm {
+    let v2 = constructor_xmm_unary_rm_r_evex(ctx, &Avx512Opcode::Vcvtudq2ps, arg0);
+    // Rule at src/isa/x64/inst.isle line 3759.
+    return v2;
+}
+
+// Generated as internal constructor for term x64_vpabsq.
+pub fn constructor_x64_vpabsq<C: Context>(ctx: &mut C, arg0: &XmmMem) -> Xmm {
+    let v2 = constructor_xmm_unary_rm_r_evex(ctx, &Avx512Opcode::Vpabsq, arg0);
+    // Rule at src/isa/x64/inst.isle line 3764.
+    return v2;
+}
+
+// Generated as internal constructor for term x64_vpopcntb.
+pub fn constructor_x64_vpopcntb<C: Context>(ctx: &mut C, arg0: &XmmMem) -> Xmm {
+    let v2 = constructor_xmm_unary_rm_r_evex(ctx, &Avx512Opcode::Vpopcntb, arg0);
+    // Rule at src/isa/x64/inst.isle line 3769.
+    return v2;
+}
+
+// Generated as internal constructor for term x64_vpmullq.
+pub fn constructor_x64_vpmullq<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v3 = constructor_xmm_rm_r_evex(ctx, &Avx512Opcode::Vpmullq, arg0, arg1);
+    // Rule at src/isa/x64/inst.isle line 3776.
+    return v3;
+}
+
+// Generated as internal constructor for term x64_vpermi2b.
+pub fn constructor_x64_vpermi2b<C: Context>(
+    ctx: &mut C,
+    arg0: Xmm,
+    arg1: Xmm,
+    arg2: &XmmMem,
+) -> Xmm {
+    let v3 = C::temp_writable_xmm(ctx);
+    let v5 = MInst::XmmRmREvex3 {
+        op: Avx512Opcode::Vpermi2b,
+        src1: arg0,
+        src2: arg1,
+        src3: arg2.clone(),
+        dst: v3,
+    };
+    let v6 = C::emit(ctx, &v5);
+    let v7 = C::writable_xmm_to_xmm(ctx, v3);
+    // Rule at src/isa/x64/inst.isle line 3785.
+    return v7;
+}
+
+// Generated as internal constructor for term mulhi_u.
+pub fn constructor_mulhi_u<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Gpr,
+    arg2: &GprMem,
+) -> ValueRegs {
+    let v4 = constructor_mul_hi(ctx, arg0, false, arg1, arg2);
+    // Rule at src/isa/x64/inst.isle line 3797.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_psllw.
+pub fn constructor_x64_psllw<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMemImm) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsllw, arg0, arg1);
+        // Rule at src/isa/x64/inst.isle line 3804.
+        return v7;
+    }
+    let v3 = &C::xmm_mem_imm_to_xmm_mem_aligned_imm(ctx, arg1);
+    let v4 = constructor_xmm_rmi_xmm(ctx, &SseOpcode::Psllw, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3802.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_pslld.
+pub fn constructor_x64_pslld<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMemImm) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpslld, arg0, arg1);
+        // Rule at src/isa/x64/inst.isle line 3812.
+        return v7;
+    }
+    let v3 = &C::xmm_mem_imm_to_xmm_mem_aligned_imm(ctx, arg1);
+    let v4 = constructor_xmm_rmi_xmm(ctx, &SseOpcode::Pslld, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3810.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_psllq.
+pub fn constructor_x64_psllq<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMemImm) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsllq, arg0, arg1);
+        // Rule at src/isa/x64/inst.isle line 3820.
+        return v7;
+    }
+    let v3 = &C::xmm_mem_imm_to_xmm_mem_aligned_imm(ctx, arg1);
+    let v4 = constructor_xmm_rmi_xmm(ctx, &SseOpcode::Psllq, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3818.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_psrlw.
+pub fn constructor_x64_psrlw<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMemImm) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsrlw, arg0, arg1);
+        // Rule at src/isa/x64/inst.isle line 3828.
+        return v7;
+    }
+    let v3 = &C::xmm_mem_imm_to_xmm_mem_aligned_imm(ctx, arg1);
+    let v4 = constructor_xmm_rmi_xmm(ctx, &SseOpcode::Psrlw, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3826.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_psrld.
+pub fn constructor_x64_psrld<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMemImm) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsrld, arg0, arg1);
+        // Rule at src/isa/x64/inst.isle line 3836.
+        return v7;
+    }
+    let v3 = &C::xmm_mem_imm_to_xmm_mem_aligned_imm(ctx, arg1);
+    let v4 = constructor_xmm_rmi_xmm(ctx, &SseOpcode::Psrld, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3834.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_psrlq.
+pub fn constructor_x64_psrlq<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMemImm) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsrlq, arg0, arg1);
+        // Rule at src/isa/x64/inst.isle line 3844.
+        return v7;
+    }
+    let v3 = &C::xmm_mem_imm_to_xmm_mem_aligned_imm(ctx, arg1);
+    let v4 = constructor_xmm_rmi_xmm(ctx, &SseOpcode::Psrlq, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3842.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_psraw.
+pub fn constructor_x64_psraw<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMemImm) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsraw, arg0, arg1);
+        // Rule at src/isa/x64/inst.isle line 3852.
+        return v7;
+    }
+    let v3 = &C::xmm_mem_imm_to_xmm_mem_aligned_imm(ctx, arg1);
+    let v4 = constructor_xmm_rmi_xmm(ctx, &SseOpcode::Psraw, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3850.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_psrad.
+pub fn constructor_x64_psrad<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMemImm) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsrad, arg0, arg1);
+        // Rule at src/isa/x64/inst.isle line 3860.
+        return v7;
+    }
+    let v3 = &C::xmm_mem_imm_to_xmm_mem_aligned_imm(ctx, arg1);
+    let v4 = constructor_xmm_rmi_xmm(ctx, &SseOpcode::Psrad, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 3858.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_vpsraq.
+pub fn constructor_x64_vpsraq<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v3 = constructor_xmm_rm_r_evex(ctx, &Avx512Opcode::Vpsraq, arg0, arg1);
+    // Rule at src/isa/x64/inst.isle line 3866.
+    return v3;
+}
+
+// Generated as internal constructor for term x64_vpsraq_imm.
+pub fn constructor_x64_vpsraq_imm<C: Context>(ctx: &mut C, arg0: &XmmMem, arg1: u8) -> Xmm {
+    let v3 = constructor_xmm_unary_rm_r_imm_evex(ctx, &Avx512Opcode::VpsraqImm, arg0, arg1);
+    // Rule at src/isa/x64/inst.isle line 3871.
+    return v3;
+}
+
+// Generated as internal constructor for term x64_pextrb.
+pub fn constructor_x64_pextrb<C: Context>(ctx: &mut C, arg0: Xmm, arg1: u8) -> Gpr {
+    let v4 = C::use_avx(ctx);
+    if v4 == true {
+        let v6 = constructor_xmm_to_gpr_imm_vex(ctx, &AvxOpcode::Vpextrb, arg0, arg1);
+        // Rule at src/isa/x64/inst.isle line 3878.
+        return v6;
+    }
+    let v3 = constructor_xmm_to_gpr_imm(ctx, &SseOpcode::Pextrb, arg0, arg1);
+    // Rule at src/isa/x64/inst.isle line 3876.
+    return v3;
+}
+
+// Generated as internal constructor for term x64_pextrb_store.
+pub fn constructor_x64_pextrb_store<C: Context>(
+    ctx: &mut C,
+    arg0: &SyntheticAmode,
+    arg1: Xmm,
+    arg2: u8,
+) -> SideEffectNoResult {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &constructor_xmm_movrm_imm_vex(ctx, &AvxOpcode::Vpextrb, arg0, arg1, arg2);
+        // Rule at src/isa/x64/inst.isle line 3885.
+        return v7.clone();
+    }
+    let v4 = &constructor_xmm_movrm_imm(ctx, &SseOpcode::Pextrb, arg0, arg1, arg2);
+    // Rule at src/isa/x64/inst.isle line 3883.
+    return v4.clone();
+}
+
+// Generated as internal constructor for term x64_pextrw.
+pub fn constructor_x64_pextrw<C: Context>(ctx: &mut C, arg0: Xmm, arg1: u8) -> Gpr {
+    let v4 = C::use_avx(ctx);
+    if v4 == true {
+        let v6 = constructor_xmm_to_gpr_imm_vex(ctx, &AvxOpcode::Vpextrw, arg0, arg1);
+        // Rule at src/isa/x64/inst.isle line 3893.
+        return v6;
+    }
+    let v3 = constructor_xmm_to_gpr_imm(ctx, &SseOpcode::Pextrw, arg0, arg1);
+    // Rule at src/isa/x64/inst.isle line 3891.
+    return v3;
+}
+
+// Generated as internal constructor for term x64_pextrw_store.
+pub fn constructor_x64_pextrw_store<C: Context>(
+    ctx: &mut C,
+    arg0: &SyntheticAmode,
+    arg1: Xmm,
+    arg2: u8,
+) -> SideEffectNoResult {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &constructor_xmm_movrm_imm_vex(ctx, &AvxOpcode::Vpextrw, arg0, arg1, arg2);
+        // Rule at src/isa/x64/inst.isle line 3900.
+        return v7.clone();
+    }
+    let v4 = &constructor_xmm_movrm_imm(ctx, &SseOpcode::Pextrw, arg0, arg1, arg2);
+    // Rule at src/isa/x64/inst.isle line 3898.
+    return v4.clone();
+}
+
+// Generated as internal constructor for term x64_pextrd.
+pub fn constructor_x64_pextrd<C: Context>(ctx: &mut C, arg0: Xmm, arg1: u8) -> Gpr {
+    let v4 = C::use_avx(ctx);
+    if v4 == true {
+        let v6 = constructor_xmm_to_gpr_imm_vex(ctx, &AvxOpcode::Vpextrd, arg0, arg1);
+        // Rule at src/isa/x64/inst.isle line 3908.
+        return v6;
+    }
+    let v3 = constructor_xmm_to_gpr_imm(ctx, &SseOpcode::Pextrd, arg0, arg1);
+    // Rule at src/isa/x64/inst.isle line 3906.
+    return v3;
+}
+
+// Generated as internal constructor for term x64_pextrd_store.
+pub fn constructor_x64_pextrd_store<C: Context>(
+    ctx: &mut C,
+    arg0: &SyntheticAmode,
+    arg1: Xmm,
+    arg2: u8,
+) -> SideEffectNoResult {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &constructor_xmm_movrm_imm_vex(ctx, &AvxOpcode::Vpextrd, arg0, arg1, arg2);
+        // Rule at src/isa/x64/inst.isle line 3915.
+        return v7.clone();
+    }
+    let v4 = &constructor_xmm_movrm_imm(ctx, &SseOpcode::Pextrd, arg0, arg1, arg2);
+    // Rule at src/isa/x64/inst.isle line 3913.
+    return v4.clone();
+}
+
+// Generated as internal constructor for term x64_pextrq.
+pub fn constructor_x64_pextrq<C: Context>(ctx: &mut C, arg0: Xmm, arg1: u8) -> Gpr {
+    let v4 = C::use_avx(ctx);
+    if v4 == true {
+        let v6 = constructor_xmm_to_gpr_imm_vex(ctx, &AvxOpcode::Vpextrq, arg0, arg1);
+        // Rule at src/isa/x64/inst.isle line 3923.
+        return v6;
+    }
+    let v3 = constructor_xmm_to_gpr_imm(ctx, &SseOpcode::Pextrq, arg0, arg1);
+    // Rule at src/isa/x64/inst.isle line 3921.
+    return v3;
+}
+
+// Generated as internal constructor for term x64_pextrq_store.
+pub fn constructor_x64_pextrq_store<C: Context>(
+    ctx: &mut C,
+    arg0: &SyntheticAmode,
+    arg1: Xmm,
+    arg2: u8,
+) -> SideEffectNoResult {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &constructor_xmm_movrm_imm_vex(ctx, &AvxOpcode::Vpextrq, arg0, arg1, arg2);
+        // Rule at src/isa/x64/inst.isle line 3930.
+        return v7.clone();
+    }
+    let v4 = &constructor_xmm_movrm_imm(ctx, &SseOpcode::Pextrq, arg0, arg1, arg2);
+    // Rule at src/isa/x64/inst.isle line 3928.
+    return v4.clone();
+}
+
+// Generated as internal constructor for term x64_pmovmskb.
+pub fn constructor_x64_pmovmskb<C: Context>(ctx: &mut C, arg0: &OperandSize, arg1: Xmm) -> Gpr {
+    let v4 = C::use_avx(ctx);
+    if v4 == true {
+        let v6 = constructor_xmm_to_gpr_vex(ctx, &AvxOpcode::Vpmovmskb, arg1, arg0);
+        // Rule at src/isa/x64/inst.isle line 3938.
+        return v6;
+    }
+    let v3 = constructor_xmm_to_gpr(ctx, &SseOpcode::Pmovmskb, arg1, arg0);
+    // Rule at src/isa/x64/inst.isle line 3936.
+    return v3;
+}
+
+// Generated as internal constructor for term x64_movmskps.
+pub fn constructor_x64_movmskps<C: Context>(ctx: &mut C, arg0: &OperandSize, arg1: Xmm) -> Gpr {
+    let v4 = C::use_avx(ctx);
+    if v4 == true {
+        let v6 = constructor_xmm_to_gpr_vex(ctx, &AvxOpcode::Vmovmskps, arg1, arg0);
+        // Rule at src/isa/x64/inst.isle line 3946.
+        return v6;
+    }
+    let v3 = constructor_xmm_to_gpr(ctx, &SseOpcode::Movmskps, arg1, arg0);
+    // Rule at src/isa/x64/inst.isle line 3944.
+    return v3;
+}
+
+// Generated as internal constructor for term x64_movmskpd.
+pub fn constructor_x64_movmskpd<C: Context>(ctx: &mut C, arg0: &OperandSize, arg1: Xmm) -> Gpr {
+    let v4 = C::use_avx(ctx);
+    if v4 == true {
+        let v6 = constructor_xmm_to_gpr_vex(ctx, &AvxOpcode::Vmovmskpd, arg1, arg0);
+        // Rule at src/isa/x64/inst.isle line 3954.
+        return v6;
+    }
+    let v3 = constructor_xmm_to_gpr(ctx, &SseOpcode::Movmskpd, arg1, arg0);
+    // Rule at src/isa/x64/inst.isle line 3952.
+    return v3;
+}
+
+// Generated as internal constructor for term x64_not.
+pub fn constructor_x64_not<C: Context>(ctx: &mut C, arg0: Type, arg1: Gpr) -> Gpr {
+    let v2 = C::temp_writable_gpr(ctx);
+    let v3 = &C::operand_size_of_type_32_64(ctx, arg0);
+    let v4 = MInst::Not {
+        size: v3.clone(),
+        src: arg1,
+        dst: v2,
+    };
+    let v5 = C::emit(ctx, &v4);
+    let v6 = C::writable_gpr_to_gpr(ctx, v2);
+    // Rule at src/isa/x64/inst.isle line 3960.
+    return v6;
+}
+
+// Generated as internal constructor for term x64_neg.
+pub fn constructor_x64_neg<C: Context>(ctx: &mut C, arg0: Type, arg1: Gpr) -> Gpr {
+    let v2 = C::temp_writable_gpr(ctx);
+    let v3 = &C::raw_operand_size_of_type(ctx, arg0);
+    let v4 = MInst::Neg {
+        size: v3.clone(),
+        src: arg1,
+        dst: v2,
+    };
+    let v5 = C::emit(ctx, &v4);
+    let v6 = C::writable_gpr_to_gpr(ctx, v2);
+    // Rule at src/isa/x64/inst.isle line 3968.
+    return v6;
+}
+
+// Generated as internal constructor for term x64_neg_paired.
+pub fn constructor_x64_neg_paired<C: Context>(ctx: &mut C, arg0: Type, arg1: Gpr) -> ProducesFlags {
+    let v2 = C::temp_writable_gpr(ctx);
+    let v3 = &C::raw_operand_size_of_type(ctx, arg0);
+    let v5 = constructor_writable_gpr_to_r_reg(ctx, v2);
+    let v4 = MInst::Neg {
+        size: v3.clone(),
+        src: arg1,
+        dst: v2,
+    };
+    let v6 = ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
+        inst: v4,
+        result: v5,
+    };
+    // Rule at src/isa/x64/inst.isle line 3976.
+    return v6;
+}
+
+// Generated as internal constructor for term x64_lea.
+pub fn constructor_x64_lea<C: Context>(ctx: &mut C, arg0: Type, arg1: &SyntheticAmode) -> Gpr {
+    let v2 = C::temp_writable_gpr(ctx);
+    let v3 = &C::operand_size_of_type_32_64(ctx, arg0);
+    let v4 = MInst::LoadEffectiveAddress {
+        addr: arg1.clone(),
+        dst: v2,
+        size: v3.clone(),
+    };
+    let v5 = C::emit(ctx, &v4);
+    let v6 = C::writable_gpr_to_gpr(ctx, v2);
+    // Rule at src/isa/x64/inst.isle line 3983.
+    return v6;
+}
+
+// Generated as internal constructor for term x64_ud2.
+pub fn constructor_x64_ud2<C: Context>(ctx: &mut C, arg0: &TrapCode) -> SideEffectNoResult {
+    let v1 = MInst::Ud2 {
+        trap_code: arg0.clone(),
+    };
+    let v2 = SideEffectNoResult::Inst { inst: v1 };
+    // Rule at src/isa/x64/inst.isle line 3990.
+    return v2;
+}
+
+// Generated as internal constructor for term x64_hlt.
+pub fn constructor_x64_hlt<C: Context>(ctx: &mut C) -> SideEffectNoResult {
+    let v1 = SideEffectNoResult::Inst { inst: MInst::Hlt };
+    // Rule at src/isa/x64/inst.isle line 3995.
+    return v1;
+}
+
+// Generated as internal constructor for term x64_lzcnt.
+pub fn constructor_x64_lzcnt<C: Context>(ctx: &mut C, arg0: Type, arg1: Gpr) -> Gpr {
+    let v3 = &C::operand_size_of_type_32_64(ctx, arg0);
+    let v4 = constructor_unary_rm_r(ctx, &UnaryRmROpcode::Lzcnt, arg1, v3);
+    // Rule at src/isa/x64/inst.isle line 4000.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_tzcnt.
+pub fn constructor_x64_tzcnt<C: Context>(ctx: &mut C, arg0: Type, arg1: Gpr) -> Gpr {
+    let v3 = &C::operand_size_of_type_32_64(ctx, arg0);
+    let v4 = constructor_unary_rm_r(ctx, &UnaryRmROpcode::Tzcnt, arg1, v3);
+    // Rule at src/isa/x64/inst.isle line 4005.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_bsr.
+pub fn constructor_x64_bsr<C: Context>(ctx: &mut C, arg0: Type, arg1: Gpr) -> ProducesFlags {
+    let v2 = C::temp_writable_gpr(ctx);
+    let v3 = &C::operand_size_of_type_32_64(ctx, arg0);
+    let v5 = &C::gpr_to_gpr_mem(ctx, arg1);
+    let v7 = constructor_writable_gpr_to_r_reg(ctx, v2);
+    let v6 = MInst::UnaryRmR {
+        size: v3.clone(),
+        op: UnaryRmROpcode::Bsr,
+        src: v5.clone(),
+        dst: v2,
+    };
+    let v8 = ProducesFlags::ProducesFlagsReturnsReg {
+        inst: v6,
+        result: v7,
+    };
+    // Rule at src/isa/x64/inst.isle line 4010.
+    return v8;
+}
+
+// Generated as internal constructor for term bsr_or_else.
+pub fn constructor_bsr_or_else<C: Context>(ctx: &mut C, arg0: Type, arg1: Gpr, arg2: Gpr) -> Gpr {
+    let v3 = &constructor_x64_bsr(ctx, arg0, arg1);
+    let v4 = constructor_produces_flags_get_reg(ctx, v3);
+    let v5 = C::gpr_new(ctx, v4);
+    let v7 = &C::gpr_to_gpr_mem(ctx, arg2);
+    let v8 = &constructor_cmove(ctx, arg0, &CC::Z, v7, v5);
+    let v9 = &constructor_produces_flags_ignore(ctx, v3);
+    let v10 = constructor_with_flags_reg(ctx, v9, v8);
+    let v11 = C::gpr_new(ctx, v10);
+    // Rule at src/isa/x64/inst.isle line 4019.
+    return v11;
+}
+
+// Generated as internal constructor for term x64_bsf.
+pub fn constructor_x64_bsf<C: Context>(ctx: &mut C, arg0: Type, arg1: Gpr) -> ProducesFlags {
+    let v2 = C::temp_writable_gpr(ctx);
+    let v3 = &C::operand_size_of_type_32_64(ctx, arg0);
+    let v5 = &C::gpr_to_gpr_mem(ctx, arg1);
+    let v7 = constructor_writable_gpr_to_r_reg(ctx, v2);
+    let v6 = MInst::UnaryRmR {
+        size: v3.clone(),
+        op: UnaryRmROpcode::Bsf,
+        src: v5.clone(),
+        dst: v2,
+    };
+    let v8 = ProducesFlags::ProducesFlagsReturnsReg {
+        inst: v6,
+        result: v7,
+    };
+    // Rule at src/isa/x64/inst.isle line 4030.
+    return v8;
+}
+
+// Generated as internal constructor for term bsf_or_else.
+pub fn constructor_bsf_or_else<C: Context>(ctx: &mut C, arg0: Type, arg1: Gpr, arg2: Gpr) -> Gpr {
+    let v3 = &constructor_x64_bsf(ctx, arg0, arg1);
+    let v4 = constructor_produces_flags_get_reg(ctx, v3);
+    let v5 = C::gpr_new(ctx, v4);
+    let v7 = &C::gpr_to_gpr_mem(ctx, arg2);
+    let v8 = &constructor_cmove(ctx, arg0, &CC::Z, v7, v5);
+    let v9 = &constructor_produces_flags_ignore(ctx, v3);
+    let v10 = constructor_with_flags_reg(ctx, v9, v8);
+    let v11 = C::gpr_new(ctx, v10);
+    // Rule at src/isa/x64/inst.isle line 4039.
+    return v11;
+}
+
+// Generated as internal constructor for term x64_blsi.
+pub fn constructor_x64_blsi<C: Context>(ctx: &mut C, arg0: Type, arg1: &GprMem) -> Gpr {
+    let v3 = &C::operand_size_of_type_32_64(ctx, arg0);
+    let v4 = constructor_unary_rm_r_vex(ctx, &UnaryRmRVexOpcode::Blsi, arg1, v3);
+    // Rule at src/isa/x64/inst.isle line 4050.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_blsmsk.
+pub fn constructor_x64_blsmsk<C: Context>(ctx: &mut C, arg0: Type, arg1: &GprMem) -> Gpr {
+    let v3 = &C::operand_size_of_type_32_64(ctx, arg0);
+    let v4 = constructor_unary_rm_r_vex(ctx, &UnaryRmRVexOpcode::Blsmsk, arg1, v3);
+    // Rule at src/isa/x64/inst.isle line 4055.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_blsr.
+pub fn constructor_x64_blsr<C: Context>(ctx: &mut C, arg0: Type, arg1: &GprMem) -> Gpr {
+    let v3 = &C::operand_size_of_type_32_64(ctx, arg0);
+    let v4 = constructor_unary_rm_r_vex(ctx, &UnaryRmRVexOpcode::Blsr, arg1, v3);
+    // Rule at src/isa/x64/inst.isle line 4060.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_popcnt.
+pub fn constructor_x64_popcnt<C: Context>(ctx: &mut C, arg0: Type, arg1: Gpr) -> Gpr {
+    let v3 = &C::operand_size_of_type_32_64(ctx, arg0);
+    let v4 = constructor_unary_rm_r(ctx, &UnaryRmROpcode::Popcnt, arg1, v3);
+    // Rule at src/isa/x64/inst.isle line 4065.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_minss.
+pub fn constructor_x64_minss<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v4 = C::use_avx(ctx);
+    if v4 == true {
+        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vminss, arg0, v6);
+        // Rule at src/isa/x64/inst.isle line 4072.
+        return v7;
+    }
+    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Minss, arg0, arg1);
+    // Rule at src/isa/x64/inst.isle line 4070.
+    return v3;
+}
+
+// Generated as internal constructor for term x64_minsd.
+pub fn constructor_x64_minsd<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v4 = C::use_avx(ctx);
+    if v4 == true {
+        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vminsd, arg0, v6);
+        // Rule at src/isa/x64/inst.isle line 4080.
+        return v7;
+    }
+    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Minsd, arg0, arg1);
+    // Rule at src/isa/x64/inst.isle line 4078.
+    return v3;
+}
+
+// Generated as internal constructor for term x64_minps.
+pub fn constructor_x64_minps<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vminps, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 4088.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Minps, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 4086.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_minpd.
+pub fn constructor_x64_minpd<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vminpd, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 4096.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Minpd, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 4094.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_maxss.
+pub fn constructor_x64_maxss<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v4 = C::use_avx(ctx);
+    if v4 == true {
+        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vmaxss, arg0, v6);
+        // Rule at src/isa/x64/inst.isle line 4104.
+        return v7;
+    }
+    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Maxss, arg0, arg1);
+    // Rule at src/isa/x64/inst.isle line 4102.
+    return v3;
+}
+
+// Generated as internal constructor for term x64_maxsd.
+pub fn constructor_x64_maxsd<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v4 = C::use_avx(ctx);
+    if v4 == true {
+        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vmaxsd, arg0, v6);
+        // Rule at src/isa/x64/inst.isle line 4112.
+        return v7;
+    }
+    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Maxsd, arg0, arg1);
+    // Rule at src/isa/x64/inst.isle line 4110.
+    return v3;
+}
+
+// Generated as internal constructor for term x64_maxps.
+pub fn constructor_x64_maxps<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vmaxps, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 4120.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Maxps, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 4118.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_maxpd.
+pub fn constructor_x64_maxpd<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vmaxpd, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 4128.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Maxpd, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 4126.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_vfmadd213.
+pub fn constructor_x64_vfmadd213<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Xmm,
+    arg2: Xmm,
+    arg3: &XmmMem,
+) -> Xmm {
+    match arg0 {
+        F32 => {
+            let v5 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfmadd213ss, arg1, arg2, arg3);
+            // Rule at src/isa/x64/inst.isle line 4134.
+            return v5;
+        }
+        F64 => {
+            let v7 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfmadd213sd, arg1, arg2, arg3);
+            // Rule at src/isa/x64/inst.isle line 4135.
+            return v7;
+        }
+        F32X4 => {
+            let v9 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfmadd213ps, arg1, arg2, arg3);
+            // Rule at src/isa/x64/inst.isle line 4136.
+            return v9;
+        }
+        F64X2 => {
+            let v11 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfmadd213pd, arg1, arg2, arg3);
+            // Rule at src/isa/x64/inst.isle line 4137.
+            return v11;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "x64_vfmadd213", "src/isa/x64/inst.isle line 4133"
+    )
+}
+
+// Generated as internal constructor for term x64_vfmadd132.
+pub fn constructor_x64_vfmadd132<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Xmm,
+    arg2: Xmm,
+    arg3: &XmmMem,
+) -> Xmm {
+    match arg0 {
+        F32 => {
+            let v5 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfmadd132ss, arg1, arg2, arg3);
+            // Rule at src/isa/x64/inst.isle line 4141.
+            return v5;
+        }
+        F64 => {
+            let v7 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfmadd132sd, arg1, arg2, arg3);
+            // Rule at src/isa/x64/inst.isle line 4142.
+            return v7;
+        }
+        F32X4 => {
+            let v9 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfmadd132ps, arg1, arg2, arg3);
+            // Rule at src/isa/x64/inst.isle line 4143.
+            return v9;
+        }
+        F64X2 => {
+            let v11 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfmadd132pd, arg1, arg2, arg3);
+            // Rule at src/isa/x64/inst.isle line 4144.
+            return v11;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "x64_vfmadd132", "src/isa/x64/inst.isle line 4140"
+    )
+}
+
+// Generated as internal constructor for term x64_vfnmadd213.
+pub fn constructor_x64_vfnmadd213<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Xmm,
+    arg2: Xmm,
+    arg3: &XmmMem,
+) -> Xmm {
+    match arg0 {
+        F32 => {
+            let v5 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfnmadd213ss, arg1, arg2, arg3);
+            // Rule at src/isa/x64/inst.isle line 4148.
+            return v5;
+        }
+        F64 => {
+            let v7 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfnmadd213sd, arg1, arg2, arg3);
+            // Rule at src/isa/x64/inst.isle line 4149.
+            return v7;
+        }
+        F32X4 => {
+            let v9 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfnmadd213ps, arg1, arg2, arg3);
+            // Rule at src/isa/x64/inst.isle line 4150.
+            return v9;
+        }
+        F64X2 => {
+            let v11 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfnmadd213pd, arg1, arg2, arg3);
+            // Rule at src/isa/x64/inst.isle line 4151.
+            return v11;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "x64_vfnmadd213", "src/isa/x64/inst.isle line 4147"
+    )
+}
+
+// Generated as internal constructor for term x64_vfnmadd132.
+pub fn constructor_x64_vfnmadd132<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Xmm,
+    arg2: Xmm,
+    arg3: &XmmMem,
+) -> Xmm {
+    match arg0 {
+        F32 => {
+            let v5 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfnmadd132ss, arg1, arg2, arg3);
+            // Rule at src/isa/x64/inst.isle line 4155.
+            return v5;
+        }
+        F64 => {
+            let v7 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfnmadd132sd, arg1, arg2, arg3);
+            // Rule at src/isa/x64/inst.isle line 4156.
+            return v7;
+        }
+        F32X4 => {
+            let v9 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfnmadd132ps, arg1, arg2, arg3);
+            // Rule at src/isa/x64/inst.isle line 4157.
+            return v9;
+        }
+        F64X2 => {
+            let v11 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfnmadd132pd, arg1, arg2, arg3);
+            // Rule at src/isa/x64/inst.isle line 4158.
+            return v11;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "x64_vfnmadd132", "src/isa/x64/inst.isle line 4154"
+    )
+}
+
+// Generated as internal constructor for term x64_sqrtss.
+pub fn constructor_x64_sqrtss<C: Context>(ctx: &mut C, arg0: &XmmMem) -> Xmm {
+    let v3 = C::use_avx(ctx);
+    if v3 == true {
+        let v5 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vsqrtss, arg0);
+        // Rule at src/isa/x64/inst.isle line 4163.
+        return v5;
+    }
+    let v2 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Sqrtss, arg0);
+    // Rule at src/isa/x64/inst.isle line 4162.
+    return v2;
+}
+
+// Generated as internal constructor for term x64_sqrtsd.
+pub fn constructor_x64_sqrtsd<C: Context>(ctx: &mut C, arg0: &XmmMem) -> Xmm {
+    let v3 = C::use_avx(ctx);
+    if v3 == true {
+        let v5 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vsqrtsd, arg0);
+        // Rule at src/isa/x64/inst.isle line 4170.
+        return v5;
+    }
+    let v2 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Sqrtsd, arg0);
+    // Rule at src/isa/x64/inst.isle line 4169.
+    return v2;
+}
+
+// Generated as internal constructor for term x64_sqrtps.
+pub fn constructor_x64_sqrtps<C: Context>(ctx: &mut C, arg0: &XmmMem) -> Xmm {
+    let v4 = C::use_avx(ctx);
+    if v4 == true {
+        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vsqrtps, arg0);
+        // Rule at src/isa/x64/inst.isle line 4177.
+        return v6;
+    }
+    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
+    let v3 = constructor_xmm_unary_rm_r(ctx, &SseOpcode::Sqrtps, v2);
+    // Rule at src/isa/x64/inst.isle line 4176.
+    return v3;
+}
+
+// Generated as internal constructor for term x64_sqrtpd.
+pub fn constructor_x64_sqrtpd<C: Context>(ctx: &mut C, arg0: &XmmMem) -> Xmm {
+    let v4 = C::use_avx(ctx);
+    if v4 == true {
+        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vsqrtpd, arg0);
+        // Rule at src/isa/x64/inst.isle line 4184.
+        return v6;
+    }
+    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
+    let v3 = constructor_xmm_unary_rm_r(ctx, &SseOpcode::Sqrtpd, v2);
+    // Rule at src/isa/x64/inst.isle line 4183.
+    return v3;
+}
+
+// Generated as internal constructor for term x64_cvtss2sd.
+pub fn constructor_x64_cvtss2sd<C: Context>(ctx: &mut C, arg0: &XmmMem) -> Xmm {
+    let v3 = C::use_avx(ctx);
+    if v3 == true {
+        let v5 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vcvtss2sd, arg0);
+        // Rule at src/isa/x64/inst.isle line 4191.
+        return v5;
+    }
+    let v2 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Cvtss2sd, arg0);
+    // Rule at src/isa/x64/inst.isle line 4190.
+    return v2;
+}
+
+// Generated as internal constructor for term x64_cvtsd2ss.
+pub fn constructor_x64_cvtsd2ss<C: Context>(ctx: &mut C, arg0: &XmmMem) -> Xmm {
+    let v3 = C::use_avx(ctx);
+    if v3 == true {
+        let v5 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vcvtsd2ss, arg0);
+        // Rule at src/isa/x64/inst.isle line 4198.
+        return v5;
+    }
+    let v2 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Cvtsd2ss, arg0);
+    // Rule at src/isa/x64/inst.isle line 4197.
+    return v2;
+}
+
+// Generated as internal constructor for term x64_cvtdq2ps.
+pub fn constructor_x64_cvtdq2ps<C: Context>(ctx: &mut C, arg0: &XmmMem) -> Xmm {
+    let v4 = C::use_avx(ctx);
+    if v4 == true {
+        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vcvtdq2ps, arg0);
+        // Rule at src/isa/x64/inst.isle line 4205.
+        return v6;
+    }
+    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
+    let v3 = constructor_xmm_unary_rm_r(ctx, &SseOpcode::Cvtdq2ps, v2);
+    // Rule at src/isa/x64/inst.isle line 4204.
+    return v3;
+}
+
+// Generated as internal constructor for term x64_cvtps2pd.
+pub fn constructor_x64_cvtps2pd<C: Context>(ctx: &mut C, arg0: &XmmMem) -> Xmm {
+    let v4 = C::use_avx(ctx);
+    if v4 == true {
+        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vcvtps2pd, arg0);
+        // Rule at src/isa/x64/inst.isle line 4212.
+        return v6;
+    }
+    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
+    let v3 = constructor_xmm_unary_rm_r(ctx, &SseOpcode::Cvtps2pd, v2);
+    // Rule at src/isa/x64/inst.isle line 4211.
+    return v3;
+}
+
+// Generated as internal constructor for term x64_cvtpd2ps.
+pub fn constructor_x64_cvtpd2ps<C: Context>(ctx: &mut C, arg0: &XmmMem) -> Xmm {
+    let v4 = C::use_avx(ctx);
+    if v4 == true {
+        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vcvtpd2ps, arg0);
+        // Rule at src/isa/x64/inst.isle line 4219.
+        return v6;
+    }
+    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
+    let v3 = constructor_xmm_unary_rm_r(ctx, &SseOpcode::Cvtpd2ps, v2);
+    // Rule at src/isa/x64/inst.isle line 4218.
+    return v3;
+}
+
+// Generated as internal constructor for term x64_cvtdq2pd.
+pub fn constructor_x64_cvtdq2pd<C: Context>(ctx: &mut C, arg0: &XmmMem) -> Xmm {
+    let v4 = C::use_avx(ctx);
+    if v4 == true {
+        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vcvtdq2pd, arg0);
+        // Rule at src/isa/x64/inst.isle line 4226.
+        return v6;
+    }
+    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
+    let v3 = constructor_xmm_unary_rm_r(ctx, &SseOpcode::Cvtdq2pd, v2);
+    // Rule at src/isa/x64/inst.isle line 4225.
+    return v3;
+}
+
+// Generated as internal constructor for term x64_cvtsi2ss.
+pub fn constructor_x64_cvtsi2ss<C: Context>(ctx: &mut C, arg0: Type, arg1: &GprMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v3 = &C::raw_operand_size_of_type(ctx, arg0);
+        let v7 = constructor_gpr_to_xmm_vex(ctx, &AvxOpcode::Vcvtsi2ss, arg1, v3);
+        // Rule at src/isa/x64/inst.isle line 4234.
+        return v7;
+    }
+    let v3 = &C::raw_operand_size_of_type(ctx, arg0);
+    let v4 = constructor_gpr_to_xmm(ctx, &SseOpcode::Cvtsi2ss, arg1, v3);
+    // Rule at src/isa/x64/inst.isle line 4232.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_cvtsi2sd.
+pub fn constructor_x64_cvtsi2sd<C: Context>(ctx: &mut C, arg0: Type, arg1: &GprMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v3 = &C::raw_operand_size_of_type(ctx, arg0);
+        let v7 = constructor_gpr_to_xmm_vex(ctx, &AvxOpcode::Vcvtsi2sd, arg1, v3);
+        // Rule at src/isa/x64/inst.isle line 4242.
+        return v7;
+    }
+    let v3 = &C::raw_operand_size_of_type(ctx, arg0);
+    let v4 = constructor_gpr_to_xmm(ctx, &SseOpcode::Cvtsi2sd, arg1, v3);
+    // Rule at src/isa/x64/inst.isle line 4240.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_cvttps2dq.
+pub fn constructor_x64_cvttps2dq<C: Context>(ctx: &mut C, arg0: &XmmMem) -> Xmm {
+    let v4 = C::use_avx(ctx);
+    if v4 == true {
+        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vcvttps2dq, arg0);
+        // Rule at src/isa/x64/inst.isle line 4250.
+        return v6;
+    }
+    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
+    let v3 = constructor_xmm_unary_rm_r(ctx, &SseOpcode::Cvttps2dq, v2);
+    // Rule at src/isa/x64/inst.isle line 4248.
+    return v3;
+}
+
+// Generated as internal constructor for term x64_cvttpd2dq.
+pub fn constructor_x64_cvttpd2dq<C: Context>(ctx: &mut C, arg0: &XmmMem) -> Xmm {
+    let v4 = C::use_avx(ctx);
+    if v4 == true {
+        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vcvttpd2dq, arg0);
+        // Rule at src/isa/x64/inst.isle line 4258.
+        return v6;
+    }
+    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
+    let v3 = constructor_xmm_unary_rm_r(ctx, &SseOpcode::Cvttpd2dq, v2);
+    // Rule at src/isa/x64/inst.isle line 4256.
+    return v3;
+}
+
+// Generated as internal constructor for term x64_pcmpeq.
+pub fn constructor_x64_pcmpeq<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Xmm,
+    arg2: &XmmMem,
+) -> Xmm {
+    match arg0 {
+        I8X16 => {
+            let v3 = constructor_x64_pcmpeqb(ctx, arg1, arg2);
+            // Rule at src/isa/x64/inst.isle line 4264.
+            return v3;
+        }
+        I16X8 => {
+            let v4 = constructor_x64_pcmpeqw(ctx, arg1, arg2);
+            // Rule at src/isa/x64/inst.isle line 4265.
+            return v4;
+        }
+        I32X4 => {
+            let v5 = constructor_x64_pcmpeqd(ctx, arg1, arg2);
+            // Rule at src/isa/x64/inst.isle line 4266.
+            return v5;
+        }
+        I64X2 => {
+            let v6 = C::use_sse41(ctx);
+            if v6 == true {
+                let v7 = constructor_x64_pcmpeqq(ctx, arg1, arg2);
+                // Rule at src/isa/x64/inst.isle line 4267.
+                return v7;
+            }
+            let v5 = constructor_x64_pcmpeqd(ctx, arg1, arg2);
+            let v8 = &C::xmm_to_xmm_mem(ctx, v5);
+            let v10 = constructor_x64_pshufd(ctx, v8, 0xB1);
+            let v11 = &C::xmm_to_xmm_mem(ctx, v10);
+            let v12 = constructor_x64_pand(ctx, v5, v11);
+            // Rule at src/isa/x64/inst.isle line 4276.
+            return v12;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "x64_pcmpeq", "src/isa/x64/inst.isle line 4263"
+    )
+}
+
+// Generated as internal constructor for term x64_pcmpeqb.
+pub fn constructor_x64_pcmpeqb<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpcmpeqb, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 4283.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pcmpeqb, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 4282.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_pcmpeqw.
+pub fn constructor_x64_pcmpeqw<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpcmpeqw, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 4288.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pcmpeqw, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 4287.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_pcmpeqd.
+pub fn constructor_x64_pcmpeqd<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpcmpeqd, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 4293.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pcmpeqd, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 4292.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_pcmpeqq.
+pub fn constructor_x64_pcmpeqq<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpcmpeqq, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 4298.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pcmpeqq, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 4297.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_pcmpgt.
+pub fn constructor_x64_pcmpgt<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Xmm,
+    arg2: &XmmMem,
+) -> Xmm {
+    match arg0 {
+        I8X16 => {
+            let v3 = constructor_x64_pcmpgtb(ctx, arg1, arg2);
+            // Rule at src/isa/x64/inst.isle line 4304.
+            return v3;
+        }
+        I16X8 => {
+            let v4 = constructor_x64_pcmpgtw(ctx, arg1, arg2);
+            // Rule at src/isa/x64/inst.isle line 4305.
+            return v4;
+        }
+        I32X4 => {
+            let v5 = constructor_x64_pcmpgtd(ctx, arg1, arg2);
+            // Rule at src/isa/x64/inst.isle line 4306.
+            return v5;
+        }
+        I64X2 => {
+            let v6 = C::use_sse42(ctx);
+            if v6 == true {
+                let v7 = constructor_x64_pcmpgtq(ctx, arg1, arg2);
+                // Rule at src/isa/x64/inst.isle line 4310.
+                return v7;
+            }
+            let v9 = C::emit_u128_le_const(ctx, 0x800000000000000080000000);
+            let v10 = &constructor_const_to_xmm_mem(ctx, v9);
+            let v11 = constructor_x64_movdqu_load(ctx, v10);
+            let v12 = &C::xmm_to_xmm_mem(ctx, arg1);
+            let v13 = constructor_x64_pxor(ctx, v11, v12);
+            let v14 = constructor_x64_pxor(ctx, v11, arg2);
+            let v15 = &C::xmm_to_xmm_mem(ctx, v14);
+            let v16 = constructor_x64_pcmpgtd(ctx, v13, v15);
+            let v17 = &C::xmm_to_xmm_mem(ctx, v16);
+            let v19 = constructor_x64_pshufd(ctx, v17, 0xA0);
+            let v20 = &C::xmm_to_xmm_mem(ctx, v16);
+            let v22 = constructor_x64_pshufd(ctx, v20, 0xF5);
+            let v23 = &C::xmm_to_xmm_mem(ctx, v14);
+            let v24 = constructor_x64_pcmpeqd(ctx, v13, v23);
+            let v25 = &C::xmm_to_xmm_mem(ctx, v24);
+            let v26 = constructor_x64_pshufd(ctx, v25, 0xF5);
+            let v27 = &C::xmm_to_xmm_mem(ctx, v26);
+            let v28 = constructor_x64_pand(ctx, v19, v27);
+            let v29 = &C::xmm_to_xmm_mem(ctx, v22);
+            let v30 = constructor_x64_por(ctx, v28, v29);
+            // Rule at src/isa/x64/inst.isle line 4339.
+            return v30;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "x64_pcmpgt", "src/isa/x64/inst.isle line 4303"
+    )
+}
+
+// Generated as internal constructor for term x64_pcmpgtb.
+pub fn constructor_x64_pcmpgtb<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpcmpgtb, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 4355.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pcmpgtb, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 4354.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_pcmpgtw.
+pub fn constructor_x64_pcmpgtw<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpcmpgtw, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 4360.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pcmpgtw, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 4359.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_pcmpgtd.
+pub fn constructor_x64_pcmpgtd<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpcmpgtd, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 4365.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pcmpgtd, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 4364.
+    return v4;
+}
+
+// Generated as internal constructor for term x64_pcmpgtq.
+pub fn constructor_x64_pcmpgtq<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
+    let v5 = C::use_avx(ctx);
+    if v5 == true {
+        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
+        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpcmpgtq, arg0, v7);
+        // Rule at src/isa/x64/inst.isle line 4370.
+        return v8;
+    }
+    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
+    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pcmpgtq, arg0, v3);
+    // Rule at src/isa/x64/inst.isle line 4369.
+    return v4;
+}
+
+// Generated as internal constructor for term alu_rm.
+pub fn constructor_alu_rm<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &AluRmiROpcode,
+    arg2: &Amode,
+    arg3: Gpr,
+) -> SideEffectNoResult {
+    let v4 = &C::operand_size_of_type_32_64(ctx, arg0);
+    let v5 = &C::amode_to_synthetic_amode(ctx, arg2);
+    let v6 = MInst::AluRM {
+        size: v4.clone(),
+        op: arg1.clone(),
+        src1_dst: v5.clone(),
+        src2: arg3,
+    };
+    let v7 = SideEffectNoResult::Inst { inst: v6 };
+    // Rule at src/isa/x64/inst.isle line 4376.
+    return v7;
+}
+
+// Generated as internal constructor for term x64_add_mem.
+pub fn constructor_x64_add_mem<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &Amode,
+    arg2: Gpr,
+) -> SideEffectNoResult {
+    let v4 = &constructor_alu_rm(ctx, arg0, &AluRmiROpcode::Add, arg1, arg2);
+    // Rule at src/isa/x64/inst.isle line 4381.
+    return v4.clone();
+}
+
+// Generated as internal constructor for term x64_sub_mem.
+pub fn constructor_x64_sub_mem<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &Amode,
+    arg2: Gpr,
+) -> SideEffectNoResult {
+    let v4 = &constructor_alu_rm(ctx, arg0, &AluRmiROpcode::Sub, arg1, arg2);
+    // Rule at src/isa/x64/inst.isle line 4385.
+    return v4.clone();
+}
+
+// Generated as internal constructor for term x64_and_mem.
+pub fn constructor_x64_and_mem<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &Amode,
+    arg2: Gpr,
+) -> SideEffectNoResult {
+    let v4 = &constructor_alu_rm(ctx, arg0, &AluRmiROpcode::And, arg1, arg2);
+    // Rule at src/isa/x64/inst.isle line 4389.
+    return v4.clone();
+}
+
+// Generated as internal constructor for term x64_or_mem.
+pub fn constructor_x64_or_mem<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &Amode,
+    arg2: Gpr,
+) -> SideEffectNoResult {
+    let v4 = &constructor_alu_rm(ctx, arg0, &AluRmiROpcode::Or, arg1, arg2);
+    // Rule at src/isa/x64/inst.isle line 4393.
+    return v4.clone();
+}
+
+// Generated as internal constructor for term x64_xor_mem.
+pub fn constructor_x64_xor_mem<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &Amode,
+    arg2: Gpr,
+) -> SideEffectNoResult {
+    let v4 = &constructor_alu_rm(ctx, arg0, &AluRmiROpcode::Xor, arg1, arg2);
+    // Rule at src/isa/x64/inst.isle line 4397.
+    return v4.clone();
+}
+
+// Generated as internal constructor for term trap_if.
+pub fn constructor_trap_if<C: Context>(ctx: &mut C, arg0: &CC, arg1: &TrapCode) -> ConsumesFlags {
+    let v2 = MInst::TrapIf {
+        cc: arg0.clone(),
+        trap_code: arg1.clone(),
+    };
+    let v3 = ConsumesFlags::ConsumesFlagsSideEffect { inst: v2 };
+    // Rule at src/isa/x64/inst.isle line 4402.
+    return v3;
+}
+
+// Generated as internal constructor for term trap_if_and.
+pub fn constructor_trap_if_and<C: Context>(
+    ctx: &mut C,
+    arg0: &CC,
+    arg1: &CC,
+    arg2: &TrapCode,
+) -> ConsumesFlags {
+    let v3 = MInst::TrapIfAnd {
+        cc1: arg0.clone(),
+        cc2: arg1.clone(),
+        trap_code: arg2.clone(),
+    };
+    let v4 = ConsumesFlags::ConsumesFlagsSideEffect { inst: v3 };
+    // Rule at src/isa/x64/inst.isle line 4407.
+    return v4;
+}
+
+// Generated as internal constructor for term trap_if_or.
+pub fn constructor_trap_if_or<C: Context>(
+    ctx: &mut C,
+    arg0: &CC,
+    arg1: &CC,
+    arg2: &TrapCode,
+) -> ConsumesFlags {
+    let v3 = MInst::TrapIfOr {
+        cc1: arg0.clone(),
+        cc2: arg1.clone(),
+        trap_code: arg2.clone(),
+    };
+    let v4 = ConsumesFlags::ConsumesFlagsSideEffect { inst: v3 };
+    // Rule at src/isa/x64/inst.isle line 4412.
+    return v4;
+}
+
+// Generated as internal constructor for term trap_if_icmp.
+pub fn constructor_trap_if_icmp<C: Context>(
+    ctx: &mut C,
+    arg0: &IcmpCondResult,
+    arg1: &TrapCode,
+) -> SideEffectNoResult {
+    if let &IcmpCondResult::Condition {
+        producer: ref v1,
+        cc: ref v2,
+    } = arg0
+    {
+        let v4 = &constructor_trap_if(ctx, v2, arg1);
+        let v5 = &constructor_with_flags_side_effect(ctx, v1, v4);
+        // Rule at src/isa/x64/inst.isle line 4416.
+        return v5.clone();
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "trap_if_icmp", "src/isa/x64/inst.isle line 4415"
+    )
+}
+
+// Generated as internal constructor for term trap_if_fcmp.
+pub fn constructor_trap_if_fcmp<C: Context>(
+    ctx: &mut C,
+    arg0: &FcmpCondResult,
+    arg1: &TrapCode,
+) -> SideEffectNoResult {
+    match arg0 {
+        &FcmpCondResult::Condition {
+            producer: ref v1,
+            cc: ref v2,
+        } => {
+            let v4 = &constructor_trap_if(ctx, v2, arg1);
+            let v5 = &constructor_with_flags_side_effect(ctx, v1, v4);
+            // Rule at src/isa/x64/inst.isle line 4420.
+            return v5.clone();
+        }
+        &FcmpCondResult::AndCondition {
+            producer: ref v6,
+            cc1: ref v7,
+            cc2: ref v8,
+        } => {
+            let v9 = &constructor_trap_if_and(ctx, v7, v8, arg1);
+            let v10 = &constructor_with_flags_side_effect(ctx, v6, v9);
+            // Rule at src/isa/x64/inst.isle line 4422.
+            return v10.clone();
+        }
+        &FcmpCondResult::OrCondition {
+            producer: ref v11,
+            cc1: ref v12,
+            cc2: ref v13,
+        } => {
+            let v14 = &constructor_trap_if_or(ctx, v12, v13, arg1);
+            let v15 = &constructor_with_flags_side_effect(ctx, v11, v14);
+            // Rule at src/isa/x64/inst.isle line 4424.
+            return v15.clone();
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "trap_if_fcmp", "src/isa/x64/inst.isle line 4419"
+    )
+}
+
+// Generated as internal constructor for term x64_movddup.
+pub fn constructor_x64_movddup<C: Context>(ctx: &mut C, arg0: &XmmMem) -> Xmm {
+    let v3 = C::use_avx(ctx);
+    if v3 == true {
+        let v5 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vmovddup, arg0);
+        // Rule at src/isa/x64/inst.isle line 4431.
+        return v5;
+    }
+    let v2 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Movddup, arg0);
+    // Rule at src/isa/x64/inst.isle line 4429.
+    return v2;
+}
+
+// Generated as internal constructor for term x64_vpbroadcastb.
+pub fn constructor_x64_vpbroadcastb<C: Context>(ctx: &mut C, arg0: &XmmMem) -> Xmm {
+    let v2 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vpbroadcastb, arg0);
+    // Rule at src/isa/x64/inst.isle line 4437.
+    return v2;
+}
+
+// Generated as internal constructor for term x64_vpbroadcastw.
+pub fn constructor_x64_vpbroadcastw<C: Context>(ctx: &mut C, arg0: &XmmMem) -> Xmm {
+    let v2 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vpbroadcastw, arg0);
+    // Rule at src/isa/x64/inst.isle line 4442.
+    return v2;
+}
+
+// Generated as internal constructor for term x64_vpbroadcastd.
+pub fn constructor_x64_vpbroadcastd<C: Context>(ctx: &mut C, arg0: &XmmMem) -> Xmm {
+    let v2 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vpbroadcastd, arg0);
+    // Rule at src/isa/x64/inst.isle line 4447.
+    return v2;
+}
+
+// Generated as internal constructor for term x64_vbroadcastss.
+pub fn constructor_x64_vbroadcastss<C: Context>(ctx: &mut C, arg0: &XmmMem) -> Xmm {
+    let v2 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vbroadcastss, arg0);
+    // Rule at src/isa/x64/inst.isle line 4452.
+    return v2;
+}
+
+// Generated as internal constructor for term jmp_known.
+pub fn constructor_jmp_known<C: Context>(ctx: &mut C, arg0: MachLabel) -> SideEffectNoResult {
+    let v1 = MInst::JmpKnown { dst: arg0 };
+    let v2 = SideEffectNoResult::Inst { inst: v1 };
+    // Rule at src/isa/x64/inst.isle line 4459.
+    return v2;
+}
+
+// Generated as internal constructor for term jmp_if.
+pub fn constructor_jmp_if<C: Context>(ctx: &mut C, arg0: &CC, arg1: MachLabel) -> ConsumesFlags {
+    let v2 = MInst::JmpIf {
+        cc: arg0.clone(),
+        taken: arg1,
+    };
+    let v3 = ConsumesFlags::ConsumesFlagsSideEffect { inst: v2 };
+    // Rule at src/isa/x64/inst.isle line 4463.
+    return v3;
+}
+
+// Generated as internal constructor for term jmp_cond.
+pub fn constructor_jmp_cond<C: Context>(
+    ctx: &mut C,
+    arg0: &CC,
+    arg1: MachLabel,
+    arg2: MachLabel,
+) -> ConsumesFlags {
+    let v3 = MInst::JmpCond {
+        cc: arg0.clone(),
+        taken: arg1,
+        not_taken: arg2,
+    };
+    let v4 = ConsumesFlags::ConsumesFlagsSideEffect { inst: v3 };
+    // Rule at src/isa/x64/inst.isle line 4468.
+    return v4;
+}
+
+// Generated as internal constructor for term jmp_cond_icmp.
+pub fn constructor_jmp_cond_icmp<C: Context>(
+    ctx: &mut C,
+    arg0: &IcmpCondResult,
+    arg1: MachLabel,
+    arg2: MachLabel,
+) -> SideEffectNoResult {
+    if let &IcmpCondResult::Condition {
+        producer: ref v1,
+        cc: ref v2,
+    } = arg0
+    {
+        let v5 = &constructor_jmp_cond(ctx, v2, arg1, arg2);
+        let v6 = &constructor_with_flags_side_effect(ctx, v1, v5);
+        // Rule at src/isa/x64/inst.isle line 4473.
+        return v6.clone();
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "jmp_cond_icmp", "src/isa/x64/inst.isle line 4472"
+    )
+}
+
+// Generated as internal constructor for term jmp_cond_fcmp.
+pub fn constructor_jmp_cond_fcmp<C: Context>(
+    ctx: &mut C,
+    arg0: &FcmpCondResult,
+    arg1: MachLabel,
+    arg2: MachLabel,
+) -> SideEffectNoResult {
+    match arg0 {
+        &FcmpCondResult::Condition {
+            producer: ref v1,
+            cc: ref v2,
+        } => {
+            let v5 = &constructor_jmp_cond(ctx, v2, arg1, arg2);
+            let v6 = &constructor_with_flags_side_effect(ctx, v1, v5);
+            // Rule at src/isa/x64/inst.isle line 4478.
+            return v6.clone();
+        }
+        &FcmpCondResult::AndCondition {
+            producer: ref v7,
+            cc1: ref v8,
+            cc2: ref v9,
+        } => {
+            let v10 = &C::cc_invert(ctx, v8);
+            let v11 = &constructor_jmp_if(ctx, v10, arg2);
+            let v12 = &C::cc_invert(ctx, v9);
+            let v13 = &constructor_jmp_cond(ctx, v12, arg2, arg1);
+            let v14 = &constructor_consumes_flags_concat(ctx, v11, v13);
+            let v15 = &constructor_with_flags_side_effect(ctx, v7, v14);
+            // Rule at src/isa/x64/inst.isle line 4480.
+            return v15.clone();
+        }
+        &FcmpCondResult::OrCondition {
+            producer: ref v16,
+            cc1: ref v17,
+            cc2: ref v18,
+        } => {
+            let v19 = &constructor_jmp_if(ctx, v17, arg1);
+            let v20 = &constructor_jmp_cond(ctx, v18, arg1, arg2);
+            let v21 = &constructor_consumes_flags_concat(ctx, v19, v20);
+            let v22 = &constructor_with_flags_side_effect(ctx, v16, v21);
+            // Rule at src/isa/x64/inst.isle line 4485.
+            return v22.clone();
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "jmp_cond_fcmp", "src/isa/x64/inst.isle line 4477"
+    )
+}
+
+// Generated as internal constructor for term jmp_table_seq.
+pub fn constructor_jmp_table_seq<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Gpr,
+    arg2: MachLabel,
+    arg3: &BoxVecMachLabel,
+) -> SideEffectNoResult {
+    let v4 = C::temp_writable_gpr(ctx);
+    let v5 = C::temp_writable_gpr(ctx);
+    let v6 = C::gpr_to_reg(ctx, arg1);
+    let v7 = C::writable_gpr_to_reg(ctx, v4);
+    let v8 = C::writable_gpr_to_reg(ctx, v5);
+    let v9 = MInst::JmpTableSeq {
+        idx: v6,
+        tmp1: v7,
+        tmp2: v8,
+        default_target: arg2,
+        targets: arg3.clone(),
+    };
+    let v10 = SideEffectNoResult::Inst { inst: v9 };
+    // Rule at src/isa/x64/inst.isle line 4505.
+    return v10;
+}
+
+// Generated as internal constructor for term icmp_cond_result.
+pub fn constructor_icmp_cond_result<C: Context>(
+    ctx: &mut C,
+    arg0: &ProducesFlags,
+    arg1: &CC,
+) -> IcmpCondResult {
+    let v2 = IcmpCondResult::Condition {
+        producer: arg0.clone(),
+        cc: arg1.clone(),
+    };
+    // Rule at src/isa/x64/inst.isle line 4524.
+    return v2;
+}
+
+// Generated as internal constructor for term invert_icmp_cond_result.
+pub fn constructor_invert_icmp_cond_result<C: Context>(
+    ctx: &mut C,
+    arg0: &IcmpCondResult,
+) -> IcmpCondResult {
+    if let &IcmpCondResult::Condition {
+        producer: ref v1,
+        cc: ref v2,
+    } = arg0
+    {
+        let v3 = &C::cc_invert(ctx, v2);
+        let v4 = &constructor_icmp_cond_result(ctx, v1, v3);
+        // Rule at src/isa/x64/inst.isle line 4527.
+        return v4.clone();
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "invert_icmp_cond_result", "src/isa/x64/inst.isle line 4526"
+    )
+}
+
+// Generated as internal constructor for term lower_icmp_bool.
+pub fn constructor_lower_icmp_bool<C: Context>(ctx: &mut C, arg0: &IcmpCondResult) -> ValueRegs {
+    if let &IcmpCondResult::Condition {
+        producer: ref v1,
+        cc: ref v2,
+    } = arg0
+    {
+        let v3 = &constructor_x64_setcc(ctx, v2);
+        let v4 = constructor_with_flags(ctx, v1, v3);
+        // Rule at src/isa/x64/inst.isle line 4532.
+        return v4;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "lower_icmp_bool", "src/isa/x64/inst.isle line 4531"
+    )
+}
+
+// Generated as internal constructor for term select_icmp.
+pub fn constructor_select_icmp<C: Context>(
+    ctx: &mut C,
+    arg0: &IcmpCondResult,
+    arg1: Value,
+    arg2: Value,
+) -> ValueRegs {
+    if let &IcmpCondResult::Condition {
+        producer: ref v1,
+        cc: ref v2,
+    } = arg0
+    {
+        let v4 = C::value_type(ctx, arg1);
+        let v5 = &C::type_register_class(ctx, v4);
+        if let Some(v6) = v5 {
+            if let &RegisterClass::Gpr {
+                single_register: v7,
+            } = v6
+            {
+                if v7 == true {
+                    let v9 = constructor_put_in_gpr(ctx, arg1);
+                    let v10 = &C::gpr_to_gpr_mem(ctx, v9);
+                    let v11 = constructor_put_in_gpr(ctx, arg2);
+                    let v12 = &constructor_cmove(ctx, v4, v2, v10, v11);
+                    let v13 = constructor_with_flags(ctx, v1, v12);
+                    // Rule at src/isa/x64/inst.isle line 4541.
+                    return v13;
+                }
+            }
+        }
+        let v14 = &constructor_cmove_from_values(ctx, v4, v2, arg1, arg2);
+        let v15 = constructor_with_flags(ctx, v1, v14);
+        // Rule at src/isa/x64/inst.isle line 4545.
+        return v15;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "select_icmp", "src/isa/x64/inst.isle line 4536"
+    )
+}
+
+// Generated as internal constructor for term emit_cmp.
+pub fn constructor_emit_cmp<C: Context>(
+    ctx: &mut C,
+    arg0: &IntCC,
+    arg1: Value,
+    arg2: Value,
+) -> IcmpCondResult {
+    let v2 = C::value_type(ctx, arg1);
+    if v2 == I128 {
+        match arg0 {
+            &IntCC::Equal => {
+                let v44 = C::put_in_regs(ctx, arg1);
+                let v46 = constructor_value_regs_get_gpr(ctx, v44, 0x0);
+                let v47 = C::put_in_regs(ctx, arg1);
+                let v49 = constructor_value_regs_get_gpr(ctx, v47, 0x1);
+                let v50 = C::put_in_regs(ctx, arg2);
+                let v51 = constructor_value_regs_get_gpr(ctx, v50, 0x0);
+                let v52 = C::put_in_regs(ctx, arg2);
+                let v53 = constructor_value_regs_get_gpr(ctx, v52, 0x1);
+                let v55 = &C::gpr_to_gpr_mem_imm(ctx, v51);
+                let v56 = &constructor_x64_cmp(ctx, &OperandSize::Size64, v55, v46);
+                let v58 = &constructor_x64_setcc(ctx, &CC::Z);
+                let v59 = constructor_with_flags_reg(ctx, v56, v58);
+                let v60 = &C::gpr_to_gpr_mem_imm(ctx, v53);
+                let v61 = &constructor_x64_cmp(ctx, &OperandSize::Size64, v60, v49);
+                let v62 = &constructor_x64_setcc(ctx, &CC::Z);
+                let v63 = constructor_with_flags_reg(ctx, v61, v62);
+                let v65 = C::gpr_new(ctx, v59);
+                let v66 = &constructor_reg_to_gpr_mem_imm(ctx, v63);
+                let v67 = constructor_x64_and(ctx, I64, v65, v66);
+                let v68 = C::gpr_to_reg(ctx, v67);
+                let v70 = RegMemImm::Imm { simm32: 0x1 };
+                let v71 = &C::gpr_mem_imm_new(ctx, &v70);
+                let v72 = C::gpr_new(ctx, v68);
+                let v73 = &constructor_x64_test(ctx, &OperandSize::Size64, v71, v72);
+                let v75 = &constructor_icmp_cond_result(ctx, v73, &CC::NZ);
+                // Rule at src/isa/x64/inst.isle line 4577.
+                return v75.clone();
+            }
+            &IntCC::NotEqual => {
+                let v44 = C::put_in_regs(ctx, arg1);
+                let v46 = constructor_value_regs_get_gpr(ctx, v44, 0x0);
+                let v47 = C::put_in_regs(ctx, arg1);
+                let v49 = constructor_value_regs_get_gpr(ctx, v47, 0x1);
+                let v50 = C::put_in_regs(ctx, arg2);
+                let v51 = constructor_value_regs_get_gpr(ctx, v50, 0x0);
+                let v52 = C::put_in_regs(ctx, arg2);
+                let v53 = constructor_value_regs_get_gpr(ctx, v52, 0x1);
+                let v55 = &C::gpr_to_gpr_mem_imm(ctx, v51);
+                let v56 = &constructor_x64_cmp(ctx, &OperandSize::Size64, v55, v46);
+                let v76 = &constructor_x64_setcc(ctx, &CC::NZ);
+                let v77 = constructor_with_flags_reg(ctx, v56, v76);
+                let v60 = &C::gpr_to_gpr_mem_imm(ctx, v53);
+                let v61 = &constructor_x64_cmp(ctx, &OperandSize::Size64, v60, v49);
+                let v78 = &constructor_x64_setcc(ctx, &CC::NZ);
+                let v79 = constructor_with_flags_reg(ctx, v61, v78);
+                let v80 = C::gpr_new(ctx, v77);
+                let v81 = &constructor_reg_to_gpr_mem_imm(ctx, v79);
+                let v82 = constructor_x64_or(ctx, I64, v80, v81);
+                let v83 = C::gpr_to_reg(ctx, v82);
+                let v70 = RegMemImm::Imm { simm32: 0x1 };
+                let v71 = &C::gpr_mem_imm_new(ctx, &v70);
+                let v84 = C::gpr_new(ctx, v83);
+                let v85 = &constructor_x64_test(ctx, &OperandSize::Size64, v71, v84);
+                let v86 = &constructor_icmp_cond_result(ctx, v85, &CC::NZ);
+                // Rule at src/isa/x64/inst.isle line 4598.
+                return v86.clone();
+            }
+            _ => {}
+        }
+        let v44 = C::put_in_regs(ctx, arg1);
+        let v46 = constructor_value_regs_get_gpr(ctx, v44, 0x0);
+        let v47 = C::put_in_regs(ctx, arg1);
+        let v49 = constructor_value_regs_get_gpr(ctx, v47, 0x1);
+        let v50 = C::put_in_regs(ctx, arg2);
+        let v51 = constructor_value_regs_get_gpr(ctx, v50, 0x0);
+        let v52 = C::put_in_regs(ctx, arg2);
+        let v53 = constructor_value_regs_get_gpr(ctx, v52, 0x1);
+        let v87 = &C::gpr_to_gpr_mem_imm(ctx, v53);
+        let v88 = &constructor_x64_cmp(ctx, &OperandSize::Size64, v87, v49);
+        let v89 = &C::intcc_without_eq(ctx, arg0);
+        let v90 = &C::intcc_to_cc(ctx, v89);
+        let v91 = &constructor_x64_setcc(ctx, v90);
+        let v92 = &constructor_x64_setcc(ctx, &CC::Z);
+        let v93 = &constructor_consumes_flags_concat(ctx, v91, v92);
+        let v94 = constructor_with_flags(ctx, v88, v93);
+        let v95 = C::value_regs_get(ctx, v94, 0x0);
+        let v96 = C::value_regs_get(ctx, v94, 0x1);
+        let v97 = &C::gpr_to_gpr_mem_imm(ctx, v51);
+        let v98 = &constructor_x64_cmp(ctx, &OperandSize::Size64, v97, v46);
+        let v99 = &C::intcc_unsigned(ctx, arg0);
+        let v100 = &C::intcc_to_cc(ctx, v99);
+        let v101 = &constructor_x64_setcc(ctx, v100);
+        let v102 = constructor_with_flags_reg(ctx, v98, v101);
+        let v103 = C::gpr_new(ctx, v96);
+        let v104 = &constructor_reg_to_gpr_mem_imm(ctx, v102);
+        let v105 = constructor_x64_and(ctx, I64, v103, v104);
+        let v106 = C::gpr_to_reg(ctx, v105);
+        let v107 = C::gpr_new(ctx, v95);
+        let v108 = &constructor_reg_to_gpr_mem_imm(ctx, v106);
+        let v109 = constructor_x64_or(ctx, I64, v107, v108);
+        let v110 = C::gpr_to_reg(ctx, v109);
+        let v70 = RegMemImm::Imm { simm32: 0x1 };
+        let v111 = &C::gpr_mem_imm_new(ctx, &v70);
+        let v112 = C::gpr_new(ctx, v110);
+        let v113 = &constructor_x64_test(ctx, &OperandSize::Size64, v111, v112);
+        let v114 = &constructor_icmp_cond_result(ctx, v113, &CC::NZ);
+        // Rule at src/isa/x64/inst.isle line 4613.
+        return v114.clone();
+    }
+    let v29 = C::def_inst(ctx, arg1);
+    if let Some(v30) = v29 {
+        let v31 = &C::inst_data(ctx, v30);
+        if let &InstructionData::UnaryImm {
+            opcode: ref v32,
+            imm: v33,
+        } = v31
+        {
+            if let &Opcode::Iconst = v32 {
+                let v34 = C::u64_from_imm64(ctx, v33);
+                if v34 == 0x0 {
+                    let v35 = C::value_type(ctx, arg2);
+                    let v36 = &C::raw_operand_size_of_type(ctx, v35);
+                    let v37 = C::put_in_reg(ctx, arg2);
+                    let v38 = C::gpr_new(ctx, v37);
+                    let v39 = &C::gpr_to_gpr_mem_imm(ctx, v38);
+                    let v40 = &constructor_x64_test(ctx, v36, v39, v38);
+                    let v41 = &C::intcc_reverse(ctx, arg0);
+                    let v42 = &C::intcc_to_cc(ctx, v41);
+                    let v43 = &constructor_icmp_cond_result(ctx, v40, v42);
+                    // Rule at src/isa/x64/inst.isle line 4570.
+                    return v43.clone();
+                }
+            }
+        }
+    }
+    let v17 = C::def_inst(ctx, arg2);
+    if let Some(v18) = v17 {
+        let v19 = &C::inst_data(ctx, v18);
+        if let &InstructionData::UnaryImm {
+            opcode: ref v20,
+            imm: v21,
+        } = v19
+        {
+            if let &Opcode::Iconst = v20 {
+                let v22 = C::u64_from_imm64(ctx, v21);
+                if v22 == 0x0 {
+                    let v4 = &C::raw_operand_size_of_type(ctx, v2);
+                    let v23 = C::put_in_reg(ctx, arg1);
+                    let v24 = C::gpr_new(ctx, v23);
+                    let v25 = &C::gpr_to_gpr_mem_imm(ctx, v24);
+                    let v26 = &constructor_x64_test(ctx, v4, v25, v24);
+                    let v27 = &C::intcc_to_cc(ctx, arg0);
+                    let v28 = &constructor_icmp_cond_result(ctx, v26, v27);
+                    // Rule at src/isa/x64/inst.isle line 4565.
+                    return v28.clone();
+                }
+            }
+        }
+    }
+    let v10 = &C::simm32_from_value(ctx, arg1);
+    if let Some(v11) = v10 {
+        let v4 = &C::raw_operand_size_of_type(ctx, v2);
+        let v12 = constructor_put_in_gpr(ctx, arg2);
+        let v13 = &constructor_x64_cmp(ctx, v4, v11, v12);
+        let v14 = &C::intcc_reverse(ctx, arg0);
+        let v15 = &C::intcc_to_cc(ctx, v14);
+        let v16 = &constructor_icmp_cond_result(ctx, v13, v15);
+        // Rule at src/isa/x64/inst.isle line 4560.
+        return v16.clone();
+    }
+    let v4 = &C::raw_operand_size_of_type(ctx, v2);
+    let v5 = &constructor_put_in_gpr_mem_imm(ctx, arg2);
+    let v6 = constructor_put_in_gpr(ctx, arg1);
+    let v7 = &constructor_x64_cmp(ctx, v4, v5, v6);
+    let v8 = &C::intcc_to_cc(ctx, arg0);
+    let v9 = &constructor_icmp_cond_result(ctx, v7, v8);
+    // Rule at src/isa/x64/inst.isle line 4553.
+    return v9.clone();
+}
+
+// Generated as internal constructor for term lower_fcmp_bool.
+pub fn constructor_lower_fcmp_bool<C: Context>(ctx: &mut C, arg0: &FcmpCondResult) -> ValueRegs {
+    match arg0 {
+        &FcmpCondResult::Condition {
+            producer: ref v1,
+            cc: ref v2,
+        } => {
+            let v3 = &constructor_x64_setcc(ctx, v2);
+            let v4 = constructor_with_flags(ctx, v1, v3);
+            // Rule at src/isa/x64/inst.isle line 4648.
+            return v4;
+        }
+        &FcmpCondResult::AndCondition {
+            producer: ref v5,
+            cc1: ref v6,
+            cc2: ref v7,
+        } => {
+            let v8 = &constructor_x64_setcc(ctx, v6);
+            let v9 = &constructor_x64_setcc(ctx, v7);
+            let v10 = &constructor_consumes_flags_concat(ctx, v8, v9);
+            let v11 = constructor_with_flags(ctx, v5, v10);
+            let v13 = constructor_value_regs_get_gpr(ctx, v11, 0x0);
+            let v15 = constructor_value_regs_get_gpr(ctx, v11, 0x1);
+            let v17 = &C::gpr_to_gpr_mem_imm(ctx, v15);
+            let v18 = constructor_x64_and(ctx, I8, v13, v17);
+            let v19 = C::gpr_to_reg(ctx, v18);
+            let v20 = C::value_reg(ctx, v19);
+            // Rule at src/isa/x64/inst.isle line 4651.
+            return v20;
+        }
+        &FcmpCondResult::OrCondition {
+            producer: ref v21,
+            cc1: ref v22,
+            cc2: ref v23,
+        } => {
+            let v24 = &constructor_x64_setcc(ctx, v22);
+            let v25 = &constructor_x64_setcc(ctx, v23);
+            let v26 = &constructor_consumes_flags_concat(ctx, v24, v25);
+            let v27 = constructor_with_flags(ctx, v21, v26);
+            let v28 = constructor_value_regs_get_gpr(ctx, v27, 0x0);
+            let v29 = constructor_value_regs_get_gpr(ctx, v27, 0x1);
+            let v30 = &C::gpr_to_gpr_mem_imm(ctx, v29);
+            let v31 = constructor_x64_or(ctx, I8, v28, v30);
+            let v32 = C::gpr_to_reg(ctx, v31);
+            let v33 = C::value_reg(ctx, v32);
+            // Rule at src/isa/x64/inst.isle line 4660.
+            return v33;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "lower_fcmp_bool", "src/isa/x64/inst.isle line 4646"
+    )
+}
+
+// Generated as internal constructor for term emit_fcmp.
+pub fn constructor_emit_fcmp<C: Context>(
+    ctx: &mut C,
+    arg0: &FloatCC,
+    arg1: Value,
+    arg2: Value,
+) -> FcmpCondResult {
+    match arg0 {
+        &FloatCC::Equal => {
+            let v2 = C::value_type(ctx, arg1);
+            let v3 = C::ty_scalar_float(ctx, v2);
+            if let Some(v4) = v3 {
+                let v6 = &constructor_x64_ucomis(ctx, arg2, arg1);
+                let v9 = FcmpCondResult::AndCondition {
+                    producer: v6.clone(),
+                    cc1: CC::NP,
+                    cc2: CC::Z,
+                };
+                // Rule at src/isa/x64/inst.isle line 4687.
+                return v9;
+            }
+        }
+        &FloatCC::GreaterThan => {
+            let v2 = C::value_type(ctx, arg1);
+            let v3 = C::ty_scalar_float(ctx, v2);
+            if let Some(v4) = v3 {
+                let v6 = &constructor_x64_ucomis(ctx, arg2, arg1);
+                let v18 = FcmpCondResult::Condition {
+                    producer: v6.clone(),
+                    cc: CC::NBE,
+                };
+                // Rule at src/isa/x64/inst.isle line 4703.
+                return v18;
+            }
+        }
+        &FloatCC::GreaterThanOrEqual => {
+            let v2 = C::value_type(ctx, arg1);
+            let v3 = C::ty_scalar_float(ctx, v2);
+            if let Some(v4) = v3 {
+                let v6 = &constructor_x64_ucomis(ctx, arg2, arg1);
+                let v20 = FcmpCondResult::Condition {
+                    producer: v6.clone(),
+                    cc: CC::NB,
+                };
+                // Rule at src/isa/x64/inst.isle line 4705.
+                return v20;
+            }
+        }
+        &FloatCC::LessThan => {
+            let v2 = C::value_type(ctx, arg1);
+            let v3 = C::ty_scalar_float(ctx, v2);
+            if let Some(v4) = v3 {
+                let v25 = &constructor_x64_ucomis(ctx, arg1, arg2);
+                let v26 = FcmpCondResult::Condition {
+                    producer: v25.clone(),
+                    cc: CC::NBE,
+                };
+                // Rule at src/isa/x64/inst.isle line 4715.
+                return v26;
+            }
+        }
+        &FloatCC::LessThanOrEqual => {
+            let v2 = C::value_type(ctx, arg1);
+            let v3 = C::ty_scalar_float(ctx, v2);
+            if let Some(v4) = v3 {
+                let v25 = &constructor_x64_ucomis(ctx, arg1, arg2);
+                let v27 = FcmpCondResult::Condition {
+                    producer: v25.clone(),
+                    cc: CC::NB,
+                };
+                // Rule at src/isa/x64/inst.isle line 4718.
+                return v27;
+            }
+        }
+        &FloatCC::NotEqual => {
+            let v2 = C::value_type(ctx, arg1);
+            let v3 = C::ty_scalar_float(ctx, v2);
+            if let Some(v4) = v3 {
+                let v6 = &constructor_x64_ucomis(ctx, arg2, arg1);
+                let v12 = FcmpCondResult::OrCondition {
+                    producer: v6.clone(),
+                    cc1: CC::P,
+                    cc2: CC::NZ,
+                };
+                // Rule at src/isa/x64/inst.isle line 4690.
+                return v12;
+            }
+        }
+        &FloatCC::Ordered => {
+            let v2 = C::value_type(ctx, arg1);
+            let v3 = C::ty_scalar_float(ctx, v2);
+            if let Some(v4) = v3 {
+                let v6 = &constructor_x64_ucomis(ctx, arg2, arg1);
+                let v13 = FcmpCondResult::Condition {
+                    producer: v6.clone(),
+                    cc: CC::NP,
+                };
+                // Rule at src/isa/x64/inst.isle line 4695.
+                return v13;
+            }
+        }
+        &FloatCC::OrderedNotEqual => {
+            let v2 = C::value_type(ctx, arg1);
+            let v3 = C::ty_scalar_float(ctx, v2);
+            if let Some(v4) = v3 {
+                let v6 = &constructor_x64_ucomis(ctx, arg2, arg1);
+                let v15 = FcmpCondResult::Condition {
+                    producer: v6.clone(),
+                    cc: CC::NZ,
+                };
+                // Rule at src/isa/x64/inst.isle line 4699.
+                return v15;
+            }
+        }
+        &FloatCC::Unordered => {
+            let v2 = C::value_type(ctx, arg1);
+            let v3 = C::ty_scalar_float(ctx, v2);
+            if let Some(v4) = v3 {
+                let v6 = &constructor_x64_ucomis(ctx, arg2, arg1);
+                let v14 = FcmpCondResult::Condition {
+                    producer: v6.clone(),
+                    cc: CC::P,
+                };
+                // Rule at src/isa/x64/inst.isle line 4697.
+                return v14;
+            }
+        }
+        &FloatCC::UnorderedOrEqual => {
+            let v2 = C::value_type(ctx, arg1);
+            let v3 = C::ty_scalar_float(ctx, v2);
+            if let Some(v4) = v3 {
+                let v6 = &constructor_x64_ucomis(ctx, arg2, arg1);
+                let v16 = FcmpCondResult::Condition {
+                    producer: v6.clone(),
+                    cc: CC::Z,
+                };
+                // Rule at src/isa/x64/inst.isle line 4701.
+                return v16;
+            }
+        }
+        &FloatCC::UnorderedOrGreaterThan => {
+            let v2 = C::value_type(ctx, arg1);
+            let v3 = C::ty_scalar_float(ctx, v2);
+            if let Some(v4) = v3 {
+                let v25 = &constructor_x64_ucomis(ctx, arg1, arg2);
+                let v28 = FcmpCondResult::Condition {
+                    producer: v25.clone(),
+                    cc: CC::B,
+                };
+                // Rule at src/isa/x64/inst.isle line 4721.
+                return v28;
+            }
+        }
+        &FloatCC::UnorderedOrGreaterThanOrEqual => {
+            let v2 = C::value_type(ctx, arg1);
+            let v3 = C::ty_scalar_float(ctx, v2);
+            if let Some(v4) = v3 {
+                let v25 = &constructor_x64_ucomis(ctx, arg1, arg2);
+                let v29 = FcmpCondResult::Condition {
+                    producer: v25.clone(),
+                    cc: CC::BE,
+                };
+                // Rule at src/isa/x64/inst.isle line 4724.
+                return v29;
+            }
+        }
+        &FloatCC::UnorderedOrLessThan => {
+            let v2 = C::value_type(ctx, arg1);
+            let v3 = C::ty_scalar_float(ctx, v2);
+            if let Some(v4) = v3 {
+                let v6 = &constructor_x64_ucomis(ctx, arg2, arg1);
+                let v22 = FcmpCondResult::Condition {
+                    producer: v6.clone(),
+                    cc: CC::B,
+                };
+                // Rule at src/isa/x64/inst.isle line 4707.
+                return v22;
+            }
+        }
+        &FloatCC::UnorderedOrLessThanOrEqual => {
+            let v2 = C::value_type(ctx, arg1);
+            let v3 = C::ty_scalar_float(ctx, v2);
+            if let Some(v4) = v3 {
+                let v6 = &constructor_x64_ucomis(ctx, arg2, arg1);
+                let v24 = FcmpCondResult::Condition {
+                    producer: v6.clone(),
+                    cc: CC::BE,
+                };
+                // Rule at src/isa/x64/inst.isle line 4709.
+                return v24;
+            }
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "emit_fcmp", "src/isa/x64/inst.isle line 4685"
+    )
+}
+
+// Generated as internal constructor for term x64_mfence.
+pub fn constructor_x64_mfence<C: Context>(ctx: &mut C) -> SideEffectNoResult {
+    let v1 = MInst::Fence {
+        kind: FenceKind::MFence,
+    };
+    let v2 = SideEffectNoResult::Inst { inst: v1 };
+    // Rule at src/isa/x64/inst.isle line 4737.
+    return v2;
+}
+
+// Generated as internal constructor for term x64_cmpxchg.
+pub fn constructor_x64_cmpxchg<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Gpr,
+    arg2: Gpr,
+    arg3: &SyntheticAmode,
+) -> Gpr {
+    let v4 = C::temp_writable_gpr(ctx);
+    let v5 = C::gpr_to_reg(ctx, arg2);
+    let v6 = C::gpr_to_reg(ctx, arg1);
+    let v7 = C::writable_gpr_to_reg(ctx, v4);
+    let v8 = MInst::LockCmpxchg {
+        ty: arg0,
+        replacement: v5,
+        expected: v6,
+        mem: arg3.clone(),
+        dst_old: v7,
+    };
+    let v9 = C::emit(ctx, &v8);
+    let v10 = C::writable_gpr_to_gpr(ctx, v4);
+    // Rule at src/isa/x64/inst.isle line 4741.
+    return v10;
+}
+
+// Generated as internal constructor for term x64_atomic_rmw_seq.
+pub fn constructor_x64_atomic_rmw_seq<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &MachAtomicRmwOp,
+    arg2: &SyntheticAmode,
+    arg3: Gpr,
+) -> Gpr {
+    let v4 = C::temp_writable_gpr(ctx);
+    let v5 = C::temp_writable_gpr(ctx);
+    let v6 = C::gpr_to_reg(ctx, arg3);
+    let v7 = C::writable_gpr_to_reg(ctx, v5);
+    let v8 = C::writable_gpr_to_reg(ctx, v4);
+    let v9 = MInst::AtomicRmwSeq {
+        ty: arg0,
+        op: arg1.clone(),
+        mem: arg2.clone(),
+        operand: v6,
+        temp: v7,
+        dst_old: v8,
+    };
+    let v10 = C::emit(ctx, &v9);
+    let v11 = C::writable_gpr_to_gpr(ctx, v4);
+    // Rule at src/isa/x64/inst.isle line 4747.
+    return v11;
+}
+
+// Generated as internal constructor for term bitcast_xmm_to_gpr.
+pub fn constructor_bitcast_xmm_to_gpr<C: Context>(ctx: &mut C, arg0: Type, arg1: Xmm) -> Gpr {
+    match arg0 {
+        F32 => {
+            let v2 = constructor_x64_movd_to_gpr(ctx, arg1);
+            // Rule at src/isa/x64/inst.isle line 4762.
+            return v2;
+        }
+        F64 => {
+            let v3 = constructor_x64_movq_to_gpr(ctx, arg1);
+            // Rule at src/isa/x64/inst.isle line 4764.
+            return v3;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "bitcast_xmm_to_gpr", "src/isa/x64/inst.isle line 4761"
+    )
+}
+
+// Generated as internal constructor for term bitcast_gpr_to_xmm.
+pub fn constructor_bitcast_gpr_to_xmm<C: Context>(ctx: &mut C, arg0: Type, arg1: Gpr) -> Xmm {
+    match arg0 {
+        I32 => {
+            let v2 = &C::gpr_to_gpr_mem(ctx, arg1);
+            let v3 = constructor_x64_movd_to_xmm(ctx, v2);
+            // Rule at src/isa/x64/inst.isle line 4768.
+            return v3;
+        }
+        I64 => {
+            let v2 = &C::gpr_to_gpr_mem(ctx, arg1);
+            let v4 = constructor_x64_movq_to_xmm(ctx, v2);
+            // Rule at src/isa/x64/inst.isle line 4770.
+            return v4;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "bitcast_gpr_to_xmm", "src/isa/x64/inst.isle line 4767"
+    )
+}
+
+// Generated as internal constructor for term stack_addr_impl.
+pub fn constructor_stack_addr_impl<C: Context>(
+    ctx: &mut C,
+    arg0: StackSlot,
+    arg1: Offset32,
+) -> Gpr {
+    let v2 = C::temp_writable_gpr(ctx);
+    let v3 = C::writable_gpr_to_reg(ctx, v2);
+    let v4 = &C::abi_stackslot_addr(ctx, v3, arg0, arg1);
+    let v5 = C::emit(ctx, v4);
+    let v6 = C::writable_gpr_to_gpr(ctx, v2);
+    // Rule at src/isa/x64/inst.isle line 4776.
+    return v6;
+}
+
+// Generated as internal constructor for term x64_checked_srem_seq.
+pub fn constructor_x64_checked_srem_seq<C: Context>(
+    ctx: &mut C,
+    arg0: &OperandSize,
+    arg1: Gpr,
+    arg2: Gpr,
+    arg3: Gpr,
+) -> ValueRegs {
+    let v4 = C::temp_writable_gpr(ctx);
+    let v5 = C::temp_writable_gpr(ctx);
+    let v6 = MInst::CheckedSRemSeq {
+        size: arg0.clone(),
+        dividend_lo: arg1,
+        dividend_hi: arg2,
+        divisor: arg3,
+        dst_quotient: v4,
+        dst_remainder: v5,
+    };
+    let v7 = C::emit(ctx, &v6);
+    let v8 = constructor_writable_gpr_to_r_reg(ctx, v4);
+    let v9 = constructor_writable_gpr_to_r_reg(ctx, v5);
+    let v10 = C::value_regs(ctx, v8, v9);
+    // Rule at src/isa/x64/inst.isle line 4785.
+    return v10;
+}
+
+// Generated as internal constructor for term x64_checked_srem_seq8.
+pub fn constructor_x64_checked_srem_seq8<C: Context>(ctx: &mut C, arg0: Gpr, arg1: Gpr) -> Gpr {
+    let v2 = C::temp_writable_gpr(ctx);
+    let v3 = MInst::CheckedSRemSeq8 {
+        dividend: arg0,
+        divisor: arg1,
+        dst: v2,
+    };
+    let v4 = C::emit(ctx, &v3);
+    let v5 = C::writable_gpr_to_gpr(ctx, v2);
+    // Rule at src/isa/x64/inst.isle line 4792.
+    return v5;
+}
+
+// Generated as internal constructor for term x64_div8.
+pub fn constructor_x64_div8<C: Context>(
+    ctx: &mut C,
+    arg0: Gpr,
+    arg1: &GprMem,
+    arg2: &DivSignedness,
+    arg3: &TrapCode,
+) -> Gpr {
+    let v4 = C::temp_writable_gpr(ctx);
+    let v5 = MInst::Div8 {
+        sign: arg2.clone(),
+        trap: arg3.clone(),
+        divisor: arg1.clone(),
+        dividend: arg0,
+        dst: v4,
+    };
+    let v6 = C::emit(ctx, &v5);
+    let v7 = C::writable_gpr_to_gpr(ctx, v4);
+    // Rule at src/isa/x64/inst.isle line 4799.
+    return v7;
+}
+
+// Generated as internal constructor for term x64_div.
+pub fn constructor_x64_div<C: Context>(
+    ctx: &mut C,
+    arg0: Gpr,
+    arg1: Gpr,
+    arg2: &GprMem,
+    arg3: &OperandSize,
+    arg4: &DivSignedness,
+    arg5: &TrapCode,
+) -> ValueRegs {
+    let v6 = C::temp_writable_gpr(ctx);
+    let v7 = C::temp_writable_gpr(ctx);
+    let v8 = MInst::Div {
+        size: arg3.clone(),
+        sign: arg4.clone(),
+        trap: arg5.clone(),
+        divisor: arg2.clone(),
+        dividend_lo: arg0,
+        dividend_hi: arg1,
+        dst_quotient: v6,
+        dst_remainder: v7,
+    };
+    let v9 = C::emit(ctx, &v8);
+    let v10 = constructor_writable_gpr_to_r_reg(ctx, v6);
+    let v11 = constructor_writable_gpr_to_r_reg(ctx, v7);
+    let v12 = C::value_regs(ctx, v10, v11);
+    // Rule at src/isa/x64/inst.isle line 4809.
+    return v12;
+}
+
+// Generated as internal constructor for term x64_div_quotient.
+pub fn constructor_x64_div_quotient<C: Context>(
+    ctx: &mut C,
+    arg0: Gpr,
+    arg1: Gpr,
+    arg2: &GprMem,
+    arg3: &OperandSize,
+    arg4: &DivSignedness,
+    arg5: &TrapCode,
+) -> ValueRegs {
+    let v6 = constructor_x64_div(ctx, arg0, arg1, arg2, arg3, arg4, arg5);
+    let v8 = C::value_regs_get(ctx, v6, 0x0);
+    let v9 = C::value_reg(ctx, v8);
+    // Rule at src/isa/x64/inst.isle line 4817.
+    return v9;
+}
+
+// Generated as internal constructor for term x64_div_remainder.
+pub fn constructor_x64_div_remainder<C: Context>(
+    ctx: &mut C,
+    arg0: Gpr,
+    arg1: Gpr,
+    arg2: &GprMem,
+    arg3: &OperandSize,
+    arg4: &DivSignedness,
+    arg5: &TrapCode,
+) -> ValueRegs {
+    let v6 = constructor_x64_div(ctx, arg0, arg1, arg2, arg3, arg4, arg5);
+    let v8 = C::value_regs_get(ctx, v6, 0x1);
+    let v9 = C::value_reg(ctx, v8);
+    // Rule at src/isa/x64/inst.isle line 4822.
+    return v9;
+}
+
+// Generated as internal constructor for term x64_sign_extend_data.
+pub fn constructor_x64_sign_extend_data<C: Context>(
+    ctx: &mut C,
+    arg0: Gpr,
+    arg1: &OperandSize,
+) -> Gpr {
+    let v2 = C::temp_writable_gpr(ctx);
+    let v3 = MInst::SignExtendData {
+        size: arg1.clone(),
+        src: arg0,
+        dst: v2,
+    };
+    let v4 = C::emit(ctx, &v3);
+    let v5 = C::writable_gpr_to_gpr(ctx, v2);
+    // Rule at src/isa/x64/inst.isle line 4827.
+    return v5;
+}
+
+// Generated as internal constructor for term read_pinned_gpr.
+pub fn constructor_read_pinned_gpr<C: Context>(ctx: &mut C) -> Gpr {
+    let v0 = C::preg_pinned(ctx);
+    let v1 = constructor_mov_from_preg(ctx, v0);
+    let v2 = C::gpr_new(ctx, v1);
+    // Rule at src/isa/x64/inst.isle line 4835.
+    return v2;
+}
+
+// Generated as internal constructor for term write_pinned_gpr.
+pub fn constructor_write_pinned_gpr<C: Context>(ctx: &mut C, arg0: Gpr) -> SideEffectNoResult {
+    let v1 = C::preg_pinned(ctx);
+    let v2 = &constructor_mov_to_preg(ctx, v1, arg0);
+    // Rule at src/isa/x64/inst.isle line 4839.
+    return v2.clone();
+}
+
+// Generated as internal constructor for term elf_tls_get_addr.
+pub fn constructor_elf_tls_get_addr<C: Context>(ctx: &mut C, arg0: ExternalName) -> Gpr {
+    let v1 = C::temp_writable_gpr(ctx);
+    let v2 = MInst::ElfTlsGetAddr {
+        symbol: arg0,
+        dst: v1,
+    };
+    let v3 = C::emit(ctx, &v2);
+    let v4 = C::writable_gpr_to_gpr(ctx, v1);
+    // Rule at src/isa/x64/inst.isle line 4881.
+    return v4;
+}
+
+// Generated as internal constructor for term macho_tls_get_addr.
+pub fn constructor_macho_tls_get_addr<C: Context>(ctx: &mut C, arg0: ExternalName) -> Gpr {
+    let v1 = C::temp_writable_gpr(ctx);
+    let v2 = MInst::MachOTlsGetAddr {
+        symbol: arg0,
+        dst: v1,
+    };
+    let v3 = C::emit(ctx, &v2);
+    let v4 = C::writable_gpr_to_gpr(ctx, v1);
+    // Rule at src/isa/x64/inst.isle line 4888.
+    return v4;
+}
+
+// Generated as internal constructor for term coff_tls_get_addr.
+pub fn constructor_coff_tls_get_addr<C: Context>(ctx: &mut C, arg0: ExternalName) -> Gpr {
+    let v1 = C::temp_writable_gpr(ctx);
+    let v2 = C::temp_writable_gpr(ctx);
+    let v3 = MInst::CoffTlsGetAddr {
+        symbol: arg0,
+        dst: v1,
+        tmp: v2,
+    };
+    let v4 = C::emit(ctx, &v3);
+    let v5 = C::writable_gpr_to_gpr(ctx, v1);
+    // Rule at src/isa/x64/inst.isle line 4895.
+    return v5;
+}
+
+// Generated as internal constructor for term reg_to_xmm_mem.
+pub fn constructor_reg_to_xmm_mem<C: Context>(ctx: &mut C, arg0: Reg) -> XmmMem {
+    let v1 = C::xmm_new(ctx, arg0);
+    let v2 = &C::xmm_to_xmm_mem(ctx, v1);
+    // Rule at src/isa/x64/inst.isle line 4982.
+    return v2.clone();
+}
+
+// Generated as internal constructor for term xmm_to_reg_mem.
+pub fn constructor_xmm_to_reg_mem<C: Context>(ctx: &mut C, arg0: Reg) -> XmmMem {
+    let v1 = C::xmm_new(ctx, arg0);
+    let v2 = C::xmm_to_reg(ctx, v1);
+    let v3 = RegMem::Reg { reg: v2 };
+    let v4 = &C::reg_mem_to_xmm_mem(ctx, &v3);
+    // Rule at src/isa/x64/inst.isle line 4985.
+    return v4.clone();
+}
+
+// Generated as internal constructor for term writable_gpr_to_r_reg.
+pub fn constructor_writable_gpr_to_r_reg<C: Context>(ctx: &mut C, arg0: WritableGpr) -> Reg {
+    let v1 = C::writable_gpr_to_reg(ctx, arg0);
+    let v2 = C::writable_reg_to_reg(ctx, v1);
+    // Rule at src/isa/x64/inst.isle line 4989.
+    return v2;
+}
+
+// Generated as internal constructor for term writable_gpr_to_gpr_mem.
+pub fn constructor_writable_gpr_to_gpr_mem<C: Context>(ctx: &mut C, arg0: WritableGpr) -> GprMem {
+    let v1 = C::writable_gpr_to_gpr(ctx, arg0);
+    let v2 = &C::gpr_to_gpr_mem(ctx, v1);
+    // Rule at src/isa/x64/inst.isle line 4992.
+    return v2.clone();
+}
+
+// Generated as internal constructor for term writable_gpr_to_value_regs.
+pub fn constructor_writable_gpr_to_value_regs<C: Context>(
+    ctx: &mut C,
+    arg0: WritableGpr,
+) -> ValueRegs {
+    let v1 = constructor_writable_gpr_to_r_reg(ctx, arg0);
+    let v2 = C::value_reg(ctx, v1);
+    // Rule at src/isa/x64/inst.isle line 4995.
+    return v2;
+}
+
+// Generated as internal constructor for term writable_xmm_to_r_reg.
+pub fn constructor_writable_xmm_to_r_reg<C: Context>(ctx: &mut C, arg0: WritableXmm) -> Reg {
+    let v1 = C::writable_xmm_to_reg(ctx, arg0);
+    let v2 = C::writable_reg_to_reg(ctx, v1);
+    // Rule at src/isa/x64/inst.isle line 4998.
+    return v2;
+}
+
+// Generated as internal constructor for term writable_xmm_to_xmm_mem.
+pub fn constructor_writable_xmm_to_xmm_mem<C: Context>(ctx: &mut C, arg0: WritableXmm) -> XmmMem {
+    let v1 = C::writable_xmm_to_xmm(ctx, arg0);
+    let v2 = &C::xmm_to_xmm_mem(ctx, v1);
+    // Rule at src/isa/x64/inst.isle line 5001.
+    return v2.clone();
+}
+
+// Generated as internal constructor for term writable_xmm_to_value_regs.
+pub fn constructor_writable_xmm_to_value_regs<C: Context>(
+    ctx: &mut C,
+    arg0: WritableXmm,
+) -> ValueRegs {
+    let v1 = constructor_writable_xmm_to_r_reg(ctx, arg0);
+    let v2 = C::value_reg(ctx, v1);
+    // Rule at src/isa/x64/inst.isle line 5004.
+    return v2;
+}
+
+// Generated as internal constructor for term synthetic_amode_to_gpr_mem.
+pub fn constructor_synthetic_amode_to_gpr_mem<C: Context>(
+    ctx: &mut C,
+    arg0: &SyntheticAmode,
+) -> GprMem {
+    let v1 = &C::synthetic_amode_to_reg_mem(ctx, arg0);
+    let v2 = &C::reg_mem_to_gpr_mem(ctx, v1);
+    // Rule at src/isa/x64/inst.isle line 5011.
+    return v2.clone();
+}
+
+// Generated as internal constructor for term amode_to_gpr_mem.
+pub fn constructor_amode_to_gpr_mem<C: Context>(ctx: &mut C, arg0: &Amode) -> GprMem {
+    let v1 = &C::amode_to_synthetic_amode(ctx, arg0);
+    let v2 = &constructor_synthetic_amode_to_gpr_mem(ctx, v1);
+    // Rule at src/isa/x64/inst.isle line 5009.
+    return v2.clone();
+}
+
+// Generated as internal constructor for term amode_to_xmm_mem.
+pub fn constructor_amode_to_xmm_mem<C: Context>(ctx: &mut C, arg0: &Amode) -> XmmMem {
+    let v1 = &C::amode_to_synthetic_amode(ctx, arg0);
+    let v2 = &constructor_synthetic_amode_to_xmm_mem(ctx, v1);
+    // Rule at src/isa/x64/inst.isle line 5014.
+    return v2.clone();
+}
+
+// Generated as internal constructor for term synthetic_amode_to_xmm_mem.
+pub fn constructor_synthetic_amode_to_xmm_mem<C: Context>(
+    ctx: &mut C,
+    arg0: &SyntheticAmode,
+) -> XmmMem {
+    let v1 = &C::synthetic_amode_to_reg_mem(ctx, arg0);
+    let v2 = &C::reg_mem_to_xmm_mem(ctx, v1);
+    // Rule at src/isa/x64/inst.isle line 5017.
+    return v2.clone();
+}
+
+// Generated as internal constructor for term const_to_xmm_mem.
+pub fn constructor_const_to_xmm_mem<C: Context>(ctx: &mut C, arg0: VCodeConstant) -> XmmMem {
+    let v1 = &C::const_to_synthetic_amode(ctx, arg0);
+    let v2 = &constructor_synthetic_amode_to_xmm_mem(ctx, v1);
+    // Rule at src/isa/x64/inst.isle line 5022.
+    return v2.clone();
+}
+
+// Generated as internal constructor for term const_to_reg_mem.
+pub fn constructor_const_to_reg_mem<C: Context>(ctx: &mut C, arg0: VCodeConstant) -> RegMem {
+    let v1 = &C::const_to_synthetic_amode(ctx, arg0);
+    let v2 = RegMem::Mem { addr: v1.clone() };
+    // Rule at src/isa/x64/inst.isle line 5024.
+    return v2;
+}
+
+// Generated as internal constructor for term xmm_to_xmm_mem_aligned.
+pub fn constructor_xmm_to_xmm_mem_aligned<C: Context>(ctx: &mut C, arg0: Xmm) -> XmmMemAligned {
+    let v1 = &C::xmm_to_xmm_mem(ctx, arg0);
+    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, v1);
+    // Rule at src/isa/x64/inst.isle line 5027.
+    return v2.clone();
+}
+
+// Generated as internal constructor for term amode_to_xmm_mem_aligned.
+pub fn constructor_amode_to_xmm_mem_aligned<C: Context>(
+    ctx: &mut C,
+    arg0: &Amode,
+) -> XmmMemAligned {
+    let v1 = &constructor_amode_to_xmm_mem(ctx, arg0);
+    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, v1);
+    // Rule at src/isa/x64/inst.isle line 5029.
+    return v2.clone();
+}
+
+// Generated as internal constructor for term synthetic_amode_to_xmm_mem_aligned.
+pub fn constructor_synthetic_amode_to_xmm_mem_aligned<C: Context>(
+    ctx: &mut C,
+    arg0: &SyntheticAmode,
+) -> XmmMemAligned {
+    let v1 = &constructor_synthetic_amode_to_xmm_mem(ctx, arg0);
+    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, v1);
+    // Rule at src/isa/x64/inst.isle line 5031.
+    return v2.clone();
+}
+
+// Generated as internal constructor for term put_in_xmm_mem_aligned.
+pub fn constructor_put_in_xmm_mem_aligned<C: Context>(ctx: &mut C, arg0: Value) -> XmmMemAligned {
+    let v1 = &C::put_in_xmm_mem(ctx, arg0);
+    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, v1);
+    // Rule at src/isa/x64/inst.isle line 5033.
+    return v2.clone();
+}
+
+// Generated as internal constructor for term mov_to_preg.
+pub fn constructor_mov_to_preg<C: Context>(
+    ctx: &mut C,
+    arg0: PReg,
+    arg1: Gpr,
+) -> SideEffectNoResult {
+    let v2 = MInst::MovToPReg {
+        src: arg1,
+        dst: arg0,
+    };
+    let v3 = SideEffectNoResult::Inst { inst: v2 };
+    // Rule at src/isa/x64/inst.isle line 5036.
+    return v3;
+}
+
+// Generated as internal constructor for term x64_rbp.
+pub fn constructor_x64_rbp<C: Context>(ctx: &mut C) -> Reg {
+    let v0 = C::preg_rbp(ctx);
+    let v1 = constructor_mov_from_preg(ctx, v0);
+    // Rule at src/isa/x64/inst.isle line 5049.
+    return v1;
+}
+
+// Generated as internal constructor for term x64_rsp.
+pub fn constructor_x64_rsp<C: Context>(ctx: &mut C) -> Reg {
+    let v0 = C::preg_rsp(ctx);
+    let v1 = constructor_mov_from_preg(ctx, v0);
+    // Rule at src/isa/x64/inst.isle line 5053.
+    return v1;
+}
+
+// Generated as internal constructor for term lower.
+pub fn constructor_lower<C: Context>(ctx: &mut C, arg0: Inst) -> Option<InstOutput> {
+    let v6 = &C::inst_data(ctx, arg0);
+    match v6 {
+        &InstructionData::AtomicCas {
+            opcode: ref v1666,
+            args: ref v1667,
+            flags: v1668,
+        } => {
+            if let &Opcode::AtomicCas = v1666 {
+                let v1 = C::first_result(ctx, arg0);
+                if let Some(v2) = v1 {
+                    let v3 = C::value_type(ctx, v2);
+                    let v4 = C::fits_in_64(ctx, v3);
+                    if let Some(v5) = v4 {
+                        let v1641 = C::ty_int(ctx, v3);
+                        if let Some(v1642) = v1641 {
+                            let v1669 = C::unpack_value_array_3(ctx, v1667);
+                            let v1673 = constructor_put_in_gpr(ctx, v1669.1);
+                            let v1674 = constructor_put_in_gpr(ctx, v1669.2);
+                            let v1675 = C::zero_offset(ctx);
+                            let v1676 = &constructor_to_amode(ctx, v1668, v1669.0, v1675);
+                            let v1677 = &C::amode_to_synthetic_amode(ctx, v1676);
+                            let v1678 = constructor_x64_cmpxchg(ctx, v5, v1673, v1674, v1677);
+                            let v1679 = constructor_output_gpr(ctx, v1678);
+                            // Rule at src/isa/x64/lower.isle line 3163.
+                            return Some(v1679);
+                        }
+                    }
+                }
+            }
+        }
+        &InstructionData::AtomicRmw {
+            opcode: ref v1680,
+            args: ref v1681,
+            flags: v1682,
+            op: ref v1683,
+        } => {
+            if let &Opcode::AtomicRmw = v1680 {
+                let v1 = C::first_result(ctx, arg0);
+                if let Some(v2) = v1 {
+                    let v3 = C::value_type(ctx, v2);
+                    let v4 = C::fits_in_64(ctx, v3);
+                    if let Some(v5) = v4 {
+                        let v1641 = C::ty_int(ctx, v3);
+                        if let Some(v1642) = v1641 {
+                            let v1687 = &C::atomic_rmw_op_to_mach_atomic_rmw_op(ctx, v1683);
+                            let v1643 = C::zero_offset(ctx);
+                            let v1684 = C::unpack_value_array_2(ctx, v1681);
+                            let v1688 = &constructor_to_amode(ctx, v1682, v1684.0, v1643);
+                            let v1689 = &C::amode_to_synthetic_amode(ctx, v1688);
+                            let v1690 = constructor_put_in_gpr(ctx, v1684.1);
+                            let v1691 =
+                                constructor_x64_atomic_rmw_seq(ctx, v5, v1687, v1689, v1690);
+                            let v1692 = constructor_output_gpr(ctx, v1691);
+                            // Rule at src/isa/x64/lower.isle line 3179.
+                            return Some(v1692);
+                        }
+                    }
+                }
+            }
+        }
+        &InstructionData::Binary {
+            opcode: ref v36,
+            args: ref v37,
+        } => {
+            match v36 {
+                &Opcode::Swizzle => {
+                    let v38 = C::unpack_value_array_2(ctx, v37);
+                    let v1180 = constructor_put_in_xmm(ctx, v38.1);
+                    let v2274 = C::emit_u128_le_const(ctx, 0x70707070707070707070707070707070);
+                    let v2275 = &constructor_const_to_xmm_mem(ctx, v2274);
+                    let v2276 = constructor_x64_paddusb(ctx, v1180, v2275);
+                    let v339 = constructor_put_in_xmm(ctx, v38.0);
+                    let v2277 = C::xmm_to_reg(ctx, v2276);
+                    let v2278 = &constructor_xmm_to_reg_mem(ctx, v2277);
+                    let v2279 = &C::xmm_mem_to_reg_mem(ctx, v2278);
+                    let v2280 = constructor_lower_pshufb(ctx, v339, v2279);
+                    let v2281 = constructor_output_xmm(ctx, v2280);
+                    // Rule at src/isa/x64/lower.isle line 4272.
+                    return Some(v2281);
+                }
+                &Opcode::X86Pshufb => {
+                    let v520 = C::use_ssse3(ctx);
+                    if v520 == true {
+                        let v38 = C::unpack_value_array_2(ctx, v37);
+                        let v68 = constructor_put_in_xmm(ctx, v38.0);
+                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
+                        let v2282 = constructor_x64_pshufb(ctx, v68, v69);
+                        let v2283 = constructor_output_xmm(ctx, v2282);
+                        // Rule at src/isa/x64/lower.isle line 4278.
+                        return Some(v2283);
+                    }
+                }
+                &Opcode::Smin => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v682 = C::ty_vec128(ctx, v3);
+                        if let Some(v683) = v682 {
+                            let v686 = constructor_has_pmins(ctx, v683);
+                            if v686 == true {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
+                                let v687 = constructor_x64_pmins(ctx, v683, v68, v69);
+                                let v688 = constructor_output_xmm(ctx, v687);
+                                // Rule at src/isa/x64/lower.isle line 1630.
+                                return Some(v688);
+                            }
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v68 = constructor_put_in_xmm(ctx, v38.0);
+                            let v439 = constructor_put_in_xmm(ctx, v38.1);
+                            let v312 = &C::xmm_to_xmm_mem(ctx, v68);
+                            let v689 = constructor_x64_pcmpgt(ctx, v683, v439, v312);
+                            let v314 = &C::xmm_to_xmm_mem(ctx, v68);
+                            let v690 = constructor_x64_pand(ctx, v689, v314);
+                            let v444 = &C::xmm_to_xmm_mem(ctx, v439);
+                            let v691 = constructor_x64_pandn(ctx, v689, v444);
+                            let v692 = &C::xmm_to_xmm_mem(ctx, v691);
+                            let v693 = constructor_x64_por(ctx, v690, v692);
+                            let v694 = constructor_output_xmm(ctx, v693);
+                            // Rule at src/isa/x64/lower.isle line 1634.
+                            return Some(v694);
+                        }
+                        let v4 = C::fits_in_64(ctx, v3);
+                        if let Some(v5) = v4 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v677 = constructor_cmp_and_choose(ctx, v5, &CC::L, v38.0, v38.1);
+                            let v678 = C::output(ctx, v677);
+                            // Rule at src/isa/x64/lower.isle line 1580.
+                            return Some(v678);
+                        }
+                    }
+                }
+                &Opcode::Umin => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v682 = C::ty_vec128(ctx, v3);
+                        if let Some(v683) = v682 {
+                            let v716 = constructor_has_pminu(ctx, v683);
+                            if v716 == true {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
+                                let v717 = constructor_x64_pminu(ctx, v683, v68, v69);
+                                let v718 = constructor_output_xmm(ctx, v717);
+                                // Rule at src/isa/x64/lower.isle line 1682.
+                                return Some(v718);
+                            }
+                        }
+                        if v3 == I16X8 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v68 = constructor_put_in_xmm(ctx, v38.0);
+                            let v69 = &C::put_in_xmm_mem(ctx, v38.1);
+                            let v150 = constructor_x64_psubusw(ctx, v68, v69);
+                            let v719 = &C::xmm_to_xmm_mem(ctx, v150);
+                            let v720 = constructor_x64_psubw(ctx, v68, v719);
+                            let v721 = constructor_output_xmm(ctx, v720);
+                            // Rule at src/isa/x64/lower.isle line 1688.
+                            return Some(v721);
+                        }
+                        if let Some(v683) = v682 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v68 = constructor_put_in_xmm(ctx, v38.0);
+                            let v439 = constructor_put_in_xmm(ctx, v38.1);
+                            let v702 = constructor_flip_high_bit_mask(ctx, v683);
+                            let v703 = &C::xmm_to_xmm_mem(ctx, v702);
+                            let v704 = constructor_x64_pxor(ctx, v68, v703);
+                            let v705 = &C::xmm_to_xmm_mem(ctx, v702);
+                            let v706 = constructor_x64_pxor(ctx, v439, v705);
+                            let v722 = &C::xmm_to_xmm_mem(ctx, v704);
+                            let v723 = constructor_x64_pcmpgt(ctx, v683, v706, v722);
+                            let v709 = &C::xmm_to_xmm_mem(ctx, v68);
+                            let v724 = constructor_x64_pand(ctx, v723, v709);
+                            let v711 = &C::xmm_to_xmm_mem(ctx, v439);
+                            let v725 = constructor_x64_pandn(ctx, v723, v711);
+                            let v726 = &C::xmm_to_xmm_mem(ctx, v725);
+                            let v727 = constructor_x64_por(ctx, v724, v726);
+                            let v728 = constructor_output_xmm(ctx, v727);
+                            // Rule at src/isa/x64/lower.isle line 1693.
+                            return Some(v728);
+                        }
+                        let v4 = C::fits_in_64(ctx, v3);
+                        if let Some(v5) = v4 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v671 = constructor_cmp_and_choose(ctx, v5, &CC::B, v38.0, v38.1);
+                            let v672 = C::output(ctx, v671);
+                            // Rule at src/isa/x64/lower.isle line 1574.
+                            return Some(v672);
+                        }
+                    }
+                }
+                &Opcode::Smax => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v682 = C::ty_vec128(ctx, v3);
+                        if let Some(v683) = v682 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v68 = constructor_put_in_xmm(ctx, v38.0);
+                            let v439 = constructor_put_in_xmm(ctx, v38.1);
+                            let v684 = constructor_lower_vec_smax(ctx, v683, v68, v439);
+                            let v685 = constructor_output_xmm(ctx, v684);
+                            // Rule at src/isa/x64/lower.isle line 1610.
+                            return Some(v685);
+                        }
+                        let v4 = C::fits_in_64(ctx, v3);
+                        if let Some(v5) = v4 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v680 = constructor_cmp_and_choose(ctx, v5, &CC::NL, v38.0, v38.1);
+                            let v681 = C::output(ctx, v680);
+                            // Rule at src/isa/x64/lower.isle line 1583.
+                            return Some(v681);
+                        }
+                    }
+                }
+                &Opcode::Umax => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v682 = C::ty_vec128(ctx, v3);
+                        if let Some(v683) = v682 {
+                            let v695 = constructor_has_pmaxu(ctx, v683);
+                            if v695 == true {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
+                                let v696 = constructor_x64_pmaxu(ctx, v683, v68, v69);
+                                let v697 = constructor_output_xmm(ctx, v696);
+                                // Rule at src/isa/x64/lower.isle line 1646.
+                                return Some(v697);
+                            }
+                        }
+                        if v3 == I16X8 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v68 = constructor_put_in_xmm(ctx, v38.0);
+                            let v439 = constructor_put_in_xmm(ctx, v38.1);
+                            let v312 = &C::xmm_to_xmm_mem(ctx, v68);
+                            let v698 = constructor_x64_psubusw(ctx, v439, v312);
+                            let v699 = &C::xmm_to_xmm_mem(ctx, v698);
+                            let v700 = constructor_x64_paddw(ctx, v68, v699);
+                            let v701 = constructor_output_xmm(ctx, v700);
+                            // Rule at src/isa/x64/lower.isle line 1652.
+                            return Some(v701);
+                        }
+                        if let Some(v683) = v682 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v68 = constructor_put_in_xmm(ctx, v38.0);
+                            let v439 = constructor_put_in_xmm(ctx, v38.1);
+                            let v702 = constructor_flip_high_bit_mask(ctx, v683);
+                            let v703 = &C::xmm_to_xmm_mem(ctx, v702);
+                            let v704 = constructor_x64_pxor(ctx, v68, v703);
+                            let v705 = &C::xmm_to_xmm_mem(ctx, v702);
+                            let v706 = constructor_x64_pxor(ctx, v439, v705);
+                            let v707 = &C::xmm_to_xmm_mem(ctx, v706);
+                            let v708 = constructor_x64_pcmpgt(ctx, v683, v704, v707);
+                            let v709 = &C::xmm_to_xmm_mem(ctx, v68);
+                            let v710 = constructor_x64_pand(ctx, v708, v709);
+                            let v711 = &C::xmm_to_xmm_mem(ctx, v439);
+                            let v712 = constructor_x64_pandn(ctx, v708, v711);
+                            let v713 = &C::xmm_to_xmm_mem(ctx, v712);
+                            let v714 = constructor_x64_por(ctx, v710, v713);
+                            let v715 = constructor_output_xmm(ctx, v714);
+                            // Rule at src/isa/x64/lower.isle line 1659.
+                            return Some(v715);
+                        }
+                        let v4 = C::fits_in_64(ctx, v3);
+                        if let Some(v5) = v4 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v674 = constructor_cmp_and_choose(ctx, v5, &CC::NB, v38.0, v38.1);
+                            let v675 = C::output(ctx, v674);
+                            // Rule at src/isa/x64/lower.isle line 1577.
+                            return Some(v675);
+                        }
+                    }
+                }
+                &Opcode::AvgRound => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v64 = C::multi_lane(ctx, v3);
+                        if let Some(v65) = v64 {
+                            match v65.0 {
+                                0x8 => {
+                                    if v65.1 == 0x10 {
+                                        let v38 = C::unpack_value_array_2(ctx, v37);
+                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
+                                        let v410 = constructor_x64_pavgb(ctx, v68, v69);
+                                        let v411 = constructor_output_xmm(ctx, v410);
+                                        // Rule at src/isa/x64/lower.isle line 929.
+                                        return Some(v411);
+                                    }
+                                }
+                                0x10 => {
+                                    if v65.1 == 0x8 {
+                                        let v38 = C::unpack_value_array_2(ctx, v37);
+                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
+                                        let v412 = constructor_x64_pavgw(ctx, v68, v69);
+                                        let v413 = constructor_output_xmm(ctx, v412);
+                                        // Rule at src/isa/x64/lower.isle line 933.
+                                        return Some(v413);
+                                    }
+                                }
+                                _ => {}
+                            }
+                        }
+                    }
+                }
+                &Opcode::UaddSat => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v64 = C::multi_lane(ctx, v3);
+                        if let Some(v65) = v64 {
+                            match v65.0 {
+                                0x8 => {
+                                    if v65.1 == 0x10 {
+                                        let v38 = C::unpack_value_array_2(ctx, v37);
+                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
+                                        let v126 = constructor_x64_paddusb(ctx, v68, v69);
+                                        let v127 = constructor_output_xmm(ctx, v126);
+                                        // Rule at src/isa/x64/lower.isle line 194.
+                                        return Some(v127);
+                                    }
+                                }
+                                0x10 => {
+                                    if v65.1 == 0x8 {
+                                        let v38 = C::unpack_value_array_2(ctx, v37);
+                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
+                                        let v128 = constructor_x64_paddusw(ctx, v68, v69);
+                                        let v129 = constructor_output_xmm(ctx, v128);
+                                        // Rule at src/isa/x64/lower.isle line 198.
+                                        return Some(v129);
+                                    }
+                                }
+                                _ => {}
+                            }
+                        }
+                    }
+                }
+                &Opcode::SaddSat => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v64 = C::multi_lane(ctx, v3);
+                        if let Some(v65) = v64 {
+                            match v65.0 {
+                                0x8 => {
+                                    if v65.1 == 0x10 {
+                                        let v38 = C::unpack_value_array_2(ctx, v37);
+                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
+                                        let v122 = constructor_x64_paddsb(ctx, v68, v69);
+                                        let v123 = constructor_output_xmm(ctx, v122);
+                                        // Rule at src/isa/x64/lower.isle line 184.
+                                        return Some(v123);
+                                    }
+                                }
+                                0x10 => {
+                                    if v65.1 == 0x8 {
+                                        let v38 = C::unpack_value_array_2(ctx, v37);
+                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
+                                        let v124 = constructor_x64_paddsw(ctx, v68, v69);
+                                        let v125 = constructor_output_xmm(ctx, v124);
+                                        // Rule at src/isa/x64/lower.isle line 188.
+                                        return Some(v125);
+                                    }
+                                }
+                                _ => {}
+                            }
+                        }
+                    }
+                }
+                &Opcode::UsubSat => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v64 = C::multi_lane(ctx, v3);
+                        if let Some(v65) = v64 {
+                            match v65.0 {
+                                0x8 => {
+                                    if v65.1 == 0x10 {
+                                        let v38 = C::unpack_value_array_2(ctx, v37);
+                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
+                                        let v148 = constructor_x64_psubusb(ctx, v68, v69);
+                                        let v149 = constructor_output_xmm(ctx, v148);
+                                        // Rule at src/isa/x64/lower.isle line 255.
+                                        return Some(v149);
+                                    }
+                                }
+                                0x10 => {
+                                    if v65.1 == 0x8 {
+                                        let v38 = C::unpack_value_array_2(ctx, v37);
+                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
+                                        let v150 = constructor_x64_psubusw(ctx, v68, v69);
+                                        let v151 = constructor_output_xmm(ctx, v150);
+                                        // Rule at src/isa/x64/lower.isle line 259.
+                                        return Some(v151);
+                                    }
+                                }
+                                _ => {}
+                            }
+                        }
+                    }
+                }
+                &Opcode::SsubSat => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v64 = C::multi_lane(ctx, v3);
+                        if let Some(v65) = v64 {
+                            match v65.0 {
+                                0x8 => {
+                                    if v65.1 == 0x10 {
+                                        let v38 = C::unpack_value_array_2(ctx, v37);
+                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
+                                        let v144 = constructor_x64_psubsb(ctx, v68, v69);
+                                        let v145 = constructor_output_xmm(ctx, v144);
+                                        // Rule at src/isa/x64/lower.isle line 245.
+                                        return Some(v145);
+                                    }
+                                }
+                                0x10 => {
+                                    if v65.1 == 0x8 {
+                                        let v38 = C::unpack_value_array_2(ctx, v37);
+                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
+                                        let v146 = constructor_x64_psubsw(ctx, v68, v69);
+                                        let v147 = constructor_output_xmm(ctx, v146);
+                                        // Rule at src/isa/x64/lower.isle line 249.
+                                        return Some(v147);
+                                    }
+                                }
+                                _ => {}
+                            }
+                        }
+                    }
+                }
+                &Opcode::Iadd => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        if v3 == I128 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v78 = C::put_in_regs(ctx, v38.0);
+                            let v80 = constructor_value_regs_get_gpr(ctx, v78, 0x0);
+                            let v82 = constructor_value_regs_get_gpr(ctx, v78, 0x1);
+                            let v83 = C::put_in_regs(ctx, v38.1);
+                            let v84 = constructor_value_regs_get_gpr(ctx, v83, 0x0);
+                            let v85 = constructor_value_regs_get_gpr(ctx, v83, 0x1);
+                            let v86 = &C::gpr_to_gpr_mem_imm(ctx, v84);
+                            let v87 = &constructor_x64_add_with_flags_paired(ctx, I64, v80, v86);
+                            let v88 = &C::gpr_to_gpr_mem_imm(ctx, v85);
+                            let v89 = &constructor_x64_adc_paired(ctx, I64, v82, v88);
+                            let v90 = constructor_with_flags(ctx, v87, v89);
+                            let v91 = C::output(ctx, v90);
+                            // Rule at src/isa/x64/lower.isle line 88.
+                            return Some(v91);
+                        }
+                        let v64 = C::multi_lane(ctx, v3);
+                        if let Some(v65) = v64 {
+                            match v65.0 {
+                                0x8 => {
+                                    if v65.1 == 0x10 {
+                                        let v38 = C::unpack_value_array_2(ctx, v37);
+                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
+                                        let v70 = constructor_x64_paddb(ctx, v68, v69);
+                                        let v71 = constructor_output_xmm(ctx, v70);
+                                        // Rule at src/isa/x64/lower.isle line 71.
+                                        return Some(v71);
+                                    }
+                                }
+                                0x10 => {
+                                    if v65.1 == 0x8 {
+                                        let v38 = C::unpack_value_array_2(ctx, v37);
+                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
+                                        let v72 = constructor_x64_paddw(ctx, v68, v69);
+                                        let v73 = constructor_output_xmm(ctx, v72);
+                                        // Rule at src/isa/x64/lower.isle line 75.
+                                        return Some(v73);
+                                    }
+                                }
+                                0x20 => {
+                                    if v65.1 == 0x4 {
+                                        let v38 = C::unpack_value_array_2(ctx, v37);
+                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
+                                        let v74 = constructor_x64_paddd(ctx, v68, v69);
+                                        let v75 = constructor_output_xmm(ctx, v74);
+                                        // Rule at src/isa/x64/lower.isle line 79.
+                                        return Some(v75);
+                                    }
+                                }
+                                0x40 => {
+                                    if v65.1 == 0x2 {
+                                        let v38 = C::unpack_value_array_2(ctx, v37);
+                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
+                                        let v76 = constructor_x64_paddq(ctx, v68, v69);
+                                        let v77 = constructor_output_xmm(ctx, v76);
+                                        // Rule at src/isa/x64/lower.isle line 83.
+                                        return Some(v77);
+                                    }
+                                }
+                                _ => {}
+                            }
+                        }
+                        let v4 = C::fits_in_64(ctx, v3);
+                        if let Some(v5) = v4 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v58 = &C::sinkable_load(ctx, v38.0);
+                            if let Some(v59) = v58 {
+                                let v60 = constructor_put_in_gpr(ctx, v38.1);
+                                let v61 = &constructor_sink_load_to_gpr_mem_imm(ctx, v59);
+                                let v62 = constructor_x64_add(ctx, v5, v60, v61);
+                                let v63 = constructor_output_gpr(ctx, v62);
+                                // Rule at src/isa/x64/lower.isle line 65.
+                                return Some(v63);
+                            }
+                            let v53 = &C::sinkable_load(ctx, v38.1);
+                            if let Some(v54) = v53 {
+                                let v41 = constructor_put_in_gpr(ctx, v38.0);
+                                let v55 = &constructor_sink_load_to_gpr_mem_imm(ctx, v54);
+                                let v56 = constructor_x64_add(ctx, v5, v41, v55);
+                                let v57 = constructor_output_gpr(ctx, v56);
+                                // Rule at src/isa/x64/lower.isle line 62.
+                                return Some(v57);
+                            }
+                        }
+                        let v45 = C::ty_32_or_64(ctx, v3);
+                        if let Some(v46) = v45 {
+                            let v48 = C::zero_offset(ctx);
+                            let v47 = C::mem_flags_trusted(ctx);
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v49 = &constructor_to_amode_add(ctx, v47, v38.0, v38.1, v48);
+                            let v50 = &C::amode_to_synthetic_amode(ctx, v49);
+                            let v51 = constructor_x64_lea(ctx, v46, v50);
+                            let v52 = constructor_output_gpr(ctx, v51);
+                            // Rule at src/isa/x64/lower.isle line 56.
+                            return Some(v52);
+                        }
+                        let v34 = C::fits_in_16(ctx, v3);
+                        if let Some(v35) = v34 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v41 = constructor_put_in_gpr(ctx, v38.0);
+                            let v42 = &constructor_put_in_gpr_mem_imm(ctx, v38.1);
+                            let v43 = constructor_x64_add(ctx, v35, v41, v42);
+                            let v44 = constructor_output_gpr(ctx, v43);
+                            // Rule at src/isa/x64/lower.isle line 45.
+                            return Some(v44);
+                        }
+                    }
+                }
+                &Opcode::Isub => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        if v3 == I128 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v78 = C::put_in_regs(ctx, v38.0);
+                            let v80 = constructor_value_regs_get_gpr(ctx, v78, 0x0);
+                            let v82 = constructor_value_regs_get_gpr(ctx, v78, 0x1);
+                            let v83 = C::put_in_regs(ctx, v38.1);
+                            let v84 = constructor_value_regs_get_gpr(ctx, v83, 0x0);
+                            let v85 = constructor_value_regs_get_gpr(ctx, v83, 0x1);
+                            let v86 = &C::gpr_to_gpr_mem_imm(ctx, v84);
+                            let v140 = &constructor_x64_sub_with_flags_paired(ctx, I64, v80, v86);
+                            let v88 = &C::gpr_to_gpr_mem_imm(ctx, v85);
+                            let v141 = &constructor_x64_sbb_paired(ctx, I64, v82, v88);
+                            let v142 = constructor_with_flags(ctx, v140, v141);
+                            let v143 = C::output(ctx, v142);
+                            // Rule at src/isa/x64/lower.isle line 230.
+                            return Some(v143);
+                        }
+                        let v64 = C::multi_lane(ctx, v3);
+                        if let Some(v65) = v64 {
+                            match v65.0 {
+                                0x8 => {
+                                    if v65.1 == 0x10 {
+                                        let v38 = C::unpack_value_array_2(ctx, v37);
+                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
+                                        let v132 = constructor_x64_psubb(ctx, v68, v69);
+                                        let v133 = constructor_output_xmm(ctx, v132);
+                                        // Rule at src/isa/x64/lower.isle line 213.
+                                        return Some(v133);
+                                    }
+                                }
+                                0x10 => {
+                                    if v65.1 == 0x8 {
+                                        let v38 = C::unpack_value_array_2(ctx, v37);
+                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
+                                        let v134 = constructor_x64_psubw(ctx, v68, v69);
+                                        let v135 = constructor_output_xmm(ctx, v134);
+                                        // Rule at src/isa/x64/lower.isle line 217.
+                                        return Some(v135);
+                                    }
+                                }
+                                0x20 => {
+                                    if v65.1 == 0x4 {
+                                        let v38 = C::unpack_value_array_2(ctx, v37);
+                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
+                                        let v136 = constructor_x64_psubd(ctx, v68, v69);
+                                        let v137 = constructor_output_xmm(ctx, v136);
+                                        // Rule at src/isa/x64/lower.isle line 221.
+                                        return Some(v137);
+                                    }
+                                }
+                                0x40 => {
+                                    if v65.1 == 0x2 {
+                                        let v38 = C::unpack_value_array_2(ctx, v37);
+                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
+                                        let v138 = constructor_x64_psubq(ctx, v68, v69);
+                                        let v139 = constructor_output_xmm(ctx, v138);
+                                        // Rule at src/isa/x64/lower.isle line 225.
+                                        return Some(v139);
+                                    }
+                                }
+                                _ => {}
+                            }
+                        }
+                        let v4 = C::fits_in_64(ctx, v3);
+                        if let Some(v5) = v4 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v41 = constructor_put_in_gpr(ctx, v38.0);
+                            let v42 = &constructor_put_in_gpr_mem_imm(ctx, v38.1);
+                            let v130 = constructor_x64_sub(ctx, v5, v41, v42);
+                            let v131 = constructor_output_gpr(ctx, v130);
+                            // Rule at src/isa/x64/lower.isle line 207.
+                            return Some(v131);
+                        }
+                    }
+                }
+                &Opcode::Imul => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v64 = C::multi_lane(ctx, v3);
+                        if let Some(v65) = v64 {
+                            if v65.0 == 0x40 {
+                                if v65.1 == 0x2 {
+                                    let v328 = C::use_avx512vl(ctx);
+                                    if v328 == true {
+                                        let v456 = C::use_avx512dq(ctx);
+                                        if v456 == true {
+                                            let v38 = C::unpack_value_array_2(ctx, v37);
+                                            let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                            let v69 = &C::put_in_xmm_mem(ctx, v38.1);
+                                            let v457 = constructor_x64_vpmullq(ctx, v68, v69);
+                                            let v458 = constructor_output_xmm(ctx, v457);
+                                            // Rule at src/isa/x64/lower.isle line 1020.
+                                            return Some(v458);
+                                        }
+                                    }
+                                }
+                            }
+                        }
+                        if v3 == I128 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v78 = C::put_in_regs(ctx, v38.0);
+                            let v80 = constructor_value_regs_get_gpr(ctx, v78, 0x0);
+                            let v82 = constructor_value_regs_get_gpr(ctx, v78, 0x1);
+                            let v83 = C::put_in_regs(ctx, v38.1);
+                            let v84 = constructor_value_regs_get_gpr(ctx, v83, 0x0);
+                            let v85 = constructor_value_regs_get_gpr(ctx, v83, 0x1);
+                            let v420 = &C::gpr_to_gpr_mem_imm(ctx, v85);
+                            let v421 = constructor_x64_mul(ctx, I64, v80, v420);
+                            let v422 = &C::gpr_to_gpr_mem_imm(ctx, v84);
+                            let v423 = constructor_x64_mul(ctx, I64, v82, v422);
+                            let v424 = &C::gpr_to_gpr_mem_imm(ctx, v423);
+                            let v425 = constructor_x64_add(ctx, I64, v421, v424);
+                            let v426 = &C::gpr_to_gpr_mem(ctx, v84);
+                            let v427 = constructor_mulhi_u(ctx, I64, v80, v426);
+                            let v428 = constructor_value_regs_get_gpr(ctx, v427, 0x0);
+                            let v429 = constructor_value_regs_get_gpr(ctx, v427, 0x1);
+                            let v430 = &C::gpr_to_gpr_mem_imm(ctx, v429);
+                            let v431 = constructor_x64_add(ctx, I64, v425, v430);
+                            let v432 = constructor_value_gprs(ctx, v428, v431);
+                            let v433 = C::output(ctx, v432);
+                            // Rule at src/isa/x64/lower.isle line 970.
+                            return Some(v433);
+                        }
+                        if let Some(v65) = v64 {
+                            match v65.0 {
+                                0x10 => {
+                                    if v65.1 == 0x8 {
+                                        let v38 = C::unpack_value_array_2(ctx, v37);
+                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
+                                        let v434 = constructor_x64_pmullw(ctx, v68, v69);
+                                        let v435 = constructor_output_xmm(ctx, v434);
+                                        // Rule at src/isa/x64/lower.isle line 997.
+                                        return Some(v435);
+                                    }
+                                }
+                                0x20 => {
+                                    if v65.1 == 0x4 {
+                                        let v38 = C::unpack_value_array_2(ctx, v37);
+                                        let v172 = C::def_inst(ctx, v38.1);
+                                        if let Some(v173) = v172 {
+                                            let v174 = &C::inst_data(ctx, v173);
+                                            if let &InstructionData::Unary {
+                                                opcode: ref v175,
+                                                arg: v176,
+                                            } = v174
+                                            {
+                                                match v175 {
+                                                    &Opcode::SwidenLow => {
+                                                        let v181 = C::def_inst(ctx, v38.0);
+                                                        if let Some(v182) = v181 {
+                                                            let v183 = &C::inst_data(ctx, v182);
+                                                            if let &InstructionData::Unary {
+                                                                opcode: ref v184,
+                                                                arg: v185,
+                                                            } = v183
+                                                            {
+                                                                if let &Opcode::SwidenLow = v184 {
+                                                                    let v476 =
+                                                                        C::value_type(ctx, v185);
+                                                                    let v477 =
+                                                                        C::multi_lane(ctx, v476);
+                                                                    if let Some(v478) = v477 {
+                                                                        if v478.0 == 0x10 {
+                                                                            if v478.1 == 0x8 {
+                                                                                let v481 =
+                                                                                    C::value_type(
+                                                                                        ctx, v176,
+                                                                                    );
+                                                                                let v482 =
+                                                                                    C::multi_lane(
+                                                                                        ctx, v481,
+                                                                                    );
+                                                                                if let Some(v483) =
+                                                                                    v482
+                                                                                {
+                                                                                    if v483.0
+                                                                                        == 0x10
+                                                                                    {
+                                                                                        if v483.1
+                                                                                            == 0x8
+                                                                                        {
+                                                                                            let v186 = constructor_put_in_xmm(ctx, v185);
+                                                                                            let v486 = constructor_put_in_xmm(ctx, v176);
+                                                                                            let v487 = &C::xmm_to_xmm_mem(ctx, v486);
+                                                                                            let v488 = constructor_x64_pmullw(ctx, v186, v487);
+                                                                                            let v489 = &C::xmm_to_xmm_mem(ctx, v486);
+                                                                                            let v490 = constructor_x64_pmulhw(ctx, v186, v489);
+                                                                                            let v491 = &C::xmm_to_xmm_mem(ctx, v490);
+                                                                                            let v502 = constructor_x64_punpcklwd(ctx, v488, v491);
+                                                                                            let v503 = constructor_output_xmm(ctx, v502);
+                                                                                            // Rule at src/isa/x64/lower.isle line 1090.
+                                                                                            return Some(v503);
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                    &Opcode::SwidenHigh => {
+                                                        let v181 = C::def_inst(ctx, v38.0);
+                                                        if let Some(v182) = v181 {
+                                                            let v183 = &C::inst_data(ctx, v182);
+                                                            if let &InstructionData::Unary {
+                                                                opcode: ref v184,
+                                                                arg: v185,
+                                                            } = v183
+                                                            {
+                                                                if let &Opcode::SwidenHigh = v184 {
+                                                                    let v476 =
+                                                                        C::value_type(ctx, v185);
+                                                                    let v477 =
+                                                                        C::multi_lane(ctx, v476);
+                                                                    if let Some(v478) = v477 {
+                                                                        if v478.0 == 0x10 {
+                                                                            if v478.1 == 0x8 {
+                                                                                let v481 =
+                                                                                    C::value_type(
+                                                                                        ctx, v176,
+                                                                                    );
+                                                                                let v482 =
+                                                                                    C::multi_lane(
+                                                                                        ctx, v481,
+                                                                                    );
+                                                                                if let Some(v483) =
+                                                                                    v482
+                                                                                {
+                                                                                    if v483.0
+                                                                                        == 0x10
+                                                                                    {
+                                                                                        if v483.1
+                                                                                            == 0x8
+                                                                                        {
+                                                                                            let v186 = constructor_put_in_xmm(ctx, v185);
+                                                                                            let v486 = constructor_put_in_xmm(ctx, v176);
+                                                                                            let v487 = &C::xmm_to_xmm_mem(ctx, v486);
+                                                                                            let v488 = constructor_x64_pmullw(ctx, v186, v487);
+                                                                                            let v489 = &C::xmm_to_xmm_mem(ctx, v486);
+                                                                                            let v490 = constructor_x64_pmulhw(ctx, v186, v489);
+                                                                                            let v491 = &C::xmm_to_xmm_mem(ctx, v490);
+                                                                                            let v492 = constructor_x64_punpckhwd(ctx, v488, v491);
+                                                                                            let v493 = constructor_output_xmm(ctx, v492);
+                                                                                            // Rule at src/isa/x64/lower.isle line 1067.
+                                                                                            return Some(v493);
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                    &Opcode::UwidenLow => {
+                                                        let v181 = C::def_inst(ctx, v38.0);
+                                                        if let Some(v182) = v181 {
+                                                            let v183 = &C::inst_data(ctx, v182);
+                                                            if let &InstructionData::Unary {
+                                                                opcode: ref v184,
+                                                                arg: v185,
+                                                            } = v183
+                                                            {
+                                                                if let &Opcode::UwidenLow = v184 {
+                                                                    let v476 =
+                                                                        C::value_type(ctx, v185);
+                                                                    let v477 =
+                                                                        C::multi_lane(ctx, v476);
+                                                                    if let Some(v478) = v477 {
+                                                                        if v478.0 == 0x10 {
+                                                                            if v478.1 == 0x8 {
+                                                                                let v481 =
+                                                                                    C::value_type(
+                                                                                        ctx, v176,
+                                                                                    );
+                                                                                let v482 =
+                                                                                    C::multi_lane(
+                                                                                        ctx, v481,
+                                                                                    );
+                                                                                if let Some(v483) =
+                                                                                    v482
+                                                                                {
+                                                                                    if v483.0
+                                                                                        == 0x10
+                                                                                    {
+                                                                                        if v483.1
+                                                                                            == 0x8
+                                                                                        {
+                                                                                            let v186 = constructor_put_in_xmm(ctx, v185);
+                                                                                            let v486 = constructor_put_in_xmm(ctx, v176);
+                                                                                            let v487 = &C::xmm_to_xmm_mem(ctx, v486);
+                                                                                            let v488 = constructor_x64_pmullw(ctx, v186, v487);
+                                                                                            let v489 = &C::xmm_to_xmm_mem(ctx, v486);
+                                                                                            let v510 = constructor_x64_pmulhuw(ctx, v186, v489);
+                                                                                            let v511 = &C::xmm_to_xmm_mem(ctx, v510);
+                                                                                            let v516 = constructor_x64_punpcklwd(ctx, v488, v511);
+                                                                                            let v517 = constructor_output_xmm(ctx, v516);
+                                                                                            // Rule at src/isa/x64/lower.isle line 1135.
+                                                                                            return Some(v517);
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                    &Opcode::UwidenHigh => {
+                                                        let v181 = C::def_inst(ctx, v38.0);
+                                                        if let Some(v182) = v181 {
+                                                            let v183 = &C::inst_data(ctx, v182);
+                                                            if let &InstructionData::Unary {
+                                                                opcode: ref v184,
+                                                                arg: v185,
+                                                            } = v183
+                                                            {
+                                                                if let &Opcode::UwidenHigh = v184 {
+                                                                    let v476 =
+                                                                        C::value_type(ctx, v185);
+                                                                    let v477 =
+                                                                        C::multi_lane(ctx, v476);
+                                                                    if let Some(v478) = v477 {
+                                                                        if v478.0 == 0x10 {
+                                                                            if v478.1 == 0x8 {
+                                                                                let v481 =
+                                                                                    C::value_type(
+                                                                                        ctx, v176,
+                                                                                    );
+                                                                                let v482 =
+                                                                                    C::multi_lane(
+                                                                                        ctx, v481,
+                                                                                    );
+                                                                                if let Some(v483) =
+                                                                                    v482
+                                                                                {
+                                                                                    if v483.0
+                                                                                        == 0x10
+                                                                                    {
+                                                                                        if v483.1
+                                                                                            == 0x8
+                                                                                        {
+                                                                                            let v186 = constructor_put_in_xmm(ctx, v185);
+                                                                                            let v486 = constructor_put_in_xmm(ctx, v176);
+                                                                                            let v487 = &C::xmm_to_xmm_mem(ctx, v486);
+                                                                                            let v488 = constructor_x64_pmullw(ctx, v186, v487);
+                                                                                            let v489 = &C::xmm_to_xmm_mem(ctx, v486);
+                                                                                            let v510 = constructor_x64_pmulhuw(ctx, v186, v489);
+                                                                                            let v511 = &C::xmm_to_xmm_mem(ctx, v510);
+                                                                                            let v512 = constructor_x64_punpckhwd(ctx, v488, v511);
+                                                                                            let v513 = constructor_output_xmm(ctx, v512);
+                                                                                            // Rule at src/isa/x64/lower.isle line 1113.
+                                                                                            return Some(v513);
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                    _ => {}
+                                                }
+                                            }
+                                        }
+                                        let v436 = C::use_sse41(ctx);
+                                        if v436 == true {
+                                            let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                            let v69 = &C::put_in_xmm_mem(ctx, v38.1);
+                                            let v437 = constructor_x64_pmulld(ctx, v68, v69);
+                                            let v438 = constructor_output_xmm(ctx, v437);
+                                            // Rule at src/isa/x64/lower.isle line 1000.
+                                            return Some(v438);
+                                        }
+                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                        let v439 = constructor_put_in_xmm(ctx, v38.1);
+                                        let v312 = &C::xmm_to_xmm_mem(ctx, v68);
+                                        let v441 = constructor_x64_pshufd(ctx, v312, 0x31);
+                                        let v442 = &C::xmm_to_xmm_mem(ctx, v439);
+                                        let v443 = constructor_x64_pshufd(ctx, v442, 0x31);
+                                        let v444 = &C::xmm_to_xmm_mem(ctx, v439);
+                                        let v445 = constructor_x64_pmuludq(ctx, v68, v444);
+                                        let v446 = &C::xmm_to_xmm_mem(ctx, v445);
+                                        let v448 = constructor_x64_pshufd(ctx, v446, 0x8);
+                                        let v449 = &C::xmm_to_xmm_mem(ctx, v443);
+                                        let v450 = constructor_x64_pmuludq(ctx, v441, v449);
+                                        let v451 = &C::xmm_to_xmm_mem(ctx, v450);
+                                        let v452 = constructor_x64_pshufd(ctx, v451, 0x8);
+                                        let v453 = &C::xmm_to_xmm_mem(ctx, v452);
+                                        let v454 = constructor_x64_punpckldq(ctx, v448, v453);
+                                        let v455 = constructor_output_xmm(ctx, v454);
+                                        // Rule at src/isa/x64/lower.isle line 1007.
+                                        return Some(v455);
+                                    }
+                                }
+                                0x40 => {
+                                    if v65.1 == 0x2 {
+                                        let v38 = C::unpack_value_array_2(ctx, v37);
+                                        let v172 = C::def_inst(ctx, v38.1);
+                                        if let Some(v173) = v172 {
+                                            let v174 = &C::inst_data(ctx, v173);
+                                            if let &InstructionData::Unary {
+                                                opcode: ref v175,
+                                                arg: v176,
+                                            } = v174
+                                            {
+                                                match v175 {
+                                                    &Opcode::SwidenLow => {
+                                                        let v181 = C::def_inst(ctx, v38.0);
+                                                        if let Some(v182) = v181 {
+                                                            let v183 = &C::inst_data(ctx, v182);
+                                                            if let &InstructionData::Unary {
+                                                                opcode: ref v184,
+                                                                arg: v185,
+                                                            } = v183
+                                                            {
+                                                                if let &Opcode::SwidenLow = v184 {
+                                                                    let v436 = C::use_sse41(ctx);
+                                                                    if v436 == true {
+                                                                        let v476 = C::value_type(
+                                                                            ctx, v185,
+                                                                        );
+                                                                        let v477 = C::multi_lane(
+                                                                            ctx, v476,
+                                                                        );
+                                                                        if let Some(v478) = v477 {
+                                                                            if v478.0 == 0x20 {
+                                                                                if v478.1 == 0x4 {
+                                                                                    let v481 = C::value_type(ctx, v176);
+                                                                                    let v482 = C::multi_lane(ctx, v481);
+                                                                                    if let Some(
+                                                                                        v483,
+                                                                                    ) = v482
+                                                                                    {
+                                                                                        if v483.0
+                                                                                            == 0x20
+                                                                                        {
+                                                                                            if v483.1 == 0x4 {
+                                                                                                let v494 = &C::put_in_xmm_mem(ctx, v185);
+                                                                                                let v505 = constructor_x64_pshufd(ctx, v494, 0x50);
+                                                                                                let v497 = &C::put_in_xmm_mem(ctx, v176);
+                                                                                                let v506 = constructor_x64_pshufd(ctx, v497, 0x50);
+                                                                                                let v507 = &C::xmm_to_xmm_mem(ctx, v506);
+                                                                                                let v508 = constructor_x64_pmuldq(ctx, v505, v507);
+                                                                                                let v509 = constructor_output_xmm(ctx, v508);
+                                                                                                // Rule at src/isa/x64/lower.isle line 1102.
+                                                                                                return Some(v509);
+                                                                                            }
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                    &Opcode::SwidenHigh => {
+                                                        let v181 = C::def_inst(ctx, v38.0);
+                                                        if let Some(v182) = v181 {
+                                                            let v183 = &C::inst_data(ctx, v182);
+                                                            if let &InstructionData::Unary {
+                                                                opcode: ref v184,
+                                                                arg: v185,
+                                                            } = v183
+                                                            {
+                                                                if let &Opcode::SwidenHigh = v184 {
+                                                                    let v436 = C::use_sse41(ctx);
+                                                                    if v436 == true {
+                                                                        let v476 = C::value_type(
+                                                                            ctx, v185,
+                                                                        );
+                                                                        let v477 = C::multi_lane(
+                                                                            ctx, v476,
+                                                                        );
+                                                                        if let Some(v478) = v477 {
+                                                                            if v478.0 == 0x20 {
+                                                                                if v478.1 == 0x4 {
+                                                                                    let v481 = C::value_type(ctx, v176);
+                                                                                    let v482 = C::multi_lane(ctx, v481);
+                                                                                    if let Some(
+                                                                                        v483,
+                                                                                    ) = v482
+                                                                                    {
+                                                                                        if v483.0
+                                                                                            == 0x20
+                                                                                        {
+                                                                                            if v483.1 == 0x4 {
+                                                                                                let v494 = &C::put_in_xmm_mem(ctx, v185);
+                                                                                                let v496 = constructor_x64_pshufd(ctx, v494, 0xFA);
+                                                                                                let v497 = &C::put_in_xmm_mem(ctx, v176);
+                                                                                                let v498 = constructor_x64_pshufd(ctx, v497, 0xFA);
+                                                                                                let v499 = &C::xmm_to_xmm_mem(ctx, v498);
+                                                                                                let v500 = constructor_x64_pmuldq(ctx, v496, v499);
+                                                                                                let v501 = constructor_output_xmm(ctx, v500);
+                                                                                                // Rule at src/isa/x64/lower.isle line 1079.
+                                                                                                return Some(v501);
+                                                                                            }
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                    &Opcode::UwidenLow => {
+                                                        let v181 = C::def_inst(ctx, v38.0);
+                                                        if let Some(v182) = v181 {
+                                                            let v183 = &C::inst_data(ctx, v182);
+                                                            if let &InstructionData::Unary {
+                                                                opcode: ref v184,
+                                                                arg: v185,
+                                                            } = v183
+                                                            {
+                                                                if let &Opcode::UwidenLow = v184 {
+                                                                    let v476 =
+                                                                        C::value_type(ctx, v185);
+                                                                    let v477 =
+                                                                        C::multi_lane(ctx, v476);
+                                                                    if let Some(v478) = v477 {
+                                                                        if v478.0 == 0x20 {
+                                                                            if v478.1 == 0x4 {
+                                                                                let v481 =
+                                                                                    C::value_type(
+                                                                                        ctx, v176,
+                                                                                    );
+                                                                                let v482 =
+                                                                                    C::multi_lane(
+                                                                                        ctx, v481,
+                                                                                    );
+                                                                                if let Some(v483) =
+                                                                                    v482
+                                                                                {
+                                                                                    if v483.0
+                                                                                        == 0x20
+                                                                                    {
+                                                                                        if v483.1
+                                                                                            == 0x4
+                                                                                        {
+                                                                                            let v494 = &C::put_in_xmm_mem(ctx, v185);
+                                                                                            let v505 = constructor_x64_pshufd(ctx, v494, 0x50);
+                                                                                            let v497 = &C::put_in_xmm_mem(ctx, v176);
+                                                                                            let v506 = constructor_x64_pshufd(ctx, v497, 0x50);
+                                                                                            let v507 = &C::xmm_to_xmm_mem(ctx, v506);
+                                                                                            let v518 = constructor_x64_pmuludq(ctx, v505, v507);
+                                                                                            let v519 = constructor_output_xmm(ctx, v518);
+                                                                                            // Rule at src/isa/x64/lower.isle line 1147.
+                                                                                            return Some(v519);
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                    &Opcode::UwidenHigh => {
+                                                        let v181 = C::def_inst(ctx, v38.0);
+                                                        if let Some(v182) = v181 {
+                                                            let v183 = &C::inst_data(ctx, v182);
+                                                            if let &InstructionData::Unary {
+                                                                opcode: ref v184,
+                                                                arg: v185,
+                                                            } = v183
+                                                            {
+                                                                if let &Opcode::UwidenHigh = v184 {
+                                                                    let v476 =
+                                                                        C::value_type(ctx, v185);
+                                                                    let v477 =
+                                                                        C::multi_lane(ctx, v476);
+                                                                    if let Some(v478) = v477 {
+                                                                        if v478.0 == 0x20 {
+                                                                            if v478.1 == 0x4 {
+                                                                                let v481 =
+                                                                                    C::value_type(
+                                                                                        ctx, v176,
+                                                                                    );
+                                                                                let v482 =
+                                                                                    C::multi_lane(
+                                                                                        ctx, v481,
+                                                                                    );
+                                                                                if let Some(v483) =
+                                                                                    v482
+                                                                                {
+                                                                                    if v483.0
+                                                                                        == 0x20
+                                                                                    {
+                                                                                        if v483.1
+                                                                                            == 0x4
+                                                                                        {
+                                                                                            let v494 = &C::put_in_xmm_mem(ctx, v185);
+                                                                                            let v496 = constructor_x64_pshufd(ctx, v494, 0xFA);
+                                                                                            let v497 = &C::put_in_xmm_mem(ctx, v176);
+                                                                                            let v498 = constructor_x64_pshufd(ctx, v497, 0xFA);
+                                                                                            let v499 = &C::xmm_to_xmm_mem(ctx, v498);
+                                                                                            let v514 = constructor_x64_pmuludq(ctx, v496, v499);
+                                                                                            let v515 = constructor_output_xmm(ctx, v514);
+                                                                                            // Rule at src/isa/x64/lower.isle line 1125.
+                                                                                            return Some(v515);
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                    _ => {}
+                                                }
+                                            }
+                                        }
+                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                        let v439 = constructor_put_in_xmm(ctx, v38.1);
+                                        let v460 = &C::xmi_imm(ctx, 0x20);
+                                        let v461 = constructor_x64_psrlq(ctx, v68, v460);
+                                        let v442 = &C::xmm_to_xmm_mem(ctx, v439);
+                                        let v462 = constructor_x64_pmuludq(ctx, v461, v442);
+                                        let v463 = &C::xmi_imm(ctx, 0x20);
+                                        let v464 = constructor_x64_psrlq(ctx, v439, v463);
+                                        let v465 = &C::xmm_to_xmm_mem(ctx, v464);
+                                        let v466 = constructor_x64_pmuludq(ctx, v68, v465);
+                                        let v467 = &C::xmm_to_xmm_mem(ctx, v466);
+                                        let v468 = constructor_x64_paddq(ctx, v462, v467);
+                                        let v469 = &C::xmi_imm(ctx, 0x20);
+                                        let v470 = constructor_x64_psllq(ctx, v468, v469);
+                                        let v471 = &C::xmm_to_xmm_mem(ctx, v439);
+                                        let v472 = constructor_x64_pmuludq(ctx, v68, v471);
+                                        let v473 = &C::xmm_to_xmm_mem(ctx, v470);
+                                        let v474 = constructor_x64_paddq(ctx, v472, v473);
+                                        let v475 = constructor_output_xmm(ctx, v474);
+                                        // Rule at src/isa/x64/lower.isle line 1045.
+                                        return Some(v475);
+                                    }
+                                }
+                                _ => {}
+                            }
+                        }
+                        let v4 = C::fits_in_64(ctx, v3);
+                        if let Some(v5) = v4 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v58 = &C::sinkable_load(ctx, v38.0);
+                            if let Some(v59) = v58 {
+                                let v60 = constructor_put_in_gpr(ctx, v38.1);
+                                let v61 = &constructor_sink_load_to_gpr_mem_imm(ctx, v59);
+                                let v418 = constructor_x64_mul(ctx, v5, v60, v61);
+                                let v419 = constructor_output_gpr(ctx, v418);
+                                // Rule at src/isa/x64/lower.isle line 951.
+                                return Some(v419);
+                            }
+                            let v158 = &C::simm32_from_value(ctx, v38.0);
+                            if let Some(v159) = v158 {
+                                let v60 = constructor_put_in_gpr(ctx, v38.1);
+                                let v416 = constructor_x64_mul(ctx, v5, v60, v159);
+                                let v417 = constructor_output_gpr(ctx, v416);
+                                // Rule at src/isa/x64/lower.isle line 948.
+                                return Some(v417);
+                            }
+                            let v41 = constructor_put_in_gpr(ctx, v38.0);
+                            let v42 = &constructor_put_in_gpr_mem_imm(ctx, v38.1);
+                            let v414 = constructor_x64_mul(ctx, v5, v41, v42);
+                            let v415 = constructor_output_gpr(ctx, v414);
+                            // Rule at src/isa/x64/lower.isle line 942.
+                            return Some(v415);
+                        }
+                    }
+                }
+                &Opcode::Umulhi => {
+                    let v38 = C::unpack_value_array_2(ctx, v37);
+                    let v2000 = C::value_type(ctx, v38.0);
+                    match v2000 {
+                        I16 => {
+                            let v41 = constructor_put_in_gpr(ctx, v38.0);
+                            let v109 = &constructor_put_in_gpr_mem(ctx, v38.1);
+                            let v2140 = constructor_mul_hi(ctx, I16, false, v41, v109);
+                            let v2141 = constructor_value_regs_get_gpr(ctx, v2140, 0x1);
+                            let v2142 = constructor_output_gpr(ctx, v2141);
+                            // Rule at src/isa/x64/lower.isle line 4069.
+                            return Some(v2142);
+                        }
+                        I32 => {
+                            let v41 = constructor_put_in_gpr(ctx, v38.0);
+                            let v109 = &constructor_put_in_gpr_mem(ctx, v38.1);
+                            let v2143 = constructor_mul_hi(ctx, I32, false, v41, v109);
+                            let v2144 = constructor_value_regs_get_gpr(ctx, v2143, 0x1);
+                            let v2145 = constructor_output_gpr(ctx, v2144);
+                            // Rule at src/isa/x64/lower.isle line 4074.
+                            return Some(v2145);
+                        }
+                        I64 => {
+                            let v41 = constructor_put_in_gpr(ctx, v38.0);
+                            let v109 = &constructor_put_in_gpr_mem(ctx, v38.1);
+                            let v2146 = constructor_mul_hi(ctx, I64, false, v41, v109);
+                            let v2147 = constructor_value_regs_get_gpr(ctx, v2146, 0x1);
+                            let v2148 = constructor_output_gpr(ctx, v2147);
+                            // Rule at src/isa/x64/lower.isle line 4079.
+                            return Some(v2148);
+                        }
+                        _ => {}
+                    }
+                }
+                &Opcode::Smulhi => {
+                    let v38 = C::unpack_value_array_2(ctx, v37);
+                    let v2000 = C::value_type(ctx, v38.0);
+                    match v2000 {
+                        I16 => {
+                            let v41 = constructor_put_in_gpr(ctx, v38.0);
+                            let v109 = &constructor_put_in_gpr_mem(ctx, v38.1);
+                            let v2149 = constructor_mul_hi(ctx, I16, true, v41, v109);
+                            let v2150 = constructor_value_regs_get_gpr(ctx, v2149, 0x1);
+                            let v2151 = constructor_output_gpr(ctx, v2150);
+                            // Rule at src/isa/x64/lower.isle line 4086.
+                            return Some(v2151);
+                        }
+                        I32 => {
+                            let v41 = constructor_put_in_gpr(ctx, v38.0);
+                            let v109 = &constructor_put_in_gpr_mem(ctx, v38.1);
+                            let v2152 = constructor_mul_hi(ctx, I32, true, v41, v109);
+                            let v2153 = constructor_value_regs_get_gpr(ctx, v2152, 0x1);
+                            let v2154 = constructor_output_gpr(ctx, v2153);
+                            // Rule at src/isa/x64/lower.isle line 4091.
+                            return Some(v2154);
+                        }
+                        I64 => {
+                            let v41 = constructor_put_in_gpr(ctx, v38.0);
+                            let v109 = &constructor_put_in_gpr_mem(ctx, v38.1);
+                            let v2155 = constructor_mul_hi(ctx, I64, true, v41, v109);
+                            let v2156 = constructor_value_regs_get_gpr(ctx, v2155, 0x1);
+                            let v2157 = constructor_output_gpr(ctx, v2156);
+                            // Rule at src/isa/x64/lower.isle line 4096.
+                            return Some(v2157);
+                        }
+                        _ => {}
+                    }
+                }
+                &Opcode::SqmulRoundSat => {
+                    let v38 = C::unpack_value_array_2(ctx, v37);
+                    let v2000 = C::value_type(ctx, v38.0);
+                    if v2000 == I16X8 {
+                        let v520 = C::use_ssse3(ctx);
+                        if v520 == true {
+                            let v68 = constructor_put_in_xmm(ctx, v38.0);
+                            let v439 = constructor_put_in_xmm(ctx, v38.1);
+                            let v2463 =
+                                C::emit_u128_le_const(ctx, 0x80008000800080008000800080008000);
+                            let v2464 = &constructor_const_to_xmm_mem(ctx, v2463);
+                            let v442 = &C::xmm_to_xmm_mem(ctx, v439);
+                            let v2465 = constructor_x64_pmulhrsw(ctx, v68, v442);
+                            let v2466 = constructor_x64_pcmpeqw(ctx, v2465, v2464);
+                            let v2467 = &C::xmm_to_xmm_mem(ctx, v2466);
+                            let v2468 = constructor_x64_pxor(ctx, v2465, v2467);
+                            let v2469 = constructor_output_xmm(ctx, v2468);
+                            // Rule at src/isa/x64/lower.isle line 4562.
+                            return Some(v2469);
+                        }
+                        let v68 = constructor_put_in_xmm(ctx, v38.0);
+                        let v439 = constructor_put_in_xmm(ctx, v38.1);
+                        let v1899 = &C::xmm_to_xmm_mem(ctx, v439);
+                        let v2470 = constructor_x64_pmullw(ctx, v68, v1899);
+                        let v442 = &C::xmm_to_xmm_mem(ctx, v439);
+                        let v2471 = constructor_x64_pmulhw(ctx, v68, v442);
+                        let v2472 = &C::xmm_to_xmm_mem(ctx, v2471);
+                        let v2473 = constructor_x64_punpcklwd(ctx, v2470, v2472);
+                        let v2474 = &C::xmm_to_xmm_mem(ctx, v2471);
+                        let v2475 = constructor_x64_punpckhwd(ctx, v2470, v2474);
+                        let v2477 = C::emit_u128_le_const(ctx, 0x4000000040000000400000004000);
+                        let v2478 = &constructor_const_to_xmm_mem(ctx, v2477);
+                        let v2479 = constructor_x64_movdqu_load(ctx, v2478);
+                        let v2480 = &C::xmm_to_xmm_mem(ctx, v2479);
+                        let v2481 = constructor_x64_paddd(ctx, v2473, v2480);
+                        let v2482 = &C::xmm_to_xmm_mem(ctx, v2479);
+                        let v2483 = constructor_x64_paddd(ctx, v2475, v2482);
+                        let v2485 = &C::xmi_imm(ctx, 0xF);
+                        let v2486 = constructor_x64_psrad(ctx, v2481, v2485);
+                        let v2487 = &C::xmi_imm(ctx, 0xF);
+                        let v2488 = constructor_x64_psrad(ctx, v2483, v2487);
+                        let v2489 = &C::xmm_to_xmm_mem(ctx, v2488);
+                        let v2490 = constructor_x64_packssdw(ctx, v2486, v2489);
+                        let v2491 = constructor_output_xmm(ctx, v2490);
+                        // Rule at src/isa/x64/lower.isle line 4578.
+                        return Some(v2491);
+                    }
+                }
+                &Opcode::X86Pmulhrsw => {
+                    let v520 = C::use_ssse3(ctx);
+                    if v520 == true {
+                        let v38 = C::unpack_value_array_2(ctx, v37);
+                        let v2000 = C::value_type(ctx, v38.0);
+                        if v2000 == I16X8 {
+                            let v68 = constructor_put_in_xmm(ctx, v38.0);
+                            let v69 = &C::put_in_xmm_mem(ctx, v38.1);
+                            let v2492 = constructor_x64_pmulhrsw(ctx, v68, v69);
+                            let v2493 = constructor_output_xmm(ctx, v2492);
+                            // Rule at src/isa/x64/lower.isle line 4604.
+                            return Some(v2493);
+                        }
+                    }
+                }
+                &Opcode::Udiv => {
+                    let v38 = C::unpack_value_array_2(ctx, v37);
+                    let v2000 = C::value_type(ctx, v38.0);
+                    if v2000 == I8 {
+                        let v2084 = constructor_extend_to_gpr(ctx, v38.0, I32, &ExtendKind::Zero);
+                        let v195 = constructor_put_in_gpr(ctx, v38.1);
+                        let v2085 = &C::gpr_to_gpr_mem(ctx, v195);
+                        let v2088 = constructor_x64_div8(
+                            ctx,
+                            v2084,
+                            v2085,
+                            &DivSignedness::Unsigned,
+                            &TrapCode::IntegerDivisionByZero,
+                        );
+                        let v2089 = constructor_output_gpr(ctx, v2088);
+                        // Rule at src/isa/x64/lower.isle line 3948.
+                        return Some(v2089);
+                    }
+                    let v2090 = C::fits_in_64(ctx, v2000);
+                    if let Some(v2091) = v2090 {
+                        let v41 = constructor_put_in_gpr(ctx, v38.0);
+                        let v15 = constructor_imm(ctx, I64, 0x0);
+                        let v2092 = C::gpr_new(ctx, v15);
+                        let v2093 = constructor_put_in_gpr(ctx, v38.1);
+                        let v2094 = &C::gpr_to_gpr_mem(ctx, v2093);
+                        let v2095 = &C::raw_operand_size_of_type(ctx, v2091);
+                        let v2096 = constructor_x64_div_quotient(
+                            ctx,
+                            v41,
+                            v2092,
+                            v2094,
+                            v2095,
+                            &DivSignedness::Unsigned,
+                            &TrapCode::IntegerDivisionByZero,
+                        );
+                        let v2097 = C::output(ctx, v2096);
+                        // Rule at src/isa/x64/lower.isle line 3957.
+                        return Some(v2097);
+                    }
+                }
+                &Opcode::Sdiv => {
+                    let v38 = C::unpack_value_array_2(ctx, v37);
+                    let v2000 = C::value_type(ctx, v38.0);
+                    if v2000 == I8 {
+                        let v41 = constructor_put_in_gpr(ctx, v38.0);
+                        let v2099 = constructor_x64_sign_extend_data(ctx, v41, &OperandSize::Size8);
+                        let v2100 = constructor_nonzero_sdiv_divisor(ctx, I8, v38.1);
+                        let v2101 = &C::reg_to_gpr_mem(ctx, v2100);
+                        let v2104 = constructor_x64_div8(
+                            ctx,
+                            v2099,
+                            v2101,
+                            &DivSignedness::Signed,
+                            &TrapCode::IntegerOverflow,
+                        );
+                        let v2105 = constructor_output_gpr(ctx, v2104);
+                        // Rule at src/isa/x64/lower.isle line 3967.
+                        return Some(v2105);
+                    }
+                    let v2090 = C::fits_in_64(ctx, v2000);
+                    if let Some(v2091) = v2090 {
+                        let v41 = constructor_put_in_gpr(ctx, v38.0);
+                        let v2106 = &C::raw_operand_size_of_type(ctx, v2091);
+                        let v2107 = constructor_x64_sign_extend_data(ctx, v41, v2106);
+                        let v2108 = constructor_nonzero_sdiv_divisor(ctx, v2091, v38.1);
+                        let v2109 = &C::reg_to_gpr_mem(ctx, v2108);
+                        let v2110 = constructor_x64_div_quotient(
+                            ctx,
+                            v41,
+                            v2107,
+                            v2109,
+                            v2106,
+                            &DivSignedness::Signed,
+                            &TrapCode::IntegerOverflow,
+                        );
+                        let v2111 = C::output(ctx, v2110);
+                        // Rule at src/isa/x64/lower.isle line 3973.
+                        return Some(v2111);
+                    }
+                }
+                &Opcode::Urem => {
+                    let v38 = C::unpack_value_array_2(ctx, v37);
+                    let v2000 = C::value_type(ctx, v38.0);
+                    if v2000 == I8 {
+                        let v2084 = constructor_extend_to_gpr(ctx, v38.0, I32, &ExtendKind::Zero);
+                        let v195 = constructor_put_in_gpr(ctx, v38.1);
+                        let v2085 = &C::gpr_to_gpr_mem(ctx, v195);
+                        let v2088 = constructor_x64_div8(
+                            ctx,
+                            v2084,
+                            v2085,
+                            &DivSignedness::Unsigned,
+                            &TrapCode::IntegerDivisionByZero,
+                        );
+                        let v1135 = Imm8Reg::Imm8 { imm: 0x8 };
+                        let v2112 = &C::imm8_reg_to_imm8_gpr(ctx, &v1135);
+                        let v2113 = constructor_x64_shr(ctx, I64, v2088, v2112);
+                        let v2114 = constructor_output_gpr(ctx, v2113);
+                        // Rule at src/isa/x64/lower.isle line 4006.
+                        return Some(v2114);
+                    }
+                    let v2090 = C::fits_in_64(ctx, v2000);
+                    if let Some(v2091) = v2090 {
+                        let v41 = constructor_put_in_gpr(ctx, v38.0);
+                        let v15 = constructor_imm(ctx, I64, 0x0);
+                        let v2092 = C::gpr_new(ctx, v15);
+                        let v2093 = constructor_put_in_gpr(ctx, v38.1);
+                        let v2094 = &C::gpr_to_gpr_mem(ctx, v2093);
+                        let v2095 = &C::raw_operand_size_of_type(ctx, v2091);
+                        let v2115 = constructor_x64_div_remainder(
+                            ctx,
+                            v41,
+                            v2092,
+                            v2094,
+                            v2095,
+                            &DivSignedness::Unsigned,
+                            &TrapCode::IntegerDivisionByZero,
+                        );
+                        let v2116 = C::output(ctx, v2115);
+                        // Rule at src/isa/x64/lower.isle line 4015.
+                        return Some(v2116);
+                    }
+                }
+                &Opcode::Srem => {
+                    let v38 = C::unpack_value_array_2(ctx, v37);
+                    let v172 = C::def_inst(ctx, v38.1);
+                    if let Some(v173) = v172 {
+                        let v174 = &C::inst_data(ctx, v173);
+                        if let &InstructionData::UnaryImm {
+                            opcode: ref v326,
+                            imm: v327,
+                        } = v174
+                        {
+                            if let &Opcode::Iconst = v326 {
+                                let v2000 = C::value_type(ctx, v38.0);
+                                if v2000 == I8 {
+                                    let v2117 = C::safe_divisor_from_imm64(ctx, I8, v327);
+                                    if let Some(v2118) = v2117 {
+                                        let v41 = constructor_put_in_gpr(ctx, v38.0);
+                                        let v2099 = constructor_x64_sign_extend_data(
+                                            ctx,
+                                            v41,
+                                            &OperandSize::Size8,
+                                        );
+                                        let v2119 = constructor_imm(ctx, I8, v2118);
+                                        let v2120 = &C::reg_to_gpr_mem(ctx, v2119);
+                                        let v2121 = constructor_x64_div8(
+                                            ctx,
+                                            v2099,
+                                            v2120,
+                                            &DivSignedness::Signed,
+                                            &TrapCode::IntegerDivisionByZero,
+                                        );
+                                        let v1135 = Imm8Reg::Imm8 { imm: 0x8 };
+                                        let v2122 = &C::imm8_reg_to_imm8_gpr(ctx, &v1135);
+                                        let v2123 = constructor_x64_shr(ctx, I64, v2121, v2122);
+                                        let v2124 = constructor_output_gpr(ctx, v2123);
+                                        // Rule at src/isa/x64/lower.isle line 4030.
+                                        return Some(v2124);
+                                    }
+                                }
+                                let v2125 = C::safe_divisor_from_imm64(ctx, v2000, v327);
+                                if let Some(v2126) = v2125 {
+                                    let v41 = constructor_put_in_gpr(ctx, v38.0);
+                                    let v2127 = &C::raw_operand_size_of_type(ctx, v2000);
+                                    let v2128 = constructor_x64_sign_extend_data(ctx, v41, v2127);
+                                    let v2129 = constructor_imm(ctx, v2000, v2126);
+                                    let v2130 = &C::reg_to_gpr_mem(ctx, v2129);
+                                    let v2131 = constructor_x64_div_remainder(
+                                        ctx,
+                                        v41,
+                                        v2128,
+                                        v2130,
+                                        v2127,
+                                        &DivSignedness::Signed,
+                                        &TrapCode::IntegerDivisionByZero,
+                                    );
+                                    let v2132 = C::output(ctx, v2131);
+                                    // Rule at src/isa/x64/lower.isle line 4039.
+                                    return Some(v2132);
+                                }
+                            }
+                        }
+                    }
+                    let v2000 = C::value_type(ctx, v38.0);
+                    if v2000 == I8 {
+                        let v41 = constructor_put_in_gpr(ctx, v38.0);
+                        let v2099 = constructor_x64_sign_extend_data(ctx, v41, &OperandSize::Size8);
+                        let v2133 = constructor_put_in_gpr(ctx, v38.1);
+                        let v2134 = constructor_x64_checked_srem_seq8(ctx, v2099, v2133);
+                        let v1135 = Imm8Reg::Imm8 { imm: 0x8 };
+                        let v2112 = &C::imm8_reg_to_imm8_gpr(ctx, &v1135);
+                        let v2135 = constructor_x64_shr(ctx, I64, v2134, v2112);
+                        let v2136 = constructor_output_gpr(ctx, v2135);
+                        // Rule at src/isa/x64/lower.isle line 4052.
+                        return Some(v2136);
+                    }
+                    let v41 = constructor_put_in_gpr(ctx, v38.0);
+                    let v2127 = &C::raw_operand_size_of_type(ctx, v2000);
+                    let v2128 = constructor_x64_sign_extend_data(ctx, v41, v2127);
+                    let v2093 = constructor_put_in_gpr(ctx, v38.1);
+                    let v2137 = constructor_x64_checked_srem_seq(ctx, v2127, v41, v2128, v2093);
+                    let v2138 = C::value_regs_get(ctx, v2137, 0x1);
+                    let v2139 = constructor_output_reg(ctx, v2138);
+                    // Rule at src/isa/x64/lower.isle line 4058.
+                    return Some(v2139);
+                }
+                &Opcode::UaddOverflow => {
+                    let v38 = C::unpack_value_array_2(ctx, v37);
+                    let v92 = C::value_type(ctx, v38.1);
+                    let v93 = C::fits_in_64(ctx, v92);
+                    if let Some(v94) = v93 {
+                        let v41 = constructor_put_in_gpr(ctx, v38.0);
+                        let v42 = &constructor_put_in_gpr_mem_imm(ctx, v38.1);
+                        let v97 = constructor_construct_overflow_op_alu(
+                            ctx,
+                            v94,
+                            &CC::B,
+                            &AluRmiROpcode::Add,
+                            v41,
+                            v42,
+                        );
+                        // Rule at src/isa/x64/lower.isle line 137.
+                        return Some(v97);
+                    }
+                    if v92 == I128 {
+                        let v99 = constructor_construct_overflow_op_alu_128(
+                            ctx,
+                            &CC::B,
+                            &AluRmiROpcode::Add,
+                            &AluRmiROpcode::Adc,
+                            v38.0,
+                            v38.1,
+                        );
+                        // Rule at src/isa/x64/lower.isle line 141.
+                        return Some(v99);
+                    }
+                }
+                &Opcode::SaddOverflow => {
+                    let v38 = C::unpack_value_array_2(ctx, v37);
+                    let v92 = C::value_type(ctx, v38.1);
+                    let v93 = C::fits_in_64(ctx, v92);
+                    if let Some(v94) = v93 {
+                        let v41 = constructor_put_in_gpr(ctx, v38.0);
+                        let v42 = &constructor_put_in_gpr_mem_imm(ctx, v38.1);
+                        let v101 = constructor_construct_overflow_op_alu(
+                            ctx,
+                            v94,
+                            &CC::O,
+                            &AluRmiROpcode::Add,
+                            v41,
+                            v42,
+                        );
+                        // Rule at src/isa/x64/lower.isle line 146.
+                        return Some(v101);
+                    }
+                    if v92 == I128 {
+                        let v102 = constructor_construct_overflow_op_alu_128(
+                            ctx,
+                            &CC::O,
+                            &AluRmiROpcode::Add,
+                            &AluRmiROpcode::Adc,
+                            v38.0,
+                            v38.1,
+                        );
+                        // Rule at src/isa/x64/lower.isle line 149.
+                        return Some(v102);
+                    }
+                }
+                &Opcode::UsubOverflow => {
+                    let v38 = C::unpack_value_array_2(ctx, v37);
+                    let v92 = C::value_type(ctx, v38.1);
+                    let v93 = C::fits_in_64(ctx, v92);
+                    if let Some(v94) = v93 {
+                        let v41 = constructor_put_in_gpr(ctx, v38.0);
+                        let v42 = &constructor_put_in_gpr_mem_imm(ctx, v38.1);
+                        let v104 = constructor_construct_overflow_op_alu(
+                            ctx,
+                            v94,
+                            &CC::B,
+                            &AluRmiROpcode::Sub,
+                            v41,
+                            v42,
+                        );
+                        // Rule at src/isa/x64/lower.isle line 154.
+                        return Some(v104);
+                    }
+                    if v92 == I128 {
+                        let v106 = constructor_construct_overflow_op_alu_128(
+                            ctx,
+                            &CC::B,
+                            &AluRmiROpcode::Sub,
+                            &AluRmiROpcode::Sbb,
+                            v38.0,
+                            v38.1,
+                        );
+                        // Rule at src/isa/x64/lower.isle line 157.
+                        return Some(v106);
+                    }
+                }
+                &Opcode::SsubOverflow => {
+                    let v38 = C::unpack_value_array_2(ctx, v37);
+                    let v92 = C::value_type(ctx, v38.1);
+                    let v93 = C::fits_in_64(ctx, v92);
+                    if let Some(v94) = v93 {
+                        let v41 = constructor_put_in_gpr(ctx, v38.0);
+                        let v42 = &constructor_put_in_gpr_mem_imm(ctx, v38.1);
+                        let v107 = constructor_construct_overflow_op_alu(
+                            ctx,
+                            v94,
+                            &CC::O,
+                            &AluRmiROpcode::Sub,
+                            v41,
+                            v42,
+                        );
+                        // Rule at src/isa/x64/lower.isle line 162.
+                        return Some(v107);
+                    }
+                    if v92 == I128 {
+                        let v108 = constructor_construct_overflow_op_alu_128(
+                            ctx,
+                            &CC::O,
+                            &AluRmiROpcode::Sub,
+                            &AluRmiROpcode::Sbb,
+                            v38.0,
+                            v38.1,
+                        );
+                        // Rule at src/isa/x64/lower.isle line 165.
+                        return Some(v108);
+                    }
+                }
+                &Opcode::UmulOverflow => {
+                    let v38 = C::unpack_value_array_2(ctx, v37);
+                    let v92 = C::value_type(ctx, v38.1);
+                    let v93 = C::fits_in_64(ctx, v92);
+                    if let Some(v94) = v93 {
+                        let v41 = constructor_put_in_gpr(ctx, v38.0);
+                        let v109 = &constructor_put_in_gpr_mem(ctx, v38.1);
+                        let v110 = &constructor_x64_umullo_with_flags_paired(ctx, v94, v41, v109);
+                        let v111 = constructor_construct_overflow_op(ctx, &CC::O, v110);
+                        // Rule at src/isa/x64/lower.isle line 170.
+                        return Some(v111);
+                    }
+                }
+                &Opcode::SmulOverflow => {
+                    let v38 = C::unpack_value_array_2(ctx, v37);
+                    let v92 = C::value_type(ctx, v38.1);
+                    let v112 = C::ty_int_ref_16_to_64(ctx, v92);
+                    if let Some(v113) = v112 {
+                        let v41 = constructor_put_in_gpr(ctx, v38.0);
+                        let v42 = &constructor_put_in_gpr_mem_imm(ctx, v38.1);
+                        let v115 = constructor_construct_overflow_op_alu(
+                            ctx,
+                            v113,
+                            &CC::O,
+                            &AluRmiROpcode::Mul,
+                            v41,
+                            v42,
+                        );
+                        // Rule at src/isa/x64/lower.isle line 175.
+                        return Some(v115);
+                    }
+                    if v92 == I8 {
+                        let v41 = constructor_put_in_gpr(ctx, v38.0);
+                        let v117 = &C::put_in_reg_mem(ctx, v38.1);
+                        let v118 = &constructor_reg_mem_to_reg_mem_imm(ctx, v117);
+                        let v119 = &C::gpr_mem_imm_new(ctx, v118);
+                        let v120 = &constructor_x64_alurmi_with_flags_paired(
+                            ctx,
+                            &AluRmiROpcode::Mul,
+                            I8,
+                            v41,
+                            v119,
+                        );
+                        let v121 = constructor_construct_overflow_op(ctx, &CC::O, v120);
+                        // Rule at src/isa/x64/lower.isle line 179.
+                        return Some(v121);
+                    }
+                }
+                &Opcode::Band => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v189 = C::use_bmi1(ctx);
+                        if v189 == true {
+                            let v3 = C::value_type(ctx, v2);
+                            let v45 = C::ty_32_or_64(ctx, v3);
+                            if let Some(v46) = v45 {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v172 = C::def_inst(ctx, v38.1);
+                                if let Some(v173) = v172 {
+                                    let v174 = &C::inst_data(ctx, v173);
+                                    match v174 {
+                                        &InstructionData::Binary {
+                                            opcode: ref v212,
+                                            args: ref v213,
+                                        } => {
+                                            if let &Opcode::Isub = v212 {
+                                                let v214 = C::unpack_value_array_2(ctx, v213);
+                                                let v217 = C::def_inst(ctx, v214.1);
+                                                if let Some(v218) = v217 {
+                                                    let v219 = &C::inst_data(ctx, v218);
+                                                    if let &InstructionData::UnaryImm {
+                                                        opcode: ref v220,
+                                                        imm: v221,
+                                                    } = v219
+                                                    {
+                                                        if let &Opcode::Iconst = v220 {
+                                                            let v222 = C::u64_from_imm64(ctx, v221);
+                                                            if v222 == 0x1 {
+                                                                if v38.0 == v214.0 {
+                                                                    let v223 =
+                                                                        &constructor_put_in_gpr_mem(
+                                                                            ctx, v38.0,
+                                                                        );
+                                                                    let v224 = constructor_x64_blsr(
+                                                                        ctx, v46, v223,
+                                                                    );
+                                                                    let v225 =
+                                                                        constructor_output_gpr(
+                                                                            ctx, v224,
+                                                                        );
+                                                                    // Rule at src/isa/x64/lower.isle line 349.
+                                                                    return Some(v225);
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                        &InstructionData::Unary {
+                                            opcode: ref v175,
+                                            arg: v176,
+                                        } => {
+                                            if let &Opcode::Ineg = v175 {
+                                                if v38.0 == v176 {
+                                                    let v223 =
+                                                        &constructor_put_in_gpr_mem(ctx, v38.0);
+                                                    let v229 = constructor_x64_blsi(ctx, v46, v223);
+                                                    let v230 = constructor_output_gpr(ctx, v229);
+                                                    // Rule at src/isa/x64/lower.isle line 358.
+                                                    return Some(v230);
+                                                }
+                                            }
+                                        }
+                                        _ => {}
+                                    }
+                                }
+                                let v181 = C::def_inst(ctx, v38.0);
+                                if let Some(v182) = v181 {
+                                    let v183 = &C::inst_data(ctx, v182);
+                                    match v183 {
+                                        &InstructionData::Binary {
+                                            opcode: ref v198,
+                                            args: ref v199,
+                                        } => {
+                                            if let &Opcode::Isub = v198 {
+                                                let v200 = C::unpack_value_array_2(ctx, v199);
+                                                let v203 = C::def_inst(ctx, v200.1);
+                                                if let Some(v204) = v203 {
+                                                    let v205 = &C::inst_data(ctx, v204);
+                                                    if let &InstructionData::UnaryImm {
+                                                        opcode: ref v206,
+                                                        imm: v207,
+                                                    } = v205
+                                                    {
+                                                        if let &Opcode::Iconst = v206 {
+                                                            let v208 = C::u64_from_imm64(ctx, v207);
+                                                            if v208 == 0x1 {
+                                                                if v38.1 == v200.0 {
+                                                                    let v209 =
+                                                                        &constructor_put_in_gpr_mem(
+                                                                            ctx, v200.0,
+                                                                        );
+                                                                    let v210 = constructor_x64_blsr(
+                                                                        ctx, v46, v209,
+                                                                    );
+                                                                    let v211 =
+                                                                        constructor_output_gpr(
+                                                                            ctx, v210,
+                                                                        );
+                                                                    // Rule at src/isa/x64/lower.isle line 346.
+                                                                    return Some(v211);
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                        &InstructionData::Unary {
+                                            opcode: ref v184,
+                                            arg: v185,
+                                        } => {
+                                            if let &Opcode::Ineg = v184 {
+                                                if v38.1 == v185 {
+                                                    let v226 =
+                                                        &constructor_put_in_gpr_mem(ctx, v185);
+                                                    let v227 = constructor_x64_blsi(ctx, v46, v226);
+                                                    let v228 = constructor_output_gpr(ctx, v227);
+                                                    // Rule at src/isa/x64/lower.isle line 355.
+                                                    return Some(v228);
+                                                }
+                                            }
+                                        }
+                                        _ => {}
+                                    }
+                                }
+                            }
+                            let v152 = C::ty_int_ref_scalar_64(ctx, v3);
+                            if let Some(v153) = v152 {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v181 = C::def_inst(ctx, v38.0);
+                                if let Some(v182) = v181 {
+                                    let v183 = &C::inst_data(ctx, v182);
+                                    if let &InstructionData::Unary {
+                                        opcode: ref v184,
+                                        arg: v185,
+                                    } = v183
+                                    {
+                                        if let &Opcode::Bnot = v184 {
+                                            let v194 = constructor_put_in_gpr(ctx, v185);
+                                            let v195 = constructor_put_in_gpr(ctx, v38.1);
+                                            let v196 = constructor_x64_andn(ctx, v3, v194, v195);
+                                            let v197 = constructor_output_gpr(ctx, v196);
+                                            // Rule at src/isa/x64/lower.isle line 339.
+                                            return Some(v197);
+                                        }
+                                    }
+                                }
+                                let v172 = C::def_inst(ctx, v38.1);
+                                if let Some(v173) = v172 {
+                                    let v174 = &C::inst_data(ctx, v173);
+                                    if let &InstructionData::Unary {
+                                        opcode: ref v175,
+                                        arg: v176,
+                                    } = v174
+                                    {
+                                        if let &Opcode::Bnot = v175 {
+                                            let v190 = constructor_put_in_gpr(ctx, v176);
+                                            let v191 = constructor_put_in_gpr(ctx, v38.0);
+                                            let v192 = constructor_x64_andn(ctx, v3, v190, v191);
+                                            let v193 = constructor_output_gpr(ctx, v192);
+                                            // Rule at src/isa/x64/lower.isle line 334.
+                                            return Some(v193);
+                                        }
+                                    }
+                                }
+                            }
+                        }
+                        let v3 = C::value_type(ctx, v2);
+                        let v64 = C::multi_lane(ctx, v3);
+                        if let Some(v65) = v64 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v181 = C::def_inst(ctx, v38.0);
+                            if let Some(v182) = v181 {
+                                let v183 = &C::inst_data(ctx, v182);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v184,
+                                    arg: v185,
+                                } = v183
+                                {
+                                    if let &Opcode::Bnot = v184 {
+                                        let v186 = constructor_put_in_xmm(ctx, v185);
+                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
+                                        let v187 = constructor_sse_and_not(ctx, v3, v186, v69);
+                                        let v188 = constructor_output_xmm(ctx, v187);
+                                        // Rule at src/isa/x64/lower.isle line 331.
+                                        return Some(v188);
+                                    }
+                                }
+                            }
+                            let v172 = C::def_inst(ctx, v38.1);
+                            if let Some(v173) = v172 {
+                                let v174 = &C::inst_data(ctx, v173);
+                                if let &InstructionData::Unary {
+                                    opcode: ref v175,
+                                    arg: v176,
+                                } = v174
+                                {
+                                    if let &Opcode::Bnot = v175 {
+                                        let v177 = constructor_put_in_xmm(ctx, v176);
+                                        let v178 = &C::put_in_xmm_mem(ctx, v38.0);
+                                        let v179 = constructor_sse_and_not(ctx, v3, v177, v178);
+                                        let v180 = constructor_output_xmm(ctx, v179);
+                                        // Rule at src/isa/x64/lower.isle line 329.
+                                        return Some(v180);
+                                    }
+                                }
+                            }
+                        }
+                        if v3 == I128 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v78 = C::put_in_regs(ctx, v38.0);
+                            let v80 = constructor_value_regs_get_gpr(ctx, v78, 0x0);
+                            let v82 = constructor_value_regs_get_gpr(ctx, v78, 0x1);
+                            let v83 = C::put_in_regs(ctx, v38.1);
+                            let v84 = constructor_value_regs_get_gpr(ctx, v83, 0x0);
+                            let v85 = constructor_value_regs_get_gpr(ctx, v83, 0x1);
+                            let v86 = &C::gpr_to_gpr_mem_imm(ctx, v84);
+                            let v168 = constructor_x64_and(ctx, I64, v80, v86);
+                            let v88 = &C::gpr_to_gpr_mem_imm(ctx, v85);
+                            let v169 = constructor_x64_and(ctx, I64, v82, v88);
+                            let v170 = constructor_value_gprs(ctx, v168, v169);
+                            let v171 = C::output(ctx, v170);
+                            // Rule at src/isa/x64/lower.isle line 303.
+                            return Some(v171);
+                        }
+                        if let Some(v65) = v64 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v68 = constructor_put_in_xmm(ctx, v38.0);
+                            let v69 = &C::put_in_xmm_mem(ctx, v38.1);
+                            let v166 = constructor_sse_and(ctx, v3, v68, v69);
+                            let v167 = constructor_output_xmm(ctx, v166);
+                            // Rule at src/isa/x64/lower.isle line 297.
+                            return Some(v167);
+                        }
+                        let v162 = C::ty_scalar_float(ctx, v3);
+                        if let Some(v163) = v162 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v68 = constructor_put_in_xmm(ctx, v38.0);
+                            let v69 = &C::put_in_xmm_mem(ctx, v38.1);
+                            let v164 = constructor_sse_and(ctx, v163, v68, v69);
+                            let v165 = constructor_output_xmm(ctx, v164);
+                            // Rule at src/isa/x64/lower.isle line 285.
+                            return Some(v165);
+                        }
+                        let v152 = C::ty_int_ref_scalar_64(ctx, v3);
+                        if let Some(v153) = v152 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v158 = &C::simm32_from_value(ctx, v38.0);
+                            if let Some(v159) = v158 {
+                                let v60 = constructor_put_in_gpr(ctx, v38.1);
+                                let v160 = constructor_x64_and(ctx, v3, v60, v159);
+                                let v161 = constructor_output_gpr(ctx, v160);
+                                // Rule at src/isa/x64/lower.isle line 279.
+                                return Some(v161);
+                            }
+                            let v58 = &C::sinkable_load(ctx, v38.0);
+                            if let Some(v59) = v58 {
+                                let v60 = constructor_put_in_gpr(ctx, v38.1);
+                                let v61 = &constructor_sink_load_to_gpr_mem_imm(ctx, v59);
+                                let v156 = constructor_x64_and(ctx, v3, v60, v61);
+                                let v157 = constructor_output_gpr(ctx, v156);
+                                // Rule at src/isa/x64/lower.isle line 275.
+                                return Some(v157);
+                            }
+                            let v41 = constructor_put_in_gpr(ctx, v38.0);
+                            let v42 = &constructor_put_in_gpr_mem_imm(ctx, v38.1);
+                            let v154 = constructor_x64_and(ctx, v3, v41, v42);
+                            let v155 = constructor_output_gpr(ctx, v154);
+                            // Rule at src/isa/x64/lower.isle line 268.
+                            return Some(v155);
+                        }
+                    }
+                }
+                &Opcode::Bor => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        if v3 == I128 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v78 = C::put_in_regs(ctx, v38.0);
+                            let v241 = C::put_in_regs(ctx, v38.1);
+                            let v242 = constructor_or_i128(ctx, v78, v241);
+                            let v243 = C::output(ctx, v242);
+                            // Rule at src/isa/x64/lower.isle line 411.
+                            return Some(v243);
+                        }
+                        let v64 = C::multi_lane(ctx, v3);
+                        if let Some(v65) = v64 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v68 = constructor_put_in_xmm(ctx, v38.0);
+                            let v69 = &C::put_in_xmm_mem(ctx, v38.1);
+                            let v239 = constructor_sse_or(ctx, v3, v68, v69);
+                            let v240 = constructor_output_xmm(ctx, v239);
+                            // Rule at src/isa/x64/lower.isle line 396.
+                            return Some(v240);
+                        }
+                        let v162 = C::ty_scalar_float(ctx, v3);
+                        if let Some(v163) = v162 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v68 = constructor_put_in_xmm(ctx, v38.0);
+                            let v69 = &C::put_in_xmm_mem(ctx, v38.1);
+                            let v237 = constructor_sse_or(ctx, v163, v68, v69);
+                            let v238 = constructor_output_xmm(ctx, v237);
+                            // Rule at src/isa/x64/lower.isle line 384.
+                            return Some(v238);
+                        }
+                        let v152 = C::ty_int_ref_scalar_64(ctx, v3);
+                        if let Some(v153) = v152 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v158 = &C::simm32_from_value(ctx, v38.0);
+                            if let Some(v159) = v158 {
+                                let v60 = constructor_put_in_gpr(ctx, v38.1);
+                                let v235 = constructor_x64_or(ctx, v3, v60, v159);
+                                let v236 = constructor_output_gpr(ctx, v235);
+                                // Rule at src/isa/x64/lower.isle line 378.
+                                return Some(v236);
+                            }
+                            let v58 = &C::sinkable_load(ctx, v38.0);
+                            if let Some(v59) = v58 {
+                                let v60 = constructor_put_in_gpr(ctx, v38.1);
+                                let v61 = &constructor_sink_load_to_gpr_mem_imm(ctx, v59);
+                                let v233 = constructor_x64_or(ctx, v3, v60, v61);
+                                let v234 = constructor_output_gpr(ctx, v233);
+                                // Rule at src/isa/x64/lower.isle line 374.
+                                return Some(v234);
+                            }
+                            let v41 = constructor_put_in_gpr(ctx, v38.0);
+                            let v42 = &constructor_put_in_gpr_mem_imm(ctx, v38.1);
+                            let v231 = constructor_x64_or(ctx, v3, v41, v42);
+                            let v232 = constructor_output_gpr(ctx, v231);
+                            // Rule at src/isa/x64/lower.isle line 367.
+                            return Some(v232);
+                        }
+                    }
+                }
+                &Opcode::Bxor => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v45 = C::ty_32_or_64(ctx, v3);
+                        if let Some(v46) = v45 {
+                            let v189 = C::use_bmi1(ctx);
+                            if v189 == true {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v172 = C::def_inst(ctx, v38.1);
+                                if let Some(v173) = v172 {
+                                    let v174 = &C::inst_data(ctx, v173);
+                                    if let &InstructionData::Binary {
+                                        opcode: ref v212,
+                                        args: ref v213,
+                                    } = v174
+                                    {
+                                        if let &Opcode::Isub = v212 {
+                                            let v214 = C::unpack_value_array_2(ctx, v213);
+                                            let v217 = C::def_inst(ctx, v214.1);
+                                            if let Some(v218) = v217 {
+                                                let v219 = &C::inst_data(ctx, v218);
+                                                if let &InstructionData::UnaryImm {
+                                                    opcode: ref v220,
+                                                    imm: v221,
+                                                } = v219
+                                                {
+                                                    if let &Opcode::Iconst = v220 {
+                                                        let v222 = C::u64_from_imm64(ctx, v221);
+                                                        if v222 == 0x1 {
+                                                            if v38.0 == v214.0 {
+                                                                let v223 =
+                                                                    &constructor_put_in_gpr_mem(
+                                                                        ctx, v38.0,
+                                                                    );
+                                                                let v260 = constructor_x64_blsmsk(
+                                                                    ctx, v46, v223,
+                                                                );
+                                                                let v261 = constructor_output_gpr(
+                                                                    ctx, v260,
+                                                                );
+                                                                // Rule at src/isa/x64/lower.isle line 461.
+                                                                return Some(v261);
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                                let v181 = C::def_inst(ctx, v38.0);
+                                if let Some(v182) = v181 {
+                                    let v183 = &C::inst_data(ctx, v182);
+                                    if let &InstructionData::Binary {
+                                        opcode: ref v198,
+                                        args: ref v199,
+                                    } = v183
+                                    {
+                                        if let &Opcode::Isub = v198 {
+                                            let v200 = C::unpack_value_array_2(ctx, v199);
+                                            let v203 = C::def_inst(ctx, v200.1);
+                                            if let Some(v204) = v203 {
+                                                let v205 = &C::inst_data(ctx, v204);
+                                                if let &InstructionData::UnaryImm {
+                                                    opcode: ref v206,
+                                                    imm: v207,
+                                                } = v205
+                                                {
+                                                    if let &Opcode::Iconst = v206 {
+                                                        let v208 = C::u64_from_imm64(ctx, v207);
+                                                        if v208 == 0x1 {
+                                                            if v38.1 == v200.0 {
+                                                                let v209 =
+                                                                    &constructor_put_in_gpr_mem(
+                                                                        ctx, v200.0,
+                                                                    );
+                                                                let v258 = constructor_x64_blsmsk(
+                                                                    ctx, v46, v209,
+                                                                );
+                                                                let v259 = constructor_output_gpr(
+                                                                    ctx, v258,
+                                                                );
+                                                                // Rule at src/isa/x64/lower.isle line 458.
+                                                                return Some(v259);
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                            }
+                        }
+                        if v3 == I128 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v78 = C::put_in_regs(ctx, v38.0);
+                            let v80 = constructor_value_regs_get_gpr(ctx, v78, 0x0);
+                            let v82 = constructor_value_regs_get_gpr(ctx, v78, 0x1);
+                            let v83 = C::put_in_regs(ctx, v38.1);
+                            let v84 = constructor_value_regs_get_gpr(ctx, v83, 0x0);
+                            let v85 = constructor_value_regs_get_gpr(ctx, v83, 0x1);
+                            let v86 = &C::gpr_to_gpr_mem_imm(ctx, v84);
+                            let v254 = constructor_x64_xor(ctx, I64, v80, v86);
+                            let v88 = &C::gpr_to_gpr_mem_imm(ctx, v85);
+                            let v255 = constructor_x64_xor(ctx, I64, v82, v88);
+                            let v256 = constructor_value_gprs(ctx, v254, v255);
+                            let v257 = C::output(ctx, v256);
+                            // Rule at src/isa/x64/lower.isle line 446.
+                            return Some(v257);
+                        }
+                        let v64 = C::multi_lane(ctx, v3);
+                        if let Some(v65) = v64 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v68 = constructor_put_in_xmm(ctx, v38.0);
+                            let v69 = &C::put_in_xmm_mem(ctx, v38.1);
+                            let v252 = constructor_x64_xor_vector(ctx, v3, v68, v69);
+                            let v253 = constructor_output_xmm(ctx, v252);
+                            // Rule at src/isa/x64/lower.isle line 441.
+                            return Some(v253);
+                        }
+                        let v162 = C::ty_scalar_float(ctx, v3);
+                        if let Some(v163) = v162 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v68 = constructor_put_in_xmm(ctx, v38.0);
+                            let v69 = &C::put_in_xmm_mem(ctx, v38.1);
+                            let v250 = constructor_x64_xor_vector(ctx, v163, v68, v69);
+                            let v251 = constructor_output_xmm(ctx, v250);
+                            // Rule at src/isa/x64/lower.isle line 436.
+                            return Some(v251);
+                        }
+                        let v152 = C::ty_int_ref_scalar_64(ctx, v3);
+                        if let Some(v153) = v152 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v158 = &C::simm32_from_value(ctx, v38.0);
+                            if let Some(v159) = v158 {
+                                let v60 = constructor_put_in_gpr(ctx, v38.1);
+                                let v248 = constructor_x64_xor(ctx, v3, v60, v159);
+                                let v249 = constructor_output_gpr(ctx, v248);
+                                // Rule at src/isa/x64/lower.isle line 430.
+                                return Some(v249);
+                            }
+                            let v58 = &C::sinkable_load(ctx, v38.0);
+                            if let Some(v59) = v58 {
+                                let v60 = constructor_put_in_gpr(ctx, v38.1);
+                                let v61 = &constructor_sink_load_to_gpr_mem_imm(ctx, v59);
+                                let v246 = constructor_x64_xor(ctx, v3, v60, v61);
+                                let v247 = constructor_output_gpr(ctx, v246);
+                                // Rule at src/isa/x64/lower.isle line 426.
+                                return Some(v247);
+                            }
+                            let v41 = constructor_put_in_gpr(ctx, v38.0);
+                            let v42 = &constructor_put_in_gpr_mem_imm(ctx, v38.1);
+                            let v244 = constructor_x64_xor(ctx, v3, v41, v42);
+                            let v245 = constructor_output_gpr(ctx, v244);
+                            // Rule at src/isa/x64/lower.isle line 419.
+                            return Some(v245);
+                        }
+                    }
+                }
+                &Opcode::Rotl => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        if v3 == I128 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v78 = C::put_in_regs(ctx, v38.0);
+                            let v359 = constructor_lo_gpr(ctx, v38.1);
+                            let v360 = constructor_shl_i128(ctx, v78, v359);
+                            let v362 = constructor_imm(ctx, I64, 0x80);
+                            let v363 = C::gpr_new(ctx, v362);
+                            let v364 = &C::gpr_to_gpr_mem_imm(ctx, v359);
+                            let v365 = constructor_x64_sub(ctx, I64, v363, v364);
+                            let v366 = constructor_shr_i128(ctx, v78, v365);
+                            let v367 = constructor_or_i128(ctx, v360, v366);
+                            let v368 = C::output(ctx, v367);
+                            // Rule at src/isa/x64/lower.isle line 866.
+                            return Some(v368);
+                        }
+                        let v4 = C::fits_in_64(ctx, v3);
+                        if let Some(v5) = v4 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v41 = constructor_put_in_gpr(ctx, v38.0);
+                            let v262 = &constructor_put_masked_in_imm8_gpr(ctx, v38.1, v5);
+                            let v357 = constructor_x64_rotl(ctx, v5, v41, v262);
+                            let v358 = constructor_output_gpr(ctx, v357);
+                            // Rule at src/isa/x64/lower.isle line 860.
+                            return Some(v358);
+                        }
+                    }
+                }
+                &Opcode::Rotr => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        if v3 == I128 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v78 = C::put_in_regs(ctx, v38.0);
+                            let v359 = constructor_lo_gpr(ctx, v38.1);
+                            let v371 = constructor_shr_i128(ctx, v78, v359);
+                            let v362 = constructor_imm(ctx, I64, 0x80);
+                            let v363 = C::gpr_new(ctx, v362);
+                            let v364 = &C::gpr_to_gpr_mem_imm(ctx, v359);
+                            let v365 = constructor_x64_sub(ctx, I64, v363, v364);
+                            let v372 = constructor_shl_i128(ctx, v78, v365);
+                            let v373 = constructor_or_i128(ctx, v371, v372);
+                            let v374 = C::output(ctx, v373);
+                            // Rule at src/isa/x64/lower.isle line 887.
+                            return Some(v374);
+                        }
+                        let v4 = C::fits_in_64(ctx, v3);
+                        if let Some(v5) = v4 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v41 = constructor_put_in_gpr(ctx, v38.0);
+                            let v262 = &constructor_put_masked_in_imm8_gpr(ctx, v38.1, v5);
+                            let v369 = constructor_x64_rotr(ctx, v5, v41, v262);
+                            let v370 = constructor_output_gpr(ctx, v369);
+                            // Rule at src/isa/x64/lower.isle line 881.
+                            return Some(v370);
+                        }
+                    }
+                }
+                &Opcode::Ishl => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            I128 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v265 = constructor_lo_gpr(ctx, v38.1);
+                                let v266 = C::put_in_regs(ctx, v38.0);
+                                let v267 = constructor_shl_i128(ctx, v266, v265);
+                                let v268 = C::output(ctx, v267);
+                                // Rule at src/isa/x64/lower.isle line 508.
+                                return Some(v268);
+                            }
+                            I8X16 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v269 = &constructor_mask_xmm_shift(ctx, v3, v38.1);
+                                let v270 = constructor_put_in_xmm(ctx, v38.0);
+                                let v271 = &constructor_mov_rmi_to_xmm(ctx, v269);
+                                let v272 = constructor_x64_psllw(ctx, v270, v271);
+                                let v273 = &constructor_ishl_i8x16_mask(ctx, v269);
+                                let v276 = constructor_x64_load(ctx, I8X16, v273, &ExtKind::None);
+                                let v277 = RegMem::Reg { reg: v276 };
+                                let v278 = &C::reg_mem_to_xmm_mem(ctx, &v277);
+                                let v279 = constructor_sse_and(ctx, I8X16, v272, v278);
+                                let v280 = constructor_output_xmm(ctx, v279);
+                                // Rule at src/isa/x64/lower.isle line 520.
+                                return Some(v280);
+                            }
+                            I16X8 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                let v281 = &constructor_mask_xmm_shift(ctx, v3, v38.1);
+                                let v282 = &constructor_mov_rmi_to_xmm(ctx, v281);
+                                let v283 = constructor_x64_psllw(ctx, v68, v282);
+                                let v284 = constructor_output_xmm(ctx, v283);
+                                // Rule at src/isa/x64/lower.isle line 565.
+                                return Some(v284);
+                            }
+                            I32X4 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                let v281 = &constructor_mask_xmm_shift(ctx, v3, v38.1);
+                                let v282 = &constructor_mov_rmi_to_xmm(ctx, v281);
+                                let v285 = constructor_x64_pslld(ctx, v68, v282);
+                                let v286 = constructor_output_xmm(ctx, v285);
+                                // Rule at src/isa/x64/lower.isle line 568.
+                                return Some(v286);
+                            }
+                            I64X2 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                let v281 = &constructor_mask_xmm_shift(ctx, v3, v38.1);
+                                let v282 = &constructor_mov_rmi_to_xmm(ctx, v281);
+                                let v287 = constructor_x64_psllq(ctx, v68, v282);
+                                let v288 = constructor_output_xmm(ctx, v287);
+                                // Rule at src/isa/x64/lower.isle line 571.
+                                return Some(v288);
+                            }
+                            _ => {}
+                        }
+                        let v4 = C::fits_in_64(ctx, v3);
+                        if let Some(v5) = v4 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v41 = constructor_put_in_gpr(ctx, v38.0);
+                            let v262 = &constructor_put_masked_in_imm8_gpr(ctx, v38.1, v5);
+                            let v263 = constructor_x64_shl(ctx, v5, v41, v262);
+                            let v264 = constructor_output_gpr(ctx, v263);
+                            // Rule at src/isa/x64/lower.isle line 469.
+                            return Some(v264);
+                        }
+                    }
+                }
+                &Opcode::Ushr => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            I128 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v265 = constructor_lo_gpr(ctx, v38.1);
+                                let v266 = C::put_in_regs(ctx, v38.0);
+                                let v293 = constructor_shr_i128(ctx, v266, v265);
+                                let v294 = C::output(ctx, v293);
+                                // Rule at src/isa/x64/lower.isle line 615.
+                                return Some(v294);
+                            }
+                            I8X16 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v269 = &constructor_mask_xmm_shift(ctx, v3, v38.1);
+                                let v270 = constructor_put_in_xmm(ctx, v38.0);
+                                let v271 = &constructor_mov_rmi_to_xmm(ctx, v269);
+                                let v295 = constructor_x64_psrlw(ctx, v270, v271);
+                                let v296 = &constructor_ushr_i8x16_mask(ctx, v269);
+                                let v297 = &constructor_synthetic_amode_to_xmm_mem(ctx, v296);
+                                let v298 = constructor_sse_and(ctx, I8X16, v295, v297);
+                                let v299 = constructor_output_xmm(ctx, v298);
+                                // Rule at src/isa/x64/lower.isle line 625.
+                                return Some(v299);
+                            }
+                            I16X8 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                let v281 = &constructor_mask_xmm_shift(ctx, v3, v38.1);
+                                let v282 = &constructor_mov_rmi_to_xmm(ctx, v281);
+                                let v300 = constructor_x64_psrlw(ctx, v68, v282);
+                                let v301 = constructor_output_xmm(ctx, v300);
+                                // Rule at src/isa/x64/lower.isle line 671.
+                                return Some(v301);
+                            }
+                            I32X4 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                let v281 = &constructor_mask_xmm_shift(ctx, v3, v38.1);
+                                let v282 = &constructor_mov_rmi_to_xmm(ctx, v281);
+                                let v302 = constructor_x64_psrld(ctx, v68, v282);
+                                let v303 = constructor_output_xmm(ctx, v302);
+                                // Rule at src/isa/x64/lower.isle line 674.
+                                return Some(v303);
+                            }
+                            I64X2 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                let v281 = &constructor_mask_xmm_shift(ctx, v3, v38.1);
+                                let v282 = &constructor_mov_rmi_to_xmm(ctx, v281);
+                                let v304 = constructor_x64_psrlq(ctx, v68, v282);
+                                let v305 = constructor_output_xmm(ctx, v304);
+                                // Rule at src/isa/x64/lower.isle line 677.
+                                return Some(v305);
+                            }
+                            _ => {}
+                        }
+                        let v4 = C::fits_in_64(ctx, v3);
+                        if let Some(v5) = v4 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v290 = constructor_extend_to_gpr(ctx, v38.0, v5, &ExtendKind::Zero);
+                            let v262 = &constructor_put_masked_in_imm8_gpr(ctx, v38.1, v5);
+                            let v291 = constructor_x64_shr(ctx, v5, v290, v262);
+                            let v292 = constructor_output_gpr(ctx, v291);
+                            // Rule at src/isa/x64/lower.isle line 578.
+                            return Some(v292);
+                        }
+                    }
+                }
+                &Opcode::Sshr => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            I128 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v265 = constructor_lo_gpr(ctx, v38.1);
+                                let v266 = C::put_in_regs(ctx, v38.0);
+                                let v310 = constructor_sar_i128(ctx, v266, v265);
+                                let v311 = C::output(ctx, v310);
+                                // Rule at src/isa/x64/lower.isle line 727.
+                                return Some(v311);
+                            }
+                            I8X16 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                let v281 = &constructor_mask_xmm_shift(ctx, v3, v38.1);
+                                let v312 = &C::xmm_to_xmm_mem(ctx, v68);
+                                let v313 = constructor_x64_punpcklbw(ctx, v68, v312);
+                                let v314 = &C::xmm_to_xmm_mem(ctx, v68);
+                                let v315 = constructor_x64_punpckhbw(ctx, v68, v314);
+                                let v92 = C::value_type(ctx, v38.1);
+                                let v316 = &constructor_sshr_i8x16_bigger_shift(ctx, v92, v281);
+                                let v317 = constructor_x64_psraw(ctx, v313, v316);
+                                let v318 = constructor_x64_psraw(ctx, v315, v316);
+                                let v319 = &C::xmm_to_xmm_mem(ctx, v318);
+                                let v320 = constructor_x64_packsswb(ctx, v317, v319);
+                                let v321 = constructor_output_xmm(ctx, v320);
+                                // Rule at src/isa/x64/lower.isle line 748.
+                                return Some(v321);
+                            }
+                            I16X8 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                let v281 = &constructor_mask_xmm_shift(ctx, v3, v38.1);
+                                let v282 = &constructor_mov_rmi_to_xmm(ctx, v281);
+                                let v322 = constructor_x64_psraw(ctx, v68, v282);
+                                let v323 = constructor_output_xmm(ctx, v322);
+                                // Rule at src/isa/x64/lower.isle line 777.
+                                return Some(v323);
+                            }
+                            I32X4 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                let v281 = &constructor_mask_xmm_shift(ctx, v3, v38.1);
+                                let v282 = &constructor_mov_rmi_to_xmm(ctx, v281);
+                                let v324 = constructor_x64_psrad(ctx, v68, v282);
+                                let v325 = constructor_output_xmm(ctx, v324);
+                                // Rule at src/isa/x64/lower.isle line 780.
+                                return Some(v325);
+                            }
+                            I64X2 => {
+                                let v328 = C::use_avx512vl(ctx);
+                                if v328 == true {
+                                    let v329 = C::use_avx512f(ctx);
+                                    if v329 == true {
+                                        let v38 = C::unpack_value_array_2(ctx, v37);
+                                        let v172 = C::def_inst(ctx, v38.1);
+                                        if let Some(v173) = v172 {
+                                            let v174 = &C::inst_data(ctx, v173);
+                                            if let &InstructionData::UnaryImm {
+                                                opcode: ref v326,
+                                                imm: v327,
+                                            } = v174
+                                            {
+                                                if let &Opcode::Iconst = v326 {
+                                                    let v330 = &C::put_in_xmm_mem(ctx, v38.0);
+                                                    let v331 =
+                                                        C::shift_amount_masked(ctx, v3, v327);
+                                                    let v332 =
+                                                        constructor_x64_vpsraq_imm(ctx, v330, v331);
+                                                    let v333 = constructor_output_xmm(ctx, v332);
+                                                    // Rule at src/isa/x64/lower.isle line 786.
+                                                    return Some(v333);
+                                                }
+                                            }
+                                        }
+                                        let v60 = constructor_put_in_gpr(ctx, v38.1);
+                                        let v334 = C::shift_mask(ctx, v3);
+                                        let v335 = C::u8_as_u32(ctx, v334);
+                                        let v336 = RegMemImm::Imm { simm32: v335 };
+                                        let v337 = &C::gpr_mem_imm_new(ctx, &v336);
+                                        let v338 = constructor_x64_and(ctx, I64, v60, v337);
+                                        let v339 = constructor_put_in_xmm(ctx, v38.0);
+                                        let v340 = &C::gpr_to_gpr_mem(ctx, v338);
+                                        let v341 = constructor_x64_movd_to_xmm(ctx, v340);
+                                        let v342 = &C::xmm_to_xmm_mem(ctx, v341);
+                                        let v343 = constructor_x64_vpsraq(ctx, v339, v342);
+                                        let v344 = constructor_output_xmm(ctx, v343);
+                                        // Rule at src/isa/x64/lower.isle line 791.
+                                        return Some(v344);
+                                    }
+                                }
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v172 = C::def_inst(ctx, v38.1);
+                                if let Some(v173) = v172 {
+                                    let v174 = &C::inst_data(ctx, v173);
+                                    if let &InstructionData::UnaryImm {
+                                        opcode: ref v326,
+                                        imm: v327,
+                                    } = v174
+                                    {
+                                        if let &Opcode::Iconst = v326 {
+                                            let v345 = C::u64_from_imm64(ctx, v327);
+                                            let v346 = C::u64_as_u32(ctx, v345);
+                                            if let Some(v347) = v346 {
+                                                let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                                let v349 = C::u32_and(ctx, v347, 0x3F);
+                                                let v350 = constructor_lower_i64x2_sshr_imm(
+                                                    ctx, v68, v349,
+                                                );
+                                                let v351 = constructor_output_xmm(ctx, v350);
+                                                // Rule at src/isa/x64/lower.isle line 797.
+                                                return Some(v351);
+                                            }
+                                        }
+                                    }
+                                }
+                                let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                let v195 = constructor_put_in_gpr(ctx, v38.1);
+                                let v352 = RegMemImm::Imm { simm32: 0x3F };
+                                let v353 = &C::gpr_mem_imm_new(ctx, &v352);
+                                let v354 = constructor_x64_and(ctx, I64, v195, v353);
+                                let v355 = constructor_lower_i64x2_sshr_gpr(ctx, v68, v354);
+                                let v356 = constructor_output_xmm(ctx, v355);
+                                // Rule at src/isa/x64/lower.isle line 800.
+                                return Some(v356);
+                            }
+                            _ => {}
+                        }
+                        let v4 = C::fits_in_64(ctx, v3);
+                        if let Some(v5) = v4 {
+                            let v38 = C::unpack_value_array_2(ctx, v37);
+                            let v307 = constructor_extend_to_gpr(ctx, v38.0, v5, &ExtendKind::Sign);
+                            let v262 = &constructor_put_masked_in_imm8_gpr(ctx, v38.1, v5);
+                            let v308 = constructor_x64_sar(ctx, v5, v307, v262);
+                            let v309 = constructor_output_gpr(ctx, v308);
+                            // Rule at src/isa/x64/lower.isle line 690.
+                            return Some(v309);
+                        }
+                    }
+                }
+                &Opcode::Fadd => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            F32 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v58 = &C::sinkable_load(ctx, v38.0);
+                                if let Some(v59) = v58 {
+                                    let v1180 = constructor_put_in_xmm(ctx, v38.1);
+                                    let v1191 = &constructor_sink_load_to_xmm_mem(ctx, v59);
+                                    let v1192 = constructor_x64_addss(ctx, v1180, v1191);
+                                    let v1193 = constructor_output_xmm(ctx, v1192);
+                                    // Rule at src/isa/x64/lower.isle line 2432.
+                                    return Some(v1193);
+                                }
+                                let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
+                                let v1183 = constructor_x64_addss(ctx, v68, v69);
+                                let v1184 = constructor_output_xmm(ctx, v1183);
+                                // Rule at src/isa/x64/lower.isle line 2421.
+                                return Some(v1184);
+                            }
+                            F64 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v58 = &C::sinkable_load(ctx, v38.0);
+                                if let Some(v59) = v58 {
+                                    let v1180 = constructor_put_in_xmm(ctx, v38.1);
+                                    let v1191 = &constructor_sink_load_to_xmm_mem(ctx, v59);
+                                    let v1194 = constructor_x64_addsd(ctx, v1180, v1191);
+                                    let v1195 = constructor_output_xmm(ctx, v1194);
+                                    // Rule at src/isa/x64/lower.isle line 2434.
+                                    return Some(v1195);
+                                }
+                                let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
+                                let v1185 = constructor_x64_addsd(ctx, v68, v69);
+                                let v1186 = constructor_output_xmm(ctx, v1185);
+                                // Rule at src/isa/x64/lower.isle line 2423.
+                                return Some(v1186);
+                            }
+                            F32X4 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v58 = &C::sinkable_load(ctx, v38.0);
+                                if let Some(v59) = v58 {
+                                    let v1180 = constructor_put_in_xmm(ctx, v38.1);
+                                    let v1191 = &constructor_sink_load_to_xmm_mem(ctx, v59);
+                                    let v1196 = constructor_x64_addps(ctx, v1180, v1191);
+                                    let v1197 = constructor_output_xmm(ctx, v1196);
+                                    // Rule at src/isa/x64/lower.isle line 2436.
+                                    return Some(v1197);
+                                }
+                                let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
+                                let v1187 = constructor_x64_addps(ctx, v68, v69);
+                                let v1188 = constructor_output_xmm(ctx, v1187);
+                                // Rule at src/isa/x64/lower.isle line 2425.
+                                return Some(v1188);
+                            }
+                            F64X2 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v58 = &C::sinkable_load(ctx, v38.0);
+                                if let Some(v59) = v58 {
+                                    let v1180 = constructor_put_in_xmm(ctx, v38.1);
+                                    let v1191 = &constructor_sink_load_to_xmm_mem(ctx, v59);
+                                    let v1198 = constructor_x64_addpd(ctx, v1180, v1191);
+                                    let v1199 = constructor_output_xmm(ctx, v1198);
+                                    // Rule at src/isa/x64/lower.isle line 2438.
+                                    return Some(v1199);
+                                }
+                                let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
+                                let v1189 = constructor_x64_addpd(ctx, v68, v69);
+                                let v1190 = constructor_output_xmm(ctx, v1189);
+                                // Rule at src/isa/x64/lower.isle line 2427.
+                                return Some(v1190);
+                            }
+                            _ => {}
+                        }
+                    }
+                }
+                &Opcode::Fsub => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            F32 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
+                                let v1200 = constructor_x64_subss(ctx, v68, v69);
+                                let v1201 = constructor_output_xmm(ctx, v1200);
+                                // Rule at src/isa/x64/lower.isle line 2443.
+                                return Some(v1201);
+                            }
+                            F64 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
+                                let v1202 = constructor_x64_subsd(ctx, v68, v69);
+                                let v1203 = constructor_output_xmm(ctx, v1202);
+                                // Rule at src/isa/x64/lower.isle line 2445.
+                                return Some(v1203);
+                            }
+                            F32X4 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
+                                let v1204 = constructor_x64_subps(ctx, v68, v69);
+                                let v1205 = constructor_output_xmm(ctx, v1204);
+                                // Rule at src/isa/x64/lower.isle line 2447.
+                                return Some(v1205);
+                            }
+                            F64X2 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
+                                let v1206 = constructor_x64_subpd(ctx, v68, v69);
+                                let v1207 = constructor_output_xmm(ctx, v1206);
+                                // Rule at src/isa/x64/lower.isle line 2449.
+                                return Some(v1207);
+                            }
+                            _ => {}
+                        }
+                    }
+                }
+                &Opcode::Fmul => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            F32 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v58 = &C::sinkable_load(ctx, v38.0);
+                                if let Some(v59) = v58 {
+                                    let v1180 = constructor_put_in_xmm(ctx, v38.1);
+                                    let v1191 = &constructor_sink_load_to_xmm_mem(ctx, v59);
+                                    let v1216 = constructor_x64_mulss(ctx, v1180, v1191);
+                                    let v1217 = constructor_output_xmm(ctx, v1216);
+                                    // Rule at src/isa/x64/lower.isle line 2465.
+                                    return Some(v1217);
+                                }
+                                let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
+                                let v1208 = constructor_x64_mulss(ctx, v68, v69);
+                                let v1209 = constructor_output_xmm(ctx, v1208);
+                                // Rule at src/isa/x64/lower.isle line 2454.
+                                return Some(v1209);
+                            }
+                            F64 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v58 = &C::sinkable_load(ctx, v38.0);
+                                if let Some(v59) = v58 {
+                                    let v1180 = constructor_put_in_xmm(ctx, v38.1);
+                                    let v1191 = &constructor_sink_load_to_xmm_mem(ctx, v59);
+                                    let v1218 = constructor_x64_mulsd(ctx, v1180, v1191);
+                                    let v1219 = constructor_output_xmm(ctx, v1218);
+                                    // Rule at src/isa/x64/lower.isle line 2467.
+                                    return Some(v1219);
+                                }
+                                let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
+                                let v1210 = constructor_x64_mulsd(ctx, v68, v69);
+                                let v1211 = constructor_output_xmm(ctx, v1210);
+                                // Rule at src/isa/x64/lower.isle line 2456.
+                                return Some(v1211);
+                            }
+                            F32X4 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v58 = &C::sinkable_load(ctx, v38.0);
+                                if let Some(v59) = v58 {
+                                    let v1180 = constructor_put_in_xmm(ctx, v38.1);
+                                    let v1191 = &constructor_sink_load_to_xmm_mem(ctx, v59);
+                                    let v1220 = constructor_x64_mulps(ctx, v1180, v1191);
+                                    let v1221 = constructor_output_xmm(ctx, v1220);
+                                    // Rule at src/isa/x64/lower.isle line 2469.
+                                    return Some(v1221);
+                                }
+                                let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
+                                let v1212 = constructor_x64_mulps(ctx, v68, v69);
+                                let v1213 = constructor_output_xmm(ctx, v1212);
+                                // Rule at src/isa/x64/lower.isle line 2458.
+                                return Some(v1213);
+                            }
+                            F64X2 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v58 = &C::sinkable_load(ctx, v38.0);
+                                if let Some(v59) = v58 {
+                                    let v1180 = constructor_put_in_xmm(ctx, v38.1);
+                                    let v1191 = &constructor_sink_load_to_xmm_mem(ctx, v59);
+                                    let v1222 = constructor_x64_mulpd(ctx, v1180, v1191);
+                                    let v1223 = constructor_output_xmm(ctx, v1222);
+                                    // Rule at src/isa/x64/lower.isle line 2471.
+                                    return Some(v1223);
+                                }
+                                let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
+                                let v1214 = constructor_x64_mulpd(ctx, v68, v69);
+                                let v1215 = constructor_output_xmm(ctx, v1214);
+                                // Rule at src/isa/x64/lower.isle line 2460.
+                                return Some(v1215);
+                            }
+                            _ => {}
+                        }
+                    }
+                }
+                &Opcode::Fdiv => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            F32 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
+                                let v1224 = constructor_x64_divss(ctx, v68, v69);
+                                let v1225 = constructor_output_xmm(ctx, v1224);
+                                // Rule at src/isa/x64/lower.isle line 2476.
+                                return Some(v1225);
+                            }
+                            F64 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
+                                let v1226 = constructor_x64_divsd(ctx, v68, v69);
+                                let v1227 = constructor_output_xmm(ctx, v1226);
+                                // Rule at src/isa/x64/lower.isle line 2478.
+                                return Some(v1227);
+                            }
+                            F32X4 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
+                                let v1228 = constructor_x64_divps(ctx, v68, v69);
+                                let v1229 = constructor_output_xmm(ctx, v1228);
+                                // Rule at src/isa/x64/lower.isle line 2480.
+                                return Some(v1229);
+                            }
+                            F64X2 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
+                                let v1230 = constructor_x64_divpd(ctx, v68, v69);
+                                let v1231 = constructor_output_xmm(ctx, v1230);
+                                // Rule at src/isa/x64/lower.isle line 2482.
+                                return Some(v1231);
+                            }
+                            _ => {}
+                        }
+                    }
+                }
+                &Opcode::Fcopysign => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            F32 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v2000 = C::value_type(ctx, v38.0);
+                                if v2000 == F32 {
+                                    let v2050 = constructor_imm(ctx, F32, 0x80000000);
+                                    let v2051 = C::xmm_new(ctx, v2050);
+                                    let v2052 = &C::put_in_xmm_mem(ctx, v38.0);
+                                    let v2053 = constructor_x64_andnps(ctx, v2051, v2052);
+                                    let v2054 = &C::put_in_xmm_mem(ctx, v38.1);
+                                    let v2055 = constructor_x64_andps(ctx, v2051, v2054);
+                                    let v2056 = &C::xmm_to_xmm_mem(ctx, v2055);
+                                    let v2057 = constructor_x64_orps(ctx, v2053, v2056);
+                                    let v2058 = constructor_output_xmm(ctx, v2057);
+                                    // Rule at src/isa/x64/lower.isle line 3847.
+                                    return Some(v2058);
+                                }
+                            }
+                            F64 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v2000 = C::value_type(ctx, v38.0);
+                                if v2000 == F64 {
+                                    let v2059 = constructor_imm(ctx, F64, 0x8000000000000000);
+                                    let v2060 = C::xmm_new(ctx, v2059);
+                                    let v2052 = &C::put_in_xmm_mem(ctx, v38.0);
+                                    let v2061 = constructor_x64_andnpd(ctx, v2060, v2052);
+                                    let v2054 = &C::put_in_xmm_mem(ctx, v38.1);
+                                    let v2062 = constructor_x64_andpd(ctx, v2060, v2054);
+                                    let v2063 = &C::xmm_to_xmm_mem(ctx, v2062);
+                                    let v2064 = constructor_x64_orpd(ctx, v2061, v2063);
+                                    let v2065 = constructor_output_xmm(ctx, v2064);
+                                    // Rule at src/isa/x64/lower.isle line 3853.
+                                    return Some(v2065);
+                                }
+                            }
+                            _ => {}
+                        }
+                    }
+                }
+                &Opcode::Fmin => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            F32 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                let v439 = constructor_put_in_xmm(ctx, v38.1);
+                                let v1250 = constructor_xmm_min_max_seq(ctx, F32, true, v68, v439);
+                                let v1251 = constructor_output_xmm(ctx, v1250);
+                                // Rule at src/isa/x64/lower.isle line 2513.
+                                return Some(v1251);
+                            }
+                            F64 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                let v439 = constructor_put_in_xmm(ctx, v38.1);
+                                let v1252 = constructor_xmm_min_max_seq(ctx, F64, true, v68, v439);
+                                let v1253 = constructor_output_xmm(ctx, v1252);
+                                // Rule at src/isa/x64/lower.isle line 2515.
+                                return Some(v1253);
+                            }
+                            F32X4 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
+                                let v1254 = constructor_x64_minps(ctx, v68, v69);
+                                let v1255 = constructor_put_in_xmm(ctx, v38.1);
+                                let v1256 = &C::put_in_xmm_mem(ctx, v38.0);
+                                let v1257 = constructor_x64_minps(ctx, v1255, v1256);
+                                let v1258 = &C::xmm_to_xmm_mem(ctx, v1257);
+                                let v1259 = constructor_x64_orps(ctx, v1254, v1258);
+                                let v1260 = &C::xmm_to_xmm_mem(ctx, v1257);
+                                let v1261 =
+                                    constructor_x64_cmpps(ctx, v1259, v1260, &FcmpImm::Unordered);
+                                let v1262 = &C::xmm_to_xmm_mem(ctx, v1261);
+                                let v1263 = constructor_x64_orps(ctx, v1259, v1262);
+                                let v1265 = &C::xmi_imm(ctx, 0xA);
+                                let v1266 = constructor_x64_psrld(ctx, v1261, v1265);
+                                let v1267 = &C::xmm_to_xmm_mem(ctx, v1263);
+                                let v1268 = constructor_x64_andnps(ctx, v1266, v1267);
+                                let v1269 = constructor_output_xmm(ctx, v1268);
+                                // Rule at src/isa/x64/lower.isle line 2530.
+                                return Some(v1269);
+                            }
+                            F64X2 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
+                                let v1270 = constructor_x64_minpd(ctx, v68, v69);
+                                let v1255 = constructor_put_in_xmm(ctx, v38.1);
+                                let v1256 = &C::put_in_xmm_mem(ctx, v38.0);
+                                let v1271 = constructor_x64_minpd(ctx, v1255, v1256);
+                                let v1272 = &C::xmm_to_xmm_mem(ctx, v1271);
+                                let v1273 = constructor_x64_orpd(ctx, v1270, v1272);
+                                let v1274 = &C::xmm_to_xmm_mem(ctx, v1271);
+                                let v1275 =
+                                    constructor_x64_cmppd(ctx, v1270, v1274, &FcmpImm::Unordered);
+                                let v1276 = &C::xmm_to_xmm_mem(ctx, v1275);
+                                let v1277 = constructor_x64_orpd(ctx, v1273, v1276);
+                                let v1279 = &C::xmi_imm(ctx, 0xD);
+                                let v1280 = constructor_x64_psrlq(ctx, v1275, v1279);
+                                let v1281 = &C::xmm_to_xmm_mem(ctx, v1277);
+                                let v1282 = constructor_x64_andnpd(ctx, v1280, v1281);
+                                let v1283 = constructor_output_xmm(ctx, v1282);
+                                // Rule at src/isa/x64/lower.isle line 2573.
+                                return Some(v1283);
+                            }
+                            _ => {}
+                        }
+                    }
+                }
+                &Opcode::FminPseudo => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            F32 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v1180 = constructor_put_in_xmm(ctx, v38.1);
+                                let v178 = &C::put_in_xmm_mem(ctx, v38.0);
+                                let v1319 = constructor_x64_minss(ctx, v1180, v178);
+                                let v1320 = constructor_output_xmm(ctx, v1319);
+                                // Rule at src/isa/x64/lower.isle line 2682.
+                                return Some(v1320);
+                            }
+                            F64 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v1180 = constructor_put_in_xmm(ctx, v38.1);
+                                let v178 = &C::put_in_xmm_mem(ctx, v38.0);
+                                let v1321 = constructor_x64_minsd(ctx, v1180, v178);
+                                let v1322 = constructor_output_xmm(ctx, v1321);
+                                // Rule at src/isa/x64/lower.isle line 2684.
+                                return Some(v1322);
+                            }
+                            F32X4 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v1180 = constructor_put_in_xmm(ctx, v38.1);
+                                let v178 = &C::put_in_xmm_mem(ctx, v38.0);
+                                let v1323 = constructor_x64_minps(ctx, v1180, v178);
+                                let v1324 = constructor_output_xmm(ctx, v1323);
+                                // Rule at src/isa/x64/lower.isle line 2686.
+                                return Some(v1324);
+                            }
+                            F64X2 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v1180 = constructor_put_in_xmm(ctx, v38.1);
+                                let v178 = &C::put_in_xmm_mem(ctx, v38.0);
+                                let v1325 = constructor_x64_minpd(ctx, v1180, v178);
+                                let v1326 = constructor_output_xmm(ctx, v1325);
+                                // Rule at src/isa/x64/lower.isle line 2688.
+                                return Some(v1326);
+                            }
+                            _ => {}
+                        }
+                    }
+                }
+                &Opcode::Fmax => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            F32 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                let v439 = constructor_put_in_xmm(ctx, v38.1);
+                                let v1285 = constructor_xmm_min_max_seq(ctx, F32, false, v68, v439);
+                                let v1286 = constructor_output_xmm(ctx, v1285);
+                                // Rule at src/isa/x64/lower.isle line 2585.
+                                return Some(v1286);
+                            }
+                            F64 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                let v439 = constructor_put_in_xmm(ctx, v38.1);
+                                let v1287 = constructor_xmm_min_max_seq(ctx, F64, false, v68, v439);
+                                let v1288 = constructor_output_xmm(ctx, v1287);
+                                // Rule at src/isa/x64/lower.isle line 2587.
+                                return Some(v1288);
+                            }
+                            F32X4 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
+                                let v1289 = constructor_x64_maxps(ctx, v68, v69);
+                                let v1255 = constructor_put_in_xmm(ctx, v38.1);
+                                let v1256 = &C::put_in_xmm_mem(ctx, v38.0);
+                                let v1290 = constructor_x64_maxps(ctx, v1255, v1256);
+                                let v1291 = &C::xmm_to_xmm_mem(ctx, v1290);
+                                let v1292 = constructor_x64_xorps(ctx, v1289, v1291);
+                                let v1293 = &C::xmm_to_xmm_mem(ctx, v1292);
+                                let v1294 = constructor_x64_orps(ctx, v1289, v1293);
+                                let v1295 = &C::xmm_to_xmm_mem(ctx, v1292);
+                                let v1296 = constructor_x64_subps(ctx, v1294, v1295);
+                                let v1297 = &C::xmm_to_xmm_mem(ctx, v1294);
+                                let v1298 =
+                                    constructor_x64_cmpps(ctx, v1294, v1297, &FcmpImm::Unordered);
+                                let v1299 = &C::xmi_imm(ctx, 0xA);
+                                let v1300 = constructor_x64_psrld(ctx, v1298, v1299);
+                                let v1301 = &C::xmm_to_xmm_mem(ctx, v1296);
+                                let v1302 = constructor_x64_andnps(ctx, v1300, v1301);
+                                let v1303 = constructor_output_xmm(ctx, v1302);
+                                // Rule at src/isa/x64/lower.isle line 2593.
+                                return Some(v1303);
+                            }
+                            F64X2 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
+                                let v1304 = constructor_x64_maxpd(ctx, v68, v69);
+                                let v1255 = constructor_put_in_xmm(ctx, v38.1);
+                                let v1256 = &C::put_in_xmm_mem(ctx, v38.0);
+                                let v1305 = constructor_x64_maxpd(ctx, v1255, v1256);
+                                let v1306 = &C::xmm_to_xmm_mem(ctx, v1305);
+                                let v1307 = constructor_x64_xorpd(ctx, v1304, v1306);
+                                let v1308 = &C::xmm_to_xmm_mem(ctx, v1307);
+                                let v1309 = constructor_x64_orpd(ctx, v1304, v1308);
+                                let v1310 = &C::xmm_to_xmm_mem(ctx, v1307);
+                                let v1311 = constructor_x64_subpd(ctx, v1309, v1310);
+                                let v1312 = &C::xmm_to_xmm_mem(ctx, v1309);
+                                let v1313 =
+                                    constructor_x64_cmppd(ctx, v1309, v1312, &FcmpImm::Unordered);
+                                let v1314 = &C::xmi_imm(ctx, 0xD);
+                                let v1315 = constructor_x64_psrlq(ctx, v1313, v1314);
+                                let v1316 = &C::xmm_to_xmm_mem(ctx, v1311);
+                                let v1317 = constructor_x64_andnpd(ctx, v1315, v1316);
+                                let v1318 = constructor_output_xmm(ctx, v1317);
+                                // Rule at src/isa/x64/lower.isle line 2636.
+                                return Some(v1318);
+                            }
+                            _ => {}
+                        }
+                    }
+                }
+                &Opcode::FmaxPseudo => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            F32 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v1180 = constructor_put_in_xmm(ctx, v38.1);
+                                let v178 = &C::put_in_xmm_mem(ctx, v38.0);
+                                let v1327 = constructor_x64_maxss(ctx, v1180, v178);
+                                let v1328 = constructor_output_xmm(ctx, v1327);
+                                // Rule at src/isa/x64/lower.isle line 2693.
+                                return Some(v1328);
+                            }
+                            F64 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v1180 = constructor_put_in_xmm(ctx, v38.1);
+                                let v178 = &C::put_in_xmm_mem(ctx, v38.0);
+                                let v1329 = constructor_x64_maxsd(ctx, v1180, v178);
+                                let v1330 = constructor_output_xmm(ctx, v1329);
+                                // Rule at src/isa/x64/lower.isle line 2695.
+                                return Some(v1330);
+                            }
+                            F32X4 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v1180 = constructor_put_in_xmm(ctx, v38.1);
+                                let v178 = &C::put_in_xmm_mem(ctx, v38.0);
+                                let v1331 = constructor_x64_maxps(ctx, v1180, v178);
+                                let v1332 = constructor_output_xmm(ctx, v1331);
+                                // Rule at src/isa/x64/lower.isle line 2697.
+                                return Some(v1332);
+                            }
+                            F64X2 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v1180 = constructor_put_in_xmm(ctx, v38.1);
+                                let v178 = &C::put_in_xmm_mem(ctx, v38.0);
+                                let v1333 = constructor_x64_maxpd(ctx, v1180, v178);
+                                let v1334 = constructor_output_xmm(ctx, v1333);
+                                // Rule at src/isa/x64/lower.isle line 2699.
+                                return Some(v1334);
+                            }
+                            _ => {}
+                        }
+                    }
+                }
+                &Opcode::Snarrow => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            I8X16 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v2000 = C::value_type(ctx, v38.0);
+                                if v2000 == I16X8 {
+                                    let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                    let v69 = &C::put_in_xmm_mem(ctx, v38.1);
+                                    let v2001 = constructor_x64_packsswb(ctx, v68, v69);
+                                    let v2002 = constructor_output_xmm(ctx, v2001);
+                                    // Rule at src/isa/x64/lower.isle line 3733.
+                                    return Some(v2002);
+                                }
+                            }
+                            I16X8 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v2000 = C::value_type(ctx, v38.0);
+                                if v2000 == I32X4 {
+                                    let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                    let v69 = &C::put_in_xmm_mem(ctx, v38.1);
+                                    let v2003 = constructor_x64_packssdw(ctx, v68, v69);
+                                    let v2004 = constructor_output_xmm(ctx, v2003);
+                                    // Rule at src/isa/x64/lower.isle line 3736.
+                                    return Some(v2004);
+                                }
+                            }
+                            I32X4 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v172 = C::def_inst(ctx, v38.1);
+                                if let Some(v173) = v172 {
+                                    let v174 = &C::inst_data(ctx, v173);
+                                    if let &InstructionData::UnaryConst {
+                                        opcode: ref v2008,
+                                        constant_handle: v2009,
+                                    } = v174
+                                    {
+                                        if let &Opcode::Vconst = v2008 {
+                                            let v181 = C::def_inst(ctx, v38.0);
+                                            if let Some(v182) = v181 {
+                                                let v183 = &C::inst_data(ctx, v182);
+                                                if let &InstructionData::Unary {
+                                                    opcode: ref v184,
+                                                    arg: v185,
+                                                } = v183
+                                                {
+                                                    match v184 {
+                                                        &Opcode::FcvtToSintSat => {
+                                                            let v2005 = C::first_result(ctx, v182);
+                                                            if let Some(v2006) = v2005 {
+                                                                let v2007 =
+                                                                    C::value_type(ctx, v2006);
+                                                                if v2007 == I64X2 {
+                                                                    let v2010 =
+                                                                        C::u128_from_constant(
+                                                                            ctx, v2009,
+                                                                        );
+                                                                    if let Some(v2011) = v2010 {
+                                                                        if v2011 == 0x0 {
+                                                                            let v186 = constructor_put_in_xmm(ctx, v185);
+                                                                            let v2012 =
+                                                                                &C::xmm_to_xmm_mem(
+                                                                                    ctx, v186,
+                                                                                );
+                                                                            let v2013 = constructor_x64_cmppd(ctx, v186, v2012, &FcmpImm::Equal);
+                                                                            let v2015 = C::emit_u128_le_const(ctx, 0x41DFFFFFFFC0000041DFFFFFFFC00000);
+                                                                            let v2016 = &constructor_const_to_xmm_mem(ctx, v2015);
+                                                                            let v2017 = constructor_x64_andps(ctx, v2013, v2016);
+                                                                            let v2018 =
+                                                                                &C::xmm_to_xmm_mem(
+                                                                                    ctx, v2017,
+                                                                                );
+                                                                            let v2019 = constructor_x64_minpd(ctx, v186, v2018);
+                                                                            let v2020 =
+                                                                                &C::xmm_to_xmm_mem(
+                                                                                    ctx, v2019,
+                                                                                );
+                                                                            let v2021 = constructor_x64_cvttpd2dq(ctx, v2020);
+                                                                            let v2022 = constructor_output_xmm(ctx, v2021);
+                                                                            // Rule at src/isa/x64/lower.isle line 3745.
+                                                                            return Some(v2022);
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                        &Opcode::X86Cvtt2dq => {
+                                                            let v2005 = C::first_result(ctx, v182);
+                                                            if let Some(v2006) = v2005 {
+                                                                let v2007 =
+                                                                    C::value_type(ctx, v2006);
+                                                                if v2007 == I64X2 {
+                                                                    let v2010 =
+                                                                        C::u128_from_constant(
+                                                                            ctx, v2009,
+                                                                        );
+                                                                    if let Some(v2011) = v2010 {
+                                                                        if v2011 == 0x0 {
+                                                                            let v494 =
+                                                                                &C::put_in_xmm_mem(
+                                                                                    ctx, v185,
+                                                                                );
+                                                                            let v2023 = constructor_x64_cvttpd2dq(ctx, v494);
+                                                                            let v2024 = constructor_output_xmm(ctx, v2023);
+                                                                            // Rule at src/isa/x64/lower.isle line 3769.
+                                                                            return Some(v2024);
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                        _ => {}
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                            }
+                            _ => {}
+                        }
+                    }
+                }
+                &Opcode::Unarrow => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            I8X16 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v2000 = C::value_type(ctx, v38.0);
+                                if v2000 == I16X8 {
+                                    let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                    let v69 = &C::put_in_xmm_mem(ctx, v38.1);
+                                    let v2025 = constructor_x64_packuswb(ctx, v68, v69);
+                                    let v2026 = constructor_output_xmm(ctx, v2025);
+                                    // Rule at src/isa/x64/lower.isle line 3775.
+                                    return Some(v2026);
+                                }
+                            }
+                            I16X8 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v2000 = C::value_type(ctx, v38.0);
+                                if v2000 == I32X4 {
+                                    let v436 = C::use_sse41(ctx);
+                                    if v436 == true {
+                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
+                                        let v2027 = constructor_x64_packusdw(ctx, v68, v69);
+                                        let v2028 = constructor_output_xmm(ctx, v2027);
+                                        // Rule at src/isa/x64/lower.isle line 3778.
+                                        return Some(v2028);
+                                    }
+                                    let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                    let v2029 =
+                                        constructor_unarrow_i32x4_lanes_to_low_u16_lanes(ctx, v68);
+                                    let v2030 = constructor_put_in_xmm(ctx, v38.1);
+                                    let v2031 = constructor_unarrow_i32x4_lanes_to_low_u16_lanes(
+                                        ctx, v2030,
+                                    );
+                                    let v2032 = &C::xmm_to_xmm_mem(ctx, v2031);
+                                    let v2033 = constructor_x64_punpcklqdq(ctx, v2029, v2032);
+                                    let v2034 = constructor_output_xmm(ctx, v2033);
+                                    // Rule at src/isa/x64/lower.isle line 3788.
+                                    return Some(v2034);
+                                }
+                            }
+                            _ => {}
+                        }
+                    }
+                }
+                &Opcode::Uunarrow => {
+                    let v38 = C::unpack_value_array_2(ctx, v37);
+                    let v172 = C::def_inst(ctx, v38.1);
+                    if let Some(v173) = v172 {
+                        let v174 = &C::inst_data(ctx, v173);
+                        if let &InstructionData::UnaryConst {
+                            opcode: ref v2008,
+                            constant_handle: v2009,
+                        } = v174
+                        {
+                            if let &Opcode::Vconst = v2008 {
+                                let v181 = C::def_inst(ctx, v38.0);
+                                if let Some(v182) = v181 {
+                                    let v183 = &C::inst_data(ctx, v182);
+                                    if let &InstructionData::Unary {
+                                        opcode: ref v184,
+                                        arg: v185,
+                                    } = v183
+                                    {
+                                        if let &Opcode::FcvtToUintSat = v184 {
+                                            let v476 = C::value_type(ctx, v185);
+                                            if v476 == F64X2 {
+                                                let v2010 = C::u128_from_constant(ctx, v2009);
+                                                if let Some(v2011) = v2010 {
+                                                    if v2011 == 0x0 {
+                                                        let v186 =
+                                                            constructor_put_in_xmm(ctx, v185);
+                                                        let v2494 =
+                                                            constructor_xmm_zero(ctx, F64X2);
+                                                        let v2495 = &C::xmm_to_xmm_mem(ctx, v2494);
+                                                        let v2496 =
+                                                            constructor_x64_maxpd(ctx, v186, v2495);
+                                                        let v2498 = C::emit_u128_le_const(
+                                                            ctx,
+                                                            0x41EFFFFFFFE0000041EFFFFFFFE00000,
+                                                        );
+                                                        let v2499 = &constructor_const_to_xmm_mem(
+                                                            ctx, v2498,
+                                                        );
+                                                        let v2500 = constructor_x64_minpd(
+                                                            ctx, v2496, v2499,
+                                                        );
+                                                        let v2501 = C::xmm_to_reg(ctx, v2500);
+                                                        let v2502 =
+                                                            &constructor_xmm_to_reg_mem(ctx, v2501);
+                                                        let v2503 =
+                                                            &C::xmm_mem_to_reg_mem(ctx, v2502);
+                                                        let v2504 = constructor_x64_round(
+                                                            ctx,
+                                                            F64X2,
+                                                            v2503,
+                                                            &RoundImm::RoundZero,
+                                                        );
+                                                        let v2505 = C::emit_u128_le_const(
+                                                            ctx,
+                                                            0x43300000000000004330000000000000,
+                                                        );
+                                                        let v2506 = &constructor_const_to_xmm_mem(
+                                                            ctx, v2505,
+                                                        );
+                                                        let v2507 = constructor_x64_addpd(
+                                                            ctx, v2504, v2506,
+                                                        );
+                                                        let v2508 = &C::xmm_to_xmm_mem(ctx, v2494);
+                                                        let v2509 = constructor_x64_shufps(
+                                                            ctx, v2507, v2508, 0x88,
+                                                        );
+                                                        let v2510 =
+                                                            constructor_output_xmm(ctx, v2509);
+                                                        // Rule at src/isa/x64/lower.isle line 4622.
+                                                        return Some(v2510);
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                            }
+                        }
+                    }
+                }
+                &Opcode::IaddPairwise => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            I8X16 => {
+                                let v1850 =
+                                    C::emit_u128_le_const(ctx, 0xFF00FF00FF00FF00FF00FF00FF00FF);
+                                let v1851 = &constructor_const_to_xmm_mem(ctx, v1850);
+                                let v1852 = constructor_x64_movdqu_load(ctx, v1851);
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v1853 = constructor_put_in_xmm(ctx, v38.0);
+                                let v1854 = &C::xmm_to_xmm_mem(ctx, v1852);
+                                let v1855 = constructor_x64_pand(ctx, v1853, v1854);
+                                let v1856 = constructor_put_in_xmm(ctx, v38.1);
+                                let v1857 = &C::xmm_to_xmm_mem(ctx, v1852);
+                                let v1858 = constructor_x64_pand(ctx, v1856, v1857);
+                                let v1859 = &C::xmm_to_xmm_mem(ctx, v1858);
+                                let v1860 = constructor_x64_packuswb(ctx, v1855, v1859);
+                                let v1861 = constructor_put_in_xmm(ctx, v38.0);
+                                let v1862 = &C::xmi_imm(ctx, 0x8);
+                                let v1863 = constructor_x64_psrlw(ctx, v1861, v1862);
+                                let v1864 = constructor_put_in_xmm(ctx, v38.1);
+                                let v1865 = &C::xmi_imm(ctx, 0x8);
+                                let v1866 = constructor_x64_psrlw(ctx, v1864, v1865);
+                                let v1867 = &C::xmm_to_xmm_mem(ctx, v1866);
+                                let v1868 = constructor_x64_packuswb(ctx, v1863, v1867);
+                                let v1869 = &C::xmm_to_xmm_mem(ctx, v1868);
+                                let v1870 = constructor_x64_paddb(ctx, v1860, v1869);
+                                let v1871 = constructor_output_xmm(ctx, v1870);
+                                // Rule at src/isa/x64/lower.isle line 3522.
+                                return Some(v1871);
+                            }
+                            I16X8 => {
+                                let v520 = C::use_ssse3(ctx);
+                                if v520 == true {
+                                    let v38 = C::unpack_value_array_2(ctx, v37);
+                                    let v172 = C::def_inst(ctx, v38.1);
+                                    if let Some(v173) = v172 {
+                                        let v174 = &C::inst_data(ctx, v173);
+                                        if let &InstructionData::Unary {
+                                            opcode: ref v175,
+                                            arg: v176,
+                                        } = v174
+                                        {
+                                            match v175 {
+                                                &Opcode::SwidenHigh => {
+                                                    let v181 = C::def_inst(ctx, v38.0);
+                                                    if let Some(v182) = v181 {
+                                                        let v183 = &C::inst_data(ctx, v182);
+                                                        if let &InstructionData::Unary {
+                                                            opcode: ref v184,
+                                                            arg: v185,
+                                                        } = v183
+                                                        {
+                                                            if let &Opcode::SwidenLow = v184 {
+                                                                if v176 == v185 {
+                                                                    let v476 =
+                                                                        C::value_type(ctx, v185);
+                                                                    if v476 == I8X16 {
+                                                                        let v1908 = C::emit_u128_le_const(ctx, 0x1010101010101010101010101010101);
+                                                                        let v1909 = constructor_x64_xmm_load_const(ctx, I8X16, v1908);
+                                                                        let v1910 =
+                                                                            &C::put_in_xmm_mem(
+                                                                                ctx, v185,
+                                                                            );
+                                                                        let v1911 = constructor_x64_pmaddubsw(ctx, v1909, v1910);
+                                                                        let v1912 =
+                                                                            constructor_output_xmm(
+                                                                                ctx, v1911,
+                                                                            );
+                                                                        // Rule at src/isa/x64/lower.isle line 3584.
+                                                                        return Some(v1912);
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                                &Opcode::UwidenHigh => {
+                                                    let v181 = C::def_inst(ctx, v38.0);
+                                                    if let Some(v182) = v181 {
+                                                        let v183 = &C::inst_data(ctx, v182);
+                                                        if let &InstructionData::Unary {
+                                                            opcode: ref v184,
+                                                            arg: v185,
+                                                        } = v183
+                                                        {
+                                                            if let &Opcode::UwidenLow = v184 {
+                                                                if v176 == v185 {
+                                                                    let v476 =
+                                                                        C::value_type(ctx, v185);
+                                                                    if v476 == I8X16 {
+                                                                        let v1908 = C::emit_u128_le_const(ctx, 0x1010101010101010101010101010101);
+                                                                        let v1919 = &constructor_const_to_xmm_mem(ctx, v1908);
+                                                                        let v1916 =
+                                                                            constructor_put_in_xmm(
+                                                                                ctx, v185,
+                                                                            );
+                                                                        let v1920 = constructor_x64_pmaddubsw(ctx, v1916, v1919);
+                                                                        let v1921 =
+                                                                            constructor_output_xmm(
+                                                                                ctx, v1920,
+                                                                            );
+                                                                        // Rule at src/isa/x64/lower.isle line 3602.
+                                                                        return Some(v1921);
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                                _ => {}
+                                            }
+                                        }
+                                    }
+                                    let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                    let v69 = &C::put_in_xmm_mem(ctx, v38.1);
+                                    let v1872 = constructor_x64_phaddw(ctx, v68, v69);
+                                    let v1873 = constructor_output_xmm(ctx, v1872);
+                                    // Rule at src/isa/x64/lower.isle line 3538.
+                                    return Some(v1873);
+                                }
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                let v439 = constructor_put_in_xmm(ctx, v38.1);
+                                let v312 = &C::xmm_to_xmm_mem(ctx, v68);
+                                let v1875 = constructor_x64_pshuflw(ctx, v312, 0xE8);
+                                let v1876 = &C::xmm_to_xmm_mem(ctx, v1875);
+                                let v1877 = constructor_x64_pshufhw(ctx, v1876, 0xE8);
+                                let v1878 = &C::xmm_to_xmm_mem(ctx, v1877);
+                                let v1879 = constructor_x64_pshufd(ctx, v1878, 0xE8);
+                                let v1880 = &C::xmm_to_xmm_mem(ctx, v439);
+                                let v1881 = constructor_x64_pshuflw(ctx, v1880, 0xE8);
+                                let v1882 = &C::xmm_to_xmm_mem(ctx, v1881);
+                                let v1883 = constructor_x64_pshufhw(ctx, v1882, 0xE8);
+                                let v1884 = &C::xmm_to_xmm_mem(ctx, v1883);
+                                let v1885 = constructor_x64_pshufd(ctx, v1884, 0xE8);
+                                let v1886 = &C::xmm_to_xmm_mem(ctx, v1885);
+                                let v1887 = constructor_x64_punpcklqdq(ctx, v1879, v1886);
+                                let v1888 = &C::xmi_imm(ctx, 0x10);
+                                let v1889 = constructor_x64_psrad(ctx, v68, v1888);
+                                let v1890 = &C::xmi_imm(ctx, 0x10);
+                                let v1891 = constructor_x64_psrad(ctx, v439, v1890);
+                                let v1892 = &C::xmm_to_xmm_mem(ctx, v1891);
+                                let v1893 = constructor_x64_packssdw(ctx, v1889, v1892);
+                                let v1894 = &C::xmm_to_xmm_mem(ctx, v1893);
+                                let v1895 = constructor_x64_paddw(ctx, v1887, v1894);
+                                let v1896 = constructor_output_xmm(ctx, v1895);
+                                // Rule at src/isa/x64/lower.isle line 3542.
+                                return Some(v1896);
+                            }
+                            I32X4 => {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v172 = C::def_inst(ctx, v38.1);
+                                if let Some(v173) = v172 {
+                                    let v174 = &C::inst_data(ctx, v173);
+                                    match v174 {
+                                        &InstructionData::Binary {
+                                            opcode: ref v212,
+                                            args: ref v213,
+                                        } => {
+                                            if let &Opcode::Imul = v212 {
+                                                let v181 = C::def_inst(ctx, v38.0);
+                                                if let Some(v182) = v181 {
+                                                    let v183 = &C::inst_data(ctx, v182);
+                                                    if let &InstructionData::Binary {
+                                                        opcode: ref v198,
+                                                        args: ref v199,
+                                                    } = v183
+                                                    {
+                                                        if let &Opcode::Imul = v198 {
+                                                            let v200 =
+                                                                C::unpack_value_array_2(ctx, v199);
+                                                            let v203 = C::def_inst(ctx, v200.1);
+                                                            if let Some(v204) = v203 {
+                                                                let v205 = &C::inst_data(ctx, v204);
+                                                                if let &InstructionData::Unary {
+                                                                    opcode: ref v1939,
+                                                                    arg: v1940,
+                                                                } = v205
+                                                                {
+                                                                    if let &Opcode::SwidenLow =
+                                                                        v1939
+                                                                    {
+                                                                        let v214 =
+                                                                            C::unpack_value_array_2(
+                                                                                ctx, v213,
+                                                                            );
+                                                                        let v217 = C::def_inst(
+                                                                            ctx, v214.1,
+                                                                        );
+                                                                        if let Some(v218) = v217 {
+                                                                            let v219 =
+                                                                                &C::inst_data(
+                                                                                    ctx, v218,
+                                                                                );
+                                                                            if let &InstructionData::Unary {
+                                                                                opcode: ref v1946,
+                                                                                arg: v1947,
+                                                                            } = v219 {
+                                                                                if let &Opcode::SwidenHigh = v1946 {
+                                                                                    if v1940 == v1947 {
+                                                                                        let v1934 = C::def_inst(ctx, v200.0);
+                                                                                        if let Some(v1935) = v1934 {
+                                                                                            let v1936 = &C::inst_data(ctx, v1935);
+                                                                                            if let &InstructionData::Unary {
+                                                                                                opcode: ref v1937,
+                                                                                                arg: v1938,
+                                                                                            } = v1936 {
+                                                                                                if let &Opcode::SwidenLow = v1937 {
+                                                                                                    let v1941 = C::def_inst(ctx, v214.0);
+                                                                                                    if let Some(v1942) = v1941 {
+                                                                                                        let v1943 = &C::inst_data(ctx, v1942);
+                                                                                                        if let &InstructionData::Unary {
+                                                                                                            opcode: ref v1944,
+                                                                                                            arg: v1945,
+                                                                                                        } = v1943 {
+                                                                                                            if let &Opcode::SwidenHigh = v1944 {
+                                                                                                                if v1938 == v1945 {
+                                                                                                                    let v1948 = constructor_put_in_xmm(ctx, v1938);
+                                                                                                                    let v1949 = &C::put_in_xmm_mem(ctx, v1940);
+                                                                                                                    let v1950 = constructor_x64_pmaddwd(ctx, v1948, v1949);
+                                                                                                                    let v1951 = constructor_output_xmm(ctx, v1950);
+                                                                                                                    // Rule at src/isa/x64/lower.isle line 3625.
+                                                                                                                    return Some(v1951);
+                                                                                                                }
+                                                                                                            }
+                                                                                                        }
+                                                                                                    }
+                                                                                                }
+                                                                                            }
+                                                                                        }
+                                                                                    }
+                                                                                }
+                                                                            }
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                        &InstructionData::Unary {
+                                            opcode: ref v175,
+                                            arg: v176,
+                                        } => {
+                                            match v175 {
+                                                &Opcode::SwidenHigh => {
+                                                    let v181 = C::def_inst(ctx, v38.0);
+                                                    if let Some(v182) = v181 {
+                                                        let v183 = &C::inst_data(ctx, v182);
+                                                        if let &InstructionData::Unary {
+                                                            opcode: ref v184,
+                                                            arg: v185,
+                                                        } = v183
+                                                        {
+                                                            if let &Opcode::SwidenLow = v184 {
+                                                                if v176 == v185 {
+                                                                    let v476 =
+                                                                        C::value_type(ctx, v185);
+                                                                    if v476 == I16X8 {
+                                                                        let v1914 = C::emit_u128_le_const(ctx, 0x10001000100010001000100010001);
+                                                                        let v1915 = &constructor_const_to_xmm_mem(ctx, v1914);
+                                                                        let v1916 =
+                                                                            constructor_put_in_xmm(
+                                                                                ctx, v185,
+                                                                            );
+                                                                        let v1917 =
+                                                                            constructor_x64_pmaddwd(
+                                                                                ctx, v1916, v1915,
+                                                                            );
+                                                                        let v1918 =
+                                                                            constructor_output_xmm(
+                                                                                ctx, v1917,
+                                                                            );
+                                                                        // Rule at src/isa/x64/lower.isle line 3594.
+                                                                        return Some(v1918);
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                                &Opcode::UwidenHigh => {
+                                                    let v181 = C::def_inst(ctx, v38.0);
+                                                    if let Some(v182) = v181 {
+                                                        let v183 = &C::inst_data(ctx, v182);
+                                                        if let &InstructionData::Unary {
+                                                            opcode: ref v184,
+                                                            arg: v185,
+                                                        } = v183
+                                                        {
+                                                            if let &Opcode::UwidenLow = v184 {
+                                                                if v176 == v185 {
+                                                                    let v476 =
+                                                                        C::value_type(ctx, v185);
+                                                                    if v476 == I16X8 {
+                                                                        let v1923 = C::emit_u128_le_const(ctx, 0x80008000800080008000800080008000);
+                                                                        let v1924 = &constructor_const_to_xmm_mem(ctx, v1923);
+                                                                        let v1916 =
+                                                                            constructor_put_in_xmm(
+                                                                                ctx, v185,
+                                                                            );
+                                                                        let v1925 =
+                                                                            constructor_x64_pxor(
+                                                                                ctx, v1916, v1924,
+                                                                            );
+                                                                        let v1926 = C::emit_u128_le_const(ctx, 0x10001000100010001000100010001);
+                                                                        let v1927 = &constructor_const_to_xmm_mem(ctx, v1926);
+                                                                        let v1928 =
+                                                                            constructor_x64_pmaddwd(
+                                                                                ctx, v1925, v1927,
+                                                                            );
+                                                                        let v1930 = C::emit_u128_le_const(ctx, 0x10000000100000001000000010000);
+                                                                        let v1931 = &constructor_const_to_xmm_mem(ctx, v1930);
+                                                                        let v1932 =
+                                                                            constructor_x64_paddd(
+                                                                                ctx, v1928, v1931,
+                                                                            );
+                                                                        let v1933 =
+                                                                            constructor_output_xmm(
+                                                                                ctx, v1932,
+                                                                            );
+                                                                        // Rule at src/isa/x64/lower.isle line 3611.
+                                                                        return Some(v1933);
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                                _ => {}
+                                            }
+                                        }
+                                        _ => {}
+                                    }
+                                }
+                                let v520 = C::use_ssse3(ctx);
+                                if v520 == true {
+                                    let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                    let v69 = &C::put_in_xmm_mem(ctx, v38.1);
+                                    let v1897 = constructor_x64_phaddd(ctx, v68, v69);
+                                    let v1898 = constructor_output_xmm(ctx, v1897);
+                                    // Rule at src/isa/x64/lower.isle line 3568.
+                                    return Some(v1898);
+                                }
+                                let v68 = constructor_put_in_xmm(ctx, v38.0);
+                                let v439 = constructor_put_in_xmm(ctx, v38.1);
+                                let v1899 = &C::xmm_to_xmm_mem(ctx, v439);
+                                let v1901 = constructor_x64_shufps(ctx, v68, v1899, 0x88);
+                                let v442 = &C::xmm_to_xmm_mem(ctx, v439);
+                                let v1903 = constructor_x64_shufps(ctx, v68, v442, 0xDD);
+                                let v1904 = &C::xmm_to_xmm_mem(ctx, v1903);
+                                let v1905 = constructor_x64_paddd(ctx, v1901, v1904);
+                                let v1906 = constructor_output_xmm(ctx, v1905);
+                                // Rule at src/isa/x64/lower.isle line 3572.
+                                return Some(v1906);
+                            }
+                            _ => {}
+                        }
+                    }
+                }
+                &Opcode::X86Pmaddubsw => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        if v3 == I16X8 {
+                            let v520 = C::use_ssse3(ctx);
+                            if v520 == true {
+                                let v38 = C::unpack_value_array_2(ctx, v37);
+                                let v1180 = constructor_put_in_xmm(ctx, v38.1);
+                                let v178 = &C::put_in_xmm_mem(ctx, v38.0);
+                                let v1181 = constructor_x64_pmaddubsw(ctx, v1180, v178);
+                                let v1182 = constructor_output_xmm(ctx, v1181);
+                                // Rule at src/isa/x64/lower.isle line 2415.
+                                return Some(v1182);
+                            }
+                        }
+                    }
+                }
+                &Opcode::Iconcat => {
+                    let v38 = C::unpack_value_array_2(ctx, v37);
+                    let v2000 = C::value_type(ctx, v38.0);
+                    if v2000 == I64 {
+                        let v2447 = C::put_in_reg(ctx, v38.0);
+                        let v2448 = C::put_in_reg(ctx, v38.1);
+                        let v2449 = C::value_regs(ctx, v2447, v2448);
+                        let v2450 = C::output(ctx, v2449);
+                        // Rule at src/isa/x64/lower.isle line 4538.
+                        return Some(v2450);
+                    }
+                }
+                _ => {}
+            }
+        }
+        &InstructionData::BinaryImm8 {
+            opcode: ref v2284,
+            arg: v2285,
+            imm: v2286,
+        } => {
+            if let &Opcode::Extractlane = v2284 {
+                if v2286 == 0x0 {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v162 = C::ty_scalar_float(ctx, v3);
+                        if let Some(v163) = v162 {
+                            let v2287 = constructor_output_value(ctx, v2285);
+                            // Rule at src/isa/x64/lower.isle line 4301.
+                            return Some(v2287);
+                        }
+                    }
+                }
+                let v2288 = C::value_type(ctx, v2285);
+                match v2288 {
+                    I8X16 => {
+                        let v436 = C::use_sse41(ctx);
+                        if v436 == true {
+                            let v2295 = constructor_put_in_xmm(ctx, v2285);
+                            let v2289 = C::u8_from_uimm8(ctx, v2286);
+                            let v2296 = constructor_x64_pextrb(ctx, v2295, v2289);
+                            let v2297 = constructor_output_gpr(ctx, v2296);
+                            // Rule at src/isa/x64/lower.isle line 4316.
+                            return Some(v2297);
+                        }
+                        let v2289 = C::u8_from_uimm8(ctx, v2286);
+                        let v2298 = C::u8_and(ctx, v2289, 0x1);
+                        match v2298 {
+                            0x0 => {
+                                let v2295 = constructor_put_in_xmm(ctx, v2285);
+                                let v2299 = C::u8_shr(ctx, v2289, 0x1);
+                                let v2300 = constructor_x64_pextrw(ctx, v2295, v2299);
+                                let v2304 = constructor_output_gpr(ctx, v2300);
+                                // Rule at src/isa/x64/lower.isle line 4327.
+                                return Some(v2304);
+                            }
+                            0x1 => {
+                                let v2295 = constructor_put_in_xmm(ctx, v2285);
+                                let v2299 = C::u8_shr(ctx, v2289, 0x1);
+                                let v2300 = constructor_x64_pextrw(ctx, v2295, v2299);
+                                let v1135 = Imm8Reg::Imm8 { imm: 0x8 };
+                                let v2301 = &C::imm8_reg_to_imm8_gpr(ctx, &v1135);
+                                let v2302 = constructor_x64_shr(ctx, I16, v2300, v2301);
+                                let v2303 = constructor_output_gpr(ctx, v2302);
+                                // Rule at src/isa/x64/lower.isle line 4320.
+                                return Some(v2303);
+                            }
+                            _ => {}
+                        }
+                    }
+                    I16X8 => {
+                        let v2295 = constructor_put_in_xmm(ctx, v2285);
+                        let v2289 = C::u8_from_uimm8(ctx, v2286);
+                        let v2305 = constructor_x64_pextrw(ctx, v2295, v2289);
+                        let v2306 = constructor_output_gpr(ctx, v2305);
+                        // Rule at src/isa/x64/lower.isle line 4332.
+                        return Some(v2306);
+                    }
+                    I32X4 => {
+                        let v436 = C::use_sse41(ctx);
+                        if v436 == true {
+                            let v2295 = constructor_put_in_xmm(ctx, v2285);
+                            let v2289 = C::u8_from_uimm8(ctx, v2286);
+                            let v2307 = constructor_x64_pextrd(ctx, v2295, v2289);
+                            let v2308 = constructor_output_gpr(ctx, v2307);
+                            // Rule at src/isa/x64/lower.isle line 4336.
+                            return Some(v2308);
+                        }
+                        if v2286 == 0x0 {
+                            let v2295 = constructor_put_in_xmm(ctx, v2285);
+                            let v2309 = constructor_x64_movd_to_gpr(ctx, v2295);
+                            let v2310 = constructor_output_gpr(ctx, v2309);
+                            // Rule at src/isa/x64/lower.isle line 4339.
+                            return Some(v2310);
+                        }
+                        let v2290 = &C::put_in_xmm_mem(ctx, v2285);
+                        let v2289 = C::u8_from_uimm8(ctx, v2286);
+                        let v2291 = constructor_x64_pshufd(ctx, v2290, v2289);
+                        let v2311 = constructor_x64_movd_to_gpr(ctx, v2291);
+                        let v2312 = constructor_output_gpr(ctx, v2311);
+                        // Rule at src/isa/x64/lower.isle line 4341.
+                        return Some(v2312);
+                    }
+                    I64X2 => {
+                        let v436 = C::use_sse41(ctx);
+                        if v436 == true {
+                            let v2295 = constructor_put_in_xmm(ctx, v2285);
+                            let v2289 = C::u8_from_uimm8(ctx, v2286);
+                            let v2313 = constructor_x64_pextrq(ctx, v2295, v2289);
+                            let v2314 = constructor_output_gpr(ctx, v2313);
+                            // Rule at src/isa/x64/lower.isle line 4345.
+                            return Some(v2314);
+                        }
+                        match v2286 {
+                            0x0 => {
+                                let v2295 = constructor_put_in_xmm(ctx, v2285);
+                                let v2315 = constructor_x64_movq_to_gpr(ctx, v2295);
+                                let v2316 = constructor_output_gpr(ctx, v2315);
+                                // Rule at src/isa/x64/lower.isle line 4348.
+                                return Some(v2316);
+                            }
+                            0x1 => {
+                                let v2290 = &C::put_in_xmm_mem(ctx, v2285);
+                                let v2317 = constructor_x64_pshufd(ctx, v2290, 0xE);
+                                let v2318 = constructor_x64_movq_to_gpr(ctx, v2317);
+                                let v2319 = constructor_output_gpr(ctx, v2318);
+                                // Rule at src/isa/x64/lower.isle line 4350.
+                                return Some(v2319);
+                            }
+                            _ => {}
+                        }
+                    }
+                    F32X4 => {
+                        let v2290 = &C::put_in_xmm_mem(ctx, v2285);
+                        let v2289 = C::u8_from_uimm8(ctx, v2286);
+                        let v2291 = constructor_x64_pshufd(ctx, v2290, v2289);
+                        let v2292 = constructor_output_xmm(ctx, v2291);
+                        // Rule at src/isa/x64/lower.isle line 4305.
+                        return Some(v2292);
+                    }
+                    F64X2 => {
+                        if v2286 == 0x1 {
+                            let v2290 = &C::put_in_xmm_mem(ctx, v2285);
+                            let v2293 = constructor_x64_pshufd(ctx, v2290, 0xEE);
+                            let v2294 = constructor_output_xmm(ctx, v2293);
+                            // Rule at src/isa/x64/lower.isle line 4309.
+                            return Some(v2294);
+                        }
+                    }
+                    _ => {}
+                }
+            }
+        }
+        &InstructionData::Call {
+            opcode: ref v1693,
+            args: v1694,
+            func_ref: v1695,
+        } => {
+            match v1693 {
+                &Opcode::Call => {
+                    let v1697 = C::func_ref_data(ctx, v1695);
+                    let v1696 = C::value_list_slice(ctx, v1694);
+                    let v1701 = C::gen_call(ctx, v1697.0, v1697.1, v1697.2, v1696);
+                    // Rule at src/isa/x64/lower.isle line 3185.
+                    return Some(v1701);
+                }
+                &Opcode::ReturnCall => {
+                    let v1697 = C::func_ref_data(ctx, v1695);
+                    let v1696 = C::value_list_slice(ctx, v1694);
+                    let v1711 = C::gen_return_call(ctx, v1697.0, v1697.1, v1697.2, v1696);
+                    // Rule at src/isa/x64/lower.isle line 3193.
+                    return Some(v1711);
+                }
+                _ => {}
+            }
+        }
+        &InstructionData::CallIndirect {
+            opcode: ref v1702,
+            args: v1703,
+            sig_ref: v1704,
+        } => {
+            match v1702 {
+                &Opcode::CallIndirect => {
+                    let v1705 = C::value_list_slice(ctx, v1703);
+                    let v1706 = C::value_slice_unwrap(ctx, v1705);
+                    if let Some(v1707) = v1706 {
+                        let v1710 = C::gen_call_indirect(ctx, v1704, v1707.0, v1707.1);
+                        // Rule at src/isa/x64/lower.isle line 3188.
+                        return Some(v1710);
+                    }
+                }
+                &Opcode::ReturnCallIndirect => {
+                    let v1705 = C::value_list_slice(ctx, v1703);
+                    let v1706 = C::value_slice_unwrap(ctx, v1705);
+                    if let Some(v1707) = v1706 {
+                        let v1712 = C::gen_return_call_indirect(ctx, v1704, v1707.0, v1707.1);
+                        // Rule at src/isa/x64/lower.isle line 3196.
+                        return Some(v1712);
+                    }
+                }
+                _ => {}
+            }
+        }
+        &InstructionData::FloatCompare {
+            opcode: ref v899,
+            args: ref v900,
+            cond: ref v901,
+        } => {
+            if let &Opcode::Fcmp = v899 {
+                match v901 {
+                    &FloatCC::Equal => {
+                        let v902 = C::unpack_value_array_2(ctx, v900);
+                        let v905 = C::value_type(ctx, v902.0);
+                        let v911 = C::ty_vec128(ctx, v905);
+                        if let Some(v912) = v911 {
+                            let v913 = constructor_put_in_xmm(ctx, v902.0);
+                            let v914 = &C::put_in_xmm_mem(ctx, v902.1);
+                            let v916 = constructor_x64_cmpp(ctx, v912, v913, v914, &FcmpImm::Equal);
+                            let v917 = constructor_output_xmm(ctx, v916);
+                            // Rule at src/isa/x64/lower.isle line 1946.
+                            return Some(v917);
+                        }
+                    }
+                    &FloatCC::GreaterThan => {
+                        let v902 = C::unpack_value_array_2(ctx, v900);
+                        let v905 = C::value_type(ctx, v902.0);
+                        let v911 = C::ty_vec128(ctx, v905);
+                        if let Some(v912) = v911 {
+                            let v939 = constructor_put_in_xmm(ctx, v902.1);
+                            let v940 = &C::put_in_xmm_mem(ctx, v902.0);
+                            let v941 =
+                                constructor_x64_cmpp(ctx, v912, v939, v940, &FcmpImm::LessThan);
+                            let v942 = constructor_output_xmm(ctx, v941);
+                            // Rule at src/isa/x64/lower.isle line 1966.
+                            return Some(v942);
+                        }
+                    }
+                    &FloatCC::GreaterThanOrEqual => {
+                        let v902 = C::unpack_value_array_2(ctx, v900);
+                        let v905 = C::value_type(ctx, v902.0);
+                        let v911 = C::ty_vec128(ctx, v905);
+                        if let Some(v912) = v911 {
+                            let v939 = constructor_put_in_xmm(ctx, v902.1);
+                            let v940 = &C::put_in_xmm_mem(ctx, v902.0);
+                            let v943 = constructor_x64_cmpp(
+                                ctx,
+                                v912,
+                                v939,
+                                v940,
+                                &FcmpImm::LessThanOrEqual,
+                            );
+                            let v944 = constructor_output_xmm(ctx, v943);
+                            // Rule at src/isa/x64/lower.isle line 1968.
+                            return Some(v944);
+                        }
+                    }
+                    &FloatCC::LessThan => {
+                        let v902 = C::unpack_value_array_2(ctx, v900);
+                        let v905 = C::value_type(ctx, v902.0);
+                        let v911 = C::ty_vec128(ctx, v905);
+                        if let Some(v912) = v911 {
+                            let v913 = constructor_put_in_xmm(ctx, v902.0);
+                            let v914 = &C::put_in_xmm_mem(ctx, v902.1);
+                            let v922 =
+                                constructor_x64_cmpp(ctx, v912, v913, v914, &FcmpImm::LessThan);
+                            let v923 = constructor_output_xmm(ctx, v922);
+                            // Rule at src/isa/x64/lower.isle line 1950.
+                            return Some(v923);
+                        }
+                    }
+                    &FloatCC::LessThanOrEqual => {
+                        let v902 = C::unpack_value_array_2(ctx, v900);
+                        let v905 = C::value_type(ctx, v902.0);
+                        let v911 = C::ty_vec128(ctx, v905);
+                        if let Some(v912) = v911 {
+                            let v913 = constructor_put_in_xmm(ctx, v902.0);
+                            let v914 = &C::put_in_xmm_mem(ctx, v902.1);
+                            let v925 = constructor_x64_cmpp(
+                                ctx,
+                                v912,
+                                v913,
+                                v914,
+                                &FcmpImm::LessThanOrEqual,
+                            );
+                            let v926 = constructor_output_xmm(ctx, v925);
+                            // Rule at src/isa/x64/lower.isle line 1952.
+                            return Some(v926);
+                        }
+                    }
+                    &FloatCC::NotEqual => {
+                        let v902 = C::unpack_value_array_2(ctx, v900);
+                        let v905 = C::value_type(ctx, v902.0);
+                        let v911 = C::ty_vec128(ctx, v905);
+                        if let Some(v912) = v911 {
+                            let v913 = constructor_put_in_xmm(ctx, v902.0);
+                            let v914 = &C::put_in_xmm_mem(ctx, v902.1);
+                            let v919 =
+                                constructor_x64_cmpp(ctx, v912, v913, v914, &FcmpImm::NotEqual);
+                            let v920 = constructor_output_xmm(ctx, v919);
+                            // Rule at src/isa/x64/lower.isle line 1948.
+                            return Some(v920);
+                        }
+                    }
+                    &FloatCC::Ordered => {
+                        let v902 = C::unpack_value_array_2(ctx, v900);
+                        let v905 = C::value_type(ctx, v902.0);
+                        let v911 = C::ty_vec128(ctx, v905);
+                        if let Some(v912) = v911 {
+                            let v913 = constructor_put_in_xmm(ctx, v902.0);
+                            let v914 = &C::put_in_xmm_mem(ctx, v902.1);
+                            let v928 =
+                                constructor_x64_cmpp(ctx, v912, v913, v914, &FcmpImm::Ordered);
+                            let v929 = constructor_output_xmm(ctx, v928);
+                            // Rule at src/isa/x64/lower.isle line 1954.
+                            return Some(v929);
+                        }
+                    }
+                    &FloatCC::Unordered => {
+                        let v902 = C::unpack_value_array_2(ctx, v900);
+                        let v905 = C::value_type(ctx, v902.0);
+                        let v911 = C::ty_vec128(ctx, v905);
+                        if let Some(v912) = v911 {
+                            let v913 = constructor_put_in_xmm(ctx, v902.0);
+                            let v914 = &C::put_in_xmm_mem(ctx, v902.1);
+                            let v931 =
+                                constructor_x64_cmpp(ctx, v912, v913, v914, &FcmpImm::Unordered);
+                            let v932 = constructor_output_xmm(ctx, v931);
+                            // Rule at src/isa/x64/lower.isle line 1956.
+                            return Some(v932);
+                        }
+                    }
+                    &FloatCC::UnorderedOrGreaterThan => {
+                        let v902 = C::unpack_value_array_2(ctx, v900);
+                        let v905 = C::value_type(ctx, v902.0);
+                        let v911 = C::ty_vec128(ctx, v905);
+                        if let Some(v912) = v911 {
+                            let v913 = constructor_put_in_xmm(ctx, v902.0);
+                            let v914 = &C::put_in_xmm_mem(ctx, v902.1);
+                            let v934 = constructor_x64_cmpp(
+                                ctx,
+                                v912,
+                                v913,
+                                v914,
+                                &FcmpImm::UnorderedOrGreaterThan,
+                            );
+                            let v935 = constructor_output_xmm(ctx, v934);
+                            // Rule at src/isa/x64/lower.isle line 1958.
+                            return Some(v935);
+                        }
+                    }
+                    &FloatCC::UnorderedOrGreaterThanOrEqual => {
+                        let v902 = C::unpack_value_array_2(ctx, v900);
+                        let v905 = C::value_type(ctx, v902.0);
+                        let v911 = C::ty_vec128(ctx, v905);
+                        if let Some(v912) = v911 {
+                            let v913 = constructor_put_in_xmm(ctx, v902.0);
+                            let v914 = &C::put_in_xmm_mem(ctx, v902.1);
+                            let v937 = constructor_x64_cmpp(
+                                ctx,
+                                v912,
+                                v913,
+                                v914,
+                                &FcmpImm::UnorderedOrGreaterThanOrEqual,
+                            );
+                            let v938 = constructor_output_xmm(ctx, v937);
+                            // Rule at src/isa/x64/lower.isle line 1960.
+                            return Some(v938);
+                        }
+                    }
+                    &FloatCC::UnorderedOrLessThan => {
+                        let v902 = C::unpack_value_array_2(ctx, v900);
+                        let v905 = C::value_type(ctx, v902.0);
+                        let v911 = C::ty_vec128(ctx, v905);
+                        if let Some(v912) = v911 {
+                            let v939 = constructor_put_in_xmm(ctx, v902.1);
+                            let v940 = &C::put_in_xmm_mem(ctx, v902.0);
+                            let v945 = constructor_x64_cmpp(
+                                ctx,
+                                v912,
+                                v939,
+                                v940,
+                                &FcmpImm::UnorderedOrGreaterThan,
+                            );
+                            let v946 = constructor_output_xmm(ctx, v945);
+                            // Rule at src/isa/x64/lower.isle line 1970.
+                            return Some(v946);
+                        }
+                    }
+                    &FloatCC::UnorderedOrLessThanOrEqual => {
+                        let v902 = C::unpack_value_array_2(ctx, v900);
+                        let v905 = C::value_type(ctx, v902.0);
+                        let v911 = C::ty_vec128(ctx, v905);
+                        if let Some(v912) = v911 {
+                            let v939 = constructor_put_in_xmm(ctx, v902.1);
+                            let v940 = &C::put_in_xmm_mem(ctx, v902.0);
+                            let v947 = constructor_x64_cmpp(
+                                ctx,
+                                v912,
+                                v939,
+                                v940,
+                                &FcmpImm::UnorderedOrGreaterThanOrEqual,
+                            );
+                            let v948 = constructor_output_xmm(ctx, v947);
+                            // Rule at src/isa/x64/lower.isle line 1972.
+                            return Some(v948);
+                        }
+                    }
+                    _ => {}
+                }
+                let v902 = C::unpack_value_array_2(ctx, v900);
+                let v905 = C::value_type(ctx, v902.0);
+                let v906 = C::ty_scalar_float(ctx, v905);
+                if let Some(v907) = v906 {
+                    let v908 = &constructor_emit_fcmp(ctx, v901, v902.0, v902.1);
+                    let v909 = constructor_lower_fcmp_bool(ctx, v908);
+                    let v910 = C::output(ctx, v909);
+                    // Rule at src/isa/x64/lower.isle line 1939.
+                    return Some(v910);
+                }
+            }
+        }
+        &InstructionData::FuncAddr {
+            opcode: ref v1617,
+            func_ref: v1618,
+        } => {
+            if let &Opcode::FuncAddr = v1617 {
+                let v1619 = C::func_ref_data(ctx, v1618);
+                let v1624 = constructor_load_ext_name(ctx, v1619.1, 0x0, v1619.2);
+                let v1625 = constructor_output_reg(ctx, v1624);
+                // Rule at src/isa/x64/lower.isle line 3127.
+                return Some(v1625);
+            }
+        }
+        &InstructionData::IntAddTrap {
+            opcode: ref v733,
+            args: ref v734,
+            code: ref v735,
+        } => {
+            if let &Opcode::UaddOverflowTrap = v733 {
+                let v1 = C::first_result(ctx, arg0);
+                if let Some(v2) = v1 {
+                    let v3 = C::value_type(ctx, v2);
+                    let v4 = C::fits_in_64(ctx, v3);
+                    if let Some(v5) = v4 {
+                        let v736 = C::unpack_value_array_2(ctx, v734);
+                        let v752 = &C::sinkable_load(ctx, v736.0);
+                        if let Some(v753) = v752 {
+                            let v747 = constructor_put_in_gpr(ctx, v736.1);
+                            let v754 = &constructor_sink_load_to_gpr_mem_imm(ctx, v753);
+                            let v755 = &constructor_x64_add_with_flags_paired(ctx, v5, v747, v754);
+                            let v742 = &constructor_trap_if(ctx, &CC::B, v735);
+                            let v756 = constructor_with_flags(ctx, v755, v742);
+                            let v757 = C::output(ctx, v756);
+                            // Rule at src/isa/x64/lower.isle line 1727.
+                            return Some(v757);
+                        }
+                        let v745 = &C::simm32_from_value(ctx, v736.0);
+                        if let Some(v746) = v745 {
+                            let v747 = constructor_put_in_gpr(ctx, v736.1);
+                            let v748 = &constructor_x64_add_with_flags_paired(ctx, v5, v747, v746);
+                            let v749 = &constructor_trap_if(ctx, &CC::B, v735);
+                            let v750 = constructor_with_flags(ctx, v748, v749);
+                            let v751 = C::output(ctx, v750);
+                            // Rule at src/isa/x64/lower.isle line 1721.
+                            return Some(v751);
+                        }
+                        let v739 = constructor_put_in_gpr(ctx, v736.0);
+                        let v740 = &constructor_put_in_gpr_mem_imm(ctx, v736.1);
+                        let v741 = &constructor_x64_add_with_flags_paired(ctx, v5, v739, v740);
+                        let v742 = &constructor_trap_if(ctx, &CC::B, v735);
+                        let v743 = constructor_with_flags(ctx, v741, v742);
+                        let v744 = C::output(ctx, v743);
+                        // Rule at src/isa/x64/lower.isle line 1713.
+                        return Some(v744);
+                    }
+                }
+            }
+        }
+        &InstructionData::IntCompare {
+            opcode: ref v762,
+            args: ref v763,
+            cond: ref v764,
+        } => {
+            if let &Opcode::Icmp = v762 {
+                match v764 {
+                    &IntCC::Equal => {
+                        let v765 = C::unpack_value_array_2(ctx, v763);
+                        let v768 = C::value_type(ctx, v765.0);
+                        let v816 = C::ty_vec128(ctx, v768);
+                        if let Some(v817) = v816 {
+                            let v818 = constructor_put_in_xmm(ctx, v765.0);
+                            let v819 = &C::put_in_xmm_mem(ctx, v765.1);
+                            let v820 = constructor_x64_pcmpeq(ctx, v817, v818, v819);
+                            let v821 = constructor_output_xmm(ctx, v820);
+                            // Rule at src/isa/x64/lower.isle line 1789.
+                            return Some(v821);
+                        }
+                    }
+                    &IntCC::NotEqual => {
+                        let v765 = C::unpack_value_array_2(ctx, v763);
+                        let v768 = C::value_type(ctx, v765.0);
+                        let v816 = C::ty_vec128(ctx, v768);
+                        if let Some(v817) = v816 {
+                            let v818 = constructor_put_in_xmm(ctx, v765.0);
+                            let v819 = &C::put_in_xmm_mem(ctx, v765.1);
+                            let v820 = constructor_x64_pcmpeq(ctx, v817, v818, v819);
+                            let v822 = constructor_vector_all_ones(ctx);
+                            let v823 = &C::xmm_to_xmm_mem(ctx, v822);
+                            let v824 = constructor_x64_pxor(ctx, v820, v823);
+                            let v825 = constructor_output_xmm(ctx, v824);
+                            // Rule at src/isa/x64/lower.isle line 1794.
+                            return Some(v825);
+                        }
+                    }
+                    &IntCC::SignedGreaterThan => {
+                        let v1 = C::first_result(ctx, arg0);
+                        if let Some(v2) = v1 {
+                            let v3 = C::value_type(ctx, v2);
+                            if v3 == I8 {
+                                let v765 = C::unpack_value_array_2(ctx, v763);
+                                let v786 = C::def_inst(ctx, v765.0);
+                                if let Some(v787) = v786 {
+                                    let v788 = &C::inst_data(ctx, v787);
+                                    if let &InstructionData::UnaryImm {
+                                        opcode: ref v789,
+                                        imm: v790,
+                                    } = v788
+                                    {
+                                        if let &Opcode::Iconst = v789 {
+                                            let v791 = C::u64_from_imm64(ctx, v790);
+                                            if v791 == 0x0 {
+                                                let v792 = C::value_type(ctx, v765.1);
+                                                match v792 {
+                                                    I32 => {
+                                                        let v793 =
+                                                            constructor_put_in_gpr(ctx, v765.1);
+                                                        let v805 = Imm8Reg::Imm8 { imm: 0x1F };
+                                                        let v806 =
+                                                            &C::imm8_reg_to_imm8_gpr(ctx, &v805);
+                                                        let v809 = constructor_x64_shr(
+                                                            ctx, I32, v793, v806,
+                                                        );
+                                                        let v810 =
+                                                            constructor_output_gpr(ctx, v809);
+                                                        // Rule at src/isa/x64/lower.isle line 1773.
+                                                        return Some(v810);
+                                                    }
+                                                    I64 => {
+                                                        let v793 =
+                                                            constructor_put_in_gpr(ctx, v765.1);
+                                                        let v782 = Imm8Reg::Imm8 { imm: 0x3F };
+                                                        let v783 =
+                                                            &C::imm8_reg_to_imm8_gpr(ctx, &v782);
+                                                        let v794 = constructor_x64_shr(
+                                                            ctx, I64, v793, v783,
+                                                        );
+                                                        let v795 =
+                                                            constructor_output_gpr(ctx, v794);
+                                                        // Rule at src/isa/x64/lower.isle line 1757.
+                                                        return Some(v795);
+                                                    }
+                                                    _ => {}
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                            }
+                        }
+                        let v765 = C::unpack_value_array_2(ctx, v763);
+                        let v768 = C::value_type(ctx, v765.0);
+                        let v816 = C::ty_vec128(ctx, v768);
+                        if let Some(v817) = v816 {
+                            let v818 = constructor_put_in_xmm(ctx, v765.0);
+                            let v819 = &C::put_in_xmm_mem(ctx, v765.1);
+                            let v826 = constructor_x64_pcmpgt(ctx, v817, v818, v819);
+                            let v827 = constructor_output_xmm(ctx, v826);
+                            // Rule at src/isa/x64/lower.isle line 1801.
+                            return Some(v827);
+                        }
+                    }
+                    &IntCC::SignedGreaterThanOrEqual => {
+                        let v1 = C::first_result(ctx, arg0);
+                        if let Some(v2) = v1 {
+                            let v3 = C::value_type(ctx, v2);
+                            if v3 == I8 {
+                                let v765 = C::unpack_value_array_2(ctx, v763);
+                                let v768 = C::value_type(ctx, v765.0);
+                                match v768 {
+                                    I32 => {
+                                        let v774 = C::def_inst(ctx, v765.1);
+                                        if let Some(v775) = v774 {
+                                            let v776 = &C::inst_data(ctx, v775);
+                                            if let &InstructionData::UnaryImm {
+                                                opcode: ref v777,
+                                                imm: v778,
+                                            } = v776
+                                            {
+                                                if let &Opcode::Iconst = v777 {
+                                                    let v779 = C::u64_from_imm64(ctx, v778);
+                                                    if v779 == 0x0 {
+                                                        let v780 =
+                                                            constructor_put_in_gpr(ctx, v765.0);
+                                                        let v800 =
+                                                            constructor_x64_not(ctx, I64, v780);
+                                                        let v805 = Imm8Reg::Imm8 { imm: 0x1F };
+                                                        let v811 =
+                                                            &C::imm8_reg_to_imm8_gpr(ctx, &v805);
+                                                        let v814 = constructor_x64_shr(
+                                                            ctx, I32, v800, v811,
+                                                        );
+                                                        let v815 =
+                                                            constructor_output_gpr(ctx, v814);
+                                                        // Rule at src/isa/x64/lower.isle line 1781.
+                                                        return Some(v815);
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                    I64 => {
+                                        let v774 = C::def_inst(ctx, v765.1);
+                                        if let Some(v775) = v774 {
+                                            let v776 = &C::inst_data(ctx, v775);
+                                            if let &InstructionData::UnaryImm {
+                                                opcode: ref v777,
+                                                imm: v778,
+                                            } = v776
+                                            {
+                                                if let &Opcode::Iconst = v777 {
+                                                    let v779 = C::u64_from_imm64(ctx, v778);
+                                                    if v779 == 0x0 {
+                                                        let v780 =
+                                                            constructor_put_in_gpr(ctx, v765.0);
+                                                        let v800 =
+                                                            constructor_x64_not(ctx, I64, v780);
+                                                        let v782 = Imm8Reg::Imm8 { imm: 0x3F };
+                                                        let v797 =
+                                                            &C::imm8_reg_to_imm8_gpr(ctx, &v782);
+                                                        let v801 = constructor_x64_shr(
+                                                            ctx, I64, v800, v797,
+                                                        );
+                                                        let v802 =
+                                                            constructor_output_gpr(ctx, v801);
+                                                        // Rule at src/isa/x64/lower.isle line 1765.
+                                                        return Some(v802);
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                    _ => {}
+                                }
+                            }
+                        }
+                        let v765 = C::unpack_value_array_2(ctx, v763);
+                        let v768 = C::value_type(ctx, v765.0);
+                        let v816 = C::ty_vec128(ctx, v768);
+                        if let Some(v817) = v816 {
+                            let v860 = constructor_has_pmaxs(ctx, v817);
+                            if v860 == true {
+                                let v818 = constructor_put_in_xmm(ctx, v765.0);
+                                let v843 = constructor_put_in_xmm(ctx, v765.0);
+                                let v861 = &C::put_in_xmm_mem(ctx, v765.1);
+                                let v862 = constructor_x64_pmaxs(ctx, v817, v843, v861);
+                                let v863 = &C::xmm_to_xmm_mem(ctx, v862);
+                                let v864 = constructor_x64_pcmpeq(ctx, v817, v818, v863);
+                                let v865 = constructor_output_xmm(ctx, v864);
+                                // Rule at src/isa/x64/lower.isle line 1851.
+                                return Some(v865);
+                            }
+                            let v828 = constructor_put_in_xmm(ctx, v765.1);
+                            let v829 = &C::put_in_xmm_mem(ctx, v765.0);
+                            let v830 = constructor_x64_pcmpgt(ctx, v817, v828, v829);
+                            let v822 = constructor_vector_all_ones(ctx);
+                            let v823 = &C::xmm_to_xmm_mem(ctx, v822);
+                            let v866 = constructor_x64_pxor(ctx, v830, v823);
+                            let v867 = constructor_output_xmm(ctx, v866);
+                            // Rule at src/isa/x64/lower.isle line 1857.
+                            return Some(v867);
+                        }
+                    }
+                    &IntCC::SignedLessThan => {
+                        let v1 = C::first_result(ctx, arg0);
+                        if let Some(v2) = v1 {
+                            let v3 = C::value_type(ctx, v2);
+                            if v3 == I8 {
+                                let v765 = C::unpack_value_array_2(ctx, v763);
+                                let v768 = C::value_type(ctx, v765.0);
+                                match v768 {
+                                    I32 => {
+                                        let v774 = C::def_inst(ctx, v765.1);
+                                        if let Some(v775) = v774 {
+                                            let v776 = &C::inst_data(ctx, v775);
+                                            if let &InstructionData::UnaryImm {
+                                                opcode: ref v777,
+                                                imm: v778,
+                                            } = v776
+                                            {
+                                                if let &Opcode::Iconst = v777 {
+                                                    let v779 = C::u64_from_imm64(ctx, v778);
+                                                    if v779 == 0x0 {
+                                                        let v780 =
+                                                            constructor_put_in_gpr(ctx, v765.0);
+                                                        let v805 = Imm8Reg::Imm8 { imm: 0x1F };
+                                                        let v806 =
+                                                            &C::imm8_reg_to_imm8_gpr(ctx, &v805);
+                                                        let v807 = constructor_x64_shr(
+                                                            ctx, I32, v780, v806,
+                                                        );
+                                                        let v808 =
+                                                            constructor_output_gpr(ctx, v807);
+                                                        // Rule at src/isa/x64/lower.isle line 1769.
+                                                        return Some(v808);
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                    I64 => {
+                                        let v774 = C::def_inst(ctx, v765.1);
+                                        if let Some(v775) = v774 {
+                                            let v776 = &C::inst_data(ctx, v775);
+                                            if let &InstructionData::UnaryImm {
+                                                opcode: ref v777,
+                                                imm: v778,
+                                            } = v776
+                                            {
+                                                if let &Opcode::Iconst = v777 {
+                                                    let v779 = C::u64_from_imm64(ctx, v778);
+                                                    if v779 == 0x0 {
+                                                        let v780 =
+                                                            constructor_put_in_gpr(ctx, v765.0);
+                                                        let v782 = Imm8Reg::Imm8 { imm: 0x3F };
+                                                        let v783 =
+                                                            &C::imm8_reg_to_imm8_gpr(ctx, &v782);
+                                                        let v784 = constructor_x64_shr(
+                                                            ctx, I64, v780, v783,
+                                                        );
+                                                        let v785 =
+                                                            constructor_output_gpr(ctx, v784);
+                                                        // Rule at src/isa/x64/lower.isle line 1753.
+                                                        return Some(v785);
+                                                    }
+                                                }
+                                            }
+                                        }
+                                    }
+                                    _ => {}
+                                }
+                            }
+                        }
+                        let v765 = C::unpack_value_array_2(ctx, v763);
+                        let v768 = C::value_type(ctx, v765.0);
+                        let v816 = C::ty_vec128(ctx, v768);
+                        if let Some(v817) = v816 {
+                            let v828 = constructor_put_in_xmm(ctx, v765.1);
+                            let v829 = &C::put_in_xmm_mem(ctx, v765.0);
+                            let v830 = constructor_x64_pcmpgt(ctx, v817, v828, v829);
+                            let v831 = constructor_output_xmm(ctx, v830);
+                            // Rule at src/isa/x64/lower.isle line 1806.
+                            return Some(v831);
+                        }
+                    }
+                    &IntCC::SignedLessThanOrEqual => {
+                        let v1 = C::first_result(ctx, arg0);
+                        if let Some(v2) = v1 {
+                            let v3 = C::value_type(ctx, v2);
+                            if v3 == I8 {
+                                let v765 = C::unpack_value_array_2(ctx, v763);
+                                let v786 = C::def_inst(ctx, v765.0);
+                                if let Some(v787) = v786 {
+                                    let v788 = &C::inst_data(ctx, v787);
+                                    if let &InstructionData::UnaryImm {
+                                        opcode: ref v789,
+                                        imm: v790,
+                                    } = v788
+                                    {
+                                        if let &Opcode::Iconst = v789 {
+                                            let v791 = C::u64_from_imm64(ctx, v790);
+                                            if v791 == 0x0 {
+                                                let v792 = C::value_type(ctx, v765.1);
+                                                match v792 {
+                                                    I32 => {
+                                                        let v793 =
+                                                            constructor_put_in_gpr(ctx, v765.1);
+                                                        let v796 =
+                                                            constructor_x64_not(ctx, I64, v793);
+                                                        let v805 = Imm8Reg::Imm8 { imm: 0x1F };
+                                                        let v811 =
+                                                            &C::imm8_reg_to_imm8_gpr(ctx, &v805);
+                                                        let v812 = constructor_x64_shr(
+                                                            ctx, I32, v796, v811,
+                                                        );
+                                                        let v813 =
+                                                            constructor_output_gpr(ctx, v812);
+                                                        // Rule at src/isa/x64/lower.isle line 1777.
+                                                        return Some(v813);
+                                                    }
+                                                    I64 => {
+                                                        let v793 =
+                                                            constructor_put_in_gpr(ctx, v765.1);
+                                                        let v796 =
+                                                            constructor_x64_not(ctx, I64, v793);
+                                                        let v782 = Imm8Reg::Imm8 { imm: 0x3F };
+                                                        let v797 =
+                                                            &C::imm8_reg_to_imm8_gpr(ctx, &v782);
+                                                        let v798 = constructor_x64_shr(
+                                                            ctx, I64, v796, v797,
+                                                        );
+                                                        let v799 =
+                                                            constructor_output_gpr(ctx, v798);
+                                                        // Rule at src/isa/x64/lower.isle line 1761.
+                                                        return Some(v799);
+                                                    }
+                                                    _ => {}
+                                                }
+                                            }
+                                        }
+                                    }
+                                }
+                            }
+                        }
+                        let v765 = C::unpack_value_array_2(ctx, v763);
+                        let v768 = C::value_type(ctx, v765.0);
+                        let v816 = C::ty_vec128(ctx, v768);
+                        if let Some(v817) = v816 {
+                            let v868 = constructor_has_pmins(ctx, v817);
+                            if v868 == true {
+                                let v818 = constructor_put_in_xmm(ctx, v765.0);
+                                let v843 = constructor_put_in_xmm(ctx, v765.0);
+                                let v861 = &C::put_in_xmm_mem(ctx, v765.1);
+                                let v869 = constructor_x64_pmins(ctx, v817, v843, v861);
+                                let v870 = &C::xmm_to_xmm_mem(ctx, v869);
+                                let v871 = constructor_x64_pcmpeq(ctx, v817, v818, v870);
+                                let v872 = constructor_output_xmm(ctx, v871);
+                                // Rule at src/isa/x64/lower.isle line 1863.
+                                return Some(v872);
+                            }
+                            let v818 = constructor_put_in_xmm(ctx, v765.0);
+                            let v819 = &C::put_in_xmm_mem(ctx, v765.1);
+                            let v826 = constructor_x64_pcmpgt(ctx, v817, v818, v819);
+                            let v822 = constructor_vector_all_ones(ctx);
+                            let v823 = &C::xmm_to_xmm_mem(ctx, v822);
+                            let v873 = constructor_x64_pxor(ctx, v826, v823);
+                            let v874 = constructor_output_xmm(ctx, v873);
+                            // Rule at src/isa/x64/lower.isle line 1868.
+                            return Some(v874);
+                        }
+                    }
+                    &IntCC::UnsignedGreaterThan => {
+                        let v765 = C::unpack_value_array_2(ctx, v763);
+                        let v768 = C::value_type(ctx, v765.0);
+                        let v816 = C::ty_vec128(ctx, v768);
+                        if let Some(v817) = v816 {
+                            let v832 = constructor_has_pmaxu(ctx, v817);
+                            if v832 == true {
+                                let v818 = constructor_put_in_xmm(ctx, v765.0);
+                                let v833 = constructor_put_in_xmm(ctx, v765.1);
+                                let v834 = &C::xmm_to_xmm_mem(ctx, v833);
+                                let v835 = constructor_x64_pmaxu(ctx, v817, v818, v834);
+                                let v836 = &C::xmm_to_xmm_mem(ctx, v833);
+                                let v837 = constructor_x64_pcmpeq(ctx, v817, v835, v836);
+                                let v838 = constructor_vector_all_ones(ctx);
+                                let v839 = &C::xmm_to_xmm_mem(ctx, v838);
+                                let v840 = constructor_x64_pxor(ctx, v837, v839);
+                                let v841 = constructor_output_xmm(ctx, v840);
+                                // Rule at src/isa/x64/lower.isle line 1813.
+                                return Some(v841);
+                            }
+                            let v842 = constructor_flip_high_bit_mask(ctx, v817);
+                            let v843 = constructor_put_in_xmm(ctx, v765.0);
+                            let v844 = &C::xmm_to_xmm_mem(ctx, v842);
+                            let v845 = constructor_x64_pxor(ctx, v843, v844);
+                            let v846 = constructor_put_in_xmm(ctx, v765.1);
+                            let v847 = &C::xmm_to_xmm_mem(ctx, v842);
+                            let v848 = constructor_x64_pxor(ctx, v846, v847);
+                            let v849 = &C::xmm_to_xmm_mem(ctx, v848);
+                            let v850 = constructor_x64_pcmpgt(ctx, v817, v845, v849);
+                            let v851 = constructor_output_xmm(ctx, v850);
+                            // Rule at src/isa/x64/lower.isle line 1823.
+                            return Some(v851);
+                        }
+                    }
+                    &IntCC::UnsignedGreaterThanOrEqual => {
+                        let v765 = C::unpack_value_array_2(ctx, v763);
+                        let v768 = C::value_type(ctx, v765.0);
+                        let v816 = C::ty_vec128(ctx, v768);
+                        if let Some(v817) = v816 {
+                            let v832 = constructor_has_pmaxu(ctx, v817);
+                            if v832 == true {
+                                let v818 = constructor_put_in_xmm(ctx, v765.0);
+                                let v843 = constructor_put_in_xmm(ctx, v765.0);
+                                let v861 = &C::put_in_xmm_mem(ctx, v765.1);
+                                let v875 = constructor_x64_pmaxu(ctx, v817, v843, v861);
+                                let v876 = &C::xmm_to_xmm_mem(ctx, v875);
+                                let v877 = constructor_x64_pcmpeq(ctx, v817, v818, v876);
+                                let v878 = constructor_output_xmm(ctx, v877);
+                                // Rule at src/isa/x64/lower.isle line 1873.
+                                return Some(v878);
+                            }
+                        }
+                        if v768 == I16X8 {
+                            let v828 = constructor_put_in_xmm(ctx, v765.1);
+                            let v829 = &C::put_in_xmm_mem(ctx, v765.0);
+                            let v879 = constructor_x64_psubusw(ctx, v828, v829);
+                            let v880 = constructor_xmm_zero(ctx, I16X8);
+                            let v881 = &C::xmm_to_xmm_mem(ctx, v880);
+                            let v882 = constructor_x64_pcmpeqw(ctx, v879, v881);
+                            let v883 = constructor_output_xmm(ctx, v882);
+                            // Rule at src/isa/x64/lower.isle line 1879.
+                            return Some(v883);
+                        }
+                        if let Some(v817) = v816 {
+                            let v842 = constructor_flip_high_bit_mask(ctx, v817);
+                            let v843 = constructor_put_in_xmm(ctx, v765.0);
+                            let v844 = &C::xmm_to_xmm_mem(ctx, v842);
+                            let v845 = constructor_x64_pxor(ctx, v843, v844);
+                            let v846 = constructor_put_in_xmm(ctx, v765.1);
+                            let v847 = &C::xmm_to_xmm_mem(ctx, v842);
+                            let v848 = constructor_x64_pxor(ctx, v846, v847);
+                            let v857 = &C::xmm_to_xmm_mem(ctx, v845);
+                            let v858 = constructor_x64_pcmpgt(ctx, v817, v848, v857);
+                            let v884 = constructor_vector_all_ones(ctx);
+                            let v885 = &C::xmm_to_xmm_mem(ctx, v884);
+                            let v886 = constructor_x64_pxor(ctx, v858, v885);
+                            let v887 = constructor_output_xmm(ctx, v886);
+                            // Rule at src/isa/x64/lower.isle line 1885.
+                            return Some(v887);
+                        }
+                    }
+                    &IntCC::UnsignedLessThan => {
+                        let v765 = C::unpack_value_array_2(ctx, v763);
+                        let v768 = C::value_type(ctx, v765.0);
+                        let v816 = C::ty_vec128(ctx, v768);
+                        if let Some(v817) = v816 {
+                            let v852 = constructor_has_pminu(ctx, v817);
+                            if v852 == true {
+                                let v818 = constructor_put_in_xmm(ctx, v765.0);
+                                let v833 = constructor_put_in_xmm(ctx, v765.1);
+                                let v834 = &C::xmm_to_xmm_mem(ctx, v833);
+                                let v853 = constructor_x64_pminu(ctx, v817, v818, v834);
+                                let v836 = &C::xmm_to_xmm_mem(ctx, v833);
+                                let v854 = constructor_x64_pcmpeq(ctx, v817, v853, v836);
+                                let v838 = constructor_vector_all_ones(ctx);
+                                let v839 = &C::xmm_to_xmm_mem(ctx, v838);
+                                let v855 = constructor_x64_pxor(ctx, v854, v839);
+                                let v856 = constructor_output_xmm(ctx, v855);
+                                // Rule at src/isa/x64/lower.isle line 1831.
+                                return Some(v856);
+                            }
+                            let v842 = constructor_flip_high_bit_mask(ctx, v817);
+                            let v843 = constructor_put_in_xmm(ctx, v765.0);
+                            let v844 = &C::xmm_to_xmm_mem(ctx, v842);
+                            let v845 = constructor_x64_pxor(ctx, v843, v844);
+                            let v846 = constructor_put_in_xmm(ctx, v765.1);
+                            let v847 = &C::xmm_to_xmm_mem(ctx, v842);
+                            let v848 = constructor_x64_pxor(ctx, v846, v847);
+                            let v857 = &C::xmm_to_xmm_mem(ctx, v845);
+                            let v858 = constructor_x64_pcmpgt(ctx, v817, v848, v857);
+                            let v859 = constructor_output_xmm(ctx, v858);
+                            // Rule at src/isa/x64/lower.isle line 1842.
+                            return Some(v859);
+                        }
+                    }
+                    &IntCC::UnsignedLessThanOrEqual => {
+                        let v765 = C::unpack_value_array_2(ctx, v763);
+                        let v768 = C::value_type(ctx, v765.0);
+                        let v816 = C::ty_vec128(ctx, v768);
+                        if let Some(v817) = v816 {
+                            let v852 = constructor_has_pminu(ctx, v817);
+                            if v852 == true {
+                                let v818 = constructor_put_in_xmm(ctx, v765.0);
+                                let v843 = constructor_put_in_xmm(ctx, v765.0);
+                                let v861 = &C::put_in_xmm_mem(ctx, v765.1);
+                                let v888 = constructor_x64_pminu(ctx, v817, v843, v861);
+                                let v889 = &C::xmm_to_xmm_mem(ctx, v888);
+                                let v890 = constructor_x64_pcmpeq(ctx, v817, v818, v889);
+                                let v891 = constructor_output_xmm(ctx, v890);
+                                // Rule at src/isa/x64/lower.isle line 1896.
+                                return Some(v891);
+                            }
+                        }
+                        if v768 == I16X8 {
+                            let v818 = constructor_put_in_xmm(ctx, v765.0);
+                            let v819 = &C::put_in_xmm_mem(ctx, v765.1);
+                            let v892 = constructor_x64_psubusw(ctx, v818, v819);
+                            let v893 = constructor_xmm_zero(ctx, I8X16);
+                            let v894 = &C::xmm_to_xmm_mem(ctx, v893);
+                            let v895 = constructor_x64_pcmpeqw(ctx, v892, v894);
+                            let v896 = constructor_output_xmm(ctx, v895);
+                            // Rule at src/isa/x64/lower.isle line 1903.
+                            return Some(v896);
+                        }
+                        if let Some(v817) = v816 {
+                            let v842 = constructor_flip_high_bit_mask(ctx, v817);
+                            let v843 = constructor_put_in_xmm(ctx, v765.0);
+                            let v844 = &C::xmm_to_xmm_mem(ctx, v842);
+                            let v845 = constructor_x64_pxor(ctx, v843, v844);
+                            let v846 = constructor_put_in_xmm(ctx, v765.1);
+                            let v847 = &C::xmm_to_xmm_mem(ctx, v842);
+                            let v848 = constructor_x64_pxor(ctx, v846, v847);
+                            let v849 = &C::xmm_to_xmm_mem(ctx, v848);
+                            let v850 = constructor_x64_pcmpgt(ctx, v817, v845, v849);
+                            let v884 = constructor_vector_all_ones(ctx);
+                            let v885 = &C::xmm_to_xmm_mem(ctx, v884);
+                            let v897 = constructor_x64_pxor(ctx, v850, v885);
+                            let v898 = constructor_output_xmm(ctx, v897);
+                            // Rule at src/isa/x64/lower.isle line 1911.
+                            return Some(v898);
+                        }
+                    }
+                    _ => {}
+                }
+                let v765 = C::unpack_value_array_2(ctx, v763);
+                let v768 = C::value_type(ctx, v765.0);
+                if v768 == I128 {
+                    let v771 = &constructor_emit_cmp(ctx, v764, v765.0, v765.1);
+                    let v772 = constructor_lower_icmp_bool(ctx, v771);
+                    let v773 = C::output(ctx, v772);
+                    // Rule at src/isa/x64/lower.isle line 1749.
+                    return Some(v773);
+                }
+                let v769 = C::fits_in_64(ctx, v768);
+                if let Some(v770) = v769 {
+                    let v771 = &constructor_emit_cmp(ctx, v764, v765.0, v765.1);
+                    let v772 = constructor_lower_icmp_bool(ctx, v771);
+                    let v773 = C::output(ctx, v772);
+                    // Rule at src/isa/x64/lower.isle line 1746.
+                    return Some(v773);
+                }
+            }
+        }
+        &InstructionData::Load {
+            opcode: ref v1422,
+            arg: v1423,
+            flags: v1424,
+            offset: v1425,
+        } => {
+            match v1422 {
+                &Opcode::Load => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            F32 => {
+                                let v1435 = &constructor_to_amode(ctx, v1424, v1423, v1425);
+                                let v1454 = &C::amode_to_synthetic_amode(ctx, v1435);
+                                let v1455 = constructor_x64_movss_load(ctx, v1454);
+                                let v1456 = constructor_output_xmm(ctx, v1455);
+                                // Rule at src/isa/x64/lower.isle line 2816.
+                                return Some(v1456);
+                            }
+                            F64 => {
+                                let v1435 = &constructor_to_amode(ctx, v1424, v1423, v1425);
+                                let v1454 = &C::amode_to_synthetic_amode(ctx, v1435);
+                                let v1457 = constructor_x64_movsd_load(ctx, v1454);
+                                let v1458 = constructor_output_xmm(ctx, v1457);
+                                // Rule at src/isa/x64/lower.isle line 2818.
+                                return Some(v1458);
+                            }
+                            F32X4 => {
+                                let v1435 = &constructor_to_amode(ctx, v1424, v1423, v1425);
+                                let v1454 = &C::amode_to_synthetic_amode(ctx, v1435);
+                                let v1459 = constructor_x64_movups_load(ctx, v1454);
+                                let v1460 = constructor_output_xmm(ctx, v1459);
+                                // Rule at src/isa/x64/lower.isle line 2820.
+                                return Some(v1460);
+                            }
+                            F64X2 => {
+                                let v1435 = &constructor_to_amode(ctx, v1424, v1423, v1425);
+                                let v1454 = &C::amode_to_synthetic_amode(ctx, v1435);
+                                let v1461 = constructor_x64_movupd_load(ctx, v1454);
+                                let v1462 = constructor_output_xmm(ctx, v1461);
+                                // Rule at src/isa/x64/lower.isle line 2822.
+                                return Some(v1462);
+                            }
+                            _ => {}
+                        }
+                        let v1433 = C::ty_int_ref_64(ctx, v3);
+                        if let Some(v1434) = v1433 {
+                            let v1435 = &constructor_to_amode(ctx, v1424, v1423, v1425);
+                            let v1436 = constructor_x64_mov(ctx, v1435);
+                            let v1437 = constructor_output_reg(ctx, v1436);
+                            // Rule at src/isa/x64/lower.isle line 2794.
+                            return Some(v1437);
+                        }
+                        let v682 = C::ty_vec128(ctx, v3);
+                        if let Some(v683) = v682 {
+                            let v1435 = &constructor_to_amode(ctx, v1424, v1423, v1425);
+                            let v1463 = &constructor_amode_to_xmm_mem(ctx, v1435);
+                            let v1464 = constructor_x64_movdqu_load(ctx, v1463);
+                            let v1465 = constructor_output_xmm(ctx, v1464);
+                            // Rule at src/isa/x64/lower.isle line 2824.
+                            return Some(v1465);
+                        }
+                        if v3 == I128 {
+                            let v1435 = &constructor_to_amode(ctx, v1424, v1423, v1425);
+                            let v1467 = &C::amode_offset(ctx, v1435, 0x8);
+                            let v1468 = constructor_x64_mov(ctx, v1435);
+                            let v1469 = constructor_x64_mov(ctx, v1467);
+                            let v1470 = C::value_regs(ctx, v1468, v1469);
+                            let v1471 = C::output(ctx, v1470);
+                            // Rule at src/isa/x64/lower.isle line 2828.
+                            return Some(v1471);
+                        }
+                        let v1164 = C::fits_in_32(ctx, v3);
+                        if let Some(v1165) = v1164 {
+                            let v1419 = &C::type_register_class(ctx, v3);
+                            if let Some(v1420) = v1419 {
+                                if let &RegisterClass::Gpr {
+                                    single_register: v1421,
+                                } = v1420
+                                {
+                                    let v1426 = C::ty_bits_u16(ctx, v1165);
+                                    let v1428 = &C::ext_mode(ctx, v1426, 0x40);
+                                    let v1429 = &constructor_to_amode(ctx, v1424, v1423, v1425);
+                                    let v1430 = &constructor_amode_to_gpr_mem(ctx, v1429);
+                                    let v1431 = constructor_x64_movzx(ctx, v1428, v1430);
+                                    let v1432 = constructor_output_gpr(ctx, v1431);
+                                    // Rule at src/isa/x64/lower.isle line 2790.
+                                    return Some(v1432);
+                                }
+                            }
+                        }
+                    }
+                }
+                &Opcode::Uload8 => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v1419 = &C::type_register_class(ctx, v3);
+                        if let Some(v1420) = v1419 {
+                            if let &RegisterClass::Gpr {
+                                single_register: v1421,
+                            } = v1420
+                            {
+                                let v1435 = &constructor_to_amode(ctx, v1424, v1423, v1425);
+                                let v1439 = &constructor_amode_to_gpr_mem(ctx, v1435);
+                                let v1440 = constructor_x64_movzx(ctx, &ExtMode::BQ, v1439);
+                                let v1441 = constructor_output_gpr(ctx, v1440);
+                                // Rule at src/isa/x64/lower.isle line 2799.
+                                return Some(v1441);
+                            }
+                        }
+                    }
+                }
+                &Opcode::Sload8 => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v1419 = &C::type_register_class(ctx, v3);
+                        if let Some(v1420) = v1419 {
+                            if let &RegisterClass::Gpr {
+                                single_register: v1421,
+                            } = v1420
+                            {
+                                let v1435 = &constructor_to_amode(ctx, v1424, v1423, v1425);
+                                let v1439 = &constructor_amode_to_gpr_mem(ctx, v1435);
+                                let v1442 = constructor_x64_movsx(ctx, &ExtMode::BQ, v1439);
+                                let v1443 = constructor_output_gpr(ctx, v1442);
+                                // Rule at src/isa/x64/lower.isle line 2801.
+                                return Some(v1443);
+                            }
+                        }
+                    }
+                }
+                &Opcode::Uload16 => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v1419 = &C::type_register_class(ctx, v3);
+                        if let Some(v1420) = v1419 {
+                            if let &RegisterClass::Gpr {
+                                single_register: v1421,
+                            } = v1420
+                            {
+                                let v1435 = &constructor_to_amode(ctx, v1424, v1423, v1425);
+                                let v1439 = &constructor_amode_to_gpr_mem(ctx, v1435);
+                                let v1445 = constructor_x64_movzx(ctx, &ExtMode::WQ, v1439);
+                                let v1446 = constructor_output_gpr(ctx, v1445);
+                                // Rule at src/isa/x64/lower.isle line 2803.
+                                return Some(v1446);
+                            }
+                        }
+                    }
+                }
+                &Opcode::Sload16 => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v1419 = &C::type_register_class(ctx, v3);
+                        if let Some(v1420) = v1419 {
+                            if let &RegisterClass::Gpr {
+                                single_register: v1421,
+                            } = v1420
+                            {
+                                let v1435 = &constructor_to_amode(ctx, v1424, v1423, v1425);
+                                let v1439 = &constructor_amode_to_gpr_mem(ctx, v1435);
+                                let v1447 = constructor_x64_movsx(ctx, &ExtMode::WQ, v1439);
+                                let v1448 = constructor_output_gpr(ctx, v1447);
+                                // Rule at src/isa/x64/lower.isle line 2805.
+                                return Some(v1448);
+                            }
+                        }
+                    }
+                }
+                &Opcode::Uload32 => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v1419 = &C::type_register_class(ctx, v3);
+                        if let Some(v1420) = v1419 {
+                            if let &RegisterClass::Gpr {
+                                single_register: v1421,
+                            } = v1420
+                            {
+                                let v1435 = &constructor_to_amode(ctx, v1424, v1423, v1425);
+                                let v1439 = &constructor_amode_to_gpr_mem(ctx, v1435);
+                                let v1450 = constructor_x64_movzx(ctx, &ExtMode::LQ, v1439);
+                                let v1451 = constructor_output_gpr(ctx, v1450);
+                                // Rule at src/isa/x64/lower.isle line 2807.
+                                return Some(v1451);
+                            }
+                        }
+                    }
+                }
+                &Opcode::Sload32 => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v1419 = &C::type_register_class(ctx, v3);
+                        if let Some(v1420) = v1419 {
+                            if let &RegisterClass::Gpr {
+                                single_register: v1421,
+                            } = v1420
+                            {
+                                let v1435 = &constructor_to_amode(ctx, v1424, v1423, v1425);
+                                let v1439 = &constructor_amode_to_gpr_mem(ctx, v1435);
+                                let v1452 = constructor_x64_movsx(ctx, &ExtMode::LQ, v1439);
+                                let v1453 = constructor_output_gpr(ctx, v1452);
+                                // Rule at src/isa/x64/lower.isle line 2809.
+                                return Some(v1453);
+                            }
+                        }
+                    }
+                }
+                &Opcode::Uload8x8 => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        if v3 == I16X8 {
+                            let v436 = C::use_sse41(ctx);
+                            if v436 == true {
+                                let v1435 = &constructor_to_amode(ctx, v1424, v1423, v1425);
+                                let v1463 = &constructor_amode_to_xmm_mem(ctx, v1435);
+                                let v1474 = constructor_x64_pmovzxbw(ctx, v1463);
+                                let v1475 = constructor_output_xmm(ctx, v1474);
+                                // Rule at src/isa/x64/lower.isle line 2841.
+                                return Some(v1475);
+                            }
+                            let v1435 = &constructor_to_amode(ctx, v1424, v1423, v1425);
+                            let v1439 = &constructor_amode_to_gpr_mem(ctx, v1435);
+                            let v1484 = constructor_x64_movq_to_xmm(ctx, v1439);
+                            let v1487 = constructor_lower_uwiden_low(ctx, I16X8, v1484);
+                            let v1488 = constructor_output_xmm(ctx, v1487);
+                            // Rule at src/isa/x64/lower.isle line 2859.
+                            return Some(v1488);
+                        }
+                    }
+                }
+                &Opcode::Sload8x8 => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        if v3 == I16X8 {
+                            let v436 = C::use_sse41(ctx);
+                            if v436 == true {
+                                let v1435 = &constructor_to_amode(ctx, v1424, v1423, v1425);
+                                let v1463 = &constructor_amode_to_xmm_mem(ctx, v1435);
+                                let v1472 = constructor_x64_pmovsxbw(ctx, v1463);
+                                let v1473 = constructor_output_xmm(ctx, v1472);
+                                // Rule at src/isa/x64/lower.isle line 2838.
+                                return Some(v1473);
+                            }
+                            let v1435 = &constructor_to_amode(ctx, v1424, v1423, v1425);
+                            let v1439 = &constructor_amode_to_gpr_mem(ctx, v1435);
+                            let v1484 = constructor_x64_movq_to_xmm(ctx, v1439);
+                            let v1485 = constructor_lower_swiden_low(ctx, I16X8, v1484);
+                            let v1486 = constructor_output_xmm(ctx, v1485);
+                            // Rule at src/isa/x64/lower.isle line 2857.
+                            return Some(v1486);
+                        }
+                    }
+                }
+                &Opcode::Uload16x4 => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        if v3 == I32X4 {
+                            let v436 = C::use_sse41(ctx);
+                            if v436 == true {
+                                let v1435 = &constructor_to_amode(ctx, v1424, v1423, v1425);
+                                let v1463 = &constructor_amode_to_xmm_mem(ctx, v1435);
+                                let v1478 = constructor_x64_pmovzxwd(ctx, v1463);
+                                let v1479 = constructor_output_xmm(ctx, v1478);
+                                // Rule at src/isa/x64/lower.isle line 2847.
+                                return Some(v1479);
+                            }
+                            let v1435 = &constructor_to_amode(ctx, v1424, v1423, v1425);
+                            let v1439 = &constructor_amode_to_gpr_mem(ctx, v1435);
+                            let v1484 = constructor_x64_movq_to_xmm(ctx, v1439);
+                            let v1491 = constructor_lower_uwiden_low(ctx, I32X4, v1484);
+                            let v1492 = constructor_output_xmm(ctx, v1491);
+                            // Rule at src/isa/x64/lower.isle line 2863.
+                            return Some(v1492);
+                        }
+                    }
+                }
+                &Opcode::Sload16x4 => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        if v3 == I32X4 {
+                            let v436 = C::use_sse41(ctx);
+                            if v436 == true {
+                                let v1435 = &constructor_to_amode(ctx, v1424, v1423, v1425);
+                                let v1463 = &constructor_amode_to_xmm_mem(ctx, v1435);
+                                let v1476 = constructor_x64_pmovsxwd(ctx, v1463);
+                                let v1477 = constructor_output_xmm(ctx, v1476);
+                                // Rule at src/isa/x64/lower.isle line 2844.
+                                return Some(v1477);
+                            }
+                            let v1435 = &constructor_to_amode(ctx, v1424, v1423, v1425);
+                            let v1439 = &constructor_amode_to_gpr_mem(ctx, v1435);
+                            let v1484 = constructor_x64_movq_to_xmm(ctx, v1439);
+                            let v1489 = constructor_lower_swiden_low(ctx, I32X4, v1484);
+                            let v1490 = constructor_output_xmm(ctx, v1489);
+                            // Rule at src/isa/x64/lower.isle line 2861.
+                            return Some(v1490);
+                        }
+                    }
+                }
+                &Opcode::Uload32x2 => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        if v3 == I64X2 {
+                            let v436 = C::use_sse41(ctx);
+                            if v436 == true {
+                                let v1435 = &constructor_to_amode(ctx, v1424, v1423, v1425);
+                                let v1463 = &constructor_amode_to_xmm_mem(ctx, v1435);
+                                let v1482 = constructor_x64_pmovzxdq(ctx, v1463);
+                                let v1483 = constructor_output_xmm(ctx, v1482);
+                                // Rule at src/isa/x64/lower.isle line 2853.
+                                return Some(v1483);
+                            }
+                            let v1435 = &constructor_to_amode(ctx, v1424, v1423, v1425);
+                            let v1439 = &constructor_amode_to_gpr_mem(ctx, v1435);
+                            let v1484 = constructor_x64_movq_to_xmm(ctx, v1439);
+                            let v1495 = constructor_lower_uwiden_low(ctx, I64X2, v1484);
+                            let v1496 = constructor_output_xmm(ctx, v1495);
+                            // Rule at src/isa/x64/lower.isle line 2867.
+                            return Some(v1496);
+                        }
+                    }
+                }
+                &Opcode::Sload32x2 => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        if v3 == I64X2 {
+                            let v436 = C::use_sse41(ctx);
+                            if v436 == true {
+                                let v1435 = &constructor_to_amode(ctx, v1424, v1423, v1425);
+                                let v1463 = &constructor_amode_to_xmm_mem(ctx, v1435);
+                                let v1480 = constructor_x64_pmovsxdq(ctx, v1463);
+                                let v1481 = constructor_output_xmm(ctx, v1480);
+                                // Rule at src/isa/x64/lower.isle line 2850.
+                                return Some(v1481);
+                            }
+                            let v1435 = &constructor_to_amode(ctx, v1424, v1423, v1425);
+                            let v1439 = &constructor_amode_to_gpr_mem(ctx, v1435);
+                            let v1484 = constructor_x64_movq_to_xmm(ctx, v1439);
+                            let v1493 = constructor_lower_swiden_low(ctx, I64X2, v1484);
+                            let v1494 = constructor_output_xmm(ctx, v1493);
+                            // Rule at src/isa/x64/lower.isle line 2865.
+                            return Some(v1494);
+                        }
+                    }
+                }
+                _ => {}
+            }
+        }
+        &InstructionData::LoadNoOffset {
+            opcode: ref v1635,
+            arg: v1636,
+            flags: v1637,
+        } => {
+            match v1635 {
+                &Opcode::Bitcast => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v1419 = &C::type_register_class(ctx, v3);
+                        if let Some(v1420) = v1419 {
+                            match v1420 {
+                                &RegisterClass::Gpr {
+                                    single_register: v1421,
+                                } => {
+                                    let v2035 = C::value_type(ctx, v1636);
+                                    let v2046 = &C::type_register_class(ctx, v2035);
+                                    if let Some(v2047) = v2046 {
+                                        if let &RegisterClass::Gpr {
+                                            single_register: v2048,
+                                        } = v2047
+                                        {
+                                            let v2049 = constructor_output_value(ctx, v1636);
+                                            // Rule at src/isa/x64/lower.isle line 3838.
+                                            return Some(v2049);
+                                        }
+                                    }
+                                }
+                                &RegisterClass::Xmm => {
+                                    let v2035 = C::value_type(ctx, v1636);
+                                    let v2046 = &C::type_register_class(ctx, v2035);
+                                    if let Some(v2047) = v2046 {
+                                        if let &RegisterClass::Xmm = v2047 {
+                                            let v2049 = constructor_output_value(ctx, v1636);
+                                            // Rule at src/isa/x64/lower.isle line 3842.
+                                            return Some(v2049);
+                                        }
+                                    }
+                                }
+                                _ => {}
+                            }
+                        }
+                        match v3 {
+                            I32 => {
+                                let v2035 = C::value_type(ctx, v1636);
+                                if v2035 == F32 {
+                                    let v2036 = constructor_put_in_xmm(ctx, v1636);
+                                    let v2037 = constructor_bitcast_xmm_to_gpr(ctx, F32, v2036);
+                                    let v2038 = constructor_output_gpr(ctx, v2037);
+                                    // Rule at src/isa/x64/lower.isle line 3825.
+                                    return Some(v2038);
+                                }
+                            }
+                            I64 => {
+                                let v2035 = C::value_type(ctx, v1636);
+                                if v2035 == F64 {
+                                    let v2036 = constructor_put_in_xmm(ctx, v1636);
+                                    let v2042 = constructor_bitcast_xmm_to_gpr(ctx, F64, v2036);
+                                    let v2043 = constructor_output_gpr(ctx, v2042);
+                                    // Rule at src/isa/x64/lower.isle line 3831.
+                                    return Some(v2043);
+                                }
+                            }
+                            F32 => {
+                                let v2035 = C::value_type(ctx, v1636);
+                                if v2035 == I32 {
+                                    let v2039 = constructor_put_in_gpr(ctx, v1636);
+                                    let v2040 = constructor_bitcast_gpr_to_xmm(ctx, I32, v2039);
+                                    let v2041 = constructor_output_xmm(ctx, v2040);
+                                    // Rule at src/isa/x64/lower.isle line 3828.
+                                    return Some(v2041);
+                                }
+                            }
+                            F64 => {
+                                let v2035 = C::value_type(ctx, v1636);
+                                if v2035 == I64 {
+                                    let v2039 = constructor_put_in_gpr(ctx, v1636);
+                                    let v2044 = constructor_bitcast_gpr_to_xmm(ctx, I64, v2039);
+                                    let v2045 = constructor_output_xmm(ctx, v2044);
+                                    // Rule at src/isa/x64/lower.isle line 3834.
+                                    return Some(v2045);
+                                }
+                            }
+                            _ => {}
+                        }
+                    }
+                }
+                &Opcode::AtomicLoad => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        if v3 == I64 {
+                            let v48 = C::zero_offset(ctx);
+                            let v1638 = &constructor_to_amode(ctx, v1637, v1636, v48);
+                            let v1639 = constructor_x64_mov(ctx, v1638);
+                            let v1640 = constructor_output_reg(ctx, v1639);
+                            // Rule at src/isa/x64/lower.isle line 3144.
+                            return Some(v1640);
+                        }
+                        let v1164 = C::fits_in_32(ctx, v3);
+                        if let Some(v1165) = v1164 {
+                            let v1641 = C::ty_int(ctx, v3);
+                            if let Some(v1642) = v1641 {
+                                let v1426 = C::ty_bits_u16(ctx, v1165);
+                                let v1428 = &C::ext_mode(ctx, v1426, 0x40);
+                                let v1643 = C::zero_offset(ctx);
+                                let v1644 = &constructor_to_amode(ctx, v1637, v1636, v1643);
+                                let v1645 = &constructor_amode_to_gpr_mem(ctx, v1644);
+                                let v1646 = constructor_x64_movzx(ctx, v1428, v1645);
+                                let v1647 = constructor_output_gpr(ctx, v1646);
+                                // Rule at src/isa/x64/lower.isle line 3146.
+                                return Some(v1647);
+                            }
+                        }
+                    }
+                }
+                _ => {}
+            }
+        }
+        &InstructionData::MultiAry {
+            opcode: ref v758,
+            args: v759,
+        } => {
+            if let &Opcode::Return = v758 {
+                let v760 = C::value_list_slice(ctx, v759);
+                let v761 = constructor_lower_return(ctx, v760);
+                // Rule at src/isa/x64/lower.isle line 1741.
+                return Some(v761);
+            }
+        }
+        &InstructionData::NullAry { opcode: ref v31 } => {
+            match v31 {
+                &Opcode::Debugtrap => {
+                    let v1178 = &constructor_x64_hlt(ctx);
+                    let v1179 = constructor_side_effect(ctx, v1178);
+                    // Rule at src/isa/x64/lower.isle line 2410.
+                    return Some(v1179);
+                }
+                &Opcode::GetPinnedReg => {
+                    let v2158 = constructor_read_pinned_gpr(ctx);
+                    let v2159 = constructor_output_gpr(ctx, v2158);
+                    // Rule at src/isa/x64/lower.isle line 4103.
+                    return Some(v2159);
+                }
+                &Opcode::GetFramePointer => {
+                    let v1713 = constructor_x64_rbp(ctx);
+                    let v1714 = constructor_output_reg(ctx, v1713);
+                    // Rule at src/isa/x64/lower.isle line 3201.
+                    return Some(v1714);
+                }
+                &Opcode::GetStackPointer => {
+                    let v1715 = constructor_x64_rsp(ctx);
+                    let v1716 = constructor_output_reg(ctx, v1715);
+                    // Rule at src/isa/x64/lower.isle line 3204.
+                    return Some(v1716);
+                }
+                &Opcode::GetReturnAddress => {
+                    let v1713 = constructor_x64_rbp(ctx);
+                    let v47 = C::mem_flags_trusted(ctx);
+                    let v1717 = Amode::ImmReg {
+                        simm32: 0x8,
+                        base: v1713,
+                        flags: v47,
+                    };
+                    let v1718 = &C::amode_to_synthetic_amode(ctx, &v1717);
+                    let v1719 = constructor_x64_load(ctx, I64, v1718, &ExtKind::None);
+                    let v1720 = constructor_output_reg(ctx, v1719);
+                    // Rule at src/isa/x64/lower.isle line 3207.
+                    return Some(v1720);
+                }
+                &Opcode::Null => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v32 = constructor_imm(ctx, v3, 0x0);
+                        let v33 = constructor_output_reg(ctx, v32);
+                        // Rule at src/isa/x64/lower.isle line 37.
+                        return Some(v33);
+                    }
+                }
+                &Opcode::Nop => {
+                    let v2511 = C::invalid_reg(ctx);
+                    let v2512 = constructor_output_reg(ctx, v2511);
+                    // Rule at src/isa/x64/lower.isle line 4650.
+                    return Some(v2512);
+                }
+                &Opcode::Fence => {
+                    let v1615 = &constructor_x64_mfence(ctx);
+                    let v1616 = constructor_side_effect(ctx, v1615);
+                    // Rule at src/isa/x64/lower.isle line 3122.
+                    return Some(v1616);
+                }
+                _ => {}
+            }
+        }
+        &InstructionData::Shuffle {
+            opcode: ref v2167,
+            args: ref v2168,
+            imm: v2169,
+        } => {
+            if let &Opcode::Shuffle = v2167 {
+                let v436 = C::use_sse41(ctx);
+                if v436 == true {
+                    let v2173 = C::pblendw_imm(ctx, v2169);
+                    if let Some(v2174) = v2173 {
+                        let v2170 = C::unpack_value_array_2(ctx, v2168);
+                        let v2175 = constructor_put_in_xmm(ctx, v2170.0);
+                        let v2176 = &C::put_in_xmm_mem(ctx, v2170.1);
+                        let v2177 = constructor_x64_pblendw(ctx, v2175, v2176, v2174);
+                        let v2178 = constructor_output_xmm(ctx, v2177);
+                        // Rule at src/isa/x64/lower.isle line 4123.
+                        return Some(v2178);
+                    }
+                }
+                let v520 = C::use_ssse3(ctx);
+                if v520 == true {
+                    let v2179 = C::palignr_imm_from_immediate(ctx, v2169);
+                    if let Some(v2180) = v2179 {
+                        let v2170 = C::unpack_value_array_2(ctx, v2168);
+                        let v2181 = constructor_put_in_xmm(ctx, v2170.1);
+                        let v2182 = &C::put_in_xmm_mem(ctx, v2170.0);
+                        let v2183 = constructor_x64_palignr(ctx, v2181, v2182, v2180);
+                        let v2184 = constructor_output_xmm(ctx, v2183);
+                        // Rule at src/isa/x64/lower.isle line 4134.
+                        return Some(v2184);
+                    }
+                }
+                let v2185 = C::pshuflw_lhs_imm(ctx, v2169);
+                if let Some(v2186) = v2185 {
+                    let v2170 = C::unpack_value_array_2(ctx, v2168);
+                    let v2187 = &C::put_in_xmm_mem(ctx, v2170.0);
+                    let v2188 = constructor_x64_pshuflw(ctx, v2187, v2186);
+                    let v2189 = constructor_output_xmm(ctx, v2188);
+                    // Rule at src/isa/x64/lower.isle line 4146.
+                    return Some(v2189);
+                }
+                let v2190 = C::pshuflw_rhs_imm(ctx, v2169);
+                if let Some(v2191) = v2190 {
+                    let v2170 = C::unpack_value_array_2(ctx, v2168);
+                    let v2192 = &C::put_in_xmm_mem(ctx, v2170.1);
+                    let v2193 = constructor_x64_pshuflw(ctx, v2192, v2191);
+                    let v2194 = constructor_output_xmm(ctx, v2193);
+                    // Rule at src/isa/x64/lower.isle line 4148.
+                    return Some(v2194);
+                }
+                let v2195 = C::pshufhw_lhs_imm(ctx, v2169);
+                if let Some(v2196) = v2195 {
+                    let v2170 = C::unpack_value_array_2(ctx, v2168);
+                    let v2187 = &C::put_in_xmm_mem(ctx, v2170.0);
+                    let v2197 = constructor_x64_pshufhw(ctx, v2187, v2196);
+                    let v2198 = constructor_output_xmm(ctx, v2197);
+                    // Rule at src/isa/x64/lower.isle line 4150.
+                    return Some(v2198);
+                }
+                let v2199 = C::pshufhw_rhs_imm(ctx, v2169);
+                if let Some(v2200) = v2199 {
+                    let v2170 = C::unpack_value_array_2(ctx, v2168);
+                    let v2192 = &C::put_in_xmm_mem(ctx, v2170.1);
+                    let v2201 = constructor_x64_pshufhw(ctx, v2192, v2200);
+                    let v2202 = constructor_output_xmm(ctx, v2201);
+                    // Rule at src/isa/x64/lower.isle line 4152.
+                    return Some(v2202);
+                }
+                let v2203 = C::pshufd_lhs_imm(ctx, v2169);
+                if let Some(v2204) = v2203 {
+                    let v2170 = C::unpack_value_array_2(ctx, v2168);
+                    let v2187 = &C::put_in_xmm_mem(ctx, v2170.0);
+                    let v2205 = constructor_x64_pshufd(ctx, v2187, v2204);
+                    let v2206 = constructor_output_xmm(ctx, v2205);
+                    // Rule at src/isa/x64/lower.isle line 4169.
+                    return Some(v2206);
+                }
+                let v2207 = C::pshufd_rhs_imm(ctx, v2169);
+                if let Some(v2208) = v2207 {
+                    let v2170 = C::unpack_value_array_2(ctx, v2168);
+                    let v2192 = &C::put_in_xmm_mem(ctx, v2170.1);
+                    let v2209 = constructor_x64_pshufd(ctx, v2192, v2208);
+                    let v2210 = constructor_output_xmm(ctx, v2209);
+                    // Rule at src/isa/x64/lower.isle line 4171.
+                    return Some(v2210);
+                }
+                let v2211 = C::u128_from_immediate(ctx, v2169);
+                if let Some(v2212) = v2211 {
+                    match v2212 {
+                        0x0 => {
+                            if v520 == true {
+                                let v2170 = C::unpack_value_array_2(ctx, v2168);
+                                let v2175 = constructor_put_in_xmm(ctx, v2170.0);
+                                let v525 = constructor_xmm_zero(ctx, I8X16);
+                                let v1993 = &C::xmm_to_xmm_mem(ctx, v525);
+                                let v2229 = constructor_x64_pshufb(ctx, v2175, v1993);
+                                let v2230 = constructor_output_xmm(ctx, v2229);
+                                // Rule at src/isa/x64/lower.isle line 4208.
+                                return Some(v2230);
+                            }
+                        }
+                        0x17071606150514041303120211011000 => {
+                            let v2170 = C::unpack_value_array_2(ctx, v2168);
+                            let v2175 = constructor_put_in_xmm(ctx, v2170.0);
+                            let v2176 = &C::put_in_xmm_mem(ctx, v2170.1);
+                            let v2215 = constructor_x64_punpcklbw(ctx, v2175, v2176);
+                            let v2216 = constructor_output_xmm(ctx, v2215);
+                            // Rule at src/isa/x64/lower.isle line 4182.
+                            return Some(v2216);
+                        }
+                        0x17160706151405041312030211100100 => {
+                            let v2170 = C::unpack_value_array_2(ctx, v2168);
+                            let v2175 = constructor_put_in_xmm(ctx, v2170.0);
+                            let v2176 = &C::put_in_xmm_mem(ctx, v2170.1);
+                            let v2219 = constructor_x64_punpcklwd(ctx, v2175, v2176);
+                            let v2220 = constructor_output_xmm(ctx, v2219);
+                            // Rule at src/isa/x64/lower.isle line 4188.
+                            return Some(v2220);
+                        }
+                        0x17161514070605041312111003020100 => {
+                            let v2170 = C::unpack_value_array_2(ctx, v2168);
+                            let v2175 = constructor_put_in_xmm(ctx, v2170.0);
+                            let v2176 = &C::put_in_xmm_mem(ctx, v2170.1);
+                            let v2223 = constructor_x64_punpckldq(ctx, v2175, v2176);
+                            let v2224 = constructor_output_xmm(ctx, v2223);
+                            // Rule at src/isa/x64/lower.isle line 4194.
+                            return Some(v2224);
+                        }
+                        0x17161514131211100706050403020100 => {
+                            let v2170 = C::unpack_value_array_2(ctx, v2168);
+                            let v2175 = constructor_put_in_xmm(ctx, v2170.0);
+                            let v2176 = &C::put_in_xmm_mem(ctx, v2170.1);
+                            let v2227 = constructor_x64_punpcklqdq(ctx, v2175, v2176);
+                            let v2228 = constructor_output_xmm(ctx, v2227);
+                            // Rule at src/isa/x64/lower.isle line 4200.
+                            return Some(v2228);
+                        }
+                        0x1F0F1E0E1D0D1C0C1B0B1A0A19091808 => {
+                            let v2170 = C::unpack_value_array_2(ctx, v2168);
+                            let v2175 = constructor_put_in_xmm(ctx, v2170.0);
+                            let v2176 = &C::put_in_xmm_mem(ctx, v2170.1);
+                            let v2213 = constructor_x64_punpckhbw(ctx, v2175, v2176);
+                            let v2214 = constructor_output_xmm(ctx, v2213);
+                            // Rule at src/isa/x64/lower.isle line 4180.
+                            return Some(v2214);
+                        }
+                        0x1F1E0F0E1D1C0D0C1B1A0B0A19180908 => {
+                            let v2170 = C::unpack_value_array_2(ctx, v2168);
+                            let v2175 = constructor_put_in_xmm(ctx, v2170.0);
+                            let v2176 = &C::put_in_xmm_mem(ctx, v2170.1);
+                            let v2217 = constructor_x64_punpckhwd(ctx, v2175, v2176);
+                            let v2218 = constructor_output_xmm(ctx, v2217);
+                            // Rule at src/isa/x64/lower.isle line 4186.
+                            return Some(v2218);
+                        }
+                        0x1F1E1D1C0F0E0D0C1B1A19180B0A0908 => {
+                            let v2170 = C::unpack_value_array_2(ctx, v2168);
+                            let v2175 = constructor_put_in_xmm(ctx, v2170.0);
+                            let v2176 = &C::put_in_xmm_mem(ctx, v2170.1);
+                            let v2221 = constructor_x64_punpckhdq(ctx, v2175, v2176);
+                            let v2222 = constructor_output_xmm(ctx, v2221);
+                            // Rule at src/isa/x64/lower.isle line 4192.
+                            return Some(v2222);
+                        }
+                        0x1F1E1D1C1B1A19180F0E0D0C0B0A0908 => {
+                            let v2170 = C::unpack_value_array_2(ctx, v2168);
+                            let v2175 = constructor_put_in_xmm(ctx, v2170.0);
+                            let v2176 = &C::put_in_xmm_mem(ctx, v2170.1);
+                            let v2225 = constructor_x64_punpckhqdq(ctx, v2175, v2176);
+                            let v2226 = constructor_output_xmm(ctx, v2225);
+                            // Rule at src/isa/x64/lower.isle line 4198.
+                            return Some(v2226);
+                        }
+                        _ => {}
+                    }
+                }
+                let v2231 = C::shufps_imm(ctx, v2169);
+                if let Some(v2232) = v2231 {
+                    let v2170 = C::unpack_value_array_2(ctx, v2168);
+                    let v2175 = constructor_put_in_xmm(ctx, v2170.0);
+                    let v2176 = &C::put_in_xmm_mem(ctx, v2170.1);
+                    let v2233 = constructor_x64_shufps(ctx, v2175, v2176, v2232);
+                    let v2234 = constructor_output_xmm(ctx, v2233);
+                    // Rule at src/isa/x64/lower.isle line 4222.
+                    return Some(v2234);
+                }
+                let v2235 = C::shufps_rev_imm(ctx, v2169);
+                if let Some(v2236) = v2235 {
+                    let v2170 = C::unpack_value_array_2(ctx, v2168);
+                    let v2181 = constructor_put_in_xmm(ctx, v2170.1);
+                    let v2182 = &C::put_in_xmm_mem(ctx, v2170.0);
+                    let v2237 = constructor_x64_shufps(ctx, v2181, v2182, v2236);
+                    let v2238 = constructor_output_xmm(ctx, v2237);
+                    // Rule at src/isa/x64/lower.isle line 4224.
+                    return Some(v2238);
+                }
+                let v2239 = &C::vec_mask_from_immediate(ctx, v2169);
+                if let Some(v2240) = v2239 {
+                    if v520 == true {
+                        let v2170 = C::unpack_value_array_2(ctx, v2168);
+                        if v2170.0 == v2170.1 {
+                            let v2175 = constructor_put_in_xmm(ctx, v2170.0);
+                            let v2241 = C::shuffle_0_31_mask(ctx, v2240);
+                            let v2242 = &constructor_const_to_xmm_mem(ctx, v2241);
+                            let v2243 = constructor_x64_pshufb(ctx, v2175, v2242);
+                            let v2244 = constructor_output_xmm(ctx, v2243);
+                            // Rule at src/isa/x64/lower.isle line 4237.
+                            return Some(v2244);
+                        }
+                    }
+                    let v328 = C::use_avx512vl(ctx);
+                    if v328 == true {
+                        let v2249 = C::use_avx512vbmi(ctx);
+                        if v2249 == true {
+                            let v2245 = C::perm_from_mask_with_zeros(ctx, v2240);
+                            if let Some(v2246) = v2245 {
+                                let v2250 = constructor_x64_xmm_load_const(ctx, I8X16, v2246.0);
+                                let v2170 = C::unpack_value_array_2(ctx, v2168);
+                                let v2251 = constructor_put_in_xmm(ctx, v2170.0);
+                                let v2252 = &C::put_in_xmm_mem(ctx, v2170.1);
+                                let v2253 = constructor_x64_vpermi2b(ctx, v2250, v2251, v2252);
+                                let v2254 = &constructor_const_to_xmm_mem(ctx, v2246.1);
+                                let v2255 = constructor_x64_andps(ctx, v2253, v2254);
+                                let v2256 = constructor_output_xmm(ctx, v2255);
+                                // Rule at src/isa/x64/lower.isle line 4244.
+                                return Some(v2256);
+                            }
+                            let v2257 = C::perm_from_mask(ctx, v2240);
+                            let v2258 = constructor_x64_xmm_load_const(ctx, I8X16, v2257);
+                            let v2170 = C::unpack_value_array_2(ctx, v2168);
+                            let v2259 = constructor_put_in_xmm(ctx, v2170.0);
+                            let v2260 = &C::put_in_xmm_mem(ctx, v2170.1);
+                            let v2261 = constructor_x64_vpermi2b(ctx, v2258, v2259, v2260);
+                            let v2262 = constructor_output_xmm(ctx, v2261);
+                            // Rule at src/isa/x64/lower.isle line 4251.
+                            return Some(v2262);
+                        }
+                    }
+                    let v2170 = C::unpack_value_array_2(ctx, v2168);
+                    let v2175 = constructor_put_in_xmm(ctx, v2170.0);
+                    let v2263 = C::shuffle_0_15_mask(ctx, v2240);
+                    let v2264 = &constructor_const_to_reg_mem(ctx, v2263);
+                    let v2265 = constructor_lower_pshufb(ctx, v2175, v2264);
+                    let v2266 = constructor_put_in_xmm(ctx, v2170.1);
+                    let v2267 = C::shuffle_16_31_mask(ctx, v2240);
+                    let v2268 = &constructor_const_to_reg_mem(ctx, v2267);
+                    let v2269 = constructor_lower_pshufb(ctx, v2266, v2268);
+                    let v2270 = &C::xmm_to_xmm_mem(ctx, v2269);
+                    let v2271 = constructor_x64_por(ctx, v2265, v2270);
+                    let v2272 = constructor_output_xmm(ctx, v2271);
+                    // Rule at src/isa/x64/lower.isle line 4259.
+                    return Some(v2272);
+                }
+            }
+        }
+        &InstructionData::StackLoad {
+            opcode: ref v2079,
+            stack_slot: v2080,
+            offset: v2081,
+        } => {
+            if let &Opcode::StackAddr = v2079 {
+                let v2082 = constructor_stack_addr_impl(ctx, v2080, v2081);
+                let v2083 = constructor_output_gpr(ctx, v2082);
+                // Rule at src/isa/x64/lower.isle line 3934.
+                return Some(v2083);
+            }
+        }
+        &InstructionData::Store {
+            opcode: ref v1497,
+            args: ref v1498,
+            flags: v1499,
+            offset: v1500,
+        } => {
+            match v1497 {
+                &Opcode::Store => {
+                    let v1501 = C::unpack_value_array_2(ctx, v1498);
+                    let v1543 = C::def_inst(ctx, v1501.0);
+                    if let Some(v1544) = v1543 {
+                        let v1545 = C::first_result(ctx, v1544);
+                        if let Some(v1546) = v1545 {
+                            let v1548 = &C::inst_data(ctx, v1544);
+                            match v1548 {
+                                &InstructionData::Binary {
+                                    opcode: ref v1568,
+                                    args: ref v1569,
+                                } => {
+                                    match v1568 {
+                                        &Opcode::Iadd => {
+                                            let v1547 = C::value_type(ctx, v1546);
+                                            let v1566 = C::ty_32_or_64(ctx, v1547);
+                                            if let Some(v1567) = v1566 {
+                                                let v1570 = C::unpack_value_array_2(ctx, v1569);
+                                                let v1573 = &C::sinkable_load(ctx, v1570.0);
+                                                if let Some(v1574) = v1573 {
+                                                    let v1575 = C::def_inst(ctx, v1570.0);
+                                                    if let Some(v1576) = v1575 {
+                                                        let v1577 = &C::inst_data(ctx, v1576);
+                                                        if let &InstructionData::Load {
+                                                            opcode: ref v1578,
+                                                            arg: v1579,
+                                                            flags: v1580,
+                                                            offset: v1581,
+                                                        } = v1577
+                                                        {
+                                                            if let &Opcode::Load = v1578 {
+                                                                if v1499 == v1580 {
+                                                                    if v1500 == v1581 {
+                                                                        if v1501.1 == v1579 {
+                                                                            let v1582 = &constructor_sink_load_to_reg_mem_imm(ctx, v1574);
+                                                                            let v1583 = &constructor_to_amode(ctx, v1580, v1579, v1581);
+                                                                            let v1584 = constructor_put_in_gpr(ctx, v1570.1);
+                                                                            let v1585 = &constructor_x64_add_mem(ctx, v1567, v1583, v1584);
+                                                                            let v1586 = constructor_side_effect(ctx, v1585);
+                                                                            // Rule at src/isa/x64/lower.isle line 2995.
+                                                                            return Some(v1586);
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                                let v1587 = &C::sinkable_load(ctx, v1570.1);
+                                                if let Some(v1588) = v1587 {
+                                                    let v1589 = C::def_inst(ctx, v1570.1);
+                                                    if let Some(v1590) = v1589 {
+                                                        let v1591 = &C::inst_data(ctx, v1590);
+                                                        if let &InstructionData::Load {
+                                                            opcode: ref v1592,
+                                                            arg: v1593,
+                                                            flags: v1594,
+                                                            offset: v1595,
+                                                        } = v1591
+                                                        {
+                                                            if let &Opcode::Load = v1592 {
+                                                                if v1499 == v1594 {
+                                                                    if v1500 == v1595 {
+                                                                        if v1501.1 == v1593 {
+                                                                            let v1596 = &constructor_sink_load_to_reg_mem_imm(ctx, v1588);
+                                                                            let v1597 = &constructor_to_amode(ctx, v1594, v1593, v1595);
+                                                                            let v1598 = constructor_put_in_gpr(ctx, v1570.0);
+                                                                            let v1599 = &constructor_x64_add_mem(ctx, v1567, v1597, v1598);
+                                                                            let v1600 = constructor_side_effect(ctx, v1599);
+                                                                            // Rule at src/isa/x64/lower.isle line 3009.
+                                                                            return Some(v1600);
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                        &Opcode::Isub => {
+                                            let v1547 = C::value_type(ctx, v1546);
+                                            let v1566 = C::ty_32_or_64(ctx, v1547);
+                                            if let Some(v1567) = v1566 {
+                                                let v1570 = C::unpack_value_array_2(ctx, v1569);
+                                                let v1573 = &C::sinkable_load(ctx, v1570.0);
+                                                if let Some(v1574) = v1573 {
+                                                    let v1575 = C::def_inst(ctx, v1570.0);
+                                                    if let Some(v1576) = v1575 {
+                                                        let v1577 = &C::inst_data(ctx, v1576);
+                                                        if let &InstructionData::Load {
+                                                            opcode: ref v1578,
+                                                            arg: v1579,
+                                                            flags: v1580,
+                                                            offset: v1581,
+                                                        } = v1577
+                                                        {
+                                                            if let &Opcode::Load = v1578 {
+                                                                if v1499 == v1580 {
+                                                                    if v1500 == v1581 {
+                                                                        if v1501.1 == v1579 {
+                                                                            let v1582 = &constructor_sink_load_to_reg_mem_imm(ctx, v1574);
+                                                                            let v1583 = &constructor_to_amode(ctx, v1580, v1579, v1581);
+                                                                            let v1584 = constructor_put_in_gpr(ctx, v1570.1);
+                                                                            let v1601 = &constructor_x64_sub_mem(ctx, v1567, v1583, v1584);
+                                                                            let v1602 = constructor_side_effect(ctx, v1601);
+                                                                            // Rule at src/isa/x64/lower.isle line 3023.
+                                                                            return Some(v1602);
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                        &Opcode::Band => {
+                                            let v1547 = C::value_type(ctx, v1546);
+                                            let v1566 = C::ty_32_or_64(ctx, v1547);
+                                            if let Some(v1567) = v1566 {
+                                                let v1570 = C::unpack_value_array_2(ctx, v1569);
+                                                let v1573 = &C::sinkable_load(ctx, v1570.0);
+                                                if let Some(v1574) = v1573 {
+                                                    let v1575 = C::def_inst(ctx, v1570.0);
+                                                    if let Some(v1576) = v1575 {
+                                                        let v1577 = &C::inst_data(ctx, v1576);
+                                                        if let &InstructionData::Load {
+                                                            opcode: ref v1578,
+                                                            arg: v1579,
+                                                            flags: v1580,
+                                                            offset: v1581,
+                                                        } = v1577
+                                                        {
+                                                            if let &Opcode::Load = v1578 {
+                                                                if v1499 == v1580 {
+                                                                    if v1500 == v1581 {
+                                                                        if v1501.1 == v1579 {
+                                                                            let v1582 = &constructor_sink_load_to_reg_mem_imm(ctx, v1574);
+                                                                            let v1583 = &constructor_to_amode(ctx, v1580, v1579, v1581);
+                                                                            let v1584 = constructor_put_in_gpr(ctx, v1570.1);
+                                                                            let v1603 = &constructor_x64_and_mem(ctx, v1567, v1583, v1584);
+                                                                            let v1604 = constructor_side_effect(ctx, v1603);
+                                                                            // Rule at src/isa/x64/lower.isle line 3037.
+                                                                            return Some(v1604);
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                                let v1587 = &C::sinkable_load(ctx, v1570.1);
+                                                if let Some(v1588) = v1587 {
+                                                    let v1589 = C::def_inst(ctx, v1570.1);
+                                                    if let Some(v1590) = v1589 {
+                                                        let v1591 = &C::inst_data(ctx, v1590);
+                                                        if let &InstructionData::Load {
+                                                            opcode: ref v1592,
+                                                            arg: v1593,
+                                                            flags: v1594,
+                                                            offset: v1595,
+                                                        } = v1591
+                                                        {
+                                                            if let &Opcode::Load = v1592 {
+                                                                if v1499 == v1594 {
+                                                                    if v1500 == v1595 {
+                                                                        if v1501.1 == v1593 {
+                                                                            let v1596 = &constructor_sink_load_to_reg_mem_imm(ctx, v1588);
+                                                                            let v1597 = &constructor_to_amode(ctx, v1594, v1593, v1595);
+                                                                            let v1598 = constructor_put_in_gpr(ctx, v1570.0);
+                                                                            let v1605 = &constructor_x64_and_mem(ctx, v1567, v1597, v1598);
+                                                                            let v1606 = constructor_side_effect(ctx, v1605);
+                                                                            // Rule at src/isa/x64/lower.isle line 3051.
+                                                                            return Some(v1606);
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                        &Opcode::Bor => {
+                                            let v1547 = C::value_type(ctx, v1546);
+                                            let v1566 = C::ty_32_or_64(ctx, v1547);
+                                            if let Some(v1567) = v1566 {
+                                                let v1570 = C::unpack_value_array_2(ctx, v1569);
+                                                let v1573 = &C::sinkable_load(ctx, v1570.0);
+                                                if let Some(v1574) = v1573 {
+                                                    let v1575 = C::def_inst(ctx, v1570.0);
+                                                    if let Some(v1576) = v1575 {
+                                                        let v1577 = &C::inst_data(ctx, v1576);
+                                                        if let &InstructionData::Load {
+                                                            opcode: ref v1578,
+                                                            arg: v1579,
+                                                            flags: v1580,
+                                                            offset: v1581,
+                                                        } = v1577
+                                                        {
+                                                            if let &Opcode::Load = v1578 {
+                                                                if v1499 == v1580 {
+                                                                    if v1500 == v1581 {
+                                                                        if v1501.1 == v1579 {
+                                                                            let v1582 = &constructor_sink_load_to_reg_mem_imm(ctx, v1574);
+                                                                            let v1583 = &constructor_to_amode(ctx, v1580, v1579, v1581);
+                                                                            let v1584 = constructor_put_in_gpr(ctx, v1570.1);
+                                                                            let v1607 = &constructor_x64_or_mem(ctx, v1567, v1583, v1584);
+                                                                            let v1608 = constructor_side_effect(ctx, v1607);
+                                                                            // Rule at src/isa/x64/lower.isle line 3065.
+                                                                            return Some(v1608);
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                                let v1587 = &C::sinkable_load(ctx, v1570.1);
+                                                if let Some(v1588) = v1587 {
+                                                    let v1589 = C::def_inst(ctx, v1570.1);
+                                                    if let Some(v1590) = v1589 {
+                                                        let v1591 = &C::inst_data(ctx, v1590);
+                                                        if let &InstructionData::Load {
+                                                            opcode: ref v1592,
+                                                            arg: v1593,
+                                                            flags: v1594,
+                                                            offset: v1595,
+                                                        } = v1591
+                                                        {
+                                                            if let &Opcode::Load = v1592 {
+                                                                if v1499 == v1594 {
+                                                                    if v1500 == v1595 {
+                                                                        if v1501.1 == v1593 {
+                                                                            let v1596 = &constructor_sink_load_to_reg_mem_imm(ctx, v1588);
+                                                                            let v1597 = &constructor_to_amode(ctx, v1594, v1593, v1595);
+                                                                            let v1598 = constructor_put_in_gpr(ctx, v1570.0);
+                                                                            let v1609 = &constructor_x64_or_mem(ctx, v1567, v1597, v1598);
+                                                                            let v1610 = constructor_side_effect(ctx, v1609);
+                                                                            // Rule at src/isa/x64/lower.isle line 3079.
+                                                                            return Some(v1610);
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                        &Opcode::Bxor => {
+                                            let v1547 = C::value_type(ctx, v1546);
+                                            let v1566 = C::ty_32_or_64(ctx, v1547);
+                                            if let Some(v1567) = v1566 {
+                                                let v1570 = C::unpack_value_array_2(ctx, v1569);
+                                                let v1573 = &C::sinkable_load(ctx, v1570.0);
+                                                if let Some(v1574) = v1573 {
+                                                    let v1575 = C::def_inst(ctx, v1570.0);
+                                                    if let Some(v1576) = v1575 {
+                                                        let v1577 = &C::inst_data(ctx, v1576);
+                                                        if let &InstructionData::Load {
+                                                            opcode: ref v1578,
+                                                            arg: v1579,
+                                                            flags: v1580,
+                                                            offset: v1581,
+                                                        } = v1577
+                                                        {
+                                                            if let &Opcode::Load = v1578 {
+                                                                if v1499 == v1580 {
+                                                                    if v1500 == v1581 {
+                                                                        if v1501.1 == v1579 {
+                                                                            let v1582 = &constructor_sink_load_to_reg_mem_imm(ctx, v1574);
+                                                                            let v1583 = &constructor_to_amode(ctx, v1580, v1579, v1581);
+                                                                            let v1584 = constructor_put_in_gpr(ctx, v1570.1);
+                                                                            let v1611 = &constructor_x64_xor_mem(ctx, v1567, v1583, v1584);
+                                                                            let v1612 = constructor_side_effect(ctx, v1611);
+                                                                            // Rule at src/isa/x64/lower.isle line 3093.
+                                                                            return Some(v1612);
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                                let v1587 = &C::sinkable_load(ctx, v1570.1);
+                                                if let Some(v1588) = v1587 {
+                                                    let v1589 = C::def_inst(ctx, v1570.1);
+                                                    if let Some(v1590) = v1589 {
+                                                        let v1591 = &C::inst_data(ctx, v1590);
+                                                        if let &InstructionData::Load {
+                                                            opcode: ref v1592,
+                                                            arg: v1593,
+                                                            flags: v1594,
+                                                            offset: v1595,
+                                                        } = v1591
+                                                        {
+                                                            if let &Opcode::Load = v1592 {
+                                                                if v1499 == v1594 {
+                                                                    if v1500 == v1595 {
+                                                                        if v1501.1 == v1593 {
+                                                                            let v1596 = &constructor_sink_load_to_reg_mem_imm(ctx, v1588);
+                                                                            let v1597 = &constructor_to_amode(ctx, v1594, v1593, v1595);
+                                                                            let v1598 = constructor_put_in_gpr(ctx, v1570.0);
+                                                                            let v1613 = &constructor_x64_xor_mem(ctx, v1567, v1597, v1598);
+                                                                            let v1614 = constructor_side_effect(ctx, v1613);
+                                                                            // Rule at src/isa/x64/lower.isle line 3107.
+                                                                            return Some(v1614);
+                                                                        }
+                                                                    }
+                                                                }
+                                                            }
+                                                        }
+                                                    }
+                                                }
+                                            }
+                                        }
+                                        _ => {}
+                                    }
+                                }
+                                &InstructionData::BinaryImm8 {
+                                    opcode: ref v1549,
+                                    arg: v1550,
+                                    imm: v1551,
+                                } => {
+                                    if let &Opcode::Extractlane = v1549 {
+                                        let v1547 = C::value_type(ctx, v1546);
+                                        match v1547 {
+                                            I8 => {
+                                                let v436 = C::use_sse41(ctx);
+                                                if v436 == true {
+                                                    let v1508 = &constructor_to_amode(
+                                                        ctx, v1499, v1501.1, v1500,
+                                                    );
+                                                    let v1509 =
+                                                        &C::amode_to_synthetic_amode(ctx, v1508);
+                                                    let v1553 = constructor_put_in_xmm(ctx, v1550);
+                                                    let v1552 = C::u8_from_uimm8(ctx, v1551);
+                                                    let v1558 = &constructor_x64_pextrb_store(
+                                                        ctx, v1509, v1553, v1552,
+                                                    );
+                                                    let v1559 = constructor_side_effect(ctx, v1558);
+                                                    // Rule at src/isa/x64/lower.isle line 2963.
+                                                    return Some(v1559);
+                                                }
+                                            }
+                                            I16 => {
+                                                let v436 = C::use_sse41(ctx);
+                                                if v436 == true {
+                                                    let v1508 = &constructor_to_amode(
+                                                        ctx, v1499, v1501.1, v1500,
+                                                    );
+                                                    let v1509 =
+                                                        &C::amode_to_synthetic_amode(ctx, v1508);
+                                                    let v1553 = constructor_put_in_xmm(ctx, v1550);
+                                                    let v1552 = C::u8_from_uimm8(ctx, v1551);
+                                                    let v1560 = &constructor_x64_pextrw_store(
+                                                        ctx, v1509, v1553, v1552,
+                                                    );
+                                                    let v1561 = constructor_side_effect(ctx, v1560);
+                                                    // Rule at src/isa/x64/lower.isle line 2970.
+                                                    return Some(v1561);
+                                                }
+                                            }
+                                            I32 => {
+                                                let v436 = C::use_sse41(ctx);
+                                                if v436 == true {
+                                                    let v1508 = &constructor_to_amode(
+                                                        ctx, v1499, v1501.1, v1500,
+                                                    );
+                                                    let v1509 =
+                                                        &C::amode_to_synthetic_amode(ctx, v1508);
+                                                    let v1553 = constructor_put_in_xmm(ctx, v1550);
+                                                    let v1552 = C::u8_from_uimm8(ctx, v1551);
+                                                    let v1562 = &constructor_x64_pextrd_store(
+                                                        ctx, v1509, v1553, v1552,
+                                                    );
+                                                    let v1563 = constructor_side_effect(ctx, v1562);
+                                                    // Rule at src/isa/x64/lower.isle line 2977.
+                                                    return Some(v1563);
+                                                }
+                                            }
+                                            I64 => {
+                                                let v436 = C::use_sse41(ctx);
+                                                if v436 == true {
+                                                    let v1508 = &constructor_to_amode(
+                                                        ctx, v1499, v1501.1, v1500,
+                                                    );
+                                                    let v1509 =
+                                                        &C::amode_to_synthetic_amode(ctx, v1508);
+                                                    let v1553 = constructor_put_in_xmm(ctx, v1550);
+                                                    let v1552 = C::u8_from_uimm8(ctx, v1551);
+                                                    let v1564 = &constructor_x64_pextrq_store(
+                                                        ctx, v1509, v1553, v1552,
+                                                    );
+                                                    let v1565 = constructor_side_effect(ctx, v1564);
+                                                    // Rule at src/isa/x64/lower.isle line 2984.
+                                                    return Some(v1565);
+                                                }
+                                            }
+                                            F32 => {
+                                                let v1552 = C::u8_from_uimm8(ctx, v1551);
+                                                if v1552 == 0x0 {
+                                                    let v1508 = &constructor_to_amode(
+                                                        ctx, v1499, v1501.1, v1500,
+                                                    );
+                                                    let v1509 =
+                                                        &C::amode_to_synthetic_amode(ctx, v1508);
+                                                    let v1553 = constructor_put_in_xmm(ctx, v1550);
+                                                    let v1554 = &constructor_x64_movss_store(
+                                                        ctx, v1509, v1553,
+                                                    );
+                                                    let v1555 = constructor_side_effect(ctx, v1554);
+                                                    // Rule at src/isa/x64/lower.isle line 2951.
+                                                    return Some(v1555);
+                                                }
+                                            }
+                                            F64 => {
+                                                let v1552 = C::u8_from_uimm8(ctx, v1551);
+                                                if v1552 == 0x0 {
+                                                    let v1508 = &constructor_to_amode(
+                                                        ctx, v1499, v1501.1, v1500,
+                                                    );
+                                                    let v1509 =
+                                                        &C::amode_to_synthetic_amode(ctx, v1508);
+                                                    let v1553 = constructor_put_in_xmm(ctx, v1550);
+                                                    let v1556 = &constructor_x64_movsd_store(
+                                                        ctx, v1509, v1553,
+                                                    );
+                                                    let v1557 = constructor_side_effect(ctx, v1556);
+                                                    // Rule at src/isa/x64/lower.isle line 2957.
+                                                    return Some(v1557);
+                                                }
+                                            }
+                                            _ => {}
+                                        }
+                                    }
+                                }
+                                _ => {}
+                            }
+                        }
+                    }
+                    let v1504 = C::value_type(ctx, v1501.0);
+                    match v1504 {
+                        I128 => {
+                            let v1532 = C::put_in_regs(ctx, v1501.0);
+                            let v1533 = constructor_value_regs_get_gpr(ctx, v1532, 0x0);
+                            let v1534 = constructor_value_regs_get_gpr(ctx, v1532, 0x1);
+                            let v1535 = &constructor_to_amode(ctx, v1499, v1501.1, v1500);
+                            let v1536 = &C::amode_offset(ctx, v1535, 0x8);
+                            let v1537 = &C::amode_to_synthetic_amode(ctx, v1535);
+                            let v1538 = &constructor_x64_movrm(ctx, I64, v1537, v1533);
+                            let v1539 = &C::amode_to_synthetic_amode(ctx, v1536);
+                            let v1540 = &constructor_x64_movrm(ctx, I64, v1539, v1534);
+                            let v1541 = &constructor_side_effect_concat(ctx, v1538, v1540);
+                            let v1542 = constructor_side_effect(ctx, v1541);
+                            // Rule at src/isa/x64/lower.isle line 2932.
+                            return Some(v1542);
+                        }
+                        F32 => {
+                            let v1508 = &constructor_to_amode(ctx, v1499, v1501.1, v1500);
+                            let v1509 = &C::amode_to_synthetic_amode(ctx, v1508);
+                            let v1519 = constructor_put_in_xmm(ctx, v1501.0);
+                            let v1520 = &constructor_x64_movss_store(ctx, v1509, v1519);
+                            let v1521 = constructor_side_effect(ctx, v1520);
+                            // Rule at src/isa/x64/lower.isle line 2892.
+                            return Some(v1521);
+                        }
+                        F64 => {
+                            let v1508 = &constructor_to_amode(ctx, v1499, v1501.1, v1500);
+                            let v1509 = &C::amode_to_synthetic_amode(ctx, v1508);
+                            let v1519 = constructor_put_in_xmm(ctx, v1501.0);
+                            let v1522 = &constructor_x64_movsd_store(ctx, v1509, v1519);
+                            let v1523 = constructor_side_effect(ctx, v1522);
+                            // Rule at src/isa/x64/lower.isle line 2900.
+                            return Some(v1523);
+                        }
+                        F32X4 => {
+                            let v1508 = &constructor_to_amode(ctx, v1499, v1501.1, v1500);
+                            let v1509 = &C::amode_to_synthetic_amode(ctx, v1508);
+                            let v1519 = constructor_put_in_xmm(ctx, v1501.0);
+                            let v1524 = &constructor_x64_movups_store(ctx, v1509, v1519);
+                            let v1525 = constructor_side_effect(ctx, v1524);
+                            // Rule at src/isa/x64/lower.isle line 2908.
+                            return Some(v1525);
+                        }
+                        F64X2 => {
+                            let v1508 = &constructor_to_amode(ctx, v1499, v1501.1, v1500);
+                            let v1509 = &C::amode_to_synthetic_amode(ctx, v1508);
+                            let v1519 = constructor_put_in_xmm(ctx, v1501.0);
+                            let v1526 = &constructor_x64_movupd_store(ctx, v1509, v1519);
+                            let v1527 = constructor_side_effect(ctx, v1526);
+                            // Rule at src/isa/x64/lower.isle line 2916.
+                            return Some(v1527);
+                        }
+                        _ => {}
+                    }
+                    let v1528 = C::ty_vec128_int(ctx, v1504);
+                    if let Some(v1529) = v1528 {
+                        let v1508 = &constructor_to_amode(ctx, v1499, v1501.1, v1500);
+                        let v1509 = &C::amode_to_synthetic_amode(ctx, v1508);
+                        let v1519 = constructor_put_in_xmm(ctx, v1501.0);
+                        let v1530 = &constructor_x64_movdqu_store(ctx, v1509, v1519);
+                        let v1531 = constructor_side_effect(ctx, v1530);
+                        // Rule at src/isa/x64/lower.isle line 2924.
+                        return Some(v1531);
+                    }
+                    let v1505 = &C::type_register_class(ctx, v1504);
+                    if let Some(v1506) = v1505 {
+                        if let &RegisterClass::Gpr {
+                            single_register: v1507,
+                        } = v1506
+                        {
+                            let v1508 = &constructor_to_amode(ctx, v1499, v1501.1, v1500);
+                            let v1509 = &C::amode_to_synthetic_amode(ctx, v1508);
+                            let v1510 = constructor_put_in_gpr(ctx, v1501.0);
+                            let v1511 = &constructor_x64_movrm(ctx, v1504, v1509, v1510);
+                            let v1512 = constructor_side_effect(ctx, v1511);
+                            // Rule at src/isa/x64/lower.isle line 2873.
+                            return Some(v1512);
+                        }
+                    }
+                }
+                &Opcode::Istore8 => {
+                    let v1501 = C::unpack_value_array_2(ctx, v1498);
+                    let v1508 = &constructor_to_amode(ctx, v1499, v1501.1, v1500);
+                    let v1509 = &C::amode_to_synthetic_amode(ctx, v1508);
+                    let v1510 = constructor_put_in_gpr(ctx, v1501.0);
+                    let v1513 = &constructor_x64_movrm(ctx, I8, v1509, v1510);
+                    let v1514 = constructor_side_effect(ctx, v1513);
+                    // Rule at src/isa/x64/lower.isle line 2881.
+                    return Some(v1514);
+                }
+                &Opcode::Istore16 => {
+                    let v1501 = C::unpack_value_array_2(ctx, v1498);
+                    let v1508 = &constructor_to_amode(ctx, v1499, v1501.1, v1500);
+                    let v1509 = &C::amode_to_synthetic_amode(ctx, v1508);
+                    let v1510 = constructor_put_in_gpr(ctx, v1501.0);
+                    let v1515 = &constructor_x64_movrm(ctx, I16, v1509, v1510);
+                    let v1516 = constructor_side_effect(ctx, v1515);
+                    // Rule at src/isa/x64/lower.isle line 2884.
+                    return Some(v1516);
+                }
+                &Opcode::Istore32 => {
+                    let v1501 = C::unpack_value_array_2(ctx, v1498);
+                    let v1508 = &constructor_to_amode(ctx, v1499, v1501.1, v1500);
+                    let v1509 = &C::amode_to_synthetic_amode(ctx, v1508);
+                    let v1510 = constructor_put_in_gpr(ctx, v1501.0);
+                    let v1517 = &constructor_x64_movrm(ctx, I32, v1509, v1510);
+                    let v1518 = constructor_side_effect(ctx, v1517);
+                    // Rule at src/isa/x64/lower.isle line 2887.
+                    return Some(v1518);
+                }
+                _ => {}
+            }
+        }
+        &InstructionData::StoreNoOffset {
+            opcode: ref v1648,
+            args: ref v1649,
+            flags: v1650,
+        } => {
+            if let &Opcode::AtomicStore = v1648 {
+                let v1651 = C::unpack_value_array_2(ctx, v1649);
+                let v1654 = C::value_type(ctx, v1651.0);
+                let v1655 = C::fits_in_64(ctx, v1654);
+                if let Some(v1656) = v1655 {
+                    let v1657 = C::ty_int(ctx, v1654);
+                    if let Some(v1658) = v1657 {
+                        let v48 = C::zero_offset(ctx);
+                        let v1659 = &constructor_to_amode(ctx, v1650, v1651.1, v48);
+                        let v1660 = &C::amode_to_synthetic_amode(ctx, v1659);
+                        let v1661 = constructor_put_in_gpr(ctx, v1651.0);
+                        let v1662 = &constructor_x64_movrm(ctx, v1656, v1660, v1661);
+                        let v1663 = &constructor_x64_mfence(ctx);
+                        let v1664 = &constructor_side_effect_concat(ctx, v1662, v1663);
+                        let v1665 = constructor_side_effect(ctx, v1664);
+                        // Rule at src/isa/x64/lower.isle line 3154.
+                        return Some(v1665);
+                    }
+                }
+            }
+        }
+        &InstructionData::Ternary {
+            opcode: ref v630,
+            args: ref v631,
+        } => {
+            match v630 {
+                &Opcode::Select => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v632 = C::unpack_value_array_3(ctx, v631);
+                        let v949 = C::maybe_uextend(ctx, v632.0);
+                        if let Some(v950) = v949 {
+                            let v951 = C::def_inst(ctx, v950);
+                            if let Some(v952) = v951 {
+                                let v953 = &C::inst_data(ctx, v952);
+                                match v953 {
+                                    &InstructionData::FloatCompare {
+                                        opcode: ref v954,
+                                        args: ref v955,
+                                        cond: ref v956,
+                                    } => {
+                                        if let &Opcode::Fcmp = v954 {
+                                            if let &FloatCC::Equal = v956 {
+                                                let v957 = C::unpack_value_array_2(ctx, v955);
+                                                let v963 = &constructor_emit_fcmp(
+                                                    ctx,
+                                                    &FloatCC::NotEqual,
+                                                    v957.0,
+                                                    v957.1,
+                                                );
+                                                let v3 = C::value_type(ctx, v2);
+                                                let v964 = constructor_lower_select_fcmp(
+                                                    ctx, v3, v963, v632.2, v632.1,
+                                                );
+                                                // Rule at src/isa/x64/lower.isle line 1992.
+                                                return Some(v964);
+                                            }
+                                            let v957 = C::unpack_value_array_2(ctx, v955);
+                                            let v960 =
+                                                &constructor_emit_fcmp(ctx, v956, v957.0, v957.1);
+                                            let v3 = C::value_type(ctx, v2);
+                                            let v961 = constructor_lower_select_fcmp(
+                                                ctx, v3, v960, v632.1, v632.2,
+                                            );
+                                            // Rule at src/isa/x64/lower.isle line 1990.
+                                            return Some(v961);
+                                        }
+                                    }
+                                    &InstructionData::IntCompare {
+                                        opcode: ref v965,
+                                        args: ref v966,
+                                        cond: ref v967,
+                                    } => {
+                                        if let &Opcode::Icmp = v965 {
+                                            let v968 = C::unpack_value_array_2(ctx, v966);
+                                            let v971 = C::value_type(ctx, v968.0);
+                                            let v972 = C::fits_in_64(ctx, v971);
+                                            if let Some(v973) = v972 {
+                                                let v974 = &C::raw_operand_size_of_type(ctx, v973);
+                                                let v975 =
+                                                    &constructor_put_in_gpr_mem_imm(ctx, v968.1);
+                                                let v976 = constructor_put_in_gpr(ctx, v968.0);
+                                                let v977 =
+                                                    &constructor_x64_cmp(ctx, v974, v975, v976);
+                                                let v978 = &C::intcc_to_cc(ctx, v967);
+                                                let v3 = C::value_type(ctx, v2);
+                                                let v979 = &constructor_cmove_from_values(
+                                                    ctx, v3, v978, v632.1, v632.2,
+                                                );
+                                                let v980 = constructor_with_flags(ctx, v977, v979);
+                                                let v981 = C::output(ctx, v980);
+                                                // Rule at src/isa/x64/lower.isle line 2006.
+                                                return Some(v981);
+                                            }
+                                        }
+                                    }
+                                    _ => {}
+                                }
+                            }
+                        }
+                        let v982 = C::value_type(ctx, v632.0);
+                        let v983 = C::fits_in_64(ctx, v982);
+                        if let Some(v984) = v983 {
+                            let v985 = &C::raw_operand_size_of_type(ctx, v984);
+                            let v986 = constructor_put_in_gpr(ctx, v632.0);
+                            let v987 = &C::gpr_to_gpr_mem_imm(ctx, v986);
+                            let v988 = &constructor_x64_test(ctx, v985, v987, v986);
+                            let v3 = C::value_type(ctx, v2);
+                            let v990 =
+                                &constructor_cmove_from_values(ctx, v3, &CC::NZ, v632.1, v632.2);
+                            let v991 = constructor_with_flags(ctx, v988, v990);
+                            let v992 = C::output(ctx, v991);
+                            // Rule at src/isa/x64/lower.isle line 2013.
+                            return Some(v992);
+                        }
+                        if v982 == I128 {
+                            let v994 = C::put_in_regs(ctx, v632.0);
+                            let v995 = &constructor_cmp_zero_i128(ctx, &CC::Z, v994);
+                            let v996 = constructor_select_icmp(ctx, v995, v632.1, v632.2);
+                            let v997 = C::output(ctx, v996);
+                            // Rule at src/isa/x64/lower.isle line 2020.
+                            return Some(v997);
+                        }
+                    }
+                }
+                &Opcode::SelectSpectreGuard => {
+                    let v632 = C::unpack_value_array_3(ctx, v631);
+                    let v1721 = C::def_inst(ctx, v632.0);
+                    if let Some(v1722) = v1721 {
+                        let v1723 = &C::inst_data(ctx, v1722);
+                        if let &InstructionData::IntCompare {
+                            opcode: ref v1724,
+                            args: ref v1725,
+                            cond: ref v1726,
+                        } = v1723
+                        {
+                            if let &Opcode::Icmp = v1724 {
+                                let v1727 = C::unpack_value_array_2(ctx, v1725);
+                                let v1730 = &constructor_emit_cmp(ctx, v1726, v1727.0, v1727.1);
+                                let v1731 = constructor_select_icmp(ctx, v1730, v632.1, v632.2);
+                                let v1732 = C::output(ctx, v1731);
+                                // Rule at src/isa/x64/lower.isle line 3273.
+                                return Some(v1732);
+                            }
+                        }
+                    }
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v982 = C::value_type(ctx, v632.0);
+                        let v983 = C::fits_in_64(ctx, v982);
+                        if let Some(v984) = v983 {
+                            let v985 = &C::raw_operand_size_of_type(ctx, v984);
+                            let v986 = constructor_put_in_gpr(ctx, v632.0);
+                            let v987 = &C::gpr_to_gpr_mem_imm(ctx, v986);
+                            let v988 = &constructor_x64_test(ctx, v985, v987, v986);
+                            let v3 = C::value_type(ctx, v2);
+                            let v990 =
+                                &constructor_cmove_from_values(ctx, v3, &CC::NZ, v632.1, v632.2);
+                            let v991 = constructor_with_flags(ctx, v988, v990);
+                            let v992 = C::output(ctx, v991);
+                            // Rule at src/isa/x64/lower.isle line 3276.
+                            return Some(v992);
+                        }
+                        if v982 == I128 {
+                            let v994 = C::put_in_regs(ctx, v632.0);
+                            let v995 = &constructor_cmp_zero_i128(ctx, &CC::Z, v994);
+                            let v996 = constructor_select_icmp(ctx, v995, v632.1, v632.2);
+                            let v997 = C::output(ctx, v996);
+                            // Rule at src/isa/x64/lower.isle line 3281.
+                            return Some(v997);
+                        }
+                    }
+                }
+                &Opcode::Bitselect => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v64 = C::multi_lane(ctx, v3);
+                        if let Some(v65) = v64 {
+                            let v436 = C::use_sse41(ctx);
+                            if v436 == true {
+                                let v632 = C::unpack_value_array_3(ctx, v631);
+                                let v645 = constructor_all_ones_or_all_zeros(ctx, v632.0);
+                                if let Some(v646) = v645 {
+                                    let v636 = constructor_put_in_xmm(ctx, v632.0);
+                                    let v647 = &C::put_in_xmm_mem(ctx, v632.1);
+                                    let v648 = constructor_put_in_xmm(ctx, v632.2);
+                                    let v649 = constructor_x64_blend(ctx, v3, v636, v647, v648);
+                                    let v650 = constructor_output_xmm(ctx, v649);
+                                    // Rule at src/isa/x64/lower.isle line 1367.
+                                    return Some(v650);
+                                }
+                            }
+                            let v632 = C::unpack_value_array_3(ctx, v631);
+                            let v636 = constructor_put_in_xmm(ctx, v632.0);
+                            let v637 = constructor_put_in_xmm(ctx, v632.1);
+                            let v638 = &C::xmm_to_xmm_mem(ctx, v636);
+                            let v639 = constructor_sse_and(ctx, v3, v637, v638);
+                            let v640 = &C::put_in_xmm_mem(ctx, v632.2);
+                            let v641 = constructor_sse_and_not(ctx, v3, v636, v640);
+                            let v642 = &C::xmm_to_xmm_mem(ctx, v639);
+                            let v643 = constructor_sse_or(ctx, v3, v641, v642);
+                            let v644 = constructor_output_xmm(ctx, v643);
+                            // Rule at src/isa/x64/lower.isle line 1353.
+                            return Some(v644);
+                        }
+                    }
+                }
+                &Opcode::X86Blendv => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            I8X16 => {
+                                let v436 = C::use_sse41(ctx);
+                                if v436 == true {
+                                    let v632 = C::unpack_value_array_3(ctx, v631);
+                                    let v651 = constructor_put_in_xmm(ctx, v632.2);
+                                    let v647 = &C::put_in_xmm_mem(ctx, v632.1);
+                                    let v652 = constructor_put_in_xmm(ctx, v632.0);
+                                    let v653 = constructor_x64_pblendvb(ctx, v651, v647, v652);
+                                    let v654 = constructor_output_xmm(ctx, v653);
+                                    // Rule at src/isa/x64/lower.isle line 1388.
+                                    return Some(v654);
+                                }
+                            }
+                            I32X4 => {
+                                let v436 = C::use_sse41(ctx);
+                                if v436 == true {
+                                    let v632 = C::unpack_value_array_3(ctx, v631);
+                                    let v651 = constructor_put_in_xmm(ctx, v632.2);
+                                    let v647 = &C::put_in_xmm_mem(ctx, v632.1);
+                                    let v652 = constructor_put_in_xmm(ctx, v632.0);
+                                    let v655 = constructor_x64_blendvps(ctx, v651, v647, v652);
+                                    let v656 = constructor_output_xmm(ctx, v655);
+                                    // Rule at src/isa/x64/lower.isle line 1393.
+                                    return Some(v656);
+                                }
+                            }
+                            I64X2 => {
+                                let v436 = C::use_sse41(ctx);
+                                if v436 == true {
+                                    let v632 = C::unpack_value_array_3(ctx, v631);
+                                    let v651 = constructor_put_in_xmm(ctx, v632.2);
+                                    let v647 = &C::put_in_xmm_mem(ctx, v632.1);
+                                    let v652 = constructor_put_in_xmm(ctx, v632.0);
+                                    let v657 = constructor_x64_blendvpd(ctx, v651, v647, v652);
+                                    let v658 = constructor_output_xmm(ctx, v657);
+                                    // Rule at src/isa/x64/lower.isle line 1398.
+                                    return Some(v658);
+                                }
+                            }
+                            _ => {}
+                        }
+                    }
+                }
+                &Opcode::Fma => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v1416 = C::use_fma(ctx);
+                        if v1416 == true {
+                            let v3 = C::value_type(ctx, v2);
+                            let v632 = C::unpack_value_array_3(ctx, v631);
+                            let v1417 = constructor_fmadd(ctx, v3, v632.0, v632.1, v632.2);
+                            let v1418 = constructor_output_xmm(ctx, v1417);
+                            // Rule at src/isa/x64/lower.isle line 2752.
+                            return Some(v1418);
+                        }
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            F32 => {
+                                let v632 = C::unpack_value_array_3(ctx, v631);
+                                let v1336 = C::put_in_reg(ctx, v632.0);
+                                let v1337 = C::put_in_reg(ctx, v632.1);
+                                let v1338 = C::put_in_reg(ctx, v632.2);
+                                let v1339 =
+                                    C::libcall_3(ctx, &LibCall::FmaF32, v1336, v1337, v1338);
+                                let v1340 = constructor_output_reg(ctx, v1339);
+                                // Rule at src/isa/x64/lower.isle line 2707.
+                                return Some(v1340);
+                            }
+                            F64 => {
+                                let v632 = C::unpack_value_array_3(ctx, v631);
+                                let v1336 = C::put_in_reg(ctx, v632.0);
+                                let v1337 = C::put_in_reg(ctx, v632.1);
+                                let v1338 = C::put_in_reg(ctx, v632.2);
+                                let v1342 =
+                                    C::libcall_3(ctx, &LibCall::FmaF64, v1336, v1337, v1338);
+                                let v1343 = constructor_output_reg(ctx, v1342);
+                                // Rule at src/isa/x64/lower.isle line 2709.
+                                return Some(v1343);
+                            }
+                            F32X4 => {
+                                let v632 = C::unpack_value_array_3(ctx, v631);
+                                let v636 = constructor_put_in_xmm(ctx, v632.0);
+                                let v637 = constructor_put_in_xmm(ctx, v632.1);
+                                let v648 = constructor_put_in_xmm(ctx, v632.2);
+                                let v1344 = C::xmm_to_reg(ctx, v636);
+                                let v1345 = C::xmm_to_reg(ctx, v637);
+                                let v1346 = C::xmm_to_reg(ctx, v648);
+                                let v1347 =
+                                    C::libcall_3(ctx, &LibCall::FmaF32, v1344, v1345, v1346);
+                                let v1348 = C::xmm_new(ctx, v1347);
+                                let v1349 = &C::xmm_to_xmm_mem(ctx, v636);
+                                let v1351 = constructor_x64_pshufd(ctx, v1349, 0x1);
+                                let v1352 = C::xmm_to_reg(ctx, v1351);
+                                let v1353 = &C::xmm_to_xmm_mem(ctx, v637);
+                                let v1354 = constructor_x64_pshufd(ctx, v1353, 0x1);
+                                let v1355 = C::xmm_to_reg(ctx, v1354);
+                                let v1356 = &C::xmm_to_xmm_mem(ctx, v648);
+                                let v1357 = constructor_x64_pshufd(ctx, v1356, 0x1);
+                                let v1358 = C::xmm_to_reg(ctx, v1357);
+                                let v1359 =
+                                    C::libcall_3(ctx, &LibCall::FmaF32, v1352, v1355, v1358);
+                                let v1360 = C::xmm_new(ctx, v1359);
+                                let v1361 = &C::xmm_to_xmm_mem(ctx, v636);
+                                let v1363 = constructor_x64_pshufd(ctx, v1361, 0x2);
+                                let v1364 = C::xmm_to_reg(ctx, v1363);
+                                let v1365 = &C::xmm_to_xmm_mem(ctx, v637);
+                                let v1366 = constructor_x64_pshufd(ctx, v1365, 0x2);
+                                let v1367 = C::xmm_to_reg(ctx, v1366);
+                                let v1368 = &C::xmm_to_xmm_mem(ctx, v648);
+                                let v1369 = constructor_x64_pshufd(ctx, v1368, 0x2);
+                                let v1370 = C::xmm_to_reg(ctx, v1369);
+                                let v1371 =
+                                    C::libcall_3(ctx, &LibCall::FmaF32, v1364, v1367, v1370);
+                                let v1372 = C::xmm_new(ctx, v1371);
+                                let v1373 = &C::xmm_to_xmm_mem(ctx, v636);
+                                let v1375 = constructor_x64_pshufd(ctx, v1373, 0x3);
+                                let v1376 = C::xmm_to_reg(ctx, v1375);
+                                let v1377 = &C::xmm_to_xmm_mem(ctx, v637);
+                                let v1378 = constructor_x64_pshufd(ctx, v1377, 0x3);
+                                let v1379 = C::xmm_to_reg(ctx, v1378);
+                                let v1380 = &C::xmm_to_xmm_mem(ctx, v648);
+                                let v1381 = constructor_x64_pshufd(ctx, v1380, 0x3);
+                                let v1382 = C::xmm_to_reg(ctx, v1381);
+                                let v1383 =
+                                    C::libcall_3(ctx, &LibCall::FmaF32, v1376, v1379, v1382);
+                                let v1384 = C::xmm_new(ctx, v1383);
+                                let v1386 = C::xmm_to_reg(ctx, v1360);
+                                let v1387 = &constructor_xmm_to_reg_mem(ctx, v1386);
+                                let v1388 = &C::xmm_mem_to_reg_mem(ctx, v1387);
+                                let v1389 =
+                                    constructor_vec_insert_lane(ctx, F32X4, v1348, v1388, 0x1);
+                                let v1390 = C::xmm_to_reg(ctx, v1372);
+                                let v1391 = &constructor_xmm_to_reg_mem(ctx, v1390);
+                                let v1392 = &C::xmm_mem_to_reg_mem(ctx, v1391);
+                                let v1393 =
+                                    constructor_vec_insert_lane(ctx, F32X4, v1389, v1392, 0x2);
+                                let v1394 = C::xmm_to_reg(ctx, v1384);
+                                let v1395 = &constructor_xmm_to_reg_mem(ctx, v1394);
+                                let v1396 = &C::xmm_mem_to_reg_mem(ctx, v1395);
+                                let v1397 =
+                                    constructor_vec_insert_lane(ctx, F32X4, v1393, v1396, 0x3);
+                                let v1398 = constructor_output_xmm(ctx, v1397);
+                                // Rule at src/isa/x64/lower.isle line 2712.
+                                return Some(v1398);
+                            }
+                            F64X2 => {
+                                let v632 = C::unpack_value_array_3(ctx, v631);
+                                let v636 = constructor_put_in_xmm(ctx, v632.0);
+                                let v637 = constructor_put_in_xmm(ctx, v632.1);
+                                let v648 = constructor_put_in_xmm(ctx, v632.2);
+                                let v1344 = C::xmm_to_reg(ctx, v636);
+                                let v1345 = C::xmm_to_reg(ctx, v637);
+                                let v1346 = C::xmm_to_reg(ctx, v648);
+                                let v1399 =
+                                    C::libcall_3(ctx, &LibCall::FmaF64, v1344, v1345, v1346);
+                                let v1400 = C::xmm_new(ctx, v1399);
+                                let v1349 = &C::xmm_to_xmm_mem(ctx, v636);
+                                let v1402 = constructor_x64_pshufd(ctx, v1349, 0xEE);
+                                let v1403 = C::xmm_to_reg(ctx, v1402);
+                                let v1353 = &C::xmm_to_xmm_mem(ctx, v637);
+                                let v1404 = constructor_x64_pshufd(ctx, v1353, 0xEE);
+                                let v1405 = C::xmm_to_reg(ctx, v1404);
+                                let v1356 = &C::xmm_to_xmm_mem(ctx, v648);
+                                let v1406 = constructor_x64_pshufd(ctx, v1356, 0xEE);
+                                let v1407 = C::xmm_to_reg(ctx, v1406);
+                                let v1408 =
+                                    C::libcall_3(ctx, &LibCall::FmaF64, v1403, v1405, v1407);
+                                let v1409 = C::xmm_new(ctx, v1408);
+                                let v1411 = C::xmm_to_reg(ctx, v1409);
+                                let v1412 = &constructor_xmm_to_reg_mem(ctx, v1411);
+                                let v1413 = &C::xmm_mem_to_reg_mem(ctx, v1412);
+                                let v1414 =
+                                    constructor_vec_insert_lane(ctx, F64X2, v1400, v1413, 0x1);
+                                let v1415 = constructor_output_xmm(ctx, v1414);
+                                // Rule at src/isa/x64/lower.isle line 2736.
+                                return Some(v1415);
+                            }
+                            _ => {}
+                        }
+                    }
+                }
+                _ => {}
+            }
+        }
+        &InstructionData::TernaryImm8 {
+            opcode: ref v659,
+            args: ref v660,
+            imm: v661,
+        } => {
+            if let &Opcode::Insertlane = v659 {
+                let v662 = C::unpack_value_array_2(ctx, v660);
+                let v667 = constructor_put_in_xmm(ctx, v662.0);
+                let v668 = &C::put_in_reg_mem(ctx, v662.1);
+                let v665 = C::value_type(ctx, v662.0);
+                let v666 = C::u8_from_uimm8(ctx, v661);
+                let v669 = constructor_vec_insert_lane(ctx, v665, v667, v668, v666);
+                let v670 = constructor_output_xmm(ctx, v669);
+                // Rule at src/isa/x64/lower.isle line 1405.
+                return Some(v670);
+            }
+        }
+        &InstructionData::Trap {
+            opcode: ref v729,
+            code: ref v730,
+        } => {
+            match v729 {
+                &Opcode::Trap => {
+                    let v731 = &constructor_x64_ud2(ctx, v730);
+                    let v732 = constructor_side_effect(ctx, v731);
+                    // Rule at src/isa/x64/lower.isle line 1708.
+                    return Some(v732);
+                }
+                &Opcode::ResumableTrap => {
+                    let v731 = &constructor_x64_ud2(ctx, v730);
+                    let v732 = constructor_side_effect(ctx, v731);
+                    // Rule at src/isa/x64/lower.isle line 1735.
+                    return Some(v732);
+                }
+                _ => {}
+            }
+        }
+        &InstructionData::Unary {
+            opcode: ref v375,
+            arg: v376,
+        } => {
+            match v375 {
+                &Opcode::Splat => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v64 = C::multi_lane(ctx, v3);
+                        if let Some(v65) = v64 {
+                            match v65.0 {
+                                0x20 => {
+                                    if v65.1 == 0x4 {
+                                        let v2322 = &C::sinkable_load(ctx, v376);
+                                        if let Some(v2323) = v2322 {
+                                            let v2387 = C::use_avx(ctx);
+                                            if v2387 == true {
+                                                let v2388 =
+                                                    &constructor_sink_load_to_xmm_mem(ctx, v2323);
+                                                let v2389 =
+                                                    constructor_x64_vbroadcastss(ctx, v2388);
+                                                let v2390 = constructor_output_xmm(ctx, v2389);
+                                                // Rule at src/isa/x64/lower.isle line 4452.
+                                                return Some(v2390);
+                                            }
+                                            let v2326 = &C::sink_load(ctx, v2323);
+                                            let v2327 = constructor_x64_movss_load(ctx, v2326);
+                                            let v2384 = &C::xmm_to_xmm_mem(ctx, v2327);
+                                            let v2385 =
+                                                constructor_x64_shufps(ctx, v2327, v2384, 0x0);
+                                            let v2386 = constructor_output_xmm(ctx, v2385);
+                                            // Rule at src/isa/x64/lower.isle line 4449.
+                                            return Some(v2386);
+                                        }
+                                    }
+                                }
+                                0x40 => {
+                                    if v65.1 == 0x2 {
+                                        let v520 = C::use_ssse3(ctx);
+                                        if v520 == true {
+                                            let v2322 = &C::sinkable_load(ctx, v376);
+                                            if let Some(v2323) = v2322 {
+                                                let v2388 =
+                                                    &constructor_sink_load_to_xmm_mem(ctx, v2323);
+                                                let v2398 = constructor_x64_movddup(ctx, v2388);
+                                                let v2399 = constructor_output_xmm(ctx, v2398);
+                                                // Rule at src/isa/x64/lower.isle line 4463.
+                                                return Some(v2399);
+                                            }
+                                        }
+                                    }
+                                }
+                                _ => {}
+                            }
+                        }
+                        match v3 {
+                            I8X16 => {
+                                let v2351 = &C::sinkable_load_exact(ctx, v376);
+                                if let Some(v2352) = v2351 {
+                                    let v2347 = C::use_avx2(ctx);
+                                    if v2347 == true {
+                                        let v2358 = &constructor_sink_load_to_xmm_mem(ctx, v2352);
+                                        let v2359 = constructor_x64_vpbroadcastb(ctx, v2358);
+                                        let v2360 = constructor_output_xmm(ctx, v2359);
+                                        // Rule at src/isa/x64/lower.isle line 4400.
+                                        return Some(v2360);
+                                    }
+                                    let v436 = C::use_sse41(ctx);
+                                    if v436 == true {
+                                        let v520 = C::use_ssse3(ctx);
+                                        if v520 == true {
+                                            let v2353 = constructor_xmm_uninit_value(ctx);
+                                            let v2354 =
+                                                &constructor_sink_load_to_gpr_mem(ctx, v2352);
+                                            let v2355 =
+                                                constructor_x64_pinsrb(ctx, v2353, v2354, 0x0);
+                                            let v893 = constructor_xmm_zero(ctx, I8X16);
+                                            let v894 = &C::xmm_to_xmm_mem(ctx, v893);
+                                            let v2356 = constructor_x64_pshufb(ctx, v2355, v894);
+                                            let v2357 = constructor_output_xmm(ctx, v2356);
+                                            // Rule at src/isa/x64/lower.isle line 4396.
+                                            return Some(v2357);
+                                        }
+                                    }
+                                }
+                                let v2347 = C::use_avx2(ctx);
+                                if v2347 == true {
+                                    let v377 = constructor_put_in_gpr(ctx, v376);
+                                    let v2342 = constructor_bitcast_gpr_to_xmm(ctx, I32, v377);
+                                    let v2348 = &C::xmm_to_xmm_mem(ctx, v2342);
+                                    let v2349 = constructor_x64_vpbroadcastb(ctx, v2348);
+                                    let v2350 = constructor_output_xmm(ctx, v2349);
+                                    // Rule at src/isa/x64/lower.isle line 4393.
+                                    return Some(v2350);
+                                }
+                                let v520 = C::use_ssse3(ctx);
+                                if v520 == true {
+                                    let v377 = constructor_put_in_gpr(ctx, v376);
+                                    let v2342 = constructor_bitcast_gpr_to_xmm(ctx, I32, v377);
+                                    let v2343 = constructor_xmm_zero(ctx, I8X16);
+                                    let v2344 = &C::xmm_to_xmm_mem(ctx, v2343);
+                                    let v2345 = constructor_x64_pshufb(ctx, v2342, v2344);
+                                    let v2346 = constructor_output_xmm(ctx, v2345);
+                                    // Rule at src/isa/x64/lower.isle line 4390.
+                                    return Some(v2346);
+                                }
+                                let v1740 = &constructor_put_in_gpr_mem(ctx, v376);
+                                let v2333 = constructor_x64_movd_to_xmm(ctx, v1740);
+                                let v2334 = &C::xmm_to_xmm_mem(ctx, v2333);
+                                let v2335 = constructor_x64_punpcklbw(ctx, v2333, v2334);
+                                let v2336 = &C::xmm_to_xmm_mem(ctx, v2335);
+                                let v2338 = constructor_x64_pshuflw(ctx, v2336, 0x0);
+                                let v2339 = &C::xmm_to_xmm_mem(ctx, v2338);
+                                let v2340 = constructor_x64_pshufd(ctx, v2339, 0x0);
+                                let v2341 = constructor_output_xmm(ctx, v2340);
+                                // Rule at src/isa/x64/lower.isle line 4387.
+                                return Some(v2341);
+                            }
+                            I16X8 => {
+                                let v2351 = &C::sinkable_load_exact(ctx, v376);
+                                if let Some(v2352) = v2351 {
+                                    let v2347 = C::use_avx2(ctx);
+                                    if v2347 == true {
+                                        let v2358 = &constructor_sink_load_to_xmm_mem(ctx, v2352);
+                                        let v2373 = constructor_x64_vpbroadcastw(ctx, v2358);
+                                        let v2374 = constructor_output_xmm(ctx, v2373);
+                                        // Rule at src/isa/x64/lower.isle line 4416.
+                                        return Some(v2374);
+                                    }
+                                    let v2353 = constructor_xmm_uninit_value(ctx);
+                                    let v2354 = &constructor_sink_load_to_gpr_mem(ctx, v2352);
+                                    let v2367 = constructor_x64_pinsrw(ctx, v2353, v2354, 0x0);
+                                    let v2368 = &C::xmm_to_xmm_mem(ctx, v2367);
+                                    let v2369 = constructor_x64_pshuflw(ctx, v2368, 0x0);
+                                    let v2370 = &C::xmm_to_xmm_mem(ctx, v2369);
+                                    let v2371 = constructor_x64_pshufd(ctx, v2370, 0x0);
+                                    let v2372 = constructor_output_xmm(ctx, v2371);
+                                    // Rule at src/isa/x64/lower.isle line 4414.
+                                    return Some(v2372);
+                                }
+                                let v2347 = C::use_avx2(ctx);
+                                if v2347 == true {
+                                    let v377 = constructor_put_in_gpr(ctx, v376);
+                                    let v2342 = constructor_bitcast_gpr_to_xmm(ctx, I32, v377);
+                                    let v2348 = &C::xmm_to_xmm_mem(ctx, v2342);
+                                    let v2365 = constructor_x64_vpbroadcastw(ctx, v2348);
+                                    let v2366 = constructor_output_xmm(ctx, v2365);
+                                    // Rule at src/isa/x64/lower.isle line 4411.
+                                    return Some(v2366);
+                                }
+                                let v377 = constructor_put_in_gpr(ctx, v376);
+                                let v2342 = constructor_bitcast_gpr_to_xmm(ctx, I32, v377);
+                                let v2348 = &C::xmm_to_xmm_mem(ctx, v2342);
+                                let v2361 = constructor_x64_pshuflw(ctx, v2348, 0x0);
+                                let v2362 = &C::xmm_to_xmm_mem(ctx, v2361);
+                                let v2363 = constructor_x64_pshufd(ctx, v2362, 0x0);
+                                let v2364 = constructor_output_xmm(ctx, v2363);
+                                // Rule at src/isa/x64/lower.isle line 4409.
+                                return Some(v2364);
+                            }
+                            I32X4 => {
+                                let v2347 = C::use_avx2(ctx);
+                                if v2347 == true {
+                                    let v377 = constructor_put_in_gpr(ctx, v376);
+                                    let v2342 = constructor_bitcast_gpr_to_xmm(ctx, I32, v377);
+                                    let v2348 = &C::xmm_to_xmm_mem(ctx, v2342);
+                                    let v2377 = constructor_x64_vpbroadcastd(ctx, v2348);
+                                    let v2378 = constructor_output_xmm(ctx, v2377);
+                                    // Rule at src/isa/x64/lower.isle line 4426.
+                                    return Some(v2378);
+                                }
+                                let v377 = constructor_put_in_gpr(ctx, v376);
+                                let v2342 = constructor_bitcast_gpr_to_xmm(ctx, I32, v377);
+                                let v2348 = &C::xmm_to_xmm_mem(ctx, v2342);
+                                let v2375 = constructor_x64_pshufd(ctx, v2348, 0x0);
+                                let v2376 = constructor_output_xmm(ctx, v2375);
+                                // Rule at src/isa/x64/lower.isle line 4424.
+                                return Some(v2376);
+                            }
+                            I64X2 => {
+                                let v377 = constructor_put_in_gpr(ctx, v376);
+                                let v2391 = constructor_bitcast_gpr_to_xmm(ctx, I64, v377);
+                                let v2392 = &C::xmm_to_xmm_mem(ctx, v2391);
+                                let v2394 = constructor_x64_pshufd(ctx, v2392, 0x44);
+                                let v2395 = constructor_output_xmm(ctx, v2394);
+                                // Rule at src/isa/x64/lower.isle line 4459.
+                                return Some(v2395);
+                            }
+                            F32X4 => {
+                                let v2347 = C::use_avx2(ctx);
+                                if v2347 == true {
+                                    let v521 = &C::put_in_xmm_mem(ctx, v376);
+                                    let v2382 = constructor_x64_vbroadcastss(ctx, v521);
+                                    let v2383 = constructor_output_xmm(ctx, v2382);
+                                    // Rule at src/isa/x64/lower.isle line 4436.
+                                    return Some(v2383);
+                                }
+                                let v524 = constructor_put_in_xmm(ctx, v376);
+                                let v2379 = constructor_put_in_xmm(ctx, v376);
+                                let v392 = &C::put_in_xmm_mem(ctx, v376);
+                                let v2380 = constructor_x64_shufps(ctx, v2379, v392, 0x0);
+                                let v2381 = constructor_output_xmm(ctx, v2380);
+                                // Rule at src/isa/x64/lower.isle line 4433.
+                                return Some(v2381);
+                            }
+                            F64X2 => {
+                                let v521 = &C::put_in_xmm_mem(ctx, v376);
+                                let v2396 = constructor_x64_pshufd(ctx, v521, 0x44);
+                                let v2397 = constructor_output_xmm(ctx, v2396);
+                                // Rule at src/isa/x64/lower.isle line 4461.
+                                return Some(v2397);
+                            }
+                            _ => {}
+                        }
+                    }
+                }
+                &Opcode::SetPinnedReg => {
+                    let v377 = constructor_put_in_gpr(ctx, v376);
+                    let v2160 = &constructor_write_pinned_gpr(ctx, v377);
+                    let v2161 = constructor_side_effect(ctx, v2160);
+                    // Rule at src/isa/x64/lower.isle line 4108.
+                    return Some(v2161);
+                }
+                &Opcode::VanyTrue => {
+                    let v436 = C::use_sse41(ctx);
+                    if v436 == true {
+                        let v524 = constructor_put_in_xmm(ctx, v376);
+                        let v1242 = &C::xmm_to_xmm_mem(ctx, v524);
+                        let v2400 = &constructor_x64_ptest(ctx, v1242, v524);
+                        let v2401 = &constructor_x64_setcc(ctx, &CC::NZ);
+                        let v2402 = constructor_with_flags(ctx, v2400, v2401);
+                        let v2403 = C::output(ctx, v2402);
+                        // Rule at src/isa/x64/lower.isle line 4469.
+                        return Some(v2403);
+                    }
+                    let v524 = constructor_put_in_xmm(ctx, v376);
+                    let v525 = constructor_xmm_zero(ctx, I8X16);
+                    let v1993 = &C::xmm_to_xmm_mem(ctx, v525);
+                    let v2404 = constructor_x64_pcmpeqb(ctx, v524, v1993);
+                    let v2406 = constructor_x64_pmovmskb(ctx, &OperandSize::Size32, v2404);
+                    let v2408 = RegMemImm::Imm { simm32: 0xFFFF };
+                    let v2409 = &C::gpr_mem_imm_new(ctx, &v2408);
+                    let v2410 = &constructor_x64_cmp(ctx, &OperandSize::Size32, v2409, v2406);
+                    let v2411 = &constructor_x64_setcc(ctx, &CC::NZ);
+                    let v2412 = constructor_with_flags(ctx, v2410, v2411);
+                    let v2413 = C::output(ctx, v2412);
+                    // Rule at src/isa/x64/lower.isle line 4478.
+                    return Some(v2413);
+                }
+                &Opcode::VallTrue => {
+                    let v436 = C::use_sse41(ctx);
+                    if v436 == true {
+                        let v524 = constructor_put_in_xmm(ctx, v376);
+                        let v618 = C::value_type(ctx, v376);
+                        let v2414 = constructor_xmm_zero(ctx, v618);
+                        let v2415 = constructor_vec_int_type(ctx, v618);
+                        let v2416 = &C::xmm_to_xmm_mem(ctx, v2414);
+                        let v2417 = constructor_x64_pcmpeq(ctx, v2415, v524, v2416);
+                        let v2418 = &C::xmm_to_xmm_mem(ctx, v2417);
+                        let v2419 = &constructor_x64_ptest(ctx, v2418, v2417);
+                        let v2420 = &constructor_x64_setcc(ctx, &CC::Z);
+                        let v2421 = constructor_with_flags(ctx, v2419, v2420);
+                        let v2422 = C::output(ctx, v2421);
+                        // Rule at src/isa/x64/lower.isle line 4488.
+                        return Some(v2422);
+                    }
+                    let v618 = C::value_type(ctx, v376);
+                    let v2423 = constructor_vec_int_type(ctx, v618);
+                    let v2379 = constructor_put_in_xmm(ctx, v376);
+                    let v2424 = constructor_xmm_zero(ctx, v618);
+                    let v2425 = &C::xmm_to_xmm_mem(ctx, v2424);
+                    let v2426 = constructor_x64_pcmpeq(ctx, v2423, v2379, v2425);
+                    let v2427 = constructor_x64_pmovmskb(ctx, &OperandSize::Size32, v2426);
+                    let v2428 = &C::gpr_to_gpr_mem_imm(ctx, v2427);
+                    let v2429 = &constructor_x64_test(ctx, &OperandSize::Size32, v2428, v2427);
+                    let v2430 = &constructor_x64_setcc(ctx, &CC::Z);
+                    let v2431 = constructor_with_flags(ctx, v2429, v2430);
+                    let v2432 = C::output(ctx, v2431);
+                    // Rule at src/isa/x64/lower.isle line 4498.
+                    return Some(v2432);
+                }
+                &Opcode::VhighBits => {
+                    let v618 = C::value_type(ctx, v376);
+                    let v2433 = C::multi_lane(ctx, v618);
+                    if let Some(v2434) = v2433 {
+                        match v2434.0 {
+                            0x8 => {
+                                if v2434.1 == 0x10 {
+                                    let v524 = constructor_put_in_xmm(ctx, v376);
+                                    let v2437 =
+                                        constructor_x64_pmovmskb(ctx, &OperandSize::Size32, v524);
+                                    let v2438 = constructor_output_gpr(ctx, v2437);
+                                    // Rule at src/isa/x64/lower.isle line 4515.
+                                    return Some(v2438);
+                                }
+                            }
+                            0x10 => {
+                                if v2434.1 == 0x8 {
+                                    let v524 = constructor_put_in_xmm(ctx, v376);
+                                    let v1242 = &C::xmm_to_xmm_mem(ctx, v524);
+                                    let v2443 = constructor_x64_packsswb(ctx, v524, v1242);
+                                    let v2444 =
+                                        constructor_x64_pmovmskb(ctx, &OperandSize::Size32, v2443);
+                                    let v1135 = Imm8Reg::Imm8 { imm: 0x8 };
+                                    let v2112 = &C::imm8_reg_to_imm8_gpr(ctx, &v1135);
+                                    let v2445 = constructor_x64_shr(ctx, I64, v2444, v2112);
+                                    let v2446 = constructor_output_gpr(ctx, v2445);
+                                    // Rule at src/isa/x64/lower.isle line 4530.
+                                    return Some(v2446);
+                                }
+                            }
+                            0x20 => {
+                                if v2434.1 == 0x4 {
+                                    let v524 = constructor_put_in_xmm(ctx, v376);
+                                    let v2439 =
+                                        constructor_x64_movmskps(ctx, &OperandSize::Size32, v524);
+                                    let v2440 = constructor_output_gpr(ctx, v2439);
+                                    // Rule at src/isa/x64/lower.isle line 4518.
+                                    return Some(v2440);
+                                }
+                            }
+                            0x40 => {
+                                if v2434.1 == 0x2 {
+                                    let v524 = constructor_put_in_xmm(ctx, v376);
+                                    let v2441 =
+                                        constructor_x64_movmskpd(ctx, &OperandSize::Size32, v524);
+                                    let v2442 = constructor_output_gpr(ctx, v2441);
+                                    // Rule at src/isa/x64/lower.isle line 4521.
+                                    return Some(v2442);
+                                }
+                            }
+                            _ => {}
+                        }
+                    }
+                }
+                &Opcode::Ineg => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            I8X16 => {
+                                let v390 = constructor_imm(ctx, I8X16, 0x0);
+                                let v391 = C::xmm_new(ctx, v390);
+                                let v392 = &C::put_in_xmm_mem(ctx, v376);
+                                let v393 = constructor_x64_psubb(ctx, v391, v392);
+                                let v394 = constructor_output_xmm(ctx, v393);
+                                // Rule at src/isa/x64/lower.isle line 915.
+                                return Some(v394);
+                            }
+                            I16X8 => {
+                                let v396 = constructor_imm(ctx, I16X8, 0x0);
+                                let v397 = C::xmm_new(ctx, v396);
+                                let v392 = &C::put_in_xmm_mem(ctx, v376);
+                                let v398 = constructor_x64_psubw(ctx, v397, v392);
+                                let v399 = constructor_output_xmm(ctx, v398);
+                                // Rule at src/isa/x64/lower.isle line 918.
+                                return Some(v399);
+                            }
+                            I32X4 => {
+                                let v401 = constructor_imm(ctx, I32X4, 0x0);
+                                let v402 = C::xmm_new(ctx, v401);
+                                let v392 = &C::put_in_xmm_mem(ctx, v376);
+                                let v403 = constructor_x64_psubd(ctx, v402, v392);
+                                let v404 = constructor_output_xmm(ctx, v403);
+                                // Rule at src/isa/x64/lower.isle line 921.
+                                return Some(v404);
+                            }
+                            I64X2 => {
+                                let v406 = constructor_imm(ctx, I64X2, 0x0);
+                                let v407 = C::xmm_new(ctx, v406);
+                                let v392 = &C::put_in_xmm_mem(ctx, v376);
+                                let v408 = constructor_x64_psubq(ctx, v407, v392);
+                                let v409 = constructor_output_xmm(ctx, v408);
+                                // Rule at src/isa/x64/lower.isle line 924.
+                                return Some(v409);
+                            }
+                            _ => {}
+                        }
+                        let v4 = C::fits_in_64(ctx, v3);
+                        if let Some(v5) = v4 {
+                            let v377 = constructor_put_in_gpr(ctx, v376);
+                            let v378 = constructor_x64_neg(ctx, v5, v377);
+                            let v379 = constructor_output_gpr(ctx, v378);
+                            // Rule at src/isa/x64/lower.isle line 901.
+                            return Some(v379);
+                        }
+                        if v3 == I128 {
+                            let v380 = C::put_in_regs(ctx, v376);
+                            let v381 = constructor_value_regs_get_gpr(ctx, v380, 0x0);
+                            let v382 = constructor_value_regs_get_gpr(ctx, v380, 0x1);
+                            let v383 = &constructor_x64_neg_paired(ctx, I64, v381);
+                            let v384 = constructor_imm(ctx, I64, 0x0);
+                            let v385 = C::gpr_new(ctx, v384);
+                            let v386 = &C::gpr_to_gpr_mem_imm(ctx, v382);
+                            let v387 = &constructor_x64_sbb_paired(ctx, I64, v385, v386);
+                            let v388 = constructor_with_flags(ctx, v383, v387);
+                            let v389 = C::output(ctx, v388);
+                            // Rule at src/isa/x64/lower.isle line 904.
+                            return Some(v389);
+                        }
+                    }
+                }
+                &Opcode::Iabs => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            I8X16 => {
+                                let v520 = C::use_ssse3(ctx);
+                                if v520 == true {
+                                    let v521 = &C::put_in_xmm_mem(ctx, v376);
+                                    let v522 = constructor_x64_pabsb(ctx, v521);
+                                    let v523 = constructor_output_xmm(ctx, v522);
+                                    // Rule at src/isa/x64/lower.isle line 1158.
+                                    return Some(v523);
+                                }
+                                let v524 = constructor_put_in_xmm(ctx, v376);
+                                let v525 = constructor_xmm_zero(ctx, I8X16);
+                                let v526 = &C::xmm_to_xmm_mem(ctx, v524);
+                                let v527 = constructor_x64_psubb(ctx, v525, v526);
+                                let v528 = &C::xmm_to_xmm_mem(ctx, v527);
+                                let v529 = constructor_x64_pminub(ctx, v524, v528);
+                                let v530 = constructor_output_xmm(ctx, v529);
+                                // Rule at src/isa/x64/lower.isle line 1165.
+                                return Some(v530);
+                            }
+                            I16X8 => {
+                                let v520 = C::use_ssse3(ctx);
+                                if v520 == true {
+                                    let v521 = &C::put_in_xmm_mem(ctx, v376);
+                                    let v531 = constructor_x64_pabsw(ctx, v521);
+                                    let v532 = constructor_output_xmm(ctx, v531);
+                                    // Rule at src/isa/x64/lower.isle line 1172.
+                                    return Some(v532);
+                                }
+                                let v524 = constructor_put_in_xmm(ctx, v376);
+                                let v533 = constructor_xmm_zero(ctx, I16X8);
+                                let v526 = &C::xmm_to_xmm_mem(ctx, v524);
+                                let v534 = constructor_x64_psubw(ctx, v533, v526);
+                                let v535 = &C::xmm_to_xmm_mem(ctx, v534);
+                                let v536 = constructor_x64_pmaxsw(ctx, v524, v535);
+                                let v537 = constructor_output_xmm(ctx, v536);
+                                // Rule at src/isa/x64/lower.isle line 1176.
+                                return Some(v537);
+                            }
+                            I32X4 => {
+                                let v520 = C::use_ssse3(ctx);
+                                if v520 == true {
+                                    let v521 = &C::put_in_xmm_mem(ctx, v376);
+                                    let v538 = constructor_x64_pabsd(ctx, v521);
+                                    let v539 = constructor_output_xmm(ctx, v538);
+                                    // Rule at src/isa/x64/lower.isle line 1183.
+                                    return Some(v539);
+                                }
+                                let v524 = constructor_put_in_xmm(ctx, v376);
+                                let v541 = &C::xmi_imm(ctx, 0x1F);
+                                let v542 = constructor_x64_psrad(ctx, v524, v541);
+                                let v543 = &C::xmm_to_xmm_mem(ctx, v542);
+                                let v544 = constructor_x64_pxor(ctx, v524, v543);
+                                let v545 = &C::xmm_to_xmm_mem(ctx, v542);
+                                let v546 = constructor_x64_psubd(ctx, v544, v545);
+                                let v547 = constructor_output_xmm(ctx, v546);
+                                // Rule at src/isa/x64/lower.isle line 1193.
+                                return Some(v547);
+                            }
+                            I64X2 => {
+                                let v328 = C::use_avx512vl(ctx);
+                                if v328 == true {
+                                    let v329 = C::use_avx512f(ctx);
+                                    if v329 == true {
+                                        let v521 = &C::put_in_xmm_mem(ctx, v376);
+                                        let v548 = constructor_x64_vpabsq(ctx, v521);
+                                        let v549 = constructor_output_xmm(ctx, v548);
+                                        // Rule at src/isa/x64/lower.isle line 1202.
+                                        return Some(v549);
+                                    }
+                                }
+                                let v436 = C::use_sse41(ctx);
+                                if v436 == true {
+                                    let v524 = constructor_put_in_xmm(ctx, v376);
+                                    let v550 = constructor_imm(ctx, I64X2, 0x0);
+                                    let v551 = C::xmm_new(ctx, v550);
+                                    let v552 = &C::xmm_to_xmm_mem(ctx, v524);
+                                    let v553 = constructor_x64_psubq(ctx, v551, v552);
+                                    let v554 = &C::xmm_to_xmm_mem(ctx, v524);
+                                    let v555 = constructor_x64_blendvpd(ctx, v553, v554, v553);
+                                    let v556 = constructor_output_xmm(ctx, v555);
+                                    // Rule at src/isa/x64/lower.isle line 1211.
+                                    return Some(v556);
+                                }
+                                let v524 = constructor_put_in_xmm(ctx, v376);
+                                let v557 = RegMemImm::Imm { simm32: 0x1F };
+                                let v558 = &C::xmm_mem_imm_new(ctx, &v557);
+                                let v559 = constructor_x64_psrad(ctx, v524, v558);
+                                let v560 = &C::xmm_to_xmm_mem(ctx, v559);
+                                let v562 = constructor_x64_pshufd(ctx, v560, 0xF5);
+                                let v563 = &C::xmm_to_xmm_mem(ctx, v562);
+                                let v564 = constructor_x64_pxor(ctx, v524, v563);
+                                let v565 = &C::xmm_to_xmm_mem(ctx, v562);
+                                let v566 = constructor_x64_psubq(ctx, v564, v565);
+                                let v567 = constructor_output_xmm(ctx, v566);
+                                // Rule at src/isa/x64/lower.isle line 1220.
+                                return Some(v567);
+                            }
+                            _ => {}
+                        }
+                        let v4 = C::fits_in_64(ctx, v3);
+                        if let Some(v5) = v4 {
+                            let v377 = constructor_put_in_gpr(ctx, v376);
+                            let v568 = &constructor_x64_neg_paired(ctx, v5, v377);
+                            let v569 = constructor_produces_flags_get_reg(ctx, v568);
+                            let v570 = C::gpr_new(ctx, v569);
+                            let v572 = &C::gpr_to_gpr_mem(ctx, v377);
+                            let v573 = &constructor_cmove(ctx, v5, &CC::S, v572, v570);
+                            let v574 = &constructor_produces_flags_ignore(ctx, v568);
+                            let v575 = constructor_with_flags_reg(ctx, v574, v573);
+                            let v576 = constructor_output_reg(ctx, v575);
+                            // Rule at src/isa/x64/lower.isle line 1229.
+                            return Some(v576);
+                        }
+                    }
+                }
+                &Opcode::Bnot => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        if v3 == I128 {
+                            let v623 = constructor_i128_not(ctx, v376);
+                            let v624 = C::output(ctx, v623);
+                            // Rule at src/isa/x64/lower.isle line 1338.
+                            return Some(v624);
+                        }
+                        let v64 = C::multi_lane(ctx, v3);
+                        if let Some(v65) = v64 {
+                            let v524 = constructor_put_in_xmm(ctx, v376);
+                            let v587 = constructor_vector_all_ones(ctx);
+                            let v625 = &C::xmm_to_xmm_mem(ctx, v587);
+                            let v628 = constructor_x64_xor_vector(ctx, v3, v524, v625);
+                            let v629 = constructor_output_xmm(ctx, v628);
+                            // Rule at src/isa/x64/lower.isle line 1348.
+                            return Some(v629);
+                        }
+                        let v152 = C::ty_int_ref_scalar_64(ctx, v3);
+                        if let Some(v153) = v152 {
+                            let v377 = constructor_put_in_gpr(ctx, v376);
+                            let v621 = constructor_x64_not(ctx, v3, v377);
+                            let v622 = constructor_output_gpr(ctx, v621);
+                            // Rule at src/isa/x64/lower.isle line 1323.
+                            return Some(v622);
+                        }
+                        let v162 = C::ty_scalar_float(ctx, v3);
+                        if let Some(v163) = v162 {
+                            let v524 = constructor_put_in_xmm(ctx, v376);
+                            let v587 = constructor_vector_all_ones(ctx);
+                            let v625 = &C::xmm_to_xmm_mem(ctx, v587);
+                            let v626 = constructor_x64_xor_vector(ctx, v163, v524, v625);
+                            let v627 = constructor_output_xmm(ctx, v626);
+                            // Rule at src/isa/x64/lower.isle line 1343.
+                            return Some(v627);
+                        }
+                    }
+                }
+                &Opcode::Bitrev => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            I8 => {
+                                let v377 = constructor_put_in_gpr(ctx, v376);
+                                let v1118 = constructor_do_bitrev8(ctx, I32, v377);
+                                let v1119 = constructor_output_gpr(ctx, v1118);
+                                // Rule at src/isa/x64/lower.isle line 2251.
+                                return Some(v1119);
+                            }
+                            I16 => {
+                                let v377 = constructor_put_in_gpr(ctx, v376);
+                                let v1120 = constructor_do_bitrev16(ctx, I32, v377);
+                                let v1121 = constructor_output_gpr(ctx, v1120);
+                                // Rule at src/isa/x64/lower.isle line 2254.
+                                return Some(v1121);
+                            }
+                            I32 => {
+                                let v377 = constructor_put_in_gpr(ctx, v376);
+                                let v1122 = constructor_do_bitrev32(ctx, I32, v377);
+                                let v1123 = constructor_output_gpr(ctx, v1122);
+                                // Rule at src/isa/x64/lower.isle line 2257.
+                                return Some(v1123);
+                            }
+                            I64 => {
+                                let v377 = constructor_put_in_gpr(ctx, v376);
+                                let v1124 = constructor_do_bitrev64(ctx, I64, v377);
+                                let v1125 = constructor_output_gpr(ctx, v1124);
+                                // Rule at src/isa/x64/lower.isle line 2260.
+                                return Some(v1125);
+                            }
+                            I128 => {
+                                let v380 = C::put_in_regs(ctx, v376);
+                                let v1008 = constructor_value_regs_get_gpr(ctx, v380, 0x1);
+                                let v1126 = constructor_do_bitrev64(ctx, I64, v1008);
+                                let v1127 = C::gpr_to_reg(ctx, v1126);
+                                let v1128 = C::put_in_regs(ctx, v376);
+                                let v1129 = constructor_value_regs_get_gpr(ctx, v1128, 0x0);
+                                let v1130 = constructor_do_bitrev64(ctx, I64, v1129);
+                                let v1131 = C::gpr_to_reg(ctx, v1130);
+                                let v1132 = C::value_regs(ctx, v1127, v1131);
+                                let v1133 = C::output(ctx, v1132);
+                                // Rule at src/isa/x64/lower.isle line 2263.
+                                return Some(v1133);
+                            }
+                            _ => {}
+                        }
+                    }
+                }
+                &Opcode::Clz => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v45 = C::ty_32_or_64(ctx, v3);
+                        if let Some(v46) = v45 {
+                            let v998 = C::use_lzcnt(ctx);
+                            if v998 == true {
+                                let v377 = constructor_put_in_gpr(ctx, v376);
+                                let v999 = constructor_x64_lzcnt(ctx, v46, v377);
+                                let v1000 = constructor_output_gpr(ctx, v999);
+                                // Rule at src/isa/x64/lower.isle line 2030.
+                                return Some(v1000);
+                            }
+                            let v377 = constructor_put_in_gpr(ctx, v376);
+                            let v1001 = constructor_do_clz(ctx, v46, v46, v377);
+                            let v1002 = constructor_output_gpr(ctx, v1001);
+                            // Rule at src/isa/x64/lower.isle line 2034.
+                            return Some(v1002);
+                        }
+                        let v1003 = C::ty_8_or_16(ctx, v3);
+                        if let Some(v1004) = v1003 {
+                            let v1005 =
+                                constructor_extend_to_gpr(ctx, v376, I32, &ExtendKind::Zero);
+                            let v1006 = constructor_do_clz(ctx, I32, v1004, v1005);
+                            let v1007 = constructor_output_gpr(ctx, v1006);
+                            // Rule at src/isa/x64/lower.isle line 2037.
+                            return Some(v1007);
+                        }
+                        if v3 == I128 {
+                            let v380 = C::put_in_regs(ctx, v376);
+                            let v1008 = constructor_value_regs_get_gpr(ctx, v380, 0x1);
+                            let v1009 = constructor_do_clz(ctx, I64, I64, v1008);
+                            let v1010 = C::put_in_regs(ctx, v376);
+                            let v1011 = constructor_value_regs_get_gpr(ctx, v1010, 0x0);
+                            let v1012 = constructor_do_clz(ctx, I64, I64, v1011);
+                            let v1014 = RegMemImm::Imm { simm32: 0x40 };
+                            let v1015 = &C::gpr_mem_imm_new(ctx, &v1014);
+                            let v1016 = constructor_x64_add(ctx, I64, v1012, v1015);
+                            let v1018 =
+                                &constructor_x64_cmp_imm(ctx, &OperandSize::Size64, 0x40, v1009);
+                            let v1019 = &C::gpr_to_gpr_mem(ctx, v1009);
+                            let v1020 = &constructor_cmove(ctx, I64, &CC::NZ, v1019, v1016);
+                            let v1021 = constructor_with_flags_reg(ctx, v1018, v1020);
+                            let v1022 = C::gpr_new(ctx, v1021);
+                            let v1023 = C::gpr_to_reg(ctx, v1022);
+                            let v1024 = constructor_imm(ctx, I64, 0x0);
+                            let v1025 = C::value_regs(ctx, v1023, v1024);
+                            let v1026 = C::output(ctx, v1025);
+                            // Rule at src/isa/x64/lower.isle line 2042.
+                            return Some(v1026);
+                        }
+                    }
+                }
+                &Opcode::Ctz => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v45 = C::ty_32_or_64(ctx, v3);
+                        if let Some(v46) = v45 {
+                            let v189 = C::use_bmi1(ctx);
+                            if v189 == true {
+                                let v377 = constructor_put_in_gpr(ctx, v376);
+                                let v1027 = constructor_x64_tzcnt(ctx, v46, v377);
+                                let v1028 = constructor_output_gpr(ctx, v1027);
+                                // Rule at src/isa/x64/lower.isle line 2067.
+                                return Some(v1028);
+                            }
+                            let v377 = constructor_put_in_gpr(ctx, v376);
+                            let v1029 = constructor_do_ctz(ctx, v46, v46, v377);
+                            let v1030 = constructor_output_gpr(ctx, v1029);
+                            // Rule at src/isa/x64/lower.isle line 2071.
+                            return Some(v1030);
+                        }
+                        let v1003 = C::ty_8_or_16(ctx, v3);
+                        if let Some(v1004) = v1003 {
+                            let v1005 =
+                                constructor_extend_to_gpr(ctx, v376, I32, &ExtendKind::Zero);
+                            let v1031 = constructor_do_ctz(ctx, I32, v1004, v1005);
+                            let v1032 = constructor_output_gpr(ctx, v1031);
+                            // Rule at src/isa/x64/lower.isle line 2074.
+                            return Some(v1032);
+                        }
+                        if v3 == I128 {
+                            let v380 = C::put_in_regs(ctx, v376);
+                            let v381 = constructor_value_regs_get_gpr(ctx, v380, 0x0);
+                            let v1033 = constructor_do_ctz(ctx, I64, I64, v381);
+                            let v1010 = C::put_in_regs(ctx, v376);
+                            let v1034 = constructor_value_regs_get_gpr(ctx, v1010, 0x1);
+                            let v1035 = constructor_do_ctz(ctx, I64, I64, v1034);
+                            let v1014 = RegMemImm::Imm { simm32: 0x40 };
+                            let v1015 = &C::gpr_mem_imm_new(ctx, &v1014);
+                            let v1036 = constructor_x64_add(ctx, I64, v1035, v1015);
+                            let v1037 =
+                                &constructor_x64_cmp_imm(ctx, &OperandSize::Size64, 0x40, v1033);
+                            let v1038 = &C::gpr_to_gpr_mem(ctx, v1036);
+                            let v1039 = &constructor_cmove(ctx, I64, &CC::Z, v1038, v1033);
+                            let v1040 = constructor_with_flags_reg(ctx, v1037, v1039);
+                            let v1041 = C::gpr_new(ctx, v1040);
+                            let v1042 = C::gpr_to_reg(ctx, v1041);
+                            let v1024 = constructor_imm(ctx, I64, 0x0);
+                            let v1043 = C::value_regs(ctx, v1042, v1024);
+                            let v1044 = C::output(ctx, v1043);
+                            // Rule at src/isa/x64/lower.isle line 2079.
+                            return Some(v1044);
+                        }
+                    }
+                }
+                &Opcode::Bswap => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            I16 => {
+                                let v377 = constructor_put_in_gpr(ctx, v376);
+                                let v1135 = Imm8Reg::Imm8 { imm: 0x8 };
+                                let v1136 = &C::imm8_reg_to_imm8_gpr(ctx, &v1135);
+                                let v1137 = constructor_x64_rotl(ctx, I16, v377, v1136);
+                                let v1138 = constructor_output_gpr(ctx, v1137);
+                                // Rule at src/isa/x64/lower.isle line 2330.
+                                return Some(v1138);
+                            }
+                            I32 => {
+                                let v377 = constructor_put_in_gpr(ctx, v376);
+                                let v1139 = constructor_x64_bswap(ctx, I32, v377);
+                                let v1140 = constructor_output_gpr(ctx, v1139);
+                                // Rule at src/isa/x64/lower.isle line 2333.
+                                return Some(v1140);
+                            }
+                            I64 => {
+                                let v377 = constructor_put_in_gpr(ctx, v376);
+                                let v1141 = constructor_x64_bswap(ctx, I64, v377);
+                                let v1142 = constructor_output_gpr(ctx, v1141);
+                                // Rule at src/isa/x64/lower.isle line 2336.
+                                return Some(v1142);
+                            }
+                            I128 => {
+                                let v380 = C::put_in_regs(ctx, v376);
+                                let v1008 = constructor_value_regs_get_gpr(ctx, v380, 0x1);
+                                let v1143 = constructor_x64_bswap(ctx, I64, v1008);
+                                let v1144 = C::gpr_to_reg(ctx, v1143);
+                                let v1128 = C::put_in_regs(ctx, v376);
+                                let v1129 = constructor_value_regs_get_gpr(ctx, v1128, 0x0);
+                                let v1145 = constructor_x64_bswap(ctx, I64, v1129);
+                                let v1146 = C::gpr_to_reg(ctx, v1145);
+                                let v1147 = C::value_regs(ctx, v1144, v1146);
+                                let v1148 = C::output(ctx, v1147);
+                                // Rule at src/isa/x64/lower.isle line 2339.
+                                return Some(v1148);
+                            }
+                            _ => {}
+                        }
+                    }
+                }
+                &Opcode::Popcnt => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v1045 = C::use_popcnt(ctx);
+                        if v1045 == true {
+                            let v3 = C::value_type(ctx, v2);
+                            let v45 = C::ty_32_or_64(ctx, v3);
+                            if let Some(v46) = v45 {
+                                let v377 = constructor_put_in_gpr(ctx, v376);
+                                let v1046 = constructor_x64_popcnt(ctx, v46, v377);
+                                let v1047 = constructor_output_gpr(ctx, v1046);
+                                // Rule at src/isa/x64/lower.isle line 2098.
+                                return Some(v1047);
+                            }
+                            let v1003 = C::ty_8_or_16(ctx, v3);
+                            if let Some(v1004) = v1003 {
+                                let v1005 =
+                                    constructor_extend_to_gpr(ctx, v376, I32, &ExtendKind::Zero);
+                                let v1048 = constructor_x64_popcnt(ctx, I32, v1005);
+                                let v1049 = constructor_output_gpr(ctx, v1048);
+                                // Rule at src/isa/x64/lower.isle line 2102.
+                                return Some(v1049);
+                            }
+                        }
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            I128 => {
+                                if v1045 == true {
+                                    let v380 = C::put_in_regs(ctx, v376);
+                                    let v381 = constructor_value_regs_get_gpr(ctx, v380, 0x0);
+                                    let v1050 = constructor_x64_popcnt(ctx, I64, v381);
+                                    let v1010 = C::put_in_regs(ctx, v376);
+                                    let v1034 = constructor_value_regs_get_gpr(ctx, v1010, 0x1);
+                                    let v1051 = constructor_x64_popcnt(ctx, I64, v1034);
+                                    let v1052 = &C::gpr_to_gpr_mem_imm(ctx, v1051);
+                                    let v1053 = constructor_x64_add(ctx, I64, v1050, v1052);
+                                    let v1054 = C::gpr_to_reg(ctx, v1053);
+                                    let v1055 = constructor_imm(ctx, I64, 0x0);
+                                    let v1056 = C::value_regs(ctx, v1054, v1055);
+                                    let v1057 = C::output(ctx, v1056);
+                                    // Rule at src/isa/x64/lower.isle line 2106.
+                                    return Some(v1057);
+                                }
+                                let v380 = C::put_in_regs(ctx, v376);
+                                let v381 = constructor_value_regs_get_gpr(ctx, v380, 0x0);
+                                let v1062 = constructor_do_popcnt(ctx, I64, v381);
+                                let v1010 = C::put_in_regs(ctx, v376);
+                                let v1034 = constructor_value_regs_get_gpr(ctx, v1010, 0x1);
+                                let v1063 = constructor_do_popcnt(ctx, I64, v1034);
+                                let v1064 = &C::gpr_to_gpr_mem_imm(ctx, v1063);
+                                let v1065 = constructor_x64_add(ctx, I64, v1062, v1064);
+                                let v1066 = C::gpr_to_reg(ctx, v1065);
+                                let v1055 = constructor_imm(ctx, I64, 0x0);
+                                let v1067 = C::value_regs(ctx, v1066, v1055);
+                                let v1068 = C::output(ctx, v1067);
+                                // Rule at src/isa/x64/lower.isle line 2122.
+                                return Some(v1068);
+                            }
+                            I8X16 => {
+                                let v328 = C::use_avx512vl(ctx);
+                                if v328 == true {
+                                    let v1069 = C::use_avx512bitalg(ctx);
+                                    if v1069 == true {
+                                        let v521 = &C::put_in_xmm_mem(ctx, v376);
+                                        let v1070 = constructor_x64_vpopcntb(ctx, v521);
+                                        let v1071 = constructor_output_xmm(ctx, v1070);
+                                        // Rule at src/isa/x64/lower.isle line 2195.
+                                        return Some(v1071);
+                                    }
+                                }
+                                let v520 = C::use_ssse3(ctx);
+                                if v520 == true {
+                                    let v1073 = C::emit_u128_le_const(
+                                        ctx,
+                                        0xF0F0F0F0F0F0F0F0F0F0F0F0F0F0F0F,
+                                    );
+                                    let v1074 = &constructor_const_to_xmm_mem(ctx, v1073);
+                                    let v1075 = constructor_put_in_xmm(ctx, v376);
+                                    let v1076 = constructor_sse_and(ctx, I8X16, v1075, v1074);
+                                    let v1077 = constructor_put_in_xmm(ctx, v376);
+                                    let v1079 = &C::xmi_imm(ctx, 0x4);
+                                    let v1080 = constructor_x64_psrlw(ctx, v1077, v1079);
+                                    let v1081 = constructor_sse_and(ctx, I8X16, v1080, v1074);
+                                    let v1083 = C::emit_u128_le_const(
+                                        ctx,
+                                        0x4030302030202010302020102010100,
+                                    );
+                                    let v1084 = constructor_x64_xmm_load_const(ctx, I8X16, v1083);
+                                    let v1085 = &C::xmm_to_xmm_mem(ctx, v1076);
+                                    let v1086 = constructor_x64_pshufb(ctx, v1084, v1085);
+                                    let v1087 = &C::xmm_to_xmm_mem(ctx, v1081);
+                                    let v1088 = constructor_x64_pshufb(ctx, v1084, v1087);
+                                    let v1089 = &C::xmm_to_xmm_mem(ctx, v1088);
+                                    let v1090 = constructor_x64_paddb(ctx, v1086, v1089);
+                                    let v1091 = constructor_output_xmm(ctx, v1090);
+                                    // Rule at src/isa/x64/lower.isle line 2221.
+                                    return Some(v1091);
+                                }
+                                let v1093 =
+                                    C::emit_u128_le_const(ctx, 0x77777777777777777777777777777777);
+                                let v1094 = &constructor_const_to_xmm_mem(ctx, v1093);
+                                let v1075 = constructor_put_in_xmm(ctx, v376);
+                                let v1095 = &C::xmi_imm(ctx, 0x1);
+                                let v1096 = constructor_x64_psrlq(ctx, v1075, v1095);
+                                let v1097 = constructor_x64_pand(ctx, v1096, v1094);
+                                let v1098 = &C::xmm_to_xmm_mem(ctx, v1097);
+                                let v1099 = constructor_x64_psubb(ctx, v1075, v1098);
+                                let v1100 = &C::xmi_imm(ctx, 0x1);
+                                let v1101 = constructor_x64_psrlq(ctx, v1097, v1100);
+                                let v1102 = constructor_x64_pand(ctx, v1101, v1094);
+                                let v1103 = &C::xmm_to_xmm_mem(ctx, v1102);
+                                let v1104 = constructor_x64_psubb(ctx, v1099, v1103);
+                                let v1105 = &C::xmi_imm(ctx, 0x1);
+                                let v1106 = constructor_x64_psrlq(ctx, v1102, v1105);
+                                let v1107 = constructor_x64_pand(ctx, v1106, v1094);
+                                let v1108 = &C::xmm_to_xmm_mem(ctx, v1107);
+                                let v1109 = constructor_x64_psubb(ctx, v1104, v1108);
+                                let v1110 = &C::xmi_imm(ctx, 0x4);
+                                let v1111 = constructor_x64_psrlw(ctx, v1109, v1110);
+                                let v1112 = &C::xmm_to_xmm_mem(ctx, v1111);
+                                let v1113 = constructor_x64_paddb(ctx, v1109, v1112);
+                                let v1114 =
+                                    C::emit_u128_le_const(ctx, 0xF0F0F0F0F0F0F0F0F0F0F0F0F0F0F0F);
+                                let v1115 = &constructor_const_to_xmm_mem(ctx, v1114);
+                                let v1116 = constructor_x64_pand(ctx, v1113, v1115);
+                                let v1117 = constructor_output_xmm(ctx, v1116);
+                                // Rule at src/isa/x64/lower.isle line 2237.
+                                return Some(v1117);
+                            }
+                            _ => {}
+                        }
+                        let v45 = C::ty_32_or_64(ctx, v3);
+                        if let Some(v46) = v45 {
+                            let v377 = constructor_put_in_gpr(ctx, v376);
+                            let v1058 = constructor_do_popcnt(ctx, v46, v377);
+                            let v1059 = constructor_output_gpr(ctx, v1058);
+                            // Rule at src/isa/x64/lower.isle line 2112.
+                            return Some(v1059);
+                        }
+                        let v1003 = C::ty_8_or_16(ctx, v3);
+                        if let Some(v1004) = v1003 {
+                            let v1005 =
+                                constructor_extend_to_gpr(ctx, v376, I32, &ExtendKind::Zero);
+                            let v1060 = constructor_do_popcnt(ctx, I32, v1005);
+                            let v1061 = constructor_output_gpr(ctx, v1060);
+                            // Rule at src/isa/x64/lower.isle line 2117.
+                            return Some(v1061);
+                        }
+                    }
+                }
+                &Opcode::Sqrt => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            F32 => {
+                                let v521 = &C::put_in_xmm_mem(ctx, v376);
+                                let v1232 = constructor_x64_sqrtss(ctx, v521);
+                                let v1233 = constructor_output_xmm(ctx, v1232);
+                                // Rule at src/isa/x64/lower.isle line 2486.
+                                return Some(v1233);
+                            }
+                            F64 => {
+                                let v521 = &C::put_in_xmm_mem(ctx, v376);
+                                let v1234 = constructor_x64_sqrtsd(ctx, v521);
+                                let v1235 = constructor_output_xmm(ctx, v1234);
+                                // Rule at src/isa/x64/lower.isle line 2488.
+                                return Some(v1235);
+                            }
+                            F32X4 => {
+                                let v521 = &C::put_in_xmm_mem(ctx, v376);
+                                let v1236 = constructor_x64_sqrtps(ctx, v521);
+                                let v1237 = constructor_output_xmm(ctx, v1236);
+                                // Rule at src/isa/x64/lower.isle line 2490.
+                                return Some(v1237);
+                            }
+                            F64X2 => {
+                                let v521 = &C::put_in_xmm_mem(ctx, v376);
+                                let v1238 = constructor_x64_sqrtpd(ctx, v521);
+                                let v1239 = constructor_output_xmm(ctx, v1238);
+                                // Rule at src/isa/x64/lower.isle line 2492.
+                                return Some(v1239);
+                            }
+                            _ => {}
+                        }
+                    }
+                }
+                &Opcode::Fneg => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            F32 => {
+                                let v524 = constructor_put_in_xmm(ctx, v376);
+                                let v599 = constructor_imm(ctx, F32, 0x80000000);
+                                let v600 = &constructor_reg_to_xmm_mem(ctx, v599);
+                                let v601 = constructor_x64_xorps(ctx, v524, v600);
+                                let v602 = constructor_output_xmm(ctx, v601);
+                                // Rule at src/isa/x64/lower.isle line 1261.
+                                return Some(v602);
+                            }
+                            F64 => {
+                                let v524 = constructor_put_in_xmm(ctx, v376);
+                                let v604 = constructor_imm(ctx, F64, 0x8000000000000000);
+                                let v605 = &constructor_reg_to_xmm_mem(ctx, v604);
+                                let v606 = constructor_x64_xorpd(ctx, v524, v605);
+                                let v607 = constructor_output_xmm(ctx, v606);
+                                // Rule at src/isa/x64/lower.isle line 1264.
+                                return Some(v607);
+                            }
+                            F32X4 => {
+                                let v524 = constructor_put_in_xmm(ctx, v376);
+                                let v587 = constructor_vector_all_ones(ctx);
+                                let v608 = &C::xmi_imm(ctx, 0x1F);
+                                let v609 = constructor_x64_pslld(ctx, v587, v608);
+                                let v610 = &C::xmm_to_xmm_mem(ctx, v609);
+                                let v611 = constructor_x64_xorps(ctx, v524, v610);
+                                let v612 = constructor_output_xmm(ctx, v611);
+                                // Rule at src/isa/x64/lower.isle line 1267.
+                                return Some(v612);
+                            }
+                            F64X2 => {
+                                let v524 = constructor_put_in_xmm(ctx, v376);
+                                let v587 = constructor_vector_all_ones(ctx);
+                                let v613 = &C::xmi_imm(ctx, 0x3F);
+                                let v614 = constructor_x64_psllq(ctx, v587, v613);
+                                let v615 = &C::xmm_to_xmm_mem(ctx, v614);
+                                let v616 = constructor_x64_xorpd(ctx, v524, v615);
+                                let v617 = constructor_output_xmm(ctx, v616);
+                                // Rule at src/isa/x64/lower.isle line 1271.
+                                return Some(v617);
+                            }
+                            _ => {}
+                        }
+                    }
+                }
+                &Opcode::Fabs => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            F32 => {
+                                let v524 = constructor_put_in_xmm(ctx, v376);
+                                let v578 = constructor_imm(ctx, F32, 0x7FFFFFFF);
+                                let v579 = &constructor_reg_to_xmm_mem(ctx, v578);
+                                let v580 = constructor_x64_andps(ctx, v524, v579);
+                                let v581 = constructor_output_xmm(ctx, v580);
+                                // Rule at src/isa/x64/lower.isle line 1243.
+                                return Some(v581);
+                            }
+                            F64 => {
+                                let v524 = constructor_put_in_xmm(ctx, v376);
+                                let v583 = constructor_imm(ctx, F64, 0x7FFFFFFFFFFFFFFF);
+                                let v584 = &constructor_reg_to_xmm_mem(ctx, v583);
+                                let v585 = constructor_x64_andpd(ctx, v524, v584);
+                                let v586 = constructor_output_xmm(ctx, v585);
+                                // Rule at src/isa/x64/lower.isle line 1246.
+                                return Some(v586);
+                            }
+                            F32X4 => {
+                                let v524 = constructor_put_in_xmm(ctx, v376);
+                                let v587 = constructor_vector_all_ones(ctx);
+                                let v589 = &C::xmi_imm(ctx, 0x1);
+                                let v590 = constructor_x64_psrld(ctx, v587, v589);
+                                let v591 = &C::xmm_to_xmm_mem(ctx, v590);
+                                let v592 = constructor_x64_andps(ctx, v524, v591);
+                                let v593 = constructor_output_xmm(ctx, v592);
+                                // Rule at src/isa/x64/lower.isle line 1250.
+                                return Some(v593);
+                            }
+                            F64X2 => {
+                                let v524 = constructor_put_in_xmm(ctx, v376);
+                                let v587 = constructor_vector_all_ones(ctx);
+                                let v589 = &C::xmi_imm(ctx, 0x1);
+                                let v594 = constructor_x64_psrlq(ctx, v587, v589);
+                                let v595 = &C::xmm_to_xmm_mem(ctx, v594);
+                                let v596 = constructor_x64_andpd(ctx, v524, v595);
+                                let v597 = constructor_output_xmm(ctx, v596);
+                                // Rule at src/isa/x64/lower.isle line 1255.
+                                return Some(v597);
+                            }
+                            _ => {}
+                        }
+                    }
+                }
+                &Opcode::Ceil => {
+                    let v2066 = &C::put_in_reg_mem(ctx, v376);
+                    let v618 = C::value_type(ctx, v376);
+                    let v2068 = constructor_x64_round(ctx, v618, v2066, &RoundImm::RoundUp);
+                    let v2069 = constructor_output_xmm(ctx, v2068);
+                    // Rule at src/isa/x64/lower.isle line 3914.
+                    return Some(v2069);
+                }
+                &Opcode::Floor => {
+                    let v2066 = &C::put_in_reg_mem(ctx, v376);
+                    let v618 = C::value_type(ctx, v376);
+                    let v2071 = constructor_x64_round(ctx, v618, v2066, &RoundImm::RoundDown);
+                    let v2072 = constructor_output_xmm(ctx, v2071);
+                    // Rule at src/isa/x64/lower.isle line 3919.
+                    return Some(v2072);
+                }
+                &Opcode::Trunc => {
+                    let v2066 = &C::put_in_reg_mem(ctx, v376);
+                    let v618 = C::value_type(ctx, v376);
+                    let v2077 = constructor_x64_round(ctx, v618, v2066, &RoundImm::RoundZero);
+                    let v2078 = constructor_output_xmm(ctx, v2077);
+                    // Rule at src/isa/x64/lower.isle line 3929.
+                    return Some(v2078);
+                }
+                &Opcode::Nearest => {
+                    let v2066 = &C::put_in_reg_mem(ctx, v376);
+                    let v618 = C::value_type(ctx, v376);
+                    let v2074 = constructor_x64_round(ctx, v618, v2066, &RoundImm::RoundNearest);
+                    let v2075 = constructor_output_xmm(ctx, v2074);
+                    // Rule at src/isa/x64/lower.isle line 3924.
+                    return Some(v2075);
+                }
+                &Opcode::IsNull => {
+                    let v618 = C::value_type(ctx, v376);
+                    if v618 == R64 {
+                        let v377 = constructor_put_in_gpr(ctx, v376);
+                        let v1150 = &constructor_x64_cmp_imm(ctx, &OperandSize::Size64, 0x0, v377);
+                        let v1151 = &constructor_x64_setcc(ctx, &CC::Z);
+                        let v1152 = constructor_with_flags(ctx, v1150, v1151);
+                        let v1153 = C::output(ctx, v1152);
+                        // Rule at src/isa/x64/lower.isle line 2347.
+                        return Some(v1153);
+                    }
+                }
+                &Opcode::IsInvalid => {
+                    let v618 = C::value_type(ctx, v376);
+                    if v618 == R64 {
+                        let v377 = constructor_put_in_gpr(ctx, v376);
+                        let v1155 =
+                            &constructor_x64_cmp_imm(ctx, &OperandSize::Size64, 0xFFFFFFFF, v377);
+                        let v1151 = &constructor_x64_setcc(ctx, &CC::Z);
+                        let v1156 = constructor_with_flags(ctx, v1155, v1151);
+                        let v1157 = C::output(ctx, v1156);
+                        // Rule at src/isa/x64/lower.isle line 2355.
+                        return Some(v1157);
+                    }
+                }
+                &Opcode::ScalarToVector => {
+                    let v2322 = &C::sinkable_load(ctx, v376);
+                    if let Some(v2323) = v2322 {
+                        let v618 = C::value_type(ctx, v376);
+                        let v2329 = C::ty_64(ctx, v618);
+                        if let Some(v2330) = v2329 {
+                            let v2326 = &C::sink_load(ctx, v2323);
+                            let v2331 = constructor_x64_movsd_load(ctx, v2326);
+                            let v2332 = constructor_output_xmm(ctx, v2331);
+                            // Rule at src/isa/x64/lower.isle line 4371.
+                            return Some(v2332);
+                        }
+                        let v2324 = C::ty_32(ctx, v618);
+                        if let Some(v2325) = v2324 {
+                            let v2326 = &C::sink_load(ctx, v2323);
+                            let v2327 = constructor_x64_movss_load(ctx, v2326);
+                            let v2328 = constructor_output_xmm(ctx, v2327);
+                            // Rule at src/isa/x64/lower.isle line 4369.
+                            return Some(v2328);
+                        }
+                    }
+                    let v618 = C::value_type(ctx, v376);
+                    let v1799 = C::ty_scalar_float(ctx, v618);
+                    if let Some(v1800) = v1799 {
+                        let v1176 = constructor_output_value(ctx, v376);
+                        // Rule at src/isa/x64/lower.isle line 4359.
+                        return Some(v1176);
+                    }
+                    let v377 = constructor_put_in_gpr(ctx, v376);
+                    let v2320 = constructor_bitcast_gpr_to_xmm(ctx, v618, v377);
+                    let v2321 = constructor_output_xmm(ctx, v2320);
+                    // Rule at src/isa/x64/lower.isle line 4364.
+                    return Some(v2321);
+                }
+                &Opcode::Bmask => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v380 = C::put_in_regs(ctx, v376);
+                        let v3 = C::value_type(ctx, v2);
+                        let v618 = C::value_type(ctx, v376);
+                        let v619 = constructor_lower_bmask(ctx, v3, v618, v380);
+                        let v620 = C::output(ctx, v619);
+                        // Rule at src/isa/x64/lower.isle line 1316.
+                        return Some(v620);
+                    }
+                }
+                &Opcode::Ireduce => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        let v4 = C::fits_in_64(ctx, v3);
+                        if let Some(v5) = v4 {
+                            let v380 = C::put_in_regs(ctx, v376);
+                            let v381 = constructor_value_regs_get_gpr(ctx, v380, 0x0);
+                            let v1177 = constructor_output_gpr(ctx, v381);
+                            // Rule at src/isa/x64/lower.isle line 2405.
+                            return Some(v1177);
+                        }
+                        let v618 = C::value_type(ctx, v376);
+                        if v3 == v618 {
+                            let v1176 = constructor_output_value(ctx, v376);
+                            // Rule at src/isa/x64/lower.isle line 2399.
+                            return Some(v1176);
+                        }
+                    }
+                }
+                &Opcode::SwidenLow => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            I16X8 => {
+                                let v436 = C::use_sse41(ctx);
+                                if v436 == true {
+                                    let v618 = C::value_type(ctx, v376);
+                                    if v618 == I8X16 {
+                                        let v521 = &C::put_in_xmm_mem(ctx, v376);
+                                        let v1952 = constructor_x64_pmovsxbw(ctx, v521);
+                                        let v1953 = constructor_output_xmm(ctx, v1952);
+                                        // Rule at src/isa/x64/lower.isle line 3634.
+                                        return Some(v1953);
+                                    }
+                                }
+                            }
+                            I32X4 => {
+                                let v436 = C::use_sse41(ctx);
+                                if v436 == true {
+                                    let v618 = C::value_type(ctx, v376);
+                                    if v618 == I16X8 {
+                                        let v521 = &C::put_in_xmm_mem(ctx, v376);
+                                        let v1954 = constructor_x64_pmovsxwd(ctx, v521);
+                                        let v1955 = constructor_output_xmm(ctx, v1954);
+                                        // Rule at src/isa/x64/lower.isle line 3637.
+                                        return Some(v1955);
+                                    }
+                                }
+                            }
+                            I64X2 => {
+                                let v436 = C::use_sse41(ctx);
+                                if v436 == true {
+                                    let v618 = C::value_type(ctx, v376);
+                                    if v618 == I32X4 {
+                                        let v521 = &C::put_in_xmm_mem(ctx, v376);
+                                        let v1956 = constructor_x64_pmovsxdq(ctx, v521);
+                                        let v1957 = constructor_output_xmm(ctx, v1956);
+                                        // Rule at src/isa/x64/lower.isle line 3640.
+                                        return Some(v1957);
+                                    }
+                                }
+                            }
+                            _ => {}
+                        }
+                        let v524 = constructor_put_in_xmm(ctx, v376);
+                        let v1958 = constructor_lower_swiden_low(ctx, v3, v524);
+                        let v1959 = constructor_output_xmm(ctx, v1958);
+                        // Rule at src/isa/x64/lower.isle line 3644.
+                        return Some(v1959);
+                    }
+                }
+                &Opcode::SwidenHigh => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            I16X8 => {
+                                let v618 = C::value_type(ctx, v376);
+                                if v618 == I8X16 {
+                                    let v436 = C::use_sse41(ctx);
+                                    if v436 == true {
+                                        let v520 = C::use_ssse3(ctx);
+                                        if v520 == true {
+                                            let v524 = constructor_put_in_xmm(ctx, v376);
+                                            let v1242 = &C::xmm_to_xmm_mem(ctx, v524);
+                                            let v1960 =
+                                                constructor_x64_palignr(ctx, v524, v1242, 0x8);
+                                            let v1961 = &C::xmm_to_xmm_mem(ctx, v1960);
+                                            let v1962 = constructor_x64_pmovsxbw(ctx, v1961);
+                                            let v1963 = constructor_output_xmm(ctx, v1962);
+                                            // Rule at src/isa/x64/lower.isle line 3667.
+                                            return Some(v1963);
+                                        }
+                                    }
+                                    let v524 = constructor_put_in_xmm(ctx, v376);
+                                    let v1242 = &C::xmm_to_xmm_mem(ctx, v524);
+                                    let v1970 = constructor_x64_punpckhbw(ctx, v524, v1242);
+                                    let v1971 = &C::xmi_imm(ctx, 0x8);
+                                    let v1972 = constructor_x64_psraw(ctx, v1970, v1971);
+                                    let v1973 = constructor_output_xmm(ctx, v1972);
+                                    // Rule at src/isa/x64/lower.isle line 3683.
+                                    return Some(v1973);
+                                }
+                            }
+                            I32X4 => {
+                                let v618 = C::value_type(ctx, v376);
+                                if v618 == I16X8 {
+                                    let v436 = C::use_sse41(ctx);
+                                    if v436 == true {
+                                        let v520 = C::use_ssse3(ctx);
+                                        if v520 == true {
+                                            let v524 = constructor_put_in_xmm(ctx, v376);
+                                            let v1242 = &C::xmm_to_xmm_mem(ctx, v524);
+                                            let v1960 =
+                                                constructor_x64_palignr(ctx, v524, v1242, 0x8);
+                                            let v1961 = &C::xmm_to_xmm_mem(ctx, v1960);
+                                            let v1964 = constructor_x64_pmovsxwd(ctx, v1961);
+                                            let v1965 = constructor_output_xmm(ctx, v1964);
+                                            // Rule at src/isa/x64/lower.isle line 3672.
+                                            return Some(v1965);
+                                        }
+                                    }
+                                    let v524 = constructor_put_in_xmm(ctx, v376);
+                                    let v1242 = &C::xmm_to_xmm_mem(ctx, v524);
+                                    let v1974 = constructor_x64_punpckhwd(ctx, v524, v1242);
+                                    let v1784 = &C::xmi_imm(ctx, 0x10);
+                                    let v1975 = constructor_x64_psrad(ctx, v1974, v1784);
+                                    let v1976 = constructor_output_xmm(ctx, v1975);
+                                    // Rule at src/isa/x64/lower.isle line 3686.
+                                    return Some(v1976);
+                                }
+                            }
+                            I64X2 => {
+                                let v618 = C::value_type(ctx, v376);
+                                if v618 == I32X4 {
+                                    let v436 = C::use_sse41(ctx);
+                                    if v436 == true {
+                                        let v521 = &C::put_in_xmm_mem(ctx, v376);
+                                        let v1966 = constructor_x64_pshufd(ctx, v521, 0xEE);
+                                        let v1967 = &C::xmm_to_xmm_mem(ctx, v1966);
+                                        let v1968 = constructor_x64_pmovsxdq(ctx, v1967);
+                                        let v1969 = constructor_output_xmm(ctx, v1968);
+                                        // Rule at src/isa/x64/lower.isle line 3677.
+                                        return Some(v1969);
+                                    }
+                                    let v521 = &C::put_in_xmm_mem(ctx, v376);
+                                    let v1978 = constructor_x64_pshufd(ctx, v521, 0xE);
+                                    let v1979 = constructor_xmm_zero(ctx, I32X4);
+                                    let v1980 = &C::xmm_to_xmm_mem(ctx, v1978);
+                                    let v1981 = constructor_x64_pcmpgtd(ctx, v1979, v1980);
+                                    let v1982 = &C::xmm_to_xmm_mem(ctx, v1981);
+                                    let v1983 = constructor_x64_punpckldq(ctx, v1978, v1982);
+                                    let v1984 = constructor_output_xmm(ctx, v1983);
+                                    // Rule at src/isa/x64/lower.isle line 3691.
+                                    return Some(v1984);
+                                }
+                            }
+                            _ => {}
+                        }
+                    }
+                }
+                &Opcode::UwidenLow => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            I16X8 => {
+                                let v436 = C::use_sse41(ctx);
+                                if v436 == true {
+                                    let v618 = C::value_type(ctx, v376);
+                                    if v618 == I8X16 {
+                                        let v521 = &C::put_in_xmm_mem(ctx, v376);
+                                        let v1985 = constructor_x64_pmovzxbw(ctx, v521);
+                                        let v1986 = constructor_output_xmm(ctx, v1985);
+                                        // Rule at src/isa/x64/lower.isle line 3699.
+                                        return Some(v1986);
+                                    }
+                                }
+                            }
+                            I32X4 => {
+                                let v436 = C::use_sse41(ctx);
+                                if v436 == true {
+                                    let v618 = C::value_type(ctx, v376);
+                                    if v618 == I16X8 {
+                                        let v521 = &C::put_in_xmm_mem(ctx, v376);
+                                        let v1987 = constructor_x64_pmovzxwd(ctx, v521);
+                                        let v1988 = constructor_output_xmm(ctx, v1987);
+                                        // Rule at src/isa/x64/lower.isle line 3702.
+                                        return Some(v1988);
+                                    }
+                                }
+                            }
+                            I64X2 => {
+                                let v436 = C::use_sse41(ctx);
+                                if v436 == true {
+                                    let v618 = C::value_type(ctx, v376);
+                                    if v618 == I32X4 {
+                                        let v521 = &C::put_in_xmm_mem(ctx, v376);
+                                        let v1989 = constructor_x64_pmovzxdq(ctx, v521);
+                                        let v1990 = constructor_output_xmm(ctx, v1989);
+                                        // Rule at src/isa/x64/lower.isle line 3705.
+                                        return Some(v1990);
+                                    }
+                                }
+                            }
+                            _ => {}
+                        }
+                        let v524 = constructor_put_in_xmm(ctx, v376);
+                        let v1991 = constructor_lower_uwiden_low(ctx, v3, v524);
+                        let v1992 = constructor_output_xmm(ctx, v1991);
+                        // Rule at src/isa/x64/lower.isle line 3709.
+                        return Some(v1992);
+                    }
+                }
+                &Opcode::UwidenHigh => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            I16X8 => {
+                                let v618 = C::value_type(ctx, v376);
+                                if v618 == I8X16 {
+                                    let v524 = constructor_put_in_xmm(ctx, v376);
+                                    let v525 = constructor_xmm_zero(ctx, I8X16);
+                                    let v1993 = &C::xmm_to_xmm_mem(ctx, v525);
+                                    let v1994 = constructor_x64_punpckhbw(ctx, v524, v1993);
+                                    let v1995 = constructor_output_xmm(ctx, v1994);
+                                    // Rule at src/isa/x64/lower.isle line 3724.
+                                    return Some(v1995);
+                                }
+                            }
+                            I32X4 => {
+                                let v618 = C::value_type(ctx, v376);
+                                if v618 == I16X8 {
+                                    let v524 = constructor_put_in_xmm(ctx, v376);
+                                    let v525 = constructor_xmm_zero(ctx, I8X16);
+                                    let v1993 = &C::xmm_to_xmm_mem(ctx, v525);
+                                    let v1996 = constructor_x64_punpckhwd(ctx, v524, v1993);
+                                    let v1997 = constructor_output_xmm(ctx, v1996);
+                                    // Rule at src/isa/x64/lower.isle line 3726.
+                                    return Some(v1997);
+                                }
+                            }
+                            I64X2 => {
+                                let v618 = C::value_type(ctx, v376);
+                                if v618 == I32X4 {
+                                    let v524 = constructor_put_in_xmm(ctx, v376);
+                                    let v1823 = constructor_xmm_zero(ctx, F32X4);
+                                    let v1824 = &C::xmm_to_xmm_mem(ctx, v1823);
+                                    let v1998 = constructor_x64_unpckhps(ctx, v524, v1824);
+                                    let v1999 = constructor_output_xmm(ctx, v1998);
+                                    // Rule at src/isa/x64/lower.isle line 3728.
+                                    return Some(v1999);
+                                }
+                            }
+                            _ => {}
+                        }
+                    }
+                }
+                &Opcode::Uextend => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            I64 => {
+                                let v1158 =
+                                    constructor_extend_to_gpr(ctx, v376, I64, &ExtendKind::Zero);
+                                let v1163 = constructor_output_gpr(ctx, v1158);
+                                // Rule at src/isa/x64/lower.isle line 2368.
+                                return Some(v1163);
+                            }
+                            I128 => {
+                                let v1158 =
+                                    constructor_extend_to_gpr(ctx, v376, I64, &ExtendKind::Zero);
+                                let v1159 = C::gpr_to_reg(ctx, v1158);
+                                let v1160 = constructor_imm(ctx, I64, 0x0);
+                                let v1161 = C::value_regs(ctx, v1159, v1160);
+                                let v1162 = C::output(ctx, v1161);
+                                // Rule at src/isa/x64/lower.isle line 2364.
+                                return Some(v1162);
+                            }
+                            _ => {}
+                        }
+                        let v1164 = C::fits_in_32(ctx, v3);
+                        if let Some(v1165) = v1164 {
+                            let v1005 =
+                                constructor_extend_to_gpr(ctx, v376, I32, &ExtendKind::Zero);
+                            let v1166 = constructor_output_gpr(ctx, v1005);
+                            // Rule at src/isa/x64/lower.isle line 2373.
+                            return Some(v1166);
+                        }
+                    }
+                }
+                &Opcode::Sextend => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            I64 => {
+                                let v1167 =
+                                    constructor_extend_to_gpr(ctx, v376, I64, &ExtendKind::Sign);
+                                let v1173 = constructor_output_gpr(ctx, v1167);
+                                // Rule at src/isa/x64/lower.isle line 2388.
+                                return Some(v1173);
+                            }
+                            I128 => {
+                                let v1167 =
+                                    constructor_extend_to_gpr(ctx, v376, I64, &ExtendKind::Sign);
+                                let v782 = Imm8Reg::Imm8 { imm: 0x3F };
+                                let v783 = &C::imm8_reg_to_imm8_gpr(ctx, &v782);
+                                let v1168 = constructor_x64_sar(ctx, I64, v1167, v783);
+                                let v1169 = C::gpr_to_reg(ctx, v1167);
+                                let v1170 = C::gpr_to_reg(ctx, v1168);
+                                let v1171 = C::value_regs(ctx, v1169, v1170);
+                                let v1172 = C::output(ctx, v1171);
+                                // Rule at src/isa/x64/lower.isle line 2382.
+                                return Some(v1172);
+                            }
+                            _ => {}
+                        }
+                        let v1164 = C::fits_in_32(ctx, v3);
+                        if let Some(v1165) = v1164 {
+                            let v1174 =
+                                constructor_extend_to_gpr(ctx, v376, I32, &ExtendKind::Sign);
+                            let v1175 = constructor_output_gpr(ctx, v1174);
+                            // Rule at src/isa/x64/lower.isle line 2393.
+                            return Some(v1175);
+                        }
+                    }
+                }
+                &Opcode::Fpromote => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        if v3 == F64 {
+                            let v521 = &C::put_in_xmm_mem(ctx, v376);
+                            let v1240 = constructor_x64_cvtss2sd(ctx, v521);
+                            let v1241 = constructor_output_xmm(ctx, v1240);
+                            // Rule at src/isa/x64/lower.isle line 2496.
+                            return Some(v1241);
+                        }
+                    }
+                }
+                &Opcode::Fdemote => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        if v3 == F32 {
+                            let v521 = &C::put_in_xmm_mem(ctx, v376);
+                            let v1245 = constructor_x64_cvtsd2ss(ctx, v521);
+                            let v1246 = constructor_output_xmm(ctx, v1245);
+                            // Rule at src/isa/x64/lower.isle line 2504.
+                            return Some(v1246);
+                        }
+                    }
+                }
+                &Opcode::Fvdemote => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        if v3 == F32X4 {
+                            let v521 = &C::put_in_xmm_mem(ctx, v376);
+                            let v1247 = constructor_x64_cvtpd2ps(ctx, v521);
+                            let v1248 = constructor_output_xmm(ctx, v1247);
+                            // Rule at src/isa/x64/lower.isle line 2508.
+                            return Some(v1248);
+                        }
+                    }
+                }
+                &Opcode::FvpromoteLow => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        if v3 == F64X2 {
+                            let v524 = constructor_put_in_xmm(ctx, v376);
+                            let v1242 = &C::xmm_to_xmm_mem(ctx, v524);
+                            let v1243 = constructor_x64_cvtps2pd(ctx, v1242);
+                            let v1244 = constructor_output_xmm(ctx, v1243);
+                            // Rule at src/isa/x64/lower.isle line 2500.
+                            return Some(v1244);
+                        }
+                    }
+                }
+                &Opcode::FcvtToUint => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v618 = C::value_type(ctx, v376);
+                        let v1799 = C::ty_scalar_float(ctx, v618);
+                        if let Some(v1800) = v1799 {
+                            let v3 = C::value_type(ctx, v2);
+                            let v1801 = constructor_cvt_float_to_uint_seq(ctx, v3, v376, false);
+                            let v1802 = constructor_output_gpr(ctx, v1801);
+                            // Rule at src/isa/x64/lower.isle line 3386.
+                            return Some(v1802);
+                        }
+                    }
+                }
+                &Opcode::FcvtToSint => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v618 = C::value_type(ctx, v376);
+                        let v1799 = C::ty_scalar_float(ctx, v618);
+                        if let Some(v1800) = v1799 {
+                            let v3 = C::value_type(ctx, v2);
+                            let v1805 = constructor_cvt_float_to_sint_seq(ctx, v3, v376, false);
+                            let v1806 = constructor_output_gpr(ctx, v1805);
+                            // Rule at src/isa/x64/lower.isle line 3392.
+                            return Some(v1806);
+                        }
+                    }
+                }
+                &Opcode::FcvtToUintSat => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        if v3 == I32X4 {
+                            let v618 = C::value_type(ctx, v376);
+                            if v618 == F32X4 {
+                                let v524 = constructor_put_in_xmm(ctx, v376);
+                                let v1823 = constructor_xmm_zero(ctx, F32X4);
+                                let v1824 = &C::xmm_to_xmm_mem(ctx, v1823);
+                                let v1825 = constructor_x64_maxps(ctx, v524, v1824);
+                                let v1826 = &C::xmm_to_xmm_mem(ctx, v1823);
+                                let v1827 = constructor_x64_pcmpeqd(ctx, v1823, v1826);
+                                let v1828 = &C::xmi_imm(ctx, 0x1);
+                                let v1829 = constructor_x64_psrld(ctx, v1827, v1828);
+                                let v1830 = &C::xmm_to_xmm_mem(ctx, v1829);
+                                let v1831 = constructor_x64_cvtdq2ps(ctx, v1830);
+                                let v1832 = &C::xmm_to_xmm_mem(ctx, v1825);
+                                let v1833 = constructor_x64_cvttps2dq(ctx, v1832);
+                                let v1834 = &C::xmm_to_xmm_mem(ctx, v1831);
+                                let v1835 = constructor_x64_subps(ctx, v1825, v1834);
+                                let v1836 = &C::xmm_to_xmm_mem(ctx, v1835);
+                                let v1837 = constructor_x64_cmpps(
+                                    ctx,
+                                    v1831,
+                                    v1836,
+                                    &FcmpImm::LessThanOrEqual,
+                                );
+                                let v1838 = &C::xmm_to_xmm_mem(ctx, v1835);
+                                let v1839 = constructor_x64_cvttps2dq(ctx, v1838);
+                                let v1840 = &C::xmm_to_xmm_mem(ctx, v1837);
+                                let v1841 = constructor_x64_pxor(ctx, v1839, v1840);
+                                let v1842 = constructor_xmm_zero(ctx, I32X4);
+                                let v1843 = constructor_lower_vec_smax(ctx, I32X4, v1841, v1842);
+                                let v1844 = &C::xmm_to_xmm_mem(ctx, v1833);
+                                let v1845 = constructor_x64_paddd(ctx, v1843, v1844);
+                                let v1846 = constructor_output_xmm(ctx, v1845);
+                                // Rule at src/isa/x64/lower.isle line 3470.
+                                return Some(v1846);
+                            }
+                        }
+                        let v618 = C::value_type(ctx, v376);
+                        let v1799 = C::ty_scalar_float(ctx, v618);
+                        if let Some(v1800) = v1799 {
+                            let v1803 = constructor_cvt_float_to_uint_seq(ctx, v3, v376, true);
+                            let v1804 = constructor_output_gpr(ctx, v1803);
+                            // Rule at src/isa/x64/lower.isle line 3389.
+                            return Some(v1804);
+                        }
+                    }
+                }
+                &Opcode::FcvtToSintSat => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        if v3 == I32X4 {
+                            let v618 = C::value_type(ctx, v376);
+                            if v618 == F32X4 {
+                                let v524 = constructor_put_in_xmm(ctx, v376);
+                                let v1242 = &C::xmm_to_xmm_mem(ctx, v524);
+                                let v1809 =
+                                    constructor_x64_cmpps(ctx, v524, v1242, &FcmpImm::Equal);
+                                let v1810 = &C::xmm_to_xmm_mem(ctx, v1809);
+                                let v1811 = constructor_x64_andps(ctx, v524, v1810);
+                                let v1812 = &C::xmm_to_xmm_mem(ctx, v1811);
+                                let v1813 = constructor_x64_pxor(ctx, v1809, v1812);
+                                let v1814 = &C::xmm_to_xmm_mem(ctx, v1811);
+                                let v1815 = constructor_x64_cvttps2dq(ctx, v1814);
+                                let v1816 = &C::xmm_to_xmm_mem(ctx, v1813);
+                                let v1817 = constructor_x64_pand(ctx, v1815, v1816);
+                                let v1818 = &C::xmi_imm(ctx, 0x1F);
+                                let v1819 = constructor_x64_psrad(ctx, v1817, v1818);
+                                let v1820 = &C::xmm_to_xmm_mem(ctx, v1815);
+                                let v1821 = constructor_x64_pxor(ctx, v1819, v1820);
+                                let v1822 = constructor_output_xmm(ctx, v1821);
+                                // Rule at src/isa/x64/lower.isle line 3399.
+                                return Some(v1822);
+                            }
+                        }
+                        let v618 = C::value_type(ctx, v376);
+                        let v1799 = C::ty_scalar_float(ctx, v618);
+                        if let Some(v1800) = v1799 {
+                            let v1807 = constructor_cvt_float_to_sint_seq(ctx, v3, v376, true);
+                            let v1808 = constructor_output_gpr(ctx, v1807);
+                            // Rule at src/isa/x64/lower.isle line 3395.
+                            return Some(v1808);
+                        }
+                    }
+                }
+                &Opcode::X86Cvtt2dq => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        if v3 == I32X4 {
+                            let v618 = C::value_type(ctx, v376);
+                            if v618 == F32X4 {
+                                let v521 = &C::put_in_xmm_mem(ctx, v376);
+                                let v1847 = constructor_x64_cvttps2dq(ctx, v521);
+                                let v1848 = constructor_output_xmm(ctx, v1847);
+                                // Rule at src/isa/x64/lower.isle line 3517.
+                                return Some(v1848);
+                            }
+                        }
+                    }
+                }
+                &Opcode::FcvtFromUint => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            F32 => {
+                                let v618 = C::value_type(ctx, v376);
+                                let v1758 = C::fits_in_32(ctx, v618);
+                                if let Some(v1759) = v1758 {
+                                    let v1760 = C::ty_int(ctx, v1759);
+                                    if let Some(v1761) = v1760 {
+                                        let v1158 = constructor_extend_to_gpr(
+                                            ctx,
+                                            v376,
+                                            I64,
+                                            &ExtendKind::Zero,
+                                        );
+                                        let v1762 = &C::gpr_to_gpr_mem(ctx, v1158);
+                                        let v1763 = constructor_x64_cvtsi2ss(ctx, I64, v1762);
+                                        let v1764 = constructor_output_xmm(ctx, v1763);
+                                        // Rule at src/isa/x64/lower.isle line 3313.
+                                        return Some(v1764);
+                                    }
+                                }
+                            }
+                            F64 => {
+                                let v618 = C::value_type(ctx, v376);
+                                let v1758 = C::fits_in_32(ctx, v618);
+                                if let Some(v1759) = v1758 {
+                                    let v1760 = C::ty_int(ctx, v1759);
+                                    if let Some(v1761) = v1760 {
+                                        let v1158 = constructor_extend_to_gpr(
+                                            ctx,
+                                            v376,
+                                            I64,
+                                            &ExtendKind::Zero,
+                                        );
+                                        let v1762 = &C::gpr_to_gpr_mem(ctx, v1158);
+                                        let v1765 = constructor_x64_cvtsi2sd(ctx, I64, v1762);
+                                        let v1766 = constructor_output_xmm(ctx, v1765);
+                                        // Rule at src/isa/x64/lower.isle line 3316.
+                                        return Some(v1766);
+                                    }
+                                }
+                            }
+                            F32X4 => {
+                                let v328 = C::use_avx512vl(ctx);
+                                if v328 == true {
+                                    let v329 = C::use_avx512f(ctx);
+                                    if v329 == true {
+                                        let v521 = &C::put_in_xmm_mem(ctx, v376);
+                                        let v1779 = constructor_x64_vcvtudq2ps(ctx, v521);
+                                        let v1780 = constructor_output_xmm(ctx, v1779);
+                                        // Rule at src/isa/x64/lower.isle line 3334.
+                                        return Some(v1780);
+                                    }
+                                }
+                                let v524 = constructor_put_in_xmm(ctx, v376);
+                                let v1782 = &C::xmi_imm(ctx, 0x10);
+                                let v1783 = constructor_x64_pslld(ctx, v524, v1782);
+                                let v1784 = &C::xmi_imm(ctx, 0x10);
+                                let v1785 = constructor_x64_psrld(ctx, v1783, v1784);
+                                let v1786 = &C::xmm_to_xmm_mem(ctx, v1785);
+                                let v1787 = constructor_x64_psubd(ctx, v524, v1786);
+                                let v1788 = &C::xmm_to_xmm_mem(ctx, v1785);
+                                let v1789 = constructor_x64_cvtdq2ps(ctx, v1788);
+                                let v1790 = &C::xmi_imm(ctx, 0x1);
+                                let v1791 = constructor_x64_psrld(ctx, v1787, v1790);
+                                let v1792 = &C::xmm_to_xmm_mem(ctx, v1791);
+                                let v1793 = constructor_x64_cvtdq2ps(ctx, v1792);
+                                let v1794 = &C::xmm_to_xmm_mem(ctx, v1793);
+                                let v1795 = constructor_x64_addps(ctx, v1793, v1794);
+                                let v1796 = &C::xmm_to_xmm_mem(ctx, v1789);
+                                let v1797 = constructor_x64_addps(ctx, v1795, v1796);
+                                let v1798 = constructor_output_xmm(ctx, v1797);
+                                // Rule at src/isa/x64/lower.isle line 3362.
+                                return Some(v1798);
+                            }
+                            F64X2 => {
+                                let v1749 = C::def_inst(ctx, v376);
+                                if let Some(v1750) = v1749 {
+                                    let v1751 = &C::inst_data(ctx, v1750);
+                                    if let &InstructionData::Unary {
+                                        opcode: ref v1752,
+                                        arg: v1753,
+                                    } = v1751
+                                    {
+                                        if let &Opcode::UwidenLow = v1752 {
+                                            let v1754 = C::value_type(ctx, v1753);
+                                            if v1754 == I32X4 {
+                                                let v1770 =
+                                                    C::emit_u128_le_const(ctx, 0x4330000043300000);
+                                                let v1771 =
+                                                    &constructor_const_to_xmm_mem(ctx, v1770);
+                                                let v1772 = constructor_put_in_xmm(ctx, v1753);
+                                                let v1773 =
+                                                    constructor_x64_unpcklps(ctx, v1772, v1771);
+                                                let v1775 = C::emit_u128_le_const(
+                                                    ctx,
+                                                    0x43300000000000004330000000000000,
+                                                );
+                                                let v1776 =
+                                                    &constructor_const_to_xmm_mem(ctx, v1775);
+                                                let v1777 =
+                                                    constructor_x64_subpd(ctx, v1773, v1776);
+                                                let v1778 = constructor_output_xmm(ctx, v1777);
+                                                // Rule at src/isa/x64/lower.isle line 3326.
+                                                return Some(v1778);
+                                            }
+                                        }
+                                    }
+                                }
+                            }
+                            _ => {}
+                        }
+                        let v618 = C::value_type(ctx, v376);
+                        if v618 == I64 {
+                            let v377 = constructor_put_in_gpr(ctx, v376);
+                            let v1767 = constructor_cvt_u64_to_float_seq(ctx, v3, v377);
+                            let v1768 = constructor_output_xmm(ctx, v1767);
+                            // Rule at src/isa/x64/lower.isle line 3319.
+                            return Some(v1768);
+                        }
+                    }
+                }
+                &Opcode::FcvtFromSint => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v3 = C::value_type(ctx, v2);
+                        match v3 {
+                            F32 => {
+                                let v618 = C::value_type(ctx, v376);
+                                match v618 {
+                                    I8 => {
+                                        let v1174 = constructor_extend_to_gpr(
+                                            ctx,
+                                            v376,
+                                            I32,
+                                            &ExtendKind::Sign,
+                                        );
+                                        let v1733 = &C::gpr_to_gpr_mem(ctx, v1174);
+                                        let v1734 = constructor_x64_cvtsi2ss(ctx, I32, v1733);
+                                        let v1735 = constructor_output_xmm(ctx, v1734);
+                                        // Rule at src/isa/x64/lower.isle line 3287.
+                                        return Some(v1735);
+                                    }
+                                    I16 => {
+                                        let v1174 = constructor_extend_to_gpr(
+                                            ctx,
+                                            v376,
+                                            I32,
+                                            &ExtendKind::Sign,
+                                        );
+                                        let v1733 = &C::gpr_to_gpr_mem(ctx, v1174);
+                                        let v1734 = constructor_x64_cvtsi2ss(ctx, I32, v1733);
+                                        let v1735 = constructor_output_xmm(ctx, v1734);
+                                        // Rule at src/isa/x64/lower.isle line 3290.
+                                        return Some(v1735);
+                                    }
+                                    _ => {}
+                                }
+                                let v1736 = C::ty_int(ctx, v618);
+                                if let Some(v1737) = v1736 {
+                                    let v1738 = C::fits_in_64(ctx, v1737);
+                                    if let Some(v1739) = v1738 {
+                                        let v1740 = &constructor_put_in_gpr_mem(ctx, v376);
+                                        let v1741 = constructor_x64_cvtsi2ss(ctx, v1739, v1740);
+                                        let v1742 = constructor_output_xmm(ctx, v1741);
+                                        // Rule at src/isa/x64/lower.isle line 3293.
+                                        return Some(v1742);
+                                    }
+                                }
+                            }
+                            F64 => {
+                                let v618 = C::value_type(ctx, v376);
+                                match v618 {
+                                    I8 => {
+                                        let v1174 = constructor_extend_to_gpr(
+                                            ctx,
+                                            v376,
+                                            I32,
+                                            &ExtendKind::Sign,
+                                        );
+                                        let v1733 = &C::gpr_to_gpr_mem(ctx, v1174);
+                                        let v1743 = constructor_x64_cvtsi2sd(ctx, I32, v1733);
+                                        let v1744 = constructor_output_xmm(ctx, v1743);
+                                        // Rule at src/isa/x64/lower.isle line 3296.
+                                        return Some(v1744);
+                                    }
+                                    I16 => {
+                                        let v1174 = constructor_extend_to_gpr(
+                                            ctx,
+                                            v376,
+                                            I32,
+                                            &ExtendKind::Sign,
+                                        );
+                                        let v1733 = &C::gpr_to_gpr_mem(ctx, v1174);
+                                        let v1743 = constructor_x64_cvtsi2sd(ctx, I32, v1733);
+                                        let v1744 = constructor_output_xmm(ctx, v1743);
+                                        // Rule at src/isa/x64/lower.isle line 3299.
+                                        return Some(v1744);
+                                    }
+                                    _ => {}
+                                }
+                                let v1736 = C::ty_int(ctx, v618);
+                                if let Some(v1737) = v1736 {
+                                    let v1738 = C::fits_in_64(ctx, v1737);
+                                    if let Some(v1739) = v1738 {
+                                        let v1740 = &constructor_put_in_gpr_mem(ctx, v376);
+                                        let v1745 = constructor_x64_cvtsi2sd(ctx, v1739, v1740);
+                                        let v1746 = constructor_output_xmm(ctx, v1745);
+                                        // Rule at src/isa/x64/lower.isle line 3302.
+                                        return Some(v1746);
+                                    }
+                                }
+                            }
+                            F64X2 => {
+                                let v1749 = C::def_inst(ctx, v376);
+                                if let Some(v1750) = v1749 {
+                                    let v1751 = &C::inst_data(ctx, v1750);
+                                    if let &InstructionData::Unary {
+                                        opcode: ref v1752,
+                                        arg: v1753,
+                                    } = v1751
+                                    {
+                                        if let &Opcode::SwidenLow = v1752 {
+                                            let v1754 = C::value_type(ctx, v1753);
+                                            if v1754 == I32X4 {
+                                                let v1755 = &C::put_in_xmm_mem(ctx, v1753);
+                                                let v1756 = constructor_x64_cvtdq2pd(ctx, v1755);
+                                                let v1757 = constructor_output_xmm(ctx, v1756);
+                                                // Rule at src/isa/x64/lower.isle line 3308.
+                                                return Some(v1757);
+                                            }
+                                        }
+                                    }
+                                }
+                            }
+                            _ => {}
+                        }
+                    }
+                    let v618 = C::value_type(ctx, v376);
+                    if v618 == I32X4 {
+                        let v521 = &C::put_in_xmm_mem(ctx, v376);
+                        let v1747 = constructor_x64_cvtdq2ps(ctx, v521);
+                        let v1748 = constructor_output_xmm(ctx, v1747);
+                        // Rule at src/isa/x64/lower.isle line 3305.
+                        return Some(v1748);
+                    }
+                }
+                &Opcode::Isplit => {
+                    let v618 = C::value_type(ctx, v376);
+                    if v618 == I128 {
+                        let v380 = C::put_in_regs(ctx, v376);
+                        let v2451 = C::value_regs_get(ctx, v380, 0x0);
+                        let v2452 = C::value_regs_get(ctx, v380, 0x1);
+                        let v2453 = C::value_reg(ctx, v2451);
+                        let v2454 = C::value_reg(ctx, v2452);
+                        let v2455 = C::output_pair(ctx, v2453, v2454);
+                        // Rule at src/isa/x64/lower.isle line 4543.
+                        return Some(v2455);
+                    }
+                }
+                _ => {}
+            }
+        }
+        &InstructionData::UnaryConst {
+            opcode: ref v2162,
+            constant_handle: v2163,
+        } => {
+            if let &Opcode::Vconst = v2162 {
+                let v1 = C::first_result(ctx, arg0);
+                if let Some(v2) = v1 {
+                    let v2164 = C::const_to_vconst(ctx, v2163);
+                    let v3 = C::value_type(ctx, v2);
+                    let v2165 = constructor_x64_xmm_load_const(ctx, v3, v2164);
+                    let v2166 = constructor_output_xmm(ctx, v2165);
+                    // Rule at src/isa/x64/lower.isle line 4113.
+                    return Some(v2166);
+                }
+            }
+        }
+        &InstructionData::UnaryGlobalValue {
+            opcode: ref v1626,
+            global_value: v1627,
+        } => {
+            match v1626 {
+                &Opcode::SymbolValue => {
+                    let v1628 = C::symbol_value_data(ctx, v1627);
+                    if let Some(v1629) = v1628 {
+                        let v1633 = constructor_load_ext_name(ctx, v1629.0, v1629.2, v1629.1);
+                        let v1634 = constructor_output_reg(ctx, v1633);
+                        // Rule at src/isa/x64/lower.isle line 3132.
+                        return Some(v1634);
+                    }
+                }
+                &Opcode::TlsValue => {
+                    let v1 = C::first_result(ctx, arg0);
+                    if let Some(v2) = v1 {
+                        let v1628 = C::symbol_value_data(ctx, v1627);
+                        if let Some(v1629) = v1628 {
+                            let v3 = C::value_type(ctx, v2);
+                            let v2456 = &C::tls_model(ctx, v3);
+                            match v2456 {
+                                &TlsModel::ElfGd => {
+                                    let v2457 = constructor_elf_tls_get_addr(ctx, v1629.0);
+                                    let v2458 = constructor_output_gpr(ctx, v2457);
+                                    // Rule at src/isa/x64/lower.isle line 4551.
+                                    return Some(v2458);
+                                }
+                                &TlsModel::Macho => {
+                                    let v2459 = constructor_macho_tls_get_addr(ctx, v1629.0);
+                                    let v2460 = constructor_output_gpr(ctx, v2459);
+                                    // Rule at src/isa/x64/lower.isle line 4554.
+                                    return Some(v2460);
+                                }
+                                &TlsModel::Coff => {
+                                    let v2461 = constructor_coff_tls_get_addr(ctx, v1629.0);
+                                    let v2462 = constructor_output_gpr(ctx, v2461);
+                                    // Rule at src/isa/x64/lower.isle line 4557.
+                                    return Some(v2462);
+                                }
+                                _ => {}
+                            }
+                        }
+                    }
+                }
+                _ => {}
+            }
+        }
+        &InstructionData::UnaryIeee32 {
+            opcode: ref v18,
+            imm: v19,
+        } => {
+            if let &Opcode::F32const = v18 {
+                let v20 = C::u32_from_ieee32(ctx, v19);
+                let v22 = C::u32_as_u64(ctx, v20);
+                let v23 = constructor_imm(ctx, F32, v22);
+                let v24 = constructor_output_reg(ctx, v23);
+                // Rule at src/isa/x64/lower.isle line 27.
+                return Some(v24);
+            }
+        }
+        &InstructionData::UnaryIeee64 {
+            opcode: ref v25,
+            imm: v26,
+        } => {
+            if let &Opcode::F64const = v25 {
+                let v27 = C::u64_from_ieee64(ctx, v26);
+                let v29 = constructor_imm(ctx, F64, v27);
+                let v30 = constructor_output_reg(ctx, v29);
+                // Rule at src/isa/x64/lower.isle line 32.
+                return Some(v30);
+            }
+        }
+        &InstructionData::UnaryImm {
+            opcode: ref v7,
+            imm: v8,
+        } => {
+            if let &Opcode::Iconst = v7 {
+                let v1 = C::first_result(ctx, arg0);
+                if let Some(v2) = v1 {
+                    let v3 = C::value_type(ctx, v2);
+                    if v3 == I128 {
+                        let v9 = C::u64_from_imm64(ctx, v8);
+                        let v13 = constructor_imm(ctx, I64, v9);
+                        let v15 = constructor_imm(ctx, I64, 0x0);
+                        let v16 = C::value_regs(ctx, v13, v15);
+                        let v17 = C::output(ctx, v16);
+                        // Rule at src/isa/x64/lower.isle line 20.
+                        return Some(v17);
+                    }
+                    let v4 = C::fits_in_64(ctx, v3);
+                    if let Some(v5) = v4 {
+                        let v9 = C::u64_from_imm64(ctx, v8);
+                        let v10 = constructor_imm(ctx, v5, v9);
+                        let v11 = constructor_output_reg(ctx, v10);
+                        // Rule at src/isa/x64/lower.isle line 15.
+                        return Some(v11);
+                    }
+                }
+            }
+        }
+        _ => {}
+    }
+    None
+}
+
+// Generated as internal constructor for term lower_branch.
+pub fn constructor_lower_branch<C: Context>(
+    ctx: &mut C,
+    arg0: Inst,
+    arg1: &MachLabelSlice,
+) -> Option<Unit> {
+    let v1 = &C::inst_data(ctx, arg0);
+    match v1 {
+        &InstructionData::BranchTable {
+            opcode: ref v55,
+            arg: v56,
+            table: v57,
+        } => {
+            if let &Opcode::BrTable = v55 {
+                let v59 = C::jump_table_targets(ctx, arg1);
+                if let Some(v60) = v59 {
+                    let v58 = C::value_type(ctx, v56);
+                    let v63 = &C::raw_operand_size_of_type(ctx, v58);
+                    let v64 = C::jump_table_size(ctx, &v60.1);
+                    let v65 = C::u32_as_u64(ctx, v64);
+                    let v66 = constructor_imm(ctx, v58, v65);
+                    let v69 = constructor_extend_to_gpr(ctx, v56, I64, &ExtendKind::Zero);
+                    let v70 = &constructor_reg_to_gpr_mem_imm(ctx, v66);
+                    let v71 = &constructor_x64_cmp(ctx, v63, v70, v69);
+                    let v73 = &C::gpr_to_gpr_mem(ctx, v69);
+                    let v74 = C::gpr_new(ctx, v66);
+                    let v75 = &constructor_cmove(ctx, v58, &CC::B, v73, v74);
+                    let v76 = constructor_with_flags_reg(ctx, v71, v75);
+                    let v77 = C::gpr_new(ctx, v76);
+                    let v78 = &constructor_jmp_table_seq(ctx, v58, v77, v60.0, &v60.1);
+                    let v79 = constructor_emit_side_effect(ctx, v78);
+                    // Rule at src/isa/x64/lower.isle line 3261.
+                    return Some(v79);
+                }
+            }
+        }
+        &InstructionData::Brif {
+            opcode: ref v9,
+            arg: v10,
+            blocks: ref v11,
+        } => {
+            if let &Opcode::Brif = v9 {
+                let v26 = C::two_targets(ctx, arg1);
+                if let Some(v27) = v26 {
+                    let v12 = C::maybe_uextend(ctx, v10);
+                    if let Some(v13) = v12 {
+                        let v14 = C::def_inst(ctx, v13);
+                        if let Some(v15) = v14 {
+                            let v16 = &C::inst_data(ctx, v15);
+                            match v16 {
+                                &InstructionData::FloatCompare {
+                                    opcode: ref v33,
+                                    args: ref v34,
+                                    cond: ref v35,
+                                } => {
+                                    if let &Opcode::Fcmp = v33 {
+                                        let v36 = C::unpack_value_array_2(ctx, v34);
+                                        let v39 = &constructor_emit_fcmp(ctx, v35, v36.0, v36.1);
+                                        let v40 =
+                                            &constructor_jmp_cond_fcmp(ctx, v39, v27.0, v27.1);
+                                        let v41 = constructor_emit_side_effect(ctx, v40);
+                                        // Rule at src/isa/x64/lower.isle line 3222.
+                                        return Some(v41);
+                                    }
+                                }
+                                &InstructionData::IntCompare {
+                                    opcode: ref v17,
+                                    args: ref v18,
+                                    cond: ref v19,
+                                } => {
+                                    if let &Opcode::Icmp = v17 {
+                                        let v20 = C::unpack_value_array_2(ctx, v18);
+                                        let v30 = &constructor_emit_cmp(ctx, v19, v20.0, v20.1);
+                                        let v31 =
+                                            &constructor_jmp_cond_icmp(ctx, v30, v27.0, v27.1);
+                                        let v32 = constructor_emit_side_effect(ctx, v31);
+                                        // Rule at src/isa/x64/lower.isle line 3219.
+                                        return Some(v32);
+                                    }
+                                }
+                                _ => {}
+                            }
+                        }
+                    }
+                    let v42 = C::value_type(ctx, v10);
+                    if v42 == I128 {
+                        let v44 = C::put_in_regs(ctx, v10);
+                        let v45 = &constructor_cmp_zero_i128(ctx, &CC::Z, v44);
+                        let v46 = &constructor_jmp_cond_icmp(ctx, v45, v27.0, v27.1);
+                        let v47 = constructor_emit_side_effect(ctx, v46);
+                        // Rule at src/isa/x64/lower.isle line 3225.
+                        return Some(v47);
+                    }
+                    let v48 = C::ty_int_bool_or_ref(ctx, v42);
+                    if let Some(v49) = v48 {
+                        let v50 = &constructor_cmp_zero_int_bool_ref(ctx, v10);
+                        let v52 = &constructor_jmp_cond(ctx, &CC::NZ, v27.0, v27.1);
+                        let v53 = &constructor_with_flags_side_effect(ctx, v50, v52);
+                        let v54 = constructor_emit_side_effect(ctx, v53);
+                        // Rule at src/isa/x64/lower.isle line 3229.
+                        return Some(v54);
+                    }
+                }
+            }
+        }
+        &InstructionData::Jump {
+            opcode: ref v2,
+            destination: v3,
+        } => {
+            if let &Opcode::Jump = v2 {
+                let v5 = C::single_target(ctx, arg1);
+                if let Some(v6) = v5 {
+                    let v7 = &constructor_jmp_known(ctx, v6);
+                    let v8 = constructor_emit_side_effect(ctx, v7);
+                    // Rule at src/isa/x64/lower.isle line 3214.
+                    return Some(v8);
+                }
+            }
+        }
+        _ => {}
+    }
+    None
+}
+
+// Generated as internal constructor for term construct_overflow_op.
+pub fn constructor_construct_overflow_op<C: Context>(
+    ctx: &mut C,
+    arg0: &CC,
+    arg1: &ProducesFlags,
+) -> InstOutput {
+    let v2 = &constructor_x64_setcc_paired(ctx, arg0);
+    let v3 = constructor_with_flags(ctx, arg1, v2);
+    let v5 = C::value_regs_get(ctx, v3, 0x0);
+    let v6 = C::value_reg(ctx, v5);
+    let v8 = C::value_regs_get(ctx, v3, 0x1);
+    let v9 = C::value_reg(ctx, v8);
+    let v10 = C::output_pair(ctx, v6, v9);
+    // Rule at src/isa/x64/lower.isle line 104.
+    return v10;
+}
+
+// Generated as internal constructor for term construct_overflow_op_alu.
+pub fn constructor_construct_overflow_op_alu<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &CC,
+    arg2: &AluRmiROpcode,
+    arg3: Gpr,
+    arg4: &GprMemImm,
+) -> InstOutput {
+    let v5 = &constructor_x64_alurmi_with_flags_paired(ctx, arg2, arg0, arg3, arg4);
+    let v6 = constructor_construct_overflow_op(ctx, arg1, v5);
+    // Rule at src/isa/x64/lower.isle line 111.
+    return v6;
+}
+
+// Generated as internal constructor for term construct_overflow_op_alu_128.
+pub fn constructor_construct_overflow_op_alu_128<C: Context>(
+    ctx: &mut C,
+    arg0: &CC,
+    arg1: &AluRmiROpcode,
+    arg2: &AluRmiROpcode,
+    arg3: Value,
+    arg4: Value,
+) -> InstOutput {
+    let v5 = C::put_in_regs(ctx, arg3);
+    let v7 = constructor_value_regs_get_gpr(ctx, v5, 0x0);
+    let v9 = constructor_value_regs_get_gpr(ctx, v5, 0x1);
+    let v10 = C::put_in_regs(ctx, arg4);
+    let v11 = constructor_value_regs_get_gpr(ctx, v10, 0x0);
+    let v12 = constructor_value_regs_get_gpr(ctx, v10, 0x1);
+    let v14 = &C::gpr_to_gpr_mem_imm(ctx, v11);
+    let v15 = &constructor_x64_alurmi_with_flags_paired(ctx, arg1, I64, v7, v14);
+    let v16 = &C::gpr_to_gpr_mem_imm(ctx, v12);
+    let v17 = &constructor_x64_alurmi_with_flags_chained(ctx, arg2, I64, v9, v16);
+    let v18 = &constructor_x64_setcc_paired(ctx, arg0);
+    let v19 = &constructor_with_flags_chained(ctx, v15, v17, v18);
+    let v20 = constructor_multi_reg_to_pair_and_single(ctx, v19);
+    // Rule at src/isa/x64/lower.isle line 119.
+    return v20;
+}
+
+// Generated as internal constructor for term sse_and.
+pub fn constructor_sse_and<C: Context>(ctx: &mut C, arg0: Type, arg1: Xmm, arg2: &XmmMem) -> Xmm {
+    match arg0 {
+        F32 => {
+            let v3 = constructor_x64_andps(ctx, arg1, arg2);
+            // Rule at src/isa/x64/lower.isle line 293.
+            return v3;
+        }
+        F64 => {
+            let v4 = constructor_x64_andpd(ctx, arg1, arg2);
+            // Rule at src/isa/x64/lower.isle line 294.
+            return v4;
+        }
+        F32X4 => {
+            let v3 = constructor_x64_andps(ctx, arg1, arg2);
+            // Rule at src/isa/x64/lower.isle line 291.
+            return v3;
+        }
+        F64X2 => {
+            let v4 = constructor_x64_andpd(ctx, arg1, arg2);
+            // Rule at src/isa/x64/lower.isle line 292.
+            return v4;
+        }
+        _ => {}
+    }
+    let v5 = C::multi_lane(ctx, arg0);
+    if let Some(v6) = v5 {
+        let v9 = constructor_x64_pand(ctx, arg1, arg2);
+        // Rule at src/isa/x64/lower.isle line 295.
+        return v9;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "sse_and", "src/isa/x64/lower.isle line 290"
+    )
+}
+
+// Generated as internal constructor for term sse_and_not.
+pub fn constructor_sse_and_not<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Xmm,
+    arg2: &XmmMem,
+) -> Xmm {
+    match arg0 {
+        F32X4 => {
+            let v3 = constructor_x64_andnps(ctx, arg1, arg2);
+            // Rule at src/isa/x64/lower.isle line 318.
+            return v3;
+        }
+        F64X2 => {
+            let v4 = constructor_x64_andnpd(ctx, arg1, arg2);
+            // Rule at src/isa/x64/lower.isle line 319.
+            return v4;
+        }
+        _ => {}
+    }
+    let v5 = C::multi_lane(ctx, arg0);
+    if let Some(v6) = v5 {
+        let v9 = constructor_x64_pandn(ctx, arg1, arg2);
+        // Rule at src/isa/x64/lower.isle line 320.
+        return v9;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "sse_and_not", "src/isa/x64/lower.isle line 317"
+    )
+}
+
+// Generated as internal constructor for term sse_or.
+pub fn constructor_sse_or<C: Context>(ctx: &mut C, arg0: Type, arg1: Xmm, arg2: &XmmMem) -> Xmm {
+    match arg0 {
+        F32 => {
+            let v3 = constructor_x64_orps(ctx, arg1, arg2);
+            // Rule at src/isa/x64/lower.isle line 392.
+            return v3;
+        }
+        F64 => {
+            let v4 = constructor_x64_orpd(ctx, arg1, arg2);
+            // Rule at src/isa/x64/lower.isle line 393.
+            return v4;
+        }
+        F32X4 => {
+            let v3 = constructor_x64_orps(ctx, arg1, arg2);
+            // Rule at src/isa/x64/lower.isle line 390.
+            return v3;
+        }
+        F64X2 => {
+            let v4 = constructor_x64_orpd(ctx, arg1, arg2);
+            // Rule at src/isa/x64/lower.isle line 391.
+            return v4;
+        }
+        _ => {}
+    }
+    let v5 = C::multi_lane(ctx, arg0);
+    if let Some(v6) = v5 {
+        let v9 = constructor_x64_por(ctx, arg1, arg2);
+        // Rule at src/isa/x64/lower.isle line 394.
+        return v9;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "sse_or", "src/isa/x64/lower.isle line 389"
+    )
+}
+
+// Generated as internal constructor for term or_i128.
+pub fn constructor_or_i128<C: Context>(ctx: &mut C, arg0: ValueRegs, arg1: ValueRegs) -> ValueRegs {
+    let v3 = constructor_value_regs_get_gpr(ctx, arg0, 0x0);
+    let v5 = constructor_value_regs_get_gpr(ctx, arg0, 0x1);
+    let v6 = constructor_value_regs_get_gpr(ctx, arg1, 0x0);
+    let v7 = constructor_value_regs_get_gpr(ctx, arg1, 0x1);
+    let v9 = &C::gpr_to_gpr_mem_imm(ctx, v6);
+    let v10 = constructor_x64_or(ctx, I64, v3, v9);
+    let v11 = &C::gpr_to_gpr_mem_imm(ctx, v7);
+    let v12 = constructor_x64_or(ctx, I64, v5, v11);
+    let v13 = constructor_value_gprs(ctx, v10, v12);
+    // Rule at src/isa/x64/lower.isle line 403.
+    return v13;
+}
+
+// Generated as internal constructor for term shl_i128.
+pub fn constructor_shl_i128<C: Context>(ctx: &mut C, arg0: ValueRegs, arg1: Gpr) -> ValueRegs {
+    let v3 = constructor_value_regs_get_gpr(ctx, arg0, 0x0);
+    let v5 = constructor_value_regs_get_gpr(ctx, arg0, 0x1);
+    let v7 = &C::gpr_to_imm8_gpr(ctx, arg1);
+    let v8 = constructor_x64_shl(ctx, I64, v3, v7);
+    let v9 = &C::gpr_to_imm8_gpr(ctx, arg1);
+    let v10 = constructor_x64_shl(ctx, I64, v5, v9);
+    let v12 = constructor_imm(ctx, I64, 0x40);
+    let v13 = C::gpr_new(ctx, v12);
+    let v14 = &C::gpr_to_gpr_mem_imm(ctx, arg1);
+    let v15 = constructor_x64_sub(ctx, I64, v13, v14);
+    let v16 = &C::gpr_to_imm8_gpr(ctx, v15);
+    let v17 = constructor_x64_shr(ctx, I64, v3, v16);
+    let v19 = constructor_imm(ctx, I64, 0x0);
+    let v20 = C::gpr_new(ctx, v19);
+    let v23 = RegMemImm::Imm { simm32: 0x7F };
+    let v24 = &C::gpr_mem_imm_new(ctx, &v23);
+    let v25 = &constructor_x64_test(ctx, &OperandSize::Size64, v24, arg1);
+    let v27 = &C::gpr_to_gpr_mem(ctx, v20);
+    let v28 = &constructor_cmove(ctx, I64, &CC::Z, v27, v17);
+    let v29 = constructor_with_flags_reg(ctx, v25, v28);
+    let v30 = C::gpr_new(ctx, v29);
+    let v31 = &C::gpr_to_gpr_mem_imm(ctx, v10);
+    let v32 = constructor_x64_or(ctx, I64, v30, v31);
+    let v34 = RegMemImm::Imm { simm32: 0x40 };
+    let v35 = &C::gpr_mem_imm_new(ctx, &v34);
+    let v36 = &constructor_x64_test(ctx, &OperandSize::Size64, v35, arg1);
+    let v37 = &C::gpr_to_gpr_mem(ctx, v8);
+    let v38 = &constructor_cmove(ctx, I64, &CC::Z, v37, v20);
+    let v39 = &C::gpr_to_gpr_mem(ctx, v32);
+    let v40 = &constructor_cmove(ctx, I64, &CC::Z, v39, v8);
+    let v41 = &constructor_consumes_flags_concat(ctx, v38, v40);
+    let v42 = constructor_with_flags(ctx, v36, v41);
+    // Rule at src/isa/x64/lower.isle line 475.
+    return v42;
+}
+
+// Generated as internal constructor for term ishl_i8x16_mask.
+pub fn constructor_ishl_i8x16_mask<C: Context>(ctx: &mut C, arg0: &RegMemImm) -> SyntheticAmode {
+    match arg0 {
+        &RegMemImm::Reg { reg: v3 } => {
+            let v4 = &C::ishl_i8x16_mask_table(ctx);
+            let v6 = constructor_x64_lea(ctx, I64, v4);
+            let v7 = C::gpr_new(ctx, v3);
+            let v9 = &C::imm8_to_imm8_gpr(ctx, 0x4);
+            let v10 = constructor_x64_shl(ctx, I64, v7, v9);
+            let v13 = C::mem_flags_trusted(ctx);
+            let v14 = Amode::ImmRegRegShift {
+                simm32: 0x0,
+                base: v6,
+                index: v10,
+                shift: 0x0,
+                flags: v13,
+            };
+            let v15 = &C::amode_to_synthetic_amode(ctx, &v14);
+            // Rule at src/isa/x64/lower.isle line 549.
+            return v15.clone();
+        }
+        &RegMemImm::Mem { addr: ref v16 } => {
+            let v18 = constructor_x64_load(ctx, I64, v16, &ExtKind::None);
+            let v19 = RegMemImm::Reg { reg: v18 };
+            let v20 = &constructor_ishl_i8x16_mask(ctx, &v19);
+            // Rule at src/isa/x64/lower.isle line 560.
+            return v20.clone();
+        }
+        &RegMemImm::Imm { simm32: v1 } => {
+            let v2 = &C::ishl_i8x16_mask_for_const(ctx, v1);
+            // Rule at src/isa/x64/lower.isle line 540.
+            return v2.clone();
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "ishl_i8x16_mask", "src/isa/x64/lower.isle line 534"
+    )
+}
+
+// Generated as internal constructor for term shr_i128.
+pub fn constructor_shr_i128<C: Context>(ctx: &mut C, arg0: ValueRegs, arg1: Gpr) -> ValueRegs {
+    let v3 = constructor_value_regs_get_gpr(ctx, arg0, 0x0);
+    let v5 = constructor_value_regs_get_gpr(ctx, arg0, 0x1);
+    let v7 = &C::gpr_to_imm8_gpr(ctx, arg1);
+    let v8 = constructor_x64_shr(ctx, I64, v3, v7);
+    let v9 = &C::gpr_to_imm8_gpr(ctx, arg1);
+    let v10 = constructor_x64_shr(ctx, I64, v5, v9);
+    let v12 = constructor_imm(ctx, I64, 0x40);
+    let v13 = C::gpr_new(ctx, v12);
+    let v14 = &C::gpr_to_gpr_mem_imm(ctx, arg1);
+    let v15 = constructor_x64_sub(ctx, I64, v13, v14);
+    let v16 = &C::gpr_to_imm8_gpr(ctx, v15);
+    let v17 = constructor_x64_shl(ctx, I64, v5, v16);
+    let v19 = constructor_imm(ctx, I64, 0x0);
+    let v20 = C::gpr_new(ctx, v19);
+    let v23 = RegMemImm::Imm { simm32: 0x7F };
+    let v24 = &C::gpr_mem_imm_new(ctx, &v23);
+    let v25 = &constructor_x64_test(ctx, &OperandSize::Size64, v24, arg1);
+    let v27 = &C::gpr_to_gpr_mem(ctx, v20);
+    let v28 = &constructor_cmove(ctx, I64, &CC::Z, v27, v17);
+    let v29 = constructor_with_flags_reg(ctx, v25, v28);
+    let v30 = C::gpr_new(ctx, v29);
+    let v31 = &C::gpr_to_gpr_mem_imm(ctx, v8);
+    let v32 = constructor_x64_or(ctx, I64, v30, v31);
+    let v34 = RegMemImm::Imm { simm32: 0x40 };
+    let v35 = &C::gpr_mem_imm_new(ctx, &v34);
+    let v36 = &constructor_x64_test(ctx, &OperandSize::Size64, v35, arg1);
+    let v37 = &C::gpr_to_gpr_mem(ctx, v32);
+    let v38 = &constructor_cmove(ctx, I64, &CC::Z, v37, v10);
+    let v39 = &C::gpr_to_gpr_mem(ctx, v10);
+    let v40 = &constructor_cmove(ctx, I64, &CC::Z, v39, v20);
+    let v41 = &constructor_consumes_flags_concat(ctx, v38, v40);
+    let v42 = constructor_with_flags(ctx, v36, v41);
+    // Rule at src/isa/x64/lower.isle line 585.
+    return v42;
+}
+
+// Generated as internal constructor for term ushr_i8x16_mask.
+pub fn constructor_ushr_i8x16_mask<C: Context>(ctx: &mut C, arg0: &RegMemImm) -> SyntheticAmode {
+    match arg0 {
+        &RegMemImm::Reg { reg: v3 } => {
+            let v4 = &C::ushr_i8x16_mask_table(ctx);
+            let v6 = constructor_x64_lea(ctx, I64, v4);
+            let v7 = C::gpr_new(ctx, v3);
+            let v9 = &C::imm8_to_imm8_gpr(ctx, 0x4);
+            let v10 = constructor_x64_shl(ctx, I64, v7, v9);
+            let v13 = C::mem_flags_trusted(ctx);
+            let v14 = Amode::ImmRegRegShift {
+                simm32: 0x0,
+                base: v6,
+                index: v10,
+                shift: 0x0,
+                flags: v13,
+            };
+            let v15 = &C::amode_to_synthetic_amode(ctx, &v14);
+            // Rule at src/isa/x64/lower.isle line 654.
+            return v15.clone();
+        }
+        &RegMemImm::Mem { addr: ref v16 } => {
+            let v18 = constructor_x64_load(ctx, I64, v16, &ExtKind::None);
+            let v19 = RegMemImm::Reg { reg: v18 };
+            let v20 = &constructor_ushr_i8x16_mask(ctx, &v19);
+            // Rule at src/isa/x64/lower.isle line 666.
+            return v20.clone();
+        }
+        &RegMemImm::Imm { simm32: v1 } => {
+            let v2 = &C::ushr_i8x16_mask_for_const(ctx, v1);
+            // Rule at src/isa/x64/lower.isle line 645.
+            return v2.clone();
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "ushr_i8x16_mask", "src/isa/x64/lower.isle line 639"
+    )
+}
+
+// Generated as internal constructor for term mask_xmm_shift.
+pub fn constructor_mask_xmm_shift<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> RegMemImm {
+    let v11 = C::def_inst(ctx, arg1);
+    if let Some(v12) = v11 {
+        let v13 = &C::inst_data(ctx, v12);
+        if let &InstructionData::UnaryImm {
+            opcode: ref v14,
+            imm: v15,
+        } = v13
+        {
+            if let &Opcode::Iconst = v14 {
+                let v16 = C::shift_amount_masked(ctx, arg0, v15);
+                let v17 = C::u8_as_u32(ctx, v16);
+                let v18 = RegMemImm::Imm { simm32: v17 };
+                // Rule at src/isa/x64/lower.isle line 683.
+                return v18;
+            }
+        }
+    }
+    let v3 = constructor_put_in_gpr(ctx, arg1);
+    let v4 = C::shift_mask(ctx, arg0);
+    let v5 = C::u8_as_u32(ctx, v4);
+    let v6 = RegMemImm::Imm { simm32: v5 };
+    let v7 = &C::gpr_mem_imm_new(ctx, &v6);
+    let v8 = constructor_x64_and(ctx, I64, v3, v7);
+    let v9 = C::gpr_to_reg(ctx, v8);
+    let v10 = &C::reg_to_reg_mem_imm(ctx, v9);
+    // Rule at src/isa/x64/lower.isle line 681.
+    return v10.clone();
+}
+
+// Generated as internal constructor for term sar_i128.
+pub fn constructor_sar_i128<C: Context>(ctx: &mut C, arg0: ValueRegs, arg1: Gpr) -> ValueRegs {
+    let v3 = constructor_value_regs_get_gpr(ctx, arg0, 0x0);
+    let v5 = constructor_value_regs_get_gpr(ctx, arg0, 0x1);
+    let v7 = &C::gpr_to_imm8_gpr(ctx, arg1);
+    let v8 = constructor_x64_shr(ctx, I64, v3, v7);
+    let v9 = &C::gpr_to_imm8_gpr(ctx, arg1);
+    let v10 = constructor_x64_sar(ctx, I64, v5, v9);
+    let v12 = constructor_imm(ctx, I64, 0x40);
+    let v13 = C::gpr_new(ctx, v12);
+    let v14 = &C::gpr_to_gpr_mem_imm(ctx, arg1);
+    let v15 = constructor_x64_sub(ctx, I64, v13, v14);
+    let v16 = &C::gpr_to_imm8_gpr(ctx, v15);
+    let v17 = constructor_x64_shl(ctx, I64, v5, v16);
+    let v20 = RegMemImm::Imm { simm32: 0x7F };
+    let v21 = &C::gpr_mem_imm_new(ctx, &v20);
+    let v22 = &constructor_x64_test(ctx, &OperandSize::Size64, v21, arg1);
+    let v25 = constructor_imm(ctx, I64, 0x0);
+    let v26 = &C::reg_to_gpr_mem(ctx, v25);
+    let v27 = &constructor_cmove(ctx, I64, &CC::Z, v26, v17);
+    let v28 = constructor_with_flags_reg(ctx, v22, v27);
+    let v29 = C::gpr_new(ctx, v28);
+    let v30 = &C::gpr_to_gpr_mem_imm(ctx, v29);
+    let v31 = constructor_x64_or(ctx, I64, v8, v30);
+    let v33 = &C::imm8_to_imm8_gpr(ctx, 0x3F);
+    let v34 = constructor_x64_sar(ctx, I64, v5, v33);
+    let v36 = RegMemImm::Imm { simm32: 0x40 };
+    let v37 = &C::gpr_mem_imm_new(ctx, &v36);
+    let v38 = &constructor_x64_test(ctx, &OperandSize::Size64, v37, arg1);
+    let v39 = &C::gpr_to_gpr_mem(ctx, v31);
+    let v40 = &constructor_cmove(ctx, I64, &CC::Z, v39, v10);
+    let v41 = &C::gpr_to_gpr_mem(ctx, v10);
+    let v42 = &constructor_cmove(ctx, I64, &CC::Z, v41, v34);
+    let v43 = &constructor_consumes_flags_concat(ctx, v40, v42);
+    let v44 = constructor_with_flags(ctx, v38, v43);
+    // Rule at src/isa/x64/lower.isle line 697.
+    return v44;
+}
+
+// Generated as internal constructor for term sshr_i8x16_bigger_shift.
+pub fn constructor_sshr_i8x16_bigger_shift<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &RegMemImm,
+) -> XmmMemImm {
+    match arg1 {
+        &RegMemImm::Reg { reg: v7 } => {
+            let v8 = C::gpr_new(ctx, v7);
+            let v9 = RegMemImm::Imm { simm32: 0x8 };
+            let v10 = &C::gpr_mem_imm_new(ctx, &v9);
+            let v11 = constructor_x64_add(ctx, arg0, v8, v10);
+            let v12 = C::gpr_to_reg(ctx, v11);
+            let v13 = RegMemImm::Reg { reg: v12 };
+            let v14 = &constructor_mov_rmi_to_xmm(ctx, &v13);
+            // Rule at src/isa/x64/lower.isle line 765.
+            return v14.clone();
+        }
+        &RegMemImm::Mem { addr: ref v15 } => {
+            let v17 = constructor_imm(ctx, arg0, 0x8);
+            let v18 = C::gpr_new(ctx, v17);
+            let v19 = &C::gpr_mem_imm_new(ctx, arg1);
+            let v20 = constructor_x64_add(ctx, arg0, v18, v19);
+            let v21 = C::gpr_to_reg(ctx, v20);
+            let v22 = RegMemImm::Reg { reg: v21 };
+            let v23 = &constructor_mov_rmi_to_xmm(ctx, &v22);
+            // Rule at src/isa/x64/lower.isle line 769.
+            return v23.clone();
+        }
+        &RegMemImm::Imm { simm32: v2 } => {
+            let v4 = C::u32_add(ctx, v2, 0x8);
+            let v5 = RegMemImm::Imm { simm32: v4 };
+            let v6 = &C::xmm_mem_imm_new(ctx, &v5);
+            // Rule at src/isa/x64/lower.isle line 763.
+            return v6.clone();
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "sshr_i8x16_bigger_shift", "src/isa/x64/lower.isle line 762"
+    )
+}
+
+// Generated as internal constructor for term lower_i64x2_sshr_imm.
+pub fn constructor_lower_i64x2_sshr_imm<C: Context>(ctx: &mut C, arg0: Xmm, arg1: u32) -> Xmm {
+    let v2 = C::u32_as_u64(ctx, arg1);
+    let v4 = C::u64_lt(ctx, v2, 0x20);
+    if v4 == true {
+        let v5 = &C::xmi_imm(ctx, arg1);
+        let v6 = constructor_x64_psrad(ctx, arg0, v5);
+        let v7 = &C::xmm_to_xmm_mem(ctx, v6);
+        let v9 = constructor_x64_pshufd(ctx, v7, 0xED);
+        let v10 = &C::xmi_imm(ctx, arg1);
+        let v11 = constructor_x64_psrlq(ctx, arg0, v10);
+        let v12 = &C::xmm_to_xmm_mem(ctx, v11);
+        let v14 = constructor_x64_pshufd(ctx, v12, 0xE8);
+        let v15 = &C::xmm_to_xmm_mem(ctx, v9);
+        let v16 = constructor_x64_punpckldq(ctx, v14, v15);
+        // Rule at src/isa/x64/lower.isle line 808.
+        return v16;
+    }
+    if arg1 == 0x20 {
+        let v17 = &C::xmm_to_xmm_mem(ctx, arg0);
+        let v18 = constructor_x64_pshufd(ctx, v17, 0xED);
+        let v20 = &C::xmi_imm(ctx, 0x1F);
+        let v21 = constructor_x64_psrad(ctx, arg0, v20);
+        let v22 = &C::xmm_to_xmm_mem(ctx, v21);
+        let v23 = constructor_x64_pshufd(ctx, v22, 0xED);
+        let v24 = &C::xmm_to_xmm_mem(ctx, v23);
+        let v25 = constructor_x64_punpckldq(ctx, v18, v24);
+        // Rule at src/isa/x64/lower.isle line 819.
+        return v25;
+    }
+    let v26 = C::u64_lt(ctx, 0x20, v2);
+    if v26 == true {
+        let v27 = &C::xmi_imm(ctx, 0x1F);
+        let v28 = constructor_x64_psrad(ctx, arg0, v27);
+        let v29 = &C::xmm_to_xmm_mem(ctx, v28);
+        let v30 = constructor_x64_pshufd(ctx, v29, 0xED);
+        let v32 = C::u32_sub(ctx, arg1, 0x20);
+        let v33 = &C::xmi_imm(ctx, v32);
+        let v34 = constructor_x64_psrad(ctx, arg0, v33);
+        let v35 = &C::xmm_to_xmm_mem(ctx, v34);
+        let v37 = constructor_x64_pshufd(ctx, v35, 0xE9);
+        let v38 = &C::xmm_to_xmm_mem(ctx, v30);
+        let v39 = constructor_x64_punpckldq(ctx, v37, v38);
+        // Rule at src/isa/x64/lower.isle line 830.
+        return v39;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "lower_i64x2_sshr_imm", "src/isa/x64/lower.isle line 803"
+    )
+}
+
+// Generated as internal constructor for term lower_i64x2_sshr_gpr.
+pub fn constructor_lower_i64x2_sshr_gpr<C: Context>(ctx: &mut C, arg0: Xmm, arg1: Gpr) -> Xmm {
+    let v2 = &C::gpr_to_gpr_mem(ctx, arg1);
+    let v3 = constructor_x64_movq_to_xmm(ctx, v2);
+    let v5 = constructor_flip_high_bit_mask(ctx, I64X2);
+    let v6 = &C::xmm_to_xmm_mem_imm(ctx, v3);
+    let v7 = constructor_x64_psrlq(ctx, v5, v6);
+    let v8 = &C::xmm_to_xmm_mem_imm(ctx, v3);
+    let v9 = constructor_x64_psrlq(ctx, arg0, v8);
+    let v10 = &C::xmm_to_xmm_mem(ctx, v9);
+    let v11 = constructor_x64_pxor(ctx, v7, v10);
+    let v12 = &C::xmm_to_xmm_mem(ctx, v7);
+    let v13 = constructor_x64_psubq(ctx, v11, v12);
+    // Rule at src/isa/x64/lower.isle line 845.
+    return v13;
+}
+
+// Generated as internal constructor for term lower_bmask.
+pub fn constructor_lower_bmask<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Type,
+    arg2: ValueRegs,
+) -> ValueRegs {
+    if arg0 == I128 {
+        let v23 = constructor_lower_bmask(ctx, I64, arg1, arg2);
+        let v24 = constructor_value_regs_get_gpr(ctx, v23, 0x0);
+        let v25 = C::gpr_to_reg(ctx, v24);
+        let v26 = C::gpr_to_reg(ctx, v24);
+        let v27 = C::value_regs(ctx, v25, v26);
+        // Rule at src/isa/x64/lower.isle line 1308.
+        return v27;
+    }
+    let v1 = C::fits_in_64(ctx, arg0);
+    if let Some(v2) = v1 {
+        if arg1 == I128 {
+            let v8 = constructor_value_regs_get_gpr(ctx, arg2, 0x0);
+            let v16 = constructor_value_regs_get_gpr(ctx, arg2, 0x1);
+            let v18 = &C::gpr_to_gpr_mem_imm(ctx, v16);
+            let v19 = constructor_x64_or(ctx, I64, v8, v18);
+            let v20 = C::gpr_to_reg(ctx, v19);
+            let v21 = C::value_reg(ctx, v20);
+            let v22 = constructor_lower_bmask(ctx, v2, I64, v21);
+            // Rule at src/isa/x64/lower.isle line 1300.
+            return v22;
+        }
+        let v4 = C::fits_in_64(ctx, arg1);
+        if let Some(v5) = v4 {
+            let v8 = constructor_value_regs_get_gpr(ctx, arg2, 0x0);
+            let v9 = &constructor_x64_neg_paired(ctx, v5, v8);
+            let v10 = &C::gpr_to_gpr_mem_imm(ctx, v8);
+            let v11 = &constructor_x64_sbb_paired(ctx, v2, v8, v10);
+            let v12 = constructor_with_flags(ctx, v9, v11);
+            let v14 = C::value_regs_get(ctx, v12, 0x1);
+            let v15 = C::value_reg(ctx, v14);
+            // Rule at src/isa/x64/lower.isle line 1289.
+            return v15;
+        }
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "lower_bmask", "src/isa/x64/lower.isle line 1277"
+    )
+}
+
+// Generated as internal constructor for term i128_not.
+pub fn constructor_i128_not<C: Context>(ctx: &mut C, arg0: Value) -> ValueRegs {
+    let v1 = C::put_in_regs(ctx, arg0);
+    let v3 = constructor_value_regs_get_gpr(ctx, v1, 0x0);
+    let v5 = constructor_value_regs_get_gpr(ctx, v1, 0x1);
+    let v7 = constructor_x64_not(ctx, I64, v3);
+    let v8 = constructor_x64_not(ctx, I64, v5);
+    let v9 = constructor_value_gprs(ctx, v7, v8);
+    // Rule at src/isa/x64/lower.isle line 1331.
+    return v9;
+}
+
+// Generated as internal constructor for term all_ones_or_all_zeros.
+pub fn constructor_all_ones_or_all_zeros<C: Context>(ctx: &mut C, arg0: Value) -> Option<bool> {
+    let v1 = C::def_inst(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v3 = &C::inst_data(ctx, v2);
+        match v3 {
+            &InstructionData::FloatCompare {
+                opcode: ref v16,
+                args: ref v17,
+                cond: ref v18,
+            } => {
+                if let &Opcode::Fcmp = v16 {
+                    let v10 = C::value_type(ctx, arg0);
+                    let v11 = C::multi_lane(ctx, v10);
+                    if let Some(v12) = v11 {
+                        // Rule at src/isa/x64/lower.isle line 1380.
+                        return Some(true);
+                    }
+                }
+            }
+            &InstructionData::IntCompare {
+                opcode: ref v4,
+                args: ref v5,
+                cond: ref v6,
+            } => {
+                if let &Opcode::Icmp = v4 {
+                    let v10 = C::value_type(ctx, arg0);
+                    let v11 = C::multi_lane(ctx, v10);
+                    if let Some(v12) = v11 {
+                        // Rule at src/isa/x64/lower.isle line 1379.
+                        return Some(true);
+                    }
+                }
+            }
+            &InstructionData::UnaryConst {
+                opcode: ref v22,
+                constant_handle: v23,
+            } => {
+                if let &Opcode::Vconst = v22 {
+                    let v24 = C::vconst_all_ones_or_all_zeros(ctx, v23);
+                    if let Some(v25) = v24 {
+                        // Rule at src/isa/x64/lower.isle line 1381.
+                        return Some(true);
+                    }
+                }
+            }
+            _ => {}
+        }
+    }
+    None
+}
+
+// Generated as internal constructor for term vec_insert_lane.
+pub fn constructor_vec_insert_lane<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Xmm,
+    arg2: &RegMem,
+    arg3: u8,
+) -> Xmm {
+    match arg0 {
+        I8X16 => {
+            let v4 = C::use_sse41(ctx);
+            if v4 == true {
+                let v5 = &C::reg_mem_to_gpr_mem(ctx, arg2);
+                let v6 = constructor_x64_pinsrb(ctx, arg1, v5, arg3);
+                // Rule at src/isa/x64/lower.isle line 1416.
+                return v6;
+            }
+            let v7 = C::insert_i8x16_lane_hole(ctx, arg3);
+            let v8 = &constructor_const_to_xmm_mem(ctx, v7);
+            let v9 = constructor_x64_pand(ctx, arg1, v8);
+            let v11 = &C::reg_mem_to_gpr_mem(ctx, arg2);
+            let v12 = constructor_x64_movzx(ctx, &ExtMode::BL, v11);
+            let v15 = C::u8_and(ctx, arg3, 0x3);
+            let v16 = C::u8_shl(ctx, v15, 0x3);
+            let v17 = Imm8Reg::Imm8 { imm: v16 };
+            let v18 = &C::imm8_reg_to_imm8_gpr(ctx, &v17);
+            let v19 = constructor_x64_shl(ctx, I32, v12, v18);
+            let v20 = &C::gpr_to_gpr_mem(ctx, v19);
+            let v21 = constructor_x64_movd_to_xmm(ctx, v20);
+            let v22 = &C::xmm_to_xmm_mem(ctx, v21);
+            let v24 = C::u8_shr(ctx, arg3, 0x2);
+            let v25 = constructor_insert_i8x16_lane_pshufd_imm(ctx, v24);
+            let v26 = constructor_x64_pshufd(ctx, v22, v25);
+            let v27 = &C::xmm_to_xmm_mem(ctx, v26);
+            let v28 = constructor_x64_por(ctx, v9, v27);
+            // Rule at src/isa/x64/lower.isle line 1444.
+            return v28;
+        }
+        I16X8 => {
+            let v5 = &C::reg_mem_to_gpr_mem(ctx, arg2);
+            let v29 = constructor_x64_pinsrw(ctx, arg1, v5, arg3);
+            // Rule at src/isa/x64/lower.isle line 1461.
+            return v29;
+        }
+        I32X4 => {
+            let v4 = C::use_sse41(ctx);
+            if v4 == true {
+                let v5 = &C::reg_mem_to_gpr_mem(ctx, arg2);
+                let v30 = constructor_x64_pinsrd(ctx, arg1, v5, arg3);
+                // Rule at src/isa/x64/lower.isle line 1465.
+                return v30;
+            }
+            match arg3 {
+                0x0 => {
+                    let v5 = &C::reg_mem_to_gpr_mem(ctx, arg2);
+                    let v31 = constructor_x64_movd_to_xmm(ctx, v5);
+                    let v32 = constructor_x64_movss_regmove(ctx, arg1, v31);
+                    // Rule at src/isa/x64/lower.isle line 1469.
+                    return v32;
+                }
+                0x1 => {
+                    let v5 = &C::reg_mem_to_gpr_mem(ctx, arg2);
+                    let v31 = constructor_x64_movd_to_xmm(ctx, v5);
+                    let v33 = &C::xmm_to_xmm_mem(ctx, arg1);
+                    let v34 = constructor_x64_punpcklqdq(ctx, v31, v33);
+                    let v35 = &C::xmm_to_xmm_mem(ctx, arg1);
+                    let v37 = constructor_x64_shufps(ctx, v34, v35, 0xE2);
+                    // Rule at src/isa/x64/lower.isle line 1474.
+                    return v37;
+                }
+                0x2 => {
+                    let v5 = &C::reg_mem_to_gpr_mem(ctx, arg2);
+                    let v31 = constructor_x64_movd_to_xmm(ctx, v5);
+                    let v33 = &C::xmm_to_xmm_mem(ctx, arg1);
+                    let v39 = constructor_x64_shufps(ctx, v31, v33, 0x30);
+                    let v40 = &C::xmm_to_xmm_mem(ctx, v39);
+                    let v42 = constructor_x64_shufps(ctx, arg1, v40, 0x84);
+                    // Rule at src/isa/x64/lower.isle line 1481.
+                    return v42;
+                }
+                0x3 => {
+                    let v5 = &C::reg_mem_to_gpr_mem(ctx, arg2);
+                    let v31 = constructor_x64_movd_to_xmm(ctx, v5);
+                    let v33 = &C::xmm_to_xmm_mem(ctx, arg1);
+                    let v44 = constructor_x64_shufps(ctx, v31, v33, 0xE4);
+                    let v45 = &C::xmm_to_xmm_mem(ctx, v44);
+                    let v47 = constructor_x64_shufps(ctx, arg1, v45, 0x24);
+                    // Rule at src/isa/x64/lower.isle line 1488.
+                    return v47;
+                }
+                _ => {}
+            }
+        }
+        I64X2 => {
+            let v4 = C::use_sse41(ctx);
+            if v4 == true {
+                let v5 = &C::reg_mem_to_gpr_mem(ctx, arg2);
+                let v48 = constructor_x64_pinsrq(ctx, arg1, v5, arg3);
+                // Rule at src/isa/x64/lower.isle line 1494.
+                return v48;
+            }
+            match arg3 {
+                0x0 => {
+                    let v5 = &C::reg_mem_to_gpr_mem(ctx, arg2);
+                    let v49 = constructor_x64_movq_to_xmm(ctx, v5);
+                    let v50 = constructor_x64_movsd_regmove(ctx, arg1, v49);
+                    // Rule at src/isa/x64/lower.isle line 1497.
+                    return v50;
+                }
+                0x1 => {
+                    let v5 = &C::reg_mem_to_gpr_mem(ctx, arg2);
+                    let v49 = constructor_x64_movq_to_xmm(ctx, v5);
+                    let v51 = &C::xmm_to_xmm_mem(ctx, v49);
+                    let v52 = constructor_x64_punpcklqdq(ctx, arg1, v51);
+                    // Rule at src/isa/x64/lower.isle line 1499.
+                    return v52;
+                }
+                _ => {}
+            }
+        }
+        F32X4 => {
+            let v4 = C::use_sse41(ctx);
+            if v4 == true {
+                let v53 = &C::reg_mem_to_xmm_mem(ctx, arg2);
+                let v54 = C::sse_insertps_lane_imm(ctx, arg3);
+                let v55 = constructor_x64_insertps(ctx, arg1, v53, v54);
+                // Rule at src/isa/x64/lower.isle line 1503.
+                return v55;
+            }
+            match arg2 {
+                &RegMem::Reg { reg: v56 } => {
+                    match arg3 {
+                        0x0 => {
+                            let v57 = C::xmm_new(ctx, v56);
+                            let v58 = constructor_x64_movss_regmove(ctx, arg1, v57);
+                            // Rule at src/isa/x64/lower.isle line 1508.
+                            return v58;
+                        }
+                        0x1 => {
+                            let v57 = C::xmm_new(ctx, v56);
+                            let v59 = &C::xmm_to_xmm_mem(ctx, arg1);
+                            let v60 = constructor_x64_movlhps(ctx, v57, v59);
+                            let v61 = &C::xmm_to_xmm_mem(ctx, arg1);
+                            let v62 = constructor_x64_shufps(ctx, v60, v61, 0xE2);
+                            // Rule at src/isa/x64/lower.isle line 1514.
+                            return v62;
+                        }
+                        0x2 => {
+                            let v57 = C::xmm_new(ctx, v56);
+                            let v59 = &C::xmm_to_xmm_mem(ctx, arg1);
+                            let v63 = constructor_x64_shufps(ctx, v57, v59, 0x30);
+                            let v64 = &C::xmm_to_xmm_mem(ctx, v63);
+                            let v65 = constructor_x64_shufps(ctx, arg1, v64, 0x84);
+                            // Rule at src/isa/x64/lower.isle line 1521.
+                            return v65;
+                        }
+                        0x3 => {
+                            let v57 = C::xmm_new(ctx, v56);
+                            let v59 = &C::xmm_to_xmm_mem(ctx, arg1);
+                            let v66 = constructor_x64_shufps(ctx, v57, v59, 0xE4);
+                            let v67 = &C::xmm_to_xmm_mem(ctx, v66);
+                            let v68 = constructor_x64_shufps(ctx, arg1, v67, 0x24);
+                            // Rule at src/isa/x64/lower.isle line 1528.
+                            return v68;
+                        }
+                        _ => {}
+                    }
+                }
+                &RegMem::Mem { addr: ref v69 } => {
+                    let v71 = constructor_x64_movss_load(ctx, v69);
+                    let v72 = C::xmm_to_reg(ctx, v71);
+                    let v73 = &constructor_xmm_to_reg_mem(ctx, v72);
+                    let v74 = &C::xmm_mem_to_reg_mem(ctx, v73);
+                    let v75 = constructor_vec_insert_lane(ctx, F32X4, arg1, v74, arg3);
+                    // Rule at src/isa/x64/lower.isle line 1533.
+                    return v75;
+                }
+                _ => {}
+            }
+        }
+        F64X2 => {
+            match arg3 {
+                0x0 => {
+                    match arg2 {
+                        &RegMem::Reg { reg: v56 } => {
+                            let v57 = C::xmm_new(ctx, v56);
+                            let v76 = constructor_x64_movsd_regmove(ctx, arg1, v57);
+                            // Rule at src/isa/x64/lower.isle line 1545.
+                            return v76;
+                        }
+                        &RegMem::Mem { addr: ref v69 } => {
+                            let v77 = constructor_x64_movsd_load(ctx, v69);
+                            let v78 = constructor_x64_movsd_regmove(ctx, arg1, v77);
+                            // Rule at src/isa/x64/lower.isle line 1547.
+                            return v78;
+                        }
+                        _ => {}
+                    }
+                }
+                0x1 => {
+                    let v53 = &C::reg_mem_to_xmm_mem(ctx, arg2);
+                    let v79 = constructor_x64_movlhps(ctx, arg1, v53);
+                    // Rule at src/isa/x64/lower.isle line 1555.
+                    return v79;
+                }
+                _ => {}
+            }
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "vec_insert_lane", "src/isa/x64/lower.isle line 1413"
+    )
+}
+
+// Generated as internal constructor for term insert_i8x16_lane_pshufd_imm.
+pub fn constructor_insert_i8x16_lane_pshufd_imm<C: Context>(ctx: &mut C, arg0: u8) -> u8 {
+    match arg0 {
+        0x0 => {
+            // Rule at src/isa/x64/lower.isle line 1455.
+            return 0x54;
+        }
+        0x1 => {
+            // Rule at src/isa/x64/lower.isle line 1456.
+            return 0x51;
+        }
+        0x2 => {
+            // Rule at src/isa/x64/lower.isle line 1457.
+            return 0x45;
+        }
+        0x3 => {
+            // Rule at src/isa/x64/lower.isle line 1458.
+            return 0x15;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "insert_i8x16_lane_pshufd_imm", "src/isa/x64/lower.isle line 1454"
+    )
+}
+
+// Generated as internal constructor for term cmp_and_choose.
+pub fn constructor_cmp_and_choose<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &CC,
+    arg2: Value,
+    arg3: Value,
+) -> ValueRegs {
+    let v1 = C::fits_in_64(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v6 = &C::raw_operand_size_of_type(ctx, v2);
+        let v7 = C::put_in_reg(ctx, arg2);
+        let v8 = C::put_in_reg(ctx, arg3);
+        let v9 = &constructor_reg_to_gpr_mem_imm(ctx, v7);
+        let v10 = C::gpr_new(ctx, v8);
+        let v11 = &constructor_x64_cmp(ctx, v6, v9, v10);
+        let v12 = &C::reg_to_gpr_mem(ctx, v8);
+        let v13 = C::gpr_new(ctx, v7);
+        let v14 = &constructor_cmove(ctx, v2, arg1, v12, v13);
+        let v15 = constructor_with_flags_reg(ctx, v11, v14);
+        let v16 = C::value_reg(ctx, v15);
+        // Rule at src/isa/x64/lower.isle line 1563.
+        return v16;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "cmp_and_choose", "src/isa/x64/lower.isle line 1562"
+    )
+}
+
+// Generated as internal constructor for term has_pmins.
+pub fn constructor_has_pmins<C: Context>(ctx: &mut C, arg0: Type) -> bool {
+    match arg0 {
+        I16X8 => {
+            // Rule at src/isa/x64/lower.isle line 1589.
+            return true;
+        }
+        I64X2 => {
+            // Rule at src/isa/x64/lower.isle line 1590.
+            return false;
+        }
+        _ => {}
+    }
+    let v3 = C::use_sse41(ctx);
+    // Rule at src/isa/x64/lower.isle line 1591.
+    return v3;
+}
+
+// Generated as internal constructor for term has_pmaxs.
+pub fn constructor_has_pmaxs<C: Context>(ctx: &mut C, arg0: Type) -> bool {
+    match arg0 {
+        I16X8 => {
+            // Rule at src/isa/x64/lower.isle line 1594.
+            return true;
+        }
+        I64X2 => {
+            // Rule at src/isa/x64/lower.isle line 1595.
+            return false;
+        }
+        _ => {}
+    }
+    let v3 = C::use_sse41(ctx);
+    // Rule at src/isa/x64/lower.isle line 1596.
+    return v3;
+}
+
+// Generated as internal constructor for term has_pmaxu.
+pub fn constructor_has_pmaxu<C: Context>(ctx: &mut C, arg0: Type) -> bool {
+    match arg0 {
+        I8X16 => {
+            // Rule at src/isa/x64/lower.isle line 1599.
+            return true;
+        }
+        I64X2 => {
+            // Rule at src/isa/x64/lower.isle line 1600.
+            return false;
+        }
+        _ => {}
+    }
+    let v3 = C::use_sse41(ctx);
+    // Rule at src/isa/x64/lower.isle line 1601.
+    return v3;
+}
+
+// Generated as internal constructor for term has_pminu.
+pub fn constructor_has_pminu<C: Context>(ctx: &mut C, arg0: Type) -> bool {
+    match arg0 {
+        I8X16 => {
+            // Rule at src/isa/x64/lower.isle line 1604.
+            return true;
+        }
+        I64X2 => {
+            // Rule at src/isa/x64/lower.isle line 1605.
+            return false;
+        }
+        _ => {}
+    }
+    let v3 = C::use_sse41(ctx);
+    // Rule at src/isa/x64/lower.isle line 1606.
+    return v3;
+}
+
+// Generated as internal constructor for term lower_vec_smax.
+pub fn constructor_lower_vec_smax<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Xmm,
+    arg2: Xmm,
+) -> Xmm {
+    let v3 = constructor_has_pmaxs(ctx, arg0);
+    if v3 == true {
+        let v4 = &C::xmm_to_xmm_mem(ctx, arg2);
+        let v5 = constructor_x64_pmaxs(ctx, arg0, arg1, v4);
+        // Rule at src/isa/x64/lower.isle line 1614.
+        return v5;
+    }
+    let v4 = &C::xmm_to_xmm_mem(ctx, arg2);
+    let v6 = constructor_x64_pcmpgt(ctx, arg0, arg1, v4);
+    let v7 = &C::xmm_to_xmm_mem(ctx, arg1);
+    let v8 = constructor_x64_pand(ctx, v6, v7);
+    let v9 = &C::xmm_to_xmm_mem(ctx, arg2);
+    let v10 = constructor_x64_pandn(ctx, v6, v9);
+    let v11 = &C::xmm_to_xmm_mem(ctx, v10);
+    let v12 = constructor_x64_por(ctx, v8, v11);
+    // Rule at src/isa/x64/lower.isle line 1618.
+    return v12;
+}
+
+// Generated as internal constructor for term flip_high_bit_mask.
+pub fn constructor_flip_high_bit_mask<C: Context>(ctx: &mut C, arg0: Type) -> Xmm {
+    match arg0 {
+        I16X8 => {
+            let v2 = C::emit_u128_le_const(ctx, 0x80008000800080008000800080008000);
+            let v3 = &constructor_const_to_xmm_mem(ctx, v2);
+            let v4 = constructor_x64_movdqu_load(ctx, v3);
+            // Rule at src/isa/x64/lower.isle line 1673.
+            return v4;
+        }
+        I32X4 => {
+            let v6 = C::emit_u128_le_const(ctx, 0x80000000800000008000000080000000);
+            let v7 = &constructor_const_to_xmm_mem(ctx, v6);
+            let v8 = constructor_x64_movdqu_load(ctx, v7);
+            // Rule at src/isa/x64/lower.isle line 1675.
+            return v8;
+        }
+        I64X2 => {
+            let v10 = C::emit_u128_le_const(ctx, 0x80000000000000008000000000000000);
+            let v11 = &constructor_const_to_xmm_mem(ctx, v10);
+            let v12 = constructor_x64_movdqu_load(ctx, v11);
+            // Rule at src/isa/x64/lower.isle line 1677.
+            return v12;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "flip_high_bit_mask", "src/isa/x64/lower.isle line 1672"
+    )
+}
+
+// Generated as internal constructor for term lower_select_fcmp.
+pub fn constructor_lower_select_fcmp<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &FcmpCondResult,
+    arg2: Value,
+    arg3: Value,
+) -> InstOutput {
+    match arg1 {
+        &FcmpCondResult::Condition {
+            producer: ref v2,
+            cc: ref v3,
+        } => {
+            let v6 = &constructor_cmove_from_values(ctx, arg0, v3, arg2, arg3);
+            let v7 = constructor_with_flags(ctx, v2, v6);
+            let v8 = C::output(ctx, v7);
+            // Rule at src/isa/x64/lower.isle line 1996.
+            return v8;
+        }
+        &FcmpCondResult::OrCondition {
+            producer: ref v9,
+            cc1: ref v10,
+            cc2: ref v11,
+        } => {
+            let v12 = &constructor_cmove_or_from_values(ctx, arg0, v10, v11, arg2, arg3);
+            let v13 = constructor_with_flags(ctx, v9, v12);
+            let v14 = C::output(ctx, v13);
+            // Rule at src/isa/x64/lower.isle line 1998.
+            return v14;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "lower_select_fcmp", "src/isa/x64/lower.isle line 1995"
+    )
+}
+
+// Generated as internal constructor for term do_clz.
+pub fn constructor_do_clz<C: Context>(ctx: &mut C, arg0: Type, arg1: Type, arg2: Gpr) -> Gpr {
+    let v5 = constructor_imm_i64(ctx, I64, -0x1);
+    let v6 = C::gpr_new(ctx, v5);
+    let v7 = constructor_bsr_or_else(ctx, arg0, arg2, v6);
+    let v8 = C::gpr_to_reg(ctx, v7);
+    let v9 = C::ty_bits_u64(ctx, arg1);
+    let v11 = C::u64_sub(ctx, v9, 0x1);
+    let v12 = constructor_imm(ctx, arg0, v11);
+    let v13 = C::gpr_new(ctx, v12);
+    let v14 = &constructor_reg_to_gpr_mem_imm(ctx, v8);
+    let v15 = constructor_x64_sub(ctx, arg0, v13, v14);
+    // Rule at src/isa/x64/lower.isle line 2057.
+    return v15;
+}
+
+// Generated as internal constructor for term do_ctz.
+pub fn constructor_do_ctz<C: Context>(ctx: &mut C, arg0: Type, arg1: Type, arg2: Gpr) -> Gpr {
+    let v4 = C::ty_bits_u64(ctx, arg1);
+    let v5 = constructor_imm(ctx, I64, v4);
+    let v6 = C::gpr_new(ctx, v5);
+    let v7 = constructor_bsf_or_else(ctx, arg0, arg2, v6);
+    // Rule at src/isa/x64/lower.isle line 2093.
+    return v7;
+}
+
+// Generated as internal constructor for term do_popcnt.
+pub fn constructor_do_popcnt<C: Context>(ctx: &mut C, arg0: Type, arg1: Gpr) -> Gpr {
+    match arg0 {
+        I32 => {
+            let v4 = Imm8Reg::Imm8 { imm: 0x1 };
+            let v5 = &C::imm8_reg_to_imm8_gpr(ctx, &v4);
+            let v47 = constructor_x64_shr(ctx, I32, arg1, v5);
+            let v49 = constructor_imm(ctx, I32, 0x77777777);
+            let v50 = C::gpr_new(ctx, v49);
+            let v51 = &C::gpr_to_gpr_mem_imm(ctx, v50);
+            let v52 = constructor_x64_and(ctx, I32, v47, v51);
+            let v53 = &C::gpr_to_gpr_mem_imm(ctx, v52);
+            let v54 = constructor_x64_sub(ctx, I32, arg1, v53);
+            let v14 = &C::imm8_reg_to_imm8_gpr(ctx, &v4);
+            let v55 = constructor_x64_shr(ctx, I32, v52, v14);
+            let v56 = &C::gpr_to_gpr_mem_imm(ctx, v50);
+            let v57 = constructor_x64_and(ctx, I32, v55, v56);
+            let v58 = &C::gpr_to_gpr_mem_imm(ctx, v57);
+            let v59 = constructor_x64_sub(ctx, I32, v54, v58);
+            let v20 = &C::imm8_reg_to_imm8_gpr(ctx, &v4);
+            let v60 = constructor_x64_shr(ctx, I32, v57, v20);
+            let v61 = &C::gpr_to_gpr_mem_imm(ctx, v50);
+            let v62 = constructor_x64_and(ctx, I32, v60, v61);
+            let v63 = &C::gpr_to_gpr_mem_imm(ctx, v62);
+            let v64 = constructor_x64_sub(ctx, I32, v59, v63);
+            let v27 = Imm8Reg::Imm8 { imm: 0x4 };
+            let v28 = &C::imm8_reg_to_imm8_gpr(ctx, &v27);
+            let v65 = constructor_x64_shr(ctx, I32, v64, v28);
+            let v66 = &C::gpr_to_gpr_mem_imm(ctx, v64);
+            let v67 = constructor_x64_add(ctx, I32, v65, v66);
+            let v69 = RegMemImm::Imm { simm32: 0xF0F0F0F };
+            let v70 = &C::gpr_mem_imm_new(ctx, &v69);
+            let v71 = constructor_x64_and(ctx, I32, v67, v70);
+            let v73 = RegMemImm::Imm { simm32: 0x1010101 };
+            let v74 = &C::gpr_mem_imm_new(ctx, &v73);
+            let v75 = constructor_x64_mul(ctx, I32, v71, v74);
+            let v77 = Imm8Reg::Imm8 { imm: 0x18 };
+            let v78 = &C::imm8_reg_to_imm8_gpr(ctx, &v77);
+            let v79 = constructor_x64_shr(ctx, I32, v75, v78);
+            // Rule at src/isa/x64/lower.isle line 2175.
+            return v79;
+        }
+        I64 => {
+            let v4 = Imm8Reg::Imm8 { imm: 0x1 };
+            let v5 = &C::imm8_reg_to_imm8_gpr(ctx, &v4);
+            let v6 = constructor_x64_shr(ctx, I64, arg1, v5);
+            let v8 = constructor_imm(ctx, I64, 0x7777777777777777);
+            let v9 = C::gpr_new(ctx, v8);
+            let v10 = &C::gpr_to_gpr_mem_imm(ctx, v9);
+            let v11 = constructor_x64_and(ctx, I64, v6, v10);
+            let v12 = &C::gpr_to_gpr_mem_imm(ctx, v11);
+            let v13 = constructor_x64_sub(ctx, I64, arg1, v12);
+            let v14 = &C::imm8_reg_to_imm8_gpr(ctx, &v4);
+            let v15 = constructor_x64_shr(ctx, I64, v11, v14);
+            let v16 = &C::gpr_to_gpr_mem_imm(ctx, v9);
+            let v17 = constructor_x64_and(ctx, I64, v15, v16);
+            let v18 = &C::gpr_to_gpr_mem_imm(ctx, v17);
+            let v19 = constructor_x64_sub(ctx, I64, v13, v18);
+            let v20 = &C::imm8_reg_to_imm8_gpr(ctx, &v4);
+            let v21 = constructor_x64_shr(ctx, I64, v17, v20);
+            let v22 = &C::gpr_to_gpr_mem_imm(ctx, v9);
+            let v23 = constructor_x64_and(ctx, I64, v21, v22);
+            let v24 = &C::gpr_to_gpr_mem_imm(ctx, v23);
+            let v25 = constructor_x64_sub(ctx, I64, v19, v24);
+            let v27 = Imm8Reg::Imm8 { imm: 0x4 };
+            let v28 = &C::imm8_reg_to_imm8_gpr(ctx, &v27);
+            let v29 = constructor_x64_shr(ctx, I64, v25, v28);
+            let v30 = &C::gpr_to_gpr_mem_imm(ctx, v25);
+            let v31 = constructor_x64_add(ctx, I64, v29, v30);
+            let v33 = constructor_imm(ctx, I64, 0xF0F0F0F0F0F0F0F);
+            let v34 = C::gpr_new(ctx, v33);
+            let v35 = &C::gpr_to_gpr_mem_imm(ctx, v34);
+            let v36 = constructor_x64_and(ctx, I64, v31, v35);
+            let v38 = constructor_imm(ctx, I64, 0x101010101010101);
+            let v39 = C::gpr_new(ctx, v38);
+            let v40 = &C::gpr_to_gpr_mem_imm(ctx, v39);
+            let v41 = constructor_x64_mul(ctx, I64, v36, v40);
+            let v43 = Imm8Reg::Imm8 { imm: 0x38 };
+            let v44 = &C::imm8_reg_to_imm8_gpr(ctx, &v43);
+            let v45 = constructor_x64_shr(ctx, I64, v41, v44);
+            // Rule at src/isa/x64/lower.isle line 2132.
+            return v45;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "do_popcnt", "src/isa/x64/lower.isle line 2131"
+    )
+}
+
+// Generated as internal constructor for term do_bitrev8.
+pub fn constructor_do_bitrev8<C: Context>(ctx: &mut C, arg0: Type, arg1: Gpr) -> Gpr {
+    let v2 = C::ty_mask(ctx, arg0);
+    let v4 = C::u64_and(ctx, v2, 0x5555555555555555);
+    let v5 = constructor_imm(ctx, arg0, v4);
+    let v6 = C::gpr_new(ctx, v5);
+    let v7 = &C::gpr_to_gpr_mem_imm(ctx, v6);
+    let v8 = constructor_x64_and(ctx, arg0, arg1, v7);
+    let v10 = Imm8Reg::Imm8 { imm: 0x1 };
+    let v11 = &C::imm8_reg_to_imm8_gpr(ctx, &v10);
+    let v12 = constructor_x64_shr(ctx, arg0, arg1, v11);
+    let v13 = &C::gpr_to_gpr_mem_imm(ctx, v6);
+    let v14 = constructor_x64_and(ctx, arg0, v12, v13);
+    let v15 = &C::imm8_reg_to_imm8_gpr(ctx, &v10);
+    let v16 = constructor_x64_shl(ctx, arg0, v8, v15);
+    let v17 = &C::gpr_to_gpr_mem_imm(ctx, v14);
+    let v18 = constructor_x64_or(ctx, arg0, v16, v17);
+    let v20 = C::u64_and(ctx, v2, 0x3333333333333333);
+    let v21 = constructor_imm(ctx, arg0, v20);
+    let v22 = C::gpr_new(ctx, v21);
+    let v23 = &C::gpr_to_gpr_mem_imm(ctx, v22);
+    let v24 = constructor_x64_and(ctx, arg0, v18, v23);
+    let v26 = Imm8Reg::Imm8 { imm: 0x2 };
+    let v27 = &C::imm8_reg_to_imm8_gpr(ctx, &v26);
+    let v28 = constructor_x64_shr(ctx, arg0, v18, v27);
+    let v29 = &C::gpr_to_gpr_mem_imm(ctx, v22);
+    let v30 = constructor_x64_and(ctx, arg0, v28, v29);
+    let v31 = &C::imm8_reg_to_imm8_gpr(ctx, &v26);
+    let v32 = constructor_x64_shl(ctx, arg0, v24, v31);
+    let v33 = &C::gpr_to_gpr_mem_imm(ctx, v30);
+    let v34 = constructor_x64_or(ctx, arg0, v32, v33);
+    let v36 = C::u64_and(ctx, v2, 0xF0F0F0F0F0F0F0F);
+    let v37 = constructor_imm(ctx, arg0, v36);
+    let v38 = C::gpr_new(ctx, v37);
+    let v39 = &C::gpr_to_gpr_mem_imm(ctx, v38);
+    let v40 = constructor_x64_and(ctx, arg0, v34, v39);
+    let v42 = Imm8Reg::Imm8 { imm: 0x4 };
+    let v43 = &C::imm8_reg_to_imm8_gpr(ctx, &v42);
+    let v44 = constructor_x64_shr(ctx, arg0, v34, v43);
+    let v45 = &C::gpr_to_gpr_mem_imm(ctx, v38);
+    let v46 = constructor_x64_and(ctx, arg0, v44, v45);
+    let v47 = &C::imm8_reg_to_imm8_gpr(ctx, &v42);
+    let v48 = constructor_x64_shl(ctx, arg0, v40, v47);
+    let v49 = &C::gpr_to_gpr_mem_imm(ctx, v46);
+    let v50 = constructor_x64_or(ctx, arg0, v48, v49);
+    // Rule at src/isa/x64/lower.isle line 2269.
+    return v50;
+}
+
+// Generated as internal constructor for term do_bitrev16.
+pub fn constructor_do_bitrev16<C: Context>(ctx: &mut C, arg0: Type, arg1: Gpr) -> Gpr {
+    let v2 = constructor_do_bitrev8(ctx, arg0, arg1);
+    let v3 = C::ty_mask(ctx, arg0);
+    let v5 = C::u64_and(ctx, v3, 0xFF00FF00FF00FF);
+    let v6 = constructor_imm(ctx, arg0, v5);
+    let v7 = C::gpr_new(ctx, v6);
+    let v8 = &C::gpr_to_gpr_mem_imm(ctx, v7);
+    let v9 = constructor_x64_and(ctx, arg0, v2, v8);
+    let v11 = Imm8Reg::Imm8 { imm: 0x8 };
+    let v12 = &C::imm8_reg_to_imm8_gpr(ctx, &v11);
+    let v13 = constructor_x64_shr(ctx, arg0, v2, v12);
+    let v14 = &C::gpr_to_gpr_mem_imm(ctx, v7);
+    let v15 = constructor_x64_and(ctx, arg0, v13, v14);
+    let v16 = &C::imm8_reg_to_imm8_gpr(ctx, &v11);
+    let v17 = constructor_x64_shl(ctx, arg0, v9, v16);
+    let v18 = &C::gpr_to_gpr_mem_imm(ctx, v15);
+    let v19 = constructor_x64_or(ctx, arg0, v17, v18);
+    // Rule at src/isa/x64/lower.isle line 2292.
+    return v19;
+}
+
+// Generated as internal constructor for term do_bitrev32.
+pub fn constructor_do_bitrev32<C: Context>(ctx: &mut C, arg0: Type, arg1: Gpr) -> Gpr {
+    let v2 = constructor_do_bitrev16(ctx, arg0, arg1);
+    let v3 = C::ty_mask(ctx, arg0);
+    let v5 = C::u64_and(ctx, v3, 0xFFFF0000FFFF);
+    let v6 = constructor_imm(ctx, arg0, v5);
+    let v7 = C::gpr_new(ctx, v6);
+    let v8 = &C::gpr_to_gpr_mem_imm(ctx, v7);
+    let v9 = constructor_x64_and(ctx, arg0, v2, v8);
+    let v11 = Imm8Reg::Imm8 { imm: 0x10 };
+    let v12 = &C::imm8_reg_to_imm8_gpr(ctx, &v11);
+    let v13 = constructor_x64_shr(ctx, arg0, v2, v12);
+    let v14 = &C::gpr_to_gpr_mem_imm(ctx, v7);
+    let v15 = constructor_x64_and(ctx, arg0, v13, v14);
+    let v16 = &C::imm8_reg_to_imm8_gpr(ctx, &v11);
+    let v17 = constructor_x64_shl(ctx, arg0, v9, v16);
+    let v18 = &C::gpr_to_gpr_mem_imm(ctx, v15);
+    let v19 = constructor_x64_or(ctx, arg0, v17, v18);
+    // Rule at src/isa/x64/lower.isle line 2304.
+    return v19;
+}
+
+// Generated as internal constructor for term do_bitrev64.
+pub fn constructor_do_bitrev64<C: Context>(ctx: &mut C, arg0: Type, arg1: Gpr) -> Gpr {
+    if arg0 == I64 {
+        let v2 = constructor_do_bitrev32(ctx, arg0, arg1);
+        let v4 = constructor_imm(ctx, arg0, 0xFFFFFFFF);
+        let v5 = C::gpr_new(ctx, v4);
+        let v6 = &C::gpr_to_gpr_mem_imm(ctx, v5);
+        let v7 = constructor_x64_and(ctx, arg0, v2, v6);
+        let v9 = Imm8Reg::Imm8 { imm: 0x20 };
+        let v10 = &C::imm8_reg_to_imm8_gpr(ctx, &v9);
+        let v11 = constructor_x64_shr(ctx, arg0, v2, v10);
+        let v12 = &C::imm8_reg_to_imm8_gpr(ctx, &v9);
+        let v13 = constructor_x64_shl(ctx, arg0, v7, v12);
+        let v14 = &C::gpr_to_gpr_mem_imm(ctx, v11);
+        let v15 = constructor_x64_or(ctx, arg0, v13, v14);
+        // Rule at src/isa/x64/lower.isle line 2316.
+        return v15;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "do_bitrev64", "src/isa/x64/lower.isle line 2315"
+    )
+}
+
+// Generated as internal constructor for term fmadd.
+pub fn constructor_fmadd<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Value,
+    arg2: Value,
+    arg3: Value,
+) -> Xmm {
+    let v24 = C::def_inst(ctx, arg2);
+    if let Some(v25) = v24 {
+        let v26 = &C::inst_data(ctx, v25);
+        if let &InstructionData::Unary {
+            opcode: ref v27,
+            arg: v28,
+        } = v26
+        {
+            if let &Opcode::Fneg = v27 {
+                let v29 = constructor_fnmadd(ctx, arg0, arg1, v28, arg3);
+                // Rule at src/isa/x64/lower.isle line 2772.
+                return v29;
+            }
+        }
+    }
+    let v18 = C::def_inst(ctx, arg1);
+    if let Some(v19) = v18 {
+        let v20 = &C::inst_data(ctx, v19);
+        if let &InstructionData::Unary {
+            opcode: ref v21,
+            arg: v22,
+        } = v20
+        {
+            if let &Opcode::Fneg = v21 {
+                let v23 = constructor_fnmadd(ctx, arg0, v22, arg2, arg3);
+                // Rule at src/isa/x64/lower.isle line 2771.
+                return v23;
+            }
+        }
+    }
+    let v14 = &C::sinkable_load(ctx, arg2);
+    if let Some(v15) = v14 {
+        let v4 = constructor_put_in_xmm(ctx, arg1);
+        let v11 = constructor_put_in_xmm(ctx, arg3);
+        let v16 = &constructor_sink_load_to_xmm_mem(ctx, v15);
+        let v17 = constructor_x64_vfmadd132(ctx, arg0, v4, v11, v16);
+        // Rule at src/isa/x64/lower.isle line 2767.
+        return v17;
+    }
+    let v8 = &C::sinkable_load(ctx, arg1);
+    if let Some(v9) = v8 {
+        let v10 = constructor_put_in_xmm(ctx, arg2);
+        let v11 = constructor_put_in_xmm(ctx, arg3);
+        let v12 = &constructor_sink_load_to_xmm_mem(ctx, v9);
+        let v13 = constructor_x64_vfmadd132(ctx, arg0, v10, v11, v12);
+        // Rule at src/isa/x64/lower.isle line 2766.
+        return v13;
+    }
+    let v4 = constructor_put_in_xmm(ctx, arg1);
+    let v5 = constructor_put_in_xmm(ctx, arg2);
+    let v6 = &C::put_in_xmm_mem(ctx, arg3);
+    let v7 = constructor_x64_vfmadd213(ctx, arg0, v4, v5, v6);
+    // Rule at src/isa/x64/lower.isle line 2761.
+    return v7;
+}
+
+// Generated as internal constructor for term fnmadd.
+pub fn constructor_fnmadd<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: Value,
+    arg2: Value,
+    arg3: Value,
+) -> Xmm {
+    let v24 = C::def_inst(ctx, arg2);
+    if let Some(v25) = v24 {
+        let v26 = &C::inst_data(ctx, v25);
+        if let &InstructionData::Unary {
+            opcode: ref v27,
+            arg: v28,
+        } = v26
+        {
+            if let &Opcode::Fneg = v27 {
+                let v29 = constructor_fmadd(ctx, arg0, arg1, v28, arg3);
+                // Rule at src/isa/x64/lower.isle line 2780.
+                return v29;
+            }
+        }
+    }
+    let v18 = C::def_inst(ctx, arg1);
+    if let Some(v19) = v18 {
+        let v20 = &C::inst_data(ctx, v19);
+        if let &InstructionData::Unary {
+            opcode: ref v21,
+            arg: v22,
+        } = v20
+        {
+            if let &Opcode::Fneg = v21 {
+                let v23 = constructor_fmadd(ctx, arg0, v22, arg2, arg3);
+                // Rule at src/isa/x64/lower.isle line 2779.
+                return v23;
+            }
+        }
+    }
+    let v14 = &C::sinkable_load(ctx, arg2);
+    if let Some(v15) = v14 {
+        let v4 = constructor_put_in_xmm(ctx, arg1);
+        let v11 = constructor_put_in_xmm(ctx, arg3);
+        let v16 = &constructor_sink_load_to_xmm_mem(ctx, v15);
+        let v17 = constructor_x64_vfnmadd132(ctx, arg0, v4, v11, v16);
+        // Rule at src/isa/x64/lower.isle line 2776.
+        return v17;
+    }
+    let v8 = &C::sinkable_load(ctx, arg1);
+    if let Some(v9) = v8 {
+        let v10 = constructor_put_in_xmm(ctx, arg2);
+        let v11 = constructor_put_in_xmm(ctx, arg3);
+        let v12 = &constructor_sink_load_to_xmm_mem(ctx, v9);
+        let v13 = constructor_x64_vfnmadd132(ctx, arg0, v10, v11, v12);
+        // Rule at src/isa/x64/lower.isle line 2775.
+        return v13;
+    }
+    let v4 = constructor_put_in_xmm(ctx, arg1);
+    let v5 = constructor_put_in_xmm(ctx, arg2);
+    let v6 = &C::put_in_xmm_mem(ctx, arg3);
+    let v7 = constructor_x64_vfnmadd213(ctx, arg0, v4, v5, v6);
+    // Rule at src/isa/x64/lower.isle line 2774.
+    return v7;
+}
+
+// Generated as internal constructor for term cmp_zero_i128.
+pub fn constructor_cmp_zero_i128<C: Context>(
+    ctx: &mut C,
+    arg0: &CC,
+    arg1: ValueRegs,
+) -> IcmpCondResult {
+    let v1 = &C::cc_nz_or_z(ctx, arg0);
+    if let Some(v2) = v1 {
+        let v5 = constructor_value_regs_get_gpr(ctx, arg1, 0x0);
+        let v7 = constructor_value_regs_get_gpr(ctx, arg1, 0x1);
+        let v10 = RegMemImm::Imm { simm32: 0x0 };
+        let v11 = &C::gpr_mem_imm_new(ctx, &v10);
+        let v12 = &constructor_x64_cmp(ctx, &OperandSize::Size64, v11, v5);
+        let v14 = &constructor_x64_setcc(ctx, &CC::Z);
+        let v15 = constructor_with_flags_reg(ctx, v12, v14);
+        let v16 = C::gpr_new(ctx, v15);
+        let v17 = &C::gpr_mem_imm_new(ctx, &v10);
+        let v18 = &constructor_x64_cmp(ctx, &OperandSize::Size64, v17, v7);
+        let v19 = &constructor_x64_setcc(ctx, &CC::Z);
+        let v20 = constructor_with_flags_reg(ctx, v18, v19);
+        let v21 = C::gpr_new(ctx, v20);
+        let v23 = &C::gpr_to_gpr_mem_imm(ctx, v16);
+        let v24 = &constructor_x64_test(ctx, &OperandSize::Size8, v23, v21);
+        let v25 = &constructor_icmp_cond_result(ctx, v24, v2);
+        // Rule at src/isa/x64/lower.isle line 3243.
+        return v25.clone();
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "cmp_zero_i128", "src/isa/x64/lower.isle line 3242"
+    )
+}
+
+// Generated as internal constructor for term cmp_zero_int_bool_ref.
+pub fn constructor_cmp_zero_int_bool_ref<C: Context>(ctx: &mut C, arg0: Value) -> ProducesFlags {
+    let v1 = C::value_type(ctx, arg0);
+    let v2 = &C::raw_operand_size_of_type(ctx, v1);
+    let v3 = constructor_put_in_gpr(ctx, arg0);
+    let v4 = &C::gpr_to_gpr_mem_imm(ctx, v3);
+    let v5 = &constructor_x64_test(ctx, v2, v4, v3);
+    // Rule at src/isa/x64/lower.isle line 3254.
+    return v5.clone();
+}
+
+// Generated as internal constructor for term lower_swiden_low.
+pub fn constructor_lower_swiden_low<C: Context>(ctx: &mut C, arg0: Type, arg1: Xmm) -> Xmm {
+    match arg0 {
+        I16X8 => {
+            let v2 = &C::xmm_to_xmm_mem(ctx, arg1);
+            let v3 = constructor_x64_punpcklbw(ctx, arg1, v2);
+            let v5 = &C::xmi_imm(ctx, 0x8);
+            let v6 = constructor_x64_psraw(ctx, v3, v5);
+            // Rule at src/isa/x64/lower.isle line 3651.
+            return v6;
+        }
+        I32X4 => {
+            let v2 = &C::xmm_to_xmm_mem(ctx, arg1);
+            let v7 = constructor_x64_punpcklwd(ctx, arg1, v2);
+            let v9 = &C::xmi_imm(ctx, 0x10);
+            let v10 = constructor_x64_psrad(ctx, v7, v9);
+            // Rule at src/isa/x64/lower.isle line 3653.
+            return v10;
+        }
+        I64X2 => {
+            let v12 = constructor_xmm_zero(ctx, I32X4);
+            let v13 = &C::xmm_to_xmm_mem(ctx, arg1);
+            let v14 = constructor_x64_pcmpgtd(ctx, v12, v13);
+            let v15 = &C::xmm_to_xmm_mem(ctx, v14);
+            let v16 = constructor_x64_punpckldq(ctx, arg1, v15);
+            // Rule at src/isa/x64/lower.isle line 3659.
+            return v16;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "lower_swiden_low", "src/isa/x64/lower.isle line 3646"
+    )
+}
+
+// Generated as internal constructor for term lower_uwiden_low.
+pub fn constructor_lower_uwiden_low<C: Context>(ctx: &mut C, arg0: Type, arg1: Xmm) -> Xmm {
+    match arg0 {
+        I16X8 => {
+            let v3 = constructor_xmm_zero(ctx, I8X16);
+            let v4 = &C::xmm_to_xmm_mem(ctx, v3);
+            let v5 = constructor_x64_punpcklbw(ctx, arg1, v4);
+            // Rule at src/isa/x64/lower.isle line 3714.
+            return v5;
+        }
+        I32X4 => {
+            let v3 = constructor_xmm_zero(ctx, I8X16);
+            let v4 = &C::xmm_to_xmm_mem(ctx, v3);
+            let v6 = constructor_x64_punpcklwd(ctx, arg1, v4);
+            // Rule at src/isa/x64/lower.isle line 3715.
+            return v6;
+        }
+        I64X2 => {
+            let v8 = constructor_xmm_zero(ctx, F32X4);
+            let v9 = &C::xmm_to_xmm_mem(ctx, v8);
+            let v10 = constructor_x64_unpcklps(ctx, arg1, v9);
+            // Rule at src/isa/x64/lower.isle line 3716.
+            return v10;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "lower_uwiden_low", "src/isa/x64/lower.isle line 3713"
+    )
+}
+
+// Generated as internal constructor for term unarrow_i32x4_lanes_to_low_u16_lanes.
+pub fn constructor_unarrow_i32x4_lanes_to_low_u16_lanes<C: Context>(ctx: &mut C, arg0: Xmm) -> Xmm {
+    let v2 = constructor_xmm_zero(ctx, I32X4);
+    let v3 = &C::xmm_to_xmm_mem(ctx, v2);
+    let v4 = constructor_x64_pcmpgtd(ctx, arg0, v3);
+    let v5 = &C::xmm_to_xmm_mem(ctx, v4);
+    let v6 = constructor_x64_pand(ctx, arg0, v5);
+    let v8 = C::emit_u128_le_const(ctx, 0xFFFF0000FFFF0000FFFF0000FFFF);
+    let v9 = &constructor_const_to_xmm_mem(ctx, v8);
+    let v10 = constructor_x64_movdqu_load(ctx, v9);
+    let v11 = &C::xmm_to_xmm_mem(ctx, v6);
+    let v12 = constructor_x64_pcmpgtd(ctx, v10, v11);
+    let v13 = &C::xmm_to_xmm_mem(ctx, v12);
+    let v14 = constructor_x64_pand(ctx, v6, v13);
+    let v15 = &C::xmm_to_xmm_mem(ctx, v10);
+    let v16 = constructor_x64_pandn(ctx, v12, v15);
+    let v17 = &C::xmm_to_xmm_mem(ctx, v16);
+    let v18 = constructor_x64_por(ctx, v14, v17);
+    let v19 = &C::xmm_to_xmm_mem(ctx, v18);
+    let v21 = constructor_x64_pshuflw(ctx, v19, 0x8);
+    let v22 = &C::xmm_to_xmm_mem(ctx, v21);
+    let v23 = constructor_x64_pshufhw(ctx, v22, 0x8);
+    let v24 = &C::xmm_to_xmm_mem(ctx, v23);
+    let v25 = constructor_x64_pshufd(ctx, v24, 0x8);
+    // Rule at src/isa/x64/lower.isle line 3796.
+    return v25;
+}
+
+// Generated as internal constructor for term x64_round.
+pub fn constructor_x64_round<C: Context>(
+    ctx: &mut C,
+    arg0: Type,
+    arg1: &RegMem,
+    arg2: &RoundImm,
+) -> Xmm {
+    match arg0 {
+        F32 => {
+            let v3 = C::use_sse41(ctx);
+            if v3 == true {
+                let v4 = &C::reg_mem_to_xmm_mem(ctx, arg1);
+                let v5 = constructor_x64_roundss(ctx, v4, arg2);
+                // Rule at src/isa/x64/lower.isle line 3864.
+                return v5;
+            }
+            if let &RegMem::Reg { reg: v9 } = arg1 {
+                let v11 = &constructor_round_libcall(ctx, F32, arg2);
+                let v12 = C::libcall_1(ctx, v11, v9);
+                let v13 = C::xmm_new(ctx, v12);
+                // Rule at src/isa/x64/lower.isle line 3877.
+                return v13;
+            }
+        }
+        F64 => {
+            let v3 = C::use_sse41(ctx);
+            if v3 == true {
+                let v4 = &C::reg_mem_to_xmm_mem(ctx, arg1);
+                let v6 = constructor_x64_roundsd(ctx, v4, arg2);
+                // Rule at src/isa/x64/lower.isle line 3867.
+                return v6;
+            }
+            if let &RegMem::Reg { reg: v9 } = arg1 {
+                let v15 = &constructor_round_libcall(ctx, F64, arg2);
+                let v16 = C::libcall_1(ctx, v15, v9);
+                let v17 = C::xmm_new(ctx, v16);
+                // Rule at src/isa/x64/lower.isle line 3878.
+                return v17;
+            }
+        }
+        F32X4 => {
+            let v3 = C::use_sse41(ctx);
+            if v3 == true {
+                let v4 = &C::reg_mem_to_xmm_mem(ctx, arg1);
+                let v7 = constructor_x64_roundps(ctx, v4, arg2);
+                // Rule at src/isa/x64/lower.isle line 3870.
+                return v7;
+            }
+            if let &RegMem::Reg { reg: v9 } = arg1 {
+                let v11 = &constructor_round_libcall(ctx, F32, arg2);
+                let v12 = C::libcall_1(ctx, v11, v9);
+                let v13 = C::xmm_new(ctx, v12);
+                let v18 = &constructor_reg_to_xmm_mem(ctx, v9);
+                let v20 = constructor_x64_pshufd(ctx, v18, 0x1);
+                let v21 = C::xmm_to_reg(ctx, v20);
+                let v22 = C::libcall_1(ctx, v11, v21);
+                let v23 = C::xmm_new(ctx, v22);
+                let v25 = C::xmm_to_reg(ctx, v23);
+                let v26 = &constructor_xmm_to_reg_mem(ctx, v25);
+                let v27 = &C::xmm_mem_to_reg_mem(ctx, v26);
+                let v28 = constructor_vec_insert_lane(ctx, F32X4, v13, v27, 0x1);
+                let v29 = &constructor_reg_to_xmm_mem(ctx, v9);
+                let v31 = constructor_x64_pshufd(ctx, v29, 0x2);
+                let v32 = C::xmm_to_reg(ctx, v31);
+                let v33 = C::libcall_1(ctx, v11, v32);
+                let v34 = C::xmm_new(ctx, v33);
+                let v35 = C::xmm_to_reg(ctx, v34);
+                let v36 = &constructor_xmm_to_reg_mem(ctx, v35);
+                let v37 = &C::xmm_mem_to_reg_mem(ctx, v36);
+                let v38 = constructor_vec_insert_lane(ctx, F32X4, v28, v37, 0x2);
+                let v39 = &constructor_reg_to_xmm_mem(ctx, v9);
+                let v41 = constructor_x64_pshufd(ctx, v39, 0x3);
+                let v42 = C::xmm_to_reg(ctx, v41);
+                let v43 = C::libcall_1(ctx, v11, v42);
+                let v44 = C::xmm_new(ctx, v43);
+                let v45 = C::xmm_to_reg(ctx, v44);
+                let v46 = &constructor_xmm_to_reg_mem(ctx, v45);
+                let v47 = &C::xmm_mem_to_reg_mem(ctx, v46);
+                let v48 = constructor_vec_insert_lane(ctx, F32X4, v38, v47, 0x3);
+                // Rule at src/isa/x64/lower.isle line 3879.
+                return v48;
+            }
+        }
+        F64X2 => {
+            let v3 = C::use_sse41(ctx);
+            if v3 == true {
+                let v4 = &C::reg_mem_to_xmm_mem(ctx, arg1);
+                let v8 = constructor_x64_roundpd(ctx, v4, arg2);
+                // Rule at src/isa/x64/lower.isle line 3873.
+                return v8;
+            }
+            if let &RegMem::Reg { reg: v9 } = arg1 {
+                let v15 = &constructor_round_libcall(ctx, F64, arg2);
+                let v16 = C::libcall_1(ctx, v15, v9);
+                let v17 = C::xmm_new(ctx, v16);
+                let v18 = &constructor_reg_to_xmm_mem(ctx, v9);
+                let v50 = constructor_x64_pshufd(ctx, v18, 0xE);
+                let v51 = C::xmm_to_reg(ctx, v50);
+                let v52 = C::libcall_1(ctx, v15, v51);
+                let v53 = C::xmm_new(ctx, v52);
+                let v55 = C::xmm_to_reg(ctx, v53);
+                let v56 = &constructor_xmm_to_reg_mem(ctx, v55);
+                let v57 = &C::xmm_mem_to_reg_mem(ctx, v56);
+                let v58 = constructor_vec_insert_lane(ctx, F64X2, v17, v57, 0x1);
+                // Rule at src/isa/x64/lower.isle line 3891.
+                return v58;
+            }
+        }
+        _ => {}
+    }
+    if let &RegMem::Mem { addr: ref v59 } = arg1 {
+        let v61 = constructor_x64_load(ctx, arg0, v59, &ExtKind::ZeroExtend);
+        let v62 = RegMem::Reg { reg: v61 };
+        let v63 = constructor_x64_round(ctx, arg0, &v62, arg2);
+        // Rule at src/isa/x64/lower.isle line 3899.
+        return v63;
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "x64_round", "src/isa/x64/lower.isle line 3863"
+    )
+}
+
+// Generated as internal constructor for term round_libcall.
+pub fn constructor_round_libcall<C: Context>(ctx: &mut C, arg0: Type, arg1: &RoundImm) -> LibCall {
+    match arg0 {
+        F32 => {
+            match arg1 {
+                &RoundImm::RoundNearest => {
+                    // Rule at src/isa/x64/lower.isle line 3907.
+                    return LibCall::NearestF32;
+                }
+                &RoundImm::RoundDown => {
+                    // Rule at src/isa/x64/lower.isle line 3905.
+                    return LibCall::FloorF32;
+                }
+                &RoundImm::RoundUp => {
+                    // Rule at src/isa/x64/lower.isle line 3903.
+                    return LibCall::CeilF32;
+                }
+                &RoundImm::RoundZero => {
+                    // Rule at src/isa/x64/lower.isle line 3909.
+                    return LibCall::TruncF32;
+                }
+                _ => {}
+            }
+        }
+        F64 => {
+            match arg1 {
+                &RoundImm::RoundNearest => {
+                    // Rule at src/isa/x64/lower.isle line 3908.
+                    return LibCall::NearestF64;
+                }
+                &RoundImm::RoundDown => {
+                    // Rule at src/isa/x64/lower.isle line 3906.
+                    return LibCall::FloorF64;
+                }
+                &RoundImm::RoundUp => {
+                    // Rule at src/isa/x64/lower.isle line 3904.
+                    return LibCall::CeilF64;
+                }
+                &RoundImm::RoundZero => {
+                    // Rule at src/isa/x64/lower.isle line 3910.
+                    return LibCall::TruncF64;
+                }
+                _ => {}
+            }
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "round_libcall", "src/isa/x64/lower.isle line 3902"
+    )
+}
+
+// Generated as internal constructor for term nonzero_sdiv_divisor.
+pub fn constructor_nonzero_sdiv_divisor<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Reg {
+    let v2 = C::def_inst(ctx, arg1);
+    if let Some(v3) = v2 {
+        let v4 = &C::inst_data(ctx, v3);
+        if let &InstructionData::UnaryImm {
+            opcode: ref v5,
+            imm: v6,
+        } = v4
+        {
+            if let &Opcode::Iconst = v5 {
+                let v7 = C::safe_divisor_from_imm64(ctx, arg0, v6);
+                if let Some(v8) = v7 {
+                    let v9 = constructor_imm(ctx, arg0, v8);
+                    // Rule at src/isa/x64/lower.isle line 3990.
+                    return v9;
+                }
+            }
+        }
+    }
+    let v10 = C::put_in_reg(ctx, arg1);
+    let v11 = &C::raw_operand_size_of_type(ctx, arg0);
+    let v12 = &constructor_reg_to_gpr_mem_imm(ctx, v10);
+    let v13 = C::gpr_new(ctx, v10);
+    let v14 = &constructor_x64_test(ctx, v11, v12, v13);
+    let v17 = &constructor_trap_if(ctx, &CC::Z, &TrapCode::IntegerDivisionByZero);
+    let v18 = &constructor_with_flags_side_effect(ctx, v14, v17);
+    let v19 = constructor_side_effect(ctx, v18);
+    // Rule at src/isa/x64/lower.isle line 3993.
+    return v10;
+}
+
+// Generated as internal constructor for term lower_pshufb.
+pub fn constructor_lower_pshufb<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &RegMem) -> Xmm {
+    let v2 = C::use_ssse3(ctx);
+    if v2 == true {
+        let v3 = &C::reg_mem_to_xmm_mem(ctx, arg1);
+        let v4 = constructor_x64_pshufb(ctx, arg0, v3);
+        // Rule at src/isa/x64/lower.isle line 4288.
+        return v4;
+    }
+    match arg1 {
+        &RegMem::Reg { reg: v5 } => {
+            let v7 = C::xmm_to_reg(ctx, arg0);
+            let v8 = C::libcall_2(ctx, &LibCall::X86Pshufb, v7, v5);
+            let v9 = C::xmm_new(ctx, v8);
+            // Rule at src/isa/x64/lower.isle line 4291.
+            return v9;
+        }
+        &RegMem::Mem { addr: ref v10 } => {
+            let v11 = &constructor_synthetic_amode_to_xmm_mem(ctx, v10);
+            let v12 = constructor_x64_movdqu_load(ctx, v11);
+            let v13 = C::xmm_to_reg(ctx, v12);
+            let v14 = &constructor_xmm_to_reg_mem(ctx, v13);
+            let v15 = &C::xmm_mem_to_reg_mem(ctx, v14);
+            let v16 = constructor_lower_pshufb(ctx, arg0, v15);
+            // Rule at src/isa/x64/lower.isle line 4293.
+            return v16;
+        }
+        _ => {}
+    }
+    unreachable!(
+        "no rule matched for term {} at {}; should it be partial?",
+        "lower_pshufb", "src/isa/x64/lower.isle line 4287"
+    )
+}

From a4b0d6942262def9a2552c5ba37c0f69f27e4019 Mon Sep 17 00:00:00 2001
From: Eduardo Rodrigues <eduardomourar@users.noreply.github.com>
Date: Thu, 3 Aug 2023 23:01:29 +0100
Subject: [PATCH 10/49] fix(wasi-preview1-component-adapter): sync command
 extended wit

---
 crates/wasi-http/src/bytestream copy.rs | 213 ++++++++++++++++++++++++
 1 file changed, 213 insertions(+)
 create mode 100644 crates/wasi-http/src/bytestream copy.rs

diff --git a/crates/wasi-http/src/bytestream copy.rs b/crates/wasi-http/src/bytestream copy.rs
new file mode 100644
index 000000000000..0ec6dd0ee0e6
--- /dev/null
+++ b/crates/wasi-http/src/bytestream copy.rs	
@@ -0,0 +1,213 @@
+use bytes::{Buf, BufMut, Bytes, BytesMut};
+use std::any::Any;
+use std::ops::{Deref, DerefMut};
+use std::vec::Vec;
+use wasmtime_wasi::preview2::{
+    pipe::{AsyncReadStream, AsyncWriteStream},
+    HostInputStream, HostOutputStream, StreamState,
+};
+
+const MAX_BUF_SIZE: usize = 65_536;
+
+pub struct ByteStream {
+    // inner: BytesMut,
+    reader: AsyncReadStream,
+    writer: AsyncWriteStream,
+}
+
+// pub trait HostInputOutputStream: HostInputStream + HostOutputStream {
+//     fn as_any(&self) -> &dyn Any;
+//     fn as_boxed_any(self) -> Box<dyn Any + Send + Sync + 'static>
+//     where
+//         Self: Sized + 'static;
+//     // fn as_input(self) -> Box<dyn HostInputStream>;
+//     // fn as_output(self) -> Box<dyn HostOutputStream>;
+// }
+
+impl ByteStream {
+    pub fn new() -> Self {
+        let (read_stream, write_stream) = tokio::io::duplex(MAX_BUF_SIZE);
+        // let (_read_half, write_half) = tokio::io::split(a);
+        // let (read_half, _write_half) = tokio::io::split(b);
+        Self {
+            reader: AsyncReadStream::new(read_stream),
+            writer: AsyncWriteStream::new(write_stream),
+        }
+        // Self {
+        //     inner: BytesMut::new(),
+        // }
+    }
+
+    pub(crate) fn reader(mut self) -> impl HostInputStream {
+        self.reader
+    }
+
+    pub(crate) fn writer(mut self) -> impl HostOutputStream {
+        self.writer
+    }
+}
+
+// impl HostInputOutputStream for ByteStream {
+//     fn as_any(&self) -> &dyn Any
+// // where
+//     //     Self: Sized + 'static,
+//     {
+//         self
+//     }
+
+//     fn as_boxed_any(self) -> Box<dyn Any + Send + Sync + 'static>
+//     where
+//         Self: Sized + 'static,
+//     {
+//         Box::new(self)
+//     }
+
+//     // fn as_input(self) -> Box<dyn HostInputStream + 'static> {
+//     //     Box::new(
+//     //         self.as_boxed_any()
+//     //             .downcast::<dyn HostInputStream + 'static>()
+//     //             .unwrap()
+//     //             .to_owned(),
+//     //     )
+//     // }
+
+//     // fn as_output(self) -> Box<dyn HostOutputStream> {
+//     //     Box::new(
+//     //         self.as_any()
+//     //             .downcast_ref::<dyn HostOutputStream>()
+//     //             .unwrap()
+//     //             .to_owned(),
+//     //     )
+//     // }
+// }
+
+#[async_trait::async_trait]
+impl HostInputStream for ByteStream {
+    fn read(&mut self, size: usize) -> Result<(Bytes, StreamState), anyhow::Error> {
+        println!("read input {}", size);
+        self.reader.read(size)
+        // let mut s = &mut self.inner; //BytesMut::from(self.inner.as_ref());
+        // let mut bytes = BytesMut::with_capacity(size);
+        // if size == 0 || s.len() == 0 {
+        //     println!("read input 1");
+        //     Ok((Bytes::new(), StreamState::Closed))
+        // } else if s.len() > size {
+        //     println!("read input 2");
+        //     s.advance(size);
+        //     bytes.copy_from_slice(&s);
+        //     Ok((bytes.into(), StreamState::Closed))
+        // } else {
+        //     println!("read input 3");
+        //     bytes[..s.len()].copy_from_slice(&s);
+        //     Ok((bytes.into(), StreamState::Open))
+        // }
+    }
+
+    fn skip(&mut self, nelem: usize) -> Result<(usize, StreamState), anyhow::Error> {
+        self.reader.skip(nelem)
+    }
+
+    async fn ready(&mut self) -> Result<(), anyhow::Error> {
+        self.reader.ready().await
+        // Ok(())
+    }
+}
+
+#[async_trait::async_trait]
+impl HostOutputStream for ByteStream {
+    fn write(&mut self, bytes: Bytes) -> Result<(usize, StreamState), anyhow::Error> {
+        println!("write input {}", bytes.len());
+        self.writer.write(bytes)
+
+        // let data = &self.inner;
+        // let size = bytes.len();
+        // let len = data.len() + size;
+        // if len > 0 {
+        //     let mut new = BytesMut::with_capacity(len);
+        //     new.put(Bytes::from(data.clone()));
+        //     new.put(bytes);
+        //     self.inner = new.freeze().into();
+        // }
+        // Ok((size, StreamState::Open))
+        // let mut buf = &mut self.inner; //BytesMut::from(self.inner.as_ref());
+        // buf.extend_from_slice(bytes.as_ref());
+        // Ok((bytes.len(), StreamState::Open))
+    }
+
+    fn splice(
+        &mut self,
+        src: &mut dyn HostInputStream,
+        nelem: usize,
+    ) -> Result<(usize, StreamState), anyhow::Error> {
+        self.writer.splice(src, nelem)
+    }
+
+    fn write_zeroes(&mut self, nelem: usize) -> Result<(usize, StreamState), anyhow::Error> {
+        self.writer.write_zeroes(nelem)
+    }
+
+    async fn ready(&mut self) -> Result<(), anyhow::Error> {
+        self.writer.ready().await
+        // Ok(())
+    }
+}
+
+// impl Into<Box<dyn HostInputStream>> for dyn HostInputOutputStream {
+//     fn into(self) -> Box<dyn HostInputStream>
+//     where
+//         Self: Sized + 'static,
+//     {
+//         (Box::new(self) as Box<dyn Any>)
+//             .downcast::<dyn HostInputStream>()
+//             .unwrap()
+//     }
+// }
+
+// impl From<Bytes> for ByteStream {
+//     fn from(buf: Bytes) -> ByteStream {
+//         ByteStream {
+//             inner: buf,
+//             is_readable: true,
+//             is_writable: true,
+//         }
+//     }
+// }
+
+// impl Into<Bytes> for ByteStream {
+//     fn into(self) -> Bytes {
+//         let mut stream = BytesMut::new();
+//         // let mut reader = &mut self.reader;
+//         // let mut eof = StreamState::Open;
+//         // while eof != StreamState::Closed {
+//         //     let (mut body_chunk, stream_status) = reader.read(u64::MAX as usize).unwrap();
+//         //     eof = stream_status;
+//         //     stream.extend_from_slice(&body_chunk[..]);
+//         // }
+//         stream.freeze()
+//         // self.inner
+//     }
+// }
+
+impl From<Vec<u8>> for ByteStream {
+    fn from(vec: Vec<u8>) -> ByteStream {
+        let mut stream: ByteStream = ByteStream::new();
+        stream.writer.write(Bytes::from(vec)).unwrap();
+        stream
+        // ByteStream {
+        //     inner: BytesMut::from(Bytes::from(vec).as_ref()),
+        // }
+    }
+}
+
+// impl Deref for ByteStream {
+//     type Target = Bytes;
+//     fn deref(&self) -> &Bytes {
+//         &self.inner
+//     }
+// }
+
+// impl DerefMut for ByteStream {
+//     fn deref_mut(&mut self) -> &mut Bytes {
+//         &mut self.inner
+//     }
+// }

From 7537e86e4c195f0258ed178091c5460451bf1717 Mon Sep 17 00:00:00 2001
From: Eduardo Rodrigues <eduardomourar@users.noreply.github.com>
Date: Thu, 3 Aug 2023 23:02:14 +0100
Subject: [PATCH 11/49] fix(wasmtime-wasi): sync wit for http types

---
 crates/wasi/wit/deps/cli/command.wit |  1 +
 crates/wasi/wit/deps/http/types.wit  | 20 +++++++++-----------
 2 files changed, 10 insertions(+), 11 deletions(-)

diff --git a/crates/wasi/wit/deps/cli/command.wit b/crates/wasi/wit/deps/cli/command.wit
index c29b4a61f8ae..3cd17bea3f98 100644
--- a/crates/wasi/wit/deps/cli/command.wit
+++ b/crates/wasi/wit/deps/cli/command.wit
@@ -18,6 +18,7 @@ world command {
   import wasi:random/insecure-seed
   import wasi:poll/poll
   import wasi:io/streams
+
   import environment
   import exit
   import stdin
diff --git a/crates/wasi/wit/deps/http/types.wit b/crates/wasi/wit/deps/http/types.wit
index ee4227f423a8..6ac2caf0bfd8 100644
--- a/crates/wasi/wit/deps/http/types.wit
+++ b/crates/wasi/wit/deps/http/types.wit
@@ -45,11 +45,11 @@ interface types {
   type fields = u32
   drop-fields: func(fields: fields)
   new-fields: func(entries: list<tuple<string,string>>) -> fields
-  fields-get: func(fields: fields, name: string) -> list<string>
-  fields-set: func(fields: fields, name: string, value: list<string>)
+  fields-get: func(fields: fields, name: string) -> list<list<u8>>
+  fields-set: func(fields: fields, name: string, value: list<list<u8>>)
   fields-delete: func(fields: fields, name: string)
-  fields-append: func(fields: fields, name: string, value: string)
-  fields-entries: func(fields: fields) -> list<tuple<string,string>>
+  fields-append: func(fields: fields, name: string, value: list<u8>)
+  fields-entries: func(fields: fields) -> list<tuple<string,list<u8>>>
   fields-clone: func(fields: fields) -> fields
 
   type headers = fields
@@ -80,18 +80,16 @@ interface types {
   drop-incoming-request: func(request: incoming-request)
   drop-outgoing-request: func(request: outgoing-request)
   incoming-request-method: func(request: incoming-request) -> method
-  incoming-request-path: func(request: incoming-request) -> string
-  incoming-request-query: func(request: incoming-request) -> string
+  incoming-request-path-with-query: func(request: incoming-request) -> option<string>
   incoming-request-scheme: func(request: incoming-request) -> option<scheme>
-  incoming-request-authority: func(request: incoming-request) -> string
+  incoming-request-authority: func(request: incoming-request) -> option<string>
   incoming-request-headers: func(request: incoming-request) -> headers
   incoming-request-consume: func(request: incoming-request) -> result<incoming-stream>
   new-outgoing-request: func(
     method: method,
-    path: string,
-    query: string,
+    path-with-query: option<string>,
     scheme: option<scheme>,
-    authority: string,
+    authority: option<string>,
     headers: headers
   ) -> outgoing-request
   outgoing-request-write: func(request: outgoing-request) -> result<outgoing-stream>
@@ -120,7 +118,7 @@ interface types {
   // simply return a `stream`).
   type response-outparam = u32
   drop-response-outparam: func(response: response-outparam)
-  set-response-outparam: func(response: result<outgoing-response, error>) -> result
+  set-response-outparam: func(param: response-outparam, response: result<outgoing-response, error>) -> result
 
   // This type corresponds to the HTTP standard Status Code.
   type status-code = u16

From 18c0a1186b2bc7dd2b1c16eb9100ce4d4dd1d2fb Mon Sep 17 00:00:00 2001
From: Eduardo Rodrigues <eduardomourar@users.noreply.github.com>
Date: Thu, 3 Aug 2023 23:41:21 +0100
Subject: [PATCH 12/49] chore: refactor using wasmtime-wasi crate

fix(wasi-http): misconfiguration in wasmtime linkers

chore: keep streams details

chore: fix wasi http tests
---
 Cargo.lock                                    |    19 +
 .../isle_generated_code/clif_lower.isle       |  1485 -
 .../codegen/isle_generated_code/clif_opt.isle |  1752 --
 .../isle_generated_code/isle_aarch64.rs       | 16275 ----------
 .../codegen/isle_generated_code/isle_opt.rs   |  6676 ----
 .../isle_generated_code/isle_riscv64.rs       | 18461 -----------
 .../codegen/isle_generated_code/isle_s390x.rs | 25403 ----------------
 .../codegen/isle_generated_code/isle_x64.rs   | 20315 ------------
 crates/test-programs/build.rs                 |    10 +-
 crates/test-programs/tests/wasi-http.rs       |   112 +-
 .../test-programs/wasi-http-tests/Cargo.toml  |     5 +-
 .../test-programs/wasi-http-tests/src/lib.rs  |    16 +-
 .../src/{bin => }/outbound_request.rs         |   103 +-
 crates/wasi-http/Cargo.toml                   |    11 +-
 crates/wasi-http/src/bytestream copy.rs       |   213 -
 crates/wasi-http/src/bytestream.rs            |   166 -
 crates/wasi-http/src/common/error.rs          |   140 -
 crates/wasi-http/src/common/mod.rs            |     7 -
 crates/wasi-http/src/common/stream.rs         |   188 -
 crates/wasi-http/src/common/table.rs          |   114 -
 crates/wasi-http/src/component_impl.rs        |    79 +-
 crates/wasi-http/src/http_impl.rs             |   101 +-
 crates/wasi-http/src/lib.rs                   |    43 +-
 crates/wasi-http/src/streams_impl.rs          |   183 -
 crates/wasi-http/src/struct.rs                |   220 +-
 crates/wasi-http/src/types_impl.rs            |   127 +-
 26 files changed, 494 insertions(+), 91730 deletions(-)
 delete mode 100644 cranelift/codegen/isle_generated_code/clif_lower.isle
 delete mode 100644 cranelift/codegen/isle_generated_code/clif_opt.isle
 delete mode 100644 cranelift/codegen/isle_generated_code/isle_aarch64.rs
 delete mode 100644 cranelift/codegen/isle_generated_code/isle_opt.rs
 delete mode 100644 cranelift/codegen/isle_generated_code/isle_riscv64.rs
 delete mode 100644 cranelift/codegen/isle_generated_code/isle_s390x.rs
 delete mode 100644 cranelift/codegen/isle_generated_code/isle_x64.rs
 rename crates/test-programs/wasi-http-tests/src/{bin => }/outbound_request.rs (60%)
 delete mode 100644 crates/wasi-http/src/bytestream copy.rs
 delete mode 100644 crates/wasi-http/src/bytestream.rs
 delete mode 100644 crates/wasi-http/src/common/error.rs
 delete mode 100644 crates/wasi-http/src/common/mod.rs
 delete mode 100644 crates/wasi-http/src/common/stream.rs
 delete mode 100644 crates/wasi-http/src/common/table.rs
 delete mode 100644 crates/wasi-http/src/streams_impl.rs

diff --git a/Cargo.lock b/Cargo.lock
index f5bcb273c8a3..6c447d0554a3 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -1206,6 +1206,7 @@ checksum = "531ac96c6ff5fd7c62263c5e3c67a603af4fcaee2e1a0ae5565ba3a11e69e549"
 dependencies = [
  "futures-channel",
  "futures-core",
+ "futures-executor",
  "futures-io",
  "futures-sink",
  "futures-task",
@@ -1228,6 +1229,17 @@ version = "0.3.27"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "86d7a0c1aa76363dac491de0ee99faf6941128376f1cf96f07db7603b7de69dd"
 
+[[package]]
+name = "futures-executor"
+version = "0.3.27"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "1997dd9df74cdac935c76252744c1ed5794fac083242ea4fe77ef3ed60ba0f83"
+dependencies = [
+ "futures-core",
+ "futures-task",
+ "futures-util",
+]
+
 [[package]]
 name = "futures-io"
 version = "0.3.28"
@@ -1252,11 +1264,15 @@ version = "0.3.27"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "3ef6b17e481503ec85211fed8f39d1970f128935ca1f814cd32ac4a6842e84ab"
 dependencies = [
+ "futures-channel",
  "futures-core",
+ "futures-io",
  "futures-sink",
  "futures-task",
+ "memchr",
  "pin-project-lite",
  "pin-utils",
+ "slab",
 ]
 
 [[package]]
@@ -3755,7 +3771,9 @@ name = "wasmtime-wasi-http"
 version = "13.0.0"
 dependencies = [
  "anyhow",
+ "async-trait",
  "bytes",
+ "futures",
  "http",
  "http-body",
  "http-body-util",
@@ -3765,6 +3783,7 @@ dependencies = [
  "tokio",
  "tokio-rustls",
  "wasmtime",
+ "wasmtime-wasi",
  "webpki-roots",
 ]
 
diff --git a/cranelift/codegen/isle_generated_code/clif_lower.isle b/cranelift/codegen/isle_generated_code/clif_lower.isle
deleted file mode 100644
index 412489b201d7..000000000000
--- a/cranelift/codegen/isle_generated_code/clif_lower.isle
+++ /dev/null
@@ -1,1485 +0,0 @@
-;; GENERATED BY `gen_isle`. DO NOT EDIT!!!
-;;
-;; This ISLE file defines all the external type declarations for Cranelift's
-;; data structures that ISLE will process, such as `InstructionData` and
-;; `Opcode`.
-
-;;;; Extern type declarations for immediates ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-(type Constant (primitive Constant))
-(type DynamicStackSlot (primitive DynamicStackSlot))
-(type FuncRef (primitive FuncRef))
-(type GlobalValue (primitive GlobalValue))
-(type Ieee32 (primitive Ieee32))
-(type Ieee64 (primitive Ieee64))
-(type Imm64 (primitive Imm64))
-(type Immediate (primitive Immediate))
-(type JumpTable (primitive JumpTable))
-(type MemFlags (primitive MemFlags))
-(type Offset32 (primitive Offset32))
-(type SigRef (primitive SigRef))
-(type StackSlot (primitive StackSlot))
-(type Table (primitive Table))
-(type Uimm8 (primitive Uimm8))
-
-;;;; Enumerated Immediate: AtomicRmwOp ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-(type AtomicRmwOp extern
-    (enum
-        Add
-        And
-        Nand
-        Or
-        Smax
-        Smin
-        Sub
-        Umax
-        Umin
-        Xchg
-        Xor
-    )
-)
-
-;;;; Enumerated Immediate: FloatCC ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-(type FloatCC extern
-    (enum
-        Equal
-        GreaterThan
-        GreaterThanOrEqual
-        LessThan
-        LessThanOrEqual
-        NotEqual
-        Ordered
-        OrderedNotEqual
-        Unordered
-        UnorderedOrEqual
-        UnorderedOrGreaterThan
-        UnorderedOrGreaterThanOrEqual
-        UnorderedOrLessThan
-        UnorderedOrLessThanOrEqual
-    )
-)
-
-;;;; Enumerated Immediate: IntCC ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-(type IntCC extern
-    (enum
-        Equal
-        NotEqual
-        SignedGreaterThan
-        SignedGreaterThanOrEqual
-        SignedLessThan
-        SignedLessThanOrEqual
-        UnsignedGreaterThan
-        UnsignedGreaterThanOrEqual
-        UnsignedLessThan
-        UnsignedLessThanOrEqual
-    )
-)
-
-;;;; Enumerated Immediate: TrapCode ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-(type TrapCode extern
-    (enum
-        HeapOutOfBounds
-        IntegerDivisionByZero
-        IntegerOverflow
-        StackOverflow
-    )
-)
-
-;;;; Value Arrays ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-;; ISLE representation of `[Value; 2]`.
-(type ValueArray2 extern (enum))
-
-(decl value_array_2 (Value Value) ValueArray2)
-(extern constructor value_array_2 pack_value_array_2)
-(extern extractor infallible value_array_2 unpack_value_array_2)
-
-;; ISLE representation of `[Value; 3]`.
-(type ValueArray3 extern (enum))
-
-(decl value_array_3 (Value Value Value) ValueArray3)
-(extern constructor value_array_3 pack_value_array_3)
-(extern extractor infallible value_array_3 unpack_value_array_3)
-
-;;;; Block Arrays ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-;; ISLE representation of `[BlockCall; 2]`.
-(type BlockArray2 extern (enum))
-
-(decl block_array_2 (BlockCall BlockCall) BlockArray2)
-(extern constructor block_array_2 pack_block_array_2)
-(extern extractor infallible block_array_2 unpack_block_array_2)
-
-;;;; `Opcode` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-(type Opcode extern
-    (enum
-        Jump
-        Brif
-        BrTable
-        Debugtrap
-        Trap
-        Trapz
-        ResumableTrap
-        Trapnz
-        ResumableTrapnz
-        Return
-        Call
-        CallIndirect
-        ReturnCall
-        ReturnCallIndirect
-        FuncAddr
-        Splat
-        Swizzle
-        X86Pshufb
-        Insertlane
-        Extractlane
-        Smin
-        Umin
-        Smax
-        Umax
-        AvgRound
-        UaddSat
-        SaddSat
-        UsubSat
-        SsubSat
-        Load
-        Store
-        Uload8
-        Sload8
-        Istore8
-        Uload16
-        Sload16
-        Istore16
-        Uload32
-        Sload32
-        Istore32
-        Uload8x8
-        Sload8x8
-        Uload16x4
-        Sload16x4
-        Uload32x2
-        Sload32x2
-        StackLoad
-        StackStore
-        StackAddr
-        DynamicStackLoad
-        DynamicStackStore
-        DynamicStackAddr
-        GlobalValue
-        SymbolValue
-        TlsValue
-        GetPinnedReg
-        SetPinnedReg
-        GetFramePointer
-        GetStackPointer
-        GetReturnAddress
-        TableAddr
-        Iconst
-        F32const
-        F64const
-        Vconst
-        Shuffle
-        Null
-        Nop
-        Select
-        SelectSpectreGuard
-        Bitselect
-        X86Blendv
-        VanyTrue
-        VallTrue
-        VhighBits
-        Icmp
-        IcmpImm
-        Iadd
-        Isub
-        Ineg
-        Iabs
-        Imul
-        Umulhi
-        Smulhi
-        SqmulRoundSat
-        X86Pmulhrsw
-        Udiv
-        Sdiv
-        Urem
-        Srem
-        IaddImm
-        ImulImm
-        UdivImm
-        SdivImm
-        UremImm
-        SremImm
-        IrsubImm
-        IaddCin
-        IaddCarry
-        UaddOverflow
-        SaddOverflow
-        UsubOverflow
-        SsubOverflow
-        UmulOverflow
-        SmulOverflow
-        UaddOverflowTrap
-        IsubBin
-        IsubBorrow
-        Band
-        Bor
-        Bxor
-        Bnot
-        BandNot
-        BorNot
-        BxorNot
-        BandImm
-        BorImm
-        BxorImm
-        Rotl
-        Rotr
-        RotlImm
-        RotrImm
-        Ishl
-        Ushr
-        Sshr
-        IshlImm
-        UshrImm
-        SshrImm
-        Bitrev
-        Clz
-        Cls
-        Ctz
-        Bswap
-        Popcnt
-        Fcmp
-        Fadd
-        Fsub
-        Fmul
-        Fdiv
-        Sqrt
-        Fma
-        Fneg
-        Fabs
-        Fcopysign
-        Fmin
-        FminPseudo
-        Fmax
-        FmaxPseudo
-        Ceil
-        Floor
-        Trunc
-        Nearest
-        IsNull
-        IsInvalid
-        Bitcast
-        ScalarToVector
-        Bmask
-        Ireduce
-        Snarrow
-        Unarrow
-        Uunarrow
-        SwidenLow
-        SwidenHigh
-        UwidenLow
-        UwidenHigh
-        IaddPairwise
-        X86Pmaddubsw
-        Uextend
-        Sextend
-        Fpromote
-        Fdemote
-        Fvdemote
-        FvpromoteLow
-        FcvtToUint
-        FcvtToSint
-        FcvtToUintSat
-        FcvtToSintSat
-        X86Cvtt2dq
-        FcvtFromUint
-        FcvtFromSint
-        Isplit
-        Iconcat
-        AtomicRmw
-        AtomicCas
-        AtomicLoad
-        AtomicStore
-        Fence
-        ExtractVector
-    )
-)
-
-;;;; `InstructionData` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-(type InstructionData extern
-    (enum
-        (AtomicCas (opcode Opcode) (args ValueArray3) (flags MemFlags))
-        (AtomicRmw (opcode Opcode) (args ValueArray2) (flags MemFlags) (op AtomicRmwOp))
-        (Binary (opcode Opcode) (args ValueArray2))
-        (BinaryImm64 (opcode Opcode) (arg Value) (imm Imm64))
-        (BinaryImm8 (opcode Opcode) (arg Value) (imm Uimm8))
-        (BranchTable (opcode Opcode) (arg Value) (table JumpTable))
-        (Brif (opcode Opcode) (arg Value) (blocks BlockArray2))
-        (Call (opcode Opcode) (args ValueList) (func_ref FuncRef))
-        (CallIndirect (opcode Opcode) (args ValueList) (sig_ref SigRef))
-        (CondTrap (opcode Opcode) (arg Value) (code TrapCode))
-        (DynamicStackLoad (opcode Opcode) (dynamic_stack_slot DynamicStackSlot))
-        (DynamicStackStore (opcode Opcode) (arg Value) (dynamic_stack_slot DynamicStackSlot))
-        (FloatCompare (opcode Opcode) (args ValueArray2) (cond FloatCC))
-        (FuncAddr (opcode Opcode) (func_ref FuncRef))
-        (IntAddTrap (opcode Opcode) (args ValueArray2) (code TrapCode))
-        (IntCompare (opcode Opcode) (args ValueArray2) (cond IntCC))
-        (IntCompareImm (opcode Opcode) (arg Value) (cond IntCC) (imm Imm64))
-        (Jump (opcode Opcode) (destination BlockCall))
-        (Load (opcode Opcode) (arg Value) (flags MemFlags) (offset Offset32))
-        (LoadNoOffset (opcode Opcode) (arg Value) (flags MemFlags))
-        (MultiAry (opcode Opcode) (args ValueList))
-        (NullAry (opcode Opcode))
-        (Shuffle (opcode Opcode) (args ValueArray2) (imm Immediate))
-        (StackLoad (opcode Opcode) (stack_slot StackSlot) (offset Offset32))
-        (StackStore (opcode Opcode) (arg Value) (stack_slot StackSlot) (offset Offset32))
-        (Store (opcode Opcode) (args ValueArray2) (flags MemFlags) (offset Offset32))
-        (StoreNoOffset (opcode Opcode) (args ValueArray2) (flags MemFlags))
-        (TableAddr (opcode Opcode) (arg Value) (table Table) (offset Offset32))
-        (Ternary (opcode Opcode) (args ValueArray3))
-        (TernaryImm8 (opcode Opcode) (args ValueArray2) (imm Uimm8))
-        (Trap (opcode Opcode) (code TrapCode))
-        (Unary (opcode Opcode) (arg Value))
-        (UnaryConst (opcode Opcode) (constant_handle Constant))
-        (UnaryGlobalValue (opcode Opcode) (global_value GlobalValue))
-        (UnaryIeee32 (opcode Opcode) (imm Ieee32))
-        (UnaryIeee64 (opcode Opcode) (imm Ieee64))
-        (UnaryImm (opcode Opcode) (imm Imm64))
-    )
-)
-
-;;;; Extracting Opcode, Operands, and Immediates from `InstructionData` ;;;;;;;;
-
-(decl jump (BlockCall) Inst)
-(extractor
-    (jump block_call)
-    (inst_data (InstructionData.Jump (Opcode.Jump) block_call))
-)
-
-(decl brif (Value BlockCall BlockCall) Inst)
-(extractor
-    (brif c block_then block_else)
-    (inst_data (InstructionData.Brif (Opcode.Brif) c (block_array_2 block_then block_else)))
-)
-
-(decl br_table (Value JumpTable) Inst)
-(extractor
-    (br_table x JT)
-    (inst_data (InstructionData.BranchTable (Opcode.BrTable) x JT))
-)
-
-(decl debugtrap () Inst)
-(extractor
-    (debugtrap )
-    (inst_data (InstructionData.NullAry (Opcode.Debugtrap)))
-)
-
-(decl trap (TrapCode) Inst)
-(extractor
-    (trap code)
-    (inst_data (InstructionData.Trap (Opcode.Trap) code))
-)
-
-(decl trapz (Value TrapCode) Inst)
-(extractor
-    (trapz c code)
-    (inst_data (InstructionData.CondTrap (Opcode.Trapz) c code))
-)
-
-(decl resumable_trap (TrapCode) Inst)
-(extractor
-    (resumable_trap code)
-    (inst_data (InstructionData.Trap (Opcode.ResumableTrap) code))
-)
-
-(decl trapnz (Value TrapCode) Inst)
-(extractor
-    (trapnz c code)
-    (inst_data (InstructionData.CondTrap (Opcode.Trapnz) c code))
-)
-
-(decl resumable_trapnz (Value TrapCode) Inst)
-(extractor
-    (resumable_trapnz c code)
-    (inst_data (InstructionData.CondTrap (Opcode.ResumableTrapnz) c code))
-)
-
-(decl return (ValueSlice) Inst)
-(extractor
-    (return rvals)
-    (inst_data (InstructionData.MultiAry (Opcode.Return) (value_list_slice rvals)))
-)
-
-(decl call (FuncRef ValueSlice) Inst)
-(extractor
-    (call FN args)
-    (inst_data (InstructionData.Call (Opcode.Call) (value_list_slice args) FN))
-)
-
-(decl call_indirect (SigRef Value ValueSlice) Inst)
-(extractor
-    (call_indirect SIG callee args)
-    (inst_data (InstructionData.CallIndirect (Opcode.CallIndirect) (unwrap_head_value_list_1 callee args) SIG))
-)
-
-(decl return_call (FuncRef ValueSlice) Inst)
-(extractor
-    (return_call FN args)
-    (inst_data (InstructionData.Call (Opcode.ReturnCall) (value_list_slice args) FN))
-)
-
-(decl return_call_indirect (SigRef Value ValueSlice) Inst)
-(extractor
-    (return_call_indirect SIG callee args)
-    (inst_data (InstructionData.CallIndirect (Opcode.ReturnCallIndirect) (unwrap_head_value_list_1 callee args) SIG))
-)
-
-(decl func_addr (FuncRef) Inst)
-(extractor
-    (func_addr FN)
-    (inst_data (InstructionData.FuncAddr (Opcode.FuncAddr) FN))
-)
-
-(decl splat (Value) Inst)
-(extractor
-    (splat x)
-    (inst_data (InstructionData.Unary (Opcode.Splat) x))
-)
-
-(decl swizzle (Value Value) Inst)
-(extractor
-    (swizzle x y)
-    (inst_data (InstructionData.Binary (Opcode.Swizzle) (value_array_2 x y)))
-)
-
-(decl x86_pshufb (Value Value) Inst)
-(extractor
-    (x86_pshufb x y)
-    (inst_data (InstructionData.Binary (Opcode.X86Pshufb) (value_array_2 x y)))
-)
-
-(decl insertlane (Value Value Uimm8) Inst)
-(extractor
-    (insertlane x y Idx)
-    (inst_data (InstructionData.TernaryImm8 (Opcode.Insertlane) (value_array_2 x y) Idx))
-)
-
-(decl extractlane (Value Uimm8) Inst)
-(extractor
-    (extractlane x Idx)
-    (inst_data (InstructionData.BinaryImm8 (Opcode.Extractlane) x Idx))
-)
-
-(decl smin (Value Value) Inst)
-(extractor
-    (smin x y)
-    (inst_data (InstructionData.Binary (Opcode.Smin) (value_array_2 x y)))
-)
-
-(decl umin (Value Value) Inst)
-(extractor
-    (umin x y)
-    (inst_data (InstructionData.Binary (Opcode.Umin) (value_array_2 x y)))
-)
-
-(decl smax (Value Value) Inst)
-(extractor
-    (smax x y)
-    (inst_data (InstructionData.Binary (Opcode.Smax) (value_array_2 x y)))
-)
-
-(decl umax (Value Value) Inst)
-(extractor
-    (umax x y)
-    (inst_data (InstructionData.Binary (Opcode.Umax) (value_array_2 x y)))
-)
-
-(decl avg_round (Value Value) Inst)
-(extractor
-    (avg_round x y)
-    (inst_data (InstructionData.Binary (Opcode.AvgRound) (value_array_2 x y)))
-)
-
-(decl uadd_sat (Value Value) Inst)
-(extractor
-    (uadd_sat x y)
-    (inst_data (InstructionData.Binary (Opcode.UaddSat) (value_array_2 x y)))
-)
-
-(decl sadd_sat (Value Value) Inst)
-(extractor
-    (sadd_sat x y)
-    (inst_data (InstructionData.Binary (Opcode.SaddSat) (value_array_2 x y)))
-)
-
-(decl usub_sat (Value Value) Inst)
-(extractor
-    (usub_sat x y)
-    (inst_data (InstructionData.Binary (Opcode.UsubSat) (value_array_2 x y)))
-)
-
-(decl ssub_sat (Value Value) Inst)
-(extractor
-    (ssub_sat x y)
-    (inst_data (InstructionData.Binary (Opcode.SsubSat) (value_array_2 x y)))
-)
-
-(decl load (MemFlags Value Offset32) Inst)
-(extractor
-    (load MemFlags p Offset)
-    (inst_data (InstructionData.Load (Opcode.Load) p MemFlags Offset))
-)
-
-(decl store (MemFlags Value Value Offset32) Inst)
-(extractor
-    (store MemFlags x p Offset)
-    (inst_data (InstructionData.Store (Opcode.Store) (value_array_2 x p) MemFlags Offset))
-)
-
-(decl uload8 (MemFlags Value Offset32) Inst)
-(extractor
-    (uload8 MemFlags p Offset)
-    (inst_data (InstructionData.Load (Opcode.Uload8) p MemFlags Offset))
-)
-
-(decl sload8 (MemFlags Value Offset32) Inst)
-(extractor
-    (sload8 MemFlags p Offset)
-    (inst_data (InstructionData.Load (Opcode.Sload8) p MemFlags Offset))
-)
-
-(decl istore8 (MemFlags Value Value Offset32) Inst)
-(extractor
-    (istore8 MemFlags x p Offset)
-    (inst_data (InstructionData.Store (Opcode.Istore8) (value_array_2 x p) MemFlags Offset))
-)
-
-(decl uload16 (MemFlags Value Offset32) Inst)
-(extractor
-    (uload16 MemFlags p Offset)
-    (inst_data (InstructionData.Load (Opcode.Uload16) p MemFlags Offset))
-)
-
-(decl sload16 (MemFlags Value Offset32) Inst)
-(extractor
-    (sload16 MemFlags p Offset)
-    (inst_data (InstructionData.Load (Opcode.Sload16) p MemFlags Offset))
-)
-
-(decl istore16 (MemFlags Value Value Offset32) Inst)
-(extractor
-    (istore16 MemFlags x p Offset)
-    (inst_data (InstructionData.Store (Opcode.Istore16) (value_array_2 x p) MemFlags Offset))
-)
-
-(decl uload32 (MemFlags Value Offset32) Inst)
-(extractor
-    (uload32 MemFlags p Offset)
-    (inst_data (InstructionData.Load (Opcode.Uload32) p MemFlags Offset))
-)
-
-(decl sload32 (MemFlags Value Offset32) Inst)
-(extractor
-    (sload32 MemFlags p Offset)
-    (inst_data (InstructionData.Load (Opcode.Sload32) p MemFlags Offset))
-)
-
-(decl istore32 (MemFlags Value Value Offset32) Inst)
-(extractor
-    (istore32 MemFlags x p Offset)
-    (inst_data (InstructionData.Store (Opcode.Istore32) (value_array_2 x p) MemFlags Offset))
-)
-
-(decl uload8x8 (MemFlags Value Offset32) Inst)
-(extractor
-    (uload8x8 MemFlags p Offset)
-    (inst_data (InstructionData.Load (Opcode.Uload8x8) p MemFlags Offset))
-)
-
-(decl sload8x8 (MemFlags Value Offset32) Inst)
-(extractor
-    (sload8x8 MemFlags p Offset)
-    (inst_data (InstructionData.Load (Opcode.Sload8x8) p MemFlags Offset))
-)
-
-(decl uload16x4 (MemFlags Value Offset32) Inst)
-(extractor
-    (uload16x4 MemFlags p Offset)
-    (inst_data (InstructionData.Load (Opcode.Uload16x4) p MemFlags Offset))
-)
-
-(decl sload16x4 (MemFlags Value Offset32) Inst)
-(extractor
-    (sload16x4 MemFlags p Offset)
-    (inst_data (InstructionData.Load (Opcode.Sload16x4) p MemFlags Offset))
-)
-
-(decl uload32x2 (MemFlags Value Offset32) Inst)
-(extractor
-    (uload32x2 MemFlags p Offset)
-    (inst_data (InstructionData.Load (Opcode.Uload32x2) p MemFlags Offset))
-)
-
-(decl sload32x2 (MemFlags Value Offset32) Inst)
-(extractor
-    (sload32x2 MemFlags p Offset)
-    (inst_data (InstructionData.Load (Opcode.Sload32x2) p MemFlags Offset))
-)
-
-(decl stack_load (StackSlot Offset32) Inst)
-(extractor
-    (stack_load SS Offset)
-    (inst_data (InstructionData.StackLoad (Opcode.StackLoad) SS Offset))
-)
-
-(decl stack_store (Value StackSlot Offset32) Inst)
-(extractor
-    (stack_store x SS Offset)
-    (inst_data (InstructionData.StackStore (Opcode.StackStore) x SS Offset))
-)
-
-(decl stack_addr (StackSlot Offset32) Inst)
-(extractor
-    (stack_addr SS Offset)
-    (inst_data (InstructionData.StackLoad (Opcode.StackAddr) SS Offset))
-)
-
-(decl dynamic_stack_load (DynamicStackSlot) Inst)
-(extractor
-    (dynamic_stack_load DSS)
-    (inst_data (InstructionData.DynamicStackLoad (Opcode.DynamicStackLoad) DSS))
-)
-
-(decl dynamic_stack_store (Value DynamicStackSlot) Inst)
-(extractor
-    (dynamic_stack_store x DSS)
-    (inst_data (InstructionData.DynamicStackStore (Opcode.DynamicStackStore) x DSS))
-)
-
-(decl dynamic_stack_addr (DynamicStackSlot) Inst)
-(extractor
-    (dynamic_stack_addr DSS)
-    (inst_data (InstructionData.DynamicStackLoad (Opcode.DynamicStackAddr) DSS))
-)
-
-(decl global_value (GlobalValue) Inst)
-(extractor
-    (global_value GV)
-    (inst_data (InstructionData.UnaryGlobalValue (Opcode.GlobalValue) GV))
-)
-
-(decl symbol_value (GlobalValue) Inst)
-(extractor
-    (symbol_value GV)
-    (inst_data (InstructionData.UnaryGlobalValue (Opcode.SymbolValue) GV))
-)
-
-(decl tls_value (GlobalValue) Inst)
-(extractor
-    (tls_value GV)
-    (inst_data (InstructionData.UnaryGlobalValue (Opcode.TlsValue) GV))
-)
-
-(decl get_pinned_reg () Inst)
-(extractor
-    (get_pinned_reg )
-    (inst_data (InstructionData.NullAry (Opcode.GetPinnedReg)))
-)
-
-(decl set_pinned_reg (Value) Inst)
-(extractor
-    (set_pinned_reg addr)
-    (inst_data (InstructionData.Unary (Opcode.SetPinnedReg) addr))
-)
-
-(decl get_frame_pointer () Inst)
-(extractor
-    (get_frame_pointer )
-    (inst_data (InstructionData.NullAry (Opcode.GetFramePointer)))
-)
-
-(decl get_stack_pointer () Inst)
-(extractor
-    (get_stack_pointer )
-    (inst_data (InstructionData.NullAry (Opcode.GetStackPointer)))
-)
-
-(decl get_return_address () Inst)
-(extractor
-    (get_return_address )
-    (inst_data (InstructionData.NullAry (Opcode.GetReturnAddress)))
-)
-
-(decl table_addr (Table Value Offset32) Inst)
-(extractor
-    (table_addr T p Offset)
-    (inst_data (InstructionData.TableAddr (Opcode.TableAddr) p T Offset))
-)
-
-(decl iconst (Imm64) Inst)
-(extractor
-    (iconst N)
-    (inst_data (InstructionData.UnaryImm (Opcode.Iconst) N))
-)
-
-(decl f32const (Ieee32) Inst)
-(extractor
-    (f32const N)
-    (inst_data (InstructionData.UnaryIeee32 (Opcode.F32const) N))
-)
-
-(decl f64const (Ieee64) Inst)
-(extractor
-    (f64const N)
-    (inst_data (InstructionData.UnaryIeee64 (Opcode.F64const) N))
-)
-
-(decl vconst (Constant) Inst)
-(extractor
-    (vconst N)
-    (inst_data (InstructionData.UnaryConst (Opcode.Vconst) N))
-)
-
-(decl shuffle (Value Value Immediate) Inst)
-(extractor
-    (shuffle a b mask)
-    (inst_data (InstructionData.Shuffle (Opcode.Shuffle) (value_array_2 a b) mask))
-)
-
-(decl null () Inst)
-(extractor
-    (null )
-    (inst_data (InstructionData.NullAry (Opcode.Null)))
-)
-
-(decl nop () Inst)
-(extractor
-    (nop )
-    (inst_data (InstructionData.NullAry (Opcode.Nop)))
-)
-
-(decl select (Value Value Value) Inst)
-(extractor
-    (select c x y)
-    (inst_data (InstructionData.Ternary (Opcode.Select) (value_array_3 c x y)))
-)
-
-(decl select_spectre_guard (Value Value Value) Inst)
-(extractor
-    (select_spectre_guard c x y)
-    (inst_data (InstructionData.Ternary (Opcode.SelectSpectreGuard) (value_array_3 c x y)))
-)
-
-(decl bitselect (Value Value Value) Inst)
-(extractor
-    (bitselect c x y)
-    (inst_data (InstructionData.Ternary (Opcode.Bitselect) (value_array_3 c x y)))
-)
-
-(decl x86_blendv (Value Value Value) Inst)
-(extractor
-    (x86_blendv c x y)
-    (inst_data (InstructionData.Ternary (Opcode.X86Blendv) (value_array_3 c x y)))
-)
-
-(decl vany_true (Value) Inst)
-(extractor
-    (vany_true a)
-    (inst_data (InstructionData.Unary (Opcode.VanyTrue) a))
-)
-
-(decl vall_true (Value) Inst)
-(extractor
-    (vall_true a)
-    (inst_data (InstructionData.Unary (Opcode.VallTrue) a))
-)
-
-(decl vhigh_bits (Value) Inst)
-(extractor
-    (vhigh_bits a)
-    (inst_data (InstructionData.Unary (Opcode.VhighBits) a))
-)
-
-(decl icmp (IntCC Value Value) Inst)
-(extractor
-    (icmp Cond x y)
-    (inst_data (InstructionData.IntCompare (Opcode.Icmp) (value_array_2 x y) Cond))
-)
-
-(decl icmp_imm (IntCC Value Imm64) Inst)
-(extractor
-    (icmp_imm Cond x Y)
-    (inst_data (InstructionData.IntCompareImm (Opcode.IcmpImm) x Cond Y))
-)
-
-(decl iadd (Value Value) Inst)
-(extractor
-    (iadd x y)
-    (inst_data (InstructionData.Binary (Opcode.Iadd) (value_array_2 x y)))
-)
-
-(decl isub (Value Value) Inst)
-(extractor
-    (isub x y)
-    (inst_data (InstructionData.Binary (Opcode.Isub) (value_array_2 x y)))
-)
-
-(decl ineg (Value) Inst)
-(extractor
-    (ineg x)
-    (inst_data (InstructionData.Unary (Opcode.Ineg) x))
-)
-
-(decl iabs (Value) Inst)
-(extractor
-    (iabs x)
-    (inst_data (InstructionData.Unary (Opcode.Iabs) x))
-)
-
-(decl imul (Value Value) Inst)
-(extractor
-    (imul x y)
-    (inst_data (InstructionData.Binary (Opcode.Imul) (value_array_2 x y)))
-)
-
-(decl umulhi (Value Value) Inst)
-(extractor
-    (umulhi x y)
-    (inst_data (InstructionData.Binary (Opcode.Umulhi) (value_array_2 x y)))
-)
-
-(decl smulhi (Value Value) Inst)
-(extractor
-    (smulhi x y)
-    (inst_data (InstructionData.Binary (Opcode.Smulhi) (value_array_2 x y)))
-)
-
-(decl sqmul_round_sat (Value Value) Inst)
-(extractor
-    (sqmul_round_sat x y)
-    (inst_data (InstructionData.Binary (Opcode.SqmulRoundSat) (value_array_2 x y)))
-)
-
-(decl x86_pmulhrsw (Value Value) Inst)
-(extractor
-    (x86_pmulhrsw x y)
-    (inst_data (InstructionData.Binary (Opcode.X86Pmulhrsw) (value_array_2 x y)))
-)
-
-(decl udiv (Value Value) Inst)
-(extractor
-    (udiv x y)
-    (inst_data (InstructionData.Binary (Opcode.Udiv) (value_array_2 x y)))
-)
-
-(decl sdiv (Value Value) Inst)
-(extractor
-    (sdiv x y)
-    (inst_data (InstructionData.Binary (Opcode.Sdiv) (value_array_2 x y)))
-)
-
-(decl urem (Value Value) Inst)
-(extractor
-    (urem x y)
-    (inst_data (InstructionData.Binary (Opcode.Urem) (value_array_2 x y)))
-)
-
-(decl srem (Value Value) Inst)
-(extractor
-    (srem x y)
-    (inst_data (InstructionData.Binary (Opcode.Srem) (value_array_2 x y)))
-)
-
-(decl iadd_imm (Value Imm64) Inst)
-(extractor
-    (iadd_imm x Y)
-    (inst_data (InstructionData.BinaryImm64 (Opcode.IaddImm) x Y))
-)
-
-(decl imul_imm (Value Imm64) Inst)
-(extractor
-    (imul_imm x Y)
-    (inst_data (InstructionData.BinaryImm64 (Opcode.ImulImm) x Y))
-)
-
-(decl udiv_imm (Value Imm64) Inst)
-(extractor
-    (udiv_imm x Y)
-    (inst_data (InstructionData.BinaryImm64 (Opcode.UdivImm) x Y))
-)
-
-(decl sdiv_imm (Value Imm64) Inst)
-(extractor
-    (sdiv_imm x Y)
-    (inst_data (InstructionData.BinaryImm64 (Opcode.SdivImm) x Y))
-)
-
-(decl urem_imm (Value Imm64) Inst)
-(extractor
-    (urem_imm x Y)
-    (inst_data (InstructionData.BinaryImm64 (Opcode.UremImm) x Y))
-)
-
-(decl srem_imm (Value Imm64) Inst)
-(extractor
-    (srem_imm x Y)
-    (inst_data (InstructionData.BinaryImm64 (Opcode.SremImm) x Y))
-)
-
-(decl irsub_imm (Value Imm64) Inst)
-(extractor
-    (irsub_imm x Y)
-    (inst_data (InstructionData.BinaryImm64 (Opcode.IrsubImm) x Y))
-)
-
-(decl iadd_cin (Value Value Value) Inst)
-(extractor
-    (iadd_cin x y c_in)
-    (inst_data (InstructionData.Ternary (Opcode.IaddCin) (value_array_3 x y c_in)))
-)
-
-(decl iadd_carry (Value Value Value) Inst)
-(extractor
-    (iadd_carry x y c_in)
-    (inst_data (InstructionData.Ternary (Opcode.IaddCarry) (value_array_3 x y c_in)))
-)
-
-(decl uadd_overflow (Value Value) Inst)
-(extractor
-    (uadd_overflow x y)
-    (inst_data (InstructionData.Binary (Opcode.UaddOverflow) (value_array_2 x y)))
-)
-
-(decl sadd_overflow (Value Value) Inst)
-(extractor
-    (sadd_overflow x y)
-    (inst_data (InstructionData.Binary (Opcode.SaddOverflow) (value_array_2 x y)))
-)
-
-(decl usub_overflow (Value Value) Inst)
-(extractor
-    (usub_overflow x y)
-    (inst_data (InstructionData.Binary (Opcode.UsubOverflow) (value_array_2 x y)))
-)
-
-(decl ssub_overflow (Value Value) Inst)
-(extractor
-    (ssub_overflow x y)
-    (inst_data (InstructionData.Binary (Opcode.SsubOverflow) (value_array_2 x y)))
-)
-
-(decl umul_overflow (Value Value) Inst)
-(extractor
-    (umul_overflow x y)
-    (inst_data (InstructionData.Binary (Opcode.UmulOverflow) (value_array_2 x y)))
-)
-
-(decl smul_overflow (Value Value) Inst)
-(extractor
-    (smul_overflow x y)
-    (inst_data (InstructionData.Binary (Opcode.SmulOverflow) (value_array_2 x y)))
-)
-
-(decl uadd_overflow_trap (Value Value TrapCode) Inst)
-(extractor
-    (uadd_overflow_trap x y code)
-    (inst_data (InstructionData.IntAddTrap (Opcode.UaddOverflowTrap) (value_array_2 x y) code))
-)
-
-(decl isub_bin (Value Value Value) Inst)
-(extractor
-    (isub_bin x y b_in)
-    (inst_data (InstructionData.Ternary (Opcode.IsubBin) (value_array_3 x y b_in)))
-)
-
-(decl isub_borrow (Value Value Value) Inst)
-(extractor
-    (isub_borrow x y b_in)
-    (inst_data (InstructionData.Ternary (Opcode.IsubBorrow) (value_array_3 x y b_in)))
-)
-
-(decl band (Value Value) Inst)
-(extractor
-    (band x y)
-    (inst_data (InstructionData.Binary (Opcode.Band) (value_array_2 x y)))
-)
-
-(decl bor (Value Value) Inst)
-(extractor
-    (bor x y)
-    (inst_data (InstructionData.Binary (Opcode.Bor) (value_array_2 x y)))
-)
-
-(decl bxor (Value Value) Inst)
-(extractor
-    (bxor x y)
-    (inst_data (InstructionData.Binary (Opcode.Bxor) (value_array_2 x y)))
-)
-
-(decl bnot (Value) Inst)
-(extractor
-    (bnot x)
-    (inst_data (InstructionData.Unary (Opcode.Bnot) x))
-)
-
-(decl band_not (Value Value) Inst)
-(extractor
-    (band_not x y)
-    (inst_data (InstructionData.Binary (Opcode.BandNot) (value_array_2 x y)))
-)
-
-(decl bor_not (Value Value) Inst)
-(extractor
-    (bor_not x y)
-    (inst_data (InstructionData.Binary (Opcode.BorNot) (value_array_2 x y)))
-)
-
-(decl bxor_not (Value Value) Inst)
-(extractor
-    (bxor_not x y)
-    (inst_data (InstructionData.Binary (Opcode.BxorNot) (value_array_2 x y)))
-)
-
-(decl band_imm (Value Imm64) Inst)
-(extractor
-    (band_imm x Y)
-    (inst_data (InstructionData.BinaryImm64 (Opcode.BandImm) x Y))
-)
-
-(decl bor_imm (Value Imm64) Inst)
-(extractor
-    (bor_imm x Y)
-    (inst_data (InstructionData.BinaryImm64 (Opcode.BorImm) x Y))
-)
-
-(decl bxor_imm (Value Imm64) Inst)
-(extractor
-    (bxor_imm x Y)
-    (inst_data (InstructionData.BinaryImm64 (Opcode.BxorImm) x Y))
-)
-
-(decl rotl (Value Value) Inst)
-(extractor
-    (rotl x y)
-    (inst_data (InstructionData.Binary (Opcode.Rotl) (value_array_2 x y)))
-)
-
-(decl rotr (Value Value) Inst)
-(extractor
-    (rotr x y)
-    (inst_data (InstructionData.Binary (Opcode.Rotr) (value_array_2 x y)))
-)
-
-(decl rotl_imm (Value Imm64) Inst)
-(extractor
-    (rotl_imm x Y)
-    (inst_data (InstructionData.BinaryImm64 (Opcode.RotlImm) x Y))
-)
-
-(decl rotr_imm (Value Imm64) Inst)
-(extractor
-    (rotr_imm x Y)
-    (inst_data (InstructionData.BinaryImm64 (Opcode.RotrImm) x Y))
-)
-
-(decl ishl (Value Value) Inst)
-(extractor
-    (ishl x y)
-    (inst_data (InstructionData.Binary (Opcode.Ishl) (value_array_2 x y)))
-)
-
-(decl ushr (Value Value) Inst)
-(extractor
-    (ushr x y)
-    (inst_data (InstructionData.Binary (Opcode.Ushr) (value_array_2 x y)))
-)
-
-(decl sshr (Value Value) Inst)
-(extractor
-    (sshr x y)
-    (inst_data (InstructionData.Binary (Opcode.Sshr) (value_array_2 x y)))
-)
-
-(decl ishl_imm (Value Imm64) Inst)
-(extractor
-    (ishl_imm x Y)
-    (inst_data (InstructionData.BinaryImm64 (Opcode.IshlImm) x Y))
-)
-
-(decl ushr_imm (Value Imm64) Inst)
-(extractor
-    (ushr_imm x Y)
-    (inst_data (InstructionData.BinaryImm64 (Opcode.UshrImm) x Y))
-)
-
-(decl sshr_imm (Value Imm64) Inst)
-(extractor
-    (sshr_imm x Y)
-    (inst_data (InstructionData.BinaryImm64 (Opcode.SshrImm) x Y))
-)
-
-(decl bitrev (Value) Inst)
-(extractor
-    (bitrev x)
-    (inst_data (InstructionData.Unary (Opcode.Bitrev) x))
-)
-
-(decl clz (Value) Inst)
-(extractor
-    (clz x)
-    (inst_data (InstructionData.Unary (Opcode.Clz) x))
-)
-
-(decl cls (Value) Inst)
-(extractor
-    (cls x)
-    (inst_data (InstructionData.Unary (Opcode.Cls) x))
-)
-
-(decl ctz (Value) Inst)
-(extractor
-    (ctz x)
-    (inst_data (InstructionData.Unary (Opcode.Ctz) x))
-)
-
-(decl bswap (Value) Inst)
-(extractor
-    (bswap x)
-    (inst_data (InstructionData.Unary (Opcode.Bswap) x))
-)
-
-(decl popcnt (Value) Inst)
-(extractor
-    (popcnt x)
-    (inst_data (InstructionData.Unary (Opcode.Popcnt) x))
-)
-
-(decl fcmp (FloatCC Value Value) Inst)
-(extractor
-    (fcmp Cond x y)
-    (inst_data (InstructionData.FloatCompare (Opcode.Fcmp) (value_array_2 x y) Cond))
-)
-
-(decl fadd (Value Value) Inst)
-(extractor
-    (fadd x y)
-    (inst_data (InstructionData.Binary (Opcode.Fadd) (value_array_2 x y)))
-)
-
-(decl fsub (Value Value) Inst)
-(extractor
-    (fsub x y)
-    (inst_data (InstructionData.Binary (Opcode.Fsub) (value_array_2 x y)))
-)
-
-(decl fmul (Value Value) Inst)
-(extractor
-    (fmul x y)
-    (inst_data (InstructionData.Binary (Opcode.Fmul) (value_array_2 x y)))
-)
-
-(decl fdiv (Value Value) Inst)
-(extractor
-    (fdiv x y)
-    (inst_data (InstructionData.Binary (Opcode.Fdiv) (value_array_2 x y)))
-)
-
-(decl sqrt (Value) Inst)
-(extractor
-    (sqrt x)
-    (inst_data (InstructionData.Unary (Opcode.Sqrt) x))
-)
-
-(decl fma (Value Value Value) Inst)
-(extractor
-    (fma x y z)
-    (inst_data (InstructionData.Ternary (Opcode.Fma) (value_array_3 x y z)))
-)
-
-(decl fneg (Value) Inst)
-(extractor
-    (fneg x)
-    (inst_data (InstructionData.Unary (Opcode.Fneg) x))
-)
-
-(decl fabs (Value) Inst)
-(extractor
-    (fabs x)
-    (inst_data (InstructionData.Unary (Opcode.Fabs) x))
-)
-
-(decl fcopysign (Value Value) Inst)
-(extractor
-    (fcopysign x y)
-    (inst_data (InstructionData.Binary (Opcode.Fcopysign) (value_array_2 x y)))
-)
-
-(decl fmin (Value Value) Inst)
-(extractor
-    (fmin x y)
-    (inst_data (InstructionData.Binary (Opcode.Fmin) (value_array_2 x y)))
-)
-
-(decl fmin_pseudo (Value Value) Inst)
-(extractor
-    (fmin_pseudo x y)
-    (inst_data (InstructionData.Binary (Opcode.FminPseudo) (value_array_2 x y)))
-)
-
-(decl fmax (Value Value) Inst)
-(extractor
-    (fmax x y)
-    (inst_data (InstructionData.Binary (Opcode.Fmax) (value_array_2 x y)))
-)
-
-(decl fmax_pseudo (Value Value) Inst)
-(extractor
-    (fmax_pseudo x y)
-    (inst_data (InstructionData.Binary (Opcode.FmaxPseudo) (value_array_2 x y)))
-)
-
-(decl ceil (Value) Inst)
-(extractor
-    (ceil x)
-    (inst_data (InstructionData.Unary (Opcode.Ceil) x))
-)
-
-(decl floor (Value) Inst)
-(extractor
-    (floor x)
-    (inst_data (InstructionData.Unary (Opcode.Floor) x))
-)
-
-(decl trunc (Value) Inst)
-(extractor
-    (trunc x)
-    (inst_data (InstructionData.Unary (Opcode.Trunc) x))
-)
-
-(decl nearest (Value) Inst)
-(extractor
-    (nearest x)
-    (inst_data (InstructionData.Unary (Opcode.Nearest) x))
-)
-
-(decl is_null (Value) Inst)
-(extractor
-    (is_null x)
-    (inst_data (InstructionData.Unary (Opcode.IsNull) x))
-)
-
-(decl is_invalid (Value) Inst)
-(extractor
-    (is_invalid x)
-    (inst_data (InstructionData.Unary (Opcode.IsInvalid) x))
-)
-
-(decl bitcast (MemFlags Value) Inst)
-(extractor
-    (bitcast MemFlags x)
-    (inst_data (InstructionData.LoadNoOffset (Opcode.Bitcast) x MemFlags))
-)
-
-(decl scalar_to_vector (Value) Inst)
-(extractor
-    (scalar_to_vector s)
-    (inst_data (InstructionData.Unary (Opcode.ScalarToVector) s))
-)
-
-(decl bmask (Value) Inst)
-(extractor
-    (bmask x)
-    (inst_data (InstructionData.Unary (Opcode.Bmask) x))
-)
-
-(decl ireduce (Value) Inst)
-(extractor
-    (ireduce x)
-    (inst_data (InstructionData.Unary (Opcode.Ireduce) x))
-)
-
-(decl snarrow (Value Value) Inst)
-(extractor
-    (snarrow x y)
-    (inst_data (InstructionData.Binary (Opcode.Snarrow) (value_array_2 x y)))
-)
-
-(decl unarrow (Value Value) Inst)
-(extractor
-    (unarrow x y)
-    (inst_data (InstructionData.Binary (Opcode.Unarrow) (value_array_2 x y)))
-)
-
-(decl uunarrow (Value Value) Inst)
-(extractor
-    (uunarrow x y)
-    (inst_data (InstructionData.Binary (Opcode.Uunarrow) (value_array_2 x y)))
-)
-
-(decl swiden_low (Value) Inst)
-(extractor
-    (swiden_low x)
-    (inst_data (InstructionData.Unary (Opcode.SwidenLow) x))
-)
-
-(decl swiden_high (Value) Inst)
-(extractor
-    (swiden_high x)
-    (inst_data (InstructionData.Unary (Opcode.SwidenHigh) x))
-)
-
-(decl uwiden_low (Value) Inst)
-(extractor
-    (uwiden_low x)
-    (inst_data (InstructionData.Unary (Opcode.UwidenLow) x))
-)
-
-(decl uwiden_high (Value) Inst)
-(extractor
-    (uwiden_high x)
-    (inst_data (InstructionData.Unary (Opcode.UwidenHigh) x))
-)
-
-(decl iadd_pairwise (Value Value) Inst)
-(extractor
-    (iadd_pairwise x y)
-    (inst_data (InstructionData.Binary (Opcode.IaddPairwise) (value_array_2 x y)))
-)
-
-(decl x86_pmaddubsw (Value Value) Inst)
-(extractor
-    (x86_pmaddubsw x y)
-    (inst_data (InstructionData.Binary (Opcode.X86Pmaddubsw) (value_array_2 x y)))
-)
-
-(decl uextend (Value) Inst)
-(extractor
-    (uextend x)
-    (inst_data (InstructionData.Unary (Opcode.Uextend) x))
-)
-
-(decl sextend (Value) Inst)
-(extractor
-    (sextend x)
-    (inst_data (InstructionData.Unary (Opcode.Sextend) x))
-)
-
-(decl fpromote (Value) Inst)
-(extractor
-    (fpromote x)
-    (inst_data (InstructionData.Unary (Opcode.Fpromote) x))
-)
-
-(decl fdemote (Value) Inst)
-(extractor
-    (fdemote x)
-    (inst_data (InstructionData.Unary (Opcode.Fdemote) x))
-)
-
-(decl fvdemote (Value) Inst)
-(extractor
-    (fvdemote x)
-    (inst_data (InstructionData.Unary (Opcode.Fvdemote) x))
-)
-
-(decl fvpromote_low (Value) Inst)
-(extractor
-    (fvpromote_low a)
-    (inst_data (InstructionData.Unary (Opcode.FvpromoteLow) a))
-)
-
-(decl fcvt_to_uint (Value) Inst)
-(extractor
-    (fcvt_to_uint x)
-    (inst_data (InstructionData.Unary (Opcode.FcvtToUint) x))
-)
-
-(decl fcvt_to_sint (Value) Inst)
-(extractor
-    (fcvt_to_sint x)
-    (inst_data (InstructionData.Unary (Opcode.FcvtToSint) x))
-)
-
-(decl fcvt_to_uint_sat (Value) Inst)
-(extractor
-    (fcvt_to_uint_sat x)
-    (inst_data (InstructionData.Unary (Opcode.FcvtToUintSat) x))
-)
-
-(decl fcvt_to_sint_sat (Value) Inst)
-(extractor
-    (fcvt_to_sint_sat x)
-    (inst_data (InstructionData.Unary (Opcode.FcvtToSintSat) x))
-)
-
-(decl x86_cvtt2dq (Value) Inst)
-(extractor
-    (x86_cvtt2dq x)
-    (inst_data (InstructionData.Unary (Opcode.X86Cvtt2dq) x))
-)
-
-(decl fcvt_from_uint (Value) Inst)
-(extractor
-    (fcvt_from_uint x)
-    (inst_data (InstructionData.Unary (Opcode.FcvtFromUint) x))
-)
-
-(decl fcvt_from_sint (Value) Inst)
-(extractor
-    (fcvt_from_sint x)
-    (inst_data (InstructionData.Unary (Opcode.FcvtFromSint) x))
-)
-
-(decl isplit (Value) Inst)
-(extractor
-    (isplit x)
-    (inst_data (InstructionData.Unary (Opcode.Isplit) x))
-)
-
-(decl iconcat (Value Value) Inst)
-(extractor
-    (iconcat lo hi)
-    (inst_data (InstructionData.Binary (Opcode.Iconcat) (value_array_2 lo hi)))
-)
-
-(decl atomic_rmw (MemFlags AtomicRmwOp Value Value) Inst)
-(extractor
-    (atomic_rmw MemFlags AtomicRmwOp p x)
-    (inst_data (InstructionData.AtomicRmw (Opcode.AtomicRmw) (value_array_2 p x) MemFlags AtomicRmwOp))
-)
-
-(decl atomic_cas (MemFlags Value Value Value) Inst)
-(extractor
-    (atomic_cas MemFlags p e x)
-    (inst_data (InstructionData.AtomicCas (Opcode.AtomicCas) (value_array_3 p e x) MemFlags))
-)
-
-(decl atomic_load (MemFlags Value) Inst)
-(extractor
-    (atomic_load MemFlags p)
-    (inst_data (InstructionData.LoadNoOffset (Opcode.AtomicLoad) p MemFlags))
-)
-
-(decl atomic_store (MemFlags Value Value) Inst)
-(extractor
-    (atomic_store MemFlags x p)
-    (inst_data (InstructionData.StoreNoOffset (Opcode.AtomicStore) (value_array_2 x p) MemFlags))
-)
-
-(decl fence () Inst)
-(extractor
-    (fence )
-    (inst_data (InstructionData.NullAry (Opcode.Fence)))
-)
-
-(decl extract_vector (Value Uimm8) Inst)
-(extractor
-    (extract_vector x y)
-    (inst_data (InstructionData.BinaryImm8 (Opcode.ExtractVector) x y))
-)
-
diff --git a/cranelift/codegen/isle_generated_code/clif_opt.isle b/cranelift/codegen/isle_generated_code/clif_opt.isle
deleted file mode 100644
index 0f5a1a7caedc..000000000000
--- a/cranelift/codegen/isle_generated_code/clif_opt.isle
+++ /dev/null
@@ -1,1752 +0,0 @@
-;; GENERATED BY `gen_isle`. DO NOT EDIT!!!
-;;
-;; This ISLE file defines all the external type declarations for Cranelift's
-;; data structures that ISLE will process, such as `InstructionData` and
-;; `Opcode`.
-
-;;;; Extern type declarations for immediates ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-(type Constant (primitive Constant))
-(type DynamicStackSlot (primitive DynamicStackSlot))
-(type FuncRef (primitive FuncRef))
-(type GlobalValue (primitive GlobalValue))
-(type Ieee32 (primitive Ieee32))
-(type Ieee64 (primitive Ieee64))
-(type Imm64 (primitive Imm64))
-(type Immediate (primitive Immediate))
-(type JumpTable (primitive JumpTable))
-(type MemFlags (primitive MemFlags))
-(type Offset32 (primitive Offset32))
-(type SigRef (primitive SigRef))
-(type StackSlot (primitive StackSlot))
-(type Table (primitive Table))
-(type Uimm8 (primitive Uimm8))
-
-;;;; Enumerated Immediate: AtomicRmwOp ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-(type AtomicRmwOp extern
-    (enum
-        Add
-        And
-        Nand
-        Or
-        Smax
-        Smin
-        Sub
-        Umax
-        Umin
-        Xchg
-        Xor
-    )
-)
-
-;;;; Enumerated Immediate: FloatCC ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-(type FloatCC extern
-    (enum
-        Equal
-        GreaterThan
-        GreaterThanOrEqual
-        LessThan
-        LessThanOrEqual
-        NotEqual
-        Ordered
-        OrderedNotEqual
-        Unordered
-        UnorderedOrEqual
-        UnorderedOrGreaterThan
-        UnorderedOrGreaterThanOrEqual
-        UnorderedOrLessThan
-        UnorderedOrLessThanOrEqual
-    )
-)
-
-;;;; Enumerated Immediate: IntCC ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-(type IntCC extern
-    (enum
-        Equal
-        NotEqual
-        SignedGreaterThan
-        SignedGreaterThanOrEqual
-        SignedLessThan
-        SignedLessThanOrEqual
-        UnsignedGreaterThan
-        UnsignedGreaterThanOrEqual
-        UnsignedLessThan
-        UnsignedLessThanOrEqual
-    )
-)
-
-;;;; Enumerated Immediate: TrapCode ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-(type TrapCode extern
-    (enum
-        HeapOutOfBounds
-        IntegerDivisionByZero
-        IntegerOverflow
-        StackOverflow
-    )
-)
-
-;;;; Value Arrays ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-;; ISLE representation of `[Value; 2]`.
-(type ValueArray2 extern (enum))
-
-(decl value_array_2 (Value Value) ValueArray2)
-(extern constructor value_array_2 pack_value_array_2)
-(extern extractor infallible value_array_2 unpack_value_array_2)
-
-;; ISLE representation of `[Value; 3]`.
-(type ValueArray3 extern (enum))
-
-(decl value_array_3 (Value Value Value) ValueArray3)
-(extern constructor value_array_3 pack_value_array_3)
-(extern extractor infallible value_array_3 unpack_value_array_3)
-
-;;;; Block Arrays ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-;; ISLE representation of `[BlockCall; 2]`.
-(type BlockArray2 extern (enum))
-
-(decl block_array_2 (BlockCall BlockCall) BlockArray2)
-(extern constructor block_array_2 pack_block_array_2)
-(extern extractor infallible block_array_2 unpack_block_array_2)
-
-;;;; `Opcode` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-(type Opcode extern
-    (enum
-        Jump
-        Brif
-        BrTable
-        Debugtrap
-        Trap
-        Trapz
-        ResumableTrap
-        Trapnz
-        ResumableTrapnz
-        Return
-        Call
-        CallIndirect
-        ReturnCall
-        ReturnCallIndirect
-        FuncAddr
-        Splat
-        Swizzle
-        X86Pshufb
-        Insertlane
-        Extractlane
-        Smin
-        Umin
-        Smax
-        Umax
-        AvgRound
-        UaddSat
-        SaddSat
-        UsubSat
-        SsubSat
-        Load
-        Store
-        Uload8
-        Sload8
-        Istore8
-        Uload16
-        Sload16
-        Istore16
-        Uload32
-        Sload32
-        Istore32
-        Uload8x8
-        Sload8x8
-        Uload16x4
-        Sload16x4
-        Uload32x2
-        Sload32x2
-        StackLoad
-        StackStore
-        StackAddr
-        DynamicStackLoad
-        DynamicStackStore
-        DynamicStackAddr
-        GlobalValue
-        SymbolValue
-        TlsValue
-        GetPinnedReg
-        SetPinnedReg
-        GetFramePointer
-        GetStackPointer
-        GetReturnAddress
-        TableAddr
-        Iconst
-        F32const
-        F64const
-        Vconst
-        Shuffle
-        Null
-        Nop
-        Select
-        SelectSpectreGuard
-        Bitselect
-        X86Blendv
-        VanyTrue
-        VallTrue
-        VhighBits
-        Icmp
-        IcmpImm
-        Iadd
-        Isub
-        Ineg
-        Iabs
-        Imul
-        Umulhi
-        Smulhi
-        SqmulRoundSat
-        X86Pmulhrsw
-        Udiv
-        Sdiv
-        Urem
-        Srem
-        IaddImm
-        ImulImm
-        UdivImm
-        SdivImm
-        UremImm
-        SremImm
-        IrsubImm
-        IaddCin
-        IaddCarry
-        UaddOverflow
-        SaddOverflow
-        UsubOverflow
-        SsubOverflow
-        UmulOverflow
-        SmulOverflow
-        UaddOverflowTrap
-        IsubBin
-        IsubBorrow
-        Band
-        Bor
-        Bxor
-        Bnot
-        BandNot
-        BorNot
-        BxorNot
-        BandImm
-        BorImm
-        BxorImm
-        Rotl
-        Rotr
-        RotlImm
-        RotrImm
-        Ishl
-        Ushr
-        Sshr
-        IshlImm
-        UshrImm
-        SshrImm
-        Bitrev
-        Clz
-        Cls
-        Ctz
-        Bswap
-        Popcnt
-        Fcmp
-        Fadd
-        Fsub
-        Fmul
-        Fdiv
-        Sqrt
-        Fma
-        Fneg
-        Fabs
-        Fcopysign
-        Fmin
-        FminPseudo
-        Fmax
-        FmaxPseudo
-        Ceil
-        Floor
-        Trunc
-        Nearest
-        IsNull
-        IsInvalid
-        Bitcast
-        ScalarToVector
-        Bmask
-        Ireduce
-        Snarrow
-        Unarrow
-        Uunarrow
-        SwidenLow
-        SwidenHigh
-        UwidenLow
-        UwidenHigh
-        IaddPairwise
-        X86Pmaddubsw
-        Uextend
-        Sextend
-        Fpromote
-        Fdemote
-        Fvdemote
-        FvpromoteLow
-        FcvtToUint
-        FcvtToSint
-        FcvtToUintSat
-        FcvtToSintSat
-        X86Cvtt2dq
-        FcvtFromUint
-        FcvtFromSint
-        Isplit
-        Iconcat
-        AtomicRmw
-        AtomicCas
-        AtomicLoad
-        AtomicStore
-        Fence
-        ExtractVector
-    )
-)
-
-;;;; `InstructionData` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-(type InstructionData extern
-    (enum
-        (AtomicCas (opcode Opcode) (args ValueArray3) (flags MemFlags))
-        (AtomicRmw (opcode Opcode) (args ValueArray2) (flags MemFlags) (op AtomicRmwOp))
-        (Binary (opcode Opcode) (args ValueArray2))
-        (BinaryImm64 (opcode Opcode) (arg Value) (imm Imm64))
-        (BinaryImm8 (opcode Opcode) (arg Value) (imm Uimm8))
-        (BranchTable (opcode Opcode) (arg Value) (table JumpTable))
-        (Brif (opcode Opcode) (arg Value) (blocks BlockArray2))
-        (Call (opcode Opcode) (args ValueList) (func_ref FuncRef))
-        (CallIndirect (opcode Opcode) (args ValueList) (sig_ref SigRef))
-        (CondTrap (opcode Opcode) (arg Value) (code TrapCode))
-        (DynamicStackLoad (opcode Opcode) (dynamic_stack_slot DynamicStackSlot))
-        (DynamicStackStore (opcode Opcode) (arg Value) (dynamic_stack_slot DynamicStackSlot))
-        (FloatCompare (opcode Opcode) (args ValueArray2) (cond FloatCC))
-        (FuncAddr (opcode Opcode) (func_ref FuncRef))
-        (IntAddTrap (opcode Opcode) (args ValueArray2) (code TrapCode))
-        (IntCompare (opcode Opcode) (args ValueArray2) (cond IntCC))
-        (IntCompareImm (opcode Opcode) (arg Value) (cond IntCC) (imm Imm64))
-        (Jump (opcode Opcode) (destination BlockCall))
-        (Load (opcode Opcode) (arg Value) (flags MemFlags) (offset Offset32))
-        (LoadNoOffset (opcode Opcode) (arg Value) (flags MemFlags))
-        (MultiAry (opcode Opcode) (args ValueList))
-        (NullAry (opcode Opcode))
-        (Shuffle (opcode Opcode) (args ValueArray2) (imm Immediate))
-        (StackLoad (opcode Opcode) (stack_slot StackSlot) (offset Offset32))
-        (StackStore (opcode Opcode) (arg Value) (stack_slot StackSlot) (offset Offset32))
-        (Store (opcode Opcode) (args ValueArray2) (flags MemFlags) (offset Offset32))
-        (StoreNoOffset (opcode Opcode) (args ValueArray2) (flags MemFlags))
-        (TableAddr (opcode Opcode) (arg Value) (table Table) (offset Offset32))
-        (Ternary (opcode Opcode) (args ValueArray3))
-        (TernaryImm8 (opcode Opcode) (args ValueArray2) (imm Uimm8))
-        (Trap (opcode Opcode) (code TrapCode))
-        (Unary (opcode Opcode) (arg Value))
-        (UnaryConst (opcode Opcode) (constant_handle Constant))
-        (UnaryGlobalValue (opcode Opcode) (global_value GlobalValue))
-        (UnaryIeee32 (opcode Opcode) (imm Ieee32))
-        (UnaryIeee64 (opcode Opcode) (imm Ieee64))
-        (UnaryImm (opcode Opcode) (imm Imm64))
-    )
-)
-
-;;;; Extracting Opcode, Operands, and Immediates from `InstructionData` ;;;;;;;;
-
-(decl func_addr (Type FuncRef) Value)
-(extractor
-    (func_addr ty FN)
-    (inst_data ty (InstructionData.FuncAddr (Opcode.FuncAddr) FN))
-)
-(rule (func_addr ty FN)
-    (make_inst ty (InstructionData.FuncAddr (Opcode.FuncAddr) FN))
-)
-
-(decl splat (Type Value) Value)
-(extractor
-    (splat ty x)
-    (inst_data ty (InstructionData.Unary (Opcode.Splat) x))
-)
-(rule (splat ty x)
-    (make_inst ty (InstructionData.Unary (Opcode.Splat) x))
-)
-
-(decl swizzle (Type Value Value) Value)
-(extractor
-    (swizzle ty x y)
-    (inst_data ty (InstructionData.Binary (Opcode.Swizzle) (value_array_2 x y)))
-)
-(rule (swizzle ty x y)
-    (make_inst ty (InstructionData.Binary (Opcode.Swizzle) (value_array_2_ctor x y)))
-)
-
-(decl x86_pshufb (Type Value Value) Value)
-(extractor
-    (x86_pshufb ty x y)
-    (inst_data ty (InstructionData.Binary (Opcode.X86Pshufb) (value_array_2 x y)))
-)
-(rule (x86_pshufb ty x y)
-    (make_inst ty (InstructionData.Binary (Opcode.X86Pshufb) (value_array_2_ctor x y)))
-)
-
-(decl insertlane (Type Value Value Uimm8) Value)
-(extractor
-    (insertlane ty x y Idx)
-    (inst_data ty (InstructionData.TernaryImm8 (Opcode.Insertlane) (value_array_2 x y) Idx))
-)
-(rule (insertlane ty x y Idx)
-    (make_inst ty (InstructionData.TernaryImm8 (Opcode.Insertlane) (value_array_2_ctor x y) Idx))
-)
-
-(decl extractlane (Type Value Uimm8) Value)
-(extractor
-    (extractlane ty x Idx)
-    (inst_data ty (InstructionData.BinaryImm8 (Opcode.Extractlane) x Idx))
-)
-(rule (extractlane ty x Idx)
-    (make_inst ty (InstructionData.BinaryImm8 (Opcode.Extractlane) x Idx))
-)
-
-(decl smin (Type Value Value) Value)
-(extractor
-    (smin ty x y)
-    (inst_data ty (InstructionData.Binary (Opcode.Smin) (value_array_2 x y)))
-)
-(rule (smin ty x y)
-    (make_inst ty (InstructionData.Binary (Opcode.Smin) (value_array_2_ctor x y)))
-)
-
-(decl umin (Type Value Value) Value)
-(extractor
-    (umin ty x y)
-    (inst_data ty (InstructionData.Binary (Opcode.Umin) (value_array_2 x y)))
-)
-(rule (umin ty x y)
-    (make_inst ty (InstructionData.Binary (Opcode.Umin) (value_array_2_ctor x y)))
-)
-
-(decl smax (Type Value Value) Value)
-(extractor
-    (smax ty x y)
-    (inst_data ty (InstructionData.Binary (Opcode.Smax) (value_array_2 x y)))
-)
-(rule (smax ty x y)
-    (make_inst ty (InstructionData.Binary (Opcode.Smax) (value_array_2_ctor x y)))
-)
-
-(decl umax (Type Value Value) Value)
-(extractor
-    (umax ty x y)
-    (inst_data ty (InstructionData.Binary (Opcode.Umax) (value_array_2 x y)))
-)
-(rule (umax ty x y)
-    (make_inst ty (InstructionData.Binary (Opcode.Umax) (value_array_2_ctor x y)))
-)
-
-(decl avg_round (Type Value Value) Value)
-(extractor
-    (avg_round ty x y)
-    (inst_data ty (InstructionData.Binary (Opcode.AvgRound) (value_array_2 x y)))
-)
-(rule (avg_round ty x y)
-    (make_inst ty (InstructionData.Binary (Opcode.AvgRound) (value_array_2_ctor x y)))
-)
-
-(decl uadd_sat (Type Value Value) Value)
-(extractor
-    (uadd_sat ty x y)
-    (inst_data ty (InstructionData.Binary (Opcode.UaddSat) (value_array_2 x y)))
-)
-(rule (uadd_sat ty x y)
-    (make_inst ty (InstructionData.Binary (Opcode.UaddSat) (value_array_2_ctor x y)))
-)
-
-(decl sadd_sat (Type Value Value) Value)
-(extractor
-    (sadd_sat ty x y)
-    (inst_data ty (InstructionData.Binary (Opcode.SaddSat) (value_array_2 x y)))
-)
-(rule (sadd_sat ty x y)
-    (make_inst ty (InstructionData.Binary (Opcode.SaddSat) (value_array_2_ctor x y)))
-)
-
-(decl usub_sat (Type Value Value) Value)
-(extractor
-    (usub_sat ty x y)
-    (inst_data ty (InstructionData.Binary (Opcode.UsubSat) (value_array_2 x y)))
-)
-(rule (usub_sat ty x y)
-    (make_inst ty (InstructionData.Binary (Opcode.UsubSat) (value_array_2_ctor x y)))
-)
-
-(decl ssub_sat (Type Value Value) Value)
-(extractor
-    (ssub_sat ty x y)
-    (inst_data ty (InstructionData.Binary (Opcode.SsubSat) (value_array_2 x y)))
-)
-(rule (ssub_sat ty x y)
-    (make_inst ty (InstructionData.Binary (Opcode.SsubSat) (value_array_2_ctor x y)))
-)
-
-(decl load (Type MemFlags Value Offset32) Value)
-(extractor
-    (load ty MemFlags p Offset)
-    (inst_data ty (InstructionData.Load (Opcode.Load) p MemFlags Offset))
-)
-(rule (load ty MemFlags p Offset)
-    (make_inst ty (InstructionData.Load (Opcode.Load) p MemFlags Offset))
-)
-
-(decl uload8 (Type MemFlags Value Offset32) Value)
-(extractor
-    (uload8 ty MemFlags p Offset)
-    (inst_data ty (InstructionData.Load (Opcode.Uload8) p MemFlags Offset))
-)
-(rule (uload8 ty MemFlags p Offset)
-    (make_inst ty (InstructionData.Load (Opcode.Uload8) p MemFlags Offset))
-)
-
-(decl sload8 (Type MemFlags Value Offset32) Value)
-(extractor
-    (sload8 ty MemFlags p Offset)
-    (inst_data ty (InstructionData.Load (Opcode.Sload8) p MemFlags Offset))
-)
-(rule (sload8 ty MemFlags p Offset)
-    (make_inst ty (InstructionData.Load (Opcode.Sload8) p MemFlags Offset))
-)
-
-(decl uload16 (Type MemFlags Value Offset32) Value)
-(extractor
-    (uload16 ty MemFlags p Offset)
-    (inst_data ty (InstructionData.Load (Opcode.Uload16) p MemFlags Offset))
-)
-(rule (uload16 ty MemFlags p Offset)
-    (make_inst ty (InstructionData.Load (Opcode.Uload16) p MemFlags Offset))
-)
-
-(decl sload16 (Type MemFlags Value Offset32) Value)
-(extractor
-    (sload16 ty MemFlags p Offset)
-    (inst_data ty (InstructionData.Load (Opcode.Sload16) p MemFlags Offset))
-)
-(rule (sload16 ty MemFlags p Offset)
-    (make_inst ty (InstructionData.Load (Opcode.Sload16) p MemFlags Offset))
-)
-
-(decl uload32 (Type MemFlags Value Offset32) Value)
-(extractor
-    (uload32 ty MemFlags p Offset)
-    (inst_data ty (InstructionData.Load (Opcode.Uload32) p MemFlags Offset))
-)
-(rule (uload32 ty MemFlags p Offset)
-    (make_inst ty (InstructionData.Load (Opcode.Uload32) p MemFlags Offset))
-)
-
-(decl sload32 (Type MemFlags Value Offset32) Value)
-(extractor
-    (sload32 ty MemFlags p Offset)
-    (inst_data ty (InstructionData.Load (Opcode.Sload32) p MemFlags Offset))
-)
-(rule (sload32 ty MemFlags p Offset)
-    (make_inst ty (InstructionData.Load (Opcode.Sload32) p MemFlags Offset))
-)
-
-(decl uload8x8 (Type MemFlags Value Offset32) Value)
-(extractor
-    (uload8x8 ty MemFlags p Offset)
-    (inst_data ty (InstructionData.Load (Opcode.Uload8x8) p MemFlags Offset))
-)
-(rule (uload8x8 ty MemFlags p Offset)
-    (make_inst ty (InstructionData.Load (Opcode.Uload8x8) p MemFlags Offset))
-)
-
-(decl sload8x8 (Type MemFlags Value Offset32) Value)
-(extractor
-    (sload8x8 ty MemFlags p Offset)
-    (inst_data ty (InstructionData.Load (Opcode.Sload8x8) p MemFlags Offset))
-)
-(rule (sload8x8 ty MemFlags p Offset)
-    (make_inst ty (InstructionData.Load (Opcode.Sload8x8) p MemFlags Offset))
-)
-
-(decl uload16x4 (Type MemFlags Value Offset32) Value)
-(extractor
-    (uload16x4 ty MemFlags p Offset)
-    (inst_data ty (InstructionData.Load (Opcode.Uload16x4) p MemFlags Offset))
-)
-(rule (uload16x4 ty MemFlags p Offset)
-    (make_inst ty (InstructionData.Load (Opcode.Uload16x4) p MemFlags Offset))
-)
-
-(decl sload16x4 (Type MemFlags Value Offset32) Value)
-(extractor
-    (sload16x4 ty MemFlags p Offset)
-    (inst_data ty (InstructionData.Load (Opcode.Sload16x4) p MemFlags Offset))
-)
-(rule (sload16x4 ty MemFlags p Offset)
-    (make_inst ty (InstructionData.Load (Opcode.Sload16x4) p MemFlags Offset))
-)
-
-(decl uload32x2 (Type MemFlags Value Offset32) Value)
-(extractor
-    (uload32x2 ty MemFlags p Offset)
-    (inst_data ty (InstructionData.Load (Opcode.Uload32x2) p MemFlags Offset))
-)
-(rule (uload32x2 ty MemFlags p Offset)
-    (make_inst ty (InstructionData.Load (Opcode.Uload32x2) p MemFlags Offset))
-)
-
-(decl sload32x2 (Type MemFlags Value Offset32) Value)
-(extractor
-    (sload32x2 ty MemFlags p Offset)
-    (inst_data ty (InstructionData.Load (Opcode.Sload32x2) p MemFlags Offset))
-)
-(rule (sload32x2 ty MemFlags p Offset)
-    (make_inst ty (InstructionData.Load (Opcode.Sload32x2) p MemFlags Offset))
-)
-
-(decl stack_load (Type StackSlot Offset32) Value)
-(extractor
-    (stack_load ty SS Offset)
-    (inst_data ty (InstructionData.StackLoad (Opcode.StackLoad) SS Offset))
-)
-(rule (stack_load ty SS Offset)
-    (make_inst ty (InstructionData.StackLoad (Opcode.StackLoad) SS Offset))
-)
-
-(decl stack_addr (Type StackSlot Offset32) Value)
-(extractor
-    (stack_addr ty SS Offset)
-    (inst_data ty (InstructionData.StackLoad (Opcode.StackAddr) SS Offset))
-)
-(rule (stack_addr ty SS Offset)
-    (make_inst ty (InstructionData.StackLoad (Opcode.StackAddr) SS Offset))
-)
-
-(decl dynamic_stack_load (Type DynamicStackSlot) Value)
-(extractor
-    (dynamic_stack_load ty DSS)
-    (inst_data ty (InstructionData.DynamicStackLoad (Opcode.DynamicStackLoad) DSS))
-)
-(rule (dynamic_stack_load ty DSS)
-    (make_inst ty (InstructionData.DynamicStackLoad (Opcode.DynamicStackLoad) DSS))
-)
-
-(decl dynamic_stack_addr (Type DynamicStackSlot) Value)
-(extractor
-    (dynamic_stack_addr ty DSS)
-    (inst_data ty (InstructionData.DynamicStackLoad (Opcode.DynamicStackAddr) DSS))
-)
-(rule (dynamic_stack_addr ty DSS)
-    (make_inst ty (InstructionData.DynamicStackLoad (Opcode.DynamicStackAddr) DSS))
-)
-
-(decl global_value (Type GlobalValue) Value)
-(extractor
-    (global_value ty GV)
-    (inst_data ty (InstructionData.UnaryGlobalValue (Opcode.GlobalValue) GV))
-)
-(rule (global_value ty GV)
-    (make_inst ty (InstructionData.UnaryGlobalValue (Opcode.GlobalValue) GV))
-)
-
-(decl symbol_value (Type GlobalValue) Value)
-(extractor
-    (symbol_value ty GV)
-    (inst_data ty (InstructionData.UnaryGlobalValue (Opcode.SymbolValue) GV))
-)
-(rule (symbol_value ty GV)
-    (make_inst ty (InstructionData.UnaryGlobalValue (Opcode.SymbolValue) GV))
-)
-
-(decl tls_value (Type GlobalValue) Value)
-(extractor
-    (tls_value ty GV)
-    (inst_data ty (InstructionData.UnaryGlobalValue (Opcode.TlsValue) GV))
-)
-(rule (tls_value ty GV)
-    (make_inst ty (InstructionData.UnaryGlobalValue (Opcode.TlsValue) GV))
-)
-
-(decl get_pinned_reg (Type ) Value)
-(extractor
-    (get_pinned_reg ty )
-    (inst_data ty (InstructionData.NullAry (Opcode.GetPinnedReg)))
-)
-(rule (get_pinned_reg ty )
-    (make_inst ty (InstructionData.NullAry (Opcode.GetPinnedReg)))
-)
-
-(decl get_frame_pointer (Type ) Value)
-(extractor
-    (get_frame_pointer ty )
-    (inst_data ty (InstructionData.NullAry (Opcode.GetFramePointer)))
-)
-(rule (get_frame_pointer ty )
-    (make_inst ty (InstructionData.NullAry (Opcode.GetFramePointer)))
-)
-
-(decl get_stack_pointer (Type ) Value)
-(extractor
-    (get_stack_pointer ty )
-    (inst_data ty (InstructionData.NullAry (Opcode.GetStackPointer)))
-)
-(rule (get_stack_pointer ty )
-    (make_inst ty (InstructionData.NullAry (Opcode.GetStackPointer)))
-)
-
-(decl get_return_address (Type ) Value)
-(extractor
-    (get_return_address ty )
-    (inst_data ty (InstructionData.NullAry (Opcode.GetReturnAddress)))
-)
-(rule (get_return_address ty )
-    (make_inst ty (InstructionData.NullAry (Opcode.GetReturnAddress)))
-)
-
-(decl table_addr (Type Table Value Offset32) Value)
-(extractor
-    (table_addr ty T p Offset)
-    (inst_data ty (InstructionData.TableAddr (Opcode.TableAddr) p T Offset))
-)
-(rule (table_addr ty T p Offset)
-    (make_inst ty (InstructionData.TableAddr (Opcode.TableAddr) p T Offset))
-)
-
-(decl iconst (Type Imm64) Value)
-(extractor
-    (iconst ty N)
-    (inst_data ty (InstructionData.UnaryImm (Opcode.Iconst) N))
-)
-(rule (iconst ty N)
-    (make_inst ty (InstructionData.UnaryImm (Opcode.Iconst) N))
-)
-
-(decl f32const (Type Ieee32) Value)
-(extractor
-    (f32const ty N)
-    (inst_data ty (InstructionData.UnaryIeee32 (Opcode.F32const) N))
-)
-(rule (f32const ty N)
-    (make_inst ty (InstructionData.UnaryIeee32 (Opcode.F32const) N))
-)
-
-(decl f64const (Type Ieee64) Value)
-(extractor
-    (f64const ty N)
-    (inst_data ty (InstructionData.UnaryIeee64 (Opcode.F64const) N))
-)
-(rule (f64const ty N)
-    (make_inst ty (InstructionData.UnaryIeee64 (Opcode.F64const) N))
-)
-
-(decl vconst (Type Constant) Value)
-(extractor
-    (vconst ty N)
-    (inst_data ty (InstructionData.UnaryConst (Opcode.Vconst) N))
-)
-(rule (vconst ty N)
-    (make_inst ty (InstructionData.UnaryConst (Opcode.Vconst) N))
-)
-
-(decl shuffle (Type Value Value Immediate) Value)
-(extractor
-    (shuffle ty a b mask)
-    (inst_data ty (InstructionData.Shuffle (Opcode.Shuffle) (value_array_2 a b) mask))
-)
-(rule (shuffle ty a b mask)
-    (make_inst ty (InstructionData.Shuffle (Opcode.Shuffle) (value_array_2_ctor a b) mask))
-)
-
-(decl null (Type ) Value)
-(extractor
-    (null ty )
-    (inst_data ty (InstructionData.NullAry (Opcode.Null)))
-)
-(rule (null ty )
-    (make_inst ty (InstructionData.NullAry (Opcode.Null)))
-)
-
-(decl select (Type Value Value Value) Value)
-(extractor
-    (select ty c x y)
-    (inst_data ty (InstructionData.Ternary (Opcode.Select) (value_array_3 c x y)))
-)
-(rule (select ty c x y)
-    (make_inst ty (InstructionData.Ternary (Opcode.Select) (value_array_3_ctor c x y)))
-)
-
-(decl select_spectre_guard (Type Value Value Value) Value)
-(extractor
-    (select_spectre_guard ty c x y)
-    (inst_data ty (InstructionData.Ternary (Opcode.SelectSpectreGuard) (value_array_3 c x y)))
-)
-(rule (select_spectre_guard ty c x y)
-    (make_inst ty (InstructionData.Ternary (Opcode.SelectSpectreGuard) (value_array_3_ctor c x y)))
-)
-
-(decl bitselect (Type Value Value Value) Value)
-(extractor
-    (bitselect ty c x y)
-    (inst_data ty (InstructionData.Ternary (Opcode.Bitselect) (value_array_3 c x y)))
-)
-(rule (bitselect ty c x y)
-    (make_inst ty (InstructionData.Ternary (Opcode.Bitselect) (value_array_3_ctor c x y)))
-)
-
-(decl x86_blendv (Type Value Value Value) Value)
-(extractor
-    (x86_blendv ty c x y)
-    (inst_data ty (InstructionData.Ternary (Opcode.X86Blendv) (value_array_3 c x y)))
-)
-(rule (x86_blendv ty c x y)
-    (make_inst ty (InstructionData.Ternary (Opcode.X86Blendv) (value_array_3_ctor c x y)))
-)
-
-(decl vany_true (Type Value) Value)
-(extractor
-    (vany_true ty a)
-    (inst_data ty (InstructionData.Unary (Opcode.VanyTrue) a))
-)
-(rule (vany_true ty a)
-    (make_inst ty (InstructionData.Unary (Opcode.VanyTrue) a))
-)
-
-(decl vall_true (Type Value) Value)
-(extractor
-    (vall_true ty a)
-    (inst_data ty (InstructionData.Unary (Opcode.VallTrue) a))
-)
-(rule (vall_true ty a)
-    (make_inst ty (InstructionData.Unary (Opcode.VallTrue) a))
-)
-
-(decl vhigh_bits (Type Value) Value)
-(extractor
-    (vhigh_bits ty a)
-    (inst_data ty (InstructionData.Unary (Opcode.VhighBits) a))
-)
-(rule (vhigh_bits ty a)
-    (make_inst ty (InstructionData.Unary (Opcode.VhighBits) a))
-)
-
-(decl icmp (Type IntCC Value Value) Value)
-(extractor
-    (icmp ty Cond x y)
-    (inst_data ty (InstructionData.IntCompare (Opcode.Icmp) (value_array_2 x y) Cond))
-)
-(rule (icmp ty Cond x y)
-    (make_inst ty (InstructionData.IntCompare (Opcode.Icmp) (value_array_2_ctor x y) Cond))
-)
-
-(decl icmp_imm (Type IntCC Value Imm64) Value)
-(extractor
-    (icmp_imm ty Cond x Y)
-    (inst_data ty (InstructionData.IntCompareImm (Opcode.IcmpImm) x Cond Y))
-)
-(rule (icmp_imm ty Cond x Y)
-    (make_inst ty (InstructionData.IntCompareImm (Opcode.IcmpImm) x Cond Y))
-)
-
-(decl iadd (Type Value Value) Value)
-(extractor
-    (iadd ty x y)
-    (inst_data ty (InstructionData.Binary (Opcode.Iadd) (value_array_2 x y)))
-)
-(rule (iadd ty x y)
-    (make_inst ty (InstructionData.Binary (Opcode.Iadd) (value_array_2_ctor x y)))
-)
-
-(decl isub (Type Value Value) Value)
-(extractor
-    (isub ty x y)
-    (inst_data ty (InstructionData.Binary (Opcode.Isub) (value_array_2 x y)))
-)
-(rule (isub ty x y)
-    (make_inst ty (InstructionData.Binary (Opcode.Isub) (value_array_2_ctor x y)))
-)
-
-(decl ineg (Type Value) Value)
-(extractor
-    (ineg ty x)
-    (inst_data ty (InstructionData.Unary (Opcode.Ineg) x))
-)
-(rule (ineg ty x)
-    (make_inst ty (InstructionData.Unary (Opcode.Ineg) x))
-)
-
-(decl iabs (Type Value) Value)
-(extractor
-    (iabs ty x)
-    (inst_data ty (InstructionData.Unary (Opcode.Iabs) x))
-)
-(rule (iabs ty x)
-    (make_inst ty (InstructionData.Unary (Opcode.Iabs) x))
-)
-
-(decl imul (Type Value Value) Value)
-(extractor
-    (imul ty x y)
-    (inst_data ty (InstructionData.Binary (Opcode.Imul) (value_array_2 x y)))
-)
-(rule (imul ty x y)
-    (make_inst ty (InstructionData.Binary (Opcode.Imul) (value_array_2_ctor x y)))
-)
-
-(decl umulhi (Type Value Value) Value)
-(extractor
-    (umulhi ty x y)
-    (inst_data ty (InstructionData.Binary (Opcode.Umulhi) (value_array_2 x y)))
-)
-(rule (umulhi ty x y)
-    (make_inst ty (InstructionData.Binary (Opcode.Umulhi) (value_array_2_ctor x y)))
-)
-
-(decl smulhi (Type Value Value) Value)
-(extractor
-    (smulhi ty x y)
-    (inst_data ty (InstructionData.Binary (Opcode.Smulhi) (value_array_2 x y)))
-)
-(rule (smulhi ty x y)
-    (make_inst ty (InstructionData.Binary (Opcode.Smulhi) (value_array_2_ctor x y)))
-)
-
-(decl sqmul_round_sat (Type Value Value) Value)
-(extractor
-    (sqmul_round_sat ty x y)
-    (inst_data ty (InstructionData.Binary (Opcode.SqmulRoundSat) (value_array_2 x y)))
-)
-(rule (sqmul_round_sat ty x y)
-    (make_inst ty (InstructionData.Binary (Opcode.SqmulRoundSat) (value_array_2_ctor x y)))
-)
-
-(decl x86_pmulhrsw (Type Value Value) Value)
-(extractor
-    (x86_pmulhrsw ty x y)
-    (inst_data ty (InstructionData.Binary (Opcode.X86Pmulhrsw) (value_array_2 x y)))
-)
-(rule (x86_pmulhrsw ty x y)
-    (make_inst ty (InstructionData.Binary (Opcode.X86Pmulhrsw) (value_array_2_ctor x y)))
-)
-
-(decl udiv (Type Value Value) Value)
-(extractor
-    (udiv ty x y)
-    (inst_data ty (InstructionData.Binary (Opcode.Udiv) (value_array_2 x y)))
-)
-(rule (udiv ty x y)
-    (make_inst ty (InstructionData.Binary (Opcode.Udiv) (value_array_2_ctor x y)))
-)
-
-(decl sdiv (Type Value Value) Value)
-(extractor
-    (sdiv ty x y)
-    (inst_data ty (InstructionData.Binary (Opcode.Sdiv) (value_array_2 x y)))
-)
-(rule (sdiv ty x y)
-    (make_inst ty (InstructionData.Binary (Opcode.Sdiv) (value_array_2_ctor x y)))
-)
-
-(decl urem (Type Value Value) Value)
-(extractor
-    (urem ty x y)
-    (inst_data ty (InstructionData.Binary (Opcode.Urem) (value_array_2 x y)))
-)
-(rule (urem ty x y)
-    (make_inst ty (InstructionData.Binary (Opcode.Urem) (value_array_2_ctor x y)))
-)
-
-(decl srem (Type Value Value) Value)
-(extractor
-    (srem ty x y)
-    (inst_data ty (InstructionData.Binary (Opcode.Srem) (value_array_2 x y)))
-)
-(rule (srem ty x y)
-    (make_inst ty (InstructionData.Binary (Opcode.Srem) (value_array_2_ctor x y)))
-)
-
-(decl iadd_imm (Type Value Imm64) Value)
-(extractor
-    (iadd_imm ty x Y)
-    (inst_data ty (InstructionData.BinaryImm64 (Opcode.IaddImm) x Y))
-)
-(rule (iadd_imm ty x Y)
-    (make_inst ty (InstructionData.BinaryImm64 (Opcode.IaddImm) x Y))
-)
-
-(decl imul_imm (Type Value Imm64) Value)
-(extractor
-    (imul_imm ty x Y)
-    (inst_data ty (InstructionData.BinaryImm64 (Opcode.ImulImm) x Y))
-)
-(rule (imul_imm ty x Y)
-    (make_inst ty (InstructionData.BinaryImm64 (Opcode.ImulImm) x Y))
-)
-
-(decl udiv_imm (Type Value Imm64) Value)
-(extractor
-    (udiv_imm ty x Y)
-    (inst_data ty (InstructionData.BinaryImm64 (Opcode.UdivImm) x Y))
-)
-(rule (udiv_imm ty x Y)
-    (make_inst ty (InstructionData.BinaryImm64 (Opcode.UdivImm) x Y))
-)
-
-(decl sdiv_imm (Type Value Imm64) Value)
-(extractor
-    (sdiv_imm ty x Y)
-    (inst_data ty (InstructionData.BinaryImm64 (Opcode.SdivImm) x Y))
-)
-(rule (sdiv_imm ty x Y)
-    (make_inst ty (InstructionData.BinaryImm64 (Opcode.SdivImm) x Y))
-)
-
-(decl urem_imm (Type Value Imm64) Value)
-(extractor
-    (urem_imm ty x Y)
-    (inst_data ty (InstructionData.BinaryImm64 (Opcode.UremImm) x Y))
-)
-(rule (urem_imm ty x Y)
-    (make_inst ty (InstructionData.BinaryImm64 (Opcode.UremImm) x Y))
-)
-
-(decl srem_imm (Type Value Imm64) Value)
-(extractor
-    (srem_imm ty x Y)
-    (inst_data ty (InstructionData.BinaryImm64 (Opcode.SremImm) x Y))
-)
-(rule (srem_imm ty x Y)
-    (make_inst ty (InstructionData.BinaryImm64 (Opcode.SremImm) x Y))
-)
-
-(decl irsub_imm (Type Value Imm64) Value)
-(extractor
-    (irsub_imm ty x Y)
-    (inst_data ty (InstructionData.BinaryImm64 (Opcode.IrsubImm) x Y))
-)
-(rule (irsub_imm ty x Y)
-    (make_inst ty (InstructionData.BinaryImm64 (Opcode.IrsubImm) x Y))
-)
-
-(decl iadd_cin (Type Value Value Value) Value)
-(extractor
-    (iadd_cin ty x y c_in)
-    (inst_data ty (InstructionData.Ternary (Opcode.IaddCin) (value_array_3 x y c_in)))
-)
-(rule (iadd_cin ty x y c_in)
-    (make_inst ty (InstructionData.Ternary (Opcode.IaddCin) (value_array_3_ctor x y c_in)))
-)
-
-(decl uadd_overflow_trap (Type Value Value TrapCode) Value)
-(extractor
-    (uadd_overflow_trap ty x y code)
-    (inst_data ty (InstructionData.IntAddTrap (Opcode.UaddOverflowTrap) (value_array_2 x y) code))
-)
-(rule (uadd_overflow_trap ty x y code)
-    (make_inst ty (InstructionData.IntAddTrap (Opcode.UaddOverflowTrap) (value_array_2_ctor x y) code))
-)
-
-(decl isub_bin (Type Value Value Value) Value)
-(extractor
-    (isub_bin ty x y b_in)
-    (inst_data ty (InstructionData.Ternary (Opcode.IsubBin) (value_array_3 x y b_in)))
-)
-(rule (isub_bin ty x y b_in)
-    (make_inst ty (InstructionData.Ternary (Opcode.IsubBin) (value_array_3_ctor x y b_in)))
-)
-
-(decl band (Type Value Value) Value)
-(extractor
-    (band ty x y)
-    (inst_data ty (InstructionData.Binary (Opcode.Band) (value_array_2 x y)))
-)
-(rule (band ty x y)
-    (make_inst ty (InstructionData.Binary (Opcode.Band) (value_array_2_ctor x y)))
-)
-
-(decl bor (Type Value Value) Value)
-(extractor
-    (bor ty x y)
-    (inst_data ty (InstructionData.Binary (Opcode.Bor) (value_array_2 x y)))
-)
-(rule (bor ty x y)
-    (make_inst ty (InstructionData.Binary (Opcode.Bor) (value_array_2_ctor x y)))
-)
-
-(decl bxor (Type Value Value) Value)
-(extractor
-    (bxor ty x y)
-    (inst_data ty (InstructionData.Binary (Opcode.Bxor) (value_array_2 x y)))
-)
-(rule (bxor ty x y)
-    (make_inst ty (InstructionData.Binary (Opcode.Bxor) (value_array_2_ctor x y)))
-)
-
-(decl bnot (Type Value) Value)
-(extractor
-    (bnot ty x)
-    (inst_data ty (InstructionData.Unary (Opcode.Bnot) x))
-)
-(rule (bnot ty x)
-    (make_inst ty (InstructionData.Unary (Opcode.Bnot) x))
-)
-
-(decl band_not (Type Value Value) Value)
-(extractor
-    (band_not ty x y)
-    (inst_data ty (InstructionData.Binary (Opcode.BandNot) (value_array_2 x y)))
-)
-(rule (band_not ty x y)
-    (make_inst ty (InstructionData.Binary (Opcode.BandNot) (value_array_2_ctor x y)))
-)
-
-(decl bor_not (Type Value Value) Value)
-(extractor
-    (bor_not ty x y)
-    (inst_data ty (InstructionData.Binary (Opcode.BorNot) (value_array_2 x y)))
-)
-(rule (bor_not ty x y)
-    (make_inst ty (InstructionData.Binary (Opcode.BorNot) (value_array_2_ctor x y)))
-)
-
-(decl bxor_not (Type Value Value) Value)
-(extractor
-    (bxor_not ty x y)
-    (inst_data ty (InstructionData.Binary (Opcode.BxorNot) (value_array_2 x y)))
-)
-(rule (bxor_not ty x y)
-    (make_inst ty (InstructionData.Binary (Opcode.BxorNot) (value_array_2_ctor x y)))
-)
-
-(decl band_imm (Type Value Imm64) Value)
-(extractor
-    (band_imm ty x Y)
-    (inst_data ty (InstructionData.BinaryImm64 (Opcode.BandImm) x Y))
-)
-(rule (band_imm ty x Y)
-    (make_inst ty (InstructionData.BinaryImm64 (Opcode.BandImm) x Y))
-)
-
-(decl bor_imm (Type Value Imm64) Value)
-(extractor
-    (bor_imm ty x Y)
-    (inst_data ty (InstructionData.BinaryImm64 (Opcode.BorImm) x Y))
-)
-(rule (bor_imm ty x Y)
-    (make_inst ty (InstructionData.BinaryImm64 (Opcode.BorImm) x Y))
-)
-
-(decl bxor_imm (Type Value Imm64) Value)
-(extractor
-    (bxor_imm ty x Y)
-    (inst_data ty (InstructionData.BinaryImm64 (Opcode.BxorImm) x Y))
-)
-(rule (bxor_imm ty x Y)
-    (make_inst ty (InstructionData.BinaryImm64 (Opcode.BxorImm) x Y))
-)
-
-(decl rotl (Type Value Value) Value)
-(extractor
-    (rotl ty x y)
-    (inst_data ty (InstructionData.Binary (Opcode.Rotl) (value_array_2 x y)))
-)
-(rule (rotl ty x y)
-    (make_inst ty (InstructionData.Binary (Opcode.Rotl) (value_array_2_ctor x y)))
-)
-
-(decl rotr (Type Value Value) Value)
-(extractor
-    (rotr ty x y)
-    (inst_data ty (InstructionData.Binary (Opcode.Rotr) (value_array_2 x y)))
-)
-(rule (rotr ty x y)
-    (make_inst ty (InstructionData.Binary (Opcode.Rotr) (value_array_2_ctor x y)))
-)
-
-(decl rotl_imm (Type Value Imm64) Value)
-(extractor
-    (rotl_imm ty x Y)
-    (inst_data ty (InstructionData.BinaryImm64 (Opcode.RotlImm) x Y))
-)
-(rule (rotl_imm ty x Y)
-    (make_inst ty (InstructionData.BinaryImm64 (Opcode.RotlImm) x Y))
-)
-
-(decl rotr_imm (Type Value Imm64) Value)
-(extractor
-    (rotr_imm ty x Y)
-    (inst_data ty (InstructionData.BinaryImm64 (Opcode.RotrImm) x Y))
-)
-(rule (rotr_imm ty x Y)
-    (make_inst ty (InstructionData.BinaryImm64 (Opcode.RotrImm) x Y))
-)
-
-(decl ishl (Type Value Value) Value)
-(extractor
-    (ishl ty x y)
-    (inst_data ty (InstructionData.Binary (Opcode.Ishl) (value_array_2 x y)))
-)
-(rule (ishl ty x y)
-    (make_inst ty (InstructionData.Binary (Opcode.Ishl) (value_array_2_ctor x y)))
-)
-
-(decl ushr (Type Value Value) Value)
-(extractor
-    (ushr ty x y)
-    (inst_data ty (InstructionData.Binary (Opcode.Ushr) (value_array_2 x y)))
-)
-(rule (ushr ty x y)
-    (make_inst ty (InstructionData.Binary (Opcode.Ushr) (value_array_2_ctor x y)))
-)
-
-(decl sshr (Type Value Value) Value)
-(extractor
-    (sshr ty x y)
-    (inst_data ty (InstructionData.Binary (Opcode.Sshr) (value_array_2 x y)))
-)
-(rule (sshr ty x y)
-    (make_inst ty (InstructionData.Binary (Opcode.Sshr) (value_array_2_ctor x y)))
-)
-
-(decl ishl_imm (Type Value Imm64) Value)
-(extractor
-    (ishl_imm ty x Y)
-    (inst_data ty (InstructionData.BinaryImm64 (Opcode.IshlImm) x Y))
-)
-(rule (ishl_imm ty x Y)
-    (make_inst ty (InstructionData.BinaryImm64 (Opcode.IshlImm) x Y))
-)
-
-(decl ushr_imm (Type Value Imm64) Value)
-(extractor
-    (ushr_imm ty x Y)
-    (inst_data ty (InstructionData.BinaryImm64 (Opcode.UshrImm) x Y))
-)
-(rule (ushr_imm ty x Y)
-    (make_inst ty (InstructionData.BinaryImm64 (Opcode.UshrImm) x Y))
-)
-
-(decl sshr_imm (Type Value Imm64) Value)
-(extractor
-    (sshr_imm ty x Y)
-    (inst_data ty (InstructionData.BinaryImm64 (Opcode.SshrImm) x Y))
-)
-(rule (sshr_imm ty x Y)
-    (make_inst ty (InstructionData.BinaryImm64 (Opcode.SshrImm) x Y))
-)
-
-(decl bitrev (Type Value) Value)
-(extractor
-    (bitrev ty x)
-    (inst_data ty (InstructionData.Unary (Opcode.Bitrev) x))
-)
-(rule (bitrev ty x)
-    (make_inst ty (InstructionData.Unary (Opcode.Bitrev) x))
-)
-
-(decl clz (Type Value) Value)
-(extractor
-    (clz ty x)
-    (inst_data ty (InstructionData.Unary (Opcode.Clz) x))
-)
-(rule (clz ty x)
-    (make_inst ty (InstructionData.Unary (Opcode.Clz) x))
-)
-
-(decl cls (Type Value) Value)
-(extractor
-    (cls ty x)
-    (inst_data ty (InstructionData.Unary (Opcode.Cls) x))
-)
-(rule (cls ty x)
-    (make_inst ty (InstructionData.Unary (Opcode.Cls) x))
-)
-
-(decl ctz (Type Value) Value)
-(extractor
-    (ctz ty x)
-    (inst_data ty (InstructionData.Unary (Opcode.Ctz) x))
-)
-(rule (ctz ty x)
-    (make_inst ty (InstructionData.Unary (Opcode.Ctz) x))
-)
-
-(decl bswap (Type Value) Value)
-(extractor
-    (bswap ty x)
-    (inst_data ty (InstructionData.Unary (Opcode.Bswap) x))
-)
-(rule (bswap ty x)
-    (make_inst ty (InstructionData.Unary (Opcode.Bswap) x))
-)
-
-(decl popcnt (Type Value) Value)
-(extractor
-    (popcnt ty x)
-    (inst_data ty (InstructionData.Unary (Opcode.Popcnt) x))
-)
-(rule (popcnt ty x)
-    (make_inst ty (InstructionData.Unary (Opcode.Popcnt) x))
-)
-
-(decl fcmp (Type FloatCC Value Value) Value)
-(extractor
-    (fcmp ty Cond x y)
-    (inst_data ty (InstructionData.FloatCompare (Opcode.Fcmp) (value_array_2 x y) Cond))
-)
-(rule (fcmp ty Cond x y)
-    (make_inst ty (InstructionData.FloatCompare (Opcode.Fcmp) (value_array_2_ctor x y) Cond))
-)
-
-(decl fadd (Type Value Value) Value)
-(extractor
-    (fadd ty x y)
-    (inst_data ty (InstructionData.Binary (Opcode.Fadd) (value_array_2 x y)))
-)
-(rule (fadd ty x y)
-    (make_inst ty (InstructionData.Binary (Opcode.Fadd) (value_array_2_ctor x y)))
-)
-
-(decl fsub (Type Value Value) Value)
-(extractor
-    (fsub ty x y)
-    (inst_data ty (InstructionData.Binary (Opcode.Fsub) (value_array_2 x y)))
-)
-(rule (fsub ty x y)
-    (make_inst ty (InstructionData.Binary (Opcode.Fsub) (value_array_2_ctor x y)))
-)
-
-(decl fmul (Type Value Value) Value)
-(extractor
-    (fmul ty x y)
-    (inst_data ty (InstructionData.Binary (Opcode.Fmul) (value_array_2 x y)))
-)
-(rule (fmul ty x y)
-    (make_inst ty (InstructionData.Binary (Opcode.Fmul) (value_array_2_ctor x y)))
-)
-
-(decl fdiv (Type Value Value) Value)
-(extractor
-    (fdiv ty x y)
-    (inst_data ty (InstructionData.Binary (Opcode.Fdiv) (value_array_2 x y)))
-)
-(rule (fdiv ty x y)
-    (make_inst ty (InstructionData.Binary (Opcode.Fdiv) (value_array_2_ctor x y)))
-)
-
-(decl sqrt (Type Value) Value)
-(extractor
-    (sqrt ty x)
-    (inst_data ty (InstructionData.Unary (Opcode.Sqrt) x))
-)
-(rule (sqrt ty x)
-    (make_inst ty (InstructionData.Unary (Opcode.Sqrt) x))
-)
-
-(decl fma (Type Value Value Value) Value)
-(extractor
-    (fma ty x y z)
-    (inst_data ty (InstructionData.Ternary (Opcode.Fma) (value_array_3 x y z)))
-)
-(rule (fma ty x y z)
-    (make_inst ty (InstructionData.Ternary (Opcode.Fma) (value_array_3_ctor x y z)))
-)
-
-(decl fneg (Type Value) Value)
-(extractor
-    (fneg ty x)
-    (inst_data ty (InstructionData.Unary (Opcode.Fneg) x))
-)
-(rule (fneg ty x)
-    (make_inst ty (InstructionData.Unary (Opcode.Fneg) x))
-)
-
-(decl fabs (Type Value) Value)
-(extractor
-    (fabs ty x)
-    (inst_data ty (InstructionData.Unary (Opcode.Fabs) x))
-)
-(rule (fabs ty x)
-    (make_inst ty (InstructionData.Unary (Opcode.Fabs) x))
-)
-
-(decl fcopysign (Type Value Value) Value)
-(extractor
-    (fcopysign ty x y)
-    (inst_data ty (InstructionData.Binary (Opcode.Fcopysign) (value_array_2 x y)))
-)
-(rule (fcopysign ty x y)
-    (make_inst ty (InstructionData.Binary (Opcode.Fcopysign) (value_array_2_ctor x y)))
-)
-
-(decl fmin (Type Value Value) Value)
-(extractor
-    (fmin ty x y)
-    (inst_data ty (InstructionData.Binary (Opcode.Fmin) (value_array_2 x y)))
-)
-(rule (fmin ty x y)
-    (make_inst ty (InstructionData.Binary (Opcode.Fmin) (value_array_2_ctor x y)))
-)
-
-(decl fmin_pseudo (Type Value Value) Value)
-(extractor
-    (fmin_pseudo ty x y)
-    (inst_data ty (InstructionData.Binary (Opcode.FminPseudo) (value_array_2 x y)))
-)
-(rule (fmin_pseudo ty x y)
-    (make_inst ty (InstructionData.Binary (Opcode.FminPseudo) (value_array_2_ctor x y)))
-)
-
-(decl fmax (Type Value Value) Value)
-(extractor
-    (fmax ty x y)
-    (inst_data ty (InstructionData.Binary (Opcode.Fmax) (value_array_2 x y)))
-)
-(rule (fmax ty x y)
-    (make_inst ty (InstructionData.Binary (Opcode.Fmax) (value_array_2_ctor x y)))
-)
-
-(decl fmax_pseudo (Type Value Value) Value)
-(extractor
-    (fmax_pseudo ty x y)
-    (inst_data ty (InstructionData.Binary (Opcode.FmaxPseudo) (value_array_2 x y)))
-)
-(rule (fmax_pseudo ty x y)
-    (make_inst ty (InstructionData.Binary (Opcode.FmaxPseudo) (value_array_2_ctor x y)))
-)
-
-(decl ceil (Type Value) Value)
-(extractor
-    (ceil ty x)
-    (inst_data ty (InstructionData.Unary (Opcode.Ceil) x))
-)
-(rule (ceil ty x)
-    (make_inst ty (InstructionData.Unary (Opcode.Ceil) x))
-)
-
-(decl floor (Type Value) Value)
-(extractor
-    (floor ty x)
-    (inst_data ty (InstructionData.Unary (Opcode.Floor) x))
-)
-(rule (floor ty x)
-    (make_inst ty (InstructionData.Unary (Opcode.Floor) x))
-)
-
-(decl trunc (Type Value) Value)
-(extractor
-    (trunc ty x)
-    (inst_data ty (InstructionData.Unary (Opcode.Trunc) x))
-)
-(rule (trunc ty x)
-    (make_inst ty (InstructionData.Unary (Opcode.Trunc) x))
-)
-
-(decl nearest (Type Value) Value)
-(extractor
-    (nearest ty x)
-    (inst_data ty (InstructionData.Unary (Opcode.Nearest) x))
-)
-(rule (nearest ty x)
-    (make_inst ty (InstructionData.Unary (Opcode.Nearest) x))
-)
-
-(decl is_null (Type Value) Value)
-(extractor
-    (is_null ty x)
-    (inst_data ty (InstructionData.Unary (Opcode.IsNull) x))
-)
-(rule (is_null ty x)
-    (make_inst ty (InstructionData.Unary (Opcode.IsNull) x))
-)
-
-(decl is_invalid (Type Value) Value)
-(extractor
-    (is_invalid ty x)
-    (inst_data ty (InstructionData.Unary (Opcode.IsInvalid) x))
-)
-(rule (is_invalid ty x)
-    (make_inst ty (InstructionData.Unary (Opcode.IsInvalid) x))
-)
-
-(decl bitcast (Type MemFlags Value) Value)
-(extractor
-    (bitcast ty MemFlags x)
-    (inst_data ty (InstructionData.LoadNoOffset (Opcode.Bitcast) x MemFlags))
-)
-(rule (bitcast ty MemFlags x)
-    (make_inst ty (InstructionData.LoadNoOffset (Opcode.Bitcast) x MemFlags))
-)
-
-(decl scalar_to_vector (Type Value) Value)
-(extractor
-    (scalar_to_vector ty s)
-    (inst_data ty (InstructionData.Unary (Opcode.ScalarToVector) s))
-)
-(rule (scalar_to_vector ty s)
-    (make_inst ty (InstructionData.Unary (Opcode.ScalarToVector) s))
-)
-
-(decl bmask (Type Value) Value)
-(extractor
-    (bmask ty x)
-    (inst_data ty (InstructionData.Unary (Opcode.Bmask) x))
-)
-(rule (bmask ty x)
-    (make_inst ty (InstructionData.Unary (Opcode.Bmask) x))
-)
-
-(decl ireduce (Type Value) Value)
-(extractor
-    (ireduce ty x)
-    (inst_data ty (InstructionData.Unary (Opcode.Ireduce) x))
-)
-(rule (ireduce ty x)
-    (make_inst ty (InstructionData.Unary (Opcode.Ireduce) x))
-)
-
-(decl snarrow (Type Value Value) Value)
-(extractor
-    (snarrow ty x y)
-    (inst_data ty (InstructionData.Binary (Opcode.Snarrow) (value_array_2 x y)))
-)
-(rule (snarrow ty x y)
-    (make_inst ty (InstructionData.Binary (Opcode.Snarrow) (value_array_2_ctor x y)))
-)
-
-(decl unarrow (Type Value Value) Value)
-(extractor
-    (unarrow ty x y)
-    (inst_data ty (InstructionData.Binary (Opcode.Unarrow) (value_array_2 x y)))
-)
-(rule (unarrow ty x y)
-    (make_inst ty (InstructionData.Binary (Opcode.Unarrow) (value_array_2_ctor x y)))
-)
-
-(decl uunarrow (Type Value Value) Value)
-(extractor
-    (uunarrow ty x y)
-    (inst_data ty (InstructionData.Binary (Opcode.Uunarrow) (value_array_2 x y)))
-)
-(rule (uunarrow ty x y)
-    (make_inst ty (InstructionData.Binary (Opcode.Uunarrow) (value_array_2_ctor x y)))
-)
-
-(decl swiden_low (Type Value) Value)
-(extractor
-    (swiden_low ty x)
-    (inst_data ty (InstructionData.Unary (Opcode.SwidenLow) x))
-)
-(rule (swiden_low ty x)
-    (make_inst ty (InstructionData.Unary (Opcode.SwidenLow) x))
-)
-
-(decl swiden_high (Type Value) Value)
-(extractor
-    (swiden_high ty x)
-    (inst_data ty (InstructionData.Unary (Opcode.SwidenHigh) x))
-)
-(rule (swiden_high ty x)
-    (make_inst ty (InstructionData.Unary (Opcode.SwidenHigh) x))
-)
-
-(decl uwiden_low (Type Value) Value)
-(extractor
-    (uwiden_low ty x)
-    (inst_data ty (InstructionData.Unary (Opcode.UwidenLow) x))
-)
-(rule (uwiden_low ty x)
-    (make_inst ty (InstructionData.Unary (Opcode.UwidenLow) x))
-)
-
-(decl uwiden_high (Type Value) Value)
-(extractor
-    (uwiden_high ty x)
-    (inst_data ty (InstructionData.Unary (Opcode.UwidenHigh) x))
-)
-(rule (uwiden_high ty x)
-    (make_inst ty (InstructionData.Unary (Opcode.UwidenHigh) x))
-)
-
-(decl iadd_pairwise (Type Value Value) Value)
-(extractor
-    (iadd_pairwise ty x y)
-    (inst_data ty (InstructionData.Binary (Opcode.IaddPairwise) (value_array_2 x y)))
-)
-(rule (iadd_pairwise ty x y)
-    (make_inst ty (InstructionData.Binary (Opcode.IaddPairwise) (value_array_2_ctor x y)))
-)
-
-(decl x86_pmaddubsw (Type Value Value) Value)
-(extractor
-    (x86_pmaddubsw ty x y)
-    (inst_data ty (InstructionData.Binary (Opcode.X86Pmaddubsw) (value_array_2 x y)))
-)
-(rule (x86_pmaddubsw ty x y)
-    (make_inst ty (InstructionData.Binary (Opcode.X86Pmaddubsw) (value_array_2_ctor x y)))
-)
-
-(decl uextend (Type Value) Value)
-(extractor
-    (uextend ty x)
-    (inst_data ty (InstructionData.Unary (Opcode.Uextend) x))
-)
-(rule (uextend ty x)
-    (make_inst ty (InstructionData.Unary (Opcode.Uextend) x))
-)
-
-(decl sextend (Type Value) Value)
-(extractor
-    (sextend ty x)
-    (inst_data ty (InstructionData.Unary (Opcode.Sextend) x))
-)
-(rule (sextend ty x)
-    (make_inst ty (InstructionData.Unary (Opcode.Sextend) x))
-)
-
-(decl fpromote (Type Value) Value)
-(extractor
-    (fpromote ty x)
-    (inst_data ty (InstructionData.Unary (Opcode.Fpromote) x))
-)
-(rule (fpromote ty x)
-    (make_inst ty (InstructionData.Unary (Opcode.Fpromote) x))
-)
-
-(decl fdemote (Type Value) Value)
-(extractor
-    (fdemote ty x)
-    (inst_data ty (InstructionData.Unary (Opcode.Fdemote) x))
-)
-(rule (fdemote ty x)
-    (make_inst ty (InstructionData.Unary (Opcode.Fdemote) x))
-)
-
-(decl fvdemote (Type Value) Value)
-(extractor
-    (fvdemote ty x)
-    (inst_data ty (InstructionData.Unary (Opcode.Fvdemote) x))
-)
-(rule (fvdemote ty x)
-    (make_inst ty (InstructionData.Unary (Opcode.Fvdemote) x))
-)
-
-(decl fvpromote_low (Type Value) Value)
-(extractor
-    (fvpromote_low ty a)
-    (inst_data ty (InstructionData.Unary (Opcode.FvpromoteLow) a))
-)
-(rule (fvpromote_low ty a)
-    (make_inst ty (InstructionData.Unary (Opcode.FvpromoteLow) a))
-)
-
-(decl fcvt_to_uint (Type Value) Value)
-(extractor
-    (fcvt_to_uint ty x)
-    (inst_data ty (InstructionData.Unary (Opcode.FcvtToUint) x))
-)
-(rule (fcvt_to_uint ty x)
-    (make_inst ty (InstructionData.Unary (Opcode.FcvtToUint) x))
-)
-
-(decl fcvt_to_sint (Type Value) Value)
-(extractor
-    (fcvt_to_sint ty x)
-    (inst_data ty (InstructionData.Unary (Opcode.FcvtToSint) x))
-)
-(rule (fcvt_to_sint ty x)
-    (make_inst ty (InstructionData.Unary (Opcode.FcvtToSint) x))
-)
-
-(decl fcvt_to_uint_sat (Type Value) Value)
-(extractor
-    (fcvt_to_uint_sat ty x)
-    (inst_data ty (InstructionData.Unary (Opcode.FcvtToUintSat) x))
-)
-(rule (fcvt_to_uint_sat ty x)
-    (make_inst ty (InstructionData.Unary (Opcode.FcvtToUintSat) x))
-)
-
-(decl fcvt_to_sint_sat (Type Value) Value)
-(extractor
-    (fcvt_to_sint_sat ty x)
-    (inst_data ty (InstructionData.Unary (Opcode.FcvtToSintSat) x))
-)
-(rule (fcvt_to_sint_sat ty x)
-    (make_inst ty (InstructionData.Unary (Opcode.FcvtToSintSat) x))
-)
-
-(decl x86_cvtt2dq (Type Value) Value)
-(extractor
-    (x86_cvtt2dq ty x)
-    (inst_data ty (InstructionData.Unary (Opcode.X86Cvtt2dq) x))
-)
-(rule (x86_cvtt2dq ty x)
-    (make_inst ty (InstructionData.Unary (Opcode.X86Cvtt2dq) x))
-)
-
-(decl fcvt_from_uint (Type Value) Value)
-(extractor
-    (fcvt_from_uint ty x)
-    (inst_data ty (InstructionData.Unary (Opcode.FcvtFromUint) x))
-)
-(rule (fcvt_from_uint ty x)
-    (make_inst ty (InstructionData.Unary (Opcode.FcvtFromUint) x))
-)
-
-(decl fcvt_from_sint (Type Value) Value)
-(extractor
-    (fcvt_from_sint ty x)
-    (inst_data ty (InstructionData.Unary (Opcode.FcvtFromSint) x))
-)
-(rule (fcvt_from_sint ty x)
-    (make_inst ty (InstructionData.Unary (Opcode.FcvtFromSint) x))
-)
-
-(decl iconcat (Type Value Value) Value)
-(extractor
-    (iconcat ty lo hi)
-    (inst_data ty (InstructionData.Binary (Opcode.Iconcat) (value_array_2 lo hi)))
-)
-(rule (iconcat ty lo hi)
-    (make_inst ty (InstructionData.Binary (Opcode.Iconcat) (value_array_2_ctor lo hi)))
-)
-
-(decl atomic_rmw (Type MemFlags AtomicRmwOp Value Value) Value)
-(extractor
-    (atomic_rmw ty MemFlags AtomicRmwOp p x)
-    (inst_data ty (InstructionData.AtomicRmw (Opcode.AtomicRmw) (value_array_2 p x) MemFlags AtomicRmwOp))
-)
-(rule (atomic_rmw ty MemFlags AtomicRmwOp p x)
-    (make_inst ty (InstructionData.AtomicRmw (Opcode.AtomicRmw) (value_array_2_ctor p x) MemFlags AtomicRmwOp))
-)
-
-(decl atomic_cas (Type MemFlags Value Value Value) Value)
-(extractor
-    (atomic_cas ty MemFlags p e x)
-    (inst_data ty (InstructionData.AtomicCas (Opcode.AtomicCas) (value_array_3 p e x) MemFlags))
-)
-(rule (atomic_cas ty MemFlags p e x)
-    (make_inst ty (InstructionData.AtomicCas (Opcode.AtomicCas) (value_array_3_ctor p e x) MemFlags))
-)
-
-(decl atomic_load (Type MemFlags Value) Value)
-(extractor
-    (atomic_load ty MemFlags p)
-    (inst_data ty (InstructionData.LoadNoOffset (Opcode.AtomicLoad) p MemFlags))
-)
-(rule (atomic_load ty MemFlags p)
-    (make_inst ty (InstructionData.LoadNoOffset (Opcode.AtomicLoad) p MemFlags))
-)
-
-(decl extract_vector (Type Value Uimm8) Value)
-(extractor
-    (extract_vector ty x y)
-    (inst_data ty (InstructionData.BinaryImm8 (Opcode.ExtractVector) x y))
-)
-(rule (extract_vector ty x y)
-    (make_inst ty (InstructionData.BinaryImm8 (Opcode.ExtractVector) x y))
-)
-
diff --git a/cranelift/codegen/isle_generated_code/isle_aarch64.rs b/cranelift/codegen/isle_generated_code/isle_aarch64.rs
deleted file mode 100644
index 9b1216d4740f..000000000000
--- a/cranelift/codegen/isle_generated_code/isle_aarch64.rs
+++ /dev/null
@@ -1,16275 +0,0 @@
-// GENERATED BY ISLE. DO NOT EDIT!
-//
-// Generated automatically from the instruction-selection DSL code in:
-// - src/prelude.isle
-// - src/prelude_lower.isle
-// - src/isa/aarch64/inst.isle
-// - src/isa/aarch64/inst_neon.isle
-// - src/isa/aarch64/lower.isle
-// - src/isa/aarch64/lower_dynamic_neon.isle
-// - /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_lower.isle
-
-use super::*; // Pulls in all external types.
-use std::marker::PhantomData;
-
-/// Context during lowering: an implementation of this trait
-/// must be provided with all external constructors and extractors.
-/// A mutable borrow is passed along through all lowering logic.
-pub trait Context {
-    fn unit(&mut self) -> Unit;
-    fn value_type(&mut self, arg0: Value) -> Type;
-    fn u32_nonnegative(&mut self, arg0: u32) -> Option<u32>;
-    fn offset32(&mut self, arg0: Offset32) -> u32;
-    fn u32_lteq(&mut self, arg0: u32, arg1: u32) -> Option<Unit>;
-    fn u8_lteq(&mut self, arg0: u8, arg1: u8) -> Option<Unit>;
-    fn u8_lt(&mut self, arg0: u8, arg1: u8) -> Option<Unit>;
-    fn simm32(&mut self, arg0: Imm64) -> Option<u32>;
-    fn uimm8(&mut self, arg0: Imm64) -> Option<u8>;
-    fn u8_as_u32(&mut self, arg0: u8) -> u32;
-    fn u8_as_u64(&mut self, arg0: u8) -> u64;
-    fn u16_as_u64(&mut self, arg0: u16) -> u64;
-    fn u32_as_u64(&mut self, arg0: u32) -> u64;
-    fn i64_as_u64(&mut self, arg0: i64) -> u64;
-    fn i64_neg(&mut self, arg0: i64) -> i64;
-    fn u128_as_u64(&mut self, arg0: u128) -> Option<u64>;
-    fn u64_as_u32(&mut self, arg0: u64) -> Option<u32>;
-    fn u64_as_i32(&mut self, arg0: u64) -> i32;
-    fn u8_and(&mut self, arg0: u8, arg1: u8) -> u8;
-    fn u8_shl(&mut self, arg0: u8, arg1: u8) -> u8;
-    fn u8_shr(&mut self, arg0: u8, arg1: u8) -> u8;
-    fn u32_add(&mut self, arg0: u32, arg1: u32) -> u32;
-    fn u32_sub(&mut self, arg0: u32, arg1: u32) -> u32;
-    fn u32_and(&mut self, arg0: u32, arg1: u32) -> u32;
-    fn s32_add_fallible(&mut self, arg0: u32, arg1: u32) -> Option<u32>;
-    fn u64_add(&mut self, arg0: u64, arg1: u64) -> u64;
-    fn u64_sub(&mut self, arg0: u64, arg1: u64) -> u64;
-    fn u64_mul(&mut self, arg0: u64, arg1: u64) -> u64;
-    fn u64_sdiv(&mut self, arg0: u64, arg1: u64) -> Option<u64>;
-    fn u64_udiv(&mut self, arg0: u64, arg1: u64) -> Option<u64>;
-    fn u64_and(&mut self, arg0: u64, arg1: u64) -> u64;
-    fn u64_or(&mut self, arg0: u64, arg1: u64) -> u64;
-    fn u64_xor(&mut self, arg0: u64, arg1: u64) -> u64;
-    fn u64_shl(&mut self, arg0: u64, arg1: u64) -> u64;
-    fn imm64_shl(&mut self, arg0: Type, arg1: Imm64, arg2: Imm64) -> Imm64;
-    fn imm64_ushr(&mut self, arg0: Type, arg1: Imm64, arg2: Imm64) -> Imm64;
-    fn imm64_sshr(&mut self, arg0: Type, arg1: Imm64, arg2: Imm64) -> Imm64;
-    fn u64_not(&mut self, arg0: u64) -> u64;
-    fn u64_eq(&mut self, arg0: u64, arg1: u64) -> bool;
-    fn u64_le(&mut self, arg0: u64, arg1: u64) -> bool;
-    fn u64_lt(&mut self, arg0: u64, arg1: u64) -> bool;
-    fn i64_sextend_imm64(&mut self, arg0: Type, arg1: Imm64) -> i64;
-    fn u64_uextend_imm64(&mut self, arg0: Type, arg1: Imm64) -> u64;
-    fn imm64_icmp(&mut self, arg0: Type, arg1: &IntCC, arg2: Imm64, arg3: Imm64) -> Imm64;
-    fn u64_is_zero(&mut self, arg0: u64) -> bool;
-    fn u64_is_odd(&mut self, arg0: u64) -> bool;
-    fn ty_umin(&mut self, arg0: Type) -> u64;
-    fn ty_umax(&mut self, arg0: Type) -> u64;
-    fn ty_smin(&mut self, arg0: Type) -> u64;
-    fn ty_smax(&mut self, arg0: Type) -> u64;
-    fn ty_bits(&mut self, arg0: Type) -> u8;
-    fn ty_bits_u16(&mut self, arg0: Type) -> u16;
-    fn ty_bits_u64(&mut self, arg0: Type) -> u64;
-    fn ty_mask(&mut self, arg0: Type) -> u64;
-    fn ty_lane_mask(&mut self, arg0: Type) -> u64;
-    fn ty_lane_count(&mut self, arg0: Type) -> u64;
-    fn ty_bytes(&mut self, arg0: Type) -> u16;
-    fn lane_type(&mut self, arg0: Type) -> Type;
-    fn ty_half_lanes(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_half_width(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_equal(&mut self, arg0: Type, arg1: Type) -> bool;
-    fn mem_flags_trusted(&mut self) -> MemFlags;
-    fn intcc_reverse(&mut self, arg0: &IntCC) -> IntCC;
-    fn intcc_inverse(&mut self, arg0: &IntCC) -> IntCC;
-    fn floatcc_reverse(&mut self, arg0: &FloatCC) -> FloatCC;
-    fn floatcc_inverse(&mut self, arg0: &FloatCC) -> FloatCC;
-    fn floatcc_unordered(&mut self, arg0: &FloatCC) -> bool;
-    fn fits_in_16(&mut self, arg0: Type) -> Option<Type>;
-    fn fits_in_32(&mut self, arg0: Type) -> Option<Type>;
-    fn lane_fits_in_32(&mut self, arg0: Type) -> Option<Type>;
-    fn fits_in_64(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_32(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_64(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_int_ref_scalar_64_extract(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_int_ref_scalar_64(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_32_or_64(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_8_or_16(&mut self, arg0: Type) -> Option<Type>;
-    fn int_fits_in_32(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_int_ref_64(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_int_ref_16_to_64(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_int(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_scalar(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_scalar_float(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_float_or_vec(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_vector_float(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_vector_not_float(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_vec64(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_vec64_ctor(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_vec128(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_dyn_vec64(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_dyn_vec128(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_vec64_int(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_vec128_int(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_addr64(&mut self, arg0: Type) -> Option<Type>;
-    fn not_vec32x2(&mut self, arg0: Type) -> Option<Type>;
-    fn not_i64x2(&mut self, arg0: Type) -> Option<()>;
-    fn u8_from_uimm8(&mut self, arg0: Uimm8) -> u8;
-    fn u64_from_bool(&mut self, arg0: bool) -> u64;
-    fn u64_from_imm64(&mut self, arg0: Imm64) -> u64;
-    fn nonzero_u64_from_imm64(&mut self, arg0: Imm64) -> Option<u64>;
-    fn imm64_power_of_two(&mut self, arg0: Imm64) -> Option<u64>;
-    fn imm64(&mut self, arg0: u64) -> Imm64;
-    fn imm64_masked(&mut self, arg0: Type, arg1: u64) -> Imm64;
-    fn u32_from_ieee32(&mut self, arg0: Ieee32) -> u32;
-    fn u64_from_ieee64(&mut self, arg0: Ieee64) -> u64;
-    fn multi_lane(&mut self, arg0: Type) -> Option<(u32, u32)>;
-    fn dynamic_lane(&mut self, arg0: Type) -> Option<(u32, u32)>;
-    fn dynamic_int_lane(&mut self, arg0: Type) -> Option<u32>;
-    fn dynamic_fp_lane(&mut self, arg0: Type) -> Option<u32>;
-    fn ty_dyn64_int(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_dyn128_int(&mut self, arg0: Type) -> Option<Type>;
-    fn offset32_to_u32(&mut self, arg0: Offset32) -> u32;
-    fn u32_to_offset32(&mut self, arg0: u32) -> Offset32;
-    fn intcc_unsigned(&mut self, arg0: &IntCC) -> IntCC;
-    fn signed_cond_code(&mut self, arg0: &IntCC) -> Option<IntCC>;
-    fn trap_code_division_by_zero(&mut self) -> TrapCode;
-    fn trap_code_integer_overflow(&mut self) -> TrapCode;
-    fn trap_code_bad_conversion_to_integer(&mut self) -> TrapCode;
-    fn range(&mut self, arg0: usize, arg1: usize) -> Range;
-    fn range_view(&mut self, arg0: Range) -> RangeView;
-    fn value_reg(&mut self, arg0: Reg) -> ValueRegs;
-    fn value_regs(&mut self, arg0: Reg, arg1: Reg) -> ValueRegs;
-    fn value_regs_invalid(&mut self) -> ValueRegs;
-    fn output_none(&mut self) -> InstOutput;
-    fn output(&mut self, arg0: ValueRegs) -> InstOutput;
-    fn output_pair(&mut self, arg0: ValueRegs, arg1: ValueRegs) -> InstOutput;
-    fn output_builder_new(&mut self) -> InstOutputBuilder;
-    fn output_builder_push(&mut self, arg0: &InstOutputBuilder, arg1: ValueRegs) -> Unit;
-    fn output_builder_finish(&mut self, arg0: &InstOutputBuilder) -> InstOutput;
-    fn temp_writable_reg(&mut self, arg0: Type) -> WritableReg;
-    fn is_valid_reg(&mut self, arg0: Reg) -> bool;
-    fn invalid_reg(&mut self) -> Reg;
-    fn mark_value_used(&mut self, arg0: Value) -> Unit;
-    fn put_in_reg(&mut self, arg0: Value) -> Reg;
-    fn put_in_regs(&mut self, arg0: Value) -> ValueRegs;
-    fn ensure_in_vreg(&mut self, arg0: Reg, arg1: Type) -> Reg;
-    fn value_regs_get(&mut self, arg0: ValueRegs, arg1: usize) -> Reg;
-    fn value_regs_len(&mut self, arg0: ValueRegs) -> usize;
-    fn preg_to_reg(&mut self, arg0: PReg) -> Reg;
-    fn value_list_slice(&mut self, arg0: ValueList) -> ValueSlice;
-    fn value_slice_empty(&mut self, arg0: ValueSlice) -> Option<()>;
-    fn value_slice_unwrap(&mut self, arg0: ValueSlice) -> Option<(Value, ValueSlice)>;
-    fn value_slice_len(&mut self, arg0: ValueSlice) -> usize;
-    fn value_slice_get(&mut self, arg0: ValueSlice, arg1: usize) -> Value;
-    fn writable_reg_to_reg(&mut self, arg0: WritableReg) -> Reg;
-    fn inst_results(&mut self, arg0: Inst) -> ValueSlice;
-    fn first_result(&mut self, arg0: Inst) -> Option<Value>;
-    fn inst_data(&mut self, arg0: Inst) -> InstructionData;
-    fn def_inst(&mut self, arg0: Value) -> Option<Inst>;
-    fn zero_value(&mut self, arg0: Value) -> Option<Value>;
-    fn is_sinkable_inst(&mut self, arg0: Value) -> Option<Inst>;
-    fn maybe_uextend(&mut self, arg0: Value) -> Option<Value>;
-    fn emit(&mut self, arg0: &MInst) -> Unit;
-    fn sink_inst(&mut self, arg0: Inst) -> Unit;
-    fn emit_u64_le_const(&mut self, arg0: u64) -> VCodeConstant;
-    fn emit_u128_le_const(&mut self, arg0: u128) -> VCodeConstant;
-    fn const_to_vconst(&mut self, arg0: Constant) -> VCodeConstant;
-    fn tls_model(&mut self, arg0: Type) -> TlsModel;
-    fn tls_model_is_elf_gd(&mut self) -> Option<Unit>;
-    fn tls_model_is_macho(&mut self) -> Option<Unit>;
-    fn tls_model_is_coff(&mut self) -> Option<Unit>;
-    fn preserve_frame_pointers(&mut self) -> Option<Unit>;
-    fn box_external_name(&mut self, arg0: ExternalName) -> BoxExternalName;
-    fn func_ref_data(&mut self, arg0: FuncRef) -> (SigRef, ExternalName, RelocDistance);
-    fn symbol_value_data(
-        &mut self,
-        arg0: GlobalValue,
-    ) -> Option<(ExternalName, RelocDistance, i64)>;
-    fn reloc_distance_near(&mut self, arg0: RelocDistance) -> Option<()>;
-    fn vec_mask_from_immediate(&mut self, arg0: Immediate) -> Option<VecMask>;
-    fn u128_from_immediate(&mut self, arg0: Immediate) -> Option<u128>;
-    fn vconst_from_immediate(&mut self, arg0: Immediate) -> Option<VCodeConstant>;
-    fn u128_from_constant(&mut self, arg0: Constant) -> Option<u128>;
-    fn u64_from_constant(&mut self, arg0: Constant) -> Option<u64>;
-    fn shuffle64_from_imm(&mut self, arg0: Immediate) -> Option<(u8, u8)>;
-    fn shuffle32_from_imm(&mut self, arg0: Immediate) -> Option<(u8, u8, u8, u8)>;
-    fn shuffle16_from_imm(&mut self, arg0: Immediate) -> Option<(u8, u8, u8, u8, u8, u8, u8, u8)>;
-    fn only_writable_reg(&mut self, arg0: WritableValueRegs) -> Option<WritableReg>;
-    fn writable_regs_get(&mut self, arg0: WritableValueRegs, arg1: usize) -> WritableReg;
-    fn abi_num_args(&mut self, arg0: Sig) -> usize;
-    fn abi_get_arg(&mut self, arg0: Sig, arg1: usize) -> ABIArg;
-    fn abi_num_rets(&mut self, arg0: Sig) -> usize;
-    fn abi_get_ret(&mut self, arg0: Sig, arg1: usize) -> ABIArg;
-    fn abi_ret_arg(&mut self, arg0: Sig) -> Option<ABIArg>;
-    fn abi_no_ret_arg(&mut self, arg0: Sig) -> Option<()>;
-    fn abi_sized_stack_arg_space(&mut self, arg0: Sig) -> i64;
-    fn abi_sized_stack_ret_space(&mut self, arg0: Sig) -> i64;
-    fn abi_stackslot_addr(&mut self, arg0: WritableReg, arg1: StackSlot, arg2: Offset32) -> MInst;
-    fn abi_dynamic_stackslot_addr(&mut self, arg0: WritableReg, arg1: DynamicStackSlot) -> MInst;
-    fn abi_arg_only_slot(&mut self, arg0: &ABIArg) -> Option<ABIArgSlot>;
-    fn abi_arg_struct_pointer(&mut self, arg0: &ABIArg) -> Option<(ABIArgSlot, i64, u64)>;
-    fn abi_arg_implicit_pointer(&mut self, arg0: &ABIArg) -> Option<(ABIArgSlot, i64, Type)>;
-    fn real_reg_to_reg(&mut self, arg0: RealReg) -> Reg;
-    fn real_reg_to_writable_reg(&mut self, arg0: RealReg) -> WritableReg;
-    fn gen_move(&mut self, arg0: Type, arg1: WritableReg, arg2: Reg) -> MInst;
-    fn gen_return(&mut self, arg0: ValueSlice) -> Unit;
-    fn gen_return_call(
-        &mut self,
-        arg0: SigRef,
-        arg1: ExternalName,
-        arg2: RelocDistance,
-        arg3: ValueSlice,
-    ) -> InstOutput;
-    fn gen_return_call_indirect(
-        &mut self,
-        arg0: SigRef,
-        arg1: Value,
-        arg2: ValueSlice,
-    ) -> InstOutput;
-    fn safe_divisor_from_imm64(&mut self, arg0: Type, arg1: Imm64) -> Option<u64>;
-    fn sign_return_address_disabled(&mut self) -> Option<Unit>;
-    fn use_lse(&mut self, arg0: Inst) -> Option<()>;
-    fn move_wide_const_from_u64(&mut self, arg0: Type, arg1: u64) -> Option<MoveWideConst>;
-    fn move_wide_const_from_inverted_u64(&mut self, arg0: Type, arg1: u64)
-        -> Option<MoveWideConst>;
-    fn imm_logic_from_u64(&mut self, arg0: Type, arg1: u64) -> Option<ImmLogic>;
-    fn imm_logic_from_imm64(&mut self, arg0: Type, arg1: Imm64) -> Option<ImmLogic>;
-    fn imm_shift_from_imm64(&mut self, arg0: Type, arg1: Imm64) -> Option<ImmShift>;
-    fn imm_shift_from_u8(&mut self, arg0: u8) -> ImmShift;
-    fn imm12_from_u64(&mut self, arg0: u64) -> Option<Imm12>;
-    fn u8_into_uimm5(&mut self, arg0: u8) -> UImm5;
-    fn u8_into_imm12(&mut self, arg0: u8) -> Imm12;
-    fn u64_into_imm_logic(&mut self, arg0: Type, arg1: u64) -> ImmLogic;
-    fn branch_target(&mut self, arg0: &VecMachLabel, arg1: u8) -> BranchTarget;
-    fn targets_jt_size(&mut self, arg0: &VecMachLabel) -> u32;
-    fn targets_jt_space(&mut self, arg0: &VecMachLabel) -> CodeOffset;
-    fn targets_jt_info(&mut self, arg0: &VecMachLabel) -> BoxJTSequenceInfo;
-    fn min_fp_value(&mut self, arg0: bool, arg1: u8, arg2: u8) -> Reg;
-    fn max_fp_value(&mut self, arg0: bool, arg1: u8, arg2: u8) -> Reg;
-    fn fpu_op_ri_ushr(&mut self, arg0: u8, arg1: u8) -> FPUOpRI;
-    fn fpu_op_ri_sli(&mut self, arg0: u8, arg1: u8) -> FPUOpRIMod;
-    fn lshr_from_u64(&mut self, arg0: Type, arg1: u64) -> Option<ShiftOpAndAmt>;
-    fn lshl_from_imm64(&mut self, arg0: Type, arg1: Imm64) -> Option<ShiftOpAndAmt>;
-    fn lshl_from_u64(&mut self, arg0: Type, arg1: u64) -> Option<ShiftOpAndAmt>;
-    fn ashr_from_u64(&mut self, arg0: Type, arg1: u64) -> Option<ShiftOpAndAmt>;
-    fn integral_ty(&mut self, arg0: Type) -> Option<Type>;
-    fn valid_atomic_transaction(&mut self, arg0: Type) -> Option<Type>;
-    fn is_zero_simm9(&mut self, arg0: &SImm9) -> Option<Unit>;
-    fn is_zero_uimm12(&mut self, arg0: &UImm12Scaled) -> Option<Unit>;
-    fn extended_value_from_value(&mut self, arg0: Value) -> Option<ExtendedValue>;
-    fn put_extended_in_reg(&mut self, arg0: &ExtendedValue) -> Reg;
-    fn get_extended_op(&mut self, arg0: &ExtendedValue) -> ExtendOp;
-    fn nzcv(&mut self, arg0: bool, arg1: bool, arg2: bool, arg3: bool) -> NZCV;
-    fn cond_br_zero(&mut self, arg0: Reg) -> CondBrKind;
-    fn cond_br_not_zero(&mut self, arg0: Reg) -> CondBrKind;
-    fn cond_br_cond(&mut self, arg0: &Cond) -> CondBrKind;
-    fn pair_amode(&mut self, arg0: Value, arg1: u32) -> PairAMode;
-    fn zero_reg(&mut self) -> Reg;
-    fn fp_reg(&mut self) -> Reg;
-    fn stack_reg(&mut self) -> Reg;
-    fn writable_link_reg(&mut self) -> WritableReg;
-    fn writable_zero_reg(&mut self) -> WritableReg;
-    fn load_constant64_full(&mut self, arg0: Type, arg1: &ImmExtend, arg2: u64) -> Reg;
-    fn amode(&mut self, arg0: Type, arg1: Value, arg2: u32) -> AMode;
-    fn u64_low32_bits_unset(&mut self, arg0: u64) -> Option<u64>;
-    fn u128_replicated_u64(&mut self, arg0: u128) -> Option<u64>;
-    fn u64_replicated_u32(&mut self, arg0: u64) -> Option<u64>;
-    fn u32_replicated_u16(&mut self, arg0: u64) -> Option<u64>;
-    fn u16_replicated_u8(&mut self, arg0: u64) -> Option<u64>;
-    fn fp_cond_code(&mut self, arg0: &FloatCC) -> Cond;
-    fn cond_code(&mut self, arg0: &IntCC) -> Cond;
-    fn invert_cond(&mut self, arg0: &Cond) -> Cond;
-    fn float_cc_cmp_zero_to_vec_misc_op(&mut self, arg0: &FloatCC) -> VecMisc2;
-    fn float_cc_cmp_zero_to_vec_misc_op_swap(&mut self, arg0: &FloatCC) -> VecMisc2;
-    fn fcmp_zero_cond(&mut self, arg0: &FloatCC) -> Option<FloatCC>;
-    fn fcmp_zero_cond_not_eq(&mut self, arg0: &FloatCC) -> Option<FloatCC>;
-    fn int_cc_cmp_zero_to_vec_misc_op(&mut self, arg0: &IntCC) -> VecMisc2;
-    fn int_cc_cmp_zero_to_vec_misc_op_swap(&mut self, arg0: &IntCC) -> VecMisc2;
-    fn icmp_zero_cond(&mut self, arg0: &IntCC) -> Option<IntCC>;
-    fn icmp_zero_cond_not_eq(&mut self, arg0: &IntCC) -> Option<IntCC>;
-    fn preg_sp(&mut self) -> PReg;
-    fn preg_fp(&mut self) -> PReg;
-    fn preg_link(&mut self) -> PReg;
-    fn preg_pinned(&mut self) -> PReg;
-    fn gen_call(
-        &mut self,
-        arg0: SigRef,
-        arg1: ExternalName,
-        arg2: RelocDistance,
-        arg3: ValueSlice,
-    ) -> InstOutput;
-    fn gen_call_indirect(&mut self, arg0: SigRef, arg1: Value, arg2: ValueSlice) -> InstOutput;
-    fn asimd_mov_mod_imm_zero(&mut self, arg0: &ScalarSize) -> ASIMDMovModImm;
-    fn asimd_mov_mod_imm_from_u64(
-        &mut self,
-        arg0: u64,
-        arg1: &ScalarSize,
-    ) -> Option<ASIMDMovModImm>;
-    fn asimd_fp_mod_imm_from_u64(&mut self, arg0: u64, arg1: &ScalarSize) -> Option<ASIMDFPModImm>;
-    fn shuffle_dup8_from_imm(&mut self, arg0: Immediate) -> Option<u8>;
-    fn shuffle_dup16_from_imm(&mut self, arg0: Immediate) -> Option<u8>;
-    fn shuffle_dup32_from_imm(&mut self, arg0: Immediate) -> Option<u8>;
-    fn shuffle_dup64_from_imm(&mut self, arg0: Immediate) -> Option<u8>;
-    fn vec_extract_imm4_from_immediate(&mut self, arg0: Immediate) -> Option<u8>;
-    fn shift_masked_imm(&mut self, arg0: Type, arg1: u64) -> u8;
-    fn shift_mask(&mut self, arg0: Type) -> ImmLogic;
-    fn negate_imm_shift(&mut self, arg0: Type, arg1: ImmShift) -> ImmShift;
-    fn rotr_mask(&mut self, arg0: Type) -> ImmLogic;
-    fn rotr_opposite_amount(&mut self, arg0: Type, arg1: ImmShift) -> ImmShift;
-    fn unpack_value_array_2(&mut self, arg0: &ValueArray2) -> (Value, Value);
-    fn pack_value_array_2(&mut self, arg0: Value, arg1: Value) -> ValueArray2;
-    fn unpack_value_array_3(&mut self, arg0: &ValueArray3) -> (Value, Value, Value);
-    fn pack_value_array_3(&mut self, arg0: Value, arg1: Value, arg2: Value) -> ValueArray3;
-    fn unpack_block_array_2(&mut self, arg0: &BlockArray2) -> (BlockCall, BlockCall);
-    fn pack_block_array_2(&mut self, arg0: BlockCall, arg1: BlockCall) -> BlockArray2;
-}
-
-pub trait ContextIter {
-    type Context;
-    type Output;
-    fn next(&mut self, ctx: &mut Self::Context) -> Option<Self::Output>;
-}
-
-pub struct ContextIterWrapper<Item, I: Iterator<Item = Item>, C: Context> {
-    iter: I,
-    _ctx: PhantomData<C>,
-}
-impl<Item, I: Iterator<Item = Item>, C: Context> From<I> for ContextIterWrapper<Item, I, C> {
-    fn from(iter: I) -> Self {
-        Self {
-            iter,
-            _ctx: PhantomData,
-        }
-    }
-}
-impl<Item, I: Iterator<Item = Item>, C: Context> ContextIter for ContextIterWrapper<Item, I, C> {
-    type Context = C;
-    type Output = Item;
-    fn next(&mut self, _ctx: &mut Self::Context) -> Option<Self::Output> {
-        self.iter.next()
-    }
-}
-
-/// Internal type MultiReg: defined at src/prelude_lower.isle line 21.
-#[derive(Clone, Debug)]
-pub enum MultiReg {
-    Empty,
-    One { a: Reg },
-    Two { a: Reg, b: Reg },
-    Three { a: Reg, b: Reg, c: Reg },
-    Four { a: Reg, b: Reg, c: Reg, d: Reg },
-}
-
-/// Internal type SideEffectNoResult: defined at src/prelude_lower.isle line 309.
-#[derive(Clone, Debug)]
-pub enum SideEffectNoResult {
-    Inst {
-        inst: MInst,
-    },
-    Inst2 {
-        inst1: MInst,
-        inst2: MInst,
-    },
-    Inst3 {
-        inst1: MInst,
-        inst2: MInst,
-        inst3: MInst,
-    },
-}
-
-/// Internal type ProducesFlags: defined at src/prelude_lower.isle line 351.
-#[derive(Clone, Debug)]
-pub enum ProducesFlags {
-    AlreadyExistingFlags,
-    ProducesFlagsSideEffect { inst: MInst },
-    ProducesFlagsTwiceSideEffect { inst1: MInst, inst2: MInst },
-    ProducesFlagsReturnsReg { inst: MInst, result: Reg },
-    ProducesFlagsReturnsResultWithConsumer { inst: MInst, result: Reg },
-}
-
-/// Internal type ConsumesAndProducesFlags: defined at src/prelude_lower.isle line 370.
-#[derive(Clone, Debug)]
-pub enum ConsumesAndProducesFlags {
-    SideEffect { inst: MInst },
-    ReturnsReg { inst: MInst, result: Reg },
-}
-
-/// Internal type ConsumesFlags: defined at src/prelude_lower.isle line 378.
-#[derive(Clone, Debug)]
-pub enum ConsumesFlags {
-    ConsumesFlagsSideEffect {
-        inst: MInst,
-    },
-    ConsumesFlagsSideEffect2 {
-        inst1: MInst,
-        inst2: MInst,
-    },
-    ConsumesFlagsReturnsResultWithProducer {
-        inst: MInst,
-        result: Reg,
-    },
-    ConsumesFlagsReturnsReg {
-        inst: MInst,
-        result: Reg,
-    },
-    ConsumesFlagsTwiceReturnsValueRegs {
-        inst1: MInst,
-        inst2: MInst,
-        result: ValueRegs,
-    },
-    ConsumesFlagsFourTimesReturnsValueRegs {
-        inst1: MInst,
-        inst2: MInst,
-        inst3: MInst,
-        inst4: MInst,
-        result: ValueRegs,
-    },
-}
-
-/// Internal type MInst: defined at src/isa/aarch64/inst.isle line 2.
-#[derive(Clone, Debug)]
-pub enum MInst {
-    Nop0,
-    Nop4,
-    AluRRR {
-        alu_op: ALUOp,
-        size: OperandSize,
-        rd: WritableReg,
-        rn: Reg,
-        rm: Reg,
-    },
-    AluRRRR {
-        alu_op: ALUOp3,
-        size: OperandSize,
-        rd: WritableReg,
-        rn: Reg,
-        rm: Reg,
-        ra: Reg,
-    },
-    AluRRImm12 {
-        alu_op: ALUOp,
-        size: OperandSize,
-        rd: WritableReg,
-        rn: Reg,
-        imm12: Imm12,
-    },
-    AluRRImmLogic {
-        alu_op: ALUOp,
-        size: OperandSize,
-        rd: WritableReg,
-        rn: Reg,
-        imml: ImmLogic,
-    },
-    AluRRImmShift {
-        alu_op: ALUOp,
-        size: OperandSize,
-        rd: WritableReg,
-        rn: Reg,
-        immshift: ImmShift,
-    },
-    AluRRRShift {
-        alu_op: ALUOp,
-        size: OperandSize,
-        rd: WritableReg,
-        rn: Reg,
-        rm: Reg,
-        shiftop: ShiftOpAndAmt,
-    },
-    AluRRRExtend {
-        alu_op: ALUOp,
-        size: OperandSize,
-        rd: WritableReg,
-        rn: Reg,
-        rm: Reg,
-        extendop: ExtendOp,
-    },
-    BitRR {
-        op: BitOp,
-        size: OperandSize,
-        rd: WritableReg,
-        rn: Reg,
-    },
-    ULoad8 {
-        rd: WritableReg,
-        mem: AMode,
-        flags: MemFlags,
-    },
-    SLoad8 {
-        rd: WritableReg,
-        mem: AMode,
-        flags: MemFlags,
-    },
-    ULoad16 {
-        rd: WritableReg,
-        mem: AMode,
-        flags: MemFlags,
-    },
-    SLoad16 {
-        rd: WritableReg,
-        mem: AMode,
-        flags: MemFlags,
-    },
-    ULoad32 {
-        rd: WritableReg,
-        mem: AMode,
-        flags: MemFlags,
-    },
-    SLoad32 {
-        rd: WritableReg,
-        mem: AMode,
-        flags: MemFlags,
-    },
-    ULoad64 {
-        rd: WritableReg,
-        mem: AMode,
-        flags: MemFlags,
-    },
-    Store8 {
-        rd: Reg,
-        mem: AMode,
-        flags: MemFlags,
-    },
-    Store16 {
-        rd: Reg,
-        mem: AMode,
-        flags: MemFlags,
-    },
-    Store32 {
-        rd: Reg,
-        mem: AMode,
-        flags: MemFlags,
-    },
-    Store64 {
-        rd: Reg,
-        mem: AMode,
-        flags: MemFlags,
-    },
-    StoreP64 {
-        rt: Reg,
-        rt2: Reg,
-        mem: PairAMode,
-        flags: MemFlags,
-    },
-    LoadP64 {
-        rt: WritableReg,
-        rt2: WritableReg,
-        mem: PairAMode,
-        flags: MemFlags,
-    },
-    Mov {
-        size: OperandSize,
-        rd: WritableReg,
-        rm: Reg,
-    },
-    MovFromPReg {
-        rd: WritableReg,
-        rm: PReg,
-    },
-    MovToPReg {
-        rd: PReg,
-        rm: Reg,
-    },
-    MovWide {
-        op: MoveWideOp,
-        rd: WritableReg,
-        imm: MoveWideConst,
-        size: OperandSize,
-    },
-    MovK {
-        rd: WritableReg,
-        rn: Reg,
-        imm: MoveWideConst,
-        size: OperandSize,
-    },
-    Extend {
-        rd: WritableReg,
-        rn: Reg,
-        signed: bool,
-        from_bits: u8,
-        to_bits: u8,
-    },
-    CSel {
-        rd: WritableReg,
-        cond: Cond,
-        rn: Reg,
-        rm: Reg,
-    },
-    CSNeg {
-        rd: WritableReg,
-        cond: Cond,
-        rn: Reg,
-        rm: Reg,
-    },
-    CSet {
-        rd: WritableReg,
-        cond: Cond,
-    },
-    CSetm {
-        rd: WritableReg,
-        cond: Cond,
-    },
-    CCmp {
-        size: OperandSize,
-        rn: Reg,
-        rm: Reg,
-        nzcv: NZCV,
-        cond: Cond,
-    },
-    CCmpImm {
-        size: OperandSize,
-        rn: Reg,
-        imm: UImm5,
-        nzcv: NZCV,
-        cond: Cond,
-    },
-    AtomicRMWLoop {
-        ty: Type,
-        op: AtomicRMWLoopOp,
-        flags: MemFlags,
-        addr: Reg,
-        operand: Reg,
-        oldval: WritableReg,
-        scratch1: WritableReg,
-        scratch2: WritableReg,
-    },
-    AtomicCASLoop {
-        ty: Type,
-        flags: MemFlags,
-        addr: Reg,
-        expected: Reg,
-        replacement: Reg,
-        oldval: WritableReg,
-        scratch: WritableReg,
-    },
-    AtomicRMW {
-        op: AtomicRMWOp,
-        rs: Reg,
-        rt: WritableReg,
-        rn: Reg,
-        ty: Type,
-        flags: MemFlags,
-    },
-    AtomicCAS {
-        rd: WritableReg,
-        rs: Reg,
-        rt: Reg,
-        rn: Reg,
-        ty: Type,
-        flags: MemFlags,
-    },
-    LoadAcquire {
-        access_ty: Type,
-        rt: WritableReg,
-        rn: Reg,
-        flags: MemFlags,
-    },
-    StoreRelease {
-        access_ty: Type,
-        rt: Reg,
-        rn: Reg,
-        flags: MemFlags,
-    },
-    Fence,
-    Csdb,
-    FpuMove64 {
-        rd: WritableReg,
-        rn: Reg,
-    },
-    FpuMove128 {
-        rd: WritableReg,
-        rn: Reg,
-    },
-    FpuMoveFromVec {
-        rd: WritableReg,
-        rn: Reg,
-        idx: u8,
-        size: VectorSize,
-    },
-    FpuExtend {
-        rd: WritableReg,
-        rn: Reg,
-        size: ScalarSize,
-    },
-    FpuRR {
-        fpu_op: FPUOp1,
-        size: ScalarSize,
-        rd: WritableReg,
-        rn: Reg,
-    },
-    FpuRRR {
-        fpu_op: FPUOp2,
-        size: ScalarSize,
-        rd: WritableReg,
-        rn: Reg,
-        rm: Reg,
-    },
-    FpuRRI {
-        fpu_op: FPUOpRI,
-        rd: WritableReg,
-        rn: Reg,
-    },
-    FpuRRIMod {
-        fpu_op: FPUOpRIMod,
-        rd: WritableReg,
-        ri: Reg,
-        rn: Reg,
-    },
-    FpuRRRR {
-        fpu_op: FPUOp3,
-        size: ScalarSize,
-        rd: WritableReg,
-        rn: Reg,
-        rm: Reg,
-        ra: Reg,
-    },
-    FpuCmp {
-        size: ScalarSize,
-        rn: Reg,
-        rm: Reg,
-    },
-    FpuLoad32 {
-        rd: WritableReg,
-        mem: AMode,
-        flags: MemFlags,
-    },
-    FpuStore32 {
-        rd: Reg,
-        mem: AMode,
-        flags: MemFlags,
-    },
-    FpuLoad64 {
-        rd: WritableReg,
-        mem: AMode,
-        flags: MemFlags,
-    },
-    FpuStore64 {
-        rd: Reg,
-        mem: AMode,
-        flags: MemFlags,
-    },
-    FpuLoad128 {
-        rd: WritableReg,
-        mem: AMode,
-        flags: MemFlags,
-    },
-    FpuStore128 {
-        rd: Reg,
-        mem: AMode,
-        flags: MemFlags,
-    },
-    FpuLoadP64 {
-        rt: WritableReg,
-        rt2: WritableReg,
-        mem: PairAMode,
-        flags: MemFlags,
-    },
-    FpuStoreP64 {
-        rt: Reg,
-        rt2: Reg,
-        mem: PairAMode,
-        flags: MemFlags,
-    },
-    FpuLoadP128 {
-        rt: WritableReg,
-        rt2: WritableReg,
-        mem: PairAMode,
-        flags: MemFlags,
-    },
-    FpuStoreP128 {
-        rt: Reg,
-        rt2: Reg,
-        mem: PairAMode,
-        flags: MemFlags,
-    },
-    FpuToInt {
-        op: FpuToIntOp,
-        rd: WritableReg,
-        rn: Reg,
-    },
-    IntToFpu {
-        op: IntToFpuOp,
-        rd: WritableReg,
-        rn: Reg,
-    },
-    FpuCSel32 {
-        rd: WritableReg,
-        rn: Reg,
-        rm: Reg,
-        cond: Cond,
-    },
-    FpuCSel64 {
-        rd: WritableReg,
-        rn: Reg,
-        rm: Reg,
-        cond: Cond,
-    },
-    FpuRound {
-        op: FpuRoundMode,
-        rd: WritableReg,
-        rn: Reg,
-    },
-    MovToFpu {
-        rd: WritableReg,
-        rn: Reg,
-        size: ScalarSize,
-    },
-    FpuMoveFPImm {
-        rd: WritableReg,
-        imm: ASIMDFPModImm,
-        size: ScalarSize,
-    },
-    MovToVec {
-        rd: WritableReg,
-        ri: Reg,
-        rn: Reg,
-        idx: u8,
-        size: VectorSize,
-    },
-    MovFromVec {
-        rd: WritableReg,
-        rn: Reg,
-        idx: u8,
-        size: ScalarSize,
-    },
-    MovFromVecSigned {
-        rd: WritableReg,
-        rn: Reg,
-        idx: u8,
-        size: VectorSize,
-        scalar_size: OperandSize,
-    },
-    VecDup {
-        rd: WritableReg,
-        rn: Reg,
-        size: VectorSize,
-    },
-    VecDupFromFpu {
-        rd: WritableReg,
-        rn: Reg,
-        size: VectorSize,
-        lane: u8,
-    },
-    VecDupFPImm {
-        rd: WritableReg,
-        imm: ASIMDFPModImm,
-        size: VectorSize,
-    },
-    VecDupImm {
-        rd: WritableReg,
-        imm: ASIMDMovModImm,
-        invert: bool,
-        size: VectorSize,
-    },
-    VecExtend {
-        t: VecExtendOp,
-        rd: WritableReg,
-        rn: Reg,
-        high_half: bool,
-        lane_size: ScalarSize,
-    },
-    VecMovElement {
-        rd: WritableReg,
-        ri: Reg,
-        rn: Reg,
-        dest_idx: u8,
-        src_idx: u8,
-        size: VectorSize,
-    },
-    VecRRLong {
-        op: VecRRLongOp,
-        rd: WritableReg,
-        rn: Reg,
-        high_half: bool,
-    },
-    VecRRNarrowLow {
-        op: VecRRNarrowOp,
-        rd: WritableReg,
-        rn: Reg,
-        lane_size: ScalarSize,
-    },
-    VecRRNarrowHigh {
-        op: VecRRNarrowOp,
-        rd: WritableReg,
-        ri: Reg,
-        rn: Reg,
-        lane_size: ScalarSize,
-    },
-    VecRRPair {
-        op: VecPairOp,
-        rd: WritableReg,
-        rn: Reg,
-    },
-    VecRRRLong {
-        alu_op: VecRRRLongOp,
-        rd: WritableReg,
-        rn: Reg,
-        rm: Reg,
-        high_half: bool,
-    },
-    VecRRRLongMod {
-        alu_op: VecRRRLongModOp,
-        rd: WritableReg,
-        ri: Reg,
-        rn: Reg,
-        rm: Reg,
-        high_half: bool,
-    },
-    VecRRPairLong {
-        op: VecRRPairLongOp,
-        rd: WritableReg,
-        rn: Reg,
-    },
-    VecRRR {
-        alu_op: VecALUOp,
-        rd: WritableReg,
-        rn: Reg,
-        rm: Reg,
-        size: VectorSize,
-    },
-    VecRRRMod {
-        alu_op: VecALUModOp,
-        rd: WritableReg,
-        ri: Reg,
-        rn: Reg,
-        rm: Reg,
-        size: VectorSize,
-    },
-    VecFmlaElem {
-        alu_op: VecALUModOp,
-        rd: WritableReg,
-        ri: Reg,
-        rn: Reg,
-        rm: Reg,
-        size: VectorSize,
-        idx: u8,
-    },
-    VecMisc {
-        op: VecMisc2,
-        rd: WritableReg,
-        rn: Reg,
-        size: VectorSize,
-    },
-    VecLanes {
-        op: VecLanesOp,
-        rd: WritableReg,
-        rn: Reg,
-        size: VectorSize,
-    },
-    VecShiftImm {
-        op: VecShiftImmOp,
-        rd: WritableReg,
-        rn: Reg,
-        size: VectorSize,
-        imm: u8,
-    },
-    VecShiftImmMod {
-        op: VecShiftImmModOp,
-        rd: WritableReg,
-        ri: Reg,
-        rn: Reg,
-        size: VectorSize,
-        imm: u8,
-    },
-    VecExtract {
-        rd: WritableReg,
-        rn: Reg,
-        rm: Reg,
-        imm4: u8,
-    },
-    VecTbl {
-        rd: WritableReg,
-        rn: Reg,
-        rm: Reg,
-    },
-    VecTblExt {
-        rd: WritableReg,
-        ri: Reg,
-        rn: Reg,
-        rm: Reg,
-    },
-    VecTbl2 {
-        rd: WritableReg,
-        rn: Reg,
-        rn2: Reg,
-        rm: Reg,
-    },
-    VecTbl2Ext {
-        rd: WritableReg,
-        ri: Reg,
-        rn: Reg,
-        rn2: Reg,
-        rm: Reg,
-    },
-    VecLoadReplicate {
-        rd: WritableReg,
-        rn: Reg,
-        size: VectorSize,
-        flags: MemFlags,
-    },
-    VecCSel {
-        rd: WritableReg,
-        rn: Reg,
-        rm: Reg,
-        cond: Cond,
-    },
-    MovToNZCV {
-        rn: Reg,
-    },
-    MovFromNZCV {
-        rd: WritableReg,
-    },
-    Call {
-        info: BoxCallInfo,
-    },
-    CallInd {
-        info: BoxCallIndInfo,
-    },
-    ReturnCall {
-        callee: BoxExternalName,
-        info: BoxReturnCallInfo,
-    },
-    ReturnCallInd {
-        callee: Reg,
-        info: BoxReturnCallInfo,
-    },
-    Args {
-        args: VecArgPair,
-    },
-    Ret {
-        rets: VecRetPair,
-        stack_bytes_to_pop: u32,
-    },
-    AuthenticatedRet {
-        key: APIKey,
-        is_hint: bool,
-        rets: VecRetPair,
-        stack_bytes_to_pop: u32,
-    },
-    Jump {
-        dest: BranchTarget,
-    },
-    CondBr {
-        taken: BranchTarget,
-        not_taken: BranchTarget,
-        kind: CondBrKind,
-    },
-    TrapIf {
-        kind: CondBrKind,
-        trap_code: TrapCode,
-    },
-    IndirectBr {
-        rn: Reg,
-        targets: VecMachLabel,
-    },
-    Brk,
-    Udf {
-        trap_code: TrapCode,
-    },
-    Adr {
-        rd: WritableReg,
-        off: i32,
-    },
-    Adrp {
-        rd: WritableReg,
-        off: i32,
-    },
-    Word4 {
-        data: u32,
-    },
-    Word8 {
-        data: u64,
-    },
-    JTSequence {
-        info: BoxJTSequenceInfo,
-        ridx: Reg,
-        rtmp1: WritableReg,
-        rtmp2: WritableReg,
-    },
-    LoadExtName {
-        rd: WritableReg,
-        name: BoxExternalName,
-        offset: i64,
-    },
-    LoadAddr {
-        rd: WritableReg,
-        mem: AMode,
-    },
-    Pacisp {
-        key: APIKey,
-    },
-    Xpaclri,
-    Bti {
-        targets: BranchTargetType,
-    },
-    VirtualSPOffsetAdj {
-        offset: i64,
-    },
-    EmitIsland {
-        needed_space: CodeOffset,
-    },
-    ElfTlsGetAddr {
-        symbol: ExternalName,
-        rd: WritableReg,
-    },
-    MachOTlsGetAddr {
-        symbol: ExternalName,
-        rd: WritableReg,
-    },
-    Unwind {
-        inst: UnwindInst,
-    },
-    DummyUse {
-        reg: Reg,
-    },
-    StackProbeLoop {
-        start: WritableReg,
-        end: Reg,
-        step: Imm12,
-    },
-}
-
-/// Internal type ALUOp: defined at src/isa/aarch64/inst.isle line 975.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum ALUOp {
-    Add,
-    Sub,
-    Orr,
-    OrrNot,
-    And,
-    AndS,
-    AndNot,
-    Eor,
-    EorNot,
-    AddS,
-    SubS,
-    SMulH,
-    UMulH,
-    SDiv,
-    UDiv,
-    RotR,
-    Lsr,
-    Asr,
-    Lsl,
-    Adc,
-    AdcS,
-    Sbc,
-    SbcS,
-}
-
-/// Internal type ALUOp3: defined at src/isa/aarch64/inst.isle line 1013.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum ALUOp3 {
-    MAdd,
-    MSub,
-    UMAddL,
-    SMAddL,
-}
-
-/// Internal type MoveWideOp: defined at src/isa/aarch64/inst.isle line 1025.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum MoveWideOp {
-    MovZ,
-    MovN,
-}
-
-/// Internal type BitOp: defined at src/isa/aarch64/inst.isle line 1064.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum BitOp {
-    RBit,
-    Clz,
-    Cls,
-    Rev16,
-    Rev32,
-    Rev64,
-}
-
-/// Internal type AMode: defined at src/isa/aarch64/inst.isle line 1081.
-#[derive(Clone, Debug)]
-pub enum AMode {
-    SPPostIndexed {
-        simm9: SImm9,
-    },
-    SPPreIndexed {
-        simm9: SImm9,
-    },
-    RegReg {
-        rn: Reg,
-        rm: Reg,
-    },
-    RegScaled {
-        rn: Reg,
-        rm: Reg,
-        ty: Type,
-    },
-    RegScaledExtended {
-        rn: Reg,
-        rm: Reg,
-        ty: Type,
-        extendop: ExtendOp,
-    },
-    RegExtended {
-        rn: Reg,
-        rm: Reg,
-        extendop: ExtendOp,
-    },
-    Unscaled {
-        rn: Reg,
-        simm9: SImm9,
-    },
-    UnsignedOffset {
-        rn: Reg,
-        uimm12: UImm12Scaled,
-    },
-    Label {
-        label: MemLabel,
-    },
-    RegOffset {
-        rn: Reg,
-        off: i64,
-        ty: Type,
-    },
-    SPOffset {
-        off: i64,
-        ty: Type,
-    },
-    FPOffset {
-        off: i64,
-        ty: Type,
-    },
-    Const {
-        addr: VCodeConstant,
-    },
-    NominalSPOffset {
-        off: i64,
-        ty: Type,
-    },
-}
-
-/// Internal type FPUOp1: defined at src/isa/aarch64/inst.isle line 1284.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum FPUOp1 {
-    Abs,
-    Neg,
-    Sqrt,
-    Cvt32To64,
-    Cvt64To32,
-}
-
-/// Internal type FPUOp2: defined at src/isa/aarch64/inst.isle line 1294.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum FPUOp2 {
-    Add,
-    Sub,
-    Mul,
-    Div,
-    Max,
-    Min,
-}
-
-/// Internal type FPUOp3: defined at src/isa/aarch64/inst.isle line 1305.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum FPUOp3 {
-    MAdd,
-}
-
-/// Internal type FpuToIntOp: defined at src/isa/aarch64/inst.isle line 1311.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum FpuToIntOp {
-    F32ToU32,
-    F32ToI32,
-    F32ToU64,
-    F32ToI64,
-    F64ToU32,
-    F64ToI32,
-    F64ToU64,
-    F64ToI64,
-}
-
-/// Internal type IntToFpuOp: defined at src/isa/aarch64/inst.isle line 1324.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum IntToFpuOp {
-    U32ToF32,
-    I32ToF32,
-    U32ToF64,
-    I32ToF64,
-    U64ToF32,
-    I64ToF32,
-    U64ToF64,
-    I64ToF64,
-}
-
-/// Internal type FpuRoundMode: defined at src/isa/aarch64/inst.isle line 1338.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum FpuRoundMode {
-    Minus32,
-    Minus64,
-    Plus32,
-    Plus64,
-    Zero32,
-    Zero64,
-    Nearest32,
-    Nearest64,
-}
-
-/// Internal type VecExtendOp: defined at src/isa/aarch64/inst.isle line 1351.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum VecExtendOp {
-    Sxtl,
-    Uxtl,
-}
-
-/// Internal type VecALUOp: defined at src/isa/aarch64/inst.isle line 1360.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum VecALUOp {
-    Sqadd,
-    Uqadd,
-    Sqsub,
-    Uqsub,
-    Cmeq,
-    Cmge,
-    Cmgt,
-    Cmhs,
-    Cmhi,
-    Fcmeq,
-    Fcmgt,
-    Fcmge,
-    And,
-    Bic,
-    Orr,
-    Eor,
-    Umaxp,
-    Add,
-    Sub,
-    Mul,
-    Sshl,
-    Ushl,
-    Umin,
-    Smin,
-    Umax,
-    Smax,
-    Urhadd,
-    Fadd,
-    Fsub,
-    Fdiv,
-    Fmax,
-    Fmin,
-    Fmul,
-    Addp,
-    Zip1,
-    Zip2,
-    Sqrdmulh,
-    Uzp1,
-    Uzp2,
-    Trn1,
-    Trn2,
-}
-
-/// Internal type VecALUModOp: defined at src/isa/aarch64/inst.isle line 1447.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum VecALUModOp {
-    Bsl,
-    Fmla,
-    Fmls,
-}
-
-/// Internal type VecMisc2: defined at src/isa/aarch64/inst.isle line 1458.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum VecMisc2 {
-    Not,
-    Neg,
-    Abs,
-    Fabs,
-    Fneg,
-    Fsqrt,
-    Rev16,
-    Rev32,
-    Rev64,
-    Fcvtzs,
-    Fcvtzu,
-    Scvtf,
-    Ucvtf,
-    Frintn,
-    Frintz,
-    Frintm,
-    Frintp,
-    Cnt,
-    Cmeq0,
-    Cmge0,
-    Cmgt0,
-    Cmle0,
-    Cmlt0,
-    Fcmeq0,
-    Fcmge0,
-    Fcmgt0,
-    Fcmle0,
-    Fcmlt0,
-}
-
-/// Internal type VecRRLongOp: defined at src/isa/aarch64/inst.isle line 1519.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum VecRRLongOp {
-    Fcvtl16,
-    Fcvtl32,
-    Shll8,
-    Shll16,
-    Shll32,
-}
-
-/// Internal type VecRRNarrowOp: defined at src/isa/aarch64/inst.isle line 1534.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum VecRRNarrowOp {
-    Xtn,
-    Sqxtn,
-    Sqxtun,
-    Uqxtn,
-    Fcvtn,
-}
-
-/// Internal type VecRRRLongOp: defined at src/isa/aarch64/inst.isle line 1548.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum VecRRRLongOp {
-    Smull8,
-    Smull16,
-    Smull32,
-    Umull8,
-    Umull16,
-    Umull32,
-}
-
-/// Internal type VecRRRLongModOp: defined at src/isa/aarch64/inst.isle line 1560.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum VecRRRLongModOp {
-    Umlal8,
-    Umlal16,
-    Umlal32,
-}
-
-/// Internal type VecPairOp: defined at src/isa/aarch64/inst.isle line 1569.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum VecPairOp {
-    Addp,
-}
-
-/// Internal type VecRRPairLongOp: defined at src/isa/aarch64/inst.isle line 1577.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum VecRRPairLongOp {
-    Saddlp8,
-    Saddlp16,
-    Uaddlp8,
-    Uaddlp16,
-}
-
-/// Internal type VecLanesOp: defined at src/isa/aarch64/inst.isle line 1588.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum VecLanesOp {
-    Addv,
-    Uminv,
-}
-
-/// Internal type VecShiftImmOp: defined at src/isa/aarch64/inst.isle line 1597.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum VecShiftImmOp {
-    Shl,
-    Ushr,
-    Sshr,
-}
-
-/// Internal type VecShiftImmModOp: defined at src/isa/aarch64/inst.isle line 1608.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum VecShiftImmModOp {
-    Sli,
-}
-
-/// Internal type AtomicRMWOp: defined at src/isa/aarch64/inst.isle line 1615.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum AtomicRMWOp {
-    Add,
-    Clr,
-    Eor,
-    Set,
-    Smax,
-    Smin,
-    Umax,
-    Umin,
-    Swp,
-}
-
-/// Internal type AtomicRMWLoopOp: defined at src/isa/aarch64/inst.isle line 1630.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum AtomicRMWLoopOp {
-    Add,
-    Sub,
-    And,
-    Nand,
-    Eor,
-    Orr,
-    Smax,
-    Smin,
-    Umax,
-    Umin,
-    Xchg,
-}
-
-/// Internal type APIKey: defined at src/isa/aarch64/inst.isle line 1646.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum APIKey {
-    A,
-    B,
-}
-
-/// Internal type BranchTargetType: defined at src/isa/aarch64/inst.isle line 1653.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum BranchTargetType {
-    None,
-    C,
-    J,
-    JC,
-}
-
-/// Internal type ImmExtend: defined at src/isa/aarch64/inst.isle line 2879.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum ImmExtend {
-    Sign,
-    Zero,
-}
-
-/// Internal type FlagsAndCC: defined at src/isa/aarch64/inst.isle line 3664.
-#[derive(Clone, Debug)]
-pub enum FlagsAndCC {
-    FlagsAndCC { flags: ProducesFlags, cc: IntCC },
-}
-
-// Generated as internal constructor for term output_reg.
-pub fn constructor_output_reg<C: Context>(ctx: &mut C, arg0: Reg) -> InstOutput {
-    let v1 = C::value_reg(ctx, arg0);
-    let v2 = C::output(ctx, v1);
-    // Rule at src/prelude_lower.isle line 65.
-    return v2;
-}
-
-// Generated as internal constructor for term output_value.
-pub fn constructor_output_value<C: Context>(ctx: &mut C, arg0: Value) -> InstOutput {
-    let v1 = C::put_in_regs(ctx, arg0);
-    let v2 = C::output(ctx, v1);
-    // Rule at src/prelude_lower.isle line 69.
-    return v2;
-}
-
-// Generated as internal constructor for term temp_reg.
-pub fn constructor_temp_reg<C: Context>(ctx: &mut C, arg0: Type) -> Reg {
-    let v1 = C::temp_writable_reg(ctx, arg0);
-    let v2 = C::writable_reg_to_reg(ctx, v1);
-    // Rule at src/prelude_lower.isle line 89.
-    return v2;
-}
-
-// Generated as internal constructor for term value_regs_range.
-pub fn constructor_value_regs_range<C: Context>(ctx: &mut C, arg0: ValueRegs) -> Range {
-    let v2 = C::value_regs_len(ctx, arg0);
-    let v3 = C::range(ctx, 0x0, v2);
-    // Rule at src/prelude_lower.isle line 138.
-    return v3;
-}
-
-// Generated as internal constructor for term lo_reg.
-pub fn constructor_lo_reg<C: Context>(ctx: &mut C, arg0: Value) -> Reg {
-    let v1 = C::put_in_regs(ctx, arg0);
-    let v3 = C::value_regs_get(ctx, v1, 0x0);
-    // Rule at src/prelude_lower.isle line 149.
-    return v3;
-}
-
-// Generated as internal constructor for term multi_reg_to_pair_and_single.
-pub fn constructor_multi_reg_to_pair_and_single<C: Context>(
-    ctx: &mut C,
-    arg0: &MultiReg,
-) -> InstOutput {
-    if let &MultiReg::Three {
-        a: v1,
-        b: v2,
-        c: v3,
-    } = arg0
-    {
-        let v4 = C::value_regs(ctx, v1, v2);
-        let v5 = C::value_reg(ctx, v3);
-        let v6 = C::output_pair(ctx, v4, v5);
-        // Rule at src/prelude_lower.isle line 160.
-        return v6;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "multi_reg_to_pair_and_single", "src/prelude_lower.isle line 159"
-    )
-}
-
-// Generated as internal constructor for term multi_reg_to_pair.
-pub fn constructor_multi_reg_to_pair<C: Context>(ctx: &mut C, arg0: &MultiReg) -> InstOutput {
-    if let &MultiReg::Two { a: v1, b: v2 } = arg0 {
-        let v3 = C::value_regs(ctx, v1, v2);
-        let v4 = C::output(ctx, v3);
-        // Rule at src/prelude_lower.isle line 165.
-        return v4;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "multi_reg_to_pair", "src/prelude_lower.isle line 164"
-    )
-}
-
-// Generated as internal constructor for term multi_reg_to_single.
-pub fn constructor_multi_reg_to_single<C: Context>(ctx: &mut C, arg0: &MultiReg) -> InstOutput {
-    if let &MultiReg::One { a: v1 } = arg0 {
-        let v2 = C::value_reg(ctx, v1);
-        let v3 = C::output(ctx, v2);
-        // Rule at src/prelude_lower.isle line 170.
-        return v3;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "multi_reg_to_single", "src/prelude_lower.isle line 169"
-    )
-}
-
-// Generated as internal constructor for term emit_side_effect.
-pub fn constructor_emit_side_effect<C: Context>(ctx: &mut C, arg0: &SideEffectNoResult) -> Unit {
-    match arg0 {
-        &SideEffectNoResult::Inst { inst: ref v1 } => {
-            let v2 = C::emit(ctx, v1);
-            // Rule at src/prelude_lower.isle line 319.
-            return v2;
-        }
-        &SideEffectNoResult::Inst2 {
-            inst1: ref v3,
-            inst2: ref v4,
-        } => {
-            let v5 = C::emit(ctx, v3);
-            let v6 = C::emit(ctx, v4);
-            // Rule at src/prelude_lower.isle line 321.
-            return v6;
-        }
-        &SideEffectNoResult::Inst3 {
-            inst1: ref v7,
-            inst2: ref v8,
-            inst3: ref v9,
-        } => {
-            let v10 = C::emit(ctx, v7);
-            let v11 = C::emit(ctx, v8);
-            let v12 = C::emit(ctx, v9);
-            // Rule at src/prelude_lower.isle line 324.
-            return v12;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "emit_side_effect", "src/prelude_lower.isle line 318"
-    )
-}
-
-// Generated as internal constructor for term side_effect.
-pub fn constructor_side_effect<C: Context>(ctx: &mut C, arg0: &SideEffectNoResult) -> InstOutput {
-    let v1 = constructor_emit_side_effect(ctx, arg0);
-    let v2 = C::output_none(ctx);
-    // Rule at src/prelude_lower.isle line 332.
-    return v2;
-}
-
-// Generated as internal constructor for term side_effect_concat.
-pub fn constructor_side_effect_concat<C: Context>(
-    ctx: &mut C,
-    arg0: &SideEffectNoResult,
-    arg1: &SideEffectNoResult,
-) -> SideEffectNoResult {
-    match arg0 {
-        &SideEffectNoResult::Inst { inst: ref v1 } => {
-            match arg1 {
-                &SideEffectNoResult::Inst { inst: ref v3 } => {
-                    let v4 = SideEffectNoResult::Inst2 {
-                        inst1: v1.clone(),
-                        inst2: v3.clone(),
-                    };
-                    // Rule at src/prelude_lower.isle line 337.
-                    return v4;
-                }
-                &SideEffectNoResult::Inst2 {
-                    inst1: ref v5,
-                    inst2: ref v6,
-                } => {
-                    let v7 = SideEffectNoResult::Inst3 {
-                        inst1: v1.clone(),
-                        inst2: v5.clone(),
-                        inst3: v6.clone(),
-                    };
-                    // Rule at src/prelude_lower.isle line 339.
-                    return v7;
-                }
-                _ => {}
-            }
-        }
-        &SideEffectNoResult::Inst2 {
-            inst1: ref v8,
-            inst2: ref v9,
-        } => {
-            if let &SideEffectNoResult::Inst { inst: ref v3 } = arg1 {
-                let v10 = SideEffectNoResult::Inst3 {
-                    inst1: v8.clone(),
-                    inst2: v9.clone(),
-                    inst3: v3.clone(),
-                };
-                // Rule at src/prelude_lower.isle line 341.
-                return v10;
-            }
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "side_effect_concat", "src/prelude_lower.isle line 336"
-    )
-}
-
-// Generated as internal constructor for term produces_flags_concat.
-pub fn constructor_produces_flags_concat<C: Context>(
-    ctx: &mut C,
-    arg0: &ProducesFlags,
-    arg1: &ProducesFlags,
-) -> ProducesFlags {
-    if let &ProducesFlags::ProducesFlagsSideEffect { inst: ref v1 } = arg0 {
-        if let &ProducesFlags::ProducesFlagsSideEffect { inst: ref v3 } = arg1 {
-            let v4 = ProducesFlags::ProducesFlagsTwiceSideEffect {
-                inst1: v1.clone(),
-                inst2: v3.clone(),
-            };
-            // Rule at src/prelude_lower.isle line 366.
-            return v4;
-        }
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "produces_flags_concat", "src/prelude_lower.isle line 365"
-    )
-}
-
-// Generated as internal constructor for term produces_flags_get_reg.
-pub fn constructor_produces_flags_get_reg<C: Context>(ctx: &mut C, arg0: &ProducesFlags) -> Reg {
-    match arg0 {
-        &ProducesFlags::ProducesFlagsReturnsReg {
-            inst: ref v1,
-            result: v2,
-        } => {
-            // Rule at src/prelude_lower.isle line 396.
-            return v2;
-        }
-        &ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
-            inst: ref v3,
-            result: v4,
-        } => {
-            // Rule at src/prelude_lower.isle line 397.
-            return v4;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "produces_flags_get_reg", "src/prelude_lower.isle line 395"
-    )
-}
-
-// Generated as internal constructor for term produces_flags_ignore.
-pub fn constructor_produces_flags_ignore<C: Context>(
-    ctx: &mut C,
-    arg0: &ProducesFlags,
-) -> ProducesFlags {
-    match arg0 {
-        &ProducesFlags::ProducesFlagsReturnsReg {
-            inst: ref v1,
-            result: v2,
-        } => {
-            let v3 = ProducesFlags::ProducesFlagsSideEffect { inst: v1.clone() };
-            // Rule at src/prelude_lower.isle line 402.
-            return v3;
-        }
-        &ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
-            inst: ref v4,
-            result: v5,
-        } => {
-            let v6 = ProducesFlags::ProducesFlagsSideEffect { inst: v4.clone() };
-            // Rule at src/prelude_lower.isle line 404.
-            return v6;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "produces_flags_ignore", "src/prelude_lower.isle line 401"
-    )
-}
-
-// Generated as internal constructor for term consumes_flags_concat.
-pub fn constructor_consumes_flags_concat<C: Context>(
-    ctx: &mut C,
-    arg0: &ConsumesFlags,
-    arg1: &ConsumesFlags,
-) -> ConsumesFlags {
-    match arg0 {
-        &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v8 } => {
-            if let &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v9 } = arg1 {
-                let v10 = ConsumesFlags::ConsumesFlagsSideEffect2 {
-                    inst1: v8.clone(),
-                    inst2: v9.clone(),
-                };
-                // Rule at src/prelude_lower.isle line 417.
-                return v10;
-            }
-        }
-        &ConsumesFlags::ConsumesFlagsReturnsReg {
-            inst: ref v1,
-            result: v2,
-        } => {
-            if let &ConsumesFlags::ConsumesFlagsReturnsReg {
-                inst: ref v4,
-                result: v5,
-            } = arg1
-            {
-                let v6 = C::value_regs(ctx, v2, v5);
-                let v7 = ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
-                    inst1: v1.clone(),
-                    inst2: v4.clone(),
-                    result: v6,
-                };
-                // Rule at src/prelude_lower.isle line 411.
-                return v7;
-            }
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "consumes_flags_concat", "src/prelude_lower.isle line 410"
-    )
-}
-
-// Generated as internal constructor for term with_flags.
-pub fn constructor_with_flags<C: Context>(
-    ctx: &mut C,
-    arg0: &ProducesFlags,
-    arg1: &ConsumesFlags,
-) -> ValueRegs {
-    match arg0 {
-        &ProducesFlags::ProducesFlagsSideEffect { inst: ref v12 } => {
-            match arg1 {
-                &ConsumesFlags::ConsumesFlagsReturnsReg {
-                    inst: ref v13,
-                    result: v14,
-                } => {
-                    let v15 = C::emit(ctx, v12);
-                    let v16 = C::emit(ctx, v13);
-                    let v17 = C::value_reg(ctx, v14);
-                    // Rule at src/prelude_lower.isle line 448.
-                    return v17;
-                }
-                &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
-                    inst1: ref v18,
-                    inst2: ref v19,
-                    result: v20,
-                } => {
-                    let v15 = C::emit(ctx, v12);
-                    let v21 = C::emit(ctx, v18);
-                    let v22 = C::emit(ctx, v19);
-                    // Rule at src/prelude_lower.isle line 454.
-                    return v20;
-                }
-                &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
-                    inst1: ref v23,
-                    inst2: ref v24,
-                    inst3: ref v25,
-                    inst4: ref v26,
-                    result: v27,
-                } => {
-                    let v15 = C::emit(ctx, v12);
-                    let v28 = C::emit(ctx, v23);
-                    let v29 = C::emit(ctx, v24);
-                    let v30 = C::emit(ctx, v25);
-                    let v31 = C::emit(ctx, v26);
-                    // Rule at src/prelude_lower.isle line 466.
-                    return v27;
-                }
-                _ => {}
-            }
-        }
-        &ProducesFlags::ProducesFlagsTwiceSideEffect {
-            inst1: ref v32,
-            inst2: ref v33,
-        } => {
-            match arg1 {
-                &ConsumesFlags::ConsumesFlagsReturnsReg {
-                    inst: ref v13,
-                    result: v14,
-                } => {
-                    let v34 = C::emit(ctx, v32);
-                    let v35 = C::emit(ctx, v33);
-                    let v36 = C::emit(ctx, v13);
-                    let v37 = C::value_reg(ctx, v14);
-                    // Rule at src/prelude_lower.isle line 482.
-                    return v37;
-                }
-                &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
-                    inst1: ref v18,
-                    inst2: ref v19,
-                    result: v20,
-                } => {
-                    let v34 = C::emit(ctx, v32);
-                    let v35 = C::emit(ctx, v33);
-                    let v38 = C::emit(ctx, v18);
-                    let v39 = C::emit(ctx, v19);
-                    // Rule at src/prelude_lower.isle line 489.
-                    return v20;
-                }
-                &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
-                    inst1: ref v23,
-                    inst2: ref v24,
-                    inst3: ref v25,
-                    inst4: ref v26,
-                    result: v27,
-                } => {
-                    let v34 = C::emit(ctx, v32);
-                    let v35 = C::emit(ctx, v33);
-                    let v40 = C::emit(ctx, v23);
-                    let v41 = C::emit(ctx, v24);
-                    let v42 = C::emit(ctx, v25);
-                    let v43 = C::emit(ctx, v26);
-                    // Rule at src/prelude_lower.isle line 502.
-                    return v27;
-                }
-                _ => {}
-            }
-        }
-        &ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
-            inst: ref v1,
-            result: v2,
-        } => {
-            match arg1 {
-                &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v9 } => {
-                    let v6 = C::emit(ctx, v1);
-                    let v10 = C::emit(ctx, v9);
-                    let v11 = C::value_reg(ctx, v2);
-                    // Rule at src/prelude_lower.isle line 442.
-                    return v11;
-                }
-                &ConsumesFlags::ConsumesFlagsReturnsResultWithProducer {
-                    inst: ref v4,
-                    result: v5,
-                } => {
-                    let v6 = C::emit(ctx, v1);
-                    let v7 = C::emit(ctx, v4);
-                    let v8 = C::value_regs(ctx, v2, v5);
-                    // Rule at src/prelude_lower.isle line 434.
-                    return v8;
-                }
-                _ => {}
-            }
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "with_flags", "src/prelude_lower.isle line 432"
-    )
-}
-
-// Generated as internal constructor for term with_flags_reg.
-pub fn constructor_with_flags_reg<C: Context>(
-    ctx: &mut C,
-    arg0: &ProducesFlags,
-    arg1: &ConsumesFlags,
-) -> Reg {
-    let v2 = constructor_with_flags(ctx, arg0, arg1);
-    let v4 = C::value_regs_get(ctx, v2, 0x0);
-    // Rule at src/prelude_lower.isle line 520.
-    return v4;
-}
-
-// Generated as internal constructor for term flags_to_producesflags.
-pub fn constructor_flags_to_producesflags<C: Context>(ctx: &mut C, arg0: Value) -> ProducesFlags {
-    let v1 = C::mark_value_used(ctx, arg0);
-    // Rule at src/prelude_lower.isle line 527.
-    return ProducesFlags::AlreadyExistingFlags;
-}
-
-// Generated as internal constructor for term with_flags_side_effect.
-pub fn constructor_with_flags_side_effect<C: Context>(
-    ctx: &mut C,
-    arg0: &ProducesFlags,
-    arg1: &ConsumesFlags,
-) -> SideEffectNoResult {
-    match arg0 {
-        &ProducesFlags::AlreadyExistingFlags => {
-            match arg1 {
-                &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v2 } => {
-                    let v3 = SideEffectNoResult::Inst { inst: v2.clone() };
-                    // Rule at src/prelude_lower.isle line 538.
-                    return v3;
-                }
-                &ConsumesFlags::ConsumesFlagsSideEffect2 {
-                    inst1: ref v4,
-                    inst2: ref v5,
-                } => {
-                    let v6 = SideEffectNoResult::Inst2 {
-                        inst1: v4.clone(),
-                        inst2: v5.clone(),
-                    };
-                    // Rule at src/prelude_lower.isle line 543.
-                    return v6;
-                }
-                _ => {}
-            }
-        }
-        &ProducesFlags::ProducesFlagsSideEffect { inst: ref v7 } => {
-            match arg1 {
-                &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v2 } => {
-                    let v8 = SideEffectNoResult::Inst2 {
-                        inst1: v7.clone(),
-                        inst2: v2.clone(),
-                    };
-                    // Rule at src/prelude_lower.isle line 548.
-                    return v8;
-                }
-                &ConsumesFlags::ConsumesFlagsSideEffect2 {
-                    inst1: ref v4,
-                    inst2: ref v5,
-                } => {
-                    let v9 = SideEffectNoResult::Inst3 {
-                        inst1: v7.clone(),
-                        inst2: v4.clone(),
-                        inst3: v5.clone(),
-                    };
-                    // Rule at src/prelude_lower.isle line 553.
-                    return v9;
-                }
-                _ => {}
-            }
-        }
-        &ProducesFlags::ProducesFlagsTwiceSideEffect {
-            inst1: ref v10,
-            inst2: ref v11,
-        } => {
-            if let &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v2 } = arg1 {
-                let v12 = SideEffectNoResult::Inst3 {
-                    inst1: v10.clone(),
-                    inst2: v11.clone(),
-                    inst3: v2.clone(),
-                };
-                // Rule at src/prelude_lower.isle line 558.
-                return v12;
-            }
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "with_flags_side_effect", "src/prelude_lower.isle line 536"
-    )
-}
-
-// Generated as internal constructor for term with_flags_chained.
-pub fn constructor_with_flags_chained<C: Context>(
-    ctx: &mut C,
-    arg0: &ProducesFlags,
-    arg1: &ConsumesAndProducesFlags,
-    arg2: &ConsumesFlags,
-) -> MultiReg {
-    match arg0 {
-        &ProducesFlags::ProducesFlagsSideEffect { inst: ref v1 } => {
-            match arg1 {
-                &ConsumesAndProducesFlags::SideEffect { inst: ref v3 } => {
-                    match arg2 {
-                        &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v5 } => {
-                            let v6 = C::emit(ctx, v1);
-                            let v7 = C::emit(ctx, v3);
-                            let v8 = C::emit(ctx, v5);
-                            // Rule at src/prelude_lower.isle line 567.
-                            return MultiReg::Empty;
-                        }
-                        &ConsumesFlags::ConsumesFlagsSideEffect2 {
-                            inst1: ref v10,
-                            inst2: ref v11,
-                        } => {
-                            let v6 = C::emit(ctx, v1);
-                            let v7 = C::emit(ctx, v3);
-                            let v12 = C::emit(ctx, v10);
-                            let v13 = C::emit(ctx, v11);
-                            // Rule at src/prelude_lower.isle line 575.
-                            return MultiReg::Empty;
-                        }
-                        &ConsumesFlags::ConsumesFlagsReturnsReg {
-                            inst: ref v14,
-                            result: v15,
-                        } => {
-                            let v6 = C::emit(ctx, v1);
-                            let v7 = C::emit(ctx, v3);
-                            let v16 = C::emit(ctx, v14);
-                            let v17 = MultiReg::One { a: v15 };
-                            // Rule at src/prelude_lower.isle line 584.
-                            return v17;
-                        }
-                        &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
-                            inst1: ref v18,
-                            inst2: ref v19,
-                            result: v20,
-                        } => {
-                            let v6 = C::emit(ctx, v1);
-                            let v7 = C::emit(ctx, v3);
-                            let v21 = C::emit(ctx, v18);
-                            let v22 = C::emit(ctx, v19);
-                            let v24 = C::value_regs_get(ctx, v20, 0x0);
-                            let v26 = C::value_regs_get(ctx, v20, 0x1);
-                            let v27 = MultiReg::Two { a: v24, b: v26 };
-                            // Rule at src/prelude_lower.isle line 592.
-                            return v27;
-                        }
-                        &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
-                            inst1: ref v28,
-                            inst2: ref v29,
-                            inst3: ref v30,
-                            inst4: ref v31,
-                            result: v32,
-                        } => {
-                            let v6 = C::emit(ctx, v1);
-                            let v7 = C::emit(ctx, v3);
-                            let v33 = C::emit(ctx, v28);
-                            let v34 = C::emit(ctx, v29);
-                            let v35 = C::emit(ctx, v30);
-                            let v36 = C::emit(ctx, v31);
-                            let v37 = C::value_regs_get(ctx, v32, 0x0);
-                            let v38 = C::value_regs_get(ctx, v32, 0x1);
-                            let v39 = MultiReg::Two { a: v37, b: v38 };
-                            // Rule at src/prelude_lower.isle line 601.
-                            return v39;
-                        }
-                        _ => {}
-                    }
-                }
-                &ConsumesAndProducesFlags::ReturnsReg {
-                    inst: ref v47,
-                    result: v48,
-                } => {
-                    match arg2 {
-                        &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v5 } => {
-                            let v6 = C::emit(ctx, v1);
-                            let v49 = C::emit(ctx, v47);
-                            let v8 = C::emit(ctx, v5);
-                            let v50 = MultiReg::One { a: v48 };
-                            // Rule at src/prelude_lower.isle line 661.
-                            return v50;
-                        }
-                        &ConsumesFlags::ConsumesFlagsSideEffect2 {
-                            inst1: ref v10,
-                            inst2: ref v11,
-                        } => {
-                            let v6 = C::emit(ctx, v1);
-                            let v49 = C::emit(ctx, v47);
-                            let v12 = C::emit(ctx, v10);
-                            let v13 = C::emit(ctx, v11);
-                            let v50 = MultiReg::One { a: v48 };
-                            // Rule at src/prelude_lower.isle line 669.
-                            return v50;
-                        }
-                        &ConsumesFlags::ConsumesFlagsReturnsReg {
-                            inst: ref v14,
-                            result: v15,
-                        } => {
-                            let v6 = C::emit(ctx, v1);
-                            let v49 = C::emit(ctx, v47);
-                            let v16 = C::emit(ctx, v14);
-                            let v51 = MultiReg::Two { a: v48, b: v15 };
-                            // Rule at src/prelude_lower.isle line 678.
-                            return v51;
-                        }
-                        &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
-                            inst1: ref v18,
-                            inst2: ref v19,
-                            result: v20,
-                        } => {
-                            let v6 = C::emit(ctx, v1);
-                            let v49 = C::emit(ctx, v47);
-                            let v21 = C::emit(ctx, v18);
-                            let v22 = C::emit(ctx, v19);
-                            let v24 = C::value_regs_get(ctx, v20, 0x0);
-                            let v26 = C::value_regs_get(ctx, v20, 0x1);
-                            let v52 = MultiReg::Three {
-                                a: v48,
-                                b: v24,
-                                c: v26,
-                            };
-                            // Rule at src/prelude_lower.isle line 686.
-                            return v52;
-                        }
-                        &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
-                            inst1: ref v28,
-                            inst2: ref v29,
-                            inst3: ref v30,
-                            inst4: ref v31,
-                            result: v32,
-                        } => {
-                            let v6 = C::emit(ctx, v1);
-                            let v49 = C::emit(ctx, v47);
-                            let v33 = C::emit(ctx, v28);
-                            let v34 = C::emit(ctx, v29);
-                            let v35 = C::emit(ctx, v30);
-                            let v36 = C::emit(ctx, v31);
-                            let v37 = C::value_regs_get(ctx, v32, 0x0);
-                            let v38 = C::value_regs_get(ctx, v32, 0x1);
-                            let v53 = MultiReg::Three {
-                                a: v48,
-                                b: v37,
-                                c: v38,
-                            };
-                            // Rule at src/prelude_lower.isle line 695.
-                            return v53;
-                        }
-                        _ => {}
-                    }
-                }
-                _ => {}
-            }
-        }
-        &ProducesFlags::ProducesFlagsReturnsReg {
-            inst: ref v40,
-            result: v41,
-        } => {
-            match arg1 {
-                &ConsumesAndProducesFlags::SideEffect { inst: ref v3 } => {
-                    match arg2 {
-                        &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v5 } => {
-                            let v42 = C::emit(ctx, v40);
-                            let v7 = C::emit(ctx, v3);
-                            let v8 = C::emit(ctx, v5);
-                            let v43 = MultiReg::One { a: v41 };
-                            // Rule at src/prelude_lower.isle line 614.
-                            return v43;
-                        }
-                        &ConsumesFlags::ConsumesFlagsSideEffect2 {
-                            inst1: ref v10,
-                            inst2: ref v11,
-                        } => {
-                            let v42 = C::emit(ctx, v40);
-                            let v7 = C::emit(ctx, v3);
-                            let v12 = C::emit(ctx, v10);
-                            let v13 = C::emit(ctx, v11);
-                            let v43 = MultiReg::One { a: v41 };
-                            // Rule at src/prelude_lower.isle line 622.
-                            return v43;
-                        }
-                        &ConsumesFlags::ConsumesFlagsReturnsReg {
-                            inst: ref v14,
-                            result: v15,
-                        } => {
-                            let v42 = C::emit(ctx, v40);
-                            let v7 = C::emit(ctx, v3);
-                            let v16 = C::emit(ctx, v14);
-                            let v44 = MultiReg::Two { a: v41, b: v15 };
-                            // Rule at src/prelude_lower.isle line 631.
-                            return v44;
-                        }
-                        &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
-                            inst1: ref v18,
-                            inst2: ref v19,
-                            result: v20,
-                        } => {
-                            let v42 = C::emit(ctx, v40);
-                            let v7 = C::emit(ctx, v3);
-                            let v21 = C::emit(ctx, v18);
-                            let v22 = C::emit(ctx, v19);
-                            let v24 = C::value_regs_get(ctx, v20, 0x0);
-                            let v26 = C::value_regs_get(ctx, v20, 0x1);
-                            let v45 = MultiReg::Three {
-                                a: v41,
-                                b: v24,
-                                c: v26,
-                            };
-                            // Rule at src/prelude_lower.isle line 639.
-                            return v45;
-                        }
-                        &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
-                            inst1: ref v28,
-                            inst2: ref v29,
-                            inst3: ref v30,
-                            inst4: ref v31,
-                            result: v32,
-                        } => {
-                            let v42 = C::emit(ctx, v40);
-                            let v7 = C::emit(ctx, v3);
-                            let v33 = C::emit(ctx, v28);
-                            let v34 = C::emit(ctx, v29);
-                            let v35 = C::emit(ctx, v30);
-                            let v36 = C::emit(ctx, v31);
-                            let v37 = C::value_regs_get(ctx, v32, 0x0);
-                            let v38 = C::value_regs_get(ctx, v32, 0x1);
-                            let v46 = MultiReg::Three {
-                                a: v41,
-                                b: v37,
-                                c: v38,
-                            };
-                            // Rule at src/prelude_lower.isle line 648.
-                            return v46;
-                        }
-                        _ => {}
-                    }
-                }
-                &ConsumesAndProducesFlags::ReturnsReg {
-                    inst: ref v47,
-                    result: v48,
-                } => {
-                    match arg2 {
-                        &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v5 } => {
-                            let v42 = C::emit(ctx, v40);
-                            let v49 = C::emit(ctx, v47);
-                            let v8 = C::emit(ctx, v5);
-                            let v54 = MultiReg::Two { a: v41, b: v48 };
-                            // Rule at src/prelude_lower.isle line 708.
-                            return v54;
-                        }
-                        &ConsumesFlags::ConsumesFlagsSideEffect2 {
-                            inst1: ref v10,
-                            inst2: ref v11,
-                        } => {
-                            let v42 = C::emit(ctx, v40);
-                            let v49 = C::emit(ctx, v47);
-                            let v12 = C::emit(ctx, v10);
-                            let v13 = C::emit(ctx, v11);
-                            let v54 = MultiReg::Two { a: v41, b: v48 };
-                            // Rule at src/prelude_lower.isle line 716.
-                            return v54;
-                        }
-                        &ConsumesFlags::ConsumesFlagsReturnsReg {
-                            inst: ref v14,
-                            result: v15,
-                        } => {
-                            let v42 = C::emit(ctx, v40);
-                            let v49 = C::emit(ctx, v47);
-                            let v16 = C::emit(ctx, v14);
-                            let v55 = MultiReg::Three {
-                                a: v41,
-                                b: v48,
-                                c: v15,
-                            };
-                            // Rule at src/prelude_lower.isle line 725.
-                            return v55;
-                        }
-                        &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
-                            inst1: ref v18,
-                            inst2: ref v19,
-                            result: v20,
-                        } => {
-                            let v42 = C::emit(ctx, v40);
-                            let v49 = C::emit(ctx, v47);
-                            let v21 = C::emit(ctx, v18);
-                            let v22 = C::emit(ctx, v19);
-                            let v24 = C::value_regs_get(ctx, v20, 0x0);
-                            let v26 = C::value_regs_get(ctx, v20, 0x1);
-                            let v56 = MultiReg::Four {
-                                a: v41,
-                                b: v48,
-                                c: v24,
-                                d: v26,
-                            };
-                            // Rule at src/prelude_lower.isle line 733.
-                            return v56;
-                        }
-                        &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
-                            inst1: ref v28,
-                            inst2: ref v29,
-                            inst3: ref v30,
-                            inst4: ref v31,
-                            result: v32,
-                        } => {
-                            let v42 = C::emit(ctx, v40);
-                            let v49 = C::emit(ctx, v47);
-                            let v33 = C::emit(ctx, v28);
-                            let v34 = C::emit(ctx, v29);
-                            let v35 = C::emit(ctx, v30);
-                            let v36 = C::emit(ctx, v31);
-                            let v37 = C::value_regs_get(ctx, v32, 0x0);
-                            let v38 = C::value_regs_get(ctx, v32, 0x1);
-                            let v57 = MultiReg::Four {
-                                a: v41,
-                                b: v48,
-                                c: v37,
-                                d: v38,
-                            };
-                            // Rule at src/prelude_lower.isle line 742.
-                            return v57;
-                        }
-                        _ => {}
-                    }
-                }
-                _ => {}
-            }
-        }
-        &ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
-            inst: ref v58,
-            result: v59,
-        } => {
-            if let &ConsumesAndProducesFlags::ReturnsReg {
-                inst: ref v47,
-                result: v48,
-            } = arg1
-            {
-                match arg2 {
-                    &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v5 } => {
-                        let v60 = C::emit(ctx, v58);
-                        let v49 = C::emit(ctx, v47);
-                        let v8 = C::emit(ctx, v5);
-                        let v61 = MultiReg::Two { a: v59, b: v48 };
-                        // Rule at src/prelude_lower.isle line 754.
-                        return v61;
-                    }
-                    &ConsumesFlags::ConsumesFlagsSideEffect2 {
-                        inst1: ref v10,
-                        inst2: ref v11,
-                    } => {
-                        let v60 = C::emit(ctx, v58);
-                        let v49 = C::emit(ctx, v47);
-                        let v12 = C::emit(ctx, v10);
-                        let v13 = C::emit(ctx, v11);
-                        let v61 = MultiReg::Two { a: v59, b: v48 };
-                        // Rule at src/prelude_lower.isle line 762.
-                        return v61;
-                    }
-                    &ConsumesFlags::ConsumesFlagsReturnsResultWithProducer {
-                        inst: ref v63,
-                        result: v64,
-                    } => {
-                        let v60 = C::emit(ctx, v58);
-                        let v49 = C::emit(ctx, v47);
-                        let v65 = C::emit(ctx, v63);
-                        let v66 = MultiReg::Three {
-                            a: v59,
-                            b: v48,
-                            c: v64,
-                        };
-                        // Rule at src/prelude_lower.isle line 779.
-                        return v66;
-                    }
-                    &ConsumesFlags::ConsumesFlagsReturnsReg {
-                        inst: ref v14,
-                        result: v15,
-                    } => {
-                        let v60 = C::emit(ctx, v58);
-                        let v49 = C::emit(ctx, v47);
-                        let v16 = C::emit(ctx, v14);
-                        let v62 = MultiReg::Three {
-                            a: v59,
-                            b: v48,
-                            c: v15,
-                        };
-                        // Rule at src/prelude_lower.isle line 771.
-                        return v62;
-                    }
-                    &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
-                        inst1: ref v18,
-                        inst2: ref v19,
-                        result: v20,
-                    } => {
-                        let v60 = C::emit(ctx, v58);
-                        let v49 = C::emit(ctx, v47);
-                        let v21 = C::emit(ctx, v18);
-                        let v22 = C::emit(ctx, v19);
-                        let v24 = C::value_regs_get(ctx, v20, 0x0);
-                        let v26 = C::value_regs_get(ctx, v20, 0x1);
-                        let v67 = MultiReg::Four {
-                            a: v59,
-                            b: v48,
-                            c: v24,
-                            d: v26,
-                        };
-                        // Rule at src/prelude_lower.isle line 787.
-                        return v67;
-                    }
-                    &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
-                        inst1: ref v28,
-                        inst2: ref v29,
-                        inst3: ref v30,
-                        inst4: ref v31,
-                        result: v32,
-                    } => {
-                        let v60 = C::emit(ctx, v58);
-                        let v49 = C::emit(ctx, v47);
-                        let v33 = C::emit(ctx, v28);
-                        let v34 = C::emit(ctx, v29);
-                        let v35 = C::emit(ctx, v30);
-                        let v36 = C::emit(ctx, v31);
-                        let v37 = C::value_regs_get(ctx, v32, 0x0);
-                        let v38 = C::value_regs_get(ctx, v32, 0x1);
-                        let v68 = MultiReg::Four {
-                            a: v59,
-                            b: v48,
-                            c: v37,
-                            d: v38,
-                        };
-                        // Rule at src/prelude_lower.isle line 796.
-                        return v68;
-                    }
-                    _ => {}
-                }
-            }
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "with_flags_chained", "src/prelude_lower.isle line 564"
-    )
-}
-
-// Generated as internal constructor for term lower_return.
-pub fn constructor_lower_return<C: Context>(ctx: &mut C, arg0: ValueSlice) -> InstOutput {
-    let v1 = C::gen_return(ctx, arg0);
-    let v2 = C::output_none(ctx);
-    // Rule at src/prelude_lower.isle line 996.
-    return v2;
-}
-
-// Generated as internal constructor for term operand_size.
-pub fn constructor_operand_size<C: Context>(ctx: &mut C, arg0: Type) -> OperandSize {
-    let v1 = C::fits_in_32(ctx, arg0);
-    if let Some(v2) = v1 {
-        // Rule at src/isa/aarch64/inst.isle line 1192.
-        return OperandSize::Size32;
-    }
-    let v4 = C::fits_in_64(ctx, arg0);
-    if let Some(v5) = v4 {
-        // Rule at src/isa/aarch64/inst.isle line 1193.
-        return OperandSize::Size64;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "operand_size", "src/isa/aarch64/inst.isle line 1191"
-    )
-}
-
-// Generated as internal constructor for term scalar_size.
-pub fn constructor_scalar_size<C: Context>(ctx: &mut C, arg0: Type) -> ScalarSize {
-    match arg0 {
-        I8 => {
-            // Rule at src/isa/aarch64/inst.isle line 1205.
-            return ScalarSize::Size8;
-        }
-        I16 => {
-            // Rule at src/isa/aarch64/inst.isle line 1206.
-            return ScalarSize::Size16;
-        }
-        I32 => {
-            // Rule at src/isa/aarch64/inst.isle line 1207.
-            return ScalarSize::Size32;
-        }
-        I64 => {
-            // Rule at src/isa/aarch64/inst.isle line 1208.
-            return ScalarSize::Size64;
-        }
-        I128 => {
-            // Rule at src/isa/aarch64/inst.isle line 1209.
-            return ScalarSize::Size128;
-        }
-        F32 => {
-            // Rule at src/isa/aarch64/inst.isle line 1211.
-            return ScalarSize::Size32;
-        }
-        F64 => {
-            // Rule at src/isa/aarch64/inst.isle line 1212.
-            return ScalarSize::Size64;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "scalar_size", "src/isa/aarch64/inst.isle line 1203"
-    )
-}
-
-// Generated as internal constructor for term lane_size.
-pub fn constructor_lane_size<C: Context>(ctx: &mut C, arg0: Type) -> ScalarSize {
-    let v1 = C::multi_lane(ctx, arg0);
-    if let Some(v2) = v1 {
-        match v2.0 {
-            0x8 => {
-                // Rule at src/isa/aarch64/inst.isle line 1216.
-                return ScalarSize::Size8;
-            }
-            0x10 => {
-                // Rule at src/isa/aarch64/inst.isle line 1217.
-                return ScalarSize::Size16;
-            }
-            0x20 => {
-                // Rule at src/isa/aarch64/inst.isle line 1218.
-                return ScalarSize::Size32;
-            }
-            0x40 => {
-                // Rule at src/isa/aarch64/inst.isle line 1219.
-                return ScalarSize::Size64;
-            }
-            _ => {}
-        }
-    }
-    let v9 = C::dynamic_lane(ctx, arg0);
-    if let Some(v10) = v9 {
-        match v10.0 {
-            0x8 => {
-                // Rule at src/isa/aarch64/inst.isle line 1220.
-                return ScalarSize::Size8;
-            }
-            0x10 => {
-                // Rule at src/isa/aarch64/inst.isle line 1221.
-                return ScalarSize::Size16;
-            }
-            0x20 => {
-                // Rule at src/isa/aarch64/inst.isle line 1222.
-                return ScalarSize::Size32;
-            }
-            0x40 => {
-                // Rule at src/isa/aarch64/inst.isle line 1223.
-                return ScalarSize::Size64;
-            }
-            _ => {}
-        }
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "lane_size", "src/isa/aarch64/inst.isle line 1215"
-    )
-}
-
-// Generated as internal constructor for term vector_lane_size.
-pub fn constructor_vector_lane_size<C: Context>(ctx: &mut C, arg0: &VectorSize) -> ScalarSize {
-    match arg0 {
-        &VectorSize::Size8x8 => {
-            // Rule at src/isa/aarch64/inst.isle line 1228.
-            return ScalarSize::Size8;
-        }
-        &VectorSize::Size8x16 => {
-            // Rule at src/isa/aarch64/inst.isle line 1227.
-            return ScalarSize::Size8;
-        }
-        &VectorSize::Size16x4 => {
-            // Rule at src/isa/aarch64/inst.isle line 1230.
-            return ScalarSize::Size16;
-        }
-        &VectorSize::Size16x8 => {
-            // Rule at src/isa/aarch64/inst.isle line 1229.
-            return ScalarSize::Size16;
-        }
-        &VectorSize::Size32x2 => {
-            // Rule at src/isa/aarch64/inst.isle line 1232.
-            return ScalarSize::Size32;
-        }
-        &VectorSize::Size32x4 => {
-            // Rule at src/isa/aarch64/inst.isle line 1231.
-            return ScalarSize::Size32;
-        }
-        &VectorSize::Size64x2 => {
-            // Rule at src/isa/aarch64/inst.isle line 1233.
-            return ScalarSize::Size64;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vector_lane_size", "src/isa/aarch64/inst.isle line 1226"
-    )
-}
-
-// Generated as internal constructor for term vector_size.
-pub fn constructor_vector_size<C: Context>(ctx: &mut C, arg0: Type) -> VectorSize {
-    let v1 = C::multi_lane(ctx, arg0);
-    if let Some(v2) = v1 {
-        match v2.0 {
-            0x8 => {
-                match v2.1 {
-                    0x8 => {
-                        // Rule at src/isa/aarch64/inst.isle line 1268.
-                        return VectorSize::Size8x8;
-                    }
-                    0x10 => {
-                        // Rule at src/isa/aarch64/inst.isle line 1269.
-                        return VectorSize::Size8x16;
-                    }
-                    _ => {}
-                }
-            }
-            0x10 => {
-                match v2.1 {
-                    0x4 => {
-                        // Rule at src/isa/aarch64/inst.isle line 1270.
-                        return VectorSize::Size16x4;
-                    }
-                    0x8 => {
-                        // Rule at src/isa/aarch64/inst.isle line 1271.
-                        return VectorSize::Size16x8;
-                    }
-                    _ => {}
-                }
-            }
-            0x20 => {
-                match v2.1 {
-                    0x2 => {
-                        // Rule at src/isa/aarch64/inst.isle line 1272.
-                        return VectorSize::Size32x2;
-                    }
-                    0x4 => {
-                        // Rule at src/isa/aarch64/inst.isle line 1273.
-                        return VectorSize::Size32x4;
-                    }
-                    _ => {}
-                }
-            }
-            0x40 => {
-                if v2.1 == 0x2 {
-                    // Rule at src/isa/aarch64/inst.isle line 1274.
-                    return VectorSize::Size64x2;
-                }
-            }
-            _ => {}
-        }
-    }
-    let v12 = C::dynamic_lane(ctx, arg0);
-    if let Some(v13) = v12 {
-        match v13.0 {
-            0x8 => {
-                match v13.1 {
-                    0x8 => {
-                        // Rule at src/isa/aarch64/inst.isle line 1275.
-                        return VectorSize::Size8x8;
-                    }
-                    0x10 => {
-                        // Rule at src/isa/aarch64/inst.isle line 1276.
-                        return VectorSize::Size8x16;
-                    }
-                    _ => {}
-                }
-            }
-            0x10 => {
-                match v13.1 {
-                    0x4 => {
-                        // Rule at src/isa/aarch64/inst.isle line 1277.
-                        return VectorSize::Size16x4;
-                    }
-                    0x8 => {
-                        // Rule at src/isa/aarch64/inst.isle line 1278.
-                        return VectorSize::Size16x8;
-                    }
-                    _ => {}
-                }
-            }
-            0x20 => {
-                match v13.1 {
-                    0x2 => {
-                        // Rule at src/isa/aarch64/inst.isle line 1279.
-                        return VectorSize::Size32x2;
-                    }
-                    0x4 => {
-                        // Rule at src/isa/aarch64/inst.isle line 1280.
-                        return VectorSize::Size32x4;
-                    }
-                    _ => {}
-                }
-            }
-            0x40 => {
-                if v13.1 == 0x2 {
-                    // Rule at src/isa/aarch64/inst.isle line 1281.
-                    return VectorSize::Size64x2;
-                }
-            }
-            _ => {}
-        }
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vector_size", "src/isa/aarch64/inst.isle line 1267"
-    )
-}
-
-// Generated as internal constructor for term imm12_from_negated_value.
-pub fn constructor_imm12_from_negated_value<C: Context>(ctx: &mut C, arg0: Value) -> Option<Imm12> {
-    let v1 = C::def_inst(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v3 = C::first_result(ctx, v2);
-        if let Some(v4) = v3 {
-            let v6 = &C::inst_data(ctx, v2);
-            if let &InstructionData::UnaryImm {
-                opcode: ref v7,
-                imm: v8,
-            } = v6
-            {
-                if let &Opcode::Iconst = v7 {
-                    let v5 = C::value_type(ctx, v4);
-                    let v9 = C::i64_sextend_imm64(ctx, v5, v8);
-                    let v10 = C::i64_neg(ctx, v9);
-                    let v11 = C::i64_as_u64(ctx, v10);
-                    let v12 = C::imm12_from_u64(ctx, v11);
-                    if let Some(v13) = v12 {
-                        // Rule at src/isa/aarch64/inst.isle line 1772.
-                        return Some(v13);
-                    }
-                }
-            }
-        }
-    }
-    None
-}
-
-// Generated as internal constructor for term value_regs_zero.
-pub fn constructor_value_regs_zero<C: Context>(ctx: &mut C) -> ValueRegs {
-    let v3 = constructor_imm(ctx, I64, &ImmExtend::Zero, 0x0);
-    let v4 = constructor_imm(ctx, I64, &ImmExtend::Zero, 0x0);
-    let v5 = C::value_regs(ctx, v3, v4);
-    // Rule at src/isa/aarch64/inst.isle line 1821.
-    return v5;
-}
-
-// Generated as internal constructor for term mov.
-pub fn constructor_mov<C: Context>(ctx: &mut C, arg0: Reg, arg1: Type) -> Reg {
-    let v3 = C::temp_writable_reg(ctx, I64);
-    let v4 = &constructor_operand_size(ctx, arg1);
-    let v5 = MInst::Mov {
-        size: v4.clone(),
-        rd: v3,
-        rm: arg0,
-    };
-    let v6 = C::emit(ctx, &v5);
-    let v7 = C::writable_reg_to_reg(ctx, v3);
-    // Rule at src/isa/aarch64/inst.isle line 1829.
-    return v7;
-}
-
-// Generated as internal constructor for term movz.
-pub fn constructor_movz<C: Context>(ctx: &mut C, arg0: MoveWideConst, arg1: &OperandSize) -> Reg {
-    let v3 = C::temp_writable_reg(ctx, I64);
-    let v5 = MInst::MovWide {
-        op: MoveWideOp::MovZ,
-        rd: v3,
-        imm: arg0,
-        size: arg1.clone(),
-    };
-    let v6 = C::emit(ctx, &v5);
-    let v7 = C::writable_reg_to_reg(ctx, v3);
-    // Rule at src/isa/aarch64/inst.isle line 1836.
-    return v7;
-}
-
-// Generated as internal constructor for term movn.
-pub fn constructor_movn<C: Context>(ctx: &mut C, arg0: MoveWideConst, arg1: &OperandSize) -> Reg {
-    let v3 = C::temp_writable_reg(ctx, I64);
-    let v5 = MInst::MovWide {
-        op: MoveWideOp::MovN,
-        rd: v3,
-        imm: arg0,
-        size: arg1.clone(),
-    };
-    let v6 = C::emit(ctx, &v5);
-    let v7 = C::writable_reg_to_reg(ctx, v3);
-    // Rule at src/isa/aarch64/inst.isle line 1843.
-    return v7;
-}
-
-// Generated as internal constructor for term alu_rr_imm_logic.
-pub fn constructor_alu_rr_imm_logic<C: Context>(
-    ctx: &mut C,
-    arg0: &ALUOp,
-    arg1: Type,
-    arg2: Reg,
-    arg3: ImmLogic,
-) -> Reg {
-    let v5 = C::temp_writable_reg(ctx, I64);
-    let v6 = &constructor_operand_size(ctx, arg1);
-    let v7 = MInst::AluRRImmLogic {
-        alu_op: arg0.clone(),
-        size: v6.clone(),
-        rd: v5,
-        rn: arg2,
-        imml: arg3,
-    };
-    let v8 = C::emit(ctx, &v7);
-    let v9 = C::writable_reg_to_reg(ctx, v5);
-    // Rule at src/isa/aarch64/inst.isle line 1850.
-    return v9;
-}
-
-// Generated as internal constructor for term alu_rr_imm_shift.
-pub fn constructor_alu_rr_imm_shift<C: Context>(
-    ctx: &mut C,
-    arg0: &ALUOp,
-    arg1: Type,
-    arg2: Reg,
-    arg3: ImmShift,
-) -> Reg {
-    let v5 = C::temp_writable_reg(ctx, I64);
-    let v6 = &constructor_operand_size(ctx, arg1);
-    let v7 = MInst::AluRRImmShift {
-        alu_op: arg0.clone(),
-        size: v6.clone(),
-        rd: v5,
-        rn: arg2,
-        immshift: arg3,
-    };
-    let v8 = C::emit(ctx, &v7);
-    let v9 = C::writable_reg_to_reg(ctx, v5);
-    // Rule at src/isa/aarch64/inst.isle line 1857.
-    return v9;
-}
-
-// Generated as internal constructor for term alu_rrr.
-pub fn constructor_alu_rrr<C: Context>(
-    ctx: &mut C,
-    arg0: &ALUOp,
-    arg1: Type,
-    arg2: Reg,
-    arg3: Reg,
-) -> Reg {
-    let v5 = C::temp_writable_reg(ctx, I64);
-    let v6 = &constructor_operand_size(ctx, arg1);
-    let v7 = MInst::AluRRR {
-        alu_op: arg0.clone(),
-        size: v6.clone(),
-        rd: v5,
-        rn: arg2,
-        rm: arg3,
-    };
-    let v8 = C::emit(ctx, &v7);
-    let v9 = C::writable_reg_to_reg(ctx, v5);
-    // Rule at src/isa/aarch64/inst.isle line 1864.
-    return v9;
-}
-
-// Generated as internal constructor for term vec_rrr.
-pub fn constructor_vec_rrr<C: Context>(
-    ctx: &mut C,
-    arg0: &VecALUOp,
-    arg1: Reg,
-    arg2: Reg,
-    arg3: &VectorSize,
-) -> Reg {
-    let v5 = C::temp_writable_reg(ctx, I8X16);
-    let v6 = MInst::VecRRR {
-        alu_op: arg0.clone(),
-        rd: v5,
-        rn: arg1,
-        rm: arg2,
-        size: arg3.clone(),
-    };
-    let v7 = C::emit(ctx, &v6);
-    let v8 = C::writable_reg_to_reg(ctx, v5);
-    // Rule at src/isa/aarch64/inst.isle line 1871.
-    return v8;
-}
-
-// Generated as internal constructor for term fpu_rr.
-pub fn constructor_fpu_rr<C: Context>(
-    ctx: &mut C,
-    arg0: &FPUOp1,
-    arg1: Reg,
-    arg2: &ScalarSize,
-) -> Reg {
-    let v4 = C::temp_writable_reg(ctx, F64);
-    let v5 = MInst::FpuRR {
-        fpu_op: arg0.clone(),
-        size: arg2.clone(),
-        rd: v4,
-        rn: arg1,
-    };
-    let v6 = C::emit(ctx, &v5);
-    let v7 = C::writable_reg_to_reg(ctx, v4);
-    // Rule at src/isa/aarch64/inst.isle line 1878.
-    return v7;
-}
-
-// Generated as internal constructor for term vec_rrr_mod.
-pub fn constructor_vec_rrr_mod<C: Context>(
-    ctx: &mut C,
-    arg0: &VecALUModOp,
-    arg1: Reg,
-    arg2: Reg,
-    arg3: Reg,
-    arg4: &VectorSize,
-) -> Reg {
-    let v6 = C::temp_writable_reg(ctx, I8X16);
-    let v7 = MInst::VecRRRMod {
-        alu_op: arg0.clone(),
-        rd: v6,
-        ri: arg1,
-        rn: arg2,
-        rm: arg3,
-        size: arg4.clone(),
-    };
-    let v8 = C::emit(ctx, &v7);
-    let v9 = C::writable_reg_to_reg(ctx, v6);
-    // Rule at src/isa/aarch64/inst.isle line 1886.
-    return v9;
-}
-
-// Generated as internal constructor for term vec_fmla_elem.
-pub fn constructor_vec_fmla_elem<C: Context>(
-    ctx: &mut C,
-    arg0: &VecALUModOp,
-    arg1: Reg,
-    arg2: Reg,
-    arg3: Reg,
-    arg4: &VectorSize,
-    arg5: u8,
-) -> Reg {
-    let v7 = C::temp_writable_reg(ctx, I8X16);
-    let v8 = MInst::VecFmlaElem {
-        alu_op: arg0.clone(),
-        rd: v7,
-        ri: arg1,
-        rn: arg2,
-        rm: arg3,
-        size: arg4.clone(),
-        idx: arg5,
-    };
-    let v9 = C::emit(ctx, &v8);
-    let v10 = C::writable_reg_to_reg(ctx, v7);
-    // Rule at src/isa/aarch64/inst.isle line 1894.
-    return v10;
-}
-
-// Generated as internal constructor for term fpu_rri.
-pub fn constructor_fpu_rri<C: Context>(ctx: &mut C, arg0: &FPUOpRI, arg1: Reg) -> Reg {
-    let v3 = C::temp_writable_reg(ctx, F64);
-    let v4 = MInst::FpuRRI {
-        fpu_op: arg0.clone(),
-        rd: v3,
-        rn: arg1,
-    };
-    let v5 = C::emit(ctx, &v4);
-    let v6 = C::writable_reg_to_reg(ctx, v3);
-    // Rule at src/isa/aarch64/inst.isle line 1900.
-    return v6;
-}
-
-// Generated as internal constructor for term fpu_rri_mod.
-pub fn constructor_fpu_rri_mod<C: Context>(
-    ctx: &mut C,
-    arg0: &FPUOpRIMod,
-    arg1: Reg,
-    arg2: Reg,
-) -> Reg {
-    let v4 = C::temp_writable_reg(ctx, F64);
-    let v5 = MInst::FpuRRIMod {
-        fpu_op: arg0.clone(),
-        rd: v4,
-        ri: arg1,
-        rn: arg2,
-    };
-    let v6 = C::emit(ctx, &v5);
-    let v7 = C::writable_reg_to_reg(ctx, v4);
-    // Rule at src/isa/aarch64/inst.isle line 1906.
-    return v7;
-}
-
-// Generated as internal constructor for term fpu_rrr.
-pub fn constructor_fpu_rrr<C: Context>(
-    ctx: &mut C,
-    arg0: &FPUOp2,
-    arg1: Reg,
-    arg2: Reg,
-    arg3: &ScalarSize,
-) -> Reg {
-    let v5 = C::temp_writable_reg(ctx, F64);
-    let v6 = MInst::FpuRRR {
-        fpu_op: arg0.clone(),
-        size: arg3.clone(),
-        rd: v5,
-        rn: arg1,
-        rm: arg2,
-    };
-    let v7 = C::emit(ctx, &v6);
-    let v8 = C::writable_reg_to_reg(ctx, v5);
-    // Rule at src/isa/aarch64/inst.isle line 1913.
-    return v8;
-}
-
-// Generated as internal constructor for term fpu_rrrr.
-pub fn constructor_fpu_rrrr<C: Context>(
-    ctx: &mut C,
-    arg0: &FPUOp3,
-    arg1: &ScalarSize,
-    arg2: Reg,
-    arg3: Reg,
-    arg4: Reg,
-) -> Reg {
-    let v6 = C::temp_writable_reg(ctx, F64);
-    let v7 = MInst::FpuRRRR {
-        fpu_op: arg0.clone(),
-        size: arg1.clone(),
-        rd: v6,
-        rn: arg2,
-        rm: arg3,
-        ra: arg4,
-    };
-    let v8 = C::emit(ctx, &v7);
-    let v9 = C::writable_reg_to_reg(ctx, v6);
-    // Rule at src/isa/aarch64/inst.isle line 1920.
-    return v9;
-}
-
-// Generated as internal constructor for term fpu_cmp.
-pub fn constructor_fpu_cmp<C: Context>(
-    ctx: &mut C,
-    arg0: &ScalarSize,
-    arg1: Reg,
-    arg2: Reg,
-) -> ProducesFlags {
-    let v3 = MInst::FpuCmp {
-        size: arg0.clone(),
-        rn: arg1,
-        rm: arg2,
-    };
-    let v4 = ProducesFlags::ProducesFlagsSideEffect { inst: v3 };
-    // Rule at src/isa/aarch64/inst.isle line 1927.
-    return v4;
-}
-
-// Generated as internal constructor for term vec_lanes.
-pub fn constructor_vec_lanes<C: Context>(
-    ctx: &mut C,
-    arg0: &VecLanesOp,
-    arg1: Reg,
-    arg2: &VectorSize,
-) -> Reg {
-    let v4 = C::temp_writable_reg(ctx, I8X16);
-    let v5 = MInst::VecLanes {
-        op: arg0.clone(),
-        rd: v4,
-        rn: arg1,
-        size: arg2.clone(),
-    };
-    let v6 = C::emit(ctx, &v5);
-    let v7 = C::writable_reg_to_reg(ctx, v4);
-    // Rule at src/isa/aarch64/inst.isle line 1933.
-    return v7;
-}
-
-// Generated as internal constructor for term vec_shift_imm.
-pub fn constructor_vec_shift_imm<C: Context>(
-    ctx: &mut C,
-    arg0: &VecShiftImmOp,
-    arg1: u8,
-    arg2: Reg,
-    arg3: &VectorSize,
-) -> Reg {
-    let v5 = C::temp_writable_reg(ctx, I8X16);
-    let v6 = MInst::VecShiftImm {
-        op: arg0.clone(),
-        rd: v5,
-        rn: arg2,
-        size: arg3.clone(),
-        imm: arg1,
-    };
-    let v7 = C::emit(ctx, &v6);
-    let v8 = C::writable_reg_to_reg(ctx, v5);
-    // Rule at src/isa/aarch64/inst.isle line 1940.
-    return v8;
-}
-
-// Generated as internal constructor for term vec_dup.
-pub fn constructor_vec_dup<C: Context>(ctx: &mut C, arg0: Reg, arg1: &VectorSize) -> Reg {
-    let v3 = C::temp_writable_reg(ctx, I8X16);
-    let v4 = MInst::VecDup {
-        rd: v3,
-        rn: arg0,
-        size: arg1.clone(),
-    };
-    let v5 = C::emit(ctx, &v4);
-    let v6 = C::writable_reg_to_reg(ctx, v3);
-    // Rule at src/isa/aarch64/inst.isle line 1947.
-    return v6;
-}
-
-// Generated as internal constructor for term vec_dup_from_fpu.
-pub fn constructor_vec_dup_from_fpu<C: Context>(
-    ctx: &mut C,
-    arg0: Reg,
-    arg1: &VectorSize,
-    arg2: u8,
-) -> Reg {
-    let v4 = C::temp_writable_reg(ctx, I8X16);
-    let v5 = MInst::VecDupFromFpu {
-        rd: v4,
-        rn: arg0,
-        size: arg1.clone(),
-        lane: arg2,
-    };
-    let v6 = C::emit(ctx, &v5);
-    let v7 = C::writable_reg_to_reg(ctx, v4);
-    // Rule at src/isa/aarch64/inst.isle line 1954.
-    return v7;
-}
-
-// Generated as internal constructor for term vec_dup_imm.
-pub fn constructor_vec_dup_imm<C: Context>(
-    ctx: &mut C,
-    arg0: ASIMDMovModImm,
-    arg1: bool,
-    arg2: &VectorSize,
-) -> Reg {
-    let v4 = C::temp_writable_reg(ctx, I8X16);
-    let v5 = MInst::VecDupImm {
-        rd: v4,
-        imm: arg0,
-        invert: arg1,
-        size: arg2.clone(),
-    };
-    let v6 = C::emit(ctx, &v5);
-    let v7 = C::writable_reg_to_reg(ctx, v4);
-    // Rule at src/isa/aarch64/inst.isle line 1961.
-    return v7;
-}
-
-// Generated as internal constructor for term alu_rr_imm12.
-pub fn constructor_alu_rr_imm12<C: Context>(
-    ctx: &mut C,
-    arg0: &ALUOp,
-    arg1: Type,
-    arg2: Reg,
-    arg3: Imm12,
-) -> Reg {
-    let v5 = C::temp_writable_reg(ctx, I64);
-    let v6 = &constructor_operand_size(ctx, arg1);
-    let v7 = MInst::AluRRImm12 {
-        alu_op: arg0.clone(),
-        size: v6.clone(),
-        rd: v5,
-        rn: arg2,
-        imm12: arg3,
-    };
-    let v8 = C::emit(ctx, &v7);
-    let v9 = C::writable_reg_to_reg(ctx, v5);
-    // Rule at src/isa/aarch64/inst.isle line 1968.
-    return v9;
-}
-
-// Generated as internal constructor for term alu_rrr_shift.
-pub fn constructor_alu_rrr_shift<C: Context>(
-    ctx: &mut C,
-    arg0: &ALUOp,
-    arg1: Type,
-    arg2: Reg,
-    arg3: Reg,
-    arg4: ShiftOpAndAmt,
-) -> Reg {
-    let v6 = C::temp_writable_reg(ctx, I64);
-    let v7 = &constructor_operand_size(ctx, arg1);
-    let v8 = MInst::AluRRRShift {
-        alu_op: arg0.clone(),
-        size: v7.clone(),
-        rd: v6,
-        rn: arg2,
-        rm: arg3,
-        shiftop: arg4,
-    };
-    let v9 = C::emit(ctx, &v8);
-    let v10 = C::writable_reg_to_reg(ctx, v6);
-    // Rule at src/isa/aarch64/inst.isle line 1975.
-    return v10;
-}
-
-// Generated as internal constructor for term cmp_rr_shift.
-pub fn constructor_cmp_rr_shift<C: Context>(
-    ctx: &mut C,
-    arg0: &OperandSize,
-    arg1: Reg,
-    arg2: Reg,
-    arg3: u64,
-) -> ProducesFlags {
-    let v5 = C::lshr_from_u64(ctx, I64, arg3);
-    if let Some(v6) = v5 {
-        let v8 = C::writable_zero_reg(ctx);
-        let v9 = MInst::AluRRRShift {
-            alu_op: ALUOp::SubS,
-            size: arg0.clone(),
-            rd: v8,
-            rn: arg1,
-            rm: arg2,
-            shiftop: v6,
-        };
-        let v10 = ProducesFlags::ProducesFlagsSideEffect { inst: v9 };
-        // Rule at src/isa/aarch64/inst.isle line 1983.
-        return v10;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "cmp_rr_shift", "src/isa/aarch64/inst.isle line 1982"
-    )
-}
-
-// Generated as internal constructor for term cmp_rr_shift_asr.
-pub fn constructor_cmp_rr_shift_asr<C: Context>(
-    ctx: &mut C,
-    arg0: &OperandSize,
-    arg1: Reg,
-    arg2: Reg,
-    arg3: u64,
-) -> ProducesFlags {
-    let v5 = C::ashr_from_u64(ctx, I64, arg3);
-    if let Some(v6) = v5 {
-        let v8 = C::writable_zero_reg(ctx);
-        let v9 = MInst::AluRRRShift {
-            alu_op: ALUOp::SubS,
-            size: arg0.clone(),
-            rd: v8,
-            rn: arg1,
-            rm: arg2,
-            shiftop: v6,
-        };
-        let v10 = ProducesFlags::ProducesFlagsSideEffect { inst: v9 };
-        // Rule at src/isa/aarch64/inst.isle line 1992.
-        return v10;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "cmp_rr_shift_asr", "src/isa/aarch64/inst.isle line 1991"
-    )
-}
-
-// Generated as internal constructor for term alu_rrr_extend.
-pub fn constructor_alu_rrr_extend<C: Context>(
-    ctx: &mut C,
-    arg0: &ALUOp,
-    arg1: Type,
-    arg2: Reg,
-    arg3: Reg,
-    arg4: &ExtendOp,
-) -> Reg {
-    let v6 = C::temp_writable_reg(ctx, I64);
-    let v7 = &constructor_operand_size(ctx, arg1);
-    let v8 = MInst::AluRRRExtend {
-        alu_op: arg0.clone(),
-        size: v7.clone(),
-        rd: v6,
-        rn: arg2,
-        rm: arg3,
-        extendop: arg4.clone(),
-    };
-    let v9 = C::emit(ctx, &v8);
-    let v10 = C::writable_reg_to_reg(ctx, v6);
-    // Rule at src/isa/aarch64/inst.isle line 2000.
-    return v10;
-}
-
-// Generated as internal constructor for term alu_rr_extend_reg.
-pub fn constructor_alu_rr_extend_reg<C: Context>(
-    ctx: &mut C,
-    arg0: &ALUOp,
-    arg1: Type,
-    arg2: Reg,
-    arg3: &ExtendedValue,
-) -> Reg {
-    let v4 = C::put_extended_in_reg(ctx, arg3);
-    let v5 = &C::get_extended_op(ctx, arg3);
-    let v6 = constructor_alu_rrr_extend(ctx, arg0, arg1, arg2, v4, v5);
-    // Rule at src/isa/aarch64/inst.isle line 2008.
-    return v6;
-}
-
-// Generated as internal constructor for term alu_rrrr.
-pub fn constructor_alu_rrrr<C: Context>(
-    ctx: &mut C,
-    arg0: &ALUOp3,
-    arg1: Type,
-    arg2: Reg,
-    arg3: Reg,
-    arg4: Reg,
-) -> Reg {
-    let v6 = C::temp_writable_reg(ctx, I64);
-    let v7 = &constructor_operand_size(ctx, arg1);
-    let v8 = MInst::AluRRRR {
-        alu_op: arg0.clone(),
-        size: v7.clone(),
-        rd: v6,
-        rn: arg2,
-        rm: arg3,
-        ra: arg4,
-    };
-    let v9 = C::emit(ctx, &v8);
-    let v10 = C::writable_reg_to_reg(ctx, v6);
-    // Rule at src/isa/aarch64/inst.isle line 2015.
-    return v10;
-}
-
-// Generated as internal constructor for term alu_rrr_with_flags_paired.
-pub fn constructor_alu_rrr_with_flags_paired<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: Reg,
-    arg3: &ALUOp,
-) -> ProducesFlags {
-    let v5 = C::temp_writable_reg(ctx, I64);
-    let v6 = &constructor_operand_size(ctx, arg0);
-    let v7 = MInst::AluRRR {
-        alu_op: arg3.clone(),
-        size: v6.clone(),
-        rd: v5,
-        rn: arg1,
-        rm: arg2,
-    };
-    let v8 = C::writable_reg_to_reg(ctx, v5);
-    let v9 = ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
-        inst: v7,
-        result: v8,
-    };
-    // Rule at src/isa/aarch64/inst.isle line 2022.
-    return v9;
-}
-
-// Generated as internal constructor for term alu_rrr_with_flags_chained.
-pub fn constructor_alu_rrr_with_flags_chained<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: Reg,
-    arg3: &ALUOp,
-) -> ConsumesAndProducesFlags {
-    let v5 = C::temp_writable_reg(ctx, I64);
-    let v6 = &constructor_operand_size(ctx, arg0);
-    let v7 = MInst::AluRRR {
-        alu_op: arg3.clone(),
-        size: v6.clone(),
-        rd: v5,
-        rn: arg1,
-        rm: arg2,
-    };
-    let v8 = C::writable_reg_to_reg(ctx, v5);
-    let v9 = ConsumesAndProducesFlags::ReturnsReg {
-        inst: v7,
-        result: v8,
-    };
-    // Rule at src/isa/aarch64/inst.isle line 2030.
-    return v9;
-}
-
-// Generated as internal constructor for term bit_rr.
-pub fn constructor_bit_rr<C: Context>(ctx: &mut C, arg0: &BitOp, arg1: Type, arg2: Reg) -> Reg {
-    let v4 = C::temp_writable_reg(ctx, I64);
-    let v5 = &constructor_operand_size(ctx, arg1);
-    let v6 = MInst::BitRR {
-        op: arg0.clone(),
-        size: v5.clone(),
-        rd: v4,
-        rn: arg2,
-    };
-    let v7 = C::emit(ctx, &v6);
-    let v8 = C::writable_reg_to_reg(ctx, v4);
-    // Rule at src/isa/aarch64/inst.isle line 2038.
-    return v8;
-}
-
-// Generated as internal constructor for term add_with_flags_paired.
-pub fn constructor_add_with_flags_paired<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: Reg,
-) -> ProducesFlags {
-    let v4 = C::temp_writable_reg(ctx, I64);
-    let v6 = &constructor_operand_size(ctx, arg0);
-    let v7 = MInst::AluRRR {
-        alu_op: ALUOp::AddS,
-        size: v6.clone(),
-        rd: v4,
-        rn: arg1,
-        rm: arg2,
-    };
-    let v8 = C::writable_reg_to_reg(ctx, v4);
-    let v9 = ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
-        inst: v7,
-        result: v8,
-    };
-    // Rule at src/isa/aarch64/inst.isle line 2045.
-    return v9;
-}
-
-// Generated as internal constructor for term adc_paired.
-pub fn constructor_adc_paired<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: Reg,
-) -> ConsumesFlags {
-    let v4 = C::temp_writable_reg(ctx, I64);
-    let v6 = &constructor_operand_size(ctx, arg0);
-    let v7 = MInst::AluRRR {
-        alu_op: ALUOp::Adc,
-        size: v6.clone(),
-        rd: v4,
-        rn: arg1,
-        rm: arg2,
-    };
-    let v8 = C::writable_reg_to_reg(ctx, v4);
-    let v9 = ConsumesFlags::ConsumesFlagsReturnsResultWithProducer {
-        inst: v7,
-        result: v8,
-    };
-    // Rule at src/isa/aarch64/inst.isle line 2053.
-    return v9;
-}
-
-// Generated as internal constructor for term sub_with_flags_paired.
-pub fn constructor_sub_with_flags_paired<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: Reg,
-) -> ProducesFlags {
-    let v4 = C::temp_writable_reg(ctx, I64);
-    let v6 = &constructor_operand_size(ctx, arg0);
-    let v7 = MInst::AluRRR {
-        alu_op: ALUOp::SubS,
-        size: v6.clone(),
-        rd: v4,
-        rn: arg1,
-        rm: arg2,
-    };
-    let v8 = C::writable_reg_to_reg(ctx, v4);
-    let v9 = ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
-        inst: v7,
-        result: v8,
-    };
-    // Rule at src/isa/aarch64/inst.isle line 2061.
-    return v9;
-}
-
-// Generated as internal constructor for term materialize_bool_result.
-pub fn constructor_materialize_bool_result<C: Context>(ctx: &mut C, arg0: &Cond) -> ConsumesFlags {
-    let v2 = C::temp_writable_reg(ctx, I64);
-    let v3 = MInst::CSet {
-        rd: v2,
-        cond: arg0.clone(),
-    };
-    let v4 = C::writable_reg_to_reg(ctx, v2);
-    let v5 = ConsumesFlags::ConsumesFlagsReturnsReg {
-        inst: v3,
-        result: v4,
-    };
-    // Rule at src/isa/aarch64/inst.isle line 2070.
-    return v5;
-}
-
-// Generated as internal constructor for term cmn_imm.
-pub fn constructor_cmn_imm<C: Context>(
-    ctx: &mut C,
-    arg0: &OperandSize,
-    arg1: Reg,
-    arg2: Imm12,
-) -> ProducesFlags {
-    let v4 = C::writable_zero_reg(ctx);
-    let v5 = MInst::AluRRImm12 {
-        alu_op: ALUOp::AddS,
-        size: arg0.clone(),
-        rd: v4,
-        rn: arg1,
-        imm12: arg2,
-    };
-    let v6 = ProducesFlags::ProducesFlagsSideEffect { inst: v5 };
-    // Rule at src/isa/aarch64/inst.isle line 2077.
-    return v6;
-}
-
-// Generated as internal constructor for term cmp.
-pub fn constructor_cmp<C: Context>(
-    ctx: &mut C,
-    arg0: &OperandSize,
-    arg1: Reg,
-    arg2: Reg,
-) -> ProducesFlags {
-    let v4 = C::writable_zero_reg(ctx);
-    let v5 = MInst::AluRRR {
-        alu_op: ALUOp::SubS,
-        size: arg0.clone(),
-        rd: v4,
-        rn: arg1,
-        rm: arg2,
-    };
-    let v6 = ProducesFlags::ProducesFlagsSideEffect { inst: v5 };
-    // Rule at src/isa/aarch64/inst.isle line 2083.
-    return v6;
-}
-
-// Generated as internal constructor for term cmp_imm.
-pub fn constructor_cmp_imm<C: Context>(
-    ctx: &mut C,
-    arg0: &OperandSize,
-    arg1: Reg,
-    arg2: Imm12,
-) -> ProducesFlags {
-    let v4 = C::writable_zero_reg(ctx);
-    let v5 = MInst::AluRRImm12 {
-        alu_op: ALUOp::SubS,
-        size: arg0.clone(),
-        rd: v4,
-        rn: arg1,
-        imm12: arg2,
-    };
-    let v6 = ProducesFlags::ProducesFlagsSideEffect { inst: v5 };
-    // Rule at src/isa/aarch64/inst.isle line 2089.
-    return v6;
-}
-
-// Generated as internal constructor for term cmp64_imm.
-pub fn constructor_cmp64_imm<C: Context>(ctx: &mut C, arg0: Reg, arg1: Imm12) -> ProducesFlags {
-    let v3 = &constructor_cmp_imm(ctx, &OperandSize::Size64, arg0, arg1);
-    // Rule at src/isa/aarch64/inst.isle line 2095.
-    return v3.clone();
-}
-
-// Generated as internal constructor for term cmp_extend.
-pub fn constructor_cmp_extend<C: Context>(
-    ctx: &mut C,
-    arg0: &OperandSize,
-    arg1: Reg,
-    arg2: Reg,
-    arg3: &ExtendOp,
-) -> ProducesFlags {
-    let v5 = C::writable_zero_reg(ctx);
-    let v6 = MInst::AluRRRExtend {
-        alu_op: ALUOp::SubS,
-        size: arg0.clone(),
-        rd: v5,
-        rn: arg1,
-        rm: arg2,
-        extendop: arg3.clone(),
-    };
-    let v7 = ProducesFlags::ProducesFlagsSideEffect { inst: v6 };
-    // Rule at src/isa/aarch64/inst.isle line 2099.
-    return v7;
-}
-
-// Generated as internal constructor for term sbc_paired.
-pub fn constructor_sbc_paired<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: Reg,
-) -> ConsumesFlags {
-    let v4 = C::temp_writable_reg(ctx, I64);
-    let v6 = &constructor_operand_size(ctx, arg0);
-    let v7 = MInst::AluRRR {
-        alu_op: ALUOp::Sbc,
-        size: v6.clone(),
-        rd: v4,
-        rn: arg1,
-        rm: arg2,
-    };
-    let v8 = C::writable_reg_to_reg(ctx, v4);
-    let v9 = ConsumesFlags::ConsumesFlagsReturnsResultWithProducer {
-        inst: v7,
-        result: v8,
-    };
-    // Rule at src/isa/aarch64/inst.isle line 2106.
-    return v9;
-}
-
-// Generated as internal constructor for term vec_misc.
-pub fn constructor_vec_misc<C: Context>(
-    ctx: &mut C,
-    arg0: &VecMisc2,
-    arg1: Reg,
-    arg2: &VectorSize,
-) -> Reg {
-    let v4 = C::temp_writable_reg(ctx, I8X16);
-    let v5 = MInst::VecMisc {
-        op: arg0.clone(),
-        rd: v4,
-        rn: arg1,
-        size: arg2.clone(),
-    };
-    let v6 = C::emit(ctx, &v5);
-    let v7 = C::writable_reg_to_reg(ctx, v4);
-    // Rule at src/isa/aarch64/inst.isle line 2114.
-    return v7;
-}
-
-// Generated as internal constructor for term vec_tbl.
-pub fn constructor_vec_tbl<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg) -> Reg {
-    let v3 = C::temp_writable_reg(ctx, I8X16);
-    let v4 = MInst::VecTbl {
-        rd: v3,
-        rn: arg0,
-        rm: arg1,
-    };
-    let v5 = C::emit(ctx, &v4);
-    let v6 = C::writable_reg_to_reg(ctx, v3);
-    // Rule at src/isa/aarch64/inst.isle line 2121.
-    return v6;
-}
-
-// Generated as internal constructor for term vec_tbl_ext.
-pub fn constructor_vec_tbl_ext<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg, arg2: Reg) -> Reg {
-    let v4 = C::temp_writable_reg(ctx, I8X16);
-    let v5 = MInst::VecTblExt {
-        rd: v4,
-        ri: arg0,
-        rn: arg1,
-        rm: arg2,
-    };
-    let v6 = C::emit(ctx, &v5);
-    let v7 = C::writable_reg_to_reg(ctx, v4);
-    // Rule at src/isa/aarch64/inst.isle line 2127.
-    return v7;
-}
-
-// Generated as internal constructor for term vec_tbl2.
-pub fn constructor_vec_tbl2<C: Context>(
-    ctx: &mut C,
-    arg0: Reg,
-    arg1: Reg,
-    arg2: Reg,
-    arg3: Type,
-) -> Reg {
-    let v5 = C::temp_writable_reg(ctx, I8X16);
-    let v6 = MInst::VecTbl2 {
-        rd: v5,
-        rn: arg0,
-        rn2: arg1,
-        rm: arg2,
-    };
-    let v7 = C::emit(ctx, &v6);
-    let v8 = C::writable_reg_to_reg(ctx, v5);
-    // Rule at src/isa/aarch64/inst.isle line 2134.
-    return v8;
-}
-
-// Generated as internal constructor for term vec_tbl2_ext.
-pub fn constructor_vec_tbl2_ext<C: Context>(
-    ctx: &mut C,
-    arg0: Reg,
-    arg1: Reg,
-    arg2: Reg,
-    arg3: Reg,
-    arg4: Type,
-) -> Reg {
-    let v6 = C::temp_writable_reg(ctx, I8X16);
-    let v7 = MInst::VecTbl2Ext {
-        rd: v6,
-        ri: arg0,
-        rn: arg1,
-        rn2: arg2,
-        rm: arg3,
-    };
-    let v8 = C::emit(ctx, &v7);
-    let v9 = C::writable_reg_to_reg(ctx, v6);
-    // Rule at src/isa/aarch64/inst.isle line 2143.
-    return v9;
-}
-
-// Generated as internal constructor for term vec_rrr_long.
-pub fn constructor_vec_rrr_long<C: Context>(
-    ctx: &mut C,
-    arg0: &VecRRRLongOp,
-    arg1: Reg,
-    arg2: Reg,
-    arg3: bool,
-) -> Reg {
-    let v5 = C::temp_writable_reg(ctx, I8X16);
-    let v6 = MInst::VecRRRLong {
-        alu_op: arg0.clone(),
-        rd: v5,
-        rn: arg1,
-        rm: arg2,
-        high_half: arg3,
-    };
-    let v7 = C::emit(ctx, &v6);
-    let v8 = C::writable_reg_to_reg(ctx, v5);
-    // Rule at src/isa/aarch64/inst.isle line 2152.
-    return v8;
-}
-
-// Generated as internal constructor for term vec_rr_pair_long.
-pub fn constructor_vec_rr_pair_long<C: Context>(
-    ctx: &mut C,
-    arg0: &VecRRPairLongOp,
-    arg1: Reg,
-) -> Reg {
-    let v3 = C::temp_writable_reg(ctx, I8X16);
-    let v4 = MInst::VecRRPairLong {
-        op: arg0.clone(),
-        rd: v3,
-        rn: arg1,
-    };
-    let v5 = C::emit(ctx, &v4);
-    let v6 = C::writable_reg_to_reg(ctx, v3);
-    // Rule at src/isa/aarch64/inst.isle line 2159.
-    return v6;
-}
-
-// Generated as internal constructor for term vec_rrrr_long.
-pub fn constructor_vec_rrrr_long<C: Context>(
-    ctx: &mut C,
-    arg0: &VecRRRLongModOp,
-    arg1: Reg,
-    arg2: Reg,
-    arg3: Reg,
-    arg4: bool,
-) -> Reg {
-    let v6 = C::temp_writable_reg(ctx, I8X16);
-    let v7 = MInst::VecRRRLongMod {
-        alu_op: arg0.clone(),
-        rd: v6,
-        ri: arg1,
-        rn: arg2,
-        rm: arg3,
-        high_half: arg4,
-    };
-    let v8 = C::emit(ctx, &v7);
-    let v9 = C::writable_reg_to_reg(ctx, v6);
-    // Rule at src/isa/aarch64/inst.isle line 2166.
-    return v9;
-}
-
-// Generated as internal constructor for term vec_rr_narrow_low.
-pub fn constructor_vec_rr_narrow_low<C: Context>(
-    ctx: &mut C,
-    arg0: &VecRRNarrowOp,
-    arg1: Reg,
-    arg2: &ScalarSize,
-) -> Reg {
-    let v4 = C::temp_writable_reg(ctx, I8X16);
-    let v5 = MInst::VecRRNarrowLow {
-        op: arg0.clone(),
-        rd: v4,
-        rn: arg1,
-        lane_size: arg2.clone(),
-    };
-    let v6 = C::emit(ctx, &v5);
-    let v7 = C::writable_reg_to_reg(ctx, v4);
-    // Rule at src/isa/aarch64/inst.isle line 2173.
-    return v7;
-}
-
-// Generated as internal constructor for term vec_rr_narrow_high.
-pub fn constructor_vec_rr_narrow_high<C: Context>(
-    ctx: &mut C,
-    arg0: &VecRRNarrowOp,
-    arg1: Reg,
-    arg2: Reg,
-    arg3: &ScalarSize,
-) -> Reg {
-    let v5 = C::temp_writable_reg(ctx, I8X16);
-    let v6 = MInst::VecRRNarrowHigh {
-        op: arg0.clone(),
-        rd: v5,
-        ri: arg1,
-        rn: arg2,
-        lane_size: arg3.clone(),
-    };
-    let v7 = C::emit(ctx, &v6);
-    let v8 = C::writable_reg_to_reg(ctx, v5);
-    // Rule at src/isa/aarch64/inst.isle line 2181.
-    return v8;
-}
-
-// Generated as internal constructor for term vec_rr_long.
-pub fn constructor_vec_rr_long<C: Context>(
-    ctx: &mut C,
-    arg0: &VecRRLongOp,
-    arg1: Reg,
-    arg2: bool,
-) -> Reg {
-    let v4 = C::temp_writable_reg(ctx, I8X16);
-    let v5 = MInst::VecRRLong {
-        op: arg0.clone(),
-        rd: v4,
-        rn: arg1,
-        high_half: arg2,
-    };
-    let v6 = C::emit(ctx, &v5);
-    let v7 = C::writable_reg_to_reg(ctx, v4);
-    // Rule at src/isa/aarch64/inst.isle line 2188.
-    return v7;
-}
-
-// Generated as internal constructor for term fpu_csel.
-pub fn constructor_fpu_csel<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &Cond,
-    arg2: Reg,
-    arg3: Reg,
-) -> ConsumesFlags {
-    match arg0 {
-        F32 => {
-            let v5 = C::temp_writable_reg(ctx, F32);
-            let v6 = MInst::FpuCSel32 {
-                rd: v5,
-                rn: arg2,
-                rm: arg3,
-                cond: arg1.clone(),
-            };
-            let v7 = C::writable_reg_to_reg(ctx, v5);
-            let v8 = ConsumesFlags::ConsumesFlagsReturnsReg {
-                inst: v6,
-                result: v7,
-            };
-            // Rule at src/isa/aarch64/inst.isle line 2196.
-            return v8;
-        }
-        F64 => {
-            let v10 = C::temp_writable_reg(ctx, F64);
-            let v11 = MInst::FpuCSel64 {
-                rd: v10,
-                rn: arg2,
-                rm: arg3,
-                cond: arg1.clone(),
-            };
-            let v12 = C::writable_reg_to_reg(ctx, v10);
-            let v13 = ConsumesFlags::ConsumesFlagsReturnsReg {
-                inst: v11,
-                result: v12,
-            };
-            // Rule at src/isa/aarch64/inst.isle line 2202.
-            return v13;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "fpu_csel", "src/isa/aarch64/inst.isle line 2195"
-    )
-}
-
-// Generated as internal constructor for term vec_csel.
-pub fn constructor_vec_csel<C: Context>(
-    ctx: &mut C,
-    arg0: &Cond,
-    arg1: Reg,
-    arg2: Reg,
-) -> ConsumesFlags {
-    let v4 = C::temp_writable_reg(ctx, I8X16);
-    let v5 = MInst::VecCSel {
-        rd: v4,
-        rn: arg1,
-        rm: arg2,
-        cond: arg0.clone(),
-    };
-    let v6 = C::writable_reg_to_reg(ctx, v4);
-    let v7 = ConsumesFlags::ConsumesFlagsReturnsReg {
-        inst: v5,
-        result: v6,
-    };
-    // Rule at src/isa/aarch64/inst.isle line 2210.
-    return v7;
-}
-
-// Generated as internal constructor for term fpu_round.
-pub fn constructor_fpu_round<C: Context>(ctx: &mut C, arg0: &FpuRoundMode, arg1: Reg) -> Reg {
-    let v3 = C::temp_writable_reg(ctx, F64);
-    let v4 = MInst::FpuRound {
-        op: arg0.clone(),
-        rd: v3,
-        rn: arg1,
-    };
-    let v5 = C::emit(ctx, &v4);
-    let v6 = C::writable_reg_to_reg(ctx, v3);
-    // Rule at src/isa/aarch64/inst.isle line 2218.
-    return v6;
-}
-
-// Generated as internal constructor for term fpu_move.
-pub fn constructor_fpu_move<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
-    let v7 = C::fits_in_64(ctx, arg0);
-    if let Some(v8) = v7 {
-        let v10 = C::temp_writable_reg(ctx, F64);
-        let v11 = MInst::FpuMove64 { rd: v10, rn: arg1 };
-        let v12 = C::emit(ctx, &v11);
-        let v13 = C::writable_reg_to_reg(ctx, v10);
-        // Rule at src/isa/aarch64/inst.isle line 2229.
-        return v13;
-    }
-    let v3 = C::temp_writable_reg(ctx, I8X16);
-    let v4 = MInst::FpuMove128 { rd: v3, rn: arg1 };
-    let v5 = C::emit(ctx, &v4);
-    let v6 = C::writable_reg_to_reg(ctx, v3);
-    // Rule at src/isa/aarch64/inst.isle line 2225.
-    return v6;
-}
-
-// Generated as internal constructor for term mov_to_fpu.
-pub fn constructor_mov_to_fpu<C: Context>(ctx: &mut C, arg0: Reg, arg1: &ScalarSize) -> Reg {
-    let v3 = C::temp_writable_reg(ctx, I8X16);
-    let v4 = MInst::MovToFpu {
-        rd: v3,
-        rn: arg0,
-        size: arg1.clone(),
-    };
-    let v5 = C::emit(ctx, &v4);
-    let v6 = C::writable_reg_to_reg(ctx, v3);
-    // Rule at src/isa/aarch64/inst.isle line 2236.
-    return v6;
-}
-
-// Generated as internal constructor for term fpu_move_fp_imm.
-pub fn constructor_fpu_move_fp_imm<C: Context>(
-    ctx: &mut C,
-    arg0: ASIMDFPModImm,
-    arg1: &ScalarSize,
-) -> Reg {
-    let v3 = C::temp_writable_reg(ctx, I8X16);
-    let v4 = MInst::FpuMoveFPImm {
-        rd: v3,
-        imm: arg0,
-        size: arg1.clone(),
-    };
-    let v5 = C::emit(ctx, &v4);
-    let v6 = C::writable_reg_to_reg(ctx, v3);
-    // Rule at src/isa/aarch64/inst.isle line 2243.
-    return v6;
-}
-
-// Generated as internal constructor for term mov_to_vec.
-pub fn constructor_mov_to_vec<C: Context>(
-    ctx: &mut C,
-    arg0: Reg,
-    arg1: Reg,
-    arg2: u8,
-    arg3: &VectorSize,
-) -> Reg {
-    let v5 = C::temp_writable_reg(ctx, I8X16);
-    let v6 = MInst::MovToVec {
-        rd: v5,
-        ri: arg0,
-        rn: arg1,
-        idx: arg2,
-        size: arg3.clone(),
-    };
-    let v7 = C::emit(ctx, &v6);
-    let v8 = C::writable_reg_to_reg(ctx, v5);
-    // Rule at src/isa/aarch64/inst.isle line 2250.
-    return v8;
-}
-
-// Generated as internal constructor for term mov_vec_elem.
-pub fn constructor_mov_vec_elem<C: Context>(
-    ctx: &mut C,
-    arg0: Reg,
-    arg1: Reg,
-    arg2: u8,
-    arg3: u8,
-    arg4: &VectorSize,
-) -> Reg {
-    let v6 = C::temp_writable_reg(ctx, I8X16);
-    let v7 = MInst::VecMovElement {
-        rd: v6,
-        ri: arg0,
-        rn: arg1,
-        dest_idx: arg2,
-        src_idx: arg3,
-        size: arg4.clone(),
-    };
-    let v8 = C::emit(ctx, &v7);
-    let v9 = C::writable_reg_to_reg(ctx, v6);
-    // Rule at src/isa/aarch64/inst.isle line 2257.
-    return v9;
-}
-
-// Generated as internal constructor for term mov_from_vec.
-pub fn constructor_mov_from_vec<C: Context>(
-    ctx: &mut C,
-    arg0: Reg,
-    arg1: u8,
-    arg2: &ScalarSize,
-) -> Reg {
-    let v4 = C::temp_writable_reg(ctx, I64);
-    let v5 = MInst::MovFromVec {
-        rd: v4,
-        rn: arg0,
-        idx: arg1,
-        size: arg2.clone(),
-    };
-    let v6 = C::emit(ctx, &v5);
-    let v7 = C::writable_reg_to_reg(ctx, v4);
-    // Rule at src/isa/aarch64/inst.isle line 2264.
-    return v7;
-}
-
-// Generated as internal constructor for term mov_from_vec_signed.
-pub fn constructor_mov_from_vec_signed<C: Context>(
-    ctx: &mut C,
-    arg0: Reg,
-    arg1: u8,
-    arg2: &VectorSize,
-    arg3: &OperandSize,
-) -> Reg {
-    let v5 = C::temp_writable_reg(ctx, I64);
-    let v6 = MInst::MovFromVecSigned {
-        rd: v5,
-        rn: arg0,
-        idx: arg1,
-        size: arg2.clone(),
-        scalar_size: arg3.clone(),
-    };
-    let v7 = C::emit(ctx, &v6);
-    let v8 = C::writable_reg_to_reg(ctx, v5);
-    // Rule at src/isa/aarch64/inst.isle line 2271.
-    return v8;
-}
-
-// Generated as internal constructor for term fpu_move_from_vec.
-pub fn constructor_fpu_move_from_vec<C: Context>(
-    ctx: &mut C,
-    arg0: Reg,
-    arg1: u8,
-    arg2: &VectorSize,
-) -> Reg {
-    let v4 = C::temp_writable_reg(ctx, I8X16);
-    let v5 = MInst::FpuMoveFromVec {
-        rd: v4,
-        rn: arg0,
-        idx: arg1,
-        size: arg2.clone(),
-    };
-    let v6 = C::emit(ctx, &v5);
-    let v7 = C::writable_reg_to_reg(ctx, v4);
-    // Rule at src/isa/aarch64/inst.isle line 2277.
-    return v7;
-}
-
-// Generated as internal constructor for term extend.
-pub fn constructor_extend<C: Context>(
-    ctx: &mut C,
-    arg0: Reg,
-    arg1: bool,
-    arg2: u8,
-    arg3: u8,
-) -> Reg {
-    let v5 = C::temp_writable_reg(ctx, I64);
-    let v6 = MInst::Extend {
-        rd: v5,
-        rn: arg0,
-        signed: arg1,
-        from_bits: arg2,
-        to_bits: arg3,
-    };
-    let v7 = C::emit(ctx, &v6);
-    let v8 = C::writable_reg_to_reg(ctx, v5);
-    // Rule at src/isa/aarch64/inst.isle line 2284.
-    return v8;
-}
-
-// Generated as internal constructor for term fpu_extend.
-pub fn constructor_fpu_extend<C: Context>(ctx: &mut C, arg0: Reg, arg1: &ScalarSize) -> Reg {
-    let v3 = C::temp_writable_reg(ctx, F32X4);
-    let v4 = MInst::FpuExtend {
-        rd: v3,
-        rn: arg0,
-        size: arg1.clone(),
-    };
-    let v5 = C::emit(ctx, &v4);
-    let v6 = C::writable_reg_to_reg(ctx, v3);
-    // Rule at src/isa/aarch64/inst.isle line 2291.
-    return v6;
-}
-
-// Generated as internal constructor for term vec_extend.
-pub fn constructor_vec_extend<C: Context>(
-    ctx: &mut C,
-    arg0: &VecExtendOp,
-    arg1: Reg,
-    arg2: bool,
-    arg3: &ScalarSize,
-) -> Reg {
-    let v5 = C::temp_writable_reg(ctx, I8X16);
-    let v6 = MInst::VecExtend {
-        t: arg0.clone(),
-        rd: v5,
-        rn: arg1,
-        high_half: arg2,
-        lane_size: arg3.clone(),
-    };
-    let v7 = C::emit(ctx, &v6);
-    let v8 = C::writable_reg_to_reg(ctx, v5);
-    // Rule at src/isa/aarch64/inst.isle line 2298.
-    return v8;
-}
-
-// Generated as internal constructor for term vec_extract.
-pub fn constructor_vec_extract<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg, arg2: u8) -> Reg {
-    let v4 = C::temp_writable_reg(ctx, I8X16);
-    let v5 = MInst::VecExtract {
-        rd: v4,
-        rn: arg0,
-        rm: arg1,
-        imm4: arg2,
-    };
-    let v6 = C::emit(ctx, &v5);
-    let v7 = C::writable_reg_to_reg(ctx, v4);
-    // Rule at src/isa/aarch64/inst.isle line 2305.
-    return v7;
-}
-
-// Generated as internal constructor for term load_acquire.
-pub fn constructor_load_acquire<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: MemFlags,
-    arg2: Reg,
-) -> Reg {
-    let v4 = C::temp_writable_reg(ctx, I64);
-    let v5 = MInst::LoadAcquire {
-        access_ty: arg0,
-        rt: v4,
-        rn: arg2,
-        flags: arg1,
-    };
-    let v6 = C::emit(ctx, &v5);
-    let v7 = C::writable_reg_to_reg(ctx, v4);
-    // Rule at src/isa/aarch64/inst.isle line 2312.
-    return v7;
-}
-
-// Generated as internal constructor for term store_release.
-pub fn constructor_store_release<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: MemFlags,
-    arg2: Reg,
-    arg3: Reg,
-) -> SideEffectNoResult {
-    let v4 = MInst::StoreRelease {
-        access_ty: arg0,
-        rt: arg2,
-        rn: arg3,
-        flags: arg1,
-    };
-    let v5 = SideEffectNoResult::Inst { inst: v4 };
-    // Rule at src/isa/aarch64/inst.isle line 2319.
-    return v5;
-}
-
-// Generated as internal constructor for term tst_imm.
-pub fn constructor_tst_imm<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: ImmLogic,
-) -> ProducesFlags {
-    let v4 = &constructor_operand_size(ctx, arg0);
-    let v5 = C::writable_zero_reg(ctx);
-    let v6 = MInst::AluRRImmLogic {
-        alu_op: ALUOp::AndS,
-        size: v4.clone(),
-        rd: v5,
-        rn: arg1,
-        imml: arg2,
-    };
-    let v7 = ProducesFlags::ProducesFlagsSideEffect { inst: v6 };
-    // Rule at src/isa/aarch64/inst.isle line 2327.
-    return v7;
-}
-
-// Generated as internal constructor for term csel.
-pub fn constructor_csel<C: Context>(
-    ctx: &mut C,
-    arg0: &Cond,
-    arg1: Reg,
-    arg2: Reg,
-) -> ConsumesFlags {
-    let v4 = C::temp_writable_reg(ctx, I64);
-    let v5 = MInst::CSel {
-        rd: v4,
-        cond: arg0.clone(),
-        rn: arg1,
-        rm: arg2,
-    };
-    let v6 = C::writable_reg_to_reg(ctx, v4);
-    let v7 = ConsumesFlags::ConsumesFlagsReturnsReg {
-        inst: v5,
-        result: v6,
-    };
-    // Rule at src/isa/aarch64/inst.isle line 2341.
-    return v7;
-}
-
-// Generated as internal constructor for term cset.
-pub fn constructor_cset<C: Context>(ctx: &mut C, arg0: &Cond) -> ConsumesFlags {
-    let v2 = C::temp_writable_reg(ctx, I64);
-    let v3 = MInst::CSet {
-        rd: v2,
-        cond: arg0.clone(),
-    };
-    let v4 = C::writable_reg_to_reg(ctx, v2);
-    let v5 = ConsumesFlags::ConsumesFlagsReturnsReg {
-        inst: v3,
-        result: v4,
-    };
-    // Rule at src/isa/aarch64/inst.isle line 2349.
-    return v5;
-}
-
-// Generated as internal constructor for term cset_paired.
-pub fn constructor_cset_paired<C: Context>(ctx: &mut C, arg0: &Cond) -> ConsumesFlags {
-    let v2 = C::temp_writable_reg(ctx, I64);
-    let v3 = MInst::CSet {
-        rd: v2,
-        cond: arg0.clone(),
-    };
-    let v4 = C::writable_reg_to_reg(ctx, v2);
-    let v5 = ConsumesFlags::ConsumesFlagsReturnsResultWithProducer {
-        inst: v3,
-        result: v4,
-    };
-    // Rule at src/isa/aarch64/inst.isle line 2356.
-    return v5;
-}
-
-// Generated as internal constructor for term csetm.
-pub fn constructor_csetm<C: Context>(ctx: &mut C, arg0: &Cond) -> ConsumesFlags {
-    let v2 = C::temp_writable_reg(ctx, I64);
-    let v3 = MInst::CSetm {
-        rd: v2,
-        cond: arg0.clone(),
-    };
-    let v4 = C::writable_reg_to_reg(ctx, v2);
-    let v5 = ConsumesFlags::ConsumesFlagsReturnsReg {
-        inst: v3,
-        result: v4,
-    };
-    // Rule at src/isa/aarch64/inst.isle line 2362.
-    return v5;
-}
-
-// Generated as internal constructor for term csneg.
-pub fn constructor_csneg<C: Context>(
-    ctx: &mut C,
-    arg0: &Cond,
-    arg1: Reg,
-    arg2: Reg,
-) -> ConsumesFlags {
-    let v4 = C::temp_writable_reg(ctx, I64);
-    let v5 = MInst::CSNeg {
-        rd: v4,
-        cond: arg0.clone(),
-        rn: arg1,
-        rm: arg2,
-    };
-    let v6 = C::writable_reg_to_reg(ctx, v4);
-    let v7 = ConsumesFlags::ConsumesFlagsReturnsReg {
-        inst: v5,
-        result: v6,
-    };
-    // Rule at src/isa/aarch64/inst.isle line 2372.
-    return v7;
-}
-
-// Generated as internal constructor for term ccmp.
-pub fn constructor_ccmp<C: Context>(
-    ctx: &mut C,
-    arg0: &OperandSize,
-    arg1: Reg,
-    arg2: Reg,
-    arg3: NZCV,
-    arg4: &Cond,
-    arg5: &ProducesFlags,
-) -> ProducesFlags {
-    let v6 = MInst::CCmp {
-        size: arg0.clone(),
-        rn: arg1,
-        rm: arg2,
-        nzcv: arg3,
-        cond: arg4.clone(),
-    };
-    let v7 = ProducesFlags::ProducesFlagsSideEffect { inst: v6 };
-    let v8 = &constructor_produces_flags_concat(ctx, arg5, &v7);
-    // Rule at src/isa/aarch64/inst.isle line 2382.
-    return v8.clone();
-}
-
-// Generated as internal constructor for term ccmp_imm.
-pub fn constructor_ccmp_imm<C: Context>(
-    ctx: &mut C,
-    arg0: &OperandSize,
-    arg1: Reg,
-    arg2: UImm5,
-    arg3: NZCV,
-    arg4: &Cond,
-) -> ConsumesFlags {
-    let v6 = C::temp_writable_reg(ctx, I64);
-    let v9 = C::writable_reg_to_reg(ctx, v6);
-    let v10 = C::value_reg(ctx, v9);
-    let v7 = MInst::CCmpImm {
-        size: arg0.clone(),
-        rn: arg1,
-        imm: arg2,
-        nzcv: arg3,
-        cond: arg4.clone(),
-    };
-    let v8 = MInst::CSet {
-        rd: v6,
-        cond: arg4.clone(),
-    };
-    let v11 = ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
-        inst1: v7,
-        inst2: v8,
-        result: v10,
-    };
-    // Rule at src/isa/aarch64/inst.isle line 2387.
-    return v11;
-}
-
-// Generated as internal constructor for term add.
-pub fn constructor_add<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v4 = constructor_alu_rrr(ctx, &ALUOp::Add, arg0, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 2397.
-    return v4;
-}
-
-// Generated as internal constructor for term add_imm.
-pub fn constructor_add_imm<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Imm12) -> Reg {
-    let v4 = constructor_alu_rr_imm12(ctx, &ALUOp::Add, arg0, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 2400.
-    return v4;
-}
-
-// Generated as internal constructor for term add_extend.
-pub fn constructor_add_extend<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: &ExtendedValue,
-) -> Reg {
-    let v4 = constructor_alu_rr_extend_reg(ctx, &ALUOp::Add, arg0, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 2403.
-    return v4;
-}
-
-// Generated as internal constructor for term add_extend_op.
-pub fn constructor_add_extend_op<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: Reg,
-    arg3: &ExtendOp,
-) -> Reg {
-    let v5 = constructor_alu_rrr_extend(ctx, &ALUOp::Add, arg0, arg1, arg2, arg3);
-    // Rule at src/isa/aarch64/inst.isle line 2406.
-    return v5;
-}
-
-// Generated as internal constructor for term add_shift.
-pub fn constructor_add_shift<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: Reg,
-    arg3: ShiftOpAndAmt,
-) -> Reg {
-    let v5 = constructor_alu_rrr_shift(ctx, &ALUOp::Add, arg0, arg1, arg2, arg3);
-    // Rule at src/isa/aarch64/inst.isle line 2409.
-    return v5;
-}
-
-// Generated as internal constructor for term add_vec.
-pub fn constructor_add_vec<C: Context>(
-    ctx: &mut C,
-    arg0: Reg,
-    arg1: Reg,
-    arg2: &VectorSize,
-) -> Reg {
-    let v4 = constructor_vec_rrr(ctx, &VecALUOp::Add, arg0, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 2412.
-    return v4;
-}
-
-// Generated as internal constructor for term sub.
-pub fn constructor_sub<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v4 = constructor_alu_rrr(ctx, &ALUOp::Sub, arg0, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 2417.
-    return v4;
-}
-
-// Generated as internal constructor for term sub_imm.
-pub fn constructor_sub_imm<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Imm12) -> Reg {
-    let v4 = constructor_alu_rr_imm12(ctx, &ALUOp::Sub, arg0, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 2420.
-    return v4;
-}
-
-// Generated as internal constructor for term sub_extend.
-pub fn constructor_sub_extend<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: &ExtendedValue,
-) -> Reg {
-    let v4 = constructor_alu_rr_extend_reg(ctx, &ALUOp::Sub, arg0, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 2423.
-    return v4;
-}
-
-// Generated as internal constructor for term sub_shift.
-pub fn constructor_sub_shift<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: Reg,
-    arg3: ShiftOpAndAmt,
-) -> Reg {
-    let v5 = constructor_alu_rrr_shift(ctx, &ALUOp::Sub, arg0, arg1, arg2, arg3);
-    // Rule at src/isa/aarch64/inst.isle line 2426.
-    return v5;
-}
-
-// Generated as internal constructor for term sub_vec.
-pub fn constructor_sub_vec<C: Context>(
-    ctx: &mut C,
-    arg0: Reg,
-    arg1: Reg,
-    arg2: &VectorSize,
-) -> Reg {
-    let v4 = constructor_vec_rrr(ctx, &VecALUOp::Sub, arg0, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 2429.
-    return v4;
-}
-
-// Generated as internal constructor for term sub_i128.
-pub fn constructor_sub_i128<C: Context>(
-    ctx: &mut C,
-    arg0: ValueRegs,
-    arg1: ValueRegs,
-) -> ValueRegs {
-    let v3 = C::value_regs_get(ctx, arg0, 0x0);
-    let v5 = C::value_regs_get(ctx, arg0, 0x1);
-    let v6 = C::value_regs_get(ctx, arg1, 0x0);
-    let v7 = C::value_regs_get(ctx, arg1, 0x1);
-    let v9 = &constructor_sub_with_flags_paired(ctx, I64, v3, v6);
-    let v10 = &constructor_sbc_paired(ctx, I64, v5, v7);
-    let v11 = constructor_with_flags(ctx, v9, v10);
-    // Rule at src/isa/aarch64/inst.isle line 2432.
-    return v11;
-}
-
-// Generated as internal constructor for term madd.
-pub fn constructor_madd<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: Reg,
-    arg3: Reg,
-) -> Reg {
-    let v5 = constructor_alu_rrrr(ctx, &ALUOp3::MAdd, arg0, arg1, arg2, arg3);
-    // Rule at src/isa/aarch64/inst.isle line 2452.
-    return v5;
-}
-
-// Generated as internal constructor for term msub.
-pub fn constructor_msub<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: Reg,
-    arg3: Reg,
-) -> Reg {
-    let v5 = constructor_alu_rrrr(ctx, &ALUOp3::MSub, arg0, arg1, arg2, arg3);
-    // Rule at src/isa/aarch64/inst.isle line 2457.
-    return v5;
-}
-
-// Generated as internal constructor for term umaddl.
-pub fn constructor_umaddl<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg, arg2: Reg) -> Reg {
-    let v5 = constructor_alu_rrrr(ctx, &ALUOp3::UMAddL, I32, arg0, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 2461.
-    return v5;
-}
-
-// Generated as internal constructor for term smaddl.
-pub fn constructor_smaddl<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg, arg2: Reg) -> Reg {
-    let v5 = constructor_alu_rrrr(ctx, &ALUOp3::SMAddL, I32, arg0, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 2465.
-    return v5;
-}
-
-// Generated as internal constructor for term uqadd.
-pub fn constructor_uqadd<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg, arg2: &VectorSize) -> Reg {
-    let v4 = constructor_vec_rrr(ctx, &VecALUOp::Uqadd, arg0, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 2469.
-    return v4;
-}
-
-// Generated as internal constructor for term sqadd.
-pub fn constructor_sqadd<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg, arg2: &VectorSize) -> Reg {
-    let v4 = constructor_vec_rrr(ctx, &VecALUOp::Sqadd, arg0, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 2473.
-    return v4;
-}
-
-// Generated as internal constructor for term uqsub.
-pub fn constructor_uqsub<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg, arg2: &VectorSize) -> Reg {
-    let v4 = constructor_vec_rrr(ctx, &VecALUOp::Uqsub, arg0, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 2477.
-    return v4;
-}
-
-// Generated as internal constructor for term sqsub.
-pub fn constructor_sqsub<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg, arg2: &VectorSize) -> Reg {
-    let v4 = constructor_vec_rrr(ctx, &VecALUOp::Sqsub, arg0, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 2481.
-    return v4;
-}
-
-// Generated as internal constructor for term umulh.
-pub fn constructor_umulh<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v4 = constructor_alu_rrr(ctx, &ALUOp::UMulH, arg0, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 2485.
-    return v4;
-}
-
-// Generated as internal constructor for term smulh.
-pub fn constructor_smulh<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v4 = constructor_alu_rrr(ctx, &ALUOp::SMulH, arg0, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 2489.
-    return v4;
-}
-
-// Generated as internal constructor for term mul.
-pub fn constructor_mul<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg, arg2: &VectorSize) -> Reg {
-    let v4 = constructor_vec_rrr(ctx, &VecALUOp::Mul, arg0, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 2493.
-    return v4;
-}
-
-// Generated as internal constructor for term neg.
-pub fn constructor_neg<C: Context>(ctx: &mut C, arg0: Reg, arg1: &VectorSize) -> Reg {
-    let v3 = constructor_vec_misc(ctx, &VecMisc2::Neg, arg0, arg1);
-    // Rule at src/isa/aarch64/inst.isle line 2497.
-    return v3;
-}
-
-// Generated as internal constructor for term rev16.
-pub fn constructor_rev16<C: Context>(ctx: &mut C, arg0: Reg, arg1: &VectorSize) -> Reg {
-    let v3 = constructor_vec_misc(ctx, &VecMisc2::Rev16, arg0, arg1);
-    // Rule at src/isa/aarch64/inst.isle line 2501.
-    return v3;
-}
-
-// Generated as internal constructor for term rev32.
-pub fn constructor_rev32<C: Context>(ctx: &mut C, arg0: Reg, arg1: &VectorSize) -> Reg {
-    let v3 = constructor_vec_misc(ctx, &VecMisc2::Rev32, arg0, arg1);
-    // Rule at src/isa/aarch64/inst.isle line 2505.
-    return v3;
-}
-
-// Generated as internal constructor for term rev64.
-pub fn constructor_rev64<C: Context>(ctx: &mut C, arg0: Reg, arg1: &VectorSize) -> Reg {
-    let v3 = constructor_vec_misc(ctx, &VecMisc2::Rev64, arg0, arg1);
-    // Rule at src/isa/aarch64/inst.isle line 2509.
-    return v3;
-}
-
-// Generated as internal constructor for term xtn.
-pub fn constructor_xtn<C: Context>(ctx: &mut C, arg0: Reg, arg1: &ScalarSize) -> Reg {
-    let v3 = constructor_vec_rr_narrow_low(ctx, &VecRRNarrowOp::Xtn, arg0, arg1);
-    // Rule at src/isa/aarch64/inst.isle line 2513.
-    return v3;
-}
-
-// Generated as internal constructor for term fcvtn.
-pub fn constructor_fcvtn<C: Context>(ctx: &mut C, arg0: Reg, arg1: &ScalarSize) -> Reg {
-    let v3 = constructor_vec_rr_narrow_low(ctx, &VecRRNarrowOp::Fcvtn, arg0, arg1);
-    // Rule at src/isa/aarch64/inst.isle line 2517.
-    return v3;
-}
-
-// Generated as internal constructor for term sqxtn.
-pub fn constructor_sqxtn<C: Context>(ctx: &mut C, arg0: Reg, arg1: &ScalarSize) -> Reg {
-    let v3 = constructor_vec_rr_narrow_low(ctx, &VecRRNarrowOp::Sqxtn, arg0, arg1);
-    // Rule at src/isa/aarch64/inst.isle line 2521.
-    return v3;
-}
-
-// Generated as internal constructor for term sqxtn2.
-pub fn constructor_sqxtn2<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg, arg2: &ScalarSize) -> Reg {
-    let v4 = constructor_vec_rr_narrow_high(ctx, &VecRRNarrowOp::Sqxtn, arg0, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 2525.
-    return v4;
-}
-
-// Generated as internal constructor for term sqxtun.
-pub fn constructor_sqxtun<C: Context>(ctx: &mut C, arg0: Reg, arg1: &ScalarSize) -> Reg {
-    let v3 = constructor_vec_rr_narrow_low(ctx, &VecRRNarrowOp::Sqxtun, arg0, arg1);
-    // Rule at src/isa/aarch64/inst.isle line 2529.
-    return v3;
-}
-
-// Generated as internal constructor for term sqxtun2.
-pub fn constructor_sqxtun2<C: Context>(
-    ctx: &mut C,
-    arg0: Reg,
-    arg1: Reg,
-    arg2: &ScalarSize,
-) -> Reg {
-    let v4 = constructor_vec_rr_narrow_high(ctx, &VecRRNarrowOp::Sqxtun, arg0, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 2533.
-    return v4;
-}
-
-// Generated as internal constructor for term uqxtn.
-pub fn constructor_uqxtn<C: Context>(ctx: &mut C, arg0: Reg, arg1: &ScalarSize) -> Reg {
-    let v3 = constructor_vec_rr_narrow_low(ctx, &VecRRNarrowOp::Uqxtn, arg0, arg1);
-    // Rule at src/isa/aarch64/inst.isle line 2537.
-    return v3;
-}
-
-// Generated as internal constructor for term uqxtn2.
-pub fn constructor_uqxtn2<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg, arg2: &ScalarSize) -> Reg {
-    let v4 = constructor_vec_rr_narrow_high(ctx, &VecRRNarrowOp::Uqxtn, arg0, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 2541.
-    return v4;
-}
-
-// Generated as internal constructor for term aarch64_fence.
-pub fn constructor_aarch64_fence<C: Context>(ctx: &mut C) -> SideEffectNoResult {
-    let v1 = SideEffectNoResult::Inst { inst: MInst::Fence };
-    // Rule at src/isa/aarch64/inst.isle line 2545.
-    return v1;
-}
-
-// Generated as internal constructor for term csdb.
-pub fn constructor_csdb<C: Context>(ctx: &mut C) -> SideEffectNoResult {
-    let v1 = SideEffectNoResult::Inst { inst: MInst::Csdb };
-    // Rule at src/isa/aarch64/inst.isle line 2550.
-    return v1;
-}
-
-// Generated as internal constructor for term brk.
-pub fn constructor_brk<C: Context>(ctx: &mut C) -> SideEffectNoResult {
-    let v1 = SideEffectNoResult::Inst { inst: MInst::Brk };
-    // Rule at src/isa/aarch64/inst.isle line 2555.
-    return v1;
-}
-
-// Generated as internal constructor for term addp.
-pub fn constructor_addp<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg, arg2: &VectorSize) -> Reg {
-    let v4 = constructor_vec_rrr(ctx, &VecALUOp::Addp, arg0, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 2560.
-    return v4;
-}
-
-// Generated as internal constructor for term zip1.
-pub fn constructor_zip1<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg, arg2: &VectorSize) -> Reg {
-    let v4 = constructor_vec_rrr(ctx, &VecALUOp::Zip1, arg0, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 2564.
-    return v4;
-}
-
-// Generated as internal constructor for term vec_abs.
-pub fn constructor_vec_abs<C: Context>(ctx: &mut C, arg0: Reg, arg1: &VectorSize) -> Reg {
-    let v3 = constructor_vec_misc(ctx, &VecMisc2::Abs, arg0, arg1);
-    // Rule at src/isa/aarch64/inst.isle line 2568.
-    return v3;
-}
-
-// Generated as internal constructor for term abs.
-pub fn constructor_abs<C: Context>(ctx: &mut C, arg0: &OperandSize, arg1: Reg) -> Reg {
-    let v3 = C::u8_into_imm12(ctx, 0x0);
-    let v4 = &constructor_cmp_imm(ctx, arg0, arg1, v3);
-    let v6 = &constructor_csneg(ctx, &Cond::Gt, arg1, arg1);
-    let v7 = constructor_with_flags(ctx, v4, v6);
-    let v9 = C::value_regs_get(ctx, v7, 0x0);
-    // Rule at src/isa/aarch64/inst.isle line 2573.
-    return v9;
-}
-
-// Generated as internal constructor for term addv.
-pub fn constructor_addv<C: Context>(ctx: &mut C, arg0: Reg, arg1: &VectorSize) -> Reg {
-    let v3 = constructor_vec_lanes(ctx, &VecLanesOp::Addv, arg0, arg1);
-    // Rule at src/isa/aarch64/inst.isle line 2579.
-    return v3;
-}
-
-// Generated as internal constructor for term shll32.
-pub fn constructor_shll32<C: Context>(ctx: &mut C, arg0: Reg, arg1: bool) -> Reg {
-    let v3 = constructor_vec_rr_long(ctx, &VecRRLongOp::Shll32, arg0, arg1);
-    // Rule at src/isa/aarch64/inst.isle line 2583.
-    return v3;
-}
-
-// Generated as internal constructor for term saddlp8.
-pub fn constructor_saddlp8<C: Context>(ctx: &mut C, arg0: Reg) -> Reg {
-    let v2 = constructor_vec_rr_pair_long(ctx, &VecRRPairLongOp::Saddlp8, arg0);
-    // Rule at src/isa/aarch64/inst.isle line 2588.
-    return v2;
-}
-
-// Generated as internal constructor for term saddlp16.
-pub fn constructor_saddlp16<C: Context>(ctx: &mut C, arg0: Reg) -> Reg {
-    let v2 = constructor_vec_rr_pair_long(ctx, &VecRRPairLongOp::Saddlp16, arg0);
-    // Rule at src/isa/aarch64/inst.isle line 2591.
-    return v2;
-}
-
-// Generated as internal constructor for term uaddlp8.
-pub fn constructor_uaddlp8<C: Context>(ctx: &mut C, arg0: Reg) -> Reg {
-    let v2 = constructor_vec_rr_pair_long(ctx, &VecRRPairLongOp::Uaddlp8, arg0);
-    // Rule at src/isa/aarch64/inst.isle line 2594.
-    return v2;
-}
-
-// Generated as internal constructor for term uaddlp16.
-pub fn constructor_uaddlp16<C: Context>(ctx: &mut C, arg0: Reg) -> Reg {
-    let v2 = constructor_vec_rr_pair_long(ctx, &VecRRPairLongOp::Uaddlp16, arg0);
-    // Rule at src/isa/aarch64/inst.isle line 2597.
-    return v2;
-}
-
-// Generated as internal constructor for term umlal32.
-pub fn constructor_umlal32<C: Context>(
-    ctx: &mut C,
-    arg0: Reg,
-    arg1: Reg,
-    arg2: Reg,
-    arg3: bool,
-) -> Reg {
-    let v5 = constructor_vec_rrrr_long(ctx, &VecRRRLongModOp::Umlal32, arg0, arg1, arg2, arg3);
-    // Rule at src/isa/aarch64/inst.isle line 2601.
-    return v5;
-}
-
-// Generated as internal constructor for term smull8.
-pub fn constructor_smull8<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg, arg2: bool) -> Reg {
-    let v4 = constructor_vec_rrr_long(ctx, &VecRRRLongOp::Smull8, arg0, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 2605.
-    return v4;
-}
-
-// Generated as internal constructor for term umull8.
-pub fn constructor_umull8<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg, arg2: bool) -> Reg {
-    let v4 = constructor_vec_rrr_long(ctx, &VecRRRLongOp::Umull8, arg0, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 2609.
-    return v4;
-}
-
-// Generated as internal constructor for term smull16.
-pub fn constructor_smull16<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg, arg2: bool) -> Reg {
-    let v4 = constructor_vec_rrr_long(ctx, &VecRRRLongOp::Smull16, arg0, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 2613.
-    return v4;
-}
-
-// Generated as internal constructor for term umull16.
-pub fn constructor_umull16<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg, arg2: bool) -> Reg {
-    let v4 = constructor_vec_rrr_long(ctx, &VecRRRLongOp::Umull16, arg0, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 2617.
-    return v4;
-}
-
-// Generated as internal constructor for term smull32.
-pub fn constructor_smull32<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg, arg2: bool) -> Reg {
-    let v4 = constructor_vec_rrr_long(ctx, &VecRRRLongOp::Smull32, arg0, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 2621.
-    return v4;
-}
-
-// Generated as internal constructor for term umull32.
-pub fn constructor_umull32<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg, arg2: bool) -> Reg {
-    let v4 = constructor_vec_rrr_long(ctx, &VecRRRLongOp::Umull32, arg0, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 2625.
-    return v4;
-}
-
-// Generated as internal constructor for term asr.
-pub fn constructor_asr<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v4 = constructor_alu_rrr(ctx, &ALUOp::Asr, arg0, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 2629.
-    return v4;
-}
-
-// Generated as internal constructor for term asr_imm.
-pub fn constructor_asr_imm<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: ImmShift) -> Reg {
-    let v4 = constructor_alu_rr_imm_shift(ctx, &ALUOp::Asr, arg0, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 2632.
-    return v4;
-}
-
-// Generated as internal constructor for term lsr.
-pub fn constructor_lsr<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v4 = constructor_alu_rrr(ctx, &ALUOp::Lsr, arg0, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 2636.
-    return v4;
-}
-
-// Generated as internal constructor for term lsr_imm.
-pub fn constructor_lsr_imm<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: ImmShift) -> Reg {
-    let v4 = constructor_alu_rr_imm_shift(ctx, &ALUOp::Lsr, arg0, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 2639.
-    return v4;
-}
-
-// Generated as internal constructor for term lsl.
-pub fn constructor_lsl<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v4 = constructor_alu_rrr(ctx, &ALUOp::Lsl, arg0, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 2643.
-    return v4;
-}
-
-// Generated as internal constructor for term lsl_imm.
-pub fn constructor_lsl_imm<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: ImmShift) -> Reg {
-    let v4 = constructor_alu_rr_imm_shift(ctx, &ALUOp::Lsl, arg0, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 2646.
-    return v4;
-}
-
-// Generated as internal constructor for term a64_udiv.
-pub fn constructor_a64_udiv<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v4 = constructor_alu_rrr(ctx, &ALUOp::UDiv, arg0, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 2650.
-    return v4;
-}
-
-// Generated as internal constructor for term a64_sdiv.
-pub fn constructor_a64_sdiv<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v4 = constructor_alu_rrr(ctx, &ALUOp::SDiv, arg0, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 2654.
-    return v4;
-}
-
-// Generated as internal constructor for term not.
-pub fn constructor_not<C: Context>(ctx: &mut C, arg0: Reg, arg1: &VectorSize) -> Reg {
-    let v3 = constructor_vec_misc(ctx, &VecMisc2::Not, arg0, arg1);
-    // Rule at src/isa/aarch64/inst.isle line 2658.
-    return v3;
-}
-
-// Generated as internal constructor for term orr_not.
-pub fn constructor_orr_not<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v4 = constructor_alu_rrr(ctx, &ALUOp::OrrNot, arg0, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 2663.
-    return v4;
-}
-
-// Generated as internal constructor for term orr_not_shift.
-pub fn constructor_orr_not_shift<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: Reg,
-    arg3: ShiftOpAndAmt,
-) -> Reg {
-    let v5 = constructor_alu_rrr_shift(ctx, &ALUOp::OrrNot, arg0, arg1, arg2, arg3);
-    // Rule at src/isa/aarch64/inst.isle line 2666.
-    return v5;
-}
-
-// Generated as internal constructor for term orr.
-pub fn constructor_orr<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v4 = constructor_alu_rrr(ctx, &ALUOp::Orr, arg0, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 2671.
-    return v4;
-}
-
-// Generated as internal constructor for term orr_imm.
-pub fn constructor_orr_imm<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: ImmLogic) -> Reg {
-    let v4 = constructor_alu_rr_imm_logic(ctx, &ALUOp::Orr, arg0, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 2674.
-    return v4;
-}
-
-// Generated as internal constructor for term orr_shift.
-pub fn constructor_orr_shift<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: Reg,
-    arg3: ShiftOpAndAmt,
-) -> Reg {
-    let v5 = constructor_alu_rrr_shift(ctx, &ALUOp::Orr, arg0, arg1, arg2, arg3);
-    // Rule at src/isa/aarch64/inst.isle line 2677.
-    return v5;
-}
-
-// Generated as internal constructor for term orr_vec.
-pub fn constructor_orr_vec<C: Context>(
-    ctx: &mut C,
-    arg0: Reg,
-    arg1: Reg,
-    arg2: &VectorSize,
-) -> Reg {
-    let v4 = constructor_vec_rrr(ctx, &VecALUOp::Orr, arg0, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 2680.
-    return v4;
-}
-
-// Generated as internal constructor for term and_reg.
-pub fn constructor_and_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v4 = constructor_alu_rrr(ctx, &ALUOp::And, arg0, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 2685.
-    return v4;
-}
-
-// Generated as internal constructor for term and_imm.
-pub fn constructor_and_imm<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: ImmLogic) -> Reg {
-    let v4 = constructor_alu_rr_imm_logic(ctx, &ALUOp::And, arg0, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 2688.
-    return v4;
-}
-
-// Generated as internal constructor for term and_vec.
-pub fn constructor_and_vec<C: Context>(
-    ctx: &mut C,
-    arg0: Reg,
-    arg1: Reg,
-    arg2: &VectorSize,
-) -> Reg {
-    let v4 = constructor_vec_rrr(ctx, &VecALUOp::And, arg0, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 2691.
-    return v4;
-}
-
-// Generated as internal constructor for term eor_vec.
-pub fn constructor_eor_vec<C: Context>(
-    ctx: &mut C,
-    arg0: Reg,
-    arg1: Reg,
-    arg2: &VectorSize,
-) -> Reg {
-    let v4 = constructor_vec_rrr(ctx, &VecALUOp::Eor, arg0, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 2695.
-    return v4;
-}
-
-// Generated as internal constructor for term bic.
-pub fn constructor_bic<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v4 = constructor_alu_rrr(ctx, &ALUOp::AndNot, arg0, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 2700.
-    return v4;
-}
-
-// Generated as internal constructor for term bic_vec.
-pub fn constructor_bic_vec<C: Context>(
-    ctx: &mut C,
-    arg0: Reg,
-    arg1: Reg,
-    arg2: &VectorSize,
-) -> Reg {
-    let v4 = constructor_vec_rrr(ctx, &VecALUOp::Bic, arg0, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 2703.
-    return v4;
-}
-
-// Generated as internal constructor for term sshl.
-pub fn constructor_sshl<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg, arg2: &VectorSize) -> Reg {
-    let v4 = constructor_vec_rrr(ctx, &VecALUOp::Sshl, arg0, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 2707.
-    return v4;
-}
-
-// Generated as internal constructor for term ushl.
-pub fn constructor_ushl<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg, arg2: &VectorSize) -> Reg {
-    let v4 = constructor_vec_rrr(ctx, &VecALUOp::Ushl, arg0, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 2711.
-    return v4;
-}
-
-// Generated as internal constructor for term ushl_vec_imm.
-pub fn constructor_ushl_vec_imm<C: Context>(
-    ctx: &mut C,
-    arg0: Reg,
-    arg1: u8,
-    arg2: &VectorSize,
-) -> Reg {
-    let v4 = constructor_vec_shift_imm(ctx, &VecShiftImmOp::Shl, arg1, arg0, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 2715.
-    return v4;
-}
-
-// Generated as internal constructor for term ushr_vec_imm.
-pub fn constructor_ushr_vec_imm<C: Context>(
-    ctx: &mut C,
-    arg0: Reg,
-    arg1: u8,
-    arg2: &VectorSize,
-) -> Reg {
-    let v4 = constructor_vec_shift_imm(ctx, &VecShiftImmOp::Ushr, arg1, arg0, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 2719.
-    return v4;
-}
-
-// Generated as internal constructor for term sshr_vec_imm.
-pub fn constructor_sshr_vec_imm<C: Context>(
-    ctx: &mut C,
-    arg0: Reg,
-    arg1: u8,
-    arg2: &VectorSize,
-) -> Reg {
-    let v4 = constructor_vec_shift_imm(ctx, &VecShiftImmOp::Sshr, arg1, arg0, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 2723.
-    return v4;
-}
-
-// Generated as internal constructor for term a64_rotr.
-pub fn constructor_a64_rotr<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v4 = constructor_alu_rrr(ctx, &ALUOp::RotR, arg0, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 2728.
-    return v4;
-}
-
-// Generated as internal constructor for term a64_rotr_imm.
-pub fn constructor_a64_rotr_imm<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: ImmShift,
-) -> Reg {
-    let v4 = constructor_alu_rr_imm_shift(ctx, &ALUOp::RotR, arg0, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 2731.
-    return v4;
-}
-
-// Generated as internal constructor for term rbit.
-pub fn constructor_rbit<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
-    let v3 = constructor_bit_rr(ctx, &BitOp::RBit, arg0, arg1);
-    // Rule at src/isa/aarch64/inst.isle line 2736.
-    return v3;
-}
-
-// Generated as internal constructor for term a64_clz.
-pub fn constructor_a64_clz<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
-    let v3 = constructor_bit_rr(ctx, &BitOp::Clz, arg0, arg1);
-    // Rule at src/isa/aarch64/inst.isle line 2741.
-    return v3;
-}
-
-// Generated as internal constructor for term a64_cls.
-pub fn constructor_a64_cls<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
-    let v3 = constructor_bit_rr(ctx, &BitOp::Cls, arg0, arg1);
-    // Rule at src/isa/aarch64/inst.isle line 2746.
-    return v3;
-}
-
-// Generated as internal constructor for term a64_rev16.
-pub fn constructor_a64_rev16<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
-    let v3 = constructor_bit_rr(ctx, &BitOp::Rev16, arg0, arg1);
-    // Rule at src/isa/aarch64/inst.isle line 2751.
-    return v3;
-}
-
-// Generated as internal constructor for term a64_rev32.
-pub fn constructor_a64_rev32<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
-    let v3 = constructor_bit_rr(ctx, &BitOp::Rev32, arg0, arg1);
-    // Rule at src/isa/aarch64/inst.isle line 2754.
-    return v3;
-}
-
-// Generated as internal constructor for term a64_rev64.
-pub fn constructor_a64_rev64<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
-    let v3 = constructor_bit_rr(ctx, &BitOp::Rev64, arg0, arg1);
-    // Rule at src/isa/aarch64/inst.isle line 2757.
-    return v3;
-}
-
-// Generated as internal constructor for term eon.
-pub fn constructor_eon<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v4 = constructor_alu_rrr(ctx, &ALUOp::EorNot, arg0, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 2762.
-    return v4;
-}
-
-// Generated as internal constructor for term vec_cnt.
-pub fn constructor_vec_cnt<C: Context>(ctx: &mut C, arg0: Reg, arg1: &VectorSize) -> Reg {
-    let v3 = constructor_vec_misc(ctx, &VecMisc2::Cnt, arg0, arg1);
-    // Rule at src/isa/aarch64/inst.isle line 2767.
-    return v3;
-}
-
-// Generated as internal constructor for term bsl.
-pub fn constructor_bsl<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: Reg,
-    arg3: Reg,
-) -> Reg {
-    let v5 = &constructor_vector_size(ctx, arg0);
-    let v6 = constructor_vec_rrr_mod(ctx, &VecALUModOp::Bsl, arg1, arg2, arg3, v5);
-    // Rule at src/isa/aarch64/inst.isle line 2772.
-    return v6;
-}
-
-// Generated as internal constructor for term udf.
-pub fn constructor_udf<C: Context>(ctx: &mut C, arg0: &TrapCode) -> SideEffectNoResult {
-    let v1 = MInst::Udf {
-        trap_code: arg0.clone(),
-    };
-    let v2 = SideEffectNoResult::Inst { inst: v1 };
-    // Rule at src/isa/aarch64/inst.isle line 2778.
-    return v2;
-}
-
-// Generated as internal constructor for term aarch64_uload8.
-pub fn constructor_aarch64_uload8<C: Context>(ctx: &mut C, arg0: &AMode, arg1: MemFlags) -> Reg {
-    let v3 = C::temp_writable_reg(ctx, I64);
-    let v4 = MInst::ULoad8 {
-        rd: v3,
-        mem: arg0.clone(),
-        flags: arg1,
-    };
-    let v5 = C::emit(ctx, &v4);
-    let v6 = C::writable_reg_to_reg(ctx, v3);
-    // Rule at src/isa/aarch64/inst.isle line 2784.
-    return v6;
-}
-
-// Generated as internal constructor for term aarch64_sload8.
-pub fn constructor_aarch64_sload8<C: Context>(ctx: &mut C, arg0: &AMode, arg1: MemFlags) -> Reg {
-    let v3 = C::temp_writable_reg(ctx, I64);
-    let v4 = MInst::SLoad8 {
-        rd: v3,
-        mem: arg0.clone(),
-        flags: arg1,
-    };
-    let v5 = C::emit(ctx, &v4);
-    let v6 = C::writable_reg_to_reg(ctx, v3);
-    // Rule at src/isa/aarch64/inst.isle line 2789.
-    return v6;
-}
-
-// Generated as internal constructor for term aarch64_uload16.
-pub fn constructor_aarch64_uload16<C: Context>(ctx: &mut C, arg0: &AMode, arg1: MemFlags) -> Reg {
-    let v3 = C::temp_writable_reg(ctx, I64);
-    let v4 = MInst::ULoad16 {
-        rd: v3,
-        mem: arg0.clone(),
-        flags: arg1,
-    };
-    let v5 = C::emit(ctx, &v4);
-    let v6 = C::writable_reg_to_reg(ctx, v3);
-    // Rule at src/isa/aarch64/inst.isle line 2794.
-    return v6;
-}
-
-// Generated as internal constructor for term aarch64_sload16.
-pub fn constructor_aarch64_sload16<C: Context>(ctx: &mut C, arg0: &AMode, arg1: MemFlags) -> Reg {
-    let v3 = C::temp_writable_reg(ctx, I64);
-    let v4 = MInst::SLoad16 {
-        rd: v3,
-        mem: arg0.clone(),
-        flags: arg1,
-    };
-    let v5 = C::emit(ctx, &v4);
-    let v6 = C::writable_reg_to_reg(ctx, v3);
-    // Rule at src/isa/aarch64/inst.isle line 2799.
-    return v6;
-}
-
-// Generated as internal constructor for term aarch64_uload32.
-pub fn constructor_aarch64_uload32<C: Context>(ctx: &mut C, arg0: &AMode, arg1: MemFlags) -> Reg {
-    let v3 = C::temp_writable_reg(ctx, I64);
-    let v4 = MInst::ULoad32 {
-        rd: v3,
-        mem: arg0.clone(),
-        flags: arg1,
-    };
-    let v5 = C::emit(ctx, &v4);
-    let v6 = C::writable_reg_to_reg(ctx, v3);
-    // Rule at src/isa/aarch64/inst.isle line 2804.
-    return v6;
-}
-
-// Generated as internal constructor for term aarch64_sload32.
-pub fn constructor_aarch64_sload32<C: Context>(ctx: &mut C, arg0: &AMode, arg1: MemFlags) -> Reg {
-    let v3 = C::temp_writable_reg(ctx, I64);
-    let v4 = MInst::SLoad32 {
-        rd: v3,
-        mem: arg0.clone(),
-        flags: arg1,
-    };
-    let v5 = C::emit(ctx, &v4);
-    let v6 = C::writable_reg_to_reg(ctx, v3);
-    // Rule at src/isa/aarch64/inst.isle line 2809.
-    return v6;
-}
-
-// Generated as internal constructor for term aarch64_uload64.
-pub fn constructor_aarch64_uload64<C: Context>(ctx: &mut C, arg0: &AMode, arg1: MemFlags) -> Reg {
-    let v3 = C::temp_writable_reg(ctx, I64);
-    let v4 = MInst::ULoad64 {
-        rd: v3,
-        mem: arg0.clone(),
-        flags: arg1,
-    };
-    let v5 = C::emit(ctx, &v4);
-    let v6 = C::writable_reg_to_reg(ctx, v3);
-    // Rule at src/isa/aarch64/inst.isle line 2814.
-    return v6;
-}
-
-// Generated as internal constructor for term aarch64_fpuload32.
-pub fn constructor_aarch64_fpuload32<C: Context>(ctx: &mut C, arg0: &AMode, arg1: MemFlags) -> Reg {
-    let v3 = C::temp_writable_reg(ctx, F64);
-    let v4 = MInst::FpuLoad32 {
-        rd: v3,
-        mem: arg0.clone(),
-        flags: arg1,
-    };
-    let v5 = C::emit(ctx, &v4);
-    let v6 = C::writable_reg_to_reg(ctx, v3);
-    // Rule at src/isa/aarch64/inst.isle line 2819.
-    return v6;
-}
-
-// Generated as internal constructor for term aarch64_fpuload64.
-pub fn constructor_aarch64_fpuload64<C: Context>(ctx: &mut C, arg0: &AMode, arg1: MemFlags) -> Reg {
-    let v3 = C::temp_writable_reg(ctx, F64);
-    let v4 = MInst::FpuLoad64 {
-        rd: v3,
-        mem: arg0.clone(),
-        flags: arg1,
-    };
-    let v5 = C::emit(ctx, &v4);
-    let v6 = C::writable_reg_to_reg(ctx, v3);
-    // Rule at src/isa/aarch64/inst.isle line 2824.
-    return v6;
-}
-
-// Generated as internal constructor for term aarch64_fpuload128.
-pub fn constructor_aarch64_fpuload128<C: Context>(
-    ctx: &mut C,
-    arg0: &AMode,
-    arg1: MemFlags,
-) -> Reg {
-    let v3 = C::temp_writable_reg(ctx, F64X2);
-    let v4 = MInst::FpuLoad128 {
-        rd: v3,
-        mem: arg0.clone(),
-        flags: arg1,
-    };
-    let v5 = C::emit(ctx, &v4);
-    let v6 = C::writable_reg_to_reg(ctx, v3);
-    // Rule at src/isa/aarch64/inst.isle line 2829.
-    return v6;
-}
-
-// Generated as internal constructor for term aarch64_loadp64.
-pub fn constructor_aarch64_loadp64<C: Context>(
-    ctx: &mut C,
-    arg0: &PairAMode,
-    arg1: MemFlags,
-) -> ValueRegs {
-    let v3 = C::temp_writable_reg(ctx, I64);
-    let v4 = C::temp_writable_reg(ctx, I64);
-    let v5 = MInst::LoadP64 {
-        rt: v3,
-        rt2: v4,
-        mem: arg0.clone(),
-        flags: arg1,
-    };
-    let v6 = C::emit(ctx, &v5);
-    let v7 = C::writable_reg_to_reg(ctx, v3);
-    let v8 = C::writable_reg_to_reg(ctx, v4);
-    let v9 = C::value_regs(ctx, v7, v8);
-    // Rule at src/isa/aarch64/inst.isle line 2834.
-    return v9;
-}
-
-// Generated as internal constructor for term aarch64_store8.
-pub fn constructor_aarch64_store8<C: Context>(
-    ctx: &mut C,
-    arg0: &AMode,
-    arg1: MemFlags,
-    arg2: Reg,
-) -> SideEffectNoResult {
-    let v3 = MInst::Store8 {
-        rd: arg2,
-        mem: arg0.clone(),
-        flags: arg1,
-    };
-    let v4 = SideEffectNoResult::Inst { inst: v3 };
-    // Rule at src/isa/aarch64/inst.isle line 2843.
-    return v4;
-}
-
-// Generated as internal constructor for term aarch64_store16.
-pub fn constructor_aarch64_store16<C: Context>(
-    ctx: &mut C,
-    arg0: &AMode,
-    arg1: MemFlags,
-    arg2: Reg,
-) -> SideEffectNoResult {
-    let v3 = MInst::Store16 {
-        rd: arg2,
-        mem: arg0.clone(),
-        flags: arg1,
-    };
-    let v4 = SideEffectNoResult::Inst { inst: v3 };
-    // Rule at src/isa/aarch64/inst.isle line 2846.
-    return v4;
-}
-
-// Generated as internal constructor for term aarch64_store32.
-pub fn constructor_aarch64_store32<C: Context>(
-    ctx: &mut C,
-    arg0: &AMode,
-    arg1: MemFlags,
-    arg2: Reg,
-) -> SideEffectNoResult {
-    let v3 = MInst::Store32 {
-        rd: arg2,
-        mem: arg0.clone(),
-        flags: arg1,
-    };
-    let v4 = SideEffectNoResult::Inst { inst: v3 };
-    // Rule at src/isa/aarch64/inst.isle line 2849.
-    return v4;
-}
-
-// Generated as internal constructor for term aarch64_store64.
-pub fn constructor_aarch64_store64<C: Context>(
-    ctx: &mut C,
-    arg0: &AMode,
-    arg1: MemFlags,
-    arg2: Reg,
-) -> SideEffectNoResult {
-    let v3 = MInst::Store64 {
-        rd: arg2,
-        mem: arg0.clone(),
-        flags: arg1,
-    };
-    let v4 = SideEffectNoResult::Inst { inst: v3 };
-    // Rule at src/isa/aarch64/inst.isle line 2852.
-    return v4;
-}
-
-// Generated as internal constructor for term aarch64_fpustore32.
-pub fn constructor_aarch64_fpustore32<C: Context>(
-    ctx: &mut C,
-    arg0: &AMode,
-    arg1: MemFlags,
-    arg2: Reg,
-) -> SideEffectNoResult {
-    let v3 = MInst::FpuStore32 {
-        rd: arg2,
-        mem: arg0.clone(),
-        flags: arg1,
-    };
-    let v4 = SideEffectNoResult::Inst { inst: v3 };
-    // Rule at src/isa/aarch64/inst.isle line 2855.
-    return v4;
-}
-
-// Generated as internal constructor for term aarch64_fpustore64.
-pub fn constructor_aarch64_fpustore64<C: Context>(
-    ctx: &mut C,
-    arg0: &AMode,
-    arg1: MemFlags,
-    arg2: Reg,
-) -> SideEffectNoResult {
-    let v3 = MInst::FpuStore64 {
-        rd: arg2,
-        mem: arg0.clone(),
-        flags: arg1,
-    };
-    let v4 = SideEffectNoResult::Inst { inst: v3 };
-    // Rule at src/isa/aarch64/inst.isle line 2858.
-    return v4;
-}
-
-// Generated as internal constructor for term aarch64_fpustore128.
-pub fn constructor_aarch64_fpustore128<C: Context>(
-    ctx: &mut C,
-    arg0: &AMode,
-    arg1: MemFlags,
-    arg2: Reg,
-) -> SideEffectNoResult {
-    let v3 = MInst::FpuStore128 {
-        rd: arg2,
-        mem: arg0.clone(),
-        flags: arg1,
-    };
-    let v4 = SideEffectNoResult::Inst { inst: v3 };
-    // Rule at src/isa/aarch64/inst.isle line 2861.
-    return v4;
-}
-
-// Generated as internal constructor for term aarch64_storep64.
-pub fn constructor_aarch64_storep64<C: Context>(
-    ctx: &mut C,
-    arg0: &PairAMode,
-    arg1: MemFlags,
-    arg2: Reg,
-    arg3: Reg,
-) -> SideEffectNoResult {
-    let v4 = MInst::StoreP64 {
-        rt: arg2,
-        rt2: arg3,
-        mem: arg0.clone(),
-        flags: arg1,
-    };
-    let v5 = SideEffectNoResult::Inst { inst: v4 };
-    // Rule at src/isa/aarch64/inst.isle line 2864.
-    return v5;
-}
-
-// Generated as internal constructor for term trap_if.
-pub fn constructor_trap_if<C: Context>(
-    ctx: &mut C,
-    arg0: &ProducesFlags,
-    arg1: &TrapCode,
-    arg2: &Cond,
-) -> InstOutput {
-    let v3 = C::cond_br_cond(ctx, arg2);
-    let v4 = MInst::TrapIf {
-        kind: v3,
-        trap_code: arg1.clone(),
-    };
-    let v5 = ConsumesFlags::ConsumesFlagsSideEffect { inst: v4 };
-    let v6 = &constructor_with_flags_side_effect(ctx, arg0, &v5);
-    let v7 = constructor_side_effect(ctx, v6);
-    // Rule at src/isa/aarch64/inst.isle line 2870.
-    return v7;
-}
-
-// Generated as internal constructor for term imm.
-pub fn constructor_imm<C: Context>(ctx: &mut C, arg0: Type, arg1: &ImmExtend, arg2: u64) -> Reg {
-    let v1 = C::integral_ty(ctx, arg0);
-    if let Some(v2) = v1 {
-        if let &ImmExtend::Zero = arg1 {
-            let v5 = C::move_wide_const_from_u64(ctx, v2, arg2);
-            if let Some(v6) = v5 {
-                let v7 = &constructor_operand_size(ctx, v2);
-                let v8 = constructor_movz(ctx, v6, v7);
-                // Rule at src/isa/aarch64/inst.isle line 2898.
-                return v8;
-            }
-            let v9 = C::ty_32_or_64(ctx, v2);
-            if let Some(v10) = v9 {
-                let v11 = C::move_wide_const_from_inverted_u64(ctx, v10, arg2);
-                if let Some(v12) = v11 {
-                    let v13 = &constructor_operand_size(ctx, v10);
-                    let v14 = constructor_movn(ctx, v12, v13);
-                    // Rule at src/isa/aarch64/inst.isle line 2901.
-                    return v14;
-                }
-            }
-            let v15 = C::imm_logic_from_u64(ctx, v2, arg2);
-            if let Some(v16) = v15 {
-                let v17 = C::zero_reg(ctx);
-                let v18 = constructor_orr_imm(ctx, v2, v17, v16);
-                // Rule at src/isa/aarch64/inst.isle line 2907.
-                return v18;
-            }
-        }
-        let v19 = C::load_constant64_full(ctx, v2, arg1, arg2);
-        // Rule at src/isa/aarch64/inst.isle line 2915.
-        return v19;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "imm", "src/isa/aarch64/inst.isle line 2894"
-    )
-}
-
-// Generated as internal constructor for term put_in_reg_sext32.
-pub fn constructor_put_in_reg_sext32<C: Context>(ctx: &mut C, arg0: Value) -> Reg {
-    let v1 = C::value_type(ctx, arg0);
-    match v1 {
-        I32 => {
-            let v4 = C::put_in_reg(ctx, arg0);
-            // Rule at src/isa/aarch64/inst.isle line 2926.
-            return v4;
-        }
-        I64 => {
-            let v4 = C::put_in_reg(ctx, arg0);
-            // Rule at src/isa/aarch64/inst.isle line 2927.
-            return v4;
-        }
-        _ => {}
-    }
-    let v2 = C::fits_in_32(ctx, v1);
-    if let Some(v3) = v2 {
-        let v4 = C::put_in_reg(ctx, arg0);
-        let v6 = C::ty_bits(ctx, v3);
-        let v8 = constructor_extend(ctx, v4, true, v6, 0x20);
-        // Rule at src/isa/aarch64/inst.isle line 2922.
-        return v8;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "put_in_reg_sext32", "src/isa/aarch64/inst.isle line 2921"
-    )
-}
-
-// Generated as internal constructor for term put_in_reg_zext32.
-pub fn constructor_put_in_reg_zext32<C: Context>(ctx: &mut C, arg0: Value) -> Reg {
-    let v1 = C::value_type(ctx, arg0);
-    match v1 {
-        I32 => {
-            let v4 = C::put_in_reg(ctx, arg0);
-            // Rule at src/isa/aarch64/inst.isle line 2935.
-            return v4;
-        }
-        I64 => {
-            let v4 = C::put_in_reg(ctx, arg0);
-            // Rule at src/isa/aarch64/inst.isle line 2936.
-            return v4;
-        }
-        _ => {}
-    }
-    let v2 = C::fits_in_32(ctx, v1);
-    if let Some(v3) = v2 {
-        let v4 = C::put_in_reg(ctx, arg0);
-        let v6 = C::ty_bits(ctx, v3);
-        let v8 = constructor_extend(ctx, v4, false, v6, 0x20);
-        // Rule at src/isa/aarch64/inst.isle line 2931.
-        return v8;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "put_in_reg_zext32", "src/isa/aarch64/inst.isle line 2930"
-    )
-}
-
-// Generated as internal constructor for term put_in_reg_sext64.
-pub fn constructor_put_in_reg_sext64<C: Context>(ctx: &mut C, arg0: Value) -> Reg {
-    let v1 = C::value_type(ctx, arg0);
-    let v2 = C::fits_in_32(ctx, v1);
-    if let Some(v3) = v2 {
-        let v4 = C::put_in_reg(ctx, arg0);
-        let v6 = C::ty_bits(ctx, v3);
-        let v8 = constructor_extend(ctx, v4, true, v6, 0x40);
-        // Rule at src/isa/aarch64/inst.isle line 2940.
-        return v8;
-    }
-    if v1 == I64 {
-        let v4 = C::put_in_reg(ctx, arg0);
-        // Rule at src/isa/aarch64/inst.isle line 2944.
-        return v4;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "put_in_reg_sext64", "src/isa/aarch64/inst.isle line 2939"
-    )
-}
-
-// Generated as internal constructor for term put_in_reg_zext64.
-pub fn constructor_put_in_reg_zext64<C: Context>(ctx: &mut C, arg0: Value) -> Reg {
-    let v1 = C::value_type(ctx, arg0);
-    let v2 = C::fits_in_32(ctx, v1);
-    if let Some(v3) = v2 {
-        let v4 = C::put_in_reg(ctx, arg0);
-        let v6 = C::ty_bits(ctx, v3);
-        let v8 = constructor_extend(ctx, v4, false, v6, 0x40);
-        // Rule at src/isa/aarch64/inst.isle line 2948.
-        return v8;
-    }
-    if v1 == I64 {
-        let v4 = C::put_in_reg(ctx, arg0);
-        // Rule at src/isa/aarch64/inst.isle line 2952.
-        return v4;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "put_in_reg_zext64", "src/isa/aarch64/inst.isle line 2947"
-    )
-}
-
-// Generated as internal constructor for term trap_if_zero_divisor.
-pub fn constructor_trap_if_zero_divisor<C: Context>(ctx: &mut C, arg0: Reg) -> Reg {
-    let v1 = C::cond_br_zero(ctx, arg0);
-    let v2 = &C::trap_code_division_by_zero(ctx);
-    let v3 = MInst::TrapIf {
-        kind: v1,
-        trap_code: v2.clone(),
-    };
-    let v4 = C::emit(ctx, &v3);
-    // Rule at src/isa/aarch64/inst.isle line 2957.
-    return arg0;
-}
-
-// Generated as internal constructor for term size_from_ty.
-pub fn constructor_size_from_ty<C: Context>(ctx: &mut C, arg0: Type) -> OperandSize {
-    let v1 = C::fits_in_32(ctx, arg0);
-    if let Some(v2) = v1 {
-        // Rule at src/isa/aarch64/inst.isle line 2962.
-        return OperandSize::Size32;
-    }
-    if arg0 == I64 {
-        // Rule at src/isa/aarch64/inst.isle line 2963.
-        return OperandSize::Size64;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "size_from_ty", "src/isa/aarch64/inst.isle line 2961"
-    )
-}
-
-// Generated as internal constructor for term trap_if_div_overflow.
-pub fn constructor_trap_if_div_overflow<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: Reg,
-) -> Reg {
-    let v4 = &constructor_operand_size(ctx, arg0);
-    let v5 = C::writable_zero_reg(ctx);
-    let v7 = C::u8_into_imm12(ctx, 0x1);
-    let v8 = MInst::AluRRImm12 {
-        alu_op: ALUOp::AddS,
-        size: v4.clone(),
-        rd: v5,
-        rn: arg2,
-        imm12: v7,
-    };
-    let v9 = C::emit(ctx, &v8);
-    let v10 = &constructor_size_from_ty(ctx, arg0);
-    let v11 = C::u8_into_uimm5(ctx, 0x1);
-    let v13 = C::nzcv(ctx, false, false, false, false);
-    let v15 = MInst::CCmpImm {
-        size: v10.clone(),
-        rn: arg1,
-        imm: v11,
-        nzcv: v13,
-        cond: Cond::Eq,
-    };
-    let v16 = C::emit(ctx, &v15);
-    let v18 = C::cond_br_cond(ctx, &Cond::Vs);
-    let v19 = &C::trap_code_integer_overflow(ctx);
-    let v20 = MInst::TrapIf {
-        kind: v18,
-        trap_code: v19.clone(),
-    };
-    let v21 = C::emit(ctx, &v20);
-    // Rule at src/isa/aarch64/inst.isle line 2969.
-    return arg1;
-}
-
-// Generated as internal constructor for term trap_if_overflow.
-pub fn constructor_trap_if_overflow<C: Context>(
-    ctx: &mut C,
-    arg0: &ProducesFlags,
-    arg1: &TrapCode,
-) -> Reg {
-    let v3 = C::cond_br_cond(ctx, &Cond::Hs);
-    let v4 = MInst::TrapIf {
-        kind: v3,
-        trap_code: arg1.clone(),
-    };
-    let v5 = ConsumesFlags::ConsumesFlagsSideEffect { inst: v4 };
-    let v6 = constructor_with_flags_reg(ctx, arg0, &v5);
-    // Rule at src/isa/aarch64/inst.isle line 2988.
-    return v6;
-}
-
-// Generated as internal constructor for term sink_atomic_load.
-pub fn constructor_sink_atomic_load<C: Context>(ctx: &mut C, arg0: Inst) -> Reg {
-    let v1 = &C::inst_data(ctx, arg0);
-    if let &InstructionData::LoadNoOffset {
-        opcode: ref v2,
-        arg: v3,
-        flags: v4,
-    } = v1
-    {
-        if let &Opcode::AtomicLoad = v2 {
-            let v5 = C::sink_inst(ctx, arg0);
-            let v6 = C::put_in_reg(ctx, v3);
-            // Rule at src/isa/aarch64/inst.isle line 2995.
-            return v6;
-        }
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "sink_atomic_load", "src/isa/aarch64/inst.isle line 2994"
-    )
-}
-
-// Generated as internal constructor for term alu_rs_imm_logic_commutative.
-pub fn constructor_alu_rs_imm_logic_commutative<C: Context>(
-    ctx: &mut C,
-    arg0: &ALUOp,
-    arg1: Type,
-    arg2: Value,
-    arg3: Value,
-) -> Reg {
-    let v15 = C::def_inst(ctx, arg2);
-    if let Some(v16) = v15 {
-        let v17 = &C::inst_data(ctx, v16);
-        match v17 {
-            &InstructionData::Binary {
-                opcode: ref v38,
-                args: ref v39,
-            } => {
-                if let &Opcode::Ishl = v38 {
-                    let v40 = C::unpack_value_array_2(ctx, v39);
-                    let v43 = C::def_inst(ctx, v40.1);
-                    if let Some(v44) = v43 {
-                        let v45 = &C::inst_data(ctx, v44);
-                        if let &InstructionData::UnaryImm {
-                            opcode: ref v46,
-                            imm: v47,
-                        } = v45
-                        {
-                            if let &Opcode::Iconst = v46 {
-                                let v48 = C::lshl_from_imm64(ctx, arg1, v47);
-                                if let Some(v49) = v48 {
-                                    let v22 = C::put_in_reg(ctx, arg3);
-                                    let v50 = C::put_in_reg(ctx, v40.0);
-                                    let v51 =
-                                        constructor_alu_rrr_shift(ctx, arg0, arg1, v22, v50, v49);
-                                    // Rule at src/isa/aarch64/inst.isle line 3020.
-                                    return v51;
-                                }
-                            }
-                        }
-                    }
-                }
-            }
-            &InstructionData::UnaryImm {
-                opcode: ref v18,
-                imm: v19,
-            } => {
-                if let &Opcode::Iconst = v18 {
-                    let v20 = C::imm_logic_from_imm64(ctx, arg1, v19);
-                    if let Some(v21) = v20 {
-                        let v22 = C::put_in_reg(ctx, arg3);
-                        let v23 = constructor_alu_rr_imm_logic(ctx, arg0, arg1, v22, v21);
-                        // Rule at src/isa/aarch64/inst.isle line 3012.
-                        return v23;
-                    }
-                }
-            }
-            _ => {}
-        }
-    }
-    let v7 = C::def_inst(ctx, arg3);
-    if let Some(v8) = v7 {
-        let v9 = &C::inst_data(ctx, v8);
-        match v9 {
-            &InstructionData::Binary {
-                opcode: ref v24,
-                args: ref v25,
-            } => {
-                if let &Opcode::Ishl = v24 {
-                    let v26 = C::unpack_value_array_2(ctx, v25);
-                    let v29 = C::def_inst(ctx, v26.1);
-                    if let Some(v30) = v29 {
-                        let v31 = &C::inst_data(ctx, v30);
-                        if let &InstructionData::UnaryImm {
-                            opcode: ref v32,
-                            imm: v33,
-                        } = v31
-                        {
-                            if let &Opcode::Iconst = v32 {
-                                let v34 = C::lshl_from_imm64(ctx, arg1, v33);
-                                if let Some(v35) = v34 {
-                                    let v4 = C::put_in_reg(ctx, arg2);
-                                    let v36 = C::put_in_reg(ctx, v26.0);
-                                    let v37 =
-                                        constructor_alu_rrr_shift(ctx, arg0, arg1, v4, v36, v35);
-                                    // Rule at src/isa/aarch64/inst.isle line 3017.
-                                    return v37;
-                                }
-                            }
-                        }
-                    }
-                }
-            }
-            &InstructionData::UnaryImm {
-                opcode: ref v10,
-                imm: v11,
-            } => {
-                if let &Opcode::Iconst = v10 {
-                    let v12 = C::imm_logic_from_imm64(ctx, arg1, v11);
-                    if let Some(v13) = v12 {
-                        let v4 = C::put_in_reg(ctx, arg2);
-                        let v14 = constructor_alu_rr_imm_logic(ctx, arg0, arg1, v4, v13);
-                        // Rule at src/isa/aarch64/inst.isle line 3009.
-                        return v14;
-                    }
-                }
-            }
-            _ => {}
-        }
-    }
-    let v4 = C::put_in_reg(ctx, arg2);
-    let v5 = C::put_in_reg(ctx, arg3);
-    let v6 = constructor_alu_rrr(ctx, arg0, arg1, v4, v5);
-    // Rule at src/isa/aarch64/inst.isle line 3005.
-    return v6;
-}
-
-// Generated as internal constructor for term alu_rs_imm_logic.
-pub fn constructor_alu_rs_imm_logic<C: Context>(
-    ctx: &mut C,
-    arg0: &ALUOp,
-    arg1: Type,
-    arg2: Value,
-    arg3: Value,
-) -> Reg {
-    let v7 = C::def_inst(ctx, arg3);
-    if let Some(v8) = v7 {
-        let v9 = &C::inst_data(ctx, v8);
-        match v9 {
-            &InstructionData::Binary {
-                opcode: ref v15,
-                args: ref v16,
-            } => {
-                if let &Opcode::Ishl = v15 {
-                    let v17 = C::unpack_value_array_2(ctx, v16);
-                    let v20 = C::def_inst(ctx, v17.1);
-                    if let Some(v21) = v20 {
-                        let v22 = &C::inst_data(ctx, v21);
-                        if let &InstructionData::UnaryImm {
-                            opcode: ref v23,
-                            imm: v24,
-                        } = v22
-                        {
-                            if let &Opcode::Iconst = v23 {
-                                let v25 = C::lshl_from_imm64(ctx, arg1, v24);
-                                if let Some(v26) = v25 {
-                                    let v4 = C::put_in_reg(ctx, arg2);
-                                    let v27 = C::put_in_reg(ctx, v17.0);
-                                    let v28 =
-                                        constructor_alu_rrr_shift(ctx, arg0, arg1, v4, v27, v26);
-                                    // Rule at src/isa/aarch64/inst.isle line 3032.
-                                    return v28;
-                                }
-                            }
-                        }
-                    }
-                }
-            }
-            &InstructionData::UnaryImm {
-                opcode: ref v10,
-                imm: v11,
-            } => {
-                if let &Opcode::Iconst = v10 {
-                    let v12 = C::imm_logic_from_imm64(ctx, arg1, v11);
-                    if let Some(v13) = v12 {
-                        let v4 = C::put_in_reg(ctx, arg2);
-                        let v14 = constructor_alu_rr_imm_logic(ctx, arg0, arg1, v4, v13);
-                        // Rule at src/isa/aarch64/inst.isle line 3029.
-                        return v14;
-                    }
-                }
-            }
-            _ => {}
-        }
-    }
-    let v4 = C::put_in_reg(ctx, arg2);
-    let v5 = C::put_in_reg(ctx, arg3);
-    let v6 = constructor_alu_rrr(ctx, arg0, arg1, v4, v5);
-    // Rule at src/isa/aarch64/inst.isle line 3027.
-    return v6;
-}
-
-// Generated as internal constructor for term i128_alu_bitop.
-pub fn constructor_i128_alu_bitop<C: Context>(
-    ctx: &mut C,
-    arg0: &ALUOp,
-    arg1: Type,
-    arg2: Value,
-    arg3: Value,
-) -> ValueRegs {
-    let v4 = C::put_in_regs(ctx, arg2);
-    let v6 = C::value_regs_get(ctx, v4, 0x0);
-    let v8 = C::value_regs_get(ctx, v4, 0x1);
-    let v9 = C::put_in_regs(ctx, arg3);
-    let v10 = C::value_regs_get(ctx, v9, 0x0);
-    let v11 = C::value_regs_get(ctx, v9, 0x1);
-    let v12 = constructor_alu_rrr(ctx, arg0, arg1, v6, v10);
-    let v13 = constructor_alu_rrr(ctx, arg0, arg1, v8, v11);
-    let v14 = C::value_regs(ctx, v12, v13);
-    // Rule at src/isa/aarch64/inst.isle line 3041.
-    return v14;
-}
-
-// Generated as internal constructor for term ld1r.
-pub fn constructor_ld1r<C: Context>(
-    ctx: &mut C,
-    arg0: Reg,
-    arg1: &VectorSize,
-    arg2: MemFlags,
-) -> Reg {
-    let v4 = C::temp_writable_reg(ctx, I8X16);
-    let v5 = MInst::VecLoadReplicate {
-        rd: v4,
-        rn: arg0,
-        size: arg1.clone(),
-        flags: arg2,
-    };
-    let v6 = C::emit(ctx, &v5);
-    let v7 = C::writable_reg_to_reg(ctx, v4);
-    // Rule at src/isa/aarch64/inst.isle line 3056.
-    return v7;
-}
-
-// Generated as internal constructor for term load_ext_name.
-pub fn constructor_load_ext_name<C: Context>(ctx: &mut C, arg0: BoxExternalName, arg1: i64) -> Reg {
-    let v3 = C::temp_writable_reg(ctx, I64);
-    let v4 = MInst::LoadExtName {
-        rd: v3,
-        name: arg0,
-        offset: arg1,
-    };
-    let v5 = C::emit(ctx, &v4);
-    let v6 = C::writable_reg_to_reg(ctx, v3);
-    // Rule at src/isa/aarch64/inst.isle line 3063.
-    return v6;
-}
-
-// Generated as internal constructor for term sink_load_into_addr.
-pub fn constructor_sink_load_into_addr<C: Context>(ctx: &mut C, arg0: Type, arg1: Inst) -> Reg {
-    let v2 = &C::inst_data(ctx, arg1);
-    if let &InstructionData::Load {
-        opcode: ref v3,
-        arg: v4,
-        flags: v5,
-        offset: v6,
-    } = v2
-    {
-        if let &Opcode::Load = v3 {
-            let v8 = C::sink_inst(ctx, arg1);
-            let v9 = C::put_in_reg(ctx, v4);
-            let v7 = C::offset32(ctx, v6);
-            let v10 = C::u32_as_u64(ctx, v7);
-            let v11 = constructor_add_imm_to_addr(ctx, v9, v10);
-            // Rule at src/isa/aarch64/inst.isle line 3074.
-            return v11;
-        }
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "sink_load_into_addr", "src/isa/aarch64/inst.isle line 3073"
-    )
-}
-
-// Generated as internal constructor for term add_imm_to_addr.
-pub fn constructor_add_imm_to_addr<C: Context>(ctx: &mut C, arg0: Reg, arg1: u64) -> Reg {
-    if arg1 == 0x0 {
-        // Rule at src/isa/aarch64/inst.isle line 3079.
-        return arg0;
-    }
-    let v2 = C::imm12_from_u64(ctx, arg1);
-    if let Some(v3) = v2 {
-        let v5 = constructor_add_imm(ctx, I64, arg0, v3);
-        // Rule at src/isa/aarch64/inst.isle line 3080.
-        return v5;
-    }
-    let v7 = constructor_imm(ctx, I64, &ImmExtend::Zero, arg1);
-    let v8 = constructor_add(ctx, I64, arg0, v7);
-    // Rule at src/isa/aarch64/inst.isle line 3081.
-    return v8;
-}
-
-// Generated as internal constructor for term constant_f32.
-pub fn constructor_constant_f32<C: Context>(ctx: &mut C, arg0: u32) -> Reg {
-    if arg0 == 0x0 {
-        let v2 = C::asimd_mov_mod_imm_zero(ctx, &ScalarSize::Size32);
-        let v5 = constructor_vec_dup_imm(ctx, v2, false, &VectorSize::Size32x2);
-        // Rule at src/isa/aarch64/inst.isle line 3089.
-        return v5;
-    }
-    let v6 = C::u32_as_u64(ctx, arg0);
-    let v7 = C::asimd_fp_mod_imm_from_u64(ctx, v6, &ScalarSize::Size32);
-    if let Some(v8) = v7 {
-        let v9 = constructor_fpu_move_fp_imm(ctx, v8, &ScalarSize::Size32);
-        // Rule at src/isa/aarch64/inst.isle line 3093.
-        return v9;
-    }
-    let v12 = constructor_imm(ctx, I32, &ImmExtend::Zero, v6);
-    let v13 = constructor_mov_to_fpu(ctx, v12, &ScalarSize::Size32);
-    // Rule at src/isa/aarch64/inst.isle line 3096.
-    return v13;
-}
-
-// Generated as internal constructor for term constant_f64.
-pub fn constructor_constant_f64<C: Context>(ctx: &mut C, arg0: u64) -> Reg {
-    if arg0 == 0x0 {
-        let v2 = C::asimd_mov_mod_imm_zero(ctx, &ScalarSize::Size32);
-        let v5 = constructor_vec_dup_imm(ctx, v2, false, &VectorSize::Size32x2);
-        // Rule at src/isa/aarch64/inst.isle line 3107.
-        return v5;
-    }
-    let v7 = C::asimd_fp_mod_imm_from_u64(ctx, arg0, &ScalarSize::Size64);
-    if let Some(v8) = v7 {
-        let v9 = constructor_fpu_move_fp_imm(ctx, v8, &ScalarSize::Size64);
-        // Rule at src/isa/aarch64/inst.isle line 3111.
-        return v9;
-    }
-    let v10 = C::u64_as_u32(ctx, arg0);
-    if let Some(v11) = v10 {
-        let v12 = constructor_constant_f32(ctx, v11);
-        // Rule at src/isa/aarch64/inst.isle line 3114.
-        return v12;
-    }
-    let v13 = C::u64_low32_bits_unset(ctx, arg0);
-    if let Some(v14) = v13 {
-        let v17 = constructor_imm(ctx, I64, &ImmExtend::Zero, v14);
-        let v18 = constructor_mov_to_fpu(ctx, v17, &ScalarSize::Size64);
-        // Rule at src/isa/aarch64/inst.isle line 3116.
-        return v18;
-    }
-    let v19 = C::emit_u64_le_const(ctx, arg0);
-    let v20 = AMode::Const { addr: v19 };
-    let v21 = C::mem_flags_trusted(ctx);
-    let v22 = constructor_fpu_load64(ctx, &v20, v21);
-    // Rule at src/isa/aarch64/inst.isle line 3118.
-    return v22;
-}
-
-// Generated as internal constructor for term constant_f128.
-pub fn constructor_constant_f128<C: Context>(ctx: &mut C, arg0: u128) -> Reg {
-    if arg0 == 0x0 {
-        let v2 = C::asimd_mov_mod_imm_zero(ctx, &ScalarSize::Size8);
-        let v5 = constructor_vec_dup_imm(ctx, v2, false, &VectorSize::Size8x16);
-        // Rule at src/isa/aarch64/inst.isle line 3127.
-        return v5;
-    }
-    let v6 = C::u128_as_u64(ctx, arg0);
-    if let Some(v7) = v6 {
-        let v8 = constructor_constant_f64(ctx, v7);
-        // Rule at src/isa/aarch64/inst.isle line 3133.
-        return v8;
-    }
-    let v9 = C::u128_replicated_u64(ctx, arg0);
-    if let Some(v10) = v9 {
-        let v12 = constructor_splat_const(ctx, v10, &VectorSize::Size64x2);
-        // Rule at src/isa/aarch64/inst.isle line 3137.
-        return v12;
-    }
-    let v13 = C::emit_u128_le_const(ctx, arg0);
-    let v14 = AMode::Const { addr: v13 };
-    let v15 = C::mem_flags_trusted(ctx);
-    let v16 = constructor_fpu_load128(ctx, &v14, v15);
-    // Rule at src/isa/aarch64/inst.isle line 3141.
-    return v16;
-}
-
-// Generated as internal constructor for term splat_const.
-pub fn constructor_splat_const<C: Context>(ctx: &mut C, arg0: u64, arg1: &VectorSize) -> Reg {
-    match arg1 {
-        &VectorSize::Size16x4 => {
-            let v12 = C::u16_replicated_u8(ctx, arg0);
-            if let Some(v13) = v12 {
-                let v17 = constructor_splat_const(ctx, v13, &VectorSize::Size8x8);
-                // Rule at src/isa/aarch64/inst.isle line 3160.
-                return v17;
-            }
-        }
-        &VectorSize::Size16x8 => {
-            let v12 = C::u16_replicated_u8(ctx, arg0);
-            if let Some(v13) = v12 {
-                let v15 = constructor_splat_const(ctx, v13, &VectorSize::Size8x16);
-                // Rule at src/isa/aarch64/inst.isle line 3158.
-                return v15;
-            }
-        }
-        &VectorSize::Size32x2 => {
-            let v6 = C::u32_replicated_u16(ctx, arg0);
-            if let Some(v7) = v6 {
-                let v11 = constructor_splat_const(ctx, v7, &VectorSize::Size16x4);
-                // Rule at src/isa/aarch64/inst.isle line 3156.
-                return v11;
-            }
-        }
-        &VectorSize::Size32x4 => {
-            let v6 = C::u32_replicated_u16(ctx, arg0);
-            if let Some(v7) = v6 {
-                let v9 = constructor_splat_const(ctx, v7, &VectorSize::Size16x8);
-                // Rule at src/isa/aarch64/inst.isle line 3154.
-                return v9;
-            }
-        }
-        &VectorSize::Size64x2 => {
-            let v1 = C::u64_replicated_u32(ctx, arg0);
-            if let Some(v2) = v1 {
-                let v5 = constructor_splat_const(ctx, v2, &VectorSize::Size32x4);
-                // Rule at src/isa/aarch64/inst.isle line 3152.
-                return v5;
-            }
-        }
-        _ => {}
-    }
-    let v18 = &constructor_vector_lane_size(ctx, arg1);
-    let v19 = C::asimd_mov_mod_imm_from_u64(ctx, arg0, v18);
-    if let Some(v20) = v19 {
-        let v22 = constructor_vec_dup_imm(ctx, v20, false, arg1);
-        // Rule at src/isa/aarch64/inst.isle line 3165.
-        return v22;
-    }
-    let v23 = C::u64_not(ctx, arg0);
-    let v24 = C::asimd_mov_mod_imm_from_u64(ctx, v23, v18);
-    if let Some(v25) = v24 {
-        let v27 = constructor_vec_dup_imm(ctx, v25, true, arg1);
-        // Rule at src/isa/aarch64/inst.isle line 3168.
-        return v27;
-    }
-    match arg1 {
-        &VectorSize::Size32x2 => {
-            let v29 = C::u64_shl(ctx, arg0, 0x20);
-            let v30 = C::u64_or(ctx, arg0, v29);
-            let v32 = C::asimd_mov_mod_imm_from_u64(ctx, v30, &ScalarSize::Size64);
-            if let Some(v33) = v32 {
-                let v35 = constructor_vec_dup_imm(ctx, v33, false, &VectorSize::Size64x2);
-                let v36 = constructor_fpu_extend(ctx, v35, &ScalarSize::Size64);
-                // Rule at src/isa/aarch64/inst.isle line 3177.
-                return v36;
-            }
-        }
-        &VectorSize::Size32x4 => {
-            let v29 = C::u64_shl(ctx, arg0, 0x20);
-            let v30 = C::u64_or(ctx, arg0, v29);
-            let v32 = C::asimd_mov_mod_imm_from_u64(ctx, v30, &ScalarSize::Size64);
-            if let Some(v33) = v32 {
-                let v35 = constructor_vec_dup_imm(ctx, v33, false, &VectorSize::Size64x2);
-                // Rule at src/isa/aarch64/inst.isle line 3174.
-                return v35;
-            }
-        }
-        _ => {}
-    }
-    let v37 = C::asimd_fp_mod_imm_from_u64(ctx, arg0, v18);
-    if let Some(v38) = v37 {
-        let v39 = constructor_vec_dup_fp_imm(ctx, v38, arg1);
-        // Rule at src/isa/aarch64/inst.isle line 3181.
-        return v39;
-    }
-    let v42 = constructor_imm(ctx, I64, &ImmExtend::Zero, arg0);
-    let v43 = constructor_vec_dup(ctx, v42, arg1);
-    // Rule at src/isa/aarch64/inst.isle line 3187.
-    return v43;
-}
-
-// Generated as internal constructor for term float_cmp_zero.
-pub fn constructor_float_cmp_zero<C: Context>(
-    ctx: &mut C,
-    arg0: &FloatCC,
-    arg1: Reg,
-    arg2: &VectorSize,
-) -> Reg {
-    let v3 = &C::float_cc_cmp_zero_to_vec_misc_op(ctx, arg0);
-    let v4 = constructor_vec_misc(ctx, v3, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 3233.
-    return v4;
-}
-
-// Generated as internal constructor for term float_cmp_zero_swap.
-pub fn constructor_float_cmp_zero_swap<C: Context>(
-    ctx: &mut C,
-    arg0: &FloatCC,
-    arg1: Reg,
-    arg2: &VectorSize,
-) -> Reg {
-    let v3 = &C::float_cc_cmp_zero_to_vec_misc_op_swap(ctx, arg0);
-    let v4 = constructor_vec_misc(ctx, v3, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 3238.
-    return v4;
-}
-
-// Generated as internal constructor for term fcmeq0.
-pub fn constructor_fcmeq0<C: Context>(ctx: &mut C, arg0: Reg, arg1: &VectorSize) -> Reg {
-    let v3 = constructor_vec_misc(ctx, &VecMisc2::Fcmeq0, arg0, arg1);
-    // Rule at src/isa/aarch64/inst.isle line 3243.
-    return v3;
-}
-
-// Generated as internal constructor for term int_cmp_zero.
-pub fn constructor_int_cmp_zero<C: Context>(
-    ctx: &mut C,
-    arg0: &IntCC,
-    arg1: Reg,
-    arg2: &VectorSize,
-) -> Reg {
-    let v3 = &C::int_cc_cmp_zero_to_vec_misc_op(ctx, arg0);
-    let v4 = constructor_vec_misc(ctx, v3, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 3263.
-    return v4;
-}
-
-// Generated as internal constructor for term int_cmp_zero_swap.
-pub fn constructor_int_cmp_zero_swap<C: Context>(
-    ctx: &mut C,
-    arg0: &IntCC,
-    arg1: Reg,
-    arg2: &VectorSize,
-) -> Reg {
-    let v3 = &C::int_cc_cmp_zero_to_vec_misc_op_swap(ctx, arg0);
-    let v4 = constructor_vec_misc(ctx, v3, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 3268.
-    return v4;
-}
-
-// Generated as internal constructor for term cmeq0.
-pub fn constructor_cmeq0<C: Context>(ctx: &mut C, arg0: Reg, arg1: &VectorSize) -> Reg {
-    let v3 = constructor_vec_misc(ctx, &VecMisc2::Cmeq0, arg0, arg1);
-    // Rule at src/isa/aarch64/inst.isle line 3273.
-    return v3;
-}
-
-// Generated as internal constructor for term lse_atomic_rmw.
-pub fn constructor_lse_atomic_rmw<C: Context>(
-    ctx: &mut C,
-    arg0: &AtomicRMWOp,
-    arg1: Value,
-    arg2: Reg,
-    arg3: Type,
-    arg4: MemFlags,
-) -> Reg {
-    let v5 = C::put_in_reg(ctx, arg1);
-    let v6 = C::temp_writable_reg(ctx, arg3);
-    let v7 = MInst::AtomicRMW {
-        op: arg0.clone(),
-        rs: arg2,
-        rt: v6,
-        rn: v5,
-        ty: arg3,
-        flags: arg4,
-    };
-    let v8 = C::emit(ctx, &v7);
-    let v9 = C::writable_reg_to_reg(ctx, v6);
-    // Rule at src/isa/aarch64/inst.isle line 3278.
-    return v9;
-}
-
-// Generated as internal constructor for term lse_atomic_cas.
-pub fn constructor_lse_atomic_cas<C: Context>(
-    ctx: &mut C,
-    arg0: Reg,
-    arg1: Reg,
-    arg2: Reg,
-    arg3: Type,
-    arg4: MemFlags,
-) -> Reg {
-    let v5 = C::temp_writable_reg(ctx, arg3);
-    let v6 = MInst::AtomicCAS {
-        rd: v5,
-        rs: arg1,
-        rt: arg2,
-        rn: arg0,
-        ty: arg3,
-        flags: arg4,
-    };
-    let v7 = C::emit(ctx, &v6);
-    let v8 = C::writable_reg_to_reg(ctx, v5);
-    // Rule at src/isa/aarch64/inst.isle line 3288.
-    return v8;
-}
-
-// Generated as internal constructor for term atomic_rmw_loop.
-pub fn constructor_atomic_rmw_loop<C: Context>(
-    ctx: &mut C,
-    arg0: &AtomicRMWLoopOp,
-    arg1: Reg,
-    arg2: Reg,
-    arg3: Type,
-    arg4: MemFlags,
-) -> Reg {
-    let v6 = C::temp_writable_reg(ctx, I64);
-    let v7 = C::temp_writable_reg(ctx, I64);
-    let v8 = C::temp_writable_reg(ctx, I64);
-    let v9 = MInst::AtomicRMWLoop {
-        ty: arg3,
-        op: arg0.clone(),
-        flags: arg4,
-        addr: arg1,
-        operand: arg2,
-        oldval: v6,
-        scratch1: v7,
-        scratch2: v8,
-    };
-    let v10 = C::emit(ctx, &v9);
-    let v11 = C::writable_reg_to_reg(ctx, v6);
-    // Rule at src/isa/aarch64/inst.isle line 3302.
-    return v11;
-}
-
-// Generated as internal constructor for term atomic_cas_loop.
-pub fn constructor_atomic_cas_loop<C: Context>(
-    ctx: &mut C,
-    arg0: Reg,
-    arg1: Reg,
-    arg2: Reg,
-    arg3: Type,
-    arg4: MemFlags,
-) -> Reg {
-    let v6 = C::temp_writable_reg(ctx, I64);
-    let v7 = C::temp_writable_reg(ctx, I64);
-    let v8 = MInst::AtomicCASLoop {
-        ty: arg3,
-        flags: arg4,
-        addr: arg0,
-        expected: arg1,
-        replacement: arg2,
-        oldval: v6,
-        scratch: v7,
-    };
-    let v9 = C::emit(ctx, &v8);
-    let v10 = C::writable_reg_to_reg(ctx, v6);
-    // Rule at src/isa/aarch64/inst.isle line 3316.
-    return v10;
-}
-
-// Generated as internal constructor for term mov_from_preg.
-pub fn constructor_mov_from_preg<C: Context>(ctx: &mut C, arg0: PReg) -> Reg {
-    let v2 = C::temp_writable_reg(ctx, I64);
-    let v3 = MInst::MovFromPReg { rd: v2, rm: arg0 };
-    let v4 = C::emit(ctx, &v3);
-    let v5 = C::writable_reg_to_reg(ctx, v2);
-    // Rule at src/isa/aarch64/inst.isle line 3324.
-    return v5;
-}
-
-// Generated as internal constructor for term mov_to_preg.
-pub fn constructor_mov_to_preg<C: Context>(
-    ctx: &mut C,
-    arg0: PReg,
-    arg1: Reg,
-) -> SideEffectNoResult {
-    let v2 = MInst::MovToPReg { rd: arg0, rm: arg1 };
-    let v3 = SideEffectNoResult::Inst { inst: v2 };
-    // Rule at src/isa/aarch64/inst.isle line 3330.
-    return v3;
-}
-
-// Generated as internal constructor for term aarch64_sp.
-pub fn constructor_aarch64_sp<C: Context>(ctx: &mut C) -> Reg {
-    let v0 = C::preg_sp(ctx);
-    let v1 = constructor_mov_from_preg(ctx, v0);
-    // Rule at src/isa/aarch64/inst.isle line 3346.
-    return v1;
-}
-
-// Generated as internal constructor for term aarch64_fp.
-pub fn constructor_aarch64_fp<C: Context>(ctx: &mut C) -> Reg {
-    let v0 = C::preg_fp(ctx);
-    let v1 = constructor_mov_from_preg(ctx, v0);
-    // Rule at src/isa/aarch64/inst.isle line 3350.
-    return v1;
-}
-
-// Generated as internal constructor for term aarch64_link.
-pub fn constructor_aarch64_link<C: Context>(ctx: &mut C) -> Reg {
-    let v0 = C::preserve_frame_pointers(ctx);
-    if let Some(v1) = v0 {
-        let v2 = C::sign_return_address_disabled(ctx);
-        if let Some(v3) = v2 {
-            let v5 = C::temp_writable_reg(ctx, I64);
-            let v7 = AMode::FPOffset { off: 0x8, ty: I64 };
-            let v8 = C::mem_flags_trusted(ctx);
-            let v9 = MInst::ULoad64 {
-                rd: v5,
-                mem: v7,
-                flags: v8,
-            };
-            let v10 = C::emit(ctx, &v9);
-            let v11 = C::writable_reg_to_reg(ctx, v5);
-            // Rule at src/isa/aarch64/inst.isle line 3354.
-            return v11;
-        }
-        let v12 = C::writable_link_reg(ctx);
-        let v7 = AMode::FPOffset { off: 0x8, ty: I64 };
-        let v8 = C::mem_flags_trusted(ctx);
-        let v13 = MInst::ULoad64 {
-            rd: v12,
-            mem: v7,
-            flags: v8,
-        };
-        let v14 = C::emit(ctx, &v13);
-        let v16 = C::emit(ctx, &MInst::Xpaclri);
-        let v17 = C::preg_link(ctx);
-        let v18 = constructor_mov_from_preg(ctx, v17);
-        // Rule at src/isa/aarch64/inst.isle line 3370.
-        return v18;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "aarch64_link", "src/isa/aarch64/inst.isle line 3353"
-    )
-}
-
-// Generated as internal constructor for term max_shift.
-pub fn constructor_max_shift<C: Context>(ctx: &mut C, arg0: Type) -> u8 {
-    match arg0 {
-        F32 => {
-            // Rule at src/isa/aarch64/inst.isle line 3386.
-            return 0x1F;
-        }
-        F64 => {
-            // Rule at src/isa/aarch64/inst.isle line 3385.
-            return 0x3F;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "max_shift", "src/isa/aarch64/inst.isle line 3384"
-    )
-}
-
-// Generated as internal constructor for term fcopy_sign.
-pub fn constructor_fcopy_sign<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg, arg2: Type) -> Reg {
-    let v3 = C::ty_scalar_float(ctx, arg2);
-    if let Some(v4) = v3 {
-        let v6 = C::temp_writable_reg(ctx, F64);
-        let v8 = constructor_max_shift(ctx, v4);
-        let v7 = C::ty_bits(ctx, v4);
-        let v9 = &C::fpu_op_ri_ushr(ctx, v7, v8);
-        let v10 = constructor_fpu_rri(ctx, v9, arg1);
-        let v11 = constructor_max_shift(ctx, v4);
-        let v12 = &C::fpu_op_ri_sli(ctx, v7, v11);
-        let v13 = MInst::FpuRRIMod {
-            fpu_op: v12.clone(),
-            rd: v6,
-            ri: arg0,
-            rn: v10,
-        };
-        let v14 = C::emit(ctx, &v13);
-        let v15 = C::writable_reg_to_reg(ctx, v6);
-        // Rule at src/isa/aarch64/inst.isle line 3391.
-        return v15;
-    }
-    let v16 = C::multi_lane(ctx, arg2);
-    if let Some(v17) = v16 {
-        let v21 = C::temp_writable_reg(ctx, I8X16);
-        let v22 = C::lane_type(ctx, arg2);
-        let v23 = constructor_max_shift(ctx, v22);
-        let v24 = &constructor_vector_size(ctx, arg2);
-        let v25 = constructor_ushr_vec_imm(ctx, arg1, v23, v24);
-        let v27 = &constructor_vector_size(ctx, arg2);
-        let v28 = constructor_max_shift(ctx, v22);
-        let v29 = MInst::VecShiftImmMod {
-            op: VecShiftImmModOp::Sli,
-            rd: v21,
-            ri: arg0,
-            rn: v25,
-            size: v27.clone(),
-            imm: v28,
-        };
-        let v30 = C::emit(ctx, &v29);
-        let v31 = C::writable_reg_to_reg(ctx, v21);
-        // Rule at src/isa/aarch64/inst.isle line 3396.
-        return v31;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "fcopy_sign", "src/isa/aarch64/inst.isle line 3390"
-    )
-}
-
-// Generated as internal constructor for term fpu_to_int_nan_check.
-pub fn constructor_fpu_to_int_nan_check<C: Context>(
-    ctx: &mut C,
-    arg0: &ScalarSize,
-    arg1: Reg,
-) -> Reg {
-    let v2 = &constructor_fpu_cmp(ctx, arg0, arg1, arg1);
-    let v4 = C::cond_br_cond(ctx, &Cond::Vs);
-    let v5 = &C::trap_code_bad_conversion_to_integer(ctx);
-    let v6 = MInst::TrapIf {
-        kind: v4,
-        trap_code: v5.clone(),
-    };
-    let v7 = ConsumesFlags::ConsumesFlagsReturnsReg {
-        inst: v6,
-        result: arg1,
-    };
-    let v8 = constructor_with_flags(ctx, v2, &v7);
-    let v10 = C::value_regs_get(ctx, v8, 0x0);
-    // Rule at src/isa/aarch64/inst.isle line 3405.
-    return v10;
-}
-
-// Generated as internal constructor for term fpu_to_int_underflow_check.
-pub fn constructor_fpu_to_int_underflow_check<C: Context>(
-    ctx: &mut C,
-    arg0: bool,
-    arg1: Type,
-    arg2: Type,
-    arg3: Reg,
-    arg4: Reg,
-) -> Reg {
-    match arg0 {
-        true => {
-            match arg1 {
-                F32 => {
-                    let v3 = C::fits_in_16(ctx, arg2);
-                    if let Some(v4) = v3 {
-                        let v8 = &constructor_fpu_cmp(ctx, &ScalarSize::Size32, arg3, arg4);
-                        let v10 = C::cond_br_cond(ctx, &Cond::Le);
-                        let v11 = &C::trap_code_integer_overflow(ctx);
-                        let v12 = MInst::TrapIf {
-                            kind: v10,
-                            trap_code: v11.clone(),
-                        };
-                        let v13 = ConsumesFlags::ConsumesFlagsReturnsReg {
-                            inst: v12,
-                            result: arg3,
-                        };
-                        let v14 = constructor_with_flags(ctx, v8, &v13);
-                        let v16 = C::value_regs_get(ctx, v14, 0x0);
-                        // Rule at src/isa/aarch64/inst.isle line 3418.
-                        return v16;
-                    }
-                }
-                F64 => {
-                    let v17 = C::fits_in_32(ctx, arg2);
-                    if let Some(v18) = v17 {
-                        let v20 = &constructor_fpu_cmp(ctx, &ScalarSize::Size64, arg3, arg4);
-                        let v10 = C::cond_br_cond(ctx, &Cond::Le);
-                        let v11 = &C::trap_code_integer_overflow(ctx);
-                        let v12 = MInst::TrapIf {
-                            kind: v10,
-                            trap_code: v11.clone(),
-                        };
-                        let v13 = ConsumesFlags::ConsumesFlagsReturnsReg {
-                            inst: v12,
-                            result: arg3,
-                        };
-                        let v21 = constructor_with_flags(ctx, v20, &v13);
-                        let v22 = C::value_regs_get(ctx, v21, 0x0);
-                        // Rule at src/isa/aarch64/inst.isle line 3426.
-                        return v22;
-                    }
-                }
-                _ => {}
-            }
-            let v23 = &constructor_scalar_size(ctx, arg1);
-            let v24 = &constructor_fpu_cmp(ctx, v23, arg3, arg4);
-            let v26 = C::cond_br_cond(ctx, &Cond::Lt);
-            let v11 = &C::trap_code_integer_overflow(ctx);
-            let v27 = MInst::TrapIf {
-                kind: v26,
-                trap_code: v11.clone(),
-            };
-            let v28 = ConsumesFlags::ConsumesFlagsReturnsReg {
-                inst: v27,
-                result: arg3,
-            };
-            let v29 = constructor_with_flags(ctx, v24, &v28);
-            let v30 = C::value_regs_get(ctx, v29, 0x0);
-            // Rule at src/isa/aarch64/inst.isle line 3434.
-            return v30;
-        }
-        false => {
-            let v23 = &constructor_scalar_size(ctx, arg1);
-            let v24 = &constructor_fpu_cmp(ctx, v23, arg3, arg4);
-            let v31 = C::cond_br_cond(ctx, &Cond::Le);
-            let v11 = &C::trap_code_integer_overflow(ctx);
-            let v32 = MInst::TrapIf {
-                kind: v31,
-                trap_code: v11.clone(),
-            };
-            let v33 = ConsumesFlags::ConsumesFlagsReturnsReg {
-                inst: v32,
-                result: arg3,
-            };
-            let v34 = constructor_with_flags(ctx, v24, &v33);
-            let v35 = C::value_regs_get(ctx, v34, 0x0);
-            // Rule at src/isa/aarch64/inst.isle line 3442.
-            return v35;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "fpu_to_int_underflow_check", "src/isa/aarch64/inst.isle line 3417"
-    )
-}
-
-// Generated as internal constructor for term fpu_to_int_overflow_check.
-pub fn constructor_fpu_to_int_overflow_check<C: Context>(
-    ctx: &mut C,
-    arg0: &ScalarSize,
-    arg1: Reg,
-    arg2: Reg,
-) -> Reg {
-    let v3 = &constructor_fpu_cmp(ctx, arg0, arg1, arg2);
-    let v5 = C::cond_br_cond(ctx, &Cond::Ge);
-    let v6 = &C::trap_code_integer_overflow(ctx);
-    let v7 = MInst::TrapIf {
-        kind: v5,
-        trap_code: v6.clone(),
-    };
-    let v8 = ConsumesFlags::ConsumesFlagsReturnsReg {
-        inst: v7,
-        result: arg1,
-    };
-    let v9 = constructor_with_flags(ctx, v3, &v8);
-    let v11 = C::value_regs_get(ctx, v9, 0x0);
-    // Rule at src/isa/aarch64/inst.isle line 3452.
-    return v11;
-}
-
-// Generated as internal constructor for term fpu_to_int_cvt.
-pub fn constructor_fpu_to_int_cvt<C: Context>(
-    ctx: &mut C,
-    arg0: &FpuToIntOp,
-    arg1: Reg,
-    arg2: bool,
-    arg3: Type,
-    arg4: Type,
-) -> Reg {
-    let v5 = &constructor_scalar_size(ctx, arg3);
-    let v8 = constructor_fpu_to_int_nan_check(ctx, v5, arg1);
-    let v6 = C::ty_bits(ctx, arg3);
-    let v7 = C::ty_bits(ctx, arg4);
-    let v9 = C::min_fp_value(ctx, arg2, v6, v7);
-    let v10 = constructor_fpu_to_int_underflow_check(ctx, arg2, arg3, arg4, v8, v9);
-    let v11 = C::max_fp_value(ctx, arg2, v6, v7);
-    let v12 = constructor_fpu_to_int_overflow_check(ctx, v5, v10, v11);
-    let v13 = constructor_fpu_to_int(ctx, arg0, v12);
-    // Rule at src/isa/aarch64/inst.isle line 3468.
-    return v13;
-}
-
-// Generated as internal constructor for term fpu_to_int_cvt_sat.
-pub fn constructor_fpu_to_int_cvt_sat<C: Context>(
-    ctx: &mut C,
-    arg0: &FpuToIntOp,
-    arg1: Reg,
-    arg2: bool,
-    arg3: Type,
-) -> Reg {
-    match arg3 {
-        I32 => {
-            let v4 = constructor_fpu_to_int(ctx, arg0, arg1);
-            // Rule at src/isa/aarch64/inst.isle line 3487.
-            return v4;
-        }
-        I64 => {
-            let v4 = constructor_fpu_to_int(ctx, arg0, arg1);
-            // Rule at src/isa/aarch64/inst.isle line 3485.
-            return v4;
-        }
-        _ => {}
-    }
-    match arg2 {
-        true => {
-            let v5 = C::fits_in_16(ctx, arg3);
-            if let Some(v6) = v5 {
-                let v4 = constructor_fpu_to_int(ctx, arg0, arg1);
-                let v15 = constructor_signed_max(ctx, v6);
-                let v16 = constructor_signed_min(ctx, v6);
-                let v17 = &constructor_operand_size(ctx, v6);
-                let v18 = &constructor_cmp(ctx, v17, v4, v15);
-                let v20 = &constructor_csel(ctx, &Cond::Gt, v15, v4);
-                let v21 = constructor_with_flags_reg(ctx, v18, v20);
-                let v22 = &constructor_operand_size(ctx, v6);
-                let v23 = &constructor_cmp(ctx, v22, v21, v16);
-                let v25 = &constructor_csel(ctx, &Cond::Lt, v16, v21);
-                let v26 = constructor_with_flags_reg(ctx, v23, v25);
-                // Rule at src/isa/aarch64/inst.isle line 3495.
-                return v26;
-            }
-        }
-        false => {
-            let v5 = C::fits_in_16(ctx, arg3);
-            if let Some(v6) = v5 {
-                let v4 = constructor_fpu_to_int(ctx, arg0, arg1);
-                let v8 = C::ty_mask(ctx, v6);
-                let v9 = constructor_imm(ctx, v6, &ImmExtend::Zero, v8);
-                let v11 = &constructor_cmp(ctx, &OperandSize::Size32, v4, v9);
-                let v13 = &constructor_csel(ctx, &Cond::Hi, v9, v4);
-                let v14 = constructor_with_flags_reg(ctx, v11, v13);
-                // Rule at src/isa/aarch64/inst.isle line 3489.
-                return v14;
-            }
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "fpu_to_int_cvt_sat", "src/isa/aarch64/inst.isle line 3484"
-    )
-}
-
-// Generated as internal constructor for term signed_min.
-pub fn constructor_signed_min<C: Context>(ctx: &mut C, arg0: Type) -> Reg {
-    match arg0 {
-        I8 => {
-            let v4 = constructor_imm(ctx, I8, &ImmExtend::Sign, 0x80);
-            // Rule at src/isa/aarch64/inst.isle line 3508.
-            return v4;
-        }
-        I16 => {
-            let v7 = constructor_imm(ctx, I16, &ImmExtend::Sign, 0x8000);
-            // Rule at src/isa/aarch64/inst.isle line 3509.
-            return v7;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "signed_min", "src/isa/aarch64/inst.isle line 3507"
-    )
-}
-
-// Generated as internal constructor for term signed_max.
-pub fn constructor_signed_max<C: Context>(ctx: &mut C, arg0: Type) -> Reg {
-    match arg0 {
-        I8 => {
-            let v4 = constructor_imm(ctx, I8, &ImmExtend::Sign, 0x7F);
-            // Rule at src/isa/aarch64/inst.isle line 3512.
-            return v4;
-        }
-        I16 => {
-            let v7 = constructor_imm(ctx, I16, &ImmExtend::Sign, 0x7FFF);
-            // Rule at src/isa/aarch64/inst.isle line 3513.
-            return v7;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "signed_max", "src/isa/aarch64/inst.isle line 3511"
-    )
-}
-
-// Generated as internal constructor for term fpu_to_int.
-pub fn constructor_fpu_to_int<C: Context>(ctx: &mut C, arg0: &FpuToIntOp, arg1: Reg) -> Reg {
-    let v3 = C::temp_writable_reg(ctx, I64);
-    let v4 = MInst::FpuToInt {
-        op: arg0.clone(),
-        rd: v3,
-        rn: arg1,
-    };
-    let v5 = C::emit(ctx, &v4);
-    let v6 = C::writable_reg_to_reg(ctx, v3);
-    // Rule at src/isa/aarch64/inst.isle line 3516.
-    return v6;
-}
-
-// Generated as internal constructor for term int_to_fpu.
-pub fn constructor_int_to_fpu<C: Context>(ctx: &mut C, arg0: &IntToFpuOp, arg1: Reg) -> Reg {
-    let v3 = C::temp_writable_reg(ctx, I8X16);
-    let v4 = MInst::IntToFpu {
-        op: arg0.clone(),
-        rd: v3,
-        rn: arg1,
-    };
-    let v5 = C::emit(ctx, &v4);
-    let v6 = C::writable_reg_to_reg(ctx, v3);
-    // Rule at src/isa/aarch64/inst.isle line 3524.
-    return v6;
-}
-
-// Generated as internal constructor for term write_pinned_reg.
-pub fn constructor_write_pinned_reg<C: Context>(ctx: &mut C, arg0: Reg) -> SideEffectNoResult {
-    let v1 = C::preg_pinned(ctx);
-    let v2 = &constructor_mov_to_preg(ctx, v1, arg0);
-    // Rule at src/isa/aarch64/inst.isle line 3540.
-    return v2.clone();
-}
-
-// Generated as internal constructor for term compute_stack_addr.
-pub fn constructor_compute_stack_addr<C: Context>(
-    ctx: &mut C,
-    arg0: StackSlot,
-    arg1: Offset32,
-) -> Reg {
-    let v3 = C::temp_writable_reg(ctx, I64);
-    let v4 = &C::abi_stackslot_addr(ctx, v3, arg0, arg1);
-    let v5 = C::emit(ctx, v4);
-    let v6 = C::writable_reg_to_reg(ctx, v3);
-    // Rule at src/isa/aarch64/inst.isle line 3546.
-    return v6;
-}
-
-// Generated as internal constructor for term vec_cmp_vc.
-pub fn constructor_vec_cmp_vc<C: Context>(
-    ctx: &mut C,
-    arg0: Reg,
-    arg1: Reg,
-    arg2: &VectorSize,
-) -> Reg {
-    let v4 = constructor_vec_rrr(ctx, &VecALUOp::Fcmeq, arg0, arg0, arg2);
-    let v5 = constructor_vec_rrr(ctx, &VecALUOp::Fcmeq, arg1, arg1, arg2);
-    let v7 = constructor_vec_rrr(ctx, &VecALUOp::And, v4, v5, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 3554.
-    return v7;
-}
-
-// Generated as internal constructor for term vec_cmp.
-pub fn constructor_vec_cmp<C: Context>(
-    ctx: &mut C,
-    arg0: Reg,
-    arg1: Reg,
-    arg2: Type,
-    arg3: &Cond,
-) -> Reg {
-    match arg3 {
-        &Cond::Eq => {
-            let v20 = C::ty_vector_not_float(ctx, arg2);
-            if let Some(v21) = v20 {
-                let v6 = &constructor_vector_size(ctx, arg2);
-                let v23 = constructor_vec_rrr(ctx, &VecALUOp::Cmeq, arg0, arg1, v6);
-                // Rule at src/isa/aarch64/inst.isle line 3598.
-                return v23;
-            }
-            let v4 = C::ty_vector_float(ctx, arg2);
-            if let Some(v5) = v4 {
-                let v6 = &constructor_vector_size(ctx, arg2);
-                let v12 = constructor_vec_rrr(ctx, &VecALUOp::Fcmeq, arg0, arg1, v6);
-                // Rule at src/isa/aarch64/inst.isle line 3576.
-                return v12;
-            }
-        }
-        &Cond::Ne => {
-            let v20 = C::ty_vector_not_float(ctx, arg2);
-            if let Some(v21) = v20 {
-                let v6 = &constructor_vector_size(ctx, arg2);
-                let v23 = constructor_vec_rrr(ctx, &VecALUOp::Cmeq, arg0, arg1, v6);
-                let v9 = &constructor_vector_size(ctx, arg2);
-                let v24 = constructor_vec_misc(ctx, &VecMisc2::Not, v23, v9);
-                // Rule at src/isa/aarch64/inst.isle line 3601.
-                return v24;
-            }
-            let v4 = C::ty_vector_float(ctx, arg2);
-            if let Some(v5) = v4 {
-                let v6 = &constructor_vector_size(ctx, arg2);
-                let v12 = constructor_vec_rrr(ctx, &VecALUOp::Fcmeq, arg0, arg1, v6);
-                let v9 = &constructor_vector_size(ctx, arg2);
-                let v13 = constructor_vec_misc(ctx, &VecMisc2::Not, v12, v9);
-                // Rule at src/isa/aarch64/inst.isle line 3579.
-                return v13;
-            }
-        }
-        &Cond::Hs => {
-            let v20 = C::ty_vector_not_float(ctx, arg2);
-            if let Some(v21) = v20 {
-                let v6 = &constructor_vector_size(ctx, arg2);
-                let v30 = constructor_vec_rrr(ctx, &VecALUOp::Cmhs, arg0, arg1, v6);
-                // Rule at src/isa/aarch64/inst.isle line 3611.
-                return v30;
-            }
-        }
-        &Cond::Lo => {
-            let v20 = C::ty_vector_not_float(ctx, arg2);
-            if let Some(v21) = v20 {
-                let v6 = &constructor_vector_size(ctx, arg2);
-                let v36 = constructor_vec_rrr(ctx, &VecALUOp::Cmhi, arg1, arg0, v6);
-                // Rule at src/isa/aarch64/inst.isle line 3627.
-                return v36;
-            }
-        }
-        &Cond::Mi => {
-            let v4 = C::ty_vector_float(ctx, arg2);
-            if let Some(v5) = v4 {
-                let v6 = &constructor_vector_size(ctx, arg2);
-                let v18 = constructor_vec_rrr(ctx, &VecALUOp::Fcmgt, arg1, arg0, v6);
-                // Rule at src/isa/aarch64/inst.isle line 3590.
-                return v18;
-            }
-        }
-        &Cond::Vs => {
-            let v4 = C::ty_vector_float(ctx, arg2);
-            if let Some(v5) = v4 {
-                let v6 = &constructor_vector_size(ctx, arg2);
-                let v7 = constructor_vec_cmp_vc(ctx, arg0, arg1, v6);
-                let v9 = &constructor_vector_size(ctx, arg2);
-                let v10 = constructor_vec_misc(ctx, &VecMisc2::Not, v7, v9);
-                // Rule at src/isa/aarch64/inst.isle line 3566.
-                return v10;
-            }
-        }
-        &Cond::Vc => {
-            let v4 = C::ty_vector_float(ctx, arg2);
-            if let Some(v5) = v4 {
-                let v6 = &constructor_vector_size(ctx, arg2);
-                let v7 = constructor_vec_cmp_vc(ctx, arg0, arg1, v6);
-                // Rule at src/isa/aarch64/inst.isle line 3563.
-                return v7;
-            }
-        }
-        &Cond::Hi => {
-            let v20 = C::ty_vector_not_float(ctx, arg2);
-            if let Some(v21) = v20 {
-                let v6 = &constructor_vector_size(ctx, arg2);
-                let v32 = constructor_vec_rrr(ctx, &VecALUOp::Cmhi, arg0, arg1, v6);
-                // Rule at src/isa/aarch64/inst.isle line 3614.
-                return v32;
-            }
-        }
-        &Cond::Ls => {
-            let v20 = C::ty_vector_not_float(ctx, arg2);
-            if let Some(v21) = v20 {
-                let v6 = &constructor_vector_size(ctx, arg2);
-                let v35 = constructor_vec_rrr(ctx, &VecALUOp::Cmhs, arg1, arg0, v6);
-                // Rule at src/isa/aarch64/inst.isle line 3624.
-                return v35;
-            }
-            let v4 = C::ty_vector_float(ctx, arg2);
-            if let Some(v5) = v4 {
-                let v6 = &constructor_vector_size(ctx, arg2);
-                let v19 = constructor_vec_rrr(ctx, &VecALUOp::Fcmge, arg1, arg0, v6);
-                // Rule at src/isa/aarch64/inst.isle line 3593.
-                return v19;
-            }
-        }
-        &Cond::Ge => {
-            let v20 = C::ty_vector_not_float(ctx, arg2);
-            if let Some(v21) = v20 {
-                let v6 = &constructor_vector_size(ctx, arg2);
-                let v26 = constructor_vec_rrr(ctx, &VecALUOp::Cmge, arg0, arg1, v6);
-                // Rule at src/isa/aarch64/inst.isle line 3605.
-                return v26;
-            }
-            let v4 = C::ty_vector_float(ctx, arg2);
-            if let Some(v5) = v4 {
-                let v6 = &constructor_vector_size(ctx, arg2);
-                let v15 = constructor_vec_rrr(ctx, &VecALUOp::Fcmge, arg0, arg1, v6);
-                // Rule at src/isa/aarch64/inst.isle line 3583.
-                return v15;
-            }
-        }
-        &Cond::Lt => {
-            let v20 = C::ty_vector_not_float(ctx, arg2);
-            if let Some(v21) = v20 {
-                let v6 = &constructor_vector_size(ctx, arg2);
-                let v34 = constructor_vec_rrr(ctx, &VecALUOp::Cmgt, arg1, arg0, v6);
-                // Rule at src/isa/aarch64/inst.isle line 3621.
-                return v34;
-            }
-        }
-        &Cond::Gt => {
-            let v20 = C::ty_vector_not_float(ctx, arg2);
-            if let Some(v21) = v20 {
-                let v6 = &constructor_vector_size(ctx, arg2);
-                let v28 = constructor_vec_rrr(ctx, &VecALUOp::Cmgt, arg0, arg1, v6);
-                // Rule at src/isa/aarch64/inst.isle line 3608.
-                return v28;
-            }
-            let v4 = C::ty_vector_float(ctx, arg2);
-            if let Some(v5) = v4 {
-                let v6 = &constructor_vector_size(ctx, arg2);
-                let v17 = constructor_vec_rrr(ctx, &VecALUOp::Fcmgt, arg0, arg1, v6);
-                // Rule at src/isa/aarch64/inst.isle line 3586.
-                return v17;
-            }
-        }
-        &Cond::Le => {
-            let v20 = C::ty_vector_not_float(ctx, arg2);
-            if let Some(v21) = v20 {
-                let v6 = &constructor_vector_size(ctx, arg2);
-                let v33 = constructor_vec_rrr(ctx, &VecALUOp::Cmge, arg1, arg0, v6);
-                // Rule at src/isa/aarch64/inst.isle line 3618.
-                return v33;
-            }
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_cmp", "src/isa/aarch64/inst.isle line 3560"
-    )
-}
-
-// Generated as internal constructor for term vanytrue.
-pub fn constructor_vanytrue<C: Context>(ctx: &mut C, arg0: Reg, arg1: Type) -> ProducesFlags {
-    let v2 = C::ty_vec128(ctx, arg1);
-    if let Some(v3) = v2 {
-        let v6 = constructor_vec_rrr(ctx, &VecALUOp::Umaxp, arg0, arg0, &VectorSize::Size32x4);
-        let v9 = constructor_mov_from_vec(ctx, v6, 0x0, &ScalarSize::Size64);
-        let v11 = C::u8_into_imm12(ctx, 0x0);
-        let v12 = &constructor_cmp_imm(ctx, &OperandSize::Size64, v9, v11);
-        // Rule at src/isa/aarch64/inst.isle line 3639.
-        return v12.clone();
-    }
-    let v13 = C::ty_vec64_ctor(ctx, arg1);
-    if let Some(v14) = v13 {
-        let v15 = constructor_mov_from_vec(ctx, arg0, 0x0, &ScalarSize::Size64);
-        let v16 = C::u8_into_imm12(ctx, 0x0);
-        let v17 = &constructor_cmp_imm(ctx, &OperandSize::Size64, v15, v16);
-        // Rule at src/isa/aarch64/inst.isle line 3643.
-        return v17.clone();
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vanytrue", "src/isa/aarch64/inst.isle line 3638"
-    )
-}
-
-// Generated as internal constructor for term elf_tls_get_addr.
-pub fn constructor_elf_tls_get_addr<C: Context>(ctx: &mut C, arg0: ExternalName) -> Reg {
-    let v2 = C::temp_writable_reg(ctx, I64);
-    let v3 = MInst::ElfTlsGetAddr {
-        symbol: arg0,
-        rd: v2,
-    };
-    let v4 = C::emit(ctx, &v3);
-    let v5 = C::writable_reg_to_reg(ctx, v2);
-    // Rule at src/isa/aarch64/inst.isle line 3652.
-    return v5;
-}
-
-// Generated as internal constructor for term macho_tls_get_addr.
-pub fn constructor_macho_tls_get_addr<C: Context>(ctx: &mut C, arg0: ExternalName) -> Reg {
-    let v2 = C::temp_writable_reg(ctx, I64);
-    let v3 = MInst::MachOTlsGetAddr {
-        symbol: arg0,
-        rd: v2,
-    };
-    let v4 = C::emit(ctx, &v3);
-    let v5 = C::writable_reg_to_reg(ctx, v2);
-    // Rule at src/isa/aarch64/inst.isle line 3658.
-    return v5;
-}
-
-// Generated as internal constructor for term flags_and_cc.
-pub fn constructor_flags_and_cc<C: Context>(
-    ctx: &mut C,
-    arg0: &ProducesFlags,
-    arg1: &IntCC,
-) -> FlagsAndCC {
-    let v2 = FlagsAndCC::FlagsAndCC {
-        flags: arg0.clone(),
-        cc: arg1.clone(),
-    };
-    // Rule at src/isa/aarch64/inst.isle line 3669.
-    return v2;
-}
-
-// Generated as internal constructor for term flags_and_cc_to_bool.
-pub fn constructor_flags_and_cc_to_bool<C: Context>(ctx: &mut C, arg0: &FlagsAndCC) -> ValueRegs {
-    if let &FlagsAndCC::FlagsAndCC {
-        flags: ref v1,
-        cc: ref v2,
-    } = arg0
-    {
-        let v3 = &C::cond_code(ctx, v2);
-        let v4 = &constructor_materialize_bool_result(ctx, v3);
-        let v5 = constructor_with_flags(ctx, v1, v4);
-        // Rule at src/isa/aarch64/inst.isle line 3673.
-        return v5;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "flags_and_cc_to_bool", "src/isa/aarch64/inst.isle line 3672"
-    )
-}
-
-// Generated as internal constructor for term flags_and_cc_flags.
-pub fn constructor_flags_and_cc_flags<C: Context>(ctx: &mut C, arg0: &FlagsAndCC) -> ProducesFlags {
-    if let &FlagsAndCC::FlagsAndCC {
-        flags: ref v1,
-        cc: ref v2,
-    } = arg0
-    {
-        // Rule at src/isa/aarch64/inst.isle line 3678.
-        return v1.clone();
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "flags_and_cc_flags", "src/isa/aarch64/inst.isle line 3677"
-    )
-}
-
-// Generated as internal constructor for term flags_and_cc_cc.
-pub fn constructor_flags_and_cc_cc<C: Context>(ctx: &mut C, arg0: &FlagsAndCC) -> IntCC {
-    if let &FlagsAndCC::FlagsAndCC {
-        flags: ref v1,
-        cc: ref v2,
-    } = arg0
-    {
-        // Rule at src/isa/aarch64/inst.isle line 3682.
-        return v2.clone();
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "flags_and_cc_cc", "src/isa/aarch64/inst.isle line 3681"
-    )
-}
-
-// Generated as internal constructor for term lower_icmp.
-pub fn constructor_lower_icmp<C: Context>(
-    ctx: &mut C,
-    arg0: &IntCC,
-    arg1: Value,
-    arg2: Value,
-    arg3: Type,
-) -> FlagsAndCC {
-    let v4 = C::fits_in_16(ctx, arg3);
-    if let Some(v5) = v4 {
-        let v6 = &C::signed_cond_code(ctx, arg0);
-        if let Some(v7) = v6 {
-            let v8 = constructor_put_in_reg_sext32(ctx, arg1);
-            let v9 = &constructor_operand_size(ctx, v5);
-            let v10 = C::put_in_reg(ctx, arg2);
-            let v12 = &constructor_lower_extend_op(ctx, v5, &ArgumentExtension::Sext);
-            let v13 = &constructor_cmp_extend(ctx, v9, v8, v10, v12);
-            let v14 = &constructor_flags_and_cc(ctx, v13, arg0);
-            // Rule at src/isa/aarch64/inst.isle line 3716.
-            return v14.clone();
-        }
-    }
-    if arg3 == I128 {
-        match arg0 {
-            &IntCC::Equal => {
-                let v37 = &constructor_lower_icmp_i128_eq_ne(ctx, arg1, arg2);
-                let v39 = &constructor_flags_and_cc(ctx, v37, &IntCC::Equal);
-                // Rule at src/isa/aarch64/inst.isle line 3782.
-                return v39.clone();
-            }
-            &IntCC::NotEqual => {
-                let v37 = &constructor_lower_icmp_i128_eq_ne(ctx, arg1, arg2);
-                let v41 = &constructor_flags_and_cc(ctx, v37, &IntCC::NotEqual);
-                // Rule at src/isa/aarch64/inst.isle line 3784.
-                return v41.clone();
-            }
-            _ => {}
-        }
-    }
-    if let Some(v5) = v4 {
-        let v15 = C::def_inst(ctx, arg2);
-        if let Some(v16) = v15 {
-            let v17 = &C::inst_data(ctx, v16);
-            if let &InstructionData::UnaryImm {
-                opcode: ref v18,
-                imm: v19,
-            } = v17
-            {
-                if let &Opcode::Iconst = v18 {
-                    let v20 = C::u64_from_imm64(ctx, v19);
-                    let v21 = C::imm12_from_u64(ctx, v20);
-                    if let Some(v22) = v21 {
-                        let v23 = constructor_put_in_reg_zext32(ctx, arg1);
-                        let v9 = &constructor_operand_size(ctx, v5);
-                        let v24 = &constructor_cmp_imm(ctx, v9, v23, v22);
-                        let v25 = &constructor_flags_and_cc(ctx, v24, arg0);
-                        // Rule at src/isa/aarch64/inst.isle line 3720.
-                        return v25.clone();
-                    }
-                }
-            }
-        }
-        let v23 = constructor_put_in_reg_zext32(ctx, arg1);
-        let v9 = &constructor_operand_size(ctx, v5);
-        let v10 = C::put_in_reg(ctx, arg2);
-        let v27 = &constructor_lower_extend_op(ctx, v5, &ArgumentExtension::Uext);
-        let v28 = &constructor_cmp_extend(ctx, v9, v23, v10, v27);
-        let v29 = &constructor_flags_and_cc(ctx, v28, arg0);
-        // Rule at src/isa/aarch64/inst.isle line 3723.
-        return v29.clone();
-    }
-    let v30 = C::ty_int_ref_scalar_64(ctx, arg3);
-    if let Some(v31) = v30 {
-        let v15 = C::def_inst(ctx, arg2);
-        if let Some(v16) = v15 {
-            let v17 = &C::inst_data(ctx, v16);
-            if let &InstructionData::UnaryImm {
-                opcode: ref v18,
-                imm: v19,
-            } = v17
-            {
-                if let &Opcode::Iconst = v18 {
-                    let v20 = C::u64_from_imm64(ctx, v19);
-                    let v32 = &constructor_lower_icmp_const(ctx, arg0, arg1, v20, arg3);
-                    // Rule at src/isa/aarch64/inst.isle line 3726.
-                    return v32.clone();
-                }
-            }
-        }
-        let v33 = &constructor_operand_size(ctx, arg3);
-        let v34 = C::put_in_reg(ctx, arg1);
-        let v10 = C::put_in_reg(ctx, arg2);
-        let v35 = &constructor_cmp(ctx, v33, v34, v10);
-        let v36 = &constructor_flags_and_cc(ctx, v35, arg0);
-        // Rule at src/isa/aarch64/inst.isle line 3729.
-        return v36.clone();
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "lower_icmp", "src/isa/aarch64/inst.isle line 3687"
-    )
-}
-
-// Generated as internal constructor for term lower_icmp_into_reg.
-pub fn constructor_lower_icmp_into_reg<C: Context>(
-    ctx: &mut C,
-    arg0: &IntCC,
-    arg1: Value,
-    arg2: Value,
-    arg3: Type,
-    arg4: Type,
-) -> ValueRegs {
-    let v4 = C::multi_lane(ctx, arg3);
-    if let Some(v5) = v4 {
-        let v9 = &C::cond_code(ctx, arg0);
-        let v10 = C::put_in_reg(ctx, arg1);
-        let v11 = C::put_in_reg(ctx, arg2);
-        let v12 = constructor_vec_cmp(ctx, v10, v11, arg3, v9);
-        let v13 = C::value_reg(ctx, v12);
-        // Rule at src/isa/aarch64/inst.isle line 3697.
-        return v13;
-    }
-    if arg3 == I128 {
-        if arg4 == I8 {
-            match arg0 {
-                &IntCC::Equal => {
-                    let v9 = &C::cond_code(ctx, arg0);
-                    let v19 = &constructor_lower_icmp(ctx, arg0, arg1, arg2, I128);
-                    let v20 = constructor_flags_and_cc_to_bool(ctx, v19);
-                    // Rule at src/isa/aarch64/inst.isle line 3759.
-                    return v20;
-                }
-                &IntCC::NotEqual => {
-                    let v9 = &C::cond_code(ctx, arg0);
-                    let v19 = &constructor_lower_icmp(ctx, arg0, arg1, arg2, I128);
-                    let v20 = constructor_flags_and_cc_to_bool(ctx, v19);
-                    // Rule at src/isa/aarch64/inst.isle line 3763.
-                    return v20;
-                }
-                _ => {}
-            }
-            let v21 = &C::intcc_unsigned(ctx, arg0);
-            let v22 = &C::cond_code(ctx, v21);
-            let v23 = &C::cond_code(ctx, arg0);
-            let v24 = C::put_in_regs(ctx, arg1);
-            let v25 = C::put_in_regs(ctx, arg2);
-            let v27 = C::value_regs_get(ctx, v24, 0x0);
-            let v29 = C::value_regs_get(ctx, v24, 0x1);
-            let v30 = C::value_regs_get(ctx, v25, 0x0);
-            let v31 = C::value_regs_get(ctx, v25, 0x1);
-            let v33 = &constructor_cmp(ctx, &OperandSize::Size64, v27, v30);
-            let v34 = &constructor_materialize_bool_result(ctx, v22);
-            let v35 = constructor_with_flags_reg(ctx, v33, v34);
-            let v36 = &constructor_cmp(ctx, &OperandSize::Size64, v29, v31);
-            let v37 = &constructor_lower_icmp_i128_consumer(ctx, v23, v35);
-            let v38 = constructor_with_flags(ctx, v36, v37);
-            // Rule at src/isa/aarch64/inst.isle line 3792.
-            return v38;
-        }
-    }
-    let v14 = C::ty_int_ref_scalar_64(ctx, arg3);
-    if let Some(v15) = v14 {
-        let v9 = &C::cond_code(ctx, arg0);
-        let v16 = &constructor_lower_icmp(ctx, arg0, arg1, arg2, arg3);
-        let v17 = constructor_flags_and_cc_to_bool(ctx, v16);
-        // Rule at src/isa/aarch64/inst.isle line 3711.
-        return v17;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "lower_icmp_into_reg", "src/isa/aarch64/inst.isle line 3688"
-    )
-}
-
-// Generated as internal constructor for term lower_icmp_into_flags.
-pub fn constructor_lower_icmp_into_flags<C: Context>(
-    ctx: &mut C,
-    arg0: &IntCC,
-    arg1: Value,
-    arg2: Value,
-    arg3: Type,
-) -> FlagsAndCC {
-    match arg0 {
-        &IntCC::SignedGreaterThan => {
-            if arg3 == I128 {
-                let v7 = constructor_lower_icmp_into_reg(ctx, arg0, arg1, arg2, I128, I8);
-                let v9 = C::value_regs_get(ctx, v7, 0x0);
-                let v25 = C::zero_reg(ctx);
-                let v26 = &constructor_cmp(ctx, &OperandSize::Size64, v9, v25);
-                let v27 = &constructor_flags_and_cc(ctx, v26, arg0);
-                // Rule at src/isa/aarch64/inst.isle line 3887.
-                return v27.clone();
-            }
-        }
-        &IntCC::SignedGreaterThanOrEqual => {
-            if arg3 == I128 {
-                let v7 = constructor_lower_icmp_into_reg(ctx, arg0, arg1, arg2, I128, I8);
-                let v9 = C::value_regs_get(ctx, v7, 0x0);
-                let v13 = constructor_imm(ctx, I64, &ImmExtend::Sign, 0x1);
-                let v15 = &constructor_cmp(ctx, &OperandSize::Size64, v9, v13);
-                let v16 = &constructor_flags_and_cc(ctx, v15, arg0);
-                // Rule at src/isa/aarch64/inst.isle line 3866.
-                return v16.clone();
-            }
-        }
-        &IntCC::SignedLessThan => {
-            if arg3 == I128 {
-                let v7 = constructor_lower_icmp_into_reg(ctx, arg0, arg1, arg2, I128, I8);
-                let v9 = C::value_regs_get(ctx, v7, 0x0);
-                let v25 = C::zero_reg(ctx);
-                let v28 = &constructor_cmp(ctx, &OperandSize::Size64, v25, v9);
-                let v29 = &constructor_flags_and_cc(ctx, v28, arg0);
-                // Rule at src/isa/aarch64/inst.isle line 3895.
-                return v29.clone();
-            }
-        }
-        &IntCC::SignedLessThanOrEqual => {
-            if arg3 == I128 {
-                let v7 = constructor_lower_icmp_into_reg(ctx, arg0, arg1, arg2, I128, I8);
-                let v9 = C::value_regs_get(ctx, v7, 0x0);
-                let v13 = constructor_imm(ctx, I64, &ImmExtend::Sign, 0x1);
-                let v21 = &constructor_cmp(ctx, &OperandSize::Size64, v13, v9);
-                let v22 = &constructor_flags_and_cc(ctx, v21, arg0);
-                // Rule at src/isa/aarch64/inst.isle line 3876.
-                return v22.clone();
-            }
-        }
-        &IntCC::UnsignedGreaterThan => {
-            if arg3 == I128 {
-                let v7 = constructor_lower_icmp_into_reg(ctx, arg0, arg1, arg2, I128, I8);
-                let v9 = C::value_regs_get(ctx, v7, 0x0);
-                let v25 = C::zero_reg(ctx);
-                let v26 = &constructor_cmp(ctx, &OperandSize::Size64, v9, v25);
-                let v27 = &constructor_flags_and_cc(ctx, v26, arg0);
-                // Rule at src/isa/aarch64/inst.isle line 3891.
-                return v27.clone();
-            }
-        }
-        &IntCC::UnsignedGreaterThanOrEqual => {
-            if arg3 == I128 {
-                let v7 = constructor_lower_icmp_into_reg(ctx, arg0, arg1, arg2, I128, I8);
-                let v9 = C::value_regs_get(ctx, v7, 0x0);
-                let v18 = constructor_imm(ctx, I64, &ImmExtend::Zero, 0x1);
-                let v19 = &constructor_cmp(ctx, &OperandSize::Size64, v9, v18);
-                let v20 = &constructor_flags_and_cc(ctx, v19, arg0);
-                // Rule at src/isa/aarch64/inst.isle line 3871.
-                return v20.clone();
-            }
-        }
-        &IntCC::UnsignedLessThan => {
-            if arg3 == I128 {
-                let v7 = constructor_lower_icmp_into_reg(ctx, arg0, arg1, arg2, I128, I8);
-                let v9 = C::value_regs_get(ctx, v7, 0x0);
-                let v25 = C::zero_reg(ctx);
-                let v28 = &constructor_cmp(ctx, &OperandSize::Size64, v25, v9);
-                let v29 = &constructor_flags_and_cc(ctx, v28, arg0);
-                // Rule at src/isa/aarch64/inst.isle line 3899.
-                return v29.clone();
-            }
-        }
-        &IntCC::UnsignedLessThanOrEqual => {
-            if arg3 == I128 {
-                let v7 = constructor_lower_icmp_into_reg(ctx, arg0, arg1, arg2, I128, I8);
-                let v9 = C::value_regs_get(ctx, v7, 0x0);
-                let v18 = constructor_imm(ctx, I64, &ImmExtend::Zero, 0x1);
-                let v23 = &constructor_cmp(ctx, &OperandSize::Size64, v18, v9);
-                let v24 = &constructor_flags_and_cc(ctx, v23, arg0);
-                // Rule at src/isa/aarch64/inst.isle line 3881.
-                return v24.clone();
-            }
-        }
-        _ => {}
-    }
-    let v4 = &constructor_lower_icmp(ctx, arg0, arg1, arg2, arg3);
-    // Rule at src/isa/aarch64/inst.isle line 3693.
-    return v4.clone();
-}
-
-// Generated as internal constructor for term lower_icmp_const.
-pub fn constructor_lower_icmp_const<C: Context>(
-    ctx: &mut C,
-    arg0: &IntCC,
-    arg1: Value,
-    arg2: u64,
-    arg3: Type,
-) -> FlagsAndCC {
-    let v4 = C::ty_int_ref_scalar_64(ctx, arg3);
-    if let Some(v5) = v4 {
-        match arg0 {
-            &IntCC::SignedGreaterThanOrEqual => {
-                let v6 = C::u64_is_odd(ctx, arg2);
-                if v6 == true {
-                    let v8 = C::u64_sub(ctx, arg2, 0x1);
-                    let v9 = C::imm12_from_u64(ctx, v8);
-                    if let Some(v10) = v9 {
-                        let v11 = &constructor_operand_size(ctx, arg3);
-                        let v12 = C::put_in_reg(ctx, arg1);
-                        let v13 = &constructor_cmp_imm(ctx, v11, v12, v10);
-                        let v17 = &constructor_flags_and_cc(ctx, v13, &IntCC::SignedGreaterThan);
-                        // Rule at src/isa/aarch64/inst.isle line 3744.
-                        return v17.clone();
-                    }
-                }
-            }
-            &IntCC::UnsignedGreaterThanOrEqual => {
-                let v6 = C::u64_is_odd(ctx, arg2);
-                if v6 == true {
-                    let v8 = C::u64_sub(ctx, arg2, 0x1);
-                    let v9 = C::imm12_from_u64(ctx, v8);
-                    if let Some(v10) = v9 {
-                        let v11 = &constructor_operand_size(ctx, arg3);
-                        let v12 = C::put_in_reg(ctx, arg1);
-                        let v13 = &constructor_cmp_imm(ctx, v11, v12, v10);
-                        let v15 = &constructor_flags_and_cc(ctx, v13, &IntCC::UnsignedGreaterThan);
-                        // Rule at src/isa/aarch64/inst.isle line 3739.
-                        return v15.clone();
-                    }
-                }
-            }
-            _ => {}
-        }
-        let v18 = C::imm12_from_u64(ctx, arg2);
-        if let Some(v19) = v18 {
-            let v11 = &constructor_operand_size(ctx, arg3);
-            let v12 = C::put_in_reg(ctx, arg1);
-            let v20 = &constructor_cmp_imm(ctx, v11, v12, v19);
-            let v21 = &constructor_flags_and_cc(ctx, v20, arg0);
-            // Rule at src/isa/aarch64/inst.isle line 3750.
-            return v21.clone();
-        }
-        let v11 = &constructor_operand_size(ctx, arg3);
-        let v12 = C::put_in_reg(ctx, arg1);
-        let v23 = constructor_imm(ctx, arg3, &ImmExtend::Zero, arg2);
-        let v24 = &constructor_cmp(ctx, v11, v12, v23);
-        let v25 = &constructor_flags_and_cc(ctx, v24, arg0);
-        // Rule at src/isa/aarch64/inst.isle line 3753.
-        return v25.clone();
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "lower_icmp_const", "src/isa/aarch64/inst.isle line 3690"
-    )
-}
-
-// Generated as internal constructor for term lower_extend_op.
-pub fn constructor_lower_extend_op<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &ArgumentExtension,
-) -> ExtendOp {
-    match arg0 {
-        I8 => {
-            match arg1 {
-                &ArgumentExtension::Uext => {
-                    // Rule at src/isa/aarch64/inst.isle line 3707.
-                    return ExtendOp::UXTB;
-                }
-                &ArgumentExtension::Sext => {
-                    // Rule at src/isa/aarch64/inst.isle line 3705.
-                    return ExtendOp::SXTB;
-                }
-                _ => {}
-            }
-        }
-        I16 => {
-            match arg1 {
-                &ArgumentExtension::Uext => {
-                    // Rule at src/isa/aarch64/inst.isle line 3708.
-                    return ExtendOp::UXTH;
-                }
-                &ArgumentExtension::Sext => {
-                    // Rule at src/isa/aarch64/inst.isle line 3706.
-                    return ExtendOp::SXTH;
-                }
-                _ => {}
-            }
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "lower_extend_op", "src/isa/aarch64/inst.isle line 3704"
-    )
-}
-
-// Generated as internal constructor for term lower_icmp_i128_eq_ne.
-pub fn constructor_lower_icmp_i128_eq_ne<C: Context>(
-    ctx: &mut C,
-    arg0: Value,
-    arg1: Value,
-) -> ProducesFlags {
-    let v2 = C::put_in_regs(ctx, arg0);
-    let v3 = C::put_in_regs(ctx, arg1);
-    let v5 = C::value_regs_get(ctx, v2, 0x0);
-    let v7 = C::value_regs_get(ctx, v2, 0x1);
-    let v8 = C::value_regs_get(ctx, v3, 0x0);
-    let v9 = C::value_regs_get(ctx, v3, 0x1);
-    let v11 = &constructor_cmp(ctx, &OperandSize::Size64, v5, v8);
-    let v13 = C::nzcv(ctx, false, false, false, false);
-    let v15 = &constructor_ccmp(ctx, &OperandSize::Size64, v7, v9, v13, &Cond::Eq, v11);
-    // Rule at src/isa/aarch64/inst.isle line 3771.
-    return v15.clone();
-}
-
-// Generated as internal constructor for term lower_icmp_i128_consumer.
-pub fn constructor_lower_icmp_i128_consumer<C: Context>(
-    ctx: &mut C,
-    arg0: &Cond,
-    arg1: Reg,
-) -> ConsumesFlags {
-    let v3 = C::temp_writable_reg(ctx, I64);
-    let v4 = C::temp_writable_reg(ctx, I64);
-    let v9 = C::writable_reg_to_reg(ctx, v4);
-    let v10 = C::value_reg(ctx, v9);
-    let v5 = MInst::CSet {
-        rd: v3,
-        cond: arg0.clone(),
-    };
-    let v7 = C::writable_reg_to_reg(ctx, v3);
-    let v8 = MInst::CSel {
-        rd: v4,
-        cond: Cond::Eq,
-        rn: arg1,
-        rm: v7,
-    };
-    let v11 = ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
-        inst1: v5,
-        inst2: v8,
-        result: v10,
-    };
-    // Rule at src/isa/aarch64/inst.isle line 3807.
-    return v11;
-}
-
-// Generated as internal constructor for term lower_bmask.
-pub fn constructor_lower_bmask<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Type,
-    arg2: ValueRegs,
-) -> ValueRegs {
-    let v27 = C::fits_in_16(ctx, arg1);
-    if let Some(v28) = v27 {
-        let v30 = C::ty_mask(ctx, v28);
-        let v31 = C::imm_logic_from_u64(ctx, I32, v30);
-        if let Some(v32) = v31 {
-            let v17 = C::value_regs_get(ctx, arg2, 0x0);
-            let v33 = constructor_and_imm(ctx, I32, v17, v32);
-            let v34 = C::value_reg(ctx, v33);
-            let v35 = constructor_lower_bmask(ctx, arg0, I32, v34);
-            // Rule at src/isa/aarch64/inst.isle line 3856.
-            return v35;
-        }
-    }
-    if arg0 == I128 {
-        let v24 = constructor_lower_bmask(ctx, I64, arg1, arg2);
-        let v25 = C::value_regs_get(ctx, v24, 0x0);
-        let v26 = C::value_regs(ctx, v25, v25);
-        // Rule at src/isa/aarch64/inst.isle line 3844.
-        return v26;
-    }
-    let v1 = C::fits_in_64(ctx, arg0);
-    if let Some(v2) = v1 {
-        if arg1 == I128 {
-            let v17 = C::value_regs_get(ctx, arg2, 0x0);
-            let v19 = C::value_regs_get(ctx, arg2, 0x1);
-            let v21 = constructor_orr(ctx, I64, v17, v19);
-            let v22 = C::value_reg(ctx, v21);
-            let v23 = constructor_lower_bmask(ctx, v2, I64, v22);
-            // Rule at src/isa/aarch64/inst.isle line 3835.
-            return v23;
-        }
-        let v4 = C::ty_32_or_64(ctx, arg1);
-        if let Some(v5) = v4 {
-            let v7 = &constructor_operand_size(ctx, v5);
-            let v9 = C::value_regs_get(ctx, arg2, 0x0);
-            let v11 = C::u8_into_imm12(ctx, 0x0);
-            let v12 = &constructor_cmp_imm(ctx, v7, v9, v11);
-            let v14 = &constructor_csetm(ctx, &Cond::Ne);
-            let v15 = constructor_with_flags_reg(ctx, v12, v14);
-            let v16 = C::value_reg(ctx, v15);
-            // Rule at src/isa/aarch64/inst.isle line 3822.
-            return v16;
-        }
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "lower_bmask", "src/isa/aarch64/inst.isle line 3815"
-    )
-}
-
-// Generated as internal constructor for term lower_select.
-pub fn constructor_lower_select<C: Context>(
-    ctx: &mut C,
-    arg0: &ProducesFlags,
-    arg1: &Cond,
-    arg2: Type,
-    arg3: Value,
-    arg4: Value,
-) -> ValueRegs {
-    if arg2 == I128 {
-        let v21 = C::temp_writable_reg(ctx, I64);
-        let v22 = C::temp_writable_reg(ctx, I64);
-        let v23 = C::put_in_regs(ctx, arg3);
-        let v24 = C::put_in_regs(ctx, arg4);
-        let v26 = C::value_regs_get(ctx, v23, 0x0);
-        let v28 = C::value_regs_get(ctx, v23, 0x1);
-        let v29 = C::value_regs_get(ctx, v24, 0x0);
-        let v30 = C::value_regs_get(ctx, v24, 0x1);
-        let v33 = C::writable_reg_to_reg(ctx, v21);
-        let v34 = C::writable_reg_to_reg(ctx, v22);
-        let v35 = C::value_regs(ctx, v33, v34);
-        let v31 = MInst::CSel {
-            rd: v21,
-            cond: arg1.clone(),
-            rn: v26,
-            rm: v29,
-        };
-        let v32 = MInst::CSel {
-            rd: v22,
-            cond: arg1.clone(),
-            rn: v28,
-            rm: v30,
-        };
-        let v36 = ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
-            inst1: v31,
-            inst2: v32,
-            result: v35,
-        };
-        let v37 = constructor_with_flags(ctx, arg0, &v36);
-        // Rule at src/isa/aarch64/inst.isle line 3913.
-        return v37;
-    }
-    let v11 = C::ty_vec128(ctx, arg2);
-    if let Some(v12) = v11 {
-        let v7 = C::put_in_reg(ctx, arg3);
-        let v8 = C::put_in_reg(ctx, arg4);
-        let v13 = &constructor_vec_csel(ctx, arg1, v7, v8);
-        let v14 = constructor_with_flags(ctx, arg0, v13);
-        // Rule at src/isa/aarch64/inst.isle line 3908.
-        return v14;
-    }
-    let v3 = C::ty_scalar_float(ctx, arg2);
-    if let Some(v4) = v3 {
-        let v7 = C::put_in_reg(ctx, arg3);
-        let v8 = C::put_in_reg(ctx, arg4);
-        let v9 = &constructor_fpu_csel(ctx, v4, arg1, v7, v8);
-        let v10 = constructor_with_flags(ctx, arg0, v9);
-        // Rule at src/isa/aarch64/inst.isle line 3906.
-        return v10;
-    }
-    let v38 = C::ty_int_ref_scalar_64(ctx, arg2);
-    if let Some(v39) = v38 {
-        let v7 = C::put_in_reg(ctx, arg3);
-        let v8 = C::put_in_reg(ctx, arg4);
-        let v40 = &constructor_csel(ctx, arg1, v7, v8);
-        let v41 = constructor_with_flags(ctx, arg0, v40);
-        // Rule at src/isa/aarch64/inst.isle line 3927.
-        return v41;
-    }
-    let v15 = C::ty_vec64_ctor(ctx, arg2);
-    if let Some(v16) = v15 {
-        let v7 = C::put_in_reg(ctx, arg3);
-        let v8 = C::put_in_reg(ctx, arg4);
-        let v18 = &constructor_fpu_csel(ctx, F64, arg1, v7, v8);
-        let v19 = constructor_with_flags(ctx, arg0, v18);
-        // Rule at src/isa/aarch64/inst.isle line 3910.
-        return v19;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "lower_select", "src/isa/aarch64/inst.isle line 3905"
-    )
-}
-
-// Generated as internal constructor for term aarch64_jump.
-pub fn constructor_aarch64_jump<C: Context>(ctx: &mut C, arg0: BranchTarget) -> SideEffectNoResult {
-    let v1 = MInst::Jump { dest: arg0 };
-    let v2 = SideEffectNoResult::Inst { inst: v1 };
-    // Rule at src/isa/aarch64/inst.isle line 3933.
-    return v2;
-}
-
-// Generated as internal constructor for term jt_sequence.
-pub fn constructor_jt_sequence<C: Context>(
-    ctx: &mut C,
-    arg0: Reg,
-    arg1: BoxJTSequenceInfo,
-) -> ConsumesFlags {
-    let v3 = C::temp_writable_reg(ctx, I64);
-    let v4 = C::temp_writable_reg(ctx, I64);
-    let v5 = MInst::JTSequence {
-        info: arg1,
-        ridx: arg0,
-        rtmp1: v3,
-        rtmp2: v4,
-    };
-    let v6 = ConsumesFlags::ConsumesFlagsSideEffect { inst: v5 };
-    // Rule at src/isa/aarch64/inst.isle line 3955.
-    return v6;
-}
-
-// Generated as internal constructor for term cond_br.
-pub fn constructor_cond_br<C: Context>(
-    ctx: &mut C,
-    arg0: BranchTarget,
-    arg1: BranchTarget,
-    arg2: CondBrKind,
-) -> ConsumesFlags {
-    let v3 = MInst::CondBr {
-        taken: arg0,
-        not_taken: arg1,
-        kind: arg2,
-    };
-    let v4 = ConsumesFlags::ConsumesFlagsSideEffect { inst: v3 };
-    // Rule at src/isa/aarch64/inst.isle line 3963.
-    return v4;
-}
-
-// Generated as internal constructor for term mov_to_nzcv.
-pub fn constructor_mov_to_nzcv<C: Context>(ctx: &mut C, arg0: Reg) -> ProducesFlags {
-    let v1 = MInst::MovToNZCV { rn: arg0 };
-    let v2 = ProducesFlags::ProducesFlagsSideEffect { inst: v1 };
-    // Rule at src/isa/aarch64/inst.isle line 3969.
-    return v2;
-}
-
-// Generated as internal constructor for term emit_island.
-pub fn constructor_emit_island<C: Context>(ctx: &mut C, arg0: CodeOffset) -> SideEffectNoResult {
-    let v1 = MInst::EmitIsland { needed_space: arg0 };
-    let v2 = SideEffectNoResult::Inst { inst: v1 };
-    // Rule at src/isa/aarch64/inst.isle line 3975.
-    return v2;
-}
-
-// Generated as internal constructor for term br_table_impl.
-pub fn constructor_br_table_impl<C: Context>(
-    ctx: &mut C,
-    arg0: u64,
-    arg1: Reg,
-    arg2: &VecMachLabel,
-) -> Unit {
-    let v1 = C::imm12_from_u64(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v5 = C::targets_jt_info(ctx, arg2);
-        let v7 = &constructor_cmp_imm(ctx, &OperandSize::Size32, arg1, v2);
-        let v8 = &constructor_jt_sequence(ctx, arg1, v5);
-        let v9 = &constructor_with_flags_side_effect(ctx, v7, v8);
-        let v10 = constructor_emit_side_effect(ctx, v9);
-        // Rule at src/isa/aarch64/inst.isle line 3981.
-        return v10;
-    }
-    let v13 = constructor_imm(ctx, I64, &ImmExtend::Zero, arg0);
-    let v14 = C::targets_jt_info(ctx, arg2);
-    let v15 = &constructor_cmp(ctx, &OperandSize::Size32, arg1, v13);
-    let v16 = &constructor_jt_sequence(ctx, arg1, v14);
-    let v17 = &constructor_with_flags_side_effect(ctx, v15, v16);
-    let v18 = constructor_emit_side_effect(ctx, v17);
-    // Rule at src/isa/aarch64/inst.isle line 3986.
-    return v18;
-}
-
-// Generated as internal constructor for term vec_uzp1.
-pub fn constructor_vec_uzp1<C: Context>(
-    ctx: &mut C,
-    arg0: Reg,
-    arg1: Reg,
-    arg2: &VectorSize,
-) -> Reg {
-    let v4 = constructor_vec_rrr(ctx, &VecALUOp::Uzp1, arg0, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 3995.
-    return v4;
-}
-
-// Generated as internal constructor for term vec_uzp2.
-pub fn constructor_vec_uzp2<C: Context>(
-    ctx: &mut C,
-    arg0: Reg,
-    arg1: Reg,
-    arg2: &VectorSize,
-) -> Reg {
-    let v4 = constructor_vec_rrr(ctx, &VecALUOp::Uzp2, arg0, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 3999.
-    return v4;
-}
-
-// Generated as internal constructor for term vec_zip1.
-pub fn constructor_vec_zip1<C: Context>(
-    ctx: &mut C,
-    arg0: Reg,
-    arg1: Reg,
-    arg2: &VectorSize,
-) -> Reg {
-    let v4 = constructor_vec_rrr(ctx, &VecALUOp::Zip1, arg0, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 4003.
-    return v4;
-}
-
-// Generated as internal constructor for term vec_zip2.
-pub fn constructor_vec_zip2<C: Context>(
-    ctx: &mut C,
-    arg0: Reg,
-    arg1: Reg,
-    arg2: &VectorSize,
-) -> Reg {
-    let v4 = constructor_vec_rrr(ctx, &VecALUOp::Zip2, arg0, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 4007.
-    return v4;
-}
-
-// Generated as internal constructor for term vec_trn1.
-pub fn constructor_vec_trn1<C: Context>(
-    ctx: &mut C,
-    arg0: Reg,
-    arg1: Reg,
-    arg2: &VectorSize,
-) -> Reg {
-    let v4 = constructor_vec_rrr(ctx, &VecALUOp::Trn1, arg0, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 4011.
-    return v4;
-}
-
-// Generated as internal constructor for term vec_trn2.
-pub fn constructor_vec_trn2<C: Context>(
-    ctx: &mut C,
-    arg0: Reg,
-    arg1: Reg,
-    arg2: &VectorSize,
-) -> Reg {
-    let v4 = constructor_vec_rrr(ctx, &VecALUOp::Trn2, arg0, arg1, arg2);
-    // Rule at src/isa/aarch64/inst.isle line 4015.
-    return v4;
-}
-
-// Generated as internal constructor for term vec_dup_fp_imm.
-pub fn constructor_vec_dup_fp_imm<C: Context>(
-    ctx: &mut C,
-    arg0: ASIMDFPModImm,
-    arg1: &VectorSize,
-) -> Reg {
-    let v3 = C::temp_writable_reg(ctx, I8X16);
-    let v4 = MInst::VecDupFPImm {
-        rd: v3,
-        imm: arg0,
-        size: arg1.clone(),
-    };
-    let v5 = C::emit(ctx, &v4);
-    let v6 = C::writable_reg_to_reg(ctx, v3);
-    // Rule at src/isa/aarch64/inst.isle line 4031.
-    return v6;
-}
-
-// Generated as internal constructor for term fpu_load64.
-pub fn constructor_fpu_load64<C: Context>(ctx: &mut C, arg0: &AMode, arg1: MemFlags) -> Reg {
-    let v3 = C::temp_writable_reg(ctx, I8X16);
-    let v4 = MInst::FpuLoad64 {
-        rd: v3,
-        mem: arg0.clone(),
-        flags: arg1,
-    };
-    let v5 = C::emit(ctx, &v4);
-    let v6 = C::writable_reg_to_reg(ctx, v3);
-    // Rule at src/isa/aarch64/inst.isle line 4038.
-    return v6;
-}
-
-// Generated as internal constructor for term fpu_load128.
-pub fn constructor_fpu_load128<C: Context>(ctx: &mut C, arg0: &AMode, arg1: MemFlags) -> Reg {
-    let v3 = C::temp_writable_reg(ctx, I8X16);
-    let v4 = MInst::FpuLoad128 {
-        rd: v3,
-        mem: arg0.clone(),
-        flags: arg1,
-    };
-    let v5 = C::emit(ctx, &v4);
-    let v6 = C::writable_reg_to_reg(ctx, v3);
-    // Rule at src/isa/aarch64/inst.isle line 4045.
-    return v6;
-}
-
-// Generated as internal constructor for term fpu_move_128.
-pub fn constructor_fpu_move_128<C: Context>(ctx: &mut C, arg0: Reg) -> Reg {
-    let v2 = C::temp_writable_reg(ctx, I8X16);
-    let v3 = MInst::FpuMove128 { rd: v2, rn: arg0 };
-    let v4 = C::emit(ctx, &v3);
-    let v5 = C::writable_reg_to_reg(ctx, v2);
-    // Rule at src/isa/aarch64/inst_neon.isle line 4.
-    return v5;
-}
-
-// Generated as internal constructor for term lower.
-pub fn constructor_lower<C: Context>(ctx: &mut C, arg0: Inst) -> Option<InstOutput> {
-    let v4 = &C::inst_data(ctx, arg0);
-    match v4 {
-        &InstructionData::AtomicCas {
-            opcode: ref v1385,
-            args: ref v1386,
-            flags: v1387,
-        } => {
-            if let &Opcode::AtomicCas = v1385 {
-                let v1 = C::first_result(ctx, arg0);
-                if let Some(v2) = v1 {
-                    let v3 = C::value_type(ctx, v2);
-                    let v1291 = C::valid_atomic_transaction(ctx, v3);
-                    if let Some(v1292) = v1291 {
-                        let v1312 = C::use_lse(ctx, arg0);
-                        if let Some(v1313) = v1312 {
-                            let v1388 = C::unpack_value_array_3(ctx, v1386);
-                            let v1392 = C::put_in_reg(ctx, v1388.0);
-                            let v1393 = C::put_in_reg(ctx, v1388.1);
-                            let v1394 = C::put_in_reg(ctx, v1388.2);
-                            let v1395 =
-                                constructor_lse_atomic_cas(ctx, v1392, v1393, v1394, v1292, v1387);
-                            let v1396 = constructor_output_reg(ctx, v1395);
-                            // Rule at src/isa/aarch64/lower.isle line 2125.
-                            return Some(v1396);
-                        }
-                        let v1388 = C::unpack_value_array_3(ctx, v1386);
-                        let v1392 = C::put_in_reg(ctx, v1388.0);
-                        let v1393 = C::put_in_reg(ctx, v1388.1);
-                        let v1394 = C::put_in_reg(ctx, v1388.2);
-                        let v1397 =
-                            constructor_atomic_cas_loop(ctx, v1392, v1393, v1394, v1292, v1387);
-                        let v1398 = constructor_output_reg(ctx, v1397);
-                        // Rule at src/isa/aarch64/lower.isle line 2130.
-                        return Some(v1398);
-                    }
-                }
-            }
-        }
-        &InstructionData::AtomicRmw {
-            opcode: ref v1314,
-            args: ref v1315,
-            flags: v1316,
-            op: ref v1317,
-        } => {
-            if let &Opcode::AtomicRmw = v1314 {
-                match v1317 {
-                    &AtomicRmwOp::Add => {
-                        let v1 = C::first_result(ctx, arg0);
-                        if let Some(v2) = v1 {
-                            let v3 = C::value_type(ctx, v2);
-                            let v1291 = C::valid_atomic_transaction(ctx, v3);
-                            if let Some(v1292) = v1291 {
-                                let v1312 = C::use_lse(ctx, arg0);
-                                if let Some(v1313) = v1312 {
-                                    let v1318 = C::unpack_value_array_2(ctx, v1315);
-                                    let v1322 = C::put_in_reg(ctx, v1318.1);
-                                    let v1323 = constructor_lse_atomic_rmw(
-                                        ctx,
-                                        &AtomicRMWOp::Add,
-                                        v1318.0,
-                                        v1322,
-                                        v1292,
-                                        v1316,
-                                    );
-                                    let v1324 = constructor_output_reg(ctx, v1323);
-                                    // Rule at src/isa/aarch64/lower.isle line 2052.
-                                    return Some(v1324);
-                                }
-                                let v1318 = C::unpack_value_array_2(ctx, v1315);
-                                let v1352 = C::put_in_reg(ctx, v1318.0);
-                                let v1343 = C::put_in_reg(ctx, v1318.1);
-                                let v1353 = constructor_atomic_rmw_loop(
-                                    ctx,
-                                    &AtomicRMWLoopOp::Add,
-                                    v1352,
-                                    v1343,
-                                    v1292,
-                                    v1316,
-                                );
-                                let v1354 = constructor_output_reg(ctx, v1353);
-                                // Rule at src/isa/aarch64/lower.isle line 2090.
-                                return Some(v1354);
-                            }
-                        }
-                    }
-                    &AtomicRmwOp::And => {
-                        let v1 = C::first_result(ctx, arg0);
-                        if let Some(v2) = v1 {
-                            let v3 = C::value_type(ctx, v2);
-                            let v1291 = C::valid_atomic_transaction(ctx, v3);
-                            if let Some(v1292) = v1291 {
-                                let v1312 = C::use_lse(ctx, arg0);
-                                if let Some(v1313) = v1312 {
-                                    let v1318 = C::unpack_value_array_2(ctx, v1315);
-                                    let v1322 = C::put_in_reg(ctx, v1318.1);
-                                    let v1217 = C::zero_reg(ctx);
-                                    let v1348 = constructor_eon(ctx, v1292, v1322, v1217);
-                                    let v1349 = constructor_lse_atomic_rmw(
-                                        ctx,
-                                        &AtomicRMWOp::Clr,
-                                        v1318.0,
-                                        v1348,
-                                        v1292,
-                                        v1316,
-                                    );
-                                    let v1350 = constructor_output_reg(ctx, v1349);
-                                    // Rule at src/isa/aarch64/lower.isle line 2084.
-                                    return Some(v1350);
-                                }
-                                let v1318 = C::unpack_value_array_2(ctx, v1315);
-                                let v1352 = C::put_in_reg(ctx, v1318.0);
-                                let v1343 = C::put_in_reg(ctx, v1318.1);
-                                let v1359 = constructor_atomic_rmw_loop(
-                                    ctx,
-                                    &AtomicRMWLoopOp::And,
-                                    v1352,
-                                    v1343,
-                                    v1292,
-                                    v1316,
-                                );
-                                let v1360 = constructor_output_reg(ctx, v1359);
-                                // Rule at src/isa/aarch64/lower.isle line 2096.
-                                return Some(v1360);
-                            }
-                        }
-                    }
-                    &AtomicRmwOp::Nand => {
-                        let v1 = C::first_result(ctx, arg0);
-                        if let Some(v2) = v1 {
-                            let v3 = C::value_type(ctx, v2);
-                            let v1291 = C::valid_atomic_transaction(ctx, v3);
-                            if let Some(v1292) = v1291 {
-                                let v1318 = C::unpack_value_array_2(ctx, v1315);
-                                let v1352 = C::put_in_reg(ctx, v1318.0);
-                                let v1343 = C::put_in_reg(ctx, v1318.1);
-                                let v1362 = constructor_atomic_rmw_loop(
-                                    ctx,
-                                    &AtomicRMWLoopOp::Nand,
-                                    v1352,
-                                    v1343,
-                                    v1292,
-                                    v1316,
-                                );
-                                let v1363 = constructor_output_reg(ctx, v1362);
-                                // Rule at src/isa/aarch64/lower.isle line 2099.
-                                return Some(v1363);
-                            }
-                        }
-                    }
-                    &AtomicRmwOp::Or => {
-                        let v1 = C::first_result(ctx, arg0);
-                        if let Some(v2) = v1 {
-                            let v3 = C::value_type(ctx, v2);
-                            let v1291 = C::valid_atomic_transaction(ctx, v3);
-                            if let Some(v1292) = v1291 {
-                                let v1312 = C::use_lse(ctx, arg0);
-                                if let Some(v1313) = v1312 {
-                                    let v1318 = C::unpack_value_array_2(ctx, v1315);
-                                    let v1322 = C::put_in_reg(ctx, v1318.1);
-                                    let v1329 = constructor_lse_atomic_rmw(
-                                        ctx,
-                                        &AtomicRMWOp::Set,
-                                        v1318.0,
-                                        v1322,
-                                        v1292,
-                                        v1316,
-                                    );
-                                    let v1330 = constructor_output_reg(ctx, v1329);
-                                    // Rule at src/isa/aarch64/lower.isle line 2060.
-                                    return Some(v1330);
-                                }
-                                let v1318 = C::unpack_value_array_2(ctx, v1315);
-                                let v1352 = C::put_in_reg(ctx, v1318.0);
-                                let v1343 = C::put_in_reg(ctx, v1318.1);
-                                let v1365 = constructor_atomic_rmw_loop(
-                                    ctx,
-                                    &AtomicRMWLoopOp::Orr,
-                                    v1352,
-                                    v1343,
-                                    v1292,
-                                    v1316,
-                                );
-                                let v1366 = constructor_output_reg(ctx, v1365);
-                                // Rule at src/isa/aarch64/lower.isle line 2102.
-                                return Some(v1366);
-                            }
-                        }
-                    }
-                    &AtomicRmwOp::Smax => {
-                        let v1 = C::first_result(ctx, arg0);
-                        if let Some(v2) = v1 {
-                            let v3 = C::value_type(ctx, v2);
-                            let v1291 = C::valid_atomic_transaction(ctx, v3);
-                            if let Some(v1292) = v1291 {
-                                let v1312 = C::use_lse(ctx, arg0);
-                                if let Some(v1313) = v1312 {
-                                    let v1318 = C::unpack_value_array_2(ctx, v1315);
-                                    let v1322 = C::put_in_reg(ctx, v1318.1);
-                                    let v1332 = constructor_lse_atomic_rmw(
-                                        ctx,
-                                        &AtomicRMWOp::Smax,
-                                        v1318.0,
-                                        v1322,
-                                        v1292,
-                                        v1316,
-                                    );
-                                    let v1333 = constructor_output_reg(ctx, v1332);
-                                    // Rule at src/isa/aarch64/lower.isle line 2064.
-                                    return Some(v1333);
-                                }
-                                let v1318 = C::unpack_value_array_2(ctx, v1315);
-                                let v1352 = C::put_in_reg(ctx, v1318.0);
-                                let v1343 = C::put_in_reg(ctx, v1318.1);
-                                let v1374 = constructor_atomic_rmw_loop(
-                                    ctx,
-                                    &AtomicRMWLoopOp::Smax,
-                                    v1352,
-                                    v1343,
-                                    v1292,
-                                    v1316,
-                                );
-                                let v1375 = constructor_output_reg(ctx, v1374);
-                                // Rule at src/isa/aarch64/lower.isle line 2111.
-                                return Some(v1375);
-                            }
-                        }
-                    }
-                    &AtomicRmwOp::Smin => {
-                        let v1 = C::first_result(ctx, arg0);
-                        if let Some(v2) = v1 {
-                            let v3 = C::value_type(ctx, v2);
-                            let v1291 = C::valid_atomic_transaction(ctx, v3);
-                            if let Some(v1292) = v1291 {
-                                let v1312 = C::use_lse(ctx, arg0);
-                                if let Some(v1313) = v1312 {
-                                    let v1318 = C::unpack_value_array_2(ctx, v1315);
-                                    let v1322 = C::put_in_reg(ctx, v1318.1);
-                                    let v1335 = constructor_lse_atomic_rmw(
-                                        ctx,
-                                        &AtomicRMWOp::Smin,
-                                        v1318.0,
-                                        v1322,
-                                        v1292,
-                                        v1316,
-                                    );
-                                    let v1336 = constructor_output_reg(ctx, v1335);
-                                    // Rule at src/isa/aarch64/lower.isle line 2068.
-                                    return Some(v1336);
-                                }
-                                let v1318 = C::unpack_value_array_2(ctx, v1315);
-                                let v1352 = C::put_in_reg(ctx, v1318.0);
-                                let v1343 = C::put_in_reg(ctx, v1318.1);
-                                let v1371 = constructor_atomic_rmw_loop(
-                                    ctx,
-                                    &AtomicRMWLoopOp::Smin,
-                                    v1352,
-                                    v1343,
-                                    v1292,
-                                    v1316,
-                                );
-                                let v1372 = constructor_output_reg(ctx, v1371);
-                                // Rule at src/isa/aarch64/lower.isle line 2108.
-                                return Some(v1372);
-                            }
-                        }
-                    }
-                    &AtomicRmwOp::Sub => {
-                        let v1 = C::first_result(ctx, arg0);
-                        if let Some(v2) = v1 {
-                            let v3 = C::value_type(ctx, v2);
-                            let v1291 = C::valid_atomic_transaction(ctx, v3);
-                            if let Some(v1292) = v1291 {
-                                let v1312 = C::use_lse(ctx, arg0);
-                                if let Some(v1313) = v1312 {
-                                    let v586 = C::zero_reg(ctx);
-                                    let v1318 = C::unpack_value_array_2(ctx, v1315);
-                                    let v1343 = C::put_in_reg(ctx, v1318.1);
-                                    let v1344 = constructor_sub(ctx, v1292, v586, v1343);
-                                    let v1345 = constructor_lse_atomic_rmw(
-                                        ctx,
-                                        &AtomicRMWOp::Add,
-                                        v1318.0,
-                                        v1344,
-                                        v1292,
-                                        v1316,
-                                    );
-                                    let v1346 = constructor_output_reg(ctx, v1345);
-                                    // Rule at src/isa/aarch64/lower.isle line 2080.
-                                    return Some(v1346);
-                                }
-                                let v1318 = C::unpack_value_array_2(ctx, v1315);
-                                let v1352 = C::put_in_reg(ctx, v1318.0);
-                                let v1343 = C::put_in_reg(ctx, v1318.1);
-                                let v1356 = constructor_atomic_rmw_loop(
-                                    ctx,
-                                    &AtomicRMWLoopOp::Sub,
-                                    v1352,
-                                    v1343,
-                                    v1292,
-                                    v1316,
-                                );
-                                let v1357 = constructor_output_reg(ctx, v1356);
-                                // Rule at src/isa/aarch64/lower.isle line 2093.
-                                return Some(v1357);
-                            }
-                        }
-                    }
-                    &AtomicRmwOp::Umax => {
-                        let v1 = C::first_result(ctx, arg0);
-                        if let Some(v2) = v1 {
-                            let v3 = C::value_type(ctx, v2);
-                            let v1291 = C::valid_atomic_transaction(ctx, v3);
-                            if let Some(v1292) = v1291 {
-                                let v1312 = C::use_lse(ctx, arg0);
-                                if let Some(v1313) = v1312 {
-                                    let v1318 = C::unpack_value_array_2(ctx, v1315);
-                                    let v1322 = C::put_in_reg(ctx, v1318.1);
-                                    let v1338 = constructor_lse_atomic_rmw(
-                                        ctx,
-                                        &AtomicRMWOp::Umax,
-                                        v1318.0,
-                                        v1322,
-                                        v1292,
-                                        v1316,
-                                    );
-                                    let v1339 = constructor_output_reg(ctx, v1338);
-                                    // Rule at src/isa/aarch64/lower.isle line 2072.
-                                    return Some(v1339);
-                                }
-                                let v1318 = C::unpack_value_array_2(ctx, v1315);
-                                let v1352 = C::put_in_reg(ctx, v1318.0);
-                                let v1343 = C::put_in_reg(ctx, v1318.1);
-                                let v1380 = constructor_atomic_rmw_loop(
-                                    ctx,
-                                    &AtomicRMWLoopOp::Umax,
-                                    v1352,
-                                    v1343,
-                                    v1292,
-                                    v1316,
-                                );
-                                let v1381 = constructor_output_reg(ctx, v1380);
-                                // Rule at src/isa/aarch64/lower.isle line 2117.
-                                return Some(v1381);
-                            }
-                        }
-                    }
-                    &AtomicRmwOp::Umin => {
-                        let v1 = C::first_result(ctx, arg0);
-                        if let Some(v2) = v1 {
-                            let v3 = C::value_type(ctx, v2);
-                            let v1291 = C::valid_atomic_transaction(ctx, v3);
-                            if let Some(v1292) = v1291 {
-                                let v1312 = C::use_lse(ctx, arg0);
-                                if let Some(v1313) = v1312 {
-                                    let v1318 = C::unpack_value_array_2(ctx, v1315);
-                                    let v1322 = C::put_in_reg(ctx, v1318.1);
-                                    let v1341 = constructor_lse_atomic_rmw(
-                                        ctx,
-                                        &AtomicRMWOp::Umin,
-                                        v1318.0,
-                                        v1322,
-                                        v1292,
-                                        v1316,
-                                    );
-                                    let v1342 = constructor_output_reg(ctx, v1341);
-                                    // Rule at src/isa/aarch64/lower.isle line 2076.
-                                    return Some(v1342);
-                                }
-                                let v1318 = C::unpack_value_array_2(ctx, v1315);
-                                let v1352 = C::put_in_reg(ctx, v1318.0);
-                                let v1343 = C::put_in_reg(ctx, v1318.1);
-                                let v1377 = constructor_atomic_rmw_loop(
-                                    ctx,
-                                    &AtomicRMWLoopOp::Umin,
-                                    v1352,
-                                    v1343,
-                                    v1292,
-                                    v1316,
-                                );
-                                let v1378 = constructor_output_reg(ctx, v1377);
-                                // Rule at src/isa/aarch64/lower.isle line 2114.
-                                return Some(v1378);
-                            }
-                        }
-                    }
-                    &AtomicRmwOp::Xchg => {
-                        let v1 = C::first_result(ctx, arg0);
-                        if let Some(v2) = v1 {
-                            let v3 = C::value_type(ctx, v2);
-                            let v1291 = C::valid_atomic_transaction(ctx, v3);
-                            if let Some(v1292) = v1291 {
-                                let v1318 = C::unpack_value_array_2(ctx, v1315);
-                                let v1352 = C::put_in_reg(ctx, v1318.0);
-                                let v1343 = C::put_in_reg(ctx, v1318.1);
-                                let v1383 = constructor_atomic_rmw_loop(
-                                    ctx,
-                                    &AtomicRMWLoopOp::Xchg,
-                                    v1352,
-                                    v1343,
-                                    v1292,
-                                    v1316,
-                                );
-                                let v1384 = constructor_output_reg(ctx, v1383);
-                                // Rule at src/isa/aarch64/lower.isle line 2120.
-                                return Some(v1384);
-                            }
-                        }
-                    }
-                    &AtomicRmwOp::Xor => {
-                        let v1 = C::first_result(ctx, arg0);
-                        if let Some(v2) = v1 {
-                            let v3 = C::value_type(ctx, v2);
-                            let v1291 = C::valid_atomic_transaction(ctx, v3);
-                            if let Some(v1292) = v1291 {
-                                let v1312 = C::use_lse(ctx, arg0);
-                                if let Some(v1313) = v1312 {
-                                    let v1318 = C::unpack_value_array_2(ctx, v1315);
-                                    let v1322 = C::put_in_reg(ctx, v1318.1);
-                                    let v1326 = constructor_lse_atomic_rmw(
-                                        ctx,
-                                        &AtomicRMWOp::Eor,
-                                        v1318.0,
-                                        v1322,
-                                        v1292,
-                                        v1316,
-                                    );
-                                    let v1327 = constructor_output_reg(ctx, v1326);
-                                    // Rule at src/isa/aarch64/lower.isle line 2056.
-                                    return Some(v1327);
-                                }
-                                let v1318 = C::unpack_value_array_2(ctx, v1315);
-                                let v1352 = C::put_in_reg(ctx, v1318.0);
-                                let v1343 = C::put_in_reg(ctx, v1318.1);
-                                let v1368 = constructor_atomic_rmw_loop(
-                                    ctx,
-                                    &AtomicRMWLoopOp::Eor,
-                                    v1352,
-                                    v1343,
-                                    v1292,
-                                    v1316,
-                                );
-                                let v1369 = constructor_output_reg(ctx, v1368);
-                                // Rule at src/isa/aarch64/lower.isle line 2105.
-                                return Some(v1369);
-                            }
-                        }
-                    }
-                    _ => {}
-                }
-            }
-        }
-        &InstructionData::Binary {
-            opcode: ref v29,
-            args: ref v30,
-        } => {
-            match v29 {
-                &Opcode::Swizzle => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v31 = C::unpack_value_array_2(ctx, v30);
-                        let v34 = C::put_in_reg(ctx, v31.0);
-                        let v35 = C::put_in_reg(ctx, v31.1);
-                        let v228 = constructor_vec_tbl(ctx, v34, v35);
-                        let v229 = constructor_output_reg(ctx, v228);
-                        // Rule at src/isa/aarch64/lower.isle line 241.
-                        return Some(v229);
-                    }
-                }
-                &Opcode::Smin => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v27 = C::fits_in_64(ctx, v3);
-                        if let Some(v28) = v27 {
-                            let v680 = C::ty_int(ctx, v3);
-                            if let Some(v681) = v680 {
-                                let v31 = C::unpack_value_array_2(ctx, v30);
-                                let v686 = constructor_cmp_and_choose(
-                                    ctx,
-                                    v28,
-                                    &Cond::Lt,
-                                    true,
-                                    v31.0,
-                                    v31.1,
-                                );
-                                let v687 = C::output(ctx, v686);
-                                // Rule at src/isa/aarch64/lower.isle line 1076.
-                                return Some(v687);
-                            }
-                        }
-                        if v3 == I64X2 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v56 = C::put_in_reg(ctx, v31.1);
-                            let v325 = C::put_in_reg(ctx, v31.0);
-                            let v700 = constructor_vec_rrr(
-                                ctx,
-                                &VecALUOp::Cmgt,
-                                v56,
-                                v325,
-                                &VectorSize::Size64x2,
-                            );
-                            let v701 = C::put_in_reg(ctx, v31.0);
-                            let v386 = C::put_in_reg(ctx, v31.1);
-                            let v702 = constructor_bsl(ctx, I64X2, v700, v701, v386);
-                            let v703 = constructor_output_reg(ctx, v702);
-                            // Rule at src/isa/aarch64/lower.isle line 1088.
-                            return Some(v703);
-                        }
-                        let v693 = C::not_i64x2(ctx, v3);
-                        if let Some(v694) = v693 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v34 = C::put_in_reg(ctx, v31.0);
-                            let v35 = C::put_in_reg(ctx, v31.1);
-                            let v121 = &constructor_vector_size(ctx, v3);
-                            let v696 = constructor_vec_rrr(ctx, &VecALUOp::Smin, v34, v35, v121);
-                            let v697 = constructor_output_reg(ctx, v696);
-                            // Rule at src/isa/aarch64/lower.isle line 1085.
-                            return Some(v697);
-                        }
-                    }
-                }
-                &Opcode::Umin => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v27 = C::fits_in_64(ctx, v3);
-                        if let Some(v28) = v27 {
-                            let v680 = C::ty_int(ctx, v3);
-                            if let Some(v681) = v680 {
-                                let v31 = C::unpack_value_array_2(ctx, v30);
-                                let v683 = constructor_cmp_and_choose(
-                                    ctx,
-                                    v28,
-                                    &Cond::Lo,
-                                    false,
-                                    v31.0,
-                                    v31.1,
-                                );
-                                let v684 = C::output(ctx, v683);
-                                // Rule at src/isa/aarch64/lower.isle line 1074.
-                                return Some(v684);
-                            }
-                        }
-                        if v3 == I64X2 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v56 = C::put_in_reg(ctx, v31.1);
-                            let v325 = C::put_in_reg(ctx, v31.0);
-                            let v708 = constructor_vec_rrr(
-                                ctx,
-                                &VecALUOp::Cmhi,
-                                v56,
-                                v325,
-                                &VectorSize::Size64x2,
-                            );
-                            let v701 = C::put_in_reg(ctx, v31.0);
-                            let v386 = C::put_in_reg(ctx, v31.1);
-                            let v709 = constructor_bsl(ctx, I64X2, v708, v701, v386);
-                            let v710 = constructor_output_reg(ctx, v709);
-                            // Rule at src/isa/aarch64/lower.isle line 1094.
-                            return Some(v710);
-                        }
-                        let v693 = C::not_i64x2(ctx, v3);
-                        if let Some(v694) = v693 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v34 = C::put_in_reg(ctx, v31.0);
-                            let v35 = C::put_in_reg(ctx, v31.1);
-                            let v121 = &constructor_vector_size(ctx, v3);
-                            let v705 = constructor_vec_rrr(ctx, &VecALUOp::Umin, v34, v35, v121);
-                            let v706 = constructor_output_reg(ctx, v705);
-                            // Rule at src/isa/aarch64/lower.isle line 1091.
-                            return Some(v706);
-                        }
-                    }
-                }
-                &Opcode::Smax => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v27 = C::fits_in_64(ctx, v3);
-                        if let Some(v28) = v27 {
-                            let v680 = C::ty_int(ctx, v3);
-                            if let Some(v681) = v680 {
-                                let v31 = C::unpack_value_array_2(ctx, v30);
-                                let v691 = constructor_cmp_and_choose(
-                                    ctx,
-                                    v28,
-                                    &Cond::Gt,
-                                    true,
-                                    v31.0,
-                                    v31.1,
-                                );
-                                let v692 = C::output(ctx, v691);
-                                // Rule at src/isa/aarch64/lower.isle line 1080.
-                                return Some(v692);
-                            }
-                        }
-                        if v3 == I64X2 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v34 = C::put_in_reg(ctx, v31.0);
-                            let v35 = C::put_in_reg(ctx, v31.1);
-                            let v714 = constructor_vec_rrr(
-                                ctx,
-                                &VecALUOp::Cmgt,
-                                v34,
-                                v35,
-                                &VectorSize::Size64x2,
-                            );
-                            let v701 = C::put_in_reg(ctx, v31.0);
-                            let v386 = C::put_in_reg(ctx, v31.1);
-                            let v715 = constructor_bsl(ctx, I64X2, v714, v701, v386);
-                            let v716 = constructor_output_reg(ctx, v715);
-                            // Rule at src/isa/aarch64/lower.isle line 1100.
-                            return Some(v716);
-                        }
-                        let v693 = C::not_i64x2(ctx, v3);
-                        if let Some(v694) = v693 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v34 = C::put_in_reg(ctx, v31.0);
-                            let v35 = C::put_in_reg(ctx, v31.1);
-                            let v121 = &constructor_vector_size(ctx, v3);
-                            let v712 = constructor_vec_rrr(ctx, &VecALUOp::Smax, v34, v35, v121);
-                            let v713 = constructor_output_reg(ctx, v712);
-                            // Rule at src/isa/aarch64/lower.isle line 1097.
-                            return Some(v713);
-                        }
-                    }
-                }
-                &Opcode::Umax => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v27 = C::fits_in_64(ctx, v3);
-                        if let Some(v28) = v27 {
-                            let v680 = C::ty_int(ctx, v3);
-                            if let Some(v681) = v680 {
-                                let v31 = C::unpack_value_array_2(ctx, v30);
-                                let v689 = constructor_cmp_and_choose(
-                                    ctx,
-                                    v28,
-                                    &Cond::Hi,
-                                    false,
-                                    v31.0,
-                                    v31.1,
-                                );
-                                let v690 = C::output(ctx, v689);
-                                // Rule at src/isa/aarch64/lower.isle line 1078.
-                                return Some(v690);
-                            }
-                        }
-                        if v3 == I64X2 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v34 = C::put_in_reg(ctx, v31.0);
-                            let v35 = C::put_in_reg(ctx, v31.1);
-                            let v720 = constructor_vec_rrr(
-                                ctx,
-                                &VecALUOp::Cmhi,
-                                v34,
-                                v35,
-                                &VectorSize::Size64x2,
-                            );
-                            let v701 = C::put_in_reg(ctx, v31.0);
-                            let v386 = C::put_in_reg(ctx, v31.1);
-                            let v721 = constructor_bsl(ctx, I64X2, v720, v701, v386);
-                            let v722 = constructor_output_reg(ctx, v721);
-                            // Rule at src/isa/aarch64/lower.isle line 1106.
-                            return Some(v722);
-                        }
-                        let v693 = C::not_i64x2(ctx, v3);
-                        if let Some(v694) = v693 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v34 = C::put_in_reg(ctx, v31.0);
-                            let v35 = C::put_in_reg(ctx, v31.1);
-                            let v121 = &constructor_vector_size(ctx, v3);
-                            let v718 = constructor_vec_rrr(ctx, &VecALUOp::Umax, v34, v35, v121);
-                            let v719 = constructor_output_reg(ctx, v718);
-                            // Rule at src/isa/aarch64/lower.isle line 1103.
-                            return Some(v719);
-                        }
-                    }
-                }
-                &Opcode::AvgRound => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        if v3 == I64X2 {
-                            let v324 = constructor_splat_const(ctx, 0x1, &VectorSize::Size64x2);
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v325 = C::put_in_reg(ctx, v31.0);
-                            let v112 = C::put_in_reg(ctx, v31.1);
-                            let v326 = constructor_orr_vec(ctx, v325, v112, &VectorSize::Size64x2);
-                            let v327 = constructor_and_vec(ctx, v326, v324, &VectorSize::Size64x2);
-                            let v328 = C::put_in_reg(ctx, v31.0);
-                            let v330 =
-                                constructor_ushr_vec_imm(ctx, v328, 0x1, &VectorSize::Size64x2);
-                            let v331 = C::put_in_reg(ctx, v31.1);
-                            let v332 =
-                                constructor_ushr_vec_imm(ctx, v331, 0x1, &VectorSize::Size64x2);
-                            let v333 = constructor_add_vec(ctx, v330, v332, &VectorSize::Size64x2);
-                            let v334 = constructor_add_vec(ctx, v327, v333, &VectorSize::Size64x2);
-                            let v335 = constructor_output_reg(ctx, v334);
-                            // Rule at src/isa/aarch64/lower.isle line 353.
-                            return Some(v335);
-                        }
-                        let v336 = C::lane_fits_in_32(ctx, v3);
-                        if let Some(v337) = v336 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v34 = C::put_in_reg(ctx, v31.0);
-                            let v35 = C::put_in_reg(ctx, v31.1);
-                            let v339 = &constructor_vector_size(ctx, v337);
-                            let v340 = constructor_vec_rrr(ctx, &VecALUOp::Urhadd, v34, v35, v339);
-                            let v341 = constructor_output_reg(ctx, v340);
-                            // Rule at src/isa/aarch64/lower.isle line 362.
-                            return Some(v341);
-                        }
-                    }
-                }
-                &Opcode::UaddSat => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v575 = C::ty_vec128(ctx, v3);
-                        if let Some(v576) = v575 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v34 = C::put_in_reg(ctx, v31.0);
-                            let v35 = C::put_in_reg(ctx, v31.1);
-                            let v577 = &constructor_vector_size(ctx, v576);
-                            let v578 = constructor_uqadd(ctx, v34, v35, v577);
-                            let v579 = constructor_output_reg(ctx, v578);
-                            // Rule at src/isa/aarch64/lower.isle line 726.
-                            return Some(v579);
-                        }
-                    }
-                }
-                &Opcode::SaddSat => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v575 = C::ty_vec128(ctx, v3);
-                        if let Some(v576) = v575 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v34 = C::put_in_reg(ctx, v31.0);
-                            let v35 = C::put_in_reg(ctx, v31.1);
-                            let v577 = &constructor_vector_size(ctx, v576);
-                            let v580 = constructor_sqadd(ctx, v34, v35, v577);
-                            let v581 = constructor_output_reg(ctx, v580);
-                            // Rule at src/isa/aarch64/lower.isle line 731.
-                            return Some(v581);
-                        }
-                    }
-                }
-                &Opcode::UsubSat => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v575 = C::ty_vec128(ctx, v3);
-                        if let Some(v576) = v575 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v34 = C::put_in_reg(ctx, v31.0);
-                            let v35 = C::put_in_reg(ctx, v31.1);
-                            let v577 = &constructor_vector_size(ctx, v576);
-                            let v582 = constructor_uqsub(ctx, v34, v35, v577);
-                            let v583 = constructor_output_reg(ctx, v582);
-                            // Rule at src/isa/aarch64/lower.isle line 736.
-                            return Some(v583);
-                        }
-                    }
-                }
-                &Opcode::SsubSat => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v575 = C::ty_vec128(ctx, v3);
-                        if let Some(v576) = v575 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v34 = C::put_in_reg(ctx, v31.0);
-                            let v35 = C::put_in_reg(ctx, v31.1);
-                            let v577 = &constructor_vector_size(ctx, v576);
-                            let v584 = constructor_sqsub(ctx, v34, v35, v577);
-                            let v585 = constructor_output_reg(ctx, v584);
-                            // Rule at src/isa/aarch64/lower.isle line 741.
-                            return Some(v585);
-                        }
-                    }
-                }
-                &Opcode::Iadd => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v27 = C::fits_in_64(ctx, v3);
-                        if let Some(v28) = v27 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v38 = C::def_inst(ctx, v31.1);
-                            if let Some(v39) = v38 {
-                                let v40 = &C::inst_data(ctx, v39);
-                                if let &InstructionData::Binary {
-                                    opcode: ref v75,
-                                    args: ref v76,
-                                } = v40
-                                {
-                                    match v75 {
-                                        &Opcode::Imul => {
-                                            let v77 = C::unpack_value_array_2(ctx, v76);
-                                            let v105 = C::put_in_reg(ctx, v77.0);
-                                            let v106 = C::put_in_reg(ctx, v77.1);
-                                            let v107 = C::put_in_reg(ctx, v31.0);
-                                            let v108 = constructor_madd(ctx, v28, v105, v106, v107);
-                                            let v109 = constructor_output_reg(ctx, v108);
-                                            // Rule at src/isa/aarch64/lower.isle line 88.
-                                            return Some(v109);
-                                        }
-                                        &Opcode::Ishl => {
-                                            let v77 = C::unpack_value_array_2(ctx, v76);
-                                            let v80 = C::def_inst(ctx, v77.1);
-                                            if let Some(v81) = v80 {
-                                                let v82 = &C::inst_data(ctx, v81);
-                                                if let &InstructionData::UnaryImm {
-                                                    opcode: ref v83,
-                                                    imm: v84,
-                                                } = v82
-                                                {
-                                                    if let &Opcode::Iconst = v83 {
-                                                        let v85 = C::lshl_from_imm64(ctx, v28, v84);
-                                                        if let Some(v86) = v85 {
-                                                            let v34 = C::put_in_reg(ctx, v31.0);
-                                                            let v87 = C::put_in_reg(ctx, v77.0);
-                                                            let v88 = constructor_add_shift(
-                                                                ctx, v28, v34, v87, v86,
-                                                            );
-                                                            let v89 =
-                                                                constructor_output_reg(ctx, v88);
-                                                            // Rule at src/isa/aarch64/lower.isle line 77.
-                                                            return Some(v89);
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                        _ => {}
-                                    }
-                                }
-                            }
-                            let v48 = C::def_inst(ctx, v31.0);
-                            if let Some(v49) = v48 {
-                                let v50 = &C::inst_data(ctx, v49);
-                                match v50 {
-                                    &InstructionData::Binary {
-                                        opcode: ref v90,
-                                        args: ref v91,
-                                    } => {
-                                        match v90 {
-                                            &Opcode::Imul => {
-                                                let v92 = C::unpack_value_array_2(ctx, v91);
-                                                let v110 = C::put_in_reg(ctx, v92.0);
-                                                let v111 = C::put_in_reg(ctx, v92.1);
-                                                let v112 = C::put_in_reg(ctx, v31.1);
-                                                let v113 =
-                                                    constructor_madd(ctx, v28, v110, v111, v112);
-                                                let v114 = constructor_output_reg(ctx, v113);
-                                                // Rule at src/isa/aarch64/lower.isle line 91.
-                                                return Some(v114);
-                                            }
-                                            &Opcode::Ishl => {
-                                                let v92 = C::unpack_value_array_2(ctx, v91);
-                                                let v95 = C::def_inst(ctx, v92.1);
-                                                if let Some(v96) = v95 {
-                                                    let v97 = &C::inst_data(ctx, v96);
-                                                    if let &InstructionData::UnaryImm {
-                                                        opcode: ref v98,
-                                                        imm: v99,
-                                                    } = v97
-                                                    {
-                                                        if let &Opcode::Iconst = v98 {
-                                                            let v100 =
-                                                                C::lshl_from_imm64(ctx, v28, v99);
-                                                            if let Some(v101) = v100 {
-                                                                let v56 = C::put_in_reg(ctx, v31.1);
-                                                                let v102 =
-                                                                    C::put_in_reg(ctx, v92.0);
-                                                                let v103 = constructor_add_shift(
-                                                                    ctx, v28, v56, v102, v101,
-                                                                );
-                                                                let v104 = constructor_output_reg(
-                                                                    ctx, v103,
-                                                                );
-                                                                // Rule at src/isa/aarch64/lower.isle line 82.
-                                                                return Some(v104);
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                            _ => {}
-                                        }
-                                    }
-                                    &InstructionData::UnaryImm {
-                                        opcode: ref v51,
-                                        imm: v52,
-                                    } => {
-                                        if let &Opcode::Iconst = v51 {
-                                            let v53 = C::u64_from_imm64(ctx, v52);
-                                            let v54 = C::imm12_from_u64(ctx, v53);
-                                            if let Some(v55) = v54 {
-                                                let v56 = C::put_in_reg(ctx, v31.1);
-                                                let v57 = constructor_add_imm(ctx, v28, v56, v55);
-                                                let v58 = constructor_output_reg(ctx, v57);
-                                                // Rule at src/isa/aarch64/lower.isle line 54.
-                                                return Some(v58);
-                                            }
-                                        }
-                                    }
-                                    _ => {}
-                                }
-                            }
-                            if let Some(v39) = v38 {
-                                let v40 = &C::inst_data(ctx, v39);
-                                if let &InstructionData::UnaryImm {
-                                    opcode: ref v41,
-                                    imm: v42,
-                                } = v40
-                                {
-                                    if let &Opcode::Iconst = v41 {
-                                        let v43 = C::u64_from_imm64(ctx, v42);
-                                        let v44 = C::imm12_from_u64(ctx, v43);
-                                        if let Some(v45) = v44 {
-                                            let v34 = C::put_in_reg(ctx, v31.0);
-                                            let v46 = constructor_add_imm(ctx, v28, v34, v45);
-                                            let v47 = constructor_output_reg(ctx, v46);
-                                            // Rule at src/isa/aarch64/lower.isle line 51.
-                                            return Some(v47);
-                                        }
-                                    }
-                                }
-                            }
-                            let v63 = constructor_imm12_from_negated_value(ctx, v31.0);
-                            if let Some(v64) = v63 {
-                                let v56 = C::put_in_reg(ctx, v31.1);
-                                let v65 = constructor_sub_imm(ctx, v28, v56, v64);
-                                let v66 = constructor_output_reg(ctx, v65);
-                                // Rule at src/isa/aarch64/lower.isle line 63.
-                                return Some(v66);
-                            }
-                            let v59 = constructor_imm12_from_negated_value(ctx, v31.1);
-                            if let Some(v60) = v59 {
-                                let v34 = C::put_in_reg(ctx, v31.0);
-                                let v61 = constructor_sub_imm(ctx, v28, v34, v60);
-                                let v62 = constructor_output_reg(ctx, v61);
-                                // Rule at src/isa/aarch64/lower.isle line 59.
-                                return Some(v62);
-                            }
-                            let v71 = &C::extended_value_from_value(ctx, v31.0);
-                            if let Some(v72) = v71 {
-                                let v56 = C::put_in_reg(ctx, v31.1);
-                                let v73 = constructor_add_extend(ctx, v28, v56, v72);
-                                let v74 = constructor_output_reg(ctx, v73);
-                                // Rule at src/isa/aarch64/lower.isle line 72.
-                                return Some(v74);
-                            }
-                            let v67 = &C::extended_value_from_value(ctx, v31.1);
-                            if let Some(v68) = v67 {
-                                let v34 = C::put_in_reg(ctx, v31.0);
-                                let v69 = constructor_add_extend(ctx, v28, v34, v68);
-                                let v70 = constructor_output_reg(ctx, v69);
-                                // Rule at src/isa/aarch64/lower.isle line 69.
-                                return Some(v70);
-                            }
-                            let v34 = C::put_in_reg(ctx, v31.0);
-                            let v35 = C::put_in_reg(ctx, v31.1);
-                            let v36 = constructor_add(ctx, v28, v34, v35);
-                            let v37 = constructor_output_reg(ctx, v36);
-                            // Rule at src/isa/aarch64/lower.isle line 47.
-                            return Some(v37);
-                        }
-                        let v117 = C::multi_lane(ctx, v3);
-                        if let Some(v118) = v117 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v34 = C::put_in_reg(ctx, v31.0);
-                            let v35 = C::put_in_reg(ctx, v31.1);
-                            let v121 = &constructor_vector_size(ctx, v3);
-                            let v122 = constructor_add_vec(ctx, v34, v35, v121);
-                            let v123 = constructor_output_reg(ctx, v122);
-                            // Rule at src/isa/aarch64/lower.isle line 100.
-                            return Some(v123);
-                        }
-                        if v3 == I128 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v124 = C::put_in_regs(ctx, v31.0);
-                            let v126 = C::value_regs_get(ctx, v124, 0x0);
-                            let v128 = C::value_regs_get(ctx, v124, 0x1);
-                            let v129 = C::put_in_regs(ctx, v31.1);
-                            let v130 = C::value_regs_get(ctx, v129, 0x0);
-                            let v131 = C::value_regs_get(ctx, v129, 0x1);
-                            let v133 = &constructor_add_with_flags_paired(ctx, I64, v126, v130);
-                            let v134 = &constructor_adc_paired(ctx, I64, v128, v131);
-                            let v135 = constructor_with_flags(ctx, v133, v134);
-                            let v136 = C::output(ctx, v135);
-                            // Rule at src/isa/aarch64/lower.isle line 104.
-                            return Some(v136);
-                        }
-                        let v1807 = C::dynamic_lane(ctx, v3);
-                        if let Some(v1808) = v1807 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v34 = C::put_in_reg(ctx, v31.0);
-                            let v35 = C::put_in_reg(ctx, v31.1);
-                            let v121 = &constructor_vector_size(ctx, v3);
-                            let v122 = constructor_add_vec(ctx, v34, v35, v121);
-                            let v1811 = C::value_reg(ctx, v122);
-                            let v1812 = C::output(ctx, v1811);
-                            // Rule at src/isa/aarch64/lower_dynamic_neon.isle line 3.
-                            return Some(v1812);
-                        }
-                    }
-                }
-                &Opcode::Isub => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v27 = C::fits_in_64(ctx, v3);
-                        if let Some(v28) = v27 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v59 = constructor_imm12_from_negated_value(ctx, v31.1);
-                            if let Some(v60) = v59 {
-                                let v34 = C::put_in_reg(ctx, v31.0);
-                                let v564 = constructor_add_imm(ctx, v28, v34, v60);
-                                let v565 = constructor_output_reg(ctx, v564);
-                                // Rule at src/isa/aarch64/lower.isle line 700.
-                                return Some(v565);
-                            }
-                            let v67 = &C::extended_value_from_value(ctx, v31.1);
-                            if let Some(v68) = v67 {
-                                let v34 = C::put_in_reg(ctx, v31.0);
-                                let v566 = constructor_sub_extend(ctx, v28, v34, v68);
-                                let v567 = constructor_output_reg(ctx, v566);
-                                // Rule at src/isa/aarch64/lower.isle line 706.
-                                return Some(v567);
-                            }
-                            let v38 = C::def_inst(ctx, v31.1);
-                            if let Some(v39) = v38 {
-                                let v40 = &C::inst_data(ctx, v39);
-                                match v40 {
-                                    &InstructionData::Binary {
-                                        opcode: ref v75,
-                                        args: ref v76,
-                                    } => {
-                                        if let &Opcode::Imul = v75 {
-                                            let v77 = C::unpack_value_array_2(ctx, v76);
-                                            let v105 = C::put_in_reg(ctx, v77.0);
-                                            let v106 = C::put_in_reg(ctx, v77.1);
-                                            let v107 = C::put_in_reg(ctx, v31.0);
-                                            let v115 = constructor_msub(ctx, v28, v105, v106, v107);
-                                            let v116 = constructor_output_reg(ctx, v115);
-                                            // Rule at src/isa/aarch64/lower.isle line 95.
-                                            return Some(v116);
-                                        }
-                                    }
-                                    &InstructionData::UnaryImm {
-                                        opcode: ref v41,
-                                        imm: v42,
-                                    } => {
-                                        if let &Opcode::Iconst = v41 {
-                                            let v43 = C::u64_from_imm64(ctx, v42);
-                                            let v44 = C::imm12_from_u64(ctx, v43);
-                                            if let Some(v45) = v44 {
-                                                let v34 = C::put_in_reg(ctx, v31.0);
-                                                let v562 = constructor_sub_imm(ctx, v28, v34, v45);
-                                                let v563 = constructor_output_reg(ctx, v562);
-                                                // Rule at src/isa/aarch64/lower.isle line 695.
-                                                return Some(v563);
-                                            }
-                                        }
-                                    }
-                                    _ => {}
-                                }
-                            }
-                        }
-                        if v3 == I128 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v124 = C::put_in_regs(ctx, v31.0);
-                            let v572 = C::put_in_regs(ctx, v31.1);
-                            let v573 = constructor_sub_i128(ctx, v124, v572);
-                            let v574 = C::output(ctx, v573);
-                            // Rule at src/isa/aarch64/lower.isle line 721.
-                            return Some(v574);
-                        }
-                        let v117 = C::multi_lane(ctx, v3);
-                        if let Some(v118) = v117 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v34 = C::put_in_reg(ctx, v31.0);
-                            let v35 = C::put_in_reg(ctx, v31.1);
-                            let v121 = &constructor_vector_size(ctx, v3);
-                            let v570 = constructor_sub_vec(ctx, v34, v35, v121);
-                            let v571 = constructor_output_reg(ctx, v570);
-                            // Rule at src/isa/aarch64/lower.isle line 717.
-                            return Some(v571);
-                        }
-                        if let Some(v28) = v27 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v38 = C::def_inst(ctx, v31.1);
-                            if let Some(v39) = v38 {
-                                let v40 = &C::inst_data(ctx, v39);
-                                if let &InstructionData::Binary {
-                                    opcode: ref v75,
-                                    args: ref v76,
-                                } = v40
-                                {
-                                    if let &Opcode::Ishl = v75 {
-                                        let v77 = C::unpack_value_array_2(ctx, v76);
-                                        let v80 = C::def_inst(ctx, v77.1);
-                                        if let Some(v81) = v80 {
-                                            let v82 = &C::inst_data(ctx, v81);
-                                            if let &InstructionData::UnaryImm {
-                                                opcode: ref v83,
-                                                imm: v84,
-                                            } = v82
-                                            {
-                                                if let &Opcode::Iconst = v83 {
-                                                    let v85 = C::lshl_from_imm64(ctx, v28, v84);
-                                                    if let Some(v86) = v85 {
-                                                        let v34 = C::put_in_reg(ctx, v31.0);
-                                                        let v87 = C::put_in_reg(ctx, v77.0);
-                                                        let v568 = constructor_sub_shift(
-                                                            ctx, v28, v34, v87, v86,
-                                                        );
-                                                        let v569 =
-                                                            constructor_output_reg(ctx, v568);
-                                                        // Rule at src/isa/aarch64/lower.isle line 711.
-                                                        return Some(v569);
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                            }
-                            let v34 = C::put_in_reg(ctx, v31.0);
-                            let v35 = C::put_in_reg(ctx, v31.1);
-                            let v560 = constructor_sub(ctx, v28, v34, v35);
-                            let v561 = constructor_output_reg(ctx, v560);
-                            // Rule at src/isa/aarch64/lower.isle line 691.
-                            return Some(v561);
-                        }
-                        let v1807 = C::dynamic_lane(ctx, v3);
-                        if let Some(v1808) = v1807 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v34 = C::put_in_reg(ctx, v31.0);
-                            let v35 = C::put_in_reg(ctx, v31.1);
-                            let v121 = &constructor_vector_size(ctx, v3);
-                            let v570 = constructor_sub_vec(ctx, v34, v35, v121);
-                            let v1813 = C::value_reg(ctx, v570);
-                            let v1814 = C::output(ctx, v1813);
-                            // Rule at src/isa/aarch64/lower_dynamic_neon.isle line 7.
-                            return Some(v1814);
-                        }
-                    }
-                }
-                &Opcode::Imul => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            I128 => {
-                                let v31 = C::unpack_value_array_2(ctx, v30);
-                                let v124 = C::put_in_regs(ctx, v31.0);
-                                let v126 = C::value_regs_get(ctx, v124, 0x0);
-                                let v128 = C::value_regs_get(ctx, v124, 0x1);
-                                let v129 = C::put_in_regs(ctx, v31.1);
-                                let v130 = C::value_regs_get(ctx, v129, 0x0);
-                                let v131 = C::value_regs_get(ctx, v129, 0x1);
-                                let v599 = constructor_umulh(ctx, I64, v126, v130);
-                                let v600 = constructor_madd(ctx, I64, v126, v131, v599);
-                                let v601 = constructor_madd(ctx, I64, v128, v130, v600);
-                                let v602 = C::zero_reg(ctx);
-                                let v603 = constructor_madd(ctx, I64, v126, v130, v602);
-                                let v604 = C::value_regs(ctx, v603, v601);
-                                let v605 = C::output(ctx, v604);
-                                // Rule at src/isa/aarch64/lower.isle line 765.
-                                return Some(v605);
-                            }
-                            I16X8 => {
-                                let v31 = C::unpack_value_array_2(ctx, v30);
-                                let v38 = C::def_inst(ctx, v31.1);
-                                if let Some(v39) = v38 {
-                                    let v40 = &C::inst_data(ctx, v39);
-                                    if let &InstructionData::Unary {
-                                        opcode: ref v300,
-                                        arg: v301,
-                                    } = v40
-                                    {
-                                        match v300 {
-                                            &Opcode::SwidenLow => {
-                                                let v48 = C::def_inst(ctx, v31.0);
-                                                if let Some(v49) = v48 {
-                                                    let v50 = &C::inst_data(ctx, v49);
-                                                    if let &InstructionData::Unary {
-                                                        opcode: ref v298,
-                                                        arg: v299,
-                                                    } = v50
-                                                    {
-                                                        if let &Opcode::SwidenLow = v298 {
-                                                            let v618 = C::value_type(ctx, v299);
-                                                            if v618 == I8X16 {
-                                                                let v619 = C::value_type(ctx, v301);
-                                                                if v619 == I8X16 {
-                                                                    let v302 =
-                                                                        C::put_in_reg(ctx, v299);
-                                                                    let v620 =
-                                                                        C::put_in_reg(ctx, v301);
-                                                                    let v621 = constructor_smull8(
-                                                                        ctx, v302, v620, false,
-                                                                    );
-                                                                    let v622 =
-                                                                        constructor_output_reg(
-                                                                            ctx, v621,
-                                                                        );
-                                                                    // Rule at src/isa/aarch64/lower.isle line 864.
-                                                                    return Some(v622);
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                            &Opcode::SwidenHigh => {
-                                                let v48 = C::def_inst(ctx, v31.0);
-                                                if let Some(v49) = v48 {
-                                                    let v50 = &C::inst_data(ctx, v49);
-                                                    if let &InstructionData::Unary {
-                                                        opcode: ref v298,
-                                                        arg: v299,
-                                                    } = v50
-                                                    {
-                                                        if let &Opcode::SwidenHigh = v298 {
-                                                            let v618 = C::value_type(ctx, v299);
-                                                            if v618 == I8X16 {
-                                                                let v619 = C::value_type(ctx, v301);
-                                                                if v619 == I8X16 {
-                                                                    let v302 =
-                                                                        C::put_in_reg(ctx, v299);
-                                                                    let v620 =
-                                                                        C::put_in_reg(ctx, v301);
-                                                                    let v623 = constructor_smull8(
-                                                                        ctx, v302, v620, true,
-                                                                    );
-                                                                    let v624 =
-                                                                        constructor_output_reg(
-                                                                            ctx, v623,
-                                                                        );
-                                                                    // Rule at src/isa/aarch64/lower.isle line 870.
-                                                                    return Some(v624);
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                            &Opcode::UwidenLow => {
-                                                let v48 = C::def_inst(ctx, v31.0);
-                                                if let Some(v49) = v48 {
-                                                    let v50 = &C::inst_data(ctx, v49);
-                                                    if let &InstructionData::Unary {
-                                                        opcode: ref v298,
-                                                        arg: v299,
-                                                    } = v50
-                                                    {
-                                                        if let &Opcode::UwidenLow = v298 {
-                                                            let v618 = C::value_type(ctx, v299);
-                                                            if v618 == I8X16 {
-                                                                let v619 = C::value_type(ctx, v301);
-                                                                if v619 == I8X16 {
-                                                                    let v302 =
-                                                                        C::put_in_reg(ctx, v299);
-                                                                    let v620 =
-                                                                        C::put_in_reg(ctx, v301);
-                                                                    let v625 = constructor_umull8(
-                                                                        ctx, v302, v620, false,
-                                                                    );
-                                                                    let v626 =
-                                                                        constructor_output_reg(
-                                                                            ctx, v625,
-                                                                        );
-                                                                    // Rule at src/isa/aarch64/lower.isle line 876.
-                                                                    return Some(v626);
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                            &Opcode::UwidenHigh => {
-                                                let v48 = C::def_inst(ctx, v31.0);
-                                                if let Some(v49) = v48 {
-                                                    let v50 = &C::inst_data(ctx, v49);
-                                                    if let &InstructionData::Unary {
-                                                        opcode: ref v298,
-                                                        arg: v299,
-                                                    } = v50
-                                                    {
-                                                        if let &Opcode::UwidenHigh = v298 {
-                                                            let v618 = C::value_type(ctx, v299);
-                                                            if v618 == I8X16 {
-                                                                let v619 = C::value_type(ctx, v301);
-                                                                if v619 == I8X16 {
-                                                                    let v302 =
-                                                                        C::put_in_reg(ctx, v299);
-                                                                    let v620 =
-                                                                        C::put_in_reg(ctx, v301);
-                                                                    let v627 = constructor_umull8(
-                                                                        ctx, v302, v620, true,
-                                                                    );
-                                                                    let v628 =
-                                                                        constructor_output_reg(
-                                                                            ctx, v627,
-                                                                        );
-                                                                    // Rule at src/isa/aarch64/lower.isle line 882.
-                                                                    return Some(v628);
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                            _ => {}
-                                        }
-                                    }
-                                }
-                            }
-                            I32X4 => {
-                                let v31 = C::unpack_value_array_2(ctx, v30);
-                                let v38 = C::def_inst(ctx, v31.1);
-                                if let Some(v39) = v38 {
-                                    let v40 = &C::inst_data(ctx, v39);
-                                    if let &InstructionData::Unary {
-                                        opcode: ref v300,
-                                        arg: v301,
-                                    } = v40
-                                    {
-                                        match v300 {
-                                            &Opcode::SwidenLow => {
-                                                let v48 = C::def_inst(ctx, v31.0);
-                                                if let Some(v49) = v48 {
-                                                    let v50 = &C::inst_data(ctx, v49);
-                                                    if let &InstructionData::Unary {
-                                                        opcode: ref v298,
-                                                        arg: v299,
-                                                    } = v50
-                                                    {
-                                                        if let &Opcode::SwidenLow = v298 {
-                                                            let v618 = C::value_type(ctx, v299);
-                                                            if v618 == I16X8 {
-                                                                let v619 = C::value_type(ctx, v301);
-                                                                if v619 == I16X8 {
-                                                                    let v302 =
-                                                                        C::put_in_reg(ctx, v299);
-                                                                    let v620 =
-                                                                        C::put_in_reg(ctx, v301);
-                                                                    let v629 = constructor_smull16(
-                                                                        ctx, v302, v620, false,
-                                                                    );
-                                                                    let v630 =
-                                                                        constructor_output_reg(
-                                                                            ctx, v629,
-                                                                        );
-                                                                    // Rule at src/isa/aarch64/lower.isle line 888.
-                                                                    return Some(v630);
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                            &Opcode::SwidenHigh => {
-                                                let v48 = C::def_inst(ctx, v31.0);
-                                                if let Some(v49) = v48 {
-                                                    let v50 = &C::inst_data(ctx, v49);
-                                                    if let &InstructionData::Unary {
-                                                        opcode: ref v298,
-                                                        arg: v299,
-                                                    } = v50
-                                                    {
-                                                        if let &Opcode::SwidenHigh = v298 {
-                                                            let v618 = C::value_type(ctx, v299);
-                                                            if v618 == I16X8 {
-                                                                let v619 = C::value_type(ctx, v301);
-                                                                if v619 == I16X8 {
-                                                                    let v302 =
-                                                                        C::put_in_reg(ctx, v299);
-                                                                    let v620 =
-                                                                        C::put_in_reg(ctx, v301);
-                                                                    let v631 = constructor_smull16(
-                                                                        ctx, v302, v620, true,
-                                                                    );
-                                                                    let v632 =
-                                                                        constructor_output_reg(
-                                                                            ctx, v631,
-                                                                        );
-                                                                    // Rule at src/isa/aarch64/lower.isle line 894.
-                                                                    return Some(v632);
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                            &Opcode::UwidenLow => {
-                                                let v48 = C::def_inst(ctx, v31.0);
-                                                if let Some(v49) = v48 {
-                                                    let v50 = &C::inst_data(ctx, v49);
-                                                    if let &InstructionData::Unary {
-                                                        opcode: ref v298,
-                                                        arg: v299,
-                                                    } = v50
-                                                    {
-                                                        if let &Opcode::UwidenLow = v298 {
-                                                            let v618 = C::value_type(ctx, v299);
-                                                            if v618 == I16X8 {
-                                                                let v619 = C::value_type(ctx, v301);
-                                                                if v619 == I16X8 {
-                                                                    let v302 =
-                                                                        C::put_in_reg(ctx, v299);
-                                                                    let v620 =
-                                                                        C::put_in_reg(ctx, v301);
-                                                                    let v633 = constructor_umull16(
-                                                                        ctx, v302, v620, false,
-                                                                    );
-                                                                    let v634 =
-                                                                        constructor_output_reg(
-                                                                            ctx, v633,
-                                                                        );
-                                                                    // Rule at src/isa/aarch64/lower.isle line 900.
-                                                                    return Some(v634);
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                            &Opcode::UwidenHigh => {
-                                                let v48 = C::def_inst(ctx, v31.0);
-                                                if let Some(v49) = v48 {
-                                                    let v50 = &C::inst_data(ctx, v49);
-                                                    if let &InstructionData::Unary {
-                                                        opcode: ref v298,
-                                                        arg: v299,
-                                                    } = v50
-                                                    {
-                                                        if let &Opcode::UwidenHigh = v298 {
-                                                            let v618 = C::value_type(ctx, v299);
-                                                            if v618 == I16X8 {
-                                                                let v619 = C::value_type(ctx, v301);
-                                                                if v619 == I16X8 {
-                                                                    let v302 =
-                                                                        C::put_in_reg(ctx, v299);
-                                                                    let v620 =
-                                                                        C::put_in_reg(ctx, v301);
-                                                                    let v635 = constructor_umull16(
-                                                                        ctx, v302, v620, true,
-                                                                    );
-                                                                    let v636 =
-                                                                        constructor_output_reg(
-                                                                            ctx, v635,
-                                                                        );
-                                                                    // Rule at src/isa/aarch64/lower.isle line 906.
-                                                                    return Some(v636);
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                            _ => {}
-                                        }
-                                    }
-                                }
-                            }
-                            I64X2 => {
-                                let v31 = C::unpack_value_array_2(ctx, v30);
-                                let v38 = C::def_inst(ctx, v31.1);
-                                if let Some(v39) = v38 {
-                                    let v40 = &C::inst_data(ctx, v39);
-                                    if let &InstructionData::Unary {
-                                        opcode: ref v300,
-                                        arg: v301,
-                                    } = v40
-                                    {
-                                        match v300 {
-                                            &Opcode::SwidenLow => {
-                                                let v48 = C::def_inst(ctx, v31.0);
-                                                if let Some(v49) = v48 {
-                                                    let v50 = &C::inst_data(ctx, v49);
-                                                    if let &InstructionData::Unary {
-                                                        opcode: ref v298,
-                                                        arg: v299,
-                                                    } = v50
-                                                    {
-                                                        if let &Opcode::SwidenLow = v298 {
-                                                            let v618 = C::value_type(ctx, v299);
-                                                            if v618 == I32X4 {
-                                                                let v619 = C::value_type(ctx, v301);
-                                                                if v619 == I32X4 {
-                                                                    let v302 =
-                                                                        C::put_in_reg(ctx, v299);
-                                                                    let v620 =
-                                                                        C::put_in_reg(ctx, v301);
-                                                                    let v637 = constructor_smull32(
-                                                                        ctx, v302, v620, false,
-                                                                    );
-                                                                    let v638 =
-                                                                        constructor_output_reg(
-                                                                            ctx, v637,
-                                                                        );
-                                                                    // Rule at src/isa/aarch64/lower.isle line 912.
-                                                                    return Some(v638);
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                            &Opcode::SwidenHigh => {
-                                                let v48 = C::def_inst(ctx, v31.0);
-                                                if let Some(v49) = v48 {
-                                                    let v50 = &C::inst_data(ctx, v49);
-                                                    if let &InstructionData::Unary {
-                                                        opcode: ref v298,
-                                                        arg: v299,
-                                                    } = v50
-                                                    {
-                                                        if let &Opcode::SwidenHigh = v298 {
-                                                            let v618 = C::value_type(ctx, v299);
-                                                            if v618 == I32X4 {
-                                                                let v619 = C::value_type(ctx, v301);
-                                                                if v619 == I32X4 {
-                                                                    let v302 =
-                                                                        C::put_in_reg(ctx, v299);
-                                                                    let v620 =
-                                                                        C::put_in_reg(ctx, v301);
-                                                                    let v639 = constructor_smull32(
-                                                                        ctx, v302, v620, true,
-                                                                    );
-                                                                    let v640 =
-                                                                        constructor_output_reg(
-                                                                            ctx, v639,
-                                                                        );
-                                                                    // Rule at src/isa/aarch64/lower.isle line 918.
-                                                                    return Some(v640);
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                            &Opcode::UwidenLow => {
-                                                let v48 = C::def_inst(ctx, v31.0);
-                                                if let Some(v49) = v48 {
-                                                    let v50 = &C::inst_data(ctx, v49);
-                                                    if let &InstructionData::Unary {
-                                                        opcode: ref v298,
-                                                        arg: v299,
-                                                    } = v50
-                                                    {
-                                                        if let &Opcode::UwidenLow = v298 {
-                                                            let v618 = C::value_type(ctx, v299);
-                                                            if v618 == I32X4 {
-                                                                let v619 = C::value_type(ctx, v301);
-                                                                if v619 == I32X4 {
-                                                                    let v302 =
-                                                                        C::put_in_reg(ctx, v299);
-                                                                    let v620 =
-                                                                        C::put_in_reg(ctx, v301);
-                                                                    let v641 = constructor_umull32(
-                                                                        ctx, v302, v620, false,
-                                                                    );
-                                                                    let v642 =
-                                                                        constructor_output_reg(
-                                                                            ctx, v641,
-                                                                        );
-                                                                    // Rule at src/isa/aarch64/lower.isle line 924.
-                                                                    return Some(v642);
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                            &Opcode::UwidenHigh => {
-                                                let v48 = C::def_inst(ctx, v31.0);
-                                                if let Some(v49) = v48 {
-                                                    let v50 = &C::inst_data(ctx, v49);
-                                                    if let &InstructionData::Unary {
-                                                        opcode: ref v298,
-                                                        arg: v299,
-                                                    } = v50
-                                                    {
-                                                        if let &Opcode::UwidenHigh = v298 {
-                                                            let v618 = C::value_type(ctx, v299);
-                                                            if v618 == I32X4 {
-                                                                let v619 = C::value_type(ctx, v301);
-                                                                if v619 == I32X4 {
-                                                                    let v302 =
-                                                                        C::put_in_reg(ctx, v299);
-                                                                    let v620 =
-                                                                        C::put_in_reg(ctx, v301);
-                                                                    let v643 = constructor_umull32(
-                                                                        ctx, v302, v620, true,
-                                                                    );
-                                                                    let v644 =
-                                                                        constructor_output_reg(
-                                                                            ctx, v643,
-                                                                        );
-                                                                    // Rule at src/isa/aarch64/lower.isle line 930.
-                                                                    return Some(v644);
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                            _ => {}
-                                        }
-                                    }
-                                }
-                                let v34 = C::put_in_reg(ctx, v31.0);
-                                let v35 = C::put_in_reg(ctx, v31.1);
-                                let v610 = constructor_rev64(ctx, v35, &VectorSize::Size32x4);
-                                let v611 = constructor_mul(ctx, v610, v34, &VectorSize::Size32x4);
-                                let v612 = constructor_xtn(ctx, v34, &ScalarSize::Size32);
-                                let v613 = constructor_addp(ctx, v611, v611, &VectorSize::Size32x4);
-                                let v614 = constructor_xtn(ctx, v35, &ScalarSize::Size32);
-                                let v615 = constructor_shll32(ctx, v613, false);
-                                let v616 = constructor_umlal32(ctx, v615, v614, v612, false);
-                                let v617 = constructor_output_reg(ctx, v616);
-                                // Rule at src/isa/aarch64/lower.isle line 825.
-                                return Some(v617);
-                            }
-                            _ => {}
-                        }
-                        let v575 = C::ty_vec128(ctx, v3);
-                        if let Some(v576) = v575 {
-                            let v606 = C::not_i64x2(ctx, v576);
-                            if let Some(v607) = v606 {
-                                let v31 = C::unpack_value_array_2(ctx, v30);
-                                let v34 = C::put_in_reg(ctx, v31.0);
-                                let v35 = C::put_in_reg(ctx, v31.1);
-                                let v577 = &constructor_vector_size(ctx, v576);
-                                let v608 = constructor_mul(ctx, v34, v35, v577);
-                                let v609 = constructor_output_reg(ctx, v608);
-                                // Rule at src/isa/aarch64/lower.isle line 793.
-                                return Some(v609);
-                            }
-                        }
-                        let v27 = C::fits_in_64(ctx, v3);
-                        if let Some(v28) = v27 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v34 = C::put_in_reg(ctx, v31.0);
-                            let v35 = C::put_in_reg(ctx, v31.1);
-                            let v269 = C::zero_reg(ctx);
-                            let v597 = constructor_madd(ctx, v28, v34, v35, v269);
-                            let v598 = constructor_output_reg(ctx, v597);
-                            // Rule at src/isa/aarch64/lower.isle line 761.
-                            return Some(v598);
-                        }
-                        let v336 = C::lane_fits_in_32(ctx, v3);
-                        if let Some(v337) = v336 {
-                            let v1815 = C::dynamic_lane(ctx, v337);
-                            if let Some(v1816) = v1815 {
-                                let v31 = C::unpack_value_array_2(ctx, v30);
-                                let v34 = C::put_in_reg(ctx, v31.0);
-                                let v35 = C::put_in_reg(ctx, v31.1);
-                                let v339 = &constructor_vector_size(ctx, v337);
-                                let v1820 =
-                                    constructor_vec_rrr(ctx, &VecALUOp::Mul, v34, v35, v339);
-                                let v1821 = C::value_reg(ctx, v1820);
-                                let v1822 = C::output(ctx, v1821);
-                                // Rule at src/isa/aarch64/lower_dynamic_neon.isle line 11.
-                                return Some(v1822);
-                            }
-                        }
-                    }
-                }
-                &Opcode::Umulhi => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        if v3 == I64 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v34 = C::put_in_reg(ctx, v31.0);
-                            let v35 = C::put_in_reg(ctx, v31.1);
-                            let v654 = constructor_umulh(ctx, I64, v34, v35);
-                            let v655 = constructor_output_reg(ctx, v654);
-                            // Rule at src/isa/aarch64/lower.isle line 949.
-                            return Some(v655);
-                        }
-                        let v318 = C::fits_in_32(ctx, v3);
-                        if let Some(v319) = v318 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v656 = constructor_put_in_reg_zext64(ctx, v31.0);
-                            let v657 = constructor_put_in_reg_zext64(ctx, v31.1);
-                            let v269 = C::zero_reg(ctx);
-                            let v658 = constructor_madd(ctx, I64, v656, v657, v269);
-                            let v650 = C::ty_bits(ctx, v319);
-                            let v651 = C::imm_shift_from_u8(ctx, v650);
-                            let v659 = constructor_lsr_imm(ctx, I64, v658, v651);
-                            let v660 = C::value_reg(ctx, v659);
-                            let v661 = C::output(ctx, v660);
-                            // Rule at src/isa/aarch64/lower.isle line 952.
-                            return Some(v661);
-                        }
-                    }
-                }
-                &Opcode::Smulhi => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        if v3 == I64 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v34 = C::put_in_reg(ctx, v31.0);
-                            let v35 = C::put_in_reg(ctx, v31.1);
-                            let v645 = constructor_smulh(ctx, I64, v34, v35);
-                            let v646 = constructor_output_reg(ctx, v645);
-                            // Rule at src/isa/aarch64/lower.isle line 937.
-                            return Some(v646);
-                        }
-                        let v318 = C::fits_in_32(ctx, v3);
-                        if let Some(v319) = v318 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v647 = constructor_put_in_reg_sext64(ctx, v31.0);
-                            let v648 = constructor_put_in_reg_sext64(ctx, v31.1);
-                            let v269 = C::zero_reg(ctx);
-                            let v649 = constructor_madd(ctx, I64, v647, v648, v269);
-                            let v650 = C::ty_bits(ctx, v319);
-                            let v651 = C::imm_shift_from_u8(ctx, v650);
-                            let v652 = constructor_asr_imm(ctx, I64, v649, v651);
-                            let v653 = constructor_output_reg(ctx, v652);
-                            // Rule at src/isa/aarch64/lower.isle line 940.
-                            return Some(v653);
-                        }
-                    }
-                }
-                &Opcode::SqmulRoundSat => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v117 = C::multi_lane(ctx, v3);
-                        if let Some(v118) = v117 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v34 = C::put_in_reg(ctx, v31.0);
-                            let v35 = C::put_in_reg(ctx, v31.1);
-                            let v121 = &constructor_vector_size(ctx, v3);
-                            let v343 =
-                                constructor_vec_rrr(ctx, &VecALUOp::Sqrdmulh, v34, v35, v121);
-                            let v344 = constructor_output_reg(ctx, v343);
-                            // Rule at src/isa/aarch64/lower.isle line 367.
-                            return Some(v344);
-                        }
-                    }
-                }
-                &Opcode::Udiv => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v27 = C::fits_in_64(ctx, v3);
-                        if let Some(v28) = v27 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v656 = constructor_put_in_reg_zext64(ctx, v31.0);
-                            let v662 = constructor_put_nonzero_in_reg_zext64(ctx, v31.1);
-                            let v663 = constructor_a64_udiv(ctx, I64, v656, v662);
-                            let v664 = constructor_output_reg(ctx, v663);
-                            // Rule at src/isa/aarch64/lower.isle line 968.
-                            return Some(v664);
-                        }
-                    }
-                }
-                &Opcode::Sdiv => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v27 = C::fits_in_64(ctx, v3);
-                        if let Some(v28) = v27 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v38 = C::def_inst(ctx, v31.1);
-                            if let Some(v39) = v38 {
-                                let v40 = &C::inst_data(ctx, v39);
-                                if let &InstructionData::UnaryImm {
-                                    opcode: ref v41,
-                                    imm: v42,
-                                } = v40
-                                {
-                                    if let &Opcode::Iconst = v41 {
-                                        let v669 = C::safe_divisor_from_imm64(ctx, v28, v42);
-                                        if let Some(v670) = v669 {
-                                            let v647 = constructor_put_in_reg_sext64(ctx, v31.0);
-                                            let v672 =
-                                                constructor_imm(ctx, v28, &ImmExtend::Sign, v670);
-                                            let v673 = constructor_a64_sdiv(ctx, I64, v647, v672);
-                                            let v674 = constructor_output_reg(ctx, v673);
-                                            // Rule at src/isa/aarch64/lower.isle line 1010.
-                                            return Some(v674);
-                                        }
-                                    }
-                                }
-                            }
-                            let v647 = constructor_put_in_reg_sext64(ctx, v31.0);
-                            let v665 = constructor_put_nonzero_in_reg_sext64(ctx, v31.1);
-                            let v666 = constructor_trap_if_div_overflow(ctx, v28, v647, v665);
-                            let v667 = constructor_a64_sdiv(ctx, I64, v666, v665);
-                            let v668 = constructor_output_reg(ctx, v667);
-                            // Rule at src/isa/aarch64/lower.isle line 1001.
-                            return Some(v668);
-                        }
-                    }
-                }
-                &Opcode::Urem => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v27 = C::fits_in_64(ctx, v3);
-                        if let Some(v28) = v27 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v656 = constructor_put_in_reg_zext64(ctx, v31.0);
-                            let v662 = constructor_put_nonzero_in_reg_zext64(ctx, v31.1);
-                            let v663 = constructor_a64_udiv(ctx, I64, v656, v662);
-                            let v675 = constructor_msub(ctx, I64, v663, v662, v656);
-                            let v676 = constructor_output_reg(ctx, v675);
-                            // Rule at src/isa/aarch64/lower.isle line 1039.
-                            return Some(v676);
-                        }
-                    }
-                }
-                &Opcode::Srem => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v27 = C::fits_in_64(ctx, v3);
-                        if let Some(v28) = v27 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v647 = constructor_put_in_reg_sext64(ctx, v31.0);
-                            let v665 = constructor_put_nonzero_in_reg_sext64(ctx, v31.1);
-                            let v677 = constructor_a64_sdiv(ctx, I64, v647, v665);
-                            let v678 = constructor_msub(ctx, I64, v677, v665, v647);
-                            let v679 = constructor_output_reg(ctx, v678);
-                            // Rule at src/isa/aarch64/lower.isle line 1046.
-                            return Some(v679);
-                        }
-                    }
-                }
-                &Opcode::UaddOverflow => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v1726 = C::ty_32_or_64(ctx, v3);
-                        if let Some(v1727) = v1726 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v1730 = constructor_overflow_op_normal(
-                                ctx,
-                                v1727,
-                                v31.0,
-                                v31.1,
-                                &ALUOp::AddS,
-                                &Cond::Hs,
-                            );
-                            // Rule at src/isa/aarch64/lower.isle line 2671.
-                            return Some(v1730);
-                        }
-                        let v909 = C::fits_in_16(ctx, v3);
-                        if let Some(v910) = v909 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v1725 = constructor_overflow_op_small(
-                                ctx,
-                                v910,
-                                v31.0,
-                                v31.1,
-                                &ArgumentExtension::Uext,
-                                &ALUOp::Add,
-                            );
-                            // Rule at src/isa/aarch64/lower.isle line 2667.
-                            return Some(v1725);
-                        }
-                        if v3 == I128 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v1732 = constructor_overflow_op_128(
-                                ctx,
-                                v31.0,
-                                v31.1,
-                                &ALUOp::AddS,
-                                &ALUOp::AdcS,
-                                &Cond::Hs,
-                            );
-                            // Rule at src/isa/aarch64/lower.isle line 2675.
-                            return Some(v1732);
-                        }
-                    }
-                }
-                &Opcode::SaddOverflow => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v1726 = C::ty_32_or_64(ctx, v3);
-                        if let Some(v1727) = v1726 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v1736 = constructor_overflow_op_normal(
-                                ctx,
-                                v1727,
-                                v31.0,
-                                v31.1,
-                                &ALUOp::AddS,
-                                &Cond::Vs,
-                            );
-                            // Rule at src/isa/aarch64/lower.isle line 2689.
-                            return Some(v1736);
-                        }
-                        let v909 = C::fits_in_16(ctx, v3);
-                        if let Some(v910) = v909 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v1734 = constructor_overflow_op_small(
-                                ctx,
-                                v910,
-                                v31.0,
-                                v31.1,
-                                &ArgumentExtension::Sext,
-                                &ALUOp::Add,
-                            );
-                            // Rule at src/isa/aarch64/lower.isle line 2684.
-                            return Some(v1734);
-                        }
-                        if v3 == I128 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v1737 = constructor_overflow_op_128(
-                                ctx,
-                                v31.0,
-                                v31.1,
-                                &ALUOp::AddS,
-                                &ALUOp::AdcS,
-                                &Cond::Vs,
-                            );
-                            // Rule at src/isa/aarch64/lower.isle line 2695.
-                            return Some(v1737);
-                        }
-                    }
-                }
-                &Opcode::UsubOverflow => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v1726 = C::ty_32_or_64(ctx, v3);
-                        if let Some(v1727) = v1726 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v1741 = constructor_overflow_op_normal(
-                                ctx,
-                                v1727,
-                                v31.0,
-                                v31.1,
-                                &ALUOp::SubS,
-                                &Cond::Lo,
-                            );
-                            // Rule at src/isa/aarch64/lower.isle line 2709.
-                            return Some(v1741);
-                        }
-                        let v909 = C::fits_in_16(ctx, v3);
-                        if let Some(v910) = v909 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v1739 = constructor_overflow_op_small(
-                                ctx,
-                                v910,
-                                v31.0,
-                                v31.1,
-                                &ArgumentExtension::Uext,
-                                &ALUOp::Sub,
-                            );
-                            // Rule at src/isa/aarch64/lower.isle line 2704.
-                            return Some(v1739);
-                        }
-                        if v3 == I128 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v1743 = constructor_overflow_op_128(
-                                ctx,
-                                v31.0,
-                                v31.1,
-                                &ALUOp::SubS,
-                                &ALUOp::SbcS,
-                                &Cond::Lo,
-                            );
-                            // Rule at src/isa/aarch64/lower.isle line 2715.
-                            return Some(v1743);
-                        }
-                    }
-                }
-                &Opcode::SsubOverflow => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v1726 = C::ty_32_or_64(ctx, v3);
-                        if let Some(v1727) = v1726 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v1745 = constructor_overflow_op_normal(
-                                ctx,
-                                v1727,
-                                v31.0,
-                                v31.1,
-                                &ALUOp::SubS,
-                                &Cond::Vs,
-                            );
-                            // Rule at src/isa/aarch64/lower.isle line 2729.
-                            return Some(v1745);
-                        }
-                        let v909 = C::fits_in_16(ctx, v3);
-                        if let Some(v910) = v909 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v1744 = constructor_overflow_op_small(
-                                ctx,
-                                v910,
-                                v31.0,
-                                v31.1,
-                                &ArgumentExtension::Sext,
-                                &ALUOp::Sub,
-                            );
-                            // Rule at src/isa/aarch64/lower.isle line 2724.
-                            return Some(v1744);
-                        }
-                        if v3 == I128 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v1746 = constructor_overflow_op_128(
-                                ctx,
-                                v31.0,
-                                v31.1,
-                                &ALUOp::SubS,
-                                &ALUOp::SbcS,
-                                &Cond::Vs,
-                            );
-                            // Rule at src/isa/aarch64/lower.isle line 2735.
-                            return Some(v1746);
-                        }
-                    }
-                }
-                &Opcode::UmulOverflow => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            I32 => {
-                                let v31 = C::unpack_value_array_2(ctx, v30);
-                                let v34 = C::put_in_reg(ctx, v31.0);
-                                let v35 = C::put_in_reg(ctx, v31.1);
-                                let v269 = C::zero_reg(ctx);
-                                let v1757 = constructor_umaddl(ctx, v34, v35, v269);
-                                let v1759 = &constructor_cmp_extend(
-                                    ctx,
-                                    &OperandSize::Size64,
-                                    v1757,
-                                    v1757,
-                                    &ExtendOp::UXTW,
-                                );
-                                let v1760 = &constructor_cset(ctx, &Cond::Ne);
-                                let v1761 = constructor_with_flags_reg(ctx, v1759, v1760);
-                                let v1762 = C::value_reg(ctx, v1757);
-                                let v1763 = C::value_reg(ctx, v1761);
-                                let v1764 = C::output_pair(ctx, v1762, v1763);
-                                // Rule at src/isa/aarch64/lower.isle line 2761.
-                                return Some(v1764);
-                            }
-                            I64 => {
-                                let v31 = C::unpack_value_array_2(ctx, v30);
-                                let v34 = C::put_in_reg(ctx, v31.0);
-                                let v35 = C::put_in_reg(ctx, v31.1);
-                                let v269 = C::zero_reg(ctx);
-                                let v1765 = constructor_madd(ctx, I64, v34, v35, v269);
-                                let v922 = C::put_in_reg(ctx, v31.0);
-                                let v1766 = C::put_in_reg(ctx, v31.1);
-                                let v1767 = constructor_umulh(ctx, I64, v922, v1766);
-                                let v1768 = C::u8_into_imm12(ctx, 0x0);
-                                let v1769 = &constructor_cmp64_imm(ctx, v1767, v1768);
-                                let v1770 = &constructor_cset(ctx, &Cond::Ne);
-                                let v1771 = constructor_with_flags_reg(ctx, v1769, v1770);
-                                let v1772 = C::value_reg(ctx, v1765);
-                                let v1773 = C::value_reg(ctx, v1771);
-                                let v1774 = C::output_pair(ctx, v1772, v1773);
-                                // Rule at src/isa/aarch64/lower.isle line 2775.
-                                return Some(v1774);
-                            }
-                            _ => {}
-                        }
-                        let v909 = C::fits_in_16(ctx, v3);
-                        if let Some(v910) = v909 {
-                            let v1747 =
-                                &constructor_lower_extend_op(ctx, v910, &ArgumentExtension::Uext);
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v1748 = constructor_put_in_reg_zext32(ctx, v31.0);
-                            let v1749 = constructor_put_in_reg_zext32(ctx, v31.1);
-                            let v797 = C::zero_reg(ctx);
-                            let v1750 = constructor_madd(ctx, v910, v1748, v1749, v797);
-                            let v1751 = &constructor_cmp_extend(
-                                ctx,
-                                &OperandSize::Size32,
-                                v1750,
-                                v1750,
-                                v1747,
-                            );
-                            let v1752 = &constructor_cset(ctx, &Cond::Ne);
-                            let v1753 = constructor_with_flags_reg(ctx, v1751, v1752);
-                            let v1754 = C::value_reg(ctx, v1750);
-                            let v1755 = C::value_reg(ctx, v1753);
-                            let v1756 = C::output_pair(ctx, v1754, v1755);
-                            // Rule at src/isa/aarch64/lower.isle line 2745.
-                            return Some(v1756);
-                        }
-                    }
-                }
-                &Opcode::SmulOverflow => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            I32 => {
-                                let v31 = C::unpack_value_array_2(ctx, v30);
-                                let v34 = C::put_in_reg(ctx, v31.0);
-                                let v35 = C::put_in_reg(ctx, v31.1);
-                                let v269 = C::zero_reg(ctx);
-                                let v1784 = constructor_smaddl(ctx, v34, v35, v269);
-                                let v1786 = &constructor_cmp_extend(
-                                    ctx,
-                                    &OperandSize::Size64,
-                                    v1784,
-                                    v1784,
-                                    &ExtendOp::SXTW,
-                                );
-                                let v1760 = &constructor_cset(ctx, &Cond::Ne);
-                                let v1787 = constructor_with_flags_reg(ctx, v1786, v1760);
-                                let v1788 = C::value_reg(ctx, v1784);
-                                let v1789 = C::value_reg(ctx, v1787);
-                                let v1790 = C::output_pair(ctx, v1788, v1789);
-                                // Rule at src/isa/aarch64/lower.isle line 2809.
-                                return Some(v1790);
-                            }
-                            I64 => {
-                                let v31 = C::unpack_value_array_2(ctx, v30);
-                                let v34 = C::put_in_reg(ctx, v31.0);
-                                let v35 = C::put_in_reg(ctx, v31.1);
-                                let v269 = C::zero_reg(ctx);
-                                let v1765 = constructor_madd(ctx, I64, v34, v35, v269);
-                                let v922 = C::put_in_reg(ctx, v31.0);
-                                let v1766 = C::put_in_reg(ctx, v31.1);
-                                let v1791 = constructor_smulh(ctx, I64, v922, v1766);
-                                let v1793 = &constructor_cmp_rr_shift_asr(
-                                    ctx,
-                                    &OperandSize::Size64,
-                                    v1791,
-                                    v1765,
-                                    0x3F,
-                                );
-                                let v1794 = &constructor_cset(ctx, &Cond::Ne);
-                                let v1795 = constructor_with_flags_reg(ctx, v1793, v1794);
-                                let v1796 = C::value_reg(ctx, v1765);
-                                let v1797 = C::value_reg(ctx, v1795);
-                                let v1798 = C::output_pair(ctx, v1796, v1797);
-                                // Rule at src/isa/aarch64/lower.isle line 2823.
-                                return Some(v1798);
-                            }
-                            _ => {}
-                        }
-                        let v909 = C::fits_in_16(ctx, v3);
-                        if let Some(v910) = v909 {
-                            let v1775 =
-                                &constructor_lower_extend_op(ctx, v910, &ArgumentExtension::Sext);
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v1776 = constructor_put_in_reg_sext32(ctx, v31.0);
-                            let v1777 = constructor_put_in_reg_sext32(ctx, v31.1);
-                            let v797 = C::zero_reg(ctx);
-                            let v1778 = constructor_madd(ctx, v910, v1776, v1777, v797);
-                            let v1779 = &constructor_cmp_extend(
-                                ctx,
-                                &OperandSize::Size32,
-                                v1778,
-                                v1778,
-                                v1775,
-                            );
-                            let v1752 = &constructor_cset(ctx, &Cond::Ne);
-                            let v1780 = constructor_with_flags_reg(ctx, v1779, v1752);
-                            let v1781 = C::value_reg(ctx, v1778);
-                            let v1782 = C::value_reg(ctx, v1780);
-                            let v1783 = C::output_pair(ctx, v1781, v1782);
-                            // Rule at src/isa/aarch64/lower.isle line 2793.
-                            return Some(v1783);
-                        }
-                    }
-                }
-                &Opcode::Band => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v575 = C::ty_vec128(ctx, v3);
-                        if let Some(v576) = v575 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v48 = C::def_inst(ctx, v31.0);
-                            if let Some(v49) = v48 {
-                                let v50 = &C::inst_data(ctx, v49);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v298,
-                                    arg: v299,
-                                } = v50
-                                {
-                                    if let &Opcode::Bnot = v298 {
-                                        let v56 = C::put_in_reg(ctx, v31.1);
-                                        let v828 = C::put_in_reg(ctx, v299);
-                                        let v577 = &constructor_vector_size(ctx, v576);
-                                        let v829 = constructor_bic_vec(ctx, v56, v828, v577);
-                                        let v830 = constructor_output_reg(ctx, v829);
-                                        // Rule at src/isa/aarch64/lower.isle line 1249.
-                                        return Some(v830);
-                                    }
-                                }
-                            }
-                            let v38 = C::def_inst(ctx, v31.1);
-                            if let Some(v39) = v38 {
-                                let v40 = &C::inst_data(ctx, v39);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v300,
-                                    arg: v301,
-                                } = v40
-                                {
-                                    if let &Opcode::Bnot = v300 {
-                                        let v34 = C::put_in_reg(ctx, v31.0);
-                                        let v620 = C::put_in_reg(ctx, v301);
-                                        let v577 = &constructor_vector_size(ctx, v576);
-                                        let v826 = constructor_bic_vec(ctx, v34, v620, v577);
-                                        let v827 = constructor_output_reg(ctx, v826);
-                                        // Rule at src/isa/aarch64/lower.isle line 1247.
-                                        return Some(v827);
-                                    }
-                                }
-                            }
-                        }
-                        if v3 == I128 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v48 = C::def_inst(ctx, v31.0);
-                            if let Some(v49) = v48 {
-                                let v50 = &C::inst_data(ctx, v49);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v298,
-                                    arg: v299,
-                                } = v50
-                                {
-                                    if let &Opcode::Bnot = v298 {
-                                        let v824 = constructor_i128_alu_bitop(
-                                            ctx,
-                                            &ALUOp::AndNot,
-                                            I64,
-                                            v31.1,
-                                            v299,
-                                        );
-                                        let v825 = C::output(ctx, v824);
-                                        // Rule at src/isa/aarch64/lower.isle line 1245.
-                                        return Some(v825);
-                                    }
-                                }
-                            }
-                            let v38 = C::def_inst(ctx, v31.1);
-                            if let Some(v39) = v38 {
-                                let v40 = &C::inst_data(ctx, v39);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v300,
-                                    arg: v301,
-                                } = v40
-                                {
-                                    if let &Opcode::Bnot = v300 {
-                                        let v822 = constructor_i128_alu_bitop(
-                                            ctx,
-                                            &ALUOp::AndNot,
-                                            I64,
-                                            v31.0,
-                                            v301,
-                                        );
-                                        let v823 = C::output(ctx, v822);
-                                        // Rule at src/isa/aarch64/lower.isle line 1244.
-                                        return Some(v823);
-                                    }
-                                }
-                            }
-                        }
-                        let v27 = C::fits_in_64(ctx, v3);
-                        if let Some(v28) = v27 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v48 = C::def_inst(ctx, v31.0);
-                            if let Some(v49) = v48 {
-                                let v50 = &C::inst_data(ctx, v49);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v298,
-                                    arg: v299,
-                                } = v50
-                                {
-                                    if let &Opcode::Bnot = v298 {
-                                        let v820 = constructor_alu_rs_imm_logic(
-                                            ctx,
-                                            &ALUOp::AndNot,
-                                            v28,
-                                            v31.1,
-                                            v299,
-                                        );
-                                        let v821 = constructor_output_reg(ctx, v820);
-                                        // Rule at src/isa/aarch64/lower.isle line 1241.
-                                        return Some(v821);
-                                    }
-                                }
-                            }
-                            let v38 = C::def_inst(ctx, v31.1);
-                            if let Some(v39) = v38 {
-                                let v40 = &C::inst_data(ctx, v39);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v300,
-                                    arg: v301,
-                                } = v40
-                                {
-                                    if let &Opcode::Bnot = v300 {
-                                        let v818 = constructor_alu_rs_imm_logic(
-                                            ctx,
-                                            &ALUOp::AndNot,
-                                            v28,
-                                            v31.0,
-                                            v301,
-                                        );
-                                        let v819 = constructor_output_reg(ctx, v818);
-                                        // Rule at src/isa/aarch64/lower.isle line 1239.
-                                        return Some(v819);
-                                    }
-                                }
-                            }
-                        }
-                        if v3 == I128 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v813 =
-                                constructor_i128_alu_bitop(ctx, &ALUOp::And, I64, v31.0, v31.1);
-                            let v814 = C::output(ctx, v813);
-                            // Rule at src/isa/aarch64/lower.isle line 1230.
-                            return Some(v814);
-                        }
-                        if let Some(v28) = v27 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v811 = constructor_alu_rs_imm_logic_commutative(
-                                ctx,
-                                &ALUOp::And,
-                                v28,
-                                v31.0,
-                                v31.1,
-                            );
-                            let v812 = constructor_output_reg(ctx, v811);
-                            // Rule at src/isa/aarch64/lower.isle line 1227.
-                            return Some(v812);
-                        }
-                        if let Some(v576) = v575 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v34 = C::put_in_reg(ctx, v31.0);
-                            let v35 = C::put_in_reg(ctx, v31.1);
-                            let v577 = &constructor_vector_size(ctx, v576);
-                            let v815 = constructor_and_vec(ctx, v34, v35, v577);
-                            let v816 = constructor_output_reg(ctx, v815);
-                            // Rule at src/isa/aarch64/lower.isle line 1232.
-                            return Some(v816);
-                        }
-                    }
-                }
-                &Opcode::Bor => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        if v3 == I128 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v48 = C::def_inst(ctx, v31.0);
-                            if let Some(v49) = v48 {
-                                let v50 = &C::inst_data(ctx, v49);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v298,
-                                    arg: v299,
-                                } = v50
-                                {
-                                    if let &Opcode::Bnot = v298 {
-                                        let v845 = constructor_i128_alu_bitop(
-                                            ctx,
-                                            &ALUOp::OrrNot,
-                                            I64,
-                                            v31.1,
-                                            v299,
-                                        );
-                                        let v846 = C::output(ctx, v845);
-                                        // Rule at src/isa/aarch64/lower.isle line 1272.
-                                        return Some(v846);
-                                    }
-                                }
-                            }
-                            let v38 = C::def_inst(ctx, v31.1);
-                            if let Some(v39) = v38 {
-                                let v40 = &C::inst_data(ctx, v39);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v300,
-                                    arg: v301,
-                                } = v40
-                                {
-                                    if let &Opcode::Bnot = v300 {
-                                        let v843 = constructor_i128_alu_bitop(
-                                            ctx,
-                                            &ALUOp::OrrNot,
-                                            I64,
-                                            v31.0,
-                                            v301,
-                                        );
-                                        let v844 = C::output(ctx, v843);
-                                        // Rule at src/isa/aarch64/lower.isle line 1271.
-                                        return Some(v844);
-                                    }
-                                }
-                            }
-                        }
-                        let v27 = C::fits_in_64(ctx, v3);
-                        if let Some(v28) = v27 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v48 = C::def_inst(ctx, v31.0);
-                            if let Some(v49) = v48 {
-                                let v50 = &C::inst_data(ctx, v49);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v298,
-                                    arg: v299,
-                                } = v50
-                                {
-                                    if let &Opcode::Bnot = v298 {
-                                        let v841 = constructor_alu_rs_imm_logic(
-                                            ctx,
-                                            &ALUOp::OrrNot,
-                                            v28,
-                                            v31.1,
-                                            v299,
-                                        );
-                                        let v842 = constructor_output_reg(ctx, v841);
-                                        // Rule at src/isa/aarch64/lower.isle line 1268.
-                                        return Some(v842);
-                                    }
-                                }
-                            }
-                            let v38 = C::def_inst(ctx, v31.1);
-                            if let Some(v39) = v38 {
-                                let v40 = &C::inst_data(ctx, v39);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v300,
-                                    arg: v301,
-                                } = v40
-                                {
-                                    if let &Opcode::Bnot = v300 {
-                                        let v839 = constructor_alu_rs_imm_logic(
-                                            ctx,
-                                            &ALUOp::OrrNot,
-                                            v28,
-                                            v31.0,
-                                            v301,
-                                        );
-                                        let v840 = constructor_output_reg(ctx, v839);
-                                        // Rule at src/isa/aarch64/lower.isle line 1266.
-                                        return Some(v840);
-                                    }
-                                }
-                            }
-                        }
-                        if v3 == I128 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v834 =
-                                constructor_i128_alu_bitop(ctx, &ALUOp::Orr, I64, v31.0, v31.1);
-                            let v835 = C::output(ctx, v834);
-                            // Rule at src/isa/aarch64/lower.isle line 1257.
-                            return Some(v835);
-                        }
-                        if let Some(v28) = v27 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v832 = constructor_alu_rs_imm_logic_commutative(
-                                ctx,
-                                &ALUOp::Orr,
-                                v28,
-                                v31.0,
-                                v31.1,
-                            );
-                            let v833 = constructor_output_reg(ctx, v832);
-                            // Rule at src/isa/aarch64/lower.isle line 1254.
-                            return Some(v833);
-                        }
-                        let v575 = C::ty_vec128(ctx, v3);
-                        if let Some(v576) = v575 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v34 = C::put_in_reg(ctx, v31.0);
-                            let v35 = C::put_in_reg(ctx, v31.1);
-                            let v577 = &constructor_vector_size(ctx, v576);
-                            let v836 = constructor_orr_vec(ctx, v34, v35, v577);
-                            let v837 = constructor_output_reg(ctx, v836);
-                            // Rule at src/isa/aarch64/lower.isle line 1259.
-                            return Some(v837);
-                        }
-                    }
-                }
-                &Opcode::Bxor => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        if v3 == I128 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v48 = C::def_inst(ctx, v31.0);
-                            if let Some(v49) = v48 {
-                                let v50 = &C::inst_data(ctx, v49);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v298,
-                                    arg: v299,
-                                } = v50
-                                {
-                                    if let &Opcode::Bnot = v298 {
-                                        let v860 = constructor_i128_alu_bitop(
-                                            ctx,
-                                            &ALUOp::EorNot,
-                                            I64,
-                                            v31.1,
-                                            v299,
-                                        );
-                                        let v861 = C::output(ctx, v860);
-                                        // Rule at src/isa/aarch64/lower.isle line 1294.
-                                        return Some(v861);
-                                    }
-                                }
-                            }
-                            let v38 = C::def_inst(ctx, v31.1);
-                            if let Some(v39) = v38 {
-                                let v40 = &C::inst_data(ctx, v39);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v300,
-                                    arg: v301,
-                                } = v40
-                                {
-                                    if let &Opcode::Bnot = v300 {
-                                        let v858 = constructor_i128_alu_bitop(
-                                            ctx,
-                                            &ALUOp::EorNot,
-                                            I64,
-                                            v31.0,
-                                            v301,
-                                        );
-                                        let v859 = C::output(ctx, v858);
-                                        // Rule at src/isa/aarch64/lower.isle line 1293.
-                                        return Some(v859);
-                                    }
-                                }
-                            }
-                        }
-                        let v27 = C::fits_in_64(ctx, v3);
-                        if let Some(v28) = v27 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v48 = C::def_inst(ctx, v31.0);
-                            if let Some(v49) = v48 {
-                                let v50 = &C::inst_data(ctx, v49);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v298,
-                                    arg: v299,
-                                } = v50
-                                {
-                                    if let &Opcode::Bnot = v298 {
-                                        let v856 = constructor_alu_rs_imm_logic(
-                                            ctx,
-                                            &ALUOp::EorNot,
-                                            v28,
-                                            v31.1,
-                                            v299,
-                                        );
-                                        let v857 = constructor_output_reg(ctx, v856);
-                                        // Rule at src/isa/aarch64/lower.isle line 1290.
-                                        return Some(v857);
-                                    }
-                                }
-                            }
-                            let v38 = C::def_inst(ctx, v31.1);
-                            if let Some(v39) = v38 {
-                                let v40 = &C::inst_data(ctx, v39);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v300,
-                                    arg: v301,
-                                } = v40
-                                {
-                                    if let &Opcode::Bnot = v300 {
-                                        let v854 = constructor_alu_rs_imm_logic(
-                                            ctx,
-                                            &ALUOp::EorNot,
-                                            v28,
-                                            v31.0,
-                                            v301,
-                                        );
-                                        let v855 = constructor_output_reg(ctx, v854);
-                                        // Rule at src/isa/aarch64/lower.isle line 1288.
-                                        return Some(v855);
-                                    }
-                                }
-                            }
-                        }
-                        if v3 == I128 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v850 =
-                                constructor_i128_alu_bitop(ctx, &ALUOp::Eor, I64, v31.0, v31.1);
-                            let v851 = C::output(ctx, v850);
-                            // Rule at src/isa/aarch64/lower.isle line 1279.
-                            return Some(v851);
-                        }
-                        if let Some(v28) = v27 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v848 = constructor_alu_rs_imm_logic_commutative(
-                                ctx,
-                                &ALUOp::Eor,
-                                v28,
-                                v31.0,
-                                v31.1,
-                            );
-                            let v849 = constructor_output_reg(ctx, v848);
-                            // Rule at src/isa/aarch64/lower.isle line 1276.
-                            return Some(v849);
-                        }
-                        let v575 = C::ty_vec128(ctx, v3);
-                        if let Some(v576) = v575 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v34 = C::put_in_reg(ctx, v31.0);
-                            let v35 = C::put_in_reg(ctx, v31.1);
-                            let v577 = &constructor_vector_size(ctx, v576);
-                            let v852 = constructor_eor_vec(ctx, v34, v35, v577);
-                            let v853 = constructor_output_reg(ctx, v852);
-                            // Rule at src/isa/aarch64/lower.isle line 1281.
-                            return Some(v853);
-                        }
-                    }
-                }
-                &Opcode::Rotl => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            I32 => {
-                                let v31 = C::unpack_value_array_2(ctx, v30);
-                                let v38 = C::def_inst(ctx, v31.1);
-                                if let Some(v39) = v38 {
-                                    let v40 = &C::inst_data(ctx, v39);
-                                    if let &InstructionData::UnaryImm {
-                                        opcode: ref v41,
-                                        imm: v42,
-                                    } = v40
-                                    {
-                                        if let &Opcode::Iconst = v41 {
-                                            let v928 = C::imm_shift_from_imm64(ctx, I32, v42);
-                                            if let Some(v929) = v928 {
-                                                let v34 = C::put_in_reg(ctx, v31.0);
-                                                let v930 = C::negate_imm_shift(ctx, I32, v929);
-                                                let v931 =
-                                                    constructor_a64_rotr_imm(ctx, I32, v34, v930);
-                                                let v932 = constructor_output_reg(ctx, v931);
-                                                // Rule at src/isa/aarch64/lower.isle line 1538.
-                                                return Some(v932);
-                                            }
-                                        }
-                                    }
-                                }
-                                let v911 = C::put_in_regs(ctx, v31.1);
-                                let v912 = C::value_regs_get(ctx, v911, 0x0);
-                                let v269 = C::zero_reg(ctx);
-                                let v913 = constructor_sub(ctx, I32, v269, v912);
-                                let v922 = C::put_in_reg(ctx, v31.0);
-                                let v923 = constructor_a64_rotr(ctx, I32, v922, v913);
-                                let v924 = constructor_output_reg(ctx, v923);
-                                // Rule at src/isa/aarch64/lower.isle line 1526.
-                                return Some(v924);
-                            }
-                            I64 => {
-                                let v31 = C::unpack_value_array_2(ctx, v30);
-                                let v38 = C::def_inst(ctx, v31.1);
-                                if let Some(v39) = v38 {
-                                    let v40 = &C::inst_data(ctx, v39);
-                                    if let &InstructionData::UnaryImm {
-                                        opcode: ref v41,
-                                        imm: v42,
-                                    } = v40
-                                    {
-                                        if let &Opcode::Iconst = v41 {
-                                            let v933 = C::imm_shift_from_imm64(ctx, I64, v42);
-                                            if let Some(v934) = v933 {
-                                                let v34 = C::put_in_reg(ctx, v31.0);
-                                                let v935 = C::negate_imm_shift(ctx, I64, v934);
-                                                let v936 =
-                                                    constructor_a64_rotr_imm(ctx, I64, v34, v935);
-                                                let v937 = constructor_output_reg(ctx, v936);
-                                                // Rule at src/isa/aarch64/lower.isle line 1543.
-                                                return Some(v937);
-                                            }
-                                        }
-                                    }
-                                }
-                                let v911 = C::put_in_regs(ctx, v31.1);
-                                let v912 = C::value_regs_get(ctx, v911, 0x0);
-                                let v269 = C::zero_reg(ctx);
-                                let v925 = constructor_sub(ctx, I64, v269, v912);
-                                let v922 = C::put_in_reg(ctx, v31.0);
-                                let v926 = constructor_a64_rotr(ctx, I64, v922, v925);
-                                let v927 = constructor_output_reg(ctx, v926);
-                                // Rule at src/isa/aarch64/lower.isle line 1532.
-                                return Some(v927);
-                            }
-                            I128 => {
-                                let v31 = C::unpack_value_array_2(ctx, v30);
-                                let v124 = C::put_in_regs(ctx, v31.0);
-                                let v572 = C::put_in_regs(ctx, v31.1);
-                                let v867 = C::value_regs_get(ctx, v572, 0x0);
-                                let v939 = constructor_imm(ctx, I64, &ImmExtend::Zero, 0x80);
-                                let v940 = constructor_sub(ctx, I64, v939, v867);
-                                let v941 = constructor_lower_shl128(ctx, v124, v867);
-                                let v942 = constructor_lower_ushr128(ctx, v124, v940);
-                                let v943 = C::value_regs_get(ctx, v941, 0x0);
-                                let v944 = C::value_regs_get(ctx, v942, 0x0);
-                                let v945 = constructor_orr(ctx, I64, v943, v944);
-                                let v946 = C::value_regs_get(ctx, v941, 0x1);
-                                let v947 = C::value_regs_get(ctx, v942, 0x1);
-                                let v948 = constructor_orr(ctx, I64, v946, v947);
-                                let v949 = C::value_regs(ctx, v945, v948);
-                                let v950 = C::output(ctx, v949);
-                                // Rule at src/isa/aarch64/lower.isle line 1553.
-                                return Some(v950);
-                            }
-                            _ => {}
-                        }
-                        let v909 = C::fits_in_16(ctx, v3);
-                        if let Some(v910) = v909 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v38 = C::def_inst(ctx, v31.1);
-                            if let Some(v39) = v38 {
-                                let v40 = &C::inst_data(ctx, v39);
-                                if let &InstructionData::UnaryImm {
-                                    opcode: ref v41,
-                                    imm: v42,
-                                } = v40
-                                {
-                                    if let &Opcode::Iconst = v41 {
-                                        let v917 = C::imm_shift_from_imm64(ctx, v910, v42);
-                                        if let Some(v918) = v917 {
-                                            let v881 = constructor_put_in_reg_zext32(ctx, v31.0);
-                                            let v919 = C::negate_imm_shift(ctx, v910, v918);
-                                            let v920 =
-                                                constructor_small_rotr_imm(ctx, v910, v881, v919);
-                                            let v921 = constructor_output_reg(ctx, v920);
-                                            // Rule at src/isa/aarch64/lower.isle line 1513.
-                                            return Some(v921);
-                                        }
-                                    }
-                                }
-                            }
-                            let v911 = C::put_in_regs(ctx, v31.1);
-                            let v912 = C::value_regs_get(ctx, v911, 0x0);
-                            let v269 = C::zero_reg(ctx);
-                            let v913 = constructor_sub(ctx, I32, v269, v912);
-                            let v914 = constructor_put_in_reg_zext32(ctx, v31.0);
-                            let v915 = constructor_small_rotr(ctx, v910, v914, v913);
-                            let v916 = constructor_output_reg(ctx, v915);
-                            // Rule at src/isa/aarch64/lower.isle line 1507.
-                            return Some(v916);
-                        }
-                    }
-                }
-                &Opcode::Rotr => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            I32 => {
-                                let v31 = C::unpack_value_array_2(ctx, v30);
-                                let v38 = C::def_inst(ctx, v31.1);
-                                if let Some(v39) = v38 {
-                                    let v40 = &C::inst_data(ctx, v39);
-                                    if let &InstructionData::UnaryImm {
-                                        opcode: ref v41,
-                                        imm: v42,
-                                    } = v40
-                                    {
-                                        if let &Opcode::Iconst = v41 {
-                                            let v928 = C::imm_shift_from_imm64(ctx, I32, v42);
-                                            if let Some(v929) = v928 {
-                                                let v34 = C::put_in_reg(ctx, v31.0);
-                                                let v959 =
-                                                    constructor_a64_rotr_imm(ctx, I32, v34, v929);
-                                                let v960 = constructor_output_reg(ctx, v959);
-                                                // Rule at src/isa/aarch64/lower.isle line 1583.
-                                                return Some(v960);
-                                            }
-                                        }
-                                    }
-                                }
-                                let v34 = C::put_in_reg(ctx, v31.0);
-                                let v572 = C::put_in_regs(ctx, v31.1);
-                                let v867 = C::value_regs_get(ctx, v572, 0x0);
-                                let v953 = constructor_a64_rotr(ctx, I32, v34, v867);
-                                let v954 = constructor_output_reg(ctx, v953);
-                                // Rule at src/isa/aarch64/lower.isle line 1570.
-                                return Some(v954);
-                            }
-                            I64 => {
-                                let v31 = C::unpack_value_array_2(ctx, v30);
-                                let v38 = C::def_inst(ctx, v31.1);
-                                if let Some(v39) = v38 {
-                                    let v40 = &C::inst_data(ctx, v39);
-                                    if let &InstructionData::UnaryImm {
-                                        opcode: ref v41,
-                                        imm: v42,
-                                    } = v40
-                                    {
-                                        if let &Opcode::Iconst = v41 {
-                                            let v933 = C::imm_shift_from_imm64(ctx, I64, v42);
-                                            if let Some(v934) = v933 {
-                                                let v34 = C::put_in_reg(ctx, v31.0);
-                                                let v961 =
-                                                    constructor_a64_rotr_imm(ctx, I64, v34, v934);
-                                                let v962 = constructor_output_reg(ctx, v961);
-                                                // Rule at src/isa/aarch64/lower.isle line 1588.
-                                                return Some(v962);
-                                            }
-                                        }
-                                    }
-                                }
-                                let v34 = C::put_in_reg(ctx, v31.0);
-                                let v572 = C::put_in_regs(ctx, v31.1);
-                                let v867 = C::value_regs_get(ctx, v572, 0x0);
-                                let v955 = constructor_a64_rotr(ctx, I64, v34, v867);
-                                let v956 = constructor_output_reg(ctx, v955);
-                                // Rule at src/isa/aarch64/lower.isle line 1574.
-                                return Some(v956);
-                            }
-                            I128 => {
-                                let v31 = C::unpack_value_array_2(ctx, v30);
-                                let v124 = C::put_in_regs(ctx, v31.0);
-                                let v572 = C::put_in_regs(ctx, v31.1);
-                                let v867 = C::value_regs_get(ctx, v572, 0x0);
-                                let v939 = constructor_imm(ctx, I64, &ImmExtend::Zero, 0x80);
-                                let v940 = constructor_sub(ctx, I64, v939, v867);
-                                let v963 = constructor_lower_ushr128(ctx, v124, v867);
-                                let v964 = constructor_lower_shl128(ctx, v124, v940);
-                                let v965 = C::value_regs_get(ctx, v963, 0x1);
-                                let v966 = C::value_regs_get(ctx, v964, 0x1);
-                                let v967 = constructor_orr(ctx, I64, v965, v966);
-                                let v968 = C::value_regs_get(ctx, v963, 0x0);
-                                let v969 = C::value_regs_get(ctx, v964, 0x0);
-                                let v970 = constructor_orr(ctx, I64, v968, v969);
-                                let v971 = C::value_regs(ctx, v970, v967);
-                                let v972 = C::output(ctx, v971);
-                                // Rule at src/isa/aarch64/lower.isle line 1637.
-                                return Some(v972);
-                            }
-                            _ => {}
-                        }
-                        let v909 = C::fits_in_16(ctx, v3);
-                        if let Some(v910) = v909 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v38 = C::def_inst(ctx, v31.1);
-                            if let Some(v39) = v38 {
-                                let v40 = &C::inst_data(ctx, v39);
-                                if let &InstructionData::UnaryImm {
-                                    opcode: ref v41,
-                                    imm: v42,
-                                } = v40
-                                {
-                                    if let &Opcode::Iconst = v41 {
-                                        let v917 = C::imm_shift_from_imm64(ctx, v910, v42);
-                                        if let Some(v918) = v917 {
-                                            let v881 = constructor_put_in_reg_zext32(ctx, v31.0);
-                                            let v957 =
-                                                constructor_small_rotr_imm(ctx, v910, v881, v918);
-                                            let v958 = constructor_output_reg(ctx, v957);
-                                            // Rule at src/isa/aarch64/lower.isle line 1578.
-                                            return Some(v958);
-                                        }
-                                    }
-                                }
-                            }
-                            let v881 = constructor_put_in_reg_zext32(ctx, v31.0);
-                            let v572 = C::put_in_regs(ctx, v31.1);
-                            let v867 = C::value_regs_get(ctx, v572, 0x0);
-                            let v951 = constructor_small_rotr(ctx, v910, v881, v867);
-                            let v952 = constructor_output_reg(ctx, v951);
-                            // Rule at src/isa/aarch64/lower.isle line 1566.
-                            return Some(v952);
-                        }
-                    }
-                }
-                &Opcode::Ishl => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            I64 => {
-                                let v31 = C::unpack_value_array_2(ctx, v30);
-                                let v34 = C::put_in_reg(ctx, v31.0);
-                                let v865 = constructor_do_shift(ctx, &ALUOp::Lsl, I64, v34, v31.1);
-                                let v866 = constructor_output_reg(ctx, v865);
-                                // Rule at src/isa/aarch64/lower.isle line 1303.
-                                return Some(v866);
-                            }
-                            I128 => {
-                                let v31 = C::unpack_value_array_2(ctx, v30);
-                                let v124 = C::put_in_regs(ctx, v31.0);
-                                let v572 = C::put_in_regs(ctx, v31.1);
-                                let v867 = C::value_regs_get(ctx, v572, 0x0);
-                                let v868 = constructor_lower_shl128(ctx, v124, v867);
-                                let v869 = C::output(ctx, v868);
-                                // Rule at src/isa/aarch64/lower.isle line 1307.
-                                return Some(v869);
-                            }
-                            _ => {}
-                        }
-                        let v318 = C::fits_in_32(ctx, v3);
-                        if let Some(v319) = v318 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v34 = C::put_in_reg(ctx, v31.0);
-                            let v863 = constructor_do_shift(ctx, &ALUOp::Lsl, v319, v34, v31.1);
-                            let v864 = constructor_output_reg(ctx, v863);
-                            // Rule at src/isa/aarch64/lower.isle line 1299.
-                            return Some(v864);
-                        }
-                        let v575 = C::ty_vec128(ctx, v3);
-                        if let Some(v576) = v575 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v38 = C::def_inst(ctx, v31.1);
-                            if let Some(v39) = v38 {
-                                let v40 = &C::inst_data(ctx, v39);
-                                if let &InstructionData::UnaryImm {
-                                    opcode: ref v41,
-                                    imm: v42,
-                                } = v40
-                                {
-                                    if let &Opcode::Iconst = v41 {
-                                        let v34 = C::put_in_reg(ctx, v31.0);
-                                        let v594 = &constructor_vector_size(ctx, v576);
-                                        let v43 = C::u64_from_imm64(ctx, v42);
-                                        let v877 = C::shift_masked_imm(ctx, v576, v43);
-                                        let v878 = constructor_ushl_vec_imm(ctx, v34, v877, v594);
-                                        let v879 = constructor_output_reg(ctx, v878);
-                                        // Rule at src/isa/aarch64/lower.isle line 1342.
-                                        return Some(v879);
-                                    }
-                                }
-                            }
-                            let v870 = &constructor_vector_size(ctx, v576);
-                            let v35 = C::put_in_reg(ctx, v31.1);
-                            let v872 = C::shift_mask(ctx, v576);
-                            let v873 = constructor_and_imm(ctx, I32, v35, v872);
-                            let v874 = constructor_vec_dup(ctx, v873, v870);
-                            let v328 = C::put_in_reg(ctx, v31.0);
-                            let v875 = constructor_sshl(ctx, v328, v874, v870);
-                            let v876 = constructor_output_reg(ctx, v875);
-                            // Rule at src/isa/aarch64/lower.isle line 1337.
-                            return Some(v876);
-                        }
-                    }
-                }
-                &Opcode::Ushr => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            I64 => {
-                                let v31 = C::unpack_value_array_2(ctx, v30);
-                                let v656 = constructor_put_in_reg_zext64(ctx, v31.0);
-                                let v884 = constructor_do_shift(ctx, &ALUOp::Lsr, I64, v656, v31.1);
-                                let v885 = constructor_output_reg(ctx, v884);
-                                // Rule at src/isa/aarch64/lower.isle line 1394.
-                                return Some(v885);
-                            }
-                            I128 => {
-                                let v31 = C::unpack_value_array_2(ctx, v30);
-                                let v124 = C::put_in_regs(ctx, v31.0);
-                                let v572 = C::put_in_regs(ctx, v31.1);
-                                let v867 = C::value_regs_get(ctx, v572, 0x0);
-                                let v886 = constructor_lower_ushr128(ctx, v124, v867);
-                                let v887 = C::output(ctx, v886);
-                                // Rule at src/isa/aarch64/lower.isle line 1398.
-                                return Some(v887);
-                            }
-                            _ => {}
-                        }
-                        let v318 = C::fits_in_32(ctx, v3);
-                        if let Some(v319) = v318 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v881 = constructor_put_in_reg_zext32(ctx, v31.0);
-                            let v882 = constructor_do_shift(ctx, &ALUOp::Lsr, v319, v881, v31.1);
-                            let v883 = constructor_output_reg(ctx, v882);
-                            // Rule at src/isa/aarch64/lower.isle line 1390.
-                            return Some(v883);
-                        }
-                        let v575 = C::ty_vec128(ctx, v3);
-                        if let Some(v576) = v575 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v38 = C::def_inst(ctx, v31.1);
-                            if let Some(v39) = v38 {
-                                let v40 = &C::inst_data(ctx, v39);
-                                if let &InstructionData::UnaryImm {
-                                    opcode: ref v41,
-                                    imm: v42,
-                                } = v40
-                                {
-                                    if let &Opcode::Iconst = v41 {
-                                        let v43 = C::u64_from_imm64(ctx, v42);
-                                        let v877 = C::shift_masked_imm(ctx, v576, v43);
-                                        if v877 == 0x0 {
-                                            let v896 = constructor_output_value(ctx, v31.0);
-                                            // Rule at src/isa/aarch64/lower.isle line 1413.
-                                            return Some(v896);
-                                        }
-                                        let v34 = C::put_in_reg(ctx, v31.0);
-                                        let v594 = &constructor_vector_size(ctx, v576);
-                                        let v894 = constructor_ushr_vec_imm(ctx, v34, v877, v594);
-                                        let v895 = constructor_output_reg(ctx, v894);
-                                        // Rule at src/isa/aarch64/lower.isle line 1411.
-                                        return Some(v895);
-                                    }
-                                }
-                            }
-                            let v870 = &constructor_vector_size(ctx, v576);
-                            let v35 = C::put_in_reg(ctx, v31.1);
-                            let v872 = C::shift_mask(ctx, v576);
-                            let v873 = constructor_and_imm(ctx, I32, v35, v872);
-                            let v888 = C::zero_reg(ctx);
-                            let v889 = constructor_sub(ctx, I64, v888, v873);
-                            let v890 = constructor_vec_dup(ctx, v889, v870);
-                            let v891 = C::put_in_reg(ctx, v31.0);
-                            let v892 = constructor_ushl(ctx, v891, v890, v870);
-                            let v893 = constructor_output_reg(ctx, v892);
-                            // Rule at src/isa/aarch64/lower.isle line 1406.
-                            return Some(v893);
-                        }
-                    }
-                }
-                &Opcode::Sshr => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            I64 => {
-                                let v31 = C::unpack_value_array_2(ctx, v30);
-                                let v647 = constructor_put_in_reg_sext64(ctx, v31.0);
-                                let v901 = constructor_do_shift(ctx, &ALUOp::Asr, I64, v647, v31.1);
-                                let v902 = constructor_output_reg(ctx, v901);
-                                // Rule at src/isa/aarch64/lower.isle line 1451.
-                                return Some(v902);
-                            }
-                            I128 => {
-                                let v31 = C::unpack_value_array_2(ctx, v30);
-                                let v124 = C::put_in_regs(ctx, v31.0);
-                                let v572 = C::put_in_regs(ctx, v31.1);
-                                let v867 = C::value_regs_get(ctx, v572, 0x0);
-                                let v903 = constructor_lower_sshr128(ctx, v124, v867);
-                                let v904 = C::output(ctx, v903);
-                                // Rule at src/isa/aarch64/lower.isle line 1455.
-                                return Some(v904);
-                            }
-                            _ => {}
-                        }
-                        let v575 = C::ty_vec128(ctx, v3);
-                        if let Some(v576) = v575 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v38 = C::def_inst(ctx, v31.1);
-                            if let Some(v39) = v38 {
-                                let v40 = &C::inst_data(ctx, v39);
-                                if let &InstructionData::UnaryImm {
-                                    opcode: ref v41,
-                                    imm: v42,
-                                } = v40
-                                {
-                                    if let &Opcode::Iconst = v41 {
-                                        let v43 = C::u64_from_imm64(ctx, v42);
-                                        let v877 = C::shift_masked_imm(ctx, v576, v43);
-                                        if v877 == 0x0 {
-                                            let v896 = constructor_output_value(ctx, v31.0);
-                                            // Rule at src/isa/aarch64/lower.isle line 1471.
-                                            return Some(v896);
-                                        }
-                                        let v34 = C::put_in_reg(ctx, v31.0);
-                                        let v594 = &constructor_vector_size(ctx, v576);
-                                        let v907 = constructor_sshr_vec_imm(ctx, v34, v877, v594);
-                                        let v908 = constructor_output_reg(ctx, v907);
-                                        // Rule at src/isa/aarch64/lower.isle line 1469.
-                                        return Some(v908);
-                                    }
-                                }
-                            }
-                            let v870 = &constructor_vector_size(ctx, v576);
-                            let v35 = C::put_in_reg(ctx, v31.1);
-                            let v872 = C::shift_mask(ctx, v576);
-                            let v873 = constructor_and_imm(ctx, I32, v35, v872);
-                            let v888 = C::zero_reg(ctx);
-                            let v889 = constructor_sub(ctx, I64, v888, v873);
-                            let v890 = constructor_vec_dup(ctx, v889, v870);
-                            let v891 = C::put_in_reg(ctx, v31.0);
-                            let v905 = constructor_sshl(ctx, v891, v890, v870);
-                            let v906 = constructor_output_reg(ctx, v905);
-                            // Rule at src/isa/aarch64/lower.isle line 1464.
-                            return Some(v906);
-                        }
-                        let v318 = C::fits_in_32(ctx, v3);
-                        if let Some(v319) = v318 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v898 = constructor_put_in_reg_sext32(ctx, v31.0);
-                            let v899 = constructor_do_shift(ctx, &ALUOp::Asr, v319, v898, v31.1);
-                            let v900 = constructor_output_reg(ctx, v899);
-                            // Rule at src/isa/aarch64/lower.isle line 1447.
-                            return Some(v900);
-                        }
-                    }
-                }
-                &Opcode::Fadd => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v348 = C::ty_scalar_float(ctx, v3);
-                        if let Some(v349) = v348 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v34 = C::put_in_reg(ctx, v31.0);
-                            let v35 = C::put_in_reg(ctx, v31.1);
-                            let v351 = &constructor_scalar_size(ctx, v349);
-                            let v352 = constructor_fpu_rrr(ctx, &FPUOp2::Add, v34, v35, v351);
-                            let v353 = constructor_output_reg(ctx, v352);
-                            // Rule at src/isa/aarch64/lower.isle line 375.
-                            return Some(v353);
-                        }
-                        let v117 = C::multi_lane(ctx, v3);
-                        if let Some(v118) = v117 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v34 = C::put_in_reg(ctx, v31.0);
-                            let v35 = C::put_in_reg(ctx, v31.1);
-                            let v121 = &constructor_vector_size(ctx, v3);
-                            let v346 = constructor_vec_rrr(ctx, &VecALUOp::Fadd, v34, v35, v121);
-                            let v347 = constructor_output_reg(ctx, v346);
-                            // Rule at src/isa/aarch64/lower.isle line 372.
-                            return Some(v347);
-                        }
-                        let v1807 = C::dynamic_lane(ctx, v3);
-                        if let Some(v1808) = v1807 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v34 = C::put_in_reg(ctx, v31.0);
-                            let v35 = C::put_in_reg(ctx, v31.1);
-                            let v121 = &constructor_vector_size(ctx, v3);
-                            let v346 = constructor_vec_rrr(ctx, &VecALUOp::Fadd, v34, v35, v121);
-                            let v1823 = C::value_reg(ctx, v346);
-                            let v1824 = C::output(ctx, v1823);
-                            // Rule at src/isa/aarch64/lower_dynamic_neon.isle line 15.
-                            return Some(v1824);
-                        }
-                    }
-                }
-                &Opcode::Fsub => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v348 = C::ty_scalar_float(ctx, v3);
-                        if let Some(v349) = v348 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v34 = C::put_in_reg(ctx, v31.0);
-                            let v35 = C::put_in_reg(ctx, v31.1);
-                            let v351 = &constructor_scalar_size(ctx, v349);
-                            let v358 = constructor_fpu_rrr(ctx, &FPUOp2::Sub, v34, v35, v351);
-                            let v359 = constructor_output_reg(ctx, v358);
-                            // Rule at src/isa/aarch64/lower.isle line 383.
-                            return Some(v359);
-                        }
-                        let v117 = C::multi_lane(ctx, v3);
-                        if let Some(v118) = v117 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v34 = C::put_in_reg(ctx, v31.0);
-                            let v35 = C::put_in_reg(ctx, v31.1);
-                            let v121 = &constructor_vector_size(ctx, v3);
-                            let v355 = constructor_vec_rrr(ctx, &VecALUOp::Fsub, v34, v35, v121);
-                            let v356 = constructor_output_reg(ctx, v355);
-                            // Rule at src/isa/aarch64/lower.isle line 380.
-                            return Some(v356);
-                        }
-                        let v1807 = C::dynamic_lane(ctx, v3);
-                        if let Some(v1808) = v1807 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v34 = C::put_in_reg(ctx, v31.0);
-                            let v35 = C::put_in_reg(ctx, v31.1);
-                            let v121 = &constructor_vector_size(ctx, v3);
-                            let v355 = constructor_vec_rrr(ctx, &VecALUOp::Fsub, v34, v35, v121);
-                            let v1825 = C::value_reg(ctx, v355);
-                            let v1826 = C::output(ctx, v1825);
-                            // Rule at src/isa/aarch64/lower_dynamic_neon.isle line 19.
-                            return Some(v1826);
-                        }
-                    }
-                }
-                &Opcode::Fmul => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v348 = C::ty_scalar_float(ctx, v3);
-                        if let Some(v349) = v348 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v34 = C::put_in_reg(ctx, v31.0);
-                            let v35 = C::put_in_reg(ctx, v31.1);
-                            let v351 = &constructor_scalar_size(ctx, v349);
-                            let v364 = constructor_fpu_rrr(ctx, &FPUOp2::Mul, v34, v35, v351);
-                            let v365 = constructor_output_reg(ctx, v364);
-                            // Rule at src/isa/aarch64/lower.isle line 391.
-                            return Some(v365);
-                        }
-                        let v117 = C::multi_lane(ctx, v3);
-                        if let Some(v118) = v117 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v34 = C::put_in_reg(ctx, v31.0);
-                            let v35 = C::put_in_reg(ctx, v31.1);
-                            let v121 = &constructor_vector_size(ctx, v3);
-                            let v361 = constructor_vec_rrr(ctx, &VecALUOp::Fmul, v34, v35, v121);
-                            let v362 = constructor_output_reg(ctx, v361);
-                            // Rule at src/isa/aarch64/lower.isle line 388.
-                            return Some(v362);
-                        }
-                        let v1807 = C::dynamic_lane(ctx, v3);
-                        if let Some(v1808) = v1807 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v34 = C::put_in_reg(ctx, v31.0);
-                            let v35 = C::put_in_reg(ctx, v31.1);
-                            let v121 = &constructor_vector_size(ctx, v3);
-                            let v361 = constructor_vec_rrr(ctx, &VecALUOp::Fmul, v34, v35, v121);
-                            let v1827 = C::value_reg(ctx, v361);
-                            let v1828 = C::output(ctx, v1827);
-                            // Rule at src/isa/aarch64/lower_dynamic_neon.isle line 23.
-                            return Some(v1828);
-                        }
-                    }
-                }
-                &Opcode::Fdiv => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v348 = C::ty_scalar_float(ctx, v3);
-                        if let Some(v349) = v348 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v34 = C::put_in_reg(ctx, v31.0);
-                            let v35 = C::put_in_reg(ctx, v31.1);
-                            let v351 = &constructor_scalar_size(ctx, v349);
-                            let v370 = constructor_fpu_rrr(ctx, &FPUOp2::Div, v34, v35, v351);
-                            let v371 = constructor_output_reg(ctx, v370);
-                            // Rule at src/isa/aarch64/lower.isle line 399.
-                            return Some(v371);
-                        }
-                        let v117 = C::multi_lane(ctx, v3);
-                        if let Some(v118) = v117 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v34 = C::put_in_reg(ctx, v31.0);
-                            let v35 = C::put_in_reg(ctx, v31.1);
-                            let v121 = &constructor_vector_size(ctx, v3);
-                            let v367 = constructor_vec_rrr(ctx, &VecALUOp::Fdiv, v34, v35, v121);
-                            let v368 = constructor_output_reg(ctx, v367);
-                            // Rule at src/isa/aarch64/lower.isle line 396.
-                            return Some(v368);
-                        }
-                        let v1807 = C::dynamic_lane(ctx, v3);
-                        if let Some(v1808) = v1807 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v34 = C::put_in_reg(ctx, v31.0);
-                            let v35 = C::put_in_reg(ctx, v31.1);
-                            let v121 = &constructor_vector_size(ctx, v3);
-                            let v367 = constructor_vec_rrr(ctx, &VecALUOp::Fdiv, v34, v35, v121);
-                            let v1829 = C::value_reg(ctx, v367);
-                            let v1830 = C::output(ctx, v1829);
-                            // Rule at src/isa/aarch64/lower_dynamic_neon.isle line 27.
-                            return Some(v1830);
-                        }
-                    }
-                }
-                &Opcode::Fcopysign => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v31 = C::unpack_value_array_2(ctx, v30);
-                        let v34 = C::put_in_reg(ctx, v31.0);
-                        let v35 = C::put_in_reg(ctx, v31.1);
-                        let v3 = C::value_type(ctx, v2);
-                        let v478 = constructor_fcopy_sign(ctx, v34, v35, v3);
-                        let v479 = constructor_output_reg(ctx, v478);
-                        // Rule at src/isa/aarch64/lower.isle line 575.
-                        return Some(v479);
-                    }
-                }
-                &Opcode::Fmin => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v348 = C::ty_scalar_float(ctx, v3);
-                        if let Some(v349) = v348 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v34 = C::put_in_reg(ctx, v31.0);
-                            let v35 = C::put_in_reg(ctx, v31.1);
-                            let v351 = &constructor_scalar_size(ctx, v349);
-                            let v376 = constructor_fpu_rrr(ctx, &FPUOp2::Min, v34, v35, v351);
-                            let v377 = constructor_output_reg(ctx, v376);
-                            // Rule at src/isa/aarch64/lower.isle line 407.
-                            return Some(v377);
-                        }
-                        let v117 = C::multi_lane(ctx, v3);
-                        if let Some(v118) = v117 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v34 = C::put_in_reg(ctx, v31.0);
-                            let v35 = C::put_in_reg(ctx, v31.1);
-                            let v121 = &constructor_vector_size(ctx, v3);
-                            let v373 = constructor_vec_rrr(ctx, &VecALUOp::Fmin, v34, v35, v121);
-                            let v374 = constructor_output_reg(ctx, v373);
-                            // Rule at src/isa/aarch64/lower.isle line 404.
-                            return Some(v374);
-                        }
-                        let v1807 = C::dynamic_lane(ctx, v3);
-                        if let Some(v1808) = v1807 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v34 = C::put_in_reg(ctx, v31.0);
-                            let v35 = C::put_in_reg(ctx, v31.1);
-                            let v121 = &constructor_vector_size(ctx, v3);
-                            let v373 = constructor_vec_rrr(ctx, &VecALUOp::Fmin, v34, v35, v121);
-                            let v1831 = C::value_reg(ctx, v373);
-                            let v1832 = C::output(ctx, v1831);
-                            // Rule at src/isa/aarch64/lower_dynamic_neon.isle line 31.
-                            return Some(v1832);
-                        }
-                    }
-                }
-                &Opcode::FminPseudo => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v348 = C::ty_scalar_float(ctx, v3);
-                        if let Some(v349) = v348 {
-                            let v389 = &constructor_scalar_size(ctx, v349);
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v325 = C::put_in_reg(ctx, v31.0);
-                            let v112 = C::put_in_reg(ctx, v31.1);
-                            let v390 = &constructor_fpu_cmp(ctx, v389, v325, v112);
-                            let v386 = C::put_in_reg(ctx, v31.1);
-                            let v328 = C::put_in_reg(ctx, v31.0);
-                            let v392 = &constructor_fpu_csel(ctx, v349, &Cond::Gt, v386, v328);
-                            let v393 = constructor_with_flags(ctx, v390, v392);
-                            let v394 = C::output(ctx, v393);
-                            // Rule at src/isa/aarch64/lower.isle line 423.
-                            return Some(v394);
-                        }
-                        let v117 = C::multi_lane(ctx, v3);
-                        if let Some(v118) = v117 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v34 = C::put_in_reg(ctx, v31.0);
-                            let v35 = C::put_in_reg(ctx, v31.1);
-                            let v121 = &constructor_vector_size(ctx, v3);
-                            let v385 = constructor_vec_rrr(ctx, &VecALUOp::Fcmgt, v34, v35, v121);
-                            let v386 = C::put_in_reg(ctx, v31.1);
-                            let v328 = C::put_in_reg(ctx, v31.0);
-                            let v387 = constructor_bsl(ctx, v3, v385, v386, v328);
-                            let v388 = constructor_output_reg(ctx, v387);
-                            // Rule at src/isa/aarch64/lower.isle line 420.
-                            return Some(v388);
-                        }
-                        let v1807 = C::dynamic_lane(ctx, v3);
-                        if let Some(v1808) = v1807 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v34 = C::put_in_reg(ctx, v31.0);
-                            let v35 = C::put_in_reg(ctx, v31.1);
-                            let v121 = &constructor_vector_size(ctx, v3);
-                            let v385 = constructor_vec_rrr(ctx, &VecALUOp::Fcmgt, v34, v35, v121);
-                            let v386 = C::put_in_reg(ctx, v31.1);
-                            let v328 = C::put_in_reg(ctx, v31.0);
-                            let v387 = constructor_bsl(ctx, v3, v385, v386, v328);
-                            let v1835 = C::value_reg(ctx, v387);
-                            let v1836 = C::output(ctx, v1835);
-                            // Rule at src/isa/aarch64/lower_dynamic_neon.isle line 39.
-                            return Some(v1836);
-                        }
-                    }
-                }
-                &Opcode::Fmax => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v348 = C::ty_scalar_float(ctx, v3);
-                        if let Some(v349) = v348 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v34 = C::put_in_reg(ctx, v31.0);
-                            let v35 = C::put_in_reg(ctx, v31.1);
-                            let v351 = &constructor_scalar_size(ctx, v349);
-                            let v382 = constructor_fpu_rrr(ctx, &FPUOp2::Max, v34, v35, v351);
-                            let v383 = constructor_output_reg(ctx, v382);
-                            // Rule at src/isa/aarch64/lower.isle line 415.
-                            return Some(v383);
-                        }
-                        let v117 = C::multi_lane(ctx, v3);
-                        if let Some(v118) = v117 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v34 = C::put_in_reg(ctx, v31.0);
-                            let v35 = C::put_in_reg(ctx, v31.1);
-                            let v121 = &constructor_vector_size(ctx, v3);
-                            let v379 = constructor_vec_rrr(ctx, &VecALUOp::Fmax, v34, v35, v121);
-                            let v380 = constructor_output_reg(ctx, v379);
-                            // Rule at src/isa/aarch64/lower.isle line 412.
-                            return Some(v380);
-                        }
-                        let v1807 = C::dynamic_lane(ctx, v3);
-                        if let Some(v1808) = v1807 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v34 = C::put_in_reg(ctx, v31.0);
-                            let v35 = C::put_in_reg(ctx, v31.1);
-                            let v121 = &constructor_vector_size(ctx, v3);
-                            let v379 = constructor_vec_rrr(ctx, &VecALUOp::Fmax, v34, v35, v121);
-                            let v1833 = C::value_reg(ctx, v379);
-                            let v1834 = C::output(ctx, v1833);
-                            // Rule at src/isa/aarch64/lower_dynamic_neon.isle line 35.
-                            return Some(v1834);
-                        }
-                    }
-                }
-                &Opcode::FmaxPseudo => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v348 = C::ty_scalar_float(ctx, v3);
-                        if let Some(v349) = v348 {
-                            let v389 = &constructor_scalar_size(ctx, v349);
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v35 = C::put_in_reg(ctx, v31.1);
-                            let v107 = C::put_in_reg(ctx, v31.0);
-                            let v398 = &constructor_fpu_cmp(ctx, v389, v35, v107);
-                            let v386 = C::put_in_reg(ctx, v31.1);
-                            let v328 = C::put_in_reg(ctx, v31.0);
-                            let v392 = &constructor_fpu_csel(ctx, v349, &Cond::Gt, v386, v328);
-                            let v399 = constructor_with_flags(ctx, v398, v392);
-                            let v400 = C::output(ctx, v399);
-                            // Rule at src/isa/aarch64/lower.isle line 432.
-                            return Some(v400);
-                        }
-                        let v117 = C::multi_lane(ctx, v3);
-                        if let Some(v118) = v117 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v56 = C::put_in_reg(ctx, v31.1);
-                            let v325 = C::put_in_reg(ctx, v31.0);
-                            let v121 = &constructor_vector_size(ctx, v3);
-                            let v395 = constructor_vec_rrr(ctx, &VecALUOp::Fcmgt, v56, v325, v121);
-                            let v386 = C::put_in_reg(ctx, v31.1);
-                            let v328 = C::put_in_reg(ctx, v31.0);
-                            let v396 = constructor_bsl(ctx, v3, v395, v386, v328);
-                            let v397 = constructor_output_reg(ctx, v396);
-                            // Rule at src/isa/aarch64/lower.isle line 429.
-                            return Some(v397);
-                        }
-                        let v1807 = C::dynamic_lane(ctx, v3);
-                        if let Some(v1808) = v1807 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v56 = C::put_in_reg(ctx, v31.1);
-                            let v325 = C::put_in_reg(ctx, v31.0);
-                            let v121 = &constructor_vector_size(ctx, v3);
-                            let v395 = constructor_vec_rrr(ctx, &VecALUOp::Fcmgt, v56, v325, v121);
-                            let v386 = C::put_in_reg(ctx, v31.1);
-                            let v328 = C::put_in_reg(ctx, v31.0);
-                            let v396 = constructor_bsl(ctx, v3, v395, v386, v328);
-                            let v1837 = C::value_reg(ctx, v396);
-                            let v1838 = C::output(ctx, v1837);
-                            // Rule at src/isa/aarch64/lower_dynamic_neon.isle line 45.
-                            return Some(v1838);
-                        }
-                    }
-                }
-                &Opcode::Snarrow => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v1408 = C::ty_vec64_int(ctx, v3);
-                        if let Some(v1409) = v1408 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v34 = C::put_in_reg(ctx, v31.0);
-                            let v35 = C::put_in_reg(ctx, v31.1);
-                            let v1410 = constructor_mov_vec_elem(
-                                ctx,
-                                v34,
-                                v35,
-                                0x1,
-                                0x0,
-                                &VectorSize::Size64x2,
-                            );
-                            let v1411 = &constructor_lane_size(ctx, v1409);
-                            let v1412 = constructor_sqxtn(ctx, v1410, v1411);
-                            let v1413 = constructor_output_reg(ctx, v1412);
-                            // Rule at src/isa/aarch64/lower.isle line 2144.
-                            return Some(v1413);
-                        }
-                        let v1401 = C::ty_vec128_int(ctx, v3);
-                        if let Some(v1402) = v1401 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v1403 = C::zero_value(ctx, v31.1);
-                            if let Some(v1404) = v1403 {
-                                let v34 = C::put_in_reg(ctx, v31.0);
-                                let v1405 = &constructor_lane_size(ctx, v1402);
-                                let v1406 = constructor_sqxtn(ctx, v34, v1405);
-                                let v1407 = constructor_output_reg(ctx, v1406);
-                                // Rule at src/isa/aarch64/lower.isle line 2140.
-                                return Some(v1407);
-                            }
-                            let v34 = C::put_in_reg(ctx, v31.0);
-                            let v1405 = &constructor_lane_size(ctx, v1402);
-                            let v1406 = constructor_sqxtn(ctx, v34, v1405);
-                            let v1414 = C::put_in_reg(ctx, v31.1);
-                            let v1415 = &constructor_lane_size(ctx, v1402);
-                            let v1416 = constructor_sqxtn2(ctx, v1406, v1414, v1415);
-                            let v1417 = constructor_output_reg(ctx, v1416);
-                            // Rule at src/isa/aarch64/lower.isle line 2148.
-                            return Some(v1417);
-                        }
-                        let v1844 = C::ty_dyn64_int(ctx, v3);
-                        if let Some(v1845) = v1844 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v34 = C::put_in_reg(ctx, v31.0);
-                            let v35 = C::put_in_reg(ctx, v31.1);
-                            let v1410 = constructor_mov_vec_elem(
-                                ctx,
-                                v34,
-                                v35,
-                                0x1,
-                                0x0,
-                                &VectorSize::Size64x2,
-                            );
-                            let v1846 = &constructor_lane_size(ctx, v1845);
-                            let v1847 = constructor_sqxtn(ctx, v1410, v1846);
-                            let v1848 = constructor_output_reg(ctx, v1847);
-                            // Rule at src/isa/aarch64/lower_dynamic_neon.isle line 55.
-                            return Some(v1848);
-                        }
-                        let v1839 = C::ty_dyn128_int(ctx, v3);
-                        if let Some(v1840) = v1839 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v1403 = C::zero_value(ctx, v31.1);
-                            if let Some(v1404) = v1403 {
-                                let v34 = C::put_in_reg(ctx, v31.0);
-                                let v1841 = &constructor_lane_size(ctx, v1840);
-                                let v1842 = constructor_sqxtn(ctx, v34, v1841);
-                                let v1843 = constructor_output_reg(ctx, v1842);
-                                // Rule at src/isa/aarch64/lower_dynamic_neon.isle line 51.
-                                return Some(v1843);
-                            }
-                            let v34 = C::put_in_reg(ctx, v31.0);
-                            let v1841 = &constructor_lane_size(ctx, v1840);
-                            let v1842 = constructor_sqxtn(ctx, v34, v1841);
-                            let v1414 = C::put_in_reg(ctx, v31.1);
-                            let v1849 = &constructor_lane_size(ctx, v1840);
-                            let v1850 = constructor_sqxtn2(ctx, v1842, v1414, v1849);
-                            let v1851 = constructor_output_reg(ctx, v1850);
-                            // Rule at src/isa/aarch64/lower_dynamic_neon.isle line 59.
-                            return Some(v1851);
-                        }
-                    }
-                }
-                &Opcode::Unarrow => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v1408 = C::ty_vec64_int(ctx, v3);
-                        if let Some(v1409) = v1408 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v34 = C::put_in_reg(ctx, v31.0);
-                            let v35 = C::put_in_reg(ctx, v31.1);
-                            let v1410 = constructor_mov_vec_elem(
-                                ctx,
-                                v34,
-                                v35,
-                                0x1,
-                                0x0,
-                                &VectorSize::Size64x2,
-                            );
-                            let v1411 = &constructor_lane_size(ctx, v1409);
-                            let v1420 = constructor_sqxtun(ctx, v1410, v1411);
-                            let v1421 = constructor_output_reg(ctx, v1420);
-                            // Rule at src/isa/aarch64/lower.isle line 2159.
-                            return Some(v1421);
-                        }
-                        let v1401 = C::ty_vec128_int(ctx, v3);
-                        if let Some(v1402) = v1401 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v1403 = C::zero_value(ctx, v31.1);
-                            if let Some(v1404) = v1403 {
-                                let v34 = C::put_in_reg(ctx, v31.0);
-                                let v1405 = &constructor_lane_size(ctx, v1402);
-                                let v1418 = constructor_sqxtun(ctx, v34, v1405);
-                                let v1419 = constructor_output_reg(ctx, v1418);
-                                // Rule at src/isa/aarch64/lower.isle line 2155.
-                                return Some(v1419);
-                            }
-                            let v34 = C::put_in_reg(ctx, v31.0);
-                            let v1405 = &constructor_lane_size(ctx, v1402);
-                            let v1418 = constructor_sqxtun(ctx, v34, v1405);
-                            let v1414 = C::put_in_reg(ctx, v31.1);
-                            let v1415 = &constructor_lane_size(ctx, v1402);
-                            let v1422 = constructor_sqxtun2(ctx, v1418, v1414, v1415);
-                            let v1423 = constructor_output_reg(ctx, v1422);
-                            // Rule at src/isa/aarch64/lower.isle line 2163.
-                            return Some(v1423);
-                        }
-                        let v1844 = C::ty_dyn64_int(ctx, v3);
-                        if let Some(v1845) = v1844 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v34 = C::put_in_reg(ctx, v31.0);
-                            let v35 = C::put_in_reg(ctx, v31.1);
-                            let v1410 = constructor_mov_vec_elem(
-                                ctx,
-                                v34,
-                                v35,
-                                0x1,
-                                0x0,
-                                &VectorSize::Size64x2,
-                            );
-                            let v1846 = &constructor_lane_size(ctx, v1845);
-                            let v1854 = constructor_sqxtun(ctx, v1410, v1846);
-                            let v1855 = constructor_output_reg(ctx, v1854);
-                            // Rule at src/isa/aarch64/lower_dynamic_neon.isle line 69.
-                            return Some(v1855);
-                        }
-                        let v1839 = C::ty_dyn128_int(ctx, v3);
-                        if let Some(v1840) = v1839 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v1403 = C::zero_value(ctx, v31.1);
-                            if let Some(v1404) = v1403 {
-                                let v34 = C::put_in_reg(ctx, v31.0);
-                                let v1841 = &constructor_lane_size(ctx, v1840);
-                                let v1852 = constructor_sqxtun(ctx, v34, v1841);
-                                let v1853 = constructor_output_reg(ctx, v1852);
-                                // Rule at src/isa/aarch64/lower_dynamic_neon.isle line 65.
-                                return Some(v1853);
-                            }
-                            let v34 = C::put_in_reg(ctx, v31.0);
-                            let v1841 = &constructor_lane_size(ctx, v1840);
-                            let v1852 = constructor_sqxtun(ctx, v34, v1841);
-                            let v1414 = C::put_in_reg(ctx, v31.1);
-                            let v1849 = &constructor_lane_size(ctx, v1840);
-                            let v1856 = constructor_sqxtun2(ctx, v1852, v1414, v1849);
-                            let v1857 = constructor_output_reg(ctx, v1856);
-                            // Rule at src/isa/aarch64/lower_dynamic_neon.isle line 73.
-                            return Some(v1857);
-                        }
-                    }
-                }
-                &Opcode::Uunarrow => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v1408 = C::ty_vec64_int(ctx, v3);
-                        if let Some(v1409) = v1408 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v34 = C::put_in_reg(ctx, v31.0);
-                            let v35 = C::put_in_reg(ctx, v31.1);
-                            let v1410 = constructor_mov_vec_elem(
-                                ctx,
-                                v34,
-                                v35,
-                                0x1,
-                                0x0,
-                                &VectorSize::Size64x2,
-                            );
-                            let v1411 = &constructor_lane_size(ctx, v1409);
-                            let v1426 = constructor_uqxtn(ctx, v1410, v1411);
-                            let v1427 = constructor_output_reg(ctx, v1426);
-                            // Rule at src/isa/aarch64/lower.isle line 2175.
-                            return Some(v1427);
-                        }
-                        let v1401 = C::ty_vec128_int(ctx, v3);
-                        if let Some(v1402) = v1401 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v1403 = C::zero_value(ctx, v31.1);
-                            if let Some(v1404) = v1403 {
-                                let v34 = C::put_in_reg(ctx, v31.0);
-                                let v1405 = &constructor_lane_size(ctx, v1402);
-                                let v1424 = constructor_uqxtn(ctx, v34, v1405);
-                                let v1425 = constructor_output_reg(ctx, v1424);
-                                // Rule at src/isa/aarch64/lower.isle line 2171.
-                                return Some(v1425);
-                            }
-                            let v34 = C::put_in_reg(ctx, v31.0);
-                            let v1405 = &constructor_lane_size(ctx, v1402);
-                            let v1424 = constructor_uqxtn(ctx, v34, v1405);
-                            let v1414 = C::put_in_reg(ctx, v31.1);
-                            let v1415 = &constructor_lane_size(ctx, v1402);
-                            let v1428 = constructor_uqxtn2(ctx, v1424, v1414, v1415);
-                            let v1429 = constructor_output_reg(ctx, v1428);
-                            // Rule at src/isa/aarch64/lower.isle line 2179.
-                            return Some(v1429);
-                        }
-                        let v1844 = C::ty_dyn64_int(ctx, v3);
-                        if let Some(v1845) = v1844 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v34 = C::put_in_reg(ctx, v31.0);
-                            let v35 = C::put_in_reg(ctx, v31.1);
-                            let v1410 = constructor_mov_vec_elem(
-                                ctx,
-                                v34,
-                                v35,
-                                0x1,
-                                0x0,
-                                &VectorSize::Size64x2,
-                            );
-                            let v1846 = &constructor_lane_size(ctx, v1845);
-                            let v1860 = constructor_uqxtn(ctx, v1410, v1846);
-                            let v1861 = constructor_output_reg(ctx, v1860);
-                            // Rule at src/isa/aarch64/lower_dynamic_neon.isle line 83.
-                            return Some(v1861);
-                        }
-                        let v1839 = C::ty_dyn128_int(ctx, v3);
-                        if let Some(v1840) = v1839 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v1403 = C::zero_value(ctx, v31.1);
-                            if let Some(v1404) = v1403 {
-                                let v34 = C::put_in_reg(ctx, v31.0);
-                                let v1841 = &constructor_lane_size(ctx, v1840);
-                                let v1858 = constructor_uqxtn(ctx, v34, v1841);
-                                let v1859 = constructor_output_reg(ctx, v1858);
-                                // Rule at src/isa/aarch64/lower_dynamic_neon.isle line 79.
-                                return Some(v1859);
-                            }
-                            let v34 = C::put_in_reg(ctx, v31.0);
-                            let v1841 = &constructor_lane_size(ctx, v1840);
-                            let v1858 = constructor_uqxtn(ctx, v34, v1841);
-                            let v1414 = C::put_in_reg(ctx, v31.1);
-                            let v1849 = &constructor_lane_size(ctx, v1840);
-                            let v1862 = constructor_uqxtn2(ctx, v1858, v1414, v1849);
-                            let v1863 = constructor_output_reg(ctx, v1862);
-                            // Rule at src/isa/aarch64/lower_dynamic_neon.isle line 87.
-                            return Some(v1863);
-                        }
-                    }
-                }
-                &Opcode::IaddPairwise => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            I16X8 => {
-                                let v31 = C::unpack_value_array_2(ctx, v30);
-                                let v38 = C::def_inst(ctx, v31.1);
-                                if let Some(v39) = v38 {
-                                    let v40 = &C::inst_data(ctx, v39);
-                                    if let &InstructionData::Unary {
-                                        opcode: ref v300,
-                                        arg: v301,
-                                    } = v40
-                                    {
-                                        match v300 {
-                                            &Opcode::SwidenHigh => {
-                                                let v48 = C::def_inst(ctx, v31.0);
-                                                if let Some(v49) = v48 {
-                                                    let v50 = &C::inst_data(ctx, v49);
-                                                    if let &InstructionData::Unary {
-                                                        opcode: ref v298,
-                                                        arg: v299,
-                                                    } = v50
-                                                    {
-                                                        if let &Opcode::SwidenLow = v298 {
-                                                            if v299 == v301 {
-                                                                let v302 = C::put_in_reg(ctx, v299);
-                                                                let v303 =
-                                                                    constructor_saddlp8(ctx, v302);
-                                                                let v304 = constructor_output_reg(
-                                                                    ctx, v303,
-                                                                );
-                                                                // Rule at src/isa/aarch64/lower.isle line 322.
-                                                                return Some(v304);
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                            &Opcode::UwidenHigh => {
-                                                let v48 = C::def_inst(ctx, v31.0);
-                                                if let Some(v49) = v48 {
-                                                    let v50 = &C::inst_data(ctx, v49);
-                                                    if let &InstructionData::Unary {
-                                                        opcode: ref v298,
-                                                        arg: v299,
-                                                    } = v50
-                                                    {
-                                                        if let &Opcode::UwidenLow = v298 {
-                                                            if v299 == v301 {
-                                                                let v302 = C::put_in_reg(ctx, v299);
-                                                                let v307 =
-                                                                    constructor_uaddlp8(ctx, v302);
-                                                                let v308 = constructor_output_reg(
-                                                                    ctx, v307,
-                                                                );
-                                                                // Rule at src/isa/aarch64/lower.isle line 330.
-                                                                return Some(v308);
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                            _ => {}
-                                        }
-                                    }
-                                }
-                            }
-                            I32X4 => {
-                                let v31 = C::unpack_value_array_2(ctx, v30);
-                                let v38 = C::def_inst(ctx, v31.1);
-                                if let Some(v39) = v38 {
-                                    let v40 = &C::inst_data(ctx, v39);
-                                    if let &InstructionData::Unary {
-                                        opcode: ref v300,
-                                        arg: v301,
-                                    } = v40
-                                    {
-                                        match v300 {
-                                            &Opcode::SwidenHigh => {
-                                                let v48 = C::def_inst(ctx, v31.0);
-                                                if let Some(v49) = v48 {
-                                                    let v50 = &C::inst_data(ctx, v49);
-                                                    if let &InstructionData::Unary {
-                                                        opcode: ref v298,
-                                                        arg: v299,
-                                                    } = v50
-                                                    {
-                                                        if let &Opcode::SwidenLow = v298 {
-                                                            if v299 == v301 {
-                                                                let v302 = C::put_in_reg(ctx, v299);
-                                                                let v305 =
-                                                                    constructor_saddlp16(ctx, v302);
-                                                                let v306 = constructor_output_reg(
-                                                                    ctx, v305,
-                                                                );
-                                                                // Rule at src/isa/aarch64/lower.isle line 326.
-                                                                return Some(v306);
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                            &Opcode::UwidenHigh => {
-                                                let v48 = C::def_inst(ctx, v31.0);
-                                                if let Some(v49) = v48 {
-                                                    let v50 = &C::inst_data(ctx, v49);
-                                                    if let &InstructionData::Unary {
-                                                        opcode: ref v298,
-                                                        arg: v299,
-                                                    } = v50
-                                                    {
-                                                        if let &Opcode::UwidenLow = v298 {
-                                                            if v299 == v301 {
-                                                                let v302 = C::put_in_reg(ctx, v299);
-                                                                let v309 =
-                                                                    constructor_uaddlp16(ctx, v302);
-                                                                let v310 = constructor_output_reg(
-                                                                    ctx, v309,
-                                                                );
-                                                                // Rule at src/isa/aarch64/lower.isle line 334.
-                                                                return Some(v310);
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                            _ => {}
-                                        }
-                                    }
-                                }
-                            }
-                            _ => {}
-                        }
-                        let v31 = C::unpack_value_array_2(ctx, v30);
-                        let v34 = C::put_in_reg(ctx, v31.0);
-                        let v35 = C::put_in_reg(ctx, v31.1);
-                        let v121 = &constructor_vector_size(ctx, v3);
-                        let v311 = constructor_addp(ctx, v34, v35, v121);
-                        let v312 = constructor_output_reg(ctx, v311);
-                        // Rule at src/isa/aarch64/lower.isle line 337.
-                        return Some(v312);
-                    }
-                }
-                &Opcode::Iconcat => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        if v3 == I128 {
-                            let v31 = C::unpack_value_array_2(ctx, v30);
-                            let v34 = C::put_in_reg(ctx, v31.0);
-                            let v35 = C::put_in_reg(ctx, v31.1);
-                            let v239 = C::value_regs(ctx, v34, v35);
-                            let v240 = C::output(ctx, v239);
-                            // Rule at src/isa/aarch64/lower.isle line 255.
-                            return Some(v240);
-                        }
-                    }
-                }
-                _ => {}
-            }
-        }
-        &InstructionData::BinaryImm8 {
-            opcode: ref v1638,
-            arg: v1639,
-            imm: v1640,
-        } => {
-            match v1638 {
-                &Opcode::Extractlane => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v348 = C::ty_scalar_float(ctx, v3);
-                        if let Some(v349) = v348 {
-                            let v1641 = C::u8_from_uimm8(ctx, v1640);
-                            if v1641 == 0x0 {
-                                let v1642 = constructor_output_value(ctx, v1639);
-                                // Rule at src/isa/aarch64/lower.isle line 2482.
-                                return Some(v1642);
-                            }
-                            let v1643 = C::put_in_reg(ctx, v1639);
-                            let v1647 = C::value_type(ctx, v1639);
-                            let v1648 = &constructor_vector_size(ctx, v1647);
-                            let v1649 = constructor_fpu_move_from_vec(ctx, v1643, v1641, v1648);
-                            let v1650 = constructor_output_reg(ctx, v1649);
-                            // Rule at src/isa/aarch64/lower.isle line 2490.
-                            return Some(v1650);
-                        }
-                        let v680 = C::ty_int(ctx, v3);
-                        if let Some(v681) = v680 {
-                            let v1643 = C::put_in_reg(ctx, v1639);
-                            let v1644 = &constructor_scalar_size(ctx, v681);
-                            let v1641 = C::u8_from_uimm8(ctx, v1640);
-                            let v1645 = constructor_mov_from_vec(ctx, v1643, v1641, v1644);
-                            let v1646 = constructor_output_reg(ctx, v1645);
-                            // Rule at src/isa/aarch64/lower.isle line 2485.
-                            return Some(v1646);
-                        }
-                    }
-                }
-                &Opcode::ExtractVector => {
-                    if v1640 == 0x0 {
-                        let v1643 = C::put_in_reg(ctx, v1639);
-                        let v1872 = C::value_reg(ctx, v1643);
-                        let v1873 = C::output(ctx, v1872);
-                        // Rule at src/isa/aarch64/lower_dynamic_neon.isle line 99.
-                        return Some(v1873);
-                    }
-                }
-                _ => {}
-            }
-        }
-        &InstructionData::Call {
-            opcode: ref v1488,
-            args: v1489,
-            func_ref: v1490,
-        } => {
-            match v1488 {
-                &Opcode::Call => {
-                    let v1492 = C::func_ref_data(ctx, v1490);
-                    let v1491 = C::value_list_slice(ctx, v1489);
-                    let v1496 = C::gen_call(ctx, v1492.0, v1492.1, v1492.2, v1491);
-                    // Rule at src/isa/aarch64/lower.isle line 2259.
-                    return Some(v1496);
-                }
-                &Opcode::ReturnCall => {
-                    let v1492 = C::func_ref_data(ctx, v1490);
-                    let v1491 = C::value_list_slice(ctx, v1489);
-                    let v1510 = C::gen_return_call(ctx, v1492.0, v1492.1, v1492.2, v1491);
-                    // Rule at src/isa/aarch64/lower.isle line 2273.
-                    return Some(v1510);
-                }
-                _ => {}
-            }
-        }
-        &InstructionData::CallIndirect {
-            opcode: ref v1497,
-            args: v1498,
-            sig_ref: v1499,
-        } => {
-            match v1497 {
-                &Opcode::CallIndirect => {
-                    let v1500 = C::value_list_slice(ctx, v1498);
-                    let v1501 = C::value_slice_unwrap(ctx, v1500);
-                    if let Some(v1502) = v1501 {
-                        let v1505 = C::gen_call_indirect(ctx, v1499, v1502.0, v1502.1);
-                        // Rule at src/isa/aarch64/lower.isle line 2262.
-                        return Some(v1505);
-                    }
-                }
-                &Opcode::ReturnCallIndirect => {
-                    let v1500 = C::value_list_slice(ctx, v1498);
-                    let v1501 = C::value_slice_unwrap(ctx, v1500);
-                    if let Some(v1502) = v1501 {
-                        let v1511 = C::gen_return_call_indirect(ctx, v1499, v1502.0, v1502.1);
-                        // Rule at src/isa/aarch64/lower.isle line 2276.
-                        return Some(v1511);
-                    }
-                }
-                _ => {}
-            }
-        }
-        &InstructionData::DynamicStackLoad {
-            opcode: ref v1864,
-            dynamic_stack_slot: v1865,
-        } => {
-            if let &Opcode::DynamicStackAddr = v1864 {
-                let v1866 = C::temp_writable_reg(ctx, I64);
-                let v1867 = &C::abi_dynamic_stackslot_addr(ctx, v1866, v1865);
-                let v1868 = C::emit(ctx, v1867);
-                let v1869 = C::writable_reg_to_reg(ctx, v1866);
-                let v1870 = C::value_reg(ctx, v1869);
-                let v1871 = C::output(ctx, v1870);
-                // Rule at src/isa/aarch64/lower_dynamic_neon.isle line 93.
-                return Some(v1871);
-            }
-        }
-        &InstructionData::FloatCompare {
-            opcode: ref v1091,
-            args: ref v1092,
-            cond: ref v1093,
-        } => {
-            if let &Opcode::Fcmp = v1091 {
-                let v1 = C::first_result(ctx, arg0);
-                if let Some(v2) = v1 {
-                    let v3 = C::value_type(ctx, v2);
-                    let v117 = C::multi_lane(ctx, v3);
-                    if let Some(v118) = v117 {
-                        let v1094 = C::unpack_value_array_2(ctx, v1092);
-                        let v1099 = C::zero_value(ctx, v1094.1);
-                        if let Some(v1100) = v1099 {
-                            let v1097 = &C::fcmp_zero_cond_not_eq(ctx, v1093);
-                            if let Some(v1098) = v1097 {
-                                let v1101 = C::put_in_reg(ctx, v1094.0);
-                                let v313 = &constructor_vector_size(ctx, v3);
-                                let v1102 = constructor_fcmeq0(ctx, v1101, v313);
-                                let v1103 = constructor_not(ctx, v1102, v313);
-                                let v1104 = C::value_reg(ctx, v1103);
-                                let v1105 = C::output(ctx, v1104);
-                                // Rule at src/isa/aarch64/lower.isle line 1850.
-                                return Some(v1105);
-                            }
-                            let v1106 = &C::fcmp_zero_cond(ctx, v1093);
-                            if let Some(v1107) = v1106 {
-                                let v1101 = C::put_in_reg(ctx, v1094.0);
-                                let v313 = &constructor_vector_size(ctx, v3);
-                                let v1108 = constructor_float_cmp_zero(ctx, v1107, v1101, v313);
-                                let v1109 = C::value_reg(ctx, v1108);
-                                let v1110 = C::output(ctx, v1109);
-                                // Rule at src/isa/aarch64/lower.isle line 1856.
-                                return Some(v1110);
-                            }
-                        }
-                        let v1111 = C::zero_value(ctx, v1094.0);
-                        if let Some(v1112) = v1111 {
-                            let v1097 = &C::fcmp_zero_cond_not_eq(ctx, v1093);
-                            if let Some(v1098) = v1097 {
-                                let v1113 = C::put_in_reg(ctx, v1094.1);
-                                let v313 = &constructor_vector_size(ctx, v3);
-                                let v1114 = constructor_fcmeq0(ctx, v1113, v313);
-                                let v1115 = constructor_not(ctx, v1114, v313);
-                                let v1116 = C::value_reg(ctx, v1115);
-                                let v1117 = C::output(ctx, v1116);
-                                // Rule at src/isa/aarch64/lower.isle line 1862.
-                                return Some(v1117);
-                            }
-                            let v1106 = &C::fcmp_zero_cond(ctx, v1093);
-                            if let Some(v1107) = v1106 {
-                                let v1113 = C::put_in_reg(ctx, v1094.1);
-                                let v313 = &constructor_vector_size(ctx, v3);
-                                let v1118 =
-                                    constructor_float_cmp_zero_swap(ctx, v1107, v1113, v313);
-                                let v1119 = C::value_reg(ctx, v1118);
-                                let v1120 = C::output(ctx, v1119);
-                                // Rule at src/isa/aarch64/lower.isle line 1868.
-                                return Some(v1120);
-                            }
-                        }
-                    }
-                    let v1094 = C::unpack_value_array_2(ctx, v1092);
-                    let v1121 = C::value_type(ctx, v1094.0);
-                    let v1122 = C::ty_scalar_float(ctx, v1121);
-                    if let Some(v1123) = v1122 {
-                        let v1124 = &constructor_scalar_size(ctx, v1123);
-                        let v1125 = C::put_in_reg(ctx, v1094.0);
-                        let v1126 = C::put_in_reg(ctx, v1094.1);
-                        let v1127 = &constructor_fpu_cmp(ctx, v1124, v1125, v1126);
-                        let v1128 = &C::fp_cond_code(ctx, v1093);
-                        let v1129 = &constructor_materialize_bool_result(ctx, v1128);
-                        let v1130 = constructor_with_flags(ctx, v1127, v1129);
-                        let v1131 = C::output(ctx, v1130);
-                        // Rule at src/isa/aarch64/lower.isle line 1874.
-                        return Some(v1131);
-                    }
-                    let v1132 = C::ty_vector_float(ctx, v1121);
-                    if let Some(v1133) = v1132 {
-                        let v1101 = C::put_in_reg(ctx, v1094.0);
-                        let v1134 = C::put_in_reg(ctx, v1094.1);
-                        let v1135 = &C::fp_cond_code(ctx, v1093);
-                        let v1136 = constructor_vec_cmp(ctx, v1101, v1134, v1121, v1135);
-                        let v1137 = constructor_output_reg(ctx, v1136);
-                        // Rule at src/isa/aarch64/lower.isle line 1879.
-                        return Some(v1137);
-                    }
-                }
-            }
-        }
-        &InstructionData::FuncAddr {
-            opcode: ref v1462,
-            func_ref: v1463,
-        } => {
-            if let &Opcode::FuncAddr = v1462 {
-                let v1464 = C::func_ref_data(ctx, v1463);
-                let v1468 = C::box_external_name(ctx, v1464.1);
-                let v1470 = constructor_load_ext_name(ctx, v1468, 0x0);
-                let v1471 = constructor_output_reg(ctx, v1470);
-                // Rule at src/isa/aarch64/lower.isle line 2238.
-                return Some(v1471);
-            }
-        }
-        &InstructionData::IntAddTrap {
-            opcode: ref v1712,
-            args: ref v1713,
-            code: ref v1714,
-        } => {
-            if let &Opcode::UaddOverflowTrap = v1712 {
-                let v1 = C::first_result(ctx, arg0);
-                if let Some(v2) = v1 {
-                    let v3 = C::value_type(ctx, v2);
-                    let v27 = C::fits_in_64(ctx, v3);
-                    if let Some(v28) = v27 {
-                        let v1715 = C::unpack_value_array_2(ctx, v1713);
-                        let v1718 = C::put_in_reg(ctx, v1715.0);
-                        let v1719 = C::put_in_reg(ctx, v1715.1);
-                        let v1720 = &constructor_add_with_flags_paired(ctx, v28, v1718, v1719);
-                        let v1721 = constructor_trap_if_overflow(ctx, v1720, v1714);
-                        let v1722 = constructor_output_reg(ctx, v1721);
-                        // Rule at src/isa/aarch64/lower.isle line 2587.
-                        return Some(v1722);
-                    }
-                }
-            }
-        }
-        &InstructionData::IntCompare {
-            opcode: ref v1138,
-            args: ref v1139,
-            cond: ref v1140,
-        } => {
-            if let &Opcode::Icmp = v1138 {
-                let v1 = C::first_result(ctx, arg0);
-                if let Some(v2) = v1 {
-                    let v3 = C::value_type(ctx, v2);
-                    let v117 = C::multi_lane(ctx, v3);
-                    if let Some(v118) = v117 {
-                        let v1141 = C::unpack_value_array_2(ctx, v1139);
-                        let v1146 = C::zero_value(ctx, v1141.1);
-                        if let Some(v1147) = v1146 {
-                            let v1144 = &C::icmp_zero_cond_not_eq(ctx, v1140);
-                            if let Some(v1145) = v1144 {
-                                let v1148 = C::put_in_reg(ctx, v1141.0);
-                                let v313 = &constructor_vector_size(ctx, v3);
-                                let v1149 = constructor_cmeq0(ctx, v1148, v313);
-                                let v1150 = constructor_not(ctx, v1149, v313);
-                                let v1151 = C::value_reg(ctx, v1150);
-                                let v1152 = C::output(ctx, v1151);
-                                // Rule at src/isa/aarch64/lower.isle line 1885.
-                                return Some(v1152);
-                            }
-                            let v1153 = &C::icmp_zero_cond(ctx, v1140);
-                            if let Some(v1154) = v1153 {
-                                let v1148 = C::put_in_reg(ctx, v1141.0);
-                                let v313 = &constructor_vector_size(ctx, v3);
-                                let v1155 = constructor_int_cmp_zero(ctx, v1154, v1148, v313);
-                                let v1156 = C::value_reg(ctx, v1155);
-                                let v1157 = C::output(ctx, v1156);
-                                // Rule at src/isa/aarch64/lower.isle line 1891.
-                                return Some(v1157);
-                            }
-                        }
-                        let v1158 = C::zero_value(ctx, v1141.0);
-                        if let Some(v1159) = v1158 {
-                            let v1144 = &C::icmp_zero_cond_not_eq(ctx, v1140);
-                            if let Some(v1145) = v1144 {
-                                let v1160 = C::put_in_reg(ctx, v1141.1);
-                                let v313 = &constructor_vector_size(ctx, v3);
-                                let v1161 = constructor_cmeq0(ctx, v1160, v313);
-                                let v1162 = constructor_not(ctx, v1161, v313);
-                                let v1163 = C::value_reg(ctx, v1162);
-                                let v1164 = C::output(ctx, v1163);
-                                // Rule at src/isa/aarch64/lower.isle line 1897.
-                                return Some(v1164);
-                            }
-                            let v1153 = &C::icmp_zero_cond(ctx, v1140);
-                            if let Some(v1154) = v1153 {
-                                let v1160 = C::put_in_reg(ctx, v1141.1);
-                                let v313 = &constructor_vector_size(ctx, v3);
-                                let v1165 = constructor_int_cmp_zero_swap(ctx, v1154, v1160, v313);
-                                let v1166 = C::value_reg(ctx, v1165);
-                                let v1167 = C::output(ctx, v1166);
-                                // Rule at src/isa/aarch64/lower.isle line 1903.
-                                return Some(v1167);
-                            }
-                        }
-                    }
-                }
-                let v1141 = C::unpack_value_array_2(ctx, v1139);
-                let v1168 = C::value_type(ctx, v1141.0);
-                let v1170 =
-                    constructor_lower_icmp_into_reg(ctx, v1140, v1141.0, v1141.1, v1168, I8);
-                let v1171 = C::output(ctx, v1170);
-                // Rule at src/isa/aarch64/lower.isle line 1909.
-                return Some(v1171);
-            }
-        }
-        &InstructionData::Load {
-            opcode: ref v1512,
-            arg: v1513,
-            flags: v1514,
-            offset: v1515,
-        } => {
-            match v1512 {
-                &Opcode::Load => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            I8 => {
-                                let v1516 = C::offset32_to_u32(ctx, v1515);
-                                let v1517 = &C::amode(ctx, I8, v1513, v1516);
-                                let v1518 = constructor_aarch64_uload8(ctx, v1517, v1514);
-                                let v1519 = constructor_output_reg(ctx, v1518);
-                                // Rule at src/isa/aarch64/lower.isle line 2281.
-                                return Some(v1519);
-                            }
-                            I16 => {
-                                let v1516 = C::offset32_to_u32(ctx, v1515);
-                                let v1520 = &C::amode(ctx, I16, v1513, v1516);
-                                let v1521 = constructor_aarch64_uload16(ctx, v1520, v1514);
-                                let v1522 = constructor_output_reg(ctx, v1521);
-                                // Rule at src/isa/aarch64/lower.isle line 2284.
-                                return Some(v1522);
-                            }
-                            I32 => {
-                                let v1516 = C::offset32_to_u32(ctx, v1515);
-                                let v1523 = &C::amode(ctx, I32, v1513, v1516);
-                                let v1524 = constructor_aarch64_uload32(ctx, v1523, v1514);
-                                let v1525 = constructor_output_reg(ctx, v1524);
-                                // Rule at src/isa/aarch64/lower.isle line 2287.
-                                return Some(v1525);
-                            }
-                            I64 => {
-                                let v1516 = C::offset32_to_u32(ctx, v1515);
-                                let v1526 = &C::amode(ctx, I64, v1513, v1516);
-                                let v1527 = constructor_aarch64_uload64(ctx, v1526, v1514);
-                                let v1528 = constructor_output_reg(ctx, v1527);
-                                // Rule at src/isa/aarch64/lower.isle line 2290.
-                                return Some(v1528);
-                            }
-                            I128 => {
-                                let v1516 = C::offset32_to_u32(ctx, v1515);
-                                let v1535 = &C::pair_amode(ctx, v1513, v1516);
-                                let v1536 = constructor_aarch64_loadp64(ctx, v1535, v1514);
-                                let v1537 = C::output(ctx, v1536);
-                                // Rule at src/isa/aarch64/lower.isle line 2302.
-                                return Some(v1537);
-                            }
-                            R64 => {
-                                let v1516 = C::offset32_to_u32(ctx, v1515);
-                                let v1526 = &C::amode(ctx, I64, v1513, v1516);
-                                let v1527 = constructor_aarch64_uload64(ctx, v1526, v1514);
-                                let v1528 = constructor_output_reg(ctx, v1527);
-                                // Rule at src/isa/aarch64/lower.isle line 2293.
-                                return Some(v1528);
-                            }
-                            F32 => {
-                                let v1516 = C::offset32_to_u32(ctx, v1515);
-                                let v1529 = &C::amode(ctx, F32, v1513, v1516);
-                                let v1530 = constructor_aarch64_fpuload32(ctx, v1529, v1514);
-                                let v1531 = constructor_output_reg(ctx, v1530);
-                                // Rule at src/isa/aarch64/lower.isle line 2296.
-                                return Some(v1531);
-                            }
-                            F64 => {
-                                let v1516 = C::offset32_to_u32(ctx, v1515);
-                                let v1532 = &C::amode(ctx, F64, v1513, v1516);
-                                let v1533 = constructor_aarch64_fpuload64(ctx, v1532, v1514);
-                                let v1534 = constructor_output_reg(ctx, v1533);
-                                // Rule at src/isa/aarch64/lower.isle line 2299.
-                                return Some(v1534);
-                            }
-                            _ => {}
-                        }
-                        let v1538 = C::ty_vec64(ctx, v3);
-                        if let Some(v1539) = v1538 {
-                            let v1516 = C::offset32_to_u32(ctx, v1515);
-                            let v1532 = &C::amode(ctx, F64, v1513, v1516);
-                            let v1540 = constructor_aarch64_fpuload128(ctx, v1532, v1514);
-                            let v1541 = constructor_output_reg(ctx, v1540);
-                            // Rule at src/isa/aarch64/lower.isle line 2305.
-                            return Some(v1541);
-                        }
-                        let v1546 = C::ty_dyn_vec64(ctx, v3);
-                        if let Some(v1547) = v1546 {
-                            let v1516 = C::offset32_to_u32(ctx, v1515);
-                            let v1532 = &C::amode(ctx, F64, v1513, v1516);
-                            let v1533 = constructor_aarch64_fpuload64(ctx, v1532, v1514);
-                            let v1534 = constructor_output_reg(ctx, v1533);
-                            // Rule at src/isa/aarch64/lower.isle line 2313.
-                            return Some(v1534);
-                        }
-                        let v575 = C::ty_vec128(ctx, v3);
-                        if let Some(v576) = v575 {
-                            let v1516 = C::offset32_to_u32(ctx, v1515);
-                            let v1543 = &C::amode(ctx, I8X16, v1513, v1516);
-                            let v1544 = constructor_aarch64_fpuload128(ctx, v1543, v1514);
-                            let v1545 = constructor_output_reg(ctx, v1544);
-                            // Rule at src/isa/aarch64/lower.isle line 2309.
-                            return Some(v1545);
-                        }
-                        let v1548 = C::ty_dyn_vec128(ctx, v3);
-                        if let Some(v1549) = v1548 {
-                            let v1516 = C::offset32_to_u32(ctx, v1515);
-                            let v1543 = &C::amode(ctx, I8X16, v1513, v1516);
-                            let v1544 = constructor_aarch64_fpuload128(ctx, v1543, v1514);
-                            let v1545 = constructor_output_reg(ctx, v1544);
-                            // Rule at src/isa/aarch64/lower.isle line 2317.
-                            return Some(v1545);
-                        }
-                    }
-                }
-                &Opcode::Uload8 => {
-                    let v1516 = C::offset32_to_u32(ctx, v1515);
-                    let v1517 = &C::amode(ctx, I8, v1513, v1516);
-                    let v1518 = constructor_aarch64_uload8(ctx, v1517, v1514);
-                    let v1519 = constructor_output_reg(ctx, v1518);
-                    // Rule at src/isa/aarch64/lower.isle line 2322.
-                    return Some(v1519);
-                }
-                &Opcode::Sload8 => {
-                    let v1516 = C::offset32_to_u32(ctx, v1515);
-                    let v1517 = &C::amode(ctx, I8, v1513, v1516);
-                    let v1550 = constructor_aarch64_sload8(ctx, v1517, v1514);
-                    let v1551 = constructor_output_reg(ctx, v1550);
-                    // Rule at src/isa/aarch64/lower.isle line 2325.
-                    return Some(v1551);
-                }
-                &Opcode::Uload16 => {
-                    let v1516 = C::offset32_to_u32(ctx, v1515);
-                    let v1520 = &C::amode(ctx, I16, v1513, v1516);
-                    let v1521 = constructor_aarch64_uload16(ctx, v1520, v1514);
-                    let v1522 = constructor_output_reg(ctx, v1521);
-                    // Rule at src/isa/aarch64/lower.isle line 2328.
-                    return Some(v1522);
-                }
-                &Opcode::Sload16 => {
-                    let v1516 = C::offset32_to_u32(ctx, v1515);
-                    let v1520 = &C::amode(ctx, I16, v1513, v1516);
-                    let v1552 = constructor_aarch64_sload16(ctx, v1520, v1514);
-                    let v1553 = constructor_output_reg(ctx, v1552);
-                    // Rule at src/isa/aarch64/lower.isle line 2331.
-                    return Some(v1553);
-                }
-                &Opcode::Uload32 => {
-                    let v1516 = C::offset32_to_u32(ctx, v1515);
-                    let v1523 = &C::amode(ctx, I32, v1513, v1516);
-                    let v1524 = constructor_aarch64_uload32(ctx, v1523, v1514);
-                    let v1525 = constructor_output_reg(ctx, v1524);
-                    // Rule at src/isa/aarch64/lower.isle line 2334.
-                    return Some(v1525);
-                }
-                &Opcode::Sload32 => {
-                    let v1516 = C::offset32_to_u32(ctx, v1515);
-                    let v1523 = &C::amode(ctx, I32, v1513, v1516);
-                    let v1554 = constructor_aarch64_sload32(ctx, v1523, v1514);
-                    let v1555 = constructor_output_reg(ctx, v1554);
-                    // Rule at src/isa/aarch64/lower.isle line 2337.
-                    return Some(v1555);
-                }
-                &Opcode::Uload8x8 => {
-                    let v1516 = C::offset32_to_u32(ctx, v1515);
-                    let v1532 = &C::amode(ctx, F64, v1513, v1516);
-                    let v1533 = constructor_aarch64_fpuload64(ctx, v1532, v1514);
-                    let v1559 = constructor_vec_extend(
-                        ctx,
-                        &VecExtendOp::Uxtl,
-                        v1533,
-                        false,
-                        &ScalarSize::Size16,
-                    );
-                    let v1560 = constructor_output_reg(ctx, v1559);
-                    // Rule at src/isa/aarch64/lower.isle line 2347.
-                    return Some(v1560);
-                }
-                &Opcode::Sload8x8 => {
-                    let v1516 = C::offset32_to_u32(ctx, v1515);
-                    let v1532 = &C::amode(ctx, F64, v1513, v1516);
-                    let v1533 = constructor_aarch64_fpuload64(ctx, v1532, v1514);
-                    let v1557 = constructor_vec_extend(
-                        ctx,
-                        &VecExtendOp::Sxtl,
-                        v1533,
-                        false,
-                        &ScalarSize::Size16,
-                    );
-                    let v1558 = constructor_output_reg(ctx, v1557);
-                    // Rule at src/isa/aarch64/lower.isle line 2341.
-                    return Some(v1558);
-                }
-                &Opcode::Uload16x4 => {
-                    let v1516 = C::offset32_to_u32(ctx, v1515);
-                    let v1532 = &C::amode(ctx, F64, v1513, v1516);
-                    let v1533 = constructor_aarch64_fpuload64(ctx, v1532, v1514);
-                    let v1563 = constructor_vec_extend(
-                        ctx,
-                        &VecExtendOp::Uxtl,
-                        v1533,
-                        false,
-                        &ScalarSize::Size32,
-                    );
-                    let v1564 = constructor_output_reg(ctx, v1563);
-                    // Rule at src/isa/aarch64/lower.isle line 2359.
-                    return Some(v1564);
-                }
-                &Opcode::Sload16x4 => {
-                    let v1516 = C::offset32_to_u32(ctx, v1515);
-                    let v1532 = &C::amode(ctx, F64, v1513, v1516);
-                    let v1533 = constructor_aarch64_fpuload64(ctx, v1532, v1514);
-                    let v1561 = constructor_vec_extend(
-                        ctx,
-                        &VecExtendOp::Sxtl,
-                        v1533,
-                        false,
-                        &ScalarSize::Size32,
-                    );
-                    let v1562 = constructor_output_reg(ctx, v1561);
-                    // Rule at src/isa/aarch64/lower.isle line 2353.
-                    return Some(v1562);
-                }
-                &Opcode::Uload32x2 => {
-                    let v1516 = C::offset32_to_u32(ctx, v1515);
-                    let v1532 = &C::amode(ctx, F64, v1513, v1516);
-                    let v1533 = constructor_aarch64_fpuload64(ctx, v1532, v1514);
-                    let v1567 = constructor_vec_extend(
-                        ctx,
-                        &VecExtendOp::Uxtl,
-                        v1533,
-                        false,
-                        &ScalarSize::Size64,
-                    );
-                    let v1568 = constructor_output_reg(ctx, v1567);
-                    // Rule at src/isa/aarch64/lower.isle line 2371.
-                    return Some(v1568);
-                }
-                &Opcode::Sload32x2 => {
-                    let v1516 = C::offset32_to_u32(ctx, v1515);
-                    let v1532 = &C::amode(ctx, F64, v1513, v1516);
-                    let v1533 = constructor_aarch64_fpuload64(ctx, v1532, v1514);
-                    let v1565 = constructor_vec_extend(
-                        ctx,
-                        &VecExtendOp::Sxtl,
-                        v1533,
-                        false,
-                        &ScalarSize::Size64,
-                    );
-                    let v1566 = constructor_output_reg(ctx, v1565);
-                    // Rule at src/isa/aarch64/lower.isle line 2365.
-                    return Some(v1566);
-                }
-                _ => {}
-            }
-        }
-        &InstructionData::LoadNoOffset {
-            opcode: ref v1293,
-            arg: v1294,
-            flags: v1295,
-        } => {
-            match v1293 {
-                &Opcode::Bitcast => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v1620 = C::ty_float_or_vec(ctx, v3);
-                        if let Some(v1621) = v1620 {
-                            let v1622 = C::value_type(ctx, v1294);
-                            let v1623 = C::ty_float_or_vec(ctx, v1622);
-                            if let Some(v1624) = v1623 {
-                                let v1625 = constructor_output_value(ctx, v1294);
-                                // Rule at src/isa/aarch64/lower.isle line 2458.
-                                return Some(v1625);
-                            }
-                            let v1626 = C::ty_int_ref_scalar_64(ctx, v1622);
-                            if let Some(v1627) = v1626 {
-                                let v1296 = C::put_in_reg(ctx, v1294);
-                                let v1628 = &constructor_scalar_size(ctx, v1622);
-                                let v1629 = constructor_mov_to_fpu(ctx, v1296, v1628);
-                                let v1630 = constructor_output_reg(ctx, v1629);
-                                // Rule at src/isa/aarch64/lower.isle line 2462.
-                                return Some(v1630);
-                            }
-                        }
-                        let v1077 = C::ty_int_ref_scalar_64(ctx, v3);
-                        if let Some(v1078) = v1077 {
-                            let v1622 = C::value_type(ctx, v1294);
-                            let v1631 = C::fits_in_64(ctx, v1622);
-                            if let Some(v1632) = v1631 {
-                                let v1633 = C::ty_float_or_vec(ctx, v1632);
-                                if let Some(v1634) = v1633 {
-                                    let v1296 = C::put_in_reg(ctx, v1294);
-                                    let v1635 = &constructor_scalar_size(ctx, v3);
-                                    let v1636 = constructor_mov_from_vec(ctx, v1296, 0x0, v1635);
-                                    let v1637 = constructor_output_reg(ctx, v1636);
-                                    // Rule at src/isa/aarch64/lower.isle line 2467.
-                                    return Some(v1637);
-                                }
-                            }
-                            let v1626 = C::ty_int_ref_scalar_64(ctx, v1622);
-                            if let Some(v1627) = v1626 {
-                                let v1625 = constructor_output_value(ctx, v1294);
-                                // Rule at src/isa/aarch64/lower.isle line 2472.
-                                return Some(v1625);
-                            }
-                        }
-                        if v3 == I128 {
-                            let v1622 = C::value_type(ctx, v1294);
-                            if v1622 == I128 {
-                                let v1625 = constructor_output_value(ctx, v1294);
-                                // Rule at src/isa/aarch64/lower.isle line 2476.
-                                return Some(v1625);
-                            }
-                        }
-                    }
-                }
-                &Opcode::AtomicLoad => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v1291 = C::valid_atomic_transaction(ctx, v3);
-                        if let Some(v1292) = v1291 {
-                            let v1296 = C::put_in_reg(ctx, v1294);
-                            let v1297 = constructor_load_acquire(ctx, v1292, v1295, v1296);
-                            let v1298 = constructor_output_reg(ctx, v1297);
-                            // Rule at src/isa/aarch64/lower.isle line 2040.
-                            return Some(v1298);
-                        }
-                    }
-                }
-                _ => {}
-            }
-        }
-        &InstructionData::MultiAry {
-            opcode: ref v1506,
-            args: v1507,
-        } => {
-            if let &Opcode::Return = v1506 {
-                let v1508 = C::value_list_slice(ctx, v1507);
-                let v1509 = constructor_lower_return(ctx, v1508);
-                // Rule at src/isa/aarch64/lower.isle line 2268.
-                return Some(v1509);
-            }
-        }
-        &InstructionData::NullAry { opcode: ref v11 } => {
-            match v11 {
-                &Opcode::Debugtrap => {
-                    let v1460 = &constructor_brk(ctx);
-                    let v1461 = constructor_side_effect(ctx, v1460);
-                    // Rule at src/isa/aarch64/lower.isle line 2233.
-                    return Some(v1461);
-                }
-                &Opcode::GetPinnedReg => {
-                    let v1615 = C::preg_pinned(ctx);
-                    let v1616 = constructor_mov_from_preg(ctx, v1615);
-                    let v1617 = constructor_output_reg(ctx, v1616);
-                    // Rule at src/isa/aarch64/lower.isle line 2449.
-                    return Some(v1617);
-                }
-                &Opcode::GetFramePointer => {
-                    let v1482 = constructor_aarch64_fp(ctx);
-                    let v1483 = constructor_output_reg(ctx, v1482);
-                    // Rule at src/isa/aarch64/lower.isle line 2248.
-                    return Some(v1483);
-                }
-                &Opcode::GetStackPointer => {
-                    let v1484 = constructor_aarch64_sp(ctx);
-                    let v1485 = constructor_output_reg(ctx, v1484);
-                    // Rule at src/isa/aarch64/lower.isle line 2251.
-                    return Some(v1485);
-                }
-                &Opcode::GetReturnAddress => {
-                    let v1486 = constructor_aarch64_link(ctx);
-                    let v1487 = constructor_output_reg(ctx, v1486);
-                    // Rule at src/isa/aarch64/lower.isle line 2254.
-                    return Some(v1487);
-                }
-                &Opcode::Null => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v13 = constructor_imm(ctx, v3, &ImmExtend::Zero, 0x0);
-                        let v14 = constructor_output_reg(ctx, v13);
-                        // Rule at src/isa/aarch64/lower.isle line 24.
-                        return Some(v14);
-                    }
-                }
-                &Opcode::Nop => {
-                    let v25 = C::invalid_reg(ctx);
-                    let v26 = constructor_output_reg(ctx, v25);
-                    // Rule at src/isa/aarch64/lower.isle line 39.
-                    return Some(v26);
-                }
-                &Opcode::Fence => {
-                    let v1449 = &constructor_aarch64_fence(ctx);
-                    let v1450 = constructor_side_effect(ctx, v1449);
-                    // Rule at src/isa/aarch64/lower.isle line 2216.
-                    return Some(v1450);
-                }
-                _ => {}
-            }
-        }
-        &InstructionData::Shuffle {
-            opcode: ref v137,
-            args: ref v138,
-            imm: v139,
-        } => {
-            if let &Opcode::Shuffle = v137 {
-                let v143 = C::shuffle_dup8_from_imm(ctx, v139);
-                if let Some(v144) = v143 {
-                    let v140 = C::unpack_value_array_2(ctx, v138);
-                    let v145 = C::put_in_reg(ctx, v140.0);
-                    let v147 = constructor_vec_dup_from_fpu(ctx, v145, &VectorSize::Size8x16, v144);
-                    let v148 = constructor_output_reg(ctx, v147);
-                    // Rule at src/isa/aarch64/lower.isle line 127.
-                    return Some(v148);
-                }
-                let v149 = C::shuffle_dup16_from_imm(ctx, v139);
-                if let Some(v150) = v149 {
-                    let v140 = C::unpack_value_array_2(ctx, v138);
-                    let v145 = C::put_in_reg(ctx, v140.0);
-                    let v152 = constructor_vec_dup_from_fpu(ctx, v145, &VectorSize::Size16x8, v150);
-                    let v153 = constructor_output_reg(ctx, v152);
-                    // Rule at src/isa/aarch64/lower.isle line 129.
-                    return Some(v153);
-                }
-                let v154 = C::shuffle_dup32_from_imm(ctx, v139);
-                if let Some(v155) = v154 {
-                    let v140 = C::unpack_value_array_2(ctx, v138);
-                    let v145 = C::put_in_reg(ctx, v140.0);
-                    let v157 = constructor_vec_dup_from_fpu(ctx, v145, &VectorSize::Size32x4, v155);
-                    let v158 = constructor_output_reg(ctx, v157);
-                    // Rule at src/isa/aarch64/lower.isle line 131.
-                    return Some(v158);
-                }
-                let v159 = C::shuffle_dup64_from_imm(ctx, v139);
-                if let Some(v160) = v159 {
-                    let v140 = C::unpack_value_array_2(ctx, v138);
-                    let v145 = C::put_in_reg(ctx, v140.0);
-                    let v162 = constructor_vec_dup_from_fpu(ctx, v145, &VectorSize::Size64x2, v160);
-                    let v163 = constructor_output_reg(ctx, v162);
-                    // Rule at src/isa/aarch64/lower.isle line 133.
-                    return Some(v163);
-                }
-                let v164 = C::vec_extract_imm4_from_immediate(ctx, v139);
-                if let Some(v165) = v164 {
-                    let v140 = C::unpack_value_array_2(ctx, v138);
-                    let v145 = C::put_in_reg(ctx, v140.0);
-                    let v166 = C::put_in_reg(ctx, v140.1);
-                    let v167 = constructor_vec_extract(ctx, v145, v166, v165);
-                    let v168 = constructor_output_reg(ctx, v167);
-                    // Rule at src/isa/aarch64/lower.isle line 152.
-                    return Some(v168);
-                }
-                let v169 = C::u128_from_immediate(ctx, v139);
-                if let Some(v170) = v169 {
-                    match v170 {
-                        0x8090A0B0C0D0E0F0001020304050607 => {
-                            let v140 = C::unpack_value_array_2(ctx, v138);
-                            let v145 = C::put_in_reg(ctx, v140.0);
-                            let v217 = constructor_rev64(ctx, v145, &VectorSize::Size8x16);
-                            let v218 = constructor_output_reg(ctx, v217);
-                            // Rule at src/isa/aarch64/lower.isle line 228.
-                            return Some(v218);
-                        }
-                        0x9080B0A0D0C0F0E0100030205040706 => {
-                            let v140 = C::unpack_value_array_2(ctx, v138);
-                            let v145 = C::put_in_reg(ctx, v140.0);
-                            let v219 = constructor_rev64(ctx, v145, &VectorSize::Size16x8);
-                            let v220 = constructor_output_reg(ctx, v219);
-                            // Rule at src/isa/aarch64/lower.isle line 230.
-                            return Some(v220);
-                        }
-                        0xB0A09080F0E0D0C0302010007060504 => {
-                            let v140 = C::unpack_value_array_2(ctx, v138);
-                            let v145 = C::put_in_reg(ctx, v140.0);
-                            let v221 = constructor_rev64(ctx, v145, &VectorSize::Size32x4);
-                            let v222 = constructor_output_reg(ctx, v221);
-                            // Rule at src/isa/aarch64/lower.isle line 232.
-                            return Some(v222);
-                        }
-                        0xC0D0E0F08090A0B0405060700010203 => {
-                            let v140 = C::unpack_value_array_2(ctx, v138);
-                            let v145 = C::put_in_reg(ctx, v140.0);
-                            let v213 = constructor_rev32(ctx, v145, &VectorSize::Size8x16);
-                            let v214 = constructor_output_reg(ctx, v213);
-                            // Rule at src/isa/aarch64/lower.isle line 224.
-                            return Some(v214);
-                        }
-                        0xD0C0F0E09080B0A0504070601000302 => {
-                            let v140 = C::unpack_value_array_2(ctx, v138);
-                            let v145 = C::put_in_reg(ctx, v140.0);
-                            let v215 = constructor_rev32(ctx, v145, &VectorSize::Size16x8);
-                            let v216 = constructor_output_reg(ctx, v215);
-                            // Rule at src/isa/aarch64/lower.isle line 226.
-                            return Some(v216);
-                        }
-                        0xE0F0C0D0A0B08090607040502030001 => {
-                            let v140 = C::unpack_value_array_2(ctx, v138);
-                            let v145 = C::put_in_reg(ctx, v140.0);
-                            let v211 = constructor_rev16(ctx, v145, &VectorSize::Size8x16);
-                            let v212 = constructor_output_reg(ctx, v211);
-                            // Rule at src/isa/aarch64/lower.isle line 222.
-                            return Some(v212);
-                        }
-                        0x17071606150514041303120211011000 => {
-                            let v140 = C::unpack_value_array_2(ctx, v138);
-                            let v145 = C::put_in_reg(ctx, v140.0);
-                            let v166 = C::put_in_reg(ctx, v140.1);
-                            let v187 = constructor_vec_zip1(ctx, v145, v166, &VectorSize::Size8x16);
-                            let v188 = constructor_output_reg(ctx, v187);
-                            // Rule at src/isa/aarch64/lower.isle line 184.
-                            return Some(v188);
-                        }
-                        0x17160706151405041312030211100100 => {
-                            let v140 = C::unpack_value_array_2(ctx, v138);
-                            let v145 = C::put_in_reg(ctx, v140.0);
-                            let v166 = C::put_in_reg(ctx, v140.1);
-                            let v191 = constructor_vec_zip1(ctx, v145, v166, &VectorSize::Size16x8);
-                            let v192 = constructor_output_reg(ctx, v191);
-                            // Rule at src/isa/aarch64/lower.isle line 188.
-                            return Some(v192);
-                        }
-                        0x17161514070605041312111003020100 => {
-                            let v140 = C::unpack_value_array_2(ctx, v138);
-                            let v145 = C::put_in_reg(ctx, v140.0);
-                            let v166 = C::put_in_reg(ctx, v140.1);
-                            let v195 = constructor_vec_zip1(ctx, v145, v166, &VectorSize::Size32x4);
-                            let v196 = constructor_output_reg(ctx, v195);
-                            // Rule at src/isa/aarch64/lower.isle line 192.
-                            return Some(v196);
-                        }
-                        0x17161514131211100706050403020100 => {
-                            let v140 = C::unpack_value_array_2(ctx, v138);
-                            let v145 = C::put_in_reg(ctx, v140.0);
-                            let v166 = C::put_in_reg(ctx, v140.1);
-                            let v183 = constructor_vec_uzp1(ctx, v145, v166, &VectorSize::Size64x2);
-                            let v184 = constructor_output_reg(ctx, v183);
-                            // Rule at src/isa/aarch64/lower.isle line 177.
-                            return Some(v184);
-                        }
-                        0x1B1A19180B0A09081312111003020100 => {
-                            let v140 = C::unpack_value_array_2(ctx, v138);
-                            let v145 = C::put_in_reg(ctx, v140.0);
-                            let v166 = C::put_in_reg(ctx, v140.1);
-                            let v207 = constructor_vec_trn1(ctx, v145, v166, &VectorSize::Size32x4);
-                            let v208 = constructor_output_reg(ctx, v207);
-                            // Rule at src/isa/aarch64/lower.isle line 210.
-                            return Some(v208);
-                        }
-                        0x1B1A1918131211100B0A090803020100 => {
-                            let v140 = C::unpack_value_array_2(ctx, v138);
-                            let v145 = C::put_in_reg(ctx, v140.0);
-                            let v166 = C::put_in_reg(ctx, v140.1);
-                            let v179 = constructor_vec_uzp1(ctx, v145, v166, &VectorSize::Size32x4);
-                            let v180 = constructor_output_reg(ctx, v179);
-                            // Rule at src/isa/aarch64/lower.isle line 173.
-                            return Some(v180);
-                        }
-                        0x1D1C0D0C191809081514050411100100 => {
-                            let v140 = C::unpack_value_array_2(ctx, v138);
-                            let v145 = C::put_in_reg(ctx, v140.0);
-                            let v166 = C::put_in_reg(ctx, v140.1);
-                            let v203 = constructor_vec_trn1(ctx, v145, v166, &VectorSize::Size16x8);
-                            let v204 = constructor_output_reg(ctx, v203);
-                            // Rule at src/isa/aarch64/lower.isle line 206.
-                            return Some(v204);
-                        }
-                        0x1D1C1918151411100D0C090805040100 => {
-                            let v140 = C::unpack_value_array_2(ctx, v138);
-                            let v145 = C::put_in_reg(ctx, v140.0);
-                            let v166 = C::put_in_reg(ctx, v140.1);
-                            let v175 = constructor_vec_uzp1(ctx, v145, v166, &VectorSize::Size16x8);
-                            let v176 = constructor_output_reg(ctx, v175);
-                            // Rule at src/isa/aarch64/lower.isle line 169.
-                            return Some(v176);
-                        }
-                        0x1E0E1C0C1A0A18081606140412021000 => {
-                            let v140 = C::unpack_value_array_2(ctx, v138);
-                            let v145 = C::put_in_reg(ctx, v140.0);
-                            let v166 = C::put_in_reg(ctx, v140.1);
-                            let v199 = constructor_vec_trn1(ctx, v145, v166, &VectorSize::Size8x16);
-                            let v200 = constructor_output_reg(ctx, v199);
-                            // Rule at src/isa/aarch64/lower.isle line 202.
-                            return Some(v200);
-                        }
-                        0x1E1C1A18161412100E0C0A0806040200 => {
-                            let v140 = C::unpack_value_array_2(ctx, v138);
-                            let v145 = C::put_in_reg(ctx, v140.0);
-                            let v166 = C::put_in_reg(ctx, v140.1);
-                            let v171 = constructor_vec_uzp1(ctx, v145, v166, &VectorSize::Size8x16);
-                            let v172 = constructor_output_reg(ctx, v171);
-                            // Rule at src/isa/aarch64/lower.isle line 165.
-                            return Some(v172);
-                        }
-                        0x1F0F1D0D1B0B19091707150513031101 => {
-                            let v140 = C::unpack_value_array_2(ctx, v138);
-                            let v145 = C::put_in_reg(ctx, v140.0);
-                            let v166 = C::put_in_reg(ctx, v140.1);
-                            let v201 = constructor_vec_trn2(ctx, v145, v166, &VectorSize::Size8x16);
-                            let v202 = constructor_output_reg(ctx, v201);
-                            // Rule at src/isa/aarch64/lower.isle line 204.
-                            return Some(v202);
-                        }
-                        0x1F0F1E0E1D0D1C0C1B0B1A0A19091808 => {
-                            let v140 = C::unpack_value_array_2(ctx, v138);
-                            let v145 = C::put_in_reg(ctx, v140.0);
-                            let v166 = C::put_in_reg(ctx, v140.1);
-                            let v189 = constructor_vec_zip2(ctx, v145, v166, &VectorSize::Size8x16);
-                            let v190 = constructor_output_reg(ctx, v189);
-                            // Rule at src/isa/aarch64/lower.isle line 186.
-                            return Some(v190);
-                        }
-                        0x1F1D1B19171513110F0D0B0907050301 => {
-                            let v140 = C::unpack_value_array_2(ctx, v138);
-                            let v145 = C::put_in_reg(ctx, v140.0);
-                            let v166 = C::put_in_reg(ctx, v140.1);
-                            let v173 = constructor_vec_uzp2(ctx, v145, v166, &VectorSize::Size8x16);
-                            let v174 = constructor_output_reg(ctx, v173);
-                            // Rule at src/isa/aarch64/lower.isle line 167.
-                            return Some(v174);
-                        }
-                        0x1F1E0F0E1B1A0B0A1716070613120302 => {
-                            let v140 = C::unpack_value_array_2(ctx, v138);
-                            let v145 = C::put_in_reg(ctx, v140.0);
-                            let v166 = C::put_in_reg(ctx, v140.1);
-                            let v205 = constructor_vec_trn2(ctx, v145, v166, &VectorSize::Size16x8);
-                            let v206 = constructor_output_reg(ctx, v205);
-                            // Rule at src/isa/aarch64/lower.isle line 208.
-                            return Some(v206);
-                        }
-                        0x1F1E0F0E1D1C0D0C1B1A0B0A19180908 => {
-                            let v140 = C::unpack_value_array_2(ctx, v138);
-                            let v145 = C::put_in_reg(ctx, v140.0);
-                            let v166 = C::put_in_reg(ctx, v140.1);
-                            let v193 = constructor_vec_zip2(ctx, v145, v166, &VectorSize::Size16x8);
-                            let v194 = constructor_output_reg(ctx, v193);
-                            // Rule at src/isa/aarch64/lower.isle line 190.
-                            return Some(v194);
-                        }
-                        0x1F1E1B1A171613120F0E0B0A07060302 => {
-                            let v140 = C::unpack_value_array_2(ctx, v138);
-                            let v145 = C::put_in_reg(ctx, v140.0);
-                            let v166 = C::put_in_reg(ctx, v140.1);
-                            let v177 = constructor_vec_uzp2(ctx, v145, v166, &VectorSize::Size16x8);
-                            let v178 = constructor_output_reg(ctx, v177);
-                            // Rule at src/isa/aarch64/lower.isle line 171.
-                            return Some(v178);
-                        }
-                        0x1F1E1D1C0F0E0D0C1716151407060504 => {
-                            let v140 = C::unpack_value_array_2(ctx, v138);
-                            let v145 = C::put_in_reg(ctx, v140.0);
-                            let v166 = C::put_in_reg(ctx, v140.1);
-                            let v209 = constructor_vec_trn2(ctx, v145, v166, &VectorSize::Size32x4);
-                            let v210 = constructor_output_reg(ctx, v209);
-                            // Rule at src/isa/aarch64/lower.isle line 212.
-                            return Some(v210);
-                        }
-                        0x1F1E1D1C0F0E0D0C1B1A19180B0A0908 => {
-                            let v140 = C::unpack_value_array_2(ctx, v138);
-                            let v145 = C::put_in_reg(ctx, v140.0);
-                            let v166 = C::put_in_reg(ctx, v140.1);
-                            let v197 = constructor_vec_zip2(ctx, v145, v166, &VectorSize::Size32x4);
-                            let v198 = constructor_output_reg(ctx, v197);
-                            // Rule at src/isa/aarch64/lower.isle line 194.
-                            return Some(v198);
-                        }
-                        0x1F1E1D1C171615140F0E0D0C07060504 => {
-                            let v140 = C::unpack_value_array_2(ctx, v138);
-                            let v145 = C::put_in_reg(ctx, v140.0);
-                            let v166 = C::put_in_reg(ctx, v140.1);
-                            let v181 = constructor_vec_uzp2(ctx, v145, v166, &VectorSize::Size32x4);
-                            let v182 = constructor_output_reg(ctx, v181);
-                            // Rule at src/isa/aarch64/lower.isle line 175.
-                            return Some(v182);
-                        }
-                        0x1F1E1D1C1B1A19180F0E0D0C0B0A0908 => {
-                            let v140 = C::unpack_value_array_2(ctx, v138);
-                            let v145 = C::put_in_reg(ctx, v140.0);
-                            let v166 = C::put_in_reg(ctx, v140.1);
-                            let v185 = constructor_vec_uzp2(ctx, v145, v166, &VectorSize::Size64x2);
-                            let v186 = constructor_output_reg(ctx, v185);
-                            // Rule at src/isa/aarch64/lower.isle line 179.
-                            return Some(v186);
-                        }
-                        _ => {}
-                    }
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v223 = constructor_constant_f128(ctx, v170);
-                        let v140 = C::unpack_value_array_2(ctx, v138);
-                        let v224 = C::put_in_reg(ctx, v140.0);
-                        let v225 = C::put_in_reg(ctx, v140.1);
-                        let v3 = C::value_type(ctx, v2);
-                        let v226 = constructor_vec_tbl2(ctx, v224, v225, v223, v3);
-                        let v227 = constructor_output_reg(ctx, v226);
-                        // Rule at src/isa/aarch64/lower.isle line 235.
-                        return Some(v227);
-                    }
-                }
-            }
-        }
-        &InstructionData::StackLoad {
-            opcode: ref v1671,
-            stack_slot: v1672,
-            offset: v1673,
-        } => {
-            if let &Opcode::StackAddr = v1671 {
-                let v1674 = constructor_compute_stack_addr(ctx, v1672, v1673);
-                let v1675 = constructor_output_reg(ctx, v1674);
-                // Rule at src/isa/aarch64/lower.isle line 2509.
-                return Some(v1675);
-            }
-        }
-        &InstructionData::Store {
-            opcode: ref v1569,
-            args: ref v1570,
-            flags: v1571,
-            offset: v1572,
-        } => {
-            match v1569 {
-                &Opcode::Store => {
-                    let v1573 = C::unpack_value_array_2(ctx, v1570);
-                    let v1576 = C::value_type(ctx, v1573.0);
-                    match v1576 {
-                        I8 => {
-                            let v1577 = C::offset32_to_u32(ctx, v1572);
-                            let v1578 = &C::amode(ctx, I8, v1573.1, v1577);
-                            let v1579 = C::put_in_reg(ctx, v1573.0);
-                            let v1580 = &constructor_aarch64_store8(ctx, v1578, v1571, v1579);
-                            let v1581 = constructor_side_effect(ctx, v1580);
-                            // Rule at src/isa/aarch64/lower.isle line 2380.
-                            return Some(v1581);
-                        }
-                        I16 => {
-                            let v1577 = C::offset32_to_u32(ctx, v1572);
-                            let v1582 = &C::amode(ctx, I16, v1573.1, v1577);
-                            let v1579 = C::put_in_reg(ctx, v1573.0);
-                            let v1583 = &constructor_aarch64_store16(ctx, v1582, v1571, v1579);
-                            let v1584 = constructor_side_effect(ctx, v1583);
-                            // Rule at src/isa/aarch64/lower.isle line 2384.
-                            return Some(v1584);
-                        }
-                        I32 => {
-                            let v1577 = C::offset32_to_u32(ctx, v1572);
-                            let v1585 = &C::amode(ctx, I32, v1573.1, v1577);
-                            let v1579 = C::put_in_reg(ctx, v1573.0);
-                            let v1586 = &constructor_aarch64_store32(ctx, v1585, v1571, v1579);
-                            let v1587 = constructor_side_effect(ctx, v1586);
-                            // Rule at src/isa/aarch64/lower.isle line 2388.
-                            return Some(v1587);
-                        }
-                        I64 => {
-                            let v1577 = C::offset32_to_u32(ctx, v1572);
-                            let v1588 = &C::amode(ctx, I64, v1573.1, v1577);
-                            let v1579 = C::put_in_reg(ctx, v1573.0);
-                            let v1589 = &constructor_aarch64_store64(ctx, v1588, v1571, v1579);
-                            let v1590 = constructor_side_effect(ctx, v1589);
-                            // Rule at src/isa/aarch64/lower.isle line 2392.
-                            return Some(v1590);
-                        }
-                        I128 => {
-                            let v1577 = C::offset32_to_u32(ctx, v1572);
-                            let v1597 = &C::pair_amode(ctx, v1573.1, v1577);
-                            let v1598 = C::put_in_regs(ctx, v1573.0);
-                            let v1599 = C::value_regs_get(ctx, v1598, 0x0);
-                            let v1600 = C::put_in_regs(ctx, v1573.0);
-                            let v1601 = C::value_regs_get(ctx, v1600, 0x1);
-                            let v1602 =
-                                &constructor_aarch64_storep64(ctx, v1597, v1571, v1599, v1601);
-                            let v1603 = constructor_side_effect(ctx, v1602);
-                            // Rule at src/isa/aarch64/lower.isle line 2423.
-                            return Some(v1603);
-                        }
-                        R64 => {
-                            let v1577 = C::offset32_to_u32(ctx, v1572);
-                            let v1588 = &C::amode(ctx, I64, v1573.1, v1577);
-                            let v1579 = C::put_in_reg(ctx, v1573.0);
-                            let v1589 = &constructor_aarch64_store64(ctx, v1588, v1571, v1579);
-                            let v1590 = constructor_side_effect(ctx, v1589);
-                            // Rule at src/isa/aarch64/lower.isle line 2396.
-                            return Some(v1590);
-                        }
-                        F32 => {
-                            let v1577 = C::offset32_to_u32(ctx, v1572);
-                            let v1591 = &C::amode(ctx, F32, v1573.1, v1577);
-                            let v1579 = C::put_in_reg(ctx, v1573.0);
-                            let v1592 = &constructor_aarch64_fpustore32(ctx, v1591, v1571, v1579);
-                            let v1593 = constructor_side_effect(ctx, v1592);
-                            // Rule at src/isa/aarch64/lower.isle line 2414.
-                            return Some(v1593);
-                        }
-                        F64 => {
-                            let v1577 = C::offset32_to_u32(ctx, v1572);
-                            let v1594 = &C::amode(ctx, F64, v1573.1, v1577);
-                            let v1579 = C::put_in_reg(ctx, v1573.0);
-                            let v1595 = &constructor_aarch64_fpustore64(ctx, v1594, v1571, v1579);
-                            let v1596 = constructor_side_effect(ctx, v1595);
-                            // Rule at src/isa/aarch64/lower.isle line 2418.
-                            return Some(v1596);
-                        }
-                        _ => {}
-                    }
-                    let v1604 = C::ty_vec64(ctx, v1576);
-                    if let Some(v1605) = v1604 {
-                        let v1577 = C::offset32_to_u32(ctx, v1572);
-                        let v1594 = &C::amode(ctx, F64, v1573.1, v1577);
-                        let v1579 = C::put_in_reg(ctx, v1573.0);
-                        let v1595 = &constructor_aarch64_fpustore64(ctx, v1594, v1571, v1579);
-                        let v1596 = constructor_side_effect(ctx, v1595);
-                        // Rule at src/isa/aarch64/lower.isle line 2430.
-                        return Some(v1596);
-                    }
-                    let v1611 = C::ty_dyn_vec64(ctx, v1576);
-                    if let Some(v1612) = v1611 {
-                        let v1577 = C::offset32_to_u32(ctx, v1572);
-                        let v1594 = &C::amode(ctx, F64, v1573.1, v1577);
-                        let v1579 = C::put_in_reg(ctx, v1573.0);
-                        let v1595 = &constructor_aarch64_fpustore64(ctx, v1594, v1571, v1579);
-                        let v1596 = constructor_side_effect(ctx, v1595);
-                        // Rule at src/isa/aarch64/lower.isle line 2438.
-                        return Some(v1596);
-                    }
-                    let v1606 = C::ty_vec128(ctx, v1576);
-                    if let Some(v1607) = v1606 {
-                        let v1577 = C::offset32_to_u32(ctx, v1572);
-                        let v1608 = &C::amode(ctx, I8X16, v1573.1, v1577);
-                        let v1579 = C::put_in_reg(ctx, v1573.0);
-                        let v1609 = &constructor_aarch64_fpustore128(ctx, v1608, v1571, v1579);
-                        let v1610 = constructor_side_effect(ctx, v1609);
-                        // Rule at src/isa/aarch64/lower.isle line 2434.
-                        return Some(v1610);
-                    }
-                    let v1613 = C::ty_dyn_vec128(ctx, v1576);
-                    if let Some(v1614) = v1613 {
-                        let v1577 = C::offset32_to_u32(ctx, v1572);
-                        let v1608 = &C::amode(ctx, I8X16, v1573.1, v1577);
-                        let v1579 = C::put_in_reg(ctx, v1573.0);
-                        let v1609 = &constructor_aarch64_fpustore128(ctx, v1608, v1571, v1579);
-                        let v1610 = constructor_side_effect(ctx, v1609);
-                        // Rule at src/isa/aarch64/lower.isle line 2442.
-                        return Some(v1610);
-                    }
-                }
-                &Opcode::Istore8 => {
-                    let v1573 = C::unpack_value_array_2(ctx, v1570);
-                    let v1577 = C::offset32_to_u32(ctx, v1572);
-                    let v1578 = &C::amode(ctx, I8, v1573.1, v1577);
-                    let v1579 = C::put_in_reg(ctx, v1573.0);
-                    let v1580 = &constructor_aarch64_store8(ctx, v1578, v1571, v1579);
-                    let v1581 = constructor_side_effect(ctx, v1580);
-                    // Rule at src/isa/aarch64/lower.isle line 2401.
-                    return Some(v1581);
-                }
-                &Opcode::Istore16 => {
-                    let v1573 = C::unpack_value_array_2(ctx, v1570);
-                    let v1577 = C::offset32_to_u32(ctx, v1572);
-                    let v1582 = &C::amode(ctx, I16, v1573.1, v1577);
-                    let v1579 = C::put_in_reg(ctx, v1573.0);
-                    let v1583 = &constructor_aarch64_store16(ctx, v1582, v1571, v1579);
-                    let v1584 = constructor_side_effect(ctx, v1583);
-                    // Rule at src/isa/aarch64/lower.isle line 2405.
-                    return Some(v1584);
-                }
-                &Opcode::Istore32 => {
-                    let v1573 = C::unpack_value_array_2(ctx, v1570);
-                    let v1577 = C::offset32_to_u32(ctx, v1572);
-                    let v1585 = &C::amode(ctx, I32, v1573.1, v1577);
-                    let v1579 = C::put_in_reg(ctx, v1573.0);
-                    let v1586 = &constructor_aarch64_store32(ctx, v1585, v1571, v1579);
-                    let v1587 = constructor_side_effect(ctx, v1586);
-                    // Rule at src/isa/aarch64/lower.isle line 2409.
-                    return Some(v1587);
-                }
-                _ => {}
-            }
-        }
-        &InstructionData::StoreNoOffset {
-            opcode: ref v1299,
-            args: ref v1300,
-            flags: v1301,
-        } => {
-            if let &Opcode::AtomicStore = v1299 {
-                let v1302 = C::unpack_value_array_2(ctx, v1300);
-                let v1305 = C::value_type(ctx, v1302.0);
-                let v1306 = C::valid_atomic_transaction(ctx, v1305);
-                if let Some(v1307) = v1306 {
-                    let v1308 = C::put_in_reg(ctx, v1302.0);
-                    let v1309 = C::put_in_reg(ctx, v1302.1);
-                    let v1310 = &constructor_store_release(ctx, v1307, v1301, v1308, v1309);
-                    let v1311 = constructor_side_effect(ctx, v1310);
-                    // Rule at src/isa/aarch64/lower.isle line 2045.
-                    return Some(v1311);
-                }
-            }
-        }
-        &InstructionData::Ternary {
-            opcode: ref v462,
-            args: ref v463,
-        } => {
-            match v462 {
-                &Opcode::Select => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v464 = C::unpack_value_array_3(ctx, v463);
-                        let v1176 = C::maybe_uextend(ctx, v464.0);
-                        if let Some(v1177) = v1176 {
-                            let v1178 = C::def_inst(ctx, v1177);
-                            if let Some(v1179) = v1178 {
-                                let v1180 = &C::inst_data(ctx, v1179);
-                                match v1180 {
-                                    &InstructionData::FloatCompare {
-                                        opcode: ref v1194,
-                                        args: ref v1195,
-                                        cond: ref v1196,
-                                    } => {
-                                        if let &Opcode::Fcmp = v1194 {
-                                            let v1201 = &C::fp_cond_code(ctx, v1196);
-                                            let v1197 = C::unpack_value_array_2(ctx, v1195);
-                                            let v1200 = C::value_type(ctx, v1197.0);
-                                            let v1202 = &constructor_scalar_size(ctx, v1200);
-                                            let v1203 = C::put_in_reg(ctx, v1197.0);
-                                            let v1204 = C::put_in_reg(ctx, v1197.1);
-                                            let v1205 =
-                                                &constructor_fpu_cmp(ctx, v1202, v1203, v1204);
-                                            let v3 = C::value_type(ctx, v2);
-                                            let v1206 = constructor_lower_select(
-                                                ctx, v1205, v1201, v3, v464.1, v464.2,
-                                            );
-                                            let v1207 = C::output(ctx, v1206);
-                                            // Rule at src/isa/aarch64/lower.isle line 1937.
-                                            return Some(v1207);
-                                        }
-                                    }
-                                    &InstructionData::IntCompare {
-                                        opcode: ref v1181,
-                                        args: ref v1182,
-                                        cond: ref v1183,
-                                    } => {
-                                        if let &Opcode::Icmp = v1181 {
-                                            let v1184 = C::unpack_value_array_2(ctx, v1182);
-                                            let v1187 = C::value_type(ctx, v1184.0);
-                                            let v1188 = &constructor_lower_icmp_into_flags(
-                                                ctx, v1183, v1184.0, v1184.1, v1187,
-                                            );
-                                            let v1189 = &constructor_flags_and_cc_flags(ctx, v1188);
-                                            let v1190 = &constructor_flags_and_cc_cc(ctx, v1188);
-                                            let v1191 = &C::cond_code(ctx, v1190);
-                                            let v3 = C::value_type(ctx, v2);
-                                            let v1192 = constructor_lower_select(
-                                                ctx, v1189, v1191, v3, v464.1, v464.2,
-                                            );
-                                            let v1193 = C::output(ctx, v1192);
-                                            // Rule at src/isa/aarch64/lower.isle line 1924.
-                                            return Some(v1193);
-                                        }
-                                    }
-                                    _ => {}
-                                }
-                            }
-                        }
-                        let v1208 = C::value_type(ctx, v464.0);
-                        if v1208 == I8 {
-                            let v1085 = C::put_in_reg(ctx, v464.0);
-                            let v1210 = C::u64_into_imm_logic(ctx, I32, 0xFF);
-                            let v1211 = &constructor_tst_imm(ctx, I32, v1085, v1210);
-                            let v3 = C::value_type(ctx, v2);
-                            let v1212 =
-                                constructor_lower_select(ctx, v1211, &Cond::Ne, v3, v464.1, v464.2);
-                            let v1213 = C::output(ctx, v1212);
-                            // Rule at src/isa/aarch64/lower.isle line 1946.
-                            return Some(v1213);
-                        }
-                        let v1214 = C::fits_in_32(ctx, v1208);
-                        if let Some(v1215) = v1214 {
-                            let v1216 = constructor_put_in_reg_zext32(ctx, v464.0);
-                            let v1217 = C::zero_reg(ctx);
-                            let v1218 = &constructor_cmp(ctx, &OperandSize::Size32, v1216, v1217);
-                            let v3 = C::value_type(ctx, v2);
-                            let v1219 =
-                                constructor_lower_select(ctx, v1218, &Cond::Ne, v3, v464.1, v464.2);
-                            let v1220 = C::output(ctx, v1219);
-                            // Rule at src/isa/aarch64/lower.isle line 1952.
-                            return Some(v1220);
-                        }
-                        let v1221 = C::fits_in_64(ctx, v1208);
-                        if let Some(v1222) = v1221 {
-                            let v1223 = constructor_put_in_reg_zext64(ctx, v464.0);
-                            let v1217 = C::zero_reg(ctx);
-                            let v1224 = &constructor_cmp(ctx, &OperandSize::Size64, v1223, v1217);
-                            let v3 = C::value_type(ctx, v2);
-                            let v1225 =
-                                constructor_lower_select(ctx, v1224, &Cond::Ne, v3, v464.1, v464.2);
-                            let v1226 = C::output(ctx, v1225);
-                            // Rule at src/isa/aarch64/lower.isle line 1958.
-                            return Some(v1226);
-                        }
-                        if v1208 == I128 {
-                            let v1227 = C::put_in_regs(ctx, v464.0);
-                            let v1228 = C::value_regs_get(ctx, v1227, 0x0);
-                            let v1229 = C::value_regs_get(ctx, v1227, 0x1);
-                            let v1230 = constructor_orr(ctx, I64, v1228, v1229);
-                            let v888 = C::zero_reg(ctx);
-                            let v1231 = &constructor_cmp(ctx, &OperandSize::Size64, v1230, v888);
-                            let v3 = C::value_type(ctx, v2);
-                            let v1232 =
-                                constructor_lower_select(ctx, v1231, &Cond::Ne, v3, v464.1, v464.2);
-                            let v1233 = C::output(ctx, v1232);
-                            // Rule at src/isa/aarch64/lower.isle line 1964.
-                            return Some(v1233);
-                        }
-                    }
-                }
-                &Opcode::SelectSpectreGuard => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v464 = C::unpack_value_array_3(ctx, v463);
-                        let v1176 = C::maybe_uextend(ctx, v464.0);
-                        if let Some(v1177) = v1176 {
-                            let v1178 = C::def_inst(ctx, v1177);
-                            if let Some(v1179) = v1178 {
-                                let v1180 = &C::inst_data(ctx, v1179);
-                                if let &InstructionData::IntCompare {
-                                    opcode: ref v1181,
-                                    args: ref v1182,
-                                    cond: ref v1183,
-                                } = v1180
-                                {
-                                    if let &Opcode::Icmp = v1181 {
-                                        let v1184 = C::unpack_value_array_2(ctx, v1182);
-                                        let v1187 = C::value_type(ctx, v1184.0);
-                                        let v1188 = &constructor_lower_icmp_into_flags(
-                                            ctx, v1183, v1184.0, v1184.1, v1187,
-                                        );
-                                        let v1189 = &constructor_flags_and_cc_flags(ctx, v1188);
-                                        let v1190 = &constructor_flags_and_cc_cc(ctx, v1188);
-                                        let v1191 = &C::cond_code(ctx, v1190);
-                                        let v3 = C::value_type(ctx, v2);
-                                        let v1192 = constructor_lower_select(
-                                            ctx, v1189, v1191, v3, v464.1, v464.2,
-                                        );
-                                        let v1234 = &constructor_csdb(ctx);
-                                        let v1235 = constructor_side_effect(ctx, v1234);
-                                        let v1236 = C::output(ctx, v1192);
-                                        // Rule at src/isa/aarch64/lower.isle line 1975.
-                                        return Some(v1236);
-                                    }
-                                }
-                            }
-                        }
-                        let v1208 = C::value_type(ctx, v464.0);
-                        let v1221 = C::fits_in_64(ctx, v1208);
-                        if let Some(v1222) = v1221 {
-                            let v1223 = constructor_put_in_reg_zext64(ctx, v464.0);
-                            let v1217 = C::zero_reg(ctx);
-                            let v1224 = &constructor_cmp(ctx, &OperandSize::Size64, v1223, v1217);
-                            let v3 = C::value_type(ctx, v2);
-                            let v1225 =
-                                constructor_lower_select(ctx, v1224, &Cond::Ne, v3, v464.1, v464.2);
-                            let v1226 = C::output(ctx, v1225);
-                            // Rule at src/isa/aarch64/lower.isle line 1989.
-                            return Some(v1226);
-                        }
-                        if v1208 == I128 {
-                            let v1227 = C::put_in_regs(ctx, v464.0);
-                            let v1228 = C::value_regs_get(ctx, v1227, 0x0);
-                            let v1229 = C::value_regs_get(ctx, v1227, 0x1);
-                            let v1230 = constructor_orr(ctx, I64, v1228, v1229);
-                            let v888 = C::zero_reg(ctx);
-                            let v1231 = &constructor_cmp(ctx, &OperandSize::Size64, v1230, v888);
-                            let v3 = C::value_type(ctx, v2);
-                            let v1232 =
-                                constructor_lower_select(ctx, v1231, &Cond::Ne, v3, v464.1, v464.2);
-                            let v1233 = C::output(ctx, v1232);
-                            // Rule at src/isa/aarch64/lower.isle line 1995.
-                            return Some(v1233);
-                        }
-                    }
-                }
-                &Opcode::Bitselect => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v575 = C::ty_vec128(ctx, v3);
-                        if let Some(v576) = v575 {
-                            let v464 = C::unpack_value_array_3(ctx, v463);
-                            let v1085 = C::put_in_reg(ctx, v464.0);
-                            let v1086 = C::put_in_reg(ctx, v464.1);
-                            let v1087 = C::put_in_reg(ctx, v464.2);
-                            let v1088 = constructor_bsl(ctx, v576, v1085, v1086, v1087);
-                            let v1089 = constructor_output_reg(ctx, v1088);
-                            // Rule at src/isa/aarch64/lower.isle line 1836.
-                            return Some(v1089);
-                        }
-                        let v1077 = C::ty_int_ref_scalar_64(ctx, v3);
-                        if let Some(v1078) = v1077 {
-                            let v464 = C::unpack_value_array_3(ctx, v463);
-                            let v1079 = C::put_in_reg(ctx, v464.1);
-                            let v469 = C::put_in_reg(ctx, v464.0);
-                            let v1080 = constructor_and_reg(ctx, v3, v1079, v469);
-                            let v471 = C::put_in_reg(ctx, v464.2);
-                            let v1081 = C::put_in_reg(ctx, v464.0);
-                            let v1082 = constructor_bic(ctx, v3, v471, v1081);
-                            let v1083 = constructor_orr(ctx, v3, v1080, v1082);
-                            let v1084 = constructor_output_reg(ctx, v1083);
-                            // Rule at src/isa/aarch64/lower.isle line 1830.
-                            return Some(v1084);
-                        }
-                    }
-                }
-                &Opcode::Fma => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v117 = C::multi_lane(ctx, v3);
-                        if let Some(v118) = v117 {
-                            let v475 = &constructor_vector_size(ctx, v3);
-                            let v464 = C::unpack_value_array_3(ctx, v463);
-                            let v476 = constructor_lower_fmla(
-                                ctx,
-                                &VecALUModOp::Fmla,
-                                v464.0,
-                                v464.1,
-                                v464.2,
-                                v475,
-                            );
-                            let v477 = constructor_output_reg(ctx, v476);
-                            // Rule at src/isa/aarch64/lower.isle line 520.
-                            return Some(v477);
-                        }
-                        let v348 = C::ty_scalar_float(ctx, v3);
-                        if let Some(v349) = v348 {
-                            let v389 = &constructor_scalar_size(ctx, v349);
-                            let v464 = C::unpack_value_array_3(ctx, v463);
-                            let v469 = C::put_in_reg(ctx, v464.0);
-                            let v470 = C::put_in_reg(ctx, v464.1);
-                            let v471 = C::put_in_reg(ctx, v464.2);
-                            let v472 =
-                                constructor_fpu_rrrr(ctx, &FPUOp3::MAdd, v389, v469, v470, v471);
-                            let v473 = constructor_output_reg(ctx, v472);
-                            // Rule at src/isa/aarch64/lower.isle line 516.
-                            return Some(v473);
-                        }
-                    }
-                }
-                _ => {}
-            }
-        }
-        &InstructionData::TernaryImm8 {
-            opcode: ref v1651,
-            args: ref v1652,
-            imm: v1653,
-        } => {
-            if let &Opcode::Insertlane = v1651 {
-                let v1654 = C::unpack_value_array_2(ctx, v1652);
-                let v1658 = C::value_type(ctx, v1654.1);
-                let v1659 = C::ty_int(ctx, v1658);
-                if let Some(v1660) = v1659 {
-                    let v1662 = C::put_in_reg(ctx, v1654.0);
-                    let v1663 = C::put_in_reg(ctx, v1654.1);
-                    let v1657 = C::value_type(ctx, v1654.0);
-                    let v1664 = &constructor_vector_size(ctx, v1657);
-                    let v1661 = C::u8_from_uimm8(ctx, v1653);
-                    let v1665 = constructor_mov_to_vec(ctx, v1662, v1663, v1661, v1664);
-                    let v1666 = constructor_output_reg(ctx, v1665);
-                    // Rule at src/isa/aarch64/lower.isle line 2497.
-                    return Some(v1666);
-                }
-                let v1667 = C::ty_scalar_float(ctx, v1658);
-                if let Some(v1668) = v1667 {
-                    let v1662 = C::put_in_reg(ctx, v1654.0);
-                    let v1663 = C::put_in_reg(ctx, v1654.1);
-                    let v1657 = C::value_type(ctx, v1654.0);
-                    let v1664 = &constructor_vector_size(ctx, v1657);
-                    let v1661 = C::u8_from_uimm8(ctx, v1653);
-                    let v1669 = constructor_mov_vec_elem(ctx, v1662, v1663, v1661, 0x0, v1664);
-                    let v1670 = constructor_output_reg(ctx, v1669);
-                    // Rule at src/isa/aarch64/lower.isle line 2502.
-                    return Some(v1670);
-                }
-            }
-        }
-        &InstructionData::Trap {
-            opcode: ref v1172,
-            code: ref v1173,
-        } => {
-            match v1172 {
-                &Opcode::Trap => {
-                    let v1174 = &constructor_udf(ctx, v1173);
-                    let v1175 = constructor_side_effect(ctx, v1174);
-                    // Rule at src/isa/aarch64/lower.isle line 1914.
-                    return Some(v1175);
-                }
-                &Opcode::ResumableTrap => {
-                    let v1174 = &constructor_udf(ctx, v1173);
-                    let v1175 = constructor_side_effect(ctx, v1174);
-                    // Rule at src/isa/aarch64/lower.isle line 1919.
-                    return Some(v1175);
-                }
-                _ => {}
-            }
-        }
-        &InstructionData::Unary {
-            opcode: ref v230,
-            arg: v231,
-        } => {
-            match v230 {
-                &Opcode::Splat => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v727 = C::def_inst(ctx, v231);
-                        if let Some(v728) = v727 {
-                            let v729 = &C::inst_data(ctx, v728);
-                            match v729 {
-                                &InstructionData::Load {
-                                    opcode: ref v1283,
-                                    arg: v1284,
-                                    flags: v1285,
-                                    offset: v1286,
-                                } => {
-                                    if let &Opcode::Load = v1283 {
-                                        let v742 = C::is_sinkable_inst(ctx, v231);
-                                        if let Some(v743) = v742 {
-                                            let v3 = C::value_type(ctx, v2);
-                                            let v1287 = C::lane_type(ctx, v3);
-                                            let v1288 =
-                                                constructor_sink_load_into_addr(ctx, v1287, v743);
-                                            let v313 = &constructor_vector_size(ctx, v3);
-                                            let v1289 = constructor_ld1r(ctx, v1288, v313, v1285);
-                                            let v1290 = constructor_output_reg(ctx, v1289);
-                                            // Rule at src/isa/aarch64/lower.isle line 2034.
-                                            return Some(v1290);
-                                        }
-                                    }
-                                }
-                                &InstructionData::Unary {
-                                    opcode: ref v1273,
-                                    arg: v1274,
-                                } => {
-                                    if let &Opcode::Ireduce = v1273 {
-                                        let v1275 = C::def_inst(ctx, v1274);
-                                        if let Some(v1276) = v1275 {
-                                            let v1277 = &C::inst_data(ctx, v1276);
-                                            if let &InstructionData::UnaryImm {
-                                                opcode: ref v1278,
-                                                imm: v1279,
-                                            } = v1277
-                                            {
-                                                if let &Opcode::Iconst = v1278 {
-                                                    let v3 = C::value_type(ctx, v2);
-                                                    let v475 = &constructor_vector_size(ctx, v3);
-                                                    let v1280 = C::u64_from_imm64(ctx, v1279);
-                                                    let v1281 =
-                                                        constructor_splat_const(ctx, v1280, v475);
-                                                    let v1282 = constructor_output_reg(ctx, v1281);
-                                                    // Rule at src/isa/aarch64/lower.isle line 2031.
-                                                    return Some(v1282);
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                                &InstructionData::UnaryIeee32 {
-                                    opcode: ref v1257,
-                                    imm: v1258,
-                                } => {
-                                    if let &Opcode::F32const = v1257 {
-                                        let v3 = C::value_type(ctx, v2);
-                                        let v475 = &constructor_vector_size(ctx, v3);
-                                        let v1259 = C::u32_from_ieee32(ctx, v1258);
-                                        let v1260 = C::u32_as_u64(ctx, v1259);
-                                        let v1261 = constructor_splat_const(ctx, v1260, v475);
-                                        let v1262 = constructor_output_reg(ctx, v1261);
-                                        // Rule at src/isa/aarch64/lower.isle line 2022.
-                                        return Some(v1262);
-                                    }
-                                }
-                                &InstructionData::UnaryIeee64 {
-                                    opcode: ref v1263,
-                                    imm: v1264,
-                                } => {
-                                    if let &Opcode::F64const = v1263 {
-                                        let v3 = C::value_type(ctx, v2);
-                                        let v475 = &constructor_vector_size(ctx, v3);
-                                        let v1265 = C::u64_from_ieee64(ctx, v1264);
-                                        let v1266 = constructor_splat_const(ctx, v1265, v475);
-                                        let v1267 = constructor_output_reg(ctx, v1266);
-                                        // Rule at src/isa/aarch64/lower.isle line 2025.
-                                        return Some(v1267);
-                                    }
-                                }
-                                &InstructionData::UnaryImm {
-                                    opcode: ref v1268,
-                                    imm: v1269,
-                                } => {
-                                    if let &Opcode::Iconst = v1268 {
-                                        let v3 = C::value_type(ctx, v2);
-                                        let v475 = &constructor_vector_size(ctx, v3);
-                                        let v1270 = C::u64_from_imm64(ctx, v1269);
-                                        let v1271 = constructor_splat_const(ctx, v1270, v475);
-                                        let v1272 = constructor_output_reg(ctx, v1271);
-                                        // Rule at src/isa/aarch64/lower.isle line 2028.
-                                        return Some(v1272);
-                                    }
-                                }
-                                _ => {}
-                            }
-                        }
-                        let v232 = C::value_type(ctx, v231);
-                        let v1249 = C::ty_int_ref_scalar_64(ctx, v232);
-                        if let Some(v1250) = v1249 {
-                            let v241 = C::put_in_reg(ctx, v231);
-                            let v3 = C::value_type(ctx, v2);
-                            let v313 = &constructor_vector_size(ctx, v3);
-                            let v1251 = constructor_vec_dup(ctx, v241, v313);
-                            let v1252 = constructor_output_reg(ctx, v1251);
-                            // Rule at src/isa/aarch64/lower.isle line 2015.
-                            return Some(v1252);
-                        }
-                        let v1253 = C::ty_scalar_float(ctx, v232);
-                        if let Some(v1254) = v1253 {
-                            let v241 = C::put_in_reg(ctx, v231);
-                            let v3 = C::value_type(ctx, v2);
-                            let v313 = &constructor_vector_size(ctx, v3);
-                            let v1255 = constructor_vec_dup_from_fpu(ctx, v241, v313, 0x0);
-                            let v1256 = constructor_output_reg(ctx, v1255);
-                            // Rule at src/isa/aarch64/lower.isle line 2019.
-                            return Some(v1256);
-                        }
-                    }
-                }
-                &Opcode::SetPinnedReg => {
-                    let v241 = C::put_in_reg(ctx, v231);
-                    let v1618 = &constructor_write_pinned_reg(ctx, v241);
-                    let v1619 = constructor_side_effect(ctx, v1618);
-                    // Rule at src/isa/aarch64/lower.isle line 2452.
-                    return Some(v1619);
-                }
-                &Opcode::VanyTrue => {
-                    let v241 = C::put_in_reg(ctx, v231);
-                    let v232 = C::value_type(ctx, v231);
-                    let v294 = &constructor_vanytrue(ctx, v241, v232);
-                    let v295 = &constructor_materialize_bool_result(ctx, &Cond::Ne);
-                    let v296 = constructor_with_flags(ctx, v294, v295);
-                    let v297 = C::output(ctx, v296);
-                    // Rule at src/isa/aarch64/lower.isle line 315.
-                    return Some(v297);
-                }
-                &Opcode::VallTrue => {
-                    let v232 = C::value_type(ctx, v231);
-                    let v255 = C::multi_lane(ctx, v232);
-                    if let Some(v256) = v255 {
-                        match v256.0 {
-                            0x20 => {
-                                if v256.1 == 0x2 {
-                                    let v241 = C::put_in_reg(ctx, v231);
-                                    let v267 = constructor_mov_from_vec(
-                                        ctx,
-                                        v241,
-                                        0x0,
-                                        &ScalarSize::Size64,
-                                    );
-                                    let v269 = C::zero_reg(ctx);
-                                    let v271 = &constructor_cmp_rr_shift(
-                                        ctx,
-                                        &OperandSize::Size64,
-                                        v269,
-                                        v267,
-                                        0x20,
-                                    );
-                                    let v273 = C::u8_into_uimm5(ctx, 0x0);
-                                    let v276 = C::nzcv(ctx, false, true, false, false);
-                                    let v278 = &constructor_ccmp_imm(
-                                        ctx,
-                                        &OperandSize::Size32,
-                                        v267,
-                                        v273,
-                                        v276,
-                                        &Cond::Ne,
-                                    );
-                                    let v279 = constructor_with_flags(ctx, v271, v278);
-                                    let v280 = C::output(ctx, v279);
-                                    // Rule at src/isa/aarch64/lower.isle line 289.
-                                    return Some(v280);
-                                }
-                            }
-                            0x40 => {
-                                if v256.1 == 0x2 {
-                                    let v241 = C::put_in_reg(ctx, v231);
-                                    let v259 = constructor_cmeq0(ctx, v241, &VectorSize::Size64x2);
-                                    let v260 =
-                                        constructor_addp(ctx, v259, v259, &VectorSize::Size64x2);
-                                    let v261 =
-                                        &constructor_fpu_cmp(ctx, &ScalarSize::Size64, v260, v260);
-                                    let v263 = &constructor_materialize_bool_result(ctx, &Cond::Eq);
-                                    let v264 = constructor_with_flags(ctx, v261, v263);
-                                    let v265 = C::output(ctx, v264);
-                                    // Rule at src/isa/aarch64/lower.isle line 283.
-                                    return Some(v265);
-                                }
-                            }
-                            _ => {}
-                        }
-                    }
-                    let v281 = C::lane_fits_in_32(ctx, v232);
-                    if let Some(v282) = v281 {
-                        let v283 = C::not_vec32x2(ctx, v282);
-                        if let Some(v284) = v283 {
-                            let v241 = C::put_in_reg(ctx, v231);
-                            let v286 = &constructor_vector_size(ctx, v282);
-                            let v287 = constructor_vec_lanes(ctx, &VecLanesOp::Uminv, v241, v286);
-                            let v288 =
-                                constructor_mov_from_vec(ctx, v287, 0x0, &ScalarSize::Size64);
-                            let v289 = C::u8_into_imm12(ctx, 0x0);
-                            let v290 = &constructor_cmp_imm(ctx, &OperandSize::Size64, v288, v289);
-                            let v291 = &constructor_materialize_bool_result(ctx, &Cond::Ne);
-                            let v292 = constructor_with_flags(ctx, v290, v291);
-                            let v293 = C::output(ctx, v292);
-                            // Rule at src/isa/aarch64/lower.isle line 306.
-                            return Some(v293);
-                        }
-                    }
-                }
-                &Opcode::VhighBits => {
-                    let v232 = C::value_type(ctx, v231);
-                    match v232 {
-                        I8X16 => {
-                            let v241 = C::put_in_reg(ctx, v231);
-                            let v1677 =
-                                constructor_sshr_vec_imm(ctx, v241, 0x7, &VectorSize::Size8x16);
-                            let v1679 =
-                                constructor_constant_f128(ctx, 0x80402010080402018040201008040201);
-                            let v1680 =
-                                constructor_and_vec(ctx, v1677, v1679, &VectorSize::Size8x16);
-                            let v1682 = constructor_vec_extract(ctx, v1680, v1680, 0x8);
-                            let v1683 = constructor_zip1(ctx, v1680, v1682, &VectorSize::Size8x16);
-                            let v1684 = constructor_addv(ctx, v1683, &VectorSize::Size16x8);
-                            let v1685 =
-                                constructor_mov_from_vec(ctx, v1684, 0x0, &ScalarSize::Size16);
-                            let v1686 = constructor_output_reg(ctx, v1685);
-                            // Rule at src/isa/aarch64/lower.isle line 2523.
-                            return Some(v1686);
-                        }
-                        I16X8 => {
-                            let v241 = C::put_in_reg(ctx, v231);
-                            let v1688 =
-                                constructor_sshr_vec_imm(ctx, v241, 0xF, &VectorSize::Size16x8);
-                            let v1690 =
-                                constructor_constant_f128(ctx, 0x800040002000100008000400020001);
-                            let v1691 =
-                                constructor_and_vec(ctx, v1688, v1690, &VectorSize::Size16x8);
-                            let v1692 = constructor_addv(ctx, v1691, &VectorSize::Size16x8);
-                            let v1693 =
-                                constructor_mov_from_vec(ctx, v1692, 0x0, &ScalarSize::Size16);
-                            let v1694 = constructor_output_reg(ctx, v1693);
-                            // Rule at src/isa/aarch64/lower.isle line 2547.
-                            return Some(v1694);
-                        }
-                        I32X4 => {
-                            let v241 = C::put_in_reg(ctx, v231);
-                            let v1696 =
-                                constructor_sshr_vec_imm(ctx, v241, 0x1F, &VectorSize::Size32x4);
-                            let v1698 = constructor_constant_f128(ctx, 0x8000000040000000200000001);
-                            let v1699 =
-                                constructor_and_vec(ctx, v1696, v1698, &VectorSize::Size32x4);
-                            let v1700 = constructor_addv(ctx, v1699, &VectorSize::Size32x4);
-                            let v1701 =
-                                constructor_mov_from_vec(ctx, v1700, 0x0, &ScalarSize::Size32);
-                            let v1702 = constructor_output_reg(ctx, v1701);
-                            // Rule at src/isa/aarch64/lower.isle line 2560.
-                            return Some(v1702);
-                        }
-                        I64X2 => {
-                            let v241 = C::put_in_reg(ctx, v231);
-                            let v1703 =
-                                constructor_mov_from_vec(ctx, v241, 0x1, &ScalarSize::Size64);
-                            let v1704 = C::put_in_reg(ctx, v231);
-                            let v1705 =
-                                constructor_mov_from_vec(ctx, v1704, 0x0, &ScalarSize::Size64);
-                            let v770 = C::imm_shift_from_u8(ctx, 0x3F);
-                            let v1706 = constructor_lsr_imm(ctx, I64, v1703, v770);
-                            let v1021 = C::imm_shift_from_u8(ctx, 0x3F);
-                            let v1707 = constructor_lsr_imm(ctx, I64, v1705, v1021);
-                            let v1708 = C::lshl_from_u64(ctx, I64, 0x1);
-                            let v1709 = v1708?;
-                            let v1710 = constructor_add_shift(ctx, I64, v1707, v1706, v1709);
-                            let v1711 = constructor_output_reg(ctx, v1710);
-                            // Rule at src/isa/aarch64/lower.isle line 2573.
-                            return Some(v1711);
-                        }
-                        _ => {}
-                    }
-                }
-                &Opcode::Ineg => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        if v3 == I128 {
-                            let v590 = constructor_value_regs_zero(ctx);
-                            let v591 = C::put_in_regs(ctx, v231);
-                            let v592 = constructor_sub_i128(ctx, v590, v591);
-                            let v593 = C::output(ctx, v592);
-                            // Rule at src/isa/aarch64/lower.isle line 751.
-                            return Some(v593);
-                        }
-                        let v27 = C::fits_in_64(ctx, v3);
-                        if let Some(v28) = v27 {
-                            let v586 = C::zero_reg(ctx);
-                            let v587 = C::put_in_reg(ctx, v231);
-                            let v588 = constructor_sub(ctx, v28, v586, v587);
-                            let v589 = constructor_output_reg(ctx, v588);
-                            // Rule at src/isa/aarch64/lower.isle line 747.
-                            return Some(v589);
-                        }
-                        let v575 = C::ty_vec128(ctx, v3);
-                        if let Some(v576) = v575 {
-                            let v241 = C::put_in_reg(ctx, v231);
-                            let v594 = &constructor_vector_size(ctx, v576);
-                            let v595 = constructor_neg(ctx, v241, v594);
-                            let v596 = constructor_output_reg(ctx, v595);
-                            // Rule at src/isa/aarch64/lower.isle line 755.
-                            return Some(v596);
-                        }
-                    }
-                }
-                &Opcode::Iabs => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        if v3 == I64 {
-                            let v241 = C::put_in_reg(ctx, v231);
-                            let v316 = constructor_abs(ctx, &OperandSize::Size64, v241);
-                            let v317 = constructor_output_reg(ctx, v316);
-                            // Rule at src/isa/aarch64/lower.isle line 345.
-                            return Some(v317);
-                        }
-                        let v318 = C::fits_in_32(ctx, v3);
-                        if let Some(v319) = v318 {
-                            let v320 = constructor_put_in_reg_sext32(ctx, v231);
-                            let v321 = constructor_abs(ctx, &OperandSize::Size32, v320);
-                            let v322 = constructor_output_reg(ctx, v321);
-                            // Rule at src/isa/aarch64/lower.isle line 348.
-                            return Some(v322);
-                        }
-                        let v117 = C::multi_lane(ctx, v3);
-                        if let Some(v118) = v117 {
-                            let v241 = C::put_in_reg(ctx, v231);
-                            let v313 = &constructor_vector_size(ctx, v3);
-                            let v314 = constructor_vec_abs(ctx, v241, v313);
-                            let v315 = constructor_output_reg(ctx, v314);
-                            // Rule at src/isa/aarch64/lower.isle line 342.
-                            return Some(v315);
-                        }
-                    }
-                }
-                &Opcode::Bnot => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v727 = C::def_inst(ctx, v231);
-                        if let Some(v728) = v727 {
-                            let v729 = &C::inst_data(ctx, v728);
-                            if let &InstructionData::Binary {
-                                opcode: ref v781,
-                                args: ref v782,
-                            } = v729
-                            {
-                                match v781 {
-                                    &Opcode::Bxor => {
-                                        let v3 = C::value_type(ctx, v2);
-                                        if v3 == I128 {
-                                            let v783 = C::unpack_value_array_2(ctx, v782);
-                                            let v808 = constructor_i128_alu_bitop(
-                                                ctx,
-                                                &ALUOp::EorNot,
-                                                I64,
-                                                v783.0,
-                                                v783.1,
-                                            );
-                                            let v809 = C::output(ctx, v808);
-                                            // Rule at src/isa/aarch64/lower.isle line 1223.
-                                            return Some(v809);
-                                        }
-                                        let v27 = C::fits_in_64(ctx, v3);
-                                        if let Some(v28) = v27 {
-                                            let v783 = C::unpack_value_array_2(ctx, v782);
-                                            let v806 = constructor_alu_rs_imm_logic(
-                                                ctx,
-                                                &ALUOp::EorNot,
-                                                v28,
-                                                v783.0,
-                                                v783.1,
-                                            );
-                                            let v807 = constructor_output_reg(ctx, v806);
-                                            // Rule at src/isa/aarch64/lower.isle line 1221.
-                                            return Some(v807);
-                                        }
-                                    }
-                                    &Opcode::Ishl => {
-                                        let v3 = C::value_type(ctx, v2);
-                                        let v27 = C::fits_in_64(ctx, v3);
-                                        if let Some(v28) = v27 {
-                                            let v783 = C::unpack_value_array_2(ctx, v782);
-                                            let v786 = C::def_inst(ctx, v783.1);
-                                            if let Some(v787) = v786 {
-                                                let v788 = &C::inst_data(ctx, v787);
-                                                if let &InstructionData::UnaryImm {
-                                                    opcode: ref v789,
-                                                    imm: v790,
-                                                } = v788
-                                                {
-                                                    if let &Opcode::Iconst = v789 {
-                                                        let v791 =
-                                                            C::lshl_from_imm64(ctx, v28, v790);
-                                                        if let Some(v792) = v791 {
-                                                            let v586 = C::zero_reg(ctx);
-                                                            let v793 = C::put_in_reg(ctx, v783.0);
-                                                            let v794 = constructor_orr_not_shift(
-                                                                ctx, v28, v586, v793, v792,
-                                                            );
-                                                            let v795 =
-                                                                constructor_output_reg(ctx, v794);
-                                                            // Rule at src/isa/aarch64/lower.isle line 1202.
-                                                            return Some(v795);
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                    _ => {}
-                                }
-                            }
-                        }
-                        let v3 = C::value_type(ctx, v2);
-                        if v3 == I128 {
-                            let v233 = C::put_in_regs(ctx, v231);
-                            let v234 = C::value_regs_get(ctx, v233, 0x0);
-                            let v796 = C::value_regs_get(ctx, v233, 0x1);
-                            let v797 = C::zero_reg(ctx);
-                            let v798 = constructor_orr_not(ctx, I64, v797, v234);
-                            let v799 = C::zero_reg(ctx);
-                            let v800 = constructor_orr_not(ctx, I64, v799, v796);
-                            let v801 = C::value_regs(ctx, v798, v800);
-                            let v802 = C::output(ctx, v801);
-                            // Rule at src/isa/aarch64/lower.isle line 1208.
-                            return Some(v802);
-                        }
-                        let v27 = C::fits_in_64(ctx, v3);
-                        if let Some(v28) = v27 {
-                            let v586 = C::zero_reg(ctx);
-                            let v587 = C::put_in_reg(ctx, v231);
-                            let v779 = constructor_orr_not(ctx, v28, v586, v587);
-                            let v780 = constructor_output_reg(ctx, v779);
-                            // Rule at src/isa/aarch64/lower.isle line 1197.
-                            return Some(v780);
-                        }
-                        let v575 = C::ty_vec128(ctx, v3);
-                        if let Some(v576) = v575 {
-                            let v241 = C::put_in_reg(ctx, v231);
-                            let v594 = &constructor_vector_size(ctx, v576);
-                            let v803 = constructor_not(ctx, v241, v594);
-                            let v804 = constructor_output_reg(ctx, v803);
-                            // Rule at src/isa/aarch64/lower.isle line 1217.
-                            return Some(v804);
-                        }
-                    }
-                }
-                &Opcode::Bitrev => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            I8 => {
-                                let v241 = C::put_in_reg(ctx, v231);
-                                let v973 = constructor_rbit(ctx, I32, v241);
-                                let v975 = C::imm_shift_from_u8(ctx, 0x18);
-                                let v976 = constructor_lsr_imm(ctx, I32, v973, v975);
-                                let v977 = constructor_output_reg(ctx, v976);
-                                // Rule at src/isa/aarch64/lower.isle line 1652.
-                                return Some(v977);
-                            }
-                            I16 => {
-                                let v241 = C::put_in_reg(ctx, v231);
-                                let v973 = constructor_rbit(ctx, I32, v241);
-                                let v979 = C::imm_shift_from_u8(ctx, 0x10);
-                                let v980 = constructor_lsr_imm(ctx, I32, v973, v979);
-                                let v981 = constructor_output_reg(ctx, v980);
-                                // Rule at src/isa/aarch64/lower.isle line 1658.
-                                return Some(v981);
-                            }
-                            I128 => {
-                                let v233 = C::put_in_regs(ctx, v231);
-                                let v234 = C::value_regs_get(ctx, v233, 0x0);
-                                let v982 = constructor_rbit(ctx, I64, v234);
-                                let v236 = C::value_regs_get(ctx, v233, 0x1);
-                                let v983 = constructor_rbit(ctx, I64, v236);
-                                let v984 = C::value_regs(ctx, v983, v982);
-                                let v985 = C::output(ctx, v984);
-                                // Rule at src/isa/aarch64/lower.isle line 1661.
-                                return Some(v985);
-                            }
-                            _ => {}
-                        }
-                        let v241 = C::put_in_reg(ctx, v231);
-                        let v986 = constructor_rbit(ctx, v3, v241);
-                        let v987 = constructor_output_reg(ctx, v986);
-                        // Rule at src/isa/aarch64/lower.isle line 1667.
-                        return Some(v987);
-                    }
-                }
-                &Opcode::Clz => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            I8 => {
-                                let v252 = constructor_put_in_reg_zext32(ctx, v231);
-                                let v988 = constructor_a64_clz(ctx, I32, v252);
-                                let v989 = C::u8_into_imm12(ctx, 0x18);
-                                let v990 = constructor_sub_imm(ctx, I32, v988, v989);
-                                let v991 = constructor_output_reg(ctx, v990);
-                                // Rule at src/isa/aarch64/lower.isle line 1673.
-                                return Some(v991);
-                            }
-                            I16 => {
-                                let v252 = constructor_put_in_reg_zext32(ctx, v231);
-                                let v988 = constructor_a64_clz(ctx, I32, v252);
-                                let v992 = C::u8_into_imm12(ctx, 0x10);
-                                let v993 = constructor_sub_imm(ctx, I32, v988, v992);
-                                let v994 = constructor_output_reg(ctx, v993);
-                                // Rule at src/isa/aarch64/lower.isle line 1676.
-                                return Some(v994);
-                            }
-                            I128 => {
-                                let v233 = C::put_in_regs(ctx, v231);
-                                let v995 = constructor_lower_clz128(ctx, v233);
-                                let v996 = C::output(ctx, v995);
-                                // Rule at src/isa/aarch64/lower.isle line 1679.
-                                return Some(v996);
-                            }
-                            _ => {}
-                        }
-                        let v241 = C::put_in_reg(ctx, v231);
-                        let v997 = constructor_a64_clz(ctx, v3, v241);
-                        let v998 = constructor_output_reg(ctx, v997);
-                        // Rule at src/isa/aarch64/lower.isle line 1682.
-                        return Some(v998);
-                    }
-                }
-                &Opcode::Cls => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            I8 => {
-                                let v320 = constructor_put_in_reg_sext32(ctx, v231);
-                                let v1013 = constructor_a64_cls(ctx, I32, v320);
-                                let v989 = C::u8_into_imm12(ctx, 0x18);
-                                let v1014 = constructor_sub_imm(ctx, I32, v1013, v989);
-                                let v1015 = constructor_output_reg(ctx, v1014);
-                                // Rule at src/isa/aarch64/lower.isle line 1720.
-                                return Some(v1015);
-                            }
-                            I16 => {
-                                let v320 = constructor_put_in_reg_sext32(ctx, v231);
-                                let v1013 = constructor_a64_cls(ctx, I32, v320);
-                                let v992 = C::u8_into_imm12(ctx, 0x10);
-                                let v1016 = constructor_sub_imm(ctx, I32, v1013, v992);
-                                let v1017 = constructor_output_reg(ctx, v1016);
-                                // Rule at src/isa/aarch64/lower.isle line 1723.
-                                return Some(v1017);
-                            }
-                            I128 => {
-                                let v233 = C::put_in_regs(ctx, v231);
-                                let v234 = C::value_regs_get(ctx, v233, 0x0);
-                                let v796 = C::value_regs_get(ctx, v233, 0x1);
-                                let v1018 = constructor_a64_cls(ctx, I64, v234);
-                                let v1019 = constructor_a64_cls(ctx, I64, v796);
-                                let v1020 = constructor_eon(ctx, I64, v796, v234);
-                                let v1021 = C::imm_shift_from_u8(ctx, 0x3F);
-                                let v1022 = constructor_lsr_imm(ctx, I64, v1020, v1021);
-                                let v1023 = constructor_madd(ctx, I64, v1018, v1022, v1022);
-                                let v1024 = C::u8_into_imm12(ctx, 0x3F);
-                                let v1025 = &constructor_cmp64_imm(ctx, v1019, v1024);
-                                let v1026 = C::zero_reg(ctx);
-                                let v1027 = &constructor_csel(ctx, &Cond::Eq, v1023, v1026);
-                                let v1028 = constructor_with_flags_reg(ctx, v1025, v1027);
-                                let v1029 = constructor_add(ctx, I64, v1028, v1019);
-                                let v1030 = constructor_imm(ctx, I64, &ImmExtend::Zero, 0x0);
-                                let v1031 = C::value_regs(ctx, v1029, v1030);
-                                let v1032 = C::output(ctx, v1031);
-                                // Rule at src/isa/aarch64/lower.isle line 1735.
-                                return Some(v1032);
-                            }
-                            _ => {}
-                        }
-                        let v241 = C::put_in_reg(ctx, v231);
-                        let v1033 = constructor_a64_cls(ctx, v3, v241);
-                        let v1034 = constructor_output_reg(ctx, v1033);
-                        // Rule at src/isa/aarch64/lower.isle line 1749.
-                        return Some(v1034);
-                    }
-                }
-                &Opcode::Ctz => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            I8 => {
-                                let v241 = C::put_in_reg(ctx, v231);
-                                let v973 = constructor_rbit(ctx, I32, v241);
-                                let v1000 = C::u64_into_imm_logic(ctx, I32, 0x800000);
-                                let v1001 = constructor_orr_imm(ctx, I32, v973, v1000);
-                                let v1002 = constructor_a64_clz(ctx, I32, v1001);
-                                let v1003 = constructor_output_reg(ctx, v1002);
-                                // Rule at src/isa/aarch64/lower.isle line 1703.
-                                return Some(v1003);
-                            }
-                            I16 => {
-                                let v241 = C::put_in_reg(ctx, v231);
-                                let v973 = constructor_rbit(ctx, I32, v241);
-                                let v1005 = C::u64_into_imm_logic(ctx, I32, 0x8000);
-                                let v1006 = constructor_orr_imm(ctx, I32, v973, v1005);
-                                let v1007 = constructor_a64_clz(ctx, I32, v1006);
-                                let v1008 = constructor_output_reg(ctx, v1007);
-                                // Rule at src/isa/aarch64/lower.isle line 1706.
-                                return Some(v1008);
-                            }
-                            I128 => {
-                                let v233 = C::put_in_regs(ctx, v231);
-                                let v234 = C::value_regs_get(ctx, v233, 0x0);
-                                let v982 = constructor_rbit(ctx, I64, v234);
-                                let v236 = C::value_regs_get(ctx, v233, 0x1);
-                                let v983 = constructor_rbit(ctx, I64, v236);
-                                let v984 = C::value_regs(ctx, v983, v982);
-                                let v1009 = constructor_lower_clz128(ctx, v984);
-                                let v1010 = C::output(ctx, v1009);
-                                // Rule at src/isa/aarch64/lower.isle line 1709.
-                                return Some(v1010);
-                            }
-                            _ => {}
-                        }
-                        let v241 = C::put_in_reg(ctx, v231);
-                        let v986 = constructor_rbit(ctx, v3, v241);
-                        let v1011 = constructor_a64_clz(ctx, v3, v986);
-                        let v1012 = constructor_output_reg(ctx, v1011);
-                        // Rule at src/isa/aarch64/lower.isle line 1715.
-                        return Some(v1012);
-                    }
-                }
-                &Opcode::Bswap => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            I16 => {
-                                let v241 = C::put_in_reg(ctx, v231);
-                                let v1036 = constructor_a64_rev16(ctx, I16, v241);
-                                let v1037 = constructor_output_reg(ctx, v1036);
-                                // Rule at src/isa/aarch64/lower.isle line 1754.
-                                return Some(v1037);
-                            }
-                            I32 => {
-                                let v241 = C::put_in_reg(ctx, v231);
-                                let v1038 = constructor_a64_rev32(ctx, I32, v241);
-                                let v1039 = constructor_output_reg(ctx, v1038);
-                                // Rule at src/isa/aarch64/lower.isle line 1757.
-                                return Some(v1039);
-                            }
-                            I64 => {
-                                let v241 = C::put_in_reg(ctx, v231);
-                                let v1040 = constructor_a64_rev64(ctx, I64, v241);
-                                let v1041 = constructor_output_reg(ctx, v1040);
-                                // Rule at src/isa/aarch64/lower.isle line 1760.
-                                return Some(v1041);
-                            }
-                            I128 => {
-                                let v233 = C::put_in_regs(ctx, v231);
-                                let v1042 = C::value_regs_get(ctx, v233, 0x1);
-                                let v1043 = constructor_a64_rev64(ctx, I64, v1042);
-                                let v1044 = C::put_in_regs(ctx, v231);
-                                let v1045 = C::value_regs_get(ctx, v1044, 0x0);
-                                let v1046 = constructor_a64_rev64(ctx, I64, v1045);
-                                let v1047 = C::value_regs(ctx, v1043, v1046);
-                                let v1048 = C::output(ctx, v1047);
-                                // Rule at src/isa/aarch64/lower.isle line 1763.
-                                return Some(v1048);
-                            }
-                            _ => {}
-                        }
-                    }
-                }
-                &Opcode::Popcnt => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            I8 => {
-                                let v241 = C::put_in_reg(ctx, v231);
-                                let v1051 = constructor_mov_to_fpu(ctx, v241, &ScalarSize::Size32);
-                                let v1053 = constructor_vec_cnt(ctx, v1051, &VectorSize::Size8x8);
-                                let v1055 =
-                                    constructor_mov_from_vec(ctx, v1053, 0x0, &ScalarSize::Size8);
-                                let v1056 = constructor_output_reg(ctx, v1055);
-                                // Rule at src/isa/aarch64/lower.isle line 1793.
-                                return Some(v1056);
-                            }
-                            I16 => {
-                                let v241 = C::put_in_reg(ctx, v231);
-                                let v1051 = constructor_mov_to_fpu(ctx, v241, &ScalarSize::Size32);
-                                let v1053 = constructor_vec_cnt(ctx, v1051, &VectorSize::Size8x8);
-                                let v1057 =
-                                    constructor_addp(ctx, v1053, v1053, &VectorSize::Size8x8);
-                                let v1058 =
-                                    constructor_mov_from_vec(ctx, v1057, 0x0, &ScalarSize::Size8);
-                                let v1059 = constructor_output_reg(ctx, v1058);
-                                // Rule at src/isa/aarch64/lower.isle line 1799.
-                                return Some(v1059);
-                            }
-                            I32 => {
-                                let v241 = C::put_in_reg(ctx, v231);
-                                let v1051 = constructor_mov_to_fpu(ctx, v241, &ScalarSize::Size32);
-                                let v1053 = constructor_vec_cnt(ctx, v1051, &VectorSize::Size8x8);
-                                let v1060 = constructor_addv(ctx, v1053, &VectorSize::Size8x8);
-                                let v1061 =
-                                    constructor_mov_from_vec(ctx, v1060, 0x0, &ScalarSize::Size8);
-                                let v1062 = constructor_output_reg(ctx, v1061);
-                                // Rule at src/isa/aarch64/lower.isle line 1805.
-                                return Some(v1062);
-                            }
-                            I64 => {
-                                let v241 = C::put_in_reg(ctx, v231);
-                                let v248 = constructor_mov_to_fpu(ctx, v241, &ScalarSize::Size64);
-                                let v1063 = constructor_vec_cnt(ctx, v248, &VectorSize::Size8x8);
-                                let v1064 = constructor_addv(ctx, v1063, &VectorSize::Size8x8);
-                                let v1065 =
-                                    constructor_mov_from_vec(ctx, v1064, 0x0, &ScalarSize::Size8);
-                                let v1066 = constructor_output_reg(ctx, v1065);
-                                // Rule at src/isa/aarch64/lower.isle line 1811.
-                                return Some(v1066);
-                            }
-                            I128 => {
-                                let v233 = C::put_in_regs(ctx, v231);
-                                let v234 = C::value_regs_get(ctx, v233, 0x0);
-                                let v1067 = constructor_mov_to_fpu(ctx, v234, &ScalarSize::Size64);
-                                let v236 = C::value_regs_get(ctx, v233, 0x1);
-                                let v1068 = constructor_mov_to_vec(
-                                    ctx,
-                                    v1067,
-                                    v236,
-                                    0x1,
-                                    &VectorSize::Size64x2,
-                                );
-                                let v1069 = constructor_vec_cnt(ctx, v1068, &VectorSize::Size8x16);
-                                let v1070 = constructor_addv(ctx, v1069, &VectorSize::Size8x16);
-                                let v1071 =
-                                    constructor_mov_from_vec(ctx, v1070, 0x0, &ScalarSize::Size8);
-                                let v1072 = constructor_imm(ctx, I64, &ImmExtend::Zero, 0x0);
-                                let v1073 = C::value_regs(ctx, v1071, v1072);
-                                let v1074 = C::output(ctx, v1073);
-                                // Rule at src/isa/aarch64/lower.isle line 1817.
-                                return Some(v1074);
-                            }
-                            I8X16 => {
-                                let v241 = C::put_in_reg(ctx, v231);
-                                let v1075 = constructor_vec_cnt(ctx, v241, &VectorSize::Size8x16);
-                                let v1076 = constructor_output_reg(ctx, v1075);
-                                // Rule at src/isa/aarch64/lower.isle line 1825.
-                                return Some(v1076);
-                            }
-                            _ => {}
-                        }
-                    }
-                }
-                &Opcode::Sqrt => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v348 = C::ty_scalar_float(ctx, v3);
-                        if let Some(v349) = v348 {
-                            let v241 = C::put_in_reg(ctx, v231);
-                            let v405 = &constructor_scalar_size(ctx, v349);
-                            let v406 = constructor_fpu_rr(ctx, &FPUOp1::Sqrt, v241, v405);
-                            let v407 = constructor_output_reg(ctx, v406);
-                            // Rule at src/isa/aarch64/lower.isle line 441.
-                            return Some(v407);
-                        }
-                        let v117 = C::multi_lane(ctx, v3);
-                        if let Some(v118) = v117 {
-                            let v241 = C::put_in_reg(ctx, v231);
-                            let v313 = &constructor_vector_size(ctx, v3);
-                            let v402 = constructor_vec_misc(ctx, &VecMisc2::Fsqrt, v241, v313);
-                            let v403 = constructor_output_reg(ctx, v402);
-                            // Rule at src/isa/aarch64/lower.isle line 438.
-                            return Some(v403);
-                        }
-                    }
-                }
-                &Opcode::Fneg => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v348 = C::ty_scalar_float(ctx, v3);
-                        if let Some(v349) = v348 {
-                            let v241 = C::put_in_reg(ctx, v231);
-                            let v405 = &constructor_scalar_size(ctx, v349);
-                            let v412 = constructor_fpu_rr(ctx, &FPUOp1::Neg, v241, v405);
-                            let v413 = constructor_output_reg(ctx, v412);
-                            // Rule at src/isa/aarch64/lower.isle line 449.
-                            return Some(v413);
-                        }
-                        let v117 = C::multi_lane(ctx, v3);
-                        if let Some(v118) = v117 {
-                            let v241 = C::put_in_reg(ctx, v231);
-                            let v313 = &constructor_vector_size(ctx, v3);
-                            let v409 = constructor_vec_misc(ctx, &VecMisc2::Fneg, v241, v313);
-                            let v410 = constructor_output_reg(ctx, v409);
-                            // Rule at src/isa/aarch64/lower.isle line 446.
-                            return Some(v410);
-                        }
-                    }
-                }
-                &Opcode::Fabs => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v348 = C::ty_scalar_float(ctx, v3);
-                        if let Some(v349) = v348 {
-                            let v241 = C::put_in_reg(ctx, v231);
-                            let v405 = &constructor_scalar_size(ctx, v349);
-                            let v418 = constructor_fpu_rr(ctx, &FPUOp1::Abs, v241, v405);
-                            let v419 = constructor_output_reg(ctx, v418);
-                            // Rule at src/isa/aarch64/lower.isle line 457.
-                            return Some(v419);
-                        }
-                        let v117 = C::multi_lane(ctx, v3);
-                        if let Some(v118) = v117 {
-                            let v241 = C::put_in_reg(ctx, v231);
-                            let v313 = &constructor_vector_size(ctx, v3);
-                            let v415 = constructor_vec_misc(ctx, &VecMisc2::Fabs, v241, v313);
-                            let v416 = constructor_output_reg(ctx, v415);
-                            // Rule at src/isa/aarch64/lower.isle line 454.
-                            return Some(v416);
-                        }
-                    }
-                }
-                &Opcode::Ceil => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            F32 => {
-                                let v241 = C::put_in_reg(ctx, v231);
-                                let v430 = constructor_fpu_round(ctx, &FpuRoundMode::Plus32, v241);
-                                let v431 = constructor_output_reg(ctx, v430);
-                                // Rule at src/isa/aarch64/lower.isle line 475.
-                                return Some(v431);
-                            }
-                            F64 => {
-                                let v241 = C::put_in_reg(ctx, v231);
-                                let v433 = constructor_fpu_round(ctx, &FpuRoundMode::Plus64, v241);
-                                let v434 = constructor_output_reg(ctx, v433);
-                                // Rule at src/isa/aarch64/lower.isle line 478.
-                                return Some(v434);
-                            }
-                            _ => {}
-                        }
-                        let v117 = C::multi_lane(ctx, v3);
-                        if let Some(v118) = v117 {
-                            let v241 = C::put_in_reg(ctx, v231);
-                            let v313 = &constructor_vector_size(ctx, v3);
-                            let v427 = constructor_vec_misc(ctx, &VecMisc2::Frintp, v241, v313);
-                            let v428 = constructor_output_reg(ctx, v427);
-                            // Rule at src/isa/aarch64/lower.isle line 472.
-                            return Some(v428);
-                        }
-                    }
-                }
-                &Opcode::Floor => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            F32 => {
-                                let v241 = C::put_in_reg(ctx, v231);
-                                let v439 = constructor_fpu_round(ctx, &FpuRoundMode::Minus32, v241);
-                                let v440 = constructor_output_reg(ctx, v439);
-                                // Rule at src/isa/aarch64/lower.isle line 486.
-                                return Some(v440);
-                            }
-                            F64 => {
-                                let v241 = C::put_in_reg(ctx, v231);
-                                let v442 = constructor_fpu_round(ctx, &FpuRoundMode::Minus64, v241);
-                                let v443 = constructor_output_reg(ctx, v442);
-                                // Rule at src/isa/aarch64/lower.isle line 489.
-                                return Some(v443);
-                            }
-                            _ => {}
-                        }
-                        let v117 = C::multi_lane(ctx, v3);
-                        if let Some(v118) = v117 {
-                            let v241 = C::put_in_reg(ctx, v231);
-                            let v313 = &constructor_vector_size(ctx, v3);
-                            let v436 = constructor_vec_misc(ctx, &VecMisc2::Frintm, v241, v313);
-                            let v437 = constructor_output_reg(ctx, v436);
-                            // Rule at src/isa/aarch64/lower.isle line 483.
-                            return Some(v437);
-                        }
-                    }
-                }
-                &Opcode::Trunc => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            F32 => {
-                                let v241 = C::put_in_reg(ctx, v231);
-                                let v448 = constructor_fpu_round(ctx, &FpuRoundMode::Zero32, v241);
-                                let v449 = constructor_output_reg(ctx, v448);
-                                // Rule at src/isa/aarch64/lower.isle line 497.
-                                return Some(v449);
-                            }
-                            F64 => {
-                                let v241 = C::put_in_reg(ctx, v231);
-                                let v451 = constructor_fpu_round(ctx, &FpuRoundMode::Zero64, v241);
-                                let v452 = constructor_output_reg(ctx, v451);
-                                // Rule at src/isa/aarch64/lower.isle line 500.
-                                return Some(v452);
-                            }
-                            _ => {}
-                        }
-                        let v117 = C::multi_lane(ctx, v3);
-                        if let Some(v118) = v117 {
-                            let v241 = C::put_in_reg(ctx, v231);
-                            let v313 = &constructor_vector_size(ctx, v3);
-                            let v445 = constructor_vec_misc(ctx, &VecMisc2::Frintz, v241, v313);
-                            let v446 = constructor_output_reg(ctx, v445);
-                            // Rule at src/isa/aarch64/lower.isle line 494.
-                            return Some(v446);
-                        }
-                    }
-                }
-                &Opcode::Nearest => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            F32 => {
-                                let v241 = C::put_in_reg(ctx, v231);
-                                let v457 =
-                                    constructor_fpu_round(ctx, &FpuRoundMode::Nearest32, v241);
-                                let v458 = constructor_output_reg(ctx, v457);
-                                // Rule at src/isa/aarch64/lower.isle line 508.
-                                return Some(v458);
-                            }
-                            F64 => {
-                                let v241 = C::put_in_reg(ctx, v231);
-                                let v460 =
-                                    constructor_fpu_round(ctx, &FpuRoundMode::Nearest64, v241);
-                                let v461 = constructor_output_reg(ctx, v460);
-                                // Rule at src/isa/aarch64/lower.isle line 511.
-                                return Some(v461);
-                            }
-                            _ => {}
-                        }
-                        let v117 = C::multi_lane(ctx, v3);
-                        if let Some(v118) = v117 {
-                            let v241 = C::put_in_reg(ctx, v231);
-                            let v313 = &constructor_vector_size(ctx, v3);
-                            let v454 = constructor_vec_misc(ctx, &VecMisc2::Frintn, v241, v313);
-                            let v455 = constructor_output_reg(ctx, v454);
-                            // Rule at src/isa/aarch64/lower.isle line 505.
-                            return Some(v455);
-                        }
-                    }
-                }
-                &Opcode::IsNull => {
-                    let v232 = C::value_type(ctx, v231);
-                    let v1451 = &constructor_operand_size(ctx, v232);
-                    let v587 = C::put_in_reg(ctx, v231);
-                    let v1452 = C::u8_into_imm12(ctx, 0x0);
-                    let v1453 = &constructor_cmp_imm(ctx, v1451, v587, v1452);
-                    let v263 = &constructor_materialize_bool_result(ctx, &Cond::Eq);
-                    let v1454 = constructor_with_flags(ctx, v1453, v263);
-                    let v1455 = C::output(ctx, v1454);
-                    // Rule at src/isa/aarch64/lower.isle line 2221.
-                    return Some(v1455);
-                }
-                &Opcode::IsInvalid => {
-                    let v232 = C::value_type(ctx, v231);
-                    let v1451 = &constructor_operand_size(ctx, v232);
-                    let v587 = C::put_in_reg(ctx, v231);
-                    let v1456 = C::u8_into_imm12(ctx, 0x1);
-                    let v1457 = &constructor_cmn_imm(ctx, v1451, v587, v1456);
-                    let v263 = &constructor_materialize_bool_result(ctx, &Cond::Eq);
-                    let v1458 = constructor_with_flags(ctx, v1457, v263);
-                    let v1459 = C::output(ctx, v1458);
-                    // Rule at src/isa/aarch64/lower.isle line 2227.
-                    return Some(v1459);
-                }
-                &Opcode::ScalarToVector => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            F32X4 => {
-                                let v241 = C::put_in_reg(ctx, v231);
-                                let v243 = constructor_fpu_extend(ctx, v241, &ScalarSize::Size32);
-                                let v244 = constructor_output_reg(ctx, v243);
-                                // Rule at src/isa/aarch64/lower.isle line 260.
-                                return Some(v244);
-                            }
-                            F64X2 => {
-                                let v241 = C::put_in_reg(ctx, v231);
-                                let v246 = constructor_fpu_extend(ctx, v241, &ScalarSize::Size64);
-                                let v247 = constructor_output_reg(ctx, v246);
-                                // Rule at src/isa/aarch64/lower.isle line 263.
-                                return Some(v247);
-                            }
-                            _ => {}
-                        }
-                    }
-                    let v232 = C::value_type(ctx, v231);
-                    if v232 == I64 {
-                        let v241 = C::put_in_reg(ctx, v231);
-                        let v248 = constructor_mov_to_fpu(ctx, v241, &ScalarSize::Size64);
-                        let v249 = constructor_output_reg(ctx, v248);
-                        // Rule at src/isa/aarch64/lower.isle line 266.
-                        return Some(v249);
-                    }
-                    let v250 = C::int_fits_in_32(ctx, v232);
-                    if let Some(v251) = v250 {
-                        let v252 = constructor_put_in_reg_zext32(ctx, v231);
-                        let v253 = constructor_mov_to_fpu(ctx, v252, &ScalarSize::Size32);
-                        let v254 = constructor_output_reg(ctx, v253);
-                        // Rule at src/isa/aarch64/lower.isle line 269.
-                        return Some(v254);
-                    }
-                }
-                &Opcode::Bmask => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v233 = C::put_in_regs(ctx, v231);
-                        let v3 = C::value_type(ctx, v2);
-                        let v232 = C::value_type(ctx, v231);
-                        let v1049 = constructor_lower_bmask(ctx, v3, v232, v233);
-                        let v1050 = C::output(ctx, v1049);
-                        // Rule at src/isa/aarch64/lower.isle line 1771.
-                        return Some(v1050);
-                    }
-                }
-                &Opcode::Ireduce => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v1077 = C::ty_int_ref_scalar_64(ctx, v3);
-                        if let Some(v1078) = v1077 {
-                            let v233 = C::put_in_regs(ctx, v231);
-                            let v234 = C::value_regs_get(ctx, v233, 0x0);
-                            let v1090 = constructor_output_reg(ctx, v234);
-                            // Rule at src/isa/aarch64/lower.isle line 1844.
-                            return Some(v1090);
-                        }
-                    }
-                }
-                &Opcode::SwidenLow => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v241 = C::put_in_reg(ctx, v231);
-                        let v3 = C::value_type(ctx, v2);
-                        let v1431 = &constructor_lane_size(ctx, v3);
-                        let v1432 =
-                            constructor_vec_extend(ctx, &VecExtendOp::Sxtl, v241, false, v1431);
-                        let v1433 = constructor_output_reg(ctx, v1432);
-                        // Rule at src/isa/aarch64/lower.isle line 2186.
-                        return Some(v1433);
-                    }
-                }
-                &Opcode::SwidenHigh => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v575 = C::ty_vec128(ctx, v3);
-                        if let Some(v576) = v575 {
-                            let v241 = C::put_in_reg(ctx, v231);
-                            let v1434 = &constructor_lane_size(ctx, v576);
-                            let v1435 =
-                                constructor_vec_extend(ctx, &VecExtendOp::Sxtl, v241, true, v1434);
-                            let v1436 = constructor_output_reg(ctx, v1435);
-                            // Rule at src/isa/aarch64/lower.isle line 2191.
-                            return Some(v1436);
-                        }
-                        let v1245 = C::ty_vec64_ctor(ctx, v3);
-                        if let Some(v1246) = v1245 {
-                            let v241 = C::put_in_reg(ctx, v231);
-                            let v1438 = constructor_fpu_move_from_vec(
-                                ctx,
-                                v241,
-                                0x1,
-                                &VectorSize::Size32x2,
-                            );
-                            let v1439 = &constructor_lane_size(ctx, v3);
-                            let v1440 = constructor_vec_extend(
-                                ctx,
-                                &VecExtendOp::Sxtl,
-                                v1438,
-                                false,
-                                v1439,
-                            );
-                            let v1441 = constructor_output_reg(ctx, v1440);
-                            // Rule at src/isa/aarch64/lower.isle line 2194.
-                            return Some(v1441);
-                        }
-                        let v241 = C::put_in_reg(ctx, v231);
-                        let v1431 = &constructor_lane_size(ctx, v3);
-                        let v1874 =
-                            constructor_vec_extend(ctx, &VecExtendOp::Sxtl, v241, true, v1431);
-                        let v1875 = constructor_output_reg(ctx, v1874);
-                        // Rule at src/isa/aarch64/lower_dynamic_neon.isle line 104.
-                        return Some(v1875);
-                    }
-                }
-                &Opcode::UwidenLow => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v241 = C::put_in_reg(ctx, v231);
-                        let v3 = C::value_type(ctx, v2);
-                        let v1431 = &constructor_lane_size(ctx, v3);
-                        let v1443 =
-                            constructor_vec_extend(ctx, &VecExtendOp::Uxtl, v241, false, v1431);
-                        let v1444 = constructor_output_reg(ctx, v1443);
-                        // Rule at src/isa/aarch64/lower.isle line 2201.
-                        return Some(v1444);
-                    }
-                }
-                &Opcode::UwidenHigh => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v575 = C::ty_vec128(ctx, v3);
-                        if let Some(v576) = v575 {
-                            let v241 = C::put_in_reg(ctx, v231);
-                            let v1434 = &constructor_lane_size(ctx, v576);
-                            let v1445 =
-                                constructor_vec_extend(ctx, &VecExtendOp::Uxtl, v241, true, v1434);
-                            let v1446 = constructor_output_reg(ctx, v1445);
-                            // Rule at src/isa/aarch64/lower.isle line 2206.
-                            return Some(v1446);
-                        }
-                        let v1245 = C::ty_vec64_ctor(ctx, v3);
-                        if let Some(v1246) = v1245 {
-                            let v241 = C::put_in_reg(ctx, v231);
-                            let v1438 = constructor_fpu_move_from_vec(
-                                ctx,
-                                v241,
-                                0x1,
-                                &VectorSize::Size32x2,
-                            );
-                            let v1439 = &constructor_lane_size(ctx, v3);
-                            let v1447 = constructor_vec_extend(
-                                ctx,
-                                &VecExtendOp::Uxtl,
-                                v1438,
-                                false,
-                                v1439,
-                            );
-                            let v1448 = constructor_output_reg(ctx, v1447);
-                            // Rule at src/isa/aarch64/lower.isle line 2209.
-                            return Some(v1448);
-                        }
-                        let v241 = C::put_in_reg(ctx, v231);
-                        let v1431 = &constructor_lane_size(ctx, v3);
-                        let v1876 =
-                            constructor_vec_extend(ctx, &VecExtendOp::Uxtl, v241, true, v1431);
-                        let v1877 = constructor_output_reg(ctx, v1876);
-                        // Rule at src/isa/aarch64/lower_dynamic_neon.isle line 109.
-                        return Some(v1877);
-                    }
-                }
-                &Opcode::Uextend => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v727 = C::def_inst(ctx, v231);
-                        if let Some(v728) = v727 {
-                            let v729 = &C::inst_data(ctx, v728);
-                            match v729 {
-                                &InstructionData::BinaryImm8 {
-                                    opcode: ref v730,
-                                    arg: v731,
-                                    imm: v732,
-                                } => {
-                                    if let &Opcode::Extractlane = v730 {
-                                        let v3 = C::value_type(ctx, v2);
-                                        let v27 = C::fits_in_64(ctx, v3);
-                                        if let Some(v28) = v27 {
-                                            let v735 = C::put_in_reg(ctx, v731);
-                                            let v733 = C::value_type(ctx, v731);
-                                            let v736 = &constructor_lane_size(ctx, v733);
-                                            let v734 = C::u8_from_uimm8(ctx, v732);
-                                            let v737 =
-                                                constructor_mov_from_vec(ctx, v735, v734, v736);
-                                            let v738 = constructor_output_reg(ctx, v737);
-                                            // Rule at src/isa/aarch64/lower.isle line 1118.
-                                            return Some(v738);
-                                        }
-                                        if v3 == I128 {
-                                            let v735 = C::put_in_reg(ctx, v731);
-                                            let v733 = C::value_type(ctx, v731);
-                                            let v736 = &constructor_lane_size(ctx, v733);
-                                            let v734 = C::u8_from_uimm8(ctx, v732);
-                                            let v737 =
-                                                constructor_mov_from_vec(ctx, v735, v734, v736);
-                                            let v751 =
-                                                constructor_imm(ctx, I64, &ImmExtend::Zero, 0x0);
-                                            let v752 = C::value_regs(ctx, v737, v751);
-                                            let v753 = C::output(ctx, v752);
-                                            // Rule at src/isa/aarch64/lower.isle line 1137.
-                                            return Some(v753);
-                                        }
-                                    }
-                                }
-                                &InstructionData::LoadNoOffset {
-                                    opcode: ref v739,
-                                    arg: v740,
-                                    flags: v741,
-                                } => {
-                                    if let &Opcode::AtomicLoad = v739 {
-                                        let v3 = C::value_type(ctx, v2);
-                                        let v27 = C::fits_in_64(ctx, v3);
-                                        if let Some(v28) = v27 {
-                                            let v742 = C::is_sinkable_inst(ctx, v231);
-                                            if let Some(v743) = v742 {
-                                                let v744 = constructor_sink_atomic_load(ctx, v743);
-                                                let v232 = C::value_type(ctx, v231);
-                                                let v745 =
-                                                    constructor_load_acquire(ctx, v232, v741, v744);
-                                                let v746 = constructor_output_reg(ctx, v745);
-                                                // Rule at src/isa/aarch64/lower.isle line 1125.
-                                                return Some(v746);
-                                            }
-                                        }
-                                    }
-                                }
-                                _ => {}
-                            }
-                        }
-                        let v3 = C::value_type(ctx, v2);
-                        if v3 == I128 {
-                            let v747 = constructor_put_in_reg_zext64(ctx, v231);
-                            let v748 = constructor_imm(ctx, I64, &ImmExtend::Zero, 0x0);
-                            let v749 = C::value_regs(ctx, v747, v748);
-                            let v750 = C::output(ctx, v749);
-                            // Rule at src/isa/aarch64/lower.isle line 1132.
-                            return Some(v750);
-                        }
-                        let v27 = C::fits_in_64(ctx, v3);
-                        if let Some(v28) = v27 {
-                            let v241 = C::put_in_reg(ctx, v231);
-                            let v232 = C::value_type(ctx, v231);
-                            let v723 = C::ty_bits(ctx, v232);
-                            let v724 = C::ty_bits(ctx, v28);
-                            let v725 = constructor_extend(ctx, v241, false, v723, v724);
-                            let v726 = constructor_output_reg(ctx, v725);
-                            // Rule at src/isa/aarch64/lower.isle line 1113.
-                            return Some(v726);
-                        }
-                    }
-                }
-                &Opcode::Sextend => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        if v3 == I128 {
-                            let v727 = C::def_inst(ctx, v231);
-                            if let Some(v728) = v727 {
-                                let v729 = &C::inst_data(ctx, v728);
-                                if let &InstructionData::BinaryImm8 {
-                                    opcode: ref v730,
-                                    arg: v731,
-                                    imm: v732,
-                                } = v729
-                                {
-                                    if let &Opcode::Extractlane = v730 {
-                                        let v733 = C::value_type(ctx, v731);
-                                        let v766 = C::not_i64x2(ctx, v733);
-                                        if let Some(v767) = v766 {
-                                            let v735 = C::put_in_reg(ctx, v731);
-                                            let v756 = &constructor_vector_size(ctx, v733);
-                                            let v768 = &constructor_size_from_ty(ctx, I64);
-                                            let v734 = C::u8_from_uimm8(ctx, v732);
-                                            let v769 = constructor_mov_from_vec_signed(
-                                                ctx, v735, v734, v756, v768,
-                                            );
-                                            let v770 = C::imm_shift_from_u8(ctx, 0x3F);
-                                            let v771 = constructor_asr_imm(ctx, I64, v769, v770);
-                                            let v772 = C::value_regs(ctx, v769, v771);
-                                            let v773 = C::output(ctx, v772);
-                                            // Rule at src/isa/aarch64/lower.isle line 1170.
-                                            return Some(v773);
-                                        }
-                                        if v733 == I64X2 {
-                                            let v735 = C::put_in_reg(ctx, v731);
-                                            let v734 = C::u8_from_uimm8(ctx, v732);
-                                            let v774 = constructor_mov_from_vec(
-                                                ctx,
-                                                v735,
-                                                v734,
-                                                &ScalarSize::Size64,
-                                            );
-                                            let v775 = C::imm_shift_from_u8(ctx, 0x3F);
-                                            let v776 = constructor_asr_imm(ctx, I64, v774, v775);
-                                            let v777 = C::value_regs(ctx, v774, v776);
-                                            let v778 = C::output(ctx, v777);
-                                            // Rule at src/isa/aarch64/lower.isle line 1181.
-                                            return Some(v778);
-                                        }
-                                    }
-                                }
-                            }
-                            let v760 = constructor_put_in_reg_sext64(ctx, v231);
-                            let v762 = C::imm_shift_from_u8(ctx, 0x3F);
-                            let v763 = constructor_asr_imm(ctx, I64, v760, v762);
-                            let v764 = C::value_regs(ctx, v760, v763);
-                            let v765 = C::output(ctx, v764);
-                            // Rule at src/isa/aarch64/lower.isle line 1160.
-                            return Some(v765);
-                        }
-                        let v27 = C::fits_in_64(ctx, v3);
-                        if let Some(v28) = v27 {
-                            let v727 = C::def_inst(ctx, v231);
-                            if let Some(v728) = v727 {
-                                let v729 = &C::inst_data(ctx, v728);
-                                if let &InstructionData::BinaryImm8 {
-                                    opcode: ref v730,
-                                    arg: v731,
-                                    imm: v732,
-                                } = v729
-                                {
-                                    if let &Opcode::Extractlane = v730 {
-                                        let v735 = C::put_in_reg(ctx, v731);
-                                        let v733 = C::value_type(ctx, v731);
-                                        let v756 = &constructor_vector_size(ctx, v733);
-                                        let v757 = &constructor_size_from_ty(ctx, v28);
-                                        let v734 = C::u8_from_uimm8(ctx, v732);
-                                        let v758 = constructor_mov_from_vec_signed(
-                                            ctx, v735, v734, v756, v757,
-                                        );
-                                        let v759 = constructor_output_reg(ctx, v758);
-                                        // Rule at src/isa/aarch64/lower.isle line 1151.
-                                        return Some(v759);
-                                    }
-                                }
-                            }
-                            let v241 = C::put_in_reg(ctx, v231);
-                            let v232 = C::value_type(ctx, v231);
-                            let v723 = C::ty_bits(ctx, v232);
-                            let v724 = C::ty_bits(ctx, v28);
-                            let v754 = constructor_extend(ctx, v241, true, v723, v724);
-                            let v755 = constructor_output_reg(ctx, v754);
-                            // Rule at src/isa/aarch64/lower.isle line 1146.
-                            return Some(v755);
-                        }
-                    }
-                }
-                &Opcode::Fpromote => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        if v3 == F64 {
-                            let v241 = C::put_in_reg(ctx, v231);
-                            let v421 = constructor_fpu_rr(
-                                ctx,
-                                &FPUOp1::Cvt32To64,
-                                v241,
-                                &ScalarSize::Size32,
-                            );
-                            let v422 = constructor_output_reg(ctx, v421);
-                            // Rule at src/isa/aarch64/lower.isle line 462.
-                            return Some(v422);
-                        }
-                    }
-                }
-                &Opcode::Fdemote => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        if v3 == F32 {
-                            let v241 = C::put_in_reg(ctx, v231);
-                            let v424 = constructor_fpu_rr(
-                                ctx,
-                                &FPUOp1::Cvt64To32,
-                                v241,
-                                &ScalarSize::Size64,
-                            );
-                            let v425 = constructor_output_reg(ctx, v424);
-                            // Rule at src/isa/aarch64/lower.isle line 467.
-                            return Some(v425);
-                        }
-                    }
-                }
-                &Opcode::Fvdemote => {
-                    let v241 = C::put_in_reg(ctx, v231);
-                    let v1399 = constructor_fcvtn(ctx, v241, &ScalarSize::Size32);
-                    let v1400 = constructor_output_reg(ctx, v1399);
-                    // Rule at src/isa/aarch64/lower.isle line 2135.
-                    return Some(v1400);
-                }
-                &Opcode::FvpromoteLow => {
-                    let v241 = C::put_in_reg(ctx, v231);
-                    let v1805 = constructor_vec_rr_long(ctx, &VecRRLongOp::Fcvtl32, v241, false);
-                    let v1806 = constructor_output_reg(ctx, v1805);
-                    // Rule at src/isa/aarch64/lower.isle line 2844.
-                    return Some(v1806);
-                }
-                &Opcode::FcvtToUint => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v232 = C::value_type(ctx, v231);
-                        match v232 {
-                            F32 => {
-                                let v3 = C::value_type(ctx, v2);
-                                if v3 == I64 {
-                                    let v241 = C::put_in_reg(ctx, v231);
-                                    let v485 = constructor_fpu_to_int_cvt(
-                                        ctx,
-                                        &FpuToIntOp::F32ToU64,
-                                        v241,
-                                        false,
-                                        F32,
-                                        I64,
-                                    );
-                                    let v486 = constructor_output_reg(ctx, v485);
-                                    // Rule at src/isa/aarch64/lower.isle line 583.
-                                    return Some(v486);
-                                }
-                                let v318 = C::fits_in_32(ctx, v3);
-                                if let Some(v319) = v318 {
-                                    let v241 = C::put_in_reg(ctx, v231);
-                                    let v482 = constructor_fpu_to_int_cvt(
-                                        ctx,
-                                        &FpuToIntOp::F32ToU32,
-                                        v241,
-                                        false,
-                                        F32,
-                                        v319,
-                                    );
-                                    let v483 = constructor_output_reg(ctx, v482);
-                                    // Rule at src/isa/aarch64/lower.isle line 580.
-                                    return Some(v483);
-                                }
-                            }
-                            F64 => {
-                                let v3 = C::value_type(ctx, v2);
-                                if v3 == I64 {
-                                    let v241 = C::put_in_reg(ctx, v231);
-                                    let v492 = constructor_fpu_to_int_cvt(
-                                        ctx,
-                                        &FpuToIntOp::F64ToU64,
-                                        v241,
-                                        false,
-                                        F64,
-                                        I64,
-                                    );
-                                    let v493 = constructor_output_reg(ctx, v492);
-                                    // Rule at src/isa/aarch64/lower.isle line 589.
-                                    return Some(v493);
-                                }
-                                let v318 = C::fits_in_32(ctx, v3);
-                                if let Some(v319) = v318 {
-                                    let v241 = C::put_in_reg(ctx, v231);
-                                    let v489 = constructor_fpu_to_int_cvt(
-                                        ctx,
-                                        &FpuToIntOp::F64ToU32,
-                                        v241,
-                                        false,
-                                        F64,
-                                        v319,
-                                    );
-                                    let v490 = constructor_output_reg(ctx, v489);
-                                    // Rule at src/isa/aarch64/lower.isle line 586.
-                                    return Some(v490);
-                                }
-                            }
-                            _ => {}
-                        }
-                    }
-                }
-                &Opcode::FcvtToSint => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v232 = C::value_type(ctx, v231);
-                        match v232 {
-                            F32 => {
-                                let v3 = C::value_type(ctx, v2);
-                                if v3 == I64 {
-                                    let v241 = C::put_in_reg(ctx, v231);
-                                    let v498 = constructor_fpu_to_int_cvt(
-                                        ctx,
-                                        &FpuToIntOp::F32ToI64,
-                                        v241,
-                                        true,
-                                        F32,
-                                        I64,
-                                    );
-                                    let v499 = constructor_output_reg(ctx, v498);
-                                    // Rule at src/isa/aarch64/lower.isle line 597.
-                                    return Some(v499);
-                                }
-                                let v318 = C::fits_in_32(ctx, v3);
-                                if let Some(v319) = v318 {
-                                    let v241 = C::put_in_reg(ctx, v231);
-                                    let v495 = constructor_fpu_to_int_cvt(
-                                        ctx,
-                                        &FpuToIntOp::F32ToI32,
-                                        v241,
-                                        true,
-                                        F32,
-                                        v319,
-                                    );
-                                    let v496 = constructor_output_reg(ctx, v495);
-                                    // Rule at src/isa/aarch64/lower.isle line 594.
-                                    return Some(v496);
-                                }
-                            }
-                            F64 => {
-                                let v3 = C::value_type(ctx, v2);
-                                if v3 == I64 {
-                                    let v241 = C::put_in_reg(ctx, v231);
-                                    let v504 = constructor_fpu_to_int_cvt(
-                                        ctx,
-                                        &FpuToIntOp::F64ToI64,
-                                        v241,
-                                        true,
-                                        F64,
-                                        I64,
-                                    );
-                                    let v505 = constructor_output_reg(ctx, v504);
-                                    // Rule at src/isa/aarch64/lower.isle line 603.
-                                    return Some(v505);
-                                }
-                                let v318 = C::fits_in_32(ctx, v3);
-                                if let Some(v319) = v318 {
-                                    let v241 = C::put_in_reg(ctx, v231);
-                                    let v501 = constructor_fpu_to_int_cvt(
-                                        ctx,
-                                        &FpuToIntOp::F64ToI32,
-                                        v241,
-                                        true,
-                                        F64,
-                                        v319,
-                                    );
-                                    let v502 = constructor_output_reg(ctx, v501);
-                                    // Rule at src/isa/aarch64/lower.isle line 600.
-                                    return Some(v502);
-                                }
-                            }
-                            _ => {}
-                        }
-                    }
-                }
-                &Opcode::FcvtToUintSat => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v232 = C::value_type(ctx, v231);
-                        match v232 {
-                            F32 => {
-                                let v3 = C::value_type(ctx, v2);
-                                if v3 == I64 {
-                                    let v241 = C::put_in_reg(ctx, v231);
-                                    let v543 = constructor_fpu_to_int_cvt_sat(
-                                        ctx,
-                                        &FpuToIntOp::F32ToU64,
-                                        v241,
-                                        false,
-                                        I64,
-                                    );
-                                    let v544 = constructor_output_reg(ctx, v543);
-                                    // Rule at src/isa/aarch64/lower.isle line 657.
-                                    return Some(v544);
-                                }
-                                let v318 = C::fits_in_32(ctx, v3);
-                                if let Some(v319) = v318 {
-                                    let v241 = C::put_in_reg(ctx, v231);
-                                    let v541 = constructor_fpu_to_int_cvt_sat(
-                                        ctx,
-                                        &FpuToIntOp::F32ToU32,
-                                        v241,
-                                        false,
-                                        v319,
-                                    );
-                                    let v542 = constructor_output_reg(ctx, v541);
-                                    // Rule at src/isa/aarch64/lower.isle line 654.
-                                    return Some(v542);
-                                }
-                            }
-                            F64 => {
-                                let v3 = C::value_type(ctx, v2);
-                                if v3 == I64 {
-                                    let v241 = C::put_in_reg(ctx, v231);
-                                    let v547 = constructor_fpu_to_int_cvt_sat(
-                                        ctx,
-                                        &FpuToIntOp::F64ToU64,
-                                        v241,
-                                        false,
-                                        I64,
-                                    );
-                                    let v548 = constructor_output_reg(ctx, v547);
-                                    // Rule at src/isa/aarch64/lower.isle line 663.
-                                    return Some(v548);
-                                }
-                                let v318 = C::fits_in_32(ctx, v3);
-                                if let Some(v319) = v318 {
-                                    let v241 = C::put_in_reg(ctx, v231);
-                                    let v545 = constructor_fpu_to_int_cvt_sat(
-                                        ctx,
-                                        &FpuToIntOp::F64ToU32,
-                                        v241,
-                                        false,
-                                        v319,
-                                    );
-                                    let v546 = constructor_output_reg(ctx, v545);
-                                    // Rule at src/isa/aarch64/lower.isle line 660.
-                                    return Some(v546);
-                                }
-                            }
-                            _ => {}
-                        }
-                        let v3 = C::value_type(ctx, v2);
-                        let v117 = C::multi_lane(ctx, v3);
-                        if let Some(v118) = v117 {
-                            match v118.0 {
-                                0x20 => {
-                                    let v255 = C::multi_lane(ctx, v232);
-                                    if let Some(v256) = v255 {
-                                        if v256.0 == 0x20 {
-                                            let v241 = C::put_in_reg(ctx, v231);
-                                            let v313 = &constructor_vector_size(ctx, v3);
-                                            let v539 = constructor_vec_misc(
-                                                ctx,
-                                                &VecMisc2::Fcvtzu,
-                                                v241,
-                                                v313,
-                                            );
-                                            let v540 = constructor_output_reg(ctx, v539);
-                                            // Rule at src/isa/aarch64/lower.isle line 648.
-                                            return Some(v540);
-                                        }
-                                    }
-                                }
-                                0x40 => {
-                                    let v255 = C::multi_lane(ctx, v232);
-                                    if let Some(v256) = v255 {
-                                        if v256.0 == 0x40 {
-                                            let v241 = C::put_in_reg(ctx, v231);
-                                            let v313 = &constructor_vector_size(ctx, v3);
-                                            let v539 = constructor_vec_misc(
-                                                ctx,
-                                                &VecMisc2::Fcvtzu,
-                                                v241,
-                                                v313,
-                                            );
-                                            let v540 = constructor_output_reg(ctx, v539);
-                                            // Rule at src/isa/aarch64/lower.isle line 651.
-                                            return Some(v540);
-                                        }
-                                    }
-                                }
-                                _ => {}
-                            }
-                        }
-                    }
-                }
-                &Opcode::FcvtToSintSat => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v232 = C::value_type(ctx, v231);
-                        match v232 {
-                            F32 => {
-                                let v3 = C::value_type(ctx, v2);
-                                if v3 == I64 {
-                                    let v241 = C::put_in_reg(ctx, v231);
-                                    let v554 = constructor_fpu_to_int_cvt_sat(
-                                        ctx,
-                                        &FpuToIntOp::F32ToI64,
-                                        v241,
-                                        true,
-                                        I64,
-                                    );
-                                    let v555 = constructor_output_reg(ctx, v554);
-                                    // Rule at src/isa/aarch64/lower.isle line 677.
-                                    return Some(v555);
-                                }
-                                let v318 = C::fits_in_32(ctx, v3);
-                                if let Some(v319) = v318 {
-                                    let v241 = C::put_in_reg(ctx, v231);
-                                    let v552 = constructor_fpu_to_int_cvt_sat(
-                                        ctx,
-                                        &FpuToIntOp::F32ToI32,
-                                        v241,
-                                        true,
-                                        v319,
-                                    );
-                                    let v553 = constructor_output_reg(ctx, v552);
-                                    // Rule at src/isa/aarch64/lower.isle line 674.
-                                    return Some(v553);
-                                }
-                            }
-                            F64 => {
-                                let v3 = C::value_type(ctx, v2);
-                                if v3 == I64 {
-                                    let v241 = C::put_in_reg(ctx, v231);
-                                    let v558 = constructor_fpu_to_int_cvt_sat(
-                                        ctx,
-                                        &FpuToIntOp::F64ToI64,
-                                        v241,
-                                        true,
-                                        I64,
-                                    );
-                                    let v559 = constructor_output_reg(ctx, v558);
-                                    // Rule at src/isa/aarch64/lower.isle line 683.
-                                    return Some(v559);
-                                }
-                                let v318 = C::fits_in_32(ctx, v3);
-                                if let Some(v319) = v318 {
-                                    let v241 = C::put_in_reg(ctx, v231);
-                                    let v556 = constructor_fpu_to_int_cvt_sat(
-                                        ctx,
-                                        &FpuToIntOp::F64ToI32,
-                                        v241,
-                                        true,
-                                        v319,
-                                    );
-                                    let v557 = constructor_output_reg(ctx, v556);
-                                    // Rule at src/isa/aarch64/lower.isle line 680.
-                                    return Some(v557);
-                                }
-                            }
-                            _ => {}
-                        }
-                        let v3 = C::value_type(ctx, v2);
-                        let v117 = C::multi_lane(ctx, v3);
-                        if let Some(v118) = v117 {
-                            match v118.0 {
-                                0x20 => {
-                                    let v255 = C::multi_lane(ctx, v232);
-                                    if let Some(v256) = v255 {
-                                        if v256.0 == 0x20 {
-                                            let v241 = C::put_in_reg(ctx, v231);
-                                            let v313 = &constructor_vector_size(ctx, v3);
-                                            let v550 = constructor_vec_misc(
-                                                ctx,
-                                                &VecMisc2::Fcvtzs,
-                                                v241,
-                                                v313,
-                                            );
-                                            let v551 = constructor_output_reg(ctx, v550);
-                                            // Rule at src/isa/aarch64/lower.isle line 668.
-                                            return Some(v551);
-                                        }
-                                    }
-                                }
-                                0x40 => {
-                                    let v255 = C::multi_lane(ctx, v232);
-                                    if let Some(v256) = v255 {
-                                        if v256.0 == 0x40 {
-                                            let v241 = C::put_in_reg(ctx, v231);
-                                            let v313 = &constructor_vector_size(ctx, v3);
-                                            let v550 = constructor_vec_misc(
-                                                ctx,
-                                                &VecMisc2::Fcvtzs,
-                                                v241,
-                                                v313,
-                                            );
-                                            let v551 = constructor_output_reg(ctx, v550);
-                                            // Rule at src/isa/aarch64/lower.isle line 671.
-                                            return Some(v551);
-                                        }
-                                    }
-                                }
-                                _ => {}
-                            }
-                        }
-                    }
-                }
-                &Opcode::FcvtFromUint => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            F32 => {
-                                let v232 = C::value_type(ctx, v231);
-                                if v232 == I64 {
-                                    let v241 = C::put_in_reg(ctx, v231);
-                                    let v518 =
-                                        constructor_int_to_fpu(ctx, &IntToFpuOp::U64ToF32, v241);
-                                    let v519 = constructor_output_reg(ctx, v518);
-                                    // Rule at src/isa/aarch64/lower.isle line 620.
-                                    return Some(v519);
-                                }
-                                let v509 = C::fits_in_32(ctx, v232);
-                                if let Some(v510) = v509 {
-                                    let v252 = constructor_put_in_reg_zext32(ctx, v231);
-                                    let v512 =
-                                        constructor_int_to_fpu(ctx, &IntToFpuOp::U32ToF32, v252);
-                                    let v513 = constructor_output_reg(ctx, v512);
-                                    // Rule at src/isa/aarch64/lower.isle line 614.
-                                    return Some(v513);
-                                }
-                            }
-                            F64 => {
-                                let v232 = C::value_type(ctx, v231);
-                                if v232 == I64 {
-                                    let v241 = C::put_in_reg(ctx, v231);
-                                    let v521 =
-                                        constructor_int_to_fpu(ctx, &IntToFpuOp::U64ToF64, v241);
-                                    let v522 = constructor_output_reg(ctx, v521);
-                                    // Rule at src/isa/aarch64/lower.isle line 623.
-                                    return Some(v522);
-                                }
-                                let v509 = C::fits_in_32(ctx, v232);
-                                if let Some(v510) = v509 {
-                                    let v252 = constructor_put_in_reg_zext32(ctx, v231);
-                                    let v515 =
-                                        constructor_int_to_fpu(ctx, &IntToFpuOp::U32ToF64, v252);
-                                    let v516 = constructor_output_reg(ctx, v515);
-                                    // Rule at src/isa/aarch64/lower.isle line 617.
-                                    return Some(v516);
-                                }
-                            }
-                            _ => {}
-                        }
-                        let v117 = C::multi_lane(ctx, v3);
-                        if let Some(v118) = v117 {
-                            match v118.0 {
-                                0x20 => {
-                                    let v232 = C::value_type(ctx, v231);
-                                    let v255 = C::multi_lane(ctx, v232);
-                                    if let Some(v256) = v255 {
-                                        if v256.0 == 0x20 {
-                                            let v241 = C::put_in_reg(ctx, v231);
-                                            let v313 = &constructor_vector_size(ctx, v3);
-                                            let v507 = constructor_vec_misc(
-                                                ctx,
-                                                &VecMisc2::Ucvtf,
-                                                v241,
-                                                v313,
-                                            );
-                                            let v508 = constructor_output_reg(ctx, v507);
-                                            // Rule at src/isa/aarch64/lower.isle line 608.
-                                            return Some(v508);
-                                        }
-                                    }
-                                }
-                                0x40 => {
-                                    let v232 = C::value_type(ctx, v231);
-                                    let v255 = C::multi_lane(ctx, v232);
-                                    if let Some(v256) = v255 {
-                                        if v256.0 == 0x40 {
-                                            let v241 = C::put_in_reg(ctx, v231);
-                                            let v313 = &constructor_vector_size(ctx, v3);
-                                            let v507 = constructor_vec_misc(
-                                                ctx,
-                                                &VecMisc2::Ucvtf,
-                                                v241,
-                                                v313,
-                                            );
-                                            let v508 = constructor_output_reg(ctx, v507);
-                                            // Rule at src/isa/aarch64/lower.isle line 611.
-                                            return Some(v508);
-                                        }
-                                    }
-                                }
-                                _ => {}
-                            }
-                        }
-                    }
-                }
-                &Opcode::FcvtFromSint => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            F32 => {
-                                let v232 = C::value_type(ctx, v231);
-                                if v232 == I64 {
-                                    let v241 = C::put_in_reg(ctx, v231);
-                                    let v533 =
-                                        constructor_int_to_fpu(ctx, &IntToFpuOp::I64ToF32, v241);
-                                    let v534 = constructor_output_reg(ctx, v533);
-                                    // Rule at src/isa/aarch64/lower.isle line 640.
-                                    return Some(v534);
-                                }
-                                let v509 = C::fits_in_32(ctx, v232);
-                                if let Some(v510) = v509 {
-                                    let v320 = constructor_put_in_reg_sext32(ctx, v231);
-                                    let v527 =
-                                        constructor_int_to_fpu(ctx, &IntToFpuOp::I32ToF32, v320);
-                                    let v528 = constructor_output_reg(ctx, v527);
-                                    // Rule at src/isa/aarch64/lower.isle line 634.
-                                    return Some(v528);
-                                }
-                            }
-                            F64 => {
-                                let v232 = C::value_type(ctx, v231);
-                                if v232 == I64 {
-                                    let v241 = C::put_in_reg(ctx, v231);
-                                    let v536 =
-                                        constructor_int_to_fpu(ctx, &IntToFpuOp::I64ToF64, v241);
-                                    let v537 = constructor_output_reg(ctx, v536);
-                                    // Rule at src/isa/aarch64/lower.isle line 643.
-                                    return Some(v537);
-                                }
-                                let v509 = C::fits_in_32(ctx, v232);
-                                if let Some(v510) = v509 {
-                                    let v320 = constructor_put_in_reg_sext32(ctx, v231);
-                                    let v530 =
-                                        constructor_int_to_fpu(ctx, &IntToFpuOp::I32ToF64, v320);
-                                    let v531 = constructor_output_reg(ctx, v530);
-                                    // Rule at src/isa/aarch64/lower.isle line 637.
-                                    return Some(v531);
-                                }
-                            }
-                            _ => {}
-                        }
-                        let v117 = C::multi_lane(ctx, v3);
-                        if let Some(v118) = v117 {
-                            match v118.0 {
-                                0x20 => {
-                                    let v232 = C::value_type(ctx, v231);
-                                    let v255 = C::multi_lane(ctx, v232);
-                                    if let Some(v256) = v255 {
-                                        if v256.0 == 0x20 {
-                                            let v241 = C::put_in_reg(ctx, v231);
-                                            let v313 = &constructor_vector_size(ctx, v3);
-                                            let v524 = constructor_vec_misc(
-                                                ctx,
-                                                &VecMisc2::Scvtf,
-                                                v241,
-                                                v313,
-                                            );
-                                            let v525 = constructor_output_reg(ctx, v524);
-                                            // Rule at src/isa/aarch64/lower.isle line 628.
-                                            return Some(v525);
-                                        }
-                                    }
-                                }
-                                0x40 => {
-                                    let v232 = C::value_type(ctx, v231);
-                                    let v255 = C::multi_lane(ctx, v232);
-                                    if let Some(v256) = v255 {
-                                        if v256.0 == 0x40 {
-                                            let v241 = C::put_in_reg(ctx, v231);
-                                            let v313 = &constructor_vector_size(ctx, v3);
-                                            let v524 = constructor_vec_misc(
-                                                ctx,
-                                                &VecMisc2::Scvtf,
-                                                v241,
-                                                v313,
-                                            );
-                                            let v525 = constructor_output_reg(ctx, v524);
-                                            // Rule at src/isa/aarch64/lower.isle line 631.
-                                            return Some(v525);
-                                        }
-                                    }
-                                }
-                                _ => {}
-                            }
-                        }
-                    }
-                }
-                &Opcode::Isplit => {
-                    let v232 = C::value_type(ctx, v231);
-                    if v232 == I128 {
-                        let v233 = C::put_in_regs(ctx, v231);
-                        let v234 = C::value_regs_get(ctx, v233, 0x0);
-                        let v235 = C::value_reg(ctx, v234);
-                        let v236 = C::value_regs_get(ctx, v233, 0x1);
-                        let v237 = C::value_reg(ctx, v236);
-                        let v238 = C::output_pair(ctx, v235, v237);
-                        // Rule at src/isa/aarch64/lower.isle line 246.
-                        return Some(v238);
-                    }
-                }
-                _ => {}
-            }
-        }
-        &InstructionData::UnaryConst {
-            opcode: ref v1237,
-            constant_handle: v1238,
-        } => {
-            if let &Opcode::Vconst = v1237 {
-                let v1 = C::first_result(ctx, arg0);
-                if let Some(v2) = v1 {
-                    let v1243 = C::u64_from_constant(ctx, v1238);
-                    if let Some(v1244) = v1243 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v1245 = C::ty_vec64_ctor(ctx, v3);
-                        if let Some(v1246) = v1245 {
-                            let v1247 = constructor_constant_f64(ctx, v1244);
-                            let v1248 = constructor_output_reg(ctx, v1247);
-                            // Rule at src/isa/aarch64/lower.isle line 2009.
-                            return Some(v1248);
-                        }
-                    }
-                    let v3 = C::value_type(ctx, v2);
-                    let v575 = C::ty_vec128(ctx, v3);
-                    if let Some(v576) = v575 {
-                        let v1239 = C::u128_from_constant(ctx, v1238);
-                        if let Some(v1240) = v1239 {
-                            let v1241 = constructor_constant_f128(ctx, v1240);
-                            let v1242 = constructor_output_reg(ctx, v1241);
-                            // Rule at src/isa/aarch64/lower.isle line 2006.
-                            return Some(v1242);
-                        }
-                    }
-                }
-            }
-        }
-        &InstructionData::UnaryGlobalValue {
-            opcode: ref v1472,
-            global_value: v1473,
-        } => {
-            match v1472 {
-                &Opcode::SymbolValue => {
-                    let v1474 = C::symbol_value_data(ctx, v1473);
-                    if let Some(v1475) = v1474 {
-                        let v1479 = C::box_external_name(ctx, v1475.0);
-                        let v1480 = constructor_load_ext_name(ctx, v1479, v1475.2);
-                        let v1481 = constructor_output_reg(ctx, v1480);
-                        // Rule at src/isa/aarch64/lower.isle line 2243.
-                        return Some(v1481);
-                    }
-                }
-                &Opcode::TlsValue => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v1474 = C::symbol_value_data(ctx, v1473);
-                        if let Some(v1475) = v1474 {
-                            let v3 = C::value_type(ctx, v2);
-                            let v1799 = &C::tls_model(ctx, v3);
-                            match v1799 {
-                                &TlsModel::ElfGd => {
-                                    let v1800 = constructor_elf_tls_get_addr(ctx, v1475.0);
-                                    let v1801 = constructor_output_reg(ctx, v1800);
-                                    // Rule at src/isa/aarch64/lower.isle line 2836.
-                                    return Some(v1801);
-                                }
-                                &TlsModel::Macho => {
-                                    let v1802 = constructor_macho_tls_get_addr(ctx, v1475.0);
-                                    let v1803 = constructor_output_reg(ctx, v1802);
-                                    // Rule at src/isa/aarch64/lower.isle line 2839.
-                                    return Some(v1803);
-                                }
-                                _ => {}
-                            }
-                        }
-                    }
-                }
-                _ => {}
-            }
-        }
-        &InstructionData::UnaryIeee32 {
-            opcode: ref v15,
-            imm: v16,
-        } => {
-            if let &Opcode::F32const = v15 {
-                let v17 = C::u32_from_ieee32(ctx, v16);
-                let v18 = constructor_constant_f32(ctx, v17);
-                let v19 = constructor_output_reg(ctx, v18);
-                // Rule at src/isa/aarch64/lower.isle line 29.
-                return Some(v19);
-            }
-        }
-        &InstructionData::UnaryIeee64 {
-            opcode: ref v20,
-            imm: v21,
-        } => {
-            if let &Opcode::F64const = v20 {
-                let v22 = C::u64_from_ieee64(ctx, v21);
-                let v23 = constructor_constant_f64(ctx, v22);
-                let v24 = constructor_output_reg(ctx, v23);
-                // Rule at src/isa/aarch64/lower.isle line 34.
-                return Some(v24);
-            }
-        }
-        &InstructionData::UnaryImm {
-            opcode: ref v5,
-            imm: v6,
-        } => {
-            if let &Opcode::Iconst = v5 {
-                let v1 = C::first_result(ctx, arg0);
-                if let Some(v2) = v1 {
-                    let v3 = C::value_type(ctx, v2);
-                    let v7 = C::u64_from_imm64(ctx, v6);
-                    let v9 = constructor_imm(ctx, v3, &ImmExtend::Zero, v7);
-                    let v10 = constructor_output_reg(ctx, v9);
-                    // Rule at src/isa/aarch64/lower.isle line 19.
-                    return Some(v10);
-                }
-            }
-        }
-        _ => {}
-    }
-    None
-}
-
-// Generated as internal constructor for term lower_branch.
-pub fn constructor_lower_branch<C: Context>(
-    ctx: &mut C,
-    arg0: Inst,
-    arg1: &VecMachLabel,
-) -> Option<Unit> {
-    let v1 = &C::inst_data(ctx, arg0);
-    match v1 {
-        &InstructionData::BranchTable {
-            opcode: ref v82,
-            arg: v83,
-            table: v84,
-        } => {
-            if let &Opcode::BrTable = v82 {
-                let v85 = C::targets_jt_size(ctx, arg1);
-                let v86 = C::targets_jt_space(ctx, arg1);
-                let v87 = &constructor_emit_island(ctx, v86);
-                let v88 = constructor_side_effect(ctx, v87);
-                let v89 = constructor_put_in_reg_zext32(ctx, v83);
-                let v90 = C::u32_as_u64(ctx, v85);
-                let v91 = constructor_br_table_impl(ctx, v90, v89, arg1);
-                // Rule at src/isa/aarch64/lower.isle line 2902.
-                return Some(v91);
-            }
-        }
-        &InstructionData::Brif {
-            opcode: ref v2,
-            arg: v3,
-            blocks: ref v4,
-        } => {
-            if let &Opcode::Brif = v2 {
-                let v5 = C::maybe_uextend(ctx, v3);
-                if let Some(v6) = v5 {
-                    let v7 = C::def_inst(ctx, v6);
-                    if let Some(v8) = v7 {
-                        let v9 = &C::inst_data(ctx, v8);
-                        match v9 {
-                            &InstructionData::FloatCompare {
-                                opcode: ref v33,
-                                args: ref v34,
-                                cond: ref v35,
-                            } => {
-                                if let &Opcode::Fcmp = v33 {
-                                    let v36 = C::unpack_value_array_2(ctx, v34);
-                                    let v39 = C::value_type(ctx, v36.0);
-                                    let v40 = C::ty_scalar_float(ctx, v39);
-                                    if let Some(v41) = v40 {
-                                        let v42 = &C::fp_cond_code(ctx, v35);
-                                        let v43 = C::branch_target(ctx, arg1, 0x0);
-                                        let v44 = C::branch_target(ctx, arg1, 0x1);
-                                        let v45 = &constructor_scalar_size(ctx, v41);
-                                        let v46 = C::put_in_reg(ctx, v36.0);
-                                        let v47 = C::put_in_reg(ctx, v36.1);
-                                        let v48 = &constructor_fpu_cmp(ctx, v45, v46, v47);
-                                        let v49 = C::cond_br_cond(ctx, v42);
-                                        let v50 = &constructor_cond_br(ctx, v43, v44, v49);
-                                        let v51 =
-                                            &constructor_with_flags_side_effect(ctx, v48, v50);
-                                        let v52 = constructor_emit_side_effect(ctx, v51);
-                                        // Rule at src/isa/aarch64/lower.isle line 2862.
-                                        return Some(v52);
-                                    }
-                                }
-                            }
-                            &InstructionData::IntCompare {
-                                opcode: ref v10,
-                                args: ref v11,
-                                cond: ref v12,
-                            } => {
-                                if let &Opcode::Icmp = v10 {
-                                    let v13 = C::unpack_value_array_2(ctx, v11);
-                                    let v16 = C::value_type(ctx, v13.0);
-                                    let v21 = &constructor_lower_icmp_into_flags(
-                                        ctx, v12, v13.0, v13.1, v16,
-                                    );
-                                    let v22 = &constructor_flags_and_cc_cc(ctx, v21);
-                                    let v23 = &C::cond_code(ctx, v22);
-                                    let v25 = C::branch_target(ctx, arg1, 0x0);
-                                    let v27 = C::branch_target(ctx, arg1, 0x1);
-                                    let v28 = &constructor_flags_and_cc_flags(ctx, v21);
-                                    let v29 = C::cond_br_cond(ctx, v23);
-                                    let v30 = &constructor_cond_br(ctx, v25, v27, v29);
-                                    let v31 = &constructor_with_flags_side_effect(ctx, v28, v30);
-                                    let v32 = constructor_emit_side_effect(ctx, v31);
-                                    // Rule at src/isa/aarch64/lower.isle line 2850.
-                                    return Some(v32);
-                                }
-                            }
-                            _ => {}
-                        }
-                    }
-                }
-                let v53 = C::value_type(ctx, v3);
-                if v53 == I128 {
-                    let v54 = &constructor_flags_to_producesflags(ctx, v3);
-                    let v55 = C::put_in_regs(ctx, v3);
-                    let v57 = C::value_regs_get(ctx, v55, 0x0);
-                    let v59 = C::value_regs_get(ctx, v55, 0x1);
-                    let v61 = constructor_orr(ctx, I64, v57, v59);
-                    let v62 = C::branch_target(ctx, arg1, 0x0);
-                    let v63 = C::branch_target(ctx, arg1, 0x1);
-                    let v64 = C::cond_br_not_zero(ctx, v61);
-                    let v65 = &constructor_cond_br(ctx, v62, v63, v64);
-                    let v66 = &constructor_with_flags_side_effect(ctx, v54, v65);
-                    let v67 = constructor_emit_side_effect(ctx, v66);
-                    // Rule at src/isa/aarch64/lower.isle line 2872.
-                    return Some(v67);
-                }
-                let v68 = C::ty_int_ref_scalar_64(ctx, v53);
-                if let Some(v69) = v68 {
-                    let v54 = &constructor_flags_to_producesflags(ctx, v3);
-                    let v70 = constructor_put_in_reg_zext64(ctx, v3);
-                    let v71 = C::branch_target(ctx, arg1, 0x0);
-                    let v72 = C::branch_target(ctx, arg1, 0x1);
-                    let v73 = C::cond_br_not_zero(ctx, v70);
-                    let v74 = &constructor_cond_br(ctx, v71, v72, v73);
-                    let v75 = &constructor_with_flags_side_effect(ctx, v54, v74);
-                    let v76 = constructor_emit_side_effect(ctx, v75);
-                    // Rule at src/isa/aarch64/lower.isle line 2883.
-                    return Some(v76);
-                }
-            }
-        }
-        &InstructionData::Jump {
-            opcode: ref v77,
-            destination: v78,
-        } => {
-            if let &Opcode::Jump = v77 {
-                let v79 = C::branch_target(ctx, arg1, 0x0);
-                let v80 = &constructor_aarch64_jump(ctx, v79);
-                let v81 = constructor_emit_side_effect(ctx, v80);
-                // Rule at src/isa/aarch64/lower.isle line 2895.
-                return Some(v81);
-            }
-        }
-        _ => {}
-    }
-    None
-}
-
-// Generated as internal constructor for term lower_fmla.
-pub fn constructor_lower_fmla<C: Context>(
-    ctx: &mut C,
-    arg0: &VecALUModOp,
-    arg1: Value,
-    arg2: Value,
-    arg3: Value,
-    arg4: &VectorSize,
-) -> Reg {
-    let v18 = C::def_inst(ctx, arg2);
-    if let Some(v19) = v18 {
-        let v20 = &C::inst_data(ctx, v19);
-        if let &InstructionData::Unary {
-            opcode: ref v21,
-            arg: v22,
-        } = v20
-        {
-            if let &Opcode::Fneg = v21 {
-                let v85 = &constructor_neg_fmla(ctx, arg0);
-                let v87 = constructor_lower_fmla(ctx, v85, arg1, v22, arg3, arg4);
-                // Rule at src/isa/aarch64/lower.isle line 566.
-                return v87;
-            }
-        }
-    }
-    let v9 = C::def_inst(ctx, arg1);
-    if let Some(v10) = v9 {
-        let v11 = &C::inst_data(ctx, v10);
-        if let &InstructionData::Unary {
-            opcode: ref v12,
-            arg: v13,
-        } = v11
-        {
-            if let &Opcode::Fneg = v12 {
-                let v85 = &constructor_neg_fmla(ctx, arg0);
-                let v86 = constructor_lower_fmla(ctx, v85, v13, arg2, arg3, arg4);
-                // Rule at src/isa/aarch64/lower.isle line 564.
-                return v86;
-            }
-        }
-    }
-    match arg4 {
-        &VectorSize::Size32x4 => {
-            if let Some(v19) = v18 {
-                let v20 = &C::inst_data(ctx, v19);
-                if let &InstructionData::LoadNoOffset {
-                    opcode: ref v48,
-                    arg: v49,
-                    flags: v50,
-                } = v20
-                {
-                    if let &Opcode::Bitcast = v48 {
-                        let v51 = C::def_inst(ctx, v49);
-                        if let Some(v52) = v51 {
-                            let v53 = &C::inst_data(ctx, v52);
-                            if let &InstructionData::Shuffle {
-                                opcode: ref v54,
-                                args: ref v55,
-                                imm: v56,
-                            } = v53
-                            {
-                                if let &Opcode::Shuffle = v54 {
-                                    let v60 = C::shuffle32_from_imm(ctx, v56);
-                                    if let Some(v61) = v60 {
-                                        let v66 = C::u8_as_u64(ctx, v61.0);
-                                        let v67 = C::u64_lt(ctx, v66, 0x4);
-                                        if v67 == true {
-                                            let v57 = C::unpack_value_array_2(ctx, v55);
-                                            if v57.0 == v57.1 {
-                                                if v61.0 == v61.1 {
-                                                    if v61.0 == v61.2 {
-                                                        if v61.0 == v61.3 {
-                                                            let v5 = C::put_in_reg(ctx, arg3);
-                                                            let v6 = C::put_in_reg(ctx, arg1);
-                                                            let v68 = C::put_in_reg(ctx, v57.0);
-                                                            let v69 = constructor_vec_fmla_elem(
-                                                                ctx, arg0, v5, v6, v68, arg4, v61.0,
-                                                            );
-                                                            // Rule at src/isa/aarch64/lower.isle line 548.
-                                                            return v69;
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                            }
-                        }
-                    }
-                }
-            }
-            if let Some(v10) = v9 {
-                let v11 = &C::inst_data(ctx, v10);
-                if let &InstructionData::LoadNoOffset {
-                    opcode: ref v25,
-                    arg: v26,
-                    flags: v27,
-                } = v11
-                {
-                    if let &Opcode::Bitcast = v25 {
-                        let v28 = C::def_inst(ctx, v26);
-                        if let Some(v29) = v28 {
-                            let v30 = &C::inst_data(ctx, v29);
-                            if let &InstructionData::Shuffle {
-                                opcode: ref v31,
-                                args: ref v32,
-                                imm: v33,
-                            } = v30
-                            {
-                                if let &Opcode::Shuffle = v31 {
-                                    let v37 = C::shuffle32_from_imm(ctx, v33);
-                                    if let Some(v38) = v37 {
-                                        let v43 = C::u8_as_u64(ctx, v38.0);
-                                        let v45 = C::u64_lt(ctx, v43, 0x4);
-                                        if v45 == true {
-                                            let v34 = C::unpack_value_array_2(ctx, v32);
-                                            if v34.0 == v34.1 {
-                                                if v38.0 == v38.1 {
-                                                    if v38.0 == v38.2 {
-                                                        if v38.0 == v38.3 {
-                                                            let v5 = C::put_in_reg(ctx, arg3);
-                                                            let v14 = C::put_in_reg(ctx, arg2);
-                                                            let v46 = C::put_in_reg(ctx, v34.0);
-                                                            let v47 = constructor_vec_fmla_elem(
-                                                                ctx, arg0, v5, v14, v46, arg4,
-                                                                v38.0,
-                                                            );
-                                                            // Rule at src/isa/aarch64/lower.isle line 545.
-                                                            return v47;
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                            }
-                        }
-                    }
-                }
-            }
-        }
-        &VectorSize::Size64x2 => {
-            if let Some(v19) = v18 {
-                let v20 = &C::inst_data(ctx, v19);
-                if let &InstructionData::LoadNoOffset {
-                    opcode: ref v48,
-                    arg: v49,
-                    flags: v50,
-                } = v20
-                {
-                    if let &Opcode::Bitcast = v48 {
-                        let v51 = C::def_inst(ctx, v49);
-                        if let Some(v52) = v51 {
-                            let v53 = &C::inst_data(ctx, v52);
-                            if let &InstructionData::Shuffle {
-                                opcode: ref v54,
-                                args: ref v55,
-                                imm: v56,
-                            } = v53
-                            {
-                                if let &Opcode::Shuffle = v54 {
-                                    let v78 = C::shuffle64_from_imm(ctx, v56);
-                                    if let Some(v79) = v78 {
-                                        let v82 = C::u8_as_u64(ctx, v79.0);
-                                        let v83 = C::u64_lt(ctx, v82, 0x2);
-                                        if v83 == true {
-                                            let v57 = C::unpack_value_array_2(ctx, v55);
-                                            if v57.0 == v57.1 {
-                                                if v79.0 == v79.1 {
-                                                    let v5 = C::put_in_reg(ctx, arg3);
-                                                    let v6 = C::put_in_reg(ctx, arg1);
-                                                    let v68 = C::put_in_reg(ctx, v57.0);
-                                                    let v84 = constructor_vec_fmla_elem(
-                                                        ctx, arg0, v5, v6, v68, arg4, v79.0,
-                                                    );
-                                                    // Rule at src/isa/aarch64/lower.isle line 554.
-                                                    return v84;
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                            }
-                        }
-                    }
-                }
-            }
-            if let Some(v10) = v9 {
-                let v11 = &C::inst_data(ctx, v10);
-                if let &InstructionData::LoadNoOffset {
-                    opcode: ref v25,
-                    arg: v26,
-                    flags: v27,
-                } = v11
-                {
-                    if let &Opcode::Bitcast = v25 {
-                        let v28 = C::def_inst(ctx, v26);
-                        if let Some(v29) = v28 {
-                            let v30 = &C::inst_data(ctx, v29);
-                            if let &InstructionData::Shuffle {
-                                opcode: ref v31,
-                                args: ref v32,
-                                imm: v33,
-                            } = v30
-                            {
-                                if let &Opcode::Shuffle = v31 {
-                                    let v70 = C::shuffle64_from_imm(ctx, v33);
-                                    if let Some(v71) = v70 {
-                                        let v74 = C::u8_as_u64(ctx, v71.0);
-                                        let v76 = C::u64_lt(ctx, v74, 0x2);
-                                        if v76 == true {
-                                            let v34 = C::unpack_value_array_2(ctx, v32);
-                                            if v34.0 == v34.1 {
-                                                if v71.0 == v71.1 {
-                                                    let v5 = C::put_in_reg(ctx, arg3);
-                                                    let v14 = C::put_in_reg(ctx, arg2);
-                                                    let v46 = C::put_in_reg(ctx, v34.0);
-                                                    let v77 = constructor_vec_fmla_elem(
-                                                        ctx, arg0, v5, v14, v46, arg4, v71.0,
-                                                    );
-                                                    // Rule at src/isa/aarch64/lower.isle line 551.
-                                                    return v77;
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                            }
-                        }
-                    }
-                }
-            }
-        }
-        _ => {}
-    }
-    if let Some(v19) = v18 {
-        let v20 = &C::inst_data(ctx, v19);
-        if let &InstructionData::Unary {
-            opcode: ref v21,
-            arg: v22,
-        } = v20
-        {
-            if let &Opcode::Splat = v21 {
-                let v5 = C::put_in_reg(ctx, arg3);
-                let v6 = C::put_in_reg(ctx, arg1);
-                let v23 = C::put_in_reg(ctx, v22);
-                let v24 = constructor_vec_fmla_elem(ctx, arg0, v5, v6, v23, arg4, 0x0);
-                // Rule at src/isa/aarch64/lower.isle line 535.
-                return v24;
-            }
-        }
-    }
-    if let Some(v10) = v9 {
-        let v11 = &C::inst_data(ctx, v10);
-        if let &InstructionData::Unary {
-            opcode: ref v12,
-            arg: v13,
-        } = v11
-        {
-            if let &Opcode::Splat = v12 {
-                let v5 = C::put_in_reg(ctx, arg3);
-                let v14 = C::put_in_reg(ctx, arg2);
-                let v15 = C::put_in_reg(ctx, v13);
-                let v17 = constructor_vec_fmla_elem(ctx, arg0, v5, v14, v15, arg4, 0x0);
-                // Rule at src/isa/aarch64/lower.isle line 533.
-                return v17;
-            }
-        }
-    }
-    let v5 = C::put_in_reg(ctx, arg3);
-    let v6 = C::put_in_reg(ctx, arg1);
-    let v7 = C::put_in_reg(ctx, arg2);
-    let v8 = constructor_vec_rrr_mod(ctx, arg0, v5, v6, v7, arg4);
-    // Rule at src/isa/aarch64/lower.isle line 528.
-    return v8;
-}
-
-// Generated as internal constructor for term neg_fmla.
-pub fn constructor_neg_fmla<C: Context>(ctx: &mut C, arg0: &VecALUModOp) -> VecALUModOp {
-    match arg0 {
-        &VecALUModOp::Fmla => {
-            // Rule at src/isa/aarch64/lower.isle line 570.
-            return VecALUModOp::Fmls;
-        }
-        &VecALUModOp::Fmls => {
-            // Rule at src/isa/aarch64/lower.isle line 571.
-            return VecALUModOp::Fmla;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "neg_fmla", "src/isa/aarch64/lower.isle line 569"
-    )
-}
-
-// Generated as internal constructor for term put_nonzero_in_reg_zext64.
-pub fn constructor_put_nonzero_in_reg_zext64<C: Context>(ctx: &mut C, arg0: Value) -> Reg {
-    let v4 = C::def_inst(ctx, arg0);
-    if let Some(v5) = v4 {
-        let v6 = &C::inst_data(ctx, v5);
-        if let &InstructionData::UnaryImm {
-            opcode: ref v7,
-            imm: v8,
-        } = v6
-        {
-            if let &Opcode::Iconst = v7 {
-                let v9 = C::nonzero_u64_from_imm64(ctx, v8);
-                if let Some(v10) = v9 {
-                    let v3 = C::value_type(ctx, arg0);
-                    let v12 = constructor_imm(ctx, v3, &ImmExtend::Zero, v10);
-                    // Rule at src/isa/aarch64/lower.isle line 978.
-                    return v12;
-                }
-            }
-        }
-    }
-    let v1 = constructor_put_in_reg_zext64(ctx, arg0);
-    let v2 = constructor_trap_if_zero_divisor(ctx, v1);
-    // Rule at src/isa/aarch64/lower.isle line 973.
-    return v2;
-}
-
-// Generated as internal constructor for term put_nonzero_in_reg_sext64.
-pub fn constructor_put_nonzero_in_reg_sext64<C: Context>(ctx: &mut C, arg0: Value) -> Reg {
-    let v4 = C::def_inst(ctx, arg0);
-    if let Some(v5) = v4 {
-        let v6 = &C::inst_data(ctx, v5);
-        if let &InstructionData::UnaryImm {
-            opcode: ref v7,
-            imm: v8,
-        } = v6
-        {
-            if let &Opcode::Iconst = v7 {
-                let v9 = C::nonzero_u64_from_imm64(ctx, v8);
-                if let Some(v10) = v9 {
-                    let v3 = C::value_type(ctx, arg0);
-                    let v12 = constructor_imm(ctx, v3, &ImmExtend::Sign, v10);
-                    // Rule at src/isa/aarch64/lower.isle line 1021.
-                    return v12;
-                }
-            }
-        }
-    }
-    let v1 = constructor_put_in_reg_sext64(ctx, arg0);
-    let v2 = constructor_trap_if_zero_divisor(ctx, v1);
-    // Rule at src/isa/aarch64/lower.isle line 1016.
-    return v2;
-}
-
-// Generated as internal constructor for term cmp_and_choose.
-pub fn constructor_cmp_and_choose<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &Cond,
-    arg2: bool,
-    arg3: Value,
-    arg4: Value,
-) -> ValueRegs {
-    let v14 = C::fits_in_16(ctx, arg0);
-    if let Some(v15) = v14 {
-        let v7 = C::put_in_reg(ctx, arg3);
-        let v16 = C::ty_bits(ctx, v15);
-        let v18 = constructor_extend(ctx, v7, arg2, v16, 0x20);
-        let v19 = C::put_in_reg(ctx, arg4);
-        let v20 = constructor_extend(ctx, v19, arg2, v16, 0x20);
-        let v21 = &constructor_operand_size(ctx, v15);
-        let v22 = &constructor_cmp(ctx, v21, v18, v20);
-        let v23 = &constructor_csel(ctx, arg1, v18, v20);
-        let v24 = constructor_with_flags_reg(ctx, v22, v23);
-        let v25 = C::value_reg(ctx, v24);
-        // Rule at src/isa/aarch64/lower.isle line 1068.
-        return v25;
-    }
-    let v1 = C::fits_in_64(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v7 = C::put_in_reg(ctx, arg3);
-        let v8 = C::put_in_reg(ctx, arg4);
-        let v9 = &constructor_operand_size(ctx, v2);
-        let v10 = &constructor_cmp(ctx, v9, v7, v8);
-        let v11 = &constructor_csel(ctx, arg1, v7, v8);
-        let v12 = constructor_with_flags_reg(ctx, v10, v11);
-        let v13 = C::value_reg(ctx, v12);
-        // Rule at src/isa/aarch64/lower.isle line 1060.
-        return v13;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "cmp_and_choose", "src/isa/aarch64/lower.isle line 1059"
-    )
-}
-
-// Generated as internal constructor for term lower_shl128.
-pub fn constructor_lower_shl128<C: Context>(ctx: &mut C, arg0: ValueRegs, arg1: Reg) -> ValueRegs {
-    let v3 = C::value_regs_get(ctx, arg0, 0x0);
-    let v5 = C::value_regs_get(ctx, arg0, 0x1);
-    let v7 = constructor_lsl(ctx, I64, v3, arg1);
-    let v8 = constructor_lsl(ctx, I64, v5, arg1);
-    let v10 = C::zero_reg(ctx);
-    let v11 = constructor_orr_not(ctx, I32, v10, arg1);
-    let v13 = C::imm_shift_from_u8(ctx, 0x1);
-    let v14 = constructor_lsr_imm(ctx, I64, v3, v13);
-    let v15 = constructor_lsr(ctx, I64, v14, v11);
-    let v16 = constructor_orr(ctx, I64, v8, v15);
-    let v18 = C::u64_into_imm_logic(ctx, I64, 0x40);
-    let v19 = &constructor_tst_imm(ctx, I64, arg1, v18);
-    let v21 = C::zero_reg(ctx);
-    let v22 = &constructor_csel(ctx, &Cond::Ne, v21, v7);
-    let v23 = &constructor_csel(ctx, &Cond::Ne, v7, v16);
-    let v24 = &constructor_consumes_flags_concat(ctx, v22, v23);
-    let v25 = constructor_with_flags(ctx, v19, v24);
-    // Rule at src/isa/aarch64/lower.isle line 1320.
-    return v25;
-}
-
-// Generated as internal constructor for term do_shift.
-pub fn constructor_do_shift<C: Context>(
-    ctx: &mut C,
-    arg0: &ALUOp,
-    arg1: Type,
-    arg2: Reg,
-    arg3: Value,
-) -> Reg {
-    let v16 = C::def_inst(ctx, arg3);
-    if let Some(v17) = v16 {
-        let v18 = &C::inst_data(ctx, v17);
-        if let &InstructionData::UnaryImm {
-            opcode: ref v19,
-            imm: v20,
-        } = v18
-        {
-            if let &Opcode::Iconst = v19 {
-                let v21 = C::imm_shift_from_imm64(ctx, arg1, v20);
-                if let Some(v22) = v21 {
-                    let v23 = constructor_alu_rr_imm_shift(ctx, arg0, arg1, arg2, v22);
-                    // Rule at src/isa/aarch64/lower.isle line 1383.
-                    return v23;
-                }
-            }
-        }
-    }
-    match arg1 {
-        I32 => {
-            let v6 = C::put_in_regs(ctx, arg3);
-            let v8 = C::value_regs_get(ctx, v6, 0x0);
-            let v13 = constructor_alu_rrr(ctx, arg0, I32, arg2, v8);
-            // Rule at src/isa/aarch64/lower.isle line 1374.
-            return v13;
-        }
-        I64 => {
-            let v6 = C::put_in_regs(ctx, arg3);
-            let v8 = C::value_regs_get(ctx, v6, 0x0);
-            let v15 = constructor_alu_rrr(ctx, arg0, I64, arg2, v8);
-            // Rule at src/isa/aarch64/lower.isle line 1375.
-            return v15;
-        }
-        _ => {}
-    }
-    let v2 = C::fits_in_16(ctx, arg1);
-    if let Some(v3) = v2 {
-        let v6 = C::put_in_regs(ctx, arg3);
-        let v8 = C::value_regs_get(ctx, v6, 0x0);
-        let v10 = C::shift_mask(ctx, v3);
-        let v11 = constructor_and_imm(ctx, I32, v8, v10);
-        let v12 = constructor_alu_rrr(ctx, arg0, I32, arg2, v11);
-        // Rule at src/isa/aarch64/lower.isle line 1365.
-        return v12;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "do_shift", "src/isa/aarch64/lower.isle line 1354"
-    )
-}
-
-// Generated as internal constructor for term lower_ushr128.
-pub fn constructor_lower_ushr128<C: Context>(ctx: &mut C, arg0: ValueRegs, arg1: Reg) -> ValueRegs {
-    let v3 = C::value_regs_get(ctx, arg0, 0x0);
-    let v5 = C::value_regs_get(ctx, arg0, 0x1);
-    let v7 = constructor_lsr(ctx, I64, v3, arg1);
-    let v8 = constructor_lsr(ctx, I64, v5, arg1);
-    let v10 = C::zero_reg(ctx);
-    let v11 = constructor_orr_not(ctx, I32, v10, arg1);
-    let v13 = C::imm_shift_from_u8(ctx, 0x1);
-    let v14 = constructor_lsl_imm(ctx, I64, v5, v13);
-    let v15 = constructor_lsl(ctx, I64, v14, v11);
-    let v16 = constructor_orr(ctx, I64, v7, v15);
-    let v18 = C::u64_into_imm_logic(ctx, I64, 0x40);
-    let v19 = &constructor_tst_imm(ctx, I64, arg1, v18);
-    let v21 = &constructor_csel(ctx, &Cond::Ne, v8, v16);
-    let v22 = C::zero_reg(ctx);
-    let v23 = &constructor_csel(ctx, &Cond::Ne, v22, v8);
-    let v24 = &constructor_consumes_flags_concat(ctx, v21, v23);
-    let v25 = constructor_with_flags(ctx, v19, v24);
-    // Rule at src/isa/aarch64/lower.isle line 1427.
-    return v25;
-}
-
-// Generated as internal constructor for term lower_sshr128.
-pub fn constructor_lower_sshr128<C: Context>(ctx: &mut C, arg0: ValueRegs, arg1: Reg) -> ValueRegs {
-    let v3 = C::value_regs_get(ctx, arg0, 0x0);
-    let v5 = C::value_regs_get(ctx, arg0, 0x1);
-    let v7 = constructor_lsr(ctx, I64, v3, arg1);
-    let v8 = constructor_asr(ctx, I64, v5, arg1);
-    let v10 = C::zero_reg(ctx);
-    let v11 = constructor_orr_not(ctx, I32, v10, arg1);
-    let v13 = C::imm_shift_from_u8(ctx, 0x1);
-    let v14 = constructor_lsl_imm(ctx, I64, v5, v13);
-    let v15 = constructor_lsl(ctx, I64, v14, v11);
-    let v17 = C::imm_shift_from_u8(ctx, 0x3F);
-    let v18 = constructor_asr_imm(ctx, I64, v5, v17);
-    let v19 = constructor_orr(ctx, I64, v7, v15);
-    let v21 = C::u64_into_imm_logic(ctx, I64, 0x40);
-    let v22 = &constructor_tst_imm(ctx, I64, arg1, v21);
-    let v24 = &constructor_csel(ctx, &Cond::Ne, v8, v19);
-    let v25 = &constructor_csel(ctx, &Cond::Ne, v18, v8);
-    let v26 = &constructor_consumes_flags_concat(ctx, v24, v25);
-    let v27 = constructor_with_flags(ctx, v22, v26);
-    // Rule at src/isa/aarch64/lower.isle line 1486.
-    return v27;
-}
-
-// Generated as internal constructor for term small_rotr.
-pub fn constructor_small_rotr<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v4 = C::rotr_mask(ctx, arg0);
-    let v5 = constructor_and_imm(ctx, I32, arg2, v4);
-    let v6 = C::ty_bits(ctx, arg0);
-    let v7 = C::u8_into_imm12(ctx, v6);
-    let v8 = constructor_sub_imm(ctx, I32, v5, v7);
-    let v9 = C::zero_reg(ctx);
-    let v10 = constructor_sub(ctx, I32, v9, v8);
-    let v11 = constructor_lsr(ctx, I32, arg1, v5);
-    let v12 = constructor_lsl(ctx, I32, arg1, v10);
-    let v13 = constructor_orr(ctx, I32, v12, v11);
-    // Rule at src/isa/aarch64/lower.isle line 1605.
-    return v13;
-}
-
-// Generated as internal constructor for term small_rotr_imm.
-pub fn constructor_small_rotr_imm<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: ImmShift,
-) -> Reg {
-    let v4 = constructor_lsr_imm(ctx, I32, arg1, arg2);
-    let v5 = C::rotr_opposite_amount(ctx, arg0, arg2);
-    let v6 = constructor_lsl_imm(ctx, I32, arg1, v5);
-    let v7 = constructor_orr(ctx, I32, v6, v4);
-    // Rule at src/isa/aarch64/lower.isle line 1626.
-    return v7;
-}
-
-// Generated as internal constructor for term lower_clz128.
-pub fn constructor_lower_clz128<C: Context>(ctx: &mut C, arg0: ValueRegs) -> ValueRegs {
-    let v3 = C::value_regs_get(ctx, arg0, 0x1);
-    let v4 = constructor_a64_clz(ctx, I64, v3);
-    let v6 = C::value_regs_get(ctx, arg0, 0x0);
-    let v7 = constructor_a64_clz(ctx, I64, v6);
-    let v9 = C::imm_shift_from_u8(ctx, 0x6);
-    let v10 = constructor_lsr_imm(ctx, I64, v4, v9);
-    let v11 = constructor_madd(ctx, I64, v7, v10, v4);
-    let v14 = constructor_imm(ctx, I64, &ImmExtend::Zero, 0x0);
-    let v15 = C::value_regs(ctx, v11, v14);
-    // Rule at src/isa/aarch64/lower.isle line 1691.
-    return v15;
-}
-
-// Generated as internal constructor for term put_in_reg_ext32.
-pub fn constructor_put_in_reg_ext32<C: Context>(
-    ctx: &mut C,
-    arg0: Value,
-    arg1: &ArgumentExtension,
-) -> Reg {
-    match arg1 {
-        &ArgumentExtension::Uext => {
-            let v3 = constructor_put_in_reg_zext32(ctx, arg0);
-            // Rule at src/isa/aarch64/lower.isle line 2596.
-            return v3;
-        }
-        &ArgumentExtension::Sext => {
-            let v2 = constructor_put_in_reg_sext32(ctx, arg0);
-            // Rule at src/isa/aarch64/lower.isle line 2594.
-            return v2;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "put_in_reg_ext32", "src/isa/aarch64/lower.isle line 2593"
-    )
-}
-
-// Generated as internal constructor for term overflow_op_small.
-pub fn constructor_overflow_op_small<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Value,
-    arg2: Value,
-    arg3: &ArgumentExtension,
-    arg4: &ALUOp,
-) -> InstOutput {
-    let v5 = &constructor_lower_extend_op(ctx, arg0, arg3);
-    let v6 = constructor_put_in_reg_ext32(ctx, arg1, arg3);
-    let v7 = C::put_in_reg(ctx, arg2);
-    let v8 = constructor_alu_rrr_extend(ctx, arg4, arg0, v6, v7, v5);
-    let v10 = &constructor_cmp_extend(ctx, &OperandSize::Size32, v8, v8, v5);
-    let v12 = &constructor_cset(ctx, &Cond::Ne);
-    let v13 = constructor_with_flags_reg(ctx, v10, v12);
-    let v14 = C::value_reg(ctx, v8);
-    let v15 = C::value_reg(ctx, v13);
-    let v16 = C::output_pair(ctx, v14, v15);
-    // Rule at src/isa/aarch64/lower.isle line 2602.
-    return v16;
-}
-
-// Generated as internal constructor for term overflow_op_normal.
-pub fn constructor_overflow_op_normal<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Value,
-    arg2: Value,
-    arg3: &ALUOp,
-    arg4: &Cond,
-) -> InstOutput {
-    let v5 = C::put_in_reg(ctx, arg1);
-    let v6 = C::put_in_reg(ctx, arg2);
-    let v7 = &constructor_alu_rrr_with_flags_paired(ctx, arg0, v5, v6, arg3);
-    let v8 = &constructor_cset_paired(ctx, arg4);
-    let v9 = constructor_with_flags(ctx, v7, v8);
-    let v11 = C::value_regs_get(ctx, v9, 0x0);
-    let v12 = C::value_reg(ctx, v11);
-    let v14 = C::value_regs_get(ctx, v9, 0x1);
-    let v15 = C::value_reg(ctx, v14);
-    let v16 = C::output_pair(ctx, v12, v15);
-    // Rule at src/isa/aarch64/lower.isle line 2631.
-    return v16;
-}
-
-// Generated as internal constructor for term overflow_op_128.
-pub fn constructor_overflow_op_128<C: Context>(
-    ctx: &mut C,
-    arg0: Value,
-    arg1: Value,
-    arg2: &ALUOp,
-    arg3: &ALUOp,
-    arg4: &Cond,
-) -> InstOutput {
-    let v5 = C::put_in_regs(ctx, arg0);
-    let v7 = C::value_regs_get(ctx, v5, 0x0);
-    let v9 = C::value_regs_get(ctx, v5, 0x1);
-    let v10 = C::put_in_regs(ctx, arg1);
-    let v11 = C::value_regs_get(ctx, v10, 0x0);
-    let v12 = C::value_regs_get(ctx, v10, 0x1);
-    let v14 = &constructor_alu_rrr_with_flags_paired(ctx, I64, v7, v11, arg2);
-    let v15 = &constructor_alu_rrr_with_flags_chained(ctx, I64, v9, v12, arg3);
-    let v16 = &constructor_cset_paired(ctx, arg4);
-    let v17 = &constructor_with_flags_chained(ctx, v14, v15, v16);
-    let v18 = constructor_multi_reg_to_pair_and_single(ctx, v17);
-    // Rule at src/isa/aarch64/lower.isle line 2642.
-    return v18;
-}
diff --git a/cranelift/codegen/isle_generated_code/isle_opt.rs b/cranelift/codegen/isle_generated_code/isle_opt.rs
deleted file mode 100644
index 30abca21da70..000000000000
--- a/cranelift/codegen/isle_generated_code/isle_opt.rs
+++ /dev/null
@@ -1,6676 +0,0 @@
-// GENERATED BY ISLE. DO NOT EDIT!
-//
-// Generated automatically from the instruction-selection DSL code in:
-// - src/prelude.isle
-// - src/prelude_opt.isle
-// - src/opts/arithmetic.isle
-// - src/opts/bitops.isle
-// - src/opts/cprop.isle
-// - src/opts/extends.isle
-// - src/opts/icmp.isle
-// - src/opts/remat.isle
-// - src/opts/selects.isle
-// - src/opts/shifts.isle
-// - src/opts/vector.isle
-// - /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle
-
-use super::*; // Pulls in all external types.
-use std::marker::PhantomData;
-
-/// Context during lowering: an implementation of this trait
-/// must be provided with all external constructors and extractors.
-/// A mutable borrow is passed along through all lowering logic.
-pub trait Context {
-    fn unit(&mut self) -> Unit;
-    fn value_type(&mut self, arg0: Value) -> Type;
-    fn u32_nonnegative(&mut self, arg0: u32) -> Option<u32>;
-    fn offset32(&mut self, arg0: Offset32) -> u32;
-    fn u32_lteq(&mut self, arg0: u32, arg1: u32) -> Option<Unit>;
-    fn u8_lteq(&mut self, arg0: u8, arg1: u8) -> Option<Unit>;
-    fn u8_lt(&mut self, arg0: u8, arg1: u8) -> Option<Unit>;
-    fn simm32(&mut self, arg0: Imm64) -> Option<u32>;
-    fn uimm8(&mut self, arg0: Imm64) -> Option<u8>;
-    fn u8_as_u32(&mut self, arg0: u8) -> u32;
-    fn u8_as_u64(&mut self, arg0: u8) -> u64;
-    fn u16_as_u64(&mut self, arg0: u16) -> u64;
-    fn u32_as_u64(&mut self, arg0: u32) -> u64;
-    fn i64_as_u64(&mut self, arg0: i64) -> u64;
-    fn i64_neg(&mut self, arg0: i64) -> i64;
-    fn u128_as_u64(&mut self, arg0: u128) -> Option<u64>;
-    fn u64_as_u32(&mut self, arg0: u64) -> Option<u32>;
-    fn u64_as_i32(&mut self, arg0: u64) -> i32;
-    fn u8_and(&mut self, arg0: u8, arg1: u8) -> u8;
-    fn u8_shl(&mut self, arg0: u8, arg1: u8) -> u8;
-    fn u8_shr(&mut self, arg0: u8, arg1: u8) -> u8;
-    fn u32_add(&mut self, arg0: u32, arg1: u32) -> u32;
-    fn u32_sub(&mut self, arg0: u32, arg1: u32) -> u32;
-    fn u32_and(&mut self, arg0: u32, arg1: u32) -> u32;
-    fn s32_add_fallible(&mut self, arg0: u32, arg1: u32) -> Option<u32>;
-    fn u64_add(&mut self, arg0: u64, arg1: u64) -> u64;
-    fn u64_sub(&mut self, arg0: u64, arg1: u64) -> u64;
-    fn u64_mul(&mut self, arg0: u64, arg1: u64) -> u64;
-    fn u64_sdiv(&mut self, arg0: u64, arg1: u64) -> Option<u64>;
-    fn u64_udiv(&mut self, arg0: u64, arg1: u64) -> Option<u64>;
-    fn u64_and(&mut self, arg0: u64, arg1: u64) -> u64;
-    fn u64_or(&mut self, arg0: u64, arg1: u64) -> u64;
-    fn u64_xor(&mut self, arg0: u64, arg1: u64) -> u64;
-    fn u64_shl(&mut self, arg0: u64, arg1: u64) -> u64;
-    fn imm64_shl(&mut self, arg0: Type, arg1: Imm64, arg2: Imm64) -> Imm64;
-    fn imm64_ushr(&mut self, arg0: Type, arg1: Imm64, arg2: Imm64) -> Imm64;
-    fn imm64_sshr(&mut self, arg0: Type, arg1: Imm64, arg2: Imm64) -> Imm64;
-    fn u64_not(&mut self, arg0: u64) -> u64;
-    fn u64_eq(&mut self, arg0: u64, arg1: u64) -> bool;
-    fn u64_le(&mut self, arg0: u64, arg1: u64) -> bool;
-    fn u64_lt(&mut self, arg0: u64, arg1: u64) -> bool;
-    fn i64_sextend_imm64(&mut self, arg0: Type, arg1: Imm64) -> i64;
-    fn u64_uextend_imm64(&mut self, arg0: Type, arg1: Imm64) -> u64;
-    fn imm64_icmp(&mut self, arg0: Type, arg1: &IntCC, arg2: Imm64, arg3: Imm64) -> Imm64;
-    fn u64_is_zero(&mut self, arg0: u64) -> bool;
-    fn u64_is_odd(&mut self, arg0: u64) -> bool;
-    fn ty_umin(&mut self, arg0: Type) -> u64;
-    fn ty_umax(&mut self, arg0: Type) -> u64;
-    fn ty_smin(&mut self, arg0: Type) -> u64;
-    fn ty_smax(&mut self, arg0: Type) -> u64;
-    fn ty_bits(&mut self, arg0: Type) -> u8;
-    fn ty_bits_u16(&mut self, arg0: Type) -> u16;
-    fn ty_bits_u64(&mut self, arg0: Type) -> u64;
-    fn ty_mask(&mut self, arg0: Type) -> u64;
-    fn ty_lane_mask(&mut self, arg0: Type) -> u64;
-    fn ty_lane_count(&mut self, arg0: Type) -> u64;
-    fn ty_bytes(&mut self, arg0: Type) -> u16;
-    fn lane_type(&mut self, arg0: Type) -> Type;
-    fn ty_half_lanes(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_half_width(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_equal(&mut self, arg0: Type, arg1: Type) -> bool;
-    fn mem_flags_trusted(&mut self) -> MemFlags;
-    fn intcc_reverse(&mut self, arg0: &IntCC) -> IntCC;
-    fn intcc_inverse(&mut self, arg0: &IntCC) -> IntCC;
-    fn floatcc_reverse(&mut self, arg0: &FloatCC) -> FloatCC;
-    fn floatcc_inverse(&mut self, arg0: &FloatCC) -> FloatCC;
-    fn floatcc_unordered(&mut self, arg0: &FloatCC) -> bool;
-    fn fits_in_16(&mut self, arg0: Type) -> Option<Type>;
-    fn fits_in_32(&mut self, arg0: Type) -> Option<Type>;
-    fn lane_fits_in_32(&mut self, arg0: Type) -> Option<Type>;
-    fn fits_in_64(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_32(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_64(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_int_ref_scalar_64_extract(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_int_ref_scalar_64(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_32_or_64(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_8_or_16(&mut self, arg0: Type) -> Option<Type>;
-    fn int_fits_in_32(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_int_ref_64(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_int_ref_16_to_64(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_int(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_scalar(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_scalar_float(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_float_or_vec(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_vector_float(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_vector_not_float(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_vec64(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_vec64_ctor(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_vec128(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_dyn_vec64(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_dyn_vec128(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_vec64_int(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_vec128_int(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_addr64(&mut self, arg0: Type) -> Option<Type>;
-    fn not_vec32x2(&mut self, arg0: Type) -> Option<Type>;
-    fn not_i64x2(&mut self, arg0: Type) -> Option<()>;
-    fn u8_from_uimm8(&mut self, arg0: Uimm8) -> u8;
-    fn u64_from_bool(&mut self, arg0: bool) -> u64;
-    fn u64_from_imm64(&mut self, arg0: Imm64) -> u64;
-    fn nonzero_u64_from_imm64(&mut self, arg0: Imm64) -> Option<u64>;
-    fn imm64_power_of_two(&mut self, arg0: Imm64) -> Option<u64>;
-    fn imm64(&mut self, arg0: u64) -> Imm64;
-    fn imm64_masked(&mut self, arg0: Type, arg1: u64) -> Imm64;
-    fn u32_from_ieee32(&mut self, arg0: Ieee32) -> u32;
-    fn u64_from_ieee64(&mut self, arg0: Ieee64) -> u64;
-    fn multi_lane(&mut self, arg0: Type) -> Option<(u32, u32)>;
-    fn dynamic_lane(&mut self, arg0: Type) -> Option<(u32, u32)>;
-    fn dynamic_int_lane(&mut self, arg0: Type) -> Option<u32>;
-    fn dynamic_fp_lane(&mut self, arg0: Type) -> Option<u32>;
-    fn ty_dyn64_int(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_dyn128_int(&mut self, arg0: Type) -> Option<Type>;
-    fn offset32_to_u32(&mut self, arg0: Offset32) -> u32;
-    fn u32_to_offset32(&mut self, arg0: u32) -> Offset32;
-    fn intcc_unsigned(&mut self, arg0: &IntCC) -> IntCC;
-    fn signed_cond_code(&mut self, arg0: &IntCC) -> Option<IntCC>;
-    fn trap_code_division_by_zero(&mut self) -> TrapCode;
-    fn trap_code_integer_overflow(&mut self) -> TrapCode;
-    fn trap_code_bad_conversion_to_integer(&mut self) -> TrapCode;
-    fn range(&mut self, arg0: usize, arg1: usize) -> Range;
-    fn range_view(&mut self, arg0: Range) -> RangeView;
-    type inst_data_etor_iter: ContextIter<Context = Self, Output = (Type, InstructionData)>;
-    fn inst_data_etor(&mut self, arg0: Value) -> Self::inst_data_etor_iter;
-    fn make_inst_ctor(&mut self, arg0: Type, arg1: &InstructionData) -> Value;
-    fn value_array_2_ctor(&mut self, arg0: Value, arg1: Value) -> ValueArray2;
-    fn value_array_3_ctor(&mut self, arg0: Value, arg1: Value, arg2: Value) -> ValueArray3;
-    fn remat(&mut self, arg0: Value) -> Value;
-    fn subsume(&mut self, arg0: Value) -> Value;
-    fn splat64(&mut self, arg0: u64) -> Constant;
-    fn unpack_value_array_2(&mut self, arg0: &ValueArray2) -> (Value, Value);
-    fn pack_value_array_2(&mut self, arg0: Value, arg1: Value) -> ValueArray2;
-    fn unpack_value_array_3(&mut self, arg0: &ValueArray3) -> (Value, Value, Value);
-    fn pack_value_array_3(&mut self, arg0: Value, arg1: Value, arg2: Value) -> ValueArray3;
-    fn unpack_block_array_2(&mut self, arg0: &BlockArray2) -> (BlockCall, BlockCall);
-    fn pack_block_array_2(&mut self, arg0: BlockCall, arg1: BlockCall) -> BlockArray2;
-}
-
-pub trait ContextIter {
-    type Context;
-    type Output;
-    fn next(&mut self, ctx: &mut Self::Context) -> Option<Self::Output>;
-}
-
-pub struct ContextIterWrapper<Item, I: Iterator<Item = Item>, C: Context> {
-    iter: I,
-    _ctx: PhantomData<C>,
-}
-impl<Item, I: Iterator<Item = Item>, C: Context> From<I> for ContextIterWrapper<Item, I, C> {
-    fn from(iter: I) -> Self {
-        Self {
-            iter,
-            _ctx: PhantomData,
-        }
-    }
-}
-impl<Item, I: Iterator<Item = Item>, C: Context> ContextIter for ContextIterWrapper<Item, I, C> {
-    type Context = C;
-    type Output = Item;
-    fn next(&mut self, _ctx: &mut Self::Context) -> Option<Self::Output> {
-        self.iter.next()
-    }
-}
-
-// Generated as internal constructor for term eq.
-pub fn constructor_eq<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
-    let v4 = constructor_icmp(ctx, arg0, &IntCC::Equal, arg1, arg2);
-    // Rule at src/prelude_opt.isle line 20.
-    return v4;
-}
-
-// Generated as internal constructor for term ne.
-pub fn constructor_ne<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
-    let v4 = constructor_icmp(ctx, arg0, &IntCC::NotEqual, arg1, arg2);
-    // Rule at src/prelude_opt.isle line 21.
-    return v4;
-}
-
-// Generated as internal constructor for term ult.
-pub fn constructor_ult<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
-    let v4 = constructor_icmp(ctx, arg0, &IntCC::UnsignedLessThan, arg1, arg2);
-    // Rule at src/prelude_opt.isle line 22.
-    return v4;
-}
-
-// Generated as internal constructor for term ule.
-pub fn constructor_ule<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
-    let v4 = constructor_icmp(ctx, arg0, &IntCC::UnsignedLessThanOrEqual, arg1, arg2);
-    // Rule at src/prelude_opt.isle line 23.
-    return v4;
-}
-
-// Generated as internal constructor for term ugt.
-pub fn constructor_ugt<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
-    let v4 = constructor_icmp(ctx, arg0, &IntCC::UnsignedGreaterThan, arg1, arg2);
-    // Rule at src/prelude_opt.isle line 24.
-    return v4;
-}
-
-// Generated as internal constructor for term uge.
-pub fn constructor_uge<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
-    let v4 = constructor_icmp(ctx, arg0, &IntCC::UnsignedGreaterThanOrEqual, arg1, arg2);
-    // Rule at src/prelude_opt.isle line 25.
-    return v4;
-}
-
-// Generated as internal constructor for term slt.
-pub fn constructor_slt<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
-    let v4 = constructor_icmp(ctx, arg0, &IntCC::SignedLessThan, arg1, arg2);
-    // Rule at src/prelude_opt.isle line 26.
-    return v4;
-}
-
-// Generated as internal constructor for term sle.
-pub fn constructor_sle<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
-    let v4 = constructor_icmp(ctx, arg0, &IntCC::SignedLessThanOrEqual, arg1, arg2);
-    // Rule at src/prelude_opt.isle line 27.
-    return v4;
-}
-
-// Generated as internal constructor for term sgt.
-pub fn constructor_sgt<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
-    let v4 = constructor_icmp(ctx, arg0, &IntCC::SignedGreaterThan, arg1, arg2);
-    // Rule at src/prelude_opt.isle line 28.
-    return v4;
-}
-
-// Generated as internal constructor for term sge.
-pub fn constructor_sge<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
-    let v4 = constructor_icmp(ctx, arg0, &IntCC::SignedGreaterThanOrEqual, arg1, arg2);
-    // Rule at src/prelude_opt.isle line 29.
-    return v4;
-}
-
-// Generated as internal constructor for term simplify.
-pub fn constructor_simplify<C: Context>(
-    ctx: &mut C,
-    arg0: Value,
-) -> impl ContextIter<Context = C, Output = Value> {
-    let mut returns = ConstructorVec::new();
-    let v1 = C::inst_data_etor(ctx, arg0);
-    let mut v1 = v1;
-    while let Some(v2) = v1.next(ctx) {
-        match &v2.1 {
-            &InstructionData::Binary {
-                opcode: ref v5,
-                args: ref v6,
-            } => {
-                match v5 {
-                    &Opcode::Iadd => {
-                        let v7 = C::unpack_value_array_2(ctx, v6);
-                        let v18 = C::inst_data_etor(ctx, v7.0);
-                        let mut v18 = v18;
-                        while let Some(v19) = v18.next(ctx) {
-                            match &v19.1 {
-                                &InstructionData::Binary {
-                                    opcode: ref v123,
-                                    args: ref v124,
-                                } => {
-                                    match v123 {
-                                        &Opcode::Iadd => {
-                                            if v2.0 == v19.0 {
-                                                let v10 = C::inst_data_etor(ctx, v7.1);
-                                                let mut v10 = v10;
-                                                while let Some(v11) = v10.next(ctx) {
-                                                    if let &InstructionData::UnaryImm {
-                                                        opcode: ref v14,
-                                                        imm: v15,
-                                                    } = &v11.1
-                                                    {
-                                                        if let &Opcode::Iconst = v14 {
-                                                            if v2.0 == v11.0 {
-                                                                let v125 = C::unpack_value_array_2(
-                                                                    ctx, v124,
-                                                                );
-                                                                let v135 =
-                                                                    C::inst_data_etor(ctx, v125.1);
-                                                                let mut v135 = v135;
-                                                                while let Some(v136) =
-                                                                    v135.next(ctx)
-                                                                {
-                                                                    if let &InstructionData::UnaryImm {
-                                                                        opcode: ref v139,
-                                                                        imm: v140,
-                                                                    } = &v136.1 {
-                                                                        if let &Opcode::Iconst = v139 {
-                                                                            if v2.0 == v136.0 {
-                                                                                let v257 = constructor_iadd(ctx, v2.0, v125.1, v7.1);
-                                                                                let v258 = constructor_iadd(ctx, v2.0, v125.0, v257);
-                                                                                // Rule at src/opts/cprop.isle line 125.
-                                                                                returns.push(v258);
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                        &Opcode::Isub => {
-                                            if v2.0 == v19.0 {
-                                                let v10 = C::inst_data_etor(ctx, v7.1);
-                                                let mut v10 = v10;
-                                                while let Some(v11) = v10.next(ctx) {
-                                                    if let &InstructionData::UnaryImm {
-                                                        opcode: ref v14,
-                                                        imm: v15,
-                                                    } = &v11.1
-                                                    {
-                                                        if let &Opcode::Iconst = v14 {
-                                                            if v2.0 == v11.0 {
-                                                                let v125 = C::unpack_value_array_2(
-                                                                    ctx, v124,
-                                                                );
-                                                                let v135 =
-                                                                    C::inst_data_etor(ctx, v125.1);
-                                                                let mut v135 = v135;
-                                                                while let Some(v136) =
-                                                                    v135.next(ctx)
-                                                                {
-                                                                    if let &InstructionData::UnaryImm {
-                                                                        opcode: ref v139,
-                                                                        imm: v140,
-                                                                    } = &v136.1 {
-                                                                        if let &Opcode::Iconst = v139 {
-                                                                            if v2.0 == v136.0 {
-                                                                                let v16 = C::u64_from_imm64(ctx, v15);
-                                                                                let v141 = C::u64_from_imm64(ctx, v140);
-                                                                                let v270 = C::u64_sub(ctx, v16, v141);
-                                                                                let v271 = C::imm64_masked(ctx, v2.0, v270);
-                                                                                let v272 = constructor_iconst(ctx, v2.0, v271);
-                                                                                let v274 = constructor_iadd(ctx, v2.0, v125.0, v272);
-                                                                                // Rule at src/opts/cprop.isle line 147.
-                                                                                returns.push(v274);
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                }
-                                                                let v156 =
-                                                                    C::inst_data_etor(ctx, v125.0);
-                                                                let mut v156 = v156;
-                                                                while let Some(v157) =
-                                                                    v156.next(ctx)
-                                                                {
-                                                                    if let &InstructionData::UnaryImm {
-                                                                        opcode: ref v263,
-                                                                        imm: v264,
-                                                                    } = &v157.1 {
-                                                                        if let &Opcode::Iconst = v263 {
-                                                                            if v2.0 == v157.0 {
-                                                                                let v265 = C::u64_from_imm64(ctx, v264);
-                                                                                let v16 = C::u64_from_imm64(ctx, v15);
-                                                                                let v275 = C::u64_add(ctx, v265, v16);
-                                                                                let v276 = C::imm64_masked(ctx, v2.0, v275);
-                                                                                let v277 = constructor_iconst(ctx, v2.0, v276);
-                                                                                let v278 = constructor_isub(ctx, v2.0, v277, v125.1);
-                                                                                // Rule at src/opts/cprop.isle line 151.
-                                                                                returns.push(v278);
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                        _ => {}
-                                    }
-                                }
-                                &InstructionData::Unary {
-                                    opcode: ref v36,
-                                    arg: v37,
-                                } => {
-                                    if let &Opcode::Bnot = v36 {
-                                        if v2.0 == v19.0 {
-                                            let v10 = C::inst_data_etor(ctx, v7.1);
-                                            let mut v10 = v10;
-                                            while let Some(v11) = v10.next(ctx) {
-                                                if let &InstructionData::UnaryImm {
-                                                    opcode: ref v14,
-                                                    imm: v15,
-                                                } = &v11.1
-                                                {
-                                                    if let &Opcode::Iconst = v14 {
-                                                        let v16 = C::u64_from_imm64(ctx, v15);
-                                                        if v16 == 0x1 {
-                                                            if v2.0 == v11.0 {
-                                                                let v55 = constructor_ineg(
-                                                                    ctx, v2.0, v37,
-                                                                );
-                                                                // Rule at src/opts/arithmetic.isle line 71.
-                                                                returns.push(v55);
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                                &InstructionData::UnaryImm {
-                                    opcode: ref v22,
-                                    imm: v23,
-                                } => {
-                                    if let &Opcode::Iconst = v22 {
-                                        if v2.0 == v19.0 {
-                                            let v24 = C::u64_from_imm64(ctx, v23);
-                                            match v24 {
-                                                0x0 => {
-                                                    let v25 = C::subsume(ctx, v7.1);
-                                                    // Rule at src/opts/arithmetic.isle line 9.
-                                                    returns.push(v25);
-                                                }
-                                                0x1 => {
-                                                    let v10 = C::inst_data_etor(ctx, v7.1);
-                                                    let mut v10 = v10;
-                                                    while let Some(v11) = v10.next(ctx) {
-                                                        if let &InstructionData::Unary {
-                                                            opcode: ref v38,
-                                                            arg: v39,
-                                                        } = &v11.1
-                                                        {
-                                                            if let &Opcode::Bnot = v38 {
-                                                                if v2.0 == v11.0 {
-                                                                    let v56 = constructor_ineg(
-                                                                        ctx, v2.0, v39,
-                                                                    );
-                                                                    // Rule at src/opts/arithmetic.isle line 73.
-                                                                    returns.push(v56);
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                                _ => {}
-                                            }
-                                            let v248 = constructor_iadd(ctx, v2.0, v7.1, v7.0);
-                                            // Rule at src/opts/cprop.isle line 94.
-                                            returns.push(v248);
-                                        }
-                                        let v44 = C::fits_in_64(ctx, v2.0);
-                                        if let Some(v45) = v44 {
-                                            if v19.0 == v45 {
-                                                let v10 = C::inst_data_etor(ctx, v7.1);
-                                                let mut v10 = v10;
-                                                while let Some(v11) = v10.next(ctx) {
-                                                    if let &InstructionData::UnaryImm {
-                                                        opcode: ref v14,
-                                                        imm: v15,
-                                                    } = &v11.1
-                                                    {
-                                                        if let &Opcode::Iconst = v14 {
-                                                            if v11.0 == v19.0 {
-                                                                let v24 =
-                                                                    C::u64_from_imm64(ctx, v23);
-                                                                let v16 =
-                                                                    C::u64_from_imm64(ctx, v15);
-                                                                let v163 =
-                                                                    C::u64_add(ctx, v24, v16);
-                                                                let v164 =
-                                                                    C::imm64_masked(ctx, v45, v163);
-                                                                let v165 = constructor_iconst(
-                                                                    ctx, v45, v164,
-                                                                );
-                                                                let v166 = C::subsume(ctx, v165);
-                                                                // Rule at src/opts/cprop.isle line 3.
-                                                                returns.push(v166);
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                        let v406 = C::remat(ctx, arg0);
-                                        // Rule at src/opts/remat.isle line 4.
-                                        returns.push(v406);
-                                    }
-                                }
-                                _ => {}
-                            }
-                        }
-                        let v10 = C::inst_data_etor(ctx, v7.1);
-                        let mut v10 = v10;
-                        while let Some(v11) = v10.next(ctx) {
-                            if let &InstructionData::UnaryImm {
-                                opcode: ref v14,
-                                imm: v15,
-                            } = &v11.1
-                            {
-                                if let &Opcode::Iconst = v14 {
-                                    let v16 = C::u64_from_imm64(ctx, v15);
-                                    if v16 == 0x0 {
-                                        if v2.0 == v11.0 {
-                                            let v17 = C::subsume(ctx, v7.0);
-                                            // Rule at src/opts/arithmetic.isle line 5.
-                                            returns.push(v17);
-                                        }
-                                    }
-                                    let v406 = C::remat(ctx, arg0);
-                                    // Rule at src/opts/remat.isle line 6.
-                                    returns.push(v406);
-                                }
-                            }
-                        }
-                    }
-                    &Opcode::Isub => {
-                        let v7 = C::unpack_value_array_2(ctx, v6);
-                        let v18 = C::inst_data_etor(ctx, v7.0);
-                        let mut v18 = v18;
-                        while let Some(v19) = v18.next(ctx) {
-                            match &v19.1 {
-                                &InstructionData::Binary {
-                                    opcode: ref v123,
-                                    args: ref v124,
-                                } => {
-                                    match v123 {
-                                        &Opcode::Iadd => {
-                                            if v2.0 == v19.0 {
-                                                let v10 = C::inst_data_etor(ctx, v7.1);
-                                                let mut v10 = v10;
-                                                while let Some(v11) = v10.next(ctx) {
-                                                    if let &InstructionData::UnaryImm {
-                                                        opcode: ref v14,
-                                                        imm: v15,
-                                                    } = &v11.1
-                                                    {
-                                                        if let &Opcode::Iconst = v14 {
-                                                            if v2.0 == v11.0 {
-                                                                let v125 = C::unpack_value_array_2(
-                                                                    ctx, v124,
-                                                                );
-                                                                let v135 =
-                                                                    C::inst_data_etor(ctx, v125.1);
-                                                                let mut v135 = v135;
-                                                                while let Some(v136) =
-                                                                    v135.next(ctx)
-                                                                {
-                                                                    if let &InstructionData::UnaryImm {
-                                                                        opcode: ref v139,
-                                                                        imm: v140,
-                                                                    } = &v136.1 {
-                                                                        if let &Opcode::Iconst = v139 {
-                                                                            if v2.0 == v136.0 {
-                                                                                let v16 = C::u64_from_imm64(ctx, v15);
-                                                                                let v141 = C::u64_from_imm64(ctx, v140);
-                                                                                let v270 = C::u64_sub(ctx, v16, v141);
-                                                                                let v271 = C::imm64_masked(ctx, v2.0, v270);
-                                                                                let v272 = constructor_iconst(ctx, v2.0, v271);
-                                                                                let v273 = constructor_isub(ctx, v2.0, v125.0, v272);
-                                                                                // Rule at src/opts/cprop.isle line 143.
-                                                                                returns.push(v273);
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                        &Opcode::Isub => {
-                                            if v2.0 == v19.0 {
-                                                let v10 = C::inst_data_etor(ctx, v7.1);
-                                                let mut v10 = v10;
-                                                while let Some(v11) = v10.next(ctx) {
-                                                    if let &InstructionData::UnaryImm {
-                                                        opcode: ref v14,
-                                                        imm: v15,
-                                                    } = &v11.1
-                                                    {
-                                                        if let &Opcode::Iconst = v14 {
-                                                            if v2.0 == v11.0 {
-                                                                let v125 = C::unpack_value_array_2(
-                                                                    ctx, v124,
-                                                                );
-                                                                let v135 =
-                                                                    C::inst_data_etor(ctx, v125.1);
-                                                                let mut v135 = v135;
-                                                                while let Some(v136) =
-                                                                    v135.next(ctx)
-                                                                {
-                                                                    if let &InstructionData::UnaryImm {
-                                                                        opcode: ref v139,
-                                                                        imm: v140,
-                                                                    } = &v136.1 {
-                                                                        if let &Opcode::Iconst = v139 {
-                                                                            if v2.0 == v136.0 {
-                                                                                let v141 = C::u64_from_imm64(ctx, v140);
-                                                                                let v16 = C::u64_from_imm64(ctx, v15);
-                                                                                let v259 = C::u64_add(ctx, v141, v16);
-                                                                                let v260 = C::imm64_masked(ctx, v2.0, v259);
-                                                                                let v261 = constructor_iconst(ctx, v2.0, v260);
-                                                                                let v262 = constructor_isub(ctx, v2.0, v125.0, v261);
-                                                                                // Rule at src/opts/cprop.isle line 135.
-                                                                                returns.push(v262);
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                }
-                                                                let v156 =
-                                                                    C::inst_data_etor(ctx, v125.0);
-                                                                let mut v156 = v156;
-                                                                while let Some(v157) =
-                                                                    v156.next(ctx)
-                                                                {
-                                                                    if let &InstructionData::UnaryImm {
-                                                                        opcode: ref v263,
-                                                                        imm: v264,
-                                                                    } = &v157.1 {
-                                                                        if let &Opcode::Iconst = v263 {
-                                                                            if v2.0 == v157.0 {
-                                                                                let v265 = C::u64_from_imm64(ctx, v264);
-                                                                                let v16 = C::u64_from_imm64(ctx, v15);
-                                                                                let v266 = C::u64_sub(ctx, v265, v16);
-                                                                                let v267 = C::imm64_masked(ctx, v2.0, v266);
-                                                                                let v268 = constructor_iconst(ctx, v2.0, v267);
-                                                                                let v269 = constructor_isub(ctx, v2.0, v268, v125.1);
-                                                                                // Rule at src/opts/cprop.isle line 139.
-                                                                                returns.push(v269);
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                        _ => {}
-                                    }
-                                }
-                                &InstructionData::Unary {
-                                    opcode: ref v36,
-                                    arg: v37,
-                                } => {
-                                    if let &Opcode::Bnot = v36 {
-                                        if v2.0 == v19.0 {
-                                            let v10 = C::inst_data_etor(ctx, v7.1);
-                                            let mut v10 = v10;
-                                            while let Some(v11) = v10.next(ctx) {
-                                                if let &InstructionData::UnaryImm {
-                                                    opcode: ref v14,
-                                                    imm: v15,
-                                                } = &v11.1
-                                                {
-                                                    if let &Opcode::Iconst = v14 {
-                                                        let v52 =
-                                                            C::i64_sextend_imm64(ctx, v2.0, v15);
-                                                        if v52 == -0x1 {
-                                                            if v2.0 == v11.0 {
-                                                                let v55 = constructor_ineg(
-                                                                    ctx, v2.0, v37,
-                                                                );
-                                                                // Rule at src/opts/arithmetic.isle line 75.
-                                                                returns.push(v55);
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                                &InstructionData::UnaryImm {
-                                    opcode: ref v22,
-                                    imm: v23,
-                                } => {
-                                    if let &Opcode::Iconst = v22 {
-                                        if v2.0 == v19.0 {
-                                            let v24 = C::u64_from_imm64(ctx, v23);
-                                            if v24 == 0x0 {
-                                                let v26 = constructor_ineg(ctx, v2.0, v7.1);
-                                                // Rule at src/opts/arithmetic.isle line 19.
-                                                returns.push(v26);
-                                            }
-                                            let v249 = constructor_isub(ctx, v2.0, v7.1, v7.0);
-                                            let v250 = constructor_ineg(ctx, v2.0, v249);
-                                            // Rule at src/opts/cprop.isle line 99.
-                                            returns.push(v250);
-                                        }
-                                        let v44 = C::fits_in_64(ctx, v2.0);
-                                        if let Some(v45) = v44 {
-                                            if v19.0 == v45 {
-                                                let v10 = C::inst_data_etor(ctx, v7.1);
-                                                let mut v10 = v10;
-                                                while let Some(v11) = v10.next(ctx) {
-                                                    if let &InstructionData::UnaryImm {
-                                                        opcode: ref v14,
-                                                        imm: v15,
-                                                    } = &v11.1
-                                                    {
-                                                        if let &Opcode::Iconst = v14 {
-                                                            if v11.0 == v19.0 {
-                                                                let v24 =
-                                                                    C::u64_from_imm64(ctx, v23);
-                                                                let v16 =
-                                                                    C::u64_from_imm64(ctx, v15);
-                                                                let v167 =
-                                                                    C::u64_sub(ctx, v24, v16);
-                                                                let v168 =
-                                                                    C::imm64_masked(ctx, v45, v167);
-                                                                let v169 = constructor_iconst(
-                                                                    ctx, v45, v168,
-                                                                );
-                                                                let v170 = C::subsume(ctx, v169);
-                                                                // Rule at src/opts/cprop.isle line 9.
-                                                                returns.push(v170);
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                        let v406 = C::remat(ctx, arg0);
-                                        // Rule at src/opts/remat.isle line 8.
-                                        returns.push(v406);
-                                    }
-                                }
-                                _ => {}
-                            }
-                        }
-                        let v10 = C::inst_data_etor(ctx, v7.1);
-                        let mut v10 = v10;
-                        while let Some(v11) = v10.next(ctx) {
-                            if let &InstructionData::UnaryImm {
-                                opcode: ref v14,
-                                imm: v15,
-                            } = &v11.1
-                            {
-                                if let &Opcode::Iconst = v14 {
-                                    let v16 = C::u64_from_imm64(ctx, v15);
-                                    if v16 == 0x0 {
-                                        if v2.0 == v11.0 {
-                                            let v17 = C::subsume(ctx, v7.0);
-                                            // Rule at src/opts/arithmetic.isle line 14.
-                                            returns.push(v17);
-                                        }
-                                    }
-                                    let v406 = C::remat(ctx, arg0);
-                                    // Rule at src/opts/remat.isle line 10.
-                                    returns.push(v406);
-                                }
-                            }
-                        }
-                        if v7.0 == v7.1 {
-                            let v44 = C::fits_in_64(ctx, v2.0);
-                            if let Some(v45) = v44 {
-                                let v46 = C::ty_int(ctx, v45);
-                                if let Some(v47) = v46 {
-                                    let v49 = C::imm64(ctx, 0x0);
-                                    let v50 = constructor_iconst(ctx, v47, v49);
-                                    let v51 = C::subsume(ctx, v50);
-                                    // Rule at src/opts/arithmetic.isle line 40.
-                                    returns.push(v51);
-                                }
-                            }
-                        }
-                    }
-                    &Opcode::Imul => {
-                        let v7 = C::unpack_value_array_2(ctx, v6);
-                        let v18 = C::inst_data_etor(ctx, v7.0);
-                        let mut v18 = v18;
-                        while let Some(v19) = v18.next(ctx) {
-                            match &v19.1 {
-                                &InstructionData::Binary {
-                                    opcode: ref v123,
-                                    args: ref v124,
-                                } => {
-                                    if let &Opcode::Imul = v123 {
-                                        if v2.0 == v19.0 {
-                                            let v10 = C::inst_data_etor(ctx, v7.1);
-                                            let mut v10 = v10;
-                                            while let Some(v11) = v10.next(ctx) {
-                                                if let &InstructionData::UnaryImm {
-                                                    opcode: ref v14,
-                                                    imm: v15,
-                                                } = &v11.1
-                                                {
-                                                    if let &Opcode::Iconst = v14 {
-                                                        if v2.0 == v11.0 {
-                                                            let v125 =
-                                                                C::unpack_value_array_2(ctx, v124);
-                                                            let v135 =
-                                                                C::inst_data_etor(ctx, v125.1);
-                                                            let mut v135 = v135;
-                                                            while let Some(v136) = v135.next(ctx) {
-                                                                if let &InstructionData::UnaryImm {
-                                                                    opcode: ref v139,
-                                                                    imm: v140,
-                                                                } = &v136.1 {
-                                                                    if let &Opcode::Iconst = v139 {
-                                                                        if v2.0 == v136.0 {
-                                                                            let v279 = constructor_imul(ctx, v2.0, v125.1, v7.1);
-                                                                            let v280 = constructor_imul(ctx, v2.0, v125.0, v279);
-                                                                            // Rule at src/opts/cprop.isle line 156.
-                                                                            returns.push(v280);
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                                &InstructionData::Unary {
-                                    opcode: ref v36,
-                                    arg: v37,
-                                } => {
-                                    if let &Opcode::Ineg = v36 {
-                                        if v2.0 == v19.0 {
-                                            let v10 = C::inst_data_etor(ctx, v7.1);
-                                            let mut v10 = v10;
-                                            while let Some(v11) = v10.next(ctx) {
-                                                if let &InstructionData::Unary {
-                                                    opcode: ref v38,
-                                                    arg: v39,
-                                                } = &v11.1
-                                                {
-                                                    if let &Opcode::Ineg = v38 {
-                                                        if v2.0 == v11.0 {
-                                                            let v40 = constructor_imul(
-                                                                ctx, v2.0, v37, v39,
-                                                            );
-                                                            let v41 = C::subsume(ctx, v40);
-                                                            // Rule at src/opts/arithmetic.isle line 28.
-                                                            returns.push(v41);
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                                &InstructionData::UnaryImm {
-                                    opcode: ref v22,
-                                    imm: v23,
-                                } => {
-                                    if let &Opcode::Iconst = v22 {
-                                        if v2.0 == v19.0 {
-                                            let v24 = C::u64_from_imm64(ctx, v23);
-                                            match v24 {
-                                                0x0 => {
-                                                    let v17 = C::subsume(ctx, v7.0);
-                                                    // Rule at src/opts/arithmetic.isle line 57.
-                                                    returns.push(v17);
-                                                }
-                                                0x1 => {
-                                                    let v25 = C::subsume(ctx, v7.1);
-                                                    // Rule at src/opts/arithmetic.isle line 47.
-                                                    returns.push(v25);
-                                                }
-                                                _ => {}
-                                            }
-                                            let v54 = C::i64_sextend_imm64(ctx, v2.0, v23);
-                                            if v54 == -0x1 {
-                                                let v26 = constructor_ineg(ctx, v2.0, v7.1);
-                                                // Rule at src/opts/arithmetic.isle line 66.
-                                                returns.push(v26);
-                                            }
-                                            let v251 = constructor_imul(ctx, v2.0, v7.1, v7.0);
-                                            // Rule at src/opts/cprop.isle line 102.
-                                            returns.push(v251);
-                                        }
-                                        let v44 = C::fits_in_64(ctx, v2.0);
-                                        if let Some(v45) = v44 {
-                                            if v19.0 == v45 {
-                                                let v10 = C::inst_data_etor(ctx, v7.1);
-                                                let mut v10 = v10;
-                                                while let Some(v11) = v10.next(ctx) {
-                                                    if let &InstructionData::UnaryImm {
-                                                        opcode: ref v14,
-                                                        imm: v15,
-                                                    } = &v11.1
-                                                    {
-                                                        if let &Opcode::Iconst = v14 {
-                                                            if v11.0 == v19.0 {
-                                                                let v24 =
-                                                                    C::u64_from_imm64(ctx, v23);
-                                                                let v16 =
-                                                                    C::u64_from_imm64(ctx, v15);
-                                                                let v171 =
-                                                                    C::u64_mul(ctx, v24, v16);
-                                                                let v172 =
-                                                                    C::imm64_masked(ctx, v45, v171);
-                                                                let v173 = constructor_iconst(
-                                                                    ctx, v45, v172,
-                                                                );
-                                                                let v174 = C::subsume(ctx, v173);
-                                                                // Rule at src/opts/cprop.isle line 15.
-                                                                returns.push(v174);
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                        let v82 = C::simm32(ctx, v23);
-                                        if let Some(v83) = v82 {
-                                            if v83 == 0x2 {
-                                                let v84 = constructor_iadd(ctx, v2.0, v7.1, v7.1);
-                                                // Rule at src/opts/arithmetic.isle line 105.
-                                                returns.push(v84);
-                                            }
-                                        }
-                                        let v90 = C::imm64_power_of_two(ctx, v23);
-                                        if let Some(v91) = v90 {
-                                            let v92 = C::imm64(ctx, v91);
-                                            let v93 = constructor_iconst(ctx, v2.0, v92);
-                                            let v94 = constructor_ishl(ctx, v2.0, v7.1, v93);
-                                            // Rule at src/opts/arithmetic.isle line 114.
-                                            returns.push(v94);
-                                        }
-                                    }
-                                }
-                                _ => {}
-                            }
-                        }
-                        let v10 = C::inst_data_etor(ctx, v7.1);
-                        let mut v10 = v10;
-                        while let Some(v11) = v10.next(ctx) {
-                            if let &InstructionData::UnaryImm {
-                                opcode: ref v14,
-                                imm: v15,
-                            } = &v11.1
-                            {
-                                if let &Opcode::Iconst = v14 {
-                                    if v2.0 == v11.0 {
-                                        let v16 = C::u64_from_imm64(ctx, v15);
-                                        match v16 {
-                                            0x0 => {
-                                                let v25 = C::subsume(ctx, v7.1);
-                                                // Rule at src/opts/arithmetic.isle line 53.
-                                                returns.push(v25);
-                                            }
-                                            0x1 => {
-                                                let v17 = C::subsume(ctx, v7.0);
-                                                // Rule at src/opts/arithmetic.isle line 43.
-                                                returns.push(v17);
-                                            }
-                                            _ => {}
-                                        }
-                                        let v52 = C::i64_sextend_imm64(ctx, v2.0, v15);
-                                        if v52 == -0x1 {
-                                            let v53 = constructor_ineg(ctx, v2.0, v7.0);
-                                            // Rule at src/opts/arithmetic.isle line 63.
-                                            returns.push(v53);
-                                        }
-                                    }
-                                    let v79 = C::simm32(ctx, v15);
-                                    if let Some(v80) = v79 {
-                                        if v80 == 0x2 {
-                                            let v81 = constructor_iadd(ctx, v2.0, v7.0, v7.0);
-                                            // Rule at src/opts/arithmetic.isle line 103.
-                                            returns.push(v81);
-                                        }
-                                    }
-                                    let v85 = C::imm64_power_of_two(ctx, v15);
-                                    if let Some(v86) = v85 {
-                                        let v87 = C::imm64(ctx, v86);
-                                        let v88 = constructor_iconst(ctx, v2.0, v87);
-                                        let v89 = constructor_ishl(ctx, v2.0, v7.0, v88);
-                                        // Rule at src/opts/arithmetic.isle line 112.
-                                        returns.push(v89);
-                                    }
-                                }
-                            }
-                        }
-                    }
-                    &Opcode::Udiv => {
-                        let v7 = C::unpack_value_array_2(ctx, v6);
-                        let v10 = C::inst_data_etor(ctx, v7.1);
-                        let mut v10 = v10;
-                        while let Some(v11) = v10.next(ctx) {
-                            if let &InstructionData::UnaryImm {
-                                opcode: ref v14,
-                                imm: v15,
-                            } = &v11.1
-                            {
-                                if let &Opcode::Iconst = v14 {
-                                    let v16 = C::u64_from_imm64(ctx, v15);
-                                    if v16 == 0x1 {
-                                        if v2.0 == v11.0 {
-                                            let v17 = C::subsume(ctx, v7.0);
-                                            // Rule at src/opts/arithmetic.isle line 94.
-                                            returns.push(v17);
-                                        }
-                                    }
-                                    let v44 = C::fits_in_64(ctx, v2.0);
-                                    if let Some(v45) = v44 {
-                                        if v11.0 == v45 {
-                                            let v18 = C::inst_data_etor(ctx, v7.0);
-                                            let mut v18 = v18;
-                                            while let Some(v19) = v18.next(ctx) {
-                                                if let &InstructionData::UnaryImm {
-                                                    opcode: ref v22,
-                                                    imm: v23,
-                                                } = &v19.1
-                                                {
-                                                    if let &Opcode::Iconst = v22 {
-                                                        let v24 = C::u64_from_imm64(ctx, v23);
-                                                        let v180 = C::u64_udiv(ctx, v24, v16);
-                                                        if let Some(v181) = v180 {
-                                                            if v11.0 == v19.0 {
-                                                                let v182 =
-                                                                    C::imm64_masked(ctx, v45, v181);
-                                                                let v183 = constructor_iconst(
-                                                                    ctx, v45, v182,
-                                                                );
-                                                                let v184 = C::subsume(ctx, v183);
-                                                                // Rule at src/opts/cprop.isle line 28.
-                                                                returns.push(v184);
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                            }
-                        }
-                    }
-                    &Opcode::Sdiv => {
-                        let v7 = C::unpack_value_array_2(ctx, v6);
-                        let v10 = C::inst_data_etor(ctx, v7.1);
-                        let mut v10 = v10;
-                        while let Some(v11) = v10.next(ctx) {
-                            if let &InstructionData::UnaryImm {
-                                opcode: ref v14,
-                                imm: v15,
-                            } = &v11.1
-                            {
-                                if let &Opcode::Iconst = v14 {
-                                    let v16 = C::u64_from_imm64(ctx, v15);
-                                    if v16 == 0x1 {
-                                        if v2.0 == v11.0 {
-                                            let v17 = C::subsume(ctx, v7.0);
-                                            // Rule at src/opts/arithmetic.isle line 90.
-                                            returns.push(v17);
-                                        }
-                                    }
-                                    let v44 = C::fits_in_64(ctx, v2.0);
-                                    if let Some(v45) = v44 {
-                                        if v11.0 == v45 {
-                                            let v18 = C::inst_data_etor(ctx, v7.0);
-                                            let mut v18 = v18;
-                                            while let Some(v19) = v18.next(ctx) {
-                                                if let &InstructionData::UnaryImm {
-                                                    opcode: ref v22,
-                                                    imm: v23,
-                                                } = &v19.1
-                                                {
-                                                    if let &Opcode::Iconst = v22 {
-                                                        let v24 = C::u64_from_imm64(ctx, v23);
-                                                        let v175 = C::u64_sdiv(ctx, v24, v16);
-                                                        if let Some(v176) = v175 {
-                                                            if v11.0 == v19.0 {
-                                                                let v177 =
-                                                                    C::imm64_masked(ctx, v45, v176);
-                                                                let v178 = constructor_iconst(
-                                                                    ctx, v45, v177,
-                                                                );
-                                                                let v179 = C::subsume(ctx, v178);
-                                                                // Rule at src/opts/cprop.isle line 21.
-                                                                returns.push(v179);
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                            }
-                        }
-                    }
-                    &Opcode::Band => {
-                        let v7 = C::unpack_value_array_2(ctx, v6);
-                        let v18 = C::inst_data_etor(ctx, v7.0);
-                        let mut v18 = v18;
-                        while let Some(v19) = v18.next(ctx) {
-                            match &v19.1 {
-                                &InstructionData::Binary {
-                                    opcode: ref v123,
-                                    args: ref v124,
-                                } => {
-                                    if let &Opcode::Band = v123 {
-                                        if v2.0 == v19.0 {
-                                            let v10 = C::inst_data_etor(ctx, v7.1);
-                                            let mut v10 = v10;
-                                            while let Some(v11) = v10.next(ctx) {
-                                                if let &InstructionData::UnaryImm {
-                                                    opcode: ref v14,
-                                                    imm: v15,
-                                                } = &v11.1
-                                                {
-                                                    if let &Opcode::Iconst = v14 {
-                                                        if v2.0 == v11.0 {
-                                                            let v125 =
-                                                                C::unpack_value_array_2(ctx, v124);
-                                                            let v135 =
-                                                                C::inst_data_etor(ctx, v125.1);
-                                                            let mut v135 = v135;
-                                                            while let Some(v136) = v135.next(ctx) {
-                                                                if let &InstructionData::UnaryImm {
-                                                                    opcode: ref v139,
-                                                                    imm: v140,
-                                                                } = &v136.1 {
-                                                                    if let &Opcode::Iconst = v139 {
-                                                                        if v2.0 == v136.0 {
-                                                                            let v283 = constructor_band(ctx, v2.0, v125.1, v7.1);
-                                                                            let v284 = constructor_band(ctx, v2.0, v125.0, v283);
-                                                                            // Rule at src/opts/cprop.isle line 162.
-                                                                            returns.push(v284);
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                                &InstructionData::IntCompare {
-                                    opcode: ref v367,
-                                    args: ref v368,
-                                    cond: ref v369,
-                                } => {
-                                    if let &Opcode::Icmp = v367 {
-                                        let v10 = C::inst_data_etor(ctx, v7.1);
-                                        let mut v10 = v10;
-                                        while let Some(v11) = v10.next(ctx) {
-                                            match &v11.1 {
-                                                &InstructionData::IntCompare {
-                                                    opcode: ref v392,
-                                                    args: ref v393,
-                                                    cond: ref v394,
-                                                } => {
-                                                    if let &Opcode::Icmp = v392 {
-                                                        let v44 = C::fits_in_64(ctx, v2.0);
-                                                        if let Some(v45) = v44 {
-                                                            let v398 = constructor_intcc_comparable(
-                                                                ctx, v369, v394,
-                                                            );
-                                                            if let Some(v399) = v398 {
-                                                                if v11.0 == v19.0 {
-                                                                    if v11.0 == v45 {
-                                                                        let v370 =
-                                                                            C::unpack_value_array_2(
-                                                                                ctx, v368,
-                                                                            );
-                                                                        let v395 =
-                                                                            C::unpack_value_array_2(
-                                                                                ctx, v393,
-                                                                            );
-                                                                        if v370.0 == v395.0 {
-                                                                            if v370.1 == v395.1 {
-                                                                                let v400 = constructor_decompose_intcc(ctx, v369);
-                                                                                let v401 = constructor_decompose_intcc(ctx, v394);
-                                                                                let v402 =
-                                                                                    C::u64_and(
-                                                                                        ctx, v400,
-                                                                                        v401,
-                                                                                    );
-                                                                                let v403 = constructor_compose_icmp(ctx, v45, v402, v399, v370.0, v370.1);
-                                                                                // Rule at src/opts/icmp.isle line 128.
-                                                                                returns.push(v403);
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                                &InstructionData::UnaryImm {
-                                                    opcode: ref v14,
-                                                    imm: v15,
-                                                } => {
-                                                    if let &Opcode::Iconst = v14 {
-                                                        let v16 = C::u64_from_imm64(ctx, v15);
-                                                        if v16 == 0x1 {
-                                                            let v365 = C::ty_int(ctx, v2.0);
-                                                            if let Some(v366) = v365 {
-                                                                // Rule at src/opts/icmp.isle line 39.
-                                                                returns.push(v7.0);
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                                _ => {}
-                                            }
-                                        }
-                                    }
-                                }
-                                &InstructionData::Unary {
-                                    opcode: ref v36,
-                                    arg: v37,
-                                } => {
-                                    match v36 {
-                                        &Opcode::Bnot => {
-                                            let v44 = C::fits_in_64(ctx, v2.0);
-                                            if let Some(v45) = v44 {
-                                                let v46 = C::ty_int(ctx, v45);
-                                                if let Some(v47) = v46 {
-                                                    if v7.1 == v37 {
-                                                        if v19.0 == v47 {
-                                                            let v49 = C::imm64(ctx, 0x0);
-                                                            let v50 =
-                                                                constructor_iconst(ctx, v47, v49);
-                                                            let v51 = C::subsume(ctx, v50);
-                                                            // Rule at src/opts/bitops.isle line 50.
-                                                            returns.push(v51);
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                        &Opcode::Uextend => {
-                                            let v10 = C::inst_data_etor(ctx, v7.1);
-                                            let mut v10 = v10;
-                                            while let Some(v11) = v10.next(ctx) {
-                                                if let &InstructionData::UnaryImm {
-                                                    opcode: ref v14,
-                                                    imm: v15,
-                                                } = &v11.1
-                                                {
-                                                    if let &Opcode::Iconst = v14 {
-                                                        let v16 = C::u64_from_imm64(ctx, v15);
-                                                        if v16 == 0x1 {
-                                                            let v365 = C::ty_int(ctx, v2.0);
-                                                            if let Some(v366) = v365 {
-                                                                let v373 =
-                                                                    C::inst_data_etor(ctx, v37);
-                                                                let mut v373 = v373;
-                                                                while let Some(v374) =
-                                                                    v373.next(ctx)
-                                                                {
-                                                                    if let &InstructionData::IntCompare {
-                                                                        opcode: ref v377,
-                                                                        args: ref v378,
-                                                                        cond: ref v379,
-                                                                    } = &v374.1 {
-                                                                        if let &Opcode::Icmp = v377 {
-                                                                            // Rule at src/opts/icmp.isle line 44.
-                                                                            returns.push(v7.0);
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                        let v320 = C::value_type(ctx, v37);
-                                                        let v321 = C::ty_mask(ctx, v320);
-                                                        let v322 = C::u64_and(ctx, v16, v321);
-                                                        let v323 = C::u64_eq(ctx, v321, v322);
-                                                        if v323 == true {
-                                                            // Rule at src/opts/extends.isle line 9.
-                                                            returns.push(v7.0);
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                        &Opcode::Sextend => {
-                                            let v10 = C::inst_data_etor(ctx, v7.1);
-                                            let mut v10 = v10;
-                                            while let Some(v11) = v10.next(ctx) {
-                                                if let &InstructionData::UnaryImm {
-                                                    opcode: ref v14,
-                                                    imm: v15,
-                                                } = &v11.1
-                                                {
-                                                    if let &Opcode::Iconst = v14 {
-                                                        let v16 = C::u64_from_imm64(ctx, v15);
-                                                        let v320 = C::value_type(ctx, v37);
-                                                        let v321 = C::ty_mask(ctx, v320);
-                                                        let v324 = C::u64_eq(ctx, v16, v321);
-                                                        if v324 == true {
-                                                            let v325 =
-                                                                constructor_uextend(ctx, v2.0, v37);
-                                                            // Rule at src/opts/extends.isle line 15.
-                                                            returns.push(v325);
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                        _ => {}
-                                    }
-                                }
-                                &InstructionData::UnaryImm {
-                                    opcode: ref v22,
-                                    imm: v23,
-                                } => {
-                                    if let &Opcode::Iconst = v22 {
-                                        if v2.0 == v19.0 {
-                                            let v24 = C::u64_from_imm64(ctx, v23);
-                                            if v24 == 0x0 {
-                                                let v17 = C::subsume(ctx, v7.0);
-                                                // Rule at src/opts/bitops.isle line 48.
-                                                returns.push(v17);
-                                            }
-                                            let v54 = C::i64_sextend_imm64(ctx, v2.0, v23);
-                                            if v54 == -0x1 {
-                                                let v25 = C::subsume(ctx, v7.1);
-                                                // Rule at src/opts/bitops.isle line 42.
-                                                returns.push(v25);
-                                            }
-                                            let v253 = constructor_band(ctx, v2.0, v7.1, v7.0);
-                                            // Rule at src/opts/cprop.isle line 109.
-                                            returns.push(v253);
-                                        }
-                                        let v44 = C::fits_in_64(ctx, v2.0);
-                                        if let Some(v45) = v44 {
-                                            if v19.0 == v45 {
-                                                let v10 = C::inst_data_etor(ctx, v7.1);
-                                                let mut v10 = v10;
-                                                while let Some(v11) = v10.next(ctx) {
-                                                    if let &InstructionData::UnaryImm {
-                                                        opcode: ref v14,
-                                                        imm: v15,
-                                                    } = &v11.1
-                                                    {
-                                                        if let &Opcode::Iconst = v14 {
-                                                            if v11.0 == v19.0 {
-                                                                let v24 =
-                                                                    C::u64_from_imm64(ctx, v23);
-                                                                let v16 =
-                                                                    C::u64_from_imm64(ctx, v15);
-                                                                let v189 =
-                                                                    C::u64_and(ctx, v24, v16);
-                                                                let v190 =
-                                                                    C::imm64_masked(ctx, v45, v189);
-                                                                let v191 = constructor_iconst(
-                                                                    ctx, v45, v190,
-                                                                );
-                                                                let v192 = C::subsume(ctx, v191);
-                                                                // Rule at src/opts/cprop.isle line 41.
-                                                                returns.push(v192);
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                        let v406 = C::remat(ctx, arg0);
-                                        // Rule at src/opts/remat.isle line 12.
-                                        returns.push(v406);
-                                    }
-                                }
-                                _ => {}
-                            }
-                        }
-                        let v10 = C::inst_data_etor(ctx, v7.1);
-                        let mut v10 = v10;
-                        while let Some(v11) = v10.next(ctx) {
-                            match &v11.1 {
-                                &InstructionData::Unary {
-                                    opcode: ref v38,
-                                    arg: v39,
-                                } => {
-                                    if let &Opcode::Bnot = v38 {
-                                        if v7.0 == v39 {
-                                            let v44 = C::fits_in_64(ctx, v2.0);
-                                            if let Some(v45) = v44 {
-                                                let v46 = C::ty_int(ctx, v45);
-                                                if let Some(v47) = v46 {
-                                                    if v11.0 == v47 {
-                                                        let v49 = C::imm64(ctx, 0x0);
-                                                        let v50 = constructor_iconst(ctx, v47, v49);
-                                                        let v51 = C::subsume(ctx, v50);
-                                                        // Rule at src/opts/bitops.isle line 49.
-                                                        returns.push(v51);
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                                &InstructionData::UnaryImm {
-                                    opcode: ref v14,
-                                    imm: v15,
-                                } => {
-                                    if let &Opcode::Iconst = v14 {
-                                        if v2.0 == v11.0 {
-                                            let v16 = C::u64_from_imm64(ctx, v15);
-                                            if v16 == 0x0 {
-                                                let v25 = C::subsume(ctx, v7.1);
-                                                // Rule at src/opts/bitops.isle line 47.
-                                                returns.push(v25);
-                                            }
-                                            let v52 = C::i64_sextend_imm64(ctx, v2.0, v15);
-                                            if v52 == -0x1 {
-                                                let v17 = C::subsume(ctx, v7.0);
-                                                // Rule at src/opts/bitops.isle line 39.
-                                                returns.push(v17);
-                                            }
-                                        }
-                                        let v406 = C::remat(ctx, arg0);
-                                        // Rule at src/opts/remat.isle line 14.
-                                        returns.push(v406);
-                                    }
-                                }
-                                _ => {}
-                            }
-                        }
-                        if v7.0 == v7.1 {
-                            let v17 = C::subsume(ctx, v7.0);
-                            // Rule at src/opts/bitops.isle line 38.
-                            returns.push(v17);
-                        }
-                    }
-                    &Opcode::Bor => {
-                        let v7 = C::unpack_value_array_2(ctx, v6);
-                        let v18 = C::inst_data_etor(ctx, v7.0);
-                        let mut v18 = v18;
-                        while let Some(v19) = v18.next(ctx) {
-                            match &v19.1 {
-                                &InstructionData::Binary {
-                                    opcode: ref v123,
-                                    args: ref v124,
-                                } => {
-                                    match v123 {
-                                        &Opcode::Band => {
-                                            if v2.0 == v19.0 {
-                                                let v10 = C::inst_data_etor(ctx, v7.1);
-                                                let mut v10 = v10;
-                                                while let Some(v11) = v10.next(ctx) {
-                                                    match &v11.1 {
-                                                        &InstructionData::Unary {
-                                                            opcode: ref v38,
-                                                            arg: v39,
-                                                        } => {
-                                                            if let &Opcode::Bnot = v38 {
-                                                                if v2.0 == v11.0 {
-                                                                    let v125 =
-                                                                        C::unpack_value_array_2(
-                                                                            ctx, v124,
-                                                                        );
-                                                                    if v39 == v125.1 {
-                                                                        let v128 = constructor_bor(
-                                                                            ctx, v2.0, v125.0, v7.1,
-                                                                        );
-                                                                        // Rule at src/opts/bitops.isle line 64.
-                                                                        returns.push(v128);
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                        &InstructionData::UnaryImm {
-                                                            opcode: ref v14,
-                                                            imm: v15,
-                                                        } => {
-                                                            if let &Opcode::Iconst = v14 {
-                                                                if v2.0 == v11.0 {
-                                                                    let v125 =
-                                                                        C::unpack_value_array_2(
-                                                                            ctx, v124,
-                                                                        );
-                                                                    let v135 = C::inst_data_etor(
-                                                                        ctx, v125.1,
-                                                                    );
-                                                                    let mut v135 = v135;
-                                                                    while let Some(v136) =
-                                                                        v135.next(ctx)
-                                                                    {
-                                                                        if let &InstructionData::UnaryImm {
-                                                                            opcode: ref v139,
-                                                                            imm: v140,
-                                                                        } = &v136.1 {
-                                                                            if let &Opcode::Iconst = v139 {
-                                                                                let v142 = C::ty_mask(ctx, v2.0);
-                                                                                let v16 = C::u64_from_imm64(ctx, v15);
-                                                                                let v143 = C::u64_and(ctx, v142, v16);
-                                                                                let v141 = C::u64_from_imm64(ctx, v140);
-                                                                                let v144 = C::u64_not(ctx, v141);
-                                                                                let v145 = C::u64_and(ctx, v142, v144);
-                                                                                let v146 = C::u64_eq(ctx, v143, v145);
-                                                                                if v146 == true {
-                                                                                    if v2.0 == v136.0 {
-                                                                                        let v128 = constructor_bor(ctx, v2.0, v125.0, v7.1);
-                                                                                        // Rule at src/opts/bitops.isle line 84.
-                                                                                        returns.push(v128);
-                                                                                    }
-                                                                                }
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                        _ => {}
-                                                    }
-                                                }
-                                            }
-                                        }
-                                        &Opcode::Bor => {
-                                            if v2.0 == v19.0 {
-                                                let v10 = C::inst_data_etor(ctx, v7.1);
-                                                let mut v10 = v10;
-                                                while let Some(v11) = v10.next(ctx) {
-                                                    if let &InstructionData::UnaryImm {
-                                                        opcode: ref v14,
-                                                        imm: v15,
-                                                    } = &v11.1
-                                                    {
-                                                        if let &Opcode::Iconst = v14 {
-                                                            if v2.0 == v11.0 {
-                                                                let v125 = C::unpack_value_array_2(
-                                                                    ctx, v124,
-                                                                );
-                                                                let v135 =
-                                                                    C::inst_data_etor(ctx, v125.1);
-                                                                let mut v135 = v135;
-                                                                while let Some(v136) =
-                                                                    v135.next(ctx)
-                                                                {
-                                                                    if let &InstructionData::UnaryImm {
-                                                                        opcode: ref v139,
-                                                                        imm: v140,
-                                                                    } = &v136.1 {
-                                                                        if let &Opcode::Iconst = v139 {
-                                                                            if v2.0 == v136.0 {
-                                                                                let v281 = constructor_bor(ctx, v2.0, v125.1, v7.1);
-                                                                                let v282 = constructor_bor(ctx, v2.0, v125.0, v281);
-                                                                                // Rule at src/opts/cprop.isle line 159.
-                                                                                returns.push(v282);
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                        _ => {}
-                                    }
-                                }
-                                &InstructionData::IntCompare {
-                                    opcode: ref v367,
-                                    args: ref v368,
-                                    cond: ref v369,
-                                } => {
-                                    if let &Opcode::Icmp = v367 {
-                                        let v44 = C::fits_in_64(ctx, v2.0);
-                                        if let Some(v45) = v44 {
-                                            if v19.0 == v45 {
-                                                let v10 = C::inst_data_etor(ctx, v7.1);
-                                                let mut v10 = v10;
-                                                while let Some(v11) = v10.next(ctx) {
-                                                    if let &InstructionData::IntCompare {
-                                                        opcode: ref v392,
-                                                        args: ref v393,
-                                                        cond: ref v394,
-                                                    } = &v11.1
-                                                    {
-                                                        if let &Opcode::Icmp = v392 {
-                                                            let v398 = constructor_intcc_comparable(
-                                                                ctx, v369, v394,
-                                                            );
-                                                            if let Some(v399) = v398 {
-                                                                if v11.0 == v19.0 {
-                                                                    let v370 =
-                                                                        C::unpack_value_array_2(
-                                                                            ctx, v368,
-                                                                        );
-                                                                    let v395 =
-                                                                        C::unpack_value_array_2(
-                                                                            ctx, v393,
-                                                                        );
-                                                                    if v370.0 == v395.0 {
-                                                                        if v370.1 == v395.1 {
-                                                                            let v400 = constructor_decompose_intcc(ctx, v369);
-                                                                            let v401 = constructor_decompose_intcc(ctx, v394);
-                                                                            let v404 = C::u64_or(
-                                                                                ctx, v400, v401,
-                                                                            );
-                                                                            let v405 = constructor_compose_icmp(ctx, v45, v404, v399, v370.0, v370.1);
-                                                                            // Rule at src/opts/icmp.isle line 132.
-                                                                            returns.push(v405);
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                                &InstructionData::Unary {
-                                    opcode: ref v36,
-                                    arg: v37,
-                                } => {
-                                    if let &Opcode::Bnot = v36 {
-                                        let v44 = C::fits_in_64(ctx, v2.0);
-                                        if let Some(v45) = v44 {
-                                            let v46 = C::ty_int(ctx, v45);
-                                            if let Some(v47) = v46 {
-                                                if v7.1 == v37 {
-                                                    if v19.0 == v47 {
-                                                        let v115 = C::ty_mask(ctx, v47);
-                                                        let v116 = C::imm64(ctx, v115);
-                                                        let v117 =
-                                                            constructor_iconst(ctx, v47, v116);
-                                                        let v118 = C::subsume(ctx, v117);
-                                                        // Rule at src/opts/bitops.isle line 35.
-                                                        returns.push(v118);
-                                                    }
-                                                }
-                                            }
-                                        }
-                                        if v2.0 == v19.0 {
-                                            let v10 = C::inst_data_etor(ctx, v7.1);
-                                            let mut v10 = v10;
-                                            while let Some(v11) = v10.next(ctx) {
-                                                if let &InstructionData::Binary {
-                                                    opcode: ref v129,
-                                                    args: ref v130,
-                                                } = &v11.1
-                                                {
-                                                    if let &Opcode::Band = v129 {
-                                                        if v2.0 == v11.0 {
-                                                            let v131 =
-                                                                C::unpack_value_array_2(ctx, v130);
-                                                            if v37 == v131.1 {
-                                                                let v134 = constructor_bor(
-                                                                    ctx, v2.0, v131.0, v7.0,
-                                                                );
-                                                                // Rule at src/opts/bitops.isle line 73.
-                                                                returns.push(v134);
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                                &InstructionData::UnaryImm {
-                                    opcode: ref v22,
-                                    imm: v23,
-                                } => {
-                                    if let &Opcode::Iconst = v22 {
-                                        if v2.0 == v19.0 {
-                                            let v24 = C::u64_from_imm64(ctx, v23);
-                                            if v24 == 0x0 {
-                                                let v25 = C::subsume(ctx, v7.1);
-                                                // Rule at src/opts/bitops.isle line 8.
-                                                returns.push(v25);
-                                            }
-                                            let v252 = constructor_bor(ctx, v2.0, v7.1, v7.0);
-                                            // Rule at src/opts/cprop.isle line 106.
-                                            returns.push(v252);
-                                        }
-                                        let v44 = C::fits_in_64(ctx, v2.0);
-                                        if let Some(v45) = v44 {
-                                            if v19.0 == v45 {
-                                                let v10 = C::inst_data_etor(ctx, v7.1);
-                                                let mut v10 = v10;
-                                                while let Some(v11) = v10.next(ctx) {
-                                                    if let &InstructionData::UnaryImm {
-                                                        opcode: ref v14,
-                                                        imm: v15,
-                                                    } = &v11.1
-                                                    {
-                                                        if let &Opcode::Iconst = v14 {
-                                                            if v11.0 == v19.0 {
-                                                                let v24 =
-                                                                    C::u64_from_imm64(ctx, v23);
-                                                                let v16 =
-                                                                    C::u64_from_imm64(ctx, v15);
-                                                                let v185 = C::u64_or(ctx, v24, v16);
-                                                                let v186 =
-                                                                    C::imm64_masked(ctx, v45, v185);
-                                                                let v187 = constructor_iconst(
-                                                                    ctx, v45, v186,
-                                                                );
-                                                                let v188 = C::subsume(ctx, v187);
-                                                                // Rule at src/opts/cprop.isle line 35.
-                                                                returns.push(v188);
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                        let v406 = C::remat(ctx, arg0);
-                                        // Rule at src/opts/remat.isle line 16.
-                                        returns.push(v406);
-                                    }
-                                }
-                                _ => {}
-                            }
-                        }
-                        let v10 = C::inst_data_etor(ctx, v7.1);
-                        let mut v10 = v10;
-                        while let Some(v11) = v10.next(ctx) {
-                            match &v11.1 {
-                                &InstructionData::Unary {
-                                    opcode: ref v38,
-                                    arg: v39,
-                                } => {
-                                    if let &Opcode::Bnot = v38 {
-                                        if v7.0 == v39 {
-                                            let v44 = C::fits_in_64(ctx, v2.0);
-                                            if let Some(v45) = v44 {
-                                                let v46 = C::ty_int(ctx, v45);
-                                                if let Some(v47) = v46 {
-                                                    if v11.0 == v47 {
-                                                        let v115 = C::ty_mask(ctx, v47);
-                                                        let v116 = C::imm64(ctx, v115);
-                                                        let v117 =
-                                                            constructor_iconst(ctx, v47, v116);
-                                                        let v118 = C::subsume(ctx, v117);
-                                                        // Rule at src/opts/bitops.isle line 34.
-                                                        returns.push(v118);
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                                &InstructionData::UnaryImm {
-                                    opcode: ref v14,
-                                    imm: v15,
-                                } => {
-                                    if let &Opcode::Iconst = v14 {
-                                        let v16 = C::u64_from_imm64(ctx, v15);
-                                        if v16 == 0x0 {
-                                            if v2.0 == v11.0 {
-                                                let v17 = C::subsume(ctx, v7.0);
-                                                // Rule at src/opts/bitops.isle line 4.
-                                                returns.push(v17);
-                                            }
-                                        }
-                                        let v406 = C::remat(ctx, arg0);
-                                        // Rule at src/opts/remat.isle line 18.
-                                        returns.push(v406);
-                                    }
-                                }
-                                _ => {}
-                            }
-                        }
-                        if v7.0 == v7.1 {
-                            let v17 = C::subsume(ctx, v7.0);
-                            // Rule at src/opts/bitops.isle line 12.
-                            returns.push(v17);
-                        }
-                    }
-                    &Opcode::Bxor => {
-                        let v7 = C::unpack_value_array_2(ctx, v6);
-                        let v10 = C::inst_data_etor(ctx, v7.1);
-                        let mut v10 = v10;
-                        while let Some(v11) = v10.next(ctx) {
-                            match &v11.1 {
-                                &InstructionData::Unary {
-                                    opcode: ref v38,
-                                    arg: v39,
-                                } => {
-                                    if let &Opcode::Bnot = v38 {
-                                        let v44 = C::fits_in_64(ctx, v2.0);
-                                        if let Some(v45) = v44 {
-                                            let v46 = C::ty_int(ctx, v45);
-                                            if let Some(v47) = v46 {
-                                                if v7.0 == v39 {
-                                                    if v11.0 == v47 {
-                                                        let v115 = C::ty_mask(ctx, v47);
-                                                        let v116 = C::imm64(ctx, v115);
-                                                        let v117 =
-                                                            constructor_iconst(ctx, v47, v116);
-                                                        let v118 = C::subsume(ctx, v117);
-                                                        // Rule at src/opts/bitops.isle line 32.
-                                                        returns.push(v118);
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                                &InstructionData::UnaryImm {
-                                    opcode: ref v14,
-                                    imm: v15,
-                                } => {
-                                    if let &Opcode::Iconst = v14 {
-                                        if v2.0 == v11.0 {
-                                            let v16 = C::u64_from_imm64(ctx, v15);
-                                            if v16 == 0x0 {
-                                                let v17 = C::subsume(ctx, v7.0);
-                                                // Rule at src/opts/bitops.isle line 16.
-                                                returns.push(v17);
-                                            }
-                                            let v52 = C::i64_sextend_imm64(ctx, v2.0, v15);
-                                            if v52 == -0x1 {
-                                                let v147 = constructor_bnot(ctx, v2.0, v7.0);
-                                                // Rule at src/opts/bitops.isle line 92.
-                                                returns.push(v147);
-                                            }
-                                            let v18 = C::inst_data_etor(ctx, v7.0);
-                                            let mut v18 = v18;
-                                            while let Some(v19) = v18.next(ctx) {
-                                                if let &InstructionData::Binary {
-                                                    opcode: ref v123,
-                                                    args: ref v124,
-                                                } = &v19.1
-                                                {
-                                                    if let &Opcode::Bxor = v123 {
-                                                        if v2.0 == v19.0 {
-                                                            let v125 =
-                                                                C::unpack_value_array_2(ctx, v124);
-                                                            let v135 =
-                                                                C::inst_data_etor(ctx, v125.1);
-                                                            let mut v135 = v135;
-                                                            while let Some(v136) = v135.next(ctx) {
-                                                                if let &InstructionData::UnaryImm {
-                                                                    opcode: ref v139,
-                                                                    imm: v140,
-                                                                } = &v136.1 {
-                                                                    if let &Opcode::Iconst = v139 {
-                                                                        if v2.0 == v136.0 {
-                                                                            let v285 = constructor_bxor(ctx, v2.0, v125.1, v7.1);
-                                                                            let v286 = constructor_bxor(ctx, v2.0, v125.0, v285);
-                                                                            // Rule at src/opts/cprop.isle line 165.
-                                                                            returns.push(v286);
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                        let v44 = C::fits_in_64(ctx, v2.0);
-                                        if let Some(v45) = v44 {
-                                            if v11.0 == v45 {
-                                                let v18 = C::inst_data_etor(ctx, v7.0);
-                                                let mut v18 = v18;
-                                                while let Some(v19) = v18.next(ctx) {
-                                                    if let &InstructionData::UnaryImm {
-                                                        opcode: ref v22,
-                                                        imm: v23,
-                                                    } = &v19.1
-                                                    {
-                                                        if let &Opcode::Iconst = v22 {
-                                                            if v11.0 == v19.0 {
-                                                                let v24 =
-                                                                    C::u64_from_imm64(ctx, v23);
-                                                                let v16 =
-                                                                    C::u64_from_imm64(ctx, v15);
-                                                                let v193 =
-                                                                    C::u64_xor(ctx, v24, v16);
-                                                                let v194 =
-                                                                    C::imm64_masked(ctx, v45, v193);
-                                                                let v195 = constructor_iconst(
-                                                                    ctx, v45, v194,
-                                                                );
-                                                                let v196 = C::subsume(ctx, v195);
-                                                                // Rule at src/opts/cprop.isle line 47.
-                                                                returns.push(v196);
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                        let v406 = C::remat(ctx, arg0);
-                                        // Rule at src/opts/remat.isle line 22.
-                                        returns.push(v406);
-                                    }
-                                }
-                                _ => {}
-                            }
-                        }
-                        let v18 = C::inst_data_etor(ctx, v7.0);
-                        let mut v18 = v18;
-                        while let Some(v19) = v18.next(ctx) {
-                            match &v19.1 {
-                                &InstructionData::Unary {
-                                    opcode: ref v36,
-                                    arg: v37,
-                                } => {
-                                    if let &Opcode::Bnot = v36 {
-                                        if v7.1 == v37 {
-                                            let v44 = C::fits_in_64(ctx, v2.0);
-                                            if let Some(v45) = v44 {
-                                                let v46 = C::ty_int(ctx, v45);
-                                                if let Some(v47) = v46 {
-                                                    if v19.0 == v47 {
-                                                        let v115 = C::ty_mask(ctx, v47);
-                                                        let v116 = C::imm64(ctx, v115);
-                                                        let v117 =
-                                                            constructor_iconst(ctx, v47, v116);
-                                                        let v118 = C::subsume(ctx, v117);
-                                                        // Rule at src/opts/bitops.isle line 33.
-                                                        returns.push(v118);
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                                &InstructionData::UnaryImm {
-                                    opcode: ref v22,
-                                    imm: v23,
-                                } => {
-                                    if let &Opcode::Iconst = v22 {
-                                        if v2.0 == v19.0 {
-                                            let v24 = C::u64_from_imm64(ctx, v23);
-                                            if v24 == 0x0 {
-                                                let v25 = C::subsume(ctx, v7.1);
-                                                // Rule at src/opts/bitops.isle line 20.
-                                                returns.push(v25);
-                                            }
-                                            let v254 = constructor_bxor(ctx, v2.0, v7.1, v7.0);
-                                            // Rule at src/opts/cprop.isle line 112.
-                                            returns.push(v254);
-                                        }
-                                        let v406 = C::remat(ctx, arg0);
-                                        // Rule at src/opts/remat.isle line 20.
-                                        returns.push(v406);
-                                    }
-                                }
-                                _ => {}
-                            }
-                        }
-                        if v7.0 == v7.1 {
-                            let v44 = C::fits_in_64(ctx, v2.0);
-                            if let Some(v45) = v44 {
-                                let v46 = C::ty_int(ctx, v45);
-                                if let Some(v47) = v46 {
-                                    let v49 = C::imm64(ctx, 0x0);
-                                    let v50 = constructor_iconst(ctx, v47, v49);
-                                    let v51 = C::subsume(ctx, v50);
-                                    // Rule at src/opts/bitops.isle line 26.
-                                    returns.push(v51);
-                                }
-                            }
-                        }
-                    }
-                    &Opcode::Rotl => {
-                        let v7 = C::unpack_value_array_2(ctx, v6);
-                        let v10 = C::inst_data_etor(ctx, v7.1);
-                        let mut v10 = v10;
-                        while let Some(v11) = v10.next(ctx) {
-                            if let &InstructionData::UnaryImm {
-                                opcode: ref v14,
-                                imm: v15,
-                            } = &v11.1
-                            {
-                                if let &Opcode::Iconst = v14 {
-                                    let v16 = C::u64_from_imm64(ctx, v15);
-                                    if v16 == 0x0 {
-                                        if v2.0 == v11.0 {
-                                            let v17 = C::subsume(ctx, v7.0);
-                                            // Rule at src/opts/shifts.isle line 20.
-                                            returns.push(v17);
-                                        }
-                                    }
-                                }
-                            }
-                        }
-                    }
-                    &Opcode::Rotr => {
-                        let v7 = C::unpack_value_array_2(ctx, v6);
-                        let v10 = C::inst_data_etor(ctx, v7.1);
-                        let mut v10 = v10;
-                        while let Some(v11) = v10.next(ctx) {
-                            if let &InstructionData::UnaryImm {
-                                opcode: ref v14,
-                                imm: v15,
-                            } = &v11.1
-                            {
-                                if let &Opcode::Iconst = v14 {
-                                    let v16 = C::u64_from_imm64(ctx, v15);
-                                    if v16 == 0x0 {
-                                        if v2.0 == v11.0 {
-                                            let v17 = C::subsume(ctx, v7.0);
-                                            // Rule at src/opts/shifts.isle line 16.
-                                            returns.push(v17);
-                                        }
-                                    }
-                                }
-                            }
-                        }
-                    }
-                    &Opcode::Ishl => {
-                        let v7 = C::unpack_value_array_2(ctx, v6);
-                        let v10 = C::inst_data_etor(ctx, v7.1);
-                        let mut v10 = v10;
-                        while let Some(v11) = v10.next(ctx) {
-                            if let &InstructionData::UnaryImm {
-                                opcode: ref v14,
-                                imm: v15,
-                            } = &v11.1
-                            {
-                                if let &Opcode::Iconst = v14 {
-                                    let v44 = C::fits_in_64(ctx, v2.0);
-                                    if let Some(v45) = v44 {
-                                        let v18 = C::inst_data_etor(ctx, v7.0);
-                                        let mut v18 = v18;
-                                        while let Some(v19) = v18.next(ctx) {
-                                            match &v19.1 {
-                                                &InstructionData::Binary {
-                                                    opcode: ref v123,
-                                                    args: ref v124,
-                                                } => {
-                                                    match v123 {
-                                                        &Opcode::Ushr => {
-                                                            if v19.0 == v45 {
-                                                                let v125 = C::unpack_value_array_2(
-                                                                    ctx, v124,
-                                                                );
-                                                                let v135 =
-                                                                    C::inst_data_etor(ctx, v125.1);
-                                                                let mut v135 = v135;
-                                                                while let Some(v136) =
-                                                                    v135.next(ctx)
-                                                                {
-                                                                    if let &InstructionData::UnaryImm {
-                                                                        opcode: ref v139,
-                                                                        imm: v140,
-                                                                    } = &v136.1 {
-                                                                        if let &Opcode::Iconst = v139 {
-                                                                            if v15 == v140 {
-                                                                                let v436 = C::imm64(ctx, 0xFFFFFFFFFFFFFFFF);
-                                                                                let v437 = C::imm64_shl(ctx, v45, v436, v140);
-                                                                                let v438 = constructor_iconst(ctx, v45, v437);
-                                                                                let v439 = constructor_band(ctx, v45, v125.0, v438);
-                                                                                // Rule at src/opts/shifts.isle line 27.
-                                                                                returns.push(v439);
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                        &Opcode::Sshr => {
-                                                            if v19.0 == v45 {
-                                                                let v125 = C::unpack_value_array_2(
-                                                                    ctx, v124,
-                                                                );
-                                                                let v135 =
-                                                                    C::inst_data_etor(ctx, v125.1);
-                                                                let mut v135 = v135;
-                                                                while let Some(v136) =
-                                                                    v135.next(ctx)
-                                                                {
-                                                                    if let &InstructionData::UnaryImm {
-                                                                        opcode: ref v139,
-                                                                        imm: v140,
-                                                                    } = &v136.1 {
-                                                                        if let &Opcode::Iconst = v139 {
-                                                                            if v15 == v140 {
-                                                                                let v436 = C::imm64(ctx, 0xFFFFFFFFFFFFFFFF);
-                                                                                let v437 = C::imm64_shl(ctx, v45, v436, v140);
-                                                                                let v438 = constructor_iconst(ctx, v45, v437);
-                                                                                let v439 = constructor_band(ctx, v45, v125.0, v438);
-                                                                                // Rule at src/opts/shifts.isle line 32.
-                                                                                returns.push(v439);
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                        _ => {}
-                                                    }
-                                                }
-                                                &InstructionData::UnaryImm {
-                                                    opcode: ref v22,
-                                                    imm: v23,
-                                                } => {
-                                                    if let &Opcode::Iconst = v22 {
-                                                        if v19.0 == v45 {
-                                                            let v204 =
-                                                                C::imm64_shl(ctx, v45, v23, v15);
-                                                            let v205 =
-                                                                constructor_iconst(ctx, v45, v204);
-                                                            let v206 = C::subsume(ctx, v205);
-                                                            // Rule at src/opts/cprop.isle line 58.
-                                                            returns.push(v206);
-                                                        }
-                                                    }
-                                                }
-                                                _ => {}
-                                            }
-                                        }
-                                    }
-                                    let v16 = C::u64_from_imm64(ctx, v15);
-                                    if v16 == 0x0 {
-                                        if v2.0 == v11.0 {
-                                            let v17 = C::subsume(ctx, v7.0);
-                                            // Rule at src/opts/shifts.isle line 4.
-                                            returns.push(v17);
-                                        }
-                                    }
-                                }
-                            }
-                        }
-                    }
-                    &Opcode::Ushr => {
-                        let v7 = C::unpack_value_array_2(ctx, v6);
-                        let v10 = C::inst_data_etor(ctx, v7.1);
-                        let mut v10 = v10;
-                        while let Some(v11) = v10.next(ctx) {
-                            if let &InstructionData::UnaryImm {
-                                opcode: ref v14,
-                                imm: v15,
-                            } = &v11.1
-                            {
-                                if let &Opcode::Iconst = v14 {
-                                    let v18 = C::inst_data_etor(ctx, v7.0);
-                                    let mut v18 = v18;
-                                    while let Some(v19) = v18.next(ctx) {
-                                        match &v19.1 {
-                                            &InstructionData::Binary {
-                                                opcode: ref v123,
-                                                args: ref v124,
-                                            } => {
-                                                if let &Opcode::Ishl = v123 {
-                                                    let v125 = C::unpack_value_array_2(ctx, v124);
-                                                    let v135 = C::inst_data_etor(ctx, v125.1);
-                                                    let mut v135 = v135;
-                                                    while let Some(v136) = v135.next(ctx) {
-                                                        if let &InstructionData::UnaryImm {
-                                                            opcode: ref v139,
-                                                            imm: v140,
-                                                        } = &v136.1
-                                                        {
-                                                            if let &Opcode::Iconst = v139 {
-                                                                if v15 == v140 {
-                                                                    let v44 =
-                                                                        C::fits_in_64(ctx, v2.0);
-                                                                    if let Some(v45) = v44 {
-                                                                        let v46 =
-                                                                            C::ty_int(ctx, v45);
-                                                                        if let Some(v47) = v46 {
-                                                                            if v19.0 == v47 {
-                                                                                let v115 =
-                                                                                    C::ty_mask(
-                                                                                        ctx, v47,
-                                                                                    );
-                                                                                let v116 = C::imm64(
-                                                                                    ctx, v115,
-                                                                                );
-                                                                                let v440 =
-                                                                                    C::imm64_ushr(
-                                                                                        ctx, v47,
-                                                                                        v116, v140,
-                                                                                    );
-                                                                                let v441 = constructor_iconst(ctx, v47, v440);
-                                                                                let v442 = constructor_band(ctx, v47, v125.0, v441);
-                                                                                // Rule at src/opts/shifts.isle line 41.
-                                                                                returns.push(v442);
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                    let v141 = C::u64_from_imm64(
-                                                                        ctx, v140,
-                                                                    );
-                                                                    let v451 =
-                                                                        C::u64_is_zero(ctx, v141);
-                                                                    if v451 == false {
-                                                                        let v150 =
-                                                                            C::ty_bits(ctx, v2.0);
-                                                                        let v151 =
-                                                                            C::u8_as_u64(ctx, v150);
-                                                                        let v452 = C::u64_sub(
-                                                                            ctx, v151, v141,
-                                                                        );
-                                                                        let v453 = constructor_shift_amt_to_type(ctx, v452);
-                                                                        if let Some(v454) = v453 {
-                                                                            if v2.0 == v19.0 {
-                                                                                let v455 = constructor_ireduce(ctx, v454, v125.0);
-                                                                                let v457 = constructor_uextend(ctx, v2.0, v455);
-                                                                                // Rule at src/opts/shifts.isle line 91.
-                                                                                returns.push(v457);
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                            &InstructionData::UnaryImm {
-                                                opcode: ref v22,
-                                                imm: v23,
-                                            } => {
-                                                if let &Opcode::Iconst = v22 {
-                                                    let v44 = C::fits_in_64(ctx, v2.0);
-                                                    if let Some(v45) = v44 {
-                                                        if v19.0 == v45 {
-                                                            let v207 =
-                                                                C::imm64_ushr(ctx, v45, v23, v15);
-                                                            let v208 =
-                                                                constructor_iconst(ctx, v45, v207);
-                                                            let v209 = C::subsume(ctx, v208);
-                                                            // Rule at src/opts/cprop.isle line 63.
-                                                            returns.push(v209);
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                            _ => {}
-                                        }
-                                    }
-                                    let v16 = C::u64_from_imm64(ctx, v15);
-                                    if v16 == 0x0 {
-                                        if v2.0 == v11.0 {
-                                            let v17 = C::subsume(ctx, v7.0);
-                                            // Rule at src/opts/shifts.isle line 8.
-                                            returns.push(v17);
-                                        }
-                                    }
-                                }
-                            }
-                        }
-                    }
-                    &Opcode::Sshr => {
-                        let v7 = C::unpack_value_array_2(ctx, v6);
-                        let v10 = C::inst_data_etor(ctx, v7.1);
-                        let mut v10 = v10;
-                        while let Some(v11) = v10.next(ctx) {
-                            if let &InstructionData::UnaryImm {
-                                opcode: ref v14,
-                                imm: v15,
-                            } = &v11.1
-                            {
-                                if let &Opcode::Iconst = v14 {
-                                    let v18 = C::inst_data_etor(ctx, v7.0);
-                                    let mut v18 = v18;
-                                    while let Some(v19) = v18.next(ctx) {
-                                        match &v19.1 {
-                                            &InstructionData::Binary {
-                                                opcode: ref v123,
-                                                args: ref v124,
-                                            } => {
-                                                match v123 {
-                                                    &Opcode::Bor => {
-                                                        let v16 = C::u64_from_imm64(ctx, v15);
-                                                        let v150 = C::ty_bits(ctx, v2.0);
-                                                        let v151 = C::u8_as_u64(ctx, v150);
-                                                        let v153 = C::u64_sub(ctx, v151, 0x1);
-                                                        let v154 = C::u64_eq(ctx, v16, v153);
-                                                        if v154 == true {
-                                                            if v2.0 == v11.0 {
-                                                                if v2.0 == v19.0 {
-                                                                    let v125 =
-                                                                        C::unpack_value_array_2(
-                                                                            ctx, v124,
-                                                                        );
-                                                                    let v135 = C::inst_data_etor(
-                                                                        ctx, v125.1,
-                                                                    );
-                                                                    let mut v135 = v135;
-                                                                    while let Some(v136) =
-                                                                        v135.next(ctx)
-                                                                    {
-                                                                        if let &InstructionData::Unary {
-                                                                            opcode: ref v148,
-                                                                            arg: v149,
-                                                                        } = &v136.1 {
-                                                                            if let &Opcode::Ineg = v148 {
-                                                                                if v2.0 == v136.0 {
-                                                                                    if v125.0 == v149 {
-                                                                                        let v155 = constructor_bmask(ctx, v2.0, v125.0);
-                                                                                        // Rule at src/opts/bitops.isle line 100.
-                                                                                        returns.push(v155);
-                                                                                    }
-                                                                                }
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                    let v156 = C::inst_data_etor(
-                                                                        ctx, v125.0,
-                                                                    );
-                                                                    let mut v156 = v156;
-                                                                    while let Some(v157) =
-                                                                        v156.next(ctx)
-                                                                    {
-                                                                        if let &InstructionData::Unary {
-                                                                            opcode: ref v160,
-                                                                            arg: v161,
-                                                                        } = &v157.1 {
-                                                                            if let &Opcode::Ineg = v160 {
-                                                                                if v125.1 == v161 {
-                                                                                    if v2.0 == v157.0 {
-                                                                                        let v162 = constructor_bmask(ctx, v2.0, v161);
-                                                                                        // Rule at src/opts/bitops.isle line 104.
-                                                                                        returns.push(v162);
-                                                                                    }
-                                                                                }
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                    &Opcode::Ishl => {
-                                                        if v2.0 == v19.0 {
-                                                            let v125 =
-                                                                C::unpack_value_array_2(ctx, v124);
-                                                            let v135 =
-                                                                C::inst_data_etor(ctx, v125.1);
-                                                            let mut v135 = v135;
-                                                            while let Some(v136) = v135.next(ctx) {
-                                                                if let &InstructionData::UnaryImm {
-                                                                    opcode: ref v139,
-                                                                    imm: v140,
-                                                                } = &v136.1 {
-                                                                    if let &Opcode::Iconst = v139 {
-                                                                        if v15 == v140 {
-                                                                            let v156 = C::inst_data_etor(ctx, v125.0);
-                                                                            let mut v156 = v156;
-                                                                            while let Some(v157) = v156.next(ctx) {
-                                                                                if let &InstructionData::Unary {
-                                                                                    opcode: ref v160,
-                                                                                    arg: v161,
-                                                                                } = &v157.1 {
-                                                                                    match v160 {
-                                                                                        &Opcode::Uextend => {
-                                                                                            if v2.0 == v157.0 {
-                                                                                                let v141 = C::u64_from_imm64(ctx, v140);
-                                                                                                let v444 = C::ty_bits_u64(ctx, v2.0);
-                                                                                                let v443 = C::value_type(ctx, v161);
-                                                                                                let v445 = C::ty_bits_u64(ctx, v443);
-                                                                                                let v446 = C::u64_sub(ctx, v444, v445);
-                                                                                                let v447 = C::u64_eq(ctx, v141, v446);
-                                                                                                if v447 == true {
-                                                                                                    let v448 = constructor_sextend(ctx, v2.0, v161);
-                                                                                                    // Rule at src/opts/shifts.isle line 50.
-                                                                                                    returns.push(v448);
-                                                                                                }
-                                                                                                let v449 = C::u64_lt(ctx, v141, v446);
-                                                                                                if v449 == true {
-                                                                                                    // Rule at src/opts/shifts.isle line 62.
-                                                                                                    returns.push(v125.0);
-                                                                                                }
-                                                                                            }
-                                                                                        }
-                                                                                        &Opcode::Sextend => {
-                                                                                            let v141 = C::u64_from_imm64(ctx, v140);
-                                                                                            let v444 = C::ty_bits_u64(ctx, v2.0);
-                                                                                            let v443 = C::value_type(ctx, v161);
-                                                                                            let v445 = C::ty_bits_u64(ctx, v443);
-                                                                                            let v446 = C::u64_sub(ctx, v444, v445);
-                                                                                            let v450 = C::u64_le(ctx, v141, v446);
-                                                                                            if v450 == true {
-                                                                                                if v2.0 == v157.0 {
-                                                                                                    // Rule at src/opts/shifts.isle line 73.
-                                                                                                    returns.push(v125.0);
-                                                                                                }
-                                                                                            }
-                                                                                        }
-                                                                                        _ => {}
-                                                                                    }
-                                                                                }
-                                                                            }
-                                                                            let v141 = C::u64_from_imm64(ctx, v140);
-                                                                            let v451 = C::u64_is_zero(ctx, v141);
-                                                                            if v451 == false {
-                                                                                let v150 = C::ty_bits(ctx, v2.0);
-                                                                                let v151 = C::u8_as_u64(ctx, v150);
-                                                                                let v452 = C::u64_sub(ctx, v151, v141);
-                                                                                let v453 = constructor_shift_amt_to_type(ctx, v452);
-                                                                                if let Some(v454) = v453 {
-                                                                                    let v455 = constructor_ireduce(ctx, v454, v125.0);
-                                                                                    let v456 = constructor_sextend(ctx, v2.0, v455);
-                                                                                    // Rule at src/opts/shifts.isle line 87.
-                                                                                    returns.push(v456);
-                                                                                }
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                    _ => {}
-                                                }
-                                            }
-                                            &InstructionData::UnaryImm {
-                                                opcode: ref v22,
-                                                imm: v23,
-                                            } => {
-                                                if let &Opcode::Iconst = v22 {
-                                                    let v44 = C::fits_in_64(ctx, v2.0);
-                                                    if let Some(v45) = v44 {
-                                                        if v19.0 == v45 {
-                                                            let v210 =
-                                                                C::imm64_sshr(ctx, v45, v23, v15);
-                                                            let v211 =
-                                                                constructor_iconst(ctx, v45, v210);
-                                                            let v212 = C::subsume(ctx, v211);
-                                                            // Rule at src/opts/cprop.isle line 68.
-                                                            returns.push(v212);
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                            _ => {}
-                                        }
-                                    }
-                                    let v16 = C::u64_from_imm64(ctx, v15);
-                                    if v16 == 0x0 {
-                                        if v2.0 == v11.0 {
-                                            let v17 = C::subsume(ctx, v7.0);
-                                            // Rule at src/opts/shifts.isle line 12.
-                                            returns.push(v17);
-                                        }
-                                    }
-                                }
-                            }
-                        }
-                    }
-                    &Opcode::Fmul => {
-                        let v7 = C::unpack_value_array_2(ctx, v6);
-                        let v10 = C::inst_data_etor(ctx, v7.1);
-                        let mut v10 = v10;
-                        while let Some(v11) = v10.next(ctx) {
-                            if let &InstructionData::Unary {
-                                opcode: ref v38,
-                                arg: v39,
-                            } = &v11.1
-                            {
-                                if let &Opcode::Fneg = v38 {
-                                    if v2.0 == v11.0 {
-                                        let v18 = C::inst_data_etor(ctx, v7.0);
-                                        let mut v18 = v18;
-                                        while let Some(v19) = v18.next(ctx) {
-                                            if let &InstructionData::Unary {
-                                                opcode: ref v36,
-                                                arg: v37,
-                                            } = &v19.1
-                                            {
-                                                if let &Opcode::Fneg = v36 {
-                                                    if v2.0 == v19.0 {
-                                                        let v114 =
-                                                            constructor_fmul(ctx, v2.0, v37, v39);
-                                                        // Rule at src/opts/arithmetic.isle line 127.
-                                                        returns.push(v114);
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                            }
-                        }
-                    }
-                    _ => {}
-                }
-            }
-            &InstructionData::IntCompare {
-                opcode: ref v227,
-                args: ref v228,
-                cond: ref v229,
-            } => {
-                if let &Opcode::Icmp = v227 {
-                    match v229 {
-                        &IntCC::Equal => {
-                            let v44 = C::fits_in_64(ctx, v2.0);
-                            if let Some(v45) = v44 {
-                                let v46 = C::ty_int(ctx, v45);
-                                if let Some(v47) = v46 {
-                                    let v230 = C::unpack_value_array_2(ctx, v228);
-                                    if v230.0 == v230.1 {
-                                        let v331 = C::imm64(ctx, 0x1);
-                                        let v339 = constructor_iconst(ctx, v47, v331);
-                                        // Rule at src/opts/icmp.isle line 5.
-                                        returns.push(v339);
-                                    }
-                                }
-                            }
-                            let v230 = C::unpack_value_array_2(ctx, v228);
-                            let v233 = C::inst_data_etor(ctx, v230.0);
-                            let mut v233 = v233;
-                            while let Some(v234) = v233.next(ctx) {
-                                if let &InstructionData::Unary {
-                                    opcode: ref v326,
-                                    arg: v327,
-                                } = &v234.1
-                                {
-                                    if let &Opcode::Uextend = v326 {
-                                        let v239 = C::inst_data_etor(ctx, v230.1);
-                                        let mut v239 = v239;
-                                        while let Some(v240) = v239.next(ctx) {
-                                            if let &InstructionData::UnaryImm {
-                                                opcode: ref v243,
-                                                imm: v244,
-                                            } = &v240.1
-                                            {
-                                                if let &Opcode::Iconst = v243 {
-                                                    let v329 = C::u64_from_imm64(ctx, v244);
-                                                    if v329 == 0x0 {
-                                                        let v340 = C::inst_data_etor(ctx, v327);
-                                                        let mut v340 = v340;
-                                                        while let Some(v341) = v340.next(ctx) {
-                                                            if let &InstructionData::IntCompare {
-                                                                opcode: ref v344,
-                                                                args: ref v345,
-                                                                cond: ref v346,
-                                                            } = &v341.1
-                                                            {
-                                                                if let &Opcode::Icmp = v344 {
-                                                                    if v2.0 == v341.0 {
-                                                                        let v351 =
-                                                                            &C::intcc_inverse(
-                                                                                ctx, v346,
-                                                                            );
-                                                                        let v347 =
-                                                                            C::unpack_value_array_2(
-                                                                                ctx, v345,
-                                                                            );
-                                                                        let v352 = constructor_icmp(
-                                                                            ctx, v2.0, v351,
-                                                                            v347.0, v347.1,
-                                                                        );
-                                                                        let v353 =
-                                                                            C::subsume(ctx, v352);
-                                                                        // Rule at src/opts/icmp.isle line 22.
-                                                                        returns.push(v353);
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                            }
-                        }
-                        &IntCC::NotEqual => {
-                            let v44 = C::fits_in_64(ctx, v2.0);
-                            if let Some(v45) = v44 {
-                                let v46 = C::ty_int(ctx, v45);
-                                if let Some(v47) = v46 {
-                                    let v230 = C::unpack_value_array_2(ctx, v228);
-                                    if v230.0 == v230.1 {
-                                        let v49 = C::imm64(ctx, 0x0);
-                                        let v50 = constructor_iconst(ctx, v47, v49);
-                                        // Rule at src/opts/icmp.isle line 6.
-                                        returns.push(v50);
-                                    }
-                                }
-                            }
-                            let v230 = C::unpack_value_array_2(ctx, v228);
-                            let v233 = C::inst_data_etor(ctx, v230.0);
-                            let mut v233 = v233;
-                            while let Some(v234) = v233.next(ctx) {
-                                if let &InstructionData::Unary {
-                                    opcode: ref v326,
-                                    arg: v327,
-                                } = &v234.1
-                                {
-                                    if let &Opcode::Uextend = v326 {
-                                        let v239 = C::inst_data_etor(ctx, v230.1);
-                                        let mut v239 = v239;
-                                        while let Some(v240) = v239.next(ctx) {
-                                            if let &InstructionData::UnaryImm {
-                                                opcode: ref v243,
-                                                imm: v244,
-                                            } = &v240.1
-                                            {
-                                                if let &Opcode::Iconst = v243 {
-                                                    let v329 = C::u64_from_imm64(ctx, v244);
-                                                    if v329 == 0x0 {
-                                                        let v340 = C::inst_data_etor(ctx, v327);
-                                                        let mut v340 = v340;
-                                                        while let Some(v341) = v340.next(ctx) {
-                                                            if let &InstructionData::IntCompare {
-                                                                opcode: ref v344,
-                                                                args: ref v345,
-                                                                cond: ref v346,
-                                                            } = &v341.1
-                                                            {
-                                                                if let &Opcode::Icmp = v344 {
-                                                                    if v2.0 == v341.0 {
-                                                                        let v350 =
-                                                                            C::subsume(ctx, v327);
-                                                                        // Rule at src/opts/icmp.isle line 17.
-                                                                        returns.push(v350);
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                            }
-                        }
-                        &IntCC::SignedGreaterThan => {
-                            let v44 = C::fits_in_64(ctx, v2.0);
-                            if let Some(v45) = v44 {
-                                let v46 = C::ty_int(ctx, v45);
-                                if let Some(v47) = v46 {
-                                    let v230 = C::unpack_value_array_2(ctx, v228);
-                                    let v239 = C::inst_data_etor(ctx, v230.1);
-                                    let mut v239 = v239;
-                                    while let Some(v240) = v239.next(ctx) {
-                                        if let &InstructionData::UnaryImm {
-                                            opcode: ref v243,
-                                            imm: v244,
-                                        } = &v240.1
-                                        {
-                                            if let &Opcode::Iconst = v243 {
-                                                let v329 = C::u64_from_imm64(ctx, v244);
-                                                let v388 = C::ty_smin(ctx, v240.0);
-                                                let v389 = C::u64_eq(ctx, v329, v388);
-                                                if v389 == true {
-                                                    let v384 =
-                                                        constructor_ne(ctx, v47, v230.0, v230.1);
-                                                    // Rule at src/opts/icmp.isle line 98.
-                                                    returns.push(v384);
-                                                }
-                                                let v390 = C::ty_smax(ctx, v240.0);
-                                                let v391 = C::u64_eq(ctx, v329, v390);
-                                                if v391 == true {
-                                                    let v49 = C::imm64(ctx, 0x0);
-                                                    let v50 = constructor_iconst(ctx, v47, v49);
-                                                    let v51 = C::subsume(ctx, v50);
-                                                    // Rule at src/opts/icmp.isle line 118.
-                                                    returns.push(v51);
-                                                }
-                                            }
-                                        }
-                                    }
-                                    if v230.0 == v230.1 {
-                                        let v49 = C::imm64(ctx, 0x0);
-                                        let v50 = constructor_iconst(ctx, v47, v49);
-                                        // Rule at src/opts/icmp.isle line 9.
-                                        returns.push(v50);
-                                    }
-                                }
-                            }
-                        }
-                        &IntCC::SignedGreaterThanOrEqual => {
-                            let v44 = C::fits_in_64(ctx, v2.0);
-                            if let Some(v45) = v44 {
-                                let v46 = C::ty_int(ctx, v45);
-                                if let Some(v47) = v46 {
-                                    let v230 = C::unpack_value_array_2(ctx, v228);
-                                    let v239 = C::inst_data_etor(ctx, v230.1);
-                                    let mut v239 = v239;
-                                    while let Some(v240) = v239.next(ctx) {
-                                        if let &InstructionData::UnaryImm {
-                                            opcode: ref v243,
-                                            imm: v244,
-                                        } = &v240.1
-                                        {
-                                            if let &Opcode::Iconst = v243 {
-                                                let v329 = C::u64_from_imm64(ctx, v244);
-                                                let v388 = C::ty_smin(ctx, v240.0);
-                                                let v389 = C::u64_eq(ctx, v329, v388);
-                                                if v389 == true {
-                                                    let v331 = C::imm64(ctx, 0x1);
-                                                    let v339 = constructor_iconst(ctx, v47, v331);
-                                                    let v385 = C::subsume(ctx, v339);
-                                                    // Rule at src/opts/icmp.isle line 103.
-                                                    returns.push(v385);
-                                                }
-                                                let v390 = C::ty_smax(ctx, v240.0);
-                                                let v391 = C::u64_eq(ctx, v329, v390);
-                                                if v391 == true {
-                                                    let v383 =
-                                                        constructor_eq(ctx, v47, v230.0, v230.1);
-                                                    // Rule at src/opts/icmp.isle line 123.
-                                                    returns.push(v383);
-                                                }
-                                            }
-                                        }
-                                    }
-                                    if v230.0 == v230.1 {
-                                        let v331 = C::imm64(ctx, 0x1);
-                                        let v339 = constructor_iconst(ctx, v47, v331);
-                                        // Rule at src/opts/icmp.isle line 10.
-                                        returns.push(v339);
-                                    }
-                                }
-                            }
-                            let v230 = C::unpack_value_array_2(ctx, v228);
-                            let v233 = C::inst_data_etor(ctx, v230.0);
-                            let mut v233 = v233;
-                            while let Some(v234) = v233.next(ctx) {
-                                if v234.0 == I64 {
-                                    if let &InstructionData::Unary {
-                                        opcode: ref v326,
-                                        arg: v327,
-                                    } = &v234.1
-                                    {
-                                        if let &Opcode::Uextend = v326 {
-                                            let v328 = C::value_type(ctx, v327);
-                                            if v328 == I32 {
-                                                let v239 = C::inst_data_etor(ctx, v230.1);
-                                                let mut v239 = v239;
-                                                while let Some(v240) = v239.next(ctx) {
-                                                    if let &InstructionData::UnaryImm {
-                                                        opcode: ref v243,
-                                                        imm: v244,
-                                                    } = &v240.1
-                                                    {
-                                                        if let &Opcode::Iconst = v243 {
-                                                            let v329 = C::u64_from_imm64(ctx, v244);
-                                                            if v329 == 0x0 {
-                                                                let v331 = C::imm64(ctx, 0x1);
-                                                                let v332 = constructor_iconst(
-                                                                    ctx, v2.0, v331,
-                                                                );
-                                                                // Rule at src/opts/extends.isle line 25.
-                                                                returns.push(v332);
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                            }
-                        }
-                        &IntCC::SignedLessThan => {
-                            let v44 = C::fits_in_64(ctx, v2.0);
-                            if let Some(v45) = v44 {
-                                let v46 = C::ty_int(ctx, v45);
-                                if let Some(v47) = v46 {
-                                    let v230 = C::unpack_value_array_2(ctx, v228);
-                                    let v239 = C::inst_data_etor(ctx, v230.1);
-                                    let mut v239 = v239;
-                                    while let Some(v240) = v239.next(ctx) {
-                                        if let &InstructionData::UnaryImm {
-                                            opcode: ref v243,
-                                            imm: v244,
-                                        } = &v240.1
-                                        {
-                                            if let &Opcode::Iconst = v243 {
-                                                let v329 = C::u64_from_imm64(ctx, v244);
-                                                let v388 = C::ty_smin(ctx, v240.0);
-                                                let v389 = C::u64_eq(ctx, v329, v388);
-                                                if v389 == true {
-                                                    let v49 = C::imm64(ctx, 0x0);
-                                                    let v50 = constructor_iconst(ctx, v47, v49);
-                                                    let v51 = C::subsume(ctx, v50);
-                                                    // Rule at src/opts/icmp.isle line 88.
-                                                    returns.push(v51);
-                                                }
-                                                let v390 = C::ty_smax(ctx, v240.0);
-                                                let v391 = C::u64_eq(ctx, v329, v390);
-                                                if v391 == true {
-                                                    let v384 =
-                                                        constructor_ne(ctx, v47, v230.0, v230.1);
-                                                    // Rule at src/opts/icmp.isle line 108.
-                                                    returns.push(v384);
-                                                }
-                                            }
-                                        }
-                                    }
-                                    if v230.0 == v230.1 {
-                                        let v49 = C::imm64(ctx, 0x0);
-                                        let v50 = constructor_iconst(ctx, v47, v49);
-                                        // Rule at src/opts/icmp.isle line 13.
-                                        returns.push(v50);
-                                    }
-                                }
-                            }
-                            let v230 = C::unpack_value_array_2(ctx, v228);
-                            let v233 = C::inst_data_etor(ctx, v230.0);
-                            let mut v233 = v233;
-                            while let Some(v234) = v233.next(ctx) {
-                                if v234.0 == I64 {
-                                    if let &InstructionData::Unary {
-                                        opcode: ref v326,
-                                        arg: v327,
-                                    } = &v234.1
-                                    {
-                                        if let &Opcode::Uextend = v326 {
-                                            let v328 = C::value_type(ctx, v327);
-                                            if v328 == I32 {
-                                                let v239 = C::inst_data_etor(ctx, v230.1);
-                                                let mut v239 = v239;
-                                                while let Some(v240) = v239.next(ctx) {
-                                                    if let &InstructionData::UnaryImm {
-                                                        opcode: ref v243,
-                                                        imm: v244,
-                                                    } = &v240.1
-                                                    {
-                                                        if let &Opcode::Iconst = v243 {
-                                                            let v329 = C::u64_from_imm64(ctx, v244);
-                                                            if v329 == 0x0 {
-                                                                let v49 = C::imm64(ctx, 0x0);
-                                                                let v330 = constructor_iconst(
-                                                                    ctx, v2.0, v49,
-                                                                );
-                                                                // Rule at src/opts/extends.isle line 20.
-                                                                returns.push(v330);
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                            }
-                        }
-                        &IntCC::SignedLessThanOrEqual => {
-                            let v44 = C::fits_in_64(ctx, v2.0);
-                            if let Some(v45) = v44 {
-                                let v46 = C::ty_int(ctx, v45);
-                                if let Some(v47) = v46 {
-                                    let v230 = C::unpack_value_array_2(ctx, v228);
-                                    let v239 = C::inst_data_etor(ctx, v230.1);
-                                    let mut v239 = v239;
-                                    while let Some(v240) = v239.next(ctx) {
-                                        if let &InstructionData::UnaryImm {
-                                            opcode: ref v243,
-                                            imm: v244,
-                                        } = &v240.1
-                                        {
-                                            if let &Opcode::Iconst = v243 {
-                                                let v329 = C::u64_from_imm64(ctx, v244);
-                                                let v388 = C::ty_smin(ctx, v240.0);
-                                                let v389 = C::u64_eq(ctx, v329, v388);
-                                                if v389 == true {
-                                                    let v383 =
-                                                        constructor_eq(ctx, v47, v230.0, v230.1);
-                                                    // Rule at src/opts/icmp.isle line 93.
-                                                    returns.push(v383);
-                                                }
-                                                let v390 = C::ty_smax(ctx, v240.0);
-                                                let v391 = C::u64_eq(ctx, v329, v390);
-                                                if v391 == true {
-                                                    let v331 = C::imm64(ctx, 0x1);
-                                                    let v339 = constructor_iconst(ctx, v47, v331);
-                                                    let v385 = C::subsume(ctx, v339);
-                                                    // Rule at src/opts/icmp.isle line 113.
-                                                    returns.push(v385);
-                                                }
-                                            }
-                                        }
-                                    }
-                                    if v230.0 == v230.1 {
-                                        let v331 = C::imm64(ctx, 0x1);
-                                        let v339 = constructor_iconst(ctx, v47, v331);
-                                        // Rule at src/opts/icmp.isle line 14.
-                                        returns.push(v339);
-                                    }
-                                }
-                            }
-                        }
-                        &IntCC::UnsignedGreaterThan => {
-                            let v44 = C::fits_in_64(ctx, v2.0);
-                            if let Some(v45) = v44 {
-                                let v46 = C::ty_int(ctx, v45);
-                                if let Some(v47) = v46 {
-                                    let v230 = C::unpack_value_array_2(ctx, v228);
-                                    let v239 = C::inst_data_etor(ctx, v230.1);
-                                    let mut v239 = v239;
-                                    while let Some(v240) = v239.next(ctx) {
-                                        if let &InstructionData::UnaryImm {
-                                            opcode: ref v243,
-                                            imm: v244,
-                                        } = &v240.1
-                                        {
-                                            if let &Opcode::Iconst = v243 {
-                                                let v329 = C::u64_from_imm64(ctx, v244);
-                                                if v329 == 0x0 {
-                                                    let v384 =
-                                                        constructor_ne(ctx, v47, v230.0, v230.1);
-                                                    // Rule at src/opts/icmp.isle line 60.
-                                                    returns.push(v384);
-                                                }
-                                                let v386 = C::ty_umax(ctx, v240.0);
-                                                let v387 = C::u64_eq(ctx, v329, v386);
-                                                if v387 == true {
-                                                    let v49 = C::imm64(ctx, 0x0);
-                                                    let v50 = constructor_iconst(ctx, v47, v49);
-                                                    let v51 = C::subsume(ctx, v50);
-                                                    // Rule at src/opts/icmp.isle line 78.
-                                                    returns.push(v51);
-                                                }
-                                            }
-                                        }
-                                    }
-                                    if v230.0 == v230.1 {
-                                        let v49 = C::imm64(ctx, 0x0);
-                                        let v50 = constructor_iconst(ctx, v47, v49);
-                                        // Rule at src/opts/icmp.isle line 7.
-                                        returns.push(v50);
-                                    }
-                                }
-                            }
-                        }
-                        &IntCC::UnsignedGreaterThanOrEqual => {
-                            let v44 = C::fits_in_64(ctx, v2.0);
-                            if let Some(v45) = v44 {
-                                let v46 = C::ty_int(ctx, v45);
-                                if let Some(v47) = v46 {
-                                    let v230 = C::unpack_value_array_2(ctx, v228);
-                                    let v239 = C::inst_data_etor(ctx, v230.1);
-                                    let mut v239 = v239;
-                                    while let Some(v240) = v239.next(ctx) {
-                                        if let &InstructionData::UnaryImm {
-                                            opcode: ref v243,
-                                            imm: v244,
-                                        } = &v240.1
-                                        {
-                                            if let &Opcode::Iconst = v243 {
-                                                let v329 = C::u64_from_imm64(ctx, v244);
-                                                if v329 == 0x0 {
-                                                    let v331 = C::imm64(ctx, 0x1);
-                                                    let v339 = constructor_iconst(ctx, v47, v331);
-                                                    let v385 = C::subsume(ctx, v339);
-                                                    // Rule at src/opts/icmp.isle line 64.
-                                                    returns.push(v385);
-                                                }
-                                                let v386 = C::ty_umax(ctx, v240.0);
-                                                let v387 = C::u64_eq(ctx, v329, v386);
-                                                if v387 == true {
-                                                    let v383 =
-                                                        constructor_eq(ctx, v47, v230.0, v230.1);
-                                                    // Rule at src/opts/icmp.isle line 83.
-                                                    returns.push(v383);
-                                                }
-                                            }
-                                        }
-                                    }
-                                    if v230.0 == v230.1 {
-                                        let v331 = C::imm64(ctx, 0x1);
-                                        let v339 = constructor_iconst(ctx, v47, v331);
-                                        // Rule at src/opts/icmp.isle line 8.
-                                        returns.push(v339);
-                                    }
-                                }
-                            }
-                        }
-                        &IntCC::UnsignedLessThan => {
-                            let v44 = C::fits_in_64(ctx, v2.0);
-                            if let Some(v45) = v44 {
-                                let v46 = C::ty_int(ctx, v45);
-                                if let Some(v47) = v46 {
-                                    let v230 = C::unpack_value_array_2(ctx, v228);
-                                    let v239 = C::inst_data_etor(ctx, v230.1);
-                                    let mut v239 = v239;
-                                    while let Some(v240) = v239.next(ctx) {
-                                        if let &InstructionData::UnaryImm {
-                                            opcode: ref v243,
-                                            imm: v244,
-                                        } = &v240.1
-                                        {
-                                            if let &Opcode::Iconst = v243 {
-                                                let v329 = C::u64_from_imm64(ctx, v244);
-                                                if v329 == 0x0 {
-                                                    let v49 = C::imm64(ctx, 0x0);
-                                                    let v50 = constructor_iconst(ctx, v47, v49);
-                                                    let v51 = C::subsume(ctx, v50);
-                                                    // Rule at src/opts/icmp.isle line 52.
-                                                    returns.push(v51);
-                                                }
-                                                let v386 = C::ty_umax(ctx, v240.0);
-                                                let v387 = C::u64_eq(ctx, v329, v386);
-                                                if v387 == true {
-                                                    let v384 =
-                                                        constructor_ne(ctx, v47, v230.0, v230.1);
-                                                    // Rule at src/opts/icmp.isle line 68.
-                                                    returns.push(v384);
-                                                }
-                                            }
-                                        }
-                                    }
-                                    if v230.0 == v230.1 {
-                                        let v49 = C::imm64(ctx, 0x0);
-                                        let v50 = constructor_iconst(ctx, v47, v49);
-                                        // Rule at src/opts/icmp.isle line 11.
-                                        returns.push(v50);
-                                    }
-                                }
-                            }
-                        }
-                        &IntCC::UnsignedLessThanOrEqual => {
-                            let v44 = C::fits_in_64(ctx, v2.0);
-                            if let Some(v45) = v44 {
-                                let v46 = C::ty_int(ctx, v45);
-                                if let Some(v47) = v46 {
-                                    let v230 = C::unpack_value_array_2(ctx, v228);
-                                    let v239 = C::inst_data_etor(ctx, v230.1);
-                                    let mut v239 = v239;
-                                    while let Some(v240) = v239.next(ctx) {
-                                        if let &InstructionData::UnaryImm {
-                                            opcode: ref v243,
-                                            imm: v244,
-                                        } = &v240.1
-                                        {
-                                            if let &Opcode::Iconst = v243 {
-                                                let v329 = C::u64_from_imm64(ctx, v244);
-                                                if v329 == 0x0 {
-                                                    let v383 =
-                                                        constructor_eq(ctx, v47, v230.0, v230.1);
-                                                    // Rule at src/opts/icmp.isle line 56.
-                                                    returns.push(v383);
-                                                }
-                                                let v386 = C::ty_umax(ctx, v240.0);
-                                                let v387 = C::u64_eq(ctx, v329, v386);
-                                                if v387 == true {
-                                                    let v331 = C::imm64(ctx, 0x1);
-                                                    let v339 = constructor_iconst(ctx, v47, v331);
-                                                    let v385 = C::subsume(ctx, v339);
-                                                    // Rule at src/opts/icmp.isle line 73.
-                                                    returns.push(v385);
-                                                }
-                                            }
-                                        }
-                                    }
-                                    if v230.0 == v230.1 {
-                                        let v331 = C::imm64(ctx, 0x1);
-                                        let v339 = constructor_iconst(ctx, v47, v331);
-                                        // Rule at src/opts/icmp.isle line 12.
-                                        returns.push(v339);
-                                    }
-                                }
-                            }
-                        }
-                        _ => {}
-                    }
-                    let v230 = C::unpack_value_array_2(ctx, v228);
-                    let v233 = C::inst_data_etor(ctx, v230.0);
-                    let mut v233 = v233;
-                    while let Some(v234) = v233.next(ctx) {
-                        if let &InstructionData::UnaryImm {
-                            opcode: ref v237,
-                            imm: v238,
-                        } = &v234.1
-                        {
-                            if let &Opcode::Iconst = v237 {
-                                let v239 = C::inst_data_etor(ctx, v230.1);
-                                let mut v239 = v239;
-                                while let Some(v240) = v239.next(ctx) {
-                                    if let &InstructionData::UnaryImm {
-                                        opcode: ref v243,
-                                        imm: v244,
-                                    } = &v240.1
-                                    {
-                                        if let &Opcode::Iconst = v243 {
-                                            if v234.0 == v240.0 {
-                                                let v245 =
-                                                    C::imm64_icmp(ctx, v234.0, v229, v238, v244);
-                                                let v246 = constructor_iconst(ctx, v2.0, v245);
-                                                let v247 = C::subsume(ctx, v246);
-                                                // Rule at src/opts/cprop.isle line 82.
-                                                returns.push(v247);
-                                            }
-                                        }
-                                    }
-                                }
-                                let v255 = &C::intcc_reverse(ctx, v229);
-                                let v256 = constructor_icmp(ctx, v2.0, v255, v230.1, v230.0);
-                                // Rule at src/opts/cprop.isle line 116.
-                                returns.push(v256);
-                            }
-                        }
-                    }
-                }
-            }
-            &InstructionData::Ternary {
-                opcode: ref v95,
-                args: ref v96,
-            } => {
-                match v95 {
-                    &Opcode::Select => {
-                        let v97 = C::unpack_value_array_3(ctx, v96);
-                        let v101 = C::inst_data_etor(ctx, v97.0);
-                        let mut v101 = v101;
-                        while let Some(v102) = v101.next(ctx) {
-                            match &v102.1 {
-                                &InstructionData::FloatCompare {
-                                    opcode: ref v427,
-                                    args: ref v428,
-                                    cond: ref v429,
-                                } => {
-                                    if let &Opcode::Fcmp = v427 {
-                                        match v429 {
-                                            &FloatCC::GreaterThan => {
-                                                let v430 = C::unpack_value_array_2(ctx, v428);
-                                                if v97.1 == v430.0 {
-                                                    if v97.2 == v430.1 {
-                                                        let v434 = constructor_fmax_pseudo(
-                                                            ctx, v2.0, v430.0, v430.1,
-                                                        );
-                                                        // Rule at src/opts/selects.isle line 57.
-                                                        returns.push(v434);
-                                                    }
-                                                }
-                                            }
-                                            &FloatCC::LessThan => {
-                                                let v430 = C::unpack_value_array_2(ctx, v428);
-                                                if v97.1 == v430.0 {
-                                                    if v97.2 == v430.1 {
-                                                        let v433 = constructor_fmin_pseudo(
-                                                            ctx, v2.0, v430.0, v430.1,
-                                                        );
-                                                        // Rule at src/opts/selects.isle line 54.
-                                                        returns.push(v433);
-                                                    }
-                                                }
-                                            }
-                                            _ => {}
-                                        }
-                                    }
-                                }
-                                &InstructionData::IntCompare {
-                                    opcode: ref v413,
-                                    args: ref v414,
-                                    cond: ref v415,
-                                } => {
-                                    if let &Opcode::Icmp = v413 {
-                                        match v415 {
-                                            &IntCC::SignedGreaterThan => {
-                                                let v416 = C::unpack_value_array_2(ctx, v414);
-                                                if v97.1 == v416.0 {
-                                                    if v97.2 == v416.1 {
-                                                        let v419 = constructor_smax(
-                                                            ctx, v2.0, v416.0, v416.1,
-                                                        );
-                                                        // Rule at src/opts/selects.isle line 8.
-                                                        returns.push(v419);
-                                                    }
-                                                }
-                                                if v97.1 == v416.1 {
-                                                    if v97.2 == v416.0 {
-                                                        let v421 = constructor_smin(
-                                                            ctx, v2.0, v416.0, v416.1,
-                                                        );
-                                                        // Rule at src/opts/selects.isle line 22.
-                                                        returns.push(v421);
-                                                    }
-                                                }
-                                            }
-                                            &IntCC::SignedGreaterThanOrEqual => {
-                                                let v416 = C::unpack_value_array_2(ctx, v414);
-                                                if v97.1 == v416.0 {
-                                                    if v97.2 == v416.1 {
-                                                        let v419 = constructor_smax(
-                                                            ctx, v2.0, v416.0, v416.1,
-                                                        );
-                                                        // Rule at src/opts/selects.isle line 9.
-                                                        returns.push(v419);
-                                                    }
-                                                }
-                                                if v97.1 == v416.1 {
-                                                    if v97.2 == v416.0 {
-                                                        let v421 = constructor_smin(
-                                                            ctx, v2.0, v416.0, v416.1,
-                                                        );
-                                                        // Rule at src/opts/selects.isle line 23.
-                                                        returns.push(v421);
-                                                    }
-                                                }
-                                            }
-                                            &IntCC::SignedLessThan => {
-                                                let v416 = C::unpack_value_array_2(ctx, v414);
-                                                if v97.1 == v416.0 {
-                                                    if v97.2 == v416.1 {
-                                                        let v421 = constructor_smin(
-                                                            ctx, v2.0, v416.0, v416.1,
-                                                        );
-                                                        // Rule at src/opts/selects.isle line 12.
-                                                        returns.push(v421);
-                                                    }
-                                                }
-                                                if v97.1 == v416.1 {
-                                                    if v97.2 == v416.0 {
-                                                        let v419 = constructor_smax(
-                                                            ctx, v2.0, v416.0, v416.1,
-                                                        );
-                                                        // Rule at src/opts/selects.isle line 18.
-                                                        returns.push(v419);
-                                                    }
-                                                }
-                                            }
-                                            &IntCC::SignedLessThanOrEqual => {
-                                                let v416 = C::unpack_value_array_2(ctx, v414);
-                                                if v97.1 == v416.0 {
-                                                    if v97.2 == v416.1 {
-                                                        let v421 = constructor_smin(
-                                                            ctx, v2.0, v416.0, v416.1,
-                                                        );
-                                                        // Rule at src/opts/selects.isle line 13.
-                                                        returns.push(v421);
-                                                    }
-                                                }
-                                                if v97.1 == v416.1 {
-                                                    if v97.2 == v416.0 {
-                                                        let v419 = constructor_smax(
-                                                            ctx, v2.0, v416.0, v416.1,
-                                                        );
-                                                        // Rule at src/opts/selects.isle line 19.
-                                                        returns.push(v419);
-                                                    }
-                                                }
-                                            }
-                                            &IntCC::UnsignedGreaterThan => {
-                                                let v416 = C::unpack_value_array_2(ctx, v414);
-                                                if v97.1 == v416.0 {
-                                                    if v97.2 == v416.1 {
-                                                        let v420 = constructor_umax(
-                                                            ctx, v2.0, v416.0, v416.1,
-                                                        );
-                                                        // Rule at src/opts/selects.isle line 10.
-                                                        returns.push(v420);
-                                                    }
-                                                }
-                                                if v97.1 == v416.1 {
-                                                    if v97.2 == v416.0 {
-                                                        let v422 = constructor_umin(
-                                                            ctx, v2.0, v416.0, v416.1,
-                                                        );
-                                                        // Rule at src/opts/selects.isle line 24.
-                                                        returns.push(v422);
-                                                    }
-                                                }
-                                            }
-                                            &IntCC::UnsignedGreaterThanOrEqual => {
-                                                let v416 = C::unpack_value_array_2(ctx, v414);
-                                                if v97.1 == v416.0 {
-                                                    if v97.2 == v416.1 {
-                                                        let v420 = constructor_umax(
-                                                            ctx, v2.0, v416.0, v416.1,
-                                                        );
-                                                        // Rule at src/opts/selects.isle line 11.
-                                                        returns.push(v420);
-                                                    }
-                                                }
-                                                if v97.1 == v416.1 {
-                                                    if v97.2 == v416.0 {
-                                                        let v422 = constructor_umin(
-                                                            ctx, v2.0, v416.0, v416.1,
-                                                        );
-                                                        // Rule at src/opts/selects.isle line 25.
-                                                        returns.push(v422);
-                                                    }
-                                                }
-                                            }
-                                            &IntCC::UnsignedLessThan => {
-                                                let v416 = C::unpack_value_array_2(ctx, v414);
-                                                if v97.1 == v416.0 {
-                                                    if v97.2 == v416.1 {
-                                                        let v422 = constructor_umin(
-                                                            ctx, v2.0, v416.0, v416.1,
-                                                        );
-                                                        // Rule at src/opts/selects.isle line 14.
-                                                        returns.push(v422);
-                                                    }
-                                                }
-                                                if v97.1 == v416.1 {
-                                                    if v97.2 == v416.0 {
-                                                        let v420 = constructor_umax(
-                                                            ctx, v2.0, v416.0, v416.1,
-                                                        );
-                                                        // Rule at src/opts/selects.isle line 20.
-                                                        returns.push(v420);
-                                                    }
-                                                }
-                                            }
-                                            &IntCC::UnsignedLessThanOrEqual => {
-                                                let v416 = C::unpack_value_array_2(ctx, v414);
-                                                if v97.1 == v416.0 {
-                                                    if v97.2 == v416.1 {
-                                                        let v422 = constructor_umin(
-                                                            ctx, v2.0, v416.0, v416.1,
-                                                        );
-                                                        // Rule at src/opts/selects.isle line 15.
-                                                        returns.push(v422);
-                                                    }
-                                                }
-                                                if v97.1 == v416.1 {
-                                                    if v97.2 == v416.0 {
-                                                        let v420 = constructor_umax(
-                                                            ctx, v2.0, v416.0, v416.1,
-                                                        );
-                                                        // Rule at src/opts/selects.isle line 21.
-                                                        returns.push(v420);
-                                                    }
-                                                }
-                                            }
-                                            _ => {}
-                                        }
-                                    }
-                                }
-                                &InstructionData::Unary {
-                                    opcode: ref v105,
-                                    arg: v106,
-                                } => {
-                                    if let &Opcode::Uextend = v105 {
-                                        let v354 = C::inst_data_etor(ctx, v106);
-                                        let mut v354 = v354;
-                                        while let Some(v355) = v354.next(ctx) {
-                                            if let &InstructionData::IntCompare {
-                                                opcode: ref v358,
-                                                args: ref v359,
-                                                cond: ref v360,
-                                            } = &v355.1
-                                            {
-                                                if let &Opcode::Icmp = v358 {
-                                                    let v364 = constructor_select(
-                                                        ctx, v2.0, v106, v97.1, v97.2,
-                                                    );
-                                                    // Rule at src/opts/icmp.isle line 29.
-                                                    returns.push(v364);
-                                                    // Rule at src/opts/icmp.isle line 32.
-                                                    returns.push(v364);
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                                &InstructionData::UnaryImm {
-                                    opcode: ref v287,
-                                    imm: v288,
-                                } => {
-                                    if let &Opcode::Iconst = v287 {
-                                        let v289 = C::u64_from_imm64(ctx, v288);
-                                        if v289 == 0x0 {
-                                            // Rule at src/opts/cprop.isle line 172.
-                                            returns.push(v97.2);
-                                        }
-                                        let v290 = C::u64_is_zero(ctx, v289);
-                                        if v290 == false {
-                                            // Rule at src/opts/cprop.isle line 169.
-                                            returns.push(v97.1);
-                                        }
-                                    }
-                                }
-                                _ => {}
-                            }
-                        }
-                        if v97.1 == v97.2 {
-                            // Rule at src/opts/selects.isle line 4.
-                            returns.push(v97.1);
-                        }
-                    }
-                    &Opcode::Bitselect => {
-                        let v423 = C::multi_lane(ctx, v2.0);
-                        if let Some(v424) = v423 {
-                            let v97 = C::unpack_value_array_3(ctx, v96);
-                            let v101 = C::inst_data_etor(ctx, v97.0);
-                            let mut v101 = v101;
-                            while let Some(v102) = v101.next(ctx) {
-                                if let &InstructionData::IntCompare {
-                                    opcode: ref v413,
-                                    args: ref v414,
-                                    cond: ref v415,
-                                } = &v102.1
-                                {
-                                    if let &Opcode::Icmp = v413 {
-                                        match v415 {
-                                            &IntCC::SignedGreaterThan => {
-                                                let v416 = C::unpack_value_array_2(ctx, v414);
-                                                if v97.1 == v416.0 {
-                                                    if v97.2 == v416.1 {
-                                                        let v419 = constructor_smax(
-                                                            ctx, v2.0, v416.0, v416.1,
-                                                        );
-                                                        // Rule at src/opts/selects.isle line 28.
-                                                        returns.push(v419);
-                                                    }
-                                                }
-                                                if v97.1 == v416.1 {
-                                                    if v97.2 == v416.0 {
-                                                        let v421 = constructor_smin(
-                                                            ctx, v2.0, v416.0, v416.1,
-                                                        );
-                                                        // Rule at src/opts/selects.isle line 42.
-                                                        returns.push(v421);
-                                                    }
-                                                }
-                                            }
-                                            &IntCC::SignedGreaterThanOrEqual => {
-                                                let v416 = C::unpack_value_array_2(ctx, v414);
-                                                if v97.1 == v416.0 {
-                                                    if v97.2 == v416.1 {
-                                                        let v419 = constructor_smax(
-                                                            ctx, v2.0, v416.0, v416.1,
-                                                        );
-                                                        // Rule at src/opts/selects.isle line 29.
-                                                        returns.push(v419);
-                                                    }
-                                                }
-                                                if v97.1 == v416.1 {
-                                                    if v97.2 == v416.0 {
-                                                        let v421 = constructor_smin(
-                                                            ctx, v2.0, v416.0, v416.1,
-                                                        );
-                                                        // Rule at src/opts/selects.isle line 43.
-                                                        returns.push(v421);
-                                                    }
-                                                }
-                                            }
-                                            &IntCC::SignedLessThan => {
-                                                let v416 = C::unpack_value_array_2(ctx, v414);
-                                                if v97.1 == v416.0 {
-                                                    if v97.2 == v416.1 {
-                                                        let v421 = constructor_smin(
-                                                            ctx, v2.0, v416.0, v416.1,
-                                                        );
-                                                        // Rule at src/opts/selects.isle line 32.
-                                                        returns.push(v421);
-                                                    }
-                                                }
-                                                if v97.1 == v416.1 {
-                                                    if v97.2 == v416.0 {
-                                                        let v419 = constructor_smax(
-                                                            ctx, v2.0, v416.0, v416.1,
-                                                        );
-                                                        // Rule at src/opts/selects.isle line 38.
-                                                        returns.push(v419);
-                                                    }
-                                                }
-                                            }
-                                            &IntCC::SignedLessThanOrEqual => {
-                                                let v416 = C::unpack_value_array_2(ctx, v414);
-                                                if v97.1 == v416.0 {
-                                                    if v97.2 == v416.1 {
-                                                        let v421 = constructor_smin(
-                                                            ctx, v2.0, v416.0, v416.1,
-                                                        );
-                                                        // Rule at src/opts/selects.isle line 33.
-                                                        returns.push(v421);
-                                                    }
-                                                }
-                                                if v97.1 == v416.1 {
-                                                    if v97.2 == v416.0 {
-                                                        let v419 = constructor_smax(
-                                                            ctx, v2.0, v416.0, v416.1,
-                                                        );
-                                                        // Rule at src/opts/selects.isle line 39.
-                                                        returns.push(v419);
-                                                    }
-                                                }
-                                            }
-                                            &IntCC::UnsignedGreaterThan => {
-                                                let v416 = C::unpack_value_array_2(ctx, v414);
-                                                if v97.1 == v416.0 {
-                                                    if v97.2 == v416.1 {
-                                                        let v420 = constructor_umax(
-                                                            ctx, v2.0, v416.0, v416.1,
-                                                        );
-                                                        // Rule at src/opts/selects.isle line 30.
-                                                        returns.push(v420);
-                                                    }
-                                                }
-                                                if v97.1 == v416.1 {
-                                                    if v97.2 == v416.0 {
-                                                        let v422 = constructor_umin(
-                                                            ctx, v2.0, v416.0, v416.1,
-                                                        );
-                                                        // Rule at src/opts/selects.isle line 44.
-                                                        returns.push(v422);
-                                                    }
-                                                }
-                                            }
-                                            &IntCC::UnsignedGreaterThanOrEqual => {
-                                                let v416 = C::unpack_value_array_2(ctx, v414);
-                                                if v97.1 == v416.0 {
-                                                    if v97.2 == v416.1 {
-                                                        let v420 = constructor_umax(
-                                                            ctx, v2.0, v416.0, v416.1,
-                                                        );
-                                                        // Rule at src/opts/selects.isle line 31.
-                                                        returns.push(v420);
-                                                    }
-                                                }
-                                                if v97.1 == v416.1 {
-                                                    if v97.2 == v416.0 {
-                                                        let v422 = constructor_umin(
-                                                            ctx, v2.0, v416.0, v416.1,
-                                                        );
-                                                        // Rule at src/opts/selects.isle line 45.
-                                                        returns.push(v422);
-                                                    }
-                                                }
-                                            }
-                                            &IntCC::UnsignedLessThan => {
-                                                let v416 = C::unpack_value_array_2(ctx, v414);
-                                                if v97.1 == v416.0 {
-                                                    if v97.2 == v416.1 {
-                                                        let v422 = constructor_umin(
-                                                            ctx, v2.0, v416.0, v416.1,
-                                                        );
-                                                        // Rule at src/opts/selects.isle line 34.
-                                                        returns.push(v422);
-                                                    }
-                                                }
-                                                if v97.1 == v416.1 {
-                                                    if v97.2 == v416.0 {
-                                                        let v420 = constructor_umax(
-                                                            ctx, v2.0, v416.0, v416.1,
-                                                        );
-                                                        // Rule at src/opts/selects.isle line 40.
-                                                        returns.push(v420);
-                                                    }
-                                                }
-                                            }
-                                            &IntCC::UnsignedLessThanOrEqual => {
-                                                let v416 = C::unpack_value_array_2(ctx, v414);
-                                                if v97.1 == v416.0 {
-                                                    if v97.2 == v416.1 {
-                                                        let v422 = constructor_umin(
-                                                            ctx, v2.0, v416.0, v416.1,
-                                                        );
-                                                        // Rule at src/opts/selects.isle line 35.
-                                                        returns.push(v422);
-                                                    }
-                                                }
-                                                if v97.1 == v416.1 {
-                                                    if v97.2 == v416.0 {
-                                                        let v420 = constructor_umax(
-                                                            ctx, v2.0, v416.0, v416.1,
-                                                        );
-                                                        // Rule at src/opts/selects.isle line 41.
-                                                        returns.push(v420);
-                                                    }
-                                                }
-                                            }
-                                            _ => {}
-                                        }
-                                    }
-                                }
-                            }
-                        }
-                        let v97 = C::unpack_value_array_3(ctx, v96);
-                        if v97.1 == v97.2 {
-                            // Rule at src/opts/selects.isle line 5.
-                            returns.push(v97.1);
-                        }
-                    }
-                    &Opcode::Fma => {
-                        let v97 = C::unpack_value_array_3(ctx, v96);
-                        let v101 = C::inst_data_etor(ctx, v97.0);
-                        let mut v101 = v101;
-                        while let Some(v102) = v101.next(ctx) {
-                            if let &InstructionData::Unary {
-                                opcode: ref v105,
-                                arg: v106,
-                            } = &v102.1
-                            {
-                                if let &Opcode::Fneg = v105 {
-                                    if v2.0 == v102.0 {
-                                        let v107 = C::inst_data_etor(ctx, v97.1);
-                                        let mut v107 = v107;
-                                        while let Some(v108) = v107.next(ctx) {
-                                            if let &InstructionData::Unary {
-                                                opcode: ref v111,
-                                                arg: v112,
-                                            } = &v108.1
-                                            {
-                                                if let &Opcode::Fneg = v111 {
-                                                    if v2.0 == v108.0 {
-                                                        let v113 = constructor_fma(
-                                                            ctx, v2.0, v106, v112, v97.2,
-                                                        );
-                                                        // Rule at src/opts/arithmetic.isle line 122.
-                                                        returns.push(v113);
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                            }
-                        }
-                    }
-                    _ => {}
-                }
-            }
-            &InstructionData::Unary {
-                opcode: ref v27,
-                arg: v28,
-            } => {
-                match v27 {
-                    &Opcode::Splat => {
-                        let v29 = C::inst_data_etor(ctx, v28);
-                        let mut v29 = v29;
-                        while let Some(v30) = v29.next(ctx) {
-                            match &v30.1 {
-                                &InstructionData::UnaryIeee32 {
-                                    opcode: ref v307,
-                                    imm: v308,
-                                } => {
-                                    if let &Opcode::F32const = v307 {
-                                        let v309 = C::u32_from_ieee32(ctx, v308);
-                                        let v310 = C::u32_as_u64(ctx, v309);
-                                        let v311 = constructor_splat32(ctx, v310);
-                                        let v312 = constructor_vconst(ctx, v2.0, v311);
-                                        // Rule at src/opts/cprop.isle line 188.
-                                        returns.push(v312);
-                                    }
-                                }
-                                &InstructionData::UnaryIeee64 {
-                                    opcode: ref v313,
-                                    imm: v314,
-                                } => {
-                                    if let &Opcode::F64const = v313 {
-                                        let v315 = C::u64_from_ieee64(ctx, v314);
-                                        let v316 = C::splat64(ctx, v315);
-                                        let v317 = constructor_vconst(ctx, v2.0, v316);
-                                        // Rule at src/opts/cprop.isle line 190.
-                                        returns.push(v317);
-                                    }
-                                }
-                                &InstructionData::UnaryImm {
-                                    opcode: ref v197,
-                                    imm: v198,
-                                } => {
-                                    if let &Opcode::Iconst = v197 {
-                                        match v30.0 {
-                                            I8 => {
-                                                let v292 = C::u64_uextend_imm64(ctx, I8, v198);
-                                                let v293 = constructor_splat8(ctx, v292);
-                                                let v294 = constructor_vconst(ctx, v2.0, v293);
-                                                // Rule at src/opts/cprop.isle line 180.
-                                                returns.push(v294);
-                                            }
-                                            I16 => {
-                                                let v296 = C::u64_uextend_imm64(ctx, I16, v198);
-                                                let v297 = constructor_splat16(ctx, v296);
-                                                let v298 = constructor_vconst(ctx, v2.0, v297);
-                                                // Rule at src/opts/cprop.isle line 182.
-                                                returns.push(v298);
-                                            }
-                                            I32 => {
-                                                let v300 = C::u64_uextend_imm64(ctx, I32, v198);
-                                                let v301 = constructor_splat32(ctx, v300);
-                                                let v302 = constructor_vconst(ctx, v2.0, v301);
-                                                // Rule at src/opts/cprop.isle line 184.
-                                                returns.push(v302);
-                                            }
-                                            I64 => {
-                                                let v304 = C::u64_uextend_imm64(ctx, I64, v198);
-                                                let v305 = C::splat64(ctx, v304);
-                                                let v306 = constructor_vconst(ctx, v2.0, v305);
-                                                // Rule at src/opts/cprop.isle line 186.
-                                                returns.push(v306);
-                                            }
-                                            _ => {}
-                                        }
-                                    }
-                                }
-                                _ => {}
-                            }
-                        }
-                    }
-                    &Opcode::Ineg => {
-                        let v29 = C::inst_data_etor(ctx, v28);
-                        let mut v29 = v29;
-                        while let Some(v30) = v29.next(ctx) {
-                            match &v30.1 {
-                                &InstructionData::Binary {
-                                    opcode: ref v57,
-                                    args: ref v58,
-                                } => {
-                                    if let &Opcode::Ushr = v57 {
-                                        if v2.0 == v30.0 {
-                                            let v59 = C::unpack_value_array_2(ctx, v58);
-                                            let v62 = C::inst_data_etor(ctx, v59.1);
-                                            let mut v62 = v62;
-                                            while let Some(v63) = v62.next(ctx) {
-                                                if let &InstructionData::UnaryImm {
-                                                    opcode: ref v66,
-                                                    imm: v67,
-                                                } = &v63.1
-                                                {
-                                                    if let &Opcode::Iconst = v66 {
-                                                        let v68 = C::u64_from_imm64(ctx, v67);
-                                                        let v150 = C::ty_bits(ctx, v2.0);
-                                                        let v151 = C::u8_as_u64(ctx, v150);
-                                                        let v153 = C::u64_sub(ctx, v151, 0x1);
-                                                        let v458 = C::u64_eq(ctx, v68, v153);
-                                                        if v458 == true {
-                                                            if v2.0 == v63.0 {
-                                                                let v459 = constructor_sshr(
-                                                                    ctx, v2.0, v59.0, v59.1,
-                                                                );
-                                                                // Rule at src/opts/shifts.isle line 102.
-                                                                returns.push(v459);
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                                &InstructionData::Unary {
-                                    opcode: ref v33,
-                                    arg: v34,
-                                } => {
-                                    if let &Opcode::Ineg = v33 {
-                                        if v2.0 == v30.0 {
-                                            let v35 = C::subsume(ctx, v34);
-                                            // Rule at src/opts/arithmetic.isle line 25.
-                                            returns.push(v35);
-                                        }
-                                    }
-                                }
-                                _ => {}
-                            }
-                        }
-                    }
-                    &Opcode::Iabs => {
-                        let v29 = C::inst_data_etor(ctx, v28);
-                        let mut v29 = v29;
-                        while let Some(v30) = v29.next(ctx) {
-                            if let &InstructionData::Unary {
-                                opcode: ref v33,
-                                arg: v34,
-                            } = &v30.1
-                            {
-                                match v33 {
-                                    &Opcode::Ineg => {
-                                        if v2.0 == v30.0 {
-                                            let v42 = constructor_iabs(ctx, v2.0, v34);
-                                            // Rule at src/opts/arithmetic.isle line 32.
-                                            returns.push(v42);
-                                        }
-                                    }
-                                    &Opcode::Iabs => {
-                                        if v2.0 == v30.0 {
-                                            let v43 = C::subsume(ctx, v28);
-                                            // Rule at src/opts/arithmetic.isle line 36.
-                                            returns.push(v43);
-                                        }
-                                    }
-                                    _ => {}
-                                }
-                            }
-                        }
-                    }
-                    &Opcode::Bnot => {
-                        let v29 = C::inst_data_etor(ctx, v28);
-                        let mut v29 = v29;
-                        while let Some(v30) = v29.next(ctx) {
-                            match &v30.1 {
-                                &InstructionData::Binary {
-                                    opcode: ref v57,
-                                    args: ref v58,
-                                } => {
-                                    match v57 {
-                                        &Opcode::Iadd => {
-                                            if v2.0 == v30.0 {
-                                                let v59 = C::unpack_value_array_2(ctx, v58);
-                                                let v62 = C::inst_data_etor(ctx, v59.1);
-                                                let mut v62 = v62;
-                                                while let Some(v63) = v62.next(ctx) {
-                                                    if let &InstructionData::UnaryImm {
-                                                        opcode: ref v66,
-                                                        imm: v67,
-                                                    } = &v63.1
-                                                    {
-                                                        if let &Opcode::Iconst = v66 {
-                                                            let v70 = C::i64_sextend_imm64(
-                                                                ctx, v2.0, v67,
-                                                            );
-                                                            if v70 == -0x1 {
-                                                                if v2.0 == v63.0 {
-                                                                    let v69 = constructor_ineg(
-                                                                        ctx, v2.0, v59.0,
-                                                                    );
-                                                                    // Rule at src/opts/arithmetic.isle line 82.
-                                                                    returns.push(v69);
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                                let v71 = C::inst_data_etor(ctx, v59.0);
-                                                let mut v71 = v71;
-                                                while let Some(v72) = v71.next(ctx) {
-                                                    if let &InstructionData::UnaryImm {
-                                                        opcode: ref v75,
-                                                        imm: v76,
-                                                    } = &v72.1
-                                                    {
-                                                        if let &Opcode::Iconst = v75 {
-                                                            let v77 = C::i64_sextend_imm64(
-                                                                ctx, v2.0, v76,
-                                                            );
-                                                            if v77 == -0x1 {
-                                                                if v2.0 == v72.0 {
-                                                                    let v78 = constructor_ineg(
-                                                                        ctx, v2.0, v59.1,
-                                                                    );
-                                                                    // Rule at src/opts/arithmetic.isle line 85.
-                                                                    returns.push(v78);
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                        &Opcode::Isub => {
-                                            if v2.0 == v30.0 {
-                                                let v59 = C::unpack_value_array_2(ctx, v58);
-                                                let v62 = C::inst_data_etor(ctx, v59.1);
-                                                let mut v62 = v62;
-                                                while let Some(v63) = v62.next(ctx) {
-                                                    if let &InstructionData::UnaryImm {
-                                                        opcode: ref v66,
-                                                        imm: v67,
-                                                    } = &v63.1
-                                                    {
-                                                        if let &Opcode::Iconst = v66 {
-                                                            let v68 = C::u64_from_imm64(ctx, v67);
-                                                            if v68 == 0x1 {
-                                                                if v2.0 == v63.0 {
-                                                                    let v69 = constructor_ineg(
-                                                                        ctx, v2.0, v59.0,
-                                                                    );
-                                                                    // Rule at src/opts/arithmetic.isle line 80.
-                                                                    returns.push(v69);
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                        &Opcode::Band => {
-                                            let v59 = C::unpack_value_array_2(ctx, v58);
-                                            let v119 = constructor_bnot(ctx, v2.0, v59.0);
-                                            let v120 = constructor_bnot(ctx, v2.0, v59.1);
-                                            let v122 = constructor_bor(ctx, v2.0, v119, v120);
-                                            // Rule at src/opts/bitops.isle line 60.
-                                            returns.push(v122);
-                                        }
-                                        &Opcode::Bor => {
-                                            if v2.0 == v30.0 {
-                                                let v59 = C::unpack_value_array_2(ctx, v58);
-                                                let v119 = constructor_bnot(ctx, v2.0, v59.0);
-                                                let v120 = constructor_bnot(ctx, v2.0, v59.1);
-                                                let v121 = constructor_band(ctx, v2.0, v119, v120);
-                                                // Rule at src/opts/bitops.isle line 57.
-                                                returns.push(v121);
-                                            }
-                                        }
-                                        _ => {}
-                                    }
-                                }
-                                &InstructionData::Unary {
-                                    opcode: ref v33,
-                                    arg: v34,
-                                } => {
-                                    if let &Opcode::Bnot = v33 {
-                                        if v2.0 == v30.0 {
-                                            let v35 = C::subsume(ctx, v34);
-                                            // Rule at src/opts/bitops.isle line 53.
-                                            returns.push(v35);
-                                        }
-                                    }
-                                }
-                                &InstructionData::UnaryImm {
-                                    opcode: ref v197,
-                                    imm: v198,
-                                } => {
-                                    if let &Opcode::Iconst = v197 {
-                                        let v44 = C::fits_in_64(ctx, v2.0);
-                                        if let Some(v45) = v44 {
-                                            if v30.0 == v45 {
-                                                let v199 = C::u64_from_imm64(ctx, v198);
-                                                let v200 = C::u64_not(ctx, v199);
-                                                let v201 = C::imm64_masked(ctx, v45, v200);
-                                                let v202 = constructor_iconst(ctx, v45, v201);
-                                                let v203 = C::subsume(ctx, v202);
-                                                // Rule at src/opts/cprop.isle line 53.
-                                                returns.push(v203);
-                                            }
-                                        }
-                                    }
-                                }
-                                _ => {}
-                            }
-                        }
-                        let v406 = C::remat(ctx, arg0);
-                        // Rule at src/opts/remat.isle line 24.
-                        returns.push(v406);
-                    }
-                    &Opcode::Fneg => {
-                        let v29 = C::inst_data_etor(ctx, v28);
-                        let mut v29 = v29;
-                        while let Some(v30) = v29.next(ctx) {
-                            if let &InstructionData::Unary {
-                                opcode: ref v33,
-                                arg: v34,
-                            } = &v30.1
-                            {
-                                if let &Opcode::Fneg = v33 {
-                                    if v2.0 == v30.0 {
-                                        let v35 = C::subsume(ctx, v34);
-                                        // Rule at src/opts/arithmetic.isle line 118.
-                                        returns.push(v35);
-                                    }
-                                }
-                            }
-                        }
-                    }
-                    &Opcode::Ireduce => {
-                        let v29 = C::inst_data_etor(ctx, v28);
-                        let mut v29 = v29;
-                        while let Some(v30) = v29.next(ctx) {
-                            match &v30.1 {
-                                &InstructionData::Unary {
-                                    opcode: ref v33,
-                                    arg: v34,
-                                } => {
-                                    match v33 {
-                                        &Opcode::Uextend => {
-                                            let v333 = C::value_type(ctx, v34);
-                                            if v2.0 == v333 {
-                                                // Rule at src/opts/extends.isle line 34.
-                                                returns.push(v34);
-                                            }
-                                        }
-                                        &Opcode::Sextend => {
-                                            let v333 = C::value_type(ctx, v34);
-                                            if v2.0 == v333 {
-                                                // Rule at src/opts/extends.isle line 33.
-                                                returns.push(v34);
-                                            }
-                                        }
-                                        _ => {}
-                                    }
-                                }
-                                &InstructionData::UnaryImm {
-                                    opcode: ref v197,
-                                    imm: v198,
-                                } => {
-                                    if let &Opcode::Iconst = v197 {
-                                        let v213 = C::fits_in_64(ctx, v30.0);
-                                        if let Some(v214) = v213 {
-                                            let v199 = C::u64_from_imm64(ctx, v198);
-                                            let v215 = C::imm64_masked(ctx, v2.0, v199);
-                                            let v216 = constructor_iconst(ctx, v2.0, v215);
-                                            let v217 = C::subsume(ctx, v216);
-                                            // Rule at src/opts/cprop.isle line 73.
-                                            returns.push(v217);
-                                        }
-                                    }
-                                }
-                                _ => {}
-                            }
-                        }
-                    }
-                    &Opcode::SwidenLow => {
-                        let v29 = C::inst_data_etor(ctx, v28);
-                        let mut v29 = v29;
-                        while let Some(v30) = v29.next(ctx) {
-                            if let &InstructionData::Unary {
-                                opcode: ref v33,
-                                arg: v34,
-                            } = &v30.1
-                            {
-                                if let &Opcode::Splat = v33 {
-                                    let v334 = C::lane_type(ctx, v2.0);
-                                    let v335 = constructor_sextend(ctx, v334, v34);
-                                    let v336 = constructor_splat(ctx, v2.0, v335);
-                                    // Rule at src/opts/extends.isle line 38.
-                                    returns.push(v336);
-                                }
-                            }
-                        }
-                    }
-                    &Opcode::SwidenHigh => {
-                        let v29 = C::inst_data_etor(ctx, v28);
-                        let mut v29 = v29;
-                        while let Some(v30) = v29.next(ctx) {
-                            if let &InstructionData::Unary {
-                                opcode: ref v33,
-                                arg: v34,
-                            } = &v30.1
-                            {
-                                if let &Opcode::Splat = v33 {
-                                    let v334 = C::lane_type(ctx, v2.0);
-                                    let v335 = constructor_sextend(ctx, v334, v34);
-                                    let v336 = constructor_splat(ctx, v2.0, v335);
-                                    // Rule at src/opts/extends.isle line 37.
-                                    returns.push(v336);
-                                }
-                            }
-                        }
-                    }
-                    &Opcode::UwidenLow => {
-                        let v29 = C::inst_data_etor(ctx, v28);
-                        let mut v29 = v29;
-                        while let Some(v30) = v29.next(ctx) {
-                            if let &InstructionData::Unary {
-                                opcode: ref v33,
-                                arg: v34,
-                            } = &v30.1
-                            {
-                                if let &Opcode::Splat = v33 {
-                                    let v334 = C::lane_type(ctx, v2.0);
-                                    let v337 = constructor_uextend(ctx, v334, v34);
-                                    let v338 = constructor_splat(ctx, v2.0, v337);
-                                    // Rule at src/opts/extends.isle line 41.
-                                    returns.push(v338);
-                                }
-                            }
-                        }
-                    }
-                    &Opcode::UwidenHigh => {
-                        let v29 = C::inst_data_etor(ctx, v28);
-                        let mut v29 = v29;
-                        while let Some(v30) = v29.next(ctx) {
-                            if let &InstructionData::Unary {
-                                opcode: ref v33,
-                                arg: v34,
-                            } = &v30.1
-                            {
-                                if let &Opcode::Splat = v33 {
-                                    let v334 = C::lane_type(ctx, v2.0);
-                                    let v337 = constructor_uextend(ctx, v334, v34);
-                                    let v338 = constructor_splat(ctx, v2.0, v337);
-                                    // Rule at src/opts/extends.isle line 40.
-                                    returns.push(v338);
-                                }
-                            }
-                        }
-                    }
-                    &Opcode::Uextend => {
-                        let v29 = C::inst_data_etor(ctx, v28);
-                        let mut v29 = v29;
-                        while let Some(v30) = v29.next(ctx) {
-                            match &v30.1 {
-                                &InstructionData::Unary {
-                                    opcode: ref v33,
-                                    arg: v34,
-                                } => {
-                                    if let &Opcode::Uextend = v33 {
-                                        let v318 = constructor_uextend(ctx, v2.0, v34);
-                                        // Rule at src/opts/extends.isle line 2.
-                                        returns.push(v318);
-                                    }
-                                }
-                                &InstructionData::UnaryImm {
-                                    opcode: ref v197,
-                                    imm: v198,
-                                } => {
-                                    if let &Opcode::Iconst = v197 {
-                                        let v44 = C::fits_in_64(ctx, v2.0);
-                                        if let Some(v45) = v44 {
-                                            let v218 = C::u64_uextend_imm64(ctx, v30.0, v198);
-                                            let v219 = C::imm64(ctx, v218);
-                                            let v220 = constructor_iconst(ctx, v45, v219);
-                                            let v221 = C::subsume(ctx, v220);
-                                            // Rule at src/opts/cprop.isle line 76.
-                                            returns.push(v221);
-                                        }
-                                    }
-                                }
-                                _ => {}
-                            }
-                        }
-                    }
-                    &Opcode::Sextend => {
-                        let v29 = C::inst_data_etor(ctx, v28);
-                        let mut v29 = v29;
-                        while let Some(v30) = v29.next(ctx) {
-                            match &v30.1 {
-                                &InstructionData::Unary {
-                                    opcode: ref v33,
-                                    arg: v34,
-                                } => {
-                                    if let &Opcode::Sextend = v33 {
-                                        let v319 = constructor_sextend(ctx, v2.0, v34);
-                                        // Rule at src/opts/extends.isle line 4.
-                                        returns.push(v319);
-                                    }
-                                }
-                                &InstructionData::UnaryImm {
-                                    opcode: ref v197,
-                                    imm: v198,
-                                } => {
-                                    if let &Opcode::Iconst = v197 {
-                                        let v44 = C::fits_in_64(ctx, v2.0);
-                                        if let Some(v45) = v44 {
-                                            let v222 = C::i64_sextend_imm64(ctx, v30.0, v198);
-                                            let v223 = C::i64_as_u64(ctx, v222);
-                                            let v224 = C::imm64_masked(ctx, v45, v223);
-                                            let v225 = constructor_iconst(ctx, v45, v224);
-                                            let v226 = C::subsume(ctx, v225);
-                                            // Rule at src/opts/cprop.isle line 79.
-                                            returns.push(v226);
-                                        }
-                                    }
-                                }
-                                _ => {}
-                            }
-                        }
-                    }
-                    &Opcode::FcvtFromUint => {
-                        let v29 = C::inst_data_etor(ctx, v28);
-                        let mut v29 = v29;
-                        while let Some(v30) = v29.next(ctx) {
-                            if let &InstructionData::Unary {
-                                opcode: ref v33,
-                                arg: v34,
-                            } = &v30.1
-                            {
-                                if let &Opcode::Splat = v33 {
-                                    let v334 = C::lane_type(ctx, v2.0);
-                                    let v460 = constructor_fcvt_from_uint(ctx, v334, v34);
-                                    let v461 = constructor_splat(ctx, v2.0, v460);
-                                    // Rule at src/opts/vector.isle line 5.
-                                    returns.push(v461);
-                                }
-                            }
-                        }
-                    }
-                    &Opcode::FcvtFromSint => {
-                        let v29 = C::inst_data_etor(ctx, v28);
-                        let mut v29 = v29;
-                        while let Some(v30) = v29.next(ctx) {
-                            if let &InstructionData::Unary {
-                                opcode: ref v33,
-                                arg: v34,
-                            } = &v30.1
-                            {
-                                if let &Opcode::Splat = v33 {
-                                    let v334 = C::lane_type(ctx, v2.0);
-                                    let v462 = constructor_fcvt_from_sint(ctx, v334, v34);
-                                    let v463 = constructor_splat(ctx, v2.0, v462);
-                                    // Rule at src/opts/vector.isle line 7.
-                                    returns.push(v463);
-                                }
-                            }
-                        }
-                    }
-                    _ => {}
-                }
-            }
-            &InstructionData::UnaryIeee32 {
-                opcode: ref v409,
-                imm: v410,
-            } => {
-                if let &Opcode::F32const = v409 {
-                    let v406 = C::remat(ctx, arg0);
-                    // Rule at src/opts/remat.isle line 28.
-                    returns.push(v406);
-                }
-            }
-            &InstructionData::UnaryIeee64 {
-                opcode: ref v411,
-                imm: v412,
-            } => {
-                if let &Opcode::F64const = v411 {
-                    let v406 = C::remat(ctx, arg0);
-                    // Rule at src/opts/remat.isle line 30.
-                    returns.push(v406);
-                }
-            }
-            &InstructionData::UnaryImm {
-                opcode: ref v407,
-                imm: v408,
-            } => {
-                if let &Opcode::Iconst = v407 {
-                    let v406 = C::remat(ctx, arg0);
-                    // Rule at src/opts/remat.isle line 26.
-                    returns.push(v406);
-                }
-            }
-            _ => {}
-        }
-    }
-    return ContextIterWrapper::from(returns.into_iter());
-}
-
-// Generated as internal constructor for term splat8.
-pub fn constructor_splat8<C: Context>(ctx: &mut C, arg0: u64) -> Constant {
-    let v2 = C::u64_shl(ctx, arg0, 0x8);
-    let v3 = C::u64_or(ctx, arg0, v2);
-    let v4 = constructor_splat16(ctx, v3);
-    // Rule at src/opts/cprop.isle line 194.
-    return v4;
-}
-
-// Generated as internal constructor for term splat16.
-pub fn constructor_splat16<C: Context>(ctx: &mut C, arg0: u64) -> Constant {
-    let v2 = C::u64_shl(ctx, arg0, 0x10);
-    let v3 = C::u64_or(ctx, arg0, v2);
-    let v4 = constructor_splat32(ctx, v3);
-    // Rule at src/opts/cprop.isle line 196.
-    return v4;
-}
-
-// Generated as internal constructor for term splat32.
-pub fn constructor_splat32<C: Context>(ctx: &mut C, arg0: u64) -> Constant {
-    let v2 = C::u64_shl(ctx, arg0, 0x20);
-    let v3 = C::u64_or(ctx, arg0, v2);
-    let v4 = C::splat64(ctx, v3);
-    // Rule at src/opts/cprop.isle line 198.
-    return v4;
-}
-
-// Generated as internal constructor for term intcc_comparable.
-pub fn constructor_intcc_comparable<C: Context>(
-    ctx: &mut C,
-    arg0: &IntCC,
-    arg1: &IntCC,
-) -> Option<bool> {
-    let v2 = constructor_intcc_class(ctx, arg0);
-    let v3 = constructor_intcc_class(ctx, arg1);
-    let v4 = C::u64_and(ctx, v2, v3);
-    let v5 = C::u64_is_zero(ctx, v4);
-    if v5 == false {
-        let v7 = C::u64_eq(ctx, 0x2, v4);
-        // Rule at src/opts/icmp.isle line 137.
-        return Some(v7);
-    }
-    None
-}
-
-// Generated as internal constructor for term decompose_intcc.
-pub fn constructor_decompose_intcc<C: Context>(ctx: &mut C, arg0: &IntCC) -> u64 {
-    match arg0 {
-        &IntCC::Equal => {
-            // Rule at src/opts/icmp.isle line 142.
-            return 0x1;
-        }
-        &IntCC::NotEqual => {
-            // Rule at src/opts/icmp.isle line 151.
-            return 0x6;
-        }
-        &IntCC::SignedGreaterThan => {
-            // Rule at src/opts/icmp.isle line 148.
-            return 0x4;
-        }
-        &IntCC::SignedGreaterThanOrEqual => {
-            // Rule at src/opts/icmp.isle line 150.
-            return 0x5;
-        }
-        &IntCC::SignedLessThan => {
-            // Rule at src/opts/icmp.isle line 144.
-            return 0x2;
-        }
-        &IntCC::SignedLessThanOrEqual => {
-            // Rule at src/opts/icmp.isle line 146.
-            return 0x3;
-        }
-        &IntCC::UnsignedGreaterThan => {
-            // Rule at src/opts/icmp.isle line 147.
-            return 0x4;
-        }
-        &IntCC::UnsignedGreaterThanOrEqual => {
-            // Rule at src/opts/icmp.isle line 149.
-            return 0x5;
-        }
-        &IntCC::UnsignedLessThan => {
-            // Rule at src/opts/icmp.isle line 143.
-            return 0x2;
-        }
-        &IntCC::UnsignedLessThanOrEqual => {
-            // Rule at src/opts/icmp.isle line 145.
-            return 0x3;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "decompose_intcc", "src/opts/icmp.isle line 141"
-    )
-}
-
-// Generated as internal constructor for term compose_icmp.
-pub fn constructor_compose_icmp<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: u64,
-    arg2: bool,
-    arg3: Value,
-    arg4: Value,
-) -> Value {
-    match arg1 {
-        0x0 => {
-            let v6 = C::imm64(ctx, 0x0);
-            let v7 = constructor_iconst(ctx, arg0, v6);
-            let v8 = C::subsume(ctx, v7);
-            // Rule at src/opts/icmp.isle line 154.
-            return v8;
-        }
-        0x1 => {
-            let v10 = constructor_icmp(ctx, arg0, &IntCC::Equal, arg3, arg4);
-            // Rule at src/opts/icmp.isle line 155.
-            return v10;
-        }
-        0x2 => {
-            match arg2 {
-                true => {
-                    let v14 = constructor_icmp(ctx, arg0, &IntCC::SignedLessThan, arg3, arg4);
-                    // Rule at src/opts/icmp.isle line 157.
-                    return v14;
-                }
-                false => {
-                    let v12 = constructor_icmp(ctx, arg0, &IntCC::UnsignedLessThan, arg3, arg4);
-                    // Rule at src/opts/icmp.isle line 156.
-                    return v12;
-                }
-                _ => {}
-            }
-        }
-        0x3 => {
-            match arg2 {
-                true => {
-                    let v18 =
-                        constructor_icmp(ctx, arg0, &IntCC::SignedLessThanOrEqual, arg3, arg4);
-                    // Rule at src/opts/icmp.isle line 159.
-                    return v18;
-                }
-                false => {
-                    let v16 =
-                        constructor_icmp(ctx, arg0, &IntCC::UnsignedLessThanOrEqual, arg3, arg4);
-                    // Rule at src/opts/icmp.isle line 158.
-                    return v16;
-                }
-                _ => {}
-            }
-        }
-        0x4 => {
-            match arg2 {
-                true => {
-                    let v22 = constructor_icmp(ctx, arg0, &IntCC::SignedGreaterThan, arg3, arg4);
-                    // Rule at src/opts/icmp.isle line 161.
-                    return v22;
-                }
-                false => {
-                    let v20 = constructor_icmp(ctx, arg0, &IntCC::UnsignedGreaterThan, arg3, arg4);
-                    // Rule at src/opts/icmp.isle line 160.
-                    return v20;
-                }
-                _ => {}
-            }
-        }
-        0x5 => {
-            match arg2 {
-                true => {
-                    let v26 =
-                        constructor_icmp(ctx, arg0, &IntCC::SignedGreaterThanOrEqual, arg3, arg4);
-                    // Rule at src/opts/icmp.isle line 163.
-                    return v26;
-                }
-                false => {
-                    let v24 =
-                        constructor_icmp(ctx, arg0, &IntCC::UnsignedGreaterThanOrEqual, arg3, arg4);
-                    // Rule at src/opts/icmp.isle line 162.
-                    return v24;
-                }
-                _ => {}
-            }
-        }
-        0x6 => {
-            let v28 = constructor_icmp(ctx, arg0, &IntCC::NotEqual, arg3, arg4);
-            // Rule at src/opts/icmp.isle line 164.
-            return v28;
-        }
-        0x7 => {
-            let v30 = C::imm64(ctx, 0x1);
-            let v31 = constructor_iconst(ctx, arg0, v30);
-            let v32 = C::subsume(ctx, v31);
-            // Rule at src/opts/icmp.isle line 165.
-            return v32;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "compose_icmp", "src/opts/icmp.isle line 153"
-    )
-}
-
-// Generated as internal constructor for term intcc_class.
-pub fn constructor_intcc_class<C: Context>(ctx: &mut C, arg0: &IntCC) -> u64 {
-    match arg0 {
-        &IntCC::Equal => {
-            // Rule at src/opts/icmp.isle line 176.
-            return 0x3;
-        }
-        &IntCC::NotEqual => {
-            // Rule at src/opts/icmp.isle line 177.
-            return 0x3;
-        }
-        &IntCC::SignedGreaterThan => {
-            // Rule at src/opts/icmp.isle line 174.
-            return 0x2;
-        }
-        &IntCC::SignedGreaterThanOrEqual => {
-            // Rule at src/opts/icmp.isle line 175.
-            return 0x2;
-        }
-        &IntCC::SignedLessThan => {
-            // Rule at src/opts/icmp.isle line 172.
-            return 0x2;
-        }
-        &IntCC::SignedLessThanOrEqual => {
-            // Rule at src/opts/icmp.isle line 173.
-            return 0x2;
-        }
-        &IntCC::UnsignedGreaterThan => {
-            // Rule at src/opts/icmp.isle line 170.
-            return 0x1;
-        }
-        &IntCC::UnsignedGreaterThanOrEqual => {
-            // Rule at src/opts/icmp.isle line 171.
-            return 0x1;
-        }
-        &IntCC::UnsignedLessThan => {
-            // Rule at src/opts/icmp.isle line 168.
-            return 0x1;
-        }
-        &IntCC::UnsignedLessThanOrEqual => {
-            // Rule at src/opts/icmp.isle line 169.
-            return 0x1;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "intcc_class", "src/opts/icmp.isle line 167"
-    )
-}
-
-// Generated as internal constructor for term shift_amt_to_type.
-pub fn constructor_shift_amt_to_type<C: Context>(ctx: &mut C, arg0: u64) -> Option<Type> {
-    match arg0 {
-        0x8 => {
-            // Rule at src/opts/shifts.isle line 97.
-            return Some(I8);
-        }
-        0x10 => {
-            // Rule at src/opts/shifts.isle line 98.
-            return Some(I16);
-        }
-        0x20 => {
-            // Rule at src/opts/shifts.isle line 99.
-            return Some(I32);
-        }
-        _ => {}
-    }
-    None
-}
-
-// Generated as internal constructor for term func_addr.
-pub fn constructor_func_addr<C: Context>(ctx: &mut C, arg0: Type, arg1: FuncRef) -> Value {
-    let v3 = InstructionData::FuncAddr {
-        opcode: Opcode::FuncAddr,
-        func_ref: arg1,
-    };
-    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 363.
-    return v4;
-}
-
-// Generated as internal constructor for term splat.
-pub fn constructor_splat<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
-    let v3 = InstructionData::Unary {
-        opcode: Opcode::Splat,
-        arg: arg1,
-    };
-    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 372.
-    return v4;
-}
-
-// Generated as internal constructor for term swizzle.
-pub fn constructor_swizzle<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
-    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
-    let v5 = InstructionData::Binary {
-        opcode: Opcode::Swizzle,
-        args: v4.clone(),
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 381.
-    return v6;
-}
-
-// Generated as internal constructor for term x86_pshufb.
-pub fn constructor_x86_pshufb<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Value,
-    arg2: Value,
-) -> Value {
-    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
-    let v5 = InstructionData::Binary {
-        opcode: Opcode::X86Pshufb,
-        args: v4.clone(),
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 390.
-    return v6;
-}
-
-// Generated as internal constructor for term insertlane.
-pub fn constructor_insertlane<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Value,
-    arg2: Value,
-    arg3: Uimm8,
-) -> Value {
-    let v5 = &C::value_array_2_ctor(ctx, arg1, arg2);
-    let v6 = InstructionData::TernaryImm8 {
-        opcode: Opcode::Insertlane,
-        args: v5.clone(),
-        imm: arg3,
-    };
-    let v7 = C::make_inst_ctor(ctx, arg0, &v6);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 399.
-    return v7;
-}
-
-// Generated as internal constructor for term extractlane.
-pub fn constructor_extractlane<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Value,
-    arg2: Uimm8,
-) -> Value {
-    let v4 = InstructionData::BinaryImm8 {
-        opcode: Opcode::Extractlane,
-        arg: arg1,
-        imm: arg2,
-    };
-    let v5 = C::make_inst_ctor(ctx, arg0, &v4);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 408.
-    return v5;
-}
-
-// Generated as internal constructor for term smin.
-pub fn constructor_smin<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
-    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
-    let v5 = InstructionData::Binary {
-        opcode: Opcode::Smin,
-        args: v4.clone(),
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 417.
-    return v6;
-}
-
-// Generated as internal constructor for term umin.
-pub fn constructor_umin<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
-    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
-    let v5 = InstructionData::Binary {
-        opcode: Opcode::Umin,
-        args: v4.clone(),
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 426.
-    return v6;
-}
-
-// Generated as internal constructor for term smax.
-pub fn constructor_smax<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
-    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
-    let v5 = InstructionData::Binary {
-        opcode: Opcode::Smax,
-        args: v4.clone(),
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 435.
-    return v6;
-}
-
-// Generated as internal constructor for term umax.
-pub fn constructor_umax<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
-    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
-    let v5 = InstructionData::Binary {
-        opcode: Opcode::Umax,
-        args: v4.clone(),
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 444.
-    return v6;
-}
-
-// Generated as internal constructor for term avg_round.
-pub fn constructor_avg_round<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Value,
-    arg2: Value,
-) -> Value {
-    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
-    let v5 = InstructionData::Binary {
-        opcode: Opcode::AvgRound,
-        args: v4.clone(),
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 453.
-    return v6;
-}
-
-// Generated as internal constructor for term uadd_sat.
-pub fn constructor_uadd_sat<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Value,
-    arg2: Value,
-) -> Value {
-    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
-    let v5 = InstructionData::Binary {
-        opcode: Opcode::UaddSat,
-        args: v4.clone(),
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 462.
-    return v6;
-}
-
-// Generated as internal constructor for term sadd_sat.
-pub fn constructor_sadd_sat<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Value,
-    arg2: Value,
-) -> Value {
-    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
-    let v5 = InstructionData::Binary {
-        opcode: Opcode::SaddSat,
-        args: v4.clone(),
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 471.
-    return v6;
-}
-
-// Generated as internal constructor for term usub_sat.
-pub fn constructor_usub_sat<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Value,
-    arg2: Value,
-) -> Value {
-    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
-    let v5 = InstructionData::Binary {
-        opcode: Opcode::UsubSat,
-        args: v4.clone(),
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 480.
-    return v6;
-}
-
-// Generated as internal constructor for term ssub_sat.
-pub fn constructor_ssub_sat<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Value,
-    arg2: Value,
-) -> Value {
-    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
-    let v5 = InstructionData::Binary {
-        opcode: Opcode::SsubSat,
-        args: v4.clone(),
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 489.
-    return v6;
-}
-
-// Generated as internal constructor for term load.
-pub fn constructor_load<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: MemFlags,
-    arg2: Value,
-    arg3: Offset32,
-) -> Value {
-    let v5 = InstructionData::Load {
-        opcode: Opcode::Load,
-        arg: arg2,
-        flags: arg1,
-        offset: arg3,
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 498.
-    return v6;
-}
-
-// Generated as internal constructor for term uload8.
-pub fn constructor_uload8<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: MemFlags,
-    arg2: Value,
-    arg3: Offset32,
-) -> Value {
-    let v5 = InstructionData::Load {
-        opcode: Opcode::Uload8,
-        arg: arg2,
-        flags: arg1,
-        offset: arg3,
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 507.
-    return v6;
-}
-
-// Generated as internal constructor for term sload8.
-pub fn constructor_sload8<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: MemFlags,
-    arg2: Value,
-    arg3: Offset32,
-) -> Value {
-    let v5 = InstructionData::Load {
-        opcode: Opcode::Sload8,
-        arg: arg2,
-        flags: arg1,
-        offset: arg3,
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 516.
-    return v6;
-}
-
-// Generated as internal constructor for term uload16.
-pub fn constructor_uload16<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: MemFlags,
-    arg2: Value,
-    arg3: Offset32,
-) -> Value {
-    let v5 = InstructionData::Load {
-        opcode: Opcode::Uload16,
-        arg: arg2,
-        flags: arg1,
-        offset: arg3,
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 525.
-    return v6;
-}
-
-// Generated as internal constructor for term sload16.
-pub fn constructor_sload16<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: MemFlags,
-    arg2: Value,
-    arg3: Offset32,
-) -> Value {
-    let v5 = InstructionData::Load {
-        opcode: Opcode::Sload16,
-        arg: arg2,
-        flags: arg1,
-        offset: arg3,
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 534.
-    return v6;
-}
-
-// Generated as internal constructor for term uload32.
-pub fn constructor_uload32<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: MemFlags,
-    arg2: Value,
-    arg3: Offset32,
-) -> Value {
-    let v5 = InstructionData::Load {
-        opcode: Opcode::Uload32,
-        arg: arg2,
-        flags: arg1,
-        offset: arg3,
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 543.
-    return v6;
-}
-
-// Generated as internal constructor for term sload32.
-pub fn constructor_sload32<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: MemFlags,
-    arg2: Value,
-    arg3: Offset32,
-) -> Value {
-    let v5 = InstructionData::Load {
-        opcode: Opcode::Sload32,
-        arg: arg2,
-        flags: arg1,
-        offset: arg3,
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 552.
-    return v6;
-}
-
-// Generated as internal constructor for term uload8x8.
-pub fn constructor_uload8x8<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: MemFlags,
-    arg2: Value,
-    arg3: Offset32,
-) -> Value {
-    let v5 = InstructionData::Load {
-        opcode: Opcode::Uload8x8,
-        arg: arg2,
-        flags: arg1,
-        offset: arg3,
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 561.
-    return v6;
-}
-
-// Generated as internal constructor for term sload8x8.
-pub fn constructor_sload8x8<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: MemFlags,
-    arg2: Value,
-    arg3: Offset32,
-) -> Value {
-    let v5 = InstructionData::Load {
-        opcode: Opcode::Sload8x8,
-        arg: arg2,
-        flags: arg1,
-        offset: arg3,
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 570.
-    return v6;
-}
-
-// Generated as internal constructor for term uload16x4.
-pub fn constructor_uload16x4<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: MemFlags,
-    arg2: Value,
-    arg3: Offset32,
-) -> Value {
-    let v5 = InstructionData::Load {
-        opcode: Opcode::Uload16x4,
-        arg: arg2,
-        flags: arg1,
-        offset: arg3,
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 579.
-    return v6;
-}
-
-// Generated as internal constructor for term sload16x4.
-pub fn constructor_sload16x4<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: MemFlags,
-    arg2: Value,
-    arg3: Offset32,
-) -> Value {
-    let v5 = InstructionData::Load {
-        opcode: Opcode::Sload16x4,
-        arg: arg2,
-        flags: arg1,
-        offset: arg3,
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 588.
-    return v6;
-}
-
-// Generated as internal constructor for term uload32x2.
-pub fn constructor_uload32x2<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: MemFlags,
-    arg2: Value,
-    arg3: Offset32,
-) -> Value {
-    let v5 = InstructionData::Load {
-        opcode: Opcode::Uload32x2,
-        arg: arg2,
-        flags: arg1,
-        offset: arg3,
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 597.
-    return v6;
-}
-
-// Generated as internal constructor for term sload32x2.
-pub fn constructor_sload32x2<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: MemFlags,
-    arg2: Value,
-    arg3: Offset32,
-) -> Value {
-    let v5 = InstructionData::Load {
-        opcode: Opcode::Sload32x2,
-        arg: arg2,
-        flags: arg1,
-        offset: arg3,
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 606.
-    return v6;
-}
-
-// Generated as internal constructor for term stack_load.
-pub fn constructor_stack_load<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: StackSlot,
-    arg2: Offset32,
-) -> Value {
-    let v4 = InstructionData::StackLoad {
-        opcode: Opcode::StackLoad,
-        stack_slot: arg1,
-        offset: arg2,
-    };
-    let v5 = C::make_inst_ctor(ctx, arg0, &v4);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 615.
-    return v5;
-}
-
-// Generated as internal constructor for term stack_addr.
-pub fn constructor_stack_addr<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: StackSlot,
-    arg2: Offset32,
-) -> Value {
-    let v4 = InstructionData::StackLoad {
-        opcode: Opcode::StackAddr,
-        stack_slot: arg1,
-        offset: arg2,
-    };
-    let v5 = C::make_inst_ctor(ctx, arg0, &v4);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 624.
-    return v5;
-}
-
-// Generated as internal constructor for term dynamic_stack_load.
-pub fn constructor_dynamic_stack_load<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: DynamicStackSlot,
-) -> Value {
-    let v3 = InstructionData::DynamicStackLoad {
-        opcode: Opcode::DynamicStackLoad,
-        dynamic_stack_slot: arg1,
-    };
-    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 633.
-    return v4;
-}
-
-// Generated as internal constructor for term dynamic_stack_addr.
-pub fn constructor_dynamic_stack_addr<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: DynamicStackSlot,
-) -> Value {
-    let v3 = InstructionData::DynamicStackLoad {
-        opcode: Opcode::DynamicStackAddr,
-        dynamic_stack_slot: arg1,
-    };
-    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 642.
-    return v4;
-}
-
-// Generated as internal constructor for term global_value.
-pub fn constructor_global_value<C: Context>(ctx: &mut C, arg0: Type, arg1: GlobalValue) -> Value {
-    let v3 = InstructionData::UnaryGlobalValue {
-        opcode: Opcode::GlobalValue,
-        global_value: arg1,
-    };
-    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 651.
-    return v4;
-}
-
-// Generated as internal constructor for term symbol_value.
-pub fn constructor_symbol_value<C: Context>(ctx: &mut C, arg0: Type, arg1: GlobalValue) -> Value {
-    let v3 = InstructionData::UnaryGlobalValue {
-        opcode: Opcode::SymbolValue,
-        global_value: arg1,
-    };
-    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 660.
-    return v4;
-}
-
-// Generated as internal constructor for term tls_value.
-pub fn constructor_tls_value<C: Context>(ctx: &mut C, arg0: Type, arg1: GlobalValue) -> Value {
-    let v3 = InstructionData::UnaryGlobalValue {
-        opcode: Opcode::TlsValue,
-        global_value: arg1,
-    };
-    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 669.
-    return v4;
-}
-
-// Generated as internal constructor for term get_pinned_reg.
-pub fn constructor_get_pinned_reg<C: Context>(ctx: &mut C, arg0: Type) -> Value {
-    let v2 = InstructionData::NullAry {
-        opcode: Opcode::GetPinnedReg,
-    };
-    let v3 = C::make_inst_ctor(ctx, arg0, &v2);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 678.
-    return v3;
-}
-
-// Generated as internal constructor for term get_frame_pointer.
-pub fn constructor_get_frame_pointer<C: Context>(ctx: &mut C, arg0: Type) -> Value {
-    let v2 = InstructionData::NullAry {
-        opcode: Opcode::GetFramePointer,
-    };
-    let v3 = C::make_inst_ctor(ctx, arg0, &v2);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 687.
-    return v3;
-}
-
-// Generated as internal constructor for term get_stack_pointer.
-pub fn constructor_get_stack_pointer<C: Context>(ctx: &mut C, arg0: Type) -> Value {
-    let v2 = InstructionData::NullAry {
-        opcode: Opcode::GetStackPointer,
-    };
-    let v3 = C::make_inst_ctor(ctx, arg0, &v2);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 696.
-    return v3;
-}
-
-// Generated as internal constructor for term get_return_address.
-pub fn constructor_get_return_address<C: Context>(ctx: &mut C, arg0: Type) -> Value {
-    let v2 = InstructionData::NullAry {
-        opcode: Opcode::GetReturnAddress,
-    };
-    let v3 = C::make_inst_ctor(ctx, arg0, &v2);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 705.
-    return v3;
-}
-
-// Generated as internal constructor for term table_addr.
-pub fn constructor_table_addr<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Table,
-    arg2: Value,
-    arg3: Offset32,
-) -> Value {
-    let v5 = InstructionData::TableAddr {
-        opcode: Opcode::TableAddr,
-        arg: arg2,
-        table: arg1,
-        offset: arg3,
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 714.
-    return v6;
-}
-
-// Generated as internal constructor for term iconst.
-pub fn constructor_iconst<C: Context>(ctx: &mut C, arg0: Type, arg1: Imm64) -> Value {
-    let v3 = InstructionData::UnaryImm {
-        opcode: Opcode::Iconst,
-        imm: arg1,
-    };
-    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 723.
-    return v4;
-}
-
-// Generated as internal constructor for term f32const.
-pub fn constructor_f32const<C: Context>(ctx: &mut C, arg0: Type, arg1: Ieee32) -> Value {
-    let v3 = InstructionData::UnaryIeee32 {
-        opcode: Opcode::F32const,
-        imm: arg1,
-    };
-    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 732.
-    return v4;
-}
-
-// Generated as internal constructor for term f64const.
-pub fn constructor_f64const<C: Context>(ctx: &mut C, arg0: Type, arg1: Ieee64) -> Value {
-    let v3 = InstructionData::UnaryIeee64 {
-        opcode: Opcode::F64const,
-        imm: arg1,
-    };
-    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 741.
-    return v4;
-}
-
-// Generated as internal constructor for term vconst.
-pub fn constructor_vconst<C: Context>(ctx: &mut C, arg0: Type, arg1: Constant) -> Value {
-    let v3 = InstructionData::UnaryConst {
-        opcode: Opcode::Vconst,
-        constant_handle: arg1,
-    };
-    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 750.
-    return v4;
-}
-
-// Generated as internal constructor for term shuffle.
-pub fn constructor_shuffle<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Value,
-    arg2: Value,
-    arg3: Immediate,
-) -> Value {
-    let v5 = &C::value_array_2_ctor(ctx, arg1, arg2);
-    let v6 = InstructionData::Shuffle {
-        opcode: Opcode::Shuffle,
-        args: v5.clone(),
-        imm: arg3,
-    };
-    let v7 = C::make_inst_ctor(ctx, arg0, &v6);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 759.
-    return v7;
-}
-
-// Generated as internal constructor for term null.
-pub fn constructor_null<C: Context>(ctx: &mut C, arg0: Type) -> Value {
-    let v2 = InstructionData::NullAry {
-        opcode: Opcode::Null,
-    };
-    let v3 = C::make_inst_ctor(ctx, arg0, &v2);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 768.
-    return v3;
-}
-
-// Generated as internal constructor for term select.
-pub fn constructor_select<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Value,
-    arg2: Value,
-    arg3: Value,
-) -> Value {
-    let v5 = &C::value_array_3_ctor(ctx, arg1, arg2, arg3);
-    let v6 = InstructionData::Ternary {
-        opcode: Opcode::Select,
-        args: v5.clone(),
-    };
-    let v7 = C::make_inst_ctor(ctx, arg0, &v6);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 777.
-    return v7;
-}
-
-// Generated as internal constructor for term select_spectre_guard.
-pub fn constructor_select_spectre_guard<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Value,
-    arg2: Value,
-    arg3: Value,
-) -> Value {
-    let v5 = &C::value_array_3_ctor(ctx, arg1, arg2, arg3);
-    let v6 = InstructionData::Ternary {
-        opcode: Opcode::SelectSpectreGuard,
-        args: v5.clone(),
-    };
-    let v7 = C::make_inst_ctor(ctx, arg0, &v6);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 786.
-    return v7;
-}
-
-// Generated as internal constructor for term bitselect.
-pub fn constructor_bitselect<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Value,
-    arg2: Value,
-    arg3: Value,
-) -> Value {
-    let v5 = &C::value_array_3_ctor(ctx, arg1, arg2, arg3);
-    let v6 = InstructionData::Ternary {
-        opcode: Opcode::Bitselect,
-        args: v5.clone(),
-    };
-    let v7 = C::make_inst_ctor(ctx, arg0, &v6);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 795.
-    return v7;
-}
-
-// Generated as internal constructor for term x86_blendv.
-pub fn constructor_x86_blendv<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Value,
-    arg2: Value,
-    arg3: Value,
-) -> Value {
-    let v5 = &C::value_array_3_ctor(ctx, arg1, arg2, arg3);
-    let v6 = InstructionData::Ternary {
-        opcode: Opcode::X86Blendv,
-        args: v5.clone(),
-    };
-    let v7 = C::make_inst_ctor(ctx, arg0, &v6);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 804.
-    return v7;
-}
-
-// Generated as internal constructor for term vany_true.
-pub fn constructor_vany_true<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
-    let v3 = InstructionData::Unary {
-        opcode: Opcode::VanyTrue,
-        arg: arg1,
-    };
-    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 813.
-    return v4;
-}
-
-// Generated as internal constructor for term vall_true.
-pub fn constructor_vall_true<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
-    let v3 = InstructionData::Unary {
-        opcode: Opcode::VallTrue,
-        arg: arg1,
-    };
-    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 822.
-    return v4;
-}
-
-// Generated as internal constructor for term vhigh_bits.
-pub fn constructor_vhigh_bits<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
-    let v3 = InstructionData::Unary {
-        opcode: Opcode::VhighBits,
-        arg: arg1,
-    };
-    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 831.
-    return v4;
-}
-
-// Generated as internal constructor for term icmp.
-pub fn constructor_icmp<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &IntCC,
-    arg2: Value,
-    arg3: Value,
-) -> Value {
-    let v5 = &C::value_array_2_ctor(ctx, arg2, arg3);
-    let v6 = InstructionData::IntCompare {
-        opcode: Opcode::Icmp,
-        args: v5.clone(),
-        cond: arg1.clone(),
-    };
-    let v7 = C::make_inst_ctor(ctx, arg0, &v6);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 840.
-    return v7;
-}
-
-// Generated as internal constructor for term icmp_imm.
-pub fn constructor_icmp_imm<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &IntCC,
-    arg2: Value,
-    arg3: Imm64,
-) -> Value {
-    let v5 = InstructionData::IntCompareImm {
-        opcode: Opcode::IcmpImm,
-        arg: arg2,
-        cond: arg1.clone(),
-        imm: arg3,
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 849.
-    return v6;
-}
-
-// Generated as internal constructor for term iadd.
-pub fn constructor_iadd<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
-    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
-    let v5 = InstructionData::Binary {
-        opcode: Opcode::Iadd,
-        args: v4.clone(),
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 858.
-    return v6;
-}
-
-// Generated as internal constructor for term isub.
-pub fn constructor_isub<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
-    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
-    let v5 = InstructionData::Binary {
-        opcode: Opcode::Isub,
-        args: v4.clone(),
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 867.
-    return v6;
-}
-
-// Generated as internal constructor for term ineg.
-pub fn constructor_ineg<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
-    let v3 = InstructionData::Unary {
-        opcode: Opcode::Ineg,
-        arg: arg1,
-    };
-    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 876.
-    return v4;
-}
-
-// Generated as internal constructor for term iabs.
-pub fn constructor_iabs<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
-    let v3 = InstructionData::Unary {
-        opcode: Opcode::Iabs,
-        arg: arg1,
-    };
-    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 885.
-    return v4;
-}
-
-// Generated as internal constructor for term imul.
-pub fn constructor_imul<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
-    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
-    let v5 = InstructionData::Binary {
-        opcode: Opcode::Imul,
-        args: v4.clone(),
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 894.
-    return v6;
-}
-
-// Generated as internal constructor for term umulhi.
-pub fn constructor_umulhi<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
-    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
-    let v5 = InstructionData::Binary {
-        opcode: Opcode::Umulhi,
-        args: v4.clone(),
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 903.
-    return v6;
-}
-
-// Generated as internal constructor for term smulhi.
-pub fn constructor_smulhi<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
-    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
-    let v5 = InstructionData::Binary {
-        opcode: Opcode::Smulhi,
-        args: v4.clone(),
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 912.
-    return v6;
-}
-
-// Generated as internal constructor for term sqmul_round_sat.
-pub fn constructor_sqmul_round_sat<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Value,
-    arg2: Value,
-) -> Value {
-    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
-    let v5 = InstructionData::Binary {
-        opcode: Opcode::SqmulRoundSat,
-        args: v4.clone(),
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 921.
-    return v6;
-}
-
-// Generated as internal constructor for term x86_pmulhrsw.
-pub fn constructor_x86_pmulhrsw<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Value,
-    arg2: Value,
-) -> Value {
-    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
-    let v5 = InstructionData::Binary {
-        opcode: Opcode::X86Pmulhrsw,
-        args: v4.clone(),
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 930.
-    return v6;
-}
-
-// Generated as internal constructor for term udiv.
-pub fn constructor_udiv<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
-    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
-    let v5 = InstructionData::Binary {
-        opcode: Opcode::Udiv,
-        args: v4.clone(),
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 939.
-    return v6;
-}
-
-// Generated as internal constructor for term sdiv.
-pub fn constructor_sdiv<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
-    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
-    let v5 = InstructionData::Binary {
-        opcode: Opcode::Sdiv,
-        args: v4.clone(),
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 948.
-    return v6;
-}
-
-// Generated as internal constructor for term urem.
-pub fn constructor_urem<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
-    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
-    let v5 = InstructionData::Binary {
-        opcode: Opcode::Urem,
-        args: v4.clone(),
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 957.
-    return v6;
-}
-
-// Generated as internal constructor for term srem.
-pub fn constructor_srem<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
-    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
-    let v5 = InstructionData::Binary {
-        opcode: Opcode::Srem,
-        args: v4.clone(),
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 966.
-    return v6;
-}
-
-// Generated as internal constructor for term iadd_imm.
-pub fn constructor_iadd_imm<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Value,
-    arg2: Imm64,
-) -> Value {
-    let v4 = InstructionData::BinaryImm64 {
-        opcode: Opcode::IaddImm,
-        arg: arg1,
-        imm: arg2,
-    };
-    let v5 = C::make_inst_ctor(ctx, arg0, &v4);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 975.
-    return v5;
-}
-
-// Generated as internal constructor for term imul_imm.
-pub fn constructor_imul_imm<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Value,
-    arg2: Imm64,
-) -> Value {
-    let v4 = InstructionData::BinaryImm64 {
-        opcode: Opcode::ImulImm,
-        arg: arg1,
-        imm: arg2,
-    };
-    let v5 = C::make_inst_ctor(ctx, arg0, &v4);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 984.
-    return v5;
-}
-
-// Generated as internal constructor for term udiv_imm.
-pub fn constructor_udiv_imm<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Value,
-    arg2: Imm64,
-) -> Value {
-    let v4 = InstructionData::BinaryImm64 {
-        opcode: Opcode::UdivImm,
-        arg: arg1,
-        imm: arg2,
-    };
-    let v5 = C::make_inst_ctor(ctx, arg0, &v4);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 993.
-    return v5;
-}
-
-// Generated as internal constructor for term sdiv_imm.
-pub fn constructor_sdiv_imm<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Value,
-    arg2: Imm64,
-) -> Value {
-    let v4 = InstructionData::BinaryImm64 {
-        opcode: Opcode::SdivImm,
-        arg: arg1,
-        imm: arg2,
-    };
-    let v5 = C::make_inst_ctor(ctx, arg0, &v4);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1002.
-    return v5;
-}
-
-// Generated as internal constructor for term urem_imm.
-pub fn constructor_urem_imm<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Value,
-    arg2: Imm64,
-) -> Value {
-    let v4 = InstructionData::BinaryImm64 {
-        opcode: Opcode::UremImm,
-        arg: arg1,
-        imm: arg2,
-    };
-    let v5 = C::make_inst_ctor(ctx, arg0, &v4);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1011.
-    return v5;
-}
-
-// Generated as internal constructor for term srem_imm.
-pub fn constructor_srem_imm<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Value,
-    arg2: Imm64,
-) -> Value {
-    let v4 = InstructionData::BinaryImm64 {
-        opcode: Opcode::SremImm,
-        arg: arg1,
-        imm: arg2,
-    };
-    let v5 = C::make_inst_ctor(ctx, arg0, &v4);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1020.
-    return v5;
-}
-
-// Generated as internal constructor for term irsub_imm.
-pub fn constructor_irsub_imm<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Value,
-    arg2: Imm64,
-) -> Value {
-    let v4 = InstructionData::BinaryImm64 {
-        opcode: Opcode::IrsubImm,
-        arg: arg1,
-        imm: arg2,
-    };
-    let v5 = C::make_inst_ctor(ctx, arg0, &v4);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1029.
-    return v5;
-}
-
-// Generated as internal constructor for term iadd_cin.
-pub fn constructor_iadd_cin<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Value,
-    arg2: Value,
-    arg3: Value,
-) -> Value {
-    let v5 = &C::value_array_3_ctor(ctx, arg1, arg2, arg3);
-    let v6 = InstructionData::Ternary {
-        opcode: Opcode::IaddCin,
-        args: v5.clone(),
-    };
-    let v7 = C::make_inst_ctor(ctx, arg0, &v6);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1038.
-    return v7;
-}
-
-// Generated as internal constructor for term uadd_overflow_trap.
-pub fn constructor_uadd_overflow_trap<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Value,
-    arg2: Value,
-    arg3: &TrapCode,
-) -> Value {
-    let v5 = &C::value_array_2_ctor(ctx, arg1, arg2);
-    let v6 = InstructionData::IntAddTrap {
-        opcode: Opcode::UaddOverflowTrap,
-        args: v5.clone(),
-        code: arg3.clone(),
-    };
-    let v7 = C::make_inst_ctor(ctx, arg0, &v6);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1047.
-    return v7;
-}
-
-// Generated as internal constructor for term isub_bin.
-pub fn constructor_isub_bin<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Value,
-    arg2: Value,
-    arg3: Value,
-) -> Value {
-    let v5 = &C::value_array_3_ctor(ctx, arg1, arg2, arg3);
-    let v6 = InstructionData::Ternary {
-        opcode: Opcode::IsubBin,
-        args: v5.clone(),
-    };
-    let v7 = C::make_inst_ctor(ctx, arg0, &v6);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1056.
-    return v7;
-}
-
-// Generated as internal constructor for term band.
-pub fn constructor_band<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
-    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
-    let v5 = InstructionData::Binary {
-        opcode: Opcode::Band,
-        args: v4.clone(),
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1065.
-    return v6;
-}
-
-// Generated as internal constructor for term bor.
-pub fn constructor_bor<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
-    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
-    let v5 = InstructionData::Binary {
-        opcode: Opcode::Bor,
-        args: v4.clone(),
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1074.
-    return v6;
-}
-
-// Generated as internal constructor for term bxor.
-pub fn constructor_bxor<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
-    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
-    let v5 = InstructionData::Binary {
-        opcode: Opcode::Bxor,
-        args: v4.clone(),
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1083.
-    return v6;
-}
-
-// Generated as internal constructor for term bnot.
-pub fn constructor_bnot<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
-    let v3 = InstructionData::Unary {
-        opcode: Opcode::Bnot,
-        arg: arg1,
-    };
-    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1092.
-    return v4;
-}
-
-// Generated as internal constructor for term band_not.
-pub fn constructor_band_not<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Value,
-    arg2: Value,
-) -> Value {
-    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
-    let v5 = InstructionData::Binary {
-        opcode: Opcode::BandNot,
-        args: v4.clone(),
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1101.
-    return v6;
-}
-
-// Generated as internal constructor for term bor_not.
-pub fn constructor_bor_not<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
-    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
-    let v5 = InstructionData::Binary {
-        opcode: Opcode::BorNot,
-        args: v4.clone(),
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1110.
-    return v6;
-}
-
-// Generated as internal constructor for term bxor_not.
-pub fn constructor_bxor_not<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Value,
-    arg2: Value,
-) -> Value {
-    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
-    let v5 = InstructionData::Binary {
-        opcode: Opcode::BxorNot,
-        args: v4.clone(),
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1119.
-    return v6;
-}
-
-// Generated as internal constructor for term band_imm.
-pub fn constructor_band_imm<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Value,
-    arg2: Imm64,
-) -> Value {
-    let v4 = InstructionData::BinaryImm64 {
-        opcode: Opcode::BandImm,
-        arg: arg1,
-        imm: arg2,
-    };
-    let v5 = C::make_inst_ctor(ctx, arg0, &v4);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1128.
-    return v5;
-}
-
-// Generated as internal constructor for term bor_imm.
-pub fn constructor_bor_imm<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Imm64) -> Value {
-    let v4 = InstructionData::BinaryImm64 {
-        opcode: Opcode::BorImm,
-        arg: arg1,
-        imm: arg2,
-    };
-    let v5 = C::make_inst_ctor(ctx, arg0, &v4);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1137.
-    return v5;
-}
-
-// Generated as internal constructor for term bxor_imm.
-pub fn constructor_bxor_imm<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Value,
-    arg2: Imm64,
-) -> Value {
-    let v4 = InstructionData::BinaryImm64 {
-        opcode: Opcode::BxorImm,
-        arg: arg1,
-        imm: arg2,
-    };
-    let v5 = C::make_inst_ctor(ctx, arg0, &v4);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1146.
-    return v5;
-}
-
-// Generated as internal constructor for term rotl.
-pub fn constructor_rotl<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
-    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
-    let v5 = InstructionData::Binary {
-        opcode: Opcode::Rotl,
-        args: v4.clone(),
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1155.
-    return v6;
-}
-
-// Generated as internal constructor for term rotr.
-pub fn constructor_rotr<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
-    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
-    let v5 = InstructionData::Binary {
-        opcode: Opcode::Rotr,
-        args: v4.clone(),
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1164.
-    return v6;
-}
-
-// Generated as internal constructor for term rotl_imm.
-pub fn constructor_rotl_imm<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Value,
-    arg2: Imm64,
-) -> Value {
-    let v4 = InstructionData::BinaryImm64 {
-        opcode: Opcode::RotlImm,
-        arg: arg1,
-        imm: arg2,
-    };
-    let v5 = C::make_inst_ctor(ctx, arg0, &v4);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1173.
-    return v5;
-}
-
-// Generated as internal constructor for term rotr_imm.
-pub fn constructor_rotr_imm<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Value,
-    arg2: Imm64,
-) -> Value {
-    let v4 = InstructionData::BinaryImm64 {
-        opcode: Opcode::RotrImm,
-        arg: arg1,
-        imm: arg2,
-    };
-    let v5 = C::make_inst_ctor(ctx, arg0, &v4);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1182.
-    return v5;
-}
-
-// Generated as internal constructor for term ishl.
-pub fn constructor_ishl<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
-    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
-    let v5 = InstructionData::Binary {
-        opcode: Opcode::Ishl,
-        args: v4.clone(),
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1191.
-    return v6;
-}
-
-// Generated as internal constructor for term ushr.
-pub fn constructor_ushr<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
-    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
-    let v5 = InstructionData::Binary {
-        opcode: Opcode::Ushr,
-        args: v4.clone(),
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1200.
-    return v6;
-}
-
-// Generated as internal constructor for term sshr.
-pub fn constructor_sshr<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
-    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
-    let v5 = InstructionData::Binary {
-        opcode: Opcode::Sshr,
-        args: v4.clone(),
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1209.
-    return v6;
-}
-
-// Generated as internal constructor for term ishl_imm.
-pub fn constructor_ishl_imm<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Value,
-    arg2: Imm64,
-) -> Value {
-    let v4 = InstructionData::BinaryImm64 {
-        opcode: Opcode::IshlImm,
-        arg: arg1,
-        imm: arg2,
-    };
-    let v5 = C::make_inst_ctor(ctx, arg0, &v4);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1218.
-    return v5;
-}
-
-// Generated as internal constructor for term ushr_imm.
-pub fn constructor_ushr_imm<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Value,
-    arg2: Imm64,
-) -> Value {
-    let v4 = InstructionData::BinaryImm64 {
-        opcode: Opcode::UshrImm,
-        arg: arg1,
-        imm: arg2,
-    };
-    let v5 = C::make_inst_ctor(ctx, arg0, &v4);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1227.
-    return v5;
-}
-
-// Generated as internal constructor for term sshr_imm.
-pub fn constructor_sshr_imm<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Value,
-    arg2: Imm64,
-) -> Value {
-    let v4 = InstructionData::BinaryImm64 {
-        opcode: Opcode::SshrImm,
-        arg: arg1,
-        imm: arg2,
-    };
-    let v5 = C::make_inst_ctor(ctx, arg0, &v4);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1236.
-    return v5;
-}
-
-// Generated as internal constructor for term bitrev.
-pub fn constructor_bitrev<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
-    let v3 = InstructionData::Unary {
-        opcode: Opcode::Bitrev,
-        arg: arg1,
-    };
-    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1245.
-    return v4;
-}
-
-// Generated as internal constructor for term clz.
-pub fn constructor_clz<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
-    let v3 = InstructionData::Unary {
-        opcode: Opcode::Clz,
-        arg: arg1,
-    };
-    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1254.
-    return v4;
-}
-
-// Generated as internal constructor for term cls.
-pub fn constructor_cls<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
-    let v3 = InstructionData::Unary {
-        opcode: Opcode::Cls,
-        arg: arg1,
-    };
-    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1263.
-    return v4;
-}
-
-// Generated as internal constructor for term ctz.
-pub fn constructor_ctz<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
-    let v3 = InstructionData::Unary {
-        opcode: Opcode::Ctz,
-        arg: arg1,
-    };
-    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1272.
-    return v4;
-}
-
-// Generated as internal constructor for term bswap.
-pub fn constructor_bswap<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
-    let v3 = InstructionData::Unary {
-        opcode: Opcode::Bswap,
-        arg: arg1,
-    };
-    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1281.
-    return v4;
-}
-
-// Generated as internal constructor for term popcnt.
-pub fn constructor_popcnt<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
-    let v3 = InstructionData::Unary {
-        opcode: Opcode::Popcnt,
-        arg: arg1,
-    };
-    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1290.
-    return v4;
-}
-
-// Generated as internal constructor for term fcmp.
-pub fn constructor_fcmp<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &FloatCC,
-    arg2: Value,
-    arg3: Value,
-) -> Value {
-    let v5 = &C::value_array_2_ctor(ctx, arg2, arg3);
-    let v6 = InstructionData::FloatCompare {
-        opcode: Opcode::Fcmp,
-        args: v5.clone(),
-        cond: arg1.clone(),
-    };
-    let v7 = C::make_inst_ctor(ctx, arg0, &v6);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1299.
-    return v7;
-}
-
-// Generated as internal constructor for term fadd.
-pub fn constructor_fadd<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
-    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
-    let v5 = InstructionData::Binary {
-        opcode: Opcode::Fadd,
-        args: v4.clone(),
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1308.
-    return v6;
-}
-
-// Generated as internal constructor for term fsub.
-pub fn constructor_fsub<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
-    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
-    let v5 = InstructionData::Binary {
-        opcode: Opcode::Fsub,
-        args: v4.clone(),
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1317.
-    return v6;
-}
-
-// Generated as internal constructor for term fmul.
-pub fn constructor_fmul<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
-    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
-    let v5 = InstructionData::Binary {
-        opcode: Opcode::Fmul,
-        args: v4.clone(),
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1326.
-    return v6;
-}
-
-// Generated as internal constructor for term fdiv.
-pub fn constructor_fdiv<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
-    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
-    let v5 = InstructionData::Binary {
-        opcode: Opcode::Fdiv,
-        args: v4.clone(),
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1335.
-    return v6;
-}
-
-// Generated as internal constructor for term sqrt.
-pub fn constructor_sqrt<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
-    let v3 = InstructionData::Unary {
-        opcode: Opcode::Sqrt,
-        arg: arg1,
-    };
-    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1344.
-    return v4;
-}
-
-// Generated as internal constructor for term fma.
-pub fn constructor_fma<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Value,
-    arg2: Value,
-    arg3: Value,
-) -> Value {
-    let v5 = &C::value_array_3_ctor(ctx, arg1, arg2, arg3);
-    let v6 = InstructionData::Ternary {
-        opcode: Opcode::Fma,
-        args: v5.clone(),
-    };
-    let v7 = C::make_inst_ctor(ctx, arg0, &v6);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1353.
-    return v7;
-}
-
-// Generated as internal constructor for term fneg.
-pub fn constructor_fneg<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
-    let v3 = InstructionData::Unary {
-        opcode: Opcode::Fneg,
-        arg: arg1,
-    };
-    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1362.
-    return v4;
-}
-
-// Generated as internal constructor for term fabs.
-pub fn constructor_fabs<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
-    let v3 = InstructionData::Unary {
-        opcode: Opcode::Fabs,
-        arg: arg1,
-    };
-    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1371.
-    return v4;
-}
-
-// Generated as internal constructor for term fcopysign.
-pub fn constructor_fcopysign<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Value,
-    arg2: Value,
-) -> Value {
-    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
-    let v5 = InstructionData::Binary {
-        opcode: Opcode::Fcopysign,
-        args: v4.clone(),
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1380.
-    return v6;
-}
-
-// Generated as internal constructor for term fmin.
-pub fn constructor_fmin<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
-    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
-    let v5 = InstructionData::Binary {
-        opcode: Opcode::Fmin,
-        args: v4.clone(),
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1389.
-    return v6;
-}
-
-// Generated as internal constructor for term fmin_pseudo.
-pub fn constructor_fmin_pseudo<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Value,
-    arg2: Value,
-) -> Value {
-    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
-    let v5 = InstructionData::Binary {
-        opcode: Opcode::FminPseudo,
-        args: v4.clone(),
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1398.
-    return v6;
-}
-
-// Generated as internal constructor for term fmax.
-pub fn constructor_fmax<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
-    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
-    let v5 = InstructionData::Binary {
-        opcode: Opcode::Fmax,
-        args: v4.clone(),
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1407.
-    return v6;
-}
-
-// Generated as internal constructor for term fmax_pseudo.
-pub fn constructor_fmax_pseudo<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Value,
-    arg2: Value,
-) -> Value {
-    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
-    let v5 = InstructionData::Binary {
-        opcode: Opcode::FmaxPseudo,
-        args: v4.clone(),
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1416.
-    return v6;
-}
-
-// Generated as internal constructor for term ceil.
-pub fn constructor_ceil<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
-    let v3 = InstructionData::Unary {
-        opcode: Opcode::Ceil,
-        arg: arg1,
-    };
-    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1425.
-    return v4;
-}
-
-// Generated as internal constructor for term floor.
-pub fn constructor_floor<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
-    let v3 = InstructionData::Unary {
-        opcode: Opcode::Floor,
-        arg: arg1,
-    };
-    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1434.
-    return v4;
-}
-
-// Generated as internal constructor for term trunc.
-pub fn constructor_trunc<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
-    let v3 = InstructionData::Unary {
-        opcode: Opcode::Trunc,
-        arg: arg1,
-    };
-    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1443.
-    return v4;
-}
-
-// Generated as internal constructor for term nearest.
-pub fn constructor_nearest<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
-    let v3 = InstructionData::Unary {
-        opcode: Opcode::Nearest,
-        arg: arg1,
-    };
-    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1452.
-    return v4;
-}
-
-// Generated as internal constructor for term is_null.
-pub fn constructor_is_null<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
-    let v3 = InstructionData::Unary {
-        opcode: Opcode::IsNull,
-        arg: arg1,
-    };
-    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1461.
-    return v4;
-}
-
-// Generated as internal constructor for term is_invalid.
-pub fn constructor_is_invalid<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
-    let v3 = InstructionData::Unary {
-        opcode: Opcode::IsInvalid,
-        arg: arg1,
-    };
-    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1470.
-    return v4;
-}
-
-// Generated as internal constructor for term bitcast.
-pub fn constructor_bitcast<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: MemFlags,
-    arg2: Value,
-) -> Value {
-    let v4 = InstructionData::LoadNoOffset {
-        opcode: Opcode::Bitcast,
-        arg: arg2,
-        flags: arg1,
-    };
-    let v5 = C::make_inst_ctor(ctx, arg0, &v4);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1479.
-    return v5;
-}
-
-// Generated as internal constructor for term scalar_to_vector.
-pub fn constructor_scalar_to_vector<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
-    let v3 = InstructionData::Unary {
-        opcode: Opcode::ScalarToVector,
-        arg: arg1,
-    };
-    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1488.
-    return v4;
-}
-
-// Generated as internal constructor for term bmask.
-pub fn constructor_bmask<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
-    let v3 = InstructionData::Unary {
-        opcode: Opcode::Bmask,
-        arg: arg1,
-    };
-    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1497.
-    return v4;
-}
-
-// Generated as internal constructor for term ireduce.
-pub fn constructor_ireduce<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
-    let v3 = InstructionData::Unary {
-        opcode: Opcode::Ireduce,
-        arg: arg1,
-    };
-    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1506.
-    return v4;
-}
-
-// Generated as internal constructor for term snarrow.
-pub fn constructor_snarrow<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
-    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
-    let v5 = InstructionData::Binary {
-        opcode: Opcode::Snarrow,
-        args: v4.clone(),
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1515.
-    return v6;
-}
-
-// Generated as internal constructor for term unarrow.
-pub fn constructor_unarrow<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
-    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
-    let v5 = InstructionData::Binary {
-        opcode: Opcode::Unarrow,
-        args: v4.clone(),
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1524.
-    return v6;
-}
-
-// Generated as internal constructor for term uunarrow.
-pub fn constructor_uunarrow<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Value,
-    arg2: Value,
-) -> Value {
-    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
-    let v5 = InstructionData::Binary {
-        opcode: Opcode::Uunarrow,
-        args: v4.clone(),
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1533.
-    return v6;
-}
-
-// Generated as internal constructor for term swiden_low.
-pub fn constructor_swiden_low<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
-    let v3 = InstructionData::Unary {
-        opcode: Opcode::SwidenLow,
-        arg: arg1,
-    };
-    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1542.
-    return v4;
-}
-
-// Generated as internal constructor for term swiden_high.
-pub fn constructor_swiden_high<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
-    let v3 = InstructionData::Unary {
-        opcode: Opcode::SwidenHigh,
-        arg: arg1,
-    };
-    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1551.
-    return v4;
-}
-
-// Generated as internal constructor for term uwiden_low.
-pub fn constructor_uwiden_low<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
-    let v3 = InstructionData::Unary {
-        opcode: Opcode::UwidenLow,
-        arg: arg1,
-    };
-    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1560.
-    return v4;
-}
-
-// Generated as internal constructor for term uwiden_high.
-pub fn constructor_uwiden_high<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
-    let v3 = InstructionData::Unary {
-        opcode: Opcode::UwidenHigh,
-        arg: arg1,
-    };
-    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1569.
-    return v4;
-}
-
-// Generated as internal constructor for term iadd_pairwise.
-pub fn constructor_iadd_pairwise<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Value,
-    arg2: Value,
-) -> Value {
-    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
-    let v5 = InstructionData::Binary {
-        opcode: Opcode::IaddPairwise,
-        args: v4.clone(),
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1578.
-    return v6;
-}
-
-// Generated as internal constructor for term x86_pmaddubsw.
-pub fn constructor_x86_pmaddubsw<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Value,
-    arg2: Value,
-) -> Value {
-    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
-    let v5 = InstructionData::Binary {
-        opcode: Opcode::X86Pmaddubsw,
-        args: v4.clone(),
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1587.
-    return v6;
-}
-
-// Generated as internal constructor for term uextend.
-pub fn constructor_uextend<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
-    let v3 = InstructionData::Unary {
-        opcode: Opcode::Uextend,
-        arg: arg1,
-    };
-    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1596.
-    return v4;
-}
-
-// Generated as internal constructor for term sextend.
-pub fn constructor_sextend<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
-    let v3 = InstructionData::Unary {
-        opcode: Opcode::Sextend,
-        arg: arg1,
-    };
-    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1605.
-    return v4;
-}
-
-// Generated as internal constructor for term fpromote.
-pub fn constructor_fpromote<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
-    let v3 = InstructionData::Unary {
-        opcode: Opcode::Fpromote,
-        arg: arg1,
-    };
-    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1614.
-    return v4;
-}
-
-// Generated as internal constructor for term fdemote.
-pub fn constructor_fdemote<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
-    let v3 = InstructionData::Unary {
-        opcode: Opcode::Fdemote,
-        arg: arg1,
-    };
-    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1623.
-    return v4;
-}
-
-// Generated as internal constructor for term fvdemote.
-pub fn constructor_fvdemote<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
-    let v3 = InstructionData::Unary {
-        opcode: Opcode::Fvdemote,
-        arg: arg1,
-    };
-    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1632.
-    return v4;
-}
-
-// Generated as internal constructor for term fvpromote_low.
-pub fn constructor_fvpromote_low<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
-    let v3 = InstructionData::Unary {
-        opcode: Opcode::FvpromoteLow,
-        arg: arg1,
-    };
-    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1641.
-    return v4;
-}
-
-// Generated as internal constructor for term fcvt_to_uint.
-pub fn constructor_fcvt_to_uint<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
-    let v3 = InstructionData::Unary {
-        opcode: Opcode::FcvtToUint,
-        arg: arg1,
-    };
-    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1650.
-    return v4;
-}
-
-// Generated as internal constructor for term fcvt_to_sint.
-pub fn constructor_fcvt_to_sint<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
-    let v3 = InstructionData::Unary {
-        opcode: Opcode::FcvtToSint,
-        arg: arg1,
-    };
-    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1659.
-    return v4;
-}
-
-// Generated as internal constructor for term fcvt_to_uint_sat.
-pub fn constructor_fcvt_to_uint_sat<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
-    let v3 = InstructionData::Unary {
-        opcode: Opcode::FcvtToUintSat,
-        arg: arg1,
-    };
-    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1668.
-    return v4;
-}
-
-// Generated as internal constructor for term fcvt_to_sint_sat.
-pub fn constructor_fcvt_to_sint_sat<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
-    let v3 = InstructionData::Unary {
-        opcode: Opcode::FcvtToSintSat,
-        arg: arg1,
-    };
-    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1677.
-    return v4;
-}
-
-// Generated as internal constructor for term x86_cvtt2dq.
-pub fn constructor_x86_cvtt2dq<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
-    let v3 = InstructionData::Unary {
-        opcode: Opcode::X86Cvtt2dq,
-        arg: arg1,
-    };
-    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1686.
-    return v4;
-}
-
-// Generated as internal constructor for term fcvt_from_uint.
-pub fn constructor_fcvt_from_uint<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
-    let v3 = InstructionData::Unary {
-        opcode: Opcode::FcvtFromUint,
-        arg: arg1,
-    };
-    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1695.
-    return v4;
-}
-
-// Generated as internal constructor for term fcvt_from_sint.
-pub fn constructor_fcvt_from_sint<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Value {
-    let v3 = InstructionData::Unary {
-        opcode: Opcode::FcvtFromSint,
-        arg: arg1,
-    };
-    let v4 = C::make_inst_ctor(ctx, arg0, &v3);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1704.
-    return v4;
-}
-
-// Generated as internal constructor for term iconcat.
-pub fn constructor_iconcat<C: Context>(ctx: &mut C, arg0: Type, arg1: Value, arg2: Value) -> Value {
-    let v4 = &C::value_array_2_ctor(ctx, arg1, arg2);
-    let v5 = InstructionData::Binary {
-        opcode: Opcode::Iconcat,
-        args: v4.clone(),
-    };
-    let v6 = C::make_inst_ctor(ctx, arg0, &v5);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1713.
-    return v6;
-}
-
-// Generated as internal constructor for term atomic_rmw.
-pub fn constructor_atomic_rmw<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: MemFlags,
-    arg2: &AtomicRmwOp,
-    arg3: Value,
-    arg4: Value,
-) -> Value {
-    let v6 = &C::value_array_2_ctor(ctx, arg3, arg4);
-    let v7 = InstructionData::AtomicRmw {
-        opcode: Opcode::AtomicRmw,
-        args: v6.clone(),
-        flags: arg1,
-        op: arg2.clone(),
-    };
-    let v8 = C::make_inst_ctor(ctx, arg0, &v7);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1722.
-    return v8;
-}
-
-// Generated as internal constructor for term atomic_cas.
-pub fn constructor_atomic_cas<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: MemFlags,
-    arg2: Value,
-    arg3: Value,
-    arg4: Value,
-) -> Value {
-    let v6 = &C::value_array_3_ctor(ctx, arg2, arg3, arg4);
-    let v7 = InstructionData::AtomicCas {
-        opcode: Opcode::AtomicCas,
-        args: v6.clone(),
-        flags: arg1,
-    };
-    let v8 = C::make_inst_ctor(ctx, arg0, &v7);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1731.
-    return v8;
-}
-
-// Generated as internal constructor for term atomic_load.
-pub fn constructor_atomic_load<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: MemFlags,
-    arg2: Value,
-) -> Value {
-    let v4 = InstructionData::LoadNoOffset {
-        opcode: Opcode::AtomicLoad,
-        arg: arg2,
-        flags: arg1,
-    };
-    let v5 = C::make_inst_ctor(ctx, arg0, &v4);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1740.
-    return v5;
-}
-
-// Generated as internal constructor for term extract_vector.
-pub fn constructor_extract_vector<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Value,
-    arg2: Uimm8,
-) -> Value {
-    let v4 = InstructionData::BinaryImm8 {
-        opcode: Opcode::ExtractVector,
-        arg: arg1,
-        imm: arg2,
-    };
-    let v5 = C::make_inst_ctor(ctx, arg0, &v4);
-    // Rule at /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_opt.isle line 1749.
-    return v5;
-}
diff --git a/cranelift/codegen/isle_generated_code/isle_riscv64.rs b/cranelift/codegen/isle_generated_code/isle_riscv64.rs
deleted file mode 100644
index 8faf335aaae2..000000000000
--- a/cranelift/codegen/isle_generated_code/isle_riscv64.rs
+++ /dev/null
@@ -1,18461 +0,0 @@
-// GENERATED BY ISLE. DO NOT EDIT!
-//
-// Generated automatically from the instruction-selection DSL code in:
-// - src/prelude.isle
-// - src/prelude_lower.isle
-// - src/isa/riscv64/inst.isle
-// - src/isa/riscv64/inst_vector.isle
-// - src/isa/riscv64/lower.isle
-// - /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_lower.isle
-
-use super::*; // Pulls in all external types.
-use std::marker::PhantomData;
-
-/// Context during lowering: an implementation of this trait
-/// must be provided with all external constructors and extractors.
-/// A mutable borrow is passed along through all lowering logic.
-pub trait Context {
-    fn unit(&mut self) -> Unit;
-    fn value_type(&mut self, arg0: Value) -> Type;
-    fn u32_nonnegative(&mut self, arg0: u32) -> Option<u32>;
-    fn offset32(&mut self, arg0: Offset32) -> u32;
-    fn u32_lteq(&mut self, arg0: u32, arg1: u32) -> Option<Unit>;
-    fn u8_lteq(&mut self, arg0: u8, arg1: u8) -> Option<Unit>;
-    fn u8_lt(&mut self, arg0: u8, arg1: u8) -> Option<Unit>;
-    fn simm32(&mut self, arg0: Imm64) -> Option<u32>;
-    fn uimm8(&mut self, arg0: Imm64) -> Option<u8>;
-    fn u8_as_u32(&mut self, arg0: u8) -> u32;
-    fn u8_as_u64(&mut self, arg0: u8) -> u64;
-    fn u16_as_u64(&mut self, arg0: u16) -> u64;
-    fn u32_as_u64(&mut self, arg0: u32) -> u64;
-    fn i64_as_u64(&mut self, arg0: i64) -> u64;
-    fn i64_neg(&mut self, arg0: i64) -> i64;
-    fn u128_as_u64(&mut self, arg0: u128) -> Option<u64>;
-    fn u64_as_u32(&mut self, arg0: u64) -> Option<u32>;
-    fn u64_as_i32(&mut self, arg0: u64) -> i32;
-    fn u8_and(&mut self, arg0: u8, arg1: u8) -> u8;
-    fn u8_shl(&mut self, arg0: u8, arg1: u8) -> u8;
-    fn u8_shr(&mut self, arg0: u8, arg1: u8) -> u8;
-    fn u32_add(&mut self, arg0: u32, arg1: u32) -> u32;
-    fn u32_sub(&mut self, arg0: u32, arg1: u32) -> u32;
-    fn u32_and(&mut self, arg0: u32, arg1: u32) -> u32;
-    fn s32_add_fallible(&mut self, arg0: u32, arg1: u32) -> Option<u32>;
-    fn u64_add(&mut self, arg0: u64, arg1: u64) -> u64;
-    fn u64_sub(&mut self, arg0: u64, arg1: u64) -> u64;
-    fn u64_mul(&mut self, arg0: u64, arg1: u64) -> u64;
-    fn u64_sdiv(&mut self, arg0: u64, arg1: u64) -> Option<u64>;
-    fn u64_udiv(&mut self, arg0: u64, arg1: u64) -> Option<u64>;
-    fn u64_and(&mut self, arg0: u64, arg1: u64) -> u64;
-    fn u64_or(&mut self, arg0: u64, arg1: u64) -> u64;
-    fn u64_xor(&mut self, arg0: u64, arg1: u64) -> u64;
-    fn u64_shl(&mut self, arg0: u64, arg1: u64) -> u64;
-    fn imm64_shl(&mut self, arg0: Type, arg1: Imm64, arg2: Imm64) -> Imm64;
-    fn imm64_ushr(&mut self, arg0: Type, arg1: Imm64, arg2: Imm64) -> Imm64;
-    fn imm64_sshr(&mut self, arg0: Type, arg1: Imm64, arg2: Imm64) -> Imm64;
-    fn u64_not(&mut self, arg0: u64) -> u64;
-    fn u64_eq(&mut self, arg0: u64, arg1: u64) -> bool;
-    fn u64_le(&mut self, arg0: u64, arg1: u64) -> bool;
-    fn u64_lt(&mut self, arg0: u64, arg1: u64) -> bool;
-    fn i64_sextend_imm64(&mut self, arg0: Type, arg1: Imm64) -> i64;
-    fn u64_uextend_imm64(&mut self, arg0: Type, arg1: Imm64) -> u64;
-    fn imm64_icmp(&mut self, arg0: Type, arg1: &IntCC, arg2: Imm64, arg3: Imm64) -> Imm64;
-    fn u64_is_zero(&mut self, arg0: u64) -> bool;
-    fn u64_is_odd(&mut self, arg0: u64) -> bool;
-    fn ty_umin(&mut self, arg0: Type) -> u64;
-    fn ty_umax(&mut self, arg0: Type) -> u64;
-    fn ty_smin(&mut self, arg0: Type) -> u64;
-    fn ty_smax(&mut self, arg0: Type) -> u64;
-    fn ty_bits(&mut self, arg0: Type) -> u8;
-    fn ty_bits_u16(&mut self, arg0: Type) -> u16;
-    fn ty_bits_u64(&mut self, arg0: Type) -> u64;
-    fn ty_mask(&mut self, arg0: Type) -> u64;
-    fn ty_lane_mask(&mut self, arg0: Type) -> u64;
-    fn ty_lane_count(&mut self, arg0: Type) -> u64;
-    fn ty_bytes(&mut self, arg0: Type) -> u16;
-    fn lane_type(&mut self, arg0: Type) -> Type;
-    fn ty_half_lanes(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_half_width(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_equal(&mut self, arg0: Type, arg1: Type) -> bool;
-    fn mem_flags_trusted(&mut self) -> MemFlags;
-    fn intcc_reverse(&mut self, arg0: &IntCC) -> IntCC;
-    fn intcc_inverse(&mut self, arg0: &IntCC) -> IntCC;
-    fn floatcc_reverse(&mut self, arg0: &FloatCC) -> FloatCC;
-    fn floatcc_inverse(&mut self, arg0: &FloatCC) -> FloatCC;
-    fn floatcc_unordered(&mut self, arg0: &FloatCC) -> bool;
-    fn fits_in_16(&mut self, arg0: Type) -> Option<Type>;
-    fn fits_in_32(&mut self, arg0: Type) -> Option<Type>;
-    fn lane_fits_in_32(&mut self, arg0: Type) -> Option<Type>;
-    fn fits_in_64(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_32(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_64(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_int_ref_scalar_64_extract(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_int_ref_scalar_64(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_32_or_64(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_8_or_16(&mut self, arg0: Type) -> Option<Type>;
-    fn int_fits_in_32(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_int_ref_64(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_int_ref_16_to_64(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_int(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_scalar(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_scalar_float(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_float_or_vec(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_vector_float(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_vector_not_float(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_vec64(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_vec64_ctor(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_vec128(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_dyn_vec64(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_dyn_vec128(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_vec64_int(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_vec128_int(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_addr64(&mut self, arg0: Type) -> Option<Type>;
-    fn not_vec32x2(&mut self, arg0: Type) -> Option<Type>;
-    fn not_i64x2(&mut self, arg0: Type) -> Option<()>;
-    fn u8_from_uimm8(&mut self, arg0: Uimm8) -> u8;
-    fn u64_from_bool(&mut self, arg0: bool) -> u64;
-    fn u64_from_imm64(&mut self, arg0: Imm64) -> u64;
-    fn nonzero_u64_from_imm64(&mut self, arg0: Imm64) -> Option<u64>;
-    fn imm64_power_of_two(&mut self, arg0: Imm64) -> Option<u64>;
-    fn imm64(&mut self, arg0: u64) -> Imm64;
-    fn imm64_masked(&mut self, arg0: Type, arg1: u64) -> Imm64;
-    fn u32_from_ieee32(&mut self, arg0: Ieee32) -> u32;
-    fn u64_from_ieee64(&mut self, arg0: Ieee64) -> u64;
-    fn multi_lane(&mut self, arg0: Type) -> Option<(u32, u32)>;
-    fn dynamic_lane(&mut self, arg0: Type) -> Option<(u32, u32)>;
-    fn dynamic_int_lane(&mut self, arg0: Type) -> Option<u32>;
-    fn dynamic_fp_lane(&mut self, arg0: Type) -> Option<u32>;
-    fn ty_dyn64_int(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_dyn128_int(&mut self, arg0: Type) -> Option<Type>;
-    fn offset32_to_u32(&mut self, arg0: Offset32) -> u32;
-    fn u32_to_offset32(&mut self, arg0: u32) -> Offset32;
-    fn intcc_unsigned(&mut self, arg0: &IntCC) -> IntCC;
-    fn signed_cond_code(&mut self, arg0: &IntCC) -> Option<IntCC>;
-    fn trap_code_division_by_zero(&mut self) -> TrapCode;
-    fn trap_code_integer_overflow(&mut self) -> TrapCode;
-    fn trap_code_bad_conversion_to_integer(&mut self) -> TrapCode;
-    fn range(&mut self, arg0: usize, arg1: usize) -> Range;
-    fn range_view(&mut self, arg0: Range) -> RangeView;
-    fn value_reg(&mut self, arg0: Reg) -> ValueRegs;
-    fn value_regs(&mut self, arg0: Reg, arg1: Reg) -> ValueRegs;
-    fn value_regs_invalid(&mut self) -> ValueRegs;
-    fn output_none(&mut self) -> InstOutput;
-    fn output(&mut self, arg0: ValueRegs) -> InstOutput;
-    fn output_pair(&mut self, arg0: ValueRegs, arg1: ValueRegs) -> InstOutput;
-    fn output_builder_new(&mut self) -> InstOutputBuilder;
-    fn output_builder_push(&mut self, arg0: &InstOutputBuilder, arg1: ValueRegs) -> Unit;
-    fn output_builder_finish(&mut self, arg0: &InstOutputBuilder) -> InstOutput;
-    fn temp_writable_reg(&mut self, arg0: Type) -> WritableReg;
-    fn is_valid_reg(&mut self, arg0: Reg) -> bool;
-    fn invalid_reg(&mut self) -> Reg;
-    fn mark_value_used(&mut self, arg0: Value) -> Unit;
-    fn put_in_reg(&mut self, arg0: Value) -> Reg;
-    fn put_in_regs(&mut self, arg0: Value) -> ValueRegs;
-    fn ensure_in_vreg(&mut self, arg0: Reg, arg1: Type) -> Reg;
-    fn value_regs_get(&mut self, arg0: ValueRegs, arg1: usize) -> Reg;
-    fn value_regs_len(&mut self, arg0: ValueRegs) -> usize;
-    fn preg_to_reg(&mut self, arg0: PReg) -> Reg;
-    fn value_list_slice(&mut self, arg0: ValueList) -> ValueSlice;
-    fn value_slice_empty(&mut self, arg0: ValueSlice) -> Option<()>;
-    fn value_slice_unwrap(&mut self, arg0: ValueSlice) -> Option<(Value, ValueSlice)>;
-    fn value_slice_len(&mut self, arg0: ValueSlice) -> usize;
-    fn value_slice_get(&mut self, arg0: ValueSlice, arg1: usize) -> Value;
-    fn writable_reg_to_reg(&mut self, arg0: WritableReg) -> Reg;
-    fn inst_results(&mut self, arg0: Inst) -> ValueSlice;
-    fn first_result(&mut self, arg0: Inst) -> Option<Value>;
-    fn inst_data(&mut self, arg0: Inst) -> InstructionData;
-    fn def_inst(&mut self, arg0: Value) -> Option<Inst>;
-    fn zero_value(&mut self, arg0: Value) -> Option<Value>;
-    fn is_sinkable_inst(&mut self, arg0: Value) -> Option<Inst>;
-    fn maybe_uextend(&mut self, arg0: Value) -> Option<Value>;
-    fn emit(&mut self, arg0: &MInst) -> Unit;
-    fn sink_inst(&mut self, arg0: Inst) -> Unit;
-    fn emit_u64_le_const(&mut self, arg0: u64) -> VCodeConstant;
-    fn emit_u128_le_const(&mut self, arg0: u128) -> VCodeConstant;
-    fn const_to_vconst(&mut self, arg0: Constant) -> VCodeConstant;
-    fn tls_model(&mut self, arg0: Type) -> TlsModel;
-    fn tls_model_is_elf_gd(&mut self) -> Option<Unit>;
-    fn tls_model_is_macho(&mut self) -> Option<Unit>;
-    fn tls_model_is_coff(&mut self) -> Option<Unit>;
-    fn preserve_frame_pointers(&mut self) -> Option<Unit>;
-    fn box_external_name(&mut self, arg0: ExternalName) -> BoxExternalName;
-    fn func_ref_data(&mut self, arg0: FuncRef) -> (SigRef, ExternalName, RelocDistance);
-    fn symbol_value_data(
-        &mut self,
-        arg0: GlobalValue,
-    ) -> Option<(ExternalName, RelocDistance, i64)>;
-    fn reloc_distance_near(&mut self, arg0: RelocDistance) -> Option<()>;
-    fn vec_mask_from_immediate(&mut self, arg0: Immediate) -> Option<VecMask>;
-    fn u128_from_immediate(&mut self, arg0: Immediate) -> Option<u128>;
-    fn vconst_from_immediate(&mut self, arg0: Immediate) -> Option<VCodeConstant>;
-    fn u128_from_constant(&mut self, arg0: Constant) -> Option<u128>;
-    fn u64_from_constant(&mut self, arg0: Constant) -> Option<u64>;
-    fn shuffle64_from_imm(&mut self, arg0: Immediate) -> Option<(u8, u8)>;
-    fn shuffle32_from_imm(&mut self, arg0: Immediate) -> Option<(u8, u8, u8, u8)>;
-    fn shuffle16_from_imm(&mut self, arg0: Immediate) -> Option<(u8, u8, u8, u8, u8, u8, u8, u8)>;
-    fn only_writable_reg(&mut self, arg0: WritableValueRegs) -> Option<WritableReg>;
-    fn writable_regs_get(&mut self, arg0: WritableValueRegs, arg1: usize) -> WritableReg;
-    fn abi_num_args(&mut self, arg0: Sig) -> usize;
-    fn abi_get_arg(&mut self, arg0: Sig, arg1: usize) -> ABIArg;
-    fn abi_num_rets(&mut self, arg0: Sig) -> usize;
-    fn abi_get_ret(&mut self, arg0: Sig, arg1: usize) -> ABIArg;
-    fn abi_ret_arg(&mut self, arg0: Sig) -> Option<ABIArg>;
-    fn abi_no_ret_arg(&mut self, arg0: Sig) -> Option<()>;
-    fn abi_sized_stack_arg_space(&mut self, arg0: Sig) -> i64;
-    fn abi_sized_stack_ret_space(&mut self, arg0: Sig) -> i64;
-    fn abi_stackslot_addr(&mut self, arg0: WritableReg, arg1: StackSlot, arg2: Offset32) -> MInst;
-    fn abi_dynamic_stackslot_addr(&mut self, arg0: WritableReg, arg1: DynamicStackSlot) -> MInst;
-    fn abi_arg_only_slot(&mut self, arg0: &ABIArg) -> Option<ABIArgSlot>;
-    fn abi_arg_struct_pointer(&mut self, arg0: &ABIArg) -> Option<(ABIArgSlot, i64, u64)>;
-    fn abi_arg_implicit_pointer(&mut self, arg0: &ABIArg) -> Option<(ABIArgSlot, i64, Type)>;
-    fn real_reg_to_reg(&mut self, arg0: RealReg) -> Reg;
-    fn real_reg_to_writable_reg(&mut self, arg0: RealReg) -> WritableReg;
-    fn gen_move(&mut self, arg0: Type, arg1: WritableReg, arg2: Reg) -> MInst;
-    fn gen_return(&mut self, arg0: ValueSlice) -> Unit;
-    fn gen_return_call(
-        &mut self,
-        arg0: SigRef,
-        arg1: ExternalName,
-        arg2: RelocDistance,
-        arg3: ValueSlice,
-    ) -> InstOutput;
-    fn gen_return_call_indirect(
-        &mut self,
-        arg0: SigRef,
-        arg1: Value,
-        arg2: ValueSlice,
-    ) -> InstOutput;
-    fn safe_divisor_from_imm64(&mut self, arg0: Type, arg1: Imm64) -> Option<u64>;
-    fn xreg_new(&mut self, arg0: Reg) -> XReg;
-    fn writable_xreg_new(&mut self, arg0: WritableReg) -> WritableXReg;
-    fn writable_xreg_to_xreg(&mut self, arg0: WritableXReg) -> XReg;
-    fn writable_xreg_to_writable_reg(&mut self, arg0: WritableXReg) -> WritableReg;
-    fn xreg_to_reg(&mut self, arg0: XReg) -> Reg;
-    fn freg_new(&mut self, arg0: Reg) -> FReg;
-    fn writable_freg_new(&mut self, arg0: WritableReg) -> WritableFReg;
-    fn writable_freg_to_freg(&mut self, arg0: WritableFReg) -> FReg;
-    fn writable_freg_to_writable_reg(&mut self, arg0: WritableFReg) -> WritableReg;
-    fn freg_to_reg(&mut self, arg0: FReg) -> Reg;
-    fn vreg_new(&mut self, arg0: Reg) -> VReg;
-    fn writable_vreg_new(&mut self, arg0: WritableReg) -> WritableVReg;
-    fn writable_vreg_to_vreg(&mut self, arg0: WritableVReg) -> VReg;
-    fn writable_vreg_to_writable_reg(&mut self, arg0: WritableVReg) -> WritableReg;
-    fn vreg_to_reg(&mut self, arg0: VReg) -> Reg;
-    fn u8_as_i32(&mut self, arg0: u8) -> i32;
-    fn has_v(&mut self) -> bool;
-    fn has_zbkb(&mut self) -> bool;
-    fn has_zba(&mut self) -> bool;
-    fn has_zbb(&mut self) -> bool;
-    fn has_zbc(&mut self) -> bool;
-    fn has_zbs(&mut self) -> bool;
-    fn imm(&mut self, arg0: Type, arg1: u64) -> Reg;
-    fn imm12_const(&mut self, arg0: i32) -> Imm12;
-    fn imm_from_bits(&mut self, arg0: u64) -> Imm12;
-    fn imm_from_neg_bits(&mut self, arg0: i64) -> Imm12;
-    fn imm12_const_add(&mut self, arg0: i32, arg1: i32) -> Imm12;
-    fn imm12_and(&mut self, arg0: Imm12, arg1: u64) -> Imm12;
-    fn neg_imm12(&mut self, arg0: Imm12) -> Imm12;
-    fn imm12_from_u64(&mut self, arg0: u64) -> Option<Imm12>;
-    fn imm5_from_u64(&mut self, arg0: u64) -> Option<Imm5>;
-    fn imm5_from_i8(&mut self, arg0: i8) -> Option<Imm5>;
-    fn uimm5_from_u8(&mut self, arg0: u8) -> Option<UImm5>;
-    fn uimm5_from_u64(&mut self, arg0: u64) -> Option<UImm5>;
-    fn uimm5_bitcast_to_imm5(&mut self, arg0: UImm5) -> Imm5;
-    fn gen_default_frm(&mut self) -> OptionFloatRoundingMode;
-    fn pack_float_rounding_mode(&mut self, arg0: &FRM) -> OptionFloatRoundingMode;
-    fn gen_shamt(&mut self, arg0: Type, arg1: XReg) -> ValueRegs;
-    fn gen_amode(&mut self, arg0: Reg, arg1: Offset32, arg2: Type) -> AMode;
-    fn gen_const_amode(&mut self, arg0: VCodeConstant) -> AMode;
-    fn offset32_imm(&mut self, arg0: i32) -> Offset32;
-    fn default_memflags(&mut self) -> MemFlags;
-    fn offset32_add(&mut self, arg0: Offset32, arg1: i64) -> Offset32;
-    fn valid_atomic_transaction(&mut self, arg0: Type) -> Option<Type>;
-    fn atomic_amo(&mut self) -> AMO;
-    fn gen_stack_addr(&mut self, arg0: StackSlot, arg1: Offset32) -> Reg;
-    fn gen_select_reg(&mut self, arg0: &IntCC, arg1: XReg, arg2: XReg, arg3: Reg, arg4: Reg)
-        -> Reg;
-    fn load_u64_constant(&mut self, arg0: u64) -> Reg;
-    fn vec_writable_clone(&mut self, arg0: &VecWritableReg) -> VecWritableReg;
-    fn vec_writable_to_regs(&mut self, arg0: &VecWritableReg) -> ValueRegs;
-    fn alloc_vec_writable(&mut self, arg0: Type) -> VecWritableReg;
-    fn load_op(&mut self, arg0: Type) -> LoadOP;
-    fn store_op(&mut self, arg0: Type) -> StoreOP;
-    fn load_ext_name(&mut self, arg0: ExternalName, arg1: i64) -> Reg;
-    fn int_convert_2_float_op(&mut self, arg0: Type, arg1: bool, arg2: Type) -> FpuOPRR;
-    fn label_to_br_target(&mut self, arg0: MachLabel) -> BranchTarget;
-    fn vec_label_get(&mut self, arg0: &VecMachLabel, arg1: u8) -> MachLabel;
-    fn lower_br_icmp(
-        &mut self,
-        arg0: &IntCC,
-        arg1: ValueRegs,
-        arg2: ValueRegs,
-        arg3: &VecMachLabel,
-        arg4: Type,
-    ) -> Unit;
-    fn int_zero_reg(&mut self, arg0: Type) -> ValueRegs;
-    fn lower_cond_br(
-        &mut self,
-        arg0: &IntCC,
-        arg1: ValueRegs,
-        arg2: &VecMachLabel,
-        arg3: Type,
-    ) -> Unit;
-    fn intcc_to_extend_op(&mut self, arg0: &IntCC) -> ExtendOp;
-    fn lower_br_table(&mut self, arg0: Reg, arg1: &VecMachLabel) -> Unit;
-    fn load_ra(&mut self) -> Reg;
-    fn shift_int_to_most_significant(&mut self, arg0: XReg, arg1: Type) -> XReg;
-    fn gen_call(
-        &mut self,
-        arg0: SigRef,
-        arg1: ExternalName,
-        arg2: RelocDistance,
-        arg3: ValueSlice,
-    ) -> InstOutput;
-    fn gen_call_indirect(&mut self, arg0: SigRef, arg1: Value, arg2: ValueSlice) -> InstOutput;
-    fn fp_reg(&mut self) -> PReg;
-    fn sp_reg(&mut self) -> PReg;
-    fn zero_reg(&mut self) -> Reg;
-    fn writable_zero_reg(&mut self) -> WritableReg;
-    fn int_compare(&mut self, arg0: &IntCC, arg1: XReg, arg2: XReg) -> IntegerCompare;
-    fn vec_alu_rr_dst_type(&mut self, arg0: &VecAluOpRR) -> Type;
-    fn vstate_from_type(&mut self, arg0: Type) -> VState;
-    fn vstate_mf2(&mut self, arg0: VState) -> VState;
-    fn min_vec_reg_size(&mut self) -> u64;
-    fn ty_vec_fits_in_register(&mut self, arg0: Type) -> Option<Type>;
-    fn is_atomic_rmw_max_etc(&mut self, arg0: &AtomicRmwOp) -> Option<(AtomicRmwOp, bool)>;
-    fn unpack_value_array_2(&mut self, arg0: &ValueArray2) -> (Value, Value);
-    fn pack_value_array_2(&mut self, arg0: Value, arg1: Value) -> ValueArray2;
-    fn unpack_value_array_3(&mut self, arg0: &ValueArray3) -> (Value, Value, Value);
-    fn pack_value_array_3(&mut self, arg0: Value, arg1: Value, arg2: Value) -> ValueArray3;
-    fn unpack_block_array_2(&mut self, arg0: &BlockArray2) -> (BlockCall, BlockCall);
-    fn pack_block_array_2(&mut self, arg0: BlockCall, arg1: BlockCall) -> BlockArray2;
-}
-
-pub trait ContextIter {
-    type Context;
-    type Output;
-    fn next(&mut self, ctx: &mut Self::Context) -> Option<Self::Output>;
-}
-
-pub struct ContextIterWrapper<Item, I: Iterator<Item = Item>, C: Context> {
-    iter: I,
-    _ctx: PhantomData<C>,
-}
-impl<Item, I: Iterator<Item = Item>, C: Context> From<I> for ContextIterWrapper<Item, I, C> {
-    fn from(iter: I) -> Self {
-        Self {
-            iter,
-            _ctx: PhantomData,
-        }
-    }
-}
-impl<Item, I: Iterator<Item = Item>, C: Context> ContextIter for ContextIterWrapper<Item, I, C> {
-    type Context = C;
-    type Output = Item;
-    fn next(&mut self, _ctx: &mut Self::Context) -> Option<Self::Output> {
-        self.iter.next()
-    }
-}
-
-/// Internal type MultiReg: defined at src/prelude_lower.isle line 21.
-#[derive(Clone, Debug)]
-pub enum MultiReg {
-    Empty,
-    One { a: Reg },
-    Two { a: Reg, b: Reg },
-    Three { a: Reg, b: Reg, c: Reg },
-    Four { a: Reg, b: Reg, c: Reg, d: Reg },
-}
-
-/// Internal type SideEffectNoResult: defined at src/prelude_lower.isle line 309.
-#[derive(Clone, Debug)]
-pub enum SideEffectNoResult {
-    Inst {
-        inst: MInst,
-    },
-    Inst2 {
-        inst1: MInst,
-        inst2: MInst,
-    },
-    Inst3 {
-        inst1: MInst,
-        inst2: MInst,
-        inst3: MInst,
-    },
-}
-
-/// Internal type ProducesFlags: defined at src/prelude_lower.isle line 351.
-#[derive(Clone, Debug)]
-pub enum ProducesFlags {
-    AlreadyExistingFlags,
-    ProducesFlagsSideEffect { inst: MInst },
-    ProducesFlagsTwiceSideEffect { inst1: MInst, inst2: MInst },
-    ProducesFlagsReturnsReg { inst: MInst, result: Reg },
-    ProducesFlagsReturnsResultWithConsumer { inst: MInst, result: Reg },
-}
-
-/// Internal type ConsumesAndProducesFlags: defined at src/prelude_lower.isle line 370.
-#[derive(Clone, Debug)]
-pub enum ConsumesAndProducesFlags {
-    SideEffect { inst: MInst },
-    ReturnsReg { inst: MInst, result: Reg },
-}
-
-/// Internal type ConsumesFlags: defined at src/prelude_lower.isle line 378.
-#[derive(Clone, Debug)]
-pub enum ConsumesFlags {
-    ConsumesFlagsSideEffect {
-        inst: MInst,
-    },
-    ConsumesFlagsSideEffect2 {
-        inst1: MInst,
-        inst2: MInst,
-    },
-    ConsumesFlagsReturnsResultWithProducer {
-        inst: MInst,
-        result: Reg,
-    },
-    ConsumesFlagsReturnsReg {
-        inst: MInst,
-        result: Reg,
-    },
-    ConsumesFlagsTwiceReturnsValueRegs {
-        inst1: MInst,
-        inst2: MInst,
-        result: ValueRegs,
-    },
-    ConsumesFlagsFourTimesReturnsValueRegs {
-        inst1: MInst,
-        inst2: MInst,
-        inst3: MInst,
-        inst4: MInst,
-        result: ValueRegs,
-    },
-}
-
-/// Internal type MInst: defined at src/isa/riscv64/inst.isle line 2.
-#[derive(Clone, Debug)]
-pub enum MInst {
-    Nop0,
-    Nop4,
-    Lui {
-        rd: WritableReg,
-        imm: Imm20,
-    },
-    LoadConst32 {
-        rd: WritableReg,
-        imm: u32,
-    },
-    LoadConst64 {
-        rd: WritableReg,
-        imm: u64,
-    },
-    Auipc {
-        rd: WritableReg,
-        imm: Imm20,
-    },
-    FpuRR {
-        alu_op: FpuOPRR,
-        frm: OptionFloatRoundingMode,
-        rd: WritableReg,
-        rs: Reg,
-    },
-    AluRRR {
-        alu_op: AluOPRRR,
-        rd: WritableReg,
-        rs1: Reg,
-        rs2: Reg,
-    },
-    FpuRRR {
-        alu_op: FpuOPRRR,
-        frm: OptionFloatRoundingMode,
-        rd: WritableReg,
-        rs1: Reg,
-        rs2: Reg,
-    },
-    FpuRRRR {
-        alu_op: FpuOPRRRR,
-        frm: OptionFloatRoundingMode,
-        rd: WritableReg,
-        rs1: Reg,
-        rs2: Reg,
-        rs3: Reg,
-    },
-    AluRRImm12 {
-        alu_op: AluOPRRI,
-        rd: WritableReg,
-        rs: Reg,
-        imm12: Imm12,
-    },
-    Load {
-        rd: WritableReg,
-        op: LoadOP,
-        flags: MemFlags,
-        from: AMode,
-    },
-    Store {
-        to: AMode,
-        op: StoreOP,
-        flags: MemFlags,
-        src: Reg,
-    },
-    Args {
-        args: VecArgPair,
-    },
-    Ret {
-        rets: VecRetPair,
-        stack_bytes_to_pop: u32,
-    },
-    Extend {
-        rd: WritableReg,
-        rn: Reg,
-        signed: bool,
-        from_bits: u8,
-        to_bits: u8,
-    },
-    AdjustSp {
-        amount: i64,
-    },
-    Call {
-        info: BoxCallInfo,
-    },
-    CallInd {
-        info: BoxCallIndInfo,
-    },
-    ReturnCall {
-        callee: BoxExternalName,
-        info: BoxReturnCallInfo,
-    },
-    ReturnCallInd {
-        callee: Reg,
-        info: BoxReturnCallInfo,
-    },
-    TrapIf {
-        test: Reg,
-        trap_code: TrapCode,
-    },
-    TrapIfC {
-        rs1: Reg,
-        rs2: Reg,
-        cc: IntCC,
-        trap_code: TrapCode,
-    },
-    Jal {
-        dest: BranchTarget,
-    },
-    CondBr {
-        taken: BranchTarget,
-        not_taken: BranchTarget,
-        kind: IntegerCompare,
-    },
-    LoadExtName {
-        rd: WritableReg,
-        name: BoxExternalName,
-        offset: i64,
-    },
-    LoadAddr {
-        rd: WritableReg,
-        mem: AMode,
-    },
-    VirtualSPOffsetAdj {
-        amount: i64,
-    },
-    Mov {
-        rd: WritableReg,
-        rm: Reg,
-        ty: Type,
-    },
-    MovFromPReg {
-        rd: WritableReg,
-        rm: PReg,
-    },
-    Fence {
-        pred: u8,
-        succ: u8,
-    },
-    FenceI,
-    ECall,
-    EBreak,
-    Udf {
-        trap_code: TrapCode,
-    },
-    Jalr {
-        rd: WritableReg,
-        base: Reg,
-        offset: Imm12,
-    },
-    Atomic {
-        op: AtomicOP,
-        rd: WritableReg,
-        addr: Reg,
-        src: Reg,
-        amo: AMO,
-    },
-    AtomicStore {
-        src: Reg,
-        ty: Type,
-        p: Reg,
-    },
-    AtomicLoad {
-        rd: WritableReg,
-        ty: Type,
-        p: Reg,
-    },
-    AtomicRmwLoop {
-        offset: Reg,
-        op: AtomicRmwOp,
-        dst: WritableReg,
-        ty: Type,
-        p: Reg,
-        x: Reg,
-        t0: WritableReg,
-    },
-    Select {
-        dst: VecWritableReg,
-        ty: Type,
-        condition: Reg,
-        x: ValueRegs,
-        y: ValueRegs,
-    },
-    BrTable {
-        index: Reg,
-        tmp1: WritableReg,
-        tmp2: WritableReg,
-        targets: VecBranchTarget,
-    },
-    AtomicCas {
-        offset: Reg,
-        t0: WritableReg,
-        dst: WritableReg,
-        e: Reg,
-        addr: Reg,
-        v: Reg,
-        ty: Type,
-    },
-    IntSelect {
-        op: IntSelectOP,
-        dst: VecWritableReg,
-        x: ValueRegs,
-        y: ValueRegs,
-        ty: Type,
-    },
-    Icmp {
-        cc: IntCC,
-        rd: WritableReg,
-        a: ValueRegs,
-        b: ValueRegs,
-        ty: Type,
-    },
-    SelectReg {
-        rd: WritableReg,
-        rs1: Reg,
-        rs2: Reg,
-        condition: IntegerCompare,
-    },
-    FcvtToInt {
-        is_sat: bool,
-        rd: WritableReg,
-        tmp: WritableReg,
-        rs: Reg,
-        is_signed: bool,
-        in_type: Type,
-        out_type: Type,
-    },
-    RawData {
-        data: VecU8,
-    },
-    Unwind {
-        inst: UnwindInst,
-    },
-    DummyUse {
-        reg: Reg,
-    },
-    FloatRound {
-        op: FloatRoundOP,
-        rd: WritableReg,
-        int_tmp: WritableReg,
-        f_tmp: WritableReg,
-        rs: Reg,
-        ty: Type,
-    },
-    FloatSelect {
-        op: FloatSelectOP,
-        rd: WritableReg,
-        tmp: WritableReg,
-        rs1: Reg,
-        rs2: Reg,
-        ty: Type,
-    },
-    FloatSelectPseudo {
-        op: FloatSelectOP,
-        rd: WritableReg,
-        tmp: WritableReg,
-        rs1: Reg,
-        rs2: Reg,
-        ty: Type,
-    },
-    Popcnt {
-        sum: WritableReg,
-        step: WritableReg,
-        tmp: WritableReg,
-        rs: Reg,
-        ty: Type,
-    },
-    Cltz {
-        leading: bool,
-        sum: WritableReg,
-        step: WritableReg,
-        tmp: WritableReg,
-        rs: Reg,
-        ty: Type,
-    },
-    Rev8 {
-        rs: Reg,
-        step: WritableReg,
-        tmp: WritableReg,
-        rd: WritableReg,
-    },
-    Brev8 {
-        rs: Reg,
-        ty: Type,
-        step: WritableReg,
-        tmp: WritableReg,
-        tmp2: WritableReg,
-        rd: WritableReg,
-    },
-    StackProbeLoop {
-        guard_size: u32,
-        probe_count: u32,
-        tmp: WritableReg,
-    },
-    VecAluRRRImm5 {
-        op: VecAluOpRRRImm5,
-        vd: WritableReg,
-        vd_src: Reg,
-        vs2: Reg,
-        imm: Imm5,
-        mask: VecOpMasking,
-        vstate: VState,
-    },
-    VecAluRRR {
-        op: VecAluOpRRR,
-        vd: WritableReg,
-        vs2: Reg,
-        vs1: Reg,
-        mask: VecOpMasking,
-        vstate: VState,
-    },
-    VecAluRRImm5 {
-        op: VecAluOpRRImm5,
-        vd: WritableReg,
-        vs2: Reg,
-        imm: Imm5,
-        mask: VecOpMasking,
-        vstate: VState,
-    },
-    VecAluRR {
-        op: VecAluOpRR,
-        vd: WritableReg,
-        vs: Reg,
-        mask: VecOpMasking,
-        vstate: VState,
-    },
-    VecAluRImm5 {
-        op: VecAluOpRImm5,
-        vd: WritableReg,
-        imm: Imm5,
-        mask: VecOpMasking,
-        vstate: VState,
-    },
-    VecSetState {
-        rd: WritableReg,
-        vstate: VState,
-    },
-    VecLoad {
-        eew: VecElementWidth,
-        to: WritableReg,
-        from: VecAMode,
-        flags: MemFlags,
-        mask: VecOpMasking,
-        vstate: VState,
-    },
-    VecStore {
-        eew: VecElementWidth,
-        to: VecAMode,
-        from: Reg,
-        flags: MemFlags,
-        mask: VecOpMasking,
-        vstate: VState,
-    },
-}
-
-/// Internal type FloatSelectOP: defined at src/isa/riscv64/inst.isle line 398.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum FloatSelectOP {
-    Max,
-    Min,
-}
-
-/// Internal type FloatRoundOP: defined at src/isa/riscv64/inst.isle line 403.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum FloatRoundOP {
-    Nearest,
-    Ceil,
-    Floor,
-    Trunc,
-}
-
-/// Internal type IntSelectOP: defined at src/isa/riscv64/inst.isle line 410.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum IntSelectOP {
-    Smax,
-    Umax,
-    Smin,
-    Umin,
-}
-
-/// Internal type AtomicOP: defined at src/isa/riscv64/inst.isle line 417.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum AtomicOP {
-    LrW,
-    ScW,
-    AmoswapW,
-    AmoaddW,
-    AmoxorW,
-    AmoandW,
-    AmoorW,
-    AmominW,
-    AmomaxW,
-    AmominuW,
-    AmomaxuW,
-    LrD,
-    ScD,
-    AmoswapD,
-    AmoaddD,
-    AmoxorD,
-    AmoandD,
-    AmoorD,
-    AmominD,
-    AmomaxD,
-    AmominuD,
-    AmomaxuD,
-}
-
-/// Internal type FpuOPRRRR: defined at src/isa/riscv64/inst.isle line 442.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum FpuOPRRRR {
-    FmaddS,
-    FmsubS,
-    FnmsubS,
-    FnmaddS,
-    FmaddD,
-    FmsubD,
-    FnmsubD,
-    FnmaddD,
-}
-
-/// Internal type FClassResult: defined at src/isa/riscv64/inst.isle line 455.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum FClassResult {
-    NegInfinite,
-    NegNormal,
-    NegSubNormal,
-    NegZero,
-    PosZero,
-    PosSubNormal,
-    PosNormal,
-    PosInfinite,
-    SNaN,
-    QNaN,
-}
-
-/// Internal type FpuOPRR: defined at src/isa/riscv64/inst.isle line 478.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum FpuOPRR {
-    FsqrtS,
-    FcvtWS,
-    FcvtWuS,
-    FmvXW,
-    FclassS,
-    FcvtSw,
-    FcvtSwU,
-    FmvWX,
-    FcvtLS,
-    FcvtLuS,
-    FcvtSL,
-    FcvtSLU,
-    FcvtLD,
-    FcvtLuD,
-    FmvXD,
-    FcvtDL,
-    FcvtDLu,
-    FmvDX,
-    FsqrtD,
-    FcvtSD,
-    FcvtDS,
-    FclassD,
-    FcvtWD,
-    FcvtWuD,
-    FcvtDW,
-    FcvtDWU,
-}
-
-/// Internal type LoadOP: defined at src/isa/riscv64/inst.isle line 518.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum LoadOP {
-    Lb,
-    Lh,
-    Lw,
-    Lbu,
-    Lhu,
-    Lwu,
-    Ld,
-    Flw,
-    Fld,
-}
-
-/// Internal type StoreOP: defined at src/isa/riscv64/inst.isle line 530.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum StoreOP {
-    Sb,
-    Sh,
-    Sw,
-    Sd,
-    Fsw,
-    Fsd,
-}
-
-/// Internal type AluOPRRR: defined at src/isa/riscv64/inst.isle line 539.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum AluOPRRR {
-    Add,
-    Sub,
-    Sll,
-    Slt,
-    SltU,
-    Sgt,
-    Sgtu,
-    Xor,
-    Srl,
-    Sra,
-    Or,
-    And,
-    Addw,
-    Subw,
-    Sllw,
-    Srlw,
-    Sraw,
-    Mul,
-    Mulh,
-    Mulhsu,
-    Mulhu,
-    Div,
-    DivU,
-    Rem,
-    RemU,
-    Mulw,
-    Divw,
-    Divuw,
-    Remw,
-    Remuw,
-    Adduw,
-    Sh1add,
-    Sh1adduw,
-    Sh2add,
-    Sh2adduw,
-    Sh3add,
-    Sh3adduw,
-    Andn,
-    Orn,
-    Xnor,
-    Max,
-    Maxu,
-    Min,
-    Minu,
-    Rol,
-    Rolw,
-    Ror,
-    Rorw,
-    Bclr,
-    Bext,
-    Binv,
-    Bset,
-    Clmul,
-    Clmulh,
-    Clmulr,
-    Pack,
-    Packw,
-    Packh,
-}
-
-/// Internal type FpuOPRRR: defined at src/isa/riscv64/inst.isle line 619.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum FpuOPRRR {
-    FaddS,
-    FsubS,
-    FmulS,
-    FdivS,
-    FsgnjS,
-    FsgnjnS,
-    FsgnjxS,
-    FminS,
-    FmaxS,
-    FeqS,
-    FltS,
-    FleS,
-    FaddD,
-    FsubD,
-    FmulD,
-    FdivD,
-    FsgnjD,
-    FsgnjnD,
-    FsgnjxD,
-    FminD,
-    FmaxD,
-    FeqD,
-    FltD,
-    FleD,
-}
-
-/// Internal type AluOPRRI: defined at src/isa/riscv64/inst.isle line 652.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum AluOPRRI {
-    Addi,
-    Slti,
-    SltiU,
-    Xori,
-    Ori,
-    Andi,
-    Slli,
-    Srli,
-    Srai,
-    Addiw,
-    Slliw,
-    SrliW,
-    Sraiw,
-    SlliUw,
-    Clz,
-    Clzw,
-    Ctz,
-    Ctzw,
-    Cpop,
-    Cpopw,
-    Sextb,
-    Sexth,
-    Zexth,
-    Rori,
-    Roriw,
-    Rev8,
-    Brev8,
-    Orcb,
-    Bclri,
-    Bexti,
-    Binvi,
-    Bseti,
-}
-
-/// Internal type FRM: defined at src/isa/riscv64/inst.isle line 695.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum FRM {
-    RNE,
-    RTZ,
-    RDN,
-    RUP,
-    RMM,
-    Fcsr,
-}
-
-/// Internal type FFlagsException: defined at src/isa/riscv64/inst.isle line 711.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum FFlagsException {
-    NV,
-    DZ,
-    OF,
-    UF,
-    NX,
-}
-
-/// Internal type ExtendOp: defined at src/isa/riscv64/inst.isle line 1912.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum ExtendOp {
-    Zero,
-    Signed,
-}
-
-/// Internal type CmpResult: defined at src/isa/riscv64/inst.isle line 2854.
-#[derive(Clone, Debug)]
-pub enum CmpResult {
-    Result { result: XReg, invert: bool },
-}
-
-/// Internal type VecElementWidth: defined at src/isa/riscv64/inst_vector.isle line 2.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum VecElementWidth {
-    E8,
-    E16,
-    E32,
-    E64,
-}
-
-/// Internal type VecLmul: defined at src/isa/riscv64/inst_vector.isle line 15.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum VecLmul {
-    LmulF8,
-    LmulF4,
-    LmulF2,
-    Lmul1,
-    Lmul2,
-    Lmul4,
-    Lmul8,
-}
-
-/// Internal type VecTailMode: defined at src/isa/riscv64/inst_vector.isle line 28.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum VecTailMode {
-    Agnostic,
-    Undisturbed,
-}
-
-/// Internal type VecMaskMode: defined at src/isa/riscv64/inst_vector.isle line 38.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum VecMaskMode {
-    Agnostic,
-    Undisturbed,
-}
-
-/// Internal type VecAvl: defined at src/isa/riscv64/inst_vector.isle line 50.
-#[derive(Clone, Debug)]
-pub enum VecAvl {
-    Static { size: UImm5 },
-}
-
-/// Internal type VecOpCategory: defined at src/isa/riscv64/inst_vector.isle line 64.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum VecOpCategory {
-    OPIVV,
-    OPFVV,
-    OPMVV,
-    OPIVI,
-    OPIVX,
-    OPFVF,
-    OPMVX,
-    OPCFG,
-}
-
-/// Internal type VecOpMasking: defined at src/isa/riscv64/inst_vector.isle line 79.
-#[derive(Clone, Debug)]
-pub enum VecOpMasking {
-    Enabled { reg: Reg },
-    Disabled,
-}
-
-/// Internal type VecAluOpRRR: defined at src/isa/riscv64/inst_vector.isle line 91.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum VecAluOpRRR {
-    VaddVV,
-    VsaddVV,
-    VsadduVV,
-    VwaddVV,
-    VwaddWV,
-    VwadduVV,
-    VwadduWV,
-    VsubVV,
-    VwsubVV,
-    VwsubWV,
-    VwsubuVV,
-    VwsubuWV,
-    VssubVV,
-    VssubuVV,
-    VmulVV,
-    VmulhVV,
-    VmulhuVV,
-    VsmulVV,
-    VsllVV,
-    VsrlVV,
-    VsraVV,
-    VandVV,
-    VorVV,
-    VxorVV,
-    VmaxVV,
-    VmaxuVV,
-    VminVV,
-    VminuVV,
-    VfaddVV,
-    VfsubVV,
-    VfmulVV,
-    VfdivVV,
-    VfminVV,
-    VfmaxVV,
-    VfsgnjVV,
-    VfsgnjnVV,
-    VfsgnjxVV,
-    VmergeVVM,
-    VredmaxuVS,
-    VredminuVS,
-    VrgatherVV,
-    VcompressVM,
-    VmseqVV,
-    VmsneVV,
-    VmsltuVV,
-    VmsltVV,
-    VmsleuVV,
-    VmsleVV,
-    VmfeqVV,
-    VmfneVV,
-    VmfltVV,
-    VmfleVV,
-    VmandMM,
-    VmorMM,
-    VmnandMM,
-    VmnorMM,
-    VaddVX,
-    VsaddVX,
-    VsadduVX,
-    VwaddVX,
-    VwaddWX,
-    VwadduVX,
-    VwadduWX,
-    VsubVX,
-    VrsubVX,
-    VwsubVX,
-    VwsubWX,
-    VwsubuVX,
-    VwsubuWX,
-    VssubVX,
-    VssubuVX,
-    VmulVX,
-    VmulhVX,
-    VmulhuVX,
-    VsmulVX,
-    VsllVX,
-    VsrlVX,
-    VsraVX,
-    VandVX,
-    VorVX,
-    VxorVX,
-    VmaxVX,
-    VmaxuVX,
-    VminVX,
-    VminuVX,
-    VslidedownVX,
-    VfaddVF,
-    VfsubVF,
-    VfrsubVF,
-    VfmulVF,
-    VfdivVF,
-    VfsgnjVF,
-    VfrdivVF,
-    VmergeVXM,
-    VfmergeVFM,
-    VrgatherVX,
-    VmseqVX,
-    VmsneVX,
-    VmsltuVX,
-    VmsltVX,
-    VmsleuVX,
-    VmsleVX,
-    VmsgtuVX,
-    VmsgtVX,
-    VmfeqVF,
-    VmfneVF,
-    VmfltVF,
-    VmfleVF,
-    VmfgtVF,
-    VmfgeVF,
-}
-
-/// Internal type VecAluOpRRRImm5: defined at src/isa/riscv64/inst_vector.isle line 211.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum VecAluOpRRRImm5 {
-    VslideupVI,
-}
-
-/// Internal type VecAluOpRRImm5: defined at src/isa/riscv64/inst_vector.isle line 216.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum VecAluOpRRImm5 {
-    VaddVI,
-    VsaddVI,
-    VsadduVI,
-    VrsubVI,
-    VsllVI,
-    VsrlVI,
-    VsraVI,
-    VandVI,
-    VorVI,
-    VxorVI,
-    VssrlVI,
-    VslidedownVI,
-    VmergeVIM,
-    VrgatherVI,
-    VmvrV,
-    VnclipWI,
-    VnclipuWI,
-    VmseqVI,
-    VmsneVI,
-    VmsleuVI,
-    VmsleVI,
-    VmsgtuVI,
-    VmsgtVI,
-}
-
-/// Internal type VecAluOpRImm5: defined at src/isa/riscv64/inst_vector.isle line 246.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum VecAluOpRImm5 {
-    VmvVI,
-}
-
-/// Internal type VecAluOpRR: defined at src/isa/riscv64/inst_vector.isle line 253.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum VecAluOpRR {
-    VmvSX,
-    VmvXS,
-    VfmvSF,
-    VfmvFS,
-    VmvVV,
-    VmvVX,
-    VfmvVF,
-    VfsqrtV,
-    VsextVF2,
-    VsextVF4,
-    VsextVF8,
-    VzextVF2,
-    VzextVF4,
-    VzextVF8,
-}
-
-/// Internal type VecAMode: defined at src/isa/riscv64/inst_vector.isle line 277.
-#[derive(Clone, Debug)]
-pub enum VecAMode {
-    UnitStride { base: AMode },
-}
-
-// Generated as internal constructor for term output_reg.
-pub fn constructor_output_reg<C: Context>(ctx: &mut C, arg0: Reg) -> InstOutput {
-    let v1 = C::value_reg(ctx, arg0);
-    let v2 = C::output(ctx, v1);
-    // Rule at src/prelude_lower.isle line 65.
-    return v2;
-}
-
-// Generated as internal constructor for term output_value.
-pub fn constructor_output_value<C: Context>(ctx: &mut C, arg0: Value) -> InstOutput {
-    let v1 = C::put_in_regs(ctx, arg0);
-    let v2 = C::output(ctx, v1);
-    // Rule at src/prelude_lower.isle line 69.
-    return v2;
-}
-
-// Generated as internal constructor for term temp_reg.
-pub fn constructor_temp_reg<C: Context>(ctx: &mut C, arg0: Type) -> Reg {
-    let v1 = C::temp_writable_reg(ctx, arg0);
-    let v2 = C::writable_reg_to_reg(ctx, v1);
-    // Rule at src/prelude_lower.isle line 89.
-    return v2;
-}
-
-// Generated as internal constructor for term value_regs_range.
-pub fn constructor_value_regs_range<C: Context>(ctx: &mut C, arg0: ValueRegs) -> Range {
-    let v2 = C::value_regs_len(ctx, arg0);
-    let v3 = C::range(ctx, 0x0, v2);
-    // Rule at src/prelude_lower.isle line 138.
-    return v3;
-}
-
-// Generated as internal constructor for term lo_reg.
-pub fn constructor_lo_reg<C: Context>(ctx: &mut C, arg0: Value) -> Reg {
-    let v1 = C::put_in_regs(ctx, arg0);
-    let v3 = C::value_regs_get(ctx, v1, 0x0);
-    // Rule at src/prelude_lower.isle line 149.
-    return v3;
-}
-
-// Generated as internal constructor for term multi_reg_to_pair_and_single.
-pub fn constructor_multi_reg_to_pair_and_single<C: Context>(
-    ctx: &mut C,
-    arg0: &MultiReg,
-) -> InstOutput {
-    if let &MultiReg::Three {
-        a: v1,
-        b: v2,
-        c: v3,
-    } = arg0
-    {
-        let v4 = C::value_regs(ctx, v1, v2);
-        let v5 = C::value_reg(ctx, v3);
-        let v6 = C::output_pair(ctx, v4, v5);
-        // Rule at src/prelude_lower.isle line 160.
-        return v6;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "multi_reg_to_pair_and_single", "src/prelude_lower.isle line 159"
-    )
-}
-
-// Generated as internal constructor for term multi_reg_to_pair.
-pub fn constructor_multi_reg_to_pair<C: Context>(ctx: &mut C, arg0: &MultiReg) -> InstOutput {
-    if let &MultiReg::Two { a: v1, b: v2 } = arg0 {
-        let v3 = C::value_regs(ctx, v1, v2);
-        let v4 = C::output(ctx, v3);
-        // Rule at src/prelude_lower.isle line 165.
-        return v4;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "multi_reg_to_pair", "src/prelude_lower.isle line 164"
-    )
-}
-
-// Generated as internal constructor for term multi_reg_to_single.
-pub fn constructor_multi_reg_to_single<C: Context>(ctx: &mut C, arg0: &MultiReg) -> InstOutput {
-    if let &MultiReg::One { a: v1 } = arg0 {
-        let v2 = C::value_reg(ctx, v1);
-        let v3 = C::output(ctx, v2);
-        // Rule at src/prelude_lower.isle line 170.
-        return v3;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "multi_reg_to_single", "src/prelude_lower.isle line 169"
-    )
-}
-
-// Generated as internal constructor for term emit_side_effect.
-pub fn constructor_emit_side_effect<C: Context>(ctx: &mut C, arg0: &SideEffectNoResult) -> Unit {
-    match arg0 {
-        &SideEffectNoResult::Inst { inst: ref v1 } => {
-            let v2 = C::emit(ctx, v1);
-            // Rule at src/prelude_lower.isle line 319.
-            return v2;
-        }
-        &SideEffectNoResult::Inst2 {
-            inst1: ref v3,
-            inst2: ref v4,
-        } => {
-            let v5 = C::emit(ctx, v3);
-            let v6 = C::emit(ctx, v4);
-            // Rule at src/prelude_lower.isle line 321.
-            return v6;
-        }
-        &SideEffectNoResult::Inst3 {
-            inst1: ref v7,
-            inst2: ref v8,
-            inst3: ref v9,
-        } => {
-            let v10 = C::emit(ctx, v7);
-            let v11 = C::emit(ctx, v8);
-            let v12 = C::emit(ctx, v9);
-            // Rule at src/prelude_lower.isle line 324.
-            return v12;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "emit_side_effect", "src/prelude_lower.isle line 318"
-    )
-}
-
-// Generated as internal constructor for term side_effect.
-pub fn constructor_side_effect<C: Context>(ctx: &mut C, arg0: &SideEffectNoResult) -> InstOutput {
-    let v1 = constructor_emit_side_effect(ctx, arg0);
-    let v2 = C::output_none(ctx);
-    // Rule at src/prelude_lower.isle line 332.
-    return v2;
-}
-
-// Generated as internal constructor for term side_effect_concat.
-pub fn constructor_side_effect_concat<C: Context>(
-    ctx: &mut C,
-    arg0: &SideEffectNoResult,
-    arg1: &SideEffectNoResult,
-) -> SideEffectNoResult {
-    match arg0 {
-        &SideEffectNoResult::Inst { inst: ref v1 } => {
-            match arg1 {
-                &SideEffectNoResult::Inst { inst: ref v3 } => {
-                    let v4 = SideEffectNoResult::Inst2 {
-                        inst1: v1.clone(),
-                        inst2: v3.clone(),
-                    };
-                    // Rule at src/prelude_lower.isle line 337.
-                    return v4;
-                }
-                &SideEffectNoResult::Inst2 {
-                    inst1: ref v5,
-                    inst2: ref v6,
-                } => {
-                    let v7 = SideEffectNoResult::Inst3 {
-                        inst1: v1.clone(),
-                        inst2: v5.clone(),
-                        inst3: v6.clone(),
-                    };
-                    // Rule at src/prelude_lower.isle line 339.
-                    return v7;
-                }
-                _ => {}
-            }
-        }
-        &SideEffectNoResult::Inst2 {
-            inst1: ref v8,
-            inst2: ref v9,
-        } => {
-            if let &SideEffectNoResult::Inst { inst: ref v3 } = arg1 {
-                let v10 = SideEffectNoResult::Inst3 {
-                    inst1: v8.clone(),
-                    inst2: v9.clone(),
-                    inst3: v3.clone(),
-                };
-                // Rule at src/prelude_lower.isle line 341.
-                return v10;
-            }
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "side_effect_concat", "src/prelude_lower.isle line 336"
-    )
-}
-
-// Generated as internal constructor for term produces_flags_concat.
-pub fn constructor_produces_flags_concat<C: Context>(
-    ctx: &mut C,
-    arg0: &ProducesFlags,
-    arg1: &ProducesFlags,
-) -> ProducesFlags {
-    if let &ProducesFlags::ProducesFlagsSideEffect { inst: ref v1 } = arg0 {
-        if let &ProducesFlags::ProducesFlagsSideEffect { inst: ref v3 } = arg1 {
-            let v4 = ProducesFlags::ProducesFlagsTwiceSideEffect {
-                inst1: v1.clone(),
-                inst2: v3.clone(),
-            };
-            // Rule at src/prelude_lower.isle line 366.
-            return v4;
-        }
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "produces_flags_concat", "src/prelude_lower.isle line 365"
-    )
-}
-
-// Generated as internal constructor for term produces_flags_get_reg.
-pub fn constructor_produces_flags_get_reg<C: Context>(ctx: &mut C, arg0: &ProducesFlags) -> Reg {
-    match arg0 {
-        &ProducesFlags::ProducesFlagsReturnsReg {
-            inst: ref v1,
-            result: v2,
-        } => {
-            // Rule at src/prelude_lower.isle line 396.
-            return v2;
-        }
-        &ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
-            inst: ref v3,
-            result: v4,
-        } => {
-            // Rule at src/prelude_lower.isle line 397.
-            return v4;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "produces_flags_get_reg", "src/prelude_lower.isle line 395"
-    )
-}
-
-// Generated as internal constructor for term produces_flags_ignore.
-pub fn constructor_produces_flags_ignore<C: Context>(
-    ctx: &mut C,
-    arg0: &ProducesFlags,
-) -> ProducesFlags {
-    match arg0 {
-        &ProducesFlags::ProducesFlagsReturnsReg {
-            inst: ref v1,
-            result: v2,
-        } => {
-            let v3 = ProducesFlags::ProducesFlagsSideEffect { inst: v1.clone() };
-            // Rule at src/prelude_lower.isle line 402.
-            return v3;
-        }
-        &ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
-            inst: ref v4,
-            result: v5,
-        } => {
-            let v6 = ProducesFlags::ProducesFlagsSideEffect { inst: v4.clone() };
-            // Rule at src/prelude_lower.isle line 404.
-            return v6;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "produces_flags_ignore", "src/prelude_lower.isle line 401"
-    )
-}
-
-// Generated as internal constructor for term consumes_flags_concat.
-pub fn constructor_consumes_flags_concat<C: Context>(
-    ctx: &mut C,
-    arg0: &ConsumesFlags,
-    arg1: &ConsumesFlags,
-) -> ConsumesFlags {
-    match arg0 {
-        &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v8 } => {
-            if let &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v9 } = arg1 {
-                let v10 = ConsumesFlags::ConsumesFlagsSideEffect2 {
-                    inst1: v8.clone(),
-                    inst2: v9.clone(),
-                };
-                // Rule at src/prelude_lower.isle line 417.
-                return v10;
-            }
-        }
-        &ConsumesFlags::ConsumesFlagsReturnsReg {
-            inst: ref v1,
-            result: v2,
-        } => {
-            if let &ConsumesFlags::ConsumesFlagsReturnsReg {
-                inst: ref v4,
-                result: v5,
-            } = arg1
-            {
-                let v6 = C::value_regs(ctx, v2, v5);
-                let v7 = ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
-                    inst1: v1.clone(),
-                    inst2: v4.clone(),
-                    result: v6,
-                };
-                // Rule at src/prelude_lower.isle line 411.
-                return v7;
-            }
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "consumes_flags_concat", "src/prelude_lower.isle line 410"
-    )
-}
-
-// Generated as internal constructor for term with_flags.
-pub fn constructor_with_flags<C: Context>(
-    ctx: &mut C,
-    arg0: &ProducesFlags,
-    arg1: &ConsumesFlags,
-) -> ValueRegs {
-    match arg0 {
-        &ProducesFlags::ProducesFlagsSideEffect { inst: ref v12 } => {
-            match arg1 {
-                &ConsumesFlags::ConsumesFlagsReturnsReg {
-                    inst: ref v13,
-                    result: v14,
-                } => {
-                    let v15 = C::emit(ctx, v12);
-                    let v16 = C::emit(ctx, v13);
-                    let v17 = C::value_reg(ctx, v14);
-                    // Rule at src/prelude_lower.isle line 448.
-                    return v17;
-                }
-                &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
-                    inst1: ref v18,
-                    inst2: ref v19,
-                    result: v20,
-                } => {
-                    let v15 = C::emit(ctx, v12);
-                    let v21 = C::emit(ctx, v18);
-                    let v22 = C::emit(ctx, v19);
-                    // Rule at src/prelude_lower.isle line 454.
-                    return v20;
-                }
-                &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
-                    inst1: ref v23,
-                    inst2: ref v24,
-                    inst3: ref v25,
-                    inst4: ref v26,
-                    result: v27,
-                } => {
-                    let v15 = C::emit(ctx, v12);
-                    let v28 = C::emit(ctx, v23);
-                    let v29 = C::emit(ctx, v24);
-                    let v30 = C::emit(ctx, v25);
-                    let v31 = C::emit(ctx, v26);
-                    // Rule at src/prelude_lower.isle line 466.
-                    return v27;
-                }
-                _ => {}
-            }
-        }
-        &ProducesFlags::ProducesFlagsTwiceSideEffect {
-            inst1: ref v32,
-            inst2: ref v33,
-        } => {
-            match arg1 {
-                &ConsumesFlags::ConsumesFlagsReturnsReg {
-                    inst: ref v13,
-                    result: v14,
-                } => {
-                    let v34 = C::emit(ctx, v32);
-                    let v35 = C::emit(ctx, v33);
-                    let v36 = C::emit(ctx, v13);
-                    let v37 = C::value_reg(ctx, v14);
-                    // Rule at src/prelude_lower.isle line 482.
-                    return v37;
-                }
-                &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
-                    inst1: ref v18,
-                    inst2: ref v19,
-                    result: v20,
-                } => {
-                    let v34 = C::emit(ctx, v32);
-                    let v35 = C::emit(ctx, v33);
-                    let v38 = C::emit(ctx, v18);
-                    let v39 = C::emit(ctx, v19);
-                    // Rule at src/prelude_lower.isle line 489.
-                    return v20;
-                }
-                &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
-                    inst1: ref v23,
-                    inst2: ref v24,
-                    inst3: ref v25,
-                    inst4: ref v26,
-                    result: v27,
-                } => {
-                    let v34 = C::emit(ctx, v32);
-                    let v35 = C::emit(ctx, v33);
-                    let v40 = C::emit(ctx, v23);
-                    let v41 = C::emit(ctx, v24);
-                    let v42 = C::emit(ctx, v25);
-                    let v43 = C::emit(ctx, v26);
-                    // Rule at src/prelude_lower.isle line 502.
-                    return v27;
-                }
-                _ => {}
-            }
-        }
-        &ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
-            inst: ref v1,
-            result: v2,
-        } => {
-            match arg1 {
-                &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v9 } => {
-                    let v6 = C::emit(ctx, v1);
-                    let v10 = C::emit(ctx, v9);
-                    let v11 = C::value_reg(ctx, v2);
-                    // Rule at src/prelude_lower.isle line 442.
-                    return v11;
-                }
-                &ConsumesFlags::ConsumesFlagsReturnsResultWithProducer {
-                    inst: ref v4,
-                    result: v5,
-                } => {
-                    let v6 = C::emit(ctx, v1);
-                    let v7 = C::emit(ctx, v4);
-                    let v8 = C::value_regs(ctx, v2, v5);
-                    // Rule at src/prelude_lower.isle line 434.
-                    return v8;
-                }
-                _ => {}
-            }
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "with_flags", "src/prelude_lower.isle line 432"
-    )
-}
-
-// Generated as internal constructor for term with_flags_reg.
-pub fn constructor_with_flags_reg<C: Context>(
-    ctx: &mut C,
-    arg0: &ProducesFlags,
-    arg1: &ConsumesFlags,
-) -> Reg {
-    let v2 = constructor_with_flags(ctx, arg0, arg1);
-    let v4 = C::value_regs_get(ctx, v2, 0x0);
-    // Rule at src/prelude_lower.isle line 520.
-    return v4;
-}
-
-// Generated as internal constructor for term flags_to_producesflags.
-pub fn constructor_flags_to_producesflags<C: Context>(ctx: &mut C, arg0: Value) -> ProducesFlags {
-    let v1 = C::mark_value_used(ctx, arg0);
-    // Rule at src/prelude_lower.isle line 527.
-    return ProducesFlags::AlreadyExistingFlags;
-}
-
-// Generated as internal constructor for term with_flags_side_effect.
-pub fn constructor_with_flags_side_effect<C: Context>(
-    ctx: &mut C,
-    arg0: &ProducesFlags,
-    arg1: &ConsumesFlags,
-) -> SideEffectNoResult {
-    match arg0 {
-        &ProducesFlags::AlreadyExistingFlags => {
-            match arg1 {
-                &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v2 } => {
-                    let v3 = SideEffectNoResult::Inst { inst: v2.clone() };
-                    // Rule at src/prelude_lower.isle line 538.
-                    return v3;
-                }
-                &ConsumesFlags::ConsumesFlagsSideEffect2 {
-                    inst1: ref v4,
-                    inst2: ref v5,
-                } => {
-                    let v6 = SideEffectNoResult::Inst2 {
-                        inst1: v4.clone(),
-                        inst2: v5.clone(),
-                    };
-                    // Rule at src/prelude_lower.isle line 543.
-                    return v6;
-                }
-                _ => {}
-            }
-        }
-        &ProducesFlags::ProducesFlagsSideEffect { inst: ref v7 } => {
-            match arg1 {
-                &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v2 } => {
-                    let v8 = SideEffectNoResult::Inst2 {
-                        inst1: v7.clone(),
-                        inst2: v2.clone(),
-                    };
-                    // Rule at src/prelude_lower.isle line 548.
-                    return v8;
-                }
-                &ConsumesFlags::ConsumesFlagsSideEffect2 {
-                    inst1: ref v4,
-                    inst2: ref v5,
-                } => {
-                    let v9 = SideEffectNoResult::Inst3 {
-                        inst1: v7.clone(),
-                        inst2: v4.clone(),
-                        inst3: v5.clone(),
-                    };
-                    // Rule at src/prelude_lower.isle line 553.
-                    return v9;
-                }
-                _ => {}
-            }
-        }
-        &ProducesFlags::ProducesFlagsTwiceSideEffect {
-            inst1: ref v10,
-            inst2: ref v11,
-        } => {
-            if let &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v2 } = arg1 {
-                let v12 = SideEffectNoResult::Inst3 {
-                    inst1: v10.clone(),
-                    inst2: v11.clone(),
-                    inst3: v2.clone(),
-                };
-                // Rule at src/prelude_lower.isle line 558.
-                return v12;
-            }
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "with_flags_side_effect", "src/prelude_lower.isle line 536"
-    )
-}
-
-// Generated as internal constructor for term with_flags_chained.
-pub fn constructor_with_flags_chained<C: Context>(
-    ctx: &mut C,
-    arg0: &ProducesFlags,
-    arg1: &ConsumesAndProducesFlags,
-    arg2: &ConsumesFlags,
-) -> MultiReg {
-    match arg0 {
-        &ProducesFlags::ProducesFlagsSideEffect { inst: ref v1 } => {
-            match arg1 {
-                &ConsumesAndProducesFlags::SideEffect { inst: ref v3 } => {
-                    match arg2 {
-                        &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v5 } => {
-                            let v6 = C::emit(ctx, v1);
-                            let v7 = C::emit(ctx, v3);
-                            let v8 = C::emit(ctx, v5);
-                            // Rule at src/prelude_lower.isle line 567.
-                            return MultiReg::Empty;
-                        }
-                        &ConsumesFlags::ConsumesFlagsSideEffect2 {
-                            inst1: ref v10,
-                            inst2: ref v11,
-                        } => {
-                            let v6 = C::emit(ctx, v1);
-                            let v7 = C::emit(ctx, v3);
-                            let v12 = C::emit(ctx, v10);
-                            let v13 = C::emit(ctx, v11);
-                            // Rule at src/prelude_lower.isle line 575.
-                            return MultiReg::Empty;
-                        }
-                        &ConsumesFlags::ConsumesFlagsReturnsReg {
-                            inst: ref v14,
-                            result: v15,
-                        } => {
-                            let v6 = C::emit(ctx, v1);
-                            let v7 = C::emit(ctx, v3);
-                            let v16 = C::emit(ctx, v14);
-                            let v17 = MultiReg::One { a: v15 };
-                            // Rule at src/prelude_lower.isle line 584.
-                            return v17;
-                        }
-                        &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
-                            inst1: ref v18,
-                            inst2: ref v19,
-                            result: v20,
-                        } => {
-                            let v6 = C::emit(ctx, v1);
-                            let v7 = C::emit(ctx, v3);
-                            let v21 = C::emit(ctx, v18);
-                            let v22 = C::emit(ctx, v19);
-                            let v24 = C::value_regs_get(ctx, v20, 0x0);
-                            let v26 = C::value_regs_get(ctx, v20, 0x1);
-                            let v27 = MultiReg::Two { a: v24, b: v26 };
-                            // Rule at src/prelude_lower.isle line 592.
-                            return v27;
-                        }
-                        &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
-                            inst1: ref v28,
-                            inst2: ref v29,
-                            inst3: ref v30,
-                            inst4: ref v31,
-                            result: v32,
-                        } => {
-                            let v6 = C::emit(ctx, v1);
-                            let v7 = C::emit(ctx, v3);
-                            let v33 = C::emit(ctx, v28);
-                            let v34 = C::emit(ctx, v29);
-                            let v35 = C::emit(ctx, v30);
-                            let v36 = C::emit(ctx, v31);
-                            let v37 = C::value_regs_get(ctx, v32, 0x0);
-                            let v38 = C::value_regs_get(ctx, v32, 0x1);
-                            let v39 = MultiReg::Two { a: v37, b: v38 };
-                            // Rule at src/prelude_lower.isle line 601.
-                            return v39;
-                        }
-                        _ => {}
-                    }
-                }
-                &ConsumesAndProducesFlags::ReturnsReg {
-                    inst: ref v47,
-                    result: v48,
-                } => {
-                    match arg2 {
-                        &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v5 } => {
-                            let v6 = C::emit(ctx, v1);
-                            let v49 = C::emit(ctx, v47);
-                            let v8 = C::emit(ctx, v5);
-                            let v50 = MultiReg::One { a: v48 };
-                            // Rule at src/prelude_lower.isle line 661.
-                            return v50;
-                        }
-                        &ConsumesFlags::ConsumesFlagsSideEffect2 {
-                            inst1: ref v10,
-                            inst2: ref v11,
-                        } => {
-                            let v6 = C::emit(ctx, v1);
-                            let v49 = C::emit(ctx, v47);
-                            let v12 = C::emit(ctx, v10);
-                            let v13 = C::emit(ctx, v11);
-                            let v50 = MultiReg::One { a: v48 };
-                            // Rule at src/prelude_lower.isle line 669.
-                            return v50;
-                        }
-                        &ConsumesFlags::ConsumesFlagsReturnsReg {
-                            inst: ref v14,
-                            result: v15,
-                        } => {
-                            let v6 = C::emit(ctx, v1);
-                            let v49 = C::emit(ctx, v47);
-                            let v16 = C::emit(ctx, v14);
-                            let v51 = MultiReg::Two { a: v48, b: v15 };
-                            // Rule at src/prelude_lower.isle line 678.
-                            return v51;
-                        }
-                        &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
-                            inst1: ref v18,
-                            inst2: ref v19,
-                            result: v20,
-                        } => {
-                            let v6 = C::emit(ctx, v1);
-                            let v49 = C::emit(ctx, v47);
-                            let v21 = C::emit(ctx, v18);
-                            let v22 = C::emit(ctx, v19);
-                            let v24 = C::value_regs_get(ctx, v20, 0x0);
-                            let v26 = C::value_regs_get(ctx, v20, 0x1);
-                            let v52 = MultiReg::Three {
-                                a: v48,
-                                b: v24,
-                                c: v26,
-                            };
-                            // Rule at src/prelude_lower.isle line 686.
-                            return v52;
-                        }
-                        &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
-                            inst1: ref v28,
-                            inst2: ref v29,
-                            inst3: ref v30,
-                            inst4: ref v31,
-                            result: v32,
-                        } => {
-                            let v6 = C::emit(ctx, v1);
-                            let v49 = C::emit(ctx, v47);
-                            let v33 = C::emit(ctx, v28);
-                            let v34 = C::emit(ctx, v29);
-                            let v35 = C::emit(ctx, v30);
-                            let v36 = C::emit(ctx, v31);
-                            let v37 = C::value_regs_get(ctx, v32, 0x0);
-                            let v38 = C::value_regs_get(ctx, v32, 0x1);
-                            let v53 = MultiReg::Three {
-                                a: v48,
-                                b: v37,
-                                c: v38,
-                            };
-                            // Rule at src/prelude_lower.isle line 695.
-                            return v53;
-                        }
-                        _ => {}
-                    }
-                }
-                _ => {}
-            }
-        }
-        &ProducesFlags::ProducesFlagsReturnsReg {
-            inst: ref v40,
-            result: v41,
-        } => {
-            match arg1 {
-                &ConsumesAndProducesFlags::SideEffect { inst: ref v3 } => {
-                    match arg2 {
-                        &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v5 } => {
-                            let v42 = C::emit(ctx, v40);
-                            let v7 = C::emit(ctx, v3);
-                            let v8 = C::emit(ctx, v5);
-                            let v43 = MultiReg::One { a: v41 };
-                            // Rule at src/prelude_lower.isle line 614.
-                            return v43;
-                        }
-                        &ConsumesFlags::ConsumesFlagsSideEffect2 {
-                            inst1: ref v10,
-                            inst2: ref v11,
-                        } => {
-                            let v42 = C::emit(ctx, v40);
-                            let v7 = C::emit(ctx, v3);
-                            let v12 = C::emit(ctx, v10);
-                            let v13 = C::emit(ctx, v11);
-                            let v43 = MultiReg::One { a: v41 };
-                            // Rule at src/prelude_lower.isle line 622.
-                            return v43;
-                        }
-                        &ConsumesFlags::ConsumesFlagsReturnsReg {
-                            inst: ref v14,
-                            result: v15,
-                        } => {
-                            let v42 = C::emit(ctx, v40);
-                            let v7 = C::emit(ctx, v3);
-                            let v16 = C::emit(ctx, v14);
-                            let v44 = MultiReg::Two { a: v41, b: v15 };
-                            // Rule at src/prelude_lower.isle line 631.
-                            return v44;
-                        }
-                        &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
-                            inst1: ref v18,
-                            inst2: ref v19,
-                            result: v20,
-                        } => {
-                            let v42 = C::emit(ctx, v40);
-                            let v7 = C::emit(ctx, v3);
-                            let v21 = C::emit(ctx, v18);
-                            let v22 = C::emit(ctx, v19);
-                            let v24 = C::value_regs_get(ctx, v20, 0x0);
-                            let v26 = C::value_regs_get(ctx, v20, 0x1);
-                            let v45 = MultiReg::Three {
-                                a: v41,
-                                b: v24,
-                                c: v26,
-                            };
-                            // Rule at src/prelude_lower.isle line 639.
-                            return v45;
-                        }
-                        &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
-                            inst1: ref v28,
-                            inst2: ref v29,
-                            inst3: ref v30,
-                            inst4: ref v31,
-                            result: v32,
-                        } => {
-                            let v42 = C::emit(ctx, v40);
-                            let v7 = C::emit(ctx, v3);
-                            let v33 = C::emit(ctx, v28);
-                            let v34 = C::emit(ctx, v29);
-                            let v35 = C::emit(ctx, v30);
-                            let v36 = C::emit(ctx, v31);
-                            let v37 = C::value_regs_get(ctx, v32, 0x0);
-                            let v38 = C::value_regs_get(ctx, v32, 0x1);
-                            let v46 = MultiReg::Three {
-                                a: v41,
-                                b: v37,
-                                c: v38,
-                            };
-                            // Rule at src/prelude_lower.isle line 648.
-                            return v46;
-                        }
-                        _ => {}
-                    }
-                }
-                &ConsumesAndProducesFlags::ReturnsReg {
-                    inst: ref v47,
-                    result: v48,
-                } => {
-                    match arg2 {
-                        &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v5 } => {
-                            let v42 = C::emit(ctx, v40);
-                            let v49 = C::emit(ctx, v47);
-                            let v8 = C::emit(ctx, v5);
-                            let v54 = MultiReg::Two { a: v41, b: v48 };
-                            // Rule at src/prelude_lower.isle line 708.
-                            return v54;
-                        }
-                        &ConsumesFlags::ConsumesFlagsSideEffect2 {
-                            inst1: ref v10,
-                            inst2: ref v11,
-                        } => {
-                            let v42 = C::emit(ctx, v40);
-                            let v49 = C::emit(ctx, v47);
-                            let v12 = C::emit(ctx, v10);
-                            let v13 = C::emit(ctx, v11);
-                            let v54 = MultiReg::Two { a: v41, b: v48 };
-                            // Rule at src/prelude_lower.isle line 716.
-                            return v54;
-                        }
-                        &ConsumesFlags::ConsumesFlagsReturnsReg {
-                            inst: ref v14,
-                            result: v15,
-                        } => {
-                            let v42 = C::emit(ctx, v40);
-                            let v49 = C::emit(ctx, v47);
-                            let v16 = C::emit(ctx, v14);
-                            let v55 = MultiReg::Three {
-                                a: v41,
-                                b: v48,
-                                c: v15,
-                            };
-                            // Rule at src/prelude_lower.isle line 725.
-                            return v55;
-                        }
-                        &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
-                            inst1: ref v18,
-                            inst2: ref v19,
-                            result: v20,
-                        } => {
-                            let v42 = C::emit(ctx, v40);
-                            let v49 = C::emit(ctx, v47);
-                            let v21 = C::emit(ctx, v18);
-                            let v22 = C::emit(ctx, v19);
-                            let v24 = C::value_regs_get(ctx, v20, 0x0);
-                            let v26 = C::value_regs_get(ctx, v20, 0x1);
-                            let v56 = MultiReg::Four {
-                                a: v41,
-                                b: v48,
-                                c: v24,
-                                d: v26,
-                            };
-                            // Rule at src/prelude_lower.isle line 733.
-                            return v56;
-                        }
-                        &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
-                            inst1: ref v28,
-                            inst2: ref v29,
-                            inst3: ref v30,
-                            inst4: ref v31,
-                            result: v32,
-                        } => {
-                            let v42 = C::emit(ctx, v40);
-                            let v49 = C::emit(ctx, v47);
-                            let v33 = C::emit(ctx, v28);
-                            let v34 = C::emit(ctx, v29);
-                            let v35 = C::emit(ctx, v30);
-                            let v36 = C::emit(ctx, v31);
-                            let v37 = C::value_regs_get(ctx, v32, 0x0);
-                            let v38 = C::value_regs_get(ctx, v32, 0x1);
-                            let v57 = MultiReg::Four {
-                                a: v41,
-                                b: v48,
-                                c: v37,
-                                d: v38,
-                            };
-                            // Rule at src/prelude_lower.isle line 742.
-                            return v57;
-                        }
-                        _ => {}
-                    }
-                }
-                _ => {}
-            }
-        }
-        &ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
-            inst: ref v58,
-            result: v59,
-        } => {
-            if let &ConsumesAndProducesFlags::ReturnsReg {
-                inst: ref v47,
-                result: v48,
-            } = arg1
-            {
-                match arg2 {
-                    &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v5 } => {
-                        let v60 = C::emit(ctx, v58);
-                        let v49 = C::emit(ctx, v47);
-                        let v8 = C::emit(ctx, v5);
-                        let v61 = MultiReg::Two { a: v59, b: v48 };
-                        // Rule at src/prelude_lower.isle line 754.
-                        return v61;
-                    }
-                    &ConsumesFlags::ConsumesFlagsSideEffect2 {
-                        inst1: ref v10,
-                        inst2: ref v11,
-                    } => {
-                        let v60 = C::emit(ctx, v58);
-                        let v49 = C::emit(ctx, v47);
-                        let v12 = C::emit(ctx, v10);
-                        let v13 = C::emit(ctx, v11);
-                        let v61 = MultiReg::Two { a: v59, b: v48 };
-                        // Rule at src/prelude_lower.isle line 762.
-                        return v61;
-                    }
-                    &ConsumesFlags::ConsumesFlagsReturnsResultWithProducer {
-                        inst: ref v63,
-                        result: v64,
-                    } => {
-                        let v60 = C::emit(ctx, v58);
-                        let v49 = C::emit(ctx, v47);
-                        let v65 = C::emit(ctx, v63);
-                        let v66 = MultiReg::Three {
-                            a: v59,
-                            b: v48,
-                            c: v64,
-                        };
-                        // Rule at src/prelude_lower.isle line 779.
-                        return v66;
-                    }
-                    &ConsumesFlags::ConsumesFlagsReturnsReg {
-                        inst: ref v14,
-                        result: v15,
-                    } => {
-                        let v60 = C::emit(ctx, v58);
-                        let v49 = C::emit(ctx, v47);
-                        let v16 = C::emit(ctx, v14);
-                        let v62 = MultiReg::Three {
-                            a: v59,
-                            b: v48,
-                            c: v15,
-                        };
-                        // Rule at src/prelude_lower.isle line 771.
-                        return v62;
-                    }
-                    &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
-                        inst1: ref v18,
-                        inst2: ref v19,
-                        result: v20,
-                    } => {
-                        let v60 = C::emit(ctx, v58);
-                        let v49 = C::emit(ctx, v47);
-                        let v21 = C::emit(ctx, v18);
-                        let v22 = C::emit(ctx, v19);
-                        let v24 = C::value_regs_get(ctx, v20, 0x0);
-                        let v26 = C::value_regs_get(ctx, v20, 0x1);
-                        let v67 = MultiReg::Four {
-                            a: v59,
-                            b: v48,
-                            c: v24,
-                            d: v26,
-                        };
-                        // Rule at src/prelude_lower.isle line 787.
-                        return v67;
-                    }
-                    &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
-                        inst1: ref v28,
-                        inst2: ref v29,
-                        inst3: ref v30,
-                        inst4: ref v31,
-                        result: v32,
-                    } => {
-                        let v60 = C::emit(ctx, v58);
-                        let v49 = C::emit(ctx, v47);
-                        let v33 = C::emit(ctx, v28);
-                        let v34 = C::emit(ctx, v29);
-                        let v35 = C::emit(ctx, v30);
-                        let v36 = C::emit(ctx, v31);
-                        let v37 = C::value_regs_get(ctx, v32, 0x0);
-                        let v38 = C::value_regs_get(ctx, v32, 0x1);
-                        let v68 = MultiReg::Four {
-                            a: v59,
-                            b: v48,
-                            c: v37,
-                            d: v38,
-                        };
-                        // Rule at src/prelude_lower.isle line 796.
-                        return v68;
-                    }
-                    _ => {}
-                }
-            }
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "with_flags_chained", "src/prelude_lower.isle line 564"
-    )
-}
-
-// Generated as internal constructor for term lower_return.
-pub fn constructor_lower_return<C: Context>(ctx: &mut C, arg0: ValueSlice) -> InstOutput {
-    let v1 = C::gen_return(ctx, arg0);
-    let v2 = C::output_none(ctx);
-    // Rule at src/prelude_lower.isle line 996.
-    return v2;
-}
-
-// Generated as internal constructor for term put_in_xreg.
-pub fn constructor_put_in_xreg<C: Context>(ctx: &mut C, arg0: Value) -> XReg {
-    let v1 = C::put_in_reg(ctx, arg0);
-    let v2 = C::xreg_new(ctx, v1);
-    // Rule at src/isa/riscv64/inst.isle line 778.
-    return v2;
-}
-
-// Generated as internal constructor for term output_xreg.
-pub fn constructor_output_xreg<C: Context>(ctx: &mut C, arg0: XReg) -> InstOutput {
-    let v1 = C::xreg_to_reg(ctx, arg0);
-    let v2 = constructor_output_reg(ctx, v1);
-    // Rule at src/isa/riscv64/inst.isle line 783.
-    return v2;
-}
-
-// Generated as internal constructor for term writable_xreg_to_reg.
-pub fn constructor_writable_xreg_to_reg<C: Context>(ctx: &mut C, arg0: WritableXReg) -> Reg {
-    let v1 = C::writable_xreg_to_writable_reg(ctx, arg0);
-    let v2 = C::writable_reg_to_reg(ctx, v1);
-    // Rule at src/isa/riscv64/inst.isle line 798.
-    return v2;
-}
-
-// Generated as internal constructor for term xreg_to_value_regs.
-pub fn constructor_xreg_to_value_regs<C: Context>(ctx: &mut C, arg0: XReg) -> ValueRegs {
-    let v1 = C::xreg_to_reg(ctx, arg0);
-    let v2 = C::value_reg(ctx, v1);
-    // Rule at src/isa/riscv64/inst.isle line 808.
-    return v2;
-}
-
-// Generated as internal constructor for term writable_xreg_to_value_regs.
-pub fn constructor_writable_xreg_to_value_regs<C: Context>(
-    ctx: &mut C,
-    arg0: WritableXReg,
-) -> ValueRegs {
-    let v1 = constructor_writable_xreg_to_reg(ctx, arg0);
-    let v2 = C::value_reg(ctx, v1);
-    // Rule at src/isa/riscv64/inst.isle line 813.
-    return v2;
-}
-
-// Generated as internal constructor for term temp_writable_xreg.
-pub fn constructor_temp_writable_xreg<C: Context>(ctx: &mut C) -> WritableXReg {
-    let v1 = C::temp_writable_reg(ctx, I64);
-    let v2 = C::writable_xreg_new(ctx, v1);
-    // Rule at src/isa/riscv64/inst.isle line 818.
-    return v2;
-}
-
-// Generated as internal constructor for term put_in_freg.
-pub fn constructor_put_in_freg<C: Context>(ctx: &mut C, arg0: Value) -> FReg {
-    let v1 = C::put_in_reg(ctx, arg0);
-    let v2 = C::freg_new(ctx, v1);
-    // Rule at src/isa/riscv64/inst.isle line 839.
-    return v2;
-}
-
-// Generated as internal constructor for term output_freg.
-pub fn constructor_output_freg<C: Context>(ctx: &mut C, arg0: FReg) -> InstOutput {
-    let v1 = C::freg_to_reg(ctx, arg0);
-    let v2 = constructor_output_reg(ctx, v1);
-    // Rule at src/isa/riscv64/inst.isle line 844.
-    return v2;
-}
-
-// Generated as internal constructor for term writable_freg_to_reg.
-pub fn constructor_writable_freg_to_reg<C: Context>(ctx: &mut C, arg0: WritableFReg) -> Reg {
-    let v1 = C::writable_freg_to_writable_reg(ctx, arg0);
-    let v2 = C::writable_reg_to_reg(ctx, v1);
-    // Rule at src/isa/riscv64/inst.isle line 859.
-    return v2;
-}
-
-// Generated as internal constructor for term freg_to_value_regs.
-pub fn constructor_freg_to_value_regs<C: Context>(ctx: &mut C, arg0: FReg) -> ValueRegs {
-    let v1 = C::freg_to_reg(ctx, arg0);
-    let v2 = C::value_reg(ctx, v1);
-    // Rule at src/isa/riscv64/inst.isle line 869.
-    return v2;
-}
-
-// Generated as internal constructor for term writable_freg_to_value_regs.
-pub fn constructor_writable_freg_to_value_regs<C: Context>(
-    ctx: &mut C,
-    arg0: WritableFReg,
-) -> ValueRegs {
-    let v1 = constructor_writable_freg_to_reg(ctx, arg0);
-    let v2 = C::value_reg(ctx, v1);
-    // Rule at src/isa/riscv64/inst.isle line 874.
-    return v2;
-}
-
-// Generated as internal constructor for term temp_writable_freg.
-pub fn constructor_temp_writable_freg<C: Context>(ctx: &mut C) -> WritableFReg {
-    let v1 = C::temp_writable_reg(ctx, F64);
-    let v2 = C::writable_freg_new(ctx, v1);
-    // Rule at src/isa/riscv64/inst.isle line 879.
-    return v2;
-}
-
-// Generated as internal constructor for term put_in_vreg.
-pub fn constructor_put_in_vreg<C: Context>(ctx: &mut C, arg0: Value) -> VReg {
-    let v1 = C::put_in_reg(ctx, arg0);
-    let v2 = C::vreg_new(ctx, v1);
-    // Rule at src/isa/riscv64/inst.isle line 901.
-    return v2;
-}
-
-// Generated as internal constructor for term output_vreg.
-pub fn constructor_output_vreg<C: Context>(ctx: &mut C, arg0: VReg) -> InstOutput {
-    let v1 = C::vreg_to_reg(ctx, arg0);
-    let v2 = constructor_output_reg(ctx, v1);
-    // Rule at src/isa/riscv64/inst.isle line 906.
-    return v2;
-}
-
-// Generated as internal constructor for term writable_vreg_to_reg.
-pub fn constructor_writable_vreg_to_reg<C: Context>(ctx: &mut C, arg0: WritableVReg) -> Reg {
-    let v1 = C::writable_vreg_to_writable_reg(ctx, arg0);
-    let v2 = C::writable_reg_to_reg(ctx, v1);
-    // Rule at src/isa/riscv64/inst.isle line 921.
-    return v2;
-}
-
-// Generated as internal constructor for term vreg_to_value_regs.
-pub fn constructor_vreg_to_value_regs<C: Context>(ctx: &mut C, arg0: VReg) -> ValueRegs {
-    let v1 = C::vreg_to_reg(ctx, arg0);
-    let v2 = C::value_reg(ctx, v1);
-    // Rule at src/isa/riscv64/inst.isle line 931.
-    return v2;
-}
-
-// Generated as internal constructor for term writable_vreg_to_value_regs.
-pub fn constructor_writable_vreg_to_value_regs<C: Context>(
-    ctx: &mut C,
-    arg0: WritableVReg,
-) -> ValueRegs {
-    let v1 = constructor_writable_vreg_to_reg(ctx, arg0);
-    let v2 = C::value_reg(ctx, v1);
-    // Rule at src/isa/riscv64/inst.isle line 936.
-    return v2;
-}
-
-// Generated as internal constructor for term temp_writable_vreg.
-pub fn constructor_temp_writable_vreg<C: Context>(ctx: &mut C) -> WritableVReg {
-    let v1 = C::temp_writable_reg(ctx, I8X16);
-    let v2 = C::writable_vreg_new(ctx, v1);
-    // Rule at src/isa/riscv64/inst.isle line 941.
-    return v2;
-}
-
-// Generated as internal constructor for term gen_float_round.
-pub fn constructor_gen_float_round<C: Context>(
-    ctx: &mut C,
-    arg0: &FloatRoundOP,
-    arg1: Reg,
-    arg2: Type,
-) -> Reg {
-    let v3 = C::temp_writable_reg(ctx, arg2);
-    let v4 = constructor_temp_writable_xreg(ctx);
-    let v5 = constructor_temp_writable_freg(ctx);
-    let v6 = C::writable_xreg_to_writable_reg(ctx, v4);
-    let v7 = C::writable_freg_to_writable_reg(ctx, v5);
-    let v8 = MInst::FloatRound {
-        op: arg0.clone(),
-        rd: v3,
-        int_tmp: v6,
-        f_tmp: v7,
-        rs: arg1,
-        ty: arg2,
-    };
-    let v9 = C::emit(ctx, &v8);
-    let v10 = C::writable_reg_to_reg(ctx, v3);
-    // Rule at src/isa/riscv64/inst.isle line 972.
-    return v10;
-}
-
-// Generated as internal constructor for term gen_float_select_pseudo.
-pub fn constructor_gen_float_select_pseudo<C: Context>(
-    ctx: &mut C,
-    arg0: &FloatSelectOP,
-    arg1: Reg,
-    arg2: Reg,
-    arg3: Type,
-) -> Reg {
-    let v4 = C::temp_writable_reg(ctx, arg3);
-    let v5 = constructor_temp_writable_xreg(ctx);
-    let v6 = C::writable_xreg_to_writable_reg(ctx, v5);
-    let v7 = MInst::FloatSelectPseudo {
-        op: arg0.clone(),
-        rd: v4,
-        tmp: v6,
-        rs1: arg1,
-        rs2: arg2,
-        ty: arg3,
-    };
-    let v8 = C::emit(ctx, &v7);
-    let v9 = C::writable_reg_to_reg(ctx, v4);
-    // Rule at src/isa/riscv64/inst.isle line 982.
-    return v9;
-}
-
-// Generated as internal constructor for term gen_float_select.
-pub fn constructor_gen_float_select<C: Context>(
-    ctx: &mut C,
-    arg0: &FloatSelectOP,
-    arg1: Reg,
-    arg2: Reg,
-    arg3: Type,
-) -> Reg {
-    let v4 = C::temp_writable_reg(ctx, arg3);
-    let v5 = constructor_temp_writable_xreg(ctx);
-    let v6 = C::writable_xreg_to_writable_reg(ctx, v5);
-    let v7 = MInst::FloatSelect {
-        op: arg0.clone(),
-        rd: v4,
-        tmp: v6,
-        rs1: arg1,
-        rs2: arg2,
-        ty: arg3,
-    };
-    let v8 = C::emit(ctx, &v7);
-    let v9 = C::writable_reg_to_reg(ctx, v4);
-    // Rule at src/isa/riscv64/inst.isle line 991.
-    return v9;
-}
-
-// Generated as internal constructor for term rv_add.
-pub fn constructor_rv_add<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
-    let v3 = C::xreg_to_reg(ctx, arg0);
-    let v4 = C::xreg_to_reg(ctx, arg1);
-    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Add, v3, v4);
-    let v6 = C::xreg_new(ctx, v5);
-    // Rule at src/isa/riscv64/inst.isle line 1006.
-    return v6;
-}
-
-// Generated as internal constructor for term rv_addi.
-pub fn constructor_rv_addi<C: Context>(ctx: &mut C, arg0: XReg, arg1: Imm12) -> XReg {
-    let v3 = C::xreg_to_reg(ctx, arg0);
-    let v4 = constructor_alu_rr_imm12(ctx, &AluOPRRI::Addi, v3, arg1);
-    let v5 = C::xreg_new(ctx, v4);
-    // Rule at src/isa/riscv64/inst.isle line 1012.
-    return v5;
-}
-
-// Generated as internal constructor for term rv_sub.
-pub fn constructor_rv_sub<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
-    let v3 = C::xreg_to_reg(ctx, arg0);
-    let v4 = C::xreg_to_reg(ctx, arg1);
-    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Sub, v3, v4);
-    let v6 = C::xreg_new(ctx, v5);
-    // Rule at src/isa/riscv64/inst.isle line 1018.
-    return v6;
-}
-
-// Generated as internal constructor for term rv_neg.
-pub fn constructor_rv_neg<C: Context>(ctx: &mut C, arg0: XReg) -> XReg {
-    let v2 = C::zero_reg(ctx);
-    let v3 = C::xreg_to_reg(ctx, arg0);
-    let v4 = constructor_alu_rrr(ctx, &AluOPRRR::Sub, v2, v3);
-    let v5 = C::xreg_new(ctx, v4);
-    // Rule at src/isa/riscv64/inst.isle line 1024.
-    return v5;
-}
-
-// Generated as internal constructor for term rv_sll.
-pub fn constructor_rv_sll<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
-    let v3 = C::xreg_to_reg(ctx, arg0);
-    let v4 = C::xreg_to_reg(ctx, arg1);
-    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Sll, v3, v4);
-    let v6 = C::xreg_new(ctx, v5);
-    // Rule at src/isa/riscv64/inst.isle line 1030.
-    return v6;
-}
-
-// Generated as internal constructor for term rv_slli.
-pub fn constructor_rv_slli<C: Context>(ctx: &mut C, arg0: XReg, arg1: Imm12) -> XReg {
-    let v3 = C::xreg_to_reg(ctx, arg0);
-    let v4 = constructor_alu_rr_imm12(ctx, &AluOPRRI::Slli, v3, arg1);
-    let v5 = C::xreg_new(ctx, v4);
-    // Rule at src/isa/riscv64/inst.isle line 1036.
-    return v5;
-}
-
-// Generated as internal constructor for term rv_srl.
-pub fn constructor_rv_srl<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
-    let v3 = C::xreg_to_reg(ctx, arg0);
-    let v4 = C::xreg_to_reg(ctx, arg1);
-    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Srl, v3, v4);
-    let v6 = C::xreg_new(ctx, v5);
-    // Rule at src/isa/riscv64/inst.isle line 1042.
-    return v6;
-}
-
-// Generated as internal constructor for term rv_srli.
-pub fn constructor_rv_srli<C: Context>(ctx: &mut C, arg0: XReg, arg1: Imm12) -> XReg {
-    let v3 = C::xreg_to_reg(ctx, arg0);
-    let v4 = constructor_alu_rr_imm12(ctx, &AluOPRRI::Srli, v3, arg1);
-    let v5 = C::xreg_new(ctx, v4);
-    // Rule at src/isa/riscv64/inst.isle line 1048.
-    return v5;
-}
-
-// Generated as internal constructor for term rv_sra.
-pub fn constructor_rv_sra<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
-    let v3 = C::xreg_to_reg(ctx, arg0);
-    let v4 = C::xreg_to_reg(ctx, arg1);
-    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Sra, v3, v4);
-    let v6 = C::xreg_new(ctx, v5);
-    // Rule at src/isa/riscv64/inst.isle line 1054.
-    return v6;
-}
-
-// Generated as internal constructor for term rv_srai.
-pub fn constructor_rv_srai<C: Context>(ctx: &mut C, arg0: XReg, arg1: Imm12) -> XReg {
-    let v3 = C::xreg_to_reg(ctx, arg0);
-    let v4 = constructor_alu_rr_imm12(ctx, &AluOPRRI::Srai, v3, arg1);
-    let v5 = C::xreg_new(ctx, v4);
-    // Rule at src/isa/riscv64/inst.isle line 1060.
-    return v5;
-}
-
-// Generated as internal constructor for term rv_or.
-pub fn constructor_rv_or<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
-    let v3 = C::xreg_to_reg(ctx, arg0);
-    let v4 = C::xreg_to_reg(ctx, arg1);
-    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Or, v3, v4);
-    let v6 = C::xreg_new(ctx, v5);
-    // Rule at src/isa/riscv64/inst.isle line 1066.
-    return v6;
-}
-
-// Generated as internal constructor for term rv_ori.
-pub fn constructor_rv_ori<C: Context>(ctx: &mut C, arg0: XReg, arg1: Imm12) -> XReg {
-    let v3 = C::xreg_to_reg(ctx, arg0);
-    let v4 = constructor_alu_rr_imm12(ctx, &AluOPRRI::Ori, v3, arg1);
-    let v5 = C::xreg_new(ctx, v4);
-    // Rule at src/isa/riscv64/inst.isle line 1072.
-    return v5;
-}
-
-// Generated as internal constructor for term rv_xor.
-pub fn constructor_rv_xor<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
-    let v3 = C::xreg_to_reg(ctx, arg0);
-    let v4 = C::xreg_to_reg(ctx, arg1);
-    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Xor, v3, v4);
-    let v6 = C::xreg_new(ctx, v5);
-    // Rule at src/isa/riscv64/inst.isle line 1078.
-    return v6;
-}
-
-// Generated as internal constructor for term rv_xori.
-pub fn constructor_rv_xori<C: Context>(ctx: &mut C, arg0: XReg, arg1: Imm12) -> XReg {
-    let v3 = C::xreg_to_reg(ctx, arg0);
-    let v4 = constructor_alu_rr_imm12(ctx, &AluOPRRI::Xori, v3, arg1);
-    let v5 = C::xreg_new(ctx, v4);
-    // Rule at src/isa/riscv64/inst.isle line 1084.
-    return v5;
-}
-
-// Generated as internal constructor for term rv_not.
-pub fn constructor_rv_not<C: Context>(ctx: &mut C, arg0: XReg) -> XReg {
-    let v2 = C::imm12_const(ctx, -0x1);
-    let v3 = constructor_rv_xori(ctx, arg0, v2);
-    // Rule at src/isa/riscv64/inst.isle line 1090.
-    return v3;
-}
-
-// Generated as internal constructor for term rv_and.
-pub fn constructor_rv_and<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
-    let v3 = C::xreg_to_reg(ctx, arg0);
-    let v4 = C::xreg_to_reg(ctx, arg1);
-    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::And, v3, v4);
-    let v6 = C::xreg_new(ctx, v5);
-    // Rule at src/isa/riscv64/inst.isle line 1096.
-    return v6;
-}
-
-// Generated as internal constructor for term rv_andi.
-pub fn constructor_rv_andi<C: Context>(ctx: &mut C, arg0: XReg, arg1: Imm12) -> XReg {
-    let v3 = C::xreg_to_reg(ctx, arg0);
-    let v4 = constructor_alu_rr_imm12(ctx, &AluOPRRI::Andi, v3, arg1);
-    let v5 = C::xreg_new(ctx, v4);
-    // Rule at src/isa/riscv64/inst.isle line 1102.
-    return v5;
-}
-
-// Generated as internal constructor for term rv_sltu.
-pub fn constructor_rv_sltu<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
-    let v3 = C::xreg_to_reg(ctx, arg0);
-    let v4 = C::xreg_to_reg(ctx, arg1);
-    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::SltU, v3, v4);
-    let v6 = C::xreg_new(ctx, v5);
-    // Rule at src/isa/riscv64/inst.isle line 1108.
-    return v6;
-}
-
-// Generated as internal constructor for term rv_snez.
-pub fn constructor_rv_snez<C: Context>(ctx: &mut C, arg0: XReg) -> XReg {
-    let v1 = C::zero_reg(ctx);
-    let v2 = C::xreg_new(ctx, v1);
-    let v3 = constructor_rv_sltu(ctx, v2, arg0);
-    // Rule at src/isa/riscv64/inst.isle line 1114.
-    return v3;
-}
-
-// Generated as internal constructor for term rv_sltiu.
-pub fn constructor_rv_sltiu<C: Context>(ctx: &mut C, arg0: XReg, arg1: Imm12) -> XReg {
-    let v3 = C::xreg_to_reg(ctx, arg0);
-    let v4 = constructor_alu_rr_imm12(ctx, &AluOPRRI::SltiU, v3, arg1);
-    let v5 = C::xreg_new(ctx, v4);
-    // Rule at src/isa/riscv64/inst.isle line 1120.
-    return v5;
-}
-
-// Generated as internal constructor for term rv_seqz.
-pub fn constructor_rv_seqz<C: Context>(ctx: &mut C, arg0: XReg) -> XReg {
-    let v2 = C::imm12_const(ctx, 0x1);
-    let v3 = constructor_rv_sltiu(ctx, arg0, v2);
-    // Rule at src/isa/riscv64/inst.isle line 1126.
-    return v3;
-}
-
-// Generated as internal constructor for term rv_addw.
-pub fn constructor_rv_addw<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
-    let v3 = C::xreg_to_reg(ctx, arg0);
-    let v4 = C::xreg_to_reg(ctx, arg1);
-    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Addw, v3, v4);
-    let v6 = C::xreg_new(ctx, v5);
-    // Rule at src/isa/riscv64/inst.isle line 1136.
-    return v6;
-}
-
-// Generated as internal constructor for term rv_addiw.
-pub fn constructor_rv_addiw<C: Context>(ctx: &mut C, arg0: XReg, arg1: Imm12) -> XReg {
-    let v3 = C::xreg_to_reg(ctx, arg0);
-    let v4 = constructor_alu_rr_imm12(ctx, &AluOPRRI::Addiw, v3, arg1);
-    let v5 = C::xreg_new(ctx, v4);
-    // Rule at src/isa/riscv64/inst.isle line 1142.
-    return v5;
-}
-
-// Generated as internal constructor for term rv_sextw.
-pub fn constructor_rv_sextw<C: Context>(ctx: &mut C, arg0: XReg) -> XReg {
-    let v2 = C::imm12_const(ctx, 0x0);
-    let v3 = constructor_rv_addiw(ctx, arg0, v2);
-    // Rule at src/isa/riscv64/inst.isle line 1148.
-    return v3;
-}
-
-// Generated as internal constructor for term rv_subw.
-pub fn constructor_rv_subw<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
-    let v3 = C::xreg_to_reg(ctx, arg0);
-    let v4 = C::xreg_to_reg(ctx, arg1);
-    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Subw, v3, v4);
-    let v6 = C::xreg_new(ctx, v5);
-    // Rule at src/isa/riscv64/inst.isle line 1154.
-    return v6;
-}
-
-// Generated as internal constructor for term rv_sllw.
-pub fn constructor_rv_sllw<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
-    let v3 = C::xreg_to_reg(ctx, arg0);
-    let v4 = C::xreg_to_reg(ctx, arg1);
-    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Sllw, v3, v4);
-    let v6 = C::xreg_new(ctx, v5);
-    // Rule at src/isa/riscv64/inst.isle line 1160.
-    return v6;
-}
-
-// Generated as internal constructor for term rv_slliw.
-pub fn constructor_rv_slliw<C: Context>(ctx: &mut C, arg0: XReg, arg1: Imm12) -> XReg {
-    let v3 = C::xreg_to_reg(ctx, arg0);
-    let v4 = constructor_alu_rr_imm12(ctx, &AluOPRRI::Slliw, v3, arg1);
-    let v5 = C::xreg_new(ctx, v4);
-    // Rule at src/isa/riscv64/inst.isle line 1166.
-    return v5;
-}
-
-// Generated as internal constructor for term rv_srlw.
-pub fn constructor_rv_srlw<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
-    let v3 = C::xreg_to_reg(ctx, arg0);
-    let v4 = C::xreg_to_reg(ctx, arg1);
-    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Srlw, v3, v4);
-    let v6 = C::xreg_new(ctx, v5);
-    // Rule at src/isa/riscv64/inst.isle line 1172.
-    return v6;
-}
-
-// Generated as internal constructor for term rv_srliw.
-pub fn constructor_rv_srliw<C: Context>(ctx: &mut C, arg0: XReg, arg1: Imm12) -> XReg {
-    let v3 = C::xreg_to_reg(ctx, arg0);
-    let v4 = constructor_alu_rr_imm12(ctx, &AluOPRRI::SrliW, v3, arg1);
-    let v5 = C::xreg_new(ctx, v4);
-    // Rule at src/isa/riscv64/inst.isle line 1178.
-    return v5;
-}
-
-// Generated as internal constructor for term rv_sraw.
-pub fn constructor_rv_sraw<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
-    let v3 = C::xreg_to_reg(ctx, arg0);
-    let v4 = C::xreg_to_reg(ctx, arg1);
-    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Sraw, v3, v4);
-    let v6 = C::xreg_new(ctx, v5);
-    // Rule at src/isa/riscv64/inst.isle line 1184.
-    return v6;
-}
-
-// Generated as internal constructor for term rv_sraiw.
-pub fn constructor_rv_sraiw<C: Context>(ctx: &mut C, arg0: XReg, arg1: Imm12) -> XReg {
-    let v3 = C::xreg_to_reg(ctx, arg0);
-    let v4 = constructor_alu_rr_imm12(ctx, &AluOPRRI::Sraiw, v3, arg1);
-    let v5 = C::xreg_new(ctx, v4);
-    // Rule at src/isa/riscv64/inst.isle line 1190.
-    return v5;
-}
-
-// Generated as internal constructor for term rv_mul.
-pub fn constructor_rv_mul<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
-    let v3 = C::xreg_to_reg(ctx, arg0);
-    let v4 = C::xreg_to_reg(ctx, arg1);
-    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Mul, v3, v4);
-    let v6 = C::xreg_new(ctx, v5);
-    // Rule at src/isa/riscv64/inst.isle line 1200.
-    return v6;
-}
-
-// Generated as internal constructor for term rv_mulh.
-pub fn constructor_rv_mulh<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
-    let v3 = C::xreg_to_reg(ctx, arg0);
-    let v4 = C::xreg_to_reg(ctx, arg1);
-    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Mulh, v3, v4);
-    let v6 = C::xreg_new(ctx, v5);
-    // Rule at src/isa/riscv64/inst.isle line 1206.
-    return v6;
-}
-
-// Generated as internal constructor for term rv_mulhu.
-pub fn constructor_rv_mulhu<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
-    let v3 = C::xreg_to_reg(ctx, arg0);
-    let v4 = C::xreg_to_reg(ctx, arg1);
-    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Mulhu, v3, v4);
-    let v6 = C::xreg_new(ctx, v5);
-    // Rule at src/isa/riscv64/inst.isle line 1212.
-    return v6;
-}
-
-// Generated as internal constructor for term rv_div.
-pub fn constructor_rv_div<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
-    let v3 = C::xreg_to_reg(ctx, arg0);
-    let v4 = C::xreg_to_reg(ctx, arg1);
-    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Div, v3, v4);
-    let v6 = C::xreg_new(ctx, v5);
-    // Rule at src/isa/riscv64/inst.isle line 1218.
-    return v6;
-}
-
-// Generated as internal constructor for term rv_divu.
-pub fn constructor_rv_divu<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
-    let v3 = C::xreg_to_reg(ctx, arg0);
-    let v4 = C::xreg_to_reg(ctx, arg1);
-    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::DivU, v3, v4);
-    let v6 = C::xreg_new(ctx, v5);
-    // Rule at src/isa/riscv64/inst.isle line 1224.
-    return v6;
-}
-
-// Generated as internal constructor for term rv_rem.
-pub fn constructor_rv_rem<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
-    let v3 = C::xreg_to_reg(ctx, arg0);
-    let v4 = C::xreg_to_reg(ctx, arg1);
-    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Rem, v3, v4);
-    let v6 = C::xreg_new(ctx, v5);
-    // Rule at src/isa/riscv64/inst.isle line 1230.
-    return v6;
-}
-
-// Generated as internal constructor for term rv_remu.
-pub fn constructor_rv_remu<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
-    let v3 = C::xreg_to_reg(ctx, arg0);
-    let v4 = C::xreg_to_reg(ctx, arg1);
-    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::RemU, v3, v4);
-    let v6 = C::xreg_new(ctx, v5);
-    // Rule at src/isa/riscv64/inst.isle line 1236.
-    return v6;
-}
-
-// Generated as internal constructor for term rv_mulw.
-pub fn constructor_rv_mulw<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
-    let v3 = C::xreg_to_reg(ctx, arg0);
-    let v4 = C::xreg_to_reg(ctx, arg1);
-    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Mulw, v3, v4);
-    let v6 = C::xreg_new(ctx, v5);
-    // Rule at src/isa/riscv64/inst.isle line 1247.
-    return v6;
-}
-
-// Generated as internal constructor for term rv_divw.
-pub fn constructor_rv_divw<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
-    let v3 = C::xreg_to_reg(ctx, arg0);
-    let v4 = C::xreg_to_reg(ctx, arg1);
-    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Divw, v3, v4);
-    let v6 = C::xreg_new(ctx, v5);
-    // Rule at src/isa/riscv64/inst.isle line 1253.
-    return v6;
-}
-
-// Generated as internal constructor for term rv_divuw.
-pub fn constructor_rv_divuw<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
-    let v3 = C::xreg_to_reg(ctx, arg0);
-    let v4 = C::xreg_to_reg(ctx, arg1);
-    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Divuw, v3, v4);
-    let v6 = C::xreg_new(ctx, v5);
-    // Rule at src/isa/riscv64/inst.isle line 1259.
-    return v6;
-}
-
-// Generated as internal constructor for term rv_remw.
-pub fn constructor_rv_remw<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
-    let v3 = C::xreg_to_reg(ctx, arg0);
-    let v4 = C::xreg_to_reg(ctx, arg1);
-    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Remw, v3, v4);
-    let v6 = C::xreg_new(ctx, v5);
-    // Rule at src/isa/riscv64/inst.isle line 1265.
-    return v6;
-}
-
-// Generated as internal constructor for term rv_remuw.
-pub fn constructor_rv_remuw<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
-    let v3 = C::xreg_to_reg(ctx, arg0);
-    let v4 = C::xreg_to_reg(ctx, arg1);
-    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Remuw, v3, v4);
-    let v6 = C::xreg_new(ctx, v5);
-    // Rule at src/isa/riscv64/inst.isle line 1271.
-    return v6;
-}
-
-// Generated as internal constructor for term rv_fadd.
-pub fn constructor_rv_fadd<C: Context>(ctx: &mut C, arg0: Type, arg1: FReg, arg2: FReg) -> FReg {
-    match arg0 {
-        F32 => {
-            let v5 = C::freg_to_reg(ctx, arg1);
-            let v6 = C::freg_to_reg(ctx, arg2);
-            let v7 = constructor_fpu_rrr(ctx, &FpuOPRRR::FaddS, F32, v5, v6);
-            let v8 = C::freg_new(ctx, v7);
-            // Rule at src/isa/riscv64/inst.isle line 1280.
-            return v8;
-        }
-        F64 => {
-            let v5 = C::freg_to_reg(ctx, arg1);
-            let v6 = C::freg_to_reg(ctx, arg2);
-            let v11 = constructor_fpu_rrr(ctx, &FpuOPRRR::FaddD, F64, v5, v6);
-            let v12 = C::freg_new(ctx, v11);
-            // Rule at src/isa/riscv64/inst.isle line 1281.
-            return v12;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "rv_fadd", "src/isa/riscv64/inst.isle line 1279"
-    )
-}
-
-// Generated as internal constructor for term rv_fsub.
-pub fn constructor_rv_fsub<C: Context>(ctx: &mut C, arg0: Type, arg1: FReg, arg2: FReg) -> FReg {
-    match arg0 {
-        F32 => {
-            let v5 = C::freg_to_reg(ctx, arg1);
-            let v6 = C::freg_to_reg(ctx, arg2);
-            let v7 = constructor_fpu_rrr(ctx, &FpuOPRRR::FsubS, F32, v5, v6);
-            let v8 = C::freg_new(ctx, v7);
-            // Rule at src/isa/riscv64/inst.isle line 1285.
-            return v8;
-        }
-        F64 => {
-            let v5 = C::freg_to_reg(ctx, arg1);
-            let v6 = C::freg_to_reg(ctx, arg2);
-            let v11 = constructor_fpu_rrr(ctx, &FpuOPRRR::FsubD, F64, v5, v6);
-            let v12 = C::freg_new(ctx, v11);
-            // Rule at src/isa/riscv64/inst.isle line 1286.
-            return v12;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "rv_fsub", "src/isa/riscv64/inst.isle line 1284"
-    )
-}
-
-// Generated as internal constructor for term rv_fmul.
-pub fn constructor_rv_fmul<C: Context>(ctx: &mut C, arg0: Type, arg1: FReg, arg2: FReg) -> FReg {
-    match arg0 {
-        F32 => {
-            let v5 = C::freg_to_reg(ctx, arg1);
-            let v6 = C::freg_to_reg(ctx, arg2);
-            let v7 = constructor_fpu_rrr(ctx, &FpuOPRRR::FmulS, F32, v5, v6);
-            let v8 = C::freg_new(ctx, v7);
-            // Rule at src/isa/riscv64/inst.isle line 1290.
-            return v8;
-        }
-        F64 => {
-            let v5 = C::freg_to_reg(ctx, arg1);
-            let v6 = C::freg_to_reg(ctx, arg2);
-            let v11 = constructor_fpu_rrr(ctx, &FpuOPRRR::FmulD, F64, v5, v6);
-            let v12 = C::freg_new(ctx, v11);
-            // Rule at src/isa/riscv64/inst.isle line 1291.
-            return v12;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "rv_fmul", "src/isa/riscv64/inst.isle line 1289"
-    )
-}
-
-// Generated as internal constructor for term rv_fdiv.
-pub fn constructor_rv_fdiv<C: Context>(ctx: &mut C, arg0: Type, arg1: FReg, arg2: FReg) -> FReg {
-    match arg0 {
-        F32 => {
-            let v5 = C::freg_to_reg(ctx, arg1);
-            let v6 = C::freg_to_reg(ctx, arg2);
-            let v7 = constructor_fpu_rrr(ctx, &FpuOPRRR::FdivS, F32, v5, v6);
-            let v8 = C::freg_new(ctx, v7);
-            // Rule at src/isa/riscv64/inst.isle line 1295.
-            return v8;
-        }
-        F64 => {
-            let v5 = C::freg_to_reg(ctx, arg1);
-            let v6 = C::freg_to_reg(ctx, arg2);
-            let v11 = constructor_fpu_rrr(ctx, &FpuOPRRR::FdivD, F64, v5, v6);
-            let v12 = C::freg_new(ctx, v11);
-            // Rule at src/isa/riscv64/inst.isle line 1296.
-            return v12;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "rv_fdiv", "src/isa/riscv64/inst.isle line 1294"
-    )
-}
-
-// Generated as internal constructor for term rv_fsqrt.
-pub fn constructor_rv_fsqrt<C: Context>(ctx: &mut C, arg0: Type, arg1: FReg) -> FReg {
-    match arg0 {
-        F32 => {
-            let v4 = C::freg_to_reg(ctx, arg1);
-            let v5 = constructor_fpu_rr(ctx, &FpuOPRR::FsqrtS, F32, v4);
-            let v6 = C::freg_new(ctx, v5);
-            // Rule at src/isa/riscv64/inst.isle line 1300.
-            return v6;
-        }
-        F64 => {
-            let v4 = C::freg_to_reg(ctx, arg1);
-            let v9 = constructor_fpu_rr(ctx, &FpuOPRR::FsqrtD, F64, v4);
-            let v10 = C::freg_new(ctx, v9);
-            // Rule at src/isa/riscv64/inst.isle line 1301.
-            return v10;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "rv_fsqrt", "src/isa/riscv64/inst.isle line 1299"
-    )
-}
-
-// Generated as internal constructor for term rv_fmadd.
-pub fn constructor_rv_fmadd<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: FReg,
-    arg2: FReg,
-    arg3: FReg,
-) -> FReg {
-    match arg0 {
-        F32 => {
-            let v6 = C::freg_to_reg(ctx, arg1);
-            let v7 = C::freg_to_reg(ctx, arg2);
-            let v8 = C::freg_to_reg(ctx, arg3);
-            let v9 = constructor_fpu_rrrr(ctx, &FpuOPRRRR::FmaddS, F32, v6, v7, v8);
-            let v10 = C::freg_new(ctx, v9);
-            // Rule at src/isa/riscv64/inst.isle line 1305.
-            return v10;
-        }
-        F64 => {
-            let v6 = C::freg_to_reg(ctx, arg1);
-            let v7 = C::freg_to_reg(ctx, arg2);
-            let v8 = C::freg_to_reg(ctx, arg3);
-            let v13 = constructor_fpu_rrrr(ctx, &FpuOPRRRR::FmaddD, F64, v6, v7, v8);
-            let v14 = C::freg_new(ctx, v13);
-            // Rule at src/isa/riscv64/inst.isle line 1306.
-            return v14;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "rv_fmadd", "src/isa/riscv64/inst.isle line 1304"
-    )
-}
-
-// Generated as internal constructor for term rv_fmvxw.
-pub fn constructor_rv_fmvxw<C: Context>(ctx: &mut C, arg0: FReg) -> XReg {
-    let v3 = C::freg_to_reg(ctx, arg0);
-    let v4 = constructor_fpu_rr(ctx, &FpuOPRR::FmvXW, I32, v3);
-    let v5 = C::xreg_new(ctx, v4);
-    // Rule at src/isa/riscv64/inst.isle line 1310.
-    return v5;
-}
-
-// Generated as internal constructor for term rv_fmvxd.
-pub fn constructor_rv_fmvxd<C: Context>(ctx: &mut C, arg0: FReg) -> XReg {
-    let v3 = C::freg_to_reg(ctx, arg0);
-    let v4 = constructor_fpu_rr(ctx, &FpuOPRR::FmvXD, I64, v3);
-    let v5 = C::xreg_new(ctx, v4);
-    // Rule at src/isa/riscv64/inst.isle line 1314.
-    return v5;
-}
-
-// Generated as internal constructor for term rv_fmvwx.
-pub fn constructor_rv_fmvwx<C: Context>(ctx: &mut C, arg0: XReg) -> FReg {
-    let v3 = C::xreg_to_reg(ctx, arg0);
-    let v4 = constructor_fpu_rr(ctx, &FpuOPRR::FmvWX, F32, v3);
-    let v5 = C::freg_new(ctx, v4);
-    // Rule at src/isa/riscv64/inst.isle line 1318.
-    return v5;
-}
-
-// Generated as internal constructor for term rv_fmvdx.
-pub fn constructor_rv_fmvdx<C: Context>(ctx: &mut C, arg0: XReg) -> FReg {
-    let v3 = C::xreg_to_reg(ctx, arg0);
-    let v4 = constructor_fpu_rr(ctx, &FpuOPRR::FmvDX, F64, v3);
-    let v5 = C::freg_new(ctx, v4);
-    // Rule at src/isa/riscv64/inst.isle line 1322.
-    return v5;
-}
-
-// Generated as internal constructor for term rv_fcvtds.
-pub fn constructor_rv_fcvtds<C: Context>(ctx: &mut C, arg0: FReg) -> FReg {
-    let v3 = C::freg_to_reg(ctx, arg0);
-    let v4 = constructor_fpu_rr(ctx, &FpuOPRR::FcvtDS, F32, v3);
-    let v5 = C::freg_new(ctx, v4);
-    // Rule at src/isa/riscv64/inst.isle line 1326.
-    return v5;
-}
-
-// Generated as internal constructor for term rv_fcvtsd.
-pub fn constructor_rv_fcvtsd<C: Context>(ctx: &mut C, arg0: FReg) -> FReg {
-    let v3 = C::freg_to_reg(ctx, arg0);
-    let v4 = constructor_fpu_rr(ctx, &FpuOPRR::FcvtSD, F64, v3);
-    let v5 = C::freg_new(ctx, v4);
-    // Rule at src/isa/riscv64/inst.isle line 1330.
-    return v5;
-}
-
-// Generated as internal constructor for term rv_fsgnj.
-pub fn constructor_rv_fsgnj<C: Context>(ctx: &mut C, arg0: Type, arg1: FReg, arg2: FReg) -> FReg {
-    match arg0 {
-        F32 => {
-            let v5 = C::freg_to_reg(ctx, arg1);
-            let v6 = C::freg_to_reg(ctx, arg2);
-            let v7 = constructor_fpu_rrr(ctx, &FpuOPRRR::FsgnjS, F32, v5, v6);
-            let v8 = C::freg_new(ctx, v7);
-            // Rule at src/isa/riscv64/inst.isle line 1336.
-            return v8;
-        }
-        F64 => {
-            let v5 = C::freg_to_reg(ctx, arg1);
-            let v6 = C::freg_to_reg(ctx, arg2);
-            let v11 = constructor_fpu_rrr(ctx, &FpuOPRRR::FsgnjD, F64, v5, v6);
-            let v12 = C::freg_new(ctx, v11);
-            // Rule at src/isa/riscv64/inst.isle line 1337.
-            return v12;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "rv_fsgnj", "src/isa/riscv64/inst.isle line 1335"
-    )
-}
-
-// Generated as internal constructor for term rv_fsgnjn.
-pub fn constructor_rv_fsgnjn<C: Context>(ctx: &mut C, arg0: Type, arg1: FReg, arg2: FReg) -> FReg {
-    match arg0 {
-        F32 => {
-            let v5 = C::freg_to_reg(ctx, arg1);
-            let v6 = C::freg_to_reg(ctx, arg2);
-            let v7 = constructor_fpu_rrr(ctx, &FpuOPRRR::FsgnjnS, F32, v5, v6);
-            let v8 = C::freg_new(ctx, v7);
-            // Rule at src/isa/riscv64/inst.isle line 1343.
-            return v8;
-        }
-        F64 => {
-            let v5 = C::freg_to_reg(ctx, arg1);
-            let v6 = C::freg_to_reg(ctx, arg2);
-            let v11 = constructor_fpu_rrr(ctx, &FpuOPRRR::FsgnjnD, F64, v5, v6);
-            let v12 = C::freg_new(ctx, v11);
-            // Rule at src/isa/riscv64/inst.isle line 1344.
-            return v12;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "rv_fsgnjn", "src/isa/riscv64/inst.isle line 1342"
-    )
-}
-
-// Generated as internal constructor for term rv_fneg.
-pub fn constructor_rv_fneg<C: Context>(ctx: &mut C, arg0: Type, arg1: FReg) -> FReg {
-    let v2 = constructor_rv_fsgnjn(ctx, arg0, arg1, arg1);
-    // Rule at src/isa/riscv64/inst.isle line 1349.
-    return v2;
-}
-
-// Generated as internal constructor for term rv_fsgnjx.
-pub fn constructor_rv_fsgnjx<C: Context>(ctx: &mut C, arg0: Type, arg1: FReg, arg2: FReg) -> FReg {
-    match arg0 {
-        F32 => {
-            let v5 = C::freg_to_reg(ctx, arg1);
-            let v6 = C::freg_to_reg(ctx, arg2);
-            let v7 = constructor_fpu_rrr(ctx, &FpuOPRRR::FsgnjxS, F32, v5, v6);
-            let v8 = C::freg_new(ctx, v7);
-            // Rule at src/isa/riscv64/inst.isle line 1355.
-            return v8;
-        }
-        F64 => {
-            let v5 = C::freg_to_reg(ctx, arg1);
-            let v6 = C::freg_to_reg(ctx, arg2);
-            let v11 = constructor_fpu_rrr(ctx, &FpuOPRRR::FsgnjxD, F64, v5, v6);
-            let v12 = C::freg_new(ctx, v11);
-            // Rule at src/isa/riscv64/inst.isle line 1356.
-            return v12;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "rv_fsgnjx", "src/isa/riscv64/inst.isle line 1354"
-    )
-}
-
-// Generated as internal constructor for term rv_fabs.
-pub fn constructor_rv_fabs<C: Context>(ctx: &mut C, arg0: Type, arg1: FReg) -> FReg {
-    let v2 = constructor_rv_fsgnjx(ctx, arg0, arg1, arg1);
-    // Rule at src/isa/riscv64/inst.isle line 1361.
-    return v2;
-}
-
-// Generated as internal constructor for term rv_feq.
-pub fn constructor_rv_feq<C: Context>(ctx: &mut C, arg0: Type, arg1: FReg, arg2: FReg) -> XReg {
-    match arg0 {
-        F32 => {
-            let v5 = C::freg_to_reg(ctx, arg1);
-            let v6 = C::freg_to_reg(ctx, arg2);
-            let v7 = constructor_fpu_rrr(ctx, &FpuOPRRR::FeqS, I64, v5, v6);
-            let v8 = C::xreg_new(ctx, v7);
-            // Rule at src/isa/riscv64/inst.isle line 1365.
-            return v8;
-        }
-        F64 => {
-            let v5 = C::freg_to_reg(ctx, arg1);
-            let v6 = C::freg_to_reg(ctx, arg2);
-            let v10 = constructor_fpu_rrr(ctx, &FpuOPRRR::FeqD, I64, v5, v6);
-            let v11 = C::xreg_new(ctx, v10);
-            // Rule at src/isa/riscv64/inst.isle line 1366.
-            return v11;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "rv_feq", "src/isa/riscv64/inst.isle line 1364"
-    )
-}
-
-// Generated as internal constructor for term rv_flt.
-pub fn constructor_rv_flt<C: Context>(ctx: &mut C, arg0: Type, arg1: FReg, arg2: FReg) -> XReg {
-    match arg0 {
-        F32 => {
-            let v5 = C::freg_to_reg(ctx, arg1);
-            let v6 = C::freg_to_reg(ctx, arg2);
-            let v7 = constructor_fpu_rrr(ctx, &FpuOPRRR::FltS, I64, v5, v6);
-            let v8 = C::xreg_new(ctx, v7);
-            // Rule at src/isa/riscv64/inst.isle line 1370.
-            return v8;
-        }
-        F64 => {
-            let v5 = C::freg_to_reg(ctx, arg1);
-            let v6 = C::freg_to_reg(ctx, arg2);
-            let v10 = constructor_fpu_rrr(ctx, &FpuOPRRR::FltD, I64, v5, v6);
-            let v11 = C::xreg_new(ctx, v10);
-            // Rule at src/isa/riscv64/inst.isle line 1371.
-            return v11;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "rv_flt", "src/isa/riscv64/inst.isle line 1369"
-    )
-}
-
-// Generated as internal constructor for term rv_fle.
-pub fn constructor_rv_fle<C: Context>(ctx: &mut C, arg0: Type, arg1: FReg, arg2: FReg) -> XReg {
-    match arg0 {
-        F32 => {
-            let v5 = C::freg_to_reg(ctx, arg1);
-            let v6 = C::freg_to_reg(ctx, arg2);
-            let v7 = constructor_fpu_rrr(ctx, &FpuOPRRR::FleS, I64, v5, v6);
-            let v8 = C::xreg_new(ctx, v7);
-            // Rule at src/isa/riscv64/inst.isle line 1375.
-            return v8;
-        }
-        F64 => {
-            let v5 = C::freg_to_reg(ctx, arg1);
-            let v6 = C::freg_to_reg(ctx, arg2);
-            let v10 = constructor_fpu_rrr(ctx, &FpuOPRRR::FleD, I64, v5, v6);
-            let v11 = C::xreg_new(ctx, v10);
-            // Rule at src/isa/riscv64/inst.isle line 1376.
-            return v11;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "rv_fle", "src/isa/riscv64/inst.isle line 1374"
-    )
-}
-
-// Generated as internal constructor for term rv_fgt.
-pub fn constructor_rv_fgt<C: Context>(ctx: &mut C, arg0: Type, arg1: FReg, arg2: FReg) -> XReg {
-    let v3 = constructor_rv_flt(ctx, arg0, arg2, arg1);
-    // Rule at src/isa/riscv64/inst.isle line 1381.
-    return v3;
-}
-
-// Generated as internal constructor for term rv_fge.
-pub fn constructor_rv_fge<C: Context>(ctx: &mut C, arg0: Type, arg1: FReg, arg2: FReg) -> XReg {
-    let v3 = constructor_rv_fle(ctx, arg0, arg2, arg1);
-    // Rule at src/isa/riscv64/inst.isle line 1386.
-    return v3;
-}
-
-// Generated as internal constructor for term rv_adduw.
-pub fn constructor_rv_adduw<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
-    let v3 = C::xreg_to_reg(ctx, arg0);
-    let v4 = C::xreg_to_reg(ctx, arg1);
-    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Adduw, v3, v4);
-    let v6 = C::xreg_new(ctx, v5);
-    // Rule at src/isa/riscv64/inst.isle line 1394.
-    return v6;
-}
-
-// Generated as internal constructor for term rv_zextw.
-pub fn constructor_rv_zextw<C: Context>(ctx: &mut C, arg0: XReg) -> XReg {
-    let v1 = C::zero_reg(ctx);
-    let v2 = C::xreg_new(ctx, v1);
-    let v3 = constructor_rv_adduw(ctx, arg0, v2);
-    // Rule at src/isa/riscv64/inst.isle line 1401.
-    return v3;
-}
-
-// Generated as internal constructor for term rv_slliuw.
-pub fn constructor_rv_slliuw<C: Context>(ctx: &mut C, arg0: XReg, arg1: Imm12) -> XReg {
-    let v3 = C::xreg_to_reg(ctx, arg0);
-    let v4 = constructor_alu_rr_imm12(ctx, &AluOPRRI::SlliUw, v3, arg1);
-    let v5 = C::xreg_new(ctx, v4);
-    // Rule at src/isa/riscv64/inst.isle line 1407.
-    return v5;
-}
-
-// Generated as internal constructor for term rv_andn.
-pub fn constructor_rv_andn<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
-    let v3 = C::xreg_to_reg(ctx, arg0);
-    let v4 = C::xreg_to_reg(ctx, arg1);
-    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Andn, v3, v4);
-    let v6 = C::xreg_new(ctx, v5);
-    // Rule at src/isa/riscv64/inst.isle line 1416.
-    return v6;
-}
-
-// Generated as internal constructor for term rv_orn.
-pub fn constructor_rv_orn<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
-    let v3 = C::xreg_to_reg(ctx, arg0);
-    let v4 = C::xreg_to_reg(ctx, arg1);
-    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Orn, v3, v4);
-    let v6 = C::xreg_new(ctx, v5);
-    // Rule at src/isa/riscv64/inst.isle line 1422.
-    return v6;
-}
-
-// Generated as internal constructor for term rv_clz.
-pub fn constructor_rv_clz<C: Context>(ctx: &mut C, arg0: XReg) -> XReg {
-    let v2 = C::xreg_to_reg(ctx, arg0);
-    let v3 = constructor_alu_rr_funct12(ctx, &AluOPRRI::Clz, v2);
-    let v4 = C::xreg_new(ctx, v3);
-    // Rule at src/isa/riscv64/inst.isle line 1427.
-    return v4;
-}
-
-// Generated as internal constructor for term rv_clzw.
-pub fn constructor_rv_clzw<C: Context>(ctx: &mut C, arg0: XReg) -> XReg {
-    let v2 = C::xreg_to_reg(ctx, arg0);
-    let v3 = constructor_alu_rr_funct12(ctx, &AluOPRRI::Clzw, v2);
-    let v4 = C::xreg_new(ctx, v3);
-    // Rule at src/isa/riscv64/inst.isle line 1432.
-    return v4;
-}
-
-// Generated as internal constructor for term rv_ctz.
-pub fn constructor_rv_ctz<C: Context>(ctx: &mut C, arg0: XReg) -> XReg {
-    let v2 = C::xreg_to_reg(ctx, arg0);
-    let v3 = constructor_alu_rr_funct12(ctx, &AluOPRRI::Ctz, v2);
-    let v4 = C::xreg_new(ctx, v3);
-    // Rule at src/isa/riscv64/inst.isle line 1437.
-    return v4;
-}
-
-// Generated as internal constructor for term rv_ctzw.
-pub fn constructor_rv_ctzw<C: Context>(ctx: &mut C, arg0: XReg) -> XReg {
-    let v2 = C::xreg_to_reg(ctx, arg0);
-    let v3 = constructor_alu_rr_funct12(ctx, &AluOPRRI::Ctzw, v2);
-    let v4 = C::xreg_new(ctx, v3);
-    // Rule at src/isa/riscv64/inst.isle line 1442.
-    return v4;
-}
-
-// Generated as internal constructor for term rv_cpop.
-pub fn constructor_rv_cpop<C: Context>(ctx: &mut C, arg0: XReg) -> XReg {
-    let v2 = C::xreg_to_reg(ctx, arg0);
-    let v3 = constructor_alu_rr_funct12(ctx, &AluOPRRI::Cpop, v2);
-    let v4 = C::xreg_new(ctx, v3);
-    // Rule at src/isa/riscv64/inst.isle line 1447.
-    return v4;
-}
-
-// Generated as internal constructor for term rv_max.
-pub fn constructor_rv_max<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
-    let v3 = C::xreg_to_reg(ctx, arg0);
-    let v4 = C::xreg_to_reg(ctx, arg1);
-    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Max, v3, v4);
-    let v6 = C::xreg_new(ctx, v5);
-    // Rule at src/isa/riscv64/inst.isle line 1452.
-    return v6;
-}
-
-// Generated as internal constructor for term rv_sextb.
-pub fn constructor_rv_sextb<C: Context>(ctx: &mut C, arg0: XReg) -> XReg {
-    let v2 = C::xreg_to_reg(ctx, arg0);
-    let v4 = C::imm12_const(ctx, 0x0);
-    let v5 = constructor_alu_rr_imm12(ctx, &AluOPRRI::Sextb, v2, v4);
-    let v6 = C::xreg_new(ctx, v5);
-    // Rule at src/isa/riscv64/inst.isle line 1457.
-    return v6;
-}
-
-// Generated as internal constructor for term rv_sexth.
-pub fn constructor_rv_sexth<C: Context>(ctx: &mut C, arg0: XReg) -> XReg {
-    let v2 = C::xreg_to_reg(ctx, arg0);
-    let v4 = C::imm12_const(ctx, 0x0);
-    let v5 = constructor_alu_rr_imm12(ctx, &AluOPRRI::Sexth, v2, v4);
-    let v6 = C::xreg_new(ctx, v5);
-    // Rule at src/isa/riscv64/inst.isle line 1462.
-    return v6;
-}
-
-// Generated as internal constructor for term rv_zexth.
-pub fn constructor_rv_zexth<C: Context>(ctx: &mut C, arg0: XReg) -> XReg {
-    let v2 = C::xreg_to_reg(ctx, arg0);
-    let v4 = C::imm12_const(ctx, 0x0);
-    let v5 = constructor_alu_rr_imm12(ctx, &AluOPRRI::Zexth, v2, v4);
-    let v6 = C::xreg_new(ctx, v5);
-    // Rule at src/isa/riscv64/inst.isle line 1467.
-    return v6;
-}
-
-// Generated as internal constructor for term rv_rol.
-pub fn constructor_rv_rol<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
-    let v3 = C::xreg_to_reg(ctx, arg0);
-    let v4 = C::xreg_to_reg(ctx, arg1);
-    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Rol, v3, v4);
-    let v6 = C::xreg_new(ctx, v5);
-    // Rule at src/isa/riscv64/inst.isle line 1472.
-    return v6;
-}
-
-// Generated as internal constructor for term rv_rolw.
-pub fn constructor_rv_rolw<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
-    let v3 = C::xreg_to_reg(ctx, arg0);
-    let v4 = C::xreg_to_reg(ctx, arg1);
-    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Rolw, v3, v4);
-    let v6 = C::xreg_new(ctx, v5);
-    // Rule at src/isa/riscv64/inst.isle line 1477.
-    return v6;
-}
-
-// Generated as internal constructor for term rv_ror.
-pub fn constructor_rv_ror<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
-    let v3 = C::xreg_to_reg(ctx, arg0);
-    let v4 = C::xreg_to_reg(ctx, arg1);
-    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Ror, v3, v4);
-    let v6 = C::xreg_new(ctx, v5);
-    // Rule at src/isa/riscv64/inst.isle line 1482.
-    return v6;
-}
-
-// Generated as internal constructor for term rv_rorw.
-pub fn constructor_rv_rorw<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
-    let v3 = C::xreg_to_reg(ctx, arg0);
-    let v4 = C::xreg_to_reg(ctx, arg1);
-    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Rorw, v3, v4);
-    let v6 = C::xreg_new(ctx, v5);
-    // Rule at src/isa/riscv64/inst.isle line 1487.
-    return v6;
-}
-
-// Generated as internal constructor for term rv_rev8.
-pub fn constructor_rv_rev8<C: Context>(ctx: &mut C, arg0: XReg) -> XReg {
-    let v2 = C::xreg_to_reg(ctx, arg0);
-    let v3 = constructor_alu_rr_funct12(ctx, &AluOPRRI::Rev8, v2);
-    let v4 = C::xreg_new(ctx, v3);
-    // Rule at src/isa/riscv64/inst.isle line 1492.
-    return v4;
-}
-
-// Generated as internal constructor for term rv_brev8.
-pub fn constructor_rv_brev8<C: Context>(ctx: &mut C, arg0: XReg) -> XReg {
-    let v2 = C::xreg_to_reg(ctx, arg0);
-    let v3 = constructor_alu_rr_funct12(ctx, &AluOPRRI::Brev8, v2);
-    let v4 = C::xreg_new(ctx, v3);
-    // Rule at src/isa/riscv64/inst.isle line 1500.
-    return v4;
-}
-
-// Generated as internal constructor for term rv_bseti.
-pub fn constructor_rv_bseti<C: Context>(ctx: &mut C, arg0: XReg, arg1: Imm12) -> XReg {
-    let v3 = C::xreg_to_reg(ctx, arg0);
-    let v4 = constructor_alu_rr_imm12(ctx, &AluOPRRI::Bseti, v3, arg1);
-    let v5 = C::xreg_new(ctx, v4);
-    // Rule at src/isa/riscv64/inst.isle line 1505.
-    return v5;
-}
-
-// Generated as internal constructor for term rv_pack.
-pub fn constructor_rv_pack<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
-    let v3 = C::xreg_to_reg(ctx, arg0);
-    let v4 = C::xreg_to_reg(ctx, arg1);
-    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Pack, v3, v4);
-    let v6 = C::xreg_new(ctx, v5);
-    // Rule at src/isa/riscv64/inst.isle line 1513.
-    return v6;
-}
-
-// Generated as internal constructor for term rv_packw.
-pub fn constructor_rv_packw<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg) -> XReg {
-    let v3 = C::xreg_to_reg(ctx, arg0);
-    let v4 = C::xreg_to_reg(ctx, arg1);
-    let v5 = constructor_alu_rrr(ctx, &AluOPRRR::Packw, v3, v4);
-    let v6 = C::xreg_new(ctx, v5);
-    // Rule at src/isa/riscv64/inst.isle line 1518.
-    return v6;
-}
-
-// Generated as internal constructor for term shift_mask.
-pub fn constructor_shift_mask<C: Context>(ctx: &mut C, arg0: Type) -> u64 {
-    let v1 = C::lane_type(ctx, arg0);
-    let v2 = C::ty_bits(ctx, v1);
-    let v3 = C::u8_as_u64(ctx, v2);
-    let v5 = C::u64_sub(ctx, v3, 0x1);
-    // Rule at src/isa/riscv64/inst.isle line 1526.
-    return v5;
-}
-
-// Generated as internal constructor for term imm12_zero.
-pub fn constructor_imm12_zero<C: Context>(ctx: &mut C) -> Imm12 {
-    let v1 = C::imm12_const(ctx, 0x0);
-    // Rule at src/isa/riscv64/inst.isle line 1536.
-    return v1;
-}
-
-// Generated as internal constructor for term load_imm12.
-pub fn constructor_load_imm12<C: Context>(ctx: &mut C, arg0: i32) -> Reg {
-    let v1 = C::zero_reg(ctx);
-    let v2 = C::xreg_new(ctx, v1);
-    let v3 = C::imm12_const(ctx, arg0);
-    let v4 = constructor_rv_addi(ctx, v2, v3);
-    let v5 = C::xreg_to_reg(ctx, v4);
-    // Rule at src/isa/riscv64/inst.isle line 1544.
-    return v5;
-}
-
-// Generated as internal constructor for term u64_to_imm12.
-pub fn constructor_u64_to_imm12<C: Context>(ctx: &mut C, arg0: u64) -> Option<Imm12> {
-    let v1 = C::imm12_from_u64(ctx, arg0);
-    if let Some(v2) = v1 {
-        // Rule at src/isa/riscv64/inst.isle line 1576.
-        return Some(v2);
-    }
-    None
-}
-
-// Generated as internal constructor for term u64_to_uimm5.
-pub fn constructor_u64_to_uimm5<C: Context>(ctx: &mut C, arg0: u64) -> Option<UImm5> {
-    let v1 = C::uimm5_from_u64(ctx, arg0);
-    if let Some(v2) = v1 {
-        // Rule at src/isa/riscv64/inst.isle line 1617.
-        return Some(v2);
-    }
-    None
-}
-
-// Generated as internal constructor for term canonical_nan_u64.
-pub fn constructor_canonical_nan_u64<C: Context>(ctx: &mut C, arg0: Type) -> u64 {
-    match arg0 {
-        F32 => {
-            // Rule at src/isa/riscv64/inst.isle line 1626.
-            return 0x7FC00000;
-        }
-        F64 => {
-            // Rule at src/isa/riscv64/inst.isle line 1627.
-            return 0x7FF8000000000000;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "canonical_nan_u64", "src/isa/riscv64/inst.isle line 1625"
-    )
-}
-
-// Generated as internal constructor for term fpu_rr.
-pub fn constructor_fpu_rr<C: Context>(ctx: &mut C, arg0: &FpuOPRR, arg1: Type, arg2: Reg) -> Reg {
-    let v3 = C::temp_writable_reg(ctx, arg1);
-    let v4 = C::gen_default_frm(ctx);
-    let v5 = MInst::FpuRR {
-        alu_op: arg0.clone(),
-        frm: v4,
-        rd: v3,
-        rs: arg2,
-    };
-    let v6 = C::emit(ctx, &v5);
-    let v7 = C::writable_reg_to_reg(ctx, v3);
-    // Rule at src/isa/riscv64/inst.isle line 1634.
-    return v7;
-}
-
-// Generated as internal constructor for term alu_rrr.
-pub fn constructor_alu_rrr<C: Context>(ctx: &mut C, arg0: &AluOPRRR, arg1: Reg, arg2: Reg) -> Reg {
-    let v3 = constructor_temp_writable_xreg(ctx);
-    let v4 = C::writable_xreg_to_writable_reg(ctx, v3);
-    let v5 = MInst::AluRRR {
-        alu_op: arg0.clone(),
-        rd: v4,
-        rs1: arg1,
-        rs2: arg2,
-    };
-    let v6 = C::emit(ctx, &v5);
-    let v7 = constructor_writable_xreg_to_reg(ctx, v3);
-    // Rule at src/isa/riscv64/inst.isle line 1641.
-    return v7;
-}
-
-// Generated as internal constructor for term fpu_rrr.
-pub fn constructor_fpu_rrr<C: Context>(
-    ctx: &mut C,
-    arg0: &FpuOPRRR,
-    arg1: Type,
-    arg2: Reg,
-    arg3: Reg,
-) -> Reg {
-    let v4 = C::temp_writable_reg(ctx, arg1);
-    let v5 = C::gen_default_frm(ctx);
-    let v6 = MInst::FpuRRR {
-        alu_op: arg0.clone(),
-        frm: v5,
-        rd: v4,
-        rs1: arg2,
-        rs2: arg3,
-    };
-    let v7 = C::emit(ctx, &v6);
-    let v8 = C::writable_reg_to_reg(ctx, v4);
-    // Rule at src/isa/riscv64/inst.isle line 1652.
-    return v8;
-}
-
-// Generated as internal constructor for term fpu_rrrr.
-pub fn constructor_fpu_rrrr<C: Context>(
-    ctx: &mut C,
-    arg0: &FpuOPRRRR,
-    arg1: Type,
-    arg2: Reg,
-    arg3: Reg,
-    arg4: Reg,
-) -> Reg {
-    let v5 = C::temp_writable_reg(ctx, arg1);
-    let v6 = C::gen_default_frm(ctx);
-    let v7 = MInst::FpuRRRR {
-        alu_op: arg0.clone(),
-        frm: v6,
-        rd: v5,
-        rs1: arg2,
-        rs2: arg3,
-        rs3: arg4,
-    };
-    let v8 = C::emit(ctx, &v7);
-    let v9 = C::writable_reg_to_reg(ctx, v5);
-    // Rule at src/isa/riscv64/inst.isle line 1660.
-    return v9;
-}
-
-// Generated as internal constructor for term alu_rr_imm12.
-pub fn constructor_alu_rr_imm12<C: Context>(
-    ctx: &mut C,
-    arg0: &AluOPRRI,
-    arg1: Reg,
-    arg2: Imm12,
-) -> Reg {
-    let v3 = constructor_temp_writable_xreg(ctx);
-    let v4 = C::writable_xreg_to_writable_reg(ctx, v3);
-    let v5 = MInst::AluRRImm12 {
-        alu_op: arg0.clone(),
-        rd: v4,
-        rs: arg1,
-        imm12: arg2,
-    };
-    let v6 = C::emit(ctx, &v5);
-    let v7 = constructor_writable_xreg_to_reg(ctx, v3);
-    // Rule at src/isa/riscv64/inst.isle line 1668.
-    return v7;
-}
-
-// Generated as internal constructor for term alu_rr_funct12.
-pub fn constructor_alu_rr_funct12<C: Context>(ctx: &mut C, arg0: &AluOPRRI, arg1: Reg) -> Reg {
-    let v2 = constructor_temp_writable_xreg(ctx);
-    let v3 = C::writable_xreg_to_writable_reg(ctx, v2);
-    let v4 = constructor_imm12_zero(ctx);
-    let v5 = MInst::AluRRImm12 {
-        alu_op: arg0.clone(),
-        rd: v3,
-        rs: arg1,
-        imm12: v4,
-    };
-    let v6 = C::emit(ctx, &v5);
-    let v7 = constructor_writable_xreg_to_reg(ctx, v2);
-    // Rule at src/isa/riscv64/inst.isle line 1676.
-    return v7;
-}
-
-// Generated as internal constructor for term select_addi.
-pub fn constructor_select_addi<C: Context>(ctx: &mut C, arg0: Type) -> AluOPRRI {
-    let v1 = C::fits_in_32(ctx, arg0);
-    if let Some(v2) = v1 {
-        // Rule at src/isa/riscv64/inst.isle line 1682.
-        return AluOPRRI::Addiw;
-    }
-    let v4 = C::fits_in_64(ctx, arg0);
-    if let Some(v5) = v4 {
-        // Rule at src/isa/riscv64/inst.isle line 1683.
-        return AluOPRRI::Addi;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "select_addi", "src/isa/riscv64/inst.isle line 1681"
-    )
-}
-
-// Generated as internal constructor for term gen_bnot.
-pub fn constructor_gen_bnot<C: Context>(ctx: &mut C, arg0: Type, arg1: ValueRegs) -> ValueRegs {
-    let v1 = C::ty_scalar_float(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v5 = C::value_regs_get(ctx, arg1, 0x0);
-        let v6 = C::freg_new(ctx, v5);
-        let v7 = constructor_move_f_to_x(ctx, v6, v2);
-        let v8 = constructor_rv_not(ctx, v7);
-        let v9 = constructor_float_int_of_same_size(ctx, v2);
-        let v10 = constructor_move_x_to_f(ctx, v8, v9);
-        let v11 = C::freg_to_reg(ctx, v10);
-        let v12 = C::value_reg(ctx, v11);
-        // Rule at src/isa/riscv64/inst.isle line 1687.
-        return v12;
-    }
-    if arg0 == I128 {
-        let v5 = C::value_regs_get(ctx, arg1, 0x0);
-        let v13 = C::xreg_new(ctx, v5);
-        let v14 = constructor_rv_not(ctx, v13);
-        let v16 = C::value_regs_get(ctx, arg1, 0x1);
-        let v17 = C::xreg_new(ctx, v16);
-        let v18 = constructor_rv_not(ctx, v17);
-        let v19 = C::xreg_to_reg(ctx, v14);
-        let v20 = C::xreg_to_reg(ctx, v18);
-        let v21 = C::value_regs(ctx, v19, v20);
-        // Rule at src/isa/riscv64/inst.isle line 1694.
-        return v21;
-    }
-    let v22 = C::ty_int_ref_scalar_64_extract(ctx, arg0);
-    if let Some(v23) = v22 {
-        let v5 = C::value_regs_get(ctx, arg1, 0x0);
-        let v13 = C::xreg_new(ctx, v5);
-        let v14 = constructor_rv_not(ctx, v13);
-        let v19 = C::xreg_to_reg(ctx, v14);
-        let v24 = C::value_reg(ctx, v19);
-        // Rule at src/isa/riscv64/inst.isle line 1699.
-        return v24;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "gen_bnot", "src/isa/riscv64/inst.isle line 1686"
-    )
-}
-
-// Generated as internal constructor for term gen_and.
-pub fn constructor_gen_and<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: ValueRegs,
-    arg2: ValueRegs,
-) -> ValueRegs {
-    if arg0 == I128 {
-        let v4 = C::value_regs_get(ctx, arg1, 0x0);
-        let v5 = C::xreg_new(ctx, v4);
-        let v6 = C::value_regs_get(ctx, arg2, 0x0);
-        let v7 = C::xreg_new(ctx, v6);
-        let v8 = constructor_rv_and(ctx, v5, v7);
-        let v11 = C::value_regs_get(ctx, arg1, 0x1);
-        let v12 = C::xreg_new(ctx, v11);
-        let v13 = C::value_regs_get(ctx, arg2, 0x1);
-        let v14 = C::xreg_new(ctx, v13);
-        let v15 = constructor_rv_and(ctx, v12, v14);
-        let v9 = C::xreg_to_reg(ctx, v8);
-        let v16 = C::xreg_to_reg(ctx, v15);
-        let v17 = C::value_regs(ctx, v9, v16);
-        // Rule at src/isa/riscv64/inst.isle line 1704.
-        return v17;
-    }
-    let v18 = C::fits_in_64(ctx, arg0);
-    if let Some(v19) = v18 {
-        let v4 = C::value_regs_get(ctx, arg1, 0x0);
-        let v5 = C::xreg_new(ctx, v4);
-        let v6 = C::value_regs_get(ctx, arg2, 0x0);
-        let v7 = C::xreg_new(ctx, v6);
-        let v8 = constructor_rv_and(ctx, v5, v7);
-        let v9 = C::xreg_to_reg(ctx, v8);
-        let v20 = C::value_reg(ctx, v9);
-        // Rule at src/isa/riscv64/inst.isle line 1709.
-        return v20;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "gen_and", "src/isa/riscv64/inst.isle line 1703"
-    )
-}
-
-// Generated as internal constructor for term gen_andi.
-pub fn constructor_gen_andi<C: Context>(ctx: &mut C, arg0: XReg, arg1: u64) -> XReg {
-    let v2 = C::imm12_from_u64(ctx, arg1);
-    if let Some(v3) = v2 {
-        let v4 = constructor_rv_andi(ctx, arg0, v3);
-        // Rule at src/isa/riscv64/inst.isle line 1714.
-        return v4;
-    }
-    let v6 = C::imm(ctx, I64, arg1);
-    let v7 = C::xreg_new(ctx, v6);
-    let v8 = constructor_rv_and(ctx, arg0, v7);
-    // Rule at src/isa/riscv64/inst.isle line 1717.
-    return v8;
-}
-
-// Generated as internal constructor for term gen_or.
-pub fn constructor_gen_or<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: ValueRegs,
-    arg2: ValueRegs,
-) -> ValueRegs {
-    if arg0 == I128 {
-        let v4 = C::value_regs_get(ctx, arg1, 0x0);
-        let v5 = C::xreg_new(ctx, v4);
-        let v6 = C::value_regs_get(ctx, arg2, 0x0);
-        let v7 = C::xreg_new(ctx, v6);
-        let v8 = constructor_rv_or(ctx, v5, v7);
-        let v11 = C::value_regs_get(ctx, arg1, 0x1);
-        let v12 = C::xreg_new(ctx, v11);
-        let v13 = C::value_regs_get(ctx, arg2, 0x1);
-        let v14 = C::xreg_new(ctx, v13);
-        let v15 = constructor_rv_or(ctx, v12, v14);
-        let v9 = C::xreg_to_reg(ctx, v8);
-        let v16 = C::xreg_to_reg(ctx, v15);
-        let v17 = C::value_regs(ctx, v9, v16);
-        // Rule at src/isa/riscv64/inst.isle line 1722.
-        return v17;
-    }
-    let v18 = C::fits_in_64(ctx, arg0);
-    if let Some(v19) = v18 {
-        let v4 = C::value_regs_get(ctx, arg1, 0x0);
-        let v5 = C::xreg_new(ctx, v4);
-        let v6 = C::value_regs_get(ctx, arg2, 0x0);
-        let v7 = C::xreg_new(ctx, v6);
-        let v8 = constructor_rv_or(ctx, v5, v7);
-        let v9 = C::xreg_to_reg(ctx, v8);
-        let v20 = C::value_reg(ctx, v9);
-        // Rule at src/isa/riscv64/inst.isle line 1727.
-        return v20;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "gen_or", "src/isa/riscv64/inst.isle line 1721"
-    )
-}
-
-// Generated as internal constructor for term gen_bswap.
-pub fn constructor_gen_bswap<C: Context>(ctx: &mut C, arg0: Type, arg1: XReg) -> XReg {
-    let v19 = C::has_zbb(ctx);
-    if v19 == true {
-        if arg0 == I64 {
-            let v26 = constructor_rv_rev8(ctx, arg1);
-            // Rule at src/isa/riscv64/inst.isle line 1759.
-            return v26;
-        }
-        let v17 = C::int_fits_in_32(ctx, arg0);
-        if let Some(v18) = v17 {
-            let v21 = C::ty_bits(ctx, v18);
-            let v22 = C::u8_as_u64(ctx, v21);
-            let v23 = C::u64_sub(ctx, 0x40, v22);
-            let v24 = constructor_u64_to_imm12(ctx, v23);
-            if let Some(v25) = v24 {
-                let v26 = constructor_rv_rev8(ctx, arg1);
-                let v27 = constructor_rv_srli(ctx, v26, v25);
-                // Rule at src/isa/riscv64/inst.isle line 1753.
-                return v27;
-            }
-        }
-    }
-    let v2 = C::ty_int_ref_16_to_64(ctx, arg0);
-    if let Some(v3) = v2 {
-        let v4 = C::ty_half_width(ctx, v3);
-        if let Some(v5) = v4 {
-            let v6 = C::ty_bits(ctx, v5);
-            let v7 = C::u8_as_u64(ctx, v6);
-            let v8 = constructor_u64_to_imm12(ctx, v7);
-            if let Some(v9) = v8 {
-                let v10 = constructor_gen_bswap(ctx, v5, arg1);
-                let v11 = constructor_rv_slli(ctx, v10, v9);
-                let v12 = constructor_rv_srli(ctx, arg1, v9);
-                let v13 = constructor_gen_bswap(ctx, v5, v12);
-                let v15 = constructor_zext(ctx, v13, v5, I64);
-                let v16 = constructor_rv_or(ctx, v11, v15);
-                // Rule at src/isa/riscv64/inst.isle line 1737.
-                return v16;
-            }
-        }
-    }
-    if arg0 == I8 {
-        // Rule at src/isa/riscv64/inst.isle line 1735.
-        return arg1;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "gen_bswap", "src/isa/riscv64/inst.isle line 1732"
-    )
-}
-
-// Generated as internal constructor for term lower_bit_reverse.
-pub fn constructor_lower_bit_reverse<C: Context>(ctx: &mut C, arg0: Reg, arg1: Type) -> Reg {
-    match arg1 {
-        I8 => {
-            let v3 = constructor_gen_brev8(ctx, arg0, I8);
-            // Rule at src/isa/riscv64/inst.isle line 1768.
-            return v3;
-        }
-        I16 => {
-            let v5 = constructor_gen_brev8(ctx, arg0, I16);
-            let v6 = C::xreg_new(ctx, v5);
-            let v7 = constructor_gen_rev8(ctx, v6);
-            let v9 = C::imm12_const(ctx, 0x30);
-            let v10 = constructor_rv_srli(ctx, v7, v9);
-            let v11 = C::xreg_to_reg(ctx, v10);
-            // Rule at src/isa/riscv64/inst.isle line 1772.
-            return v11;
-        }
-        I32 => {
-            let v13 = constructor_gen_brev8(ctx, arg0, I32);
-            let v14 = C::xreg_new(ctx, v13);
-            let v15 = constructor_gen_rev8(ctx, v14);
-            let v17 = C::imm12_const(ctx, 0x20);
-            let v18 = constructor_rv_srli(ctx, v15, v17);
-            let v19 = C::xreg_to_reg(ctx, v18);
-            // Rule at src/isa/riscv64/inst.isle line 1780.
-            return v19;
-        }
-        I64 => {
-            let v20 = C::xreg_new(ctx, arg0);
-            let v21 = constructor_gen_rev8(ctx, v20);
-            let v22 = C::xreg_to_reg(ctx, v21);
-            let v24 = constructor_gen_brev8(ctx, v22, I64);
-            // Rule at src/isa/riscv64/inst.isle line 1788.
-            return v24;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "lower_bit_reverse", "src/isa/riscv64/inst.isle line 1765"
-    )
-}
-
-// Generated as internal constructor for term lower_ctz.
-pub fn constructor_lower_ctz<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
-    let v8 = C::has_zbb(ctx);
-    if v8 == true {
-        match arg0 {
-            I32 => {
-                let v3 = C::xreg_new(ctx, arg1);
-                let v15 = constructor_rv_ctzw(ctx, v3);
-                let v16 = C::xreg_to_reg(ctx, v15);
-                // Rule at src/isa/riscv64/inst.isle line 1803.
-                return v16;
-            }
-            I64 => {
-                let v3 = C::xreg_new(ctx, arg1);
-                let v17 = constructor_rv_ctz(ctx, v3);
-                let v18 = C::xreg_to_reg(ctx, v17);
-                // Rule at src/isa/riscv64/inst.isle line 1807.
-                return v18;
-            }
-            _ => {}
-        }
-        let v6 = C::fits_in_16(ctx, arg0);
-        if let Some(v7) = v6 {
-            let v9 = C::ty_bits(ctx, v7);
-            let v10 = C::u8_as_u64(ctx, v9);
-            let v11 = constructor_gen_bseti(ctx, arg1, v10);
-            let v12 = C::xreg_new(ctx, v11);
-            let v13 = constructor_rv_ctzw(ctx, v12);
-            let v14 = C::xreg_to_reg(ctx, v13);
-            // Rule at src/isa/riscv64/inst.isle line 1798.
-            return v14;
-        }
-    }
-    let v3 = C::xreg_new(ctx, arg1);
-    let v4 = constructor_gen_cltz(ctx, false, v3, arg0);
-    let v5 = C::xreg_to_reg(ctx, v4);
-    // Rule at src/isa/riscv64/inst.isle line 1795.
-    return v5;
-}
-
-// Generated as internal constructor for term lower_ctz_128.
-pub fn constructor_lower_ctz_128<C: Context>(ctx: &mut C, arg0: ValueRegs) -> ValueRegs {
-    let v2 = C::value_regs_get(ctx, arg0, 0x0);
-    let v3 = C::xreg_new(ctx, v2);
-    let v5 = C::value_regs_get(ctx, arg0, 0x1);
-    let v6 = C::xreg_new(ctx, v5);
-    let v8 = C::xreg_to_reg(ctx, v6);
-    let v9 = constructor_lower_ctz(ctx, I64, v8);
-    let v10 = C::xreg_new(ctx, v9);
-    let v11 = C::xreg_to_reg(ctx, v3);
-    let v12 = constructor_lower_ctz(ctx, I64, v11);
-    let v13 = C::xreg_new(ctx, v12);
-    let v15 = C::zero_reg(ctx);
-    let v16 = C::xreg_new(ctx, v15);
-    let v18 = C::zero_reg(ctx);
-    let v17 = C::xreg_to_reg(ctx, v10);
-    let v19 = C::gen_select_reg(ctx, &IntCC::Equal, v3, v16, v17, v18);
-    let v20 = C::xreg_new(ctx, v19);
-    let v21 = constructor_rv_add(ctx, v13, v20);
-    let v22 = C::xreg_to_reg(ctx, v21);
-    let v23 = C::value_reg(ctx, v22);
-    let v26 = constructor_extend(ctx, v23, &ExtendOp::Zero, I64, I128);
-    // Rule at src/isa/riscv64/inst.isle line 1814.
-    return v26;
-}
-
-// Generated as internal constructor for term lower_clz.
-pub fn constructor_lower_clz<C: Context>(ctx: &mut C, arg0: Type, arg1: XReg) -> XReg {
-    let v6 = C::has_zbb(ctx);
-    if v6 == true {
-        match arg0 {
-            I32 => {
-                let v15 = constructor_rv_clzw(ctx, arg1);
-                // Rule at src/isa/riscv64/inst.isle line 1837.
-                return v15;
-            }
-            I64 => {
-                let v16 = constructor_rv_clz(ctx, arg1);
-                // Rule at src/isa/riscv64/inst.isle line 1841.
-                return v16;
-            }
-            _ => {}
-        }
-        let v4 = C::fits_in_16(ctx, arg0);
-        if let Some(v5) = v4 {
-            let v8 = constructor_zext(ctx, arg1, v5, I64);
-            let v9 = constructor_rv_clz(ctx, v8);
-            let v10 = C::ty_bits(ctx, v5);
-            let v11 = C::u8_as_i32(ctx, v10);
-            let v13 = C::imm12_const_add(ctx, v11, -0x40);
-            let v14 = constructor_rv_addi(ctx, v9, v13);
-            // Rule at src/isa/riscv64/inst.isle line 1829.
-            return v14;
-        }
-    }
-    let v3 = constructor_gen_cltz(ctx, true, arg1, arg0);
-    // Rule at src/isa/riscv64/inst.isle line 1826.
-    return v3;
-}
-
-// Generated as internal constructor for term lower_clz_i128.
-pub fn constructor_lower_clz_i128<C: Context>(ctx: &mut C, arg0: ValueRegs) -> ValueRegs {
-    let v2 = C::value_regs_get(ctx, arg0, 0x0);
-    let v3 = C::xreg_new(ctx, v2);
-    let v5 = C::value_regs_get(ctx, arg0, 0x1);
-    let v6 = C::xreg_new(ctx, v5);
-    let v8 = constructor_lower_clz(ctx, I64, v6);
-    let v9 = constructor_lower_clz(ctx, I64, v3);
-    let v11 = C::zero_reg(ctx);
-    let v12 = C::xreg_new(ctx, v11);
-    let v14 = C::zero_reg(ctx);
-    let v13 = C::xreg_to_reg(ctx, v9);
-    let v15 = C::gen_select_reg(ctx, &IntCC::Equal, v6, v12, v13, v14);
-    let v16 = C::xreg_new(ctx, v15);
-    let v17 = constructor_rv_add(ctx, v8, v16);
-    let v18 = C::xreg_to_reg(ctx, v17);
-    let v19 = C::value_reg(ctx, v18);
-    let v22 = constructor_extend(ctx, v19, &ExtendOp::Zero, I64, I128);
-    // Rule at src/isa/riscv64/inst.isle line 1849.
-    return v22;
-}
-
-// Generated as internal constructor for term lower_cls.
-pub fn constructor_lower_cls<C: Context>(ctx: &mut C, arg0: Type, arg1: XReg) -> XReg {
-    let v3 = constructor_sext(ctx, arg1, arg0, I64);
-    let v5 = C::zero_reg(ctx);
-    let v6 = C::xreg_new(ctx, v5);
-    let v7 = constructor_rv_not(ctx, v3);
-    let v8 = C::xreg_to_reg(ctx, v7);
-    let v9 = C::xreg_to_reg(ctx, v3);
-    let v10 = C::gen_select_reg(ctx, &IntCC::SignedLessThan, v3, v6, v8, v9);
-    let v11 = C::xreg_new(ctx, v10);
-    let v12 = constructor_lower_clz(ctx, arg0, v11);
-    let v14 = C::imm12_const(ctx, -0x1);
-    let v15 = constructor_rv_addi(ctx, v12, v14);
-    // Rule at src/isa/riscv64/inst.isle line 1862.
-    return v15;
-}
-
-// Generated as internal constructor for term lower_cls_i128.
-pub fn constructor_lower_cls_i128<C: Context>(ctx: &mut C, arg0: ValueRegs) -> ValueRegs {
-    let v2 = C::value_regs_get(ctx, arg0, 0x0);
-    let v3 = C::xreg_new(ctx, v2);
-    let v5 = C::value_regs_get(ctx, arg0, 0x1);
-    let v6 = C::xreg_new(ctx, v5);
-    let v8 = C::zero_reg(ctx);
-    let v9 = C::xreg_new(ctx, v8);
-    let v10 = constructor_rv_not(ctx, v3);
-    let v11 = C::xreg_to_reg(ctx, v10);
-    let v12 = C::xreg_to_reg(ctx, v3);
-    let v13 = C::gen_select_reg(ctx, &IntCC::SignedLessThan, v6, v9, v11, v12);
-    let v14 = C::xreg_new(ctx, v13);
-    let v15 = C::zero_reg(ctx);
-    let v16 = C::xreg_new(ctx, v15);
-    let v17 = constructor_rv_not(ctx, v6);
-    let v18 = C::xreg_to_reg(ctx, v17);
-    let v19 = C::xreg_to_reg(ctx, v6);
-    let v20 = C::gen_select_reg(ctx, &IntCC::SignedLessThan, v6, v16, v18, v19);
-    let v21 = C::xreg_new(ctx, v20);
-    let v22 = C::xreg_to_reg(ctx, v14);
-    let v23 = C::xreg_to_reg(ctx, v21);
-    let v24 = C::value_regs(ctx, v22, v23);
-    let v25 = constructor_lower_clz_i128(ctx, v24);
-    let v26 = C::value_regs_get(ctx, v25, 0x0);
-    let v27 = C::xreg_new(ctx, v26);
-    let v29 = C::imm12_const(ctx, -0x1);
-    let v30 = constructor_rv_addi(ctx, v27, v29);
-    let v31 = C::xreg_to_reg(ctx, v30);
-    let v32 = C::value_reg(ctx, v31);
-    let v36 = constructor_extend(ctx, v32, &ExtendOp::Zero, I64, I128);
-    // Rule at src/isa/riscv64/inst.isle line 1872.
-    return v36;
-}
-
-// Generated as internal constructor for term gen_cltz.
-pub fn constructor_gen_cltz<C: Context>(ctx: &mut C, arg0: bool, arg1: XReg, arg2: Type) -> XReg {
-    let v3 = constructor_temp_writable_xreg(ctx);
-    let v4 = constructor_temp_writable_xreg(ctx);
-    let v5 = constructor_temp_writable_xreg(ctx);
-    let v6 = C::writable_xreg_to_writable_reg(ctx, v5);
-    let v7 = C::writable_xreg_to_writable_reg(ctx, v4);
-    let v8 = C::writable_xreg_to_writable_reg(ctx, v3);
-    let v9 = C::xreg_to_reg(ctx, arg1);
-    let v10 = MInst::Cltz {
-        leading: arg0,
-        sum: v6,
-        step: v7,
-        tmp: v8,
-        rs: v9,
-        ty: arg2,
-    };
-    let v11 = C::emit(ctx, &v10);
-    let v12 = C::writable_xreg_to_xreg(ctx, v5);
-    // Rule at src/isa/riscv64/inst.isle line 1884.
-    return v12;
-}
-
-// Generated as internal constructor for term ext_int_if_need.
-pub fn constructor_ext_int_if_need<C: Context>(
-    ctx: &mut C,
-    arg0: bool,
-    arg1: ValueRegs,
-    arg2: Type,
-) -> ValueRegs {
-    match arg2 {
-        I64 => {
-            // Rule at src/isa/riscv64/inst.isle line 1900.
-            return arg1;
-        }
-        I128 => {
-            // Rule at src/isa/riscv64/inst.isle line 1901.
-            return arg1;
-        }
-        _ => {}
-    }
-    match arg0 {
-        true => {
-            let v3 = C::fits_in_32(ctx, arg2);
-            if let Some(v4) = v3 {
-                let v5 = C::ty_int(ctx, v4);
-                if let Some(v6) = v5 {
-                    let v9 = constructor_extend(ctx, arg1, &ExtendOp::Signed, v6, I64);
-                    // Rule at src/isa/riscv64/inst.isle line 1895.
-                    return v9;
-                }
-            }
-        }
-        false => {
-            let v3 = C::fits_in_32(ctx, arg2);
-            if let Some(v4) = v3 {
-                let v5 = C::ty_int(ctx, v4);
-                if let Some(v6) = v5 {
-                    let v11 = constructor_extend(ctx, arg1, &ExtendOp::Zero, v6, I64);
-                    // Rule at src/isa/riscv64/inst.isle line 1897.
-                    return v11;
-                }
-            }
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "ext_int_if_need", "src/isa/riscv64/inst.isle line 1893"
-    )
-}
-
-// Generated as internal constructor for term zext.
-pub fn constructor_zext<C: Context>(ctx: &mut C, arg0: XReg, arg1: Type, arg2: Type) -> XReg {
-    let v3 = C::fits_in_64(ctx, arg2);
-    if let Some(v4) = v3 {
-        let v5 = C::xreg_to_reg(ctx, arg0);
-        let v6 = C::value_reg(ctx, v5);
-        let v8 = constructor_extend(ctx, v6, &ExtendOp::Zero, arg1, v4);
-        let v10 = C::value_regs_get(ctx, v8, 0x0);
-        let v11 = C::xreg_new(ctx, v10);
-        // Rule at src/isa/riscv64/inst.isle line 1906.
-        return v11;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "zext", "src/isa/riscv64/inst.isle line 1905"
-    )
-}
-
-// Generated as internal constructor for term sext.
-pub fn constructor_sext<C: Context>(ctx: &mut C, arg0: XReg, arg1: Type, arg2: Type) -> XReg {
-    let v3 = C::fits_in_64(ctx, arg2);
-    if let Some(v4) = v3 {
-        let v5 = C::xreg_to_reg(ctx, arg0);
-        let v6 = C::value_reg(ctx, v5);
-        let v8 = constructor_extend(ctx, v6, &ExtendOp::Signed, arg1, v4);
-        let v10 = C::value_regs_get(ctx, v8, 0x0);
-        let v11 = C::xreg_new(ctx, v10);
-        // Rule at src/isa/riscv64/inst.isle line 1910.
-        return v11;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "sext", "src/isa/riscv64/inst.isle line 1909"
-    )
-}
-
-// Generated as internal constructor for term extend.
-pub fn constructor_extend<C: Context>(
-    ctx: &mut C,
-    arg0: ValueRegs,
-    arg1: &ExtendOp,
-    arg2: Type,
-    arg3: Type,
-) -> ValueRegs {
-    if arg2 == arg3 {
-        // Rule at src/isa/riscv64/inst.isle line 2004.
-        return arg0;
-    }
-    match arg1 {
-        &ExtendOp::Zero => {
-            match arg3 {
-                I64 => {
-                    if arg2 == I32 {
-                        let v50 = C::has_zba(ctx);
-                        if v50 == true {
-                            let v9 = C::value_regs_get(ctx, arg0, 0x0);
-                            let v10 = C::xreg_new(ctx, v9);
-                            let v51 = constructor_rv_zextw(ctx, v10);
-                            let v52 = C::xreg_to_reg(ctx, v51);
-                            let v53 = C::value_reg(ctx, v52);
-                            // Rule at src/isa/riscv64/inst.isle line 1982.
-                            return v53;
-                        }
-                    }
-                }
-                I128 => {
-                    let v54 = C::fits_in_64(ctx, arg2);
-                    if let Some(v55) = v54 {
-                        let v9 = C::value_regs_get(ctx, arg0, 0x0);
-                        let v10 = C::xreg_new(ctx, v9);
-                        let v64 = constructor_zext(ctx, v10, v55, I64);
-                        let v66 = C::load_u64_constant(ctx, 0x0);
-                        let v67 = C::xreg_new(ctx, v66);
-                        let v68 = C::xreg_to_reg(ctx, v64);
-                        let v69 = C::xreg_to_reg(ctx, v67);
-                        let v70 = C::value_regs(ctx, v68, v69);
-                        // Rule at src/isa/riscv64/inst.isle line 1997.
-                        return v70;
-                    }
-                }
-                _ => {}
-            }
-            match arg2 {
-                I8 => {
-                    let v6 = C::fits_in_64(ctx, arg3);
-                    if let Some(v7) = v6 {
-                        let v9 = C::value_regs_get(ctx, arg0, 0x0);
-                        let v10 = C::xreg_new(ctx, v9);
-                        let v24 = C::imm12_const(ctx, 0xFF);
-                        let v25 = constructor_rv_andi(ctx, v10, v24);
-                        let v26 = C::xreg_to_reg(ctx, v25);
-                        let v27 = C::value_reg(ctx, v26);
-                        // Rule at src/isa/riscv64/inst.isle line 1936.
-                        return v27;
-                    }
-                }
-                I16 => {
-                    let v6 = C::fits_in_64(ctx, arg3);
-                    if let Some(v7) = v6 {
-                        let v40 = C::has_zbb(ctx);
-                        if v40 == true {
-                            let v9 = C::value_regs_get(ctx, arg0, 0x0);
-                            let v10 = C::xreg_new(ctx, v9);
-                            let v47 = constructor_rv_zexth(ctx, v10);
-                            let v48 = C::xreg_to_reg(ctx, v47);
-                            let v49 = C::value_reg(ctx, v48);
-                            // Rule at src/isa/riscv64/inst.isle line 1976.
-                            return v49;
-                        }
-                        let v31 = C::has_zbkb(ctx);
-                        if v31 == true {
-                            let v9 = C::value_regs_get(ctx, arg0, 0x0);
-                            let v10 = C::xreg_new(ctx, v9);
-                            let v32 = C::zero_reg(ctx);
-                            let v33 = C::xreg_new(ctx, v32);
-                            let v34 = constructor_rv_packw(ctx, v10, v33);
-                            let v35 = C::xreg_to_reg(ctx, v34);
-                            let v36 = C::value_reg(ctx, v35);
-                            // Rule at src/isa/riscv64/inst.isle line 1951.
-                            return v36;
-                        }
-                    }
-                }
-                I32 => {
-                    if arg3 == I64 {
-                        let v31 = C::has_zbkb(ctx);
-                        if v31 == true {
-                            let v9 = C::value_regs_get(ctx, arg0, 0x0);
-                            let v10 = C::xreg_new(ctx, v9);
-                            let v32 = C::zero_reg(ctx);
-                            let v33 = C::xreg_new(ctx, v32);
-                            let v37 = constructor_rv_pack(ctx, v10, v33);
-                            let v38 = C::xreg_to_reg(ctx, v37);
-                            let v39 = C::value_reg(ctx, v38);
-                            // Rule at src/isa/riscv64/inst.isle line 1957.
-                            return v39;
-                        }
-                    }
-                }
-                _ => {}
-            }
-        }
-        &ExtendOp::Signed => {
-            match arg3 {
-                I64 => {
-                    if arg2 == I32 {
-                        let v9 = C::value_regs_get(ctx, arg0, 0x0);
-                        let v10 = C::xreg_new(ctx, v9);
-                        let v28 = constructor_rv_sextw(ctx, v10);
-                        let v29 = C::xreg_to_reg(ctx, v28);
-                        let v30 = C::value_reg(ctx, v29);
-                        // Rule at src/isa/riscv64/inst.isle line 1942.
-                        return v30;
-                    }
-                }
-                I128 => {
-                    let v54 = C::fits_in_64(ctx, arg2);
-                    if let Some(v55) = v54 {
-                        let v9 = C::value_regs_get(ctx, arg0, 0x0);
-                        let v10 = C::xreg_new(ctx, v9);
-                        let v57 = constructor_sext(ctx, v10, v55, I64);
-                        let v59 = C::imm12_const(ctx, 0x3F);
-                        let v60 = constructor_rv_srai(ctx, v57, v59);
-                        let v61 = C::xreg_to_reg(ctx, v57);
-                        let v62 = C::xreg_to_reg(ctx, v60);
-                        let v63 = C::value_regs(ctx, v61, v62);
-                        // Rule at src/isa/riscv64/inst.isle line 1989.
-                        return v63;
-                    }
-                }
-                _ => {}
-            }
-            match arg2 {
-                I8 => {
-                    let v6 = C::fits_in_64(ctx, arg3);
-                    if let Some(v7) = v6 {
-                        let v40 = C::has_zbb(ctx);
-                        if v40 == true {
-                            let v9 = C::value_regs_get(ctx, arg0, 0x0);
-                            let v10 = C::xreg_new(ctx, v9);
-                            let v41 = constructor_rv_sextb(ctx, v10);
-                            let v42 = C::xreg_to_reg(ctx, v41);
-                            let v43 = C::value_reg(ctx, v42);
-                            // Rule at src/isa/riscv64/inst.isle line 1964.
-                            return v43;
-                        }
-                    }
-                }
-                I16 => {
-                    let v6 = C::fits_in_64(ctx, arg3);
-                    if let Some(v7) = v6 {
-                        let v40 = C::has_zbb(ctx);
-                        if v40 == true {
-                            let v9 = C::value_regs_get(ctx, arg0, 0x0);
-                            let v10 = C::xreg_new(ctx, v9);
-                            let v44 = constructor_rv_sexth(ctx, v10);
-                            let v45 = C::xreg_to_reg(ctx, v44);
-                            let v46 = C::value_reg(ctx, v45);
-                            // Rule at src/isa/riscv64/inst.isle line 1970.
-                            return v46;
-                        }
-                    }
-                }
-                _ => {}
-            }
-        }
-        _ => {}
-    }
-    let v3 = C::fits_in_32(ctx, arg2);
-    if let Some(v4) = v3 {
-        let v6 = C::fits_in_64(ctx, arg3);
-        if let Some(v7) = v6 {
-            let v9 = C::value_regs_get(ctx, arg0, 0x0);
-            let v10 = C::xreg_new(ctx, v9);
-            let v12 = C::ty_bits(ctx, v4);
-            let v13 = C::u8_as_u64(ctx, v12);
-            let v14 = C::u64_sub(ctx, 0x40, v13);
-            let v15 = C::imm_from_bits(ctx, v14);
-            let v16 = constructor_rv_slli(ctx, v10, v15);
-            let v17 = &constructor_extend_shift_op(ctx, arg1);
-            let v18 = C::xreg_to_reg(ctx, v16);
-            let v19 = constructor_alu_rr_imm12(ctx, v17, v18, v15);
-            let v20 = C::xreg_new(ctx, v19);
-            let v21 = C::xreg_to_reg(ctx, v20);
-            let v22 = C::value_reg(ctx, v21);
-            // Rule at src/isa/riscv64/inst.isle line 1927.
-            return v22;
-        }
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "extend", "src/isa/riscv64/inst.isle line 1918"
-    )
-}
-
-// Generated as internal constructor for term extend_shift_op.
-pub fn constructor_extend_shift_op<C: Context>(ctx: &mut C, arg0: &ExtendOp) -> AluOPRRI {
-    match arg0 {
-        &ExtendOp::Zero => {
-            // Rule at src/isa/riscv64/inst.isle line 1922.
-            return AluOPRRI::Srli;
-        }
-        &ExtendOp::Signed => {
-            // Rule at src/isa/riscv64/inst.isle line 1923.
-            return AluOPRRI::Srai;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "extend_shift_op", "src/isa/riscv64/inst.isle line 1921"
-    )
-}
-
-// Generated as internal constructor for term lower_b128_binary.
-pub fn constructor_lower_b128_binary<C: Context>(
-    ctx: &mut C,
-    arg0: &AluOPRRR,
-    arg1: ValueRegs,
-    arg2: ValueRegs,
-) -> ValueRegs {
-    let v4 = C::value_regs_get(ctx, arg1, 0x0);
-    let v5 = C::value_regs_get(ctx, arg2, 0x0);
-    let v6 = constructor_alu_rrr(ctx, arg0, v4, v5);
-    let v7 = C::xreg_new(ctx, v6);
-    let v9 = C::value_regs_get(ctx, arg1, 0x1);
-    let v10 = C::value_regs_get(ctx, arg2, 0x1);
-    let v11 = constructor_alu_rrr(ctx, arg0, v9, v10);
-    let v12 = C::xreg_new(ctx, v11);
-    let v13 = C::xreg_to_reg(ctx, v7);
-    let v14 = C::xreg_to_reg(ctx, v12);
-    let v15 = C::value_regs(ctx, v13, v14);
-    // Rule at src/isa/riscv64/inst.isle line 2010.
-    return v15;
-}
-
-// Generated as internal constructor for term lower_umlhi.
-pub fn constructor_lower_umlhi<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: XReg,
-    arg2: XReg,
-) -> XReg {
-    if arg0 == I64 {
-        let v3 = constructor_rv_mulhu(ctx, arg1, arg2);
-        // Rule at src/isa/riscv64/inst.isle line 2019.
-        return v3;
-    }
-    let v5 = constructor_zext(ctx, arg1, arg0, I64);
-    let v6 = constructor_zext(ctx, arg2, arg0, I64);
-    let v7 = constructor_rv_mul(ctx, v5, v6);
-    let v8 = C::ty_bits(ctx, arg0);
-    let v9 = C::u8_as_i32(ctx, v8);
-    let v10 = C::imm12_const(ctx, v9);
-    let v11 = constructor_rv_srli(ctx, v7, v10);
-    // Rule at src/isa/riscv64/inst.isle line 2022.
-    return v11;
-}
-
-// Generated as internal constructor for term lower_smlhi.
-pub fn constructor_lower_smlhi<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: XReg,
-    arg2: XReg,
-) -> XReg {
-    if arg0 == I64 {
-        let v3 = constructor_rv_mulh(ctx, arg1, arg2);
-        // Rule at src/isa/riscv64/inst.isle line 2028.
-        return v3;
-    }
-    let v4 = constructor_rv_mul(ctx, arg1, arg2);
-    let v5 = C::ty_bits(ctx, arg0);
-    let v6 = C::u8_as_i32(ctx, v5);
-    let v7 = C::imm12_const(ctx, v6);
-    let v8 = constructor_rv_srli(ctx, v4, v7);
-    // Rule at src/isa/riscv64/inst.isle line 2033.
-    return v8;
-}
-
-// Generated as internal constructor for term lower_rotl.
-pub fn constructor_lower_rotl<C: Context>(ctx: &mut C, arg0: Type, arg1: XReg, arg2: XReg) -> XReg {
-    match arg0 {
-        I32 => {
-            let v3 = C::has_zbb(ctx);
-            match v3 {
-                true => {
-                    let v7 = constructor_rv_rolw(ctx, arg1, arg2);
-                    // Rule at src/isa/riscv64/inst.isle line 2051.
-                    return v7;
-                }
-                false => {
-                    let v9 = constructor_lower_rotl_shift(ctx, I32, arg1, arg2);
-                    // Rule at src/isa/riscv64/inst.isle line 2057.
-                    return v9;
-                }
-                _ => {}
-            }
-        }
-        I64 => {
-            let v3 = C::has_zbb(ctx);
-            match v3 {
-                true => {
-                    let v4 = constructor_rv_rol(ctx, arg1, arg2);
-                    // Rule at src/isa/riscv64/inst.isle line 2041.
-                    return v4;
-                }
-                false => {
-                    let v6 = constructor_lower_rotl_shift(ctx, I64, arg1, arg2);
-                    // Rule at src/isa/riscv64/inst.isle line 2047.
-                    return v6;
-                }
-                _ => {}
-            }
-        }
-        _ => {}
-    }
-    let v10 = constructor_lower_rotl_shift(ctx, arg0, arg1, arg2);
-    // Rule at src/isa/riscv64/inst.isle line 2061.
-    return v10;
-}
-
-// Generated as internal constructor for term lower_rotl_shift.
-pub fn constructor_lower_rotl_shift<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: XReg,
-    arg2: XReg,
-) -> XReg {
-    let v3 = C::gen_shamt(ctx, arg0, arg2);
-    let v5 = C::value_regs_get(ctx, v3, 0x0);
-    let v7 = C::value_regs_get(ctx, v3, 0x1);
-    let v8 = C::xreg_new(ctx, v5);
-    let v9 = constructor_rv_sll(ctx, arg1, v8);
-    let v11 = C::xreg_new(ctx, v7);
-    let v12 = constructor_rv_srl(ctx, arg1, v11);
-    let v15 = C::xreg_new(ctx, v5);
-    let v16 = C::zero_reg(ctx);
-    let v17 = C::xreg_new(ctx, v16);
-    let v18 = C::zero_reg(ctx);
-    let v13 = C::xreg_to_reg(ctx, v12);
-    let v19 = C::gen_select_reg(ctx, &IntCC::Equal, v15, v17, v18, v13);
-    let v10 = C::xreg_to_reg(ctx, v9);
-    let v20 = C::xreg_new(ctx, v10);
-    let v21 = C::xreg_new(ctx, v19);
-    let v22 = constructor_rv_or(ctx, v20, v21);
-    // Rule at src/isa/riscv64/inst.isle line 2070.
-    return v22;
-}
-
-// Generated as internal constructor for term lower_rotr.
-pub fn constructor_lower_rotr<C: Context>(ctx: &mut C, arg0: Type, arg1: XReg, arg2: XReg) -> XReg {
-    match arg0 {
-        I32 => {
-            let v3 = C::has_zbb(ctx);
-            match v3 {
-                true => {
-                    let v7 = constructor_rv_rorw(ctx, arg1, arg2);
-                    // Rule at src/isa/riscv64/inst.isle line 2100.
-                    return v7;
-                }
-                false => {
-                    let v9 = constructor_lower_rotr_shift(ctx, I32, arg1, arg2);
-                    // Rule at src/isa/riscv64/inst.isle line 2106.
-                    return v9;
-                }
-                _ => {}
-            }
-        }
-        I64 => {
-            let v3 = C::has_zbb(ctx);
-            match v3 {
-                true => {
-                    let v4 = constructor_rv_ror(ctx, arg1, arg2);
-                    // Rule at src/isa/riscv64/inst.isle line 2091.
-                    return v4;
-                }
-                false => {
-                    let v6 = constructor_lower_rotr_shift(ctx, I64, arg1, arg2);
-                    // Rule at src/isa/riscv64/inst.isle line 2096.
-                    return v6;
-                }
-                _ => {}
-            }
-        }
-        _ => {}
-    }
-    let v10 = constructor_lower_rotr_shift(ctx, arg0, arg1, arg2);
-    // Rule at src/isa/riscv64/inst.isle line 2110.
-    return v10;
-}
-
-// Generated as internal constructor for term lower_rotr_shift.
-pub fn constructor_lower_rotr_shift<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: XReg,
-    arg2: XReg,
-) -> XReg {
-    let v3 = C::gen_shamt(ctx, arg0, arg2);
-    let v5 = C::value_regs_get(ctx, v3, 0x0);
-    let v6 = C::xreg_new(ctx, v5);
-    let v8 = C::value_regs_get(ctx, v3, 0x1);
-    let v9 = C::xreg_new(ctx, v8);
-    let v10 = constructor_rv_srl(ctx, arg1, v6);
-    let v11 = constructor_rv_sll(ctx, arg1, v9);
-    let v13 = C::zero_reg(ctx);
-    let v14 = C::xreg_new(ctx, v13);
-    let v15 = C::zero_reg(ctx);
-    let v16 = C::xreg_to_reg(ctx, v11);
-    let v17 = C::gen_select_reg(ctx, &IntCC::Equal, v6, v14, v15, v16);
-    let v18 = C::xreg_new(ctx, v17);
-    let v19 = constructor_rv_or(ctx, v10, v18);
-    // Rule at src/isa/riscv64/inst.isle line 2118.
-    return v19;
-}
-
-// Generated as internal constructor for term gen_bseti.
-pub fn constructor_gen_bseti<C: Context>(ctx: &mut C, arg0: Reg, arg1: u64) -> Reg {
-    let v2 = C::has_zbs(ctx);
-    match v2 {
-        true => {
-            let v12 = C::xreg_new(ctx, arg0);
-            let v17 = C::u64_as_i32(ctx, arg1);
-            let v18 = C::imm12_const(ctx, v17);
-            let v19 = constructor_rv_bseti(ctx, v12, v18);
-            let v20 = C::xreg_to_reg(ctx, v19);
-            // Rule at src/isa/riscv64/inst.isle line 2146.
-            return v20;
-        }
-        false => {
-            let v4 = C::u64_le(ctx, arg1, 0xC);
-            match v4 {
-                true => {
-                    let v12 = C::xreg_new(ctx, arg0);
-                    let v6 = C::u64_shl(ctx, 0x1, arg1);
-                    let v13 = C::u64_as_i32(ctx, v6);
-                    let v14 = C::imm12_const(ctx, v13);
-                    let v15 = constructor_rv_ori(ctx, v12, v14);
-                    let v16 = C::xreg_to_reg(ctx, v15);
-                    // Rule at src/isa/riscv64/inst.isle line 2141.
-                    return v16;
-                }
-                false => {
-                    let v6 = C::u64_shl(ctx, 0x1, arg1);
-                    let v7 = C::load_u64_constant(ctx, v6);
-                    let v8 = C::xreg_new(ctx, v7);
-                    let v9 = C::xreg_new(ctx, arg0);
-                    let v10 = constructor_rv_or(ctx, v9, v8);
-                    let v11 = C::xreg_to_reg(ctx, v10);
-                    // Rule at src/isa/riscv64/inst.isle line 2135.
-                    return v11;
-                }
-                _ => {}
-            }
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "gen_bseti", "src/isa/riscv64/inst.isle line 2134"
-    )
-}
-
-// Generated as internal constructor for term gen_popcnt.
-pub fn constructor_gen_popcnt<C: Context>(ctx: &mut C, arg0: Reg, arg1: Type) -> Reg {
-    let v2 = constructor_temp_writable_xreg(ctx);
-    let v3 = constructor_temp_writable_xreg(ctx);
-    let v4 = constructor_temp_writable_xreg(ctx);
-    let v5 = C::writable_xreg_to_writable_reg(ctx, v4);
-    let v6 = C::writable_xreg_to_writable_reg(ctx, v3);
-    let v7 = C::writable_xreg_to_writable_reg(ctx, v2);
-    let v8 = MInst::Popcnt {
-        sum: v5,
-        step: v6,
-        tmp: v7,
-        rs: arg0,
-        ty: arg1,
-    };
-    let v9 = C::emit(ctx, &v8);
-    let v10 = C::writable_reg_to_reg(ctx, v5);
-    // Rule at src/isa/riscv64/inst.isle line 2153.
-    return v10;
-}
-
-// Generated as internal constructor for term lower_popcnt.
-pub fn constructor_lower_popcnt<C: Context>(ctx: &mut C, arg0: XReg, arg1: Type) -> XReg {
-    let v2 = C::has_zbb(ctx);
-    match v2 {
-        true => {
-            let v4 = constructor_zext(ctx, arg0, arg1, I64);
-            let v5 = constructor_rv_cpop(ctx, v4);
-            // Rule at src/isa/riscv64/inst.isle line 2162.
-            return v5;
-        }
-        false => {
-            let v6 = C::xreg_to_reg(ctx, arg0);
-            let v7 = constructor_gen_popcnt(ctx, v6, arg1);
-            let v8 = C::xreg_new(ctx, v7);
-            // Rule at src/isa/riscv64/inst.isle line 2166.
-            return v8;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "lower_popcnt", "src/isa/riscv64/inst.isle line 2161"
-    )
-}
-
-// Generated as internal constructor for term lower_popcnt_i128.
-pub fn constructor_lower_popcnt_i128<C: Context>(ctx: &mut C, arg0: ValueRegs) -> ValueRegs {
-    let v2 = C::value_regs_get(ctx, arg0, 0x0);
-    let v3 = C::xreg_new(ctx, v2);
-    let v5 = constructor_lower_popcnt(ctx, v3, I64);
-    let v7 = C::value_regs_get(ctx, arg0, 0x1);
-    let v8 = C::xreg_new(ctx, v7);
-    let v9 = constructor_lower_popcnt(ctx, v8, I64);
-    let v10 = constructor_rv_add(ctx, v5, v9);
-    let v13 = C::load_u64_constant(ctx, 0x0);
-    let v11 = C::xreg_to_reg(ctx, v10);
-    let v14 = C::value_regs(ctx, v11, v13);
-    // Rule at src/isa/riscv64/inst.isle line 2172.
-    return v14;
-}
-
-// Generated as internal constructor for term lower_i128_rotl.
-pub fn constructor_lower_i128_rotl<C: Context>(
-    ctx: &mut C,
-    arg0: ValueRegs,
-    arg1: ValueRegs,
-) -> ValueRegs {
-    let v4 = C::value_regs_get(ctx, arg1, 0x0);
-    let v5 = C::xreg_new(ctx, v4);
-    let v6 = C::gen_shamt(ctx, I128, v5);
-    let v7 = C::value_regs_get(ctx, v6, 0x0);
-    let v8 = C::xreg_new(ctx, v7);
-    let v10 = C::value_regs_get(ctx, v6, 0x1);
-    let v11 = C::xreg_new(ctx, v10);
-    let v12 = C::value_regs_get(ctx, arg0, 0x0);
-    let v13 = C::xreg_new(ctx, v12);
-    let v14 = constructor_rv_sll(ctx, v13, v8);
-    let v15 = C::value_regs_get(ctx, arg0, 0x1);
-    let v16 = C::xreg_new(ctx, v15);
-    let v17 = constructor_rv_srl(ctx, v16, v11);
-    let v19 = C::zero_reg(ctx);
-    let v20 = C::xreg_new(ctx, v19);
-    let v21 = C::zero_reg(ctx);
-    let v22 = C::xreg_to_reg(ctx, v17);
-    let v23 = C::gen_select_reg(ctx, &IntCC::Equal, v8, v20, v21, v22);
-    let v24 = C::xreg_new(ctx, v23);
-    let v25 = constructor_rv_or(ctx, v14, v24);
-    let v26 = C::value_regs_get(ctx, arg0, 0x1);
-    let v27 = C::xreg_new(ctx, v26);
-    let v28 = constructor_rv_sll(ctx, v27, v8);
-    let v29 = C::value_regs_get(ctx, arg0, 0x0);
-    let v30 = C::xreg_new(ctx, v29);
-    let v31 = constructor_rv_srl(ctx, v30, v11);
-    let v32 = C::zero_reg(ctx);
-    let v33 = C::xreg_new(ctx, v32);
-    let v34 = C::zero_reg(ctx);
-    let v35 = C::xreg_to_reg(ctx, v31);
-    let v36 = C::gen_select_reg(ctx, &IntCC::Equal, v8, v33, v34, v35);
-    let v37 = C::xreg_new(ctx, v36);
-    let v38 = constructor_rv_or(ctx, v28, v37);
-    let v40 = C::load_u64_constant(ctx, 0x40);
-    let v41 = C::xreg_new(ctx, v40);
-    let v42 = C::value_regs_get(ctx, arg1, 0x0);
-    let v43 = C::xreg_new(ctx, v42);
-    let v45 = C::imm12_const(ctx, 0x7F);
-    let v46 = constructor_rv_andi(ctx, v43, v45);
-    let v48 = C::xreg_to_reg(ctx, v38);
-    let v49 = C::xreg_to_reg(ctx, v25);
-    let v50 = C::gen_select_reg(ctx, &IntCC::UnsignedGreaterThanOrEqual, v46, v41, v48, v49);
-    let v51 = C::gen_select_reg(ctx, &IntCC::UnsignedGreaterThanOrEqual, v46, v41, v49, v48);
-    let v52 = C::value_regs(ctx, v50, v51);
-    // Rule at src/isa/riscv64/inst.isle line 2184.
-    return v52;
-}
-
-// Generated as internal constructor for term lower_i128_rotr.
-pub fn constructor_lower_i128_rotr<C: Context>(
-    ctx: &mut C,
-    arg0: ValueRegs,
-    arg1: ValueRegs,
-) -> ValueRegs {
-    let v4 = C::value_regs_get(ctx, arg1, 0x0);
-    let v5 = C::xreg_new(ctx, v4);
-    let v6 = C::gen_shamt(ctx, I128, v5);
-    let v7 = C::value_regs_get(ctx, v6, 0x0);
-    let v8 = C::xreg_new(ctx, v7);
-    let v10 = C::value_regs_get(ctx, v6, 0x1);
-    let v11 = C::xreg_new(ctx, v10);
-    let v12 = C::value_regs_get(ctx, arg0, 0x0);
-    let v13 = C::xreg_new(ctx, v12);
-    let v14 = constructor_rv_srl(ctx, v13, v8);
-    let v15 = C::value_regs_get(ctx, arg0, 0x1);
-    let v16 = C::xreg_new(ctx, v15);
-    let v17 = constructor_rv_sll(ctx, v16, v11);
-    let v19 = C::zero_reg(ctx);
-    let v20 = C::xreg_new(ctx, v19);
-    let v21 = C::zero_reg(ctx);
-    let v22 = C::xreg_to_reg(ctx, v17);
-    let v23 = C::gen_select_reg(ctx, &IntCC::Equal, v8, v20, v21, v22);
-    let v24 = C::xreg_new(ctx, v23);
-    let v25 = constructor_rv_or(ctx, v14, v24);
-    let v26 = C::value_regs_get(ctx, arg0, 0x1);
-    let v27 = C::xreg_new(ctx, v26);
-    let v28 = constructor_rv_srl(ctx, v27, v8);
-    let v29 = C::value_regs_get(ctx, arg0, 0x0);
-    let v30 = C::xreg_new(ctx, v29);
-    let v31 = constructor_rv_sll(ctx, v30, v11);
-    let v32 = C::zero_reg(ctx);
-    let v33 = C::xreg_new(ctx, v32);
-    let v34 = C::zero_reg(ctx);
-    let v35 = C::xreg_to_reg(ctx, v31);
-    let v36 = C::gen_select_reg(ctx, &IntCC::Equal, v8, v33, v34, v35);
-    let v37 = C::xreg_new(ctx, v36);
-    let v38 = constructor_rv_or(ctx, v28, v37);
-    let v40 = C::load_u64_constant(ctx, 0x40);
-    let v41 = C::xreg_new(ctx, v40);
-    let v42 = C::value_regs_get(ctx, arg1, 0x0);
-    let v43 = C::xreg_new(ctx, v42);
-    let v45 = C::imm12_const(ctx, 0x7F);
-    let v46 = constructor_rv_andi(ctx, v43, v45);
-    let v48 = C::xreg_to_reg(ctx, v38);
-    let v49 = C::xreg_to_reg(ctx, v25);
-    let v50 = C::gen_select_reg(ctx, &IntCC::UnsignedGreaterThanOrEqual, v46, v41, v48, v49);
-    let v51 = C::gen_select_reg(ctx, &IntCC::UnsignedGreaterThanOrEqual, v46, v41, v49, v48);
-    let v52 = C::value_regs(ctx, v50, v51);
-    // Rule at src/isa/riscv64/inst.isle line 2213.
-    return v52;
-}
-
-// Generated as internal constructor for term gen_load.
-pub fn constructor_gen_load<C: Context>(
-    ctx: &mut C,
-    arg0: Reg,
-    arg1: Offset32,
-    arg2: &LoadOP,
-    arg3: MemFlags,
-    arg4: Type,
-) -> Reg {
-    let v5 = C::temp_writable_reg(ctx, arg4);
-    let v7 = C::gen_amode(ctx, arg0, arg1, I64);
-    let v8 = MInst::Load {
-        rd: v5,
-        op: arg2.clone(),
-        flags: arg3,
-        from: v7,
-    };
-    let v9 = C::emit(ctx, &v8);
-    let v10 = C::writable_reg_to_reg(ctx, v5);
-    // Rule at src/isa/riscv64/inst.isle line 2253.
-    return v10;
-}
-
-// Generated as internal constructor for term gen_load_128.
-pub fn constructor_gen_load_128<C: Context>(
-    ctx: &mut C,
-    arg0: Reg,
-    arg1: Offset32,
-    arg2: MemFlags,
-) -> ValueRegs {
-    let v5 = constructor_gen_load(ctx, arg0, arg1, &LoadOP::Ld, arg2, I64);
-    let v7 = C::offset32_add(ctx, arg1, 0x8);
-    let v8 = constructor_gen_load(ctx, arg0, v7, &LoadOP::Ld, arg2, I64);
-    let v9 = C::value_regs(ctx, v5, v8);
-    // Rule at src/isa/riscv64/inst.isle line 2261.
-    return v9;
-}
-
-// Generated as internal constructor for term gen_store.
-pub fn constructor_gen_store<C: Context>(
-    ctx: &mut C,
-    arg0: Reg,
-    arg1: Offset32,
-    arg2: &StoreOP,
-    arg3: MemFlags,
-    arg4: Reg,
-) -> InstOutput {
-    let v6 = C::gen_amode(ctx, arg0, arg1, I64);
-    let v7 = MInst::Store {
-        to: v6,
-        op: arg2.clone(),
-        flags: arg3,
-        src: arg4,
-    };
-    let v8 = SideEffectNoResult::Inst { inst: v7 };
-    let v9 = constructor_side_effect(ctx, &v8);
-    // Rule at src/isa/riscv64/inst.isle line 2276.
-    return v9;
-}
-
-// Generated as internal constructor for term gen_store_128.
-pub fn constructor_gen_store_128<C: Context>(
-    ctx: &mut C,
-    arg0: Reg,
-    arg1: Offset32,
-    arg2: MemFlags,
-    arg3: ValueRegs,
-) -> InstOutput {
-    let v5 = C::gen_amode(ctx, arg0, arg1, I64);
-    let v8 = C::value_regs_get(ctx, arg3, 0x0);
-    let v11 = C::offset32_add(ctx, arg1, 0x8);
-    let v12 = C::gen_amode(ctx, arg0, v11, I64);
-    let v14 = C::value_regs_get(ctx, arg3, 0x1);
-    let v9 = MInst::Store {
-        to: v5,
-        op: StoreOP::Sd,
-        flags: arg2,
-        src: v8,
-    };
-    let v15 = MInst::Store {
-        to: v12,
-        op: StoreOP::Sd,
-        flags: arg2,
-        src: v14,
-    };
-    let v16 = SideEffectNoResult::Inst2 {
-        inst1: v9,
-        inst2: v15,
-    };
-    let v17 = constructor_side_effect(ctx, &v16);
-    // Rule at src/isa/riscv64/inst.isle line 2282.
-    return v17;
-}
-
-// Generated as internal constructor for term gen_atomic.
-pub fn constructor_gen_atomic<C: Context>(
-    ctx: &mut C,
-    arg0: &AtomicOP,
-    arg1: Reg,
-    arg2: Reg,
-    arg3: AMO,
-) -> Reg {
-    let v4 = constructor_temp_writable_xreg(ctx);
-    let v5 = C::writable_xreg_to_writable_reg(ctx, v4);
-    let v6 = MInst::Atomic {
-        op: arg0.clone(),
-        rd: v5,
-        addr: arg1,
-        src: arg2,
-        amo: arg3,
-    };
-    let v7 = C::emit(ctx, &v6);
-    let v8 = constructor_writable_xreg_to_reg(ctx, v4);
-    // Rule at src/isa/riscv64/inst.isle line 2295.
-    return v8;
-}
-
-// Generated as internal constructor for term get_atomic_rmw_op.
-pub fn constructor_get_atomic_rmw_op<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &AtomicRmwOp,
-) -> AtomicOP {
-    match arg0 {
-        I32 => {
-            match arg1 {
-                &AtomicRmwOp::Add => {
-                    // Rule at src/isa/riscv64/inst.isle line 2304.
-                    return AtomicOP::AmoaddW;
-                }
-                &AtomicRmwOp::And => {
-                    // Rule at src/isa/riscv64/inst.isle line 2311.
-                    return AtomicOP::AmoandW;
-                }
-                &AtomicRmwOp::Or => {
-                    // Rule at src/isa/riscv64/inst.isle line 2319.
-                    return AtomicOP::AmoorW;
-                }
-                &AtomicRmwOp::Smax => {
-                    // Rule at src/isa/riscv64/inst.isle line 2327.
-                    return AtomicOP::AmomaxW;
-                }
-                &AtomicRmwOp::Smin => {
-                    // Rule at src/isa/riscv64/inst.isle line 2335.
-                    return AtomicOP::AmominW;
-                }
-                &AtomicRmwOp::Umax => {
-                    // Rule at src/isa/riscv64/inst.isle line 2343.
-                    return AtomicOP::AmomaxuW;
-                }
-                &AtomicRmwOp::Umin => {
-                    // Rule at src/isa/riscv64/inst.isle line 2352.
-                    return AtomicOP::AmominuW;
-                }
-                &AtomicRmwOp::Xchg => {
-                    // Rule at src/isa/riscv64/inst.isle line 2360.
-                    return AtomicOP::AmoswapW;
-                }
-                &AtomicRmwOp::Xor => {
-                    // Rule at src/isa/riscv64/inst.isle line 2368.
-                    return AtomicOP::AmoxorW;
-                }
-                _ => {}
-            }
-        }
-        I64 => {
-            match arg1 {
-                &AtomicRmwOp::Add => {
-                    // Rule at src/isa/riscv64/inst.isle line 2307.
-                    return AtomicOP::AmoaddD;
-                }
-                &AtomicRmwOp::And => {
-                    // Rule at src/isa/riscv64/inst.isle line 2315.
-                    return AtomicOP::AmoandD;
-                }
-                &AtomicRmwOp::Or => {
-                    // Rule at src/isa/riscv64/inst.isle line 2323.
-                    return AtomicOP::AmoorD;
-                }
-                &AtomicRmwOp::Smax => {
-                    // Rule at src/isa/riscv64/inst.isle line 2331.
-                    return AtomicOP::AmomaxD;
-                }
-                &AtomicRmwOp::Smin => {
-                    // Rule at src/isa/riscv64/inst.isle line 2339.
-                    return AtomicOP::AmominD;
-                }
-                &AtomicRmwOp::Umax => {
-                    // Rule at src/isa/riscv64/inst.isle line 2348.
-                    return AtomicOP::AmomaxuD;
-                }
-                &AtomicRmwOp::Umin => {
-                    // Rule at src/isa/riscv64/inst.isle line 2356.
-                    return AtomicOP::AmominuD;
-                }
-                &AtomicRmwOp::Xchg => {
-                    // Rule at src/isa/riscv64/inst.isle line 2364.
-                    return AtomicOP::AmoswapD;
-                }
-                &AtomicRmwOp::Xor => {
-                    // Rule at src/isa/riscv64/inst.isle line 2372.
-                    return AtomicOP::AmoxorD;
-                }
-                _ => {}
-            }
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "get_atomic_rmw_op", "src/isa/riscv64/inst.isle line 2302"
-    )
-}
-
-// Generated as internal constructor for term gen_atomic_load.
-pub fn constructor_gen_atomic_load<C: Context>(ctx: &mut C, arg0: Reg, arg1: Type) -> Reg {
-    let v2 = constructor_temp_writable_xreg(ctx);
-    let v3 = C::writable_xreg_to_writable_reg(ctx, v2);
-    let v4 = MInst::AtomicLoad {
-        rd: v3,
-        ty: arg1,
-        p: arg0,
-    };
-    let v5 = C::emit(ctx, &v4);
-    let v6 = C::writable_reg_to_reg(ctx, v3);
-    // Rule at src/isa/riscv64/inst.isle line 2381.
-    return v6;
-}
-
-// Generated as internal constructor for term gen_atomic_store.
-pub fn constructor_gen_atomic_store<C: Context>(
-    ctx: &mut C,
-    arg0: Reg,
-    arg1: Type,
-    arg2: Reg,
-) -> InstOutput {
-    let v3 = MInst::AtomicStore {
-        src: arg2,
-        ty: arg1,
-        p: arg0,
-    };
-    let v4 = SideEffectNoResult::Inst { inst: v3 };
-    let v5 = constructor_side_effect(ctx, &v4);
-    // Rule at src/isa/riscv64/inst.isle line 2390.
-    return v5;
-}
-
-// Generated as internal constructor for term gen_select.
-pub fn constructor_gen_select<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: ValueRegs,
-    arg3: ValueRegs,
-) -> ValueRegs {
-    let v4 = &C::alloc_vec_writable(ctx, arg0);
-    let v5 = &C::vec_writable_clone(ctx, v4);
-    let v6 = MInst::Select {
-        dst: v4.clone(),
-        ty: arg0,
-        condition: arg1,
-        x: arg2,
-        y: arg3,
-    };
-    let v7 = C::emit(ctx, &v6);
-    let v8 = C::vec_writable_to_regs(ctx, v5);
-    // Rule at src/isa/riscv64/inst.isle line 2401.
-    return v8;
-}
-
-// Generated as internal constructor for term gen_int_select.
-pub fn constructor_gen_int_select<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &IntSelectOP,
-    arg2: ValueRegs,
-    arg3: ValueRegs,
-) -> ValueRegs {
-    let v4 = &C::alloc_vec_writable(ctx, arg0);
-    let v5 = &C::vec_writable_clone(ctx, v4);
-    let v6 = MInst::IntSelect {
-        op: arg1.clone(),
-        dst: v5.clone(),
-        x: arg2,
-        y: arg3,
-        ty: arg0,
-    };
-    let v7 = C::emit(ctx, &v6);
-    let v8 = C::vec_writable_to_regs(ctx, v4);
-    // Rule at src/isa/riscv64/inst.isle line 2430.
-    return v8;
-}
-
-// Generated as internal constructor for term udf.
-pub fn constructor_udf<C: Context>(ctx: &mut C, arg0: &TrapCode) -> InstOutput {
-    let v1 = MInst::Udf {
-        trap_code: arg0.clone(),
-    };
-    let v2 = SideEffectNoResult::Inst { inst: v1 };
-    let v3 = constructor_side_effect(ctx, &v2);
-    // Rule at src/isa/riscv64/inst.isle line 2440.
-    return v3;
-}
-
-// Generated as internal constructor for term int_load_op.
-pub fn constructor_int_load_op<C: Context>(ctx: &mut C, arg0: bool, arg1: u8) -> LoadOP {
-    match arg1 {
-        0x8 => {
-            match arg0 {
-                true => {
-                    // Rule at src/isa/riscv64/inst.isle line 2456.
-                    return LoadOP::Lb;
-                }
-                false => {
-                    // Rule at src/isa/riscv64/inst.isle line 2452.
-                    return LoadOP::Lbu;
-                }
-                _ => {}
-            }
-        }
-        0x10 => {
-            match arg0 {
-                true => {
-                    // Rule at src/isa/riscv64/inst.isle line 2463.
-                    return LoadOP::Lh;
-                }
-                false => {
-                    // Rule at src/isa/riscv64/inst.isle line 2460.
-                    return LoadOP::Lhu;
-                }
-                _ => {}
-            }
-        }
-        0x20 => {
-            match arg0 {
-                true => {
-                    // Rule at src/isa/riscv64/inst.isle line 2469.
-                    return LoadOP::Lw;
-                }
-                false => {
-                    // Rule at src/isa/riscv64/inst.isle line 2466.
-                    return LoadOP::Lwu;
-                }
-                _ => {}
-            }
-        }
-        0x40 => {
-            // Rule at src/isa/riscv64/inst.isle line 2473.
-            return LoadOP::Ld;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "int_load_op", "src/isa/riscv64/inst.isle line 2450"
-    )
-}
-
-// Generated as internal constructor for term gen_fcvt_int.
-pub fn constructor_gen_fcvt_int<C: Context>(
-    ctx: &mut C,
-    arg0: bool,
-    arg1: FReg,
-    arg2: bool,
-    arg3: Type,
-    arg4: Type,
-) -> XReg {
-    let v5 = C::temp_writable_reg(ctx, arg4);
-    let v6 = constructor_temp_writable_freg(ctx);
-    let v7 = C::writable_freg_to_writable_reg(ctx, v6);
-    let v8 = C::freg_to_reg(ctx, arg1);
-    let v9 = MInst::FcvtToInt {
-        is_sat: arg0,
-        rd: v5,
-        tmp: v7,
-        rs: v8,
-        is_signed: arg2,
-        in_type: arg3,
-        out_type: arg4,
-    };
-    let v10 = C::emit(ctx, &v9);
-    let v11 = C::writable_reg_to_reg(ctx, v5);
-    let v12 = C::xreg_new(ctx, v11);
-    // Rule at src/isa/riscv64/inst.isle line 2486.
-    return v12;
-}
-
-// Generated as internal constructor for term lower_float_binary.
-pub fn constructor_lower_float_binary<C: Context>(
-    ctx: &mut C,
-    arg0: &AluOPRRR,
-    arg1: FReg,
-    arg2: FReg,
-    arg3: Type,
-) -> FReg {
-    let v4 = constructor_move_f_to_x(ctx, arg1, arg3);
-    let v5 = constructor_move_f_to_x(ctx, arg2, arg3);
-    let v6 = C::xreg_to_reg(ctx, v4);
-    let v7 = C::xreg_to_reg(ctx, v5);
-    let v8 = constructor_alu_rrr(ctx, arg0, v6, v7);
-    let v9 = C::xreg_new(ctx, v8);
-    let v10 = constructor_float_int_of_same_size(ctx, arg3);
-    let v11 = constructor_move_x_to_f(ctx, v9, v10);
-    // Rule at src/isa/riscv64/inst.isle line 2499.
-    return v11;
-}
-
-// Generated as internal constructor for term lower_icmp.
-pub fn constructor_lower_icmp<C: Context>(
-    ctx: &mut C,
-    arg0: &IntCC,
-    arg1: ValueRegs,
-    arg2: ValueRegs,
-    arg3: Type,
-) -> Reg {
-    let v4 = &C::signed_cond_code(ctx, arg0);
-    if let Some(v5) = v4 {
-        let v7 = constructor_ext_int_if_need(ctx, true, arg1, arg3);
-        let v8 = constructor_ext_int_if_need(ctx, true, arg2, arg3);
-        let v9 = constructor_gen_icmp(ctx, arg0, v7, v8, arg3);
-        let v10 = C::xreg_to_reg(ctx, v9);
-        // Rule at src/isa/riscv64/inst.isle line 2508.
-        return v10;
-    }
-    let v12 = constructor_ext_int_if_need(ctx, false, arg1, arg3);
-    let v13 = constructor_ext_int_if_need(ctx, false, arg2, arg3);
-    let v14 = constructor_gen_icmp(ctx, arg0, v12, v13, arg3);
-    let v15 = C::xreg_to_reg(ctx, v14);
-    // Rule at src/isa/riscv64/inst.isle line 2511.
-    return v15;
-}
-
-// Generated as internal constructor for term i128_sub.
-pub fn constructor_i128_sub<C: Context>(
-    ctx: &mut C,
-    arg0: ValueRegs,
-    arg1: ValueRegs,
-) -> ValueRegs {
-    let v3 = C::value_regs_get(ctx, arg0, 0x0);
-    let v4 = C::xreg_new(ctx, v3);
-    let v5 = C::value_regs_get(ctx, arg1, 0x0);
-    let v6 = C::xreg_new(ctx, v5);
-    let v7 = constructor_rv_sub(ctx, v4, v6);
-    let v8 = C::value_regs_get(ctx, arg0, 0x0);
-    let v9 = C::xreg_new(ctx, v8);
-    let v10 = constructor_rv_sltu(ctx, v9, v7);
-    let v12 = C::value_regs_get(ctx, arg0, 0x1);
-    let v13 = C::xreg_new(ctx, v12);
-    let v14 = C::value_regs_get(ctx, arg1, 0x1);
-    let v15 = C::xreg_new(ctx, v14);
-    let v16 = constructor_rv_sub(ctx, v13, v15);
-    let v17 = constructor_rv_sub(ctx, v16, v10);
-    let v18 = C::xreg_to_reg(ctx, v7);
-    let v19 = C::xreg_to_reg(ctx, v17);
-    let v20 = C::value_regs(ctx, v18, v19);
-    // Rule at src/isa/riscv64/inst.isle line 2517.
-    return v20;
-}
-
-// Generated as internal constructor for term lower_uadd_overflow.
-pub fn constructor_lower_uadd_overflow<C: Context>(
-    ctx: &mut C,
-    arg0: XReg,
-    arg1: XReg,
-    arg2: Type,
-) -> ValueRegs {
-    if arg2 == I64 {
-        let v3 = constructor_rv_add(ctx, arg0, arg1);
-        let v5 = C::xreg_to_reg(ctx, v3);
-        let v6 = C::value_reg(ctx, v5);
-        let v7 = C::xreg_to_reg(ctx, arg0);
-        let v8 = C::value_reg(ctx, v7);
-        let v10 = constructor_gen_icmp(ctx, &IntCC::UnsignedLessThan, v6, v8, I64);
-        let v11 = C::xreg_to_reg(ctx, v10);
-        let v12 = C::value_regs(ctx, v5, v11);
-        // Rule at src/isa/riscv64/inst.isle line 2533.
-        return v12;
-    }
-    let v13 = C::fits_in_32(ctx, arg2);
-    if let Some(v14) = v13 {
-        let v15 = constructor_zext(ctx, arg0, v14, I64);
-        let v16 = constructor_zext(ctx, arg1, v14, I64);
-        let v17 = constructor_rv_add(ctx, v15, v16);
-        let v18 = C::ty_bits(ctx, v14);
-        let v19 = C::u8_as_i32(ctx, v18);
-        let v20 = C::imm12_const(ctx, v19);
-        let v21 = constructor_rv_srli(ctx, v17, v20);
-        let v22 = C::xreg_to_reg(ctx, v17);
-        let v23 = C::xreg_to_reg(ctx, v21);
-        let v24 = C::value_regs(ctx, v22, v23);
-        // Rule at src/isa/riscv64/inst.isle line 2540.
-        return v24;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "lower_uadd_overflow", "src/isa/riscv64/inst.isle line 2531"
-    )
-}
-
-// Generated as internal constructor for term gen_jump.
-pub fn constructor_gen_jump<C: Context>(ctx: &mut C, arg0: MachLabel) -> MInst {
-    let v1 = C::label_to_br_target(ctx, arg0);
-    let v2 = MInst::Jal { dest: v1 };
-    // Rule at src/isa/riscv64/inst.isle line 2552.
-    return v2;
-}
-
-// Generated as internal constructor for term lower_branch.
-pub fn constructor_lower_branch<C: Context>(
-    ctx: &mut C,
-    arg0: Inst,
-    arg1: &VecMachLabel,
-) -> Option<Unit> {
-    let v1 = &C::inst_data(ctx, arg0);
-    match v1 {
-        &InstructionData::BranchTable {
-            opcode: ref v70,
-            arg: v71,
-            table: v72,
-        } => {
-            if let &Opcode::BrTable = v70 {
-                let v73 = C::put_in_reg(ctx, v71);
-                let v74 = C::lower_br_table(ctx, v73, arg1);
-                // Rule at src/isa/riscv64/inst.isle line 2642.
-                return Some(v74);
-            }
-        }
-        &InstructionData::Brif {
-            opcode: ref v10,
-            arg: v11,
-            blocks: ref v12,
-        } => {
-            if let &Opcode::Brif = v10 {
-                let v13 = C::value_type(ctx, v11);
-                if v13 == I128 {
-                    let v22 = C::zero_reg(ctx);
-                    let v23 = C::zero_reg(ctx);
-                    let v24 = C::value_regs(ctx, v22, v23);
-                    let v25 = C::put_in_regs(ctx, v11);
-                    let v27 = constructor_gen_icmp(ctx, &IntCC::NotEqual, v25, v24, I128);
-                    let v28 = C::xreg_to_reg(ctx, v27);
-                    let v29 = C::value_reg(ctx, v28);
-                    let v31 = C::lower_cond_br(ctx, &IntCC::NotEqual, v29, arg1, I64);
-                    // Rule at src/isa/riscv64/inst.isle line 2611.
-                    return Some(v31);
-                }
-                let v32 = C::maybe_uextend(ctx, v11);
-                if let Some(v33) = v32 {
-                    let v34 = C::def_inst(ctx, v33);
-                    if let Some(v35) = v34 {
-                        let v36 = &C::inst_data(ctx, v35);
-                        match v36 {
-                            &InstructionData::FloatCompare {
-                                opcode: ref v47,
-                                args: ref v48,
-                                cond: ref v49,
-                            } => {
-                                if let &Opcode::Fcmp = v47 {
-                                    let v54 = C::floatcc_unordered(ctx, v49);
-                                    match v54 {
-                                        true => {
-                                            let v6 = C::vec_label_get(ctx, arg1, 0x0);
-                                            let v55 = C::label_to_br_target(ctx, v6);
-                                            let v57 = C::vec_label_get(ctx, arg1, 0x1);
-                                            let v58 = C::label_to_br_target(ctx, v57);
-                                            let v59 = &C::floatcc_inverse(ctx, v49);
-                                            let v50 = C::unpack_value_array_2(ctx, v48);
-                                            let v60 = constructor_put_in_freg(ctx, v50.0);
-                                            let v61 = constructor_put_in_freg(ctx, v50.1);
-                                            let v53 = C::value_type(ctx, v50.0);
-                                            let v62 =
-                                                &constructor_emit_fcmp(ctx, v59, v53, v60, v61);
-                                            let v63 = &constructor_cond_br(ctx, v62, v58, v55);
-                                            let v64 = constructor_emit_side_effect(ctx, v63);
-                                            // Rule at src/isa/riscv64/inst.isle line 2623.
-                                            return Some(v64);
-                                        }
-                                        false => {
-                                            let v6 = C::vec_label_get(ctx, arg1, 0x0);
-                                            let v55 = C::label_to_br_target(ctx, v6);
-                                            let v57 = C::vec_label_get(ctx, arg1, 0x1);
-                                            let v58 = C::label_to_br_target(ctx, v57);
-                                            let v50 = C::unpack_value_array_2(ctx, v48);
-                                            let v65 = constructor_put_in_freg(ctx, v50.0);
-                                            let v66 = constructor_put_in_freg(ctx, v50.1);
-                                            let v53 = C::value_type(ctx, v50.0);
-                                            let v67 =
-                                                &constructor_emit_fcmp(ctx, v49, v53, v65, v66);
-                                            let v68 = &constructor_cond_br(ctx, v67, v55, v58);
-                                            let v69 = constructor_emit_side_effect(ctx, v68);
-                                            // Rule at src/isa/riscv64/inst.isle line 2630.
-                                            return Some(v69);
-                                        }
-                                        _ => {}
-                                    }
-                                }
-                            }
-                            &InstructionData::IntCompare {
-                                opcode: ref v37,
-                                args: ref v38,
-                                cond: ref v39,
-                            } => {
-                                if let &Opcode::Icmp = v37 {
-                                    let v40 = C::unpack_value_array_2(ctx, v38);
-                                    let v44 = C::put_in_regs(ctx, v40.0);
-                                    let v45 = C::put_in_regs(ctx, v40.1);
-                                    let v43 = C::value_type(ctx, v40.0);
-                                    let v46 = C::lower_br_icmp(ctx, v39, v44, v45, arg1, v43);
-                                    // Rule at src/isa/riscv64/inst.isle line 2618.
-                                    return Some(v46);
-                                }
-                            }
-                            _ => {}
-                        }
-                    }
-                }
-                let v18 = C::put_in_regs(ctx, v11);
-                let v20 = constructor_normalize_cmp_value(ctx, v13, v18, &ExtendOp::Zero);
-                let v21 = C::lower_cond_br(ctx, &IntCC::NotEqual, v20, arg1, v13);
-                // Rule at src/isa/riscv64/inst.isle line 2607.
-                return Some(v21);
-            }
-        }
-        &InstructionData::Jump {
-            opcode: ref v2,
-            destination: v3,
-        } => {
-            if let &Opcode::Jump = v2 {
-                let v6 = C::vec_label_get(ctx, arg1, 0x0);
-                let v7 = &constructor_gen_jump(ctx, v6);
-                let v8 = SideEffectNoResult::Inst { inst: v7.clone() };
-                let v9 = constructor_emit_side_effect(ctx, &v8);
-                // Rule at src/isa/riscv64/inst.isle line 2559.
-                return Some(v9);
-            }
-        }
-        _ => {}
-    }
-    None
-}
-
-// Generated as internal constructor for term normalize_cmp_value.
-pub fn constructor_normalize_cmp_value<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: ValueRegs,
-    arg2: &ExtendOp,
-) -> ValueRegs {
-    let v1 = C::fits_in_32(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v6 = constructor_extend(ctx, arg1, arg2, v2, I64);
-        // Rule at src/isa/riscv64/inst.isle line 2582.
-        return v6;
-    }
-    match arg0 {
-        I64 => {
-            // Rule at src/isa/riscv64/inst.isle line 2585.
-            return arg1;
-        }
-        I128 => {
-            // Rule at src/isa/riscv64/inst.isle line 2586.
-            return arg1;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "normalize_cmp_value", "src/isa/riscv64/inst.isle line 2580"
-    )
-}
-
-// Generated as internal constructor for term normalize_fcvt_from_int.
-pub fn constructor_normalize_fcvt_from_int<C: Context>(
-    ctx: &mut C,
-    arg0: XReg,
-    arg1: Type,
-    arg2: &ExtendOp,
-) -> XReg {
-    let v2 = C::fits_in_16(ctx, arg1);
-    if let Some(v3) = v2 {
-        let v5 = C::xreg_to_reg(ctx, arg0);
-        let v6 = C::value_reg(ctx, v5);
-        let v8 = constructor_extend(ctx, v6, arg2, v3, I64);
-        let v10 = C::value_regs_get(ctx, v8, 0x0);
-        let v11 = C::xreg_new(ctx, v10);
-        // Rule at src/isa/riscv64/inst.isle line 2589.
-        return v11;
-    }
-    // Rule at src/isa/riscv64/inst.isle line 2591.
-    return arg0;
-}
-
-// Generated as internal constructor for term truthy_to_reg.
-pub fn constructor_truthy_to_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: ValueRegs) -> XReg {
-    let v1 = C::fits_in_64(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v5 = C::value_regs_get(ctx, arg1, 0x0);
-        let v6 = C::xreg_new(ctx, v5);
-        // Rule at src/isa/riscv64/inst.isle line 2598.
-        return v6;
-    }
-    if arg0 == I128 {
-        let v5 = C::value_regs_get(ctx, arg1, 0x0);
-        let v6 = C::xreg_new(ctx, v5);
-        let v8 = C::value_regs_get(ctx, arg1, 0x1);
-        let v9 = C::xreg_new(ctx, v8);
-        let v10 = constructor_rv_or(ctx, v6, v9);
-        // Rule at src/isa/riscv64/inst.isle line 2600.
-        return v10;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "truthy_to_reg", "src/isa/riscv64/inst.isle line 2597"
-    )
-}
-
-// Generated as internal constructor for term gen_bitcast.
-pub fn constructor_gen_bitcast<C: Context>(ctx: &mut C, arg0: Reg, arg1: Type, arg2: Type) -> Reg {
-    match arg1 {
-        I32 => {
-            if arg2 == F32 {
-                let v8 = C::xreg_new(ctx, arg0);
-                let v9 = constructor_rv_fmvwx(ctx, v8);
-                let v10 = C::freg_to_reg(ctx, v9);
-                // Rule at src/isa/riscv64/inst.isle line 2654.
-                return v10;
-            }
-        }
-        I64 => {
-            if arg2 == F64 {
-                let v8 = C::xreg_new(ctx, arg0);
-                let v11 = constructor_rv_fmvdx(ctx, v8);
-                let v12 = C::freg_to_reg(ctx, v11);
-                // Rule at src/isa/riscv64/inst.isle line 2655.
-                return v12;
-            }
-        }
-        F32 => {
-            if arg2 == I32 {
-                let v3 = C::freg_new(ctx, arg0);
-                let v4 = constructor_rv_fmvxw(ctx, v3);
-                let v5 = C::xreg_to_reg(ctx, v4);
-                // Rule at src/isa/riscv64/inst.isle line 2652.
-                return v5;
-            }
-        }
-        F64 => {
-            if arg2 == I64 {
-                let v3 = C::freg_new(ctx, arg0);
-                let v6 = constructor_rv_fmvxd(ctx, v3);
-                let v7 = C::xreg_to_reg(ctx, v6);
-                // Rule at src/isa/riscv64/inst.isle line 2653.
-                return v7;
-            }
-        }
-        _ => {}
-    }
-    // Rule at src/isa/riscv64/inst.isle line 2656.
-    return arg0;
-}
-
-// Generated as internal constructor for term move_f_to_x.
-pub fn constructor_move_f_to_x<C: Context>(ctx: &mut C, arg0: FReg, arg1: Type) -> XReg {
-    match arg1 {
-        F32 => {
-            let v2 = C::freg_to_reg(ctx, arg0);
-            let v5 = constructor_gen_bitcast(ctx, v2, F32, I32);
-            let v6 = C::xreg_new(ctx, v5);
-            // Rule at src/isa/riscv64/inst.isle line 2659.
-            return v6;
-        }
-        F64 => {
-            let v2 = C::freg_to_reg(ctx, arg0);
-            let v9 = constructor_gen_bitcast(ctx, v2, F64, I64);
-            let v10 = C::xreg_new(ctx, v9);
-            // Rule at src/isa/riscv64/inst.isle line 2660.
-            return v10;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "move_f_to_x", "src/isa/riscv64/inst.isle line 2658"
-    )
-}
-
-// Generated as internal constructor for term move_x_to_f.
-pub fn constructor_move_x_to_f<C: Context>(ctx: &mut C, arg0: XReg, arg1: Type) -> FReg {
-    match arg1 {
-        I32 => {
-            let v2 = C::xreg_to_reg(ctx, arg0);
-            let v5 = constructor_gen_bitcast(ctx, v2, I32, F32);
-            let v6 = C::freg_new(ctx, v5);
-            // Rule at src/isa/riscv64/inst.isle line 2663.
-            return v6;
-        }
-        I64 => {
-            let v2 = C::xreg_to_reg(ctx, arg0);
-            let v9 = constructor_gen_bitcast(ctx, v2, I64, F64);
-            let v10 = C::freg_new(ctx, v9);
-            // Rule at src/isa/riscv64/inst.isle line 2664.
-            return v10;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "move_x_to_f", "src/isa/riscv64/inst.isle line 2662"
-    )
-}
-
-// Generated as internal constructor for term float_int_of_same_size.
-pub fn constructor_float_int_of_same_size<C: Context>(ctx: &mut C, arg0: Type) -> Type {
-    match arg0 {
-        F32 => {
-            // Rule at src/isa/riscv64/inst.isle line 2667.
-            return I32;
-        }
-        F64 => {
-            // Rule at src/isa/riscv64/inst.isle line 2668.
-            return I64;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "float_int_of_same_size", "src/isa/riscv64/inst.isle line 2666"
-    )
-}
-
-// Generated as internal constructor for term gen_rev8.
-pub fn constructor_gen_rev8<C: Context>(ctx: &mut C, arg0: XReg) -> XReg {
-    let v1 = C::has_zbb(ctx);
-    match v1 {
-        true => {
-            let v2 = constructor_rv_rev8(ctx, arg0);
-            // Rule at src/isa/riscv64/inst.isle line 2672.
-            return v2;
-        }
-        false => {
-            let v3 = constructor_temp_writable_xreg(ctx);
-            let v4 = constructor_temp_writable_xreg(ctx);
-            let v5 = constructor_temp_writable_xreg(ctx);
-            let v6 = C::xreg_to_reg(ctx, arg0);
-            let v7 = C::writable_xreg_to_writable_reg(ctx, v5);
-            let v8 = C::writable_xreg_to_writable_reg(ctx, v4);
-            let v9 = C::writable_xreg_to_writable_reg(ctx, v3);
-            let v10 = MInst::Rev8 {
-                rs: v6,
-                step: v7,
-                tmp: v8,
-                rd: v9,
-            };
-            let v11 = C::emit(ctx, &v10);
-            let v12 = C::writable_reg_to_reg(ctx, v9);
-            let v13 = C::xreg_new(ctx, v12);
-            // Rule at src/isa/riscv64/inst.isle line 2678.
-            return v13;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "gen_rev8", "src/isa/riscv64/inst.isle line 2671"
-    )
-}
-
-// Generated as internal constructor for term gen_brev8.
-pub fn constructor_gen_brev8<C: Context>(ctx: &mut C, arg0: Reg, arg1: Type) -> Reg {
-    let v2 = C::has_zbkb(ctx);
-    match v2 {
-        true => {
-            let v3 = C::xreg_new(ctx, arg0);
-            let v4 = constructor_rv_brev8(ctx, v3);
-            let v5 = C::xreg_to_reg(ctx, v4);
-            // Rule at src/isa/riscv64/inst.isle line 2689.
-            return v5;
-        }
-        false => {
-            let v6 = constructor_temp_writable_xreg(ctx);
-            let v7 = constructor_temp_writable_xreg(ctx);
-            let v8 = constructor_temp_writable_xreg(ctx);
-            let v9 = constructor_temp_writable_xreg(ctx);
-            let v10 = C::writable_xreg_to_writable_reg(ctx, v8);
-            let v11 = C::writable_xreg_to_writable_reg(ctx, v6);
-            let v12 = C::writable_xreg_to_writable_reg(ctx, v7);
-            let v13 = C::writable_xreg_to_writable_reg(ctx, v9);
-            let v14 = MInst::Brev8 {
-                rs: arg0,
-                ty: arg1,
-                step: v10,
-                tmp: v11,
-                tmp2: v12,
-                rd: v13,
-            };
-            let v15 = C::emit(ctx, &v14);
-            let v16 = C::writable_reg_to_reg(ctx, v13);
-            // Rule at src/isa/riscv64/inst.isle line 2694.
-            return v16;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "gen_brev8", "src/isa/riscv64/inst.isle line 2688"
-    )
-}
-
-// Generated as internal constructor for term neg.
-pub fn constructor_neg<C: Context>(ctx: &mut C, arg0: Type, arg1: ValueRegs) -> ValueRegs {
-    if arg0 == I128 {
-        let v12 = constructor_value_regs_zero(ctx);
-        let v13 = constructor_i128_sub(ctx, v12, arg1);
-        // Rule at src/isa/riscv64/inst.isle line 2711.
-        return v13;
-    }
-    let v1 = C::fits_in_64(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v3 = C::ty_int(ctx, v2);
-        if let Some(v4) = v3 {
-            let v7 = C::value_regs_get(ctx, arg1, 0x0);
-            let v8 = C::xreg_new(ctx, v7);
-            let v9 = constructor_rv_neg(ctx, v8);
-            let v10 = C::xreg_to_reg(ctx, v9);
-            let v11 = C::value_reg(ctx, v10);
-            // Rule at src/isa/riscv64/inst.isle line 2707.
-            return v11;
-        }
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "neg", "src/isa/riscv64/inst.isle line 2706"
-    )
-}
-
-// Generated as internal constructor for term max.
-pub fn constructor_max<C: Context>(ctx: &mut C, arg0: Type, arg1: XReg, arg2: XReg) -> XReg {
-    let v1 = C::fits_in_64(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v3 = C::ty_int(ctx, v2);
-        if let Some(v4) = v3 {
-            let v7 = C::has_zbb(ctx);
-            match v7 {
-                true => {
-                    let v8 = constructor_rv_max(ctx, arg1, arg2);
-                    // Rule at src/isa/riscv64/inst.isle line 2717.
-                    return v8;
-                }
-                false => {
-                    let v10 = C::xreg_to_reg(ctx, arg1);
-                    let v11 = C::xreg_to_reg(ctx, arg2);
-                    let v12 =
-                        C::gen_select_reg(ctx, &IntCC::SignedGreaterThan, arg1, arg2, v10, v11);
-                    let v13 = C::xreg_new(ctx, v12);
-                    // Rule at src/isa/riscv64/inst.isle line 2721.
-                    return v13;
-                }
-                _ => {}
-            }
-        }
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "max", "src/isa/riscv64/inst.isle line 2716"
-    )
-}
-
-// Generated as internal constructor for term gen_trapif.
-pub fn constructor_gen_trapif<C: Context>(ctx: &mut C, arg0: XReg, arg1: &TrapCode) -> InstOutput {
-    let v2 = C::xreg_to_reg(ctx, arg0);
-    let v3 = MInst::TrapIf {
-        test: v2,
-        trap_code: arg1.clone(),
-    };
-    let v4 = SideEffectNoResult::Inst { inst: v3 };
-    let v5 = constructor_side_effect(ctx, &v4);
-    // Rule at src/isa/riscv64/inst.isle line 2728.
-    return v5;
-}
-
-// Generated as internal constructor for term gen_trapifc.
-pub fn constructor_gen_trapifc<C: Context>(
-    ctx: &mut C,
-    arg0: &IntCC,
-    arg1: XReg,
-    arg2: XReg,
-    arg3: &TrapCode,
-) -> InstOutput {
-    let v4 = C::xreg_to_reg(ctx, arg1);
-    let v5 = C::xreg_to_reg(ctx, arg2);
-    let v6 = MInst::TrapIfC {
-        rs1: v4,
-        rs2: v5,
-        cc: arg0.clone(),
-        trap_code: arg3.clone(),
-    };
-    let v7 = SideEffectNoResult::Inst { inst: v6 };
-    let v8 = constructor_side_effect(ctx, &v7);
-    // Rule at src/isa/riscv64/inst.isle line 2733.
-    return v8;
-}
-
-// Generated as internal constructor for term gen_div_overflow.
-pub fn constructor_gen_div_overflow<C: Context>(
-    ctx: &mut C,
-    arg0: XReg,
-    arg1: XReg,
-    arg2: Type,
-) -> InstOutput {
-    let v4 = constructor_load_imm12(ctx, -0x1);
-    let v5 = C::xreg_new(ctx, v4);
-    let v7 = constructor_load_imm12(ctx, 0x1);
-    let v8 = C::xreg_new(ctx, v7);
-    let v10 = C::imm12_const(ctx, 0x3F);
-    let v11 = constructor_rv_slli(ctx, v8, v10);
-    let v12 = C::shift_int_to_most_significant(ctx, arg0, arg2);
-    let v14 = C::xreg_to_reg(ctx, v5);
-    let v15 = C::value_reg(ctx, v14);
-    let v16 = C::xreg_to_reg(ctx, arg1);
-    let v17 = C::value_reg(ctx, v16);
-    let v18 = constructor_gen_icmp(ctx, &IntCC::Equal, v15, v17, arg2);
-    let v19 = C::xreg_to_reg(ctx, v11);
-    let v20 = C::value_reg(ctx, v19);
-    let v21 = C::xreg_to_reg(ctx, v12);
-    let v22 = C::value_reg(ctx, v21);
-    let v23 = constructor_gen_icmp(ctx, &IntCC::Equal, v20, v22, arg2);
-    let v24 = constructor_rv_and(ctx, v18, v23);
-    let v26 = constructor_gen_trapif(ctx, v24, &TrapCode::IntegerOverflow);
-    // Rule at src/isa/riscv64/inst.isle line 2742.
-    return v26;
-}
-
-// Generated as internal constructor for term gen_div_by_zero.
-pub fn constructor_gen_div_by_zero<C: Context>(ctx: &mut C, arg0: XReg) -> InstOutput {
-    let v2 = C::zero_reg(ctx);
-    let v3 = C::xreg_new(ctx, v2);
-    let v5 = constructor_gen_trapifc(
-        ctx,
-        &IntCC::Equal,
-        v3,
-        arg0,
-        &TrapCode::IntegerDivisionByZero,
-    );
-    // Rule at src/isa/riscv64/inst.isle line 2754.
-    return v5;
-}
-
-// Generated as internal constructor for term madd.
-pub fn constructor_madd<C: Context>(ctx: &mut C, arg0: XReg, arg1: XReg, arg2: XReg) -> XReg {
-    let v3 = constructor_rv_mul(ctx, arg0, arg1);
-    let v4 = constructor_rv_add(ctx, v3, arg2);
-    // Rule at src/isa/riscv64/inst.isle line 2768.
-    return v4;
-}
-
-// Generated as internal constructor for term lower_bmask.
-pub fn constructor_lower_bmask<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Type,
-    arg2: ValueRegs,
-) -> ValueRegs {
-    if arg0 == I128 {
-        if arg1 == I128 {
-            let v30 = constructor_lower_bmask(ctx, I64, I128, arg2);
-            let v31 = C::value_regs_get(ctx, v30, 0x0);
-            let v32 = C::value_regs_get(ctx, v30, 0x0);
-            let v33 = C::value_regs(ctx, v31, v32);
-            // Rule at src/isa/riscv64/inst.isle line 2809.
-            return v33;
-        }
-        let v4 = C::fits_in_64(ctx, arg1);
-        if let Some(v5) = v4 {
-            let v25 = constructor_lower_bmask(ctx, I64, v5, arg2);
-            let v26 = C::value_regs_get(ctx, v25, 0x0);
-            let v27 = C::value_regs_get(ctx, v25, 0x0);
-            let v28 = C::value_regs(ctx, v26, v27);
-            // Rule at src/isa/riscv64/inst.isle line 2800.
-            return v28;
-        }
-    }
-    let v1 = C::fits_in_64(ctx, arg0);
-    if let Some(v2) = v1 {
-        if arg1 == I128 {
-            let v15 = C::value_regs_get(ctx, arg2, 0x0);
-            let v16 = C::xreg_new(ctx, v15);
-            let v18 = C::value_regs_get(ctx, arg2, 0x1);
-            let v19 = C::xreg_new(ctx, v18);
-            let v20 = constructor_rv_or(ctx, v16, v19);
-            let v22 = C::xreg_to_reg(ctx, v20);
-            let v23 = C::value_reg(ctx, v22);
-            let v24 = constructor_lower_bmask(ctx, v2, I64, v23);
-            // Rule at src/isa/riscv64/inst.isle line 2790.
-            return v24;
-        }
-        let v4 = C::fits_in_64(ctx, arg1);
-        if let Some(v5) = v4 {
-            let v8 = constructor_normalize_cmp_value(ctx, v5, arg2, &ExtendOp::Zero);
-            let v9 = constructor_truthy_to_reg(ctx, v5, v8);
-            let v10 = constructor_rv_snez(ctx, v9);
-            let v11 = constructor_rv_neg(ctx, v10);
-            let v12 = C::xreg_to_reg(ctx, v11);
-            let v13 = C::value_reg(ctx, v12);
-            // Rule at src/isa/riscv64/inst.isle line 2781.
-            return v13;
-        }
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "lower_bmask", "src/isa/riscv64/inst.isle line 2775"
-    )
-}
-
-// Generated as internal constructor for term gen_mov_from_preg.
-pub fn constructor_gen_mov_from_preg<C: Context>(ctx: &mut C, arg0: PReg) -> Reg {
-    let v1 = constructor_temp_writable_xreg(ctx);
-    let v2 = C::writable_xreg_to_writable_reg(ctx, v1);
-    let v3 = MInst::MovFromPReg { rd: v2, rm: arg0 };
-    let v4 = C::emit(ctx, &v3);
-    let v5 = constructor_writable_xreg_to_reg(ctx, v1);
-    // Rule at src/isa/riscv64/inst.isle line 2820.
-    return v5;
-}
-
-// Generated as internal constructor for term value_regs_zero.
-pub fn constructor_value_regs_zero<C: Context>(ctx: &mut C) -> ValueRegs {
-    let v2 = C::imm(ctx, I64, 0x0);
-    let v3 = C::imm(ctx, I64, 0x0);
-    let v4 = C::value_regs(ctx, v2, v3);
-    // Rule at src/isa/riscv64/inst.isle line 2836.
-    return v4;
-}
-
-// Generated as internal constructor for term not.
-pub fn constructor_not<C: Context>(ctx: &mut C, arg0: XReg) -> XReg {
-    let v2 = C::imm_from_bits(ctx, 0x1);
-    let v3 = constructor_rv_xori(ctx, arg0, v2);
-    // Rule at src/isa/riscv64/inst.isle line 2846.
-    return v3;
-}
-
-// Generated as internal constructor for term is_not_nan.
-pub fn constructor_is_not_nan<C: Context>(ctx: &mut C, arg0: Type, arg1: FReg) -> XReg {
-    let v2 = constructor_rv_feq(ctx, arg0, arg1, arg1);
-    // Rule at src/isa/riscv64/inst.isle line 2849.
-    return v2;
-}
-
-// Generated as internal constructor for term ordered.
-pub fn constructor_ordered<C: Context>(ctx: &mut C, arg0: Type, arg1: FReg, arg2: FReg) -> XReg {
-    let v3 = constructor_is_not_nan(ctx, arg0, arg1);
-    let v4 = constructor_is_not_nan(ctx, arg0, arg2);
-    let v5 = constructor_rv_and(ctx, v3, v4);
-    // Rule at src/isa/riscv64/inst.isle line 2852.
-    return v5;
-}
-
-// Generated as internal constructor for term cmp_result.
-pub fn constructor_cmp_result<C: Context>(ctx: &mut C, arg0: XReg) -> CmpResult {
-    let v2 = CmpResult::Result {
-        result: arg0,
-        invert: false,
-    };
-    // Rule at src/isa/riscv64/inst.isle line 2862.
-    return v2;
-}
-
-// Generated as internal constructor for term cmp_result_invert.
-pub fn constructor_cmp_result_invert<C: Context>(ctx: &mut C, arg0: XReg) -> CmpResult {
-    let v2 = CmpResult::Result {
-        result: arg0,
-        invert: true,
-    };
-    // Rule at src/isa/riscv64/inst.isle line 2867.
-    return v2;
-}
-
-// Generated as internal constructor for term cond_br.
-pub fn constructor_cond_br<C: Context>(
-    ctx: &mut C,
-    arg0: &CmpResult,
-    arg1: BranchTarget,
-    arg2: BranchTarget,
-) -> SideEffectNoResult {
-    let v3 = constructor_cmp_integer_compare(ctx, arg0);
-    let v4 = MInst::CondBr {
-        taken: arg1,
-        not_taken: arg2,
-        kind: v3,
-    };
-    let v5 = SideEffectNoResult::Inst { inst: v4 };
-    // Rule at src/isa/riscv64/inst.isle line 2871.
-    return v5;
-}
-
-// Generated as internal constructor for term cmp_integer_compare.
-pub fn constructor_cmp_integer_compare<C: Context>(
-    ctx: &mut C,
-    arg0: &CmpResult,
-) -> IntegerCompare {
-    if let &CmpResult::Result {
-        result: v1,
-        invert: v2,
-    } = arg0
-    {
-        match v2 {
-            true => {
-                let v4 = C::zero_reg(ctx);
-                let v5 = C::xreg_new(ctx, v4);
-                let v8 = C::int_compare(ctx, &IntCC::Equal, v1, v5);
-                // Rule at src/isa/riscv64/inst.isle line 2887.
-                return v8;
-            }
-            false => {
-                let v4 = C::zero_reg(ctx);
-                let v5 = C::xreg_new(ctx, v4);
-                let v6 = C::int_compare(ctx, &IntCC::NotEqual, v1, v5);
-                // Rule at src/isa/riscv64/inst.isle line 2883.
-                return v6;
-            }
-            _ => {}
-        }
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "cmp_integer_compare", "src/isa/riscv64/inst.isle line 2880"
-    )
-}
-
-// Generated as internal constructor for term cmp_value.
-pub fn constructor_cmp_value<C: Context>(ctx: &mut C, arg0: &CmpResult) -> XReg {
-    if let &CmpResult::Result {
-        result: v1,
-        invert: v2,
-    } = arg0
-    {
-        match v2 {
-            true => {
-                let v3 = constructor_not(ctx, v1);
-                // Rule at src/isa/riscv64/inst.isle line 2893.
-                return v3;
-            }
-            false => {
-                // Rule at src/isa/riscv64/inst.isle line 2892.
-                return v1;
-            }
-            _ => {}
-        }
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "cmp_value", "src/isa/riscv64/inst.isle line 2891"
-    )
-}
-
-// Generated as internal constructor for term emit_fcmp.
-pub fn constructor_emit_fcmp<C: Context>(
-    ctx: &mut C,
-    arg0: &FloatCC,
-    arg1: Type,
-    arg2: FReg,
-    arg3: FReg,
-) -> CmpResult {
-    match arg0 {
-        &FloatCC::Equal => {
-            let v7 = constructor_rv_feq(ctx, arg1, arg2, arg3);
-            let v8 = &constructor_cmp_result(ctx, v7);
-            // Rule at src/isa/riscv64/inst.isle line 2911.
-            return v8.clone();
-        }
-        &FloatCC::GreaterThan => {
-            let v21 = constructor_rv_fgt(ctx, arg1, arg2, arg3);
-            let v22 = &constructor_cmp_result(ctx, v21);
-            // Rule at src/isa/riscv64/inst.isle line 2942.
-            return v22.clone();
-        }
-        &FloatCC::GreaterThanOrEqual => {
-            let v23 = constructor_rv_fge(ctx, arg1, arg2, arg3);
-            let v24 = &constructor_cmp_result(ctx, v23);
-            // Rule at src/isa/riscv64/inst.isle line 2947.
-            return v24.clone();
-        }
-        &FloatCC::LessThan => {
-            let v10 = constructor_rv_flt(ctx, arg1, arg2, arg3);
-            let v18 = &constructor_cmp_result(ctx, v10);
-            // Rule at src/isa/riscv64/inst.isle line 2932.
-            return v18.clone();
-        }
-        &FloatCC::LessThanOrEqual => {
-            let v19 = constructor_rv_fle(ctx, arg1, arg2, arg3);
-            let v20 = &constructor_cmp_result(ctx, v19);
-            // Rule at src/isa/riscv64/inst.isle line 2937.
-            return v20.clone();
-        }
-        &FloatCC::NotEqual => {
-            let v7 = constructor_rv_feq(ctx, arg1, arg2, arg3);
-            let v9 = &constructor_cmp_result_invert(ctx, v7);
-            // Rule at src/isa/riscv64/inst.isle line 2917.
-            return v9.clone();
-        }
-        &FloatCC::Ordered => {
-            let v4 = constructor_ordered(ctx, arg1, arg2, arg3);
-            let v5 = &constructor_cmp_result(ctx, v4);
-            // Rule at src/isa/riscv64/inst.isle line 2900.
-            return v5.clone();
-        }
-        &FloatCC::OrderedNotEqual => {
-            let v10 = constructor_rv_flt(ctx, arg1, arg2, arg3);
-            let v11 = constructor_rv_fgt(ctx, arg1, arg2, arg3);
-            let v12 = constructor_rv_or(ctx, v10, v11);
-            let v13 = &constructor_cmp_result(ctx, v12);
-            // Rule at src/isa/riscv64/inst.isle line 2922.
-            return v13.clone();
-        }
-        &FloatCC::Unordered => {
-            let v4 = constructor_ordered(ctx, arg1, arg2, arg3);
-            let v6 = &constructor_cmp_result_invert(ctx, v4);
-            // Rule at src/isa/riscv64/inst.isle line 2906.
-            return v6.clone();
-        }
-        &FloatCC::UnorderedOrEqual => {
-            let v4 = constructor_ordered(ctx, arg1, arg2, arg3);
-            let v14 = constructor_not(ctx, v4);
-            let v15 = constructor_rv_feq(ctx, arg1, arg2, arg3);
-            let v16 = constructor_rv_or(ctx, v14, v15);
-            let v17 = &constructor_cmp_result(ctx, v16);
-            // Rule at src/isa/riscv64/inst.isle line 2927.
-            return v17.clone();
-        }
-        &FloatCC::UnorderedOrGreaterThan => {
-            let v4 = constructor_ordered(ctx, arg1, arg2, arg3);
-            let v30 = constructor_rv_fle(ctx, arg1, arg2, arg3);
-            let v31 = constructor_rv_and(ctx, v4, v30);
-            let v32 = &constructor_cmp_result_invert(ctx, v31);
-            // Rule at src/isa/riscv64/inst.isle line 2965.
-            return v32.clone();
-        }
-        &FloatCC::UnorderedOrGreaterThanOrEqual => {
-            let v4 = constructor_ordered(ctx, arg1, arg2, arg3);
-            let v33 = constructor_rv_flt(ctx, arg1, arg2, arg3);
-            let v34 = constructor_rv_and(ctx, v4, v33);
-            let v35 = &constructor_cmp_result_invert(ctx, v34);
-            // Rule at src/isa/riscv64/inst.isle line 2971.
-            return v35.clone();
-        }
-        &FloatCC::UnorderedOrLessThan => {
-            let v4 = constructor_ordered(ctx, arg1, arg2, arg3);
-            let v25 = constructor_rv_fge(ctx, arg1, arg2, arg3);
-            let v26 = constructor_rv_and(ctx, v4, v25);
-            let v27 = &constructor_cmp_result_invert(ctx, v26);
-            // Rule at src/isa/riscv64/inst.isle line 2953.
-            return v27.clone();
-        }
-        &FloatCC::UnorderedOrLessThanOrEqual => {
-            let v4 = constructor_ordered(ctx, arg1, arg2, arg3);
-            let v11 = constructor_rv_fgt(ctx, arg1, arg2, arg3);
-            let v28 = constructor_rv_and(ctx, v4, v11);
-            let v29 = &constructor_cmp_result_invert(ctx, v28);
-            // Rule at src/isa/riscv64/inst.isle line 2959.
-            return v29.clone();
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "emit_fcmp", "src/isa/riscv64/inst.isle line 2896"
-    )
-}
-
-// Generated as internal constructor for term masked.
-pub fn constructor_masked<C: Context>(ctx: &mut C, arg0: VReg) -> VecOpMasking {
-    let v1 = C::vreg_to_reg(ctx, arg0);
-    let v2 = VecOpMasking::Enabled { reg: v1 };
-    // Rule at src/isa/riscv64/inst_vector.isle line 85.
-    return v2;
-}
-
-// Generated as internal constructor for term unmasked.
-pub fn constructor_unmasked<C: Context>(ctx: &mut C) -> VecOpMasking {
-    // Rule at src/isa/riscv64/inst_vector.isle line 88.
-    return VecOpMasking::Disabled;
-}
-
-// Generated as internal constructor for term element_width_from_type.
-pub fn constructor_element_width_from_type<C: Context>(ctx: &mut C, arg0: Type) -> VecElementWidth {
-    let v1 = C::lane_type(ctx, arg0);
-    match v1 {
-        I8 => {
-            // Rule at src/isa/riscv64/inst_vector.isle line 303.
-            return VecElementWidth::E8;
-        }
-        I16 => {
-            // Rule at src/isa/riscv64/inst_vector.isle line 306.
-            return VecElementWidth::E16;
-        }
-        I32 => {
-            // Rule at src/isa/riscv64/inst_vector.isle line 309.
-            return VecElementWidth::E32;
-        }
-        I64 => {
-            // Rule at src/isa/riscv64/inst_vector.isle line 315.
-            return VecElementWidth::E64;
-        }
-        F32 => {
-            // Rule at src/isa/riscv64/inst_vector.isle line 312.
-            return VecElementWidth::E32;
-        }
-        F64 => {
-            // Rule at src/isa/riscv64/inst_vector.isle line 318.
-            return VecElementWidth::E64;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "element_width_from_type", "src/isa/riscv64/inst_vector.isle line 302"
-    )
-}
-
-// Generated as internal constructor for term vec_alu_rrr_imm5.
-pub fn constructor_vec_alu_rrr_imm5<C: Context>(
-    ctx: &mut C,
-    arg0: &VecAluOpRRRImm5,
-    arg1: VReg,
-    arg2: VReg,
-    arg3: Imm5,
-    arg4: &VecOpMasking,
-    arg5: VState,
-) -> VReg {
-    let v6 = constructor_temp_writable_vreg(ctx);
-    let v7 = C::writable_vreg_to_writable_reg(ctx, v6);
-    let v8 = C::vreg_to_reg(ctx, arg1);
-    let v9 = C::vreg_to_reg(ctx, arg2);
-    let v10 = MInst::VecAluRRRImm5 {
-        op: arg0.clone(),
-        vd: v7,
-        vd_src: v8,
-        vs2: v9,
-        imm: arg3,
-        mask: arg4.clone(),
-        vstate: arg5,
-    };
-    let v11 = C::emit(ctx, &v10);
-    let v12 = C::writable_vreg_to_vreg(ctx, v6);
-    // Rule at src/isa/riscv64/inst_vector.isle line 341.
-    return v12;
-}
-
-// Generated as internal constructor for term vec_alu_rrr_uimm5.
-pub fn constructor_vec_alu_rrr_uimm5<C: Context>(
-    ctx: &mut C,
-    arg0: &VecAluOpRRRImm5,
-    arg1: VReg,
-    arg2: VReg,
-    arg3: UImm5,
-    arg4: &VecOpMasking,
-    arg5: VState,
-) -> VReg {
-    let v6 = C::uimm5_bitcast_to_imm5(ctx, arg3);
-    let v7 = constructor_vec_alu_rrr_imm5(ctx, arg0, arg1, arg2, v6, arg4, arg5);
-    // Rule at src/isa/riscv64/inst_vector.isle line 349.
-    return v7;
-}
-
-// Generated as internal constructor for term vec_alu_rrr.
-pub fn constructor_vec_alu_rrr<C: Context>(
-    ctx: &mut C,
-    arg0: &VecAluOpRRR,
-    arg1: Reg,
-    arg2: Reg,
-    arg3: &VecOpMasking,
-    arg4: VState,
-) -> Reg {
-    let v5 = constructor_temp_writable_vreg(ctx);
-    let v6 = C::writable_vreg_to_writable_reg(ctx, v5);
-    let v7 = MInst::VecAluRRR {
-        op: arg0.clone(),
-        vd: v6,
-        vs2: arg1,
-        vs1: arg2,
-        mask: arg3.clone(),
-        vstate: arg4,
-    };
-    let v8 = C::emit(ctx, &v7);
-    let v9 = constructor_writable_vreg_to_reg(ctx, v5);
-    // Rule at src/isa/riscv64/inst_vector.isle line 354.
-    return v9;
-}
-
-// Generated as internal constructor for term vec_alu_rr_imm5.
-pub fn constructor_vec_alu_rr_imm5<C: Context>(
-    ctx: &mut C,
-    arg0: &VecAluOpRRImm5,
-    arg1: Reg,
-    arg2: Imm5,
-    arg3: &VecOpMasking,
-    arg4: VState,
-) -> Reg {
-    let v5 = constructor_temp_writable_vreg(ctx);
-    let v6 = C::writable_vreg_to_writable_reg(ctx, v5);
-    let v7 = MInst::VecAluRRImm5 {
-        op: arg0.clone(),
-        vd: v6,
-        vs2: arg1,
-        imm: arg2,
-        mask: arg3.clone(),
-        vstate: arg4,
-    };
-    let v8 = C::emit(ctx, &v7);
-    let v9 = constructor_writable_vreg_to_reg(ctx, v5);
-    // Rule at src/isa/riscv64/inst_vector.isle line 361.
-    return v9;
-}
-
-// Generated as internal constructor for term vec_alu_rr_uimm5.
-pub fn constructor_vec_alu_rr_uimm5<C: Context>(
-    ctx: &mut C,
-    arg0: &VecAluOpRRImm5,
-    arg1: Reg,
-    arg2: UImm5,
-    arg3: &VecOpMasking,
-    arg4: VState,
-) -> Reg {
-    let v5 = C::uimm5_bitcast_to_imm5(ctx, arg2);
-    let v6 = constructor_vec_alu_rr_imm5(ctx, arg0, arg1, v5, arg3, arg4);
-    // Rule at src/isa/riscv64/inst_vector.isle line 369.
-    return v6;
-}
-
-// Generated as internal constructor for term vec_alu_rr.
-pub fn constructor_vec_alu_rr<C: Context>(
-    ctx: &mut C,
-    arg0: &VecAluOpRR,
-    arg1: Reg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> Reg {
-    let v4 = C::vec_alu_rr_dst_type(ctx, arg0);
-    let v5 = C::temp_writable_reg(ctx, v4);
-    let v6 = MInst::VecAluRR {
-        op: arg0.clone(),
-        vd: v5,
-        vs: arg1,
-        mask: arg2.clone(),
-        vstate: arg3,
-    };
-    let v7 = C::emit(ctx, &v6);
-    let v8 = C::writable_reg_to_reg(ctx, v5);
-    // Rule at src/isa/riscv64/inst_vector.isle line 375.
-    return v8;
-}
-
-// Generated as internal constructor for term vec_alu_r_imm5.
-pub fn constructor_vec_alu_r_imm5<C: Context>(
-    ctx: &mut C,
-    arg0: &VecAluOpRImm5,
-    arg1: Imm5,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> Reg {
-    let v4 = constructor_temp_writable_vreg(ctx);
-    let v5 = C::writable_vreg_to_writable_reg(ctx, v4);
-    let v6 = MInst::VecAluRImm5 {
-        op: arg0.clone(),
-        vd: v5,
-        imm: arg1,
-        mask: arg2.clone(),
-        vstate: arg3,
-    };
-    let v7 = C::emit(ctx, &v6);
-    let v8 = constructor_writable_vreg_to_reg(ctx, v4);
-    // Rule at src/isa/riscv64/inst_vector.isle line 382.
-    return v8;
-}
-
-// Generated as internal constructor for term vec_load.
-pub fn constructor_vec_load<C: Context>(
-    ctx: &mut C,
-    arg0: &VecElementWidth,
-    arg1: &VecAMode,
-    arg2: MemFlags,
-    arg3: &VecOpMasking,
-    arg4: VState,
-) -> Reg {
-    let v5 = constructor_temp_writable_vreg(ctx);
-    let v6 = C::writable_vreg_to_writable_reg(ctx, v5);
-    let v7 = MInst::VecLoad {
-        eew: arg0.clone(),
-        to: v6,
-        from: arg1.clone(),
-        flags: arg2,
-        mask: arg3.clone(),
-        vstate: arg4,
-    };
-    let v8 = C::emit(ctx, &v7);
-    let v9 = constructor_writable_vreg_to_reg(ctx, v5);
-    // Rule at src/isa/riscv64/inst_vector.isle line 389.
-    return v9;
-}
-
-// Generated as internal constructor for term vec_store.
-pub fn constructor_vec_store<C: Context>(
-    ctx: &mut C,
-    arg0: &VecElementWidth,
-    arg1: &VecAMode,
-    arg2: VReg,
-    arg3: MemFlags,
-    arg4: &VecOpMasking,
-    arg5: VState,
-) -> InstOutput {
-    let v6 = C::vreg_to_reg(ctx, arg2);
-    let v7 = MInst::VecStore {
-        eew: arg0.clone(),
-        to: arg1.clone(),
-        from: v6,
-        flags: arg3,
-        mask: arg4.clone(),
-        vstate: arg5,
-    };
-    let v8 = SideEffectNoResult::Inst { inst: v7 };
-    let v9 = constructor_side_effect(ctx, &v8);
-    // Rule at src/isa/riscv64/inst_vector.isle line 396.
-    return v9;
-}
-
-// Generated as internal constructor for term rv_vadd_vv.
-pub fn constructor_rv_vadd_vv<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::vreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VaddVV, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 402.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vadd_vx.
-pub fn constructor_rv_vadd_vx<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: XReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::xreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VaddVX, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 407.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vadd_vi.
-pub fn constructor_rv_vadd_vi<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: Imm5,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = constructor_vec_alu_rr_imm5(ctx, &VecAluOpRRImm5::VaddVI, v5, arg1, arg2, arg3);
-    let v7 = C::vreg_new(ctx, v6);
-    // Rule at src/isa/riscv64/inst_vector.isle line 412.
-    return v7;
-}
-
-// Generated as internal constructor for term rv_vsadd_vv.
-pub fn constructor_rv_vsadd_vv<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::vreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VsaddVV, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 417.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vsadd_vx.
-pub fn constructor_rv_vsadd_vx<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: XReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::xreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VsaddVX, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 422.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vsadd_vi.
-pub fn constructor_rv_vsadd_vi<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: Imm5,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = constructor_vec_alu_rr_imm5(ctx, &VecAluOpRRImm5::VsaddVI, v5, arg1, arg2, arg3);
-    let v7 = C::vreg_new(ctx, v6);
-    // Rule at src/isa/riscv64/inst_vector.isle line 427.
-    return v7;
-}
-
-// Generated as internal constructor for term rv_vsaddu_vv.
-pub fn constructor_rv_vsaddu_vv<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::vreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VsadduVV, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 432.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vsaddu_vx.
-pub fn constructor_rv_vsaddu_vx<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: XReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::xreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VsadduVX, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 437.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vsaddu_vi.
-pub fn constructor_rv_vsaddu_vi<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: Imm5,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = constructor_vec_alu_rr_imm5(ctx, &VecAluOpRRImm5::VsadduVI, v5, arg1, arg2, arg3);
-    let v7 = C::vreg_new(ctx, v6);
-    // Rule at src/isa/riscv64/inst_vector.isle line 442.
-    return v7;
-}
-
-// Generated as internal constructor for term rv_vwadd_vv.
-pub fn constructor_rv_vwadd_vv<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::vreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VwaddVV, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 449.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vwadd_vx.
-pub fn constructor_rv_vwadd_vx<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: XReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::xreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VwaddVX, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 456.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vwadd_wv.
-pub fn constructor_rv_vwadd_wv<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::vreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VwaddWV, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 463.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vwadd_wx.
-pub fn constructor_rv_vwadd_wx<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: XReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::xreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VwaddWX, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 470.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vwaddu_vv.
-pub fn constructor_rv_vwaddu_vv<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::vreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VwadduVV, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 477.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vwaddu_vx.
-pub fn constructor_rv_vwaddu_vx<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: XReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::xreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VwadduVX, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 484.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vwaddu_wv.
-pub fn constructor_rv_vwaddu_wv<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::vreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VwadduWV, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 491.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vwaddu_wx.
-pub fn constructor_rv_vwaddu_wx<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: XReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::xreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VwadduWX, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 498.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vsub_vv.
-pub fn constructor_rv_vsub_vv<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::vreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VsubVV, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 503.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vsub_vx.
-pub fn constructor_rv_vsub_vx<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: XReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::xreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VsubVX, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 508.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vrsub_vx.
-pub fn constructor_rv_vrsub_vx<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: XReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::xreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VrsubVX, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 513.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vwsub_vv.
-pub fn constructor_rv_vwsub_vv<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::vreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VwsubVV, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 520.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vwsub_vx.
-pub fn constructor_rv_vwsub_vx<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: XReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::xreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VwsubVX, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 527.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vwsub_wv.
-pub fn constructor_rv_vwsub_wv<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::vreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VwsubWV, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 534.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vwsub_wx.
-pub fn constructor_rv_vwsub_wx<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: XReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::xreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VwsubWX, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 541.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vwsubu_vv.
-pub fn constructor_rv_vwsubu_vv<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::vreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VwsubuVV, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 548.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vwsubu_vx.
-pub fn constructor_rv_vwsubu_vx<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: XReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::xreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VwsubuVX, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 555.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vwsubu_wv.
-pub fn constructor_rv_vwsubu_wv<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::vreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VwsubuWV, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 562.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vwsubu_wx.
-pub fn constructor_rv_vwsubu_wx<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: XReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::xreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VwsubuWX, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 569.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vssub_vv.
-pub fn constructor_rv_vssub_vv<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::vreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VssubVV, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 574.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vssub_vx.
-pub fn constructor_rv_vssub_vx<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: XReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::xreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VssubVX, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 579.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vssubu_vv.
-pub fn constructor_rv_vssubu_vv<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::vreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VssubuVV, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 584.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vssubu_vx.
-pub fn constructor_rv_vssubu_vx<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: XReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::xreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VssubuVX, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 589.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vneg_v.
-pub fn constructor_rv_vneg_v<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: &VecOpMasking,
-    arg2: VState,
-) -> VReg {
-    let v5 = C::zero_reg(ctx);
-    let v4 = C::vreg_to_reg(ctx, arg0);
-    let v6 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VrsubVX, v4, v5, arg1, arg2);
-    let v7 = C::vreg_new(ctx, v6);
-    // Rule at src/isa/riscv64/inst_vector.isle line 594.
-    return v7;
-}
-
-// Generated as internal constructor for term rv_vrsub_vi.
-pub fn constructor_rv_vrsub_vi<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: Imm5,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = constructor_vec_alu_rr_imm5(ctx, &VecAluOpRRImm5::VrsubVI, v5, arg1, arg2, arg3);
-    let v7 = C::vreg_new(ctx, v6);
-    // Rule at src/isa/riscv64/inst_vector.isle line 599.
-    return v7;
-}
-
-// Generated as internal constructor for term rv_vmul_vv.
-pub fn constructor_rv_vmul_vv<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::vreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmulVV, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 604.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vmul_vx.
-pub fn constructor_rv_vmul_vx<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: XReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::xreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmulVX, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 609.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vmulh_vv.
-pub fn constructor_rv_vmulh_vv<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::vreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmulhVV, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 614.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vmulh_vx.
-pub fn constructor_rv_vmulh_vx<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: XReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::xreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmulhVX, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 619.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vmulhu_vv.
-pub fn constructor_rv_vmulhu_vv<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::vreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmulhuVV, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 624.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vmulhu_vx.
-pub fn constructor_rv_vmulhu_vx<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: XReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::xreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmulhuVX, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 629.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vsmul_vv.
-pub fn constructor_rv_vsmul_vv<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::vreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VsmulVV, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 637.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vsmul_vx.
-pub fn constructor_rv_vsmul_vx<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: XReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::xreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VsmulVX, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 645.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vsll_vv.
-pub fn constructor_rv_vsll_vv<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::vreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VsllVV, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 650.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vsll_vx.
-pub fn constructor_rv_vsll_vx<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: XReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::xreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VsllVX, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 655.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vsll_vi.
-pub fn constructor_rv_vsll_vi<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: UImm5,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = constructor_vec_alu_rr_uimm5(ctx, &VecAluOpRRImm5::VsllVI, v5, arg1, arg2, arg3);
-    let v7 = C::vreg_new(ctx, v6);
-    // Rule at src/isa/riscv64/inst_vector.isle line 660.
-    return v7;
-}
-
-// Generated as internal constructor for term rv_vsrl_vv.
-pub fn constructor_rv_vsrl_vv<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::vreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VsrlVV, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 665.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vsrl_vx.
-pub fn constructor_rv_vsrl_vx<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: XReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::xreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VsrlVX, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 670.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vsrl_vi.
-pub fn constructor_rv_vsrl_vi<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: UImm5,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = constructor_vec_alu_rr_uimm5(ctx, &VecAluOpRRImm5::VsrlVI, v5, arg1, arg2, arg3);
-    let v7 = C::vreg_new(ctx, v6);
-    // Rule at src/isa/riscv64/inst_vector.isle line 675.
-    return v7;
-}
-
-// Generated as internal constructor for term rv_vsra_vv.
-pub fn constructor_rv_vsra_vv<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::vreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VsraVV, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 680.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vsra_vx.
-pub fn constructor_rv_vsra_vx<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: XReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::xreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VsraVX, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 685.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vsra_vi.
-pub fn constructor_rv_vsra_vi<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: UImm5,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = constructor_vec_alu_rr_uimm5(ctx, &VecAluOpRRImm5::VsraVI, v5, arg1, arg2, arg3);
-    let v7 = C::vreg_new(ctx, v6);
-    // Rule at src/isa/riscv64/inst_vector.isle line 690.
-    return v7;
-}
-
-// Generated as internal constructor for term rv_vand_vv.
-pub fn constructor_rv_vand_vv<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::vreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VandVV, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 695.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vand_vx.
-pub fn constructor_rv_vand_vx<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: XReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::xreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VandVX, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 700.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vand_vi.
-pub fn constructor_rv_vand_vi<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: Imm5,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = constructor_vec_alu_rr_imm5(ctx, &VecAluOpRRImm5::VandVI, v5, arg1, arg2, arg3);
-    let v7 = C::vreg_new(ctx, v6);
-    // Rule at src/isa/riscv64/inst_vector.isle line 705.
-    return v7;
-}
-
-// Generated as internal constructor for term rv_vor_vv.
-pub fn constructor_rv_vor_vv<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::vreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VorVV, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 710.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vor_vx.
-pub fn constructor_rv_vor_vx<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: XReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::xreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VorVX, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 715.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vor_vi.
-pub fn constructor_rv_vor_vi<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: Imm5,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = constructor_vec_alu_rr_imm5(ctx, &VecAluOpRRImm5::VorVI, v5, arg1, arg2, arg3);
-    let v7 = C::vreg_new(ctx, v6);
-    // Rule at src/isa/riscv64/inst_vector.isle line 720.
-    return v7;
-}
-
-// Generated as internal constructor for term rv_vxor_vv.
-pub fn constructor_rv_vxor_vv<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::vreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VxorVV, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 725.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vxor_vx.
-pub fn constructor_rv_vxor_vx<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: XReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::xreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VxorVX, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 730.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vxor_vi.
-pub fn constructor_rv_vxor_vi<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: Imm5,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = constructor_vec_alu_rr_imm5(ctx, &VecAluOpRRImm5::VxorVI, v5, arg1, arg2, arg3);
-    let v7 = C::vreg_new(ctx, v6);
-    // Rule at src/isa/riscv64/inst_vector.isle line 735.
-    return v7;
-}
-
-// Generated as internal constructor for term rv_vssrl_vi.
-pub fn constructor_rv_vssrl_vi<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: UImm5,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = constructor_vec_alu_rr_uimm5(ctx, &VecAluOpRRImm5::VssrlVI, v5, arg1, arg2, arg3);
-    let v7 = C::vreg_new(ctx, v6);
-    // Rule at src/isa/riscv64/inst_vector.isle line 744.
-    return v7;
-}
-
-// Generated as internal constructor for term rv_vnot_v.
-pub fn constructor_rv_vnot_v<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: &VecOpMasking,
-    arg2: VState,
-) -> VReg {
-    let v4 = C::imm5_from_i8(ctx, -0x1);
-    if let Some(v5) = v4 {
-        let v6 = constructor_rv_vxor_vi(ctx, arg0, v5, arg1, arg2);
-        // Rule at src/isa/riscv64/inst_vector.isle line 750.
-        return v6;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "rv_vnot_v", "src/isa/riscv64/inst_vector.isle line 749"
-    )
-}
-
-// Generated as internal constructor for term rv_vmax_vv.
-pub fn constructor_rv_vmax_vv<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::vreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmaxVV, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 756.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vmax_vx.
-pub fn constructor_rv_vmax_vx<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: XReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::xreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmaxVX, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 761.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vmin_vv.
-pub fn constructor_rv_vmin_vv<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::vreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VminVV, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 766.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vmin_vx.
-pub fn constructor_rv_vmin_vx<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: XReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::xreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VminVX, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 771.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vmaxu_vv.
-pub fn constructor_rv_vmaxu_vv<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::vreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmaxuVV, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 776.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vmaxu_vx.
-pub fn constructor_rv_vmaxu_vx<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: XReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::xreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmaxuVX, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 781.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vminu_vv.
-pub fn constructor_rv_vminu_vv<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::vreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VminuVV, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 786.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vminu_vx.
-pub fn constructor_rv_vminu_vx<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: XReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::xreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VminuVX, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 791.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vfadd_vv.
-pub fn constructor_rv_vfadd_vv<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::vreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VfaddVV, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 796.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vfadd_vf.
-pub fn constructor_rv_vfadd_vf<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: FReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::freg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VfaddVF, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 801.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vfsub_vv.
-pub fn constructor_rv_vfsub_vv<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::vreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VfsubVV, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 806.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vfsub_vf.
-pub fn constructor_rv_vfsub_vf<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: FReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::freg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VfsubVF, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 811.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vfrsub_vf.
-pub fn constructor_rv_vfrsub_vf<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: FReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::freg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VfrsubVF, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 816.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vfmul_vv.
-pub fn constructor_rv_vfmul_vv<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::vreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VfmulVV, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 821.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vfmul_vf.
-pub fn constructor_rv_vfmul_vf<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: FReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::freg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VfmulVF, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 826.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vfdiv_vv.
-pub fn constructor_rv_vfdiv_vv<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::vreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VfdivVV, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 831.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vfdiv_vf.
-pub fn constructor_rv_vfdiv_vf<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: FReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::freg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VfdivVF, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 836.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vfrdiv_vf.
-pub fn constructor_rv_vfrdiv_vf<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: FReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::freg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VfrdivVF, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 841.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vfmin_vv.
-pub fn constructor_rv_vfmin_vv<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::vreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VfminVV, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 846.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vfmax_vv.
-pub fn constructor_rv_vfmax_vv<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::vreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VfmaxVV, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 851.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vfsgnj_vv.
-pub fn constructor_rv_vfsgnj_vv<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::vreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VfsgnjVV, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 857.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vfsgnj_vf.
-pub fn constructor_rv_vfsgnj_vf<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: FReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::freg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VfsgnjVF, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 862.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vfsgnjn_vv.
-pub fn constructor_rv_vfsgnjn_vv<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::vreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VfsgnjnVV, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 868.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vfneg_v.
-pub fn constructor_rv_vfneg_v<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: &VecOpMasking,
-    arg2: VState,
-) -> VReg {
-    let v3 = constructor_rv_vfsgnjn_vv(ctx, arg0, arg0, arg1, arg2);
-    // Rule at src/isa/riscv64/inst_vector.isle line 874.
-    return v3;
-}
-
-// Generated as internal constructor for term rv_vfsgnjx_vv.
-pub fn constructor_rv_vfsgnjx_vv<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::vreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VfsgnjxVV, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 880.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vfabs_v.
-pub fn constructor_rv_vfabs_v<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: &VecOpMasking,
-    arg2: VState,
-) -> VReg {
-    let v3 = constructor_rv_vfsgnjx_vv(ctx, arg0, arg0, arg1, arg2);
-    // Rule at src/isa/riscv64/inst_vector.isle line 886.
-    return v3;
-}
-
-// Generated as internal constructor for term rv_vfsqrt_v.
-pub fn constructor_rv_vfsqrt_v<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: &VecOpMasking,
-    arg2: VState,
-) -> VReg {
-    let v4 = C::vreg_to_reg(ctx, arg0);
-    let v5 = constructor_vec_alu_rr(ctx, &VecAluOpRR::VfsqrtV, v4, arg1, arg2);
-    let v6 = C::vreg_new(ctx, v5);
-    // Rule at src/isa/riscv64/inst_vector.isle line 891.
-    return v6;
-}
-
-// Generated as internal constructor for term rv_vslidedown_vx.
-pub fn constructor_rv_vslidedown_vx<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: XReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::xreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VslidedownVX, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 898.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vslidedown_vi.
-pub fn constructor_rv_vslidedown_vi<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: UImm5,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = constructor_vec_alu_rr_uimm5(ctx, &VecAluOpRRImm5::VslidedownVI, v5, arg1, arg2, arg3);
-    let v7 = C::vreg_new(ctx, v6);
-    // Rule at src/isa/riscv64/inst_vector.isle line 904.
-    return v7;
-}
-
-// Generated as internal constructor for term rv_vslideup_vvi.
-pub fn constructor_rv_vslideup_vvi<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: UImm5,
-    arg3: &VecOpMasking,
-    arg4: VState,
-) -> VReg {
-    let v6 = constructor_vec_alu_rrr_uimm5(
-        ctx,
-        &VecAluOpRRRImm5::VslideupVI,
-        arg0,
-        arg1,
-        arg2,
-        arg3,
-        arg4,
-    );
-    // Rule at src/isa/riscv64/inst_vector.isle line 912.
-    return v6;
-}
-
-// Generated as internal constructor for term rv_vmv_xs.
-pub fn constructor_rv_vmv_xs<C: Context>(ctx: &mut C, arg0: VReg, arg1: VState) -> XReg {
-    let v3 = C::vreg_to_reg(ctx, arg0);
-    let v4 = &constructor_unmasked(ctx);
-    let v5 = constructor_vec_alu_rr(ctx, &VecAluOpRR::VmvXS, v3, v4, arg1);
-    let v6 = C::xreg_new(ctx, v5);
-    // Rule at src/isa/riscv64/inst_vector.isle line 919.
-    return v6;
-}
-
-// Generated as internal constructor for term rv_vfmv_fs.
-pub fn constructor_rv_vfmv_fs<C: Context>(ctx: &mut C, arg0: VReg, arg1: VState) -> FReg {
-    let v3 = C::vreg_to_reg(ctx, arg0);
-    let v4 = &constructor_unmasked(ctx);
-    let v5 = constructor_vec_alu_rr(ctx, &VecAluOpRR::VfmvFS, v3, v4, arg1);
-    let v6 = C::freg_new(ctx, v5);
-    // Rule at src/isa/riscv64/inst_vector.isle line 926.
-    return v6;
-}
-
-// Generated as internal constructor for term rv_vmv_sx.
-pub fn constructor_rv_vmv_sx<C: Context>(ctx: &mut C, arg0: XReg, arg1: VState) -> VReg {
-    let v3 = C::xreg_to_reg(ctx, arg0);
-    let v4 = &constructor_unmasked(ctx);
-    let v5 = constructor_vec_alu_rr(ctx, &VecAluOpRR::VmvSX, v3, v4, arg1);
-    let v6 = C::vreg_new(ctx, v5);
-    // Rule at src/isa/riscv64/inst_vector.isle line 933.
-    return v6;
-}
-
-// Generated as internal constructor for term rv_vfmv_sf.
-pub fn constructor_rv_vfmv_sf<C: Context>(ctx: &mut C, arg0: FReg, arg1: VState) -> VReg {
-    let v3 = C::freg_to_reg(ctx, arg0);
-    let v4 = &constructor_unmasked(ctx);
-    let v5 = constructor_vec_alu_rr(ctx, &VecAluOpRR::VfmvSF, v3, v4, arg1);
-    let v6 = C::vreg_new(ctx, v5);
-    // Rule at src/isa/riscv64/inst_vector.isle line 940.
-    return v6;
-}
-
-// Generated as internal constructor for term rv_vmv_vx.
-pub fn constructor_rv_vmv_vx<C: Context>(ctx: &mut C, arg0: XReg, arg1: VState) -> VReg {
-    let v3 = C::xreg_to_reg(ctx, arg0);
-    let v4 = &constructor_unmasked(ctx);
-    let v5 = constructor_vec_alu_rr(ctx, &VecAluOpRR::VmvVX, v3, v4, arg1);
-    let v6 = C::vreg_new(ctx, v5);
-    // Rule at src/isa/riscv64/inst_vector.isle line 947.
-    return v6;
-}
-
-// Generated as internal constructor for term rv_vfmv_vf.
-pub fn constructor_rv_vfmv_vf<C: Context>(ctx: &mut C, arg0: FReg, arg1: VState) -> VReg {
-    let v3 = C::freg_to_reg(ctx, arg0);
-    let v4 = &constructor_unmasked(ctx);
-    let v5 = constructor_vec_alu_rr(ctx, &VecAluOpRR::VfmvVF, v3, v4, arg1);
-    let v6 = C::vreg_new(ctx, v5);
-    // Rule at src/isa/riscv64/inst_vector.isle line 954.
-    return v6;
-}
-
-// Generated as internal constructor for term rv_vmv_vi.
-pub fn constructor_rv_vmv_vi<C: Context>(ctx: &mut C, arg0: Imm5, arg1: VState) -> VReg {
-    let v3 = &constructor_unmasked(ctx);
-    let v4 = constructor_vec_alu_r_imm5(ctx, &VecAluOpRImm5::VmvVI, arg0, v3, arg1);
-    let v5 = C::vreg_new(ctx, v4);
-    // Rule at src/isa/riscv64/inst_vector.isle line 961.
-    return v5;
-}
-
-// Generated as internal constructor for term rv_vmerge_vvm.
-pub fn constructor_rv_vmerge_vvm<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: VReg,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::vreg_to_reg(ctx, arg1);
-    let v7 = &constructor_masked(ctx, arg2);
-    let v8 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmergeVVM, v5, v6, v7, arg3);
-    let v9 = C::vreg_new(ctx, v8);
-    // Rule at src/isa/riscv64/inst_vector.isle line 971.
-    return v9;
-}
-
-// Generated as internal constructor for term rv_vmerge_vxm.
-pub fn constructor_rv_vmerge_vxm<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: XReg,
-    arg2: VReg,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::xreg_to_reg(ctx, arg1);
-    let v7 = &constructor_masked(ctx, arg2);
-    let v8 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmergeVXM, v5, v6, v7, arg3);
-    let v9 = C::vreg_new(ctx, v8);
-    // Rule at src/isa/riscv64/inst_vector.isle line 980.
-    return v9;
-}
-
-// Generated as internal constructor for term rv_vfmerge_vfm.
-pub fn constructor_rv_vfmerge_vfm<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: FReg,
-    arg2: VReg,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::freg_to_reg(ctx, arg1);
-    let v7 = &constructor_masked(ctx, arg2);
-    let v8 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VfmergeVFM, v5, v6, v7, arg3);
-    let v9 = C::vreg_new(ctx, v8);
-    // Rule at src/isa/riscv64/inst_vector.isle line 989.
-    return v9;
-}
-
-// Generated as internal constructor for term rv_vmerge_vim.
-pub fn constructor_rv_vmerge_vim<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: Imm5,
-    arg2: VReg,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = &constructor_masked(ctx, arg2);
-    let v7 = constructor_vec_alu_rr_imm5(ctx, &VecAluOpRRImm5::VmergeVIM, v5, arg1, v6, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 998.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vredminu_vs.
-pub fn constructor_rv_vredminu_vs<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::vreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VredminuVS, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 1006.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vredmaxu_vs.
-pub fn constructor_rv_vredmaxu_vs<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::vreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VredmaxuVS, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 1013.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vrgather_vv.
-pub fn constructor_rv_vrgather_vv<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::vreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VrgatherVV, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 1020.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vrgather_vx.
-pub fn constructor_rv_vrgather_vx<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: XReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::xreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VrgatherVX, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 1027.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vrgather_vi.
-pub fn constructor_rv_vrgather_vi<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: UImm5,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = constructor_vec_alu_rr_uimm5(ctx, &VecAluOpRRImm5::VrgatherVI, v5, arg1, arg2, arg3);
-    let v7 = C::vreg_new(ctx, v6);
-    // Rule at src/isa/riscv64/inst_vector.isle line 1032.
-    return v7;
-}
-
-// Generated as internal constructor for term rv_vcompress_vm.
-pub fn constructor_rv_vcompress_vm<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: VState,
-) -> VReg {
-    let v4 = C::vreg_to_reg(ctx, arg0);
-    let v5 = C::vreg_to_reg(ctx, arg1);
-    let v6 = &constructor_unmasked(ctx);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VcompressVM, v4, v5, v6, arg2);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 1043.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vmseq_vv.
-pub fn constructor_rv_vmseq_vv<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::vreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmseqVV, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 1048.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vmseq_vx.
-pub fn constructor_rv_vmseq_vx<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: XReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::xreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmseqVX, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 1053.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vmseq_vi.
-pub fn constructor_rv_vmseq_vi<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: Imm5,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = constructor_vec_alu_rr_imm5(ctx, &VecAluOpRRImm5::VmseqVI, v5, arg1, arg2, arg3);
-    let v7 = C::vreg_new(ctx, v6);
-    // Rule at src/isa/riscv64/inst_vector.isle line 1058.
-    return v7;
-}
-
-// Generated as internal constructor for term rv_vmsne_vv.
-pub fn constructor_rv_vmsne_vv<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::vreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmsneVV, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 1063.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vmsne_vx.
-pub fn constructor_rv_vmsne_vx<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: XReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::xreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmsneVX, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 1068.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vmsne_vi.
-pub fn constructor_rv_vmsne_vi<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: Imm5,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = constructor_vec_alu_rr_imm5(ctx, &VecAluOpRRImm5::VmsneVI, v5, arg1, arg2, arg3);
-    let v7 = C::vreg_new(ctx, v6);
-    // Rule at src/isa/riscv64/inst_vector.isle line 1073.
-    return v7;
-}
-
-// Generated as internal constructor for term rv_vmsltu_vv.
-pub fn constructor_rv_vmsltu_vv<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::vreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmsltuVV, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 1078.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vmsltu_vx.
-pub fn constructor_rv_vmsltu_vx<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: XReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::xreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmsltuVX, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 1083.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vmslt_vv.
-pub fn constructor_rv_vmslt_vv<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::vreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmsltVV, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 1088.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vmslt_vx.
-pub fn constructor_rv_vmslt_vx<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: XReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::xreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmsltVX, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 1093.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vmsleu_vv.
-pub fn constructor_rv_vmsleu_vv<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::vreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmsleuVV, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 1098.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vmsleu_vx.
-pub fn constructor_rv_vmsleu_vx<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: XReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::xreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmsleuVX, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 1103.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vmsleu_vi.
-pub fn constructor_rv_vmsleu_vi<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: Imm5,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = constructor_vec_alu_rr_imm5(ctx, &VecAluOpRRImm5::VmsleuVI, v5, arg1, arg2, arg3);
-    let v7 = C::vreg_new(ctx, v6);
-    // Rule at src/isa/riscv64/inst_vector.isle line 1108.
-    return v7;
-}
-
-// Generated as internal constructor for term rv_vmsle_vv.
-pub fn constructor_rv_vmsle_vv<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::vreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmsleVV, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 1113.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vmsle_vx.
-pub fn constructor_rv_vmsle_vx<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: XReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::xreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmsleVX, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 1118.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vmsle_vi.
-pub fn constructor_rv_vmsle_vi<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: Imm5,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = constructor_vec_alu_rr_imm5(ctx, &VecAluOpRRImm5::VmsleVI, v5, arg1, arg2, arg3);
-    let v7 = C::vreg_new(ctx, v6);
-    // Rule at src/isa/riscv64/inst_vector.isle line 1123.
-    return v7;
-}
-
-// Generated as internal constructor for term rv_vmsgtu_vv.
-pub fn constructor_rv_vmsgtu_vv<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v4 = constructor_rv_vmsltu_vv(ctx, arg1, arg0, arg2, arg3);
-    // Rule at src/isa/riscv64/inst_vector.isle line 1129.
-    return v4;
-}
-
-// Generated as internal constructor for term rv_vmsgtu_vx.
-pub fn constructor_rv_vmsgtu_vx<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: XReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::xreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmsgtuVX, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 1133.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vmsgtu_vi.
-pub fn constructor_rv_vmsgtu_vi<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: Imm5,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = constructor_vec_alu_rr_imm5(ctx, &VecAluOpRRImm5::VmsgtuVI, v5, arg1, arg2, arg3);
-    let v7 = C::vreg_new(ctx, v6);
-    // Rule at src/isa/riscv64/inst_vector.isle line 1138.
-    return v7;
-}
-
-// Generated as internal constructor for term rv_vmsgt_vv.
-pub fn constructor_rv_vmsgt_vv<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v4 = constructor_rv_vmslt_vv(ctx, arg1, arg0, arg2, arg3);
-    // Rule at src/isa/riscv64/inst_vector.isle line 1144.
-    return v4;
-}
-
-// Generated as internal constructor for term rv_vmsgt_vx.
-pub fn constructor_rv_vmsgt_vx<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: XReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::xreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmsgtVX, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 1148.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vmsgt_vi.
-pub fn constructor_rv_vmsgt_vi<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: Imm5,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = constructor_vec_alu_rr_imm5(ctx, &VecAluOpRRImm5::VmsgtVI, v5, arg1, arg2, arg3);
-    let v7 = C::vreg_new(ctx, v6);
-    // Rule at src/isa/riscv64/inst_vector.isle line 1153.
-    return v7;
-}
-
-// Generated as internal constructor for term rv_vmsgeu_vv.
-pub fn constructor_rv_vmsgeu_vv<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v4 = constructor_rv_vmsleu_vv(ctx, arg1, arg0, arg2, arg3);
-    // Rule at src/isa/riscv64/inst_vector.isle line 1159.
-    return v4;
-}
-
-// Generated as internal constructor for term rv_vmsge_vv.
-pub fn constructor_rv_vmsge_vv<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v4 = constructor_rv_vmsle_vv(ctx, arg1, arg0, arg2, arg3);
-    // Rule at src/isa/riscv64/inst_vector.isle line 1164.
-    return v4;
-}
-
-// Generated as internal constructor for term rv_vmfeq_vv.
-pub fn constructor_rv_vmfeq_vv<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::vreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmfeqVV, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 1168.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vmfeq_vf.
-pub fn constructor_rv_vmfeq_vf<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: FReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::freg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmfeqVF, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 1173.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vmfne_vv.
-pub fn constructor_rv_vmfne_vv<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::vreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmfneVV, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 1178.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vmfne_vf.
-pub fn constructor_rv_vmfne_vf<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: FReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::freg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmfneVF, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 1183.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vmflt_vv.
-pub fn constructor_rv_vmflt_vv<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::vreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmfltVV, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 1188.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vmflt_vf.
-pub fn constructor_rv_vmflt_vf<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: FReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::freg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmfltVF, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 1193.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vmfle_vv.
-pub fn constructor_rv_vmfle_vv<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::vreg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmfleVV, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 1198.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vmfle_vf.
-pub fn constructor_rv_vmfle_vf<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: FReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::freg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmfleVF, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 1203.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vmfgt_vv.
-pub fn constructor_rv_vmfgt_vv<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v4 = constructor_rv_vmflt_vv(ctx, arg1, arg0, arg2, arg3);
-    // Rule at src/isa/riscv64/inst_vector.isle line 1209.
-    return v4;
-}
-
-// Generated as internal constructor for term rv_vmfgt_vf.
-pub fn constructor_rv_vmfgt_vf<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: FReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::freg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmfgtVF, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 1213.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vmfge_vv.
-pub fn constructor_rv_vmfge_vv<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v4 = constructor_rv_vmfle_vv(ctx, arg1, arg0, arg2, arg3);
-    // Rule at src/isa/riscv64/inst_vector.isle line 1219.
-    return v4;
-}
-
-// Generated as internal constructor for term rv_vmfge_vf.
-pub fn constructor_rv_vmfge_vf<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: FReg,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = C::freg_to_reg(ctx, arg1);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmfgeVF, v5, v6, arg2, arg3);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 1223.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vzext_vf2.
-pub fn constructor_rv_vzext_vf2<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: &VecOpMasking,
-    arg2: VState,
-) -> VReg {
-    let v4 = C::vreg_to_reg(ctx, arg0);
-    let v5 = constructor_vec_alu_rr(ctx, &VecAluOpRR::VzextVF2, v4, arg1, arg2);
-    let v6 = C::vreg_new(ctx, v5);
-    // Rule at src/isa/riscv64/inst_vector.isle line 1229.
-    return v6;
-}
-
-// Generated as internal constructor for term rv_vzext_vf4.
-pub fn constructor_rv_vzext_vf4<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: &VecOpMasking,
-    arg2: VState,
-) -> VReg {
-    let v4 = C::vreg_to_reg(ctx, arg0);
-    let v5 = constructor_vec_alu_rr(ctx, &VecAluOpRR::VzextVF4, v4, arg1, arg2);
-    let v6 = C::vreg_new(ctx, v5);
-    // Rule at src/isa/riscv64/inst_vector.isle line 1235.
-    return v6;
-}
-
-// Generated as internal constructor for term rv_vzext_vf8.
-pub fn constructor_rv_vzext_vf8<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: &VecOpMasking,
-    arg2: VState,
-) -> VReg {
-    let v4 = C::vreg_to_reg(ctx, arg0);
-    let v5 = constructor_vec_alu_rr(ctx, &VecAluOpRR::VzextVF8, v4, arg1, arg2);
-    let v6 = C::vreg_new(ctx, v5);
-    // Rule at src/isa/riscv64/inst_vector.isle line 1241.
-    return v6;
-}
-
-// Generated as internal constructor for term rv_vsext_vf2.
-pub fn constructor_rv_vsext_vf2<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: &VecOpMasking,
-    arg2: VState,
-) -> VReg {
-    let v4 = C::vreg_to_reg(ctx, arg0);
-    let v5 = constructor_vec_alu_rr(ctx, &VecAluOpRR::VsextVF2, v4, arg1, arg2);
-    let v6 = C::vreg_new(ctx, v5);
-    // Rule at src/isa/riscv64/inst_vector.isle line 1247.
-    return v6;
-}
-
-// Generated as internal constructor for term rv_vsext_vf4.
-pub fn constructor_rv_vsext_vf4<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: &VecOpMasking,
-    arg2: VState,
-) -> VReg {
-    let v4 = C::vreg_to_reg(ctx, arg0);
-    let v5 = constructor_vec_alu_rr(ctx, &VecAluOpRR::VsextVF4, v4, arg1, arg2);
-    let v6 = C::vreg_new(ctx, v5);
-    // Rule at src/isa/riscv64/inst_vector.isle line 1253.
-    return v6;
-}
-
-// Generated as internal constructor for term rv_vsext_vf8.
-pub fn constructor_rv_vsext_vf8<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: &VecOpMasking,
-    arg2: VState,
-) -> VReg {
-    let v4 = C::vreg_to_reg(ctx, arg0);
-    let v5 = constructor_vec_alu_rr(ctx, &VecAluOpRR::VsextVF8, v4, arg1, arg2);
-    let v6 = C::vreg_new(ctx, v5);
-    // Rule at src/isa/riscv64/inst_vector.isle line 1259.
-    return v6;
-}
-
-// Generated as internal constructor for term rv_vnclip_wi.
-pub fn constructor_rv_vnclip_wi<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: UImm5,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = constructor_vec_alu_rr_uimm5(ctx, &VecAluOpRRImm5::VnclipWI, v5, arg1, arg2, arg3);
-    let v7 = C::vreg_new(ctx, v6);
-    // Rule at src/isa/riscv64/inst_vector.isle line 1266.
-    return v7;
-}
-
-// Generated as internal constructor for term rv_vnclipu_wi.
-pub fn constructor_rv_vnclipu_wi<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: UImm5,
-    arg2: &VecOpMasking,
-    arg3: VState,
-) -> VReg {
-    let v5 = C::vreg_to_reg(ctx, arg0);
-    let v6 = constructor_vec_alu_rr_uimm5(ctx, &VecAluOpRRImm5::VnclipuWI, v5, arg1, arg2, arg3);
-    let v7 = C::vreg_new(ctx, v6);
-    // Rule at src/isa/riscv64/inst_vector.isle line 1273.
-    return v7;
-}
-
-// Generated as internal constructor for term rv_vmand_mm.
-pub fn constructor_rv_vmand_mm<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: VState,
-) -> VReg {
-    let v4 = C::vreg_to_reg(ctx, arg0);
-    let v5 = C::vreg_to_reg(ctx, arg1);
-    let v6 = &constructor_unmasked(ctx);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmandMM, v4, v5, v6, arg2);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 1280.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vmor_mm.
-pub fn constructor_rv_vmor_mm<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: VState,
-) -> VReg {
-    let v4 = C::vreg_to_reg(ctx, arg0);
-    let v5 = C::vreg_to_reg(ctx, arg1);
-    let v6 = &constructor_unmasked(ctx);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmorMM, v4, v5, v6, arg2);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 1287.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vmnand_mm.
-pub fn constructor_rv_vmnand_mm<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: VState,
-) -> VReg {
-    let v4 = C::vreg_to_reg(ctx, arg0);
-    let v5 = C::vreg_to_reg(ctx, arg1);
-    let v6 = &constructor_unmasked(ctx);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmnandMM, v4, v5, v6, arg2);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 1294.
-    return v8;
-}
-
-// Generated as internal constructor for term rv_vmnot_m.
-pub fn constructor_rv_vmnot_m<C: Context>(ctx: &mut C, arg0: VReg, arg1: VState) -> VReg {
-    let v2 = constructor_rv_vmnand_mm(ctx, arg0, arg0, arg1);
-    // Rule at src/isa/riscv64/inst_vector.isle line 1302.
-    return v2;
-}
-
-// Generated as internal constructor for term rv_vmnor_mm.
-pub fn constructor_rv_vmnor_mm<C: Context>(
-    ctx: &mut C,
-    arg0: VReg,
-    arg1: VReg,
-    arg2: VState,
-) -> VReg {
-    let v4 = C::vreg_to_reg(ctx, arg0);
-    let v5 = C::vreg_to_reg(ctx, arg1);
-    let v6 = &constructor_unmasked(ctx);
-    let v7 = constructor_vec_alu_rrr(ctx, &VecAluOpRRR::VmnorMM, v4, v5, v6, arg2);
-    let v8 = C::vreg_new(ctx, v7);
-    // Rule at src/isa/riscv64/inst_vector.isle line 1308.
-    return v8;
-}
-
-// Generated as internal constructor for term gen_extractlane.
-pub fn constructor_gen_extractlane<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: VReg,
-    arg2: u8,
-) -> Reg {
-    let v1 = C::ty_vec_fits_in_register(ctx, arg0);
-    if let Some(v2) = v1 {
-        if arg2 == 0x0 {
-            let v5 = C::ty_vector_float(ctx, v2);
-            if let Some(v6) = v5 {
-                let v7 = C::vstate_from_type(ctx, v2);
-                let v8 = constructor_rv_vfmv_fs(ctx, arg1, v7);
-                let v9 = C::freg_to_reg(ctx, v8);
-                // Rule at src/isa/riscv64/inst_vector.isle line 1316.
-                return v9;
-            }
-            let v10 = C::ty_vector_not_float(ctx, v2);
-            if let Some(v11) = v10 {
-                let v7 = C::vstate_from_type(ctx, v2);
-                let v12 = constructor_rv_vmv_xs(ctx, arg1, v7);
-                let v13 = C::xreg_to_reg(ctx, v12);
-                // Rule at src/isa/riscv64/inst_vector.isle line 1321.
-                return v13;
-            }
-        }
-        let v14 = C::uimm5_from_u8(ctx, arg2);
-        if let Some(v15) = v14 {
-            let v16 = &constructor_unmasked(ctx);
-            let v7 = C::vstate_from_type(ctx, v2);
-            let v17 = constructor_rv_vslidedown_vi(ctx, arg1, v15, v16, v7);
-            let v19 = constructor_gen_extractlane(ctx, v2, v17, 0x0);
-            // Rule at src/isa/riscv64/inst_vector.isle line 1328.
-            return v19;
-        }
-        let v21 = C::u8_as_u64(ctx, arg2);
-        let v22 = C::imm(ctx, I64, v21);
-        let v23 = C::xreg_new(ctx, v22);
-        let v16 = &constructor_unmasked(ctx);
-        let v7 = C::vstate_from_type(ctx, v2);
-        let v24 = constructor_rv_vslidedown_vx(ctx, arg1, v23, v16, v7);
-        let v25 = constructor_gen_extractlane(ctx, v2, v24, 0x0);
-        // Rule at src/isa/riscv64/inst_vector.isle line 1332.
-        return v25;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "gen_extractlane", "src/isa/riscv64/inst_vector.isle line 1313"
-    )
-}
-
-// Generated as internal constructor for term gen_vec_mask.
-pub fn constructor_gen_vec_mask<C: Context>(ctx: &mut C, arg0: u64) -> VReg {
-    let v1 = C::imm5_from_u64(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v4 = C::vstate_from_type(ctx, I64X2);
-        let v5 = constructor_rv_vmv_vi(ctx, v2, v4);
-        // Rule at src/isa/riscv64/inst_vector.isle line 1342.
-        return v5;
-    }
-    let v7 = C::imm(ctx, I64, arg0);
-    let v8 = C::xreg_new(ctx, v7);
-    let v4 = C::vstate_from_type(ctx, I64X2);
-    let v9 = constructor_rv_vmv_sx(ctx, v8, v4);
-    // Rule at src/isa/riscv64/inst_vector.isle line 1347.
-    return v9;
-}
-
-// Generated as internal constructor for term gen_constant.
-pub fn constructor_gen_constant<C: Context>(ctx: &mut C, arg0: Type, arg1: VCodeConstant) -> VReg {
-    let v3 = C::gen_const_amode(ctx, arg1);
-    let v2 = &constructor_element_width_from_type(ctx, arg0);
-    let v4 = VecAMode::UnitStride { base: v3 };
-    let v5 = C::mem_flags_trusted(ctx);
-    let v6 = &constructor_unmasked(ctx);
-    let v7 = C::vstate_from_type(ctx, arg0);
-    let v8 = constructor_vec_load(ctx, v2, &v4, v5, v6, v7);
-    let v9 = C::vreg_new(ctx, v8);
-    // Rule at src/isa/riscv64/inst_vector.isle line 1358.
-    return v9;
-}
-
-// Generated as internal constructor for term gen_slidedown_half.
-pub fn constructor_gen_slidedown_half<C: Context>(ctx: &mut C, arg0: Type, arg1: VReg) -> VReg {
-    let v1 = C::ty_vec_fits_in_register(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v4 = C::ty_lane_count(ctx, v2);
-        let v6 = C::u64_udiv(ctx, v4, 0x2);
-        if let Some(v7) = v6 {
-            let v8 = C::uimm5_from_u64(ctx, v7);
-            if let Some(v9) = v8 {
-                let v10 = &constructor_unmasked(ctx);
-                let v11 = C::vstate_from_type(ctx, v2);
-                let v12 = constructor_rv_vslidedown_vi(ctx, arg1, v9, v10, v11);
-                // Rule at src/isa/riscv64/inst_vector.isle line 1371.
-                return v12;
-            }
-            let v14 = C::imm(ctx, I64, v7);
-            let v15 = C::xreg_new(ctx, v14);
-            let v10 = &constructor_unmasked(ctx);
-            let v11 = C::vstate_from_type(ctx, v2);
-            let v16 = constructor_rv_vslidedown_vx(ctx, arg1, v15, v10, v11);
-            // Rule at src/isa/riscv64/inst_vector.isle line 1376.
-            return v16;
-        }
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "gen_slidedown_half", "src/isa/riscv64/inst_vector.isle line 1368"
-    )
-}
-
-// Generated as internal constructor for term gen_expand_mask.
-pub fn constructor_gen_expand_mask<C: Context>(ctx: &mut C, arg0: Type, arg1: VReg) -> VReg {
-    let v3 = C::imm5_from_i8(ctx, 0x0);
-    if let Some(v4) = v3 {
-        let v6 = C::imm5_from_i8(ctx, -0x1);
-        if let Some(v7) = v6 {
-            let v8 = C::vstate_from_type(ctx, arg0);
-            let v9 = constructor_rv_vmv_vi(ctx, v4, v8);
-            let v10 = constructor_rv_vmerge_vim(ctx, v9, v7, arg1, v8);
-            // Rule at src/isa/riscv64/inst_vector.isle line 1384.
-            return v10;
-        }
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "gen_expand_mask", "src/isa/riscv64/inst_vector.isle line 1383"
-    )
-}
-
-// Generated as internal constructor for term gen_icmp_mask.
-pub fn constructor_gen_icmp_mask<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &IntCC,
-    arg2: Value,
-    arg3: Value,
-) -> VReg {
-    let v1 = C::ty_vec_fits_in_register(ctx, arg0);
-    if let Some(v2) = v1 {
-        match arg1 {
-            &IntCC::Equal => {
-                let v18 = C::def_inst(ctx, arg2);
-                if let Some(v19) = v18 {
-                    let v20 = &C::inst_data(ctx, v19);
-                    if let &InstructionData::Unary {
-                        opcode: ref v21,
-                        arg: v22,
-                    } = v20
-                    {
-                        if let &Opcode::Splat = v21 {
-                            let v35 = C::def_inst(ctx, v22);
-                            if let Some(v36) = v35 {
-                                let v37 = &C::inst_data(ctx, v36);
-                                if let &InstructionData::UnaryImm {
-                                    opcode: ref v38,
-                                    imm: v39,
-                                } = v37
-                                {
-                                    if let &Opcode::Iconst = v38 {
-                                        let v40 = C::u64_from_imm64(ctx, v39);
-                                        let v41 = C::imm5_from_u64(ctx, v40);
-                                        if let Some(v42) = v41 {
-                                            let v23 = constructor_put_in_vreg(ctx, arg3);
-                                            let v8 = &constructor_unmasked(ctx);
-                                            let v9 = C::vstate_from_type(ctx, v2);
-                                            let v43 =
-                                                constructor_rv_vmseq_vi(ctx, v23, v42, v8, v9);
-                                            // Rule at src/isa/riscv64/inst_vector.isle line 1408.
-                                            return v43;
-                                        }
-                                    }
-                                }
-                            }
-                        }
-                    }
-                }
-                let v11 = C::def_inst(ctx, arg3);
-                if let Some(v12) = v11 {
-                    let v13 = &C::inst_data(ctx, v12);
-                    if let &InstructionData::Unary {
-                        opcode: ref v14,
-                        arg: v15,
-                    } = v13
-                    {
-                        if let &Opcode::Splat = v14 {
-                            let v26 = C::def_inst(ctx, v15);
-                            if let Some(v27) = v26 {
-                                let v28 = &C::inst_data(ctx, v27);
-                                if let &InstructionData::UnaryImm {
-                                    opcode: ref v29,
-                                    imm: v30,
-                                } = v28
-                                {
-                                    if let &Opcode::Iconst = v29 {
-                                        let v31 = C::u64_from_imm64(ctx, v30);
-                                        let v32 = C::imm5_from_u64(ctx, v31);
-                                        if let Some(v33) = v32 {
-                                            let v6 = constructor_put_in_vreg(ctx, arg2);
-                                            let v8 = &constructor_unmasked(ctx);
-                                            let v9 = C::vstate_from_type(ctx, v2);
-                                            let v34 = constructor_rv_vmseq_vi(ctx, v6, v33, v8, v9);
-                                            // Rule at src/isa/riscv64/inst_vector.isle line 1405.
-                                            return v34;
-                                        }
-                                    }
-                                }
-                            }
-                        }
-                    }
-                }
-                if let Some(v19) = v18 {
-                    let v20 = &C::inst_data(ctx, v19);
-                    if let &InstructionData::Unary {
-                        opcode: ref v21,
-                        arg: v22,
-                    } = v20
-                    {
-                        if let &Opcode::Splat = v21 {
-                            let v23 = constructor_put_in_vreg(ctx, arg3);
-                            let v24 = constructor_put_in_xreg(ctx, v22);
-                            let v8 = &constructor_unmasked(ctx);
-                            let v9 = C::vstate_from_type(ctx, v2);
-                            let v25 = constructor_rv_vmseq_vx(ctx, v23, v24, v8, v9);
-                            // Rule at src/isa/riscv64/inst_vector.isle line 1402.
-                            return v25;
-                        }
-                    }
-                }
-                if let Some(v12) = v11 {
-                    let v13 = &C::inst_data(ctx, v12);
-                    if let &InstructionData::Unary {
-                        opcode: ref v14,
-                        arg: v15,
-                    } = v13
-                    {
-                        if let &Opcode::Splat = v14 {
-                            let v6 = constructor_put_in_vreg(ctx, arg2);
-                            let v16 = constructor_put_in_xreg(ctx, v15);
-                            let v8 = &constructor_unmasked(ctx);
-                            let v9 = C::vstate_from_type(ctx, v2);
-                            let v17 = constructor_rv_vmseq_vx(ctx, v6, v16, v8, v9);
-                            // Rule at src/isa/riscv64/inst_vector.isle line 1399.
-                            return v17;
-                        }
-                    }
-                }
-                let v6 = constructor_put_in_vreg(ctx, arg2);
-                let v7 = constructor_put_in_vreg(ctx, arg3);
-                let v8 = &constructor_unmasked(ctx);
-                let v9 = C::vstate_from_type(ctx, v2);
-                let v10 = constructor_rv_vmseq_vv(ctx, v6, v7, v8, v9);
-                // Rule at src/isa/riscv64/inst_vector.isle line 1396.
-                return v10;
-            }
-            &IntCC::NotEqual => {
-                let v18 = C::def_inst(ctx, arg2);
-                if let Some(v19) = v18 {
-                    let v20 = &C::inst_data(ctx, v19);
-                    if let &InstructionData::Unary {
-                        opcode: ref v21,
-                        arg: v22,
-                    } = v20
-                    {
-                        if let &Opcode::Splat = v21 {
-                            let v35 = C::def_inst(ctx, v22);
-                            if let Some(v36) = v35 {
-                                let v37 = &C::inst_data(ctx, v36);
-                                if let &InstructionData::UnaryImm {
-                                    opcode: ref v38,
-                                    imm: v39,
-                                } = v37
-                                {
-                                    if let &Opcode::Iconst = v38 {
-                                        let v40 = C::u64_from_imm64(ctx, v39);
-                                        let v41 = C::imm5_from_u64(ctx, v40);
-                                        if let Some(v42) = v41 {
-                                            let v23 = constructor_put_in_vreg(ctx, arg3);
-                                            let v8 = &constructor_unmasked(ctx);
-                                            let v9 = C::vstate_from_type(ctx, v2);
-                                            let v48 =
-                                                constructor_rv_vmsne_vi(ctx, v23, v42, v8, v9);
-                                            // Rule at src/isa/riscv64/inst_vector.isle line 1425.
-                                            return v48;
-                                        }
-                                    }
-                                }
-                            }
-                        }
-                    }
-                }
-                let v11 = C::def_inst(ctx, arg3);
-                if let Some(v12) = v11 {
-                    let v13 = &C::inst_data(ctx, v12);
-                    if let &InstructionData::Unary {
-                        opcode: ref v14,
-                        arg: v15,
-                    } = v13
-                    {
-                        if let &Opcode::Splat = v14 {
-                            let v26 = C::def_inst(ctx, v15);
-                            if let Some(v27) = v26 {
-                                let v28 = &C::inst_data(ctx, v27);
-                                if let &InstructionData::UnaryImm {
-                                    opcode: ref v29,
-                                    imm: v30,
-                                } = v28
-                                {
-                                    if let &Opcode::Iconst = v29 {
-                                        let v31 = C::u64_from_imm64(ctx, v30);
-                                        let v32 = C::imm5_from_u64(ctx, v31);
-                                        if let Some(v33) = v32 {
-                                            let v6 = constructor_put_in_vreg(ctx, arg2);
-                                            let v8 = &constructor_unmasked(ctx);
-                                            let v9 = C::vstate_from_type(ctx, v2);
-                                            let v47 = constructor_rv_vmsne_vi(ctx, v6, v33, v8, v9);
-                                            // Rule at src/isa/riscv64/inst_vector.isle line 1422.
-                                            return v47;
-                                        }
-                                    }
-                                }
-                            }
-                        }
-                    }
-                }
-                if let Some(v19) = v18 {
-                    let v20 = &C::inst_data(ctx, v19);
-                    if let &InstructionData::Unary {
-                        opcode: ref v21,
-                        arg: v22,
-                    } = v20
-                    {
-                        if let &Opcode::Splat = v21 {
-                            let v23 = constructor_put_in_vreg(ctx, arg3);
-                            let v24 = constructor_put_in_xreg(ctx, v22);
-                            let v8 = &constructor_unmasked(ctx);
-                            let v9 = C::vstate_from_type(ctx, v2);
-                            let v46 = constructor_rv_vmsne_vx(ctx, v23, v24, v8, v9);
-                            // Rule at src/isa/riscv64/inst_vector.isle line 1419.
-                            return v46;
-                        }
-                    }
-                }
-                if let Some(v12) = v11 {
-                    let v13 = &C::inst_data(ctx, v12);
-                    if let &InstructionData::Unary {
-                        opcode: ref v14,
-                        arg: v15,
-                    } = v13
-                    {
-                        if let &Opcode::Splat = v14 {
-                            let v6 = constructor_put_in_vreg(ctx, arg2);
-                            let v16 = constructor_put_in_xreg(ctx, v15);
-                            let v8 = &constructor_unmasked(ctx);
-                            let v9 = C::vstate_from_type(ctx, v2);
-                            let v45 = constructor_rv_vmsne_vx(ctx, v6, v16, v8, v9);
-                            // Rule at src/isa/riscv64/inst_vector.isle line 1416.
-                            return v45;
-                        }
-                    }
-                }
-                let v6 = constructor_put_in_vreg(ctx, arg2);
-                let v7 = constructor_put_in_vreg(ctx, arg3);
-                let v8 = &constructor_unmasked(ctx);
-                let v9 = C::vstate_from_type(ctx, v2);
-                let v44 = constructor_rv_vmsne_vv(ctx, v6, v7, v8, v9);
-                // Rule at src/isa/riscv64/inst_vector.isle line 1413.
-                return v44;
-            }
-            &IntCC::SignedGreaterThan => {
-                let v11 = C::def_inst(ctx, arg3);
-                if let Some(v12) = v11 {
-                    let v13 = &C::inst_data(ctx, v12);
-                    if let &InstructionData::Unary {
-                        opcode: ref v14,
-                        arg: v15,
-                    } = v13
-                    {
-                        if let &Opcode::Splat = v14 {
-                            let v26 = C::def_inst(ctx, v15);
-                            if let Some(v27) = v26 {
-                                let v28 = &C::inst_data(ctx, v27);
-                                if let &InstructionData::UnaryImm {
-                                    opcode: ref v29,
-                                    imm: v30,
-                                } = v28
-                                {
-                                    if let &Opcode::Iconst = v29 {
-                                        let v31 = C::u64_from_imm64(ctx, v30);
-                                        let v32 = C::imm5_from_u64(ctx, v31);
-                                        if let Some(v33) = v32 {
-                                            let v6 = constructor_put_in_vreg(ctx, arg2);
-                                            let v8 = &constructor_unmasked(ctx);
-                                            let v9 = C::vstate_from_type(ctx, v2);
-                                            let v70 = constructor_rv_vmsgt_vi(ctx, v6, v33, v8, v9);
-                                            // Rule at src/isa/riscv64/inst_vector.isle line 1503.
-                                            return v70;
-                                        }
-                                    }
-                                }
-                            }
-                        }
-                    }
-                }
-                let v18 = C::def_inst(ctx, arg2);
-                if let Some(v19) = v18 {
-                    let v20 = &C::inst_data(ctx, v19);
-                    if let &InstructionData::Unary {
-                        opcode: ref v21,
-                        arg: v22,
-                    } = v20
-                    {
-                        if let &Opcode::Splat = v21 {
-                            let v23 = constructor_put_in_vreg(ctx, arg3);
-                            let v24 = constructor_put_in_xreg(ctx, v22);
-                            let v8 = &constructor_unmasked(ctx);
-                            let v9 = C::vstate_from_type(ctx, v2);
-                            let v69 = constructor_rv_vmslt_vx(ctx, v23, v24, v8, v9);
-                            // Rule at src/isa/riscv64/inst_vector.isle line 1500.
-                            return v69;
-                        }
-                    }
-                }
-                if let Some(v12) = v11 {
-                    let v13 = &C::inst_data(ctx, v12);
-                    if let &InstructionData::Unary {
-                        opcode: ref v14,
-                        arg: v15,
-                    } = v13
-                    {
-                        if let &Opcode::Splat = v14 {
-                            let v6 = constructor_put_in_vreg(ctx, arg2);
-                            let v16 = constructor_put_in_xreg(ctx, v15);
-                            let v8 = &constructor_unmasked(ctx);
-                            let v9 = C::vstate_from_type(ctx, v2);
-                            let v68 = constructor_rv_vmsgt_vx(ctx, v6, v16, v8, v9);
-                            // Rule at src/isa/riscv64/inst_vector.isle line 1497.
-                            return v68;
-                        }
-                    }
-                }
-                let v6 = constructor_put_in_vreg(ctx, arg2);
-                let v7 = constructor_put_in_vreg(ctx, arg3);
-                let v8 = &constructor_unmasked(ctx);
-                let v9 = C::vstate_from_type(ctx, v2);
-                let v67 = constructor_rv_vmsgt_vv(ctx, v6, v7, v8, v9);
-                // Rule at src/isa/riscv64/inst_vector.isle line 1494.
-                return v67;
-            }
-            &IntCC::SignedGreaterThanOrEqual => {
-                let v18 = C::def_inst(ctx, arg2);
-                if let Some(v19) = v18 {
-                    let v20 = &C::inst_data(ctx, v19);
-                    if let &InstructionData::Unary {
-                        opcode: ref v21,
-                        arg: v22,
-                    } = v20
-                    {
-                        if let &Opcode::Splat = v21 {
-                            let v35 = C::def_inst(ctx, v22);
-                            if let Some(v36) = v35 {
-                                let v37 = &C::inst_data(ctx, v36);
-                                if let &InstructionData::UnaryImm {
-                                    opcode: ref v38,
-                                    imm: v39,
-                                } = v37
-                                {
-                                    if let &Opcode::Iconst = v38 {
-                                        let v40 = C::u64_from_imm64(ctx, v39);
-                                        let v41 = C::imm5_from_u64(ctx, v40);
-                                        if let Some(v42) = v41 {
-                                            let v23 = constructor_put_in_vreg(ctx, arg3);
-                                            let v8 = &constructor_unmasked(ctx);
-                                            let v9 = C::vstate_from_type(ctx, v2);
-                                            let v76 =
-                                                constructor_rv_vmsle_vi(ctx, v23, v42, v8, v9);
-                                            // Rule at src/isa/riscv64/inst_vector.isle line 1525.
-                                            return v76;
-                                        }
-                                    }
-                                }
-                            }
-                            let v23 = constructor_put_in_vreg(ctx, arg3);
-                            let v24 = constructor_put_in_xreg(ctx, v22);
-                            let v8 = &constructor_unmasked(ctx);
-                            let v9 = C::vstate_from_type(ctx, v2);
-                            let v75 = constructor_rv_vmsle_vx(ctx, v23, v24, v8, v9);
-                            // Rule at src/isa/riscv64/inst_vector.isle line 1522.
-                            return v75;
-                        }
-                    }
-                }
-                let v6 = constructor_put_in_vreg(ctx, arg2);
-                let v7 = constructor_put_in_vreg(ctx, arg3);
-                let v8 = &constructor_unmasked(ctx);
-                let v9 = C::vstate_from_type(ctx, v2);
-                let v74 = constructor_rv_vmsge_vv(ctx, v6, v7, v8, v9);
-                // Rule at src/isa/riscv64/inst_vector.isle line 1519.
-                return v74;
-            }
-            &IntCC::SignedLessThan => {
-                let v18 = C::def_inst(ctx, arg2);
-                if let Some(v19) = v18 {
-                    let v20 = &C::inst_data(ctx, v19);
-                    if let &InstructionData::Unary {
-                        opcode: ref v21,
-                        arg: v22,
-                    } = v20
-                    {
-                        if let &Opcode::Splat = v21 {
-                            let v35 = C::def_inst(ctx, v22);
-                            if let Some(v36) = v35 {
-                                let v37 = &C::inst_data(ctx, v36);
-                                if let &InstructionData::UnaryImm {
-                                    opcode: ref v38,
-                                    imm: v39,
-                                } = v37
-                                {
-                                    if let &Opcode::Iconst = v38 {
-                                        let v40 = C::u64_from_imm64(ctx, v39);
-                                        let v41 = C::imm5_from_u64(ctx, v40);
-                                        if let Some(v42) = v41 {
-                                            let v23 = constructor_put_in_vreg(ctx, arg3);
-                                            let v8 = &constructor_unmasked(ctx);
-                                            let v9 = C::vstate_from_type(ctx, v2);
-                                            let v56 =
-                                                constructor_rv_vmsgt_vi(ctx, v23, v42, v8, v9);
-                                            // Rule at src/isa/riscv64/inst_vector.isle line 1453.
-                                            return v56;
-                                        }
-                                    }
-                                }
-                            }
-                            let v23 = constructor_put_in_vreg(ctx, arg3);
-                            let v24 = constructor_put_in_xreg(ctx, v22);
-                            let v8 = &constructor_unmasked(ctx);
-                            let v9 = C::vstate_from_type(ctx, v2);
-                            let v55 = constructor_rv_vmsgt_vx(ctx, v23, v24, v8, v9);
-                            // Rule at src/isa/riscv64/inst_vector.isle line 1450.
-                            return v55;
-                        }
-                    }
-                }
-                let v11 = C::def_inst(ctx, arg3);
-                if let Some(v12) = v11 {
-                    let v13 = &C::inst_data(ctx, v12);
-                    if let &InstructionData::Unary {
-                        opcode: ref v14,
-                        arg: v15,
-                    } = v13
-                    {
-                        if let &Opcode::Splat = v14 {
-                            let v6 = constructor_put_in_vreg(ctx, arg2);
-                            let v16 = constructor_put_in_xreg(ctx, v15);
-                            let v8 = &constructor_unmasked(ctx);
-                            let v9 = C::vstate_from_type(ctx, v2);
-                            let v54 = constructor_rv_vmslt_vx(ctx, v6, v16, v8, v9);
-                            // Rule at src/isa/riscv64/inst_vector.isle line 1447.
-                            return v54;
-                        }
-                    }
-                }
-                let v6 = constructor_put_in_vreg(ctx, arg2);
-                let v7 = constructor_put_in_vreg(ctx, arg3);
-                let v8 = &constructor_unmasked(ctx);
-                let v9 = C::vstate_from_type(ctx, v2);
-                let v53 = constructor_rv_vmslt_vv(ctx, v6, v7, v8, v9);
-                // Rule at src/isa/riscv64/inst_vector.isle line 1444.
-                return v53;
-            }
-            &IntCC::SignedLessThanOrEqual => {
-                let v11 = C::def_inst(ctx, arg3);
-                if let Some(v12) = v11 {
-                    let v13 = &C::inst_data(ctx, v12);
-                    if let &InstructionData::Unary {
-                        opcode: ref v14,
-                        arg: v15,
-                    } = v13
-                    {
-                        if let &Opcode::Splat = v14 {
-                            let v26 = C::def_inst(ctx, v15);
-                            if let Some(v27) = v26 {
-                                let v28 = &C::inst_data(ctx, v27);
-                                if let &InstructionData::UnaryImm {
-                                    opcode: ref v29,
-                                    imm: v30,
-                                } = v28
-                                {
-                                    if let &Opcode::Iconst = v29 {
-                                        let v31 = C::u64_from_imm64(ctx, v30);
-                                        let v32 = C::imm5_from_u64(ctx, v31);
-                                        if let Some(v33) = v32 {
-                                            let v6 = constructor_put_in_vreg(ctx, arg2);
-                                            let v8 = &constructor_unmasked(ctx);
-                                            let v9 = C::vstate_from_type(ctx, v2);
-                                            let v62 = constructor_rv_vmsle_vi(ctx, v6, v33, v8, v9);
-                                            // Rule at src/isa/riscv64/inst_vector.isle line 1475.
-                                            return v62;
-                                        }
-                                    }
-                                }
-                            }
-                            let v6 = constructor_put_in_vreg(ctx, arg2);
-                            let v16 = constructor_put_in_xreg(ctx, v15);
-                            let v8 = &constructor_unmasked(ctx);
-                            let v9 = C::vstate_from_type(ctx, v2);
-                            let v61 = constructor_rv_vmsle_vx(ctx, v6, v16, v8, v9);
-                            // Rule at src/isa/riscv64/inst_vector.isle line 1472.
-                            return v61;
-                        }
-                    }
-                }
-                let v6 = constructor_put_in_vreg(ctx, arg2);
-                let v7 = constructor_put_in_vreg(ctx, arg3);
-                let v8 = &constructor_unmasked(ctx);
-                let v9 = C::vstate_from_type(ctx, v2);
-                let v60 = constructor_rv_vmsle_vv(ctx, v6, v7, v8, v9);
-                // Rule at src/isa/riscv64/inst_vector.isle line 1469.
-                return v60;
-            }
-            &IntCC::UnsignedGreaterThan => {
-                let v11 = C::def_inst(ctx, arg3);
-                if let Some(v12) = v11 {
-                    let v13 = &C::inst_data(ctx, v12);
-                    if let &InstructionData::Unary {
-                        opcode: ref v14,
-                        arg: v15,
-                    } = v13
-                    {
-                        if let &Opcode::Splat = v14 {
-                            let v26 = C::def_inst(ctx, v15);
-                            if let Some(v27) = v26 {
-                                let v28 = &C::inst_data(ctx, v27);
-                                if let &InstructionData::UnaryImm {
-                                    opcode: ref v29,
-                                    imm: v30,
-                                } = v28
-                                {
-                                    if let &Opcode::Iconst = v29 {
-                                        let v31 = C::u64_from_imm64(ctx, v30);
-                                        let v32 = C::imm5_from_u64(ctx, v31);
-                                        if let Some(v33) = v32 {
-                                            let v6 = constructor_put_in_vreg(ctx, arg2);
-                                            let v8 = &constructor_unmasked(ctx);
-                                            let v9 = C::vstate_from_type(ctx, v2);
-                                            let v66 =
-                                                constructor_rv_vmsgtu_vi(ctx, v6, v33, v8, v9);
-                                            // Rule at src/isa/riscv64/inst_vector.isle line 1489.
-                                            return v66;
-                                        }
-                                    }
-                                }
-                            }
-                        }
-                    }
-                }
-                let v18 = C::def_inst(ctx, arg2);
-                if let Some(v19) = v18 {
-                    let v20 = &C::inst_data(ctx, v19);
-                    if let &InstructionData::Unary {
-                        opcode: ref v21,
-                        arg: v22,
-                    } = v20
-                    {
-                        if let &Opcode::Splat = v21 {
-                            let v23 = constructor_put_in_vreg(ctx, arg3);
-                            let v24 = constructor_put_in_xreg(ctx, v22);
-                            let v8 = &constructor_unmasked(ctx);
-                            let v9 = C::vstate_from_type(ctx, v2);
-                            let v65 = constructor_rv_vmsltu_vx(ctx, v23, v24, v8, v9);
-                            // Rule at src/isa/riscv64/inst_vector.isle line 1486.
-                            return v65;
-                        }
-                    }
-                }
-                if let Some(v12) = v11 {
-                    let v13 = &C::inst_data(ctx, v12);
-                    if let &InstructionData::Unary {
-                        opcode: ref v14,
-                        arg: v15,
-                    } = v13
-                    {
-                        if let &Opcode::Splat = v14 {
-                            let v6 = constructor_put_in_vreg(ctx, arg2);
-                            let v16 = constructor_put_in_xreg(ctx, v15);
-                            let v8 = &constructor_unmasked(ctx);
-                            let v9 = C::vstate_from_type(ctx, v2);
-                            let v64 = constructor_rv_vmsgtu_vx(ctx, v6, v16, v8, v9);
-                            // Rule at src/isa/riscv64/inst_vector.isle line 1483.
-                            return v64;
-                        }
-                    }
-                }
-                let v6 = constructor_put_in_vreg(ctx, arg2);
-                let v7 = constructor_put_in_vreg(ctx, arg3);
-                let v8 = &constructor_unmasked(ctx);
-                let v9 = C::vstate_from_type(ctx, v2);
-                let v63 = constructor_rv_vmsgtu_vv(ctx, v6, v7, v8, v9);
-                // Rule at src/isa/riscv64/inst_vector.isle line 1480.
-                return v63;
-            }
-            &IntCC::UnsignedGreaterThanOrEqual => {
-                let v18 = C::def_inst(ctx, arg2);
-                if let Some(v19) = v18 {
-                    let v20 = &C::inst_data(ctx, v19);
-                    if let &InstructionData::Unary {
-                        opcode: ref v21,
-                        arg: v22,
-                    } = v20
-                    {
-                        if let &Opcode::Splat = v21 {
-                            let v35 = C::def_inst(ctx, v22);
-                            if let Some(v36) = v35 {
-                                let v37 = &C::inst_data(ctx, v36);
-                                if let &InstructionData::UnaryImm {
-                                    opcode: ref v38,
-                                    imm: v39,
-                                } = v37
-                                {
-                                    if let &Opcode::Iconst = v38 {
-                                        let v40 = C::u64_from_imm64(ctx, v39);
-                                        let v41 = C::imm5_from_u64(ctx, v40);
-                                        if let Some(v42) = v41 {
-                                            let v23 = constructor_put_in_vreg(ctx, arg3);
-                                            let v8 = &constructor_unmasked(ctx);
-                                            let v9 = C::vstate_from_type(ctx, v2);
-                                            let v73 =
-                                                constructor_rv_vmsleu_vi(ctx, v23, v42, v8, v9);
-                                            // Rule at src/isa/riscv64/inst_vector.isle line 1514.
-                                            return v73;
-                                        }
-                                    }
-                                }
-                            }
-                            let v23 = constructor_put_in_vreg(ctx, arg3);
-                            let v24 = constructor_put_in_xreg(ctx, v22);
-                            let v8 = &constructor_unmasked(ctx);
-                            let v9 = C::vstate_from_type(ctx, v2);
-                            let v72 = constructor_rv_vmsleu_vx(ctx, v23, v24, v8, v9);
-                            // Rule at src/isa/riscv64/inst_vector.isle line 1511.
-                            return v72;
-                        }
-                    }
-                }
-                let v6 = constructor_put_in_vreg(ctx, arg2);
-                let v7 = constructor_put_in_vreg(ctx, arg3);
-                let v8 = &constructor_unmasked(ctx);
-                let v9 = C::vstate_from_type(ctx, v2);
-                let v71 = constructor_rv_vmsgeu_vv(ctx, v6, v7, v8, v9);
-                // Rule at src/isa/riscv64/inst_vector.isle line 1508.
-                return v71;
-            }
-            &IntCC::UnsignedLessThan => {
-                let v18 = C::def_inst(ctx, arg2);
-                if let Some(v19) = v18 {
-                    let v20 = &C::inst_data(ctx, v19);
-                    if let &InstructionData::Unary {
-                        opcode: ref v21,
-                        arg: v22,
-                    } = v20
-                    {
-                        if let &Opcode::Splat = v21 {
-                            let v35 = C::def_inst(ctx, v22);
-                            if let Some(v36) = v35 {
-                                let v37 = &C::inst_data(ctx, v36);
-                                if let &InstructionData::UnaryImm {
-                                    opcode: ref v38,
-                                    imm: v39,
-                                } = v37
-                                {
-                                    if let &Opcode::Iconst = v38 {
-                                        let v40 = C::u64_from_imm64(ctx, v39);
-                                        let v41 = C::imm5_from_u64(ctx, v40);
-                                        if let Some(v42) = v41 {
-                                            let v23 = constructor_put_in_vreg(ctx, arg3);
-                                            let v8 = &constructor_unmasked(ctx);
-                                            let v9 = C::vstate_from_type(ctx, v2);
-                                            let v52 =
-                                                constructor_rv_vmsgtu_vi(ctx, v23, v42, v8, v9);
-                                            // Rule at src/isa/riscv64/inst_vector.isle line 1439.
-                                            return v52;
-                                        }
-                                    }
-                                }
-                            }
-                            let v23 = constructor_put_in_vreg(ctx, arg3);
-                            let v24 = constructor_put_in_xreg(ctx, v22);
-                            let v8 = &constructor_unmasked(ctx);
-                            let v9 = C::vstate_from_type(ctx, v2);
-                            let v51 = constructor_rv_vmsgtu_vx(ctx, v23, v24, v8, v9);
-                            // Rule at src/isa/riscv64/inst_vector.isle line 1436.
-                            return v51;
-                        }
-                    }
-                }
-                let v11 = C::def_inst(ctx, arg3);
-                if let Some(v12) = v11 {
-                    let v13 = &C::inst_data(ctx, v12);
-                    if let &InstructionData::Unary {
-                        opcode: ref v14,
-                        arg: v15,
-                    } = v13
-                    {
-                        if let &Opcode::Splat = v14 {
-                            let v6 = constructor_put_in_vreg(ctx, arg2);
-                            let v16 = constructor_put_in_xreg(ctx, v15);
-                            let v8 = &constructor_unmasked(ctx);
-                            let v9 = C::vstate_from_type(ctx, v2);
-                            let v50 = constructor_rv_vmsltu_vx(ctx, v6, v16, v8, v9);
-                            // Rule at src/isa/riscv64/inst_vector.isle line 1433.
-                            return v50;
-                        }
-                    }
-                }
-                let v6 = constructor_put_in_vreg(ctx, arg2);
-                let v7 = constructor_put_in_vreg(ctx, arg3);
-                let v8 = &constructor_unmasked(ctx);
-                let v9 = C::vstate_from_type(ctx, v2);
-                let v49 = constructor_rv_vmsltu_vv(ctx, v6, v7, v8, v9);
-                // Rule at src/isa/riscv64/inst_vector.isle line 1430.
-                return v49;
-            }
-            &IntCC::UnsignedLessThanOrEqual => {
-                let v11 = C::def_inst(ctx, arg3);
-                if let Some(v12) = v11 {
-                    let v13 = &C::inst_data(ctx, v12);
-                    if let &InstructionData::Unary {
-                        opcode: ref v14,
-                        arg: v15,
-                    } = v13
-                    {
-                        if let &Opcode::Splat = v14 {
-                            let v26 = C::def_inst(ctx, v15);
-                            if let Some(v27) = v26 {
-                                let v28 = &C::inst_data(ctx, v27);
-                                if let &InstructionData::UnaryImm {
-                                    opcode: ref v29,
-                                    imm: v30,
-                                } = v28
-                                {
-                                    if let &Opcode::Iconst = v29 {
-                                        let v31 = C::u64_from_imm64(ctx, v30);
-                                        let v32 = C::imm5_from_u64(ctx, v31);
-                                        if let Some(v33) = v32 {
-                                            let v6 = constructor_put_in_vreg(ctx, arg2);
-                                            let v8 = &constructor_unmasked(ctx);
-                                            let v9 = C::vstate_from_type(ctx, v2);
-                                            let v59 =
-                                                constructor_rv_vmsleu_vi(ctx, v6, v33, v8, v9);
-                                            // Rule at src/isa/riscv64/inst_vector.isle line 1464.
-                                            return v59;
-                                        }
-                                    }
-                                }
-                            }
-                            let v6 = constructor_put_in_vreg(ctx, arg2);
-                            let v16 = constructor_put_in_xreg(ctx, v15);
-                            let v8 = &constructor_unmasked(ctx);
-                            let v9 = C::vstate_from_type(ctx, v2);
-                            let v58 = constructor_rv_vmsleu_vx(ctx, v6, v16, v8, v9);
-                            // Rule at src/isa/riscv64/inst_vector.isle line 1461.
-                            return v58;
-                        }
-                    }
-                }
-                let v6 = constructor_put_in_vreg(ctx, arg2);
-                let v7 = constructor_put_in_vreg(ctx, arg3);
-                let v8 = &constructor_unmasked(ctx);
-                let v9 = C::vstate_from_type(ctx, v2);
-                let v57 = constructor_rv_vmsleu_vv(ctx, v6, v7, v8, v9);
-                // Rule at src/isa/riscv64/inst_vector.isle line 1458.
-                return v57;
-            }
-            _ => {}
-        }
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "gen_icmp_mask", "src/isa/riscv64/inst_vector.isle line 1392"
-    )
-}
-
-// Generated as internal constructor for term gen_fcmp_mask.
-pub fn constructor_gen_fcmp_mask<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &FloatCC,
-    arg2: Value,
-    arg3: Value,
-) -> VReg {
-    let v1 = C::ty_vec_fits_in_register(ctx, arg0);
-    if let Some(v2) = v1 {
-        match arg1 {
-            &FloatCC::Equal => {
-                let v18 = C::def_inst(ctx, arg2);
-                if let Some(v19) = v18 {
-                    let v20 = &C::inst_data(ctx, v19);
-                    if let &InstructionData::Unary {
-                        opcode: ref v21,
-                        arg: v22,
-                    } = v20
-                    {
-                        if let &Opcode::Splat = v21 {
-                            let v23 = constructor_put_in_vreg(ctx, arg3);
-                            let v24 = constructor_put_in_freg(ctx, v22);
-                            let v8 = &constructor_unmasked(ctx);
-                            let v9 = C::vstate_from_type(ctx, v2);
-                            let v25 = constructor_rv_vmfeq_vf(ctx, v23, v24, v8, v9);
-                            // Rule at src/isa/riscv64/inst_vector.isle line 1541.
-                            return v25;
-                        }
-                    }
-                }
-                let v11 = C::def_inst(ctx, arg3);
-                if let Some(v12) = v11 {
-                    let v13 = &C::inst_data(ctx, v12);
-                    if let &InstructionData::Unary {
-                        opcode: ref v14,
-                        arg: v15,
-                    } = v13
-                    {
-                        if let &Opcode::Splat = v14 {
-                            let v6 = constructor_put_in_vreg(ctx, arg2);
-                            let v16 = constructor_put_in_freg(ctx, v15);
-                            let v8 = &constructor_unmasked(ctx);
-                            let v9 = C::vstate_from_type(ctx, v2);
-                            let v17 = constructor_rv_vmfeq_vf(ctx, v6, v16, v8, v9);
-                            // Rule at src/isa/riscv64/inst_vector.isle line 1538.
-                            return v17;
-                        }
-                    }
-                }
-                let v6 = constructor_put_in_vreg(ctx, arg2);
-                let v7 = constructor_put_in_vreg(ctx, arg3);
-                let v8 = &constructor_unmasked(ctx);
-                let v9 = C::vstate_from_type(ctx, v2);
-                let v10 = constructor_rv_vmfeq_vv(ctx, v6, v7, v8, v9);
-                // Rule at src/isa/riscv64/inst_vector.isle line 1535.
-                return v10;
-            }
-            &FloatCC::GreaterThan => {
-                let v18 = C::def_inst(ctx, arg2);
-                if let Some(v19) = v18 {
-                    let v20 = &C::inst_data(ctx, v19);
-                    if let &InstructionData::Unary {
-                        opcode: ref v21,
-                        arg: v22,
-                    } = v20
-                    {
-                        if let &Opcode::Splat = v21 {
-                            let v23 = constructor_put_in_vreg(ctx, arg3);
-                            let v24 = constructor_put_in_freg(ctx, v22);
-                            let v8 = &constructor_unmasked(ctx);
-                            let v9 = C::vstate_from_type(ctx, v2);
-                            let v37 = constructor_rv_vmflt_vf(ctx, v23, v24, v8, v9);
-                            // Rule at src/isa/riscv64/inst_vector.isle line 1586.
-                            return v37;
-                        }
-                    }
-                }
-                let v11 = C::def_inst(ctx, arg3);
-                if let Some(v12) = v11 {
-                    let v13 = &C::inst_data(ctx, v12);
-                    if let &InstructionData::Unary {
-                        opcode: ref v14,
-                        arg: v15,
-                    } = v13
-                    {
-                        if let &Opcode::Splat = v14 {
-                            let v6 = constructor_put_in_vreg(ctx, arg2);
-                            let v16 = constructor_put_in_freg(ctx, v15);
-                            let v8 = &constructor_unmasked(ctx);
-                            let v9 = C::vstate_from_type(ctx, v2);
-                            let v36 = constructor_rv_vmfgt_vf(ctx, v6, v16, v8, v9);
-                            // Rule at src/isa/riscv64/inst_vector.isle line 1583.
-                            return v36;
-                        }
-                    }
-                }
-                let v6 = constructor_put_in_vreg(ctx, arg2);
-                let v7 = constructor_put_in_vreg(ctx, arg3);
-                let v8 = &constructor_unmasked(ctx);
-                let v9 = C::vstate_from_type(ctx, v2);
-                let v35 = constructor_rv_vmfgt_vv(ctx, v6, v7, v8, v9);
-                // Rule at src/isa/riscv64/inst_vector.isle line 1580.
-                return v35;
-            }
-            &FloatCC::GreaterThanOrEqual => {
-                let v18 = C::def_inst(ctx, arg2);
-                if let Some(v19) = v18 {
-                    let v20 = &C::inst_data(ctx, v19);
-                    if let &InstructionData::Unary {
-                        opcode: ref v21,
-                        arg: v22,
-                    } = v20
-                    {
-                        if let &Opcode::Splat = v21 {
-                            let v23 = constructor_put_in_vreg(ctx, arg3);
-                            let v24 = constructor_put_in_freg(ctx, v22);
-                            let v8 = &constructor_unmasked(ctx);
-                            let v9 = C::vstate_from_type(ctx, v2);
-                            let v40 = constructor_rv_vmfle_vf(ctx, v23, v24, v8, v9);
-                            // Rule at src/isa/riscv64/inst_vector.isle line 1597.
-                            return v40;
-                        }
-                    }
-                }
-                let v11 = C::def_inst(ctx, arg3);
-                if let Some(v12) = v11 {
-                    let v13 = &C::inst_data(ctx, v12);
-                    if let &InstructionData::Unary {
-                        opcode: ref v14,
-                        arg: v15,
-                    } = v13
-                    {
-                        if let &Opcode::Splat = v14 {
-                            let v6 = constructor_put_in_vreg(ctx, arg2);
-                            let v16 = constructor_put_in_freg(ctx, v15);
-                            let v8 = &constructor_unmasked(ctx);
-                            let v9 = C::vstate_from_type(ctx, v2);
-                            let v39 = constructor_rv_vmfge_vf(ctx, v6, v16, v8, v9);
-                            // Rule at src/isa/riscv64/inst_vector.isle line 1594.
-                            return v39;
-                        }
-                    }
-                }
-                let v6 = constructor_put_in_vreg(ctx, arg2);
-                let v7 = constructor_put_in_vreg(ctx, arg3);
-                let v8 = &constructor_unmasked(ctx);
-                let v9 = C::vstate_from_type(ctx, v2);
-                let v38 = constructor_rv_vmfge_vv(ctx, v6, v7, v8, v9);
-                // Rule at src/isa/riscv64/inst_vector.isle line 1591.
-                return v38;
-            }
-            &FloatCC::LessThan => {
-                let v18 = C::def_inst(ctx, arg2);
-                if let Some(v19) = v18 {
-                    let v20 = &C::inst_data(ctx, v19);
-                    if let &InstructionData::Unary {
-                        opcode: ref v21,
-                        arg: v22,
-                    } = v20
-                    {
-                        if let &Opcode::Splat = v21 {
-                            let v23 = constructor_put_in_vreg(ctx, arg3);
-                            let v24 = constructor_put_in_freg(ctx, v22);
-                            let v8 = &constructor_unmasked(ctx);
-                            let v9 = C::vstate_from_type(ctx, v2);
-                            let v31 = constructor_rv_vmfgt_vf(ctx, v23, v24, v8, v9);
-                            // Rule at src/isa/riscv64/inst_vector.isle line 1564.
-                            return v31;
-                        }
-                    }
-                }
-                let v11 = C::def_inst(ctx, arg3);
-                if let Some(v12) = v11 {
-                    let v13 = &C::inst_data(ctx, v12);
-                    if let &InstructionData::Unary {
-                        opcode: ref v14,
-                        arg: v15,
-                    } = v13
-                    {
-                        if let &Opcode::Splat = v14 {
-                            let v6 = constructor_put_in_vreg(ctx, arg2);
-                            let v16 = constructor_put_in_freg(ctx, v15);
-                            let v8 = &constructor_unmasked(ctx);
-                            let v9 = C::vstate_from_type(ctx, v2);
-                            let v30 = constructor_rv_vmflt_vf(ctx, v6, v16, v8, v9);
-                            // Rule at src/isa/riscv64/inst_vector.isle line 1561.
-                            return v30;
-                        }
-                    }
-                }
-                let v6 = constructor_put_in_vreg(ctx, arg2);
-                let v7 = constructor_put_in_vreg(ctx, arg3);
-                let v8 = &constructor_unmasked(ctx);
-                let v9 = C::vstate_from_type(ctx, v2);
-                let v29 = constructor_rv_vmflt_vv(ctx, v6, v7, v8, v9);
-                // Rule at src/isa/riscv64/inst_vector.isle line 1558.
-                return v29;
-            }
-            &FloatCC::LessThanOrEqual => {
-                let v18 = C::def_inst(ctx, arg2);
-                if let Some(v19) = v18 {
-                    let v20 = &C::inst_data(ctx, v19);
-                    if let &InstructionData::Unary {
-                        opcode: ref v21,
-                        arg: v22,
-                    } = v20
-                    {
-                        if let &Opcode::Splat = v21 {
-                            let v23 = constructor_put_in_vreg(ctx, arg3);
-                            let v24 = constructor_put_in_freg(ctx, v22);
-                            let v8 = &constructor_unmasked(ctx);
-                            let v9 = C::vstate_from_type(ctx, v2);
-                            let v34 = constructor_rv_vmfge_vf(ctx, v23, v24, v8, v9);
-                            // Rule at src/isa/riscv64/inst_vector.isle line 1575.
-                            return v34;
-                        }
-                    }
-                }
-                let v11 = C::def_inst(ctx, arg3);
-                if let Some(v12) = v11 {
-                    let v13 = &C::inst_data(ctx, v12);
-                    if let &InstructionData::Unary {
-                        opcode: ref v14,
-                        arg: v15,
-                    } = v13
-                    {
-                        if let &Opcode::Splat = v14 {
-                            let v6 = constructor_put_in_vreg(ctx, arg2);
-                            let v16 = constructor_put_in_freg(ctx, v15);
-                            let v8 = &constructor_unmasked(ctx);
-                            let v9 = C::vstate_from_type(ctx, v2);
-                            let v33 = constructor_rv_vmfle_vf(ctx, v6, v16, v8, v9);
-                            // Rule at src/isa/riscv64/inst_vector.isle line 1572.
-                            return v33;
-                        }
-                    }
-                }
-                let v6 = constructor_put_in_vreg(ctx, arg2);
-                let v7 = constructor_put_in_vreg(ctx, arg3);
-                let v8 = &constructor_unmasked(ctx);
-                let v9 = C::vstate_from_type(ctx, v2);
-                let v32 = constructor_rv_vmfle_vv(ctx, v6, v7, v8, v9);
-                // Rule at src/isa/riscv64/inst_vector.isle line 1569.
-                return v32;
-            }
-            &FloatCC::NotEqual => {
-                let v18 = C::def_inst(ctx, arg2);
-                if let Some(v19) = v18 {
-                    let v20 = &C::inst_data(ctx, v19);
-                    if let &InstructionData::Unary {
-                        opcode: ref v21,
-                        arg: v22,
-                    } = v20
-                    {
-                        if let &Opcode::Splat = v21 {
-                            let v23 = constructor_put_in_vreg(ctx, arg3);
-                            let v24 = constructor_put_in_freg(ctx, v22);
-                            let v8 = &constructor_unmasked(ctx);
-                            let v9 = C::vstate_from_type(ctx, v2);
-                            let v28 = constructor_rv_vmfne_vf(ctx, v23, v24, v8, v9);
-                            // Rule at src/isa/riscv64/inst_vector.isle line 1553.
-                            return v28;
-                        }
-                    }
-                }
-                let v11 = C::def_inst(ctx, arg3);
-                if let Some(v12) = v11 {
-                    let v13 = &C::inst_data(ctx, v12);
-                    if let &InstructionData::Unary {
-                        opcode: ref v14,
-                        arg: v15,
-                    } = v13
-                    {
-                        if let &Opcode::Splat = v14 {
-                            let v6 = constructor_put_in_vreg(ctx, arg2);
-                            let v16 = constructor_put_in_freg(ctx, v15);
-                            let v8 = &constructor_unmasked(ctx);
-                            let v9 = C::vstate_from_type(ctx, v2);
-                            let v27 = constructor_rv_vmfne_vf(ctx, v6, v16, v8, v9);
-                            // Rule at src/isa/riscv64/inst_vector.isle line 1550.
-                            return v27;
-                        }
-                    }
-                }
-                let v6 = constructor_put_in_vreg(ctx, arg2);
-                let v7 = constructor_put_in_vreg(ctx, arg3);
-                let v8 = &constructor_unmasked(ctx);
-                let v9 = C::vstate_from_type(ctx, v2);
-                let v26 = constructor_rv_vmfne_vv(ctx, v6, v7, v8, v9);
-                // Rule at src/isa/riscv64/inst_vector.isle line 1547.
-                return v26;
-            }
-            &FloatCC::Ordered => {
-                let v42 = constructor_gen_fcmp_mask(ctx, v2, &FloatCC::Equal, arg2, arg2);
-                let v43 = constructor_gen_fcmp_mask(ctx, v2, &FloatCC::Equal, arg3, arg3);
-                let v9 = C::vstate_from_type(ctx, v2);
-                let v44 = constructor_rv_vmand_mm(ctx, v42, v43, v9);
-                // Rule at src/isa/riscv64/inst_vector.isle line 1602.
-                return v44;
-            }
-            &FloatCC::OrderedNotEqual => {
-                let v50 = constructor_gen_fcmp_mask(ctx, v2, &FloatCC::LessThan, arg2, arg3);
-                let v51 = constructor_gen_fcmp_mask(ctx, v2, &FloatCC::LessThan, arg3, arg2);
-                let v9 = C::vstate_from_type(ctx, v2);
-                let v52 = constructor_rv_vmor_mm(ctx, v50, v51, v9);
-                // Rule at src/isa/riscv64/inst_vector.isle line 1618.
-                return v52;
-            }
-            &FloatCC::Unordered => {
-                let v46 = constructor_gen_fcmp_mask(ctx, v2, &FloatCC::NotEqual, arg2, arg2);
-                let v47 = constructor_gen_fcmp_mask(ctx, v2, &FloatCC::NotEqual, arg3, arg3);
-                let v9 = C::vstate_from_type(ctx, v2);
-                let v48 = constructor_rv_vmor_mm(ctx, v46, v47, v9);
-                // Rule at src/isa/riscv64/inst_vector.isle line 1610.
-                return v48;
-            }
-            &FloatCC::UnorderedOrEqual => {
-                let v50 = constructor_gen_fcmp_mask(ctx, v2, &FloatCC::LessThan, arg2, arg3);
-                let v51 = constructor_gen_fcmp_mask(ctx, v2, &FloatCC::LessThan, arg3, arg2);
-                let v9 = C::vstate_from_type(ctx, v2);
-                let v53 = constructor_rv_vmnor_mm(ctx, v50, v51, v9);
-                // Rule at src/isa/riscv64/inst_vector.isle line 1626.
-                return v53;
-            }
-            &FloatCC::UnorderedOrGreaterThan => {
-                let v55 = constructor_gen_fcmp_mask(ctx, v2, &FloatCC::LessThanOrEqual, arg2, arg3);
-                let v9 = C::vstate_from_type(ctx, v2);
-                let v56 = constructor_rv_vmnot_m(ctx, v55, v9);
-                // Rule at src/isa/riscv64/inst_vector.isle line 1634.
-                return v56;
-            }
-            &FloatCC::UnorderedOrGreaterThanOrEqual => {
-                let v50 = constructor_gen_fcmp_mask(ctx, v2, &FloatCC::LessThan, arg2, arg3);
-                let v9 = C::vstate_from_type(ctx, v2);
-                let v57 = constructor_rv_vmnot_m(ctx, v50, v9);
-                // Rule at src/isa/riscv64/inst_vector.isle line 1639.
-                return v57;
-            }
-            &FloatCC::UnorderedOrLessThan => {
-                let v59 =
-                    constructor_gen_fcmp_mask(ctx, v2, &FloatCC::GreaterThanOrEqual, arg2, arg3);
-                let v9 = C::vstate_from_type(ctx, v2);
-                let v60 = constructor_rv_vmnot_m(ctx, v59, v9);
-                // Rule at src/isa/riscv64/inst_vector.isle line 1644.
-                return v60;
-            }
-            &FloatCC::UnorderedOrLessThanOrEqual => {
-                let v62 = constructor_gen_fcmp_mask(ctx, v2, &FloatCC::GreaterThan, arg2, arg3);
-                let v9 = C::vstate_from_type(ctx, v2);
-                let v63 = constructor_rv_vmnot_m(ctx, v62, v9);
-                // Rule at src/isa/riscv64/inst_vector.isle line 1649.
-                return v63;
-            }
-            _ => {}
-        }
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "gen_fcmp_mask", "src/isa/riscv64/inst_vector.isle line 1531"
-    )
-}
-
-// Generated as internal constructor for term lower.
-pub fn constructor_lower<C: Context>(ctx: &mut C, arg0: Inst) -> Option<InstOutput> {
-    let v4 = &C::inst_data(ctx, arg0);
-    match v4 {
-        &InstructionData::AtomicCas {
-            opcode: ref v1030,
-            args: ref v1031,
-            flags: v1032,
-        } => {
-            if let &Opcode::AtomicCas = v1030 {
-                let v1 = C::first_result(ctx, arg0);
-                if let Some(v2) = v1 {
-                    let v3 = C::value_type(ctx, v2);
-                    let v969 = C::valid_atomic_transaction(ctx, v3);
-                    if let Some(v970) = v969 {
-                        let v1000 = C::temp_writable_reg(ctx, v970);
-                        let v1037 = C::temp_writable_reg(ctx, v970);
-                        let v1033 = C::unpack_value_array_3(ctx, v1031);
-                        let v1038 = constructor_put_in_xreg(ctx, v1033.0);
-                        let v1039 = constructor_gen_atomic_offset(ctx, v1038, v970);
-                        let v1041 = constructor_put_in_xreg(ctx, v1033.1);
-                        let v1042 = constructor_zext(ctx, v1041, v970, I64);
-                        let v1044 = constructor_put_in_xreg(ctx, v1033.0);
-                        let v1045 = constructor_gen_atomic_p(ctx, v1044, v970);
-                        let v1047 = C::put_in_reg(ctx, v1033.2);
-                        let v1040 = C::xreg_to_reg(ctx, v1039);
-                        let v1043 = C::xreg_to_reg(ctx, v1042);
-                        let v1046 = C::xreg_to_reg(ctx, v1045);
-                        let v1048 = MInst::AtomicCas {
-                            offset: v1040,
-                            t0: v1000,
-                            dst: v1037,
-                            e: v1043,
-                            addr: v1046,
-                            v: v1047,
-                            ty: v970,
-                        };
-                        let v1049 = C::emit(ctx, &v1048);
-                        let v1050 = C::writable_reg_to_reg(ctx, v1037);
-                        let v1051 = constructor_output_reg(ctx, v1050);
-                        // Rule at src/isa/riscv64/lower.isle line 1111.
-                        return Some(v1051);
-                    }
-                }
-            }
-        }
-        &InstructionData::AtomicRmw {
-            opcode: ref v971,
-            args: ref v972,
-            flags: v973,
-            op: ref v974,
-        } => {
-            if let &Opcode::AtomicRmw = v971 {
-                let v1 = C::first_result(ctx, arg0);
-                if let Some(v2) = v1 {
-                    let v3 = C::value_type(ctx, v2);
-                    let v969 = C::valid_atomic_transaction(ctx, v3);
-                    if let Some(v970) = v969 {
-                        let v984 = C::fits_in_16(ctx, v970);
-                        if let Some(v985) = v984 {
-                            let v990 = C::is_atomic_rmw_max_etc(ctx, v974);
-                            if let Some(v991) = v990 {
-                                match v991.1 {
-                                    true => {
-                                        let v975 = C::unpack_value_array_2(ctx, v972);
-                                        let v986 = constructor_put_in_xreg(ctx, v975.0);
-                                        let v987 = constructor_put_in_xreg(ctx, v975.1);
-                                        let v994 = constructor_sext(ctx, v987, v985, I64);
-                                        let v995 = constructor_gen_atomic_rmw_loop(
-                                            ctx, &v991.0, v985, v986, v994,
-                                        );
-                                        let v996 = constructor_output_xreg(ctx, v995);
-                                        // Rule at src/isa/riscv64/lower.isle line 1043.
-                                        return Some(v996);
-                                    }
-                                    false => {
-                                        let v975 = C::unpack_value_array_2(ctx, v972);
-                                        let v986 = constructor_put_in_xreg(ctx, v975.0);
-                                        let v987 = constructor_put_in_xreg(ctx, v975.1);
-                                        let v997 = constructor_zext(ctx, v987, v985, I64);
-                                        let v998 = constructor_gen_atomic_rmw_loop(
-                                            ctx, &v991.0, v985, v986, v997,
-                                        );
-                                        let v999 = constructor_output_xreg(ctx, v998);
-                                        // Rule at src/isa/riscv64/lower.isle line 1049.
-                                        return Some(v999);
-                                    }
-                                    _ => {}
-                                }
-                            }
-                            let v975 = C::unpack_value_array_2(ctx, v972);
-                            let v986 = constructor_put_in_xreg(ctx, v975.0);
-                            let v987 = constructor_put_in_xreg(ctx, v975.1);
-                            let v988 = constructor_gen_atomic_rmw_loop(ctx, v974, v985, v986, v987);
-                            let v989 = constructor_output_xreg(ctx, v988);
-                            // Rule at src/isa/riscv64/lower.isle line 1036.
-                            return Some(v989);
-                        }
-                        match v974 {
-                            &AtomicRmwOp::Nand => {
-                                let v975 = C::unpack_value_array_2(ctx, v972);
-                                let v986 = constructor_put_in_xreg(ctx, v975.0);
-                                let v987 = constructor_put_in_xreg(ctx, v975.1);
-                                let v1010 = constructor_gen_atomic_rmw_loop(
-                                    ctx,
-                                    &AtomicRmwOp::Nand,
-                                    v970,
-                                    v986,
-                                    v987,
-                                );
-                                let v1011 = constructor_output_xreg(ctx, v1010);
-                                // Rule at src/isa/riscv64/lower.isle line 1076.
-                                return Some(v1011);
-                            }
-                            &AtomicRmwOp::Sub => {
-                                let v1000 = C::temp_writable_reg(ctx, v970);
-                                let v975 = C::unpack_value_array_2(ctx, v972);
-                                let v987 = constructor_put_in_xreg(ctx, v975.1);
-                                let v1001 = constructor_rv_neg(ctx, v987);
-                                let v1004 =
-                                    &constructor_get_atomic_rmw_op(ctx, v970, &AtomicRmwOp::Add);
-                                let v1005 = C::put_in_reg(ctx, v975.0);
-                                let v1006 = C::atomic_amo(ctx);
-                                let v1002 = C::xreg_to_reg(ctx, v1001);
-                                let v1007 = constructor_gen_atomic(ctx, v1004, v1005, v1002, v1006);
-                                let v1008 = constructor_output_reg(ctx, v1007);
-                                // Rule at src/isa/riscv64/lower.isle line 1058.
-                                return Some(v1008);
-                            }
-                            _ => {}
-                        }
-                        let v978 = &constructor_get_atomic_rmw_op(ctx, v970, v974);
-                        let v975 = C::unpack_value_array_2(ctx, v972);
-                        let v979 = C::put_in_reg(ctx, v975.0);
-                        let v980 = C::put_in_reg(ctx, v975.1);
-                        let v981 = C::atomic_amo(ctx);
-                        let v982 = constructor_gen_atomic(ctx, v978, v979, v980, v981);
-                        let v983 = constructor_output_reg(ctx, v982);
-                        // Rule at src/isa/riscv64/lower.isle line 1029.
-                        return Some(v983);
-                    }
-                }
-            }
-        }
-        &InstructionData::Binary {
-            opcode: ref v36,
-            args: ref v37,
-        } => {
-            match v36 {
-                &Opcode::Swizzle => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
-                        if let Some(v11) = v10 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v45 = C::def_inst(ctx, v38.1);
-                            if let Some(v46) = v45 {
-                                let v47 = &C::inst_data(ctx, v46);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v68,
-                                    arg: v69,
-                                } = v47
-                                {
-                                    if let &Opcode::Splat = v68 {
-                                        let v172 = C::def_inst(ctx, v69);
-                                        if let Some(v173) = v172 {
-                                            let v174 = &C::inst_data(ctx, v173);
-                                            if let &InstructionData::UnaryImm {
-                                                opcode: ref v189,
-                                                imm: v190,
-                                            } = v174
-                                            {
-                                                if let &Opcode::Iconst = v189 {
-                                                    let v191 = C::u64_from_imm64(ctx, v190);
-                                                    let v1581 = C::uimm5_from_u64(ctx, v191);
-                                                    if let Some(v1582) = v1581 {
-                                                        let v163 =
-                                                            constructor_put_in_vreg(ctx, v38.0);
-                                                        let v165 = &constructor_unmasked(ctx);
-                                                        let v166 = C::vstate_from_type(ctx, v11);
-                                                        let v1583 = constructor_rv_vrgather_vi(
-                                                            ctx, v163, v1582, v165, v166,
-                                                        );
-                                                        let v1584 =
-                                                            constructor_output_vreg(ctx, v1583);
-                                                        // Rule at src/isa/riscv64/lower.isle line 1824.
-                                                        return Some(v1584);
-                                                    }
-                                                }
-                                            }
-                                        }
-                                        let v163 = constructor_put_in_vreg(ctx, v38.0);
-                                        let v169 = constructor_put_in_xreg(ctx, v69);
-                                        let v165 = &constructor_unmasked(ctx);
-                                        let v166 = C::vstate_from_type(ctx, v11);
-                                        let v1579 =
-                                            constructor_rv_vrgather_vx(ctx, v163, v169, v165, v166);
-                                        let v1580 = constructor_output_vreg(ctx, v1579);
-                                        // Rule at src/isa/riscv64/lower.isle line 1821.
-                                        return Some(v1580);
-                                    }
-                                }
-                            }
-                            let v163 = constructor_put_in_vreg(ctx, v38.0);
-                            let v164 = constructor_put_in_vreg(ctx, v38.1);
-                            let v165 = &constructor_unmasked(ctx);
-                            let v166 = C::vstate_from_type(ctx, v11);
-                            let v1577 = constructor_rv_vrgather_vv(ctx, v163, v164, v165, v166);
-                            let v1578 = constructor_output_vreg(ctx, v1577);
-                            // Rule at src/isa/riscv64/lower.isle line 1818.
-                            return Some(v1578);
-                        }
-                    }
-                }
-                &Opcode::Smin => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
-                        if let Some(v11) = v10 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v57 = C::def_inst(ctx, v38.0);
-                            if let Some(v58) = v57 {
-                                let v59 = &C::inst_data(ctx, v58);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v76,
-                                    arg: v77,
-                                } = v59
-                                {
-                                    if let &Opcode::Splat = v76 {
-                                        let v196 = constructor_put_in_vreg(ctx, v38.1);
-                                        let v197 = constructor_put_in_xreg(ctx, v77);
-                                        let v165 = &constructor_unmasked(ctx);
-                                        let v166 = C::vstate_from_type(ctx, v11);
-                                        let v1219 =
-                                            constructor_rv_vmin_vx(ctx, v196, v197, v165, v166);
-                                        let v1220 = constructor_output_vreg(ctx, v1219);
-                                        // Rule at src/isa/riscv64/lower.isle line 1334.
-                                        return Some(v1220);
-                                    }
-                                }
-                            }
-                            let v45 = C::def_inst(ctx, v38.1);
-                            if let Some(v46) = v45 {
-                                let v47 = &C::inst_data(ctx, v46);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v68,
-                                    arg: v69,
-                                } = v47
-                                {
-                                    if let &Opcode::Splat = v68 {
-                                        let v163 = constructor_put_in_vreg(ctx, v38.0);
-                                        let v169 = constructor_put_in_xreg(ctx, v69);
-                                        let v165 = &constructor_unmasked(ctx);
-                                        let v166 = C::vstate_from_type(ctx, v11);
-                                        let v1217 =
-                                            constructor_rv_vmin_vx(ctx, v163, v169, v165, v166);
-                                        let v1218 = constructor_output_vreg(ctx, v1217);
-                                        // Rule at src/isa/riscv64/lower.isle line 1331.
-                                        return Some(v1218);
-                                    }
-                                }
-                            }
-                            let v163 = constructor_put_in_vreg(ctx, v38.0);
-                            let v164 = constructor_put_in_vreg(ctx, v38.1);
-                            let v165 = &constructor_unmasked(ctx);
-                            let v166 = C::vstate_from_type(ctx, v11);
-                            let v1215 = constructor_rv_vmin_vv(ctx, v163, v164, v165, v166);
-                            let v1216 = constructor_output_vreg(ctx, v1215);
-                            // Rule at src/isa/riscv64/lower.isle line 1328.
-                            return Some(v1216);
-                        }
-                        let v363 = C::ty_int(ctx, v3);
-                        if let Some(v364) = v363 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v138 = C::put_in_regs(ctx, v38.0);
-                            let v1202 = constructor_ext_int_if_need(ctx, true, v138, v364);
-                            let v839 = C::put_in_regs(ctx, v38.1);
-                            let v1203 = constructor_ext_int_if_need(ctx, true, v839, v364);
-                            let v1213 = constructor_gen_int_select(
-                                ctx,
-                                v364,
-                                &IntSelectOP::Smin,
-                                v1202,
-                                v1203,
-                            );
-                            let v1214 = C::output(ctx, v1213);
-                            // Rule at src/isa/riscv64/lower.isle line 1325.
-                            return Some(v1214);
-                        }
-                    }
-                }
-                &Opcode::Umin => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
-                        if let Some(v11) = v10 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v57 = C::def_inst(ctx, v38.0);
-                            if let Some(v58) = v57 {
-                                let v59 = &C::inst_data(ctx, v58);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v76,
-                                    arg: v77,
-                                } = v59
-                                {
-                                    if let &Opcode::Splat = v76 {
-                                        let v196 = constructor_put_in_vreg(ctx, v38.1);
-                                        let v197 = constructor_put_in_xreg(ctx, v77);
-                                        let v165 = &constructor_unmasked(ctx);
-                                        let v166 = C::vstate_from_type(ctx, v11);
-                                        let v1240 =
-                                            constructor_rv_vminu_vx(ctx, v196, v197, v165, v166);
-                                        let v1241 = constructor_output_vreg(ctx, v1240);
-                                        // Rule at src/isa/riscv64/lower.isle line 1362.
-                                        return Some(v1241);
-                                    }
-                                }
-                            }
-                            let v45 = C::def_inst(ctx, v38.1);
-                            if let Some(v46) = v45 {
-                                let v47 = &C::inst_data(ctx, v46);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v68,
-                                    arg: v69,
-                                } = v47
-                                {
-                                    if let &Opcode::Splat = v68 {
-                                        let v163 = constructor_put_in_vreg(ctx, v38.0);
-                                        let v169 = constructor_put_in_xreg(ctx, v69);
-                                        let v165 = &constructor_unmasked(ctx);
-                                        let v166 = C::vstate_from_type(ctx, v11);
-                                        let v1238 =
-                                            constructor_rv_vminu_vx(ctx, v163, v169, v165, v166);
-                                        let v1239 = constructor_output_vreg(ctx, v1238);
-                                        // Rule at src/isa/riscv64/lower.isle line 1359.
-                                        return Some(v1239);
-                                    }
-                                }
-                            }
-                            let v163 = constructor_put_in_vreg(ctx, v38.0);
-                            let v164 = constructor_put_in_vreg(ctx, v38.1);
-                            let v165 = &constructor_unmasked(ctx);
-                            let v166 = C::vstate_from_type(ctx, v11);
-                            let v1236 = constructor_rv_vminu_vv(ctx, v163, v164, v165, v166);
-                            let v1237 = constructor_output_vreg(ctx, v1236);
-                            // Rule at src/isa/riscv64/lower.isle line 1356.
-                            return Some(v1237);
-                        }
-                        let v363 = C::ty_int(ctx, v3);
-                        if let Some(v364) = v363 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v138 = C::put_in_regs(ctx, v38.0);
-                            let v1223 = constructor_ext_int_if_need(ctx, false, v138, v364);
-                            let v839 = C::put_in_regs(ctx, v38.1);
-                            let v1224 = constructor_ext_int_if_need(ctx, false, v839, v364);
-                            let v1234 = constructor_gen_int_select(
-                                ctx,
-                                v364,
-                                &IntSelectOP::Umin,
-                                v1223,
-                                v1224,
-                            );
-                            let v1235 = C::output(ctx, v1234);
-                            // Rule at src/isa/riscv64/lower.isle line 1353.
-                            return Some(v1235);
-                        }
-                    }
-                }
-                &Opcode::Smax => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
-                        if let Some(v11) = v10 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v57 = C::def_inst(ctx, v38.0);
-                            if let Some(v58) = v57 {
-                                let v59 = &C::inst_data(ctx, v58);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v76,
-                                    arg: v77,
-                                } = v59
-                                {
-                                    if let &Opcode::Splat = v76 {
-                                        let v196 = constructor_put_in_vreg(ctx, v38.1);
-                                        let v197 = constructor_put_in_xreg(ctx, v77);
-                                        let v165 = &constructor_unmasked(ctx);
-                                        let v166 = C::vstate_from_type(ctx, v11);
-                                        let v1210 =
-                                            constructor_rv_vmax_vx(ctx, v196, v197, v165, v166);
-                                        let v1211 = constructor_output_vreg(ctx, v1210);
-                                        // Rule at src/isa/riscv64/lower.isle line 1320.
-                                        return Some(v1211);
-                                    }
-                                }
-                            }
-                            let v45 = C::def_inst(ctx, v38.1);
-                            if let Some(v46) = v45 {
-                                let v47 = &C::inst_data(ctx, v46);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v68,
-                                    arg: v69,
-                                } = v47
-                                {
-                                    if let &Opcode::Splat = v68 {
-                                        let v163 = constructor_put_in_vreg(ctx, v38.0);
-                                        let v169 = constructor_put_in_xreg(ctx, v69);
-                                        let v165 = &constructor_unmasked(ctx);
-                                        let v166 = C::vstate_from_type(ctx, v11);
-                                        let v1208 =
-                                            constructor_rv_vmax_vx(ctx, v163, v169, v165, v166);
-                                        let v1209 = constructor_output_vreg(ctx, v1208);
-                                        // Rule at src/isa/riscv64/lower.isle line 1317.
-                                        return Some(v1209);
-                                    }
-                                }
-                            }
-                            let v163 = constructor_put_in_vreg(ctx, v38.0);
-                            let v164 = constructor_put_in_vreg(ctx, v38.1);
-                            let v165 = &constructor_unmasked(ctx);
-                            let v166 = C::vstate_from_type(ctx, v11);
-                            let v1206 = constructor_rv_vmax_vv(ctx, v163, v164, v165, v166);
-                            let v1207 = constructor_output_vreg(ctx, v1206);
-                            // Rule at src/isa/riscv64/lower.isle line 1314.
-                            return Some(v1207);
-                        }
-                        let v363 = C::ty_int(ctx, v3);
-                        if let Some(v364) = v363 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v138 = C::put_in_regs(ctx, v38.0);
-                            let v1202 = constructor_ext_int_if_need(ctx, true, v138, v364);
-                            let v839 = C::put_in_regs(ctx, v38.1);
-                            let v1203 = constructor_ext_int_if_need(ctx, true, v839, v364);
-                            let v1204 = constructor_gen_int_select(
-                                ctx,
-                                v364,
-                                &IntSelectOP::Smax,
-                                v1202,
-                                v1203,
-                            );
-                            let v1205 = C::output(ctx, v1204);
-                            // Rule at src/isa/riscv64/lower.isle line 1311.
-                            return Some(v1205);
-                        }
-                    }
-                }
-                &Opcode::Umax => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
-                        if let Some(v11) = v10 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v57 = C::def_inst(ctx, v38.0);
-                            if let Some(v58) = v57 {
-                                let v59 = &C::inst_data(ctx, v58);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v76,
-                                    arg: v77,
-                                } = v59
-                                {
-                                    if let &Opcode::Splat = v76 {
-                                        let v196 = constructor_put_in_vreg(ctx, v38.1);
-                                        let v197 = constructor_put_in_xreg(ctx, v77);
-                                        let v165 = &constructor_unmasked(ctx);
-                                        let v166 = C::vstate_from_type(ctx, v11);
-                                        let v1231 =
-                                            constructor_rv_vmaxu_vx(ctx, v196, v197, v165, v166);
-                                        let v1232 = constructor_output_vreg(ctx, v1231);
-                                        // Rule at src/isa/riscv64/lower.isle line 1348.
-                                        return Some(v1232);
-                                    }
-                                }
-                            }
-                            let v45 = C::def_inst(ctx, v38.1);
-                            if let Some(v46) = v45 {
-                                let v47 = &C::inst_data(ctx, v46);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v68,
-                                    arg: v69,
-                                } = v47
-                                {
-                                    if let &Opcode::Splat = v68 {
-                                        let v163 = constructor_put_in_vreg(ctx, v38.0);
-                                        let v169 = constructor_put_in_xreg(ctx, v69);
-                                        let v165 = &constructor_unmasked(ctx);
-                                        let v166 = C::vstate_from_type(ctx, v11);
-                                        let v1229 =
-                                            constructor_rv_vmaxu_vx(ctx, v163, v169, v165, v166);
-                                        let v1230 = constructor_output_vreg(ctx, v1229);
-                                        // Rule at src/isa/riscv64/lower.isle line 1345.
-                                        return Some(v1230);
-                                    }
-                                }
-                            }
-                            let v163 = constructor_put_in_vreg(ctx, v38.0);
-                            let v164 = constructor_put_in_vreg(ctx, v38.1);
-                            let v165 = &constructor_unmasked(ctx);
-                            let v166 = C::vstate_from_type(ctx, v11);
-                            let v1227 = constructor_rv_vmaxu_vv(ctx, v163, v164, v165, v166);
-                            let v1228 = constructor_output_vreg(ctx, v1227);
-                            // Rule at src/isa/riscv64/lower.isle line 1342.
-                            return Some(v1228);
-                        }
-                        let v363 = C::ty_int(ctx, v3);
-                        if let Some(v364) = v363 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v138 = C::put_in_regs(ctx, v38.0);
-                            let v1223 = constructor_ext_int_if_need(ctx, false, v138, v364);
-                            let v839 = C::put_in_regs(ctx, v38.1);
-                            let v1224 = constructor_ext_int_if_need(ctx, false, v839, v364);
-                            let v1225 = constructor_gen_int_select(
-                                ctx,
-                                v364,
-                                &IntSelectOP::Umax,
-                                v1223,
-                                v1224,
-                            );
-                            let v1226 = C::output(ctx, v1225);
-                            // Rule at src/isa/riscv64/lower.isle line 1339.
-                            return Some(v1226);
-                        }
-                    }
-                }
-                &Opcode::AvgRound => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
-                        if let Some(v11) = v10 {
-                            let v701 = constructor_u64_to_uimm5(ctx, 0x1);
-                            if let Some(v702) = v701 {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v163 = constructor_put_in_vreg(ctx, v38.0);
-                                let v164 = constructor_put_in_vreg(ctx, v38.1);
-                                let v165 = &constructor_unmasked(ctx);
-                                let v166 = C::vstate_from_type(ctx, v11);
-                                let v523 = constructor_rv_vand_vv(ctx, v163, v164, v165, v166);
-                                let v1671 = constructor_put_in_vreg(ctx, v38.0);
-                                let v1672 = constructor_put_in_vreg(ctx, v38.1);
-                                let v1673 = constructor_rv_vxor_vv(ctx, v1671, v1672, v165, v166);
-                                let v1674 = constructor_rv_vssrl_vi(ctx, v1673, v702, v165, v166);
-                                let v1675 = constructor_rv_vadd_vv(ctx, v523, v1674, v165, v166);
-                                let v1676 = constructor_output_vreg(ctx, v1675);
-                                // Rule at src/isa/riscv64/lower.isle line 1938.
-                                return Some(v1676);
-                            }
-                        }
-                    }
-                }
-                &Opcode::UaddSat => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
-                        if let Some(v11) = v10 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v57 = C::def_inst(ctx, v38.0);
-                            if let Some(v58) = v57 {
-                                let v59 = &C::inst_data(ctx, v58);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v76,
-                                    arg: v77,
-                                } = v59
-                                {
-                                    if let &Opcode::Splat = v76 {
-                                        let v200 = C::def_inst(ctx, v77);
-                                        if let Some(v201) = v200 {
-                                            let v202 = &C::inst_data(ctx, v201);
-                                            if let &InstructionData::UnaryImm {
-                                                opcode: ref v212,
-                                                imm: v213,
-                                            } = v202
-                                            {
-                                                if let &Opcode::Iconst = v212 {
-                                                    let v214 = C::u64_from_imm64(ctx, v213);
-                                                    let v215 = C::imm5_from_u64(ctx, v214);
-                                                    if let Some(v216) = v215 {
-                                                        let v196 =
-                                                            constructor_put_in_vreg(ctx, v38.1);
-                                                        let v165 = &constructor_unmasked(ctx);
-                                                        let v166 = C::vstate_from_type(ctx, v11);
-                                                        let v1533 = constructor_rv_vsaddu_vi(
-                                                            ctx, v196, v216, v165, v166,
-                                                        );
-                                                        let v1534 =
-                                                            constructor_output_vreg(ctx, v1533);
-                                                        // Rule at src/isa/riscv64/lower.isle line 1732.
-                                                        return Some(v1534);
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                            }
-                            let v45 = C::def_inst(ctx, v38.1);
-                            if let Some(v46) = v45 {
-                                let v47 = &C::inst_data(ctx, v46);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v68,
-                                    arg: v69,
-                                } = v47
-                                {
-                                    if let &Opcode::Splat = v68 {
-                                        let v172 = C::def_inst(ctx, v69);
-                                        if let Some(v173) = v172 {
-                                            let v174 = &C::inst_data(ctx, v173);
-                                            if let &InstructionData::UnaryImm {
-                                                opcode: ref v189,
-                                                imm: v190,
-                                            } = v174
-                                            {
-                                                if let &Opcode::Iconst = v189 {
-                                                    let v191 = C::u64_from_imm64(ctx, v190);
-                                                    let v192 = C::imm5_from_u64(ctx, v191);
-                                                    if let Some(v193) = v192 {
-                                                        let v163 =
-                                                            constructor_put_in_vreg(ctx, v38.0);
-                                                        let v165 = &constructor_unmasked(ctx);
-                                                        let v166 = C::vstate_from_type(ctx, v11);
-                                                        let v1531 = constructor_rv_vsaddu_vi(
-                                                            ctx, v163, v193, v165, v166,
-                                                        );
-                                                        let v1532 =
-                                                            constructor_output_vreg(ctx, v1531);
-                                                        // Rule at src/isa/riscv64/lower.isle line 1729.
-                                                        return Some(v1532);
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                            }
-                            if let Some(v58) = v57 {
-                                let v59 = &C::inst_data(ctx, v58);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v76,
-                                    arg: v77,
-                                } = v59
-                                {
-                                    if let &Opcode::Splat = v76 {
-                                        let v196 = constructor_put_in_vreg(ctx, v38.1);
-                                        let v197 = constructor_put_in_xreg(ctx, v77);
-                                        let v165 = &constructor_unmasked(ctx);
-                                        let v166 = C::vstate_from_type(ctx, v11);
-                                        let v1529 =
-                                            constructor_rv_vsaddu_vx(ctx, v196, v197, v165, v166);
-                                        let v1530 = constructor_output_vreg(ctx, v1529);
-                                        // Rule at src/isa/riscv64/lower.isle line 1726.
-                                        return Some(v1530);
-                                    }
-                                }
-                            }
-                            if let Some(v46) = v45 {
-                                let v47 = &C::inst_data(ctx, v46);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v68,
-                                    arg: v69,
-                                } = v47
-                                {
-                                    if let &Opcode::Splat = v68 {
-                                        let v163 = constructor_put_in_vreg(ctx, v38.0);
-                                        let v169 = constructor_put_in_xreg(ctx, v69);
-                                        let v165 = &constructor_unmasked(ctx);
-                                        let v166 = C::vstate_from_type(ctx, v11);
-                                        let v1527 =
-                                            constructor_rv_vsaddu_vx(ctx, v163, v169, v165, v166);
-                                        let v1528 = constructor_output_vreg(ctx, v1527);
-                                        // Rule at src/isa/riscv64/lower.isle line 1723.
-                                        return Some(v1528);
-                                    }
-                                }
-                            }
-                            let v163 = constructor_put_in_vreg(ctx, v38.0);
-                            let v164 = constructor_put_in_vreg(ctx, v38.1);
-                            let v165 = &constructor_unmasked(ctx);
-                            let v166 = C::vstate_from_type(ctx, v11);
-                            let v1525 = constructor_rv_vsaddu_vv(ctx, v163, v164, v165, v166);
-                            let v1526 = constructor_output_vreg(ctx, v1525);
-                            // Rule at src/isa/riscv64/lower.isle line 1720.
-                            return Some(v1526);
-                        }
-                    }
-                }
-                &Opcode::SaddSat => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
-                        if let Some(v11) = v10 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v57 = C::def_inst(ctx, v38.0);
-                            if let Some(v58) = v57 {
-                                let v59 = &C::inst_data(ctx, v58);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v76,
-                                    arg: v77,
-                                } = v59
-                                {
-                                    if let &Opcode::Splat = v76 {
-                                        let v200 = C::def_inst(ctx, v77);
-                                        if let Some(v201) = v200 {
-                                            let v202 = &C::inst_data(ctx, v201);
-                                            if let &InstructionData::UnaryImm {
-                                                opcode: ref v212,
-                                                imm: v213,
-                                            } = v202
-                                            {
-                                                if let &Opcode::Iconst = v212 {
-                                                    let v214 = C::u64_from_imm64(ctx, v213);
-                                                    let v215 = C::imm5_from_u64(ctx, v214);
-                                                    if let Some(v216) = v215 {
-                                                        let v196 =
-                                                            constructor_put_in_vreg(ctx, v38.1);
-                                                        let v165 = &constructor_unmasked(ctx);
-                                                        let v166 = C::vstate_from_type(ctx, v11);
-                                                        let v1543 = constructor_rv_vsadd_vi(
-                                                            ctx, v196, v216, v165, v166,
-                                                        );
-                                                        let v1544 =
-                                                            constructor_output_vreg(ctx, v1543);
-                                                        // Rule at src/isa/riscv64/lower.isle line 1749.
-                                                        return Some(v1544);
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                            }
-                            let v45 = C::def_inst(ctx, v38.1);
-                            if let Some(v46) = v45 {
-                                let v47 = &C::inst_data(ctx, v46);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v68,
-                                    arg: v69,
-                                } = v47
-                                {
-                                    if let &Opcode::Splat = v68 {
-                                        let v172 = C::def_inst(ctx, v69);
-                                        if let Some(v173) = v172 {
-                                            let v174 = &C::inst_data(ctx, v173);
-                                            if let &InstructionData::UnaryImm {
-                                                opcode: ref v189,
-                                                imm: v190,
-                                            } = v174
-                                            {
-                                                if let &Opcode::Iconst = v189 {
-                                                    let v191 = C::u64_from_imm64(ctx, v190);
-                                                    let v192 = C::imm5_from_u64(ctx, v191);
-                                                    if let Some(v193) = v192 {
-                                                        let v163 =
-                                                            constructor_put_in_vreg(ctx, v38.0);
-                                                        let v165 = &constructor_unmasked(ctx);
-                                                        let v166 = C::vstate_from_type(ctx, v11);
-                                                        let v1541 = constructor_rv_vsadd_vi(
-                                                            ctx, v163, v193, v165, v166,
-                                                        );
-                                                        let v1542 =
-                                                            constructor_output_vreg(ctx, v1541);
-                                                        // Rule at src/isa/riscv64/lower.isle line 1746.
-                                                        return Some(v1542);
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                            }
-                            if let Some(v58) = v57 {
-                                let v59 = &C::inst_data(ctx, v58);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v76,
-                                    arg: v77,
-                                } = v59
-                                {
-                                    if let &Opcode::Splat = v76 {
-                                        let v196 = constructor_put_in_vreg(ctx, v38.1);
-                                        let v197 = constructor_put_in_xreg(ctx, v77);
-                                        let v165 = &constructor_unmasked(ctx);
-                                        let v166 = C::vstate_from_type(ctx, v11);
-                                        let v1539 =
-                                            constructor_rv_vsadd_vx(ctx, v196, v197, v165, v166);
-                                        let v1540 = constructor_output_vreg(ctx, v1539);
-                                        // Rule at src/isa/riscv64/lower.isle line 1743.
-                                        return Some(v1540);
-                                    }
-                                }
-                            }
-                            if let Some(v46) = v45 {
-                                let v47 = &C::inst_data(ctx, v46);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v68,
-                                    arg: v69,
-                                } = v47
-                                {
-                                    if let &Opcode::Splat = v68 {
-                                        let v163 = constructor_put_in_vreg(ctx, v38.0);
-                                        let v169 = constructor_put_in_xreg(ctx, v69);
-                                        let v165 = &constructor_unmasked(ctx);
-                                        let v166 = C::vstate_from_type(ctx, v11);
-                                        let v1537 =
-                                            constructor_rv_vsadd_vx(ctx, v163, v169, v165, v166);
-                                        let v1538 = constructor_output_vreg(ctx, v1537);
-                                        // Rule at src/isa/riscv64/lower.isle line 1740.
-                                        return Some(v1538);
-                                    }
-                                }
-                            }
-                            let v163 = constructor_put_in_vreg(ctx, v38.0);
-                            let v164 = constructor_put_in_vreg(ctx, v38.1);
-                            let v165 = &constructor_unmasked(ctx);
-                            let v166 = C::vstate_from_type(ctx, v11);
-                            let v1535 = constructor_rv_vsadd_vv(ctx, v163, v164, v165, v166);
-                            let v1536 = constructor_output_vreg(ctx, v1535);
-                            // Rule at src/isa/riscv64/lower.isle line 1737.
-                            return Some(v1536);
-                        }
-                    }
-                }
-                &Opcode::UsubSat => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
-                        if let Some(v11) = v10 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v45 = C::def_inst(ctx, v38.1);
-                            if let Some(v46) = v45 {
-                                let v47 = &C::inst_data(ctx, v46);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v68,
-                                    arg: v69,
-                                } = v47
-                                {
-                                    if let &Opcode::Splat = v68 {
-                                        let v163 = constructor_put_in_vreg(ctx, v38.0);
-                                        let v169 = constructor_put_in_xreg(ctx, v69);
-                                        let v165 = &constructor_unmasked(ctx);
-                                        let v166 = C::vstate_from_type(ctx, v11);
-                                        let v1547 =
-                                            constructor_rv_vssubu_vx(ctx, v163, v169, v165, v166);
-                                        let v1548 = constructor_output_vreg(ctx, v1547);
-                                        // Rule at src/isa/riscv64/lower.isle line 1757.
-                                        return Some(v1548);
-                                    }
-                                }
-                            }
-                            let v163 = constructor_put_in_vreg(ctx, v38.0);
-                            let v164 = constructor_put_in_vreg(ctx, v38.1);
-                            let v165 = &constructor_unmasked(ctx);
-                            let v166 = C::vstate_from_type(ctx, v11);
-                            let v1545 = constructor_rv_vssubu_vv(ctx, v163, v164, v165, v166);
-                            let v1546 = constructor_output_vreg(ctx, v1545);
-                            // Rule at src/isa/riscv64/lower.isle line 1754.
-                            return Some(v1546);
-                        }
-                    }
-                }
-                &Opcode::SsubSat => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
-                        if let Some(v11) = v10 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v45 = C::def_inst(ctx, v38.1);
-                            if let Some(v46) = v45 {
-                                let v47 = &C::inst_data(ctx, v46);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v68,
-                                    arg: v69,
-                                } = v47
-                                {
-                                    if let &Opcode::Splat = v68 {
-                                        let v163 = constructor_put_in_vreg(ctx, v38.0);
-                                        let v169 = constructor_put_in_xreg(ctx, v69);
-                                        let v165 = &constructor_unmasked(ctx);
-                                        let v166 = C::vstate_from_type(ctx, v11);
-                                        let v1551 =
-                                            constructor_rv_vssub_vx(ctx, v163, v169, v165, v166);
-                                        let v1552 = constructor_output_vreg(ctx, v1551);
-                                        // Rule at src/isa/riscv64/lower.isle line 1765.
-                                        return Some(v1552);
-                                    }
-                                }
-                            }
-                            let v163 = constructor_put_in_vreg(ctx, v38.0);
-                            let v164 = constructor_put_in_vreg(ctx, v38.1);
-                            let v165 = &constructor_unmasked(ctx);
-                            let v166 = C::vstate_from_type(ctx, v11);
-                            let v1549 = constructor_rv_vssub_vv(ctx, v163, v164, v165, v166);
-                            let v1550 = constructor_output_vreg(ctx, v1549);
-                            // Rule at src/isa/riscv64/lower.isle line 1762.
-                            return Some(v1550);
-                        }
-                    }
-                }
-                &Opcode::Iadd => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
-                        if let Some(v11) = v10 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v57 = C::def_inst(ctx, v38.0);
-                            if let Some(v58) = v57 {
-                                let v59 = &C::inst_data(ctx, v58);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v76,
-                                    arg: v77,
-                                } = v59
-                                {
-                                    match v76 {
-                                        &Opcode::Splat => {
-                                            let v200 = C::def_inst(ctx, v77);
-                                            if let Some(v201) = v200 {
-                                                let v202 = &C::inst_data(ctx, v201);
-                                                match v202 {
-                                                    &InstructionData::Unary {
-                                                        opcode: ref v203,
-                                                        arg: v204,
-                                                    } => {
-                                                        match v203 {
-                                                            &Opcode::Uextend => {
-                                                                let v45 = C::def_inst(ctx, v38.1);
-                                                                if let Some(v46) = v45 {
-                                                                    let v47 =
-                                                                        &C::inst_data(ctx, v46);
-                                                                    if let &InstructionData::Unary {
-                                                                        opcode: ref v68,
-                                                                        arg: v69,
-                                                                    } = v47 {
-                                                                        match v68 {
-                                                                            &Opcode::UwidenLow => {
-                                                                                let v70 = C::value_type(ctx, v69);
-                                                                                let v240 = C::lane_type(ctx, v70);
-                                                                                let v205 = C::value_type(ctx, v204);
-                                                                                let v241 = C::ty_equal(ctx, v240, v205);
-                                                                                if v241 == true {
-                                                                                    let v242 = constructor_put_in_vreg(ctx, v69);
-                                                                                    let v207 = constructor_put_in_xreg(ctx, v204);
-                                                                                    let v165 = &constructor_unmasked(ctx);
-                                                                                    let v220 = C::ty_half_lanes(ctx, v70);
-                                                                                    let v221 = v220?;
-                                                                                    let v222 = C::vstate_from_type(ctx, v221);
-                                                                                    let v223 = C::vstate_mf2(ctx, v222);
-                                                                                    let v271 = constructor_rv_vwaddu_vx(ctx, v242, v207, v165, v223);
-                                                                                    let v272 = constructor_output_vreg(ctx, v271);
-                                                                                    // Rule at src/isa/riscv64/lower.isle line 204.
-                                                                                    return Some(v272);
-                                                                                }
-                                                                            }
-                                                                            &Opcode::UwidenHigh => {
-                                                                                let v70 = C::value_type(ctx, v69);
-                                                                                let v240 = C::lane_type(ctx, v70);
-                                                                                let v205 = C::value_type(ctx, v204);
-                                                                                let v241 = C::ty_equal(ctx, v240, v205);
-                                                                                if v241 == true {
-                                                                                    let v242 = constructor_put_in_vreg(ctx, v69);
-                                                                                    let v259 = constructor_gen_slidedown_half(ctx, v70, v242);
-                                                                                    let v260 = constructor_put_in_xreg(ctx, v204);
-                                                                                    let v165 = &constructor_unmasked(ctx);
-                                                                                    let v220 = C::ty_half_lanes(ctx, v70);
-                                                                                    let v221 = v220?;
-                                                                                    let v222 = C::vstate_from_type(ctx, v221);
-                                                                                    let v223 = C::vstate_mf2(ctx, v222);
-                                                                                    let v281 = constructor_rv_vwaddu_vx(ctx, v259, v260, v165, v223);
-                                                                                    let v282 = constructor_output_vreg(ctx, v281);
-                                                                                    // Rule at src/isa/riscv64/lower.isle line 227.
-                                                                                    return Some(v282);
-                                                                                }
-                                                                            }
-                                                                            _ => {}
-                                                                        }
-                                                                    }
-                                                                }
-                                                                let v178 =
-                                                                    C::ty_half_width(ctx, v11);
-                                                                if let Some(v179) = v178 {
-                                                                    let v180 =
-                                                                        C::lane_type(ctx, v179);
-                                                                    let v205 =
-                                                                        C::value_type(ctx, v204);
-                                                                    let v206 = C::ty_equal(
-                                                                        ctx, v180, v205,
-                                                                    );
-                                                                    if v206 == true {
-                                                                        let v196 =
-                                                                            constructor_put_in_vreg(
-                                                                                ctx, v38.1,
-                                                                            );
-                                                                        let v207 =
-                                                                            constructor_put_in_xreg(
-                                                                                ctx, v204,
-                                                                            );
-                                                                        let v165 =
-                                                                            &constructor_unmasked(
-                                                                                ctx,
-                                                                            );
-                                                                        let v183 =
-                                                                            C::vstate_from_type(
-                                                                                ctx, v179,
-                                                                            );
-                                                                        let v184 = C::vstate_mf2(
-                                                                            ctx, v183,
-                                                                        );
-                                                                        let v210 = constructor_rv_vwaddu_wx(ctx, v196, v207, v165, v184);
-                                                                        let v211 =
-                                                                            constructor_output_vreg(
-                                                                                ctx, v210,
-                                                                            );
-                                                                        // Rule at src/isa/riscv64/lower.isle line 134.
-                                                                        return Some(v211);
-                                                                    }
-                                                                }
-                                                            }
-                                                            &Opcode::Sextend => {
-                                                                let v45 = C::def_inst(ctx, v38.1);
-                                                                if let Some(v46) = v45 {
-                                                                    let v47 =
-                                                                        &C::inst_data(ctx, v46);
-                                                                    if let &InstructionData::Unary {
-                                                                        opcode: ref v68,
-                                                                        arg: v69,
-                                                                    } = v47 {
-                                                                        match v68 {
-                                                                            &Opcode::SwidenLow => {
-                                                                                let v70 = C::value_type(ctx, v69);
-                                                                                let v240 = C::lane_type(ctx, v70);
-                                                                                let v205 = C::value_type(ctx, v204);
-                                                                                let v241 = C::ty_equal(ctx, v240, v205);
-                                                                                if v241 == true {
-                                                                                    let v242 = constructor_put_in_vreg(ctx, v69);
-                                                                                    let v207 = constructor_put_in_xreg(ctx, v204);
-                                                                                    let v165 = &constructor_unmasked(ctx);
-                                                                                    let v220 = C::ty_half_lanes(ctx, v70);
-                                                                                    let v221 = v220?;
-                                                                                    let v222 = C::vstate_from_type(ctx, v221);
-                                                                                    let v223 = C::vstate_mf2(ctx, v222);
-                                                                                    let v243 = constructor_rv_vwadd_vx(ctx, v242, v207, v165, v223);
-                                                                                    let v244 = constructor_output_vreg(ctx, v243);
-                                                                                    // Rule at src/isa/riscv64/lower.isle line 159.
-                                                                                    return Some(v244);
-                                                                                }
-                                                                            }
-                                                                            &Opcode::SwidenHigh => {
-                                                                                let v70 = C::value_type(ctx, v69);
-                                                                                let v240 = C::lane_type(ctx, v70);
-                                                                                let v205 = C::value_type(ctx, v204);
-                                                                                let v241 = C::ty_equal(ctx, v240, v205);
-                                                                                if v241 == true {
-                                                                                    let v242 = constructor_put_in_vreg(ctx, v69);
-                                                                                    let v259 = constructor_gen_slidedown_half(ctx, v70, v242);
-                                                                                    let v260 = constructor_put_in_xreg(ctx, v204);
-                                                                                    let v165 = &constructor_unmasked(ctx);
-                                                                                    let v220 = C::ty_half_lanes(ctx, v70);
-                                                                                    let v221 = v220?;
-                                                                                    let v222 = C::vstate_from_type(ctx, v221);
-                                                                                    let v223 = C::vstate_mf2(ctx, v222);
-                                                                                    let v261 = constructor_rv_vwadd_vx(ctx, v259, v260, v165, v223);
-                                                                                    let v262 = constructor_output_vreg(ctx, v261);
-                                                                                    // Rule at src/isa/riscv64/lower.isle line 182.
-                                                                                    return Some(v262);
-                                                                                }
-                                                                            }
-                                                                            _ => {}
-                                                                        }
-                                                                    }
-                                                                }
-                                                                let v178 =
-                                                                    C::ty_half_width(ctx, v11);
-                                                                if let Some(v179) = v178 {
-                                                                    let v180 =
-                                                                        C::lane_type(ctx, v179);
-                                                                    let v205 =
-                                                                        C::value_type(ctx, v204);
-                                                                    let v206 = C::ty_equal(
-                                                                        ctx, v180, v205,
-                                                                    );
-                                                                    if v206 == true {
-                                                                        let v196 =
-                                                                            constructor_put_in_vreg(
-                                                                                ctx, v38.1,
-                                                                            );
-                                                                        let v207 =
-                                                                            constructor_put_in_xreg(
-                                                                                ctx, v204,
-                                                                            );
-                                                                        let v165 =
-                                                                            &constructor_unmasked(
-                                                                                ctx,
-                                                                            );
-                                                                        let v183 =
-                                                                            C::vstate_from_type(
-                                                                                ctx, v179,
-                                                                            );
-                                                                        let v184 = C::vstate_mf2(
-                                                                            ctx, v183,
-                                                                        );
-                                                                        let v208 =
-                                                                            constructor_rv_vwadd_wx(
-                                                                                ctx, v196, v207,
-                                                                                v165, v184,
-                                                                            );
-                                                                        let v209 =
-                                                                            constructor_output_vreg(
-                                                                                ctx, v208,
-                                                                            );
-                                                                        // Rule at src/isa/riscv64/lower.isle line 129.
-                                                                        return Some(v209);
-                                                                    }
-                                                                }
-                                                            }
-                                                            _ => {}
-                                                        }
-                                                    }
-                                                    &InstructionData::UnaryImm {
-                                                        opcode: ref v212,
-                                                        imm: v213,
-                                                    } => {
-                                                        if let &Opcode::Iconst = v212 {
-                                                            let v214 = C::u64_from_imm64(ctx, v213);
-                                                            let v215 = C::imm5_from_u64(ctx, v214);
-                                                            if let Some(v216) = v215 {
-                                                                let v196 = constructor_put_in_vreg(
-                                                                    ctx, v38.1,
-                                                                );
-                                                                let v165 =
-                                                                    &constructor_unmasked(ctx);
-                                                                let v166 =
-                                                                    C::vstate_from_type(ctx, v11);
-                                                                let v217 = constructor_rv_vadd_vi(
-                                                                    ctx, v196, v216, v165, v166,
-                                                                );
-                                                                let v218 = constructor_output_vreg(
-                                                                    ctx, v217,
-                                                                );
-                                                                // Rule at src/isa/riscv64/lower.isle line 139.
-                                                                return Some(v218);
-                                                            }
-                                                        }
-                                                    }
-                                                    _ => {}
-                                                }
-                                            }
-                                            let v196 = constructor_put_in_vreg(ctx, v38.1);
-                                            let v197 = constructor_put_in_xreg(ctx, v77);
-                                            let v165 = &constructor_unmasked(ctx);
-                                            let v166 = C::vstate_from_type(ctx, v11);
-                                            let v198 =
-                                                constructor_rv_vadd_vx(ctx, v196, v197, v165, v166);
-                                            let v199 = constructor_output_vreg(ctx, v198);
-                                            // Rule at src/isa/riscv64/lower.isle line 126.
-                                            return Some(v199);
-                                        }
-                                        &Opcode::SwidenLow => {
-                                            let v45 = C::def_inst(ctx, v38.1);
-                                            if let Some(v46) = v45 {
-                                                let v47 = &C::inst_data(ctx, v46);
-                                                if let &InstructionData::Unary {
-                                                    opcode: ref v68,
-                                                    arg: v69,
-                                                } = v47
-                                                {
-                                                    match v68 {
-                                                        &Opcode::Splat => {
-                                                            let v172 = C::def_inst(ctx, v69);
-                                                            if let Some(v173) = v172 {
-                                                                let v174 = &C::inst_data(ctx, v173);
-                                                                if let &InstructionData::Unary {
-                                                                    opcode: ref v175,
-                                                                    arg: v176,
-                                                                } = v174
-                                                                {
-                                                                    if let &Opcode::Sextend = v175 {
-                                                                        let v78 =
-                                                                            C::value_type(ctx, v77);
-                                                                        let v236 =
-                                                                            C::lane_type(ctx, v78);
-                                                                        let v177 = C::value_type(
-                                                                            ctx, v176,
-                                                                        );
-                                                                        let v237 = C::ty_equal(
-                                                                            ctx, v236, v177,
-                                                                        );
-                                                                        if v237 == true {
-                                                                            let v233 = constructor_put_in_vreg(ctx, v77);
-                                                                            let v182 = constructor_put_in_xreg(ctx, v176);
-                                                                            let v165 = &constructor_unmasked(ctx);
-                                                                            let v227 =
-                                                                                C::ty_half_lanes(
-                                                                                    ctx, v78,
-                                                                                );
-                                                                            let v228 = v227?;
-                                                                            let v229 =
-                                                                                C::vstate_from_type(
-                                                                                    ctx, v228,
-                                                                                );
-                                                                            let v230 =
-                                                                                C::vstate_mf2(
-                                                                                    ctx, v229,
-                                                                                );
-                                                                            let v238 = constructor_rv_vwadd_vx(ctx, v233, v182, v165, v230);
-                                                                            let v239 = constructor_output_vreg(ctx, v238);
-                                                                            // Rule at src/isa/riscv64/lower.isle line 154.
-                                                                            return Some(v239);
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                        &Opcode::SwidenLow => {
-                                                            let v233 =
-                                                                constructor_put_in_vreg(ctx, v77);
-                                                            let v219 =
-                                                                constructor_put_in_vreg(ctx, v69);
-                                                            let v165 = &constructor_unmasked(ctx);
-                                                            let v78 = C::value_type(ctx, v77);
-                                                            let v227 = C::ty_half_lanes(ctx, v78);
-                                                            let v228 = v227?;
-                                                            let v229 =
-                                                                C::vstate_from_type(ctx, v228);
-                                                            let v230 = C::vstate_mf2(ctx, v229);
-                                                            let v234 = constructor_rv_vwadd_vv(
-                                                                ctx, v233, v219, v165, v230,
-                                                            );
-                                                            let v235 =
-                                                                constructor_output_vreg(ctx, v234);
-                                                            // Rule at src/isa/riscv64/lower.isle line 150.
-                                                            return Some(v235);
-                                                        }
-                                                        &Opcode::SwidenHigh => {
-                                                            let v233 =
-                                                                constructor_put_in_vreg(ctx, v77);
-                                                            let v219 =
-                                                                constructor_put_in_vreg(ctx, v69);
-                                                            let v78 = C::value_type(ctx, v77);
-                                                            let v283 =
-                                                                constructor_gen_slidedown_half(
-                                                                    ctx, v78, v219,
-                                                                );
-                                                            let v165 = &constructor_unmasked(ctx);
-                                                            let v227 = C::ty_half_lanes(ctx, v78);
-                                                            let v228 = v227?;
-                                                            let v229 =
-                                                                C::vstate_from_type(ctx, v228);
-                                                            let v230 = C::vstate_mf2(ctx, v229);
-                                                            let v284 = constructor_rv_vwadd_vv(
-                                                                ctx, v233, v283, v165, v230,
-                                                            );
-                                                            let v285 =
-                                                                constructor_output_vreg(ctx, v284);
-                                                            // Rule at src/isa/riscv64/lower.isle line 234.
-                                                            return Some(v285);
-                                                        }
-                                                        _ => {}
-                                                    }
-                                                }
-                                            }
-                                            let v196 = constructor_put_in_vreg(ctx, v38.1);
-                                            let v226 = constructor_put_in_vreg(ctx, v77);
-                                            let v165 = &constructor_unmasked(ctx);
-                                            let v78 = C::value_type(ctx, v77);
-                                            let v227 = C::ty_half_lanes(ctx, v78);
-                                            let v228 = v227?;
-                                            let v229 = C::vstate_from_type(ctx, v228);
-                                            let v230 = C::vstate_mf2(ctx, v229);
-                                            let v231 = constructor_rv_vwadd_wv(
-                                                ctx, v196, v226, v165, v230,
-                                            );
-                                            let v232 = constructor_output_vreg(ctx, v231);
-                                            // Rule at src/isa/riscv64/lower.isle line 147.
-                                            return Some(v232);
-                                        }
-                                        &Opcode::SwidenHigh => {
-                                            let v45 = C::def_inst(ctx, v38.1);
-                                            if let Some(v46) = v45 {
-                                                let v47 = &C::inst_data(ctx, v46);
-                                                if let &InstructionData::Unary {
-                                                    opcode: ref v68,
-                                                    arg: v69,
-                                                } = v47
-                                                {
-                                                    match v68 {
-                                                        &Opcode::Splat => {
-                                                            let v172 = C::def_inst(ctx, v69);
-                                                            if let Some(v173) = v172 {
-                                                                let v174 = &C::inst_data(ctx, v173);
-                                                                if let &InstructionData::Unary {
-                                                                    opcode: ref v175,
-                                                                    arg: v176,
-                                                                } = v174
-                                                                {
-                                                                    if let &Opcode::Sextend = v175 {
-                                                                        let v78 =
-                                                                            C::value_type(ctx, v77);
-                                                                        let v236 =
-                                                                            C::lane_type(ctx, v78);
-                                                                        let v177 = C::value_type(
-                                                                            ctx, v176,
-                                                                        );
-                                                                        let v237 = C::ty_equal(
-                                                                            ctx, v236, v177,
-                                                                        );
-                                                                        if v237 == true {
-                                                                            let v233 = constructor_put_in_vreg(ctx, v77);
-                                                                            let v251 = constructor_gen_slidedown_half(ctx, v78, v233);
-                                                                            let v256 = constructor_put_in_xreg(ctx, v176);
-                                                                            let v165 = &constructor_unmasked(ctx);
-                                                                            let v227 =
-                                                                                C::ty_half_lanes(
-                                                                                    ctx, v78,
-                                                                                );
-                                                                            let v228 = v227?;
-                                                                            let v229 =
-                                                                                C::vstate_from_type(
-                                                                                    ctx, v228,
-                                                                                );
-                                                                            let v230 =
-                                                                                C::vstate_mf2(
-                                                                                    ctx, v229,
-                                                                                );
-                                                                            let v257 = constructor_rv_vwadd_vx(ctx, v251, v256, v165, v230);
-                                                                            let v258 = constructor_output_vreg(ctx, v257);
-                                                                            // Rule at src/isa/riscv64/lower.isle line 177.
-                                                                            return Some(v258);
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                        &Opcode::SwidenLow => {
-                                                            let v233 =
-                                                                constructor_put_in_vreg(ctx, v77);
-                                                            let v78 = C::value_type(ctx, v77);
-                                                            let v251 =
-                                                                constructor_gen_slidedown_half(
-                                                                    ctx, v78, v233,
-                                                                );
-                                                            let v252 =
-                                                                constructor_put_in_vreg(ctx, v69);
-                                                            let v165 = &constructor_unmasked(ctx);
-                                                            let v227 = C::ty_half_lanes(ctx, v78);
-                                                            let v228 = v227?;
-                                                            let v229 =
-                                                                C::vstate_from_type(ctx, v228);
-                                                            let v230 = C::vstate_mf2(ctx, v229);
-                                                            let v286 = constructor_rv_vwadd_vv(
-                                                                ctx, v251, v252, v165, v230,
-                                                            );
-                                                            let v287 =
-                                                                constructor_output_vreg(ctx, v286);
-                                                            // Rule at src/isa/riscv64/lower.isle line 238.
-                                                            return Some(v287);
-                                                        }
-                                                        &Opcode::SwidenHigh => {
-                                                            let v233 =
-                                                                constructor_put_in_vreg(ctx, v77);
-                                                            let v78 = C::value_type(ctx, v77);
-                                                            let v251 =
-                                                                constructor_gen_slidedown_half(
-                                                                    ctx, v78, v233,
-                                                                );
-                                                            let v252 =
-                                                                constructor_put_in_vreg(ctx, v69);
-                                                            let v253 =
-                                                                constructor_gen_slidedown_half(
-                                                                    ctx, v78, v252,
-                                                                );
-                                                            let v165 = &constructor_unmasked(ctx);
-                                                            let v227 = C::ty_half_lanes(ctx, v78);
-                                                            let v228 = v227?;
-                                                            let v229 =
-                                                                C::vstate_from_type(ctx, v228);
-                                                            let v230 = C::vstate_mf2(ctx, v229);
-                                                            let v254 = constructor_rv_vwadd_vv(
-                                                                ctx, v251, v253, v165, v230,
-                                                            );
-                                                            let v255 =
-                                                                constructor_output_vreg(ctx, v254);
-                                                            // Rule at src/isa/riscv64/lower.isle line 173.
-                                                            return Some(v255);
-                                                        }
-                                                        _ => {}
-                                                    }
-                                                }
-                                            }
-                                            let v196 = constructor_put_in_vreg(ctx, v38.1);
-                                            let v226 = constructor_put_in_vreg(ctx, v77);
-                                            let v78 = C::value_type(ctx, v77);
-                                            let v248 =
-                                                constructor_gen_slidedown_half(ctx, v78, v226);
-                                            let v165 = &constructor_unmasked(ctx);
-                                            let v227 = C::ty_half_lanes(ctx, v78);
-                                            let v228 = v227?;
-                                            let v229 = C::vstate_from_type(ctx, v228);
-                                            let v230 = C::vstate_mf2(ctx, v229);
-                                            let v249 = constructor_rv_vwadd_wv(
-                                                ctx, v196, v248, v165, v230,
-                                            );
-                                            let v250 = constructor_output_vreg(ctx, v249);
-                                            // Rule at src/isa/riscv64/lower.isle line 170.
-                                            return Some(v250);
-                                        }
-                                        &Opcode::UwidenLow => {
-                                            let v45 = C::def_inst(ctx, v38.1);
-                                            if let Some(v46) = v45 {
-                                                let v47 = &C::inst_data(ctx, v46);
-                                                if let &InstructionData::Unary {
-                                                    opcode: ref v68,
-                                                    arg: v69,
-                                                } = v47
-                                                {
-                                                    match v68 {
-                                                        &Opcode::Splat => {
-                                                            let v172 = C::def_inst(ctx, v69);
-                                                            if let Some(v173) = v172 {
-                                                                let v174 = &C::inst_data(ctx, v173);
-                                                                if let &InstructionData::Unary {
-                                                                    opcode: ref v175,
-                                                                    arg: v176,
-                                                                } = v174
-                                                                {
-                                                                    if let &Opcode::Uextend = v175 {
-                                                                        let v78 =
-                                                                            C::value_type(ctx, v77);
-                                                                        let v236 =
-                                                                            C::lane_type(ctx, v78);
-                                                                        let v177 = C::value_type(
-                                                                            ctx, v176,
-                                                                        );
-                                                                        let v237 = C::ty_equal(
-                                                                            ctx, v236, v177,
-                                                                        );
-                                                                        if v237 == true {
-                                                                            let v233 = constructor_put_in_vreg(ctx, v77);
-                                                                            let v182 = constructor_put_in_xreg(ctx, v176);
-                                                                            let v165 = &constructor_unmasked(ctx);
-                                                                            let v227 =
-                                                                                C::ty_half_lanes(
-                                                                                    ctx, v78,
-                                                                                );
-                                                                            let v228 = v227?;
-                                                                            let v229 =
-                                                                                C::vstate_from_type(
-                                                                                    ctx, v228,
-                                                                                );
-                                                                            let v230 =
-                                                                                C::vstate_mf2(
-                                                                                    ctx, v229,
-                                                                                );
-                                                                            let v269 = constructor_rv_vwaddu_vx(ctx, v233, v182, v165, v230);
-                                                                            let v270 = constructor_output_vreg(ctx, v269);
-                                                                            // Rule at src/isa/riscv64/lower.isle line 199.
-                                                                            return Some(v270);
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                        &Opcode::UwidenLow => {
-                                                            let v233 =
-                                                                constructor_put_in_vreg(ctx, v77);
-                                                            let v219 =
-                                                                constructor_put_in_vreg(ctx, v69);
-                                                            let v165 = &constructor_unmasked(ctx);
-                                                            let v78 = C::value_type(ctx, v77);
-                                                            let v227 = C::ty_half_lanes(ctx, v78);
-                                                            let v228 = v227?;
-                                                            let v229 =
-                                                                C::vstate_from_type(ctx, v228);
-                                                            let v230 = C::vstate_mf2(ctx, v229);
-                                                            let v267 = constructor_rv_vwaddu_vv(
-                                                                ctx, v233, v219, v165, v230,
-                                                            );
-                                                            let v268 =
-                                                                constructor_output_vreg(ctx, v267);
-                                                            // Rule at src/isa/riscv64/lower.isle line 195.
-                                                            return Some(v268);
-                                                        }
-                                                        &Opcode::UwidenHigh => {
-                                                            let v233 =
-                                                                constructor_put_in_vreg(ctx, v77);
-                                                            let v219 =
-                                                                constructor_put_in_vreg(ctx, v69);
-                                                            let v78 = C::value_type(ctx, v77);
-                                                            let v283 =
-                                                                constructor_gen_slidedown_half(
-                                                                    ctx, v78, v219,
-                                                                );
-                                                            let v165 = &constructor_unmasked(ctx);
-                                                            let v227 = C::ty_half_lanes(ctx, v78);
-                                                            let v228 = v227?;
-                                                            let v229 =
-                                                                C::vstate_from_type(ctx, v228);
-                                                            let v230 = C::vstate_mf2(ctx, v229);
-                                                            let v288 = constructor_rv_vwaddu_vv(
-                                                                ctx, v233, v283, v165, v230,
-                                                            );
-                                                            let v289 =
-                                                                constructor_output_vreg(ctx, v288);
-                                                            // Rule at src/isa/riscv64/lower.isle line 244.
-                                                            return Some(v289);
-                                                        }
-                                                        _ => {}
-                                                    }
-                                                }
-                                            }
-                                            let v196 = constructor_put_in_vreg(ctx, v38.1);
-                                            let v226 = constructor_put_in_vreg(ctx, v77);
-                                            let v165 = &constructor_unmasked(ctx);
-                                            let v78 = C::value_type(ctx, v77);
-                                            let v227 = C::ty_half_lanes(ctx, v78);
-                                            let v228 = v227?;
-                                            let v229 = C::vstate_from_type(ctx, v228);
-                                            let v230 = C::vstate_mf2(ctx, v229);
-                                            let v265 = constructor_rv_vwaddu_wv(
-                                                ctx, v196, v226, v165, v230,
-                                            );
-                                            let v266 = constructor_output_vreg(ctx, v265);
-                                            // Rule at src/isa/riscv64/lower.isle line 192.
-                                            return Some(v266);
-                                        }
-                                        &Opcode::UwidenHigh => {
-                                            let v45 = C::def_inst(ctx, v38.1);
-                                            if let Some(v46) = v45 {
-                                                let v47 = &C::inst_data(ctx, v46);
-                                                if let &InstructionData::Unary {
-                                                    opcode: ref v68,
-                                                    arg: v69,
-                                                } = v47
-                                                {
-                                                    match v68 {
-                                                        &Opcode::Splat => {
-                                                            let v172 = C::def_inst(ctx, v69);
-                                                            if let Some(v173) = v172 {
-                                                                let v174 = &C::inst_data(ctx, v173);
-                                                                if let &InstructionData::Unary {
-                                                                    opcode: ref v175,
-                                                                    arg: v176,
-                                                                } = v174
-                                                                {
-                                                                    if let &Opcode::Uextend = v175 {
-                                                                        let v78 =
-                                                                            C::value_type(ctx, v77);
-                                                                        let v236 =
-                                                                            C::lane_type(ctx, v78);
-                                                                        let v177 = C::value_type(
-                                                                            ctx, v176,
-                                                                        );
-                                                                        let v237 = C::ty_equal(
-                                                                            ctx, v236, v177,
-                                                                        );
-                                                                        if v237 == true {
-                                                                            let v233 = constructor_put_in_vreg(ctx, v77);
-                                                                            let v251 = constructor_gen_slidedown_half(ctx, v78, v233);
-                                                                            let v256 = constructor_put_in_xreg(ctx, v176);
-                                                                            let v165 = &constructor_unmasked(ctx);
-                                                                            let v227 =
-                                                                                C::ty_half_lanes(
-                                                                                    ctx, v78,
-                                                                                );
-                                                                            let v228 = v227?;
-                                                                            let v229 =
-                                                                                C::vstate_from_type(
-                                                                                    ctx, v228,
-                                                                                );
-                                                                            let v230 =
-                                                                                C::vstate_mf2(
-                                                                                    ctx, v229,
-                                                                                );
-                                                                            let v279 = constructor_rv_vwaddu_vx(ctx, v251, v256, v165, v230);
-                                                                            let v280 = constructor_output_vreg(ctx, v279);
-                                                                            // Rule at src/isa/riscv64/lower.isle line 222.
-                                                                            return Some(v280);
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                        &Opcode::UwidenLow => {
-                                                            let v233 =
-                                                                constructor_put_in_vreg(ctx, v77);
-                                                            let v78 = C::value_type(ctx, v77);
-                                                            let v251 =
-                                                                constructor_gen_slidedown_half(
-                                                                    ctx, v78, v233,
-                                                                );
-                                                            let v252 =
-                                                                constructor_put_in_vreg(ctx, v69);
-                                                            let v165 = &constructor_unmasked(ctx);
-                                                            let v227 = C::ty_half_lanes(ctx, v78);
-                                                            let v228 = v227?;
-                                                            let v229 =
-                                                                C::vstate_from_type(ctx, v228);
-                                                            let v230 = C::vstate_mf2(ctx, v229);
-                                                            let v290 = constructor_rv_vwaddu_vv(
-                                                                ctx, v251, v252, v165, v230,
-                                                            );
-                                                            let v291 =
-                                                                constructor_output_vreg(ctx, v290);
-                                                            // Rule at src/isa/riscv64/lower.isle line 248.
-                                                            return Some(v291);
-                                                        }
-                                                        &Opcode::UwidenHigh => {
-                                                            let v233 =
-                                                                constructor_put_in_vreg(ctx, v77);
-                                                            let v78 = C::value_type(ctx, v77);
-                                                            let v251 =
-                                                                constructor_gen_slidedown_half(
-                                                                    ctx, v78, v233,
-                                                                );
-                                                            let v252 =
-                                                                constructor_put_in_vreg(ctx, v69);
-                                                            let v253 =
-                                                                constructor_gen_slidedown_half(
-                                                                    ctx, v78, v252,
-                                                                );
-                                                            let v165 = &constructor_unmasked(ctx);
-                                                            let v227 = C::ty_half_lanes(ctx, v78);
-                                                            let v228 = v227?;
-                                                            let v229 =
-                                                                C::vstate_from_type(ctx, v228);
-                                                            let v230 = C::vstate_mf2(ctx, v229);
-                                                            let v277 = constructor_rv_vwaddu_vv(
-                                                                ctx, v251, v253, v165, v230,
-                                                            );
-                                                            let v278 =
-                                                                constructor_output_vreg(ctx, v277);
-                                                            // Rule at src/isa/riscv64/lower.isle line 218.
-                                                            return Some(v278);
-                                                        }
-                                                        _ => {}
-                                                    }
-                                                }
-                                            }
-                                            let v196 = constructor_put_in_vreg(ctx, v38.1);
-                                            let v226 = constructor_put_in_vreg(ctx, v77);
-                                            let v78 = C::value_type(ctx, v77);
-                                            let v248 =
-                                                constructor_gen_slidedown_half(ctx, v78, v226);
-                                            let v165 = &constructor_unmasked(ctx);
-                                            let v227 = C::ty_half_lanes(ctx, v78);
-                                            let v228 = v227?;
-                                            let v229 = C::vstate_from_type(ctx, v228);
-                                            let v230 = C::vstate_mf2(ctx, v229);
-                                            let v275 = constructor_rv_vwaddu_wv(
-                                                ctx, v196, v248, v165, v230,
-                                            );
-                                            let v276 = constructor_output_vreg(ctx, v275);
-                                            // Rule at src/isa/riscv64/lower.isle line 215.
-                                            return Some(v276);
-                                        }
-                                        _ => {}
-                                    }
-                                }
-                            }
-                            let v45 = C::def_inst(ctx, v38.1);
-                            if let Some(v46) = v45 {
-                                let v47 = &C::inst_data(ctx, v46);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v68,
-                                    arg: v69,
-                                } = v47
-                                {
-                                    match v68 {
-                                        &Opcode::Splat => {
-                                            let v172 = C::def_inst(ctx, v69);
-                                            if let Some(v173) = v172 {
-                                                let v174 = &C::inst_data(ctx, v173);
-                                                match v174 {
-                                                    &InstructionData::Unary {
-                                                        opcode: ref v175,
-                                                        arg: v176,
-                                                    } => {
-                                                        match v175 {
-                                                            &Opcode::Uextend => {
-                                                                let v178 =
-                                                                    C::ty_half_width(ctx, v11);
-                                                                if let Some(v179) = v178 {
-                                                                    let v180 =
-                                                                        C::lane_type(ctx, v179);
-                                                                    let v177 =
-                                                                        C::value_type(ctx, v176);
-                                                                    let v181 = C::ty_equal(
-                                                                        ctx, v180, v177,
-                                                                    );
-                                                                    if v181 == true {
-                                                                        let v163 =
-                                                                            constructor_put_in_vreg(
-                                                                                ctx, v38.0,
-                                                                            );
-                                                                        let v182 =
-                                                                            constructor_put_in_xreg(
-                                                                                ctx, v176,
-                                                                            );
-                                                                        let v165 =
-                                                                            &constructor_unmasked(
-                                                                                ctx,
-                                                                            );
-                                                                        let v183 =
-                                                                            C::vstate_from_type(
-                                                                                ctx, v179,
-                                                                            );
-                                                                        let v184 = C::vstate_mf2(
-                                                                            ctx, v183,
-                                                                        );
-                                                                        let v187 = constructor_rv_vwaddu_wx(ctx, v163, v182, v165, v184);
-                                                                        let v188 =
-                                                                            constructor_output_vreg(
-                                                                                ctx, v187,
-                                                                            );
-                                                                        // Rule at src/isa/riscv64/lower.isle line 117.
-                                                                        return Some(v188);
-                                                                    }
-                                                                }
-                                                            }
-                                                            &Opcode::Sextend => {
-                                                                let v178 =
-                                                                    C::ty_half_width(ctx, v11);
-                                                                if let Some(v179) = v178 {
-                                                                    let v180 =
-                                                                        C::lane_type(ctx, v179);
-                                                                    let v177 =
-                                                                        C::value_type(ctx, v176);
-                                                                    let v181 = C::ty_equal(
-                                                                        ctx, v180, v177,
-                                                                    );
-                                                                    if v181 == true {
-                                                                        let v163 =
-                                                                            constructor_put_in_vreg(
-                                                                                ctx, v38.0,
-                                                                            );
-                                                                        let v182 =
-                                                                            constructor_put_in_xreg(
-                                                                                ctx, v176,
-                                                                            );
-                                                                        let v165 =
-                                                                            &constructor_unmasked(
-                                                                                ctx,
-                                                                            );
-                                                                        let v183 =
-                                                                            C::vstate_from_type(
-                                                                                ctx, v179,
-                                                                            );
-                                                                        let v184 = C::vstate_mf2(
-                                                                            ctx, v183,
-                                                                        );
-                                                                        let v185 =
-                                                                            constructor_rv_vwadd_wx(
-                                                                                ctx, v163, v182,
-                                                                                v165, v184,
-                                                                            );
-                                                                        let v186 =
-                                                                            constructor_output_vreg(
-                                                                                ctx, v185,
-                                                                            );
-                                                                        // Rule at src/isa/riscv64/lower.isle line 112.
-                                                                        return Some(v186);
-                                                                    }
-                                                                }
-                                                            }
-                                                            _ => {}
-                                                        }
-                                                    }
-                                                    &InstructionData::UnaryImm {
-                                                        opcode: ref v189,
-                                                        imm: v190,
-                                                    } => {
-                                                        if let &Opcode::Iconst = v189 {
-                                                            let v191 = C::u64_from_imm64(ctx, v190);
-                                                            let v192 = C::imm5_from_u64(ctx, v191);
-                                                            if let Some(v193) = v192 {
-                                                                let v163 = constructor_put_in_vreg(
-                                                                    ctx, v38.0,
-                                                                );
-                                                                let v165 =
-                                                                    &constructor_unmasked(ctx);
-                                                                let v166 =
-                                                                    C::vstate_from_type(ctx, v11);
-                                                                let v194 = constructor_rv_vadd_vi(
-                                                                    ctx, v163, v193, v165, v166,
-                                                                );
-                                                                let v195 = constructor_output_vreg(
-                                                                    ctx, v194,
-                                                                );
-                                                                // Rule at src/isa/riscv64/lower.isle line 122.
-                                                                return Some(v195);
-                                                            }
-                                                        }
-                                                    }
-                                                    _ => {}
-                                                }
-                                            }
-                                            let v163 = constructor_put_in_vreg(ctx, v38.0);
-                                            let v169 = constructor_put_in_xreg(ctx, v69);
-                                            let v165 = &constructor_unmasked(ctx);
-                                            let v166 = C::vstate_from_type(ctx, v11);
-                                            let v170 =
-                                                constructor_rv_vadd_vx(ctx, v163, v169, v165, v166);
-                                            let v171 = constructor_output_vreg(ctx, v170);
-                                            // Rule at src/isa/riscv64/lower.isle line 109.
-                                            return Some(v171);
-                                        }
-                                        &Opcode::SwidenLow => {
-                                            let v163 = constructor_put_in_vreg(ctx, v38.0);
-                                            let v219 = constructor_put_in_vreg(ctx, v69);
-                                            let v165 = &constructor_unmasked(ctx);
-                                            let v70 = C::value_type(ctx, v69);
-                                            let v220 = C::ty_half_lanes(ctx, v70);
-                                            let v221 = v220?;
-                                            let v222 = C::vstate_from_type(ctx, v221);
-                                            let v223 = C::vstate_mf2(ctx, v222);
-                                            let v224 = constructor_rv_vwadd_wv(
-                                                ctx, v163, v219, v165, v223,
-                                            );
-                                            let v225 = constructor_output_vreg(ctx, v224);
-                                            // Rule at src/isa/riscv64/lower.isle line 144.
-                                            return Some(v225);
-                                        }
-                                        &Opcode::SwidenHigh => {
-                                            let v163 = constructor_put_in_vreg(ctx, v38.0);
-                                            let v219 = constructor_put_in_vreg(ctx, v69);
-                                            let v70 = C::value_type(ctx, v69);
-                                            let v245 =
-                                                constructor_gen_slidedown_half(ctx, v70, v219);
-                                            let v165 = &constructor_unmasked(ctx);
-                                            let v220 = C::ty_half_lanes(ctx, v70);
-                                            let v221 = v220?;
-                                            let v222 = C::vstate_from_type(ctx, v221);
-                                            let v223 = C::vstate_mf2(ctx, v222);
-                                            let v246 = constructor_rv_vwadd_wv(
-                                                ctx, v163, v245, v165, v223,
-                                            );
-                                            let v247 = constructor_output_vreg(ctx, v246);
-                                            // Rule at src/isa/riscv64/lower.isle line 167.
-                                            return Some(v247);
-                                        }
-                                        &Opcode::UwidenLow => {
-                                            let v163 = constructor_put_in_vreg(ctx, v38.0);
-                                            let v219 = constructor_put_in_vreg(ctx, v69);
-                                            let v165 = &constructor_unmasked(ctx);
-                                            let v70 = C::value_type(ctx, v69);
-                                            let v220 = C::ty_half_lanes(ctx, v70);
-                                            let v221 = v220?;
-                                            let v222 = C::vstate_from_type(ctx, v221);
-                                            let v223 = C::vstate_mf2(ctx, v222);
-                                            let v263 = constructor_rv_vwaddu_wv(
-                                                ctx, v163, v219, v165, v223,
-                                            );
-                                            let v264 = constructor_output_vreg(ctx, v263);
-                                            // Rule at src/isa/riscv64/lower.isle line 189.
-                                            return Some(v264);
-                                        }
-                                        &Opcode::UwidenHigh => {
-                                            let v163 = constructor_put_in_vreg(ctx, v38.0);
-                                            let v219 = constructor_put_in_vreg(ctx, v69);
-                                            let v70 = C::value_type(ctx, v69);
-                                            let v245 =
-                                                constructor_gen_slidedown_half(ctx, v70, v219);
-                                            let v165 = &constructor_unmasked(ctx);
-                                            let v220 = C::ty_half_lanes(ctx, v70);
-                                            let v221 = v220?;
-                                            let v222 = C::vstate_from_type(ctx, v221);
-                                            let v223 = C::vstate_mf2(ctx, v222);
-                                            let v273 = constructor_rv_vwaddu_wv(
-                                                ctx, v163, v245, v165, v223,
-                                            );
-                                            let v274 = constructor_output_vreg(ctx, v273);
-                                            // Rule at src/isa/riscv64/lower.isle line 212.
-                                            return Some(v274);
-                                        }
-                                        _ => {}
-                                    }
-                                }
-                            }
-                            let v163 = constructor_put_in_vreg(ctx, v38.0);
-                            let v164 = constructor_put_in_vreg(ctx, v38.1);
-                            let v165 = &constructor_unmasked(ctx);
-                            let v166 = C::vstate_from_type(ctx, v11);
-                            let v167 = constructor_rv_vadd_vv(ctx, v163, v164, v165, v166);
-                            let v168 = constructor_output_vreg(ctx, v167);
-                            // Rule at src/isa/riscv64/lower.isle line 106.
-                            return Some(v168);
-                        }
-                        match v3 {
-                            I64 => {
-                                let v71 = C::has_zba(ctx);
-                                if v71 == true {
-                                    let v38 = C::unpack_value_array_2(ctx, v37);
-                                    let v57 = C::def_inst(ctx, v38.0);
-                                    if let Some(v58) = v57 {
-                                        let v59 = &C::inst_data(ctx, v58);
-                                        if let &InstructionData::Binary {
-                                            opcode: ref v99,
-                                            args: ref v100,
-                                        } = v59
-                                        {
-                                            if let &Opcode::Ishl = v99 {
-                                                let v101 = C::unpack_value_array_2(ctx, v100);
-                                                let v104 = C::maybe_uextend(ctx, v101.1);
-                                                if let Some(v105) = v104 {
-                                                    let v106 = C::def_inst(ctx, v105);
-                                                    if let Some(v107) = v106 {
-                                                        let v108 = &C::inst_data(ctx, v107);
-                                                        if let &InstructionData::UnaryImm {
-                                                            opcode: ref v109,
-                                                            imm: v110,
-                                                        } = v108
-                                                        {
-                                                            if let &Opcode::Iconst = v109 {
-                                                                let v127 = C::def_inst(ctx, v101.0);
-                                                                if let Some(v128) = v127 {
-                                                                    let v129 =
-                                                                        &C::inst_data(ctx, v128);
-                                                                    if let &InstructionData::Unary {
-                                                                        opcode: ref v130,
-                                                                        arg: v131,
-                                                                    } = v129 {
-                                                                        if let &Opcode::Uextend = v130 {
-                                                                            let v132 = C::value_type(ctx, v131);
-                                                                            if v132 == I32 {
-                                                                                let v133 = &constructor_match_shnadd_uw(ctx, v110);
-                                                                                if let Some(v134) = v133 {
-                                                                                    let v135 = C::put_in_reg(ctx, v131);
-                                                                                    let v65 = C::put_in_reg(ctx, v38.1);
-                                                                                    let v136 = constructor_alu_rrr(ctx, v134, v135, v65);
-                                                                                    let v137 = constructor_output_reg(ctx, v136);
-                                                                                    // Rule at src/isa/riscv64/lower.isle line 89.
-                                                                                    return Some(v137);
-                                                                                }
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                    let v45 = C::def_inst(ctx, v38.1);
-                                    if let Some(v46) = v45 {
-                                        let v47 = &C::inst_data(ctx, v46);
-                                        if let &InstructionData::Binary {
-                                            opcode: ref v82,
-                                            args: ref v83,
-                                        } = v47
-                                        {
-                                            if let &Opcode::Ishl = v82 {
-                                                let v84 = C::unpack_value_array_2(ctx, v83);
-                                                let v87 = C::maybe_uextend(ctx, v84.1);
-                                                if let Some(v88) = v87 {
-                                                    let v89 = C::def_inst(ctx, v88);
-                                                    if let Some(v90) = v89 {
-                                                        let v91 = &C::inst_data(ctx, v90);
-                                                        if let &InstructionData::UnaryImm {
-                                                            opcode: ref v92,
-                                                            imm: v93,
-                                                        } = v91
-                                                        {
-                                                            if let &Opcode::Iconst = v92 {
-                                                                let v116 = C::def_inst(ctx, v84.0);
-                                                                if let Some(v117) = v116 {
-                                                                    let v118 =
-                                                                        &C::inst_data(ctx, v117);
-                                                                    if let &InstructionData::Unary {
-                                                                        opcode: ref v119,
-                                                                        arg: v120,
-                                                                    } = v118 {
-                                                                        if let &Opcode::Uextend = v119 {
-                                                                            let v121 = C::value_type(ctx, v120);
-                                                                            if v121 == I32 {
-                                                                                let v122 = &constructor_match_shnadd_uw(ctx, v93);
-                                                                                if let Some(v123) = v122 {
-                                                                                    let v124 = C::put_in_reg(ctx, v120);
-                                                                                    let v54 = C::put_in_reg(ctx, v38.0);
-                                                                                    let v125 = constructor_alu_rrr(ctx, v123, v124, v54);
-                                                                                    let v126 = constructor_output_reg(ctx, v125);
-                                                                                    // Rule at src/isa/riscv64/lower.isle line 84.
-                                                                                    return Some(v126);
-                                                                                }
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                    if let Some(v58) = v57 {
-                                        let v59 = &C::inst_data(ctx, v58);
-                                        match v59 {
-                                            &InstructionData::Binary {
-                                                opcode: ref v99,
-                                                args: ref v100,
-                                            } => {
-                                                if let &Opcode::Ishl = v99 {
-                                                    let v101 = C::unpack_value_array_2(ctx, v100);
-                                                    let v104 = C::maybe_uextend(ctx, v101.1);
-                                                    if let Some(v105) = v104 {
-                                                        let v106 = C::def_inst(ctx, v105);
-                                                        if let Some(v107) = v106 {
-                                                            let v108 = &C::inst_data(ctx, v107);
-                                                            if let &InstructionData::UnaryImm {
-                                                                opcode: ref v109,
-                                                                imm: v110,
-                                                            } = v108
-                                                            {
-                                                                if let &Opcode::Iconst = v109 {
-                                                                    let v111 =
-                                                                        &constructor_match_shnadd(
-                                                                            ctx, v110,
-                                                                        );
-                                                                    if let Some(v112) = v111 {
-                                                                        let v113 = C::put_in_reg(
-                                                                            ctx, v101.0,
-                                                                        );
-                                                                        let v65 = C::put_in_reg(
-                                                                            ctx, v38.1,
-                                                                        );
-                                                                        let v114 =
-                                                                            constructor_alu_rrr(
-                                                                                ctx, v112, v113,
-                                                                                v65,
-                                                                            );
-                                                                        let v115 =
-                                                                            constructor_output_reg(
-                                                                                ctx, v114,
-                                                                            );
-                                                                        // Rule at src/isa/riscv64/lower.isle line 67.
-                                                                        return Some(v115);
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                            &InstructionData::Unary {
-                                                opcode: ref v76,
-                                                arg: v77,
-                                            } => {
-                                                if let &Opcode::Uextend = v76 {
-                                                    let v78 = C::value_type(ctx, v77);
-                                                    if v78 == I32 {
-                                                        let v79 = constructor_put_in_xreg(ctx, v77);
-                                                        let v42 =
-                                                            constructor_put_in_xreg(ctx, v38.1);
-                                                        let v80 =
-                                                            constructor_rv_adduw(ctx, v79, v42);
-                                                        let v81 = constructor_output_xreg(ctx, v80);
-                                                        // Rule at src/isa/riscv64/lower.isle line 52.
-                                                        return Some(v81);
-                                                    }
-                                                }
-                                            }
-                                            _ => {}
-                                        }
-                                    }
-                                    if let Some(v46) = v45 {
-                                        let v47 = &C::inst_data(ctx, v46);
-                                        match v47 {
-                                            &InstructionData::Binary {
-                                                opcode: ref v82,
-                                                args: ref v83,
-                                            } => {
-                                                if let &Opcode::Ishl = v82 {
-                                                    let v84 = C::unpack_value_array_2(ctx, v83);
-                                                    let v87 = C::maybe_uextend(ctx, v84.1);
-                                                    if let Some(v88) = v87 {
-                                                        let v89 = C::def_inst(ctx, v88);
-                                                        if let Some(v90) = v89 {
-                                                            let v91 = &C::inst_data(ctx, v90);
-                                                            if let &InstructionData::UnaryImm {
-                                                                opcode: ref v92,
-                                                                imm: v93,
-                                                            } = v91
-                                                            {
-                                                                if let &Opcode::Iconst = v92 {
-                                                                    let v94 =
-                                                                        &constructor_match_shnadd(
-                                                                            ctx, v93,
-                                                                        );
-                                                                    if let Some(v95) = v94 {
-                                                                        let v96 = C::put_in_reg(
-                                                                            ctx, v84.0,
-                                                                        );
-                                                                        let v54 = C::put_in_reg(
-                                                                            ctx, v38.0,
-                                                                        );
-                                                                        let v97 =
-                                                                            constructor_alu_rrr(
-                                                                                ctx, v95, v96, v54,
-                                                                            );
-                                                                        let v98 =
-                                                                            constructor_output_reg(
-                                                                                ctx, v97,
-                                                                            );
-                                                                        // Rule at src/isa/riscv64/lower.isle line 62.
-                                                                        return Some(v98);
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                            &InstructionData::Unary {
-                                                opcode: ref v68,
-                                                arg: v69,
-                                            } => {
-                                                if let &Opcode::Uextend = v68 {
-                                                    let v70 = C::value_type(ctx, v69);
-                                                    if v70 == I32 {
-                                                        let v72 = constructor_put_in_xreg(ctx, v69);
-                                                        let v73 =
-                                                            constructor_put_in_xreg(ctx, v38.0);
-                                                        let v74 =
-                                                            constructor_rv_adduw(ctx, v72, v73);
-                                                        let v75 = constructor_output_xreg(ctx, v74);
-                                                        // Rule at src/isa/riscv64/lower.isle line 48.
-                                                        return Some(v75);
-                                                    }
-                                                }
-                                            }
-                                            _ => {}
-                                        }
-                                    }
-                                }
-                            }
-                            I128 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v138 = C::put_in_regs(ctx, v38.0);
-                                let v140 = C::value_regs_get(ctx, v138, 0x0);
-                                let v141 = C::xreg_new(ctx, v140);
-                                let v142 = C::put_in_regs(ctx, v38.1);
-                                let v143 = C::value_regs_get(ctx, v142, 0x0);
-                                let v144 = C::xreg_new(ctx, v143);
-                                let v145 = constructor_rv_add(ctx, v141, v144);
-                                let v146 = C::put_in_regs(ctx, v38.1);
-                                let v147 = C::value_regs_get(ctx, v146, 0x0);
-                                let v148 = C::xreg_new(ctx, v147);
-                                let v149 = constructor_rv_sltu(ctx, v145, v148);
-                                let v150 = C::put_in_regs(ctx, v38.0);
-                                let v152 = C::value_regs_get(ctx, v150, 0x1);
-                                let v153 = C::xreg_new(ctx, v152);
-                                let v154 = C::put_in_regs(ctx, v38.1);
-                                let v155 = C::value_regs_get(ctx, v154, 0x1);
-                                let v156 = C::xreg_new(ctx, v155);
-                                let v157 = constructor_rv_add(ctx, v153, v156);
-                                let v158 = constructor_rv_add(ctx, v157, v149);
-                                let v159 = C::xreg_to_reg(ctx, v145);
-                                let v160 = C::xreg_to_reg(ctx, v158);
-                                let v161 = C::value_regs(ctx, v159, v160);
-                                let v162 = C::output(ctx, v161);
-                                // Rule at src/isa/riscv64/lower.isle line 95.
-                                return Some(v162);
-                            }
-                            _ => {}
-                        }
-                        let v34 = C::ty_int_ref_scalar_64_extract(ctx, v3);
-                        if let Some(v35) = v34 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v57 = C::def_inst(ctx, v38.0);
-                            if let Some(v58) = v57 {
-                                let v59 = &C::inst_data(ctx, v58);
-                                if let &InstructionData::UnaryImm {
-                                    opcode: ref v60,
-                                    imm: v61,
-                                } = v59
-                                {
-                                    if let &Opcode::Iconst = v60 {
-                                        let v62 = C::u64_from_imm64(ctx, v61);
-                                        let v63 = C::imm12_from_u64(ctx, v62);
-                                        if let Some(v64) = v63 {
-                                            let v53 = &constructor_select_addi(ctx, v35);
-                                            let v65 = C::put_in_reg(ctx, v38.1);
-                                            let v66 = constructor_alu_rr_imm12(ctx, v53, v65, v64);
-                                            let v67 = constructor_output_reg(ctx, v66);
-                                            // Rule at src/isa/riscv64/lower.isle line 43.
-                                            return Some(v67);
-                                        }
-                                    }
-                                }
-                            }
-                            let v45 = C::def_inst(ctx, v38.1);
-                            if let Some(v46) = v45 {
-                                let v47 = &C::inst_data(ctx, v46);
-                                if let &InstructionData::UnaryImm {
-                                    opcode: ref v48,
-                                    imm: v49,
-                                } = v47
-                                {
-                                    if let &Opcode::Iconst = v48 {
-                                        let v50 = C::u64_from_imm64(ctx, v49);
-                                        let v51 = C::imm12_from_u64(ctx, v50);
-                                        if let Some(v52) = v51 {
-                                            let v53 = &constructor_select_addi(ctx, v35);
-                                            let v54 = C::put_in_reg(ctx, v38.0);
-                                            let v55 = constructor_alu_rr_imm12(ctx, v53, v54, v52);
-                                            let v56 = constructor_output_reg(ctx, v55);
-                                            // Rule at src/isa/riscv64/lower.isle line 40.
-                                            return Some(v56);
-                                        }
-                                    }
-                                }
-                            }
-                            let v41 = constructor_put_in_xreg(ctx, v38.0);
-                            let v42 = constructor_put_in_xreg(ctx, v38.1);
-                            let v43 = constructor_rv_add(ctx, v41, v42);
-                            let v44 = constructor_output_xreg(ctx, v43);
-                            // Rule at src/isa/riscv64/lower.isle line 36.
-                            return Some(v44);
-                        }
-                    }
-                }
-                &Opcode::Isub => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
-                        if let Some(v11) = v10 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v57 = C::def_inst(ctx, v38.0);
-                            if let Some(v58) = v57 {
-                                let v59 = &C::inst_data(ctx, v58);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v76,
-                                    arg: v77,
-                                } = v59
-                                {
-                                    match v76 {
-                                        &Opcode::Splat => {
-                                            let v200 = C::def_inst(ctx, v77);
-                                            if let Some(v201) = v200 {
-                                                let v202 = &C::inst_data(ctx, v201);
-                                                if let &InstructionData::UnaryImm {
-                                                    opcode: ref v212,
-                                                    imm: v213,
-                                                } = v202
-                                                {
-                                                    if let &Opcode::Iconst = v212 {
-                                                        let v214 = C::u64_from_imm64(ctx, v213);
-                                                        let v215 = C::imm5_from_u64(ctx, v214);
-                                                        if let Some(v216) = v215 {
-                                                            let v196 =
-                                                                constructor_put_in_vreg(ctx, v38.1);
-                                                            let v165 = &constructor_unmasked(ctx);
-                                                            let v166 =
-                                                                C::vstate_from_type(ctx, v11);
-                                                            let v329 = constructor_rv_vrsub_vi(
-                                                                ctx, v196, v216, v165, v166,
-                                                            );
-                                                            let v330 =
-                                                                constructor_output_vreg(ctx, v329);
-                                                            // Rule at src/isa/riscv64/lower.isle line 293.
-                                                            return Some(v330);
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                            let v196 = constructor_put_in_vreg(ctx, v38.1);
-                                            let v197 = constructor_put_in_xreg(ctx, v77);
-                                            let v165 = &constructor_unmasked(ctx);
-                                            let v166 = C::vstate_from_type(ctx, v11);
-                                            let v327 = constructor_rv_vrsub_vx(
-                                                ctx, v196, v197, v165, v166,
-                                            );
-                                            let v328 = constructor_output_vreg(ctx, v327);
-                                            // Rule at src/isa/riscv64/lower.isle line 290.
-                                            return Some(v328);
-                                        }
-                                        &Opcode::SwidenLow => {
-                                            let v45 = C::def_inst(ctx, v38.1);
-                                            if let Some(v46) = v45 {
-                                                let v47 = &C::inst_data(ctx, v46);
-                                                if let &InstructionData::Unary {
-                                                    opcode: ref v68,
-                                                    arg: v69,
-                                                } = v47
-                                                {
-                                                    match v68 {
-                                                        &Opcode::Splat => {
-                                                            let v172 = C::def_inst(ctx, v69);
-                                                            if let Some(v173) = v172 {
-                                                                let v174 = &C::inst_data(ctx, v173);
-                                                                if let &InstructionData::Unary {
-                                                                    opcode: ref v175,
-                                                                    arg: v176,
-                                                                } = v174
-                                                                {
-                                                                    if let &Opcode::Sextend = v175 {
-                                                                        let v78 =
-                                                                            C::value_type(ctx, v77);
-                                                                        let v236 =
-                                                                            C::lane_type(ctx, v78);
-                                                                        let v177 = C::value_type(
-                                                                            ctx, v176,
-                                                                        );
-                                                                        let v237 = C::ty_equal(
-                                                                            ctx, v236, v177,
-                                                                        );
-                                                                        if v237 == true {
-                                                                            let v233 = constructor_put_in_vreg(ctx, v77);
-                                                                            let v182 = constructor_put_in_xreg(ctx, v176);
-                                                                            let v165 = &constructor_unmasked(ctx);
-                                                                            let v227 =
-                                                                                C::ty_half_lanes(
-                                                                                    ctx, v78,
-                                                                                );
-                                                                            let v228 = v227?;
-                                                                            let v229 =
-                                                                                C::vstate_from_type(
-                                                                                    ctx, v228,
-                                                                                );
-                                                                            let v230 =
-                                                                                C::vstate_mf2(
-                                                                                    ctx, v229,
-                                                                                );
-                                                                            let v335 = constructor_rv_vwsub_vx(ctx, v233, v182, v165, v230);
-                                                                            let v336 = constructor_output_vreg(ctx, v335);
-                                                                            // Rule at src/isa/riscv64/lower.isle line 306.
-                                                                            return Some(v336);
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                        &Opcode::SwidenLow => {
-                                                            let v233 =
-                                                                constructor_put_in_vreg(ctx, v77);
-                                                            let v219 =
-                                                                constructor_put_in_vreg(ctx, v69);
-                                                            let v165 = &constructor_unmasked(ctx);
-                                                            let v78 = C::value_type(ctx, v77);
-                                                            let v227 = C::ty_half_lanes(ctx, v78);
-                                                            let v228 = v227?;
-                                                            let v229 =
-                                                                C::vstate_from_type(ctx, v228);
-                                                            let v230 = C::vstate_mf2(ctx, v229);
-                                                            let v333 = constructor_rv_vwsub_vv(
-                                                                ctx, v233, v219, v165, v230,
-                                                            );
-                                                            let v334 =
-                                                                constructor_output_vreg(ctx, v333);
-                                                            // Rule at src/isa/riscv64/lower.isle line 302.
-                                                            return Some(v334);
-                                                        }
-                                                        &Opcode::SwidenHigh => {
-                                                            let v233 =
-                                                                constructor_put_in_vreg(ctx, v77);
-                                                            let v219 =
-                                                                constructor_put_in_vreg(ctx, v69);
-                                                            let v78 = C::value_type(ctx, v77);
-                                                            let v283 =
-                                                                constructor_gen_slidedown_half(
-                                                                    ctx, v78, v219,
-                                                                );
-                                                            let v165 = &constructor_unmasked(ctx);
-                                                            let v227 = C::ty_half_lanes(ctx, v78);
-                                                            let v228 = v227?;
-                                                            let v229 =
-                                                                C::vstate_from_type(ctx, v228);
-                                                            let v230 = C::vstate_mf2(ctx, v229);
-                                                            let v355 = constructor_rv_vwsub_vv(
-                                                                ctx, v233, v283, v165, v230,
-                                                            );
-                                                            let v356 =
-                                                                constructor_output_vreg(ctx, v355);
-                                                            // Rule at src/isa/riscv64/lower.isle line 357.
-                                                            return Some(v356);
-                                                        }
-                                                        _ => {}
-                                                    }
-                                                }
-                                            }
-                                        }
-                                        &Opcode::SwidenHigh => {
-                                            let v45 = C::def_inst(ctx, v38.1);
-                                            if let Some(v46) = v45 {
-                                                let v47 = &C::inst_data(ctx, v46);
-                                                if let &InstructionData::Unary {
-                                                    opcode: ref v68,
-                                                    arg: v69,
-                                                } = v47
-                                                {
-                                                    match v68 {
-                                                        &Opcode::Splat => {
-                                                            let v172 = C::def_inst(ctx, v69);
-                                                            if let Some(v173) = v172 {
-                                                                let v174 = &C::inst_data(ctx, v173);
-                                                                if let &InstructionData::Unary {
-                                                                    opcode: ref v175,
-                                                                    arg: v176,
-                                                                } = v174
-                                                                {
-                                                                    if let &Opcode::Sextend = v175 {
-                                                                        let v78 =
-                                                                            C::value_type(ctx, v77);
-                                                                        let v236 =
-                                                                            C::lane_type(ctx, v78);
-                                                                        let v177 = C::value_type(
-                                                                            ctx, v176,
-                                                                        );
-                                                                        let v237 = C::ty_equal(
-                                                                            ctx, v236, v177,
-                                                                        );
-                                                                        if v237 == true {
-                                                                            let v233 = constructor_put_in_vreg(ctx, v77);
-                                                                            let v251 = constructor_gen_slidedown_half(ctx, v78, v233);
-                                                                            let v256 = constructor_put_in_xreg(ctx, v176);
-                                                                            let v165 = &constructor_unmasked(ctx);
-                                                                            let v227 =
-                                                                                C::ty_half_lanes(
-                                                                                    ctx, v78,
-                                                                                );
-                                                                            let v228 = v227?;
-                                                                            let v229 =
-                                                                                C::vstate_from_type(
-                                                                                    ctx, v228,
-                                                                                );
-                                                                            let v230 =
-                                                                                C::vstate_mf2(
-                                                                                    ctx, v229,
-                                                                                );
-                                                                            let v341 = constructor_rv_vwsub_vx(ctx, v251, v256, v165, v230);
-                                                                            let v342 = constructor_output_vreg(ctx, v341);
-                                                                            // Rule at src/isa/riscv64/lower.isle line 321.
-                                                                            return Some(v342);
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                        &Opcode::SwidenLow => {
-                                                            let v233 =
-                                                                constructor_put_in_vreg(ctx, v77);
-                                                            let v78 = C::value_type(ctx, v77);
-                                                            let v251 =
-                                                                constructor_gen_slidedown_half(
-                                                                    ctx, v78, v233,
-                                                                );
-                                                            let v252 =
-                                                                constructor_put_in_vreg(ctx, v69);
-                                                            let v165 = &constructor_unmasked(ctx);
-                                                            let v227 = C::ty_half_lanes(ctx, v78);
-                                                            let v228 = v227?;
-                                                            let v229 =
-                                                                C::vstate_from_type(ctx, v228);
-                                                            let v230 = C::vstate_mf2(ctx, v229);
-                                                            let v357 = constructor_rv_vwsub_vv(
-                                                                ctx, v251, v252, v165, v230,
-                                                            );
-                                                            let v358 =
-                                                                constructor_output_vreg(ctx, v357);
-                                                            // Rule at src/isa/riscv64/lower.isle line 361.
-                                                            return Some(v358);
-                                                        }
-                                                        &Opcode::SwidenHigh => {
-                                                            let v233 =
-                                                                constructor_put_in_vreg(ctx, v77);
-                                                            let v78 = C::value_type(ctx, v77);
-                                                            let v251 =
-                                                                constructor_gen_slidedown_half(
-                                                                    ctx, v78, v233,
-                                                                );
-                                                            let v252 =
-                                                                constructor_put_in_vreg(ctx, v69);
-                                                            let v253 =
-                                                                constructor_gen_slidedown_half(
-                                                                    ctx, v78, v252,
-                                                                );
-                                                            let v165 = &constructor_unmasked(ctx);
-                                                            let v227 = C::ty_half_lanes(ctx, v78);
-                                                            let v228 = v227?;
-                                                            let v229 =
-                                                                C::vstate_from_type(ctx, v228);
-                                                            let v230 = C::vstate_mf2(ctx, v229);
-                                                            let v339 = constructor_rv_vwsub_vv(
-                                                                ctx, v251, v253, v165, v230,
-                                                            );
-                                                            let v340 =
-                                                                constructor_output_vreg(ctx, v339);
-                                                            // Rule at src/isa/riscv64/lower.isle line 317.
-                                                            return Some(v340);
-                                                        }
-                                                        _ => {}
-                                                    }
-                                                }
-                                            }
-                                        }
-                                        &Opcode::UwidenLow => {
-                                            let v45 = C::def_inst(ctx, v38.1);
-                                            if let Some(v46) = v45 {
-                                                let v47 = &C::inst_data(ctx, v46);
-                                                if let &InstructionData::Unary {
-                                                    opcode: ref v68,
-                                                    arg: v69,
-                                                } = v47
-                                                {
-                                                    match v68 {
-                                                        &Opcode::Splat => {
-                                                            let v172 = C::def_inst(ctx, v69);
-                                                            if let Some(v173) = v172 {
-                                                                let v174 = &C::inst_data(ctx, v173);
-                                                                if let &InstructionData::Unary {
-                                                                    opcode: ref v175,
-                                                                    arg: v176,
-                                                                } = v174
-                                                                {
-                                                                    if let &Opcode::Uextend = v175 {
-                                                                        let v78 =
-                                                                            C::value_type(ctx, v77);
-                                                                        let v236 =
-                                                                            C::lane_type(ctx, v78);
-                                                                        let v177 = C::value_type(
-                                                                            ctx, v176,
-                                                                        );
-                                                                        let v237 = C::ty_equal(
-                                                                            ctx, v236, v177,
-                                                                        );
-                                                                        if v237 == true {
-                                                                            let v233 = constructor_put_in_vreg(ctx, v77);
-                                                                            let v182 = constructor_put_in_xreg(ctx, v176);
-                                                                            let v165 = &constructor_unmasked(ctx);
-                                                                            let v227 =
-                                                                                C::ty_half_lanes(
-                                                                                    ctx, v78,
-                                                                                );
-                                                                            let v228 = v227?;
-                                                                            let v229 =
-                                                                                C::vstate_from_type(
-                                                                                    ctx, v228,
-                                                                                );
-                                                                            let v230 =
-                                                                                C::vstate_mf2(
-                                                                                    ctx, v229,
-                                                                                );
-                                                                            let v347 = constructor_rv_vwsubu_vx(ctx, v233, v182, v165, v230);
-                                                                            let v348 = constructor_output_vreg(ctx, v347);
-                                                                            // Rule at src/isa/riscv64/lower.isle line 335.
-                                                                            return Some(v348);
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                        &Opcode::UwidenLow => {
-                                                            let v233 =
-                                                                constructor_put_in_vreg(ctx, v77);
-                                                            let v219 =
-                                                                constructor_put_in_vreg(ctx, v69);
-                                                            let v165 = &constructor_unmasked(ctx);
-                                                            let v78 = C::value_type(ctx, v77);
-                                                            let v227 = C::ty_half_lanes(ctx, v78);
-                                                            let v228 = v227?;
-                                                            let v229 =
-                                                                C::vstate_from_type(ctx, v228);
-                                                            let v230 = C::vstate_mf2(ctx, v229);
-                                                            let v345 = constructor_rv_vwsubu_vv(
-                                                                ctx, v233, v219, v165, v230,
-                                                            );
-                                                            let v346 =
-                                                                constructor_output_vreg(ctx, v345);
-                                                            // Rule at src/isa/riscv64/lower.isle line 331.
-                                                            return Some(v346);
-                                                        }
-                                                        &Opcode::UwidenHigh => {
-                                                            let v233 =
-                                                                constructor_put_in_vreg(ctx, v77);
-                                                            let v219 =
-                                                                constructor_put_in_vreg(ctx, v69);
-                                                            let v78 = C::value_type(ctx, v77);
-                                                            let v283 =
-                                                                constructor_gen_slidedown_half(
-                                                                    ctx, v78, v219,
-                                                                );
-                                                            let v165 = &constructor_unmasked(ctx);
-                                                            let v227 = C::ty_half_lanes(ctx, v78);
-                                                            let v228 = v227?;
-                                                            let v229 =
-                                                                C::vstate_from_type(ctx, v228);
-                                                            let v230 = C::vstate_mf2(ctx, v229);
-                                                            let v359 = constructor_rv_vwsubu_vv(
-                                                                ctx, v233, v283, v165, v230,
-                                                            );
-                                                            let v360 =
-                                                                constructor_output_vreg(ctx, v359);
-                                                            // Rule at src/isa/riscv64/lower.isle line 367.
-                                                            return Some(v360);
-                                                        }
-                                                        _ => {}
-                                                    }
-                                                }
-                                            }
-                                        }
-                                        &Opcode::UwidenHigh => {
-                                            let v45 = C::def_inst(ctx, v38.1);
-                                            if let Some(v46) = v45 {
-                                                let v47 = &C::inst_data(ctx, v46);
-                                                if let &InstructionData::Unary {
-                                                    opcode: ref v68,
-                                                    arg: v69,
-                                                } = v47
-                                                {
-                                                    match v68 {
-                                                        &Opcode::Splat => {
-                                                            let v172 = C::def_inst(ctx, v69);
-                                                            if let Some(v173) = v172 {
-                                                                let v174 = &C::inst_data(ctx, v173);
-                                                                if let &InstructionData::Unary {
-                                                                    opcode: ref v175,
-                                                                    arg: v176,
-                                                                } = v174
-                                                                {
-                                                                    if let &Opcode::Uextend = v175 {
-                                                                        let v78 =
-                                                                            C::value_type(ctx, v77);
-                                                                        let v236 =
-                                                                            C::lane_type(ctx, v78);
-                                                                        let v177 = C::value_type(
-                                                                            ctx, v176,
-                                                                        );
-                                                                        let v237 = C::ty_equal(
-                                                                            ctx, v236, v177,
-                                                                        );
-                                                                        if v237 == true {
-                                                                            let v233 = constructor_put_in_vreg(ctx, v77);
-                                                                            let v251 = constructor_gen_slidedown_half(ctx, v78, v233);
-                                                                            let v256 = constructor_put_in_xreg(ctx, v176);
-                                                                            let v165 = &constructor_unmasked(ctx);
-                                                                            let v227 =
-                                                                                C::ty_half_lanes(
-                                                                                    ctx, v78,
-                                                                                );
-                                                                            let v228 = v227?;
-                                                                            let v229 =
-                                                                                C::vstate_from_type(
-                                                                                    ctx, v228,
-                                                                                );
-                                                                            let v230 =
-                                                                                C::vstate_mf2(
-                                                                                    ctx, v229,
-                                                                                );
-                                                                            let v353 = constructor_rv_vwsubu_vx(ctx, v251, v256, v165, v230);
-                                                                            let v354 = constructor_output_vreg(ctx, v353);
-                                                                            // Rule at src/isa/riscv64/lower.isle line 350.
-                                                                            return Some(v354);
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                        &Opcode::UwidenLow => {
-                                                            let v233 =
-                                                                constructor_put_in_vreg(ctx, v77);
-                                                            let v78 = C::value_type(ctx, v77);
-                                                            let v251 =
-                                                                constructor_gen_slidedown_half(
-                                                                    ctx, v78, v233,
-                                                                );
-                                                            let v252 =
-                                                                constructor_put_in_vreg(ctx, v69);
-                                                            let v165 = &constructor_unmasked(ctx);
-                                                            let v227 = C::ty_half_lanes(ctx, v78);
-                                                            let v228 = v227?;
-                                                            let v229 =
-                                                                C::vstate_from_type(ctx, v228);
-                                                            let v230 = C::vstate_mf2(ctx, v229);
-                                                            let v361 = constructor_rv_vwsubu_vv(
-                                                                ctx, v251, v252, v165, v230,
-                                                            );
-                                                            let v362 =
-                                                                constructor_output_vreg(ctx, v361);
-                                                            // Rule at src/isa/riscv64/lower.isle line 371.
-                                                            return Some(v362);
-                                                        }
-                                                        &Opcode::UwidenHigh => {
-                                                            let v233 =
-                                                                constructor_put_in_vreg(ctx, v77);
-                                                            let v78 = C::value_type(ctx, v77);
-                                                            let v251 =
-                                                                constructor_gen_slidedown_half(
-                                                                    ctx, v78, v233,
-                                                                );
-                                                            let v252 =
-                                                                constructor_put_in_vreg(ctx, v69);
-                                                            let v253 =
-                                                                constructor_gen_slidedown_half(
-                                                                    ctx, v78, v252,
-                                                                );
-                                                            let v165 = &constructor_unmasked(ctx);
-                                                            let v227 = C::ty_half_lanes(ctx, v78);
-                                                            let v228 = v227?;
-                                                            let v229 =
-                                                                C::vstate_from_type(ctx, v228);
-                                                            let v230 = C::vstate_mf2(ctx, v229);
-                                                            let v351 = constructor_rv_vwsubu_vv(
-                                                                ctx, v251, v253, v165, v230,
-                                                            );
-                                                            let v352 =
-                                                                constructor_output_vreg(ctx, v351);
-                                                            // Rule at src/isa/riscv64/lower.isle line 346.
-                                                            return Some(v352);
-                                                        }
-                                                        _ => {}
-                                                    }
-                                                }
-                                            }
-                                        }
-                                        _ => {}
-                                    }
-                                }
-                            }
-                            let v45 = C::def_inst(ctx, v38.1);
-                            if let Some(v46) = v45 {
-                                let v47 = &C::inst_data(ctx, v46);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v68,
-                                    arg: v69,
-                                } = v47
-                                {
-                                    match v68 {
-                                        &Opcode::Splat => {
-                                            let v172 = C::def_inst(ctx, v69);
-                                            if let Some(v173) = v172 {
-                                                let v174 = &C::inst_data(ctx, v173);
-                                                if let &InstructionData::Unary {
-                                                    opcode: ref v175,
-                                                    arg: v176,
-                                                } = v174
-                                                {
-                                                    match v175 {
-                                                        &Opcode::Uextend => {
-                                                            let v178 = C::ty_half_width(ctx, v11);
-                                                            if let Some(v179) = v178 {
-                                                                let v180 = C::lane_type(ctx, v179);
-                                                                let v177 = C::value_type(ctx, v176);
-                                                                let v181 =
-                                                                    C::ty_equal(ctx, v180, v177);
-                                                                if v181 == true {
-                                                                    let v163 =
-                                                                        constructor_put_in_vreg(
-                                                                            ctx, v38.0,
-                                                                        );
-                                                                    let v182 =
-                                                                        constructor_put_in_xreg(
-                                                                            ctx, v176,
-                                                                        );
-                                                                    let v165 =
-                                                                        &constructor_unmasked(ctx);
-                                                                    let v183 = C::vstate_from_type(
-                                                                        ctx, v179,
-                                                                    );
-                                                                    let v184 =
-                                                                        C::vstate_mf2(ctx, v183);
-                                                                    let v325 =
-                                                                        constructor_rv_vwsubu_wx(
-                                                                            ctx, v163, v182, v165,
-                                                                            v184,
-                                                                        );
-                                                                    let v326 =
-                                                                        constructor_output_vreg(
-                                                                            ctx, v325,
-                                                                        );
-                                                                    // Rule at src/isa/riscv64/lower.isle line 285.
-                                                                    return Some(v326);
-                                                                }
-                                                            }
-                                                        }
-                                                        &Opcode::Sextend => {
-                                                            let v178 = C::ty_half_width(ctx, v11);
-                                                            if let Some(v179) = v178 {
-                                                                let v180 = C::lane_type(ctx, v179);
-                                                                let v177 = C::value_type(ctx, v176);
-                                                                let v181 =
-                                                                    C::ty_equal(ctx, v180, v177);
-                                                                if v181 == true {
-                                                                    let v163 =
-                                                                        constructor_put_in_vreg(
-                                                                            ctx, v38.0,
-                                                                        );
-                                                                    let v182 =
-                                                                        constructor_put_in_xreg(
-                                                                            ctx, v176,
-                                                                        );
-                                                                    let v165 =
-                                                                        &constructor_unmasked(ctx);
-                                                                    let v183 = C::vstate_from_type(
-                                                                        ctx, v179,
-                                                                    );
-                                                                    let v184 =
-                                                                        C::vstate_mf2(ctx, v183);
-                                                                    let v323 =
-                                                                        constructor_rv_vwsub_wx(
-                                                                            ctx, v163, v182, v165,
-                                                                            v184,
-                                                                        );
-                                                                    let v324 =
-                                                                        constructor_output_vreg(
-                                                                            ctx, v323,
-                                                                        );
-                                                                    // Rule at src/isa/riscv64/lower.isle line 280.
-                                                                    return Some(v324);
-                                                                }
-                                                            }
-                                                        }
-                                                        _ => {}
-                                                    }
-                                                }
-                                            }
-                                            let v163 = constructor_put_in_vreg(ctx, v38.0);
-                                            let v169 = constructor_put_in_xreg(ctx, v69);
-                                            let v165 = &constructor_unmasked(ctx);
-                                            let v166 = C::vstate_from_type(ctx, v11);
-                                            let v321 =
-                                                constructor_rv_vsub_vx(ctx, v163, v169, v165, v166);
-                                            let v322 = constructor_output_vreg(ctx, v321);
-                                            // Rule at src/isa/riscv64/lower.isle line 277.
-                                            return Some(v322);
-                                        }
-                                        &Opcode::SwidenLow => {
-                                            let v163 = constructor_put_in_vreg(ctx, v38.0);
-                                            let v219 = constructor_put_in_vreg(ctx, v69);
-                                            let v165 = &constructor_unmasked(ctx);
-                                            let v70 = C::value_type(ctx, v69);
-                                            let v220 = C::ty_half_lanes(ctx, v70);
-                                            let v221 = v220?;
-                                            let v222 = C::vstate_from_type(ctx, v221);
-                                            let v223 = C::vstate_mf2(ctx, v222);
-                                            let v331 = constructor_rv_vwsub_wv(
-                                                ctx, v163, v219, v165, v223,
-                                            );
-                                            let v332 = constructor_output_vreg(ctx, v331);
-                                            // Rule at src/isa/riscv64/lower.isle line 299.
-                                            return Some(v332);
-                                        }
-                                        &Opcode::SwidenHigh => {
-                                            let v163 = constructor_put_in_vreg(ctx, v38.0);
-                                            let v219 = constructor_put_in_vreg(ctx, v69);
-                                            let v70 = C::value_type(ctx, v69);
-                                            let v245 =
-                                                constructor_gen_slidedown_half(ctx, v70, v219);
-                                            let v165 = &constructor_unmasked(ctx);
-                                            let v220 = C::ty_half_lanes(ctx, v70);
-                                            let v221 = v220?;
-                                            let v222 = C::vstate_from_type(ctx, v221);
-                                            let v223 = C::vstate_mf2(ctx, v222);
-                                            let v337 = constructor_rv_vwsub_wv(
-                                                ctx, v163, v245, v165, v223,
-                                            );
-                                            let v338 = constructor_output_vreg(ctx, v337);
-                                            // Rule at src/isa/riscv64/lower.isle line 314.
-                                            return Some(v338);
-                                        }
-                                        &Opcode::UwidenLow => {
-                                            let v163 = constructor_put_in_vreg(ctx, v38.0);
-                                            let v219 = constructor_put_in_vreg(ctx, v69);
-                                            let v165 = &constructor_unmasked(ctx);
-                                            let v70 = C::value_type(ctx, v69);
-                                            let v220 = C::ty_half_lanes(ctx, v70);
-                                            let v221 = v220?;
-                                            let v222 = C::vstate_from_type(ctx, v221);
-                                            let v223 = C::vstate_mf2(ctx, v222);
-                                            let v343 = constructor_rv_vwsubu_wv(
-                                                ctx, v163, v219, v165, v223,
-                                            );
-                                            let v344 = constructor_output_vreg(ctx, v343);
-                                            // Rule at src/isa/riscv64/lower.isle line 328.
-                                            return Some(v344);
-                                        }
-                                        &Opcode::UwidenHigh => {
-                                            let v163 = constructor_put_in_vreg(ctx, v38.0);
-                                            let v219 = constructor_put_in_vreg(ctx, v69);
-                                            let v70 = C::value_type(ctx, v69);
-                                            let v245 =
-                                                constructor_gen_slidedown_half(ctx, v70, v219);
-                                            let v165 = &constructor_unmasked(ctx);
-                                            let v220 = C::ty_half_lanes(ctx, v70);
-                                            let v221 = v220?;
-                                            let v222 = C::vstate_from_type(ctx, v221);
-                                            let v223 = C::vstate_mf2(ctx, v222);
-                                            let v349 = constructor_rv_vwsubu_wv(
-                                                ctx, v163, v245, v165, v223,
-                                            );
-                                            let v350 = constructor_output_vreg(ctx, v349);
-                                            // Rule at src/isa/riscv64/lower.isle line 343.
-                                            return Some(v350);
-                                        }
-                                        _ => {}
-                                    }
-                                }
-                            }
-                            let v163 = constructor_put_in_vreg(ctx, v38.0);
-                            let v164 = constructor_put_in_vreg(ctx, v38.1);
-                            let v165 = &constructor_unmasked(ctx);
-                            let v166 = C::vstate_from_type(ctx, v11);
-                            let v319 = constructor_rv_vsub_vv(ctx, v163, v164, v165, v166);
-                            let v320 = constructor_output_vreg(ctx, v319);
-                            // Rule at src/isa/riscv64/lower.isle line 274.
-                            return Some(v320);
-                        }
-                        if v3 == I128 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v138 = C::put_in_regs(ctx, v38.0);
-                            let v316 = C::put_in_regs(ctx, v38.1);
-                            let v317 = constructor_i128_sub(ctx, v138, v316);
-                            let v318 = C::output(ctx, v317);
-                            // Rule at src/isa/riscv64/lower.isle line 270.
-                            return Some(v318);
-                        }
-                        let v310 = C::fits_in_32(ctx, v3);
-                        if let Some(v311) = v310 {
-                            let v312 = C::ty_int(ctx, v311);
-                            if let Some(v313) = v312 {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v41 = constructor_put_in_xreg(ctx, v38.0);
-                                let v42 = constructor_put_in_xreg(ctx, v38.1);
-                                let v314 = constructor_rv_subw(ctx, v41, v42);
-                                let v315 = constructor_output_xreg(ctx, v314);
-                                // Rule at src/isa/riscv64/lower.isle line 267.
-                                return Some(v315);
-                            }
-                        }
-                        let v34 = C::ty_int_ref_scalar_64_extract(ctx, v3);
-                        if let Some(v35) = v34 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v41 = constructor_put_in_xreg(ctx, v38.0);
-                            let v42 = constructor_put_in_xreg(ctx, v38.1);
-                            let v308 = constructor_rv_sub(ctx, v41, v42);
-                            let v309 = constructor_output_xreg(ctx, v308);
-                            // Rule at src/isa/riscv64/lower.isle line 264.
-                            return Some(v309);
-                        }
-                    }
-                }
-                &Opcode::Imul => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
-                        if let Some(v11) = v10 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v45 = C::def_inst(ctx, v38.1);
-                            if let Some(v46) = v45 {
-                                let v47 = &C::inst_data(ctx, v46);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v68,
-                                    arg: v69,
-                                } = v47
-                                {
-                                    if let &Opcode::Splat = v68 {
-                                        let v163 = constructor_put_in_vreg(ctx, v38.0);
-                                        let v169 = constructor_put_in_xreg(ctx, v69);
-                                        let v165 = &constructor_unmasked(ctx);
-                                        let v166 = C::vstate_from_type(ctx, v11);
-                                        let v398 =
-                                            constructor_rv_vmul_vx(ctx, v163, v169, v165, v166);
-                                        let v399 = constructor_output_vreg(ctx, v398);
-                                        // Rule at src/isa/riscv64/lower.isle line 426.
-                                        return Some(v399);
-                                    }
-                                }
-                            }
-                            let v57 = C::def_inst(ctx, v38.0);
-                            if let Some(v58) = v57 {
-                                let v59 = &C::inst_data(ctx, v58);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v76,
-                                    arg: v77,
-                                } = v59
-                                {
-                                    if let &Opcode::Splat = v76 {
-                                        let v196 = constructor_put_in_vreg(ctx, v38.1);
-                                        let v197 = constructor_put_in_xreg(ctx, v77);
-                                        let v165 = &constructor_unmasked(ctx);
-                                        let v166 = C::vstate_from_type(ctx, v11);
-                                        let v396 =
-                                            constructor_rv_vmul_vx(ctx, v196, v197, v165, v166);
-                                        let v397 = constructor_output_vreg(ctx, v396);
-                                        // Rule at src/isa/riscv64/lower.isle line 423.
-                                        return Some(v397);
-                                    }
-                                }
-                            }
-                            let v163 = constructor_put_in_vreg(ctx, v38.0);
-                            let v164 = constructor_put_in_vreg(ctx, v38.1);
-                            let v165 = &constructor_unmasked(ctx);
-                            let v166 = C::vstate_from_type(ctx, v11);
-                            let v394 = constructor_rv_vmul_vv(ctx, v163, v164, v165, v166);
-                            let v395 = constructor_output_vreg(ctx, v394);
-                            // Rule at src/isa/riscv64/lower.isle line 420.
-                            return Some(v395);
-                        }
-                        if v3 == I128 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v138 = C::put_in_regs(ctx, v38.0);
-                            let v140 = C::value_regs_get(ctx, v138, 0x0);
-                            let v141 = C::xreg_new(ctx, v140);
-                            let v377 = C::value_regs_get(ctx, v138, 0x1);
-                            let v378 = C::xreg_new(ctx, v377);
-                            let v379 = C::put_in_regs(ctx, v38.1);
-                            let v380 = C::value_regs_get(ctx, v379, 0x0);
-                            let v381 = C::xreg_new(ctx, v380);
-                            let v382 = C::value_regs_get(ctx, v379, 0x1);
-                            let v383 = C::xreg_new(ctx, v382);
-                            let v384 = constructor_rv_mulhu(ctx, v141, v381);
-                            let v385 = constructor_madd(ctx, v141, v383, v384);
-                            let v386 = constructor_madd(ctx, v378, v381, v385);
-                            let v387 = C::zero_reg(ctx);
-                            let v388 = C::xreg_new(ctx, v387);
-                            let v389 = constructor_madd(ctx, v141, v381, v388);
-                            let v390 = C::xreg_to_reg(ctx, v389);
-                            let v391 = C::xreg_to_reg(ctx, v386);
-                            let v392 = C::value_regs(ctx, v390, v391);
-                            let v393 = C::output(ctx, v392);
-                            // Rule at src/isa/riscv64/lower.isle line 394.
-                            return Some(v393);
-                        }
-                        let v310 = C::fits_in_32(ctx, v3);
-                        if let Some(v311) = v310 {
-                            let v312 = C::ty_int(ctx, v311);
-                            if let Some(v313) = v312 {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v41 = constructor_put_in_xreg(ctx, v38.0);
-                                let v42 = constructor_put_in_xreg(ctx, v38.1);
-                                let v375 = constructor_rv_mulw(ctx, v41, v42);
-                                let v376 = constructor_output_xreg(ctx, v375);
-                                // Rule at src/isa/riscv64/lower.isle line 390.
-                                return Some(v376);
-                            }
-                        }
-                        let v34 = C::ty_int_ref_scalar_64_extract(ctx, v3);
-                        if let Some(v35) = v34 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v41 = constructor_put_in_xreg(ctx, v38.0);
-                            let v42 = constructor_put_in_xreg(ctx, v38.1);
-                            let v373 = constructor_rv_mul(ctx, v41, v42);
-                            let v374 = constructor_output_xreg(ctx, v373);
-                            // Rule at src/isa/riscv64/lower.isle line 387.
-                            return Some(v374);
-                        }
-                    }
-                }
-                &Opcode::Umulhi => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
-                        if let Some(v11) = v10 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v45 = C::def_inst(ctx, v38.1);
-                            if let Some(v46) = v45 {
-                                let v47 = &C::inst_data(ctx, v46);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v68,
-                                    arg: v69,
-                                } = v47
-                                {
-                                    if let &Opcode::Splat = v68 {
-                                        let v163 = constructor_put_in_vreg(ctx, v38.0);
-                                        let v169 = constructor_put_in_xreg(ctx, v69);
-                                        let v165 = &constructor_unmasked(ctx);
-                                        let v166 = C::vstate_from_type(ctx, v11);
-                                        let v420 =
-                                            constructor_rv_vmulhu_vx(ctx, v163, v169, v165, v166);
-                                        let v421 = constructor_output_vreg(ctx, v420);
-                                        // Rule at src/isa/riscv64/lower.isle line 452.
-                                        return Some(v421);
-                                    }
-                                }
-                            }
-                            let v57 = C::def_inst(ctx, v38.0);
-                            if let Some(v58) = v57 {
-                                let v59 = &C::inst_data(ctx, v58);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v76,
-                                    arg: v77,
-                                } = v59
-                                {
-                                    if let &Opcode::Splat = v76 {
-                                        let v196 = constructor_put_in_vreg(ctx, v38.1);
-                                        let v197 = constructor_put_in_xreg(ctx, v77);
-                                        let v165 = &constructor_unmasked(ctx);
-                                        let v166 = C::vstate_from_type(ctx, v11);
-                                        let v418 =
-                                            constructor_rv_vmulhu_vx(ctx, v196, v197, v165, v166);
-                                        let v419 = constructor_output_vreg(ctx, v418);
-                                        // Rule at src/isa/riscv64/lower.isle line 449.
-                                        return Some(v419);
-                                    }
-                                }
-                            }
-                            let v163 = constructor_put_in_vreg(ctx, v38.0);
-                            let v164 = constructor_put_in_vreg(ctx, v38.1);
-                            let v165 = &constructor_unmasked(ctx);
-                            let v166 = C::vstate_from_type(ctx, v11);
-                            let v416 = constructor_rv_vmulhu_vv(ctx, v163, v164, v165, v166);
-                            let v417 = constructor_output_vreg(ctx, v416);
-                            // Rule at src/isa/riscv64/lower.isle line 446.
-                            return Some(v417);
-                        }
-                        let v34 = C::ty_int_ref_scalar_64_extract(ctx, v3);
-                        if let Some(v35) = v34 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v41 = constructor_put_in_xreg(ctx, v38.0);
-                            let v412 = constructor_zext(ctx, v41, v35, I64);
-                            let v402 = constructor_put_in_xreg(ctx, v38.1);
-                            let v413 = constructor_zext(ctx, v402, v35, I64);
-                            let v414 = constructor_lower_umlhi(ctx, v35, v412, v413);
-                            let v415 = constructor_output_xreg(ctx, v414);
-                            // Rule at src/isa/riscv64/lower.isle line 443.
-                            return Some(v415);
-                        }
-                    }
-                }
-                &Opcode::Smulhi => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
-                        if let Some(v11) = v10 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v45 = C::def_inst(ctx, v38.1);
-                            if let Some(v46) = v45 {
-                                let v47 = &C::inst_data(ctx, v46);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v68,
-                                    arg: v69,
-                                } = v47
-                                {
-                                    if let &Opcode::Splat = v68 {
-                                        let v163 = constructor_put_in_vreg(ctx, v38.0);
-                                        let v169 = constructor_put_in_xreg(ctx, v69);
-                                        let v165 = &constructor_unmasked(ctx);
-                                        let v166 = C::vstate_from_type(ctx, v11);
-                                        let v410 =
-                                            constructor_rv_vmulh_vx(ctx, v163, v169, v165, v166);
-                                        let v411 = constructor_output_vreg(ctx, v410);
-                                        // Rule at src/isa/riscv64/lower.isle line 439.
-                                        return Some(v411);
-                                    }
-                                }
-                            }
-                            let v57 = C::def_inst(ctx, v38.0);
-                            if let Some(v58) = v57 {
-                                let v59 = &C::inst_data(ctx, v58);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v76,
-                                    arg: v77,
-                                } = v59
-                                {
-                                    if let &Opcode::Splat = v76 {
-                                        let v196 = constructor_put_in_vreg(ctx, v38.1);
-                                        let v197 = constructor_put_in_xreg(ctx, v77);
-                                        let v165 = &constructor_unmasked(ctx);
-                                        let v166 = C::vstate_from_type(ctx, v11);
-                                        let v408 =
-                                            constructor_rv_vmulh_vx(ctx, v196, v197, v165, v166);
-                                        let v409 = constructor_output_vreg(ctx, v408);
-                                        // Rule at src/isa/riscv64/lower.isle line 436.
-                                        return Some(v409);
-                                    }
-                                }
-                            }
-                            let v163 = constructor_put_in_vreg(ctx, v38.0);
-                            let v164 = constructor_put_in_vreg(ctx, v38.1);
-                            let v165 = &constructor_unmasked(ctx);
-                            let v166 = C::vstate_from_type(ctx, v11);
-                            let v406 = constructor_rv_vmulh_vv(ctx, v163, v164, v165, v166);
-                            let v407 = constructor_output_vreg(ctx, v406);
-                            // Rule at src/isa/riscv64/lower.isle line 433.
-                            return Some(v407);
-                        }
-                        let v34 = C::ty_int_ref_scalar_64_extract(ctx, v3);
-                        if let Some(v35) = v34 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v41 = constructor_put_in_xreg(ctx, v38.0);
-                            let v401 = constructor_sext(ctx, v41, v35, I64);
-                            let v402 = constructor_put_in_xreg(ctx, v38.1);
-                            let v403 = constructor_sext(ctx, v402, v35, I64);
-                            let v404 = constructor_lower_smlhi(ctx, v35, v401, v403);
-                            let v405 = constructor_output_xreg(ctx, v404);
-                            // Rule at src/isa/riscv64/lower.isle line 430.
-                            return Some(v405);
-                        }
-                    }
-                }
-                &Opcode::SqmulRoundSat => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
-                        if let Some(v11) = v10 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v57 = C::def_inst(ctx, v38.0);
-                            if let Some(v58) = v57 {
-                                let v59 = &C::inst_data(ctx, v58);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v76,
-                                    arg: v77,
-                                } = v59
-                                {
-                                    if let &Opcode::Splat = v76 {
-                                        let v196 = constructor_put_in_vreg(ctx, v38.1);
-                                        let v197 = constructor_put_in_xreg(ctx, v77);
-                                        let v165 = &constructor_unmasked(ctx);
-                                        let v166 = C::vstate_from_type(ctx, v11);
-                                        let v1695 =
-                                            constructor_rv_vsmul_vx(ctx, v196, v197, v165, v166);
-                                        let v1696 = constructor_output_vreg(ctx, v1695);
-                                        // Rule at src/isa/riscv64/lower.isle line 1968.
-                                        return Some(v1696);
-                                    }
-                                }
-                            }
-                            let v45 = C::def_inst(ctx, v38.1);
-                            if let Some(v46) = v45 {
-                                let v47 = &C::inst_data(ctx, v46);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v68,
-                                    arg: v69,
-                                } = v47
-                                {
-                                    if let &Opcode::Splat = v68 {
-                                        let v163 = constructor_put_in_vreg(ctx, v38.0);
-                                        let v169 = constructor_put_in_xreg(ctx, v69);
-                                        let v165 = &constructor_unmasked(ctx);
-                                        let v166 = C::vstate_from_type(ctx, v11);
-                                        let v1693 =
-                                            constructor_rv_vsmul_vx(ctx, v163, v169, v165, v166);
-                                        let v1694 = constructor_output_vreg(ctx, v1693);
-                                        // Rule at src/isa/riscv64/lower.isle line 1965.
-                                        return Some(v1694);
-                                    }
-                                }
-                            }
-                            let v163 = constructor_put_in_vreg(ctx, v38.0);
-                            let v164 = constructor_put_in_vreg(ctx, v38.1);
-                            let v165 = &constructor_unmasked(ctx);
-                            let v166 = C::vstate_from_type(ctx, v11);
-                            let v1691 = constructor_rv_vsmul_vv(ctx, v163, v164, v165, v166);
-                            let v1692 = constructor_output_vreg(ctx, v1691);
-                            // Rule at src/isa/riscv64/lower.isle line 1962.
-                            return Some(v1692);
-                        }
-                    }
-                }
-                &Opcode::Udiv => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        if v3 == I64 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v422 = constructor_put_in_xreg(ctx, v38.1);
-                            let v442 = constructor_gen_div_by_zero(ctx, v422);
-                            let v443 = constructor_put_in_xreg(ctx, v38.0);
-                            let v436 = constructor_put_in_xreg(ctx, v38.1);
-                            let v444 = constructor_rv_divu(ctx, v443, v436);
-                            let v445 = constructor_output_xreg(ctx, v444);
-                            // Rule at src/isa/riscv64/lower.isle line 477.
-                            return Some(v445);
-                        }
-                        let v310 = C::fits_in_32(ctx, v3);
-                        if let Some(v311) = v310 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v422 = constructor_put_in_xreg(ctx, v38.1);
-                            let v423 = constructor_zext(ctx, v422, v311, I64);
-                            let v424 = constructor_gen_div_by_zero(ctx, v423);
-                            let v425 = constructor_put_in_xreg(ctx, v38.0);
-                            let v426 = constructor_zext(ctx, v425, v311, I64);
-                            let v427 = constructor_rv_divuw(ctx, v426, v423);
-                            let v428 = constructor_output_xreg(ctx, v427);
-                            // Rule at src/isa/riscv64/lower.isle line 457.
-                            return Some(v428);
-                        }
-                    }
-                }
-                &Opcode::Sdiv => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        if v3 == I64 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v41 = constructor_put_in_xreg(ctx, v38.0);
-                            let v42 = constructor_put_in_xreg(ctx, v38.1);
-                            let v435 = constructor_gen_div_overflow(ctx, v41, v42, I64);
-                            let v436 = constructor_put_in_xreg(ctx, v38.1);
-                            let v437 = constructor_gen_div_by_zero(ctx, v436);
-                            let v438 = constructor_put_in_xreg(ctx, v38.0);
-                            let v439 = constructor_put_in_xreg(ctx, v38.1);
-                            let v440 = constructor_rv_div(ctx, v438, v439);
-                            let v441 = constructor_output_xreg(ctx, v440);
-                            // Rule at src/isa/riscv64/lower.isle line 471.
-                            return Some(v441);
-                        }
-                        let v310 = C::fits_in_32(ctx, v3);
-                        if let Some(v311) = v310 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v41 = constructor_put_in_xreg(ctx, v38.0);
-                            let v429 = constructor_sext(ctx, v41, v311, I64);
-                            let v402 = constructor_put_in_xreg(ctx, v38.1);
-                            let v430 = constructor_sext(ctx, v402, v311, I64);
-                            let v431 = constructor_gen_div_overflow(ctx, v429, v430, v311);
-                            let v432 = constructor_gen_div_by_zero(ctx, v430);
-                            let v433 = constructor_rv_divw(ctx, v429, v430);
-                            let v434 = constructor_output_xreg(ctx, v433);
-                            // Rule at src/isa/riscv64/lower.isle line 463.
-                            return Some(v434);
-                        }
-                    }
-                }
-                &Opcode::Urem => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            I32 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v422 = constructor_put_in_xreg(ctx, v38.1);
-                                let v463 = constructor_zext(ctx, v422, I32, I64);
-                                let v464 = constructor_gen_div_by_zero(ctx, v463);
-                                let v425 = constructor_put_in_xreg(ctx, v38.0);
-                                let v465 = constructor_rv_remuw(ctx, v425, v463);
-                                let v466 = constructor_output_xreg(ctx, v465);
-                                // Rule at src/isa/riscv64/lower.isle line 502.
-                                return Some(v466);
-                            }
-                            I64 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v422 = constructor_put_in_xreg(ctx, v38.1);
-                                let v442 = constructor_gen_div_by_zero(ctx, v422);
-                                let v443 = constructor_put_in_xreg(ctx, v38.0);
-                                let v436 = constructor_put_in_xreg(ctx, v38.1);
-                                let v469 = constructor_rv_remu(ctx, v443, v436);
-                                let v470 = constructor_output_xreg(ctx, v469);
-                                // Rule at src/isa/riscv64/lower.isle line 513.
-                                return Some(v470);
-                            }
-                            _ => {}
-                        }
-                        let v446 = C::fits_in_16(ctx, v3);
-                        if let Some(v447) = v446 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v422 = constructor_put_in_xreg(ctx, v38.1);
-                            let v448 = constructor_zext(ctx, v422, v447, I64);
-                            let v449 = constructor_gen_div_by_zero(ctx, v448);
-                            let v425 = constructor_put_in_xreg(ctx, v38.0);
-                            let v450 = constructor_zext(ctx, v425, v447, I64);
-                            let v451 = constructor_rv_remuw(ctx, v450, v448);
-                            let v452 = constructor_output_xreg(ctx, v451);
-                            // Rule at src/isa/riscv64/lower.isle line 484.
-                            return Some(v452);
-                        }
-                    }
-                }
-                &Opcode::Srem => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            I32 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v422 = constructor_put_in_xreg(ctx, v38.1);
-                                let v459 = constructor_sext(ctx, v422, I32, I64);
-                                let v460 = constructor_gen_div_by_zero(ctx, v459);
-                                let v425 = constructor_put_in_xreg(ctx, v38.0);
-                                let v461 = constructor_rv_remw(ctx, v425, v459);
-                                let v462 = constructor_output_xreg(ctx, v461);
-                                // Rule at src/isa/riscv64/lower.isle line 496.
-                                return Some(v462);
-                            }
-                            I64 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v422 = constructor_put_in_xreg(ctx, v38.1);
-                                let v442 = constructor_gen_div_by_zero(ctx, v422);
-                                let v443 = constructor_put_in_xreg(ctx, v38.0);
-                                let v436 = constructor_put_in_xreg(ctx, v38.1);
-                                let v467 = constructor_rv_rem(ctx, v443, v436);
-                                let v468 = constructor_output_xreg(ctx, v467);
-                                // Rule at src/isa/riscv64/lower.isle line 508.
-                                return Some(v468);
-                            }
-                            _ => {}
-                        }
-                        let v446 = C::fits_in_16(ctx, v3);
-                        if let Some(v447) = v446 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v422 = constructor_put_in_xreg(ctx, v38.1);
-                            let v453 = constructor_sext(ctx, v422, v447, I64);
-                            let v454 = constructor_gen_div_by_zero(ctx, v453);
-                            let v425 = constructor_put_in_xreg(ctx, v38.0);
-                            let v455 = constructor_sext(ctx, v425, v447, I64);
-                            let v456 = constructor_rv_remw(ctx, v455, v453);
-                            let v457 = constructor_output_xreg(ctx, v456);
-                            // Rule at src/isa/riscv64/lower.isle line 490.
-                            return Some(v457);
-                        }
-                    }
-                }
-                &Opcode::Band => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
-                        if let Some(v11) = v10 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v57 = C::def_inst(ctx, v38.0);
-                            if let Some(v58) = v57 {
-                                let v59 = &C::inst_data(ctx, v58);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v76,
-                                    arg: v77,
-                                } = v59
-                                {
-                                    if let &Opcode::Splat = v76 {
-                                        let v200 = C::def_inst(ctx, v77);
-                                        if let Some(v201) = v200 {
-                                            let v202 = &C::inst_data(ctx, v201);
-                                            if let &InstructionData::UnaryImm {
-                                                opcode: ref v212,
-                                                imm: v213,
-                                            } = v202
-                                            {
-                                                if let &Opcode::Iconst = v212 {
-                                                    let v214 = C::u64_from_imm64(ctx, v213);
-                                                    let v215 = C::imm5_from_u64(ctx, v214);
-                                                    if let Some(v216) = v215 {
-                                                        let v196 =
-                                                            constructor_put_in_vreg(ctx, v38.1);
-                                                        let v165 = &constructor_unmasked(ctx);
-                                                        let v166 = C::vstate_from_type(ctx, v11);
-                                                        let v533 = constructor_rv_vand_vi(
-                                                            ctx, v196, v216, v165, v166,
-                                                        );
-                                                        let v534 =
-                                                            constructor_output_vreg(ctx, v533);
-                                                        // Rule at src/isa/riscv64/lower.isle line 570.
-                                                        return Some(v534);
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                            }
-                            let v45 = C::def_inst(ctx, v38.1);
-                            if let Some(v46) = v45 {
-                                let v47 = &C::inst_data(ctx, v46);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v68,
-                                    arg: v69,
-                                } = v47
-                                {
-                                    if let &Opcode::Splat = v68 {
-                                        let v172 = C::def_inst(ctx, v69);
-                                        if let Some(v173) = v172 {
-                                            let v174 = &C::inst_data(ctx, v173);
-                                            if let &InstructionData::UnaryImm {
-                                                opcode: ref v189,
-                                                imm: v190,
-                                            } = v174
-                                            {
-                                                if let &Opcode::Iconst = v189 {
-                                                    let v191 = C::u64_from_imm64(ctx, v190);
-                                                    let v192 = C::imm5_from_u64(ctx, v191);
-                                                    if let Some(v193) = v192 {
-                                                        let v163 =
-                                                            constructor_put_in_vreg(ctx, v38.0);
-                                                        let v165 = &constructor_unmasked(ctx);
-                                                        let v166 = C::vstate_from_type(ctx, v11);
-                                                        let v531 = constructor_rv_vand_vi(
-                                                            ctx, v163, v193, v165, v166,
-                                                        );
-                                                        let v532 =
-                                                            constructor_output_vreg(ctx, v531);
-                                                        // Rule at src/isa/riscv64/lower.isle line 567.
-                                                        return Some(v532);
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                            }
-                            let v525 = C::ty_vector_not_float(ctx, v11);
-                            if let Some(v526) = v525 {
-                                if let Some(v58) = v57 {
-                                    let v59 = &C::inst_data(ctx, v58);
-                                    if let &InstructionData::Unary {
-                                        opcode: ref v76,
-                                        arg: v77,
-                                    } = v59
-                                    {
-                                        if let &Opcode::Splat = v76 {
-                                            let v196 = constructor_put_in_vreg(ctx, v38.1);
-                                            let v197 = constructor_put_in_xreg(ctx, v77);
-                                            let v165 = &constructor_unmasked(ctx);
-                                            let v166 = C::vstate_from_type(ctx, v11);
-                                            let v529 =
-                                                constructor_rv_vand_vx(ctx, v196, v197, v165, v166);
-                                            let v530 = constructor_output_vreg(ctx, v529);
-                                            // Rule at src/isa/riscv64/lower.isle line 563.
-                                            return Some(v530);
-                                        }
-                                    }
-                                }
-                                if let Some(v46) = v45 {
-                                    let v47 = &C::inst_data(ctx, v46);
-                                    if let &InstructionData::Unary {
-                                        opcode: ref v68,
-                                        arg: v69,
-                                    } = v47
-                                    {
-                                        if let &Opcode::Splat = v68 {
-                                            let v163 = constructor_put_in_vreg(ctx, v38.0);
-                                            let v169 = constructor_put_in_xreg(ctx, v69);
-                                            let v165 = &constructor_unmasked(ctx);
-                                            let v166 = C::vstate_from_type(ctx, v11);
-                                            let v527 =
-                                                constructor_rv_vand_vx(ctx, v163, v169, v165, v166);
-                                            let v528 = constructor_output_vreg(ctx, v527);
-                                            // Rule at src/isa/riscv64/lower.isle line 559.
-                                            return Some(v528);
-                                        }
-                                    }
-                                }
-                            }
-                            let v163 = constructor_put_in_vreg(ctx, v38.0);
-                            let v164 = constructor_put_in_vreg(ctx, v38.1);
-                            let v165 = &constructor_unmasked(ctx);
-                            let v166 = C::vstate_from_type(ctx, v11);
-                            let v523 = constructor_rv_vand_vv(ctx, v163, v164, v165, v166);
-                            let v524 = constructor_output_vreg(ctx, v523);
-                            // Rule at src/isa/riscv64/lower.isle line 556.
-                            return Some(v524);
-                        }
-                        let v486 = C::has_zbb(ctx);
-                        if v486 == true {
-                            if v3 == I128 {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v57 = C::def_inst(ctx, v38.0);
-                                if let Some(v58) = v57 {
-                                    let v59 = &C::inst_data(ctx, v58);
-                                    if let &InstructionData::Unary {
-                                        opcode: ref v76,
-                                        arg: v77,
-                                    } = v59
-                                    {
-                                        if let &Opcode::Bnot = v76 {
-                                            let v506 = C::put_in_regs(ctx, v38.1);
-                                            let v507 = C::value_regs_get(ctx, v506, 0x0);
-                                            let v508 = C::xreg_new(ctx, v507);
-                                            let v509 = C::put_in_regs(ctx, v77);
-                                            let v510 = C::value_regs_get(ctx, v509, 0x0);
-                                            let v511 = C::xreg_new(ctx, v510);
-                                            let v512 = constructor_rv_andn(ctx, v508, v511);
-                                            let v146 = C::put_in_regs(ctx, v38.1);
-                                            let v513 = C::value_regs_get(ctx, v146, 0x1);
-                                            let v514 = C::xreg_new(ctx, v513);
-                                            let v515 = C::put_in_regs(ctx, v77);
-                                            let v516 = C::value_regs_get(ctx, v515, 0x1);
-                                            let v517 = C::xreg_new(ctx, v516);
-                                            let v518 = constructor_rv_andn(ctx, v514, v517);
-                                            let v519 = C::xreg_to_reg(ctx, v512);
-                                            let v520 = C::xreg_to_reg(ctx, v518);
-                                            let v521 = C::value_regs(ctx, v519, v520);
-                                            let v522 = C::output(ctx, v521);
-                                            // Rule at src/isa/riscv64/lower.isle line 550.
-                                            return Some(v522);
-                                        }
-                                    }
-                                }
-                                let v45 = C::def_inst(ctx, v38.1);
-                                if let Some(v46) = v45 {
-                                    let v47 = &C::inst_data(ctx, v46);
-                                    if let &InstructionData::Unary {
-                                        opcode: ref v68,
-                                        arg: v69,
-                                    } = v47
-                                    {
-                                        if let &Opcode::Bnot = v68 {
-                                            let v138 = C::put_in_regs(ctx, v38.0);
-                                            let v140 = C::value_regs_get(ctx, v138, 0x0);
-                                            let v141 = C::xreg_new(ctx, v140);
-                                            let v491 = C::put_in_regs(ctx, v69);
-                                            let v492 = C::value_regs_get(ctx, v491, 0x0);
-                                            let v493 = C::xreg_new(ctx, v492);
-                                            let v494 = constructor_rv_andn(ctx, v141, v493);
-                                            let v495 = C::put_in_regs(ctx, v38.0);
-                                            let v496 = C::value_regs_get(ctx, v495, 0x1);
-                                            let v497 = C::xreg_new(ctx, v496);
-                                            let v498 = C::put_in_regs(ctx, v69);
-                                            let v499 = C::value_regs_get(ctx, v498, 0x1);
-                                            let v500 = C::xreg_new(ctx, v499);
-                                            let v501 = constructor_rv_andn(ctx, v497, v500);
-                                            let v502 = C::xreg_to_reg(ctx, v494);
-                                            let v503 = C::xreg_to_reg(ctx, v501);
-                                            let v504 = C::value_regs(ctx, v502, v503);
-                                            let v505 = C::output(ctx, v504);
-                                            // Rule at src/isa/riscv64/lower.isle line 544.
-                                            return Some(v505);
-                                        }
-                                    }
-                                }
-                            }
-                            let v292 = C::fits_in_64(ctx, v3);
-                            if let Some(v293) = v292 {
-                                let v473 = C::ty_int(ctx, v293);
-                                if let Some(v474) = v473 {
-                                    let v38 = C::unpack_value_array_2(ctx, v37);
-                                    let v57 = C::def_inst(ctx, v38.0);
-                                    if let Some(v58) = v57 {
-                                        let v59 = &C::inst_data(ctx, v58);
-                                        if let &InstructionData::Unary {
-                                            opcode: ref v76,
-                                            arg: v77,
-                                        } = v59
-                                        {
-                                            if let &Opcode::Bnot = v76 {
-                                                let v422 = constructor_put_in_xreg(ctx, v38.1);
-                                                let v197 = constructor_put_in_xreg(ctx, v77);
-                                                let v489 = constructor_rv_andn(ctx, v422, v197);
-                                                let v490 = constructor_output_xreg(ctx, v489);
-                                                // Rule at src/isa/riscv64/lower.isle line 540.
-                                                return Some(v490);
-                                            }
-                                        }
-                                    }
-                                    let v45 = C::def_inst(ctx, v38.1);
-                                    if let Some(v46) = v45 {
-                                        let v47 = &C::inst_data(ctx, v46);
-                                        if let &InstructionData::Unary {
-                                            opcode: ref v68,
-                                            arg: v69,
-                                        } = v47
-                                        {
-                                            if let &Opcode::Bnot = v68 {
-                                                let v41 = constructor_put_in_xreg(ctx, v38.0);
-                                                let v169 = constructor_put_in_xreg(ctx, v69);
-                                                let v487 = constructor_rv_andn(ctx, v41, v169);
-                                                let v488 = constructor_output_xreg(ctx, v487);
-                                                // Rule at src/isa/riscv64/lower.isle line 536.
-                                                return Some(v488);
-                                            }
-                                        }
-                                    }
-                                }
-                            }
-                        }
-                        let v479 = C::ty_scalar_float(ctx, v3);
-                        if let Some(v480) = v479 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v482 = constructor_put_in_freg(ctx, v38.0);
-                            let v483 = constructor_put_in_freg(ctx, v38.1);
-                            let v484 = constructor_lower_float_binary(
-                                ctx,
-                                &AluOPRRR::And,
-                                v482,
-                                v483,
-                                v480,
-                            );
-                            let v485 = constructor_output_freg(ctx, v484);
-                            // Rule at src/isa/riscv64/lower.isle line 529.
-                            return Some(v485);
-                        }
-                        let v292 = C::fits_in_64(ctx, v3);
-                        if let Some(v293) = v292 {
-                            let v473 = C::ty_int(ctx, v293);
-                            if let Some(v474) = v473 {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v57 = C::def_inst(ctx, v38.0);
-                                if let Some(v58) = v57 {
-                                    let v59 = &C::inst_data(ctx, v58);
-                                    if let &InstructionData::UnaryImm {
-                                        opcode: ref v60,
-                                        imm: v61,
-                                    } = v59
-                                    {
-                                        if let &Opcode::Iconst = v60 {
-                                            let v62 = C::u64_from_imm64(ctx, v61);
-                                            let v63 = C::imm12_from_u64(ctx, v62);
-                                            if let Some(v64) = v63 {
-                                                let v422 = constructor_put_in_xreg(ctx, v38.1);
-                                                let v477 = constructor_rv_andi(ctx, v422, v64);
-                                                let v478 = constructor_output_xreg(ctx, v477);
-                                                // Rule at src/isa/riscv64/lower.isle line 526.
-                                                return Some(v478);
-                                            }
-                                        }
-                                    }
-                                }
-                                let v45 = C::def_inst(ctx, v38.1);
-                                if let Some(v46) = v45 {
-                                    let v47 = &C::inst_data(ctx, v46);
-                                    if let &InstructionData::UnaryImm {
-                                        opcode: ref v48,
-                                        imm: v49,
-                                    } = v47
-                                    {
-                                        if let &Opcode::Iconst = v48 {
-                                            let v50 = C::u64_from_imm64(ctx, v49);
-                                            let v51 = C::imm12_from_u64(ctx, v50);
-                                            if let Some(v52) = v51 {
-                                                let v41 = constructor_put_in_xreg(ctx, v38.0);
-                                                let v475 = constructor_rv_andi(ctx, v41, v52);
-                                                let v476 = constructor_output_xreg(ctx, v475);
-                                                // Rule at src/isa/riscv64/lower.isle line 523.
-                                                return Some(v476);
-                                            }
-                                        }
-                                    }
-                                }
-                            }
-                        }
-                        let v363 = C::ty_int(ctx, v3);
-                        if let Some(v364) = v363 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v138 = C::put_in_regs(ctx, v38.0);
-                            let v316 = C::put_in_regs(ctx, v38.1);
-                            let v471 = constructor_gen_and(ctx, v364, v138, v316);
-                            let v472 = C::output(ctx, v471);
-                            // Rule at src/isa/riscv64/lower.isle line 519.
-                            return Some(v472);
-                        }
-                    }
-                }
-                &Opcode::Bor => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
-                        if let Some(v11) = v10 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v57 = C::def_inst(ctx, v38.0);
-                            if let Some(v58) = v57 {
-                                let v59 = &C::inst_data(ctx, v58);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v76,
-                                    arg: v77,
-                                } = v59
-                                {
-                                    if let &Opcode::Splat = v76 {
-                                        let v200 = C::def_inst(ctx, v77);
-                                        if let Some(v201) = v200 {
-                                            let v202 = &C::inst_data(ctx, v201);
-                                            if let &InstructionData::UnaryImm {
-                                                opcode: ref v212,
-                                                imm: v213,
-                                            } = v202
-                                            {
-                                                if let &Opcode::Iconst = v212 {
-                                                    let v214 = C::u64_from_imm64(ctx, v213);
-                                                    let v215 = C::imm5_from_u64(ctx, v214);
-                                                    if let Some(v216) = v215 {
-                                                        let v196 =
-                                                            constructor_put_in_vreg(ctx, v38.1);
-                                                        let v165 = &constructor_unmasked(ctx);
-                                                        let v166 = C::vstate_from_type(ctx, v11);
-                                                        let v568 = constructor_rv_vor_vi(
-                                                            ctx, v196, v216, v165, v166,
-                                                        );
-                                                        let v569 =
-                                                            constructor_output_vreg(ctx, v568);
-                                                        // Rule at src/isa/riscv64/lower.isle line 626.
-                                                        return Some(v569);
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                            }
-                            let v45 = C::def_inst(ctx, v38.1);
-                            if let Some(v46) = v45 {
-                                let v47 = &C::inst_data(ctx, v46);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v68,
-                                    arg: v69,
-                                } = v47
-                                {
-                                    if let &Opcode::Splat = v68 {
-                                        let v172 = C::def_inst(ctx, v69);
-                                        if let Some(v173) = v172 {
-                                            let v174 = &C::inst_data(ctx, v173);
-                                            if let &InstructionData::UnaryImm {
-                                                opcode: ref v189,
-                                                imm: v190,
-                                            } = v174
-                                            {
-                                                if let &Opcode::Iconst = v189 {
-                                                    let v191 = C::u64_from_imm64(ctx, v190);
-                                                    let v192 = C::imm5_from_u64(ctx, v191);
-                                                    if let Some(v193) = v192 {
-                                                        let v163 =
-                                                            constructor_put_in_vreg(ctx, v38.0);
-                                                        let v165 = &constructor_unmasked(ctx);
-                                                        let v166 = C::vstate_from_type(ctx, v11);
-                                                        let v566 = constructor_rv_vor_vi(
-                                                            ctx, v163, v193, v165, v166,
-                                                        );
-                                                        let v567 =
-                                                            constructor_output_vreg(ctx, v566);
-                                                        // Rule at src/isa/riscv64/lower.isle line 623.
-                                                        return Some(v567);
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                            }
-                            let v525 = C::ty_vector_not_float(ctx, v11);
-                            if let Some(v526) = v525 {
-                                if let Some(v58) = v57 {
-                                    let v59 = &C::inst_data(ctx, v58);
-                                    if let &InstructionData::Unary {
-                                        opcode: ref v76,
-                                        arg: v77,
-                                    } = v59
-                                    {
-                                        if let &Opcode::Splat = v76 {
-                                            let v196 = constructor_put_in_vreg(ctx, v38.1);
-                                            let v197 = constructor_put_in_xreg(ctx, v77);
-                                            let v165 = &constructor_unmasked(ctx);
-                                            let v166 = C::vstate_from_type(ctx, v11);
-                                            let v564 =
-                                                constructor_rv_vor_vx(ctx, v196, v197, v165, v166);
-                                            let v565 = constructor_output_vreg(ctx, v564);
-                                            // Rule at src/isa/riscv64/lower.isle line 619.
-                                            return Some(v565);
-                                        }
-                                    }
-                                }
-                                if let Some(v46) = v45 {
-                                    let v47 = &C::inst_data(ctx, v46);
-                                    if let &InstructionData::Unary {
-                                        opcode: ref v68,
-                                        arg: v69,
-                                    } = v47
-                                    {
-                                        if let &Opcode::Splat = v68 {
-                                            let v163 = constructor_put_in_vreg(ctx, v38.0);
-                                            let v169 = constructor_put_in_xreg(ctx, v69);
-                                            let v165 = &constructor_unmasked(ctx);
-                                            let v166 = C::vstate_from_type(ctx, v11);
-                                            let v562 =
-                                                constructor_rv_vor_vx(ctx, v163, v169, v165, v166);
-                                            let v563 = constructor_output_vreg(ctx, v562);
-                                            // Rule at src/isa/riscv64/lower.isle line 615.
-                                            return Some(v563);
-                                        }
-                                    }
-                                }
-                            }
-                            let v163 = constructor_put_in_vreg(ctx, v38.0);
-                            let v164 = constructor_put_in_vreg(ctx, v38.1);
-                            let v165 = &constructor_unmasked(ctx);
-                            let v166 = C::vstate_from_type(ctx, v11);
-                            let v560 = constructor_rv_vor_vv(ctx, v163, v164, v165, v166);
-                            let v561 = constructor_output_vreg(ctx, v560);
-                            // Rule at src/isa/riscv64/lower.isle line 612.
-                            return Some(v561);
-                        }
-                        let v486 = C::has_zbb(ctx);
-                        if v486 == true {
-                            if v3 == I128 {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v57 = C::def_inst(ctx, v38.0);
-                                if let Some(v58) = v57 {
-                                    let v59 = &C::inst_data(ctx, v58);
-                                    if let &InstructionData::Unary {
-                                        opcode: ref v76,
-                                        arg: v77,
-                                    } = v59
-                                    {
-                                        if let &Opcode::Bnot = v76 {
-                                            let v506 = C::put_in_regs(ctx, v38.1);
-                                            let v507 = C::value_regs_get(ctx, v506, 0x0);
-                                            let v508 = C::xreg_new(ctx, v507);
-                                            let v509 = C::put_in_regs(ctx, v77);
-                                            let v510 = C::value_regs_get(ctx, v509, 0x0);
-                                            let v511 = C::xreg_new(ctx, v510);
-                                            let v554 = constructor_rv_orn(ctx, v508, v511);
-                                            let v146 = C::put_in_regs(ctx, v38.1);
-                                            let v513 = C::value_regs_get(ctx, v146, 0x1);
-                                            let v514 = C::xreg_new(ctx, v513);
-                                            let v515 = C::put_in_regs(ctx, v77);
-                                            let v516 = C::value_regs_get(ctx, v515, 0x1);
-                                            let v517 = C::xreg_new(ctx, v516);
-                                            let v555 = constructor_rv_orn(ctx, v514, v517);
-                                            let v556 = C::xreg_to_reg(ctx, v554);
-                                            let v557 = C::xreg_to_reg(ctx, v555);
-                                            let v558 = C::value_regs(ctx, v556, v557);
-                                            let v559 = C::output(ctx, v558);
-                                            // Rule at src/isa/riscv64/lower.isle line 606.
-                                            return Some(v559);
-                                        }
-                                    }
-                                }
-                                let v45 = C::def_inst(ctx, v38.1);
-                                if let Some(v46) = v45 {
-                                    let v47 = &C::inst_data(ctx, v46);
-                                    if let &InstructionData::Unary {
-                                        opcode: ref v68,
-                                        arg: v69,
-                                    } = v47
-                                    {
-                                        if let &Opcode::Bnot = v68 {
-                                            let v138 = C::put_in_regs(ctx, v38.0);
-                                            let v140 = C::value_regs_get(ctx, v138, 0x0);
-                                            let v141 = C::xreg_new(ctx, v140);
-                                            let v491 = C::put_in_regs(ctx, v69);
-                                            let v492 = C::value_regs_get(ctx, v491, 0x0);
-                                            let v493 = C::xreg_new(ctx, v492);
-                                            let v548 = constructor_rv_orn(ctx, v141, v493);
-                                            let v495 = C::put_in_regs(ctx, v38.0);
-                                            let v496 = C::value_regs_get(ctx, v495, 0x1);
-                                            let v497 = C::xreg_new(ctx, v496);
-                                            let v498 = C::put_in_regs(ctx, v69);
-                                            let v499 = C::value_regs_get(ctx, v498, 0x1);
-                                            let v500 = C::xreg_new(ctx, v499);
-                                            let v549 = constructor_rv_orn(ctx, v497, v500);
-                                            let v550 = C::xreg_to_reg(ctx, v548);
-                                            let v551 = C::xreg_to_reg(ctx, v549);
-                                            let v552 = C::value_regs(ctx, v550, v551);
-                                            let v553 = C::output(ctx, v552);
-                                            // Rule at src/isa/riscv64/lower.isle line 600.
-                                            return Some(v553);
-                                        }
-                                    }
-                                }
-                            }
-                            let v292 = C::fits_in_64(ctx, v3);
-                            if let Some(v293) = v292 {
-                                let v473 = C::ty_int(ctx, v293);
-                                if let Some(v474) = v473 {
-                                    let v38 = C::unpack_value_array_2(ctx, v37);
-                                    let v57 = C::def_inst(ctx, v38.0);
-                                    if let Some(v58) = v57 {
-                                        let v59 = &C::inst_data(ctx, v58);
-                                        if let &InstructionData::Unary {
-                                            opcode: ref v76,
-                                            arg: v77,
-                                        } = v59
-                                        {
-                                            if let &Opcode::Bnot = v76 {
-                                                let v422 = constructor_put_in_xreg(ctx, v38.1);
-                                                let v197 = constructor_put_in_xreg(ctx, v77);
-                                                let v546 = constructor_rv_orn(ctx, v422, v197);
-                                                let v547 = constructor_output_xreg(ctx, v546);
-                                                // Rule at src/isa/riscv64/lower.isle line 596.
-                                                return Some(v547);
-                                            }
-                                        }
-                                    }
-                                    let v45 = C::def_inst(ctx, v38.1);
-                                    if let Some(v46) = v45 {
-                                        let v47 = &C::inst_data(ctx, v46);
-                                        if let &InstructionData::Unary {
-                                            opcode: ref v68,
-                                            arg: v69,
-                                        } = v47
-                                        {
-                                            if let &Opcode::Bnot = v68 {
-                                                let v41 = constructor_put_in_xreg(ctx, v38.0);
-                                                let v169 = constructor_put_in_xreg(ctx, v69);
-                                                let v544 = constructor_rv_orn(ctx, v41, v169);
-                                                let v545 = constructor_output_xreg(ctx, v544);
-                                                // Rule at src/isa/riscv64/lower.isle line 592.
-                                                return Some(v545);
-                                            }
-                                        }
-                                    }
-                                }
-                            }
-                        }
-                        let v479 = C::ty_scalar_float(ctx, v3);
-                        if let Some(v480) = v479 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v482 = constructor_put_in_freg(ctx, v38.0);
-                            let v483 = constructor_put_in_freg(ctx, v38.1);
-                            let v542 = constructor_lower_float_binary(
-                                ctx,
-                                &AluOPRRR::Or,
-                                v482,
-                                v483,
-                                v480,
-                            );
-                            let v543 = constructor_output_freg(ctx, v542);
-                            // Rule at src/isa/riscv64/lower.isle line 585.
-                            return Some(v543);
-                        }
-                        let v292 = C::fits_in_64(ctx, v3);
-                        if let Some(v293) = v292 {
-                            let v473 = C::ty_int(ctx, v293);
-                            if let Some(v474) = v473 {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v57 = C::def_inst(ctx, v38.0);
-                                if let Some(v58) = v57 {
-                                    let v59 = &C::inst_data(ctx, v58);
-                                    if let &InstructionData::UnaryImm {
-                                        opcode: ref v60,
-                                        imm: v61,
-                                    } = v59
-                                    {
-                                        if let &Opcode::Iconst = v60 {
-                                            let v62 = C::u64_from_imm64(ctx, v61);
-                                            let v63 = C::imm12_from_u64(ctx, v62);
-                                            if let Some(v64) = v63 {
-                                                let v422 = constructor_put_in_xreg(ctx, v38.1);
-                                                let v539 = constructor_rv_ori(ctx, v422, v64);
-                                                let v540 = constructor_output_xreg(ctx, v539);
-                                                // Rule at src/isa/riscv64/lower.isle line 582.
-                                                return Some(v540);
-                                            }
-                                        }
-                                    }
-                                }
-                                let v45 = C::def_inst(ctx, v38.1);
-                                if let Some(v46) = v45 {
-                                    let v47 = &C::inst_data(ctx, v46);
-                                    if let &InstructionData::UnaryImm {
-                                        opcode: ref v48,
-                                        imm: v49,
-                                    } = v47
-                                    {
-                                        if let &Opcode::Iconst = v48 {
-                                            let v50 = C::u64_from_imm64(ctx, v49);
-                                            let v51 = C::imm12_from_u64(ctx, v50);
-                                            if let Some(v52) = v51 {
-                                                let v41 = constructor_put_in_xreg(ctx, v38.0);
-                                                let v537 = constructor_rv_ori(ctx, v41, v52);
-                                                let v538 = constructor_output_xreg(ctx, v537);
-                                                // Rule at src/isa/riscv64/lower.isle line 579.
-                                                return Some(v538);
-                                            }
-                                        }
-                                    }
-                                }
-                            }
-                        }
-                        let v363 = C::ty_int(ctx, v3);
-                        if let Some(v364) = v363 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v138 = C::put_in_regs(ctx, v38.0);
-                            let v316 = C::put_in_regs(ctx, v38.1);
-                            let v535 = constructor_gen_or(ctx, v364, v138, v316);
-                            let v536 = C::output(ctx, v535);
-                            // Rule at src/isa/riscv64/lower.isle line 575.
-                            return Some(v536);
-                        }
-                    }
-                }
-                &Opcode::Bxor => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
-                        if let Some(v11) = v10 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v57 = C::def_inst(ctx, v38.0);
-                            if let Some(v58) = v57 {
-                                let v59 = &C::inst_data(ctx, v58);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v76,
-                                    arg: v77,
-                                } = v59
-                                {
-                                    if let &Opcode::Splat = v76 {
-                                        let v200 = C::def_inst(ctx, v77);
-                                        if let Some(v201) = v200 {
-                                            let v202 = &C::inst_data(ctx, v201);
-                                            if let &InstructionData::UnaryImm {
-                                                opcode: ref v212,
-                                                imm: v213,
-                                            } = v202
-                                            {
-                                                if let &Opcode::Iconst = v212 {
-                                                    let v214 = C::u64_from_imm64(ctx, v213);
-                                                    let v215 = C::imm5_from_u64(ctx, v214);
-                                                    if let Some(v216) = v215 {
-                                                        let v196 =
-                                                            constructor_put_in_vreg(ctx, v38.1);
-                                                        let v165 = &constructor_unmasked(ctx);
-                                                        let v166 = C::vstate_from_type(ctx, v11);
-                                                        let v589 = constructor_rv_vxor_vi(
-                                                            ctx, v196, v216, v165, v166,
-                                                        );
-                                                        let v590 =
-                                                            constructor_output_vreg(ctx, v589);
-                                                        // Rule at src/isa/riscv64/lower.isle line 661.
-                                                        return Some(v590);
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                            }
-                            let v45 = C::def_inst(ctx, v38.1);
-                            if let Some(v46) = v45 {
-                                let v47 = &C::inst_data(ctx, v46);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v68,
-                                    arg: v69,
-                                } = v47
-                                {
-                                    if let &Opcode::Splat = v68 {
-                                        let v172 = C::def_inst(ctx, v69);
-                                        if let Some(v173) = v172 {
-                                            let v174 = &C::inst_data(ctx, v173);
-                                            if let &InstructionData::UnaryImm {
-                                                opcode: ref v189,
-                                                imm: v190,
-                                            } = v174
-                                            {
-                                                if let &Opcode::Iconst = v189 {
-                                                    let v191 = C::u64_from_imm64(ctx, v190);
-                                                    let v192 = C::imm5_from_u64(ctx, v191);
-                                                    if let Some(v193) = v192 {
-                                                        let v163 =
-                                                            constructor_put_in_vreg(ctx, v38.0);
-                                                        let v165 = &constructor_unmasked(ctx);
-                                                        let v166 = C::vstate_from_type(ctx, v11);
-                                                        let v587 = constructor_rv_vxor_vi(
-                                                            ctx, v163, v193, v165, v166,
-                                                        );
-                                                        let v588 =
-                                                            constructor_output_vreg(ctx, v587);
-                                                        // Rule at src/isa/riscv64/lower.isle line 658.
-                                                        return Some(v588);
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                            }
-                            let v525 = C::ty_vector_not_float(ctx, v11);
-                            if let Some(v526) = v525 {
-                                if let Some(v58) = v57 {
-                                    let v59 = &C::inst_data(ctx, v58);
-                                    if let &InstructionData::Unary {
-                                        opcode: ref v76,
-                                        arg: v77,
-                                    } = v59
-                                    {
-                                        if let &Opcode::Splat = v76 {
-                                            let v196 = constructor_put_in_vreg(ctx, v38.1);
-                                            let v197 = constructor_put_in_xreg(ctx, v77);
-                                            let v165 = &constructor_unmasked(ctx);
-                                            let v166 = C::vstate_from_type(ctx, v11);
-                                            let v585 =
-                                                constructor_rv_vxor_vx(ctx, v196, v197, v165, v166);
-                                            let v586 = constructor_output_vreg(ctx, v585);
-                                            // Rule at src/isa/riscv64/lower.isle line 654.
-                                            return Some(v586);
-                                        }
-                                    }
-                                }
-                                if let Some(v46) = v45 {
-                                    let v47 = &C::inst_data(ctx, v46);
-                                    if let &InstructionData::Unary {
-                                        opcode: ref v68,
-                                        arg: v69,
-                                    } = v47
-                                    {
-                                        if let &Opcode::Splat = v68 {
-                                            let v163 = constructor_put_in_vreg(ctx, v38.0);
-                                            let v169 = constructor_put_in_xreg(ctx, v69);
-                                            let v165 = &constructor_unmasked(ctx);
-                                            let v166 = C::vstate_from_type(ctx, v11);
-                                            let v583 =
-                                                constructor_rv_vxor_vx(ctx, v163, v169, v165, v166);
-                                            let v584 = constructor_output_vreg(ctx, v583);
-                                            // Rule at src/isa/riscv64/lower.isle line 650.
-                                            return Some(v584);
-                                        }
-                                    }
-                                }
-                            }
-                            let v163 = constructor_put_in_vreg(ctx, v38.0);
-                            let v164 = constructor_put_in_vreg(ctx, v38.1);
-                            let v165 = &constructor_unmasked(ctx);
-                            let v166 = C::vstate_from_type(ctx, v11);
-                            let v581 = constructor_rv_vxor_vv(ctx, v163, v164, v165, v166);
-                            let v582 = constructor_output_vreg(ctx, v581);
-                            // Rule at src/isa/riscv64/lower.isle line 647.
-                            return Some(v582);
-                        }
-                        let v479 = C::ty_scalar_float(ctx, v3);
-                        if let Some(v480) = v479 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v482 = constructor_put_in_freg(ctx, v38.0);
-                            let v483 = constructor_put_in_freg(ctx, v38.1);
-                            let v579 = constructor_lower_float_binary(
-                                ctx,
-                                &AluOPRRR::Xor,
-                                v482,
-                                v483,
-                                v480,
-                            );
-                            let v580 = constructor_output_freg(ctx, v579);
-                            // Rule at src/isa/riscv64/lower.isle line 644.
-                            return Some(v580);
-                        }
-                        if v3 == I128 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v138 = C::put_in_regs(ctx, v38.0);
-                            let v316 = C::put_in_regs(ctx, v38.1);
-                            let v577 =
-                                constructor_lower_b128_binary(ctx, &AluOPRRR::Xor, v138, v316);
-                            let v578 = C::output(ctx, v577);
-                            // Rule at src/isa/riscv64/lower.isle line 641.
-                            return Some(v578);
-                        }
-                        let v292 = C::fits_in_64(ctx, v3);
-                        if let Some(v293) = v292 {
-                            let v473 = C::ty_int(ctx, v293);
-                            if let Some(v474) = v473 {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v57 = C::def_inst(ctx, v38.0);
-                                if let Some(v58) = v57 {
-                                    let v59 = &C::inst_data(ctx, v58);
-                                    if let &InstructionData::UnaryImm {
-                                        opcode: ref v60,
-                                        imm: v61,
-                                    } = v59
-                                    {
-                                        if let &Opcode::Iconst = v60 {
-                                            let v62 = C::u64_from_imm64(ctx, v61);
-                                            let v63 = C::imm12_from_u64(ctx, v62);
-                                            if let Some(v64) = v63 {
-                                                let v422 = constructor_put_in_xreg(ctx, v38.1);
-                                                let v574 = constructor_rv_xori(ctx, v422, v64);
-                                                let v575 = constructor_output_xreg(ctx, v574);
-                                                // Rule at src/isa/riscv64/lower.isle line 638.
-                                                return Some(v575);
-                                            }
-                                        }
-                                    }
-                                }
-                                let v45 = C::def_inst(ctx, v38.1);
-                                if let Some(v46) = v45 {
-                                    let v47 = &C::inst_data(ctx, v46);
-                                    if let &InstructionData::UnaryImm {
-                                        opcode: ref v48,
-                                        imm: v49,
-                                    } = v47
-                                    {
-                                        if let &Opcode::Iconst = v48 {
-                                            let v50 = C::u64_from_imm64(ctx, v49);
-                                            let v51 = C::imm12_from_u64(ctx, v50);
-                                            if let Some(v52) = v51 {
-                                                let v41 = constructor_put_in_xreg(ctx, v38.0);
-                                                let v572 = constructor_rv_xori(ctx, v41, v52);
-                                                let v573 = constructor_output_xreg(ctx, v572);
-                                                // Rule at src/isa/riscv64/lower.isle line 635.
-                                                return Some(v573);
-                                            }
-                                        }
-                                    }
-                                }
-                                let v41 = constructor_put_in_xreg(ctx, v38.0);
-                                let v42 = constructor_put_in_xreg(ctx, v38.1);
-                                let v570 = constructor_rv_xor(ctx, v41, v42);
-                                let v571 = constructor_output_xreg(ctx, v570);
-                                // Rule at src/isa/riscv64/lower.isle line 631.
-                                return Some(v571);
-                            }
-                        }
-                    }
-                }
-                &Opcode::Rotl => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        if v3 == I128 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v138 = C::put_in_regs(ctx, v38.0);
-                            let v316 = C::put_in_regs(ctx, v38.1);
-                            let v932 = constructor_lower_i128_rotl(ctx, v138, v316);
-                            let v933 = C::output(ctx, v932);
-                            // Rule at src/isa/riscv64/lower.isle line 981.
-                            return Some(v933);
-                        }
-                        let v292 = C::fits_in_64(ctx, v3);
-                        if let Some(v293) = v292 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v41 = constructor_put_in_xreg(ctx, v38.0);
-                            let v929 = constructor_zext(ctx, v41, v293, I64);
-                            let v839 = C::put_in_regs(ctx, v38.1);
-                            let v840 = C::value_regs_get(ctx, v839, 0x0);
-                            let v841 = C::xreg_new(ctx, v840);
-                            let v930 = constructor_lower_rotl(ctx, v293, v929, v841);
-                            let v931 = constructor_output_xreg(ctx, v930);
-                            // Rule at src/isa/riscv64/lower.isle line 978.
-                            return Some(v931);
-                        }
-                    }
-                }
-                &Opcode::Rotr => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        if v3 == I128 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v138 = C::put_in_regs(ctx, v38.0);
-                            let v316 = C::put_in_regs(ctx, v38.1);
-                            let v936 = constructor_lower_i128_rotr(ctx, v138, v316);
-                            let v937 = C::output(ctx, v936);
-                            // Rule at src/isa/riscv64/lower.isle line 988.
-                            return Some(v937);
-                        }
-                        let v292 = C::fits_in_64(ctx, v3);
-                        if let Some(v293) = v292 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v41 = constructor_put_in_xreg(ctx, v38.0);
-                            let v929 = constructor_zext(ctx, v41, v293, I64);
-                            let v839 = C::put_in_regs(ctx, v38.1);
-                            let v840 = C::value_regs_get(ctx, v839, 0x0);
-                            let v841 = C::xreg_new(ctx, v840);
-                            let v934 = constructor_lower_rotr(ctx, v293, v929, v841);
-                            let v935 = constructor_output_xreg(ctx, v934);
-                            // Rule at src/isa/riscv64/lower.isle line 985.
-                            return Some(v935);
-                        }
-                    }
-                }
-                &Opcode::Ishl => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
-                        if let Some(v11) = v10 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v764 = C::maybe_uextend(ctx, v38.1);
-                            if let Some(v765) = v764 {
-                                let v766 = C::def_inst(ctx, v765);
-                                if let Some(v767) = v766 {
-                                    let v768 = &C::inst_data(ctx, v767);
-                                    if let &InstructionData::UnaryImm {
-                                        opcode: ref v769,
-                                        imm: v770,
-                                    } = v768
-                                    {
-                                        if let &Opcode::Iconst = v769 {
-                                            let v771 = C::u64_from_imm64(ctx, v770);
-                                            let v829 = C::uimm5_from_u64(ctx, v771);
-                                            if let Some(v830) = v829 {
-                                                let v163 = constructor_put_in_vreg(ctx, v38.0);
-                                                let v165 = &constructor_unmasked(ctx);
-                                                let v166 = C::vstate_from_type(ctx, v11);
-                                                let v831 = constructor_rv_vsll_vi(
-                                                    ctx, v163, v830, v165, v166,
-                                                );
-                                                let v832 = constructor_output_vreg(ctx, v831);
-                                                // Rule at src/isa/riscv64/lower.isle line 860.
-                                                return Some(v832);
-                                            }
-                                        }
-                                    }
-                                }
-                            }
-                            let v163 = constructor_put_in_vreg(ctx, v38.0);
-                            let v316 = C::put_in_regs(ctx, v38.1);
-                            let v753 = C::value_regs_get(ctx, v316, 0x0);
-                            let v754 = C::xreg_new(ctx, v753);
-                            let v165 = &constructor_unmasked(ctx);
-                            let v166 = C::vstate_from_type(ctx, v11);
-                            let v827 = constructor_rv_vsll_vx(ctx, v163, v754, v165, v166);
-                            let v828 = constructor_output_vreg(ctx, v827);
-                            // Rule at src/isa/riscv64/lower.isle line 857.
-                            return Some(v828);
-                        }
-                        match v3 {
-                            I64 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v764 = C::maybe_uextend(ctx, v38.1);
-                                if let Some(v765) = v764 {
-                                    let v766 = C::def_inst(ctx, v765);
-                                    if let Some(v767) = v766 {
-                                        let v768 = &C::inst_data(ctx, v767);
-                                        if let &InstructionData::UnaryImm {
-                                            opcode: ref v769,
-                                            imm: v770,
-                                        } = v768
-                                        {
-                                            if let &Opcode::Iconst = v769 {
-                                                let v771 = C::u64_from_imm64(ctx, v770);
-                                                let v772 = C::imm12_from_u64(ctx, v771);
-                                                if let Some(v773) = v772 {
-                                                    let v57 = C::def_inst(ctx, v38.0);
-                                                    if let Some(v58) = v57 {
-                                                        let v59 = &C::inst_data(ctx, v58);
-                                                        if let &InstructionData::Unary {
-                                                            opcode: ref v76,
-                                                            arg: v77,
-                                                        } = v59
-                                                        {
-                                                            if let &Opcode::Uextend = v76 {
-                                                                let v71 = C::has_zba(ctx);
-                                                                if v71 == true {
-                                                                    let v78 =
-                                                                        C::value_type(ctx, v77);
-                                                                    if v78 == I32 {
-                                                                        let v79 =
-                                                                            constructor_put_in_xreg(
-                                                                                ctx, v77,
-                                                                            );
-                                                                        let v782 =
-                                                                            constructor_rv_slliuw(
-                                                                                ctx, v79, v773,
-                                                                            );
-                                                                        let v783 =
-                                                                            constructor_output_xreg(
-                                                                                ctx, v782,
-                                                                            );
-                                                                        // Rule at src/isa/riscv64/lower.isle line 830.
-                                                                        return Some(v783);
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                    let v41 = constructor_put_in_xreg(ctx, v38.0);
-                                                    let v778 = constructor_shift_mask(ctx, v3);
-                                                    let v779 = C::imm12_and(ctx, v773, v778);
-                                                    let v780 = constructor_rv_slli(ctx, v41, v779);
-                                                    let v781 = constructor_output_xreg(ctx, v780);
-                                                    // Rule at src/isa/riscv64/lower.isle line 826.
-                                                    return Some(v781);
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                            }
-                            I128 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v506 = C::put_in_regs(ctx, v38.1);
-                                let v507 = C::value_regs_get(ctx, v506, 0x0);
-                                let v508 = C::xreg_new(ctx, v507);
-                                let v785 = C::gen_shamt(ctx, I128, v508);
-                                let v786 = C::value_regs_get(ctx, v785, 0x0);
-                                let v787 = C::xreg_new(ctx, v786);
-                                let v788 = C::value_regs_get(ctx, v785, 0x1);
-                                let v789 = C::xreg_new(ctx, v788);
-                                let v790 = C::put_in_regs(ctx, v38.0);
-                                let v791 = C::value_regs_get(ctx, v790, 0x0);
-                                let v792 = C::xreg_new(ctx, v791);
-                                let v793 = constructor_rv_sll(ctx, v792, v787);
-                                let v794 = C::put_in_regs(ctx, v38.0);
-                                let v795 = C::value_regs_get(ctx, v794, 0x0);
-                                let v796 = C::xreg_new(ctx, v795);
-                                let v797 = constructor_rv_srl(ctx, v796, v789);
-                                let v799 = C::zero_reg(ctx);
-                                let v800 = C::xreg_new(ctx, v799);
-                                let v801 = C::zero_reg(ctx);
-                                let v802 = C::xreg_to_reg(ctx, v797);
-                                let v803 =
-                                    C::gen_select_reg(ctx, &IntCC::Equal, v787, v800, v801, v802);
-                                let v804 = C::xreg_new(ctx, v803);
-                                let v805 = C::put_in_regs(ctx, v38.0);
-                                let v806 = C::value_regs_get(ctx, v805, 0x1);
-                                let v807 = C::xreg_new(ctx, v806);
-                                let v808 = constructor_rv_sll(ctx, v807, v787);
-                                let v809 = constructor_rv_or(ctx, v804, v808);
-                                let v811 = C::load_u64_constant(ctx, 0x40);
-                                let v812 = C::xreg_new(ctx, v811);
-                                let v813 = C::put_in_regs(ctx, v38.1);
-                                let v814 = C::value_regs_get(ctx, v813, 0x0);
-                                let v815 = C::xreg_new(ctx, v814);
-                                let v817 = C::imm12_const(ctx, 0x7F);
-                                let v818 = constructor_rv_andi(ctx, v815, v817);
-                                let v820 = C::zero_reg(ctx);
-                                let v821 = C::xreg_to_reg(ctx, v793);
-                                let v822 = C::gen_select_reg(
-                                    ctx,
-                                    &IntCC::UnsignedGreaterThanOrEqual,
-                                    v818,
-                                    v812,
-                                    v820,
-                                    v821,
-                                );
-                                let v823 = C::xreg_to_reg(ctx, v809);
-                                let v824 = C::gen_select_reg(
-                                    ctx,
-                                    &IntCC::UnsignedGreaterThanOrEqual,
-                                    v818,
-                                    v812,
-                                    v821,
-                                    v823,
-                                );
-                                let v825 = C::value_regs(ctx, v822, v824);
-                                let v826 = C::output(ctx, v825);
-                                // Rule at src/isa/riscv64/lower.isle line 835.
-                                return Some(v826);
-                            }
-                            _ => {}
-                        }
-                        let v762 = C::int_fits_in_32(ctx, v3);
-                        if let Some(v763) = v762 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v764 = C::maybe_uextend(ctx, v38.1);
-                            if let Some(v765) = v764 {
-                                let v766 = C::def_inst(ctx, v765);
-                                if let Some(v767) = v766 {
-                                    let v768 = &C::inst_data(ctx, v767);
-                                    if let &InstructionData::UnaryImm {
-                                        opcode: ref v769,
-                                        imm: v770,
-                                    } = v768
-                                    {
-                                        if let &Opcode::Iconst = v769 {
-                                            let v771 = C::u64_from_imm64(ctx, v770);
-                                            let v772 = C::imm12_from_u64(ctx, v771);
-                                            if let Some(v773) = v772 {
-                                                let v41 = constructor_put_in_xreg(ctx, v38.0);
-                                                let v774 = constructor_shift_mask(ctx, v763);
-                                                let v775 = C::imm12_and(ctx, v773, v774);
-                                                let v776 = constructor_rv_slliw(ctx, v41, v775);
-                                                let v777 = constructor_output_xreg(ctx, v776);
-                                                // Rule at src/isa/riscv64/lower.isle line 821.
-                                                return Some(v777);
-                                            }
-                                        }
-                                    }
-                                }
-                            }
-                        }
-                        match v3 {
-                            I32 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v41 = constructor_put_in_xreg(ctx, v38.0);
-                                let v316 = C::put_in_regs(ctx, v38.1);
-                                let v753 = C::value_regs_get(ctx, v316, 0x0);
-                                let v754 = C::xreg_new(ctx, v753);
-                                let v758 = constructor_rv_sllw(ctx, v41, v754);
-                                let v759 = constructor_output_xreg(ctx, v758);
-                                // Rule at src/isa/riscv64/lower.isle line 813.
-                                return Some(v759);
-                            }
-                            I64 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v41 = constructor_put_in_xreg(ctx, v38.0);
-                                let v316 = C::put_in_regs(ctx, v38.1);
-                                let v753 = C::value_regs_get(ctx, v316, 0x0);
-                                let v754 = C::xreg_new(ctx, v753);
-                                let v760 = constructor_rv_sll(ctx, v41, v754);
-                                let v761 = constructor_output_xreg(ctx, v760);
-                                // Rule at src/isa/riscv64/lower.isle line 817.
-                                return Some(v761);
-                            }
-                            _ => {}
-                        }
-                        let v363 = C::ty_int(ctx, v3);
-                        if let Some(v364) = v363 {
-                            let v748 = C::ty_8_or_16(ctx, v364);
-                            if let Some(v749) = v748 {
-                                let v750 = constructor_shift_mask(ctx, v749);
-                                let v751 = constructor_u64_to_imm12(ctx, v750);
-                                if let Some(v752) = v751 {
-                                    let v38 = C::unpack_value_array_2(ctx, v37);
-                                    let v41 = constructor_put_in_xreg(ctx, v38.0);
-                                    let v316 = C::put_in_regs(ctx, v38.1);
-                                    let v753 = C::value_regs_get(ctx, v316, 0x0);
-                                    let v754 = C::xreg_new(ctx, v753);
-                                    let v755 = constructor_rv_andi(ctx, v754, v752);
-                                    let v756 = constructor_rv_sllw(ctx, v41, v755);
-                                    let v757 = constructor_output_xreg(ctx, v756);
-                                    // Rule at src/isa/riscv64/lower.isle line 808.
-                                    return Some(v757);
-                                }
-                            }
-                        }
-                    }
-                }
-                &Opcode::Ushr => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
-                        if let Some(v11) = v10 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v764 = C::maybe_uextend(ctx, v38.1);
-                            if let Some(v765) = v764 {
-                                let v766 = C::def_inst(ctx, v765);
-                                if let Some(v767) = v766 {
-                                    let v768 = &C::inst_data(ctx, v767);
-                                    if let &InstructionData::UnaryImm {
-                                        opcode: ref v769,
-                                        imm: v770,
-                                    } = v768
-                                    {
-                                        if let &Opcode::Iconst = v769 {
-                                            let v771 = C::u64_from_imm64(ctx, v770);
-                                            let v829 = C::uimm5_from_u64(ctx, v771);
-                                            if let Some(v830) = v829 {
-                                                let v163 = constructor_put_in_vreg(ctx, v38.0);
-                                                let v165 = &constructor_unmasked(ctx);
-                                                let v166 = C::vstate_from_type(ctx, v11);
-                                                let v885 = constructor_rv_vsrl_vi(
-                                                    ctx, v163, v830, v165, v166,
-                                                );
-                                                let v886 = constructor_output_vreg(ctx, v885);
-                                                // Rule at src/isa/riscv64/lower.isle line 914.
-                                                return Some(v886);
-                                            }
-                                        }
-                                    }
-                                }
-                            }
-                            let v163 = constructor_put_in_vreg(ctx, v38.0);
-                            let v316 = C::put_in_regs(ctx, v38.1);
-                            let v753 = C::value_regs_get(ctx, v316, 0x0);
-                            let v754 = C::xreg_new(ctx, v753);
-                            let v165 = &constructor_unmasked(ctx);
-                            let v166 = C::vstate_from_type(ctx, v11);
-                            let v883 = constructor_rv_vsrl_vx(ctx, v163, v754, v165, v166);
-                            let v884 = constructor_output_vreg(ctx, v883);
-                            // Rule at src/isa/riscv64/lower.isle line 911.
-                            return Some(v884);
-                        }
-                        match v3 {
-                            I32 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v764 = C::maybe_uextend(ctx, v38.1);
-                                if let Some(v765) = v764 {
-                                    let v766 = C::def_inst(ctx, v765);
-                                    if let Some(v767) = v766 {
-                                        let v768 = &C::inst_data(ctx, v767);
-                                        if let &InstructionData::UnaryImm {
-                                            opcode: ref v769,
-                                            imm: v770,
-                                        } = v768
-                                        {
-                                            if let &Opcode::Iconst = v769 {
-                                                let v771 = C::u64_from_imm64(ctx, v770);
-                                                let v772 = C::imm12_from_u64(ctx, v771);
-                                                if let Some(v773) = v772 {
-                                                    let v41 = constructor_put_in_xreg(ctx, v38.0);
-                                                    let v852 = constructor_rv_srliw(ctx, v41, v773);
-                                                    let v853 = constructor_output_xreg(ctx, v852);
-                                                    // Rule at src/isa/riscv64/lower.isle line 883.
-                                                    return Some(v853);
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                            }
-                            I64 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v764 = C::maybe_uextend(ctx, v38.1);
-                                if let Some(v765) = v764 {
-                                    let v766 = C::def_inst(ctx, v765);
-                                    if let Some(v767) = v766 {
-                                        let v768 = &C::inst_data(ctx, v767);
-                                        if let &InstructionData::UnaryImm {
-                                            opcode: ref v769,
-                                            imm: v770,
-                                        } = v768
-                                        {
-                                            if let &Opcode::Iconst = v769 {
-                                                let v771 = C::u64_from_imm64(ctx, v770);
-                                                let v772 = C::imm12_from_u64(ctx, v771);
-                                                if let Some(v773) = v772 {
-                                                    let v41 = constructor_put_in_xreg(ctx, v38.0);
-                                                    let v854 = constructor_rv_srli(ctx, v41, v773);
-                                                    let v855 = constructor_output_xreg(ctx, v854);
-                                                    // Rule at src/isa/riscv64/lower.isle line 886.
-                                                    return Some(v855);
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                            }
-                            I128 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v506 = C::put_in_regs(ctx, v38.1);
-                                let v507 = C::value_regs_get(ctx, v506, 0x0);
-                                let v508 = C::xreg_new(ctx, v507);
-                                let v785 = C::gen_shamt(ctx, I128, v508);
-                                let v786 = C::value_regs_get(ctx, v785, 0x0);
-                                let v787 = C::xreg_new(ctx, v786);
-                                let v788 = C::value_regs_get(ctx, v785, 0x1);
-                                let v789 = C::xreg_new(ctx, v788);
-                                let v790 = C::put_in_regs(ctx, v38.0);
-                                let v856 = C::value_regs_get(ctx, v790, 0x1);
-                                let v857 = C::xreg_new(ctx, v856);
-                                let v858 = constructor_rv_sll(ctx, v857, v789);
-                                let v859 = C::zero_reg(ctx);
-                                let v860 = C::xreg_new(ctx, v859);
-                                let v861 = C::zero_reg(ctx);
-                                let v862 = C::xreg_to_reg(ctx, v858);
-                                let v863 =
-                                    C::gen_select_reg(ctx, &IntCC::Equal, v787, v860, v861, v862);
-                                let v864 = C::xreg_new(ctx, v863);
-                                let v865 = C::put_in_regs(ctx, v38.0);
-                                let v866 = C::value_regs_get(ctx, v865, 0x0);
-                                let v867 = C::xreg_new(ctx, v866);
-                                let v868 = constructor_rv_srl(ctx, v867, v787);
-                                let v869 = constructor_rv_or(ctx, v864, v868);
-                                let v870 = C::load_u64_constant(ctx, 0x40);
-                                let v871 = C::xreg_new(ctx, v870);
-                                let v872 = C::put_in_regs(ctx, v38.0);
-                                let v873 = C::value_regs_get(ctx, v872, 0x1);
-                                let v874 = C::xreg_new(ctx, v873);
-                                let v875 = constructor_rv_srl(ctx, v874, v787);
-                                let v813 = C::put_in_regs(ctx, v38.1);
-                                let v814 = C::value_regs_get(ctx, v813, 0x0);
-                                let v815 = C::xreg_new(ctx, v814);
-                                let v817 = C::imm12_const(ctx, 0x7F);
-                                let v818 = constructor_rv_andi(ctx, v815, v817);
-                                let v876 = C::xreg_to_reg(ctx, v875);
-                                let v877 = C::xreg_to_reg(ctx, v869);
-                                let v878 = C::gen_select_reg(
-                                    ctx,
-                                    &IntCC::UnsignedGreaterThanOrEqual,
-                                    v818,
-                                    v871,
-                                    v876,
-                                    v877,
-                                );
-                                let v879 = C::zero_reg(ctx);
-                                let v880 = C::gen_select_reg(
-                                    ctx,
-                                    &IntCC::UnsignedGreaterThanOrEqual,
-                                    v818,
-                                    v871,
-                                    v879,
-                                    v876,
-                                );
-                                let v881 = C::value_regs(ctx, v878, v880);
-                                let v882 = C::output(ctx, v881);
-                                // Rule at src/isa/riscv64/lower.isle line 889.
-                                return Some(v882);
-                            }
-                            _ => {}
-                        }
-                        let v363 = C::ty_int(ctx, v3);
-                        if let Some(v364) = v363 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v764 = C::maybe_uextend(ctx, v38.1);
-                            if let Some(v765) = v764 {
-                                let v766 = C::def_inst(ctx, v765);
-                                if let Some(v767) = v766 {
-                                    let v768 = &C::inst_data(ctx, v767);
-                                    if let &InstructionData::UnaryImm {
-                                        opcode: ref v769,
-                                        imm: v770,
-                                    } = v768
-                                    {
-                                        if let &Opcode::Iconst = v769 {
-                                            let v771 = C::u64_from_imm64(ctx, v770);
-                                            let v772 = C::imm12_from_u64(ctx, v771);
-                                            if let Some(v773) = v772 {
-                                                let v833 = C::fits_in_16(ctx, v364);
-                                                if let Some(v834) = v833 {
-                                                    let v41 = constructor_put_in_xreg(ctx, v38.0);
-                                                    let v838 =
-                                                        constructor_zext(ctx, v41, v834, I64);
-                                                    let v835 = constructor_shift_mask(ctx, v834);
-                                                    let v849 = C::imm12_and(ctx, v773, v835);
-                                                    let v850 =
-                                                        constructor_rv_srliw(ctx, v838, v849);
-                                                    let v851 = constructor_output_xreg(ctx, v850);
-                                                    // Rule at src/isa/riscv64/lower.isle line 880.
-                                                    return Some(v851);
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                            }
-                        }
-                        match v3 {
-                            I32 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v41 = constructor_put_in_xreg(ctx, v38.0);
-                                let v316 = C::put_in_regs(ctx, v38.1);
-                                let v753 = C::value_regs_get(ctx, v316, 0x0);
-                                let v754 = C::xreg_new(ctx, v753);
-                                let v845 = constructor_rv_srlw(ctx, v41, v754);
-                                let v846 = constructor_output_xreg(ctx, v845);
-                                // Rule at src/isa/riscv64/lower.isle line 872.
-                                return Some(v846);
-                            }
-                            I64 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v41 = constructor_put_in_xreg(ctx, v38.0);
-                                let v316 = C::put_in_regs(ctx, v38.1);
-                                let v753 = C::value_regs_get(ctx, v316, 0x0);
-                                let v754 = C::xreg_new(ctx, v753);
-                                let v847 = constructor_rv_srl(ctx, v41, v754);
-                                let v848 = constructor_output_xreg(ctx, v847);
-                                // Rule at src/isa/riscv64/lower.isle line 876.
-                                return Some(v848);
-                            }
-                            _ => {}
-                        }
-                        if let Some(v364) = v363 {
-                            let v833 = C::fits_in_16(ctx, v364);
-                            if let Some(v834) = v833 {
-                                let v835 = constructor_shift_mask(ctx, v834);
-                                let v836 = constructor_u64_to_imm12(ctx, v835);
-                                if let Some(v837) = v836 {
-                                    let v38 = C::unpack_value_array_2(ctx, v37);
-                                    let v41 = constructor_put_in_xreg(ctx, v38.0);
-                                    let v838 = constructor_zext(ctx, v41, v834, I64);
-                                    let v839 = C::put_in_regs(ctx, v38.1);
-                                    let v840 = C::value_regs_get(ctx, v839, 0x0);
-                                    let v841 = C::xreg_new(ctx, v840);
-                                    let v842 = constructor_rv_andi(ctx, v841, v837);
-                                    let v843 = constructor_rv_srlw(ctx, v838, v842);
-                                    let v844 = constructor_output_xreg(ctx, v843);
-                                    // Rule at src/isa/riscv64/lower.isle line 867.
-                                    return Some(v844);
-                                }
-                            }
-                        }
-                    }
-                }
-                &Opcode::Sshr => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
-                        if let Some(v11) = v10 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v764 = C::maybe_uextend(ctx, v38.1);
-                            if let Some(v765) = v764 {
-                                let v766 = C::def_inst(ctx, v765);
-                                if let Some(v767) = v766 {
-                                    let v768 = &C::inst_data(ctx, v767);
-                                    if let &InstructionData::UnaryImm {
-                                        opcode: ref v769,
-                                        imm: v770,
-                                    } = v768
-                                    {
-                                        if let &Opcode::Iconst = v769 {
-                                            let v771 = C::u64_from_imm64(ctx, v770);
-                                            let v829 = C::uimm5_from_u64(ctx, v771);
-                                            if let Some(v830) = v829 {
-                                                let v163 = constructor_put_in_vreg(ctx, v38.0);
-                                                let v165 = &constructor_unmasked(ctx);
-                                                let v166 = C::vstate_from_type(ctx, v11);
-                                                let v927 = constructor_rv_vsra_vi(
-                                                    ctx, v163, v830, v165, v166,
-                                                );
-                                                let v928 = constructor_output_vreg(ctx, v927);
-                                                // Rule at src/isa/riscv64/lower.isle line 973.
-                                                return Some(v928);
-                                            }
-                                        }
-                                    }
-                                }
-                            }
-                            let v163 = constructor_put_in_vreg(ctx, v38.0);
-                            let v316 = C::put_in_regs(ctx, v38.1);
-                            let v753 = C::value_regs_get(ctx, v316, 0x0);
-                            let v754 = C::xreg_new(ctx, v753);
-                            let v165 = &constructor_unmasked(ctx);
-                            let v166 = C::vstate_from_type(ctx, v11);
-                            let v925 = constructor_rv_vsra_vx(ctx, v163, v754, v165, v166);
-                            let v926 = constructor_output_vreg(ctx, v925);
-                            // Rule at src/isa/riscv64/lower.isle line 970.
-                            return Some(v926);
-                        }
-                        match v3 {
-                            I32 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v764 = C::maybe_uextend(ctx, v38.1);
-                                if let Some(v765) = v764 {
-                                    let v766 = C::def_inst(ctx, v765);
-                                    if let Some(v767) = v766 {
-                                        let v768 = &C::inst_data(ctx, v767);
-                                        if let &InstructionData::UnaryImm {
-                                            opcode: ref v769,
-                                            imm: v770,
-                                        } = v768
-                                        {
-                                            if let &Opcode::Iconst = v769 {
-                                                let v771 = C::u64_from_imm64(ctx, v770);
-                                                let v772 = C::imm12_from_u64(ctx, v771);
-                                                if let Some(v773) = v772 {
-                                                    let v41 = constructor_put_in_xreg(ctx, v38.0);
-                                                    let v896 = constructor_rv_sraiw(ctx, v41, v773);
-                                                    let v897 = constructor_output_xreg(ctx, v896);
-                                                    // Rule at src/isa/riscv64/lower.isle line 937.
-                                                    return Some(v897);
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                            }
-                            I64 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v764 = C::maybe_uextend(ctx, v38.1);
-                                if let Some(v765) = v764 {
-                                    let v766 = C::def_inst(ctx, v765);
-                                    if let Some(v767) = v766 {
-                                        let v768 = &C::inst_data(ctx, v767);
-                                        if let &InstructionData::UnaryImm {
-                                            opcode: ref v769,
-                                            imm: v770,
-                                        } = v768
-                                        {
-                                            if let &Opcode::Iconst = v769 {
-                                                let v771 = C::u64_from_imm64(ctx, v770);
-                                                let v772 = C::imm12_from_u64(ctx, v771);
-                                                if let Some(v773) = v772 {
-                                                    let v41 = constructor_put_in_xreg(ctx, v38.0);
-                                                    let v898 = constructor_rv_srai(ctx, v41, v773);
-                                                    let v899 = constructor_output_xreg(ctx, v898);
-                                                    // Rule at src/isa/riscv64/lower.isle line 940.
-                                                    return Some(v899);
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                            }
-                            I128 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v506 = C::put_in_regs(ctx, v38.1);
-                                let v507 = C::value_regs_get(ctx, v506, 0x0);
-                                let v508 = C::xreg_new(ctx, v507);
-                                let v785 = C::gen_shamt(ctx, I128, v508);
-                                let v786 = C::value_regs_get(ctx, v785, 0x0);
-                                let v787 = C::xreg_new(ctx, v786);
-                                let v788 = C::value_regs_get(ctx, v785, 0x1);
-                                let v789 = C::xreg_new(ctx, v788);
-                                let v790 = C::put_in_regs(ctx, v38.0);
-                                let v856 = C::value_regs_get(ctx, v790, 0x1);
-                                let v857 = C::xreg_new(ctx, v856);
-                                let v858 = constructor_rv_sll(ctx, v857, v789);
-                                let v859 = C::zero_reg(ctx);
-                                let v860 = C::xreg_new(ctx, v859);
-                                let v861 = C::zero_reg(ctx);
-                                let v862 = C::xreg_to_reg(ctx, v858);
-                                let v863 =
-                                    C::gen_select_reg(ctx, &IntCC::Equal, v787, v860, v861, v862);
-                                let v864 = C::xreg_new(ctx, v863);
-                                let v865 = C::put_in_regs(ctx, v38.0);
-                                let v866 = C::value_regs_get(ctx, v865, 0x0);
-                                let v867 = C::xreg_new(ctx, v866);
-                                let v868 = constructor_rv_srl(ctx, v867, v787);
-                                let v869 = constructor_rv_or(ctx, v864, v868);
-                                let v870 = C::load_u64_constant(ctx, 0x40);
-                                let v871 = C::xreg_new(ctx, v870);
-                                let v872 = C::put_in_regs(ctx, v38.0);
-                                let v873 = C::value_regs_get(ctx, v872, 0x1);
-                                let v874 = C::xreg_new(ctx, v873);
-                                let v900 = constructor_rv_sra(ctx, v874, v787);
-                                let v902 = constructor_load_imm12(ctx, -0x1);
-                                let v903 = C::xreg_new(ctx, v902);
-                                let v905 = C::put_in_regs(ctx, v38.0);
-                                let v906 = C::value_regs_get(ctx, v905, 0x1);
-                                let v907 = C::xreg_new(ctx, v906);
-                                let v879 = C::zero_reg(ctx);
-                                let v908 = C::xreg_new(ctx, v879);
-                                let v910 = C::zero_reg(ctx);
-                                let v909 = C::xreg_to_reg(ctx, v903);
-                                let v911 = C::gen_select_reg(
-                                    ctx,
-                                    &IntCC::SignedLessThan,
-                                    v907,
-                                    v908,
-                                    v909,
-                                    v910,
-                                );
-                                let v912 = C::xreg_new(ctx, v911);
-                                let v913 = C::load_u64_constant(ctx, 0x40);
-                                let v914 = C::xreg_new(ctx, v913);
-                                let v915 = C::put_in_regs(ctx, v38.1);
-                                let v916 = C::value_regs_get(ctx, v915, 0x0);
-                                let v917 = C::xreg_new(ctx, v916);
-                                let v817 = C::imm12_const(ctx, 0x7F);
-                                let v918 = constructor_rv_andi(ctx, v917, v817);
-                                let v919 = C::xreg_to_reg(ctx, v900);
-                                let v877 = C::xreg_to_reg(ctx, v869);
-                                let v920 = C::gen_select_reg(
-                                    ctx,
-                                    &IntCC::UnsignedGreaterThanOrEqual,
-                                    v918,
-                                    v914,
-                                    v919,
-                                    v877,
-                                );
-                                let v921 = C::xreg_to_reg(ctx, v912);
-                                let v922 = C::gen_select_reg(
-                                    ctx,
-                                    &IntCC::UnsignedGreaterThanOrEqual,
-                                    v918,
-                                    v914,
-                                    v921,
-                                    v919,
-                                );
-                                let v923 = C::value_regs(ctx, v920, v922);
-                                let v924 = C::output(ctx, v923);
-                                // Rule at src/isa/riscv64/lower.isle line 943.
-                                return Some(v924);
-                            }
-                            _ => {}
-                        }
-                        let v363 = C::ty_int(ctx, v3);
-                        if let Some(v364) = v363 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v764 = C::maybe_uextend(ctx, v38.1);
-                            if let Some(v765) = v764 {
-                                let v766 = C::def_inst(ctx, v765);
-                                if let Some(v767) = v766 {
-                                    let v768 = &C::inst_data(ctx, v767);
-                                    if let &InstructionData::UnaryImm {
-                                        opcode: ref v769,
-                                        imm: v770,
-                                    } = v768
-                                    {
-                                        if let &Opcode::Iconst = v769 {
-                                            let v771 = C::u64_from_imm64(ctx, v770);
-                                            let v772 = C::imm12_from_u64(ctx, v771);
-                                            if let Some(v773) = v772 {
-                                                let v833 = C::fits_in_16(ctx, v364);
-                                                if let Some(v834) = v833 {
-                                                    let v41 = constructor_put_in_xreg(ctx, v38.0);
-                                                    let v887 =
-                                                        constructor_sext(ctx, v41, v834, I64);
-                                                    let v835 = constructor_shift_mask(ctx, v834);
-                                                    let v849 = C::imm12_and(ctx, v773, v835);
-                                                    let v894 =
-                                                        constructor_rv_sraiw(ctx, v887, v849);
-                                                    let v895 = constructor_output_xreg(ctx, v894);
-                                                    // Rule at src/isa/riscv64/lower.isle line 934.
-                                                    return Some(v895);
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                            }
-                        }
-                        match v3 {
-                            I32 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v41 = constructor_put_in_xreg(ctx, v38.0);
-                                let v316 = C::put_in_regs(ctx, v38.1);
-                                let v753 = C::value_regs_get(ctx, v316, 0x0);
-                                let v754 = C::xreg_new(ctx, v753);
-                                let v890 = constructor_rv_sraw(ctx, v41, v754);
-                                let v891 = constructor_output_xreg(ctx, v890);
-                                // Rule at src/isa/riscv64/lower.isle line 926.
-                                return Some(v891);
-                            }
-                            I64 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v41 = constructor_put_in_xreg(ctx, v38.0);
-                                let v316 = C::put_in_regs(ctx, v38.1);
-                                let v753 = C::value_regs_get(ctx, v316, 0x0);
-                                let v754 = C::xreg_new(ctx, v753);
-                                let v892 = constructor_rv_sra(ctx, v41, v754);
-                                let v893 = constructor_output_xreg(ctx, v892);
-                                // Rule at src/isa/riscv64/lower.isle line 930.
-                                return Some(v893);
-                            }
-                            _ => {}
-                        }
-                        if let Some(v364) = v363 {
-                            let v833 = C::fits_in_16(ctx, v364);
-                            if let Some(v834) = v833 {
-                                let v835 = constructor_shift_mask(ctx, v834);
-                                let v836 = constructor_u64_to_imm12(ctx, v835);
-                                if let Some(v837) = v836 {
-                                    let v38 = C::unpack_value_array_2(ctx, v37);
-                                    let v41 = constructor_put_in_xreg(ctx, v38.0);
-                                    let v887 = constructor_sext(ctx, v41, v834, I64);
-                                    let v839 = C::put_in_regs(ctx, v38.1);
-                                    let v840 = C::value_regs_get(ctx, v839, 0x0);
-                                    let v841 = C::xreg_new(ctx, v840);
-                                    let v842 = constructor_rv_andi(ctx, v841, v837);
-                                    let v888 = constructor_rv_sraw(ctx, v887, v842);
-                                    let v889 = constructor_output_xreg(ctx, v888);
-                                    // Rule at src/isa/riscv64/lower.isle line 921.
-                                    return Some(v889);
-                                }
-                            }
-                        }
-                    }
-                }
-                &Opcode::Fadd => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
-                        if let Some(v11) = v10 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v57 = C::def_inst(ctx, v38.0);
-                            if let Some(v58) = v57 {
-                                let v59 = &C::inst_data(ctx, v58);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v76,
-                                    arg: v77,
-                                } = v59
-                                {
-                                    if let &Opcode::Splat = v76 {
-                                        let v196 = constructor_put_in_vreg(ctx, v38.1);
-                                        let v1063 = constructor_put_in_freg(ctx, v77);
-                                        let v165 = &constructor_unmasked(ctx);
-                                        let v166 = C::vstate_from_type(ctx, v11);
-                                        let v1064 =
-                                            constructor_rv_vfadd_vf(ctx, v196, v1063, v165, v166);
-                                        let v1065 = constructor_output_vreg(ctx, v1064);
-                                        // Rule at src/isa/riscv64/lower.isle line 1146.
-                                        return Some(v1065);
-                                    }
-                                }
-                            }
-                            let v45 = C::def_inst(ctx, v38.1);
-                            if let Some(v46) = v45 {
-                                let v47 = &C::inst_data(ctx, v46);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v68,
-                                    arg: v69,
-                                } = v47
-                                {
-                                    if let &Opcode::Splat = v68 {
-                                        let v163 = constructor_put_in_vreg(ctx, v38.0);
-                                        let v951 = constructor_put_in_freg(ctx, v69);
-                                        let v165 = &constructor_unmasked(ctx);
-                                        let v166 = C::vstate_from_type(ctx, v11);
-                                        let v1061 =
-                                            constructor_rv_vfadd_vf(ctx, v163, v951, v165, v166);
-                                        let v1062 = constructor_output_vreg(ctx, v1061);
-                                        // Rule at src/isa/riscv64/lower.isle line 1143.
-                                        return Some(v1062);
-                                    }
-                                }
-                            }
-                            let v163 = constructor_put_in_vreg(ctx, v38.0);
-                            let v164 = constructor_put_in_vreg(ctx, v38.1);
-                            let v165 = &constructor_unmasked(ctx);
-                            let v166 = C::vstate_from_type(ctx, v11);
-                            let v1059 = constructor_rv_vfadd_vv(ctx, v163, v164, v165, v166);
-                            let v1060 = constructor_output_vreg(ctx, v1059);
-                            // Rule at src/isa/riscv64/lower.isle line 1140.
-                            return Some(v1060);
-                        }
-                        let v479 = C::ty_scalar_float(ctx, v3);
-                        if let Some(v480) = v479 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v482 = constructor_put_in_freg(ctx, v38.0);
-                            let v483 = constructor_put_in_freg(ctx, v38.1);
-                            let v1057 = constructor_rv_fadd(ctx, v480, v482, v483);
-                            let v1058 = constructor_output_freg(ctx, v1057);
-                            // Rule at src/isa/riscv64/lower.isle line 1137.
-                            return Some(v1058);
-                        }
-                    }
-                }
-                &Opcode::Fsub => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
-                        if let Some(v11) = v10 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v57 = C::def_inst(ctx, v38.0);
-                            if let Some(v58) = v57 {
-                                let v59 = &C::inst_data(ctx, v58);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v76,
-                                    arg: v77,
-                                } = v59
-                                {
-                                    if let &Opcode::Splat = v76 {
-                                        let v196 = constructor_put_in_vreg(ctx, v38.1);
-                                        let v1063 = constructor_put_in_freg(ctx, v77);
-                                        let v165 = &constructor_unmasked(ctx);
-                                        let v166 = C::vstate_from_type(ctx, v11);
-                                        let v1072 =
-                                            constructor_rv_vfrsub_vf(ctx, v196, v1063, v165, v166);
-                                        let v1073 = constructor_output_vreg(ctx, v1072);
-                                        // Rule at src/isa/riscv64/lower.isle line 1160.
-                                        return Some(v1073);
-                                    }
-                                }
-                            }
-                            let v45 = C::def_inst(ctx, v38.1);
-                            if let Some(v46) = v45 {
-                                let v47 = &C::inst_data(ctx, v46);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v68,
-                                    arg: v69,
-                                } = v47
-                                {
-                                    if let &Opcode::Splat = v68 {
-                                        let v163 = constructor_put_in_vreg(ctx, v38.0);
-                                        let v951 = constructor_put_in_freg(ctx, v69);
-                                        let v165 = &constructor_unmasked(ctx);
-                                        let v166 = C::vstate_from_type(ctx, v11);
-                                        let v1070 =
-                                            constructor_rv_vfsub_vf(ctx, v163, v951, v165, v166);
-                                        let v1071 = constructor_output_vreg(ctx, v1070);
-                                        // Rule at src/isa/riscv64/lower.isle line 1157.
-                                        return Some(v1071);
-                                    }
-                                }
-                            }
-                            let v163 = constructor_put_in_vreg(ctx, v38.0);
-                            let v164 = constructor_put_in_vreg(ctx, v38.1);
-                            let v165 = &constructor_unmasked(ctx);
-                            let v166 = C::vstate_from_type(ctx, v11);
-                            let v1068 = constructor_rv_vfsub_vv(ctx, v163, v164, v165, v166);
-                            let v1069 = constructor_output_vreg(ctx, v1068);
-                            // Rule at src/isa/riscv64/lower.isle line 1154.
-                            return Some(v1069);
-                        }
-                        let v479 = C::ty_scalar_float(ctx, v3);
-                        if let Some(v480) = v479 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v482 = constructor_put_in_freg(ctx, v38.0);
-                            let v483 = constructor_put_in_freg(ctx, v38.1);
-                            let v1066 = constructor_rv_fsub(ctx, v480, v482, v483);
-                            let v1067 = constructor_output_freg(ctx, v1066);
-                            // Rule at src/isa/riscv64/lower.isle line 1151.
-                            return Some(v1067);
-                        }
-                    }
-                }
-                &Opcode::Fmul => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
-                        if let Some(v11) = v10 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v57 = C::def_inst(ctx, v38.0);
-                            if let Some(v58) = v57 {
-                                let v59 = &C::inst_data(ctx, v58);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v76,
-                                    arg: v77,
-                                } = v59
-                                {
-                                    if let &Opcode::Splat = v76 {
-                                        let v196 = constructor_put_in_vreg(ctx, v38.1);
-                                        let v1063 = constructor_put_in_freg(ctx, v77);
-                                        let v165 = &constructor_unmasked(ctx);
-                                        let v166 = C::vstate_from_type(ctx, v11);
-                                        let v1080 =
-                                            constructor_rv_vfmul_vf(ctx, v196, v1063, v165, v166);
-                                        let v1081 = constructor_output_vreg(ctx, v1080);
-                                        // Rule at src/isa/riscv64/lower.isle line 1173.
-                                        return Some(v1081);
-                                    }
-                                }
-                            }
-                            let v45 = C::def_inst(ctx, v38.1);
-                            if let Some(v46) = v45 {
-                                let v47 = &C::inst_data(ctx, v46);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v68,
-                                    arg: v69,
-                                } = v47
-                                {
-                                    if let &Opcode::Splat = v68 {
-                                        let v163 = constructor_put_in_vreg(ctx, v38.0);
-                                        let v951 = constructor_put_in_freg(ctx, v69);
-                                        let v165 = &constructor_unmasked(ctx);
-                                        let v166 = C::vstate_from_type(ctx, v11);
-                                        let v1078 =
-                                            constructor_rv_vfmul_vf(ctx, v163, v951, v165, v166);
-                                        let v1079 = constructor_output_vreg(ctx, v1078);
-                                        // Rule at src/isa/riscv64/lower.isle line 1170.
-                                        return Some(v1079);
-                                    }
-                                }
-                            }
-                            let v163 = constructor_put_in_vreg(ctx, v38.0);
-                            let v164 = constructor_put_in_vreg(ctx, v38.1);
-                            let v165 = &constructor_unmasked(ctx);
-                            let v166 = C::vstate_from_type(ctx, v11);
-                            let v1076 = constructor_rv_vfmul_vv(ctx, v163, v164, v165, v166);
-                            let v1077 = constructor_output_vreg(ctx, v1076);
-                            // Rule at src/isa/riscv64/lower.isle line 1167.
-                            return Some(v1077);
-                        }
-                        let v479 = C::ty_scalar_float(ctx, v3);
-                        if let Some(v480) = v479 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v482 = constructor_put_in_freg(ctx, v38.0);
-                            let v483 = constructor_put_in_freg(ctx, v38.1);
-                            let v1074 = constructor_rv_fmul(ctx, v480, v482, v483);
-                            let v1075 = constructor_output_freg(ctx, v1074);
-                            // Rule at src/isa/riscv64/lower.isle line 1164.
-                            return Some(v1075);
-                        }
-                    }
-                }
-                &Opcode::Fdiv => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
-                        if let Some(v11) = v10 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v57 = C::def_inst(ctx, v38.0);
-                            if let Some(v58) = v57 {
-                                let v59 = &C::inst_data(ctx, v58);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v76,
-                                    arg: v77,
-                                } = v59
-                                {
-                                    if let &Opcode::Splat = v76 {
-                                        let v196 = constructor_put_in_vreg(ctx, v38.1);
-                                        let v1063 = constructor_put_in_freg(ctx, v77);
-                                        let v165 = &constructor_unmasked(ctx);
-                                        let v166 = C::vstate_from_type(ctx, v11);
-                                        let v1088 =
-                                            constructor_rv_vfrdiv_vf(ctx, v196, v1063, v165, v166);
-                                        let v1089 = constructor_output_vreg(ctx, v1088);
-                                        // Rule at src/isa/riscv64/lower.isle line 1187.
-                                        return Some(v1089);
-                                    }
-                                }
-                            }
-                            let v45 = C::def_inst(ctx, v38.1);
-                            if let Some(v46) = v45 {
-                                let v47 = &C::inst_data(ctx, v46);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v68,
-                                    arg: v69,
-                                } = v47
-                                {
-                                    if let &Opcode::Splat = v68 {
-                                        let v163 = constructor_put_in_vreg(ctx, v38.0);
-                                        let v951 = constructor_put_in_freg(ctx, v69);
-                                        let v165 = &constructor_unmasked(ctx);
-                                        let v166 = C::vstate_from_type(ctx, v11);
-                                        let v1086 =
-                                            constructor_rv_vfdiv_vf(ctx, v163, v951, v165, v166);
-                                        let v1087 = constructor_output_vreg(ctx, v1086);
-                                        // Rule at src/isa/riscv64/lower.isle line 1184.
-                                        return Some(v1087);
-                                    }
-                                }
-                            }
-                            let v163 = constructor_put_in_vreg(ctx, v38.0);
-                            let v164 = constructor_put_in_vreg(ctx, v38.1);
-                            let v165 = &constructor_unmasked(ctx);
-                            let v166 = C::vstate_from_type(ctx, v11);
-                            let v1084 = constructor_rv_vfdiv_vv(ctx, v163, v164, v165, v166);
-                            let v1085 = constructor_output_vreg(ctx, v1084);
-                            // Rule at src/isa/riscv64/lower.isle line 1181.
-                            return Some(v1085);
-                        }
-                        let v479 = C::ty_scalar_float(ctx, v3);
-                        if let Some(v480) = v479 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v482 = constructor_put_in_freg(ctx, v38.0);
-                            let v483 = constructor_put_in_freg(ctx, v38.1);
-                            let v1082 = constructor_rv_fdiv(ctx, v480, v482, v483);
-                            let v1083 = constructor_output_freg(ctx, v1082);
-                            // Rule at src/isa/riscv64/lower.isle line 1178.
-                            return Some(v1083);
-                        }
-                    }
-                }
-                &Opcode::Fcopysign => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
-                        if let Some(v11) = v10 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v45 = C::def_inst(ctx, v38.1);
-                            if let Some(v46) = v45 {
-                                let v47 = &C::inst_data(ctx, v46);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v68,
-                                    arg: v69,
-                                } = v47
-                                {
-                                    if let &Opcode::Splat = v68 {
-                                        let v163 = constructor_put_in_vreg(ctx, v38.0);
-                                        let v951 = constructor_put_in_freg(ctx, v69);
-                                        let v165 = &constructor_unmasked(ctx);
-                                        let v166 = C::vstate_from_type(ctx, v11);
-                                        let v952 =
-                                            constructor_rv_vfsgnj_vf(ctx, v163, v951, v165, v166);
-                                        let v953 = constructor_output_vreg(ctx, v952);
-                                        // Rule at src/isa/riscv64/lower.isle line 1013.
-                                        return Some(v953);
-                                    }
-                                }
-                            }
-                            let v163 = constructor_put_in_vreg(ctx, v38.0);
-                            let v164 = constructor_put_in_vreg(ctx, v38.1);
-                            let v165 = &constructor_unmasked(ctx);
-                            let v166 = C::vstate_from_type(ctx, v11);
-                            let v949 = constructor_rv_vfsgnj_vv(ctx, v163, v164, v165, v166);
-                            let v950 = constructor_output_vreg(ctx, v949);
-                            // Rule at src/isa/riscv64/lower.isle line 1010.
-                            return Some(v950);
-                        }
-                        let v479 = C::ty_scalar_float(ctx, v3);
-                        if let Some(v480) = v479 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v482 = constructor_put_in_freg(ctx, v38.0);
-                            let v483 = constructor_put_in_freg(ctx, v38.1);
-                            let v947 = constructor_rv_fsgnj(ctx, v480, v482, v483);
-                            let v948 = constructor_output_freg(ctx, v947);
-                            // Rule at src/isa/riscv64/lower.isle line 1007.
-                            return Some(v948);
-                        }
-                    }
-                }
-                &Opcode::Fmin => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
-                        if let Some(v11) = v10 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v1095 = constructor_gen_fcmp_mask(
-                                ctx,
-                                v11,
-                                &FloatCC::Ordered,
-                                v38.0,
-                                v38.1,
-                            );
-                            let v709 = C::lane_type(ctx, v11);
-                            let v1096 = constructor_canonical_nan_u64(ctx, v709);
-                            let v1097 = C::imm(ctx, I64, v1096);
-                            let v1098 = C::xreg_new(ctx, v1097);
-                            let v166 = C::vstate_from_type(ctx, v11);
-                            let v1099 = constructor_rv_vmv_vx(ctx, v1098, v166);
-                            let v1100 = constructor_put_in_vreg(ctx, v38.0);
-                            let v1101 = constructor_put_in_vreg(ctx, v38.1);
-                            let v165 = &constructor_unmasked(ctx);
-                            let v1102 = constructor_rv_vfmin_vv(ctx, v1100, v1101, v165, v166);
-                            let v1103 = constructor_rv_vmerge_vvm(ctx, v1099, v1102, v1095, v166);
-                            let v1104 = constructor_output_vreg(ctx, v1103);
-                            // Rule at src/isa/riscv64/lower.isle line 1201.
-                            return Some(v1104);
-                        }
-                        let v479 = C::ty_scalar_float(ctx, v3);
-                        if let Some(v480) = v479 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v1091 = C::put_in_reg(ctx, v38.0);
-                            let v65 = C::put_in_reg(ctx, v38.1);
-                            let v1092 = constructor_gen_float_select(
-                                ctx,
-                                &FloatSelectOP::Min,
-                                v1091,
-                                v65,
-                                v480,
-                            );
-                            let v1093 = constructor_output_reg(ctx, v1092);
-                            // Rule at src/isa/riscv64/lower.isle line 1192.
-                            return Some(v1093);
-                        }
-                    }
-                }
-                &Opcode::FminPseudo => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
-                        if let Some(v11) = v10 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v1114 = constructor_gen_fcmp_mask(
-                                ctx,
-                                v11,
-                                &FloatCC::LessThan,
-                                v38.1,
-                                v38.0,
-                            );
-                            let v1115 = constructor_put_in_vreg(ctx, v38.0);
-                            let v1116 = constructor_put_in_vreg(ctx, v38.1);
-                            let v166 = C::vstate_from_type(ctx, v11);
-                            let v1117 = constructor_rv_vmerge_vvm(ctx, v1115, v1116, v1114, v166);
-                            let v1118 = constructor_output_vreg(ctx, v1117);
-                            // Rule at src/isa/riscv64/lower.isle line 1231.
-                            return Some(v1118);
-                        }
-                        let v479 = C::ty_scalar_float(ctx, v3);
-                        if let Some(v480) = v479 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v1091 = C::put_in_reg(ctx, v38.0);
-                            let v65 = C::put_in_reg(ctx, v38.1);
-                            let v1111 = constructor_gen_float_select_pseudo(
-                                ctx,
-                                &FloatSelectOP::Min,
-                                v1091,
-                                v65,
-                                v480,
-                            );
-                            let v1112 = constructor_output_reg(ctx, v1111);
-                            // Rule at src/isa/riscv64/lower.isle line 1228.
-                            return Some(v1112);
-                        }
-                    }
-                }
-                &Opcode::Fmax => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
-                        if let Some(v11) = v10 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v1095 = constructor_gen_fcmp_mask(
-                                ctx,
-                                v11,
-                                &FloatCC::Ordered,
-                                v38.0,
-                                v38.1,
-                            );
-                            let v709 = C::lane_type(ctx, v11);
-                            let v1096 = constructor_canonical_nan_u64(ctx, v709);
-                            let v1097 = C::imm(ctx, I64, v1096);
-                            let v1098 = C::xreg_new(ctx, v1097);
-                            let v166 = C::vstate_from_type(ctx, v11);
-                            let v1099 = constructor_rv_vmv_vx(ctx, v1098, v166);
-                            let v1100 = constructor_put_in_vreg(ctx, v38.0);
-                            let v1101 = constructor_put_in_vreg(ctx, v38.1);
-                            let v165 = &constructor_unmasked(ctx);
-                            let v1108 = constructor_rv_vfmax_vv(ctx, v1100, v1101, v165, v166);
-                            let v1109 = constructor_rv_vmerge_vvm(ctx, v1099, v1108, v1095, v166);
-                            let v1110 = constructor_output_vreg(ctx, v1109);
-                            // Rule at src/isa/riscv64/lower.isle line 1219.
-                            return Some(v1110);
-                        }
-                        let v479 = C::ty_scalar_float(ctx, v3);
-                        if let Some(v480) = v479 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v1091 = C::put_in_reg(ctx, v38.0);
-                            let v65 = C::put_in_reg(ctx, v38.1);
-                            let v1106 = constructor_gen_float_select(
-                                ctx,
-                                &FloatSelectOP::Max,
-                                v1091,
-                                v65,
-                                v480,
-                            );
-                            let v1107 = constructor_output_reg(ctx, v1106);
-                            // Rule at src/isa/riscv64/lower.isle line 1210.
-                            return Some(v1107);
-                        }
-                    }
-                }
-                &Opcode::FmaxPseudo => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
-                        if let Some(v11) = v10 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v1121 = constructor_gen_fcmp_mask(
-                                ctx,
-                                v11,
-                                &FloatCC::LessThan,
-                                v38.0,
-                                v38.1,
-                            );
-                            let v1115 = constructor_put_in_vreg(ctx, v38.0);
-                            let v1116 = constructor_put_in_vreg(ctx, v38.1);
-                            let v166 = C::vstate_from_type(ctx, v11);
-                            let v1122 = constructor_rv_vmerge_vvm(ctx, v1115, v1116, v1121, v166);
-                            let v1123 = constructor_output_vreg(ctx, v1122);
-                            // Rule at src/isa/riscv64/lower.isle line 1240.
-                            return Some(v1123);
-                        }
-                        let v479 = C::ty_scalar_float(ctx, v3);
-                        if let Some(v480) = v479 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v1091 = C::put_in_reg(ctx, v38.0);
-                            let v65 = C::put_in_reg(ctx, v38.1);
-                            let v1119 = constructor_gen_float_select_pseudo(
-                                ctx,
-                                &FloatSelectOP::Max,
-                                v1091,
-                                v65,
-                                v480,
-                            );
-                            let v1120 = constructor_output_reg(ctx, v1119);
-                            // Rule at src/isa/riscv64/lower.isle line 1237.
-                            return Some(v1120);
-                        }
-                    }
-                }
-                &Opcode::Snarrow => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
-                        if let Some(v11) = v10 {
-                            let v1611 = C::ty_lane_count(ctx, v11);
-                            let v1653 = C::u64_udiv(ctx, v1611, 0x2);
-                            if let Some(v1654) = v1653 {
-                                let v1655 = constructor_u64_to_uimm5(ctx, v1654);
-                                if let Some(v1656) = v1655 {
-                                    let v1698 = constructor_u64_to_uimm5(ctx, 0x0);
-                                    if let Some(v1699) = v1698 {
-                                        let v38 = C::unpack_value_array_2(ctx, v37);
-                                        let v163 = constructor_put_in_vreg(ctx, v38.0);
-                                        let v165 = &constructor_unmasked(ctx);
-                                        let v1700 = C::ty_half_lanes(ctx, v11);
-                                        let v1701 = v1700?;
-                                        let v1702 = C::vstate_from_type(ctx, v1701);
-                                        let v1703 = C::vstate_mf2(ctx, v1702);
-                                        let v1704 =
-                                            constructor_rv_vnclip_wi(ctx, v163, v1699, v165, v1703);
-                                        let v1116 = constructor_put_in_vreg(ctx, v38.1);
-                                        let v1705 = constructor_rv_vnclip_wi(
-                                            ctx, v1116, v1699, v165, v1703,
-                                        );
-                                        let v166 = C::vstate_from_type(ctx, v11);
-                                        let v1706 = constructor_rv_vslideup_vvi(
-                                            ctx, v1704, v1705, v1656, v165, v166,
-                                        );
-                                        let v1707 = constructor_output_vreg(ctx, v1706);
-                                        // Rule at src/isa/riscv64/lower.isle line 1973.
-                                        return Some(v1707);
-                                    }
-                                }
-                            }
-                        }
-                    }
-                }
-                &Opcode::Unarrow => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
-                        if let Some(v11) = v10 {
-                            let v1611 = C::ty_lane_count(ctx, v11);
-                            let v1653 = C::u64_udiv(ctx, v1611, 0x2);
-                            if let Some(v1654) = v1653 {
-                                let v1655 = constructor_u64_to_uimm5(ctx, v1654);
-                                if let Some(v1656) = v1655 {
-                                    let v1698 = constructor_u64_to_uimm5(ctx, 0x0);
-                                    if let Some(v1699) = v1698 {
-                                        let v38 = C::unpack_value_array_2(ctx, v37);
-                                        let v163 = constructor_put_in_vreg(ctx, v38.0);
-                                        let v1568 = C::zero_reg(ctx);
-                                        let v1569 = C::xreg_new(ctx, v1568);
-                                        let v165 = &constructor_unmasked(ctx);
-                                        let v1697 = C::value_type(ctx, v38.0);
-                                        let v1712 = C::vstate_from_type(ctx, v1697);
-                                        let v1713 =
-                                            constructor_rv_vmax_vx(ctx, v163, v1569, v165, v1712);
-                                        let v1672 = constructor_put_in_vreg(ctx, v38.1);
-                                        let v1714 = C::zero_reg(ctx);
-                                        let v1715 = C::xreg_new(ctx, v1714);
-                                        let v1716 =
-                                            constructor_rv_vmax_vx(ctx, v1672, v1715, v165, v1712);
-                                        let v1700 = C::ty_half_lanes(ctx, v11);
-                                        let v1701 = v1700?;
-                                        let v1702 = C::vstate_from_type(ctx, v1701);
-                                        let v1703 = C::vstate_mf2(ctx, v1702);
-                                        let v1717 = constructor_rv_vnclipu_wi(
-                                            ctx, v1713, v1699, v165, v1703,
-                                        );
-                                        let v1718 = constructor_rv_vnclipu_wi(
-                                            ctx, v1716, v1699, v165, v1703,
-                                        );
-                                        let v166 = C::vstate_from_type(ctx, v11);
-                                        let v1719 = constructor_rv_vslideup_vvi(
-                                            ctx, v1717, v1718, v1656, v165, v166,
-                                        );
-                                        let v1720 = constructor_output_vreg(ctx, v1719);
-                                        // Rule at src/isa/riscv64/lower.isle line 1995.
-                                        return Some(v1720);
-                                    }
-                                }
-                            }
-                        }
-                    }
-                }
-                &Opcode::Uunarrow => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
-                        if let Some(v11) = v10 {
-                            let v1611 = C::ty_lane_count(ctx, v11);
-                            let v1653 = C::u64_udiv(ctx, v1611, 0x2);
-                            if let Some(v1654) = v1653 {
-                                let v1655 = constructor_u64_to_uimm5(ctx, v1654);
-                                if let Some(v1656) = v1655 {
-                                    let v1698 = constructor_u64_to_uimm5(ctx, 0x0);
-                                    if let Some(v1699) = v1698 {
-                                        let v38 = C::unpack_value_array_2(ctx, v37);
-                                        let v163 = constructor_put_in_vreg(ctx, v38.0);
-                                        let v165 = &constructor_unmasked(ctx);
-                                        let v1700 = C::ty_half_lanes(ctx, v11);
-                                        let v1701 = v1700?;
-                                        let v1702 = C::vstate_from_type(ctx, v1701);
-                                        let v1703 = C::vstate_mf2(ctx, v1702);
-                                        let v1708 = constructor_rv_vnclipu_wi(
-                                            ctx, v163, v1699, v165, v1703,
-                                        );
-                                        let v1116 = constructor_put_in_vreg(ctx, v38.1);
-                                        let v1709 = constructor_rv_vnclipu_wi(
-                                            ctx, v1116, v1699, v165, v1703,
-                                        );
-                                        let v166 = C::vstate_from_type(ctx, v11);
-                                        let v1710 = constructor_rv_vslideup_vvi(
-                                            ctx, v1708, v1709, v1656, v165, v166,
-                                        );
-                                        let v1711 = constructor_output_vreg(ctx, v1710);
-                                        // Rule at src/isa/riscv64/lower.isle line 1982.
-                                        return Some(v1711);
-                                    }
-                                }
-                            }
-                        }
-                    }
-                }
-                &Opcode::IaddPairwise => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
-                        if let Some(v11) = v10 {
-                            let v1611 = C::ty_lane_count(ctx, v11);
-                            let v1653 = C::u64_udiv(ctx, v1611, 0x2);
-                            if let Some(v1654) = v1653 {
-                                let v1655 = constructor_u64_to_uimm5(ctx, v1654);
-                                if let Some(v1656) = v1655 {
-                                    let v1657 = constructor_gen_vec_mask(ctx, 0x5555555555555555);
-                                    let v38 = C::unpack_value_array_2(ctx, v37);
-                                    let v1115 = constructor_put_in_vreg(ctx, v38.0);
-                                    let v166 = C::vstate_from_type(ctx, v11);
-                                    let v1658 =
-                                        constructor_rv_vcompress_vm(ctx, v1115, v1657, v166);
-                                    let v1659 = constructor_put_in_vreg(ctx, v38.1);
-                                    let v1660 =
-                                        constructor_rv_vcompress_vm(ctx, v1659, v1657, v166);
-                                    let v165 = &constructor_unmasked(ctx);
-                                    let v1661 = constructor_rv_vslideup_vvi(
-                                        ctx, v1658, v1660, v1656, v165, v166,
-                                    );
-                                    let v1663 = constructor_gen_vec_mask(ctx, 0xAAAAAAAAAAAAAAAA);
-                                    let v1664 = constructor_put_in_vreg(ctx, v38.0);
-                                    let v1665 =
-                                        constructor_rv_vcompress_vm(ctx, v1664, v1663, v166);
-                                    let v1666 = constructor_put_in_vreg(ctx, v38.1);
-                                    let v1667 =
-                                        constructor_rv_vcompress_vm(ctx, v1666, v1663, v166);
-                                    let v1668 = constructor_rv_vslideup_vvi(
-                                        ctx, v1665, v1667, v1656, v165, v166,
-                                    );
-                                    let v1669 =
-                                        constructor_rv_vadd_vv(ctx, v1661, v1668, v165, v166);
-                                    let v1670 = constructor_output_vreg(ctx, v1669);
-                                    // Rule at src/isa/riscv64/lower.isle line 1907.
-                                    return Some(v1670);
-                                }
-                            }
-                        }
-                    }
-                }
-                &Opcode::Iconcat => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        if v3 == I128 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v41 = constructor_put_in_xreg(ctx, v38.0);
-                            let v42 = constructor_put_in_xreg(ctx, v38.1);
-                            let v1196 = C::xreg_to_reg(ctx, v41);
-                            let v1197 = C::xreg_to_reg(ctx, v42);
-                            let v1198 = C::value_regs(ctx, v1196, v1197);
-                            let v1199 = C::output(ctx, v1198);
-                            // Rule at src/isa/riscv64/lower.isle line 1302.
-                            return Some(v1199);
-                        }
-                    }
-                }
-                _ => {}
-            }
-        }
-        &InstructionData::BinaryImm8 {
-            opcode: ref v1465,
-            arg: v1466,
-            imm: v1467,
-        } => {
-            if let &Opcode::Extractlane = v1465 {
-                let v1470 = constructor_put_in_vreg(ctx, v1466);
-                let v1468 = C::value_type(ctx, v1466);
-                let v1469 = C::u8_from_uimm8(ctx, v1467);
-                let v1471 = constructor_gen_extractlane(ctx, v1468, v1470, v1469);
-                let v1472 = constructor_output_reg(ctx, v1471);
-                // Rule at src/isa/riscv64/lower.isle line 1672.
-                return Some(v1472);
-            }
-        }
-        &InstructionData::Call {
-            opcode: ref v1445,
-            args: v1446,
-            func_ref: v1447,
-        } => {
-            match v1445 {
-                &Opcode::Call => {
-                    let v1449 = C::func_ref_data(ctx, v1447);
-                    let v1448 = C::value_list_slice(ctx, v1446);
-                    let v1453 = C::gen_call(ctx, v1449.0, v1449.1, v1449.2, v1448);
-                    // Rule at src/isa/riscv64/lower.isle line 1655.
-                    return Some(v1453);
-                }
-                &Opcode::ReturnCall => {
-                    let v1449 = C::func_ref_data(ctx, v1447);
-                    let v1448 = C::value_list_slice(ctx, v1446);
-                    let v1463 = C::gen_return_call(ctx, v1449.0, v1449.1, v1449.2, v1448);
-                    // Rule at src/isa/riscv64/lower.isle line 1663.
-                    return Some(v1463);
-                }
-                _ => {}
-            }
-        }
-        &InstructionData::CallIndirect {
-            opcode: ref v1454,
-            args: v1455,
-            sig_ref: v1456,
-        } => {
-            match v1454 {
-                &Opcode::CallIndirect => {
-                    let v1457 = C::value_list_slice(ctx, v1455);
-                    let v1458 = C::value_slice_unwrap(ctx, v1457);
-                    if let Some(v1459) = v1458 {
-                        let v1462 = C::gen_call_indirect(ctx, v1456, v1459.0, v1459.1);
-                        // Rule at src/isa/riscv64/lower.isle line 1658.
-                        return Some(v1462);
-                    }
-                }
-                &Opcode::ReturnCallIndirect => {
-                    let v1457 = C::value_list_slice(ctx, v1455);
-                    let v1458 = C::value_slice_unwrap(ctx, v1457);
-                    if let Some(v1459) = v1458 {
-                        let v1464 = C::gen_return_call_indirect(ctx, v1456, v1459.0, v1459.1);
-                        // Rule at src/isa/riscv64/lower.isle line 1666.
-                        return Some(v1464);
-                    }
-                }
-                _ => {}
-            }
-        }
-        &InstructionData::FloatCompare {
-            opcode: ref v1346,
-            args: ref v1347,
-            cond: ref v1348,
-        } => {
-            if let &Opcode::Fcmp = v1346 {
-                let v1349 = C::unpack_value_array_2(ctx, v1347);
-                let v1352 = C::value_type(ctx, v1349.0);
-                let v1360 = C::ty_vec_fits_in_register(ctx, v1352);
-                if let Some(v1361) = v1360 {
-                    let v1362 = constructor_gen_fcmp_mask(ctx, v1361, v1348, v1349.0, v1349.1);
-                    let v1363 = constructor_gen_expand_mask(ctx, v1361, v1362);
-                    let v1364 = constructor_output_vreg(ctx, v1363);
-                    // Rule at src/isa/riscv64/lower.isle line 1522.
-                    return Some(v1364);
-                }
-                let v1353 = C::ty_scalar_float(ctx, v1352);
-                if let Some(v1354) = v1353 {
-                    let v1355 = constructor_put_in_freg(ctx, v1349.0);
-                    let v1356 = constructor_put_in_freg(ctx, v1349.1);
-                    let v1357 = &constructor_emit_fcmp(ctx, v1348, v1354, v1355, v1356);
-                    let v1358 = constructor_cmp_value(ctx, v1357);
-                    let v1359 = constructor_output_xreg(ctx, v1358);
-                    // Rule at src/isa/riscv64/lower.isle line 1519.
-                    return Some(v1359);
-                }
-            }
-        }
-        &InstructionData::FuncAddr {
-            opcode: ref v1365,
-            func_ref: v1366,
-        } => {
-            if let &Opcode::FuncAddr = v1365 {
-                let v1367 = C::func_ref_data(ctx, v1366);
-                let v1372 = C::load_ext_name(ctx, v1367.1, 0x0);
-                let v1373 = constructor_output_reg(ctx, v1372);
-                // Rule at src/isa/riscv64/lower.isle line 1527.
-                return Some(v1373);
-            }
-        }
-        &InstructionData::IntAddTrap {
-            opcode: ref v294,
-            args: ref v295,
-            code: ref v296,
-        } => {
-            if let &Opcode::UaddOverflowTrap = v294 {
-                let v1 = C::first_result(ctx, arg0);
-                if let Some(v2) = v1 {
-                    let v3 = C::value_type(ctx, v2);
-                    let v292 = C::fits_in_64(ctx, v3);
-                    if let Some(v293) = v292 {
-                        let v297 = C::unpack_value_array_2(ctx, v295);
-                        let v300 = constructor_put_in_xreg(ctx, v297.0);
-                        let v301 = constructor_put_in_xreg(ctx, v297.1);
-                        let v302 = constructor_lower_uadd_overflow(ctx, v300, v301, v293);
-                        let v303 = C::value_regs_get(ctx, v302, 0x1);
-                        let v304 = C::xreg_new(ctx, v303);
-                        let v305 = constructor_gen_trapif(ctx, v304, v296);
-                        let v306 = C::value_regs_get(ctx, v302, 0x0);
-                        let v307 = constructor_output_reg(ctx, v306);
-                        // Rule at src/isa/riscv64/lower.isle line 255.
-                        return Some(v307);
-                    }
-                }
-            }
-        }
-        &InstructionData::IntCompare {
-            opcode: ref v1328,
-            args: ref v1329,
-            cond: ref v1330,
-        } => {
-            if let &Opcode::Icmp = v1328 {
-                let v1331 = C::unpack_value_array_2(ctx, v1329);
-                let v1334 = C::value_type(ctx, v1331.0);
-                let v1341 = C::ty_vec_fits_in_register(ctx, v1334);
-                if let Some(v1342) = v1341 {
-                    let v1343 = constructor_gen_icmp_mask(ctx, v1342, v1330, v1331.0, v1331.1);
-                    let v1344 = constructor_gen_expand_mask(ctx, v1342, v1343);
-                    let v1345 = constructor_output_vreg(ctx, v1344);
-                    // Rule at src/isa/riscv64/lower.isle line 1514.
-                    return Some(v1345);
-                }
-                let v1335 = C::ty_int(ctx, v1334);
-                if let Some(v1336) = v1335 {
-                    let v1337 = C::put_in_regs(ctx, v1331.0);
-                    let v1338 = C::put_in_regs(ctx, v1331.1);
-                    let v1339 = constructor_lower_icmp(ctx, v1330, v1337, v1338, v1336);
-                    let v1340 = constructor_output_reg(ctx, v1339);
-                    // Rule at src/isa/riscv64/lower.isle line 1511.
-                    return Some(v1340);
-                }
-            }
-        }
-        &InstructionData::Load {
-            opcode: ref v1252,
-            arg: v1253,
-            flags: v1254,
-            offset: v1255,
-        } => {
-            match v1252 {
-                &Opcode::Load => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v1256 = C::value_type(ctx, v1253);
-                        let v1257 = C::ty_addr64(ctx, v1256);
-                        if let Some(v1258) = v1257 {
-                            let v3 = C::value_type(ctx, v2);
-                            let v10 = C::ty_vec_fits_in_register(ctx, v3);
-                            if let Some(v11) = v10 {
-                                let v1259 = C::put_in_reg(ctx, v1253);
-                                let v1287 = C::gen_amode(ctx, v1259, v1255, I64);
-                                let v1286 = &constructor_element_width_from_type(ctx, v11);
-                                let v1288 = VecAMode::UnitStride { base: v1287 };
-                                let v165 = &constructor_unmasked(ctx);
-                                let v166 = C::vstate_from_type(ctx, v11);
-                                let v1289 =
-                                    constructor_vec_load(ctx, v1286, &v1288, v1254, v165, v166);
-                                let v1290 = constructor_output_reg(ctx, v1289);
-                                // Rule at src/isa/riscv64/lower.isle line 1423.
-                                return Some(v1290);
-                            }
-                            if v3 == I128 {
-                                let v1259 = C::put_in_reg(ctx, v1253);
-                                let v1284 = constructor_gen_load_128(ctx, v1259, v1255, v1254);
-                                let v1285 = C::output(ctx, v1284);
-                                // Rule at src/isa/riscv64/lower.isle line 1419.
-                                return Some(v1285);
-                            }
-                            let v1259 = C::put_in_reg(ctx, v1253);
-                            let v1281 = &C::load_op(ctx, v3);
-                            let v1282 = constructor_gen_load(ctx, v1259, v1255, v1281, v1254, v3);
-                            let v1283 = constructor_output_reg(ctx, v1282);
-                            // Rule at src/isa/riscv64/lower.isle line 1415.
-                            return Some(v1283);
-                        }
-                    }
-                }
-                &Opcode::Uload8 => {
-                    let v1256 = C::value_type(ctx, v1253);
-                    let v1257 = C::ty_addr64(ctx, v1256);
-                    if let Some(v1258) = v1257 {
-                        let v1259 = C::put_in_reg(ctx, v1253);
-                        let v1261 = &constructor_int_load_op(ctx, false, 0x8);
-                        let v1262 = constructor_gen_load(ctx, v1259, v1255, v1261, v1254, I64);
-                        let v1263 = constructor_output_reg(ctx, v1262);
-                        // Rule at src/isa/riscv64/lower.isle line 1388.
-                        return Some(v1263);
-                    }
-                }
-                &Opcode::Sload8 => {
-                    let v1256 = C::value_type(ctx, v1253);
-                    let v1257 = C::ty_addr64(ctx, v1256);
-                    if let Some(v1258) = v1257 {
-                        let v1259 = C::put_in_reg(ctx, v1253);
-                        let v1264 = &constructor_int_load_op(ctx, true, 0x8);
-                        let v1265 = constructor_gen_load(ctx, v1259, v1255, v1264, v1254, I64);
-                        let v1266 = constructor_output_reg(ctx, v1265);
-                        // Rule at src/isa/riscv64/lower.isle line 1392.
-                        return Some(v1266);
-                    }
-                }
-                &Opcode::Uload16 => {
-                    let v1256 = C::value_type(ctx, v1253);
-                    let v1257 = C::ty_addr64(ctx, v1256);
-                    if let Some(v1258) = v1257 {
-                        let v1259 = C::put_in_reg(ctx, v1253);
-                        let v1268 = &constructor_int_load_op(ctx, false, 0x10);
-                        let v1269 = constructor_gen_load(ctx, v1259, v1255, v1268, v1254, I64);
-                        let v1270 = constructor_output_reg(ctx, v1269);
-                        // Rule at src/isa/riscv64/lower.isle line 1396.
-                        return Some(v1270);
-                    }
-                }
-                &Opcode::Sload16 => {
-                    let v1256 = C::value_type(ctx, v1253);
-                    let v1257 = C::ty_addr64(ctx, v1256);
-                    if let Some(v1258) = v1257 {
-                        let v1259 = C::put_in_reg(ctx, v1253);
-                        let v1271 = &constructor_int_load_op(ctx, true, 0x10);
-                        let v1272 = constructor_gen_load(ctx, v1259, v1255, v1271, v1254, I64);
-                        let v1273 = constructor_output_reg(ctx, v1272);
-                        // Rule at src/isa/riscv64/lower.isle line 1401.
-                        return Some(v1273);
-                    }
-                }
-                &Opcode::Uload32 => {
-                    let v1256 = C::value_type(ctx, v1253);
-                    let v1257 = C::ty_addr64(ctx, v1256);
-                    if let Some(v1258) = v1257 {
-                        let v1259 = C::put_in_reg(ctx, v1253);
-                        let v1275 = &constructor_int_load_op(ctx, false, 0x20);
-                        let v1276 = constructor_gen_load(ctx, v1259, v1255, v1275, v1254, I64);
-                        let v1277 = constructor_output_reg(ctx, v1276);
-                        // Rule at src/isa/riscv64/lower.isle line 1406.
-                        return Some(v1277);
-                    }
-                }
-                &Opcode::Sload32 => {
-                    let v1256 = C::value_type(ctx, v1253);
-                    let v1257 = C::ty_addr64(ctx, v1256);
-                    if let Some(v1258) = v1257 {
-                        let v1259 = C::put_in_reg(ctx, v1253);
-                        let v1278 = &constructor_int_load_op(ctx, true, 0x20);
-                        let v1279 = constructor_gen_load(ctx, v1259, v1255, v1278, v1254, I64);
-                        let v1280 = constructor_output_reg(ctx, v1279);
-                        // Rule at src/isa/riscv64/lower.isle line 1411.
-                        return Some(v1280);
-                    }
-                }
-                &Opcode::Uload8x8 => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
-                        if let Some(v11) = v10 {
-                            if v11 == I16X8 {
-                                let v1256 = C::value_type(ctx, v1253);
-                                let v1257 = C::ty_addr64(ctx, v1256);
-                                if let Some(v1258) = v1257 {
-                                    let v1291 = constructor_put_in_xreg(ctx, v1253);
-                                    let v1292 = constructor_gen_load64_extend(
-                                        ctx,
-                                        v11,
-                                        &ExtendOp::Zero,
-                                        v1254,
-                                        v1291,
-                                        v1255,
-                                    );
-                                    let v1293 = constructor_output_vreg(ctx, v1292);
-                                    // Rule at src/isa/riscv64/lower.isle line 1450.
-                                    return Some(v1293);
-                                }
-                            }
-                        }
-                    }
-                }
-                &Opcode::Sload8x8 => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
-                        if let Some(v11) = v10 {
-                            if v11 == I16X8 {
-                                let v1256 = C::value_type(ctx, v1253);
-                                let v1257 = C::ty_addr64(ctx, v1256);
-                                if let Some(v1258) = v1257 {
-                                    let v1291 = constructor_put_in_xreg(ctx, v1253);
-                                    let v1294 = constructor_gen_load64_extend(
-                                        ctx,
-                                        v11,
-                                        &ExtendOp::Signed,
-                                        v1254,
-                                        v1291,
-                                        v1255,
-                                    );
-                                    let v1295 = constructor_output_vreg(ctx, v1294);
-                                    // Rule at src/isa/riscv64/lower.isle line 1462.
-                                    return Some(v1295);
-                                }
-                            }
-                        }
-                    }
-                }
-                &Opcode::Uload16x4 => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
-                        if let Some(v11) = v10 {
-                            if v11 == I32X4 {
-                                let v1256 = C::value_type(ctx, v1253);
-                                let v1257 = C::ty_addr64(ctx, v1256);
-                                if let Some(v1258) = v1257 {
-                                    let v1291 = constructor_put_in_xreg(ctx, v1253);
-                                    let v1292 = constructor_gen_load64_extend(
-                                        ctx,
-                                        v11,
-                                        &ExtendOp::Zero,
-                                        v1254,
-                                        v1291,
-                                        v1255,
-                                    );
-                                    let v1293 = constructor_output_vreg(ctx, v1292);
-                                    // Rule at src/isa/riscv64/lower.isle line 1454.
-                                    return Some(v1293);
-                                }
-                            }
-                        }
-                    }
-                }
-                &Opcode::Sload16x4 => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
-                        if let Some(v11) = v10 {
-                            if v11 == I32X4 {
-                                let v1256 = C::value_type(ctx, v1253);
-                                let v1257 = C::ty_addr64(ctx, v1256);
-                                if let Some(v1258) = v1257 {
-                                    let v1291 = constructor_put_in_xreg(ctx, v1253);
-                                    let v1294 = constructor_gen_load64_extend(
-                                        ctx,
-                                        v11,
-                                        &ExtendOp::Signed,
-                                        v1254,
-                                        v1291,
-                                        v1255,
-                                    );
-                                    let v1295 = constructor_output_vreg(ctx, v1294);
-                                    // Rule at src/isa/riscv64/lower.isle line 1466.
-                                    return Some(v1295);
-                                }
-                            }
-                        }
-                    }
-                }
-                &Opcode::Uload32x2 => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
-                        if let Some(v11) = v10 {
-                            if v11 == I64X2 {
-                                let v1256 = C::value_type(ctx, v1253);
-                                let v1257 = C::ty_addr64(ctx, v1256);
-                                if let Some(v1258) = v1257 {
-                                    let v1291 = constructor_put_in_xreg(ctx, v1253);
-                                    let v1292 = constructor_gen_load64_extend(
-                                        ctx,
-                                        v11,
-                                        &ExtendOp::Zero,
-                                        v1254,
-                                        v1291,
-                                        v1255,
-                                    );
-                                    let v1293 = constructor_output_vreg(ctx, v1292);
-                                    // Rule at src/isa/riscv64/lower.isle line 1458.
-                                    return Some(v1293);
-                                }
-                            }
-                        }
-                    }
-                }
-                &Opcode::Sload32x2 => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
-                        if let Some(v11) = v10 {
-                            if v11 == I64X2 {
-                                let v1256 = C::value_type(ctx, v1253);
-                                let v1257 = C::ty_addr64(ctx, v1256);
-                                if let Some(v1258) = v1257 {
-                                    let v1291 = constructor_put_in_xreg(ctx, v1253);
-                                    let v1294 = constructor_gen_load64_extend(
-                                        ctx,
-                                        v11,
-                                        &ExtendOp::Signed,
-                                        v1254,
-                                        v1291,
-                                        v1255,
-                                    );
-                                    let v1295 = constructor_output_vreg(ctx, v1294);
-                                    // Rule at src/isa/riscv64/lower.isle line 1470.
-                                    return Some(v1295);
-                                }
-                            }
-                        }
-                    }
-                }
-                _ => {}
-            }
-        }
-        &InstructionData::LoadNoOffset {
-            opcode: ref v1012,
-            arg: v1013,
-            flags: v1014,
-        } => {
-            match v1012 {
-                &Opcode::Bitcast => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v1015 = C::put_in_reg(ctx, v1013);
-                        let v1402 = C::value_type(ctx, v1013);
-                        let v3 = C::value_type(ctx, v2);
-                        let v1403 = constructor_gen_bitcast(ctx, v1015, v1402, v3);
-                        let v1404 = constructor_output_reg(ctx, v1403);
-                        // Rule at src/isa/riscv64/lower.isle line 1571.
-                        return Some(v1404);
-                    }
-                }
-                &Opcode::AtomicLoad => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v969 = C::valid_atomic_transaction(ctx, v3);
-                        if let Some(v970) = v969 {
-                            let v1015 = C::put_in_reg(ctx, v1013);
-                            let v1016 = constructor_gen_atomic_load(ctx, v1015, v970);
-                            let v1017 = constructor_output_reg(ctx, v1016);
-                            // Rule at src/isa/riscv64/lower.isle line 1085.
-                            return Some(v1017);
-                        }
-                    }
-                }
-                _ => {}
-            }
-        }
-        &InstructionData::MultiAry {
-            opcode: ref v1427,
-            args: v1428,
-        } => {
-            if let &Opcode::Return = v1427 {
-                let v1429 = C::value_list_slice(ctx, v1428);
-                let v1430 = constructor_lower_return(ctx, v1429);
-                // Rule at src/isa/riscv64/lower.isle line 1620.
-                return Some(v1430);
-            }
-        }
-        &InstructionData::NullAry { opcode: ref v30 } => {
-            match v30 {
-                &Opcode::Debugtrap => {
-                    let v1243 = SideEffectNoResult::Inst {
-                        inst: MInst::EBreak,
-                    };
-                    let v1244 = constructor_side_effect(ctx, &v1243);
-                    // Rule at src/isa/riscv64/lower.isle line 1368.
-                    return Some(v1244);
-                }
-                &Opcode::GetFramePointer => {
-                    let v1431 = C::fp_reg(ctx);
-                    let v1432 = constructor_gen_mov_from_preg(ctx, v1431);
-                    let v1433 = constructor_output_reg(ctx, v1432);
-                    // Rule at src/isa/riscv64/lower.isle line 1625.
-                    return Some(v1433);
-                }
-                &Opcode::GetStackPointer => {
-                    let v1434 = C::sp_reg(ctx);
-                    let v1435 = constructor_gen_mov_from_preg(ctx, v1434);
-                    let v1436 = constructor_output_reg(ctx, v1435);
-                    // Rule at src/isa/riscv64/lower.isle line 1628.
-                    return Some(v1436);
-                }
-                &Opcode::GetReturnAddress => {
-                    let v1437 = C::load_ra(ctx);
-                    let v1438 = constructor_output_reg(ctx, v1437);
-                    // Rule at src/isa/riscv64/lower.isle line 1631.
-                    return Some(v1438);
-                }
-                &Opcode::Null => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v32 = C::imm(ctx, v3, 0x0);
-                        let v33 = constructor_output_reg(ctx, v32);
-                        // Rule at src/isa/riscv64/lower.isle line 29.
-                        return Some(v33);
-                    }
-                }
-                &Opcode::Fence => {
-                    let v1246 = MInst::Fence {
-                        pred: 0xF,
-                        succ: 0xF,
-                    };
-                    let v1247 = SideEffectNoResult::Inst { inst: v1246 };
-                    let v1248 = constructor_side_effect(ctx, &v1247);
-                    // Rule at src/isa/riscv64/lower.isle line 1373.
-                    return Some(v1248);
-                }
-                _ => {}
-            }
-        }
-        &InstructionData::Shuffle {
-            opcode: ref v1585,
-            args: ref v1586,
-            imm: v1587,
-        } => {
-            if let &Opcode::Shuffle = v1585 {
-                let v1 = C::first_result(ctx, arg0);
-                if let Some(v2) = v1 {
-                    let v3 = C::value_type(ctx, v2);
-                    let v10 = C::ty_vec_fits_in_register(ctx, v3);
-                    if let Some(v11) = v10 {
-                        if v11 == I8X16 {
-                            let v1591 = C::vconst_from_immediate(ctx, v1587);
-                            if let Some(v1592) = v1591 {
-                                let v1594 = C::imm5_from_i8(ctx, -0x10);
-                                if let Some(v1595) = v1594 {
-                                    let v1596 = constructor_gen_constant(ctx, v11, v1592);
-                                    let v1588 = C::unpack_value_array_2(ctx, v1586);
-                                    let v1597 = constructor_put_in_vreg(ctx, v1588.0);
-                                    let v165 = &constructor_unmasked(ctx);
-                                    let v166 = C::vstate_from_type(ctx, v11);
-                                    let v1598 =
-                                        constructor_rv_vrgather_vv(ctx, v1597, v1596, v165, v166);
-                                    let v1599 =
-                                        constructor_rv_vadd_vi(ctx, v1596, v1595, v165, v166);
-                                    let v1600 = constructor_put_in_vreg(ctx, v1588.1);
-                                    let v1601 =
-                                        constructor_rv_vrgather_vv(ctx, v1600, v1599, v165, v166);
-                                    let v1602 =
-                                        constructor_rv_vor_vv(ctx, v1598, v1601, v165, v166);
-                                    let v1603 = constructor_output_vreg(ctx, v1602);
-                                    // Rule at src/isa/riscv64/lower.isle line 1834.
-                                    return Some(v1603);
-                                }
-                            }
-                        }
-                    }
-                }
-            }
-        }
-        &InstructionData::StackLoad {
-            opcode: ref v1124,
-            stack_slot: v1125,
-            offset: v1126,
-        } => {
-            if let &Opcode::StackAddr = v1124 {
-                let v1127 = C::gen_stack_addr(ctx, v1125, v1126);
-                let v1128 = constructor_output_reg(ctx, v1127);
-                // Rule at src/isa/riscv64/lower.isle line 1246.
-                return Some(v1128);
-            }
-        }
-        &InstructionData::Store {
-            opcode: ref v1296,
-            args: ref v1297,
-            flags: v1298,
-            offset: v1299,
-        } => {
-            match v1296 {
-                &Opcode::Store => {
-                    let v1300 = C::unpack_value_array_2(ctx, v1297);
-                    let v1303 = C::value_type(ctx, v1300.1);
-                    let v1304 = C::ty_addr64(ctx, v1303);
-                    if let Some(v1305) = v1304 {
-                        let v1314 = C::value_type(ctx, v1300.0);
-                        let v1320 = C::ty_vec_fits_in_register(ctx, v1314);
-                        if let Some(v1321) = v1320 {
-                            let v1306 = C::put_in_reg(ctx, v1300.1);
-                            let v1323 = C::gen_amode(ctx, v1306, v1299, I64);
-                            let v1325 = constructor_put_in_vreg(ctx, v1300.0);
-                            let v1322 = &constructor_element_width_from_type(ctx, v1321);
-                            let v1324 = VecAMode::UnitStride { base: v1323 };
-                            let v165 = &constructor_unmasked(ctx);
-                            let v1326 = C::vstate_from_type(ctx, v1321);
-                            let v1327 = constructor_vec_store(
-                                ctx, v1322, &v1324, v1325, v1298, v165, v1326,
-                            );
-                            // Rule at src/isa/riscv64/lower.isle line 1497.
-                            return Some(v1327);
-                        }
-                        if v1314 == I128 {
-                            let v1306 = C::put_in_reg(ctx, v1300.1);
-                            let v1318 = C::put_in_regs(ctx, v1300.0);
-                            let v1319 = constructor_gen_store_128(ctx, v1306, v1299, v1298, v1318);
-                            // Rule at src/isa/riscv64/lower.isle line 1493.
-                            return Some(v1319);
-                        }
-                        let v1306 = C::put_in_reg(ctx, v1300.1);
-                        let v1315 = &C::store_op(ctx, v1314);
-                        let v1316 = C::put_in_reg(ctx, v1300.0);
-                        let v1317 = constructor_gen_store(ctx, v1306, v1299, v1315, v1298, v1316);
-                        // Rule at src/isa/riscv64/lower.isle line 1489.
-                        return Some(v1317);
-                    }
-                }
-                &Opcode::Istore8 => {
-                    let v1300 = C::unpack_value_array_2(ctx, v1297);
-                    let v1303 = C::value_type(ctx, v1300.1);
-                    let v1304 = C::ty_addr64(ctx, v1303);
-                    if let Some(v1305) = v1304 {
-                        let v1306 = C::put_in_reg(ctx, v1300.1);
-                        let v1308 = C::put_in_reg(ctx, v1300.0);
-                        let v1309 =
-                            constructor_gen_store(ctx, v1306, v1299, &StoreOP::Sb, v1298, v1308);
-                        // Rule at src/isa/riscv64/lower.isle line 1475.
-                        return Some(v1309);
-                    }
-                }
-                &Opcode::Istore16 => {
-                    let v1300 = C::unpack_value_array_2(ctx, v1297);
-                    let v1303 = C::value_type(ctx, v1300.1);
-                    let v1304 = C::ty_addr64(ctx, v1303);
-                    if let Some(v1305) = v1304 {
-                        let v1306 = C::put_in_reg(ctx, v1300.1);
-                        let v1308 = C::put_in_reg(ctx, v1300.0);
-                        let v1311 =
-                            constructor_gen_store(ctx, v1306, v1299, &StoreOP::Sh, v1298, v1308);
-                        // Rule at src/isa/riscv64/lower.isle line 1479.
-                        return Some(v1311);
-                    }
-                }
-                &Opcode::Istore32 => {
-                    let v1300 = C::unpack_value_array_2(ctx, v1297);
-                    let v1303 = C::value_type(ctx, v1300.1);
-                    let v1304 = C::ty_addr64(ctx, v1303);
-                    if let Some(v1305) = v1304 {
-                        let v1306 = C::put_in_reg(ctx, v1300.1);
-                        let v1308 = C::put_in_reg(ctx, v1300.0);
-                        let v1313 =
-                            constructor_gen_store(ctx, v1306, v1299, &StoreOP::Sw, v1298, v1308);
-                        // Rule at src/isa/riscv64/lower.isle line 1484.
-                        return Some(v1313);
-                    }
-                }
-                _ => {}
-            }
-        }
-        &InstructionData::StoreNoOffset {
-            opcode: ref v1018,
-            args: ref v1019,
-            flags: v1020,
-        } => {
-            if let &Opcode::AtomicStore = v1018 {
-                let v1021 = C::unpack_value_array_2(ctx, v1019);
-                let v1024 = C::value_type(ctx, v1021.0);
-                let v1025 = C::valid_atomic_transaction(ctx, v1024);
-                if let Some(v1026) = v1025 {
-                    let v1027 = C::put_in_reg(ctx, v1021.1);
-                    let v1028 = C::put_in_reg(ctx, v1021.0);
-                    let v1029 = constructor_gen_atomic_store(ctx, v1027, v1026, v1028);
-                    // Rule at src/isa/riscv64/lower.isle line 1091.
-                    return Some(v1029);
-                }
-            }
-        }
-        &InstructionData::Ternary {
-            opcode: ref v954,
-            args: ref v955,
-        } => {
-            match v954 {
-                &Opcode::Select => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v292 = C::fits_in_64(ctx, v3);
-                        if let Some(v293) = v292 {
-                            let v956 = C::unpack_value_array_3(ctx, v955);
-                            let v1145 = C::def_inst(ctx, v956.0);
-                            if let Some(v1146) = v1145 {
-                                let v1147 = &C::inst_data(ctx, v1146);
-                                if let &InstructionData::IntCompare {
-                                    opcode: ref v1148,
-                                    args: ref v1149,
-                                    cond: ref v1150,
-                                } = v1147
-                                {
-                                    if let &Opcode::Icmp = v1148 {
-                                        let v1151 = C::unpack_value_array_2(ctx, v1149);
-                                        let v1154 = C::value_type(ctx, v1151.1);
-                                        let v1155 = C::fits_in_64(ctx, v1154);
-                                        if let Some(v1156) = v1155 {
-                                            let v1157 = C::put_in_regs(ctx, v1151.0);
-                                            let v1158 = &C::intcc_to_extend_op(ctx, v1150);
-                                            let v1159 = constructor_normalize_cmp_value(
-                                                ctx, v1156, v1157, v1158,
-                                            );
-                                            let v1160 =
-                                                constructor_truthy_to_reg(ctx, v1156, v1159);
-                                            let v1161 = C::put_in_regs(ctx, v1151.1);
-                                            let v1162 = &C::intcc_to_extend_op(ctx, v1150);
-                                            let v1163 = constructor_normalize_cmp_value(
-                                                ctx, v1156, v1161, v1162,
-                                            );
-                                            let v1164 =
-                                                constructor_truthy_to_reg(ctx, v1156, v1163);
-                                            let v1165 = C::put_in_reg(ctx, v956.1);
-                                            let v1166 = C::put_in_reg(ctx, v956.2);
-                                            let v1167 = C::gen_select_reg(
-                                                ctx, v1150, v1160, v1164, v1165, v1166,
-                                            );
-                                            let v1168 = constructor_output_reg(ctx, v1167);
-                                            // Rule at src/isa/riscv64/lower.isle line 1266.
-                                            return Some(v1168);
-                                        }
-                                    }
-                                }
-                            }
-                        }
-                        let v956 = C::unpack_value_array_3(ctx, v955);
-                        let v1137 = C::put_in_regs(ctx, v956.0);
-                        let v1136 = C::value_type(ctx, v956.0);
-                        let v1138 =
-                            constructor_normalize_cmp_value(ctx, v1136, v1137, &ExtendOp::Zero);
-                        let v1139 = constructor_truthy_to_reg(ctx, v1136, v1138);
-                        let v1141 = C::put_in_regs(ctx, v956.1);
-                        let v1142 = C::put_in_regs(ctx, v956.2);
-                        let v1140 = C::xreg_to_reg(ctx, v1139);
-                        let v1143 = constructor_gen_select(ctx, v3, v1140, v1141, v1142);
-                        let v1144 = C::output(ctx, v1143);
-                        // Rule at src/isa/riscv64/lower.isle line 1263.
-                        return Some(v1144);
-                    }
-                }
-                &Opcode::SelectSpectreGuard => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v956 = C::unpack_value_array_3(ctx, v955);
-                        let v1137 = C::put_in_regs(ctx, v956.0);
-                        let v1417 = C::value_type(ctx, v956.1);
-                        let v1136 = C::value_type(ctx, v956.0);
-                        let v1418 = constructor_lower_bmask(ctx, v1417, v1136, v1137);
-                        let v1419 = C::put_in_regs(ctx, v956.1);
-                        let v1420 = constructor_gen_and(ctx, v1417, v1419, v1418);
-                        let v1142 = C::put_in_regs(ctx, v956.2);
-                        let v1421 = constructor_gen_bnot(ctx, v1417, v1418);
-                        let v1422 = constructor_gen_and(ctx, v1417, v1142, v1421);
-                        let v1423 = constructor_gen_or(ctx, v1417, v1420, v1422);
-                        let v1424 = C::output(ctx, v1423);
-                        // Rule at src/isa/riscv64/lower.isle line 1602.
-                        return Some(v1424);
-                    }
-                }
-                &Opcode::Bitselect => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
-                        if let Some(v11) = v10 {
-                            let v956 = C::unpack_value_array_3(ctx, v955);
-                            let v1178 = constructor_put_in_vreg(ctx, v956.0);
-                            let v1179 = constructor_put_in_vreg(ctx, v956.1);
-                            let v165 = &constructor_unmasked(ctx);
-                            let v166 = C::vstate_from_type(ctx, v11);
-                            let v1180 = constructor_rv_vand_vv(ctx, v1178, v1179, v165, v166);
-                            let v1181 = constructor_put_in_vreg(ctx, v956.0);
-                            let v1182 = constructor_rv_vnot_v(ctx, v1181, v165, v166);
-                            let v1183 = constructor_put_in_vreg(ctx, v956.2);
-                            let v1184 = constructor_rv_vand_vv(ctx, v1182, v1183, v165, v166);
-                            let v1185 = constructor_rv_vor_vv(ctx, v1180, v1184, v165, v166);
-                            let v1186 = constructor_output_vreg(ctx, v1185);
-                            // Rule at src/isa/riscv64/lower.isle line 1286.
-                            return Some(v1186);
-                        }
-                        let v34 = C::ty_int_ref_scalar_64_extract(ctx, v3);
-                        if let Some(v35) = v34 {
-                            let v956 = C::unpack_value_array_3(ctx, v955);
-                            let v1169 = constructor_put_in_xreg(ctx, v956.0);
-                            let v1170 = constructor_put_in_xreg(ctx, v956.1);
-                            let v1171 = constructor_rv_and(ctx, v1169, v1170);
-                            let v1172 = constructor_put_in_xreg(ctx, v956.0);
-                            let v1173 = constructor_rv_not(ctx, v1172);
-                            let v1174 = constructor_put_in_xreg(ctx, v956.2);
-                            let v1175 = constructor_rv_and(ctx, v1173, v1174);
-                            let v1176 = constructor_rv_or(ctx, v1171, v1175);
-                            let v1177 = constructor_output_xreg(ctx, v1176);
-                            // Rule at src/isa/riscv64/lower.isle line 1275.
-                            return Some(v1177);
-                        }
-                    }
-                }
-                &Opcode::Fma => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v956 = C::unpack_value_array_3(ctx, v955);
-                        let v960 = constructor_put_in_freg(ctx, v956.0);
-                        let v961 = constructor_put_in_freg(ctx, v956.1);
-                        let v962 = constructor_put_in_freg(ctx, v956.2);
-                        let v3 = C::value_type(ctx, v2);
-                        let v963 = constructor_rv_fmadd(ctx, v3, v960, v961, v962);
-                        let v964 = constructor_output_freg(ctx, v963);
-                        // Rule at src/isa/riscv64/lower.isle line 1017.
-                        return Some(v964);
-                    }
-                }
-                _ => {}
-            }
-        }
-        &InstructionData::TernaryImm8 {
-            opcode: ref v1473,
-            args: ref v1474,
-            imm: v1475,
-        } => {
-            if let &Opcode::Insertlane = v1473 {
-                let v1476 = C::unpack_value_array_2(ctx, v1474);
-                let v1479 = C::value_type(ctx, v1476.0);
-                let v1480 = C::ty_vec_fits_in_register(ctx, v1479);
-                if let Some(v1481) = v1480 {
-                    let v1499 = C::def_inst(ctx, v1476.1);
-                    if let Some(v1500) = v1499 {
-                        let v1501 = &C::inst_data(ctx, v1500);
-                        if let &InstructionData::UnaryImm {
-                            opcode: ref v1502,
-                            imm: v1503,
-                        } = v1501
-                        {
-                            if let &Opcode::Iconst = v1502 {
-                                let v1504 = C::u64_from_imm64(ctx, v1503);
-                                let v1505 = C::imm5_from_u64(ctx, v1504);
-                                if let Some(v1506) = v1505 {
-                                    let v1485 = C::u8_from_uimm8(ctx, v1475);
-                                    let v1486 = C::u8_as_u64(ctx, v1485);
-                                    let v1487 = C::u64_shl(ctx, 0x1, v1486);
-                                    let v1488 = constructor_gen_vec_mask(ctx, v1487);
-                                    let v1489 = constructor_put_in_vreg(ctx, v1476.0);
-                                    let v1491 = C::vstate_from_type(ctx, v1481);
-                                    let v1507 =
-                                        constructor_rv_vmerge_vim(ctx, v1489, v1506, v1488, v1491);
-                                    let v1508 = constructor_output_vreg(ctx, v1507);
-                                    // Rule at src/isa/riscv64/lower.isle line 1695.
-                                    return Some(v1508);
-                                }
-                            }
-                        }
-                    }
-                    let v1482 = C::value_type(ctx, v1476.1);
-                    let v1494 = C::ty_scalar_float(ctx, v1482);
-                    if let Some(v1495) = v1494 {
-                        let v1485 = C::u8_from_uimm8(ctx, v1475);
-                        let v1486 = C::u8_as_u64(ctx, v1485);
-                        let v1487 = C::u64_shl(ctx, 0x1, v1486);
-                        let v1488 = constructor_gen_vec_mask(ctx, v1487);
-                        let v1489 = constructor_put_in_vreg(ctx, v1476.0);
-                        let v1496 = constructor_put_in_freg(ctx, v1476.1);
-                        let v1491 = C::vstate_from_type(ctx, v1481);
-                        let v1497 = constructor_rv_vfmerge_vfm(ctx, v1489, v1496, v1488, v1491);
-                        let v1498 = constructor_output_vreg(ctx, v1497);
-                        // Rule at src/isa/riscv64/lower.isle line 1687.
-                        return Some(v1498);
-                    }
-                    let v1483 = C::ty_int(ctx, v1482);
-                    if let Some(v1484) = v1483 {
-                        let v1485 = C::u8_from_uimm8(ctx, v1475);
-                        let v1486 = C::u8_as_u64(ctx, v1485);
-                        let v1487 = C::u64_shl(ctx, 0x1, v1486);
-                        let v1488 = constructor_gen_vec_mask(ctx, v1487);
-                        let v1489 = constructor_put_in_vreg(ctx, v1476.0);
-                        let v1490 = constructor_put_in_xreg(ctx, v1476.1);
-                        let v1491 = C::vstate_from_type(ctx, v1481);
-                        let v1492 = constructor_rv_vmerge_vxm(ctx, v1489, v1490, v1488, v1491);
-                        let v1493 = constructor_output_vreg(ctx, v1492);
-                        // Rule at src/isa/riscv64/lower.isle line 1680.
-                        return Some(v1493);
-                    }
-                }
-            }
-        }
-        &InstructionData::Trap {
-            opcode: ref v1249,
-            code: ref v1250,
-        } => {
-            match v1249 {
-                &Opcode::Trap => {
-                    let v1251 = constructor_udf(ctx, v1250);
-                    // Rule at src/isa/riscv64/lower.isle line 1378.
-                    return Some(v1251);
-                }
-                &Opcode::ResumableTrap => {
-                    let v1251 = constructor_udf(ctx, v1250);
-                    // Rule at src/isa/riscv64/lower.isle line 1383.
-                    return Some(v1251);
-                }
-                _ => {}
-            }
-        }
-        &InstructionData::Unary {
-            opcode: ref v365,
-            arg: v366,
-        } => {
-            match v365 {
-                &Opcode::Splat => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v643 = C::def_inst(ctx, v366);
-                        if let Some(v644) = v643 {
-                            let v648 = &C::inst_data(ctx, v644);
-                            if let &InstructionData::UnaryImm {
-                                opcode: ref v1518,
-                                imm: v1519,
-                            } = v648
-                            {
-                                if let &Opcode::Iconst = v1518 {
-                                    let v1520 = C::u64_from_imm64(ctx, v1519);
-                                    let v1521 = C::imm5_from_u64(ctx, v1520);
-                                    if let Some(v1522) = v1521 {
-                                        let v3 = C::value_type(ctx, v2);
-                                        let v1511 = C::vstate_from_type(ctx, v3);
-                                        let v1523 = constructor_rv_vmv_vi(ctx, v1522, v1511);
-                                        let v1524 = constructor_output_vreg(ctx, v1523);
-                                        // Rule at src/isa/riscv64/lower.isle line 1709.
-                                        return Some(v1524);
-                                    }
-                                }
-                            }
-                        }
-                        let v636 = C::value_type(ctx, v366);
-                        let v1514 = C::ty_int_ref_scalar_64_extract(ctx, v636);
-                        if let Some(v1515) = v1514 {
-                            let v610 = constructor_put_in_xreg(ctx, v366);
-                            let v3 = C::value_type(ctx, v2);
-                            let v1511 = C::vstate_from_type(ctx, v3);
-                            let v1516 = constructor_rv_vmv_vx(ctx, v610, v1511);
-                            let v1517 = constructor_output_vreg(ctx, v1516);
-                            // Rule at src/isa/riscv64/lower.isle line 1706.
-                            return Some(v1517);
-                        }
-                        let v1509 = C::ty_scalar_float(ctx, v636);
-                        if let Some(v1510) = v1509 {
-                            let v938 = constructor_put_in_freg(ctx, v366);
-                            let v3 = C::value_type(ctx, v2);
-                            let v1511 = C::vstate_from_type(ctx, v3);
-                            let v1512 = constructor_rv_vfmv_vf(ctx, v938, v1511);
-                            let v1513 = constructor_output_vreg(ctx, v1512);
-                            // Rule at src/isa/riscv64/lower.isle line 1703.
-                            return Some(v1513);
-                        }
-                    }
-                }
-                &Opcode::VanyTrue => {
-                    let v636 = C::value_type(ctx, v366);
-                    let v1553 = C::ty_vec_fits_in_register(ctx, v636);
-                    if let Some(v1554) = v1553 {
-                        let v370 = constructor_put_in_vreg(ctx, v366);
-                        let v1560 = constructor_put_in_vreg(ctx, v366);
-                        let v165 = &constructor_unmasked(ctx);
-                        let v1558 = C::vstate_from_type(ctx, v1554);
-                        let v1564 = constructor_rv_vredmaxu_vs(ctx, v370, v1560, v165, v1558);
-                        let v1565 = constructor_rv_vmv_xs(ctx, v1564, v1558);
-                        let v1566 = constructor_rv_snez(ctx, v1565);
-                        let v1567 = constructor_output_xreg(ctx, v1566);
-                        // Rule at src/isa/riscv64/lower.isle line 1790.
-                        return Some(v1567);
-                    }
-                }
-                &Opcode::VallTrue => {
-                    let v636 = C::value_type(ctx, v366);
-                    let v1553 = C::ty_vec_fits_in_register(ctx, v636);
-                    if let Some(v1554) = v1553 {
-                        let v1556 = C::imm5_from_i8(ctx, 0x1);
-                        if let Some(v1557) = v1556 {
-                            let v1558 = C::vstate_from_type(ctx, v1554);
-                            let v1559 = constructor_rv_vmv_vi(ctx, v1557, v1558);
-                            let v1560 = constructor_put_in_vreg(ctx, v366);
-                            let v165 = &constructor_unmasked(ctx);
-                            let v1561 = constructor_rv_vredminu_vs(ctx, v1560, v1559, v165, v1558);
-                            let v1562 = constructor_rv_vmv_xs(ctx, v1561, v1558);
-                            let v1563 = constructor_output_xreg(ctx, v1562);
-                            // Rule at src/isa/riscv64/lower.isle line 1776.
-                            return Some(v1563);
-                        }
-                    }
-                }
-                &Opcode::VhighBits => {
-                    let v636 = C::value_type(ctx, v366);
-                    let v1553 = C::ty_vec_fits_in_register(ctx, v636);
-                    if let Some(v1554) = v1553 {
-                        let v370 = constructor_put_in_vreg(ctx, v366);
-                        let v1568 = C::zero_reg(ctx);
-                        let v1569 = C::xreg_new(ctx, v1568);
-                        let v165 = &constructor_unmasked(ctx);
-                        let v1558 = C::vstate_from_type(ctx, v1554);
-                        let v1570 = constructor_rv_vmslt_vx(ctx, v370, v1569, v165, v1558);
-                        let v1572 = C::vstate_from_type(ctx, I64X2);
-                        let v1573 = constructor_rv_vmv_xs(ctx, v1570, v1572);
-                        let v1574 = C::ty_lane_mask(ctx, v1554);
-                        let v1575 = constructor_gen_andi(ctx, v1573, v1574);
-                        let v1576 = constructor_output_xreg(ctx, v1575);
-                        // Rule at src/isa/riscv64/lower.isle line 1806.
-                        return Some(v1576);
-                    }
-                }
-                &Opcode::Ineg => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
-                        if let Some(v11) = v10 {
-                            let v370 = constructor_put_in_vreg(ctx, v366);
-                            let v165 = &constructor_unmasked(ctx);
-                            let v166 = C::vstate_from_type(ctx, v11);
-                            let v371 = constructor_rv_vneg_v(ctx, v370, v165, v166);
-                            let v372 = constructor_output_vreg(ctx, v371);
-                            // Rule at src/isa/riscv64/lower.isle line 381.
-                            return Some(v372);
-                        }
-                        let v363 = C::ty_int(ctx, v3);
-                        if let Some(v364) = v363 {
-                            let v367 = C::put_in_regs(ctx, v366);
-                            let v368 = constructor_neg(ctx, v364, v367);
-                            let v369 = C::output(ctx, v368);
-                            // Rule at src/isa/riscv64/lower.isle line 378.
-                            return Some(v369);
-                        }
-                    }
-                }
-                &Opcode::Iabs => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
-                        if let Some(v11) = v10 {
-                            let v370 = constructor_put_in_vreg(ctx, v366);
-                            let v165 = &constructor_unmasked(ctx);
-                            let v166 = C::vstate_from_type(ctx, v11);
-                            let v371 = constructor_rv_vneg_v(ctx, v370, v165, v166);
-                            let v715 = constructor_put_in_vreg(ctx, v366);
-                            let v1443 = constructor_rv_vmax_vv(ctx, v715, v371, v165, v166);
-                            let v1444 = constructor_output_vreg(ctx, v1443);
-                            // Rule at src/isa/riscv64/lower.isle line 1649.
-                            return Some(v1444);
-                        }
-                        let v34 = C::ty_int_ref_scalar_64_extract(ctx, v3);
-                        if let Some(v35) = v34 {
-                            let v610 = constructor_put_in_xreg(ctx, v366);
-                            let v1439 = constructor_sext(ctx, v610, v35, I64);
-                            let v1440 = constructor_rv_neg(ctx, v1439);
-                            let v1441 = constructor_max(ctx, I64, v1439, v1440);
-                            let v1442 = constructor_output_xreg(ctx, v1441);
-                            // Rule at src/isa/riscv64/lower.isle line 1641.
-                            return Some(v1442);
-                        }
-                    }
-                }
-                &Opcode::Bnot => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
-                        if let Some(v11) = v10 {
-                            let v370 = constructor_put_in_vreg(ctx, v366);
-                            let v165 = &constructor_unmasked(ctx);
-                            let v166 = C::vstate_from_type(ctx, v11);
-                            let v595 = constructor_rv_vnot_v(ctx, v370, v165, v166);
-                            let v596 = constructor_output_vreg(ctx, v595);
-                            // Rule at src/isa/riscv64/lower.isle line 669.
-                            return Some(v596);
-                        }
-                        let v591 = C::ty_scalar(ctx, v3);
-                        if let Some(v592) = v591 {
-                            let v367 = C::put_in_regs(ctx, v366);
-                            let v593 = constructor_gen_bnot(ctx, v592, v367);
-                            let v594 = C::output(ctx, v593);
-                            // Rule at src/isa/riscv64/lower.isle line 666.
-                            return Some(v594);
-                        }
-                    }
-                }
-                &Opcode::Bitrev => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        if v3 == I128 {
-                            let v367 = C::put_in_regs(ctx, v366);
-                            let v600 = C::value_regs_get(ctx, v367, 0x0);
-                            let v601 = constructor_lower_bit_reverse(ctx, v600, I64);
-                            let v602 = C::xreg_new(ctx, v601);
-                            let v603 = C::value_regs_get(ctx, v367, 0x1);
-                            let v604 = constructor_lower_bit_reverse(ctx, v603, I64);
-                            let v605 = C::xreg_new(ctx, v604);
-                            let v606 = C::xreg_to_reg(ctx, v605);
-                            let v607 = C::xreg_to_reg(ctx, v602);
-                            let v608 = C::value_regs(ctx, v606, v607);
-                            let v609 = C::output(ctx, v608);
-                            // Rule at src/isa/riscv64/lower.isle line 676.
-                            return Some(v609);
-                        }
-                        let v292 = C::fits_in_64(ctx, v3);
-                        if let Some(v293) = v292 {
-                            let v473 = C::ty_int(ctx, v293);
-                            if let Some(v474) = v473 {
-                                let v597 = C::put_in_reg(ctx, v366);
-                                let v598 = constructor_lower_bit_reverse(ctx, v597, v474);
-                                let v599 = constructor_output_reg(ctx, v598);
-                                // Rule at src/isa/riscv64/lower.isle line 673.
-                                return Some(v599);
-                            }
-                        }
-                    }
-                }
-                &Opcode::Clz => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        if v3 == I128 {
-                            let v367 = C::put_in_regs(ctx, v366);
-                            let v630 = constructor_lower_clz_i128(ctx, v367);
-                            let v631 = C::output(ctx, v630);
-                            // Rule at src/isa/riscv64/lower.isle line 703.
-                            return Some(v631);
-                        }
-                        let v292 = C::fits_in_64(ctx, v3);
-                        if let Some(v293) = v292 {
-                            let v610 = constructor_put_in_xreg(ctx, v366);
-                            let v628 = constructor_lower_clz(ctx, v293, v610);
-                            let v629 = constructor_output_xreg(ctx, v628);
-                            // Rule at src/isa/riscv64/lower.isle line 700.
-                            return Some(v629);
-                        }
-                    }
-                }
-                &Opcode::Cls => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        if v3 == I128 {
-                            let v367 = C::put_in_regs(ctx, v366);
-                            let v634 = constructor_lower_cls_i128(ctx, v367);
-                            let v635 = C::output(ctx, v634);
-                            // Rule at src/isa/riscv64/lower.isle line 710.
-                            return Some(v635);
-                        }
-                        let v292 = C::fits_in_64(ctx, v3);
-                        if let Some(v293) = v292 {
-                            let v610 = constructor_put_in_xreg(ctx, v366);
-                            let v632 = constructor_lower_cls(ctx, v293, v610);
-                            let v633 = constructor_output_xreg(ctx, v632);
-                            // Rule at src/isa/riscv64/lower.isle line 707.
-                            return Some(v633);
-                        }
-                    }
-                }
-                &Opcode::Ctz => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        if v3 == I128 {
-                            let v367 = C::put_in_regs(ctx, v366);
-                            let v626 = constructor_lower_ctz_128(ctx, v367);
-                            let v627 = C::output(ctx, v626);
-                            // Rule at src/isa/riscv64/lower.isle line 696.
-                            return Some(v627);
-                        }
-                        let v292 = C::fits_in_64(ctx, v3);
-                        if let Some(v293) = v292 {
-                            let v597 = C::put_in_reg(ctx, v366);
-                            let v624 = constructor_lower_ctz(ctx, v293, v597);
-                            let v625 = constructor_output_reg(ctx, v624);
-                            // Rule at src/isa/riscv64/lower.isle line 693.
-                            return Some(v625);
-                        }
-                    }
-                }
-                &Opcode::Bswap => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        if v3 == I128 {
-                            let v367 = C::put_in_regs(ctx, v366);
-                            let v613 = C::value_regs_get(ctx, v367, 0x1);
-                            let v614 = C::xreg_new(ctx, v613);
-                            let v615 = constructor_gen_bswap(ctx, I64, v614);
-                            let v617 = C::put_in_regs(ctx, v366);
-                            let v618 = C::value_regs_get(ctx, v617, 0x0);
-                            let v619 = C::xreg_new(ctx, v618);
-                            let v620 = constructor_gen_bswap(ctx, I64, v619);
-                            let v616 = C::xreg_to_reg(ctx, v615);
-                            let v621 = C::xreg_to_reg(ctx, v620);
-                            let v622 = C::value_regs(ctx, v616, v621);
-                            let v623 = C::output(ctx, v622);
-                            // Rule at src/isa/riscv64/lower.isle line 686.
-                            return Some(v623);
-                        }
-                        let v292 = C::fits_in_64(ctx, v3);
-                        if let Some(v293) = v292 {
-                            let v473 = C::ty_int(ctx, v293);
-                            if let Some(v474) = v473 {
-                                let v610 = constructor_put_in_xreg(ctx, v366);
-                                let v611 = constructor_gen_bswap(ctx, v474, v610);
-                                let v612 = constructor_output_xreg(ctx, v611);
-                                // Rule at src/isa/riscv64/lower.isle line 683.
-                                return Some(v612);
-                            }
-                        }
-                    }
-                }
-                &Opcode::Popcnt => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
-                        if let Some(v11) = v10 {
-                            let v701 = constructor_u64_to_uimm5(ctx, 0x1);
-                            if let Some(v702) = v701 {
-                                let v704 = constructor_u64_to_uimm5(ctx, 0x2);
-                                if let Some(v705) = v704 {
-                                    let v707 = constructor_u64_to_uimm5(ctx, 0x4);
-                                    if let Some(v708) = v707 {
-                                        let v709 = C::lane_type(ctx, v11);
-                                        let v711 = C::ty_mask(ctx, v709);
-                                        let v712 = C::u64_and(ctx, 0x5555555555555555, v711);
-                                        let v713 = C::imm(ctx, v709, v712);
-                                        let v714 = C::xreg_new(ctx, v713);
-                                        let v715 = constructor_put_in_vreg(ctx, v366);
-                                        let v165 = &constructor_unmasked(ctx);
-                                        let v166 = C::vstate_from_type(ctx, v11);
-                                        let v716 =
-                                            constructor_rv_vsrl_vi(ctx, v715, v702, v165, v166);
-                                        let v717 =
-                                            constructor_rv_vand_vx(ctx, v716, v714, v165, v166);
-                                        let v718 = constructor_put_in_vreg(ctx, v366);
-                                        let v719 =
-                                            constructor_rv_vsub_vv(ctx, v718, v717, v165, v166);
-                                        let v721 = C::u64_and(ctx, 0x3333333333333333, v711);
-                                        let v722 = C::imm(ctx, v709, v721);
-                                        let v723 = C::xreg_new(ctx, v722);
-                                        let v724 =
-                                            constructor_rv_vsrl_vi(ctx, v719, v705, v165, v166);
-                                        let v725 =
-                                            constructor_rv_vand_vx(ctx, v724, v723, v165, v166);
-                                        let v726 =
-                                            constructor_rv_vand_vx(ctx, v719, v723, v165, v166);
-                                        let v727 =
-                                            constructor_rv_vadd_vv(ctx, v726, v725, v165, v166);
-                                        let v729 = C::u64_and(ctx, 0xF0F0F0F0F0F0F0F, v711);
-                                        let v730 = C::imm(ctx, v709, v729);
-                                        let v731 = C::xreg_new(ctx, v730);
-                                        let v732 =
-                                            constructor_rv_vsrl_vi(ctx, v727, v708, v165, v166);
-                                        let v733 =
-                                            constructor_rv_vadd_vv(ctx, v727, v732, v165, v166);
-                                        let v734 =
-                                            constructor_rv_vand_vx(ctx, v733, v731, v165, v166);
-                                        let v736 = C::u64_and(ctx, 0x101010101010101, v711);
-                                        let v737 = C::imm(ctx, v709, v736);
-                                        let v738 = C::xreg_new(ctx, v737);
-                                        let v739 =
-                                            constructor_rv_vmul_vx(ctx, v734, v738, v165, v166);
-                                        let v740 = C::ty_bits(ctx, v709);
-                                        let v741 = C::u8_as_u64(ctx, v740);
-                                        let v743 = C::u64_sub(ctx, v741, 0x8);
-                                        let v744 = C::imm(ctx, I64, v743);
-                                        let v745 = C::xreg_new(ctx, v744);
-                                        let v746 =
-                                            constructor_rv_vsrl_vx(ctx, v739, v745, v165, v166);
-                                        let v747 = constructor_output_vreg(ctx, v746);
-                                        // Rule at src/isa/riscv64/lower.isle line 774.
-                                        return Some(v747);
-                                    }
-                                }
-                            }
-                        }
-                        if v3 == I128 {
-                            let v367 = C::put_in_regs(ctx, v366);
-                            let v698 = constructor_lower_popcnt_i128(ctx, v367);
-                            let v699 = C::output(ctx, v698);
-                            // Rule at src/isa/riscv64/lower.isle line 759.
-                            return Some(v699);
-                        }
-                        let v34 = C::ty_int_ref_scalar_64_extract(ctx, v3);
-                        if let Some(v35) = v34 {
-                            let v610 = constructor_put_in_xreg(ctx, v366);
-                            let v696 = constructor_lower_popcnt(ctx, v610, v35);
-                            let v697 = constructor_output_xreg(ctx, v696);
-                            // Rule at src/isa/riscv64/lower.isle line 756.
-                            return Some(v697);
-                        }
-                    }
-                }
-                &Opcode::Sqrt => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
-                        if let Some(v11) = v10 {
-                            let v370 = constructor_put_in_vreg(ctx, v366);
-                            let v165 = &constructor_unmasked(ctx);
-                            let v166 = C::vstate_from_type(ctx, v11);
-                            let v967 = constructor_rv_vfsqrt_v(ctx, v370, v165, v166);
-                            let v968 = constructor_output_vreg(ctx, v967);
-                            // Rule at src/isa/riscv64/lower.isle line 1025.
-                            return Some(v968);
-                        }
-                        let v479 = C::ty_scalar_float(ctx, v3);
-                        if let Some(v480) = v479 {
-                            let v938 = constructor_put_in_freg(ctx, v366);
-                            let v965 = constructor_rv_fsqrt(ctx, v480, v938);
-                            let v966 = constructor_output_freg(ctx, v965);
-                            // Rule at src/isa/riscv64/lower.isle line 1022.
-                            return Some(v966);
-                        }
-                    }
-                }
-                &Opcode::Fneg => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
-                        if let Some(v11) = v10 {
-                            let v370 = constructor_put_in_vreg(ctx, v366);
-                            let v165 = &constructor_unmasked(ctx);
-                            let v166 = C::vstate_from_type(ctx, v11);
-                            let v945 = constructor_rv_vfneg_v(ctx, v370, v165, v166);
-                            let v946 = constructor_output_vreg(ctx, v945);
-                            // Rule at src/isa/riscv64/lower.isle line 1003.
-                            return Some(v946);
-                        }
-                        let v479 = C::ty_scalar_float(ctx, v3);
-                        if let Some(v480) = v479 {
-                            let v938 = constructor_put_in_freg(ctx, v366);
-                            let v943 = constructor_rv_fneg(ctx, v480, v938);
-                            let v944 = constructor_output_freg(ctx, v943);
-                            // Rule at src/isa/riscv64/lower.isle line 1000.
-                            return Some(v944);
-                        }
-                    }
-                }
-                &Opcode::Fabs => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
-                        if let Some(v11) = v10 {
-                            let v370 = constructor_put_in_vreg(ctx, v366);
-                            let v165 = &constructor_unmasked(ctx);
-                            let v166 = C::vstate_from_type(ctx, v11);
-                            let v941 = constructor_rv_vfabs_v(ctx, v370, v165, v166);
-                            let v942 = constructor_output_vreg(ctx, v941);
-                            // Rule at src/isa/riscv64/lower.isle line 996.
-                            return Some(v942);
-                        }
-                        let v479 = C::ty_scalar_float(ctx, v3);
-                        if let Some(v480) = v479 {
-                            let v938 = constructor_put_in_freg(ctx, v366);
-                            let v939 = constructor_rv_fabs(ctx, v480, v938);
-                            let v940 = constructor_output_freg(ctx, v939);
-                            // Rule at src/isa/riscv64/lower.isle line 993.
-                            return Some(v940);
-                        }
-                    }
-                }
-                &Opcode::Ceil => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v597 = C::put_in_reg(ctx, v366);
-                        let v3 = C::value_type(ctx, v2);
-                        let v1406 = constructor_gen_float_round(ctx, &FloatRoundOP::Ceil, v597, v3);
-                        let v1407 = constructor_output_reg(ctx, v1406);
-                        // Rule at src/isa/riscv64/lower.isle line 1576.
-                        return Some(v1407);
-                    }
-                }
-                &Opcode::Floor => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v597 = C::put_in_reg(ctx, v366);
-                        let v3 = C::value_type(ctx, v2);
-                        let v1409 =
-                            constructor_gen_float_round(ctx, &FloatRoundOP::Floor, v597, v3);
-                        let v1410 = constructor_output_reg(ctx, v1409);
-                        // Rule at src/isa/riscv64/lower.isle line 1582.
-                        return Some(v1410);
-                    }
-                }
-                &Opcode::Trunc => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v597 = C::put_in_reg(ctx, v366);
-                        let v3 = C::value_type(ctx, v2);
-                        let v1412 =
-                            constructor_gen_float_round(ctx, &FloatRoundOP::Trunc, v597, v3);
-                        let v1413 = constructor_output_reg(ctx, v1412);
-                        // Rule at src/isa/riscv64/lower.isle line 1586.
-                        return Some(v1413);
-                    }
-                }
-                &Opcode::Nearest => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v597 = C::put_in_reg(ctx, v366);
-                        let v3 = C::value_type(ctx, v2);
-                        let v1415 =
-                            constructor_gen_float_round(ctx, &FloatRoundOP::Nearest, v597, v3);
-                        let v1416 = constructor_output_reg(ctx, v1415);
-                        // Rule at src/isa/riscv64/lower.isle line 1591.
-                        return Some(v1416);
-                    }
-                }
-                &Opcode::IsNull => {
-                    let v610 = constructor_put_in_xreg(ctx, v366);
-                    let v1129 = constructor_rv_seqz(ctx, v610);
-                    let v1130 = constructor_output_xreg(ctx, v1129);
-                    // Rule at src/isa/riscv64/lower.isle line 1252.
-                    return Some(v1130);
-                }
-                &Opcode::IsInvalid => {
-                    let v610 = constructor_put_in_xreg(ctx, v366);
-                    let v1132 = C::imm12_const(ctx, 0x1);
-                    let v1133 = constructor_rv_addi(ctx, v610, v1132);
-                    let v1134 = constructor_rv_seqz(ctx, v1133);
-                    let v1135 = constructor_output_xreg(ctx, v1134);
-                    // Rule at src/isa/riscv64/lower.isle line 1258.
-                    return Some(v1135);
-                }
-                &Opcode::ScalarToVector => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
-                        if let Some(v11) = v10 {
-                            let v525 = C::ty_vector_not_float(ctx, v11);
-                            if let Some(v526) = v525 {
-                                let v1677 = C::zero_reg(ctx);
-                                let v1678 = C::xreg_new(ctx, v1677);
-                                let v166 = C::vstate_from_type(ctx, v11);
-                                let v1679 = constructor_rv_vmv_vx(ctx, v1678, v166);
-                                let v1680 = constructor_gen_vec_mask(ctx, 0x1);
-                                let v1681 = constructor_put_in_xreg(ctx, v366);
-                                let v1682 =
-                                    constructor_rv_vmerge_vxm(ctx, v1679, v1681, v1680, v166);
-                                let v1683 = constructor_output_vreg(ctx, v1682);
-                                // Rule at src/isa/riscv64/lower.isle line 1947.
-                                return Some(v1683);
-                            }
-                            let v1684 = C::ty_vector_float(ctx, v11);
-                            if let Some(v1685) = v1684 {
-                                let v1677 = C::zero_reg(ctx);
-                                let v1678 = C::xreg_new(ctx, v1677);
-                                let v166 = C::vstate_from_type(ctx, v11);
-                                let v1679 = constructor_rv_vmv_vx(ctx, v1678, v166);
-                                let v1686 = constructor_put_in_freg(ctx, v366);
-                                let v1687 = constructor_rv_vfmv_sf(ctx, v1686, v166);
-                                let v1688 = constructor_gen_vec_mask(ctx, 0x1);
-                                let v1689 =
-                                    constructor_rv_vmerge_vvm(ctx, v1679, v1687, v1688, v166);
-                                let v1690 = constructor_output_vreg(ctx, v1689);
-                                // Rule at src/isa/riscv64/lower.isle line 1953.
-                                return Some(v1690);
-                            }
-                        }
-                    }
-                }
-                &Opcode::Bmask => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v367 = C::put_in_regs(ctx, v366);
-                        let v3 = C::value_type(ctx, v2);
-                        let v636 = C::value_type(ctx, v366);
-                        let v1425 = constructor_lower_bmask(ctx, v3, v636, v367);
-                        let v1426 = C::output(ctx, v1425);
-                        // Rule at src/isa/riscv64/lower.isle line 1616.
-                        return Some(v1426);
-                    }
-                }
-                &Opcode::Ireduce => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v367 = C::put_in_regs(ctx, v366);
-                        let v600 = C::value_regs_get(ctx, v367, 0x0);
-                        let v1052 = constructor_output_reg(ctx, v600);
-                        // Rule at src/isa/riscv64/lower.isle line 1120.
-                        return Some(v1052);
-                    }
-                }
-                &Opcode::SwidenLow => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
-                        if let Some(v11) = v10 {
-                            let v643 = C::def_inst(ctx, v366);
-                            if let Some(v644) = v643 {
-                                let v648 = &C::inst_data(ctx, v644);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v1607,
-                                    arg: v1608,
-                                } = v648
-                                {
-                                    if let &Opcode::SwidenLow = v1607 {
-                                        let v1620 = C::def_inst(ctx, v1608);
-                                        if let Some(v1621) = v1620 {
-                                            let v1622 = &C::inst_data(ctx, v1621);
-                                            if let &InstructionData::Unary {
-                                                opcode: ref v1623,
-                                                arg: v1624,
-                                            } = v1622
-                                            {
-                                                if let &Opcode::SwidenLow = v1623 {
-                                                    let v1630 = constructor_put_in_vreg(ctx, v1624);
-                                                    let v165 = &constructor_unmasked(ctx);
-                                                    let v166 = C::vstate_from_type(ctx, v11);
-                                                    let v1645 = constructor_rv_vsext_vf8(
-                                                        ctx, v1630, v165, v166,
-                                                    );
-                                                    let v1646 = constructor_output_vreg(ctx, v1645);
-                                                    // Rule at src/isa/riscv64/lower.isle line 1878.
-                                                    return Some(v1646);
-                                                }
-                                            }
-                                        }
-                                        let v1615 = constructor_put_in_vreg(ctx, v1608);
-                                        let v165 = &constructor_unmasked(ctx);
-                                        let v166 = C::vstate_from_type(ctx, v11);
-                                        let v1643 =
-                                            constructor_rv_vsext_vf4(ctx, v1615, v165, v166);
-                                        let v1644 = constructor_output_vreg(ctx, v1643);
-                                        // Rule at src/isa/riscv64/lower.isle line 1875.
-                                        return Some(v1644);
-                                    }
-                                }
-                            }
-                            let v370 = constructor_put_in_vreg(ctx, v366);
-                            let v165 = &constructor_unmasked(ctx);
-                            let v166 = C::vstate_from_type(ctx, v11);
-                            let v1641 = constructor_rv_vsext_vf2(ctx, v370, v165, v166);
-                            let v1642 = constructor_output_vreg(ctx, v1641);
-                            // Rule at src/isa/riscv64/lower.isle line 1872.
-                            return Some(v1642);
-                        }
-                    }
-                }
-                &Opcode::SwidenHigh => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
-                        if let Some(v11) = v10 {
-                            let v643 = C::def_inst(ctx, v366);
-                            if let Some(v644) = v643 {
-                                let v648 = &C::inst_data(ctx, v644);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v1607,
-                                    arg: v1608,
-                                } = v648
-                                {
-                                    if let &Opcode::SwidenHigh = v1607 {
-                                        let v1620 = C::def_inst(ctx, v1608);
-                                        if let Some(v1621) = v1620 {
-                                            let v1622 = &C::inst_data(ctx, v1621);
-                                            if let &InstructionData::Unary {
-                                                opcode: ref v1623,
-                                                arg: v1624,
-                                            } = v1622
-                                            {
-                                                if let &Opcode::SwidenHigh = v1623 {
-                                                    let v1625 = C::value_type(ctx, v1624);
-                                                    let v1626 = C::ty_lane_count(ctx, v1625);
-                                                    let v1611 = C::ty_lane_count(ctx, v11);
-                                                    let v1627 = C::u64_sub(ctx, v1626, v1611);
-                                                    let v1628 = C::uimm5_from_u64(ctx, v1627);
-                                                    if let Some(v1629) = v1628 {
-                                                        let v1630 =
-                                                            constructor_put_in_vreg(ctx, v1624);
-                                                        let v165 = &constructor_unmasked(ctx);
-                                                        let v1631 = C::vstate_from_type(ctx, v1625);
-                                                        let v1632 = constructor_rv_vslidedown_vi(
-                                                            ctx, v1630, v1629, v165, v1631,
-                                                        );
-                                                        let v166 = C::vstate_from_type(ctx, v11);
-                                                        let v1633 = constructor_rv_vsext_vf8(
-                                                            ctx, v1632, v165, v166,
-                                                        );
-                                                        let v1634 =
-                                                            constructor_output_vreg(ctx, v1633);
-                                                        // Rule at src/isa/riscv64/lower.isle line 1852.
-                                                        return Some(v1634);
-                                                    }
-                                                }
-                                            }
-                                        }
-                                        let v1609 = C::value_type(ctx, v1608);
-                                        let v1610 = C::ty_lane_count(ctx, v1609);
-                                        let v1611 = C::ty_lane_count(ctx, v11);
-                                        let v1612 = C::u64_sub(ctx, v1610, v1611);
-                                        let v1613 = C::uimm5_from_u64(ctx, v1612);
-                                        if let Some(v1614) = v1613 {
-                                            let v1615 = constructor_put_in_vreg(ctx, v1608);
-                                            let v165 = &constructor_unmasked(ctx);
-                                            let v1616 = C::vstate_from_type(ctx, v1609);
-                                            let v1617 = constructor_rv_vslidedown_vi(
-                                                ctx, v1615, v1614, v165, v1616,
-                                            );
-                                            let v166 = C::vstate_from_type(ctx, v11);
-                                            let v1618 =
-                                                constructor_rv_vsext_vf4(ctx, v1617, v165, v166);
-                                            let v1619 = constructor_output_vreg(ctx, v1618);
-                                            // Rule at src/isa/riscv64/lower.isle line 1848.
-                                            return Some(v1619);
-                                        }
-                                    }
-                                }
-                            }
-                            let v370 = constructor_put_in_vreg(ctx, v366);
-                            let v636 = C::value_type(ctx, v366);
-                            let v1604 = constructor_gen_slidedown_half(ctx, v636, v370);
-                            let v165 = &constructor_unmasked(ctx);
-                            let v166 = C::vstate_from_type(ctx, v11);
-                            let v1605 = constructor_rv_vsext_vf2(ctx, v1604, v165, v166);
-                            let v1606 = constructor_output_vreg(ctx, v1605);
-                            // Rule at src/isa/riscv64/lower.isle line 1845.
-                            return Some(v1606);
-                        }
-                    }
-                }
-                &Opcode::UwidenLow => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
-                        if let Some(v11) = v10 {
-                            let v643 = C::def_inst(ctx, v366);
-                            if let Some(v644) = v643 {
-                                let v648 = &C::inst_data(ctx, v644);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v1607,
-                                    arg: v1608,
-                                } = v648
-                                {
-                                    if let &Opcode::UwidenLow = v1607 {
-                                        let v1620 = C::def_inst(ctx, v1608);
-                                        if let Some(v1621) = v1620 {
-                                            let v1622 = &C::inst_data(ctx, v1621);
-                                            if let &InstructionData::Unary {
-                                                opcode: ref v1623,
-                                                arg: v1624,
-                                            } = v1622
-                                            {
-                                                if let &Opcode::UwidenLow = v1623 {
-                                                    let v1630 = constructor_put_in_vreg(ctx, v1624);
-                                                    let v165 = &constructor_unmasked(ctx);
-                                                    let v166 = C::vstate_from_type(ctx, v11);
-                                                    let v1651 = constructor_rv_vzext_vf8(
-                                                        ctx, v1630, v165, v166,
-                                                    );
-                                                    let v1652 = constructor_output_vreg(ctx, v1651);
-                                                    // Rule at src/isa/riscv64/lower.isle line 1889.
-                                                    return Some(v1652);
-                                                }
-                                            }
-                                        }
-                                        let v1615 = constructor_put_in_vreg(ctx, v1608);
-                                        let v165 = &constructor_unmasked(ctx);
-                                        let v166 = C::vstate_from_type(ctx, v11);
-                                        let v1649 =
-                                            constructor_rv_vzext_vf4(ctx, v1615, v165, v166);
-                                        let v1650 = constructor_output_vreg(ctx, v1649);
-                                        // Rule at src/isa/riscv64/lower.isle line 1886.
-                                        return Some(v1650);
-                                    }
-                                }
-                            }
-                            let v370 = constructor_put_in_vreg(ctx, v366);
-                            let v165 = &constructor_unmasked(ctx);
-                            let v166 = C::vstate_from_type(ctx, v11);
-                            let v1647 = constructor_rv_vzext_vf2(ctx, v370, v165, v166);
-                            let v1648 = constructor_output_vreg(ctx, v1647);
-                            // Rule at src/isa/riscv64/lower.isle line 1883.
-                            return Some(v1648);
-                        }
-                    }
-                }
-                &Opcode::UwidenHigh => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v10 = C::ty_vec_fits_in_register(ctx, v3);
-                        if let Some(v11) = v10 {
-                            let v643 = C::def_inst(ctx, v366);
-                            if let Some(v644) = v643 {
-                                let v648 = &C::inst_data(ctx, v644);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v1607,
-                                    arg: v1608,
-                                } = v648
-                                {
-                                    if let &Opcode::UwidenHigh = v1607 {
-                                        let v1620 = C::def_inst(ctx, v1608);
-                                        if let Some(v1621) = v1620 {
-                                            let v1622 = &C::inst_data(ctx, v1621);
-                                            if let &InstructionData::Unary {
-                                                opcode: ref v1623,
-                                                arg: v1624,
-                                            } = v1622
-                                            {
-                                                if let &Opcode::UwidenHigh = v1623 {
-                                                    let v1625 = C::value_type(ctx, v1624);
-                                                    let v1626 = C::ty_lane_count(ctx, v1625);
-                                                    let v1611 = C::ty_lane_count(ctx, v11);
-                                                    let v1627 = C::u64_sub(ctx, v1626, v1611);
-                                                    let v1628 = C::uimm5_from_u64(ctx, v1627);
-                                                    if let Some(v1629) = v1628 {
-                                                        let v1630 =
-                                                            constructor_put_in_vreg(ctx, v1624);
-                                                        let v165 = &constructor_unmasked(ctx);
-                                                        let v1631 = C::vstate_from_type(ctx, v1625);
-                                                        let v1632 = constructor_rv_vslidedown_vi(
-                                                            ctx, v1630, v1629, v165, v1631,
-                                                        );
-                                                        let v166 = C::vstate_from_type(ctx, v11);
-                                                        let v1639 = constructor_rv_vzext_vf8(
-                                                            ctx, v1632, v165, v166,
-                                                        );
-                                                        let v1640 =
-                                                            constructor_output_vreg(ctx, v1639);
-                                                        // Rule at src/isa/riscv64/lower.isle line 1866.
-                                                        return Some(v1640);
-                                                    }
-                                                }
-                                            }
-                                        }
-                                        let v1609 = C::value_type(ctx, v1608);
-                                        let v1610 = C::ty_lane_count(ctx, v1609);
-                                        let v1611 = C::ty_lane_count(ctx, v11);
-                                        let v1612 = C::u64_sub(ctx, v1610, v1611);
-                                        let v1613 = C::uimm5_from_u64(ctx, v1612);
-                                        if let Some(v1614) = v1613 {
-                                            let v1615 = constructor_put_in_vreg(ctx, v1608);
-                                            let v165 = &constructor_unmasked(ctx);
-                                            let v1616 = C::vstate_from_type(ctx, v1609);
-                                            let v1617 = constructor_rv_vslidedown_vi(
-                                                ctx, v1615, v1614, v165, v1616,
-                                            );
-                                            let v166 = C::vstate_from_type(ctx, v11);
-                                            let v1637 =
-                                                constructor_rv_vzext_vf4(ctx, v1617, v165, v166);
-                                            let v1638 = constructor_output_vreg(ctx, v1637);
-                                            // Rule at src/isa/riscv64/lower.isle line 1862.
-                                            return Some(v1638);
-                                        }
-                                    }
-                                }
-                            }
-                            let v370 = constructor_put_in_vreg(ctx, v366);
-                            let v636 = C::value_type(ctx, v366);
-                            let v1604 = constructor_gen_slidedown_half(ctx, v636, v370);
-                            let v165 = &constructor_unmasked(ctx);
-                            let v166 = C::vstate_from_type(ctx, v11);
-                            let v1635 = constructor_rv_vzext_vf2(ctx, v1604, v165, v166);
-                            let v1636 = constructor_output_vreg(ctx, v1635);
-                            // Rule at src/isa/riscv64/lower.isle line 1859.
-                            return Some(v1636);
-                        }
-                    }
-                }
-                &Opcode::Uextend => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v367 = C::put_in_regs(ctx, v366);
-                        let v636 = C::value_type(ctx, v366);
-                        let v3 = C::value_type(ctx, v2);
-                        let v638 = constructor_extend(ctx, v367, &ExtendOp::Zero, v636, v3);
-                        let v639 = C::output(ctx, v638);
-                        // Rule at src/isa/riscv64/lower.isle line 714.
-                        return Some(v639);
-                    }
-                }
-                &Opcode::Sextend => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        if v3 == I64 {
-                            let v643 = C::def_inst(ctx, v366);
-                            if let Some(v644) = v643 {
-                                let v645 = C::first_result(ctx, v644);
-                                if let Some(v646) = v645 {
-                                    let v647 = C::value_type(ctx, v646);
-                                    if v647 == I32 {
-                                        let v648 = &C::inst_data(ctx, v644);
-                                        if let &InstructionData::Binary {
-                                            opcode: ref v649,
-                                            args: ref v650,
-                                        } = v648
-                                        {
-                                            match v649 {
-                                                &Opcode::Iadd => {
-                                                    let v651 = C::unpack_value_array_2(ctx, v650);
-                                                    let v679 = C::def_inst(ctx, v651.0);
-                                                    if let Some(v680) = v679 {
-                                                        let v681 = &C::inst_data(ctx, v680);
-                                                        if let &InstructionData::UnaryImm {
-                                                            opcode: ref v682,
-                                                            imm: v683,
-                                                        } = v681
-                                                        {
-                                                            if let &Opcode::Iconst = v682 {
-                                                                let v684 =
-                                                                    C::u64_from_imm64(ctx, v683);
-                                                                let v685 =
-                                                                    C::imm12_from_u64(ctx, v684);
-                                                                if let Some(v686) = v685 {
-                                                                    let v687 =
-                                                                        constructor_put_in_xreg(
-                                                                            ctx, v651.1,
-                                                                        );
-                                                                    let v688 = constructor_rv_addiw(
-                                                                        ctx, v687, v686,
-                                                                    );
-                                                                    let v689 =
-                                                                        constructor_output_xreg(
-                                                                            ctx, v688,
-                                                                        );
-                                                                    // Rule at src/isa/riscv64/lower.isle line 742.
-                                                                    return Some(v689);
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                    let v669 = C::def_inst(ctx, v651.1);
-                                                    if let Some(v670) = v669 {
-                                                        let v671 = &C::inst_data(ctx, v670);
-                                                        if let &InstructionData::UnaryImm {
-                                                            opcode: ref v672,
-                                                            imm: v673,
-                                                        } = v671
-                                                        {
-                                                            if let &Opcode::Iconst = v672 {
-                                                                let v674 =
-                                                                    C::u64_from_imm64(ctx, v673);
-                                                                let v675 =
-                                                                    C::imm12_from_u64(ctx, v674);
-                                                                if let Some(v676) = v675 {
-                                                                    let v654 =
-                                                                        constructor_put_in_xreg(
-                                                                            ctx, v651.0,
-                                                                        );
-                                                                    let v677 = constructor_rv_addiw(
-                                                                        ctx, v654, v676,
-                                                                    );
-                                                                    let v678 =
-                                                                        constructor_output_xreg(
-                                                                            ctx, v677,
-                                                                        );
-                                                                    // Rule at src/isa/riscv64/lower.isle line 739.
-                                                                    return Some(v678);
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                    let v654 = constructor_put_in_xreg(ctx, v651.0);
-                                                    let v655 = constructor_put_in_xreg(ctx, v651.1);
-                                                    let v656 = constructor_rv_addw(ctx, v654, v655);
-                                                    let v657 = constructor_output_xreg(ctx, v656);
-                                                    // Rule at src/isa/riscv64/lower.isle line 723.
-                                                    return Some(v657);
-                                                }
-                                                &Opcode::Isub => {
-                                                    let v651 = C::unpack_value_array_2(ctx, v650);
-                                                    let v654 = constructor_put_in_xreg(ctx, v651.0);
-                                                    let v655 = constructor_put_in_xreg(ctx, v651.1);
-                                                    let v658 = constructor_rv_subw(ctx, v654, v655);
-                                                    let v659 = constructor_output_xreg(ctx, v658);
-                                                    // Rule at src/isa/riscv64/lower.isle line 726.
-                                                    return Some(v659);
-                                                }
-                                                &Opcode::Ishl => {
-                                                    let v651 = C::unpack_value_array_2(ctx, v650);
-                                                    let v669 = C::def_inst(ctx, v651.1);
-                                                    if let Some(v670) = v669 {
-                                                        let v671 = &C::inst_data(ctx, v670);
-                                                        if let &InstructionData::UnaryImm {
-                                                            opcode: ref v672,
-                                                            imm: v673,
-                                                        } = v671
-                                                        {
-                                                            if let &Opcode::Iconst = v672 {
-                                                                let v674 =
-                                                                    C::u64_from_imm64(ctx, v673);
-                                                                let v675 =
-                                                                    C::imm12_from_u64(ctx, v674);
-                                                                if let Some(v676) = v675 {
-                                                                    let v654 =
-                                                                        constructor_put_in_xreg(
-                                                                            ctx, v651.0,
-                                                                        );
-                                                                    let v690 = constructor_rv_slliw(
-                                                                        ctx, v654, v676,
-                                                                    );
-                                                                    let v691 =
-                                                                        constructor_output_xreg(
-                                                                            ctx, v690,
-                                                                        );
-                                                                    // Rule at src/isa/riscv64/lower.isle line 745.
-                                                                    return Some(v691);
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                    let v654 = constructor_put_in_xreg(ctx, v651.0);
-                                                    let v660 = C::put_in_regs(ctx, v651.1);
-                                                    let v661 = C::value_regs_get(ctx, v660, 0x0);
-                                                    let v662 = C::xreg_new(ctx, v661);
-                                                    let v663 = constructor_rv_sllw(ctx, v654, v662);
-                                                    let v664 = constructor_output_xreg(ctx, v663);
-                                                    // Rule at src/isa/riscv64/lower.isle line 729.
-                                                    return Some(v664);
-                                                }
-                                                &Opcode::Ushr => {
-                                                    let v651 = C::unpack_value_array_2(ctx, v650);
-                                                    let v669 = C::def_inst(ctx, v651.1);
-                                                    if let Some(v670) = v669 {
-                                                        let v671 = &C::inst_data(ctx, v670);
-                                                        if let &InstructionData::UnaryImm {
-                                                            opcode: ref v672,
-                                                            imm: v673,
-                                                        } = v671
-                                                        {
-                                                            if let &Opcode::Iconst = v672 {
-                                                                let v674 =
-                                                                    C::u64_from_imm64(ctx, v673);
-                                                                let v675 =
-                                                                    C::imm12_from_u64(ctx, v674);
-                                                                if let Some(v676) = v675 {
-                                                                    let v654 =
-                                                                        constructor_put_in_xreg(
-                                                                            ctx, v651.0,
-                                                                        );
-                                                                    let v692 = constructor_rv_srliw(
-                                                                        ctx, v654, v676,
-                                                                    );
-                                                                    let v693 =
-                                                                        constructor_output_xreg(
-                                                                            ctx, v692,
-                                                                        );
-                                                                    // Rule at src/isa/riscv64/lower.isle line 748.
-                                                                    return Some(v693);
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                    let v654 = constructor_put_in_xreg(ctx, v651.0);
-                                                    let v660 = C::put_in_regs(ctx, v651.1);
-                                                    let v661 = C::value_regs_get(ctx, v660, 0x0);
-                                                    let v662 = C::xreg_new(ctx, v661);
-                                                    let v665 = constructor_rv_srlw(ctx, v654, v662);
-                                                    let v666 = constructor_output_xreg(ctx, v665);
-                                                    // Rule at src/isa/riscv64/lower.isle line 732.
-                                                    return Some(v666);
-                                                }
-                                                &Opcode::Sshr => {
-                                                    let v651 = C::unpack_value_array_2(ctx, v650);
-                                                    let v669 = C::def_inst(ctx, v651.1);
-                                                    if let Some(v670) = v669 {
-                                                        let v671 = &C::inst_data(ctx, v670);
-                                                        if let &InstructionData::UnaryImm {
-                                                            opcode: ref v672,
-                                                            imm: v673,
-                                                        } = v671
-                                                        {
-                                                            if let &Opcode::Iconst = v672 {
-                                                                let v674 =
-                                                                    C::u64_from_imm64(ctx, v673);
-                                                                let v675 =
-                                                                    C::imm12_from_u64(ctx, v674);
-                                                                if let Some(v676) = v675 {
-                                                                    let v654 =
-                                                                        constructor_put_in_xreg(
-                                                                            ctx, v651.0,
-                                                                        );
-                                                                    let v694 = constructor_rv_sraiw(
-                                                                        ctx, v654, v676,
-                                                                    );
-                                                                    let v695 =
-                                                                        constructor_output_xreg(
-                                                                            ctx, v694,
-                                                                        );
-                                                                    // Rule at src/isa/riscv64/lower.isle line 751.
-                                                                    return Some(v695);
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                    let v654 = constructor_put_in_xreg(ctx, v651.0);
-                                                    let v660 = C::put_in_regs(ctx, v651.1);
-                                                    let v661 = C::value_regs_get(ctx, v660, 0x0);
-                                                    let v662 = C::xreg_new(ctx, v661);
-                                                    let v667 = constructor_rv_sraw(ctx, v654, v662);
-                                                    let v668 = constructor_output_xreg(ctx, v667);
-                                                    // Rule at src/isa/riscv64/lower.isle line 735.
-                                                    return Some(v668);
-                                                }
-                                                _ => {}
-                                            }
-                                        }
-                                    }
-                                }
-                            }
-                        }
-                        let v367 = C::put_in_regs(ctx, v366);
-                        let v636 = C::value_type(ctx, v366);
-                        let v641 = constructor_extend(ctx, v367, &ExtendOp::Signed, v636, v3);
-                        let v642 = C::output(ctx, v641);
-                        // Rule at src/isa/riscv64/lower.isle line 718.
-                        return Some(v642);
-                    }
-                }
-                &Opcode::Fpromote => {
-                    let v938 = constructor_put_in_freg(ctx, v366);
-                    let v1053 = constructor_rv_fcvtds(ctx, v938);
-                    let v1054 = constructor_output_freg(ctx, v1053);
-                    // Rule at src/isa/riscv64/lower.isle line 1124.
-                    return Some(v1054);
-                }
-                &Opcode::Fdemote => {
-                    let v938 = constructor_put_in_freg(ctx, v366);
-                    let v1055 = constructor_rv_fcvtsd(ctx, v938);
-                    let v1056 = constructor_output_freg(ctx, v1055);
-                    // Rule at src/isa/riscv64/lower.isle line 1128.
-                    return Some(v1056);
-                }
-                &Opcode::FcvtToUint => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v938 = constructor_put_in_freg(ctx, v366);
-                        let v636 = C::value_type(ctx, v366);
-                        let v3 = C::value_type(ctx, v2);
-                        let v1374 = constructor_gen_fcvt_int(ctx, false, v938, false, v636, v3);
-                        let v1375 = constructor_output_xreg(ctx, v1374);
-                        // Rule at src/isa/riscv64/lower.isle line 1532.
-                        return Some(v1375);
-                    }
-                }
-                &Opcode::FcvtToSint => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v938 = constructor_put_in_freg(ctx, v366);
-                        let v636 = C::value_type(ctx, v366);
-                        let v3 = C::value_type(ctx, v2);
-                        let v1376 = constructor_gen_fcvt_int(ctx, false, v938, true, v636, v3);
-                        let v1377 = constructor_output_xreg(ctx, v1376);
-                        // Rule at src/isa/riscv64/lower.isle line 1537.
-                        return Some(v1377);
-                    }
-                }
-                &Opcode::FcvtToUintSat => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v938 = constructor_put_in_freg(ctx, v366);
-                        let v636 = C::value_type(ctx, v366);
-                        let v3 = C::value_type(ctx, v2);
-                        let v1380 = constructor_gen_fcvt_int(ctx, true, v938, false, v636, v3);
-                        let v1381 = constructor_output_xreg(ctx, v1380);
-                        // Rule at src/isa/riscv64/lower.isle line 1547.
-                        return Some(v1381);
-                    }
-                }
-                &Opcode::FcvtToSintSat => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v938 = constructor_put_in_freg(ctx, v366);
-                        let v636 = C::value_type(ctx, v366);
-                        let v3 = C::value_type(ctx, v2);
-                        let v1378 = constructor_gen_fcvt_int(ctx, true, v938, true, v636, v3);
-                        let v1379 = constructor_output_xreg(ctx, v1378);
-                        // Rule at src/isa/riscv64/lower.isle line 1542.
-                        return Some(v1379);
-                    }
-                }
-                &Opcode::FcvtFromUint => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v636 = C::value_type(ctx, v366);
-                        let v3 = C::value_type(ctx, v2);
-                        let v1388 = &C::int_convert_2_float_op(ctx, v636, false, v3);
-                        let v1383 = constructor_put_in_xreg(ctx, v366);
-                        let v1389 =
-                            constructor_normalize_fcvt_from_int(ctx, v1383, v636, &ExtendOp::Zero);
-                        let v1390 = C::xreg_to_reg(ctx, v1389);
-                        let v1391 = constructor_fpu_rr(ctx, v1388, v3, v1390);
-                        let v1392 = constructor_output_reg(ctx, v1391);
-                        // Rule at src/isa/riscv64/lower.isle line 1559.
-                        return Some(v1392);
-                    }
-                }
-                &Opcode::FcvtFromSint => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v636 = C::value_type(ctx, v366);
-                        let v3 = C::value_type(ctx, v2);
-                        let v1382 = &C::int_convert_2_float_op(ctx, v636, true, v3);
-                        let v1383 = constructor_put_in_xreg(ctx, v366);
-                        let v1384 = constructor_normalize_fcvt_from_int(
-                            ctx,
-                            v1383,
-                            v636,
-                            &ExtendOp::Signed,
-                        );
-                        let v1385 = C::xreg_to_reg(ctx, v1384);
-                        let v1386 = constructor_fpu_rr(ctx, v1382, v3, v1385);
-                        let v1387 = constructor_output_reg(ctx, v1386);
-                        // Rule at src/isa/riscv64/lower.isle line 1552.
-                        return Some(v1387);
-                    }
-                }
-                &Opcode::Isplit => {
-                    let v367 = C::put_in_regs(ctx, v366);
-                    let v600 = C::value_regs_get(ctx, v367, 0x0);
-                    let v1187 = C::xreg_new(ctx, v600);
-                    let v1188 = C::put_in_regs(ctx, v366);
-                    let v1189 = C::value_regs_get(ctx, v1188, 0x1);
-                    let v1190 = C::xreg_new(ctx, v1189);
-                    let v1191 = C::xreg_to_reg(ctx, v1187);
-                    let v1192 = C::value_reg(ctx, v1191);
-                    let v1193 = C::xreg_to_reg(ctx, v1190);
-                    let v1194 = C::value_reg(ctx, v1193);
-                    let v1195 = C::output_pair(ctx, v1192, v1194);
-                    // Rule at src/isa/riscv64/lower.isle line 1294.
-                    return Some(v1195);
-                }
-                _ => {}
-            }
-        }
-        &InstructionData::UnaryConst {
-            opcode: ref v12,
-            constant_handle: v13,
-        } => {
-            if let &Opcode::Vconst = v12 {
-                let v1 = C::first_result(ctx, arg0);
-                if let Some(v2) = v1 {
-                    let v3 = C::value_type(ctx, v2);
-                    let v10 = C::ty_vec_fits_in_register(ctx, v3);
-                    if let Some(v11) = v10 {
-                        let v14 = C::const_to_vconst(ctx, v13);
-                        let v15 = constructor_gen_constant(ctx, v11, v14);
-                        let v16 = constructor_output_vreg(ctx, v15);
-                        // Rule at src/isa/riscv64/lower.isle line 14.
-                        return Some(v16);
-                    }
-                }
-            }
-        }
-        &InstructionData::UnaryGlobalValue {
-            opcode: ref v1393,
-            global_value: v1394,
-        } => {
-            if let &Opcode::SymbolValue = v1393 {
-                let v1395 = C::symbol_value_data(ctx, v1394);
-                if let Some(v1396) = v1395 {
-                    let v1400 = C::load_ext_name(ctx, v1396.0, v1396.2);
-                    let v1401 = constructor_output_reg(ctx, v1400);
-                    // Rule at src/isa/riscv64/lower.isle line 1566.
-                    return Some(v1401);
-                }
-            }
-        }
-        &InstructionData::UnaryIeee32 {
-            opcode: ref v17,
-            imm: v18,
-        } => {
-            if let &Opcode::F32const = v17 {
-                let v19 = C::u32_from_ieee32(ctx, v18);
-                let v21 = C::u32_as_u64(ctx, v19);
-                let v22 = C::imm(ctx, F32, v21);
-                let v23 = constructor_output_reg(ctx, v22);
-                // Rule at src/isa/riscv64/lower.isle line 19.
-                return Some(v23);
-            }
-        }
-        &InstructionData::UnaryIeee64 {
-            opcode: ref v24,
-            imm: v25,
-        } => {
-            if let &Opcode::F64const = v24 {
-                let v26 = C::u64_from_ieee64(ctx, v25);
-                let v28 = C::imm(ctx, F64, v26);
-                let v29 = constructor_output_reg(ctx, v28);
-                // Rule at src/isa/riscv64/lower.isle line 24.
-                return Some(v29);
-            }
-        }
-        &InstructionData::UnaryImm {
-            opcode: ref v5,
-            imm: v6,
-        } => {
-            if let &Opcode::Iconst = v5 {
-                let v1 = C::first_result(ctx, arg0);
-                if let Some(v2) = v1 {
-                    let v3 = C::value_type(ctx, v2);
-                    let v7 = C::u64_from_imm64(ctx, v6);
-                    let v8 = C::imm(ctx, v3, v7);
-                    let v9 = constructor_output_reg(ctx, v8);
-                    // Rule at src/isa/riscv64/lower.isle line 9.
-                    return Some(v9);
-                }
-            }
-        }
-        _ => {}
-    }
-    None
-}
-
-// Generated as internal constructor for term match_shnadd.
-pub fn constructor_match_shnadd<C: Context>(ctx: &mut C, arg0: Imm64) -> Option<AluOPRRR> {
-    let v1 = C::u64_from_imm64(ctx, arg0);
-    match v1 {
-        0x1 => {
-            // Rule at src/isa/riscv64/lower.isle line 58.
-            return Some(AluOPRRR::Sh1add);
-        }
-        0x2 => {
-            // Rule at src/isa/riscv64/lower.isle line 59.
-            return Some(AluOPRRR::Sh2add);
-        }
-        0x3 => {
-            // Rule at src/isa/riscv64/lower.isle line 60.
-            return Some(AluOPRRR::Sh3add);
-        }
-        _ => {}
-    }
-    None
-}
-
-// Generated as internal constructor for term match_shnadd_uw.
-pub fn constructor_match_shnadd_uw<C: Context>(ctx: &mut C, arg0: Imm64) -> Option<AluOPRRR> {
-    let v1 = C::u64_from_imm64(ctx, arg0);
-    match v1 {
-        0x1 => {
-            // Rule at src/isa/riscv64/lower.isle line 80.
-            return Some(AluOPRRR::Sh1adduw);
-        }
-        0x2 => {
-            // Rule at src/isa/riscv64/lower.isle line 81.
-            return Some(AluOPRRR::Sh2adduw);
-        }
-        0x3 => {
-            // Rule at src/isa/riscv64/lower.isle line 82.
-            return Some(AluOPRRR::Sh3adduw);
-        }
-        _ => {}
-    }
-    None
-}
-
-// Generated as internal constructor for term gen_atomic_rmw_loop.
-pub fn constructor_gen_atomic_rmw_loop<C: Context>(
-    ctx: &mut C,
-    arg0: &AtomicRmwOp,
-    arg1: Type,
-    arg2: XReg,
-    arg3: XReg,
-) -> XReg {
-    let v4 = constructor_temp_writable_xreg(ctx);
-    let v5 = constructor_temp_writable_xreg(ctx);
-    let v6 = constructor_gen_atomic_offset(ctx, arg2, arg1);
-    let v9 = constructor_gen_atomic_p(ctx, arg2, arg1);
-    let v7 = C::xreg_to_reg(ctx, v6);
-    let v8 = C::writable_xreg_to_writable_reg(ctx, v4);
-    let v10 = C::xreg_to_reg(ctx, v9);
-    let v11 = C::xreg_to_reg(ctx, arg3);
-    let v12 = C::writable_xreg_to_writable_reg(ctx, v5);
-    let v13 = MInst::AtomicRmwLoop {
-        offset: v7,
-        op: arg0.clone(),
-        dst: v8,
-        ty: arg1,
-        p: v10,
-        x: v11,
-        t0: v12,
-    };
-    let v14 = C::emit(ctx, &v13);
-    let v15 = C::writable_reg_to_reg(ctx, v8);
-    let v16 = C::xreg_new(ctx, v15);
-    // Rule at src/isa/riscv64/lower.isle line 1067.
-    return v16;
-}
-
-// Generated as internal constructor for term gen_atomic_offset.
-pub fn constructor_gen_atomic_offset<C: Context>(ctx: &mut C, arg0: XReg, arg1: Type) -> XReg {
-    let v2 = C::fits_in_16(ctx, arg1);
-    if let Some(v3) = v2 {
-        let v5 = C::imm12_const(ctx, 0x3);
-        let v6 = constructor_rv_andi(ctx, arg0, v5);
-        let v7 = constructor_rv_slli(ctx, v6, v5);
-        // Rule at src/isa/riscv64/lower.isle line 1095.
-        return v7;
-    }
-    let v8 = C::zero_reg(ctx);
-    let v9 = C::xreg_new(ctx, v8);
-    // Rule at src/isa/riscv64/lower.isle line 1098.
-    return v9;
-}
-
-// Generated as internal constructor for term gen_atomic_p.
-pub fn constructor_gen_atomic_p<C: Context>(ctx: &mut C, arg0: XReg, arg1: Type) -> XReg {
-    let v2 = C::fits_in_16(ctx, arg1);
-    if let Some(v3) = v2 {
-        let v5 = C::imm12_const(ctx, -0x4);
-        let v6 = constructor_rv_andi(ctx, arg0, v5);
-        // Rule at src/isa/riscv64/lower.isle line 1102.
-        return v6;
-    }
-    // Rule at src/isa/riscv64/lower.isle line 1105.
-    return arg0;
-}
-
-// Generated as internal constructor for term gen_load64_extend.
-pub fn constructor_gen_load64_extend<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &ExtendOp,
-    arg2: MemFlags,
-    arg3: XReg,
-    arg4: Offset32,
-) -> VReg {
-    match arg1 {
-        &ExtendOp::Zero => {
-            let v8 = C::xreg_to_reg(ctx, arg3);
-            let v9 = C::gen_amode(ctx, v8, arg4, I64);
-            let v6 = &constructor_element_width_from_type(ctx, I64);
-            let v10 = VecAMode::UnitStride { base: v9 };
-            let v11 = &constructor_unmasked(ctx);
-            let v7 = C::vstate_from_type(ctx, I64);
-            let v12 = constructor_vec_load(ctx, v6, &v10, arg2, v11, v7);
-            let v13 = C::vreg_new(ctx, v12);
-            let v14 = C::vstate_from_type(ctx, arg0);
-            let v16 = constructor_rv_vzext_vf2(ctx, v13, v11, v14);
-            // Rule at src/isa/riscv64/lower.isle line 1443.
-            return v16;
-        }
-        &ExtendOp::Signed => {
-            let v8 = C::xreg_to_reg(ctx, arg3);
-            let v9 = C::gen_amode(ctx, v8, arg4, I64);
-            let v6 = &constructor_element_width_from_type(ctx, I64);
-            let v10 = VecAMode::UnitStride { base: v9 };
-            let v11 = &constructor_unmasked(ctx);
-            let v7 = C::vstate_from_type(ctx, I64);
-            let v12 = constructor_vec_load(ctx, v6, &v10, arg2, v11, v7);
-            let v13 = C::vreg_new(ctx, v12);
-            let v14 = C::vstate_from_type(ctx, arg0);
-            let v15 = constructor_rv_vsext_vf2(ctx, v13, v11, v14);
-            // Rule at src/isa/riscv64/lower.isle line 1437.
-            return v15;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "gen_load64_extend", "src/isa/riscv64/lower.isle line 1435"
-    )
-}
-
-// Generated as internal constructor for term gen_icmp.
-pub fn constructor_gen_icmp<C: Context>(
-    ctx: &mut C,
-    arg0: &IntCC,
-    arg1: ValueRegs,
-    arg2: ValueRegs,
-    arg3: Type,
-) -> XReg {
-    let v4 = constructor_temp_writable_xreg(ctx);
-    let v5 = C::writable_xreg_to_writable_reg(ctx, v4);
-    let v6 = MInst::Icmp {
-        cc: arg0.clone(),
-        rd: v5,
-        a: arg1,
-        b: arg2,
-        ty: arg3,
-    };
-    let v7 = C::emit(ctx, &v6);
-    let v8 = C::writable_xreg_to_xreg(ctx, v4);
-    // Rule at src/isa/riscv64/lower.isle line 1504.
-    return v8;
-}
diff --git a/cranelift/codegen/isle_generated_code/isle_s390x.rs b/cranelift/codegen/isle_generated_code/isle_s390x.rs
deleted file mode 100644
index a2f99fb6e477..000000000000
--- a/cranelift/codegen/isle_generated_code/isle_s390x.rs
+++ /dev/null
@@ -1,25403 +0,0 @@
-// GENERATED BY ISLE. DO NOT EDIT!
-//
-// Generated automatically from the instruction-selection DSL code in:
-// - src/prelude.isle
-// - src/prelude_lower.isle
-// - src/isa/s390x/inst.isle
-// - src/isa/s390x/lower.isle
-// - /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_lower.isle
-
-use super::*; // Pulls in all external types.
-use std::marker::PhantomData;
-
-/// Context during lowering: an implementation of this trait
-/// must be provided with all external constructors and extractors.
-/// A mutable borrow is passed along through all lowering logic.
-pub trait Context {
-    fn unit(&mut self) -> Unit;
-    fn value_type(&mut self, arg0: Value) -> Type;
-    fn u32_nonnegative(&mut self, arg0: u32) -> Option<u32>;
-    fn offset32(&mut self, arg0: Offset32) -> u32;
-    fn u32_lteq(&mut self, arg0: u32, arg1: u32) -> Option<Unit>;
-    fn u8_lteq(&mut self, arg0: u8, arg1: u8) -> Option<Unit>;
-    fn u8_lt(&mut self, arg0: u8, arg1: u8) -> Option<Unit>;
-    fn simm32(&mut self, arg0: Imm64) -> Option<u32>;
-    fn uimm8(&mut self, arg0: Imm64) -> Option<u8>;
-    fn u8_as_u32(&mut self, arg0: u8) -> u32;
-    fn u8_as_u64(&mut self, arg0: u8) -> u64;
-    fn u16_as_u64(&mut self, arg0: u16) -> u64;
-    fn u32_as_u64(&mut self, arg0: u32) -> u64;
-    fn i64_as_u64(&mut self, arg0: i64) -> u64;
-    fn i64_neg(&mut self, arg0: i64) -> i64;
-    fn u128_as_u64(&mut self, arg0: u128) -> Option<u64>;
-    fn u64_as_u32(&mut self, arg0: u64) -> Option<u32>;
-    fn u64_as_i32(&mut self, arg0: u64) -> i32;
-    fn u8_and(&mut self, arg0: u8, arg1: u8) -> u8;
-    fn u8_shl(&mut self, arg0: u8, arg1: u8) -> u8;
-    fn u8_shr(&mut self, arg0: u8, arg1: u8) -> u8;
-    fn u32_add(&mut self, arg0: u32, arg1: u32) -> u32;
-    fn u32_sub(&mut self, arg0: u32, arg1: u32) -> u32;
-    fn u32_and(&mut self, arg0: u32, arg1: u32) -> u32;
-    fn s32_add_fallible(&mut self, arg0: u32, arg1: u32) -> Option<u32>;
-    fn u64_add(&mut self, arg0: u64, arg1: u64) -> u64;
-    fn u64_sub(&mut self, arg0: u64, arg1: u64) -> u64;
-    fn u64_mul(&mut self, arg0: u64, arg1: u64) -> u64;
-    fn u64_sdiv(&mut self, arg0: u64, arg1: u64) -> Option<u64>;
-    fn u64_udiv(&mut self, arg0: u64, arg1: u64) -> Option<u64>;
-    fn u64_and(&mut self, arg0: u64, arg1: u64) -> u64;
-    fn u64_or(&mut self, arg0: u64, arg1: u64) -> u64;
-    fn u64_xor(&mut self, arg0: u64, arg1: u64) -> u64;
-    fn u64_shl(&mut self, arg0: u64, arg1: u64) -> u64;
-    fn imm64_shl(&mut self, arg0: Type, arg1: Imm64, arg2: Imm64) -> Imm64;
-    fn imm64_ushr(&mut self, arg0: Type, arg1: Imm64, arg2: Imm64) -> Imm64;
-    fn imm64_sshr(&mut self, arg0: Type, arg1: Imm64, arg2: Imm64) -> Imm64;
-    fn u64_not(&mut self, arg0: u64) -> u64;
-    fn u64_eq(&mut self, arg0: u64, arg1: u64) -> bool;
-    fn u64_le(&mut self, arg0: u64, arg1: u64) -> bool;
-    fn u64_lt(&mut self, arg0: u64, arg1: u64) -> bool;
-    fn i64_sextend_imm64(&mut self, arg0: Type, arg1: Imm64) -> i64;
-    fn u64_uextend_imm64(&mut self, arg0: Type, arg1: Imm64) -> u64;
-    fn imm64_icmp(&mut self, arg0: Type, arg1: &IntCC, arg2: Imm64, arg3: Imm64) -> Imm64;
-    fn u64_is_zero(&mut self, arg0: u64) -> bool;
-    fn u64_is_odd(&mut self, arg0: u64) -> bool;
-    fn ty_umin(&mut self, arg0: Type) -> u64;
-    fn ty_umax(&mut self, arg0: Type) -> u64;
-    fn ty_smin(&mut self, arg0: Type) -> u64;
-    fn ty_smax(&mut self, arg0: Type) -> u64;
-    fn ty_bits(&mut self, arg0: Type) -> u8;
-    fn ty_bits_u16(&mut self, arg0: Type) -> u16;
-    fn ty_bits_u64(&mut self, arg0: Type) -> u64;
-    fn ty_mask(&mut self, arg0: Type) -> u64;
-    fn ty_lane_mask(&mut self, arg0: Type) -> u64;
-    fn ty_lane_count(&mut self, arg0: Type) -> u64;
-    fn ty_bytes(&mut self, arg0: Type) -> u16;
-    fn lane_type(&mut self, arg0: Type) -> Type;
-    fn ty_half_lanes(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_half_width(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_equal(&mut self, arg0: Type, arg1: Type) -> bool;
-    fn mem_flags_trusted(&mut self) -> MemFlags;
-    fn intcc_reverse(&mut self, arg0: &IntCC) -> IntCC;
-    fn intcc_inverse(&mut self, arg0: &IntCC) -> IntCC;
-    fn floatcc_reverse(&mut self, arg0: &FloatCC) -> FloatCC;
-    fn floatcc_inverse(&mut self, arg0: &FloatCC) -> FloatCC;
-    fn floatcc_unordered(&mut self, arg0: &FloatCC) -> bool;
-    fn fits_in_16(&mut self, arg0: Type) -> Option<Type>;
-    fn fits_in_32(&mut self, arg0: Type) -> Option<Type>;
-    fn lane_fits_in_32(&mut self, arg0: Type) -> Option<Type>;
-    fn fits_in_64(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_32(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_64(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_int_ref_scalar_64_extract(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_int_ref_scalar_64(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_32_or_64(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_8_or_16(&mut self, arg0: Type) -> Option<Type>;
-    fn int_fits_in_32(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_int_ref_64(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_int_ref_16_to_64(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_int(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_scalar(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_scalar_float(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_float_or_vec(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_vector_float(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_vector_not_float(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_vec64(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_vec64_ctor(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_vec128(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_dyn_vec64(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_dyn_vec128(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_vec64_int(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_vec128_int(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_addr64(&mut self, arg0: Type) -> Option<Type>;
-    fn not_vec32x2(&mut self, arg0: Type) -> Option<Type>;
-    fn not_i64x2(&mut self, arg0: Type) -> Option<()>;
-    fn u8_from_uimm8(&mut self, arg0: Uimm8) -> u8;
-    fn u64_from_bool(&mut self, arg0: bool) -> u64;
-    fn u64_from_imm64(&mut self, arg0: Imm64) -> u64;
-    fn nonzero_u64_from_imm64(&mut self, arg0: Imm64) -> Option<u64>;
-    fn imm64_power_of_two(&mut self, arg0: Imm64) -> Option<u64>;
-    fn imm64(&mut self, arg0: u64) -> Imm64;
-    fn imm64_masked(&mut self, arg0: Type, arg1: u64) -> Imm64;
-    fn u32_from_ieee32(&mut self, arg0: Ieee32) -> u32;
-    fn u64_from_ieee64(&mut self, arg0: Ieee64) -> u64;
-    fn multi_lane(&mut self, arg0: Type) -> Option<(u32, u32)>;
-    fn dynamic_lane(&mut self, arg0: Type) -> Option<(u32, u32)>;
-    fn dynamic_int_lane(&mut self, arg0: Type) -> Option<u32>;
-    fn dynamic_fp_lane(&mut self, arg0: Type) -> Option<u32>;
-    fn ty_dyn64_int(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_dyn128_int(&mut self, arg0: Type) -> Option<Type>;
-    fn offset32_to_u32(&mut self, arg0: Offset32) -> u32;
-    fn u32_to_offset32(&mut self, arg0: u32) -> Offset32;
-    fn intcc_unsigned(&mut self, arg0: &IntCC) -> IntCC;
-    fn signed_cond_code(&mut self, arg0: &IntCC) -> Option<IntCC>;
-    fn trap_code_division_by_zero(&mut self) -> TrapCode;
-    fn trap_code_integer_overflow(&mut self) -> TrapCode;
-    fn trap_code_bad_conversion_to_integer(&mut self) -> TrapCode;
-    fn range(&mut self, arg0: usize, arg1: usize) -> Range;
-    fn range_view(&mut self, arg0: Range) -> RangeView;
-    fn value_reg(&mut self, arg0: Reg) -> ValueRegs;
-    fn value_regs(&mut self, arg0: Reg, arg1: Reg) -> ValueRegs;
-    fn value_regs_invalid(&mut self) -> ValueRegs;
-    fn output_none(&mut self) -> InstOutput;
-    fn output(&mut self, arg0: ValueRegs) -> InstOutput;
-    fn output_pair(&mut self, arg0: ValueRegs, arg1: ValueRegs) -> InstOutput;
-    fn output_builder_new(&mut self) -> InstOutputBuilder;
-    fn output_builder_push(&mut self, arg0: &InstOutputBuilder, arg1: ValueRegs) -> Unit;
-    fn output_builder_finish(&mut self, arg0: &InstOutputBuilder) -> InstOutput;
-    fn temp_writable_reg(&mut self, arg0: Type) -> WritableReg;
-    fn is_valid_reg(&mut self, arg0: Reg) -> bool;
-    fn invalid_reg(&mut self) -> Reg;
-    fn mark_value_used(&mut self, arg0: Value) -> Unit;
-    fn put_in_reg(&mut self, arg0: Value) -> Reg;
-    fn put_in_regs(&mut self, arg0: Value) -> ValueRegs;
-    fn ensure_in_vreg(&mut self, arg0: Reg, arg1: Type) -> Reg;
-    fn value_regs_get(&mut self, arg0: ValueRegs, arg1: usize) -> Reg;
-    fn value_regs_len(&mut self, arg0: ValueRegs) -> usize;
-    fn preg_to_reg(&mut self, arg0: PReg) -> Reg;
-    fn value_list_slice(&mut self, arg0: ValueList) -> ValueSlice;
-    fn value_slice_empty(&mut self, arg0: ValueSlice) -> Option<()>;
-    fn value_slice_unwrap(&mut self, arg0: ValueSlice) -> Option<(Value, ValueSlice)>;
-    fn value_slice_len(&mut self, arg0: ValueSlice) -> usize;
-    fn value_slice_get(&mut self, arg0: ValueSlice, arg1: usize) -> Value;
-    fn writable_reg_to_reg(&mut self, arg0: WritableReg) -> Reg;
-    fn inst_results(&mut self, arg0: Inst) -> ValueSlice;
-    fn first_result(&mut self, arg0: Inst) -> Option<Value>;
-    fn inst_data(&mut self, arg0: Inst) -> InstructionData;
-    fn def_inst(&mut self, arg0: Value) -> Option<Inst>;
-    fn zero_value(&mut self, arg0: Value) -> Option<Value>;
-    fn is_sinkable_inst(&mut self, arg0: Value) -> Option<Inst>;
-    fn maybe_uextend(&mut self, arg0: Value) -> Option<Value>;
-    fn emit(&mut self, arg0: &MInst) -> Unit;
-    fn sink_inst(&mut self, arg0: Inst) -> Unit;
-    fn emit_u64_le_const(&mut self, arg0: u64) -> VCodeConstant;
-    fn emit_u128_le_const(&mut self, arg0: u128) -> VCodeConstant;
-    fn const_to_vconst(&mut self, arg0: Constant) -> VCodeConstant;
-    fn tls_model(&mut self, arg0: Type) -> TlsModel;
-    fn tls_model_is_elf_gd(&mut self) -> Option<Unit>;
-    fn tls_model_is_macho(&mut self) -> Option<Unit>;
-    fn tls_model_is_coff(&mut self) -> Option<Unit>;
-    fn preserve_frame_pointers(&mut self) -> Option<Unit>;
-    fn box_external_name(&mut self, arg0: ExternalName) -> BoxExternalName;
-    fn func_ref_data(&mut self, arg0: FuncRef) -> (SigRef, ExternalName, RelocDistance);
-    fn symbol_value_data(
-        &mut self,
-        arg0: GlobalValue,
-    ) -> Option<(ExternalName, RelocDistance, i64)>;
-    fn reloc_distance_near(&mut self, arg0: RelocDistance) -> Option<()>;
-    fn vec_mask_from_immediate(&mut self, arg0: Immediate) -> Option<VecMask>;
-    fn u128_from_immediate(&mut self, arg0: Immediate) -> Option<u128>;
-    fn vconst_from_immediate(&mut self, arg0: Immediate) -> Option<VCodeConstant>;
-    fn u128_from_constant(&mut self, arg0: Constant) -> Option<u128>;
-    fn u64_from_constant(&mut self, arg0: Constant) -> Option<u64>;
-    fn shuffle64_from_imm(&mut self, arg0: Immediate) -> Option<(u8, u8)>;
-    fn shuffle32_from_imm(&mut self, arg0: Immediate) -> Option<(u8, u8, u8, u8)>;
-    fn shuffle16_from_imm(&mut self, arg0: Immediate) -> Option<(u8, u8, u8, u8, u8, u8, u8, u8)>;
-    fn only_writable_reg(&mut self, arg0: WritableValueRegs) -> Option<WritableReg>;
-    fn writable_regs_get(&mut self, arg0: WritableValueRegs, arg1: usize) -> WritableReg;
-    fn abi_num_args(&mut self, arg0: Sig) -> usize;
-    fn abi_get_arg(&mut self, arg0: Sig, arg1: usize) -> ABIArg;
-    fn abi_num_rets(&mut self, arg0: Sig) -> usize;
-    fn abi_get_ret(&mut self, arg0: Sig, arg1: usize) -> ABIArg;
-    fn abi_ret_arg(&mut self, arg0: Sig) -> Option<ABIArg>;
-    fn abi_no_ret_arg(&mut self, arg0: Sig) -> Option<()>;
-    fn abi_sized_stack_arg_space(&mut self, arg0: Sig) -> i64;
-    fn abi_sized_stack_ret_space(&mut self, arg0: Sig) -> i64;
-    fn abi_stackslot_addr(&mut self, arg0: WritableReg, arg1: StackSlot, arg2: Offset32) -> MInst;
-    fn abi_dynamic_stackslot_addr(&mut self, arg0: WritableReg, arg1: DynamicStackSlot) -> MInst;
-    fn abi_arg_only_slot(&mut self, arg0: &ABIArg) -> Option<ABIArgSlot>;
-    fn abi_arg_struct_pointer(&mut self, arg0: &ABIArg) -> Option<(ABIArgSlot, i64, u64)>;
-    fn abi_arg_implicit_pointer(&mut self, arg0: &ABIArg) -> Option<(ABIArgSlot, i64, Type)>;
-    fn real_reg_to_reg(&mut self, arg0: RealReg) -> Reg;
-    fn real_reg_to_writable_reg(&mut self, arg0: RealReg) -> WritableReg;
-    fn gen_move(&mut self, arg0: Type, arg1: WritableReg, arg2: Reg) -> MInst;
-    fn gen_return(&mut self, arg0: ValueSlice) -> Unit;
-    fn gen_return_call(
-        &mut self,
-        arg0: SigRef,
-        arg1: ExternalName,
-        arg2: RelocDistance,
-        arg3: ValueSlice,
-    ) -> InstOutput;
-    fn gen_return_call_indirect(
-        &mut self,
-        arg0: SigRef,
-        arg1: Value,
-        arg2: ValueSlice,
-    ) -> InstOutput;
-    fn safe_divisor_from_imm64(&mut self, arg0: Type, arg1: Imm64) -> Option<u64>;
-    fn box_symbol_reloc(&mut self, arg0: &SymbolReloc) -> BoxSymbolReloc;
-    fn mie2_enabled(&mut self, arg0: Type) -> Option<()>;
-    fn mie2_disabled(&mut self, arg0: Type) -> Option<()>;
-    fn vxrs_ext2_enabled(&mut self, arg0: Type) -> Option<()>;
-    fn vxrs_ext2_disabled(&mut self, arg0: Type) -> Option<()>;
-    fn lane_order(&mut self) -> LaneOrder;
-    fn be_lane_idx(&mut self, arg0: Type, arg1: u8) -> u8;
-    fn be_vec_const(&mut self, arg0: Type, arg1: u128) -> u128;
-    fn writable_gpr(&mut self, arg0: u8) -> WritableReg;
-    fn zero_reg(&mut self) -> Reg;
-    fn gpr32_ty(&mut self, arg0: Type) -> Option<Type>;
-    fn gpr64_ty(&mut self, arg0: Type) -> Option<Type>;
-    fn vr128_ty(&mut self, arg0: Type) -> Option<Type>;
-    fn uimm32shifted(&mut self, arg0: u32, arg1: u8) -> UImm32Shifted;
-    fn uimm16shifted(&mut self, arg0: u16, arg1: u8) -> UImm16Shifted;
-    fn i64_nonequal(&mut self, arg0: i64, arg1: i64) -> Option<i64>;
-    fn u8_as_u16(&mut self, arg0: u8) -> u16;
-    fn u64_truncate_to_u32(&mut self, arg0: u64) -> u32;
-    fn u64_as_i16(&mut self, arg0: u64) -> i16;
-    fn u64_pair_split(&mut self, arg0: u128) -> (u64, u64);
-    fn u64_pair_concat(&mut self, arg0: u64, arg1: u64) -> u128;
-    fn u32_pair_split(&mut self, arg0: u64) -> (u32, u32);
-    fn u32_pair_concat(&mut self, arg0: u32, arg1: u32) -> u64;
-    fn u16_pair_split(&mut self, arg0: u32) -> (u16, u16);
-    fn u16_pair_concat(&mut self, arg0: u16, arg1: u16) -> u32;
-    fn u8_pair_split(&mut self, arg0: u16) -> (u8, u8);
-    fn u8_pair_concat(&mut self, arg0: u8, arg1: u8) -> u16;
-    fn lane_byte_mask(&mut self, arg0: Type, arg1: u8) -> u16;
-    fn shuffle_mask_from_u128(&mut self, arg0: u128) -> (u128, u16);
-    fn u64_nonzero_hipart(&mut self, arg0: u64) -> Option<u64>;
-    fn u64_nonzero_lopart(&mut self, arg0: u64) -> Option<u64>;
-    fn i32_from_u64(&mut self, arg0: u64) -> Option<i32>;
-    fn i16_from_u64(&mut self, arg0: u64) -> Option<i16>;
-    fn i16_from_u32(&mut self, arg0: u32) -> Option<i16>;
-    fn uimm32shifted_from_u64(&mut self, arg0: u64) -> Option<UImm32Shifted>;
-    fn uimm16shifted_from_u64(&mut self, arg0: u64) -> Option<UImm16Shifted>;
-    fn u64_from_value(&mut self, arg0: Value) -> Option<u64>;
-    fn u32_from_value(&mut self, arg0: Value) -> Option<u32>;
-    fn u8_from_value(&mut self, arg0: Value) -> Option<u8>;
-    fn u64_from_signed_value(&mut self, arg0: Value) -> Option<u64>;
-    fn u64_from_inverted_value(&mut self, arg0: Value) -> Option<u64>;
-    fn i64_from_value(&mut self, arg0: Value) -> Option<i64>;
-    fn i32_from_value(&mut self, arg0: Value) -> Option<i32>;
-    fn i16_from_value(&mut self, arg0: Value) -> Option<i16>;
-    fn i16_from_swapped_value(&mut self, arg0: Value) -> Option<i16>;
-    fn i64_from_negated_value(&mut self, arg0: Value) -> Option<i64>;
-    fn i32_from_negated_value(&mut self, arg0: Value) -> Option<i32>;
-    fn i16_from_negated_value(&mut self, arg0: Value) -> Option<i16>;
-    fn uimm16shifted_from_value(&mut self, arg0: Value) -> Option<UImm16Shifted>;
-    fn uimm32shifted_from_value(&mut self, arg0: Value) -> Option<UImm32Shifted>;
-    fn uimm16shifted_from_inverted_value(&mut self, arg0: Value) -> Option<UImm16Shifted>;
-    fn uimm32shifted_from_inverted_value(&mut self, arg0: Value) -> Option<UImm32Shifted>;
-    fn len_minus_one(&mut self, arg0: u64) -> Option<u8>;
-    fn mask_amt_imm(&mut self, arg0: Type, arg1: i64) -> u8;
-    fn mask_as_cond(&mut self, arg0: u8) -> Cond;
-    fn intcc_as_cond(&mut self, arg0: &IntCC) -> Cond;
-    fn floatcc_as_cond(&mut self, arg0: &FloatCC) -> Cond;
-    fn invert_cond(&mut self, arg0: &Cond) -> Cond;
-    fn signed(&mut self, arg0: &IntCC) -> Option<()>;
-    fn unsigned(&mut self, arg0: &IntCC) -> Option<()>;
-    fn vec_length_minus1(&mut self, arg0: &VecMachLabel) -> u32;
-    fn vec_element(&mut self, arg0: &VecMachLabel, arg1: u8) -> MachLabel;
-    fn zero_offset(&mut self) -> Offset32;
-    fn i64_from_offset(&mut self, arg0: Offset32) -> i64;
-    fn littleendian(&mut self, arg0: MemFlags) -> Option<()>;
-    fn bigendian(&mut self, arg0: MemFlags) -> Option<()>;
-    fn memflags_trusted(&mut self) -> MemFlags;
-    fn memarg_flags(&mut self, arg0: &MemArg) -> MemFlags;
-    fn memarg_reg_plus_reg(&mut self, arg0: Reg, arg1: Reg, arg2: u8, arg3: MemFlags) -> MemArg;
-    fn memarg_reg_plus_off(&mut self, arg0: Reg, arg1: i64, arg2: u8, arg3: MemFlags) -> MemArg;
-    fn memarg_symbol(&mut self, arg0: ExternalName, arg1: i32, arg2: MemFlags) -> MemArg;
-    fn memarg_got(&mut self) -> MemArg;
-    fn memarg_stack_off(&mut self, arg0: i64, arg1: i64) -> MemArg;
-    fn memarg_initial_sp_offset(&mut self, arg0: i64) -> MemArg;
-    fn memarg_symbol_offset_sum(&mut self, arg0: i64, arg1: i64) -> Option<i32>;
-    fn memarg_pair_from_memarg(&mut self, arg0: &MemArg) -> Option<MemArgPair>;
-    fn memarg_pair_from_reg(&mut self, arg0: Reg, arg1: MemFlags) -> MemArgPair;
-    fn sinkable_inst(&mut self, arg0: Value) -> Option<Inst>;
-    fn writable_regpair(&mut self, arg0: WritableReg, arg1: WritableReg) -> WritableRegPair;
-    fn writable_regpair_hi(&mut self, arg0: WritableRegPair) -> WritableReg;
-    fn writable_regpair_lo(&mut self, arg0: WritableRegPair) -> WritableReg;
-    fn regpair(&mut self, arg0: Reg, arg1: Reg) -> RegPair;
-    fn regpair_hi(&mut self, arg0: RegPair) -> Reg;
-    fn regpair_lo(&mut self, arg0: RegPair) -> Reg;
-    fn inst_builder_new(&mut self) -> VecMInstBuilder;
-    fn inst_builder_push(&mut self, arg0: &VecMInstBuilder, arg1: &MInst) -> Unit;
-    fn inst_builder_finish(&mut self, arg0: &VecMInstBuilder) -> VecMInst;
-    fn real_reg(&mut self, arg0: WritableReg) -> Option<WritableReg>;
-    fn same_reg(&mut self, arg0: WritableReg, arg1: Reg) -> Option<Reg>;
-    fn preg_stack(&mut self) -> PReg;
-    fn preg_gpr_0(&mut self) -> PReg;
-    fn args_builder_new(&mut self) -> CallArgListBuilder;
-    fn args_builder_push(&mut self, arg0: &CallArgListBuilder, arg1: Reg, arg2: RealReg) -> Unit;
-    fn args_builder_finish(&mut self, arg0: &CallArgListBuilder) -> CallArgList;
-    fn defs_init(&mut self, arg0: Sig) -> CallRetList;
-    fn defs_lookup(&mut self, arg0: &CallRetList, arg1: RealReg) -> Reg;
-    fn abi_sig(&mut self, arg0: SigRef) -> Sig;
-    fn abi_first_ret(&mut self, arg0: SigRef, arg1: Sig) -> usize;
-    fn abi_call_info(
-        &mut self,
-        arg0: Sig,
-        arg1: ExternalName,
-        arg2: &CallArgList,
-        arg3: &CallRetList,
-        arg4: &Opcode,
-    ) -> BoxCallInfo;
-    fn abi_call_ind_info(
-        &mut self,
-        arg0: Sig,
-        arg1: Reg,
-        arg2: &CallArgList,
-        arg3: &CallRetList,
-        arg4: &Opcode,
-    ) -> BoxCallIndInfo;
-    fn abi_accumulate_outgoing_args_size(&mut self, arg0: Sig) -> Unit;
-    fn abi_lane_order(&mut self, arg0: Sig) -> LaneOrder;
-    fn lib_call_info_memcpy(&mut self, arg0: Reg, arg1: Reg, arg2: Reg) -> LibCallInfo;
-    fn lib_call_info_tls_get_offset(
-        &mut self,
-        arg0: WritableReg,
-        arg1: Reg,
-        arg2: Reg,
-        arg3: &SymbolReloc,
-    ) -> LibCallInfo;
-    fn lib_call_info(&mut self, arg0: &LibCallInfo) -> BoxCallInfo;
-    fn lib_accumulate_outgoing_args_size(&mut self, arg0: &LibCallInfo) -> Unit;
-    fn fcvt_to_uint_ub32(&mut self, arg0: u8) -> u64;
-    fn fcvt_to_uint_lb32(&mut self) -> u64;
-    fn fcvt_to_uint_ub64(&mut self, arg0: u8) -> u64;
-    fn fcvt_to_uint_lb64(&mut self) -> u64;
-    fn fcvt_to_sint_ub32(&mut self, arg0: u8) -> u64;
-    fn fcvt_to_sint_lb32(&mut self, arg0: u8) -> u64;
-    fn fcvt_to_sint_ub64(&mut self, arg0: u8) -> u64;
-    fn fcvt_to_sint_lb64(&mut self, arg0: u8) -> u64;
-    fn unpack_value_array_2(&mut self, arg0: &ValueArray2) -> (Value, Value);
-    fn pack_value_array_2(&mut self, arg0: Value, arg1: Value) -> ValueArray2;
-    fn unpack_value_array_3(&mut self, arg0: &ValueArray3) -> (Value, Value, Value);
-    fn pack_value_array_3(&mut self, arg0: Value, arg1: Value, arg2: Value) -> ValueArray3;
-    fn unpack_block_array_2(&mut self, arg0: &BlockArray2) -> (BlockCall, BlockCall);
-    fn pack_block_array_2(&mut self, arg0: BlockCall, arg1: BlockCall) -> BlockArray2;
-}
-
-pub trait ContextIter {
-    type Context;
-    type Output;
-    fn next(&mut self, ctx: &mut Self::Context) -> Option<Self::Output>;
-}
-
-pub struct ContextIterWrapper<Item, I: Iterator<Item = Item>, C: Context> {
-    iter: I,
-    _ctx: PhantomData<C>,
-}
-impl<Item, I: Iterator<Item = Item>, C: Context> From<I> for ContextIterWrapper<Item, I, C> {
-    fn from(iter: I) -> Self {
-        Self {
-            iter,
-            _ctx: PhantomData,
-        }
-    }
-}
-impl<Item, I: Iterator<Item = Item>, C: Context> ContextIter for ContextIterWrapper<Item, I, C> {
-    type Context = C;
-    type Output = Item;
-    fn next(&mut self, _ctx: &mut Self::Context) -> Option<Self::Output> {
-        self.iter.next()
-    }
-}
-
-/// Internal type MultiReg: defined at src/prelude_lower.isle line 21.
-#[derive(Clone, Debug)]
-pub enum MultiReg {
-    Empty,
-    One { a: Reg },
-    Two { a: Reg, b: Reg },
-    Three { a: Reg, b: Reg, c: Reg },
-    Four { a: Reg, b: Reg, c: Reg, d: Reg },
-}
-
-/// Internal type SideEffectNoResult: defined at src/prelude_lower.isle line 309.
-#[derive(Clone, Debug)]
-pub enum SideEffectNoResult {
-    Inst {
-        inst: MInst,
-    },
-    Inst2 {
-        inst1: MInst,
-        inst2: MInst,
-    },
-    Inst3 {
-        inst1: MInst,
-        inst2: MInst,
-        inst3: MInst,
-    },
-}
-
-/// Internal type ProducesFlags: defined at src/prelude_lower.isle line 351.
-#[derive(Clone, Debug)]
-pub enum ProducesFlags {
-    AlreadyExistingFlags,
-    ProducesFlagsSideEffect { inst: MInst },
-    ProducesFlagsTwiceSideEffect { inst1: MInst, inst2: MInst },
-    ProducesFlagsReturnsReg { inst: MInst, result: Reg },
-    ProducesFlagsReturnsResultWithConsumer { inst: MInst, result: Reg },
-}
-
-/// Internal type ConsumesAndProducesFlags: defined at src/prelude_lower.isle line 370.
-#[derive(Clone, Debug)]
-pub enum ConsumesAndProducesFlags {
-    SideEffect { inst: MInst },
-    ReturnsReg { inst: MInst, result: Reg },
-}
-
-/// Internal type ConsumesFlags: defined at src/prelude_lower.isle line 378.
-#[derive(Clone, Debug)]
-pub enum ConsumesFlags {
-    ConsumesFlagsSideEffect {
-        inst: MInst,
-    },
-    ConsumesFlagsSideEffect2 {
-        inst1: MInst,
-        inst2: MInst,
-    },
-    ConsumesFlagsReturnsResultWithProducer {
-        inst: MInst,
-        result: Reg,
-    },
-    ConsumesFlagsReturnsReg {
-        inst: MInst,
-        result: Reg,
-    },
-    ConsumesFlagsTwiceReturnsValueRegs {
-        inst1: MInst,
-        inst2: MInst,
-        result: ValueRegs,
-    },
-    ConsumesFlagsFourTimesReturnsValueRegs {
-        inst1: MInst,
-        inst2: MInst,
-        inst3: MInst,
-        inst4: MInst,
-        result: ValueRegs,
-    },
-}
-
-/// Internal type MInst: defined at src/isa/s390x/inst.isle line 2.
-#[derive(Clone, Debug)]
-pub enum MInst {
-    Nop0,
-    Nop2,
-    AluRRR {
-        alu_op: ALUOp,
-        rd: WritableReg,
-        rn: Reg,
-        rm: Reg,
-    },
-    AluRRSImm16 {
-        alu_op: ALUOp,
-        rd: WritableReg,
-        rn: Reg,
-        imm: i16,
-    },
-    AluRR {
-        alu_op: ALUOp,
-        rd: WritableReg,
-        ri: Reg,
-        rm: Reg,
-    },
-    AluRX {
-        alu_op: ALUOp,
-        rd: WritableReg,
-        ri: Reg,
-        mem: MemArg,
-    },
-    AluRSImm16 {
-        alu_op: ALUOp,
-        rd: WritableReg,
-        ri: Reg,
-        imm: i16,
-    },
-    AluRSImm32 {
-        alu_op: ALUOp,
-        rd: WritableReg,
-        ri: Reg,
-        imm: i32,
-    },
-    AluRUImm32 {
-        alu_op: ALUOp,
-        rd: WritableReg,
-        ri: Reg,
-        imm: u32,
-    },
-    AluRUImm16Shifted {
-        alu_op: ALUOp,
-        rd: WritableReg,
-        ri: Reg,
-        imm: UImm16Shifted,
-    },
-    AluRUImm32Shifted {
-        alu_op: ALUOp,
-        rd: WritableReg,
-        ri: Reg,
-        imm: UImm32Shifted,
-    },
-    SMulWide {
-        rd: WritableRegPair,
-        rn: Reg,
-        rm: Reg,
-    },
-    UMulWide {
-        rd: WritableRegPair,
-        ri: Reg,
-        rn: Reg,
-    },
-    SDivMod32 {
-        rd: WritableRegPair,
-        ri: Reg,
-        rn: Reg,
-    },
-    SDivMod64 {
-        rd: WritableRegPair,
-        ri: Reg,
-        rn: Reg,
-    },
-    UDivMod32 {
-        rd: WritableRegPair,
-        ri: RegPair,
-        rn: Reg,
-    },
-    UDivMod64 {
-        rd: WritableRegPair,
-        ri: RegPair,
-        rn: Reg,
-    },
-    Flogr {
-        rd: WritableRegPair,
-        rn: Reg,
-    },
-    ShiftRR {
-        shift_op: ShiftOp,
-        rd: WritableReg,
-        rn: Reg,
-        shift_imm: u8,
-        shift_reg: Reg,
-    },
-    RxSBG {
-        op: RxSBGOp,
-        rd: WritableReg,
-        ri: Reg,
-        rn: Reg,
-        start_bit: u8,
-        end_bit: u8,
-        rotate_amt: i8,
-    },
-    RxSBGTest {
-        op: RxSBGOp,
-        rd: Reg,
-        rn: Reg,
-        start_bit: u8,
-        end_bit: u8,
-        rotate_amt: i8,
-    },
-    UnaryRR {
-        op: UnaryOp,
-        rd: WritableReg,
-        rn: Reg,
-    },
-    CmpRR {
-        op: CmpOp,
-        rn: Reg,
-        rm: Reg,
-    },
-    CmpRX {
-        op: CmpOp,
-        rn: Reg,
-        mem: MemArg,
-    },
-    CmpRSImm16 {
-        op: CmpOp,
-        rn: Reg,
-        imm: i16,
-    },
-    CmpRSImm32 {
-        op: CmpOp,
-        rn: Reg,
-        imm: i32,
-    },
-    CmpRUImm32 {
-        op: CmpOp,
-        rn: Reg,
-        imm: u32,
-    },
-    CmpTrapRR {
-        op: CmpOp,
-        rn: Reg,
-        rm: Reg,
-        cond: Cond,
-        trap_code: TrapCode,
-    },
-    CmpTrapRSImm16 {
-        op: CmpOp,
-        rn: Reg,
-        imm: i16,
-        cond: Cond,
-        trap_code: TrapCode,
-    },
-    CmpTrapRUImm16 {
-        op: CmpOp,
-        rn: Reg,
-        imm: u16,
-        cond: Cond,
-        trap_code: TrapCode,
-    },
-    AtomicRmw {
-        alu_op: ALUOp,
-        rd: WritableReg,
-        rn: Reg,
-        mem: MemArg,
-    },
-    AtomicCas32 {
-        rd: WritableReg,
-        ri: Reg,
-        rn: Reg,
-        mem: MemArg,
-    },
-    AtomicCas64 {
-        rd: WritableReg,
-        ri: Reg,
-        rn: Reg,
-        mem: MemArg,
-    },
-    Fence,
-    Load32 {
-        rd: WritableReg,
-        mem: MemArg,
-    },
-    Load32ZExt8 {
-        rd: WritableReg,
-        mem: MemArg,
-    },
-    Load32SExt8 {
-        rd: WritableReg,
-        mem: MemArg,
-    },
-    Load32ZExt16 {
-        rd: WritableReg,
-        mem: MemArg,
-    },
-    Load32SExt16 {
-        rd: WritableReg,
-        mem: MemArg,
-    },
-    Load64 {
-        rd: WritableReg,
-        mem: MemArg,
-    },
-    Load64ZExt8 {
-        rd: WritableReg,
-        mem: MemArg,
-    },
-    Load64SExt8 {
-        rd: WritableReg,
-        mem: MemArg,
-    },
-    Load64ZExt16 {
-        rd: WritableReg,
-        mem: MemArg,
-    },
-    Load64SExt16 {
-        rd: WritableReg,
-        mem: MemArg,
-    },
-    Load64ZExt32 {
-        rd: WritableReg,
-        mem: MemArg,
-    },
-    Load64SExt32 {
-        rd: WritableReg,
-        mem: MemArg,
-    },
-    LoadRev16 {
-        rd: WritableReg,
-        mem: MemArg,
-    },
-    LoadRev32 {
-        rd: WritableReg,
-        mem: MemArg,
-    },
-    LoadRev64 {
-        rd: WritableReg,
-        mem: MemArg,
-    },
-    Store8 {
-        rd: Reg,
-        mem: MemArg,
-    },
-    Store16 {
-        rd: Reg,
-        mem: MemArg,
-    },
-    Store32 {
-        rd: Reg,
-        mem: MemArg,
-    },
-    Store64 {
-        rd: Reg,
-        mem: MemArg,
-    },
-    StoreImm8 {
-        imm: u8,
-        mem: MemArg,
-    },
-    StoreImm16 {
-        imm: i16,
-        mem: MemArg,
-    },
-    StoreImm32SExt16 {
-        imm: i16,
-        mem: MemArg,
-    },
-    StoreImm64SExt16 {
-        imm: i16,
-        mem: MemArg,
-    },
-    StoreRev16 {
-        rd: Reg,
-        mem: MemArg,
-    },
-    StoreRev32 {
-        rd: Reg,
-        mem: MemArg,
-    },
-    StoreRev64 {
-        rd: Reg,
-        mem: MemArg,
-    },
-    Mvc {
-        dst: MemArgPair,
-        src: MemArgPair,
-        len_minus_one: u8,
-    },
-    LoadMultiple64 {
-        rt: WritableReg,
-        rt2: WritableReg,
-        mem: MemArg,
-    },
-    StoreMultiple64 {
-        rt: Reg,
-        rt2: Reg,
-        mem: MemArg,
-    },
-    Mov32 {
-        rd: WritableReg,
-        rm: Reg,
-    },
-    Mov64 {
-        rd: WritableReg,
-        rm: Reg,
-    },
-    MovPReg {
-        rd: WritableReg,
-        rm: PReg,
-    },
-    Mov32Imm {
-        rd: WritableReg,
-        imm: u32,
-    },
-    Mov32SImm16 {
-        rd: WritableReg,
-        imm: i16,
-    },
-    Mov64SImm16 {
-        rd: WritableReg,
-        imm: i16,
-    },
-    Mov64SImm32 {
-        rd: WritableReg,
-        imm: i32,
-    },
-    Mov64UImm16Shifted {
-        rd: WritableReg,
-        imm: UImm16Shifted,
-    },
-    Mov64UImm32Shifted {
-        rd: WritableReg,
-        imm: UImm32Shifted,
-    },
-    Insert64UImm16Shifted {
-        rd: WritableReg,
-        ri: Reg,
-        imm: UImm16Shifted,
-    },
-    Insert64UImm32Shifted {
-        rd: WritableReg,
-        ri: Reg,
-        imm: UImm32Shifted,
-    },
-    LoadAR {
-        rd: WritableReg,
-        ar: u8,
-    },
-    InsertAR {
-        rd: WritableReg,
-        ri: Reg,
-        ar: u8,
-    },
-    Extend {
-        rd: WritableReg,
-        rn: Reg,
-        signed: bool,
-        from_bits: u8,
-        to_bits: u8,
-    },
-    CMov32 {
-        rd: WritableReg,
-        cond: Cond,
-        ri: Reg,
-        rm: Reg,
-    },
-    CMov64 {
-        rd: WritableReg,
-        cond: Cond,
-        ri: Reg,
-        rm: Reg,
-    },
-    CMov32SImm16 {
-        rd: WritableReg,
-        cond: Cond,
-        ri: Reg,
-        imm: i16,
-    },
-    CMov64SImm16 {
-        rd: WritableReg,
-        cond: Cond,
-        ri: Reg,
-        imm: i16,
-    },
-    FpuMove32 {
-        rd: WritableReg,
-        rn: Reg,
-    },
-    FpuMove64 {
-        rd: WritableReg,
-        rn: Reg,
-    },
-    FpuCMov32 {
-        rd: WritableReg,
-        cond: Cond,
-        ri: Reg,
-        rm: Reg,
-    },
-    FpuCMov64 {
-        rd: WritableReg,
-        cond: Cond,
-        ri: Reg,
-        rm: Reg,
-    },
-    FpuRR {
-        fpu_op: FPUOp1,
-        rd: WritableReg,
-        rn: Reg,
-    },
-    FpuRRR {
-        fpu_op: FPUOp2,
-        rd: WritableReg,
-        rn: Reg,
-        rm: Reg,
-    },
-    FpuRRRR {
-        fpu_op: FPUOp3,
-        rd: WritableReg,
-        rn: Reg,
-        rm: Reg,
-        ra: Reg,
-    },
-    FpuRound {
-        op: FpuRoundOp,
-        mode: FpuRoundMode,
-        rd: WritableReg,
-        rn: Reg,
-    },
-    FpuCmp32 {
-        rn: Reg,
-        rm: Reg,
-    },
-    FpuCmp64 {
-        rn: Reg,
-        rm: Reg,
-    },
-    LoadFpuConst32 {
-        rd: WritableReg,
-        const_data: u32,
-    },
-    LoadFpuConst64 {
-        rd: WritableReg,
-        const_data: u64,
-    },
-    VecRRR {
-        op: VecBinaryOp,
-        rd: WritableReg,
-        rn: Reg,
-        rm: Reg,
-    },
-    VecRR {
-        op: VecUnaryOp,
-        rd: WritableReg,
-        rn: Reg,
-    },
-    VecShiftRR {
-        shift_op: VecShiftOp,
-        rd: WritableReg,
-        rn: Reg,
-        shift_imm: u8,
-        shift_reg: Reg,
-    },
-    VecSelect {
-        rd: WritableReg,
-        rn: Reg,
-        rm: Reg,
-        ra: Reg,
-    },
-    VecPermute {
-        rd: WritableReg,
-        rn: Reg,
-        rm: Reg,
-        ra: Reg,
-    },
-    VecPermuteDWImm {
-        rd: WritableReg,
-        rn: Reg,
-        rm: Reg,
-        idx1: u8,
-        idx2: u8,
-    },
-    VecIntCmp {
-        op: VecIntCmpOp,
-        rd: WritableReg,
-        rn: Reg,
-        rm: Reg,
-    },
-    VecIntCmpS {
-        op: VecIntCmpOp,
-        rd: WritableReg,
-        rn: Reg,
-        rm: Reg,
-    },
-    VecFloatCmp {
-        op: VecFloatCmpOp,
-        rd: WritableReg,
-        rn: Reg,
-        rm: Reg,
-    },
-    VecFloatCmpS {
-        op: VecFloatCmpOp,
-        rd: WritableReg,
-        rn: Reg,
-        rm: Reg,
-    },
-    VecInt128SCmpHi {
-        tmp: WritableReg,
-        rn: Reg,
-        rm: Reg,
-    },
-    VecInt128UCmpHi {
-        tmp: WritableReg,
-        rn: Reg,
-        rm: Reg,
-    },
-    VecLoad {
-        rd: WritableReg,
-        mem: MemArg,
-    },
-    VecLoadRev {
-        rd: WritableReg,
-        mem: MemArg,
-    },
-    VecLoadByte16Rev {
-        rd: WritableReg,
-        mem: MemArg,
-    },
-    VecLoadByte32Rev {
-        rd: WritableReg,
-        mem: MemArg,
-    },
-    VecLoadByte64Rev {
-        rd: WritableReg,
-        mem: MemArg,
-    },
-    VecLoadElt16Rev {
-        rd: WritableReg,
-        mem: MemArg,
-    },
-    VecLoadElt32Rev {
-        rd: WritableReg,
-        mem: MemArg,
-    },
-    VecLoadElt64Rev {
-        rd: WritableReg,
-        mem: MemArg,
-    },
-    VecStore {
-        rd: Reg,
-        mem: MemArg,
-    },
-    VecStoreRev {
-        rd: Reg,
-        mem: MemArg,
-    },
-    VecStoreByte16Rev {
-        rd: Reg,
-        mem: MemArg,
-    },
-    VecStoreByte32Rev {
-        rd: Reg,
-        mem: MemArg,
-    },
-    VecStoreByte64Rev {
-        rd: Reg,
-        mem: MemArg,
-    },
-    VecStoreElt16Rev {
-        rd: Reg,
-        mem: MemArg,
-    },
-    VecStoreElt32Rev {
-        rd: Reg,
-        mem: MemArg,
-    },
-    VecStoreElt64Rev {
-        rd: Reg,
-        mem: MemArg,
-    },
-    VecLoadReplicate {
-        size: u32,
-        rd: WritableReg,
-        mem: MemArg,
-    },
-    VecLoadReplicateRev {
-        size: u32,
-        rd: WritableReg,
-        mem: MemArg,
-    },
-    VecMov {
-        rd: WritableReg,
-        rn: Reg,
-    },
-    VecCMov {
-        rd: WritableReg,
-        cond: Cond,
-        ri: Reg,
-        rm: Reg,
-    },
-    MovToVec128 {
-        rd: WritableReg,
-        rn: Reg,
-        rm: Reg,
-    },
-    VecLoadConst {
-        rd: WritableReg,
-        const_data: u128,
-    },
-    VecLoadConstReplicate {
-        size: u32,
-        rd: WritableReg,
-        const_data: u64,
-    },
-    VecImmByteMask {
-        rd: WritableReg,
-        mask: u16,
-    },
-    VecImmBitMask {
-        size: u32,
-        rd: WritableReg,
-        start_bit: u8,
-        end_bit: u8,
-    },
-    VecImmReplicate {
-        size: u32,
-        rd: WritableReg,
-        imm: i16,
-    },
-    VecLoadLane {
-        size: u32,
-        rd: WritableReg,
-        ri: Reg,
-        mem: MemArg,
-        lane_imm: u8,
-    },
-    VecLoadLaneUndef {
-        size: u32,
-        rd: WritableReg,
-        mem: MemArg,
-        lane_imm: u8,
-    },
-    VecLoadLaneRev {
-        size: u32,
-        rd: WritableReg,
-        ri: Reg,
-        mem: MemArg,
-        lane_imm: u8,
-    },
-    VecLoadLaneRevUndef {
-        size: u32,
-        rd: WritableReg,
-        mem: MemArg,
-        lane_imm: u8,
-    },
-    VecStoreLane {
-        size: u32,
-        rd: Reg,
-        mem: MemArg,
-        lane_imm: u8,
-    },
-    VecStoreLaneRev {
-        size: u32,
-        rd: Reg,
-        mem: MemArg,
-        lane_imm: u8,
-    },
-    VecInsertLane {
-        size: u32,
-        rd: WritableReg,
-        ri: Reg,
-        rn: Reg,
-        lane_imm: u8,
-        lane_reg: Reg,
-    },
-    VecInsertLaneUndef {
-        size: u32,
-        rd: WritableReg,
-        rn: Reg,
-        lane_imm: u8,
-        lane_reg: Reg,
-    },
-    VecExtractLane {
-        size: u32,
-        rd: WritableReg,
-        rn: Reg,
-        lane_imm: u8,
-        lane_reg: Reg,
-    },
-    VecInsertLaneImm {
-        size: u32,
-        rd: WritableReg,
-        ri: Reg,
-        imm: i16,
-        lane_imm: u8,
-    },
-    VecReplicateLane {
-        size: u32,
-        rd: WritableReg,
-        rn: Reg,
-        lane_imm: u8,
-    },
-    Call {
-        link: WritableReg,
-        info: BoxCallInfo,
-    },
-    CallInd {
-        link: WritableReg,
-        info: BoxCallIndInfo,
-    },
-    Args {
-        args: VecArgPair,
-    },
-    Ret {
-        link: Reg,
-        rets: VecRetPair,
-        stack_bytes_to_pop: u32,
-    },
-    Jump {
-        dest: MachLabel,
-    },
-    CondBr {
-        taken: MachLabel,
-        not_taken: MachLabel,
-        cond: Cond,
-    },
-    TrapIf {
-        cond: Cond,
-        trap_code: TrapCode,
-    },
-    OneWayCondBr {
-        target: MachLabel,
-        cond: Cond,
-    },
-    IndirectBr {
-        rn: Reg,
-        targets: VecMachLabel,
-    },
-    Debugtrap,
-    Trap {
-        trap_code: TrapCode,
-    },
-    JTSequence {
-        ridx: Reg,
-        targets: VecMachLabel,
-    },
-    LoadSymbolReloc {
-        rd: WritableReg,
-        symbol_reloc: BoxSymbolReloc,
-    },
-    LoadAddr {
-        rd: WritableReg,
-        mem: MemArg,
-    },
-    Loop {
-        body: VecMInst,
-        cond: Cond,
-    },
-    CondBreak {
-        cond: Cond,
-    },
-    VirtualSPOffsetAdj {
-        offset: i64,
-    },
-    DummyUse {
-        reg: Reg,
-    },
-    Unwind {
-        inst: UnwindInst,
-    },
-}
-
-/// Internal type SymbolReloc: defined at src/isa/s390x/inst.isle line 1018.
-#[derive(Clone, Debug)]
-pub enum SymbolReloc {
-    Absolute { name: ExternalName, offset: i64 },
-    TlsGd { name: ExternalName },
-}
-
-/// Internal type ALUOp: defined at src/isa/s390x/inst.isle line 1035.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum ALUOp {
-    Add32,
-    Add32Ext16,
-    Add64,
-    Add64Ext16,
-    Add64Ext32,
-    AddLogical32,
-    AddLogical64,
-    AddLogical64Ext32,
-    Sub32,
-    Sub32Ext16,
-    Sub64,
-    Sub64Ext16,
-    Sub64Ext32,
-    SubLogical32,
-    SubLogical64,
-    SubLogical64Ext32,
-    Mul32,
-    Mul32Ext16,
-    Mul64,
-    Mul64Ext16,
-    Mul64Ext32,
-    And32,
-    And64,
-    Orr32,
-    Orr64,
-    Xor32,
-    Xor64,
-    NotAnd32,
-    NotAnd64,
-    NotOrr32,
-    NotOrr64,
-    NotXor32,
-    NotXor64,
-    AndNot32,
-    AndNot64,
-    OrrNot32,
-    OrrNot64,
-}
-
-/// Internal type UnaryOp: defined at src/isa/s390x/inst.isle line 1082.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum UnaryOp {
-    Abs32,
-    Abs64,
-    Abs64Ext32,
-    Neg32,
-    Neg64,
-    Neg64Ext32,
-    PopcntByte,
-    PopcntReg,
-    BSwap32,
-    BSwap64,
-}
-
-/// Internal type ShiftOp: defined at src/isa/s390x/inst.isle line 1097.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum ShiftOp {
-    RotL32,
-    RotL64,
-    LShL32,
-    LShL64,
-    LShR32,
-    LShR64,
-    AShR32,
-    AShR64,
-}
-
-/// Internal type RxSBGOp: defined at src/isa/s390x/inst.isle line 1110.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum RxSBGOp {
-    Insert,
-    And,
-    Or,
-    Xor,
-}
-
-/// Internal type CmpOp: defined at src/isa/s390x/inst.isle line 1119.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum CmpOp {
-    CmpS32,
-    CmpS32Ext16,
-    CmpS64,
-    CmpS64Ext16,
-    CmpS64Ext32,
-    CmpL32,
-    CmpL32Ext16,
-    CmpL64,
-    CmpL64Ext16,
-    CmpL64Ext32,
-}
-
-/// Internal type VecBinaryOp: defined at src/isa/s390x/inst.isle line 1134.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum VecBinaryOp {
-    Add8x16,
-    Add16x8,
-    Add32x4,
-    Add64x2,
-    Add128,
-    Sub8x16,
-    Sub16x8,
-    Sub32x4,
-    Sub64x2,
-    Sub128,
-    Mul8x16,
-    Mul16x8,
-    Mul32x4,
-    UMulHi8x16,
-    UMulHi16x8,
-    UMulHi32x4,
-    SMulHi8x16,
-    SMulHi16x8,
-    SMulHi32x4,
-    UMulEven8x16,
-    UMulEven16x8,
-    UMulEven32x4,
-    SMulEven8x16,
-    SMulEven16x8,
-    SMulEven32x4,
-    UMulOdd8x16,
-    UMulOdd16x8,
-    UMulOdd32x4,
-    SMulOdd8x16,
-    SMulOdd16x8,
-    SMulOdd32x4,
-    UMax8x16,
-    UMax16x8,
-    UMax32x4,
-    UMax64x2,
-    SMax8x16,
-    SMax16x8,
-    SMax32x4,
-    SMax64x2,
-    UMin8x16,
-    UMin16x8,
-    UMin32x4,
-    UMin64x2,
-    SMin8x16,
-    SMin16x8,
-    SMin32x4,
-    SMin64x2,
-    UAvg8x16,
-    UAvg16x8,
-    UAvg32x4,
-    UAvg64x2,
-    SAvg8x16,
-    SAvg16x8,
-    SAvg32x4,
-    SAvg64x2,
-    And128,
-    Orr128,
-    Xor128,
-    NotAnd128,
-    NotOrr128,
-    NotXor128,
-    AndNot128,
-    OrrNot128,
-    BitPermute128,
-    LShLByByte128,
-    LShRByByte128,
-    AShRByByte128,
-    LShLByBit128,
-    LShRByBit128,
-    AShRByBit128,
-    Pack16x8,
-    Pack32x4,
-    Pack64x2,
-    PackUSat16x8,
-    PackUSat32x4,
-    PackUSat64x2,
-    PackSSat16x8,
-    PackSSat32x4,
-    PackSSat64x2,
-    MergeLow8x16,
-    MergeLow16x8,
-    MergeLow32x4,
-    MergeLow64x2,
-    MergeHigh8x16,
-    MergeHigh16x8,
-    MergeHigh32x4,
-    MergeHigh64x2,
-}
-
-/// Internal type VecUnaryOp: defined at src/isa/s390x/inst.isle line 1236.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum VecUnaryOp {
-    Abs8x16,
-    Abs16x8,
-    Abs32x4,
-    Abs64x2,
-    Neg8x16,
-    Neg16x8,
-    Neg32x4,
-    Neg64x2,
-    Popcnt8x16,
-    Popcnt16x8,
-    Popcnt32x4,
-    Popcnt64x2,
-    Clz8x16,
-    Clz16x8,
-    Clz32x4,
-    Clz64x2,
-    Ctz8x16,
-    Ctz16x8,
-    Ctz32x4,
-    Ctz64x2,
-    UnpackULow8x16,
-    UnpackULow16x8,
-    UnpackULow32x4,
-    UnpackUHigh8x16,
-    UnpackUHigh16x8,
-    UnpackUHigh32x4,
-    UnpackSLow8x16,
-    UnpackSLow16x8,
-    UnpackSLow32x4,
-    UnpackSHigh8x16,
-    UnpackSHigh16x8,
-    UnpackSHigh32x4,
-}
-
-/// Internal type VecShiftOp: defined at src/isa/s390x/inst.isle line 1277.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum VecShiftOp {
-    RotL8x16,
-    RotL16x8,
-    RotL32x4,
-    RotL64x2,
-    LShL8x16,
-    LShL16x8,
-    LShL32x4,
-    LShL64x2,
-    LShR8x16,
-    LShR16x8,
-    LShR32x4,
-    LShR64x2,
-    AShR8x16,
-    AShR16x8,
-    AShR32x4,
-    AShR64x2,
-}
-
-/// Internal type VecIntCmpOp: defined at src/isa/s390x/inst.isle line 1298.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum VecIntCmpOp {
-    CmpEq8x16,
-    CmpEq16x8,
-    CmpEq32x4,
-    CmpEq64x2,
-    SCmpHi8x16,
-    SCmpHi16x8,
-    SCmpHi32x4,
-    SCmpHi64x2,
-    UCmpHi8x16,
-    UCmpHi16x8,
-    UCmpHi32x4,
-    UCmpHi64x2,
-}
-
-/// Internal type VecFloatCmpOp: defined at src/isa/s390x/inst.isle line 1315.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum VecFloatCmpOp {
-    CmpEq32x4,
-    CmpEq64x2,
-    CmpHi32x4,
-    CmpHi64x2,
-    CmpHiEq32x4,
-    CmpHiEq64x2,
-}
-
-/// Internal type FPUOp1: defined at src/isa/s390x/inst.isle line 1326.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum FPUOp1 {
-    Abs32,
-    Abs64,
-    Abs32x4,
-    Abs64x2,
-    Neg32,
-    Neg64,
-    Neg32x4,
-    Neg64x2,
-    NegAbs32,
-    NegAbs64,
-    NegAbs32x4,
-    NegAbs64x2,
-    Sqrt32,
-    Sqrt64,
-    Sqrt32x4,
-    Sqrt64x2,
-    Cvt32To64,
-    Cvt32x4To64x2,
-}
-
-/// Internal type FPUOp2: defined at src/isa/s390x/inst.isle line 1349.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum FPUOp2 {
-    Add32,
-    Add64,
-    Add32x4,
-    Add64x2,
-    Sub32,
-    Sub64,
-    Sub32x4,
-    Sub64x2,
-    Mul32,
-    Mul64,
-    Mul32x4,
-    Mul64x2,
-    Div32,
-    Div64,
-    Div32x4,
-    Div64x2,
-    Max32,
-    Max64,
-    Max32x4,
-    Max64x2,
-    Min32,
-    Min64,
-    Min32x4,
-    Min64x2,
-    MaxPseudo32,
-    MaxPseudo64,
-    MaxPseudo32x4,
-    MaxPseudo64x2,
-    MinPseudo32,
-    MinPseudo64,
-    MinPseudo32x4,
-    MinPseudo64x2,
-}
-
-/// Internal type FPUOp3: defined at src/isa/s390x/inst.isle line 1386.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum FPUOp3 {
-    MAdd32,
-    MAdd64,
-    MAdd32x4,
-    MAdd64x2,
-    MSub32,
-    MSub64,
-    MSub32x4,
-    MSub64x2,
-}
-
-/// Internal type FpuRoundOp: defined at src/isa/s390x/inst.isle line 1399.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum FpuRoundOp {
-    Cvt64To32,
-    Cvt64x2To32x4,
-    Round32,
-    Round64,
-    Round32x4,
-    Round64x2,
-    ToSInt32,
-    ToSInt64,
-    ToUInt32,
-    ToUInt64,
-    ToSInt32x4,
-    ToSInt64x2,
-    ToUInt32x4,
-    ToUInt64x2,
-    FromSInt32,
-    FromSInt64,
-    FromUInt32,
-    FromUInt64,
-    FromSInt32x4,
-    FromSInt64x2,
-    FromUInt32x4,
-    FromUInt64x2,
-}
-
-/// Internal type FpuRoundMode: defined at src/isa/s390x/inst.isle line 1426.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum FpuRoundMode {
-    Current,
-    ToNearest,
-    ShorterPrecision,
-    ToNearestTiesToEven,
-    ToZero,
-    ToPosInfinity,
-    ToNegInfinity,
-}
-
-/// Internal type LaneOrder: defined at src/isa/s390x/inst.isle line 1467.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum LaneOrder {
-    LittleEndian,
-    BigEndian,
-}
-
-/// Internal type ProducesBool: defined at src/isa/s390x/inst.isle line 3347.
-#[derive(Clone, Debug)]
-pub enum ProducesBool {
-    ProducesBool { producer: ProducesFlags, cond: Cond },
-}
-
-// Generated as internal constructor for term output_reg.
-pub fn constructor_output_reg<C: Context>(ctx: &mut C, arg0: Reg) -> InstOutput {
-    let v1 = C::value_reg(ctx, arg0);
-    let v2 = C::output(ctx, v1);
-    // Rule at src/prelude_lower.isle line 65.
-    return v2;
-}
-
-// Generated as internal constructor for term output_value.
-pub fn constructor_output_value<C: Context>(ctx: &mut C, arg0: Value) -> InstOutput {
-    let v1 = C::put_in_regs(ctx, arg0);
-    let v2 = C::output(ctx, v1);
-    // Rule at src/prelude_lower.isle line 69.
-    return v2;
-}
-
-// Generated as internal constructor for term temp_reg.
-pub fn constructor_temp_reg<C: Context>(ctx: &mut C, arg0: Type) -> Reg {
-    let v1 = C::temp_writable_reg(ctx, arg0);
-    let v2 = C::writable_reg_to_reg(ctx, v1);
-    // Rule at src/prelude_lower.isle line 89.
-    return v2;
-}
-
-// Generated as internal constructor for term value_regs_range.
-pub fn constructor_value_regs_range<C: Context>(ctx: &mut C, arg0: ValueRegs) -> Range {
-    let v2 = C::value_regs_len(ctx, arg0);
-    let v3 = C::range(ctx, 0x0, v2);
-    // Rule at src/prelude_lower.isle line 138.
-    return v3;
-}
-
-// Generated as internal constructor for term lo_reg.
-pub fn constructor_lo_reg<C: Context>(ctx: &mut C, arg0: Value) -> Reg {
-    let v1 = C::put_in_regs(ctx, arg0);
-    let v3 = C::value_regs_get(ctx, v1, 0x0);
-    // Rule at src/prelude_lower.isle line 149.
-    return v3;
-}
-
-// Generated as internal constructor for term multi_reg_to_pair_and_single.
-pub fn constructor_multi_reg_to_pair_and_single<C: Context>(
-    ctx: &mut C,
-    arg0: &MultiReg,
-) -> InstOutput {
-    if let &MultiReg::Three {
-        a: v1,
-        b: v2,
-        c: v3,
-    } = arg0
-    {
-        let v4 = C::value_regs(ctx, v1, v2);
-        let v5 = C::value_reg(ctx, v3);
-        let v6 = C::output_pair(ctx, v4, v5);
-        // Rule at src/prelude_lower.isle line 160.
-        return v6;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "multi_reg_to_pair_and_single", "src/prelude_lower.isle line 159"
-    )
-}
-
-// Generated as internal constructor for term multi_reg_to_pair.
-pub fn constructor_multi_reg_to_pair<C: Context>(ctx: &mut C, arg0: &MultiReg) -> InstOutput {
-    if let &MultiReg::Two { a: v1, b: v2 } = arg0 {
-        let v3 = C::value_regs(ctx, v1, v2);
-        let v4 = C::output(ctx, v3);
-        // Rule at src/prelude_lower.isle line 165.
-        return v4;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "multi_reg_to_pair", "src/prelude_lower.isle line 164"
-    )
-}
-
-// Generated as internal constructor for term multi_reg_to_single.
-pub fn constructor_multi_reg_to_single<C: Context>(ctx: &mut C, arg0: &MultiReg) -> InstOutput {
-    if let &MultiReg::One { a: v1 } = arg0 {
-        let v2 = C::value_reg(ctx, v1);
-        let v3 = C::output(ctx, v2);
-        // Rule at src/prelude_lower.isle line 170.
-        return v3;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "multi_reg_to_single", "src/prelude_lower.isle line 169"
-    )
-}
-
-// Generated as internal constructor for term emit_side_effect.
-pub fn constructor_emit_side_effect<C: Context>(ctx: &mut C, arg0: &SideEffectNoResult) -> Unit {
-    match arg0 {
-        &SideEffectNoResult::Inst { inst: ref v1 } => {
-            let v2 = C::emit(ctx, v1);
-            // Rule at src/prelude_lower.isle line 319.
-            return v2;
-        }
-        &SideEffectNoResult::Inst2 {
-            inst1: ref v3,
-            inst2: ref v4,
-        } => {
-            let v5 = C::emit(ctx, v3);
-            let v6 = C::emit(ctx, v4);
-            // Rule at src/prelude_lower.isle line 321.
-            return v6;
-        }
-        &SideEffectNoResult::Inst3 {
-            inst1: ref v7,
-            inst2: ref v8,
-            inst3: ref v9,
-        } => {
-            let v10 = C::emit(ctx, v7);
-            let v11 = C::emit(ctx, v8);
-            let v12 = C::emit(ctx, v9);
-            // Rule at src/prelude_lower.isle line 324.
-            return v12;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "emit_side_effect", "src/prelude_lower.isle line 318"
-    )
-}
-
-// Generated as internal constructor for term side_effect.
-pub fn constructor_side_effect<C: Context>(ctx: &mut C, arg0: &SideEffectNoResult) -> InstOutput {
-    let v1 = constructor_emit_side_effect(ctx, arg0);
-    let v2 = C::output_none(ctx);
-    // Rule at src/prelude_lower.isle line 332.
-    return v2;
-}
-
-// Generated as internal constructor for term side_effect_concat.
-pub fn constructor_side_effect_concat<C: Context>(
-    ctx: &mut C,
-    arg0: &SideEffectNoResult,
-    arg1: &SideEffectNoResult,
-) -> SideEffectNoResult {
-    match arg0 {
-        &SideEffectNoResult::Inst { inst: ref v1 } => {
-            match arg1 {
-                &SideEffectNoResult::Inst { inst: ref v3 } => {
-                    let v4 = SideEffectNoResult::Inst2 {
-                        inst1: v1.clone(),
-                        inst2: v3.clone(),
-                    };
-                    // Rule at src/prelude_lower.isle line 337.
-                    return v4;
-                }
-                &SideEffectNoResult::Inst2 {
-                    inst1: ref v5,
-                    inst2: ref v6,
-                } => {
-                    let v7 = SideEffectNoResult::Inst3 {
-                        inst1: v1.clone(),
-                        inst2: v5.clone(),
-                        inst3: v6.clone(),
-                    };
-                    // Rule at src/prelude_lower.isle line 339.
-                    return v7;
-                }
-                _ => {}
-            }
-        }
-        &SideEffectNoResult::Inst2 {
-            inst1: ref v8,
-            inst2: ref v9,
-        } => {
-            if let &SideEffectNoResult::Inst { inst: ref v3 } = arg1 {
-                let v10 = SideEffectNoResult::Inst3 {
-                    inst1: v8.clone(),
-                    inst2: v9.clone(),
-                    inst3: v3.clone(),
-                };
-                // Rule at src/prelude_lower.isle line 341.
-                return v10;
-            }
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "side_effect_concat", "src/prelude_lower.isle line 336"
-    )
-}
-
-// Generated as internal constructor for term produces_flags_concat.
-pub fn constructor_produces_flags_concat<C: Context>(
-    ctx: &mut C,
-    arg0: &ProducesFlags,
-    arg1: &ProducesFlags,
-) -> ProducesFlags {
-    if let &ProducesFlags::ProducesFlagsSideEffect { inst: ref v1 } = arg0 {
-        if let &ProducesFlags::ProducesFlagsSideEffect { inst: ref v3 } = arg1 {
-            let v4 = ProducesFlags::ProducesFlagsTwiceSideEffect {
-                inst1: v1.clone(),
-                inst2: v3.clone(),
-            };
-            // Rule at src/prelude_lower.isle line 366.
-            return v4;
-        }
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "produces_flags_concat", "src/prelude_lower.isle line 365"
-    )
-}
-
-// Generated as internal constructor for term produces_flags_get_reg.
-pub fn constructor_produces_flags_get_reg<C: Context>(ctx: &mut C, arg0: &ProducesFlags) -> Reg {
-    match arg0 {
-        &ProducesFlags::ProducesFlagsReturnsReg {
-            inst: ref v1,
-            result: v2,
-        } => {
-            // Rule at src/prelude_lower.isle line 396.
-            return v2;
-        }
-        &ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
-            inst: ref v3,
-            result: v4,
-        } => {
-            // Rule at src/prelude_lower.isle line 397.
-            return v4;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "produces_flags_get_reg", "src/prelude_lower.isle line 395"
-    )
-}
-
-// Generated as internal constructor for term produces_flags_ignore.
-pub fn constructor_produces_flags_ignore<C: Context>(
-    ctx: &mut C,
-    arg0: &ProducesFlags,
-) -> ProducesFlags {
-    match arg0 {
-        &ProducesFlags::ProducesFlagsReturnsReg {
-            inst: ref v1,
-            result: v2,
-        } => {
-            let v3 = ProducesFlags::ProducesFlagsSideEffect { inst: v1.clone() };
-            // Rule at src/prelude_lower.isle line 402.
-            return v3;
-        }
-        &ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
-            inst: ref v4,
-            result: v5,
-        } => {
-            let v6 = ProducesFlags::ProducesFlagsSideEffect { inst: v4.clone() };
-            // Rule at src/prelude_lower.isle line 404.
-            return v6;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "produces_flags_ignore", "src/prelude_lower.isle line 401"
-    )
-}
-
-// Generated as internal constructor for term consumes_flags_concat.
-pub fn constructor_consumes_flags_concat<C: Context>(
-    ctx: &mut C,
-    arg0: &ConsumesFlags,
-    arg1: &ConsumesFlags,
-) -> ConsumesFlags {
-    match arg0 {
-        &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v8 } => {
-            if let &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v9 } = arg1 {
-                let v10 = ConsumesFlags::ConsumesFlagsSideEffect2 {
-                    inst1: v8.clone(),
-                    inst2: v9.clone(),
-                };
-                // Rule at src/prelude_lower.isle line 417.
-                return v10;
-            }
-        }
-        &ConsumesFlags::ConsumesFlagsReturnsReg {
-            inst: ref v1,
-            result: v2,
-        } => {
-            if let &ConsumesFlags::ConsumesFlagsReturnsReg {
-                inst: ref v4,
-                result: v5,
-            } = arg1
-            {
-                let v6 = C::value_regs(ctx, v2, v5);
-                let v7 = ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
-                    inst1: v1.clone(),
-                    inst2: v4.clone(),
-                    result: v6,
-                };
-                // Rule at src/prelude_lower.isle line 411.
-                return v7;
-            }
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "consumes_flags_concat", "src/prelude_lower.isle line 410"
-    )
-}
-
-// Generated as internal constructor for term with_flags.
-pub fn constructor_with_flags<C: Context>(
-    ctx: &mut C,
-    arg0: &ProducesFlags,
-    arg1: &ConsumesFlags,
-) -> ValueRegs {
-    match arg0 {
-        &ProducesFlags::ProducesFlagsSideEffect { inst: ref v12 } => {
-            match arg1 {
-                &ConsumesFlags::ConsumesFlagsReturnsReg {
-                    inst: ref v13,
-                    result: v14,
-                } => {
-                    let v15 = C::emit(ctx, v12);
-                    let v16 = C::emit(ctx, v13);
-                    let v17 = C::value_reg(ctx, v14);
-                    // Rule at src/prelude_lower.isle line 448.
-                    return v17;
-                }
-                &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
-                    inst1: ref v18,
-                    inst2: ref v19,
-                    result: v20,
-                } => {
-                    let v15 = C::emit(ctx, v12);
-                    let v21 = C::emit(ctx, v18);
-                    let v22 = C::emit(ctx, v19);
-                    // Rule at src/prelude_lower.isle line 454.
-                    return v20;
-                }
-                &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
-                    inst1: ref v23,
-                    inst2: ref v24,
-                    inst3: ref v25,
-                    inst4: ref v26,
-                    result: v27,
-                } => {
-                    let v15 = C::emit(ctx, v12);
-                    let v28 = C::emit(ctx, v23);
-                    let v29 = C::emit(ctx, v24);
-                    let v30 = C::emit(ctx, v25);
-                    let v31 = C::emit(ctx, v26);
-                    // Rule at src/prelude_lower.isle line 466.
-                    return v27;
-                }
-                _ => {}
-            }
-        }
-        &ProducesFlags::ProducesFlagsTwiceSideEffect {
-            inst1: ref v32,
-            inst2: ref v33,
-        } => {
-            match arg1 {
-                &ConsumesFlags::ConsumesFlagsReturnsReg {
-                    inst: ref v13,
-                    result: v14,
-                } => {
-                    let v34 = C::emit(ctx, v32);
-                    let v35 = C::emit(ctx, v33);
-                    let v36 = C::emit(ctx, v13);
-                    let v37 = C::value_reg(ctx, v14);
-                    // Rule at src/prelude_lower.isle line 482.
-                    return v37;
-                }
-                &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
-                    inst1: ref v18,
-                    inst2: ref v19,
-                    result: v20,
-                } => {
-                    let v34 = C::emit(ctx, v32);
-                    let v35 = C::emit(ctx, v33);
-                    let v38 = C::emit(ctx, v18);
-                    let v39 = C::emit(ctx, v19);
-                    // Rule at src/prelude_lower.isle line 489.
-                    return v20;
-                }
-                &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
-                    inst1: ref v23,
-                    inst2: ref v24,
-                    inst3: ref v25,
-                    inst4: ref v26,
-                    result: v27,
-                } => {
-                    let v34 = C::emit(ctx, v32);
-                    let v35 = C::emit(ctx, v33);
-                    let v40 = C::emit(ctx, v23);
-                    let v41 = C::emit(ctx, v24);
-                    let v42 = C::emit(ctx, v25);
-                    let v43 = C::emit(ctx, v26);
-                    // Rule at src/prelude_lower.isle line 502.
-                    return v27;
-                }
-                _ => {}
-            }
-        }
-        &ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
-            inst: ref v1,
-            result: v2,
-        } => {
-            match arg1 {
-                &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v9 } => {
-                    let v6 = C::emit(ctx, v1);
-                    let v10 = C::emit(ctx, v9);
-                    let v11 = C::value_reg(ctx, v2);
-                    // Rule at src/prelude_lower.isle line 442.
-                    return v11;
-                }
-                &ConsumesFlags::ConsumesFlagsReturnsResultWithProducer {
-                    inst: ref v4,
-                    result: v5,
-                } => {
-                    let v6 = C::emit(ctx, v1);
-                    let v7 = C::emit(ctx, v4);
-                    let v8 = C::value_regs(ctx, v2, v5);
-                    // Rule at src/prelude_lower.isle line 434.
-                    return v8;
-                }
-                _ => {}
-            }
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "with_flags", "src/prelude_lower.isle line 432"
-    )
-}
-
-// Generated as internal constructor for term with_flags_reg.
-pub fn constructor_with_flags_reg<C: Context>(
-    ctx: &mut C,
-    arg0: &ProducesFlags,
-    arg1: &ConsumesFlags,
-) -> Reg {
-    let v2 = constructor_with_flags(ctx, arg0, arg1);
-    let v4 = C::value_regs_get(ctx, v2, 0x0);
-    // Rule at src/prelude_lower.isle line 520.
-    return v4;
-}
-
-// Generated as internal constructor for term flags_to_producesflags.
-pub fn constructor_flags_to_producesflags<C: Context>(ctx: &mut C, arg0: Value) -> ProducesFlags {
-    let v1 = C::mark_value_used(ctx, arg0);
-    // Rule at src/prelude_lower.isle line 527.
-    return ProducesFlags::AlreadyExistingFlags;
-}
-
-// Generated as internal constructor for term with_flags_side_effect.
-pub fn constructor_with_flags_side_effect<C: Context>(
-    ctx: &mut C,
-    arg0: &ProducesFlags,
-    arg1: &ConsumesFlags,
-) -> SideEffectNoResult {
-    match arg0 {
-        &ProducesFlags::AlreadyExistingFlags => {
-            match arg1 {
-                &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v2 } => {
-                    let v3 = SideEffectNoResult::Inst { inst: v2.clone() };
-                    // Rule at src/prelude_lower.isle line 538.
-                    return v3;
-                }
-                &ConsumesFlags::ConsumesFlagsSideEffect2 {
-                    inst1: ref v4,
-                    inst2: ref v5,
-                } => {
-                    let v6 = SideEffectNoResult::Inst2 {
-                        inst1: v4.clone(),
-                        inst2: v5.clone(),
-                    };
-                    // Rule at src/prelude_lower.isle line 543.
-                    return v6;
-                }
-                _ => {}
-            }
-        }
-        &ProducesFlags::ProducesFlagsSideEffect { inst: ref v7 } => {
-            match arg1 {
-                &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v2 } => {
-                    let v8 = SideEffectNoResult::Inst2 {
-                        inst1: v7.clone(),
-                        inst2: v2.clone(),
-                    };
-                    // Rule at src/prelude_lower.isle line 548.
-                    return v8;
-                }
-                &ConsumesFlags::ConsumesFlagsSideEffect2 {
-                    inst1: ref v4,
-                    inst2: ref v5,
-                } => {
-                    let v9 = SideEffectNoResult::Inst3 {
-                        inst1: v7.clone(),
-                        inst2: v4.clone(),
-                        inst3: v5.clone(),
-                    };
-                    // Rule at src/prelude_lower.isle line 553.
-                    return v9;
-                }
-                _ => {}
-            }
-        }
-        &ProducesFlags::ProducesFlagsTwiceSideEffect {
-            inst1: ref v10,
-            inst2: ref v11,
-        } => {
-            if let &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v2 } = arg1 {
-                let v12 = SideEffectNoResult::Inst3 {
-                    inst1: v10.clone(),
-                    inst2: v11.clone(),
-                    inst3: v2.clone(),
-                };
-                // Rule at src/prelude_lower.isle line 558.
-                return v12;
-            }
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "with_flags_side_effect", "src/prelude_lower.isle line 536"
-    )
-}
-
-// Generated as internal constructor for term with_flags_chained.
-pub fn constructor_with_flags_chained<C: Context>(
-    ctx: &mut C,
-    arg0: &ProducesFlags,
-    arg1: &ConsumesAndProducesFlags,
-    arg2: &ConsumesFlags,
-) -> MultiReg {
-    match arg0 {
-        &ProducesFlags::ProducesFlagsSideEffect { inst: ref v1 } => {
-            match arg1 {
-                &ConsumesAndProducesFlags::SideEffect { inst: ref v3 } => {
-                    match arg2 {
-                        &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v5 } => {
-                            let v6 = C::emit(ctx, v1);
-                            let v7 = C::emit(ctx, v3);
-                            let v8 = C::emit(ctx, v5);
-                            // Rule at src/prelude_lower.isle line 567.
-                            return MultiReg::Empty;
-                        }
-                        &ConsumesFlags::ConsumesFlagsSideEffect2 {
-                            inst1: ref v10,
-                            inst2: ref v11,
-                        } => {
-                            let v6 = C::emit(ctx, v1);
-                            let v7 = C::emit(ctx, v3);
-                            let v12 = C::emit(ctx, v10);
-                            let v13 = C::emit(ctx, v11);
-                            // Rule at src/prelude_lower.isle line 575.
-                            return MultiReg::Empty;
-                        }
-                        &ConsumesFlags::ConsumesFlagsReturnsReg {
-                            inst: ref v14,
-                            result: v15,
-                        } => {
-                            let v6 = C::emit(ctx, v1);
-                            let v7 = C::emit(ctx, v3);
-                            let v16 = C::emit(ctx, v14);
-                            let v17 = MultiReg::One { a: v15 };
-                            // Rule at src/prelude_lower.isle line 584.
-                            return v17;
-                        }
-                        &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
-                            inst1: ref v18,
-                            inst2: ref v19,
-                            result: v20,
-                        } => {
-                            let v6 = C::emit(ctx, v1);
-                            let v7 = C::emit(ctx, v3);
-                            let v21 = C::emit(ctx, v18);
-                            let v22 = C::emit(ctx, v19);
-                            let v24 = C::value_regs_get(ctx, v20, 0x0);
-                            let v26 = C::value_regs_get(ctx, v20, 0x1);
-                            let v27 = MultiReg::Two { a: v24, b: v26 };
-                            // Rule at src/prelude_lower.isle line 592.
-                            return v27;
-                        }
-                        &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
-                            inst1: ref v28,
-                            inst2: ref v29,
-                            inst3: ref v30,
-                            inst4: ref v31,
-                            result: v32,
-                        } => {
-                            let v6 = C::emit(ctx, v1);
-                            let v7 = C::emit(ctx, v3);
-                            let v33 = C::emit(ctx, v28);
-                            let v34 = C::emit(ctx, v29);
-                            let v35 = C::emit(ctx, v30);
-                            let v36 = C::emit(ctx, v31);
-                            let v37 = C::value_regs_get(ctx, v32, 0x0);
-                            let v38 = C::value_regs_get(ctx, v32, 0x1);
-                            let v39 = MultiReg::Two { a: v37, b: v38 };
-                            // Rule at src/prelude_lower.isle line 601.
-                            return v39;
-                        }
-                        _ => {}
-                    }
-                }
-                &ConsumesAndProducesFlags::ReturnsReg {
-                    inst: ref v47,
-                    result: v48,
-                } => {
-                    match arg2 {
-                        &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v5 } => {
-                            let v6 = C::emit(ctx, v1);
-                            let v49 = C::emit(ctx, v47);
-                            let v8 = C::emit(ctx, v5);
-                            let v50 = MultiReg::One { a: v48 };
-                            // Rule at src/prelude_lower.isle line 661.
-                            return v50;
-                        }
-                        &ConsumesFlags::ConsumesFlagsSideEffect2 {
-                            inst1: ref v10,
-                            inst2: ref v11,
-                        } => {
-                            let v6 = C::emit(ctx, v1);
-                            let v49 = C::emit(ctx, v47);
-                            let v12 = C::emit(ctx, v10);
-                            let v13 = C::emit(ctx, v11);
-                            let v50 = MultiReg::One { a: v48 };
-                            // Rule at src/prelude_lower.isle line 669.
-                            return v50;
-                        }
-                        &ConsumesFlags::ConsumesFlagsReturnsReg {
-                            inst: ref v14,
-                            result: v15,
-                        } => {
-                            let v6 = C::emit(ctx, v1);
-                            let v49 = C::emit(ctx, v47);
-                            let v16 = C::emit(ctx, v14);
-                            let v51 = MultiReg::Two { a: v48, b: v15 };
-                            // Rule at src/prelude_lower.isle line 678.
-                            return v51;
-                        }
-                        &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
-                            inst1: ref v18,
-                            inst2: ref v19,
-                            result: v20,
-                        } => {
-                            let v6 = C::emit(ctx, v1);
-                            let v49 = C::emit(ctx, v47);
-                            let v21 = C::emit(ctx, v18);
-                            let v22 = C::emit(ctx, v19);
-                            let v24 = C::value_regs_get(ctx, v20, 0x0);
-                            let v26 = C::value_regs_get(ctx, v20, 0x1);
-                            let v52 = MultiReg::Three {
-                                a: v48,
-                                b: v24,
-                                c: v26,
-                            };
-                            // Rule at src/prelude_lower.isle line 686.
-                            return v52;
-                        }
-                        &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
-                            inst1: ref v28,
-                            inst2: ref v29,
-                            inst3: ref v30,
-                            inst4: ref v31,
-                            result: v32,
-                        } => {
-                            let v6 = C::emit(ctx, v1);
-                            let v49 = C::emit(ctx, v47);
-                            let v33 = C::emit(ctx, v28);
-                            let v34 = C::emit(ctx, v29);
-                            let v35 = C::emit(ctx, v30);
-                            let v36 = C::emit(ctx, v31);
-                            let v37 = C::value_regs_get(ctx, v32, 0x0);
-                            let v38 = C::value_regs_get(ctx, v32, 0x1);
-                            let v53 = MultiReg::Three {
-                                a: v48,
-                                b: v37,
-                                c: v38,
-                            };
-                            // Rule at src/prelude_lower.isle line 695.
-                            return v53;
-                        }
-                        _ => {}
-                    }
-                }
-                _ => {}
-            }
-        }
-        &ProducesFlags::ProducesFlagsReturnsReg {
-            inst: ref v40,
-            result: v41,
-        } => {
-            match arg1 {
-                &ConsumesAndProducesFlags::SideEffect { inst: ref v3 } => {
-                    match arg2 {
-                        &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v5 } => {
-                            let v42 = C::emit(ctx, v40);
-                            let v7 = C::emit(ctx, v3);
-                            let v8 = C::emit(ctx, v5);
-                            let v43 = MultiReg::One { a: v41 };
-                            // Rule at src/prelude_lower.isle line 614.
-                            return v43;
-                        }
-                        &ConsumesFlags::ConsumesFlagsSideEffect2 {
-                            inst1: ref v10,
-                            inst2: ref v11,
-                        } => {
-                            let v42 = C::emit(ctx, v40);
-                            let v7 = C::emit(ctx, v3);
-                            let v12 = C::emit(ctx, v10);
-                            let v13 = C::emit(ctx, v11);
-                            let v43 = MultiReg::One { a: v41 };
-                            // Rule at src/prelude_lower.isle line 622.
-                            return v43;
-                        }
-                        &ConsumesFlags::ConsumesFlagsReturnsReg {
-                            inst: ref v14,
-                            result: v15,
-                        } => {
-                            let v42 = C::emit(ctx, v40);
-                            let v7 = C::emit(ctx, v3);
-                            let v16 = C::emit(ctx, v14);
-                            let v44 = MultiReg::Two { a: v41, b: v15 };
-                            // Rule at src/prelude_lower.isle line 631.
-                            return v44;
-                        }
-                        &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
-                            inst1: ref v18,
-                            inst2: ref v19,
-                            result: v20,
-                        } => {
-                            let v42 = C::emit(ctx, v40);
-                            let v7 = C::emit(ctx, v3);
-                            let v21 = C::emit(ctx, v18);
-                            let v22 = C::emit(ctx, v19);
-                            let v24 = C::value_regs_get(ctx, v20, 0x0);
-                            let v26 = C::value_regs_get(ctx, v20, 0x1);
-                            let v45 = MultiReg::Three {
-                                a: v41,
-                                b: v24,
-                                c: v26,
-                            };
-                            // Rule at src/prelude_lower.isle line 639.
-                            return v45;
-                        }
-                        &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
-                            inst1: ref v28,
-                            inst2: ref v29,
-                            inst3: ref v30,
-                            inst4: ref v31,
-                            result: v32,
-                        } => {
-                            let v42 = C::emit(ctx, v40);
-                            let v7 = C::emit(ctx, v3);
-                            let v33 = C::emit(ctx, v28);
-                            let v34 = C::emit(ctx, v29);
-                            let v35 = C::emit(ctx, v30);
-                            let v36 = C::emit(ctx, v31);
-                            let v37 = C::value_regs_get(ctx, v32, 0x0);
-                            let v38 = C::value_regs_get(ctx, v32, 0x1);
-                            let v46 = MultiReg::Three {
-                                a: v41,
-                                b: v37,
-                                c: v38,
-                            };
-                            // Rule at src/prelude_lower.isle line 648.
-                            return v46;
-                        }
-                        _ => {}
-                    }
-                }
-                &ConsumesAndProducesFlags::ReturnsReg {
-                    inst: ref v47,
-                    result: v48,
-                } => {
-                    match arg2 {
-                        &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v5 } => {
-                            let v42 = C::emit(ctx, v40);
-                            let v49 = C::emit(ctx, v47);
-                            let v8 = C::emit(ctx, v5);
-                            let v54 = MultiReg::Two { a: v41, b: v48 };
-                            // Rule at src/prelude_lower.isle line 708.
-                            return v54;
-                        }
-                        &ConsumesFlags::ConsumesFlagsSideEffect2 {
-                            inst1: ref v10,
-                            inst2: ref v11,
-                        } => {
-                            let v42 = C::emit(ctx, v40);
-                            let v49 = C::emit(ctx, v47);
-                            let v12 = C::emit(ctx, v10);
-                            let v13 = C::emit(ctx, v11);
-                            let v54 = MultiReg::Two { a: v41, b: v48 };
-                            // Rule at src/prelude_lower.isle line 716.
-                            return v54;
-                        }
-                        &ConsumesFlags::ConsumesFlagsReturnsReg {
-                            inst: ref v14,
-                            result: v15,
-                        } => {
-                            let v42 = C::emit(ctx, v40);
-                            let v49 = C::emit(ctx, v47);
-                            let v16 = C::emit(ctx, v14);
-                            let v55 = MultiReg::Three {
-                                a: v41,
-                                b: v48,
-                                c: v15,
-                            };
-                            // Rule at src/prelude_lower.isle line 725.
-                            return v55;
-                        }
-                        &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
-                            inst1: ref v18,
-                            inst2: ref v19,
-                            result: v20,
-                        } => {
-                            let v42 = C::emit(ctx, v40);
-                            let v49 = C::emit(ctx, v47);
-                            let v21 = C::emit(ctx, v18);
-                            let v22 = C::emit(ctx, v19);
-                            let v24 = C::value_regs_get(ctx, v20, 0x0);
-                            let v26 = C::value_regs_get(ctx, v20, 0x1);
-                            let v56 = MultiReg::Four {
-                                a: v41,
-                                b: v48,
-                                c: v24,
-                                d: v26,
-                            };
-                            // Rule at src/prelude_lower.isle line 733.
-                            return v56;
-                        }
-                        &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
-                            inst1: ref v28,
-                            inst2: ref v29,
-                            inst3: ref v30,
-                            inst4: ref v31,
-                            result: v32,
-                        } => {
-                            let v42 = C::emit(ctx, v40);
-                            let v49 = C::emit(ctx, v47);
-                            let v33 = C::emit(ctx, v28);
-                            let v34 = C::emit(ctx, v29);
-                            let v35 = C::emit(ctx, v30);
-                            let v36 = C::emit(ctx, v31);
-                            let v37 = C::value_regs_get(ctx, v32, 0x0);
-                            let v38 = C::value_regs_get(ctx, v32, 0x1);
-                            let v57 = MultiReg::Four {
-                                a: v41,
-                                b: v48,
-                                c: v37,
-                                d: v38,
-                            };
-                            // Rule at src/prelude_lower.isle line 742.
-                            return v57;
-                        }
-                        _ => {}
-                    }
-                }
-                _ => {}
-            }
-        }
-        &ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
-            inst: ref v58,
-            result: v59,
-        } => {
-            if let &ConsumesAndProducesFlags::ReturnsReg {
-                inst: ref v47,
-                result: v48,
-            } = arg1
-            {
-                match arg2 {
-                    &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v5 } => {
-                        let v60 = C::emit(ctx, v58);
-                        let v49 = C::emit(ctx, v47);
-                        let v8 = C::emit(ctx, v5);
-                        let v61 = MultiReg::Two { a: v59, b: v48 };
-                        // Rule at src/prelude_lower.isle line 754.
-                        return v61;
-                    }
-                    &ConsumesFlags::ConsumesFlagsSideEffect2 {
-                        inst1: ref v10,
-                        inst2: ref v11,
-                    } => {
-                        let v60 = C::emit(ctx, v58);
-                        let v49 = C::emit(ctx, v47);
-                        let v12 = C::emit(ctx, v10);
-                        let v13 = C::emit(ctx, v11);
-                        let v61 = MultiReg::Two { a: v59, b: v48 };
-                        // Rule at src/prelude_lower.isle line 762.
-                        return v61;
-                    }
-                    &ConsumesFlags::ConsumesFlagsReturnsResultWithProducer {
-                        inst: ref v63,
-                        result: v64,
-                    } => {
-                        let v60 = C::emit(ctx, v58);
-                        let v49 = C::emit(ctx, v47);
-                        let v65 = C::emit(ctx, v63);
-                        let v66 = MultiReg::Three {
-                            a: v59,
-                            b: v48,
-                            c: v64,
-                        };
-                        // Rule at src/prelude_lower.isle line 779.
-                        return v66;
-                    }
-                    &ConsumesFlags::ConsumesFlagsReturnsReg {
-                        inst: ref v14,
-                        result: v15,
-                    } => {
-                        let v60 = C::emit(ctx, v58);
-                        let v49 = C::emit(ctx, v47);
-                        let v16 = C::emit(ctx, v14);
-                        let v62 = MultiReg::Three {
-                            a: v59,
-                            b: v48,
-                            c: v15,
-                        };
-                        // Rule at src/prelude_lower.isle line 771.
-                        return v62;
-                    }
-                    &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
-                        inst1: ref v18,
-                        inst2: ref v19,
-                        result: v20,
-                    } => {
-                        let v60 = C::emit(ctx, v58);
-                        let v49 = C::emit(ctx, v47);
-                        let v21 = C::emit(ctx, v18);
-                        let v22 = C::emit(ctx, v19);
-                        let v24 = C::value_regs_get(ctx, v20, 0x0);
-                        let v26 = C::value_regs_get(ctx, v20, 0x1);
-                        let v67 = MultiReg::Four {
-                            a: v59,
-                            b: v48,
-                            c: v24,
-                            d: v26,
-                        };
-                        // Rule at src/prelude_lower.isle line 787.
-                        return v67;
-                    }
-                    &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
-                        inst1: ref v28,
-                        inst2: ref v29,
-                        inst3: ref v30,
-                        inst4: ref v31,
-                        result: v32,
-                    } => {
-                        let v60 = C::emit(ctx, v58);
-                        let v49 = C::emit(ctx, v47);
-                        let v33 = C::emit(ctx, v28);
-                        let v34 = C::emit(ctx, v29);
-                        let v35 = C::emit(ctx, v30);
-                        let v36 = C::emit(ctx, v31);
-                        let v37 = C::value_regs_get(ctx, v32, 0x0);
-                        let v38 = C::value_regs_get(ctx, v32, 0x1);
-                        let v68 = MultiReg::Four {
-                            a: v59,
-                            b: v48,
-                            c: v37,
-                            d: v38,
-                        };
-                        // Rule at src/prelude_lower.isle line 796.
-                        return v68;
-                    }
-                    _ => {}
-                }
-            }
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "with_flags_chained", "src/prelude_lower.isle line 564"
-    )
-}
-
-// Generated as internal constructor for term lower_return.
-pub fn constructor_lower_return<C: Context>(ctx: &mut C, arg0: ValueSlice) -> InstOutput {
-    let v1 = C::gen_return(ctx, arg0);
-    let v2 = C::output_none(ctx);
-    // Rule at src/prelude_lower.isle line 996.
-    return v2;
-}
-
-// Generated as internal constructor for term lane_order_equal.
-pub fn constructor_lane_order_equal<C: Context>(
-    ctx: &mut C,
-    arg0: &LaneOrder,
-    arg1: &LaneOrder,
-) -> bool {
-    match arg0 {
-        &LaneOrder::LittleEndian => {
-            match arg1 {
-                &LaneOrder::LittleEndian => {
-                    // Rule at src/isa/s390x/inst.isle line 1481.
-                    return true;
-                }
-                &LaneOrder::BigEndian => {
-                    // Rule at src/isa/s390x/inst.isle line 1482.
-                    return false;
-                }
-                _ => {}
-            }
-        }
-        &LaneOrder::BigEndian => {
-            match arg1 {
-                &LaneOrder::LittleEndian => {
-                    // Rule at src/isa/s390x/inst.isle line 1483.
-                    return false;
-                }
-                &LaneOrder::BigEndian => {
-                    // Rule at src/isa/s390x/inst.isle line 1484.
-                    return true;
-                }
-                _ => {}
-            }
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "lane_order_equal", "src/isa/s390x/inst.isle line 1480"
-    )
-}
-
-// Generated as internal constructor for term lane_order_from_memflags.
-pub fn constructor_lane_order_from_memflags<C: Context>(ctx: &mut C, arg0: MemFlags) -> LaneOrder {
-    let v4 = C::bigendian(ctx, arg0);
-    if let Some(v5) = v4 {
-        // Rule at src/isa/s390x/inst.isle line 1489.
-        return LaneOrder::BigEndian;
-    }
-    let v1 = C::littleendian(ctx, arg0);
-    if let Some(v2) = v1 {
-        // Rule at src/isa/s390x/inst.isle line 1488.
-        return LaneOrder::LittleEndian;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "lane_order_from_memflags", "src/isa/s390x/inst.isle line 1487"
-    )
-}
-
-// Generated as internal constructor for term i64_nonzero.
-pub fn constructor_i64_nonzero<C: Context>(ctx: &mut C, arg0: i64) -> Option<i64> {
-    let v2 = C::i64_nonequal(ctx, arg0, 0x0);
-    if let Some(v3) = v2 {
-        // Rule at src/isa/s390x/inst.isle line 1541.
-        return Some(arg0);
-    }
-    None
-}
-
-// Generated as internal constructor for term i64_not_neg1.
-pub fn constructor_i64_not_neg1<C: Context>(ctx: &mut C, arg0: i64) -> Option<i64> {
-    let v2 = C::i64_nonequal(ctx, arg0, -0x1);
-    if let Some(v3) = v2 {
-        // Rule at src/isa/s390x/inst.isle line 1546.
-        return Some(arg0);
-    }
-    None
-}
-
-// Generated as internal constructor for term imm8x16.
-pub fn constructor_imm8x16<C: Context>(
-    ctx: &mut C,
-    arg0: u8,
-    arg1: u8,
-    arg2: u8,
-    arg3: u8,
-    arg4: u8,
-    arg5: u8,
-    arg6: u8,
-    arg7: u8,
-    arg8: u8,
-    arg9: u8,
-    arg10: u8,
-    arg11: u8,
-    arg12: u8,
-    arg13: u8,
-    arg14: u8,
-    arg15: u8,
-) -> u128 {
-    let v16 = C::u8_pair_concat(ctx, arg0, arg1);
-    let v17 = C::u8_pair_concat(ctx, arg2, arg3);
-    let v18 = C::u16_pair_concat(ctx, v16, v17);
-    let v19 = C::u8_pair_concat(ctx, arg4, arg5);
-    let v20 = C::u8_pair_concat(ctx, arg6, arg7);
-    let v21 = C::u16_pair_concat(ctx, v19, v20);
-    let v22 = C::u32_pair_concat(ctx, v18, v21);
-    let v23 = C::u8_pair_concat(ctx, arg8, arg9);
-    let v24 = C::u8_pair_concat(ctx, arg10, arg11);
-    let v25 = C::u16_pair_concat(ctx, v23, v24);
-    let v26 = C::u8_pair_concat(ctx, arg12, arg13);
-    let v27 = C::u8_pair_concat(ctx, arg14, arg15);
-    let v28 = C::u16_pair_concat(ctx, v26, v27);
-    let v29 = C::u32_pair_concat(ctx, v25, v28);
-    let v30 = C::u64_pair_concat(ctx, v22, v29);
-    // Rule at src/isa/s390x/inst.isle line 1585.
-    return v30;
-}
-
-// Generated as internal constructor for term mask_amt_reg.
-pub fn constructor_mask_amt_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
-    let v10 = C::gpr64_ty(ctx, arg0);
-    if let Some(v11) = v10 {
-        // Rule at src/isa/s390x/inst.isle line 1697.
-        return arg1;
-    }
-    let v1 = C::gpr32_ty(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v5 = C::mask_amt_imm(ctx, v2, -0x1);
-        let v6 = C::u8_as_u16(ctx, v5);
-        let v8 = C::uimm16shifted(ctx, v6, 0x0);
-        let v9 = constructor_and_uimm16shifted(ctx, v2, arg1, v8);
-        // Rule at src/isa/s390x/inst.isle line 1694.
-        return v9;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "mask_amt_reg", "src/isa/s390x/inst.isle line 1693"
-    )
-}
-
-// Generated as internal constructor for term amt_reg.
-pub fn constructor_amt_reg<C: Context>(ctx: &mut C, arg0: Value) -> Reg {
-    let v1 = C::value_type(ctx, arg0);
-    let v2 = C::fits_in_64(ctx, v1);
-    if let Some(v3) = v2 {
-        let v4 = C::put_in_reg(ctx, arg0);
-        // Rule at src/isa/s390x/inst.isle line 1701.
-        return v4;
-    }
-    let v5 = C::vr128_ty(ctx, v1);
-    if let Some(v6) = v5 {
-        let v4 = C::put_in_reg(ctx, arg0);
-        let v9 = C::zero_reg(ctx);
-        let v10 = constructor_vec_extract_lane(ctx, I64X2, v4, 0x1, v9);
-        // Rule at src/isa/s390x/inst.isle line 1702.
-        return v10;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "amt_reg", "src/isa/s390x/inst.isle line 1700"
-    )
-}
-
-// Generated as internal constructor for term amt_vr.
-pub fn constructor_amt_vr<C: Context>(ctx: &mut C, arg0: Value) -> Reg {
-    let v14 = C::u64_from_value(ctx, arg0);
-    if let Some(v15) = v14 {
-        let v16 = constructor_vec_imm_splat(ctx, I8X16, v15);
-        // Rule at src/isa/s390x/inst.isle line 1712.
-        return v16;
-    }
-    let v1 = C::value_type(ctx, arg0);
-    let v10 = C::vr128_ty(ctx, v1);
-    if let Some(v11) = v10 {
-        let v5 = C::put_in_reg(ctx, arg0);
-        let v13 = constructor_vec_replicate_lane(ctx, I8X16, v5, 0xF);
-        // Rule at src/isa/s390x/inst.isle line 1710.
-        return v13;
-    }
-    let v2 = C::fits_in_64(ctx, v1);
-    if let Some(v3) = v2 {
-        let v5 = C::put_in_reg(ctx, arg0);
-        let v7 = C::zero_reg(ctx);
-        let v8 = constructor_vec_insert_lane_undef(ctx, I8X16, v5, 0x0, v7);
-        let v9 = constructor_vec_replicate_lane(ctx, I8X16, v8, 0x0);
-        // Rule at src/isa/s390x/inst.isle line 1707.
-        return v9;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "amt_vr", "src/isa/s390x/inst.isle line 1706"
-    )
-}
-
-// Generated as internal constructor for term memarg_symbol_offset.
-pub fn constructor_memarg_symbol_offset<C: Context>(ctx: &mut C, arg0: i64) -> Option<i32> {
-    let v2 = C::memarg_symbol_offset_sum(ctx, arg0, 0x0);
-    let v3 = v2?;
-    // Rule at src/isa/s390x/inst.isle line 1804.
-    return Some(v3);
-}
-
-// Generated as internal constructor for term lower_address.
-pub fn constructor_lower_address<C: Context>(
-    ctx: &mut C,
-    arg0: MemFlags,
-    arg1: Value,
-    arg2: Offset32,
-) -> MemArg {
-    let v10 = C::def_inst(ctx, arg1);
-    if let Some(v11) = v10 {
-        let v17 = &C::inst_data(ctx, v11);
-        match v17 {
-            &InstructionData::Binary {
-                opcode: ref v18,
-                args: ref v19,
-            } => {
-                if let &Opcode::Iadd = v18 {
-                    let v6 = C::i64_from_offset(ctx, arg2);
-                    if v6 == 0x0 {
-                        let v12 = C::first_result(ctx, v11);
-                        if let Some(v13) = v12 {
-                            let v14 = C::value_type(ctx, v13);
-                            let v15 = C::ty_addr64(ctx, v14);
-                            if let Some(v16) = v15 {
-                                let v20 = C::unpack_value_array_2(ctx, v19);
-                                let v23 = C::put_in_reg(ctx, v20.0);
-                                let v24 = C::put_in_reg(ctx, v20.1);
-                                let v25 = &C::memarg_reg_plus_reg(ctx, v23, v24, 0x0, arg0);
-                                // Rule at src/isa/s390x/inst.isle line 1814.
-                                return v25.clone();
-                            }
-                        }
-                    }
-                }
-            }
-            &InstructionData::UnaryGlobalValue {
-                opcode: ref v26,
-                global_value: v27,
-            } => {
-                if let &Opcode::SymbolValue = v26 {
-                    let v28 = C::symbol_value_data(ctx, v27);
-                    if let Some(v29) = v28 {
-                        let v33 = C::reloc_distance_near(ctx, v29.1);
-                        if let Some(v34) = v33 {
-                            let v6 = C::i64_from_offset(ctx, arg2);
-                            let v35 = C::memarg_symbol_offset_sum(ctx, v6, v29.2);
-                            if let Some(v36) = v35 {
-                                let v37 = &C::memarg_symbol(ctx, v29.0, v36, arg0);
-                                // Rule at src/isa/s390x/inst.isle line 1817.
-                                return v37.clone();
-                            }
-                        }
-                    }
-                }
-            }
-            _ => {}
-        }
-    }
-    let v2 = C::value_type(ctx, arg1);
-    let v3 = C::ty_addr64(ctx, v2);
-    if let Some(v4) = v3 {
-        let v7 = C::put_in_reg(ctx, arg1);
-        let v6 = C::i64_from_offset(ctx, arg2);
-        let v9 = &C::memarg_reg_plus_off(ctx, v7, v6, 0x0, arg0);
-        // Rule at src/isa/s390x/inst.isle line 1811.
-        return v9.clone();
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "lower_address", "src/isa/s390x/inst.isle line 1809"
-    )
-}
-
-// Generated as internal constructor for term lower_address_bias.
-pub fn constructor_lower_address_bias<C: Context>(
-    ctx: &mut C,
-    arg0: MemFlags,
-    arg1: Value,
-    arg2: Offset32,
-    arg3: u8,
-) -> MemArg {
-    let v4 = C::i64_from_offset(ctx, arg2);
-    if v4 == 0x0 {
-        let v8 = C::def_inst(ctx, arg1);
-        if let Some(v9) = v8 {
-            let v10 = C::first_result(ctx, v9);
-            if let Some(v11) = v10 {
-                let v12 = C::value_type(ctx, v11);
-                if v12 == I64 {
-                    let v13 = &C::inst_data(ctx, v9);
-                    if let &InstructionData::Binary {
-                        opcode: ref v14,
-                        args: ref v15,
-                    } = v13
-                    {
-                        if let &Opcode::Iadd = v14 {
-                            let v16 = C::unpack_value_array_2(ctx, v15);
-                            let v19 = C::put_in_reg(ctx, v16.0);
-                            let v20 = C::put_in_reg(ctx, v16.1);
-                            let v21 = &C::memarg_reg_plus_reg(ctx, v19, v20, arg3, arg0);
-                            // Rule at src/isa/s390x/inst.isle line 1831.
-                            return v21.clone();
-                        }
-                    }
-                }
-            }
-        }
-    }
-    let v2 = C::value_type(ctx, arg1);
-    if v2 == I64 {
-        let v6 = C::put_in_reg(ctx, arg1);
-        let v7 = &C::memarg_reg_plus_off(ctx, v6, v4, arg3, arg0);
-        // Rule at src/isa/s390x/inst.isle line 1828.
-        return v7.clone();
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "lower_address_bias", "src/isa/s390x/inst.isle line 1826"
-    )
-}
-
-// Generated as internal constructor for term load_sym.
-pub fn constructor_load_sym<C: Context>(ctx: &mut C, arg0: Inst) -> Option<Inst> {
-    let v1 = &C::inst_data(ctx, arg0);
-    if let &InstructionData::Load {
-        opcode: ref v2,
-        arg: v3,
-        flags: v4,
-        offset: v5,
-    } = v1
-    {
-        if let &Opcode::Load = v2 {
-            let v6 = C::def_inst(ctx, v3);
-            if let Some(v7) = v6 {
-                let v8 = &C::inst_data(ctx, v7);
-                if let &InstructionData::UnaryGlobalValue {
-                    opcode: ref v9,
-                    global_value: v10,
-                } = v8
-                {
-                    if let &Opcode::SymbolValue = v9 {
-                        let v11 = C::symbol_value_data(ctx, v10);
-                        if let Some(v12) = v11 {
-                            let v16 = C::reloc_distance_near(ctx, v12.1);
-                            if let Some(v17) = v16 {
-                                let v18 = C::i64_from_offset(ctx, v5);
-                                let v19 = C::memarg_symbol_offset_sum(ctx, v12.2, v18);
-                                if let Some(v20) = v19 {
-                                    // Rule at src/isa/s390x/inst.isle line 1838.
-                                    return Some(arg0);
-                                }
-                            }
-                        }
-                    }
-                }
-            }
-        }
-    }
-    None
-}
-
-// Generated as internal constructor for term uload16_sym.
-pub fn constructor_uload16_sym<C: Context>(ctx: &mut C, arg0: Inst) -> Option<Inst> {
-    let v1 = &C::inst_data(ctx, arg0);
-    if let &InstructionData::Load {
-        opcode: ref v2,
-        arg: v3,
-        flags: v4,
-        offset: v5,
-    } = v1
-    {
-        if let &Opcode::Uload16 = v2 {
-            let v6 = C::def_inst(ctx, v3);
-            if let Some(v7) = v6 {
-                let v8 = &C::inst_data(ctx, v7);
-                if let &InstructionData::UnaryGlobalValue {
-                    opcode: ref v9,
-                    global_value: v10,
-                } = v8
-                {
-                    if let &Opcode::SymbolValue = v9 {
-                        let v11 = C::symbol_value_data(ctx, v10);
-                        if let Some(v12) = v11 {
-                            let v16 = C::reloc_distance_near(ctx, v12.1);
-                            if let Some(v17) = v16 {
-                                let v18 = C::i64_from_offset(ctx, v5);
-                                let v19 = C::memarg_symbol_offset_sum(ctx, v12.2, v18);
-                                if let Some(v20) = v19 {
-                                    // Rule at src/isa/s390x/inst.isle line 1846.
-                                    return Some(arg0);
-                                }
-                            }
-                        }
-                    }
-                }
-            }
-        }
-    }
-    None
-}
-
-// Generated as internal constructor for term memarg_pair.
-pub fn constructor_memarg_pair<C: Context>(ctx: &mut C, arg0: &MemArg) -> MemArgPair {
-    let v1 = &C::memarg_pair_from_memarg(ctx, arg0);
-    if let Some(v2) = v1 {
-        // Rule at src/isa/s390x/inst.isle line 1860.
-        return v2.clone();
-    }
-    let v3 = constructor_load_addr(ctx, arg0);
-    let v4 = C::memarg_flags(ctx, arg0);
-    let v5 = &C::memarg_pair_from_reg(ctx, v3, v4);
-    // Rule at src/isa/s390x/inst.isle line 1861.
-    return v5.clone();
-}
-
-// Generated as internal constructor for term stack_addr_impl.
-pub fn constructor_stack_addr_impl<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: StackSlot,
-    arg2: Offset32,
-) -> Reg {
-    let v3 = C::temp_writable_reg(ctx, arg0);
-    let v4 = &C::abi_stackslot_addr(ctx, v3, arg1, arg2);
-    let v5 = C::emit(ctx, v4);
-    let v6 = C::writable_reg_to_reg(ctx, v3);
-    // Rule at src/isa/s390x/inst.isle line 1876.
-    return v6;
-}
-
-// Generated as internal constructor for term sink_load.
-pub fn constructor_sink_load<C: Context>(ctx: &mut C, arg0: Inst) -> MemArg {
-    let v1 = &C::inst_data(ctx, arg0);
-    if let &InstructionData::Load {
-        opcode: ref v2,
-        arg: v3,
-        flags: v4,
-        offset: v5,
-    } = v1
-    {
-        if let &Opcode::Load = v2 {
-            let v6 = C::sink_inst(ctx, arg0);
-            let v7 = &constructor_lower_address(ctx, v4, v3, v5);
-            // Rule at src/isa/s390x/inst.isle line 1942.
-            return v7.clone();
-        }
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "sink_load", "src/isa/s390x/inst.isle line 1941"
-    )
-}
-
-// Generated as internal constructor for term sink_sload16.
-pub fn constructor_sink_sload16<C: Context>(ctx: &mut C, arg0: Inst) -> MemArg {
-    let v1 = &C::inst_data(ctx, arg0);
-    if let &InstructionData::Load {
-        opcode: ref v2,
-        arg: v3,
-        flags: v4,
-        offset: v5,
-    } = v1
-    {
-        if let &Opcode::Sload16 = v2 {
-            let v6 = C::sink_inst(ctx, arg0);
-            let v7 = &constructor_lower_address(ctx, v4, v3, v5);
-            // Rule at src/isa/s390x/inst.isle line 1949.
-            return v7.clone();
-        }
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "sink_sload16", "src/isa/s390x/inst.isle line 1948"
-    )
-}
-
-// Generated as internal constructor for term sink_sload32.
-pub fn constructor_sink_sload32<C: Context>(ctx: &mut C, arg0: Inst) -> MemArg {
-    let v1 = &C::inst_data(ctx, arg0);
-    if let &InstructionData::Load {
-        opcode: ref v2,
-        arg: v3,
-        flags: v4,
-        offset: v5,
-    } = v1
-    {
-        if let &Opcode::Sload32 = v2 {
-            let v6 = C::sink_inst(ctx, arg0);
-            let v7 = &constructor_lower_address(ctx, v4, v3, v5);
-            // Rule at src/isa/s390x/inst.isle line 1956.
-            return v7.clone();
-        }
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "sink_sload32", "src/isa/s390x/inst.isle line 1955"
-    )
-}
-
-// Generated as internal constructor for term sink_uload16.
-pub fn constructor_sink_uload16<C: Context>(ctx: &mut C, arg0: Inst) -> MemArg {
-    let v1 = &C::inst_data(ctx, arg0);
-    if let &InstructionData::Load {
-        opcode: ref v2,
-        arg: v3,
-        flags: v4,
-        offset: v5,
-    } = v1
-    {
-        if let &Opcode::Uload16 = v2 {
-            let v6 = C::sink_inst(ctx, arg0);
-            let v7 = &constructor_lower_address(ctx, v4, v3, v5);
-            // Rule at src/isa/s390x/inst.isle line 1963.
-            return v7.clone();
-        }
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "sink_uload16", "src/isa/s390x/inst.isle line 1962"
-    )
-}
-
-// Generated as internal constructor for term sink_uload32.
-pub fn constructor_sink_uload32<C: Context>(ctx: &mut C, arg0: Inst) -> MemArg {
-    let v1 = &C::inst_data(ctx, arg0);
-    if let &InstructionData::Load {
-        opcode: ref v2,
-        arg: v3,
-        flags: v4,
-        offset: v5,
-    } = v1
-    {
-        if let &Opcode::Uload32 = v2 {
-            let v6 = C::sink_inst(ctx, arg0);
-            let v7 = &constructor_lower_address(ctx, v4, v3, v5);
-            // Rule at src/isa/s390x/inst.isle line 1970.
-            return v7.clone();
-        }
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "sink_uload32", "src/isa/s390x/inst.isle line 1969"
-    )
-}
-
-// Generated as internal constructor for term temp_writable_regpair.
-pub fn constructor_temp_writable_regpair<C: Context>(ctx: &mut C) -> WritableRegPair {
-    let v1 = C::temp_writable_reg(ctx, I64);
-    let v2 = C::temp_writable_reg(ctx, I64);
-    let v3 = C::writable_regpair(ctx, v1, v2);
-    // Rule at src/isa/s390x/inst.isle line 1986.
-    return v3;
-}
-
-// Generated as internal constructor for term writable_regpair_to_regpair.
-pub fn constructor_writable_regpair_to_regpair<C: Context>(
-    ctx: &mut C,
-    arg0: WritableRegPair,
-) -> RegPair {
-    let v1 = C::writable_regpair_hi(ctx, arg0);
-    let v3 = C::writable_regpair_lo(ctx, arg0);
-    let v2 = C::writable_reg_to_reg(ctx, v1);
-    let v4 = C::writable_reg_to_reg(ctx, v3);
-    let v5 = C::regpair(ctx, v2, v4);
-    // Rule at src/isa/s390x/inst.isle line 2002.
-    return v5;
-}
-
-// Generated as internal constructor for term alu_rrr.
-pub fn constructor_alu_rrr<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &ALUOp,
-    arg2: Reg,
-    arg3: Reg,
-) -> Reg {
-    let v4 = C::temp_writable_reg(ctx, arg0);
-    let v5 = MInst::AluRRR {
-        alu_op: arg1.clone(),
-        rd: v4,
-        rn: arg2,
-        rm: arg3,
-    };
-    let v6 = C::emit(ctx, &v5);
-    let v7 = C::writable_reg_to_reg(ctx, v4);
-    // Rule at src/isa/s390x/inst.isle line 2022.
-    return v7;
-}
-
-// Generated as internal constructor for term alu_rrr_with_flags_paired.
-pub fn constructor_alu_rrr_with_flags_paired<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &ALUOp,
-    arg2: Reg,
-    arg3: Reg,
-) -> ProducesFlags {
-    let v4 = C::temp_writable_reg(ctx, arg0);
-    let v5 = MInst::AluRRR {
-        alu_op: arg1.clone(),
-        rd: v4,
-        rn: arg2,
-        rm: arg3,
-    };
-    let v6 = C::writable_reg_to_reg(ctx, v4);
-    let v7 = ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
-        inst: v5,
-        result: v6,
-    };
-    // Rule at src/isa/s390x/inst.isle line 2029.
-    return v7;
-}
-
-// Generated as internal constructor for term alu_rrsimm16.
-pub fn constructor_alu_rrsimm16<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &ALUOp,
-    arg2: Reg,
-    arg3: i16,
-) -> Reg {
-    let v4 = C::temp_writable_reg(ctx, arg0);
-    let v5 = MInst::AluRRSImm16 {
-        alu_op: arg1.clone(),
-        rd: v4,
-        rn: arg2,
-        imm: arg3,
-    };
-    let v6 = C::emit(ctx, &v5);
-    let v7 = C::writable_reg_to_reg(ctx, v4);
-    // Rule at src/isa/s390x/inst.isle line 2036.
-    return v7;
-}
-
-// Generated as internal constructor for term alu_rr.
-pub fn constructor_alu_rr<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &ALUOp,
-    arg2: Reg,
-    arg3: Reg,
-) -> Reg {
-    let v4 = C::temp_writable_reg(ctx, arg0);
-    let v5 = MInst::AluRR {
-        alu_op: arg1.clone(),
-        rd: v4,
-        ri: arg2,
-        rm: arg3,
-    };
-    let v6 = C::emit(ctx, &v5);
-    let v7 = C::writable_reg_to_reg(ctx, v4);
-    // Rule at src/isa/s390x/inst.isle line 2043.
-    return v7;
-}
-
-// Generated as internal constructor for term alu_rr_with_flags_paired.
-pub fn constructor_alu_rr_with_flags_paired<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &ALUOp,
-    arg2: Reg,
-    arg3: Reg,
-) -> ProducesFlags {
-    let v4 = C::temp_writable_reg(ctx, arg0);
-    let v5 = MInst::AluRR {
-        alu_op: arg1.clone(),
-        rd: v4,
-        ri: arg2,
-        rm: arg3,
-    };
-    let v6 = C::writable_reg_to_reg(ctx, v4);
-    let v7 = ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
-        inst: v5,
-        result: v6,
-    };
-    // Rule at src/isa/s390x/inst.isle line 2050.
-    return v7;
-}
-
-// Generated as internal constructor for term alu_rx.
-pub fn constructor_alu_rx<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &ALUOp,
-    arg2: Reg,
-    arg3: &MemArg,
-) -> Reg {
-    let v4 = C::temp_writable_reg(ctx, arg0);
-    let v5 = MInst::AluRX {
-        alu_op: arg1.clone(),
-        rd: v4,
-        ri: arg2,
-        mem: arg3.clone(),
-    };
-    let v6 = C::emit(ctx, &v5);
-    let v7 = C::writable_reg_to_reg(ctx, v4);
-    // Rule at src/isa/s390x/inst.isle line 2057.
-    return v7;
-}
-
-// Generated as internal constructor for term alu_rx_with_flags_paired.
-pub fn constructor_alu_rx_with_flags_paired<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &ALUOp,
-    arg2: Reg,
-    arg3: &MemArg,
-) -> ProducesFlags {
-    let v4 = C::temp_writable_reg(ctx, arg0);
-    let v5 = MInst::AluRX {
-        alu_op: arg1.clone(),
-        rd: v4,
-        ri: arg2,
-        mem: arg3.clone(),
-    };
-    let v6 = C::writable_reg_to_reg(ctx, v4);
-    let v7 = ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
-        inst: v5,
-        result: v6,
-    };
-    // Rule at src/isa/s390x/inst.isle line 2064.
-    return v7;
-}
-
-// Generated as internal constructor for term alu_rsimm16.
-pub fn constructor_alu_rsimm16<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &ALUOp,
-    arg2: Reg,
-    arg3: i16,
-) -> Reg {
-    let v4 = C::temp_writable_reg(ctx, arg0);
-    let v5 = MInst::AluRSImm16 {
-        alu_op: arg1.clone(),
-        rd: v4,
-        ri: arg2,
-        imm: arg3,
-    };
-    let v6 = C::emit(ctx, &v5);
-    let v7 = C::writable_reg_to_reg(ctx, v4);
-    // Rule at src/isa/s390x/inst.isle line 2071.
-    return v7;
-}
-
-// Generated as internal constructor for term alu_rsimm32.
-pub fn constructor_alu_rsimm32<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &ALUOp,
-    arg2: Reg,
-    arg3: i32,
-) -> Reg {
-    let v4 = C::temp_writable_reg(ctx, arg0);
-    let v5 = MInst::AluRSImm32 {
-        alu_op: arg1.clone(),
-        rd: v4,
-        ri: arg2,
-        imm: arg3,
-    };
-    let v6 = C::emit(ctx, &v5);
-    let v7 = C::writable_reg_to_reg(ctx, v4);
-    // Rule at src/isa/s390x/inst.isle line 2078.
-    return v7;
-}
-
-// Generated as internal constructor for term alu_ruimm32.
-pub fn constructor_alu_ruimm32<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &ALUOp,
-    arg2: Reg,
-    arg3: u32,
-) -> Reg {
-    let v4 = C::temp_writable_reg(ctx, arg0);
-    let v5 = MInst::AluRUImm32 {
-        alu_op: arg1.clone(),
-        rd: v4,
-        ri: arg2,
-        imm: arg3,
-    };
-    let v6 = C::emit(ctx, &v5);
-    let v7 = C::writable_reg_to_reg(ctx, v4);
-    // Rule at src/isa/s390x/inst.isle line 2085.
-    return v7;
-}
-
-// Generated as internal constructor for term alu_ruimm32_with_flags_paired.
-pub fn constructor_alu_ruimm32_with_flags_paired<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &ALUOp,
-    arg2: Reg,
-    arg3: u32,
-) -> ProducesFlags {
-    let v4 = C::temp_writable_reg(ctx, arg0);
-    let v5 = MInst::AluRUImm32 {
-        alu_op: arg1.clone(),
-        rd: v4,
-        ri: arg2,
-        imm: arg3,
-    };
-    let v6 = C::writable_reg_to_reg(ctx, v4);
-    let v7 = ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
-        inst: v5,
-        result: v6,
-    };
-    // Rule at src/isa/s390x/inst.isle line 2092.
-    return v7;
-}
-
-// Generated as internal constructor for term alu_ruimm16shifted.
-pub fn constructor_alu_ruimm16shifted<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &ALUOp,
-    arg2: Reg,
-    arg3: UImm16Shifted,
-) -> Reg {
-    let v4 = C::temp_writable_reg(ctx, arg0);
-    let v5 = MInst::AluRUImm16Shifted {
-        alu_op: arg1.clone(),
-        rd: v4,
-        ri: arg2,
-        imm: arg3,
-    };
-    let v6 = C::emit(ctx, &v5);
-    let v7 = C::writable_reg_to_reg(ctx, v4);
-    // Rule at src/isa/s390x/inst.isle line 2099.
-    return v7;
-}
-
-// Generated as internal constructor for term alu_ruimm32shifted.
-pub fn constructor_alu_ruimm32shifted<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &ALUOp,
-    arg2: Reg,
-    arg3: UImm32Shifted,
-) -> Reg {
-    let v4 = C::temp_writable_reg(ctx, arg0);
-    let v5 = MInst::AluRUImm32Shifted {
-        alu_op: arg1.clone(),
-        rd: v4,
-        ri: arg2,
-        imm: arg3,
-    };
-    let v6 = C::emit(ctx, &v5);
-    let v7 = C::writable_reg_to_reg(ctx, v4);
-    // Rule at src/isa/s390x/inst.isle line 2106.
-    return v7;
-}
-
-// Generated as internal constructor for term smul_wide.
-pub fn constructor_smul_wide<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg) -> RegPair {
-    let v2 = constructor_temp_writable_regpair(ctx);
-    let v3 = MInst::SMulWide {
-        rd: v2,
-        rn: arg0,
-        rm: arg1,
-    };
-    let v4 = C::emit(ctx, &v3);
-    let v5 = constructor_writable_regpair_to_regpair(ctx, v2);
-    // Rule at src/isa/s390x/inst.isle line 2113.
-    return v5;
-}
-
-// Generated as internal constructor for term umul_wide.
-pub fn constructor_umul_wide<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg) -> RegPair {
-    let v2 = constructor_temp_writable_regpair(ctx);
-    let v3 = MInst::UMulWide {
-        rd: v2,
-        ri: arg0,
-        rn: arg1,
-    };
-    let v4 = C::emit(ctx, &v3);
-    let v5 = constructor_writable_regpair_to_regpair(ctx, v2);
-    // Rule at src/isa/s390x/inst.isle line 2120.
-    return v5;
-}
-
-// Generated as internal constructor for term sdivmod32.
-pub fn constructor_sdivmod32<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg) -> RegPair {
-    let v2 = constructor_temp_writable_regpair(ctx);
-    let v3 = MInst::SDivMod32 {
-        rd: v2,
-        ri: arg0,
-        rn: arg1,
-    };
-    let v4 = C::emit(ctx, &v3);
-    let v5 = constructor_writable_regpair_to_regpair(ctx, v2);
-    // Rule at src/isa/s390x/inst.isle line 2127.
-    return v5;
-}
-
-// Generated as internal constructor for term sdivmod64.
-pub fn constructor_sdivmod64<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg) -> RegPair {
-    let v2 = constructor_temp_writable_regpair(ctx);
-    let v3 = MInst::SDivMod64 {
-        rd: v2,
-        ri: arg0,
-        rn: arg1,
-    };
-    let v4 = C::emit(ctx, &v3);
-    let v5 = constructor_writable_regpair_to_regpair(ctx, v2);
-    // Rule at src/isa/s390x/inst.isle line 2134.
-    return v5;
-}
-
-// Generated as internal constructor for term udivmod32.
-pub fn constructor_udivmod32<C: Context>(ctx: &mut C, arg0: RegPair, arg1: Reg) -> RegPair {
-    let v2 = constructor_temp_writable_regpair(ctx);
-    let v3 = MInst::UDivMod32 {
-        rd: v2,
-        ri: arg0,
-        rn: arg1,
-    };
-    let v4 = C::emit(ctx, &v3);
-    let v5 = constructor_writable_regpair_to_regpair(ctx, v2);
-    // Rule at src/isa/s390x/inst.isle line 2141.
-    return v5;
-}
-
-// Generated as internal constructor for term udivmod64.
-pub fn constructor_udivmod64<C: Context>(ctx: &mut C, arg0: RegPair, arg1: Reg) -> RegPair {
-    let v2 = constructor_temp_writable_regpair(ctx);
-    let v3 = MInst::UDivMod64 {
-        rd: v2,
-        ri: arg0,
-        rn: arg1,
-    };
-    let v4 = C::emit(ctx, &v3);
-    let v5 = constructor_writable_regpair_to_regpair(ctx, v2);
-    // Rule at src/isa/s390x/inst.isle line 2148.
-    return v5;
-}
-
-// Generated as internal constructor for term shift_rr.
-pub fn constructor_shift_rr<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &ShiftOp,
-    arg2: Reg,
-    arg3: u8,
-    arg4: Reg,
-) -> Reg {
-    let v5 = C::temp_writable_reg(ctx, arg0);
-    let v6 = MInst::ShiftRR {
-        shift_op: arg1.clone(),
-        rd: v5,
-        rn: arg2,
-        shift_imm: arg3,
-        shift_reg: arg4,
-    };
-    let v7 = C::emit(ctx, &v6);
-    let v8 = C::writable_reg_to_reg(ctx, v5);
-    // Rule at src/isa/s390x/inst.isle line 2155.
-    return v8;
-}
-
-// Generated as internal constructor for term rxsbg_test.
-pub fn constructor_rxsbg_test<C: Context>(
-    ctx: &mut C,
-    arg0: &RxSBGOp,
-    arg1: Reg,
-    arg2: Reg,
-    arg3: u8,
-    arg4: u8,
-    arg5: i8,
-) -> ProducesFlags {
-    let v6 = MInst::RxSBGTest {
-        op: arg0.clone(),
-        rd: arg1,
-        rn: arg2,
-        start_bit: arg3,
-        end_bit: arg4,
-        rotate_amt: arg5,
-    };
-    let v7 = ProducesFlags::ProducesFlagsSideEffect { inst: v6 };
-    // Rule at src/isa/s390x/inst.isle line 2162.
-    return v7;
-}
-
-// Generated as internal constructor for term unary_rr.
-pub fn constructor_unary_rr<C: Context>(ctx: &mut C, arg0: Type, arg1: &UnaryOp, arg2: Reg) -> Reg {
-    let v3 = C::temp_writable_reg(ctx, arg0);
-    let v4 = MInst::UnaryRR {
-        op: arg1.clone(),
-        rd: v3,
-        rn: arg2,
-    };
-    let v5 = C::emit(ctx, &v4);
-    let v6 = C::writable_reg_to_reg(ctx, v3);
-    // Rule at src/isa/s390x/inst.isle line 2168.
-    return v6;
-}
-
-// Generated as internal constructor for term cmp_rr.
-pub fn constructor_cmp_rr<C: Context>(
-    ctx: &mut C,
-    arg0: &CmpOp,
-    arg1: Reg,
-    arg2: Reg,
-) -> ProducesFlags {
-    let v3 = MInst::CmpRR {
-        op: arg0.clone(),
-        rn: arg1,
-        rm: arg2,
-    };
-    let v4 = ProducesFlags::ProducesFlagsSideEffect { inst: v3 };
-    // Rule at src/isa/s390x/inst.isle line 2175.
-    return v4;
-}
-
-// Generated as internal constructor for term cmp_rx.
-pub fn constructor_cmp_rx<C: Context>(
-    ctx: &mut C,
-    arg0: &CmpOp,
-    arg1: Reg,
-    arg2: &MemArg,
-) -> ProducesFlags {
-    let v3 = MInst::CmpRX {
-        op: arg0.clone(),
-        rn: arg1,
-        mem: arg2.clone(),
-    };
-    let v4 = ProducesFlags::ProducesFlagsSideEffect { inst: v3 };
-    // Rule at src/isa/s390x/inst.isle line 2180.
-    return v4;
-}
-
-// Generated as internal constructor for term cmp_rsimm16.
-pub fn constructor_cmp_rsimm16<C: Context>(
-    ctx: &mut C,
-    arg0: &CmpOp,
-    arg1: Reg,
-    arg2: i16,
-) -> ProducesFlags {
-    let v3 = MInst::CmpRSImm16 {
-        op: arg0.clone(),
-        rn: arg1,
-        imm: arg2,
-    };
-    let v4 = ProducesFlags::ProducesFlagsSideEffect { inst: v3 };
-    // Rule at src/isa/s390x/inst.isle line 2185.
-    return v4;
-}
-
-// Generated as internal constructor for term cmp_rsimm32.
-pub fn constructor_cmp_rsimm32<C: Context>(
-    ctx: &mut C,
-    arg0: &CmpOp,
-    arg1: Reg,
-    arg2: i32,
-) -> ProducesFlags {
-    let v3 = MInst::CmpRSImm32 {
-        op: arg0.clone(),
-        rn: arg1,
-        imm: arg2,
-    };
-    let v4 = ProducesFlags::ProducesFlagsSideEffect { inst: v3 };
-    // Rule at src/isa/s390x/inst.isle line 2190.
-    return v4;
-}
-
-// Generated as internal constructor for term cmp_ruimm32.
-pub fn constructor_cmp_ruimm32<C: Context>(
-    ctx: &mut C,
-    arg0: &CmpOp,
-    arg1: Reg,
-    arg2: u32,
-) -> ProducesFlags {
-    let v3 = MInst::CmpRUImm32 {
-        op: arg0.clone(),
-        rn: arg1,
-        imm: arg2,
-    };
-    let v4 = ProducesFlags::ProducesFlagsSideEffect { inst: v3 };
-    // Rule at src/isa/s390x/inst.isle line 2195.
-    return v4;
-}
-
-// Generated as internal constructor for term atomic_rmw_impl.
-pub fn constructor_atomic_rmw_impl<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &ALUOp,
-    arg2: Reg,
-    arg3: &MemArg,
-) -> Reg {
-    let v4 = C::temp_writable_reg(ctx, arg0);
-    let v5 = MInst::AtomicRmw {
-        alu_op: arg1.clone(),
-        rd: v4,
-        rn: arg2,
-        mem: arg3.clone(),
-    };
-    let v6 = C::emit(ctx, &v5);
-    let v7 = C::writable_reg_to_reg(ctx, v4);
-    // Rule at src/isa/s390x/inst.isle line 2200.
-    return v7;
-}
-
-// Generated as internal constructor for term atomic_cas32.
-pub fn constructor_atomic_cas32<C: Context>(
-    ctx: &mut C,
-    arg0: Reg,
-    arg1: Reg,
-    arg2: &MemArg,
-) -> Reg {
-    let v4 = C::temp_writable_reg(ctx, I32);
-    let v5 = MInst::AtomicCas32 {
-        rd: v4,
-        ri: arg0,
-        rn: arg1,
-        mem: arg2.clone(),
-    };
-    let v6 = C::emit(ctx, &v5);
-    let v7 = C::writable_reg_to_reg(ctx, v4);
-    // Rule at src/isa/s390x/inst.isle line 2207.
-    return v7;
-}
-
-// Generated as internal constructor for term atomic_cas64.
-pub fn constructor_atomic_cas64<C: Context>(
-    ctx: &mut C,
-    arg0: Reg,
-    arg1: Reg,
-    arg2: &MemArg,
-) -> Reg {
-    let v4 = C::temp_writable_reg(ctx, I64);
-    let v5 = MInst::AtomicCas64 {
-        rd: v4,
-        ri: arg0,
-        rn: arg1,
-        mem: arg2.clone(),
-    };
-    let v6 = C::emit(ctx, &v5);
-    let v7 = C::writable_reg_to_reg(ctx, v4);
-    // Rule at src/isa/s390x/inst.isle line 2214.
-    return v7;
-}
-
-// Generated as internal constructor for term fence_impl.
-pub fn constructor_fence_impl<C: Context>(ctx: &mut C) -> SideEffectNoResult {
-    let v1 = SideEffectNoResult::Inst { inst: MInst::Fence };
-    // Rule at src/isa/s390x/inst.isle line 2221.
-    return v1;
-}
-
-// Generated as internal constructor for term load32.
-pub fn constructor_load32<C: Context>(ctx: &mut C, arg0: &MemArg) -> Reg {
-    let v2 = C::temp_writable_reg(ctx, I32);
-    let v3 = MInst::Load32 {
-        rd: v2,
-        mem: arg0.clone(),
-    };
-    let v4 = C::emit(ctx, &v3);
-    let v5 = C::writable_reg_to_reg(ctx, v2);
-    // Rule at src/isa/s390x/inst.isle line 2226.
-    return v5;
-}
-
-// Generated as internal constructor for term load64.
-pub fn constructor_load64<C: Context>(ctx: &mut C, arg0: &MemArg) -> Reg {
-    let v2 = C::temp_writable_reg(ctx, I64);
-    let v3 = MInst::Load64 {
-        rd: v2,
-        mem: arg0.clone(),
-    };
-    let v4 = C::emit(ctx, &v3);
-    let v5 = C::writable_reg_to_reg(ctx, v2);
-    // Rule at src/isa/s390x/inst.isle line 2233.
-    return v5;
-}
-
-// Generated as internal constructor for term loadrev16.
-pub fn constructor_loadrev16<C: Context>(ctx: &mut C, arg0: &MemArg) -> Reg {
-    let v2 = C::temp_writable_reg(ctx, I32);
-    let v3 = MInst::LoadRev16 {
-        rd: v2,
-        mem: arg0.clone(),
-    };
-    let v4 = C::emit(ctx, &v3);
-    let v5 = C::writable_reg_to_reg(ctx, v2);
-    // Rule at src/isa/s390x/inst.isle line 2240.
-    return v5;
-}
-
-// Generated as internal constructor for term loadrev32.
-pub fn constructor_loadrev32<C: Context>(ctx: &mut C, arg0: &MemArg) -> Reg {
-    let v2 = C::temp_writable_reg(ctx, I32);
-    let v3 = MInst::LoadRev32 {
-        rd: v2,
-        mem: arg0.clone(),
-    };
-    let v4 = C::emit(ctx, &v3);
-    let v5 = C::writable_reg_to_reg(ctx, v2);
-    // Rule at src/isa/s390x/inst.isle line 2247.
-    return v5;
-}
-
-// Generated as internal constructor for term loadrev64.
-pub fn constructor_loadrev64<C: Context>(ctx: &mut C, arg0: &MemArg) -> Reg {
-    let v2 = C::temp_writable_reg(ctx, I64);
-    let v3 = MInst::LoadRev64 {
-        rd: v2,
-        mem: arg0.clone(),
-    };
-    let v4 = C::emit(ctx, &v3);
-    let v5 = C::writable_reg_to_reg(ctx, v2);
-    // Rule at src/isa/s390x/inst.isle line 2254.
-    return v5;
-}
-
-// Generated as internal constructor for term store8.
-pub fn constructor_store8<C: Context>(ctx: &mut C, arg0: Reg, arg1: &MemArg) -> SideEffectNoResult {
-    let v2 = MInst::Store8 {
-        rd: arg0,
-        mem: arg1.clone(),
-    };
-    let v3 = SideEffectNoResult::Inst { inst: v2 };
-    // Rule at src/isa/s390x/inst.isle line 2261.
-    return v3;
-}
-
-// Generated as internal constructor for term store16.
-pub fn constructor_store16<C: Context>(
-    ctx: &mut C,
-    arg0: Reg,
-    arg1: &MemArg,
-) -> SideEffectNoResult {
-    let v2 = MInst::Store16 {
-        rd: arg0,
-        mem: arg1.clone(),
-    };
-    let v3 = SideEffectNoResult::Inst { inst: v2 };
-    // Rule at src/isa/s390x/inst.isle line 2266.
-    return v3;
-}
-
-// Generated as internal constructor for term store32.
-pub fn constructor_store32<C: Context>(
-    ctx: &mut C,
-    arg0: Reg,
-    arg1: &MemArg,
-) -> SideEffectNoResult {
-    let v2 = MInst::Store32 {
-        rd: arg0,
-        mem: arg1.clone(),
-    };
-    let v3 = SideEffectNoResult::Inst { inst: v2 };
-    // Rule at src/isa/s390x/inst.isle line 2271.
-    return v3;
-}
-
-// Generated as internal constructor for term store64.
-pub fn constructor_store64<C: Context>(
-    ctx: &mut C,
-    arg0: Reg,
-    arg1: &MemArg,
-) -> SideEffectNoResult {
-    let v2 = MInst::Store64 {
-        rd: arg0,
-        mem: arg1.clone(),
-    };
-    let v3 = SideEffectNoResult::Inst { inst: v2 };
-    // Rule at src/isa/s390x/inst.isle line 2276.
-    return v3;
-}
-
-// Generated as internal constructor for term store8_imm.
-pub fn constructor_store8_imm<C: Context>(
-    ctx: &mut C,
-    arg0: u8,
-    arg1: &MemArg,
-) -> SideEffectNoResult {
-    let v2 = MInst::StoreImm8 {
-        imm: arg0,
-        mem: arg1.clone(),
-    };
-    let v3 = SideEffectNoResult::Inst { inst: v2 };
-    // Rule at src/isa/s390x/inst.isle line 2281.
-    return v3;
-}
-
-// Generated as internal constructor for term store16_imm.
-pub fn constructor_store16_imm<C: Context>(
-    ctx: &mut C,
-    arg0: i16,
-    arg1: &MemArg,
-) -> SideEffectNoResult {
-    let v2 = MInst::StoreImm16 {
-        imm: arg0,
-        mem: arg1.clone(),
-    };
-    let v3 = SideEffectNoResult::Inst { inst: v2 };
-    // Rule at src/isa/s390x/inst.isle line 2286.
-    return v3;
-}
-
-// Generated as internal constructor for term store32_simm16.
-pub fn constructor_store32_simm16<C: Context>(
-    ctx: &mut C,
-    arg0: i16,
-    arg1: &MemArg,
-) -> SideEffectNoResult {
-    let v2 = MInst::StoreImm32SExt16 {
-        imm: arg0,
-        mem: arg1.clone(),
-    };
-    let v3 = SideEffectNoResult::Inst { inst: v2 };
-    // Rule at src/isa/s390x/inst.isle line 2291.
-    return v3;
-}
-
-// Generated as internal constructor for term store64_simm16.
-pub fn constructor_store64_simm16<C: Context>(
-    ctx: &mut C,
-    arg0: i16,
-    arg1: &MemArg,
-) -> SideEffectNoResult {
-    let v2 = MInst::StoreImm64SExt16 {
-        imm: arg0,
-        mem: arg1.clone(),
-    };
-    let v3 = SideEffectNoResult::Inst { inst: v2 };
-    // Rule at src/isa/s390x/inst.isle line 2296.
-    return v3;
-}
-
-// Generated as internal constructor for term storerev16.
-pub fn constructor_storerev16<C: Context>(
-    ctx: &mut C,
-    arg0: Reg,
-    arg1: &MemArg,
-) -> SideEffectNoResult {
-    let v2 = MInst::StoreRev16 {
-        rd: arg0,
-        mem: arg1.clone(),
-    };
-    let v3 = SideEffectNoResult::Inst { inst: v2 };
-    // Rule at src/isa/s390x/inst.isle line 2301.
-    return v3;
-}
-
-// Generated as internal constructor for term storerev32.
-pub fn constructor_storerev32<C: Context>(
-    ctx: &mut C,
-    arg0: Reg,
-    arg1: &MemArg,
-) -> SideEffectNoResult {
-    let v2 = MInst::StoreRev32 {
-        rd: arg0,
-        mem: arg1.clone(),
-    };
-    let v3 = SideEffectNoResult::Inst { inst: v2 };
-    // Rule at src/isa/s390x/inst.isle line 2306.
-    return v3;
-}
-
-// Generated as internal constructor for term storerev64.
-pub fn constructor_storerev64<C: Context>(
-    ctx: &mut C,
-    arg0: Reg,
-    arg1: &MemArg,
-) -> SideEffectNoResult {
-    let v2 = MInst::StoreRev64 {
-        rd: arg0,
-        mem: arg1.clone(),
-    };
-    let v3 = SideEffectNoResult::Inst { inst: v2 };
-    // Rule at src/isa/s390x/inst.isle line 2311.
-    return v3;
-}
-
-// Generated as internal constructor for term mvc.
-pub fn constructor_mvc<C: Context>(
-    ctx: &mut C,
-    arg0: &MemArgPair,
-    arg1: &MemArgPair,
-    arg2: u8,
-) -> SideEffectNoResult {
-    let v3 = MInst::Mvc {
-        dst: arg0.clone(),
-        src: arg1.clone(),
-        len_minus_one: arg2,
-    };
-    let v4 = SideEffectNoResult::Inst { inst: v3 };
-    // Rule at src/isa/s390x/inst.isle line 2316.
-    return v4;
-}
-
-// Generated as internal constructor for term load_ar.
-pub fn constructor_load_ar<C: Context>(ctx: &mut C, arg0: u8) -> Reg {
-    let v2 = C::temp_writable_reg(ctx, I64);
-    let v3 = MInst::LoadAR { rd: v2, ar: arg0 };
-    let v4 = C::emit(ctx, &v3);
-    let v5 = C::writable_reg_to_reg(ctx, v2);
-    // Rule at src/isa/s390x/inst.isle line 2321.
-    return v5;
-}
-
-// Generated as internal constructor for term insert_ar.
-pub fn constructor_insert_ar<C: Context>(ctx: &mut C, arg0: Reg, arg1: u8) -> Reg {
-    let v3 = C::temp_writable_reg(ctx, I64);
-    let v4 = MInst::InsertAR {
-        rd: v3,
-        ri: arg0,
-        ar: arg1,
-    };
-    let v5 = C::emit(ctx, &v4);
-    let v6 = C::writable_reg_to_reg(ctx, v3);
-    // Rule at src/isa/s390x/inst.isle line 2328.
-    return v6;
-}
-
-// Generated as internal constructor for term fpu_rr.
-pub fn constructor_fpu_rr<C: Context>(ctx: &mut C, arg0: Type, arg1: &FPUOp1, arg2: Reg) -> Reg {
-    let v3 = C::temp_writable_reg(ctx, arg0);
-    let v4 = MInst::FpuRR {
-        fpu_op: arg1.clone(),
-        rd: v3,
-        rn: arg2,
-    };
-    let v5 = C::emit(ctx, &v4);
-    let v6 = C::writable_reg_to_reg(ctx, v3);
-    // Rule at src/isa/s390x/inst.isle line 2335.
-    return v6;
-}
-
-// Generated as internal constructor for term fpu_rrr.
-pub fn constructor_fpu_rrr<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &FPUOp2,
-    arg2: Reg,
-    arg3: Reg,
-) -> Reg {
-    let v4 = C::temp_writable_reg(ctx, arg0);
-    let v5 = MInst::FpuRRR {
-        fpu_op: arg1.clone(),
-        rd: v4,
-        rn: arg2,
-        rm: arg3,
-    };
-    let v6 = C::emit(ctx, &v5);
-    let v7 = C::writable_reg_to_reg(ctx, v4);
-    // Rule at src/isa/s390x/inst.isle line 2342.
-    return v7;
-}
-
-// Generated as internal constructor for term fpu_rrrr.
-pub fn constructor_fpu_rrrr<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &FPUOp3,
-    arg2: Reg,
-    arg3: Reg,
-    arg4: Reg,
-) -> Reg {
-    let v5 = C::temp_writable_reg(ctx, arg0);
-    let v6 = MInst::FpuRRRR {
-        fpu_op: arg1.clone(),
-        rd: v5,
-        rn: arg2,
-        rm: arg3,
-        ra: arg4,
-    };
-    let v7 = C::emit(ctx, &v6);
-    let v8 = C::writable_reg_to_reg(ctx, v5);
-    // Rule at src/isa/s390x/inst.isle line 2349.
-    return v8;
-}
-
-// Generated as internal constructor for term fpu_cmp32.
-pub fn constructor_fpu_cmp32<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg) -> ProducesFlags {
-    let v2 = MInst::FpuCmp32 { rn: arg0, rm: arg1 };
-    let v3 = ProducesFlags::ProducesFlagsSideEffect { inst: v2 };
-    // Rule at src/isa/s390x/inst.isle line 2356.
-    return v3;
-}
-
-// Generated as internal constructor for term fpu_cmp64.
-pub fn constructor_fpu_cmp64<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg) -> ProducesFlags {
-    let v2 = MInst::FpuCmp64 { rn: arg0, rm: arg1 };
-    let v3 = ProducesFlags::ProducesFlagsSideEffect { inst: v2 };
-    // Rule at src/isa/s390x/inst.isle line 2361.
-    return v3;
-}
-
-// Generated as internal constructor for term fpu_round.
-pub fn constructor_fpu_round<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &FpuRoundOp,
-    arg2: &FpuRoundMode,
-    arg3: Reg,
-) -> Reg {
-    let v4 = C::temp_writable_reg(ctx, arg0);
-    let v5 = MInst::FpuRound {
-        op: arg1.clone(),
-        mode: arg2.clone(),
-        rd: v4,
-        rn: arg3,
-    };
-    let v6 = C::emit(ctx, &v5);
-    let v7 = C::writable_reg_to_reg(ctx, v4);
-    // Rule at src/isa/s390x/inst.isle line 2366.
-    return v7;
-}
-
-// Generated as internal constructor for term vec_rrr.
-pub fn constructor_vec_rrr<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &VecBinaryOp,
-    arg2: Reg,
-    arg3: Reg,
-) -> Reg {
-    let v4 = C::temp_writable_reg(ctx, arg0);
-    let v5 = MInst::VecRRR {
-        op: arg1.clone(),
-        rd: v4,
-        rn: arg2,
-        rm: arg3,
-    };
-    let v6 = C::emit(ctx, &v5);
-    let v7 = C::writable_reg_to_reg(ctx, v4);
-    // Rule at src/isa/s390x/inst.isle line 2373.
-    return v7;
-}
-
-// Generated as internal constructor for term vec_rr.
-pub fn constructor_vec_rr<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &VecUnaryOp,
-    arg2: Reg,
-) -> Reg {
-    let v3 = C::temp_writable_reg(ctx, arg0);
-    let v4 = MInst::VecRR {
-        op: arg1.clone(),
-        rd: v3,
-        rn: arg2,
-    };
-    let v5 = C::emit(ctx, &v4);
-    let v6 = C::writable_reg_to_reg(ctx, v3);
-    // Rule at src/isa/s390x/inst.isle line 2380.
-    return v6;
-}
-
-// Generated as internal constructor for term vec_shift_rr.
-pub fn constructor_vec_shift_rr<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &VecShiftOp,
-    arg2: Reg,
-    arg3: u8,
-    arg4: Reg,
-) -> Reg {
-    let v5 = C::temp_writable_reg(ctx, arg0);
-    let v6 = MInst::VecShiftRR {
-        shift_op: arg1.clone(),
-        rd: v5,
-        rn: arg2,
-        shift_imm: arg3,
-        shift_reg: arg4,
-    };
-    let v7 = C::emit(ctx, &v6);
-    let v8 = C::writable_reg_to_reg(ctx, v5);
-    // Rule at src/isa/s390x/inst.isle line 2387.
-    return v8;
-}
-
-// Generated as internal constructor for term vec_select.
-pub fn constructor_vec_select<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: Reg,
-    arg3: Reg,
-) -> Reg {
-    let v4 = C::temp_writable_reg(ctx, arg0);
-    let v5 = MInst::VecSelect {
-        rd: v4,
-        rn: arg1,
-        rm: arg2,
-        ra: arg3,
-    };
-    let v6 = C::emit(ctx, &v5);
-    let v7 = C::writable_reg_to_reg(ctx, v4);
-    // Rule at src/isa/s390x/inst.isle line 2394.
-    return v7;
-}
-
-// Generated as internal constructor for term vec_permute.
-pub fn constructor_vec_permute<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: Reg,
-    arg3: Reg,
-) -> Reg {
-    let v4 = C::temp_writable_reg(ctx, arg0);
-    let v5 = MInst::VecPermute {
-        rd: v4,
-        rn: arg1,
-        rm: arg2,
-        ra: arg3,
-    };
-    let v6 = C::emit(ctx, &v5);
-    let v7 = C::writable_reg_to_reg(ctx, v4);
-    // Rule at src/isa/s390x/inst.isle line 2401.
-    return v7;
-}
-
-// Generated as internal constructor for term vec_permute_dw_imm.
-pub fn constructor_vec_permute_dw_imm<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: u8,
-    arg3: Reg,
-    arg4: u8,
-) -> Reg {
-    let v5 = C::temp_writable_reg(ctx, arg0);
-    let v6 = MInst::VecPermuteDWImm {
-        rd: v5,
-        rn: arg1,
-        rm: arg3,
-        idx1: arg2,
-        idx2: arg4,
-    };
-    let v7 = C::emit(ctx, &v6);
-    let v8 = C::writable_reg_to_reg(ctx, v5);
-    // Rule at src/isa/s390x/inst.isle line 2408.
-    return v8;
-}
-
-// Generated as internal constructor for term vec_int_cmp.
-pub fn constructor_vec_int_cmp<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &VecIntCmpOp,
-    arg2: Reg,
-    arg3: Reg,
-) -> Reg {
-    let v4 = C::temp_writable_reg(ctx, arg0);
-    let v5 = MInst::VecIntCmp {
-        op: arg1.clone(),
-        rd: v4,
-        rn: arg2,
-        rm: arg3,
-    };
-    let v6 = C::emit(ctx, &v5);
-    let v7 = C::writable_reg_to_reg(ctx, v4);
-    // Rule at src/isa/s390x/inst.isle line 2415.
-    return v7;
-}
-
-// Generated as internal constructor for term vec_int_cmps.
-pub fn constructor_vec_int_cmps<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &VecIntCmpOp,
-    arg2: Reg,
-    arg3: Reg,
-) -> ProducesFlags {
-    let v4 = C::temp_writable_reg(ctx, arg0);
-    let v5 = MInst::VecIntCmpS {
-        op: arg1.clone(),
-        rd: v4,
-        rn: arg2,
-        rm: arg3,
-    };
-    let v6 = ProducesFlags::ProducesFlagsSideEffect { inst: v5 };
-    // Rule at src/isa/s390x/inst.isle line 2422.
-    return v6;
-}
-
-// Generated as internal constructor for term vec_float_cmp.
-pub fn constructor_vec_float_cmp<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &VecFloatCmpOp,
-    arg2: Reg,
-    arg3: Reg,
-) -> Reg {
-    let v4 = C::temp_writable_reg(ctx, arg0);
-    let v5 = MInst::VecFloatCmp {
-        op: arg1.clone(),
-        rd: v4,
-        rn: arg2,
-        rm: arg3,
-    };
-    let v6 = C::emit(ctx, &v5);
-    let v7 = C::writable_reg_to_reg(ctx, v4);
-    // Rule at src/isa/s390x/inst.isle line 2428.
-    return v7;
-}
-
-// Generated as internal constructor for term vec_float_cmps.
-pub fn constructor_vec_float_cmps<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &VecFloatCmpOp,
-    arg2: Reg,
-    arg3: Reg,
-) -> ProducesFlags {
-    let v4 = C::temp_writable_reg(ctx, arg0);
-    let v5 = MInst::VecFloatCmpS {
-        op: arg1.clone(),
-        rd: v4,
-        rn: arg2,
-        rm: arg3,
-    };
-    let v6 = ProducesFlags::ProducesFlagsSideEffect { inst: v5 };
-    // Rule at src/isa/s390x/inst.isle line 2435.
-    return v6;
-}
-
-// Generated as internal constructor for term vec_int128_scmphi.
-pub fn constructor_vec_int128_scmphi<C: Context>(
-    ctx: &mut C,
-    arg0: Reg,
-    arg1: Reg,
-) -> ProducesBool {
-    let v3 = C::temp_writable_reg(ctx, I128);
-    let v7 = &C::mask_as_cond(ctx, 0x4);
-    let v4 = MInst::VecInt128SCmpHi {
-        tmp: v3,
-        rn: arg0,
-        rm: arg1,
-    };
-    let v5 = ProducesFlags::ProducesFlagsSideEffect { inst: v4 };
-    let v8 = &constructor_bool(ctx, &v5, v7);
-    // Rule at src/isa/s390x/inst.isle line 2441.
-    return v8.clone();
-}
-
-// Generated as internal constructor for term vec_int128_ucmphi.
-pub fn constructor_vec_int128_ucmphi<C: Context>(
-    ctx: &mut C,
-    arg0: Reg,
-    arg1: Reg,
-) -> ProducesBool {
-    let v3 = C::temp_writable_reg(ctx, I128);
-    let v7 = &C::mask_as_cond(ctx, 0x4);
-    let v4 = MInst::VecInt128UCmpHi {
-        tmp: v3,
-        rn: arg0,
-        rm: arg1,
-    };
-    let v5 = ProducesFlags::ProducesFlagsSideEffect { inst: v4 };
-    let v8 = &constructor_bool(ctx, &v5, v7);
-    // Rule at src/isa/s390x/inst.isle line 2448.
-    return v8.clone();
-}
-
-// Generated as internal constructor for term vec_load.
-pub fn constructor_vec_load<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Reg {
-    let v2 = C::temp_writable_reg(ctx, arg0);
-    let v3 = MInst::VecLoad {
-        rd: v2,
-        mem: arg1.clone(),
-    };
-    let v4 = C::emit(ctx, &v3);
-    let v5 = C::writable_reg_to_reg(ctx, v2);
-    // Rule at src/isa/s390x/inst.isle line 2455.
-    return v5;
-}
-
-// Generated as internal constructor for term vec_loadrev.
-pub fn constructor_vec_loadrev<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Reg {
-    let v2 = C::temp_writable_reg(ctx, arg0);
-    let v3 = MInst::VecLoadRev {
-        rd: v2,
-        mem: arg1.clone(),
-    };
-    let v4 = C::emit(ctx, &v3);
-    let v5 = C::writable_reg_to_reg(ctx, v2);
-    // Rule at src/isa/s390x/inst.isle line 2462.
-    return v5;
-}
-
-// Generated as internal constructor for term vec_load_byte16rev.
-pub fn constructor_vec_load_byte16rev<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Reg {
-    let v2 = C::temp_writable_reg(ctx, arg0);
-    let v3 = MInst::VecLoadByte16Rev {
-        rd: v2,
-        mem: arg1.clone(),
-    };
-    let v4 = C::emit(ctx, &v3);
-    let v5 = C::writable_reg_to_reg(ctx, v2);
-    // Rule at src/isa/s390x/inst.isle line 2469.
-    return v5;
-}
-
-// Generated as internal constructor for term vec_load_byte32rev.
-pub fn constructor_vec_load_byte32rev<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Reg {
-    let v2 = C::temp_writable_reg(ctx, arg0);
-    let v3 = MInst::VecLoadByte32Rev {
-        rd: v2,
-        mem: arg1.clone(),
-    };
-    let v4 = C::emit(ctx, &v3);
-    let v5 = C::writable_reg_to_reg(ctx, v2);
-    // Rule at src/isa/s390x/inst.isle line 2476.
-    return v5;
-}
-
-// Generated as internal constructor for term vec_load_byte64rev.
-pub fn constructor_vec_load_byte64rev<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Reg {
-    let v2 = C::temp_writable_reg(ctx, arg0);
-    let v3 = MInst::VecLoadByte64Rev {
-        rd: v2,
-        mem: arg1.clone(),
-    };
-    let v4 = C::emit(ctx, &v3);
-    let v5 = C::writable_reg_to_reg(ctx, v2);
-    // Rule at src/isa/s390x/inst.isle line 2483.
-    return v5;
-}
-
-// Generated as internal constructor for term vec_load_elt16rev.
-pub fn constructor_vec_load_elt16rev<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Reg {
-    let v2 = C::temp_writable_reg(ctx, arg0);
-    let v3 = MInst::VecLoadElt16Rev {
-        rd: v2,
-        mem: arg1.clone(),
-    };
-    let v4 = C::emit(ctx, &v3);
-    let v5 = C::writable_reg_to_reg(ctx, v2);
-    // Rule at src/isa/s390x/inst.isle line 2490.
-    return v5;
-}
-
-// Generated as internal constructor for term vec_load_elt32rev.
-pub fn constructor_vec_load_elt32rev<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Reg {
-    let v2 = C::temp_writable_reg(ctx, arg0);
-    let v3 = MInst::VecLoadElt32Rev {
-        rd: v2,
-        mem: arg1.clone(),
-    };
-    let v4 = C::emit(ctx, &v3);
-    let v5 = C::writable_reg_to_reg(ctx, v2);
-    // Rule at src/isa/s390x/inst.isle line 2497.
-    return v5;
-}
-
-// Generated as internal constructor for term vec_load_elt64rev.
-pub fn constructor_vec_load_elt64rev<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Reg {
-    let v2 = C::temp_writable_reg(ctx, arg0);
-    let v3 = MInst::VecLoadElt64Rev {
-        rd: v2,
-        mem: arg1.clone(),
-    };
-    let v4 = C::emit(ctx, &v3);
-    let v5 = C::writable_reg_to_reg(ctx, v2);
-    // Rule at src/isa/s390x/inst.isle line 2504.
-    return v5;
-}
-
-// Generated as internal constructor for term vec_store.
-pub fn constructor_vec_store<C: Context>(
-    ctx: &mut C,
-    arg0: Reg,
-    arg1: &MemArg,
-) -> SideEffectNoResult {
-    let v2 = MInst::VecStore {
-        rd: arg0,
-        mem: arg1.clone(),
-    };
-    let v3 = SideEffectNoResult::Inst { inst: v2 };
-    // Rule at src/isa/s390x/inst.isle line 2511.
-    return v3;
-}
-
-// Generated as internal constructor for term vec_storerev.
-pub fn constructor_vec_storerev<C: Context>(
-    ctx: &mut C,
-    arg0: Reg,
-    arg1: &MemArg,
-) -> SideEffectNoResult {
-    let v2 = MInst::VecStoreRev {
-        rd: arg0,
-        mem: arg1.clone(),
-    };
-    let v3 = SideEffectNoResult::Inst { inst: v2 };
-    // Rule at src/isa/s390x/inst.isle line 2516.
-    return v3;
-}
-
-// Generated as internal constructor for term vec_store_byte16rev.
-pub fn constructor_vec_store_byte16rev<C: Context>(
-    ctx: &mut C,
-    arg0: Reg,
-    arg1: &MemArg,
-) -> SideEffectNoResult {
-    let v2 = MInst::VecStoreByte16Rev {
-        rd: arg0,
-        mem: arg1.clone(),
-    };
-    let v3 = SideEffectNoResult::Inst { inst: v2 };
-    // Rule at src/isa/s390x/inst.isle line 2521.
-    return v3;
-}
-
-// Generated as internal constructor for term vec_store_byte32rev.
-pub fn constructor_vec_store_byte32rev<C: Context>(
-    ctx: &mut C,
-    arg0: Reg,
-    arg1: &MemArg,
-) -> SideEffectNoResult {
-    let v2 = MInst::VecStoreByte32Rev {
-        rd: arg0,
-        mem: arg1.clone(),
-    };
-    let v3 = SideEffectNoResult::Inst { inst: v2 };
-    // Rule at src/isa/s390x/inst.isle line 2526.
-    return v3;
-}
-
-// Generated as internal constructor for term vec_store_byte64rev.
-pub fn constructor_vec_store_byte64rev<C: Context>(
-    ctx: &mut C,
-    arg0: Reg,
-    arg1: &MemArg,
-) -> SideEffectNoResult {
-    let v2 = MInst::VecStoreByte64Rev {
-        rd: arg0,
-        mem: arg1.clone(),
-    };
-    let v3 = SideEffectNoResult::Inst { inst: v2 };
-    // Rule at src/isa/s390x/inst.isle line 2531.
-    return v3;
-}
-
-// Generated as internal constructor for term vec_store_elt16rev.
-pub fn constructor_vec_store_elt16rev<C: Context>(
-    ctx: &mut C,
-    arg0: Reg,
-    arg1: &MemArg,
-) -> SideEffectNoResult {
-    let v2 = MInst::VecStoreElt16Rev {
-        rd: arg0,
-        mem: arg1.clone(),
-    };
-    let v3 = SideEffectNoResult::Inst { inst: v2 };
-    // Rule at src/isa/s390x/inst.isle line 2536.
-    return v3;
-}
-
-// Generated as internal constructor for term vec_store_elt32rev.
-pub fn constructor_vec_store_elt32rev<C: Context>(
-    ctx: &mut C,
-    arg0: Reg,
-    arg1: &MemArg,
-) -> SideEffectNoResult {
-    let v2 = MInst::VecStoreElt32Rev {
-        rd: arg0,
-        mem: arg1.clone(),
-    };
-    let v3 = SideEffectNoResult::Inst { inst: v2 };
-    // Rule at src/isa/s390x/inst.isle line 2541.
-    return v3;
-}
-
-// Generated as internal constructor for term vec_store_elt64rev.
-pub fn constructor_vec_store_elt64rev<C: Context>(
-    ctx: &mut C,
-    arg0: Reg,
-    arg1: &MemArg,
-) -> SideEffectNoResult {
-    let v2 = MInst::VecStoreElt64Rev {
-        rd: arg0,
-        mem: arg1.clone(),
-    };
-    let v3 = SideEffectNoResult::Inst { inst: v2 };
-    // Rule at src/isa/s390x/inst.isle line 2546.
-    return v3;
-}
-
-// Generated as internal constructor for term vec_load_replicate.
-pub fn constructor_vec_load_replicate<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Reg {
-    let v1 = C::ty_vec128(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v3 = C::multi_lane(ctx, v2);
-        if let Some(v4) = v3 {
-            let v8 = C::temp_writable_reg(ctx, v2);
-            let v9 = MInst::VecLoadReplicate {
-                size: v4.0,
-                rd: v8,
-                mem: arg1.clone(),
-            };
-            let v10 = C::emit(ctx, &v9);
-            let v11 = C::writable_reg_to_reg(ctx, v8);
-            // Rule at src/isa/s390x/inst.isle line 2551.
-            return v11;
-        }
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_load_replicate", "src/isa/s390x/inst.isle line 2550"
-    )
-}
-
-// Generated as internal constructor for term vec_load_replicate_rev.
-pub fn constructor_vec_load_replicate_rev<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &MemArg,
-) -> Reg {
-    let v1 = C::ty_vec128(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v3 = C::multi_lane(ctx, v2);
-        if let Some(v4) = v3 {
-            let v8 = C::temp_writable_reg(ctx, v2);
-            let v9 = MInst::VecLoadReplicateRev {
-                size: v4.0,
-                rd: v8,
-                mem: arg1.clone(),
-            };
-            let v10 = C::emit(ctx, &v9);
-            let v11 = C::writable_reg_to_reg(ctx, v8);
-            // Rule at src/isa/s390x/inst.isle line 2558.
-            return v11;
-        }
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_load_replicate_rev", "src/isa/s390x/inst.isle line 2557"
-    )
-}
-
-// Generated as internal constructor for term mov_to_vec128.
-pub fn constructor_mov_to_vec128<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v3 = C::temp_writable_reg(ctx, arg0);
-    let v4 = MInst::MovToVec128 {
-        rd: v3,
-        rn: arg1,
-        rm: arg2,
-    };
-    let v5 = C::emit(ctx, &v4);
-    let v6 = C::writable_reg_to_reg(ctx, v3);
-    // Rule at src/isa/s390x/inst.isle line 2565.
-    return v6;
-}
-
-// Generated as internal constructor for term vec_load_const.
-pub fn constructor_vec_load_const<C: Context>(ctx: &mut C, arg0: Type, arg1: u128) -> Reg {
-    let v1 = C::vr128_ty(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v4 = C::temp_writable_reg(ctx, v2);
-        let v5 = MInst::VecLoadConst {
-            rd: v4,
-            const_data: arg1,
-        };
-        let v6 = C::emit(ctx, &v5);
-        let v7 = C::writable_reg_to_reg(ctx, v4);
-        // Rule at src/isa/s390x/inst.isle line 2572.
-        return v7;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_load_const", "src/isa/s390x/inst.isle line 2571"
-    )
-}
-
-// Generated as internal constructor for term vec_load_const_replicate.
-pub fn constructor_vec_load_const_replicate<C: Context>(ctx: &mut C, arg0: Type, arg1: u64) -> Reg {
-    let v1 = C::multi_lane(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v6 = C::temp_writable_reg(ctx, arg0);
-        let v7 = MInst::VecLoadConstReplicate {
-            size: v2.0,
-            rd: v6,
-            const_data: arg1,
-        };
-        let v8 = C::emit(ctx, &v7);
-        let v9 = C::writable_reg_to_reg(ctx, v6);
-        // Rule at src/isa/s390x/inst.isle line 2579.
-        return v9;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_load_const_replicate", "src/isa/s390x/inst.isle line 2578"
-    )
-}
-
-// Generated as internal constructor for term vec_imm_byte_mask.
-pub fn constructor_vec_imm_byte_mask<C: Context>(ctx: &mut C, arg0: Type, arg1: u16) -> Reg {
-    let v1 = C::vr128_ty(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v4 = C::temp_writable_reg(ctx, v2);
-        let v5 = MInst::VecImmByteMask { rd: v4, mask: arg1 };
-        let v6 = C::emit(ctx, &v5);
-        let v7 = C::writable_reg_to_reg(ctx, v4);
-        // Rule at src/isa/s390x/inst.isle line 2586.
-        return v7;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_imm_byte_mask", "src/isa/s390x/inst.isle line 2585"
-    )
-}
-
-// Generated as internal constructor for term vec_imm_bit_mask.
-pub fn constructor_vec_imm_bit_mask<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: u8,
-    arg2: u8,
-) -> Reg {
-    let v1 = C::ty_vec128(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v3 = C::multi_lane(ctx, v2);
-        if let Some(v4) = v3 {
-            let v9 = C::temp_writable_reg(ctx, v2);
-            let v10 = MInst::VecImmBitMask {
-                size: v4.0,
-                rd: v9,
-                start_bit: arg1,
-                end_bit: arg2,
-            };
-            let v11 = C::emit(ctx, &v10);
-            let v12 = C::writable_reg_to_reg(ctx, v9);
-            // Rule at src/isa/s390x/inst.isle line 2593.
-            return v12;
-        }
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_imm_bit_mask", "src/isa/s390x/inst.isle line 2592"
-    )
-}
-
-// Generated as internal constructor for term vec_imm_replicate.
-pub fn constructor_vec_imm_replicate<C: Context>(ctx: &mut C, arg0: Type, arg1: i16) -> Reg {
-    let v1 = C::ty_vec128(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v3 = C::multi_lane(ctx, v2);
-        if let Some(v4) = v3 {
-            let v8 = C::temp_writable_reg(ctx, v2);
-            let v9 = MInst::VecImmReplicate {
-                size: v4.0,
-                rd: v8,
-                imm: arg1,
-            };
-            let v10 = C::emit(ctx, &v9);
-            let v11 = C::writable_reg_to_reg(ctx, v8);
-            // Rule at src/isa/s390x/inst.isle line 2600.
-            return v11;
-        }
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_imm_replicate", "src/isa/s390x/inst.isle line 2599"
-    )
-}
-
-// Generated as internal constructor for term vec_load_lane.
-pub fn constructor_vec_load_lane<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: &MemArg,
-    arg3: u8,
-) -> Reg {
-    let v1 = C::multi_lane(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v8 = C::temp_writable_reg(ctx, arg0);
-        let v9 = MInst::VecLoadLane {
-            size: v2.0,
-            rd: v8,
-            ri: arg1,
-            mem: arg2.clone(),
-            lane_imm: arg3,
-        };
-        let v10 = C::emit(ctx, &v9);
-        let v11 = C::writable_reg_to_reg(ctx, v8);
-        // Rule at src/isa/s390x/inst.isle line 2607.
-        return v11;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_load_lane", "src/isa/s390x/inst.isle line 2606"
-    )
-}
-
-// Generated as internal constructor for term vec_load_lane_undef.
-pub fn constructor_vec_load_lane_undef<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &MemArg,
-    arg2: u8,
-) -> Reg {
-    let v1 = C::multi_lane(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v7 = C::temp_writable_reg(ctx, arg0);
-        let v8 = MInst::VecLoadLaneUndef {
-            size: v2.0,
-            rd: v7,
-            mem: arg1.clone(),
-            lane_imm: arg2,
-        };
-        let v9 = C::emit(ctx, &v8);
-        let v10 = C::writable_reg_to_reg(ctx, v7);
-        // Rule at src/isa/s390x/inst.isle line 2614.
-        return v10;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_load_lane_undef", "src/isa/s390x/inst.isle line 2613"
-    )
-}
-
-// Generated as internal constructor for term vec_load_lane_rev.
-pub fn constructor_vec_load_lane_rev<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: &MemArg,
-    arg3: u8,
-) -> Reg {
-    let v1 = C::multi_lane(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v8 = C::temp_writable_reg(ctx, arg0);
-        let v9 = MInst::VecLoadLaneRev {
-            size: v2.0,
-            rd: v8,
-            ri: arg1,
-            mem: arg2.clone(),
-            lane_imm: arg3,
-        };
-        let v10 = C::emit(ctx, &v9);
-        let v11 = C::writable_reg_to_reg(ctx, v8);
-        // Rule at src/isa/s390x/inst.isle line 2621.
-        return v11;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_load_lane_rev", "src/isa/s390x/inst.isle line 2620"
-    )
-}
-
-// Generated as internal constructor for term vec_load_lane_rev_undef.
-pub fn constructor_vec_load_lane_rev_undef<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &MemArg,
-    arg2: u8,
-) -> Reg {
-    let v1 = C::multi_lane(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v7 = C::temp_writable_reg(ctx, arg0);
-        let v8 = MInst::VecLoadLaneRevUndef {
-            size: v2.0,
-            rd: v7,
-            mem: arg1.clone(),
-            lane_imm: arg2,
-        };
-        let v9 = C::emit(ctx, &v8);
-        let v10 = C::writable_reg_to_reg(ctx, v7);
-        // Rule at src/isa/s390x/inst.isle line 2628.
-        return v10;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_load_lane_rev_undef", "src/isa/s390x/inst.isle line 2627"
-    )
-}
-
-// Generated as internal constructor for term vec_store_lane.
-pub fn constructor_vec_store_lane<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: &MemArg,
-    arg3: u8,
-) -> SideEffectNoResult {
-    let v1 = C::multi_lane(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v8 = MInst::VecStoreLane {
-            size: v2.0,
-            rd: arg1,
-            mem: arg2.clone(),
-            lane_imm: arg3,
-        };
-        let v9 = SideEffectNoResult::Inst { inst: v8 };
-        // Rule at src/isa/s390x/inst.isle line 2635.
-        return v9;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_store_lane", "src/isa/s390x/inst.isle line 2634"
-    )
-}
-
-// Generated as internal constructor for term vec_store_lane_rev.
-pub fn constructor_vec_store_lane_rev<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: &MemArg,
-    arg3: u8,
-) -> SideEffectNoResult {
-    let v1 = C::multi_lane(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v8 = MInst::VecStoreLaneRev {
-            size: v2.0,
-            rd: arg1,
-            mem: arg2.clone(),
-            lane_imm: arg3,
-        };
-        let v9 = SideEffectNoResult::Inst { inst: v8 };
-        // Rule at src/isa/s390x/inst.isle line 2640.
-        return v9;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_store_lane_rev", "src/isa/s390x/inst.isle line 2639"
-    )
-}
-
-// Generated as internal constructor for term vec_insert_lane.
-pub fn constructor_vec_insert_lane<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: Reg,
-    arg3: u8,
-    arg4: Reg,
-) -> Reg {
-    let v1 = C::multi_lane(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v9 = C::temp_writable_reg(ctx, arg0);
-        let v10 = MInst::VecInsertLane {
-            size: v2.0,
-            rd: v9,
-            ri: arg1,
-            rn: arg2,
-            lane_imm: arg3,
-            lane_reg: arg4,
-        };
-        let v11 = C::emit(ctx, &v10);
-        let v12 = C::writable_reg_to_reg(ctx, v9);
-        // Rule at src/isa/s390x/inst.isle line 2645.
-        return v12;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_insert_lane", "src/isa/s390x/inst.isle line 2644"
-    )
-}
-
-// Generated as internal constructor for term vec_insert_lane_undef.
-pub fn constructor_vec_insert_lane_undef<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: u8,
-    arg3: Reg,
-) -> Reg {
-    let v1 = C::multi_lane(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v8 = C::temp_writable_reg(ctx, arg0);
-        let v9 = MInst::VecInsertLaneUndef {
-            size: v2.0,
-            rd: v8,
-            rn: arg1,
-            lane_imm: arg2,
-            lane_reg: arg3,
-        };
-        let v10 = C::emit(ctx, &v9);
-        let v11 = C::writable_reg_to_reg(ctx, v8);
-        // Rule at src/isa/s390x/inst.isle line 2652.
-        return v11;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_insert_lane_undef", "src/isa/s390x/inst.isle line 2651"
-    )
-}
-
-// Generated as internal constructor for term vec_extract_lane.
-pub fn constructor_vec_extract_lane<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: u8,
-    arg3: Reg,
-) -> Reg {
-    let v1 = C::multi_lane(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v9 = C::temp_writable_reg(ctx, I64);
-        let v10 = MInst::VecExtractLane {
-            size: v2.0,
-            rd: v9,
-            rn: arg1,
-            lane_imm: arg2,
-            lane_reg: arg3,
-        };
-        let v11 = C::emit(ctx, &v10);
-        let v12 = C::writable_reg_to_reg(ctx, v9);
-        // Rule at src/isa/s390x/inst.isle line 2659.
-        return v12;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_extract_lane", "src/isa/s390x/inst.isle line 2658"
-    )
-}
-
-// Generated as internal constructor for term vec_insert_lane_imm.
-pub fn constructor_vec_insert_lane_imm<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: i16,
-    arg3: u8,
-) -> Reg {
-    let v1 = C::multi_lane(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v8 = C::temp_writable_reg(ctx, arg0);
-        let v9 = MInst::VecInsertLaneImm {
-            size: v2.0,
-            rd: v8,
-            ri: arg1,
-            imm: arg2,
-            lane_imm: arg3,
-        };
-        let v10 = C::emit(ctx, &v9);
-        let v11 = C::writable_reg_to_reg(ctx, v8);
-        // Rule at src/isa/s390x/inst.isle line 2666.
-        return v11;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_insert_lane_imm", "src/isa/s390x/inst.isle line 2665"
-    )
-}
-
-// Generated as internal constructor for term vec_replicate_lane.
-pub fn constructor_vec_replicate_lane<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: u8,
-) -> Reg {
-    let v1 = C::multi_lane(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v7 = C::temp_writable_reg(ctx, arg0);
-        let v8 = MInst::VecReplicateLane {
-            size: v2.0,
-            rd: v7,
-            rn: arg1,
-            lane_imm: arg2,
-        };
-        let v9 = C::emit(ctx, &v8);
-        let v10 = C::writable_reg_to_reg(ctx, v7);
-        // Rule at src/isa/s390x/inst.isle line 2673.
-        return v10;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_replicate_lane", "src/isa/s390x/inst.isle line 2672"
-    )
-}
-
-// Generated as internal constructor for term load_symbol_reloc.
-pub fn constructor_load_symbol_reloc<C: Context>(ctx: &mut C, arg0: &SymbolReloc) -> Reg {
-    let v2 = C::temp_writable_reg(ctx, I64);
-    let v3 = C::box_symbol_reloc(ctx, arg0);
-    let v4 = MInst::LoadSymbolReloc {
-        rd: v2,
-        symbol_reloc: v3,
-    };
-    let v5 = C::emit(ctx, &v4);
-    let v6 = C::writable_reg_to_reg(ctx, v2);
-    // Rule at src/isa/s390x/inst.isle line 2680.
-    return v6;
-}
-
-// Generated as internal constructor for term load_addr.
-pub fn constructor_load_addr<C: Context>(ctx: &mut C, arg0: &MemArg) -> Reg {
-    let v2 = C::temp_writable_reg(ctx, I64);
-    let v3 = MInst::LoadAddr {
-        rd: v2,
-        mem: arg0.clone(),
-    };
-    let v4 = C::emit(ctx, &v3);
-    let v5 = C::writable_reg_to_reg(ctx, v2);
-    // Rule at src/isa/s390x/inst.isle line 2687.
-    return v5;
-}
-
-// Generated as internal constructor for term call_impl.
-pub fn constructor_call_impl<C: Context>(
-    ctx: &mut C,
-    arg0: WritableReg,
-    arg1: BoxCallInfo,
-) -> SideEffectNoResult {
-    let v2 = MInst::Call {
-        link: arg0,
-        info: arg1,
-    };
-    let v3 = SideEffectNoResult::Inst { inst: v2 };
-    // Rule at src/isa/s390x/inst.isle line 2694.
-    return v3;
-}
-
-// Generated as internal constructor for term call_ind_impl.
-pub fn constructor_call_ind_impl<C: Context>(
-    ctx: &mut C,
-    arg0: WritableReg,
-    arg1: BoxCallIndInfo,
-) -> SideEffectNoResult {
-    let v2 = MInst::CallInd {
-        link: arg0,
-        info: arg1,
-    };
-    let v3 = SideEffectNoResult::Inst { inst: v2 };
-    // Rule at src/isa/s390x/inst.isle line 2699.
-    return v3;
-}
-
-// Generated as internal constructor for term jump_impl.
-pub fn constructor_jump_impl<C: Context>(ctx: &mut C, arg0: MachLabel) -> SideEffectNoResult {
-    let v1 = MInst::Jump { dest: arg0 };
-    let v2 = SideEffectNoResult::Inst { inst: v1 };
-    // Rule at src/isa/s390x/inst.isle line 2704.
-    return v2;
-}
-
-// Generated as internal constructor for term cond_br.
-pub fn constructor_cond_br<C: Context>(
-    ctx: &mut C,
-    arg0: MachLabel,
-    arg1: MachLabel,
-    arg2: &Cond,
-) -> ConsumesFlags {
-    let v3 = MInst::CondBr {
-        taken: arg0,
-        not_taken: arg1,
-        cond: arg2.clone(),
-    };
-    let v4 = ConsumesFlags::ConsumesFlagsSideEffect { inst: v3 };
-    // Rule at src/isa/s390x/inst.isle line 2709.
-    return v4;
-}
-
-// Generated as internal constructor for term oneway_cond_br.
-pub fn constructor_oneway_cond_br<C: Context>(
-    ctx: &mut C,
-    arg0: MachLabel,
-    arg1: &Cond,
-) -> ConsumesFlags {
-    let v2 = MInst::OneWayCondBr {
-        target: arg0,
-        cond: arg1.clone(),
-    };
-    let v3 = ConsumesFlags::ConsumesFlagsSideEffect { inst: v2 };
-    // Rule at src/isa/s390x/inst.isle line 2714.
-    return v3;
-}
-
-// Generated as internal constructor for term jt_sequence.
-pub fn constructor_jt_sequence<C: Context>(
-    ctx: &mut C,
-    arg0: Reg,
-    arg1: &VecMachLabel,
-) -> SideEffectNoResult {
-    let v2 = MInst::JTSequence {
-        ridx: arg0,
-        targets: arg1.clone(),
-    };
-    let v3 = SideEffectNoResult::Inst { inst: v2 };
-    // Rule at src/isa/s390x/inst.isle line 2719.
-    return v3;
-}
-
-// Generated as internal constructor for term push_alu_reg.
-pub fn constructor_push_alu_reg<C: Context>(
-    ctx: &mut C,
-    arg0: &VecMInstBuilder,
-    arg1: &ALUOp,
-    arg2: WritableReg,
-    arg3: Reg,
-    arg4: Reg,
-) -> Reg {
-    let v3 = C::real_reg(ctx, arg2);
-    if let Some(v4) = v3 {
-        let v7 = MInst::AluRRR {
-            alu_op: arg1.clone(),
-            rd: v4,
-            rn: arg3,
-            rm: arg4,
-        };
-        let v8 = C::inst_builder_push(ctx, arg0, &v7);
-        let v9 = C::writable_reg_to_reg(ctx, v4);
-        // Rule at src/isa/s390x/inst.isle line 2757.
-        return v9;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "push_alu_reg", "src/isa/s390x/inst.isle line 2756"
-    )
-}
-
-// Generated as internal constructor for term push_alu_uimm32shifted.
-pub fn constructor_push_alu_uimm32shifted<C: Context>(
-    ctx: &mut C,
-    arg0: &VecMInstBuilder,
-    arg1: &ALUOp,
-    arg2: WritableReg,
-    arg3: Reg,
-    arg4: UImm32Shifted,
-) -> Reg {
-    let v3 = C::real_reg(ctx, arg2);
-    if let Some(v4) = v3 {
-        let v7 = MInst::AluRUImm32Shifted {
-            alu_op: arg1.clone(),
-            rd: v4,
-            ri: arg3,
-            imm: arg4,
-        };
-        let v8 = C::inst_builder_push(ctx, arg0, &v7);
-        let v9 = C::writable_reg_to_reg(ctx, v4);
-        // Rule at src/isa/s390x/inst.isle line 2763.
-        return v9;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "push_alu_uimm32shifted", "src/isa/s390x/inst.isle line 2762"
-    )
-}
-
-// Generated as internal constructor for term push_shift.
-pub fn constructor_push_shift<C: Context>(
-    ctx: &mut C,
-    arg0: &VecMInstBuilder,
-    arg1: &ShiftOp,
-    arg2: WritableReg,
-    arg3: Reg,
-    arg4: u8,
-    arg5: Reg,
-) -> Reg {
-    let v3 = C::real_reg(ctx, arg2);
-    if let Some(v4) = v3 {
-        let v8 = MInst::ShiftRR {
-            shift_op: arg1.clone(),
-            rd: v4,
-            rn: arg3,
-            shift_imm: arg4,
-            shift_reg: arg5,
-        };
-        let v9 = C::inst_builder_push(ctx, arg0, &v8);
-        let v10 = C::writable_reg_to_reg(ctx, v4);
-        // Rule at src/isa/s390x/inst.isle line 2769.
-        return v10;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "push_shift", "src/isa/s390x/inst.isle line 2768"
-    )
-}
-
-// Generated as internal constructor for term push_rxsbg.
-pub fn constructor_push_rxsbg<C: Context>(
-    ctx: &mut C,
-    arg0: &VecMInstBuilder,
-    arg1: &RxSBGOp,
-    arg2: WritableReg,
-    arg3: Reg,
-    arg4: Reg,
-    arg5: u8,
-    arg6: u8,
-    arg7: i8,
-) -> Reg {
-    let v3 = C::real_reg(ctx, arg2);
-    if let Some(v4) = v3 {
-        let v10 = C::same_reg(ctx, v4, arg3);
-        if let Some(v11) = v10 {
-            let v12 = MInst::RxSBG {
-                op: arg1.clone(),
-                rd: v4,
-                ri: arg3,
-                rn: arg4,
-                start_bit: arg5,
-                end_bit: arg6,
-                rotate_amt: arg7,
-            };
-            let v13 = C::inst_builder_push(ctx, arg0, &v12);
-            let v14 = C::writable_reg_to_reg(ctx, v4);
-            // Rule at src/isa/s390x/inst.isle line 2776.
-            return v14;
-        }
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "push_rxsbg", "src/isa/s390x/inst.isle line 2775"
-    )
-}
-
-// Generated as internal constructor for term push_unary.
-pub fn constructor_push_unary<C: Context>(
-    ctx: &mut C,
-    arg0: &VecMInstBuilder,
-    arg1: &UnaryOp,
-    arg2: WritableReg,
-    arg3: Reg,
-) -> Reg {
-    let v3 = C::real_reg(ctx, arg2);
-    if let Some(v4) = v3 {
-        let v6 = MInst::UnaryRR {
-            op: arg1.clone(),
-            rd: v4,
-            rn: arg3,
-        };
-        let v7 = C::inst_builder_push(ctx, arg0, &v6);
-        let v8 = C::writable_reg_to_reg(ctx, v4);
-        // Rule at src/isa/s390x/inst.isle line 2784.
-        return v8;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "push_unary", "src/isa/s390x/inst.isle line 2783"
-    )
-}
-
-// Generated as internal constructor for term push_atomic_cas32.
-pub fn constructor_push_atomic_cas32<C: Context>(
-    ctx: &mut C,
-    arg0: &VecMInstBuilder,
-    arg1: WritableReg,
-    arg2: Reg,
-    arg3: &MemArg,
-) -> Reg {
-    let v2 = C::real_reg(ctx, arg1);
-    if let Some(v3) = v2 {
-        let v6 = C::writable_reg_to_reg(ctx, v3);
-        let v7 = MInst::AtomicCas32 {
-            rd: v3,
-            ri: v6,
-            rn: arg2,
-            mem: arg3.clone(),
-        };
-        let v8 = C::inst_builder_push(ctx, arg0, &v7);
-        // Rule at src/isa/s390x/inst.isle line 2790.
-        return v6;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "push_atomic_cas32", "src/isa/s390x/inst.isle line 2789"
-    )
-}
-
-// Generated as internal constructor for term push_atomic_cas64.
-pub fn constructor_push_atomic_cas64<C: Context>(
-    ctx: &mut C,
-    arg0: &VecMInstBuilder,
-    arg1: WritableReg,
-    arg2: Reg,
-    arg3: &MemArg,
-) -> Reg {
-    let v2 = C::real_reg(ctx, arg1);
-    if let Some(v3) = v2 {
-        let v6 = C::writable_reg_to_reg(ctx, v3);
-        let v7 = MInst::AtomicCas64 {
-            rd: v3,
-            ri: v6,
-            rn: arg2,
-            mem: arg3.clone(),
-        };
-        let v8 = C::inst_builder_push(ctx, arg0, &v7);
-        // Rule at src/isa/s390x/inst.isle line 2796.
-        return v6;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "push_atomic_cas64", "src/isa/s390x/inst.isle line 2795"
-    )
-}
-
-// Generated as internal constructor for term push_break_if.
-pub fn constructor_push_break_if<C: Context>(
-    ctx: &mut C,
-    arg0: &VecMInstBuilder,
-    arg1: &ProducesFlags,
-    arg2: &Cond,
-) -> Reg {
-    if let &ProducesFlags::ProducesFlagsSideEffect { inst: ref v2 } = arg1 {
-        let v4 = C::inst_builder_push(ctx, arg0, v2);
-        let v5 = MInst::CondBreak { cond: arg2.clone() };
-        let v6 = C::inst_builder_push(ctx, arg0, &v5);
-        let v7 = C::invalid_reg(ctx);
-        // Rule at src/isa/s390x/inst.isle line 2802.
-        return v7;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "push_break_if", "src/isa/s390x/inst.isle line 2801"
-    )
-}
-
-// Generated as internal constructor for term emit_loop.
-pub fn constructor_emit_loop<C: Context>(ctx: &mut C, arg0: &VecMInstBuilder, arg1: &Cond) -> Unit {
-    let v2 = C::inst_builder_finish(ctx, arg0);
-    let v3 = MInst::Loop {
-        body: v2,
-        cond: arg1.clone(),
-    };
-    let v4 = C::emit(ctx, &v3);
-    // Rule at src/isa/s390x/inst.isle line 2809.
-    return v4;
-}
-
-// Generated as internal constructor for term copy_reg.
-pub fn constructor_copy_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
-    let v8 = C::gpr64_ty(ctx, arg0);
-    if let Some(v9) = v8 {
-        let v10 = C::temp_writable_reg(ctx, v9);
-        let v11 = MInst::Mov64 { rd: v10, rm: arg1 };
-        let v12 = C::emit(ctx, &v11);
-        let v13 = C::writable_reg_to_reg(ctx, v10);
-        // Rule at src/isa/s390x/inst.isle line 2821.
-        return v13;
-    }
-    let v1 = C::gpr32_ty(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v4 = C::temp_writable_reg(ctx, v2);
-        let v5 = MInst::Mov32 { rd: v4, rm: arg1 };
-        let v6 = C::emit(ctx, &v5);
-        let v7 = C::writable_reg_to_reg(ctx, v4);
-        // Rule at src/isa/s390x/inst.isle line 2817.
-        return v7;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "copy_reg", "src/isa/s390x/inst.isle line 2816"
-    )
-}
-
-// Generated as internal constructor for term emit_load.
-pub fn constructor_emit_load<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: WritableReg,
-    arg2: &MemArg,
-) -> Unit {
-    match arg0 {
-        I32 => {
-            let v3 = MInst::Load32 {
-                rd: arg1,
-                mem: arg2.clone(),
-            };
-            let v4 = C::emit(ctx, &v3);
-            // Rule at src/isa/s390x/inst.isle line 2828.
-            return v4;
-        }
-        I64 => {
-            let v5 = MInst::Load64 {
-                rd: arg1,
-                mem: arg2.clone(),
-            };
-            let v6 = C::emit(ctx, &v5);
-            // Rule at src/isa/s390x/inst.isle line 2830.
-            return v6;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "emit_load", "src/isa/s390x/inst.isle line 2827"
-    )
-}
-
-// Generated as internal constructor for term mov_preg.
-pub fn constructor_mov_preg<C: Context>(ctx: &mut C, arg0: PReg) -> Reg {
-    let v2 = C::temp_writable_reg(ctx, I64);
-    let v3 = MInst::MovPReg { rd: v2, rm: arg0 };
-    let v4 = C::emit(ctx, &v3);
-    let v5 = C::writable_reg_to_reg(ctx, v2);
-    // Rule at src/isa/s390x/inst.isle line 2835.
-    return v5;
-}
-
-// Generated as internal constructor for term sp.
-pub fn constructor_sp<C: Context>(ctx: &mut C) -> Reg {
-    let v0 = C::preg_stack(ctx);
-    let v1 = constructor_mov_preg(ctx, v0);
-    // Rule at src/isa/s390x/inst.isle line 2848.
-    return v1;
-}
-
-// Generated as internal constructor for term arg_store.
-pub fn constructor_arg_store<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: &MemArg,
-) -> SideEffectNoResult {
-    match arg0 {
-        I8 => {
-            let v3 = &constructor_store8(ctx, arg1, arg2);
-            // Rule at src/isa/s390x/inst.isle line 2854.
-            return v3.clone();
-        }
-        I16 => {
-            let v4 = &constructor_store16(ctx, arg1, arg2);
-            // Rule at src/isa/s390x/inst.isle line 2855.
-            return v4.clone();
-        }
-        I32 => {
-            let v5 = &constructor_store32(ctx, arg1, arg2);
-            // Rule at src/isa/s390x/inst.isle line 2856.
-            return v5.clone();
-        }
-        I64 => {
-            let v6 = &constructor_store64(ctx, arg1, arg2);
-            // Rule at src/isa/s390x/inst.isle line 2857.
-            return v6.clone();
-        }
-        R64 => {
-            let v6 = &constructor_store64(ctx, arg1, arg2);
-            // Rule at src/isa/s390x/inst.isle line 2858.
-            return v6.clone();
-        }
-        F32 => {
-            let v9 = &constructor_vec_store_lane(ctx, F32X4, arg1, arg2, 0x0);
-            // Rule at src/isa/s390x/inst.isle line 2859.
-            return v9.clone();
-        }
-        F64 => {
-            let v11 = &constructor_vec_store_lane(ctx, F64X2, arg1, arg2, 0x0);
-            // Rule at src/isa/s390x/inst.isle line 2860.
-            return v11.clone();
-        }
-        _ => {}
-    }
-    let v12 = C::vr128_ty(ctx, arg0);
-    if let Some(v13) = v12 {
-        let v14 = &constructor_vec_store(ctx, arg1, arg2);
-        // Rule at src/isa/s390x/inst.isle line 2861.
-        return v14.clone();
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "arg_store", "src/isa/s390x/inst.isle line 2853"
-    )
-}
-
-// Generated as internal constructor for term arg_load.
-pub fn constructor_arg_load<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Reg {
-    match arg0 {
-        I8 => {
-            let v3 = constructor_zext32_mem(ctx, I8, arg1);
-            // Rule at src/isa/s390x/inst.isle line 2864.
-            return v3;
-        }
-        I16 => {
-            let v5 = constructor_zext32_mem(ctx, I16, arg1);
-            // Rule at src/isa/s390x/inst.isle line 2865.
-            return v5;
-        }
-        I32 => {
-            let v6 = constructor_load32(ctx, arg1);
-            // Rule at src/isa/s390x/inst.isle line 2866.
-            return v6;
-        }
-        I64 => {
-            let v7 = constructor_load64(ctx, arg1);
-            // Rule at src/isa/s390x/inst.isle line 2867.
-            return v7;
-        }
-        R64 => {
-            let v7 = constructor_load64(ctx, arg1);
-            // Rule at src/isa/s390x/inst.isle line 2868.
-            return v7;
-        }
-        F32 => {
-            let v10 = constructor_vec_load_lane_undef(ctx, F32X4, arg1, 0x0);
-            // Rule at src/isa/s390x/inst.isle line 2869.
-            return v10;
-        }
-        F64 => {
-            let v12 = constructor_vec_load_lane_undef(ctx, F64X2, arg1, 0x0);
-            // Rule at src/isa/s390x/inst.isle line 2870.
-            return v12;
-        }
-        _ => {}
-    }
-    let v13 = C::vr128_ty(ctx, arg0);
-    if let Some(v14) = v13 {
-        let v15 = constructor_vec_load(ctx, v14, arg1);
-        // Rule at src/isa/s390x/inst.isle line 2871.
-        return v15;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "arg_load", "src/isa/s390x/inst.isle line 2863"
-    )
-}
-
-// Generated as internal constructor for term vec_elt_rev.
-pub fn constructor_vec_elt_rev<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
-    let v1 = C::multi_lane(ctx, arg0);
-    if let Some(v2) = v1 {
-        match v2.0 {
-            0x8 => {
-                if v2.1 == 0x10 {
-                    let v9 = constructor_vec_permute_dw_imm(ctx, I64X2, arg1, 0x1, arg1, 0x0);
-                    let v11 = constructor_vec_rot_imm(ctx, I64X2, v9, 0x20);
-                    let v14 = constructor_vec_rot_imm(ctx, I32X4, v11, 0x10);
-                    let v17 = constructor_vec_rot_imm(ctx, I16X8, v14, 0x8);
-                    // Rule at src/isa/s390x/inst.isle line 2883.
-                    return v17;
-                }
-            }
-            0x10 => {
-                if v2.1 == 0x8 {
-                    let v9 = constructor_vec_permute_dw_imm(ctx, I64X2, arg1, 0x1, arg1, 0x0);
-                    let v11 = constructor_vec_rot_imm(ctx, I64X2, v9, 0x20);
-                    let v14 = constructor_vec_rot_imm(ctx, I32X4, v11, 0x10);
-                    // Rule at src/isa/s390x/inst.isle line 2880.
-                    return v14;
-                }
-            }
-            0x20 => {
-                if v2.1 == 0x4 {
-                    let v9 = constructor_vec_permute_dw_imm(ctx, I64X2, arg1, 0x1, arg1, 0x0);
-                    let v11 = constructor_vec_rot_imm(ctx, I64X2, v9, 0x20);
-                    // Rule at src/isa/s390x/inst.isle line 2877.
-                    return v11;
-                }
-            }
-            0x40 => {
-                if v2.1 == 0x2 {
-                    let v9 = constructor_vec_permute_dw_imm(ctx, I64X2, arg1, 0x1, arg1, 0x0);
-                    // Rule at src/isa/s390x/inst.isle line 2875.
-                    return v9;
-                }
-            }
-            _ => {}
-        }
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_elt_rev", "src/isa/s390x/inst.isle line 2874"
-    )
-}
-
-// Generated as internal constructor for term abi_vec_elt_rev.
-pub fn constructor_abi_vec_elt_rev<C: Context>(
-    ctx: &mut C,
-    arg0: &LaneOrder,
-    arg1: Type,
-    arg2: Reg,
-) -> Reg {
-    let v2 = C::gpr32_ty(ctx, arg1);
-    if let Some(v3) = v2 {
-        // Rule at src/isa/s390x/inst.isle line 2891.
-        return arg2;
-    }
-    let v5 = C::gpr64_ty(ctx, arg1);
-    if let Some(v6) = v5 {
-        // Rule at src/isa/s390x/inst.isle line 2892.
-        return arg2;
-    }
-    let v7 = C::ty_scalar_float(ctx, arg1);
-    if let Some(v8) = v7 {
-        // Rule at src/isa/s390x/inst.isle line 2893.
-        return arg2;
-    }
-    let v9 = &C::lane_order(ctx);
-    let v10 = constructor_lane_order_equal(ctx, arg0, v9);
-    match v10 {
-        true => {
-            // Rule at src/isa/s390x/inst.isle line 2894.
-            return arg2;
-        }
-        false => {
-            let v11 = C::vr128_ty(ctx, arg1);
-            if let Some(v12) = v11 {
-                let v13 = constructor_vec_elt_rev(ctx, v12, arg2);
-                // Rule at src/isa/s390x/inst.isle line 2897.
-                return v13;
-            }
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "abi_vec_elt_rev", "src/isa/s390x/inst.isle line 2890"
-    )
-}
-
-// Generated as internal constructor for term memcpy.
-pub fn constructor_memcpy<C: Context>(
-    ctx: &mut C,
-    arg0: &MemArg,
-    arg1: &MemArg,
-    arg2: u64,
-) -> SideEffectNoResult {
-    let v3 = C::len_minus_one(ctx, arg2);
-    if let Some(v4) = v3 {
-        let v5 = &constructor_memarg_pair(ctx, arg0);
-        let v6 = &constructor_memarg_pair(ctx, arg1);
-        let v7 = &constructor_mvc(ctx, v5, v6, v4);
-        // Rule at src/isa/s390x/inst.isle line 2903.
-        return v7.clone();
-    }
-    let v8 = constructor_load_addr(ctx, arg0);
-    let v9 = constructor_load_addr(ctx, arg1);
-    let v11 = constructor_imm(ctx, I64, arg2);
-    let v12 = &C::lib_call_info_memcpy(ctx, v8, v9, v11);
-    let v13 = C::lib_accumulate_outgoing_args_size(ctx, v12);
-    let v14 = &constructor_lib_call(ctx, v12);
-    // Rule at src/isa/s390x/inst.isle line 2905.
-    return v14.clone();
-}
-
-// Generated as internal constructor for term copy_to_buffer.
-pub fn constructor_copy_to_buffer<C: Context>(
-    ctx: &mut C,
-    arg0: i64,
-    arg1: &ABIArg,
-    arg2: Value,
-) -> InstOutput {
-    let v2 = &C::abi_arg_only_slot(ctx, arg1);
-    if let Some(v3) = v2 {
-        let v5 = C::output_none(ctx);
-        // Rule at src/isa/s390x/inst.isle line 2912.
-        return v5;
-    }
-    let v6 = C::abi_arg_struct_pointer(ctx, arg1);
-    if let Some(v7) = v6 {
-        let v11 = &C::memarg_stack_off(ctx, arg0, v7.1);
-        let v12 = C::put_in_reg(ctx, arg2);
-        let v15 = C::memflags_trusted(ctx);
-        let v16 = &C::memarg_reg_plus_off(ctx, v12, 0x0, 0x0, v15);
-        let v17 = &constructor_memcpy(ctx, v11, v16, v7.2);
-        let v18 = constructor_side_effect(ctx, v17);
-        // Rule at src/isa/s390x/inst.isle line 2913.
-        return v18;
-    }
-    let v19 = C::abi_arg_implicit_pointer(ctx, arg1);
-    if let Some(v20) = v19 {
-        let v24 = C::value_type(ctx, arg2);
-        if v20.2 == v24 {
-            let v25 = C::put_in_reg(ctx, arg2);
-            let v26 = &C::memarg_stack_off(ctx, arg0, v20.1);
-            let v27 = &constructor_arg_store(ctx, v20.2, v25, v26);
-            let v28 = constructor_side_effect(ctx, v27);
-            // Rule at src/isa/s390x/inst.isle line 2917.
-            return v28;
-        }
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "copy_to_buffer", "src/isa/s390x/inst.isle line 2911"
-    )
-}
-
-// Generated as internal constructor for term copy_to_arg.
-pub fn constructor_copy_to_arg<C: Context>(
-    ctx: &mut C,
-    arg0: &CallArgListBuilder,
-    arg1: &LaneOrder,
-    arg2: i64,
-    arg3: &ABIArg,
-    arg4: Value,
-) -> InstOutput {
-    let v4 = &C::abi_arg_only_slot(ctx, arg3);
-    if let Some(v5) = v4 {
-        let v7 = constructor_prepare_arg_val(ctx, v5, arg4);
-        let v8 = constructor_copy_reg_to_arg_slot(ctx, arg0, arg1, arg2, v5, v7);
-        // Rule at src/isa/s390x/inst.isle line 2924.
-        return v8;
-    }
-    let v9 = C::abi_arg_struct_pointer(ctx, arg3);
-    if let Some(v10) = v9 {
-        let v14 = &C::memarg_stack_off(ctx, arg2, v10.1);
-        let v15 = constructor_load_addr(ctx, v14);
-        let v16 = constructor_copy_reg_to_arg_slot(ctx, arg0, arg1, arg2, &v10.0, v15);
-        // Rule at src/isa/s390x/inst.isle line 2926.
-        return v16;
-    }
-    let v17 = C::abi_arg_implicit_pointer(ctx, arg3);
-    if let Some(v18) = v17 {
-        let v22 = &C::memarg_stack_off(ctx, arg2, v18.1);
-        let v23 = constructor_load_addr(ctx, v22);
-        let v24 = constructor_copy_reg_to_arg_slot(ctx, arg0, arg1, arg2, &v18.0, v23);
-        // Rule at src/isa/s390x/inst.isle line 2929.
-        return v24;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "copy_to_arg", "src/isa/s390x/inst.isle line 2923"
-    )
-}
-
-// Generated as internal constructor for term copy_from_arg.
-pub fn constructor_copy_from_arg<C: Context>(
-    ctx: &mut C,
-    arg0: &CallRetList,
-    arg1: &LaneOrder,
-    arg2: i64,
-    arg3: &ABIArg,
-) -> ValueRegs {
-    let v4 = &C::abi_arg_only_slot(ctx, arg3);
-    if let Some(v5) = v4 {
-        let v6 = constructor_copy_reg_from_arg_slot(ctx, arg0, arg1, arg2, v5);
-        let v7 = C::value_reg(ctx, v6);
-        // Rule at src/isa/s390x/inst.isle line 2935.
-        return v7;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "copy_from_arg", "src/isa/s390x/inst.isle line 2934"
-    )
-}
-
-// Generated as internal constructor for term prepare_arg_val.
-pub fn constructor_prepare_arg_val<C: Context>(ctx: &mut C, arg0: &ABIArgSlot, arg1: Value) -> Reg {
-    match arg0 {
-        &ABIArgSlot::Reg {
-            reg: v1,
-            ty: v2,
-            extension: ref v3,
-        } => {
-            match v3 {
-                &ArgumentExtension::None => {
-                    if v2 == R64 {
-                        let v6 = C::put_in_reg(ctx, arg1);
-                        let v7 = constructor_copy_reg(ctx, I64, v6);
-                        // Rule at src/isa/s390x/inst.isle line 2942.
-                        return v7;
-                    }
-                    let v6 = C::put_in_reg(ctx, arg1);
-                    // Rule at src/isa/s390x/inst.isle line 2944.
-                    return v6;
-                }
-                &ArgumentExtension::Uext => {
-                    let v8 = constructor_put_in_reg_zext64(ctx, arg1);
-                    // Rule at src/isa/s390x/inst.isle line 2946.
-                    return v8;
-                }
-                &ArgumentExtension::Sext => {
-                    let v9 = constructor_put_in_reg_sext64(ctx, arg1);
-                    // Rule at src/isa/s390x/inst.isle line 2948.
-                    return v9;
-                }
-                _ => {}
-            }
-        }
-        &ABIArgSlot::Stack {
-            offset: v10,
-            ty: v11,
-            extension: ref v12,
-        } => {
-            match v12 {
-                &ArgumentExtension::None => {
-                    let v6 = C::put_in_reg(ctx, arg1);
-                    // Rule at src/isa/s390x/inst.isle line 2950.
-                    return v6;
-                }
-                &ArgumentExtension::Uext => {
-                    let v8 = constructor_put_in_reg_zext64(ctx, arg1);
-                    // Rule at src/isa/s390x/inst.isle line 2952.
-                    return v8;
-                }
-                &ArgumentExtension::Sext => {
-                    let v9 = constructor_put_in_reg_sext64(ctx, arg1);
-                    // Rule at src/isa/s390x/inst.isle line 2954.
-                    return v9;
-                }
-                _ => {}
-            }
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "prepare_arg_val", "src/isa/s390x/inst.isle line 2941"
-    )
-}
-
-// Generated as internal constructor for term copy_reg_to_arg_slot.
-pub fn constructor_copy_reg_to_arg_slot<C: Context>(
-    ctx: &mut C,
-    arg0: &CallArgListBuilder,
-    arg1: &LaneOrder,
-    arg2: i64,
-    arg3: &ABIArgSlot,
-    arg4: Reg,
-) -> InstOutput {
-    match arg3 {
-        &ABIArgSlot::Reg {
-            reg: v4,
-            ty: v5,
-            extension: ref v6,
-        } => {
-            let v8 = constructor_abi_vec_elt_rev(ctx, arg1, v5, arg4);
-            let v9 = C::args_builder_push(ctx, arg0, v8, v4);
-            let v10 = C::output_none(ctx);
-            // Rule at src/isa/s390x/inst.isle line 2960.
-            return v10;
-        }
-        &ABIArgSlot::Stack {
-            offset: v11,
-            ty: v12,
-            extension: ref v13,
-        } => {
-            let v14 = constructor_abi_ext_ty(ctx, v13, v12);
-            let v15 = &C::memarg_stack_off(ctx, arg2, v11);
-            let v16 = &constructor_arg_store(ctx, v14, arg4, v15);
-            let v17 = constructor_side_effect(ctx, v16);
-            // Rule at src/isa/s390x/inst.isle line 2963.
-            return v17;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "copy_reg_to_arg_slot", "src/isa/s390x/inst.isle line 2959"
-    )
-}
-
-// Generated as internal constructor for term copy_reg_from_arg_slot.
-pub fn constructor_copy_reg_from_arg_slot<C: Context>(
-    ctx: &mut C,
-    arg0: &CallRetList,
-    arg1: &LaneOrder,
-    arg2: i64,
-    arg3: &ABIArgSlot,
-) -> Reg {
-    match arg3 {
-        &ABIArgSlot::Reg {
-            reg: v4,
-            ty: v5,
-            extension: ref v6,
-        } => {
-            let v7 = C::defs_lookup(ctx, arg0, v4);
-            let v8 = constructor_abi_vec_elt_rev(ctx, arg1, v5, v7);
-            // Rule at src/isa/s390x/inst.isle line 2968.
-            return v8;
-        }
-        &ABIArgSlot::Stack {
-            offset: v9,
-            ty: v10,
-            extension: ref v11,
-        } => {
-            let v12 = constructor_abi_ext_ty(ctx, v11, v10);
-            let v13 = &C::memarg_stack_off(ctx, arg2, v9);
-            let v14 = constructor_arg_load(ctx, v12, v13);
-            // Rule at src/isa/s390x/inst.isle line 2970.
-            return v14;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "copy_reg_from_arg_slot", "src/isa/s390x/inst.isle line 2967"
-    )
-}
-
-// Generated as internal constructor for term abi_ext_ty.
-pub fn constructor_abi_ext_ty<C: Context>(
-    ctx: &mut C,
-    arg0: &ArgumentExtension,
-    arg1: Type,
-) -> Type {
-    match arg0 {
-        &ArgumentExtension::Uext => {
-            let v2 = C::gpr32_ty(ctx, arg1);
-            if let Some(v3) = v2 {
-                // Rule at src/isa/s390x/inst.isle line 2976.
-                return I64;
-            }
-        }
-        &ArgumentExtension::Sext => {
-            let v2 = C::gpr32_ty(ctx, arg1);
-            if let Some(v3) = v2 {
-                // Rule at src/isa/s390x/inst.isle line 2977.
-                return I64;
-            }
-        }
-        _ => {}
-    }
-    // Rule at src/isa/s390x/inst.isle line 2975.
-    return arg1;
-}
-
-// Generated as internal constructor for term imm.
-pub fn constructor_imm<C: Context>(ctx: &mut C, arg0: Type, arg1: u64) -> Reg {
-    match arg0 {
-        F32 => {
-            let v45 = C::temp_writable_reg(ctx, F32);
-            let v17 = C::u64_truncate_to_u32(ctx, arg1);
-            let v46 = MInst::LoadFpuConst32 {
-                rd: v45,
-                const_data: v17,
-            };
-            let v47 = C::emit(ctx, &v46);
-            let v48 = C::writable_reg_to_reg(ctx, v45);
-            // Rule at src/isa/s390x/inst.isle line 3049.
-            return v48;
-        }
-        F64 => {
-            let v50 = C::temp_writable_reg(ctx, F64);
-            let v51 = MInst::LoadFpuConst64 {
-                rd: v50,
-                const_data: arg1,
-            };
-            let v52 = C::emit(ctx, &v51);
-            let v53 = C::writable_reg_to_reg(ctx, v50);
-            // Rule at src/isa/s390x/inst.isle line 3056.
-            return v53;
-        }
-        _ => {}
-    }
-    let v1 = C::fits_in_16(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v4 = C::temp_writable_reg(ctx, v2);
-        let v5 = C::u64_as_i16(ctx, arg1);
-        let v6 = MInst::Mov32SImm16 { rd: v4, imm: v5 };
-        let v7 = C::emit(ctx, &v6);
-        let v8 = C::writable_reg_to_reg(ctx, v4);
-        // Rule at src/isa/s390x/inst.isle line 2986.
-        return v8;
-    }
-    let v9 = C::gpr32_ty(ctx, arg0);
-    if let Some(v10) = v9 {
-        let v11 = C::i16_from_u64(ctx, arg1);
-        if let Some(v12) = v11 {
-            let v13 = C::temp_writable_reg(ctx, v10);
-            let v14 = MInst::Mov32SImm16 { rd: v13, imm: v12 };
-            let v15 = C::emit(ctx, &v14);
-            let v16 = C::writable_reg_to_reg(ctx, v13);
-            // Rule at src/isa/s390x/inst.isle line 2992.
-            return v16;
-        }
-        let v13 = C::temp_writable_reg(ctx, v10);
-        let v17 = C::u64_truncate_to_u32(ctx, arg1);
-        let v18 = MInst::Mov32Imm { rd: v13, imm: v17 };
-        let v19 = C::emit(ctx, &v18);
-        let v16 = C::writable_reg_to_reg(ctx, v13);
-        // Rule at src/isa/s390x/inst.isle line 2998.
-        return v16;
-    }
-    let v20 = C::gpr64_ty(ctx, arg0);
-    if let Some(v21) = v20 {
-        let v11 = C::i16_from_u64(ctx, arg1);
-        if let Some(v12) = v11 {
-            let v22 = C::temp_writable_reg(ctx, v21);
-            let v23 = MInst::Mov64SImm16 { rd: v22, imm: v12 };
-            let v24 = C::emit(ctx, &v23);
-            let v25 = C::writable_reg_to_reg(ctx, v22);
-            // Rule at src/isa/s390x/inst.isle line 3004.
-            return v25;
-        }
-        let v26 = C::i32_from_u64(ctx, arg1);
-        if let Some(v27) = v26 {
-            let v22 = C::temp_writable_reg(ctx, v21);
-            let v28 = MInst::Mov64SImm32 { rd: v22, imm: v27 };
-            let v29 = C::emit(ctx, &v28);
-            let v25 = C::writable_reg_to_reg(ctx, v22);
-            // Rule at src/isa/s390x/inst.isle line 3010.
-            return v25;
-        }
-        let v30 = C::uimm16shifted_from_u64(ctx, arg1);
-        if let Some(v31) = v30 {
-            let v22 = C::temp_writable_reg(ctx, v21);
-            let v32 = MInst::Mov64UImm16Shifted { rd: v22, imm: v31 };
-            let v33 = C::emit(ctx, &v32);
-            let v25 = C::writable_reg_to_reg(ctx, v22);
-            // Rule at src/isa/s390x/inst.isle line 3016.
-            return v25;
-        }
-        let v34 = C::uimm32shifted_from_u64(ctx, arg1);
-        if let Some(v35) = v34 {
-            let v22 = C::temp_writable_reg(ctx, v21);
-            let v36 = MInst::Mov64UImm32Shifted { rd: v22, imm: v35 };
-            let v37 = C::emit(ctx, &v36);
-            let v25 = C::writable_reg_to_reg(ctx, v22);
-            // Rule at src/isa/s390x/inst.isle line 3022.
-            return v25;
-        }
-        let v38 = C::u64_nonzero_hipart(ctx, arg1);
-        if let Some(v39) = v38 {
-            let v40 = C::u64_nonzero_lopart(ctx, arg1);
-            if let Some(v41) = v40 {
-                let v42 = constructor_imm(ctx, v21, v39);
-                let v43 = constructor_insert_imm(ctx, v21, v42, v41);
-                // Rule at src/isa/s390x/inst.isle line 3028.
-                return v43;
-            }
-        }
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "imm", "src/isa/s390x/inst.isle line 2983"
-    )
-}
-
-// Generated as internal constructor for term insert_imm.
-pub fn constructor_insert_imm<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: u64) -> Reg {
-    let v3 = C::uimm16shifted_from_u64(ctx, arg2);
-    if let Some(v4) = v3 {
-        let v5 = C::temp_writable_reg(ctx, arg0);
-        let v6 = MInst::Insert64UImm16Shifted {
-            rd: v5,
-            ri: arg1,
-            imm: v4,
-        };
-        let v7 = C::emit(ctx, &v6);
-        let v8 = C::writable_reg_to_reg(ctx, v5);
-        // Rule at src/isa/s390x/inst.isle line 3036.
-        return v8;
-    }
-    let v9 = C::uimm32shifted_from_u64(ctx, arg2);
-    if let Some(v10) = v9 {
-        let v5 = C::temp_writable_reg(ctx, arg0);
-        let v11 = MInst::Insert64UImm32Shifted {
-            rd: v5,
-            ri: arg1,
-            imm: v10,
-        };
-        let v12 = C::emit(ctx, &v11);
-        let v8 = C::writable_reg_to_reg(ctx, v5);
-        // Rule at src/isa/s390x/inst.isle line 3042.
-        return v8;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "insert_imm", "src/isa/s390x/inst.isle line 3033"
-    )
-}
-
-// Generated as internal constructor for term imm32.
-pub fn constructor_imm32<C: Context>(ctx: &mut C, arg0: Type, arg1: i32) -> Reg {
-    if arg0 == I64 {
-        let v3 = C::temp_writable_reg(ctx, I64);
-        let v4 = MInst::Mov64SImm32 { rd: v3, imm: arg1 };
-        let v5 = C::emit(ctx, &v4);
-        let v6 = C::writable_reg_to_reg(ctx, v3);
-        // Rule at src/isa/s390x/inst.isle line 3063.
-        return v6;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "imm32", "src/isa/s390x/inst.isle line 3062"
-    )
-}
-
-// Generated as internal constructor for term vec_imm.
-pub fn constructor_vec_imm<C: Context>(ctx: &mut C, arg0: Type, arg1: u128) -> Reg {
-    let v1 = C::vr128_ty(ctx, arg0);
-    if let Some(v2) = v1 {
-        if arg1 == 0x0 {
-            let v5 = constructor_vec_imm_byte_mask(ctx, v2, 0x0);
-            // Rule at src/isa/s390x/inst.isle line 3070.
-            return v5;
-        }
-        let v6 = C::u64_pair_split(ctx, arg1);
-        if v6.0 == v6.1 {
-            let v10 = constructor_vec_imm_splat(ctx, I64X2, v6.0);
-            // Rule at src/isa/s390x/inst.isle line 3072.
-            return v10;
-        }
-        let v11 = constructor_vec_load_const(ctx, v2, arg1);
-        // Rule at src/isa/s390x/inst.isle line 3074.
-        return v11;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_imm", "src/isa/s390x/inst.isle line 3069"
-    )
-}
-
-// Generated as internal constructor for term vec_imm_splat.
-pub fn constructor_vec_imm_splat<C: Context>(ctx: &mut C, arg0: Type, arg1: u64) -> Reg {
-    let v6 = C::multi_lane(ctx, arg0);
-    if let Some(v7) = v6 {
-        match v7.0 {
-            0x8 => {
-                let v10 = C::u64_as_i16(ctx, arg1);
-                let v11 = constructor_vec_imm_replicate(ctx, arg0, v10);
-                // Rule at src/isa/s390x/inst.isle line 3081.
-                return v11;
-            }
-            0x10 => {
-                let v12 = C::u32_pair_split(ctx, arg1);
-                let v21 = C::u16_pair_split(ctx, v12.1);
-                let v24 = C::u8_pair_split(ctx, v21.1);
-                if v24.0 == v24.1 {
-                    let v28 = C::u8_as_u64(ctx, v24.0);
-                    let v29 = constructor_vec_imm_splat(ctx, I8X16, v28);
-                    // Rule at src/isa/s390x/inst.isle line 3089.
-                    return v29;
-                }
-                let v10 = C::u64_as_i16(ctx, arg1);
-                let v11 = constructor_vec_imm_replicate(ctx, arg0, v10);
-                // Rule at src/isa/s390x/inst.isle line 3083.
-                return v11;
-            }
-            0x20 => {
-                let v12 = C::u32_pair_split(ctx, arg1);
-                let v21 = C::u16_pair_split(ctx, v12.1);
-                if v21.0 == v21.1 {
-                    let v31 = C::u16_as_u64(ctx, v21.0);
-                    let v32 = constructor_vec_imm_splat(ctx, I16X8, v31);
-                    // Rule at src/isa/s390x/inst.isle line 3091.
-                    return v32;
-                }
-                let v15 = C::i16_from_u32(ctx, v12.1);
-                if let Some(v16) = v15 {
-                    let v17 = constructor_vec_imm_replicate(ctx, arg0, v16);
-                    // Rule at src/isa/s390x/inst.isle line 3085.
-                    return v17;
-                }
-            }
-            0x40 => {
-                let v12 = C::u32_pair_split(ctx, arg1);
-                if v12.0 == v12.1 {
-                    let v34 = C::u32_as_u64(ctx, v12.0);
-                    let v35 = constructor_vec_imm_splat(ctx, I32X4, v34);
-                    // Rule at src/isa/s390x/inst.isle line 3093.
-                    return v35;
-                }
-                let v18 = C::i16_from_u64(ctx, arg1);
-                if let Some(v19) = v18 {
-                    let v20 = constructor_vec_imm_replicate(ctx, arg0, v19);
-                    // Rule at src/isa/s390x/inst.isle line 3087.
-                    return v20;
-                }
-            }
-            _ => {}
-        }
-    }
-    let v1 = C::ty_vec128(ctx, arg0);
-    if let Some(v2) = v1 {
-        if arg1 == 0x0 {
-            let v5 = constructor_vec_imm_byte_mask(ctx, v2, 0x0);
-            // Rule at src/isa/s390x/inst.isle line 3079.
-            return v5;
-        }
-        let v36 = constructor_vec_load_const_replicate(ctx, v2, arg1);
-        // Rule at src/isa/s390x/inst.isle line 3095.
-        return v36;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_imm_splat", "src/isa/s390x/inst.isle line 3078"
-    )
-}
-
-// Generated as internal constructor for term ty_ext32.
-pub fn constructor_ty_ext32<C: Context>(ctx: &mut C, arg0: Type) -> Type {
-    match arg0 {
-        I8 => {
-            // Rule at src/isa/s390x/inst.isle line 3103.
-            return I32;
-        }
-        I16 => {
-            // Rule at src/isa/s390x/inst.isle line 3104.
-            return I32;
-        }
-        I32 => {
-            // Rule at src/isa/s390x/inst.isle line 3105.
-            return I32;
-        }
-        I64 => {
-            // Rule at src/isa/s390x/inst.isle line 3106.
-            return I64;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "ty_ext32", "src/isa/s390x/inst.isle line 3102"
-    )
-}
-
-// Generated as internal constructor for term ty_ext64.
-pub fn constructor_ty_ext64<C: Context>(ctx: &mut C, arg0: Type) -> Type {
-    match arg0 {
-        I8 => {
-            // Rule at src/isa/s390x/inst.isle line 3110.
-            return I64;
-        }
-        I16 => {
-            // Rule at src/isa/s390x/inst.isle line 3111.
-            return I64;
-        }
-        I32 => {
-            // Rule at src/isa/s390x/inst.isle line 3112.
-            return I64;
-        }
-        I64 => {
-            // Rule at src/isa/s390x/inst.isle line 3113.
-            return I64;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "ty_ext64", "src/isa/s390x/inst.isle line 3109"
-    )
-}
-
-// Generated as internal constructor for term zext32_reg.
-pub fn constructor_zext32_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
-    let v3 = C::temp_writable_reg(ctx, I32);
-    let v5 = C::ty_bits(ctx, arg0);
-    let v7 = MInst::Extend {
-        rd: v3,
-        rn: arg1,
-        signed: false,
-        from_bits: v5,
-        to_bits: 0x20,
-    };
-    let v8 = C::emit(ctx, &v7);
-    let v9 = C::writable_reg_to_reg(ctx, v3);
-    // Rule at src/isa/s390x/inst.isle line 3118.
-    return v9;
-}
-
-// Generated as internal constructor for term sext32_reg.
-pub fn constructor_sext32_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
-    let v3 = C::temp_writable_reg(ctx, I32);
-    let v5 = C::ty_bits(ctx, arg0);
-    let v7 = MInst::Extend {
-        rd: v3,
-        rn: arg1,
-        signed: true,
-        from_bits: v5,
-        to_bits: 0x20,
-    };
-    let v8 = C::emit(ctx, &v7);
-    let v9 = C::writable_reg_to_reg(ctx, v3);
-    // Rule at src/isa/s390x/inst.isle line 3125.
-    return v9;
-}
-
-// Generated as internal constructor for term zext64_reg.
-pub fn constructor_zext64_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
-    let v3 = C::temp_writable_reg(ctx, I64);
-    let v5 = C::ty_bits(ctx, arg0);
-    let v7 = MInst::Extend {
-        rd: v3,
-        rn: arg1,
-        signed: false,
-        from_bits: v5,
-        to_bits: 0x40,
-    };
-    let v8 = C::emit(ctx, &v7);
-    let v9 = C::writable_reg_to_reg(ctx, v3);
-    // Rule at src/isa/s390x/inst.isle line 3132.
-    return v9;
-}
-
-// Generated as internal constructor for term sext64_reg.
-pub fn constructor_sext64_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
-    let v3 = C::temp_writable_reg(ctx, I64);
-    let v5 = C::ty_bits(ctx, arg0);
-    let v7 = MInst::Extend {
-        rd: v3,
-        rn: arg1,
-        signed: true,
-        from_bits: v5,
-        to_bits: 0x40,
-    };
-    let v8 = C::emit(ctx, &v7);
-    let v9 = C::writable_reg_to_reg(ctx, v3);
-    // Rule at src/isa/s390x/inst.isle line 3139.
-    return v9;
-}
-
-// Generated as internal constructor for term zext32_mem.
-pub fn constructor_zext32_mem<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Reg {
-    match arg0 {
-        I8 => {
-            let v3 = C::temp_writable_reg(ctx, I32);
-            let v4 = MInst::Load32ZExt8 {
-                rd: v3,
-                mem: arg1.clone(),
-            };
-            let v5 = C::emit(ctx, &v4);
-            let v6 = C::writable_reg_to_reg(ctx, v3);
-            // Rule at src/isa/s390x/inst.isle line 3147.
-            return v6;
-        }
-        I16 => {
-            let v3 = C::temp_writable_reg(ctx, I32);
-            let v7 = MInst::Load32ZExt16 {
-                rd: v3,
-                mem: arg1.clone(),
-            };
-            let v8 = C::emit(ctx, &v7);
-            let v6 = C::writable_reg_to_reg(ctx, v3);
-            // Rule at src/isa/s390x/inst.isle line 3151.
-            return v6;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "zext32_mem", "src/isa/s390x/inst.isle line 3146"
-    )
-}
-
-// Generated as internal constructor for term sext32_mem.
-pub fn constructor_sext32_mem<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Reg {
-    match arg0 {
-        I8 => {
-            let v3 = C::temp_writable_reg(ctx, I32);
-            let v4 = MInst::Load32SExt8 {
-                rd: v3,
-                mem: arg1.clone(),
-            };
-            let v5 = C::emit(ctx, &v4);
-            let v6 = C::writable_reg_to_reg(ctx, v3);
-            // Rule at src/isa/s390x/inst.isle line 3158.
-            return v6;
-        }
-        I16 => {
-            let v3 = C::temp_writable_reg(ctx, I32);
-            let v7 = MInst::Load32SExt16 {
-                rd: v3,
-                mem: arg1.clone(),
-            };
-            let v8 = C::emit(ctx, &v7);
-            let v6 = C::writable_reg_to_reg(ctx, v3);
-            // Rule at src/isa/s390x/inst.isle line 3162.
-            return v6;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "sext32_mem", "src/isa/s390x/inst.isle line 3157"
-    )
-}
-
-// Generated as internal constructor for term zext64_mem.
-pub fn constructor_zext64_mem<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Reg {
-    match arg0 {
-        I8 => {
-            let v3 = C::temp_writable_reg(ctx, I64);
-            let v4 = MInst::Load64ZExt8 {
-                rd: v3,
-                mem: arg1.clone(),
-            };
-            let v5 = C::emit(ctx, &v4);
-            let v6 = C::writable_reg_to_reg(ctx, v3);
-            // Rule at src/isa/s390x/inst.isle line 3169.
-            return v6;
-        }
-        I16 => {
-            let v3 = C::temp_writable_reg(ctx, I64);
-            let v7 = MInst::Load64ZExt16 {
-                rd: v3,
-                mem: arg1.clone(),
-            };
-            let v8 = C::emit(ctx, &v7);
-            let v6 = C::writable_reg_to_reg(ctx, v3);
-            // Rule at src/isa/s390x/inst.isle line 3173.
-            return v6;
-        }
-        I32 => {
-            let v3 = C::temp_writable_reg(ctx, I64);
-            let v9 = MInst::Load64ZExt32 {
-                rd: v3,
-                mem: arg1.clone(),
-            };
-            let v10 = C::emit(ctx, &v9);
-            let v6 = C::writable_reg_to_reg(ctx, v3);
-            // Rule at src/isa/s390x/inst.isle line 3177.
-            return v6;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "zext64_mem", "src/isa/s390x/inst.isle line 3168"
-    )
-}
-
-// Generated as internal constructor for term sext64_mem.
-pub fn constructor_sext64_mem<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Reg {
-    match arg0 {
-        I8 => {
-            let v3 = C::temp_writable_reg(ctx, I64);
-            let v4 = MInst::Load64SExt8 {
-                rd: v3,
-                mem: arg1.clone(),
-            };
-            let v5 = C::emit(ctx, &v4);
-            let v6 = C::writable_reg_to_reg(ctx, v3);
-            // Rule at src/isa/s390x/inst.isle line 3184.
-            return v6;
-        }
-        I16 => {
-            let v3 = C::temp_writable_reg(ctx, I64);
-            let v7 = MInst::Load64SExt16 {
-                rd: v3,
-                mem: arg1.clone(),
-            };
-            let v8 = C::emit(ctx, &v7);
-            let v6 = C::writable_reg_to_reg(ctx, v3);
-            // Rule at src/isa/s390x/inst.isle line 3188.
-            return v6;
-        }
-        I32 => {
-            let v3 = C::temp_writable_reg(ctx, I64);
-            let v9 = MInst::Load64SExt32 {
-                rd: v3,
-                mem: arg1.clone(),
-            };
-            let v10 = C::emit(ctx, &v9);
-            let v6 = C::writable_reg_to_reg(ctx, v3);
-            // Rule at src/isa/s390x/inst.isle line 3192.
-            return v6;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "sext64_mem", "src/isa/s390x/inst.isle line 3183"
-    )
-}
-
-// Generated as internal constructor for term put_in_reg_zext32.
-pub fn constructor_put_in_reg_zext32<C: Context>(ctx: &mut C, arg0: Value) -> Reg {
-    let v2 = C::u64_from_value(ctx, arg0);
-    if let Some(v3) = v2 {
-        let v1 = C::value_type(ctx, arg0);
-        let v4 = constructor_ty_ext32(ctx, v1);
-        let v5 = constructor_imm(ctx, v4, v3);
-        // Rule at src/isa/s390x/inst.isle line 3200.
-        return v5;
-    }
-    let v1 = C::value_type(ctx, arg0);
-    let v21 = C::ty_32_or_64(ctx, v1);
-    if let Some(v22) = v21 {
-        let v19 = C::put_in_reg(ctx, arg0);
-        // Rule at src/isa/s390x/inst.isle line 3206.
-        return v19;
-    }
-    let v6 = C::fits_in_16(ctx, v1);
-    if let Some(v7) = v6 {
-        let v8 = C::sinkable_inst(ctx, arg0);
-        if let Some(v9) = v8 {
-            let v10 = &C::inst_data(ctx, v9);
-            if let &InstructionData::Load {
-                opcode: ref v11,
-                arg: v12,
-                flags: v13,
-                offset: v14,
-            } = v10
-            {
-                if let &Opcode::Load = v11 {
-                    let v15 = C::bigendian(ctx, v13);
-                    if let Some(v16) = v15 {
-                        let v17 = &constructor_sink_load(ctx, v9);
-                        let v18 = constructor_zext32_mem(ctx, v7, v17);
-                        // Rule at src/isa/s390x/inst.isle line 3202.
-                        return v18;
-                    }
-                }
-            }
-        }
-        let v19 = C::put_in_reg(ctx, arg0);
-        let v20 = constructor_zext32_reg(ctx, v7, v19);
-        // Rule at src/isa/s390x/inst.isle line 3204.
-        return v20;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "put_in_reg_zext32", "src/isa/s390x/inst.isle line 3199"
-    )
-}
-
-// Generated as internal constructor for term put_in_reg_sext32.
-pub fn constructor_put_in_reg_sext32<C: Context>(ctx: &mut C, arg0: Value) -> Reg {
-    let v2 = C::u64_from_signed_value(ctx, arg0);
-    if let Some(v3) = v2 {
-        let v1 = C::value_type(ctx, arg0);
-        let v4 = constructor_ty_ext32(ctx, v1);
-        let v5 = constructor_imm(ctx, v4, v3);
-        // Rule at src/isa/s390x/inst.isle line 3211.
-        return v5;
-    }
-    let v1 = C::value_type(ctx, arg0);
-    let v21 = C::ty_32_or_64(ctx, v1);
-    if let Some(v22) = v21 {
-        let v19 = C::put_in_reg(ctx, arg0);
-        // Rule at src/isa/s390x/inst.isle line 3217.
-        return v19;
-    }
-    let v6 = C::fits_in_16(ctx, v1);
-    if let Some(v7) = v6 {
-        let v8 = C::sinkable_inst(ctx, arg0);
-        if let Some(v9) = v8 {
-            let v10 = &C::inst_data(ctx, v9);
-            if let &InstructionData::Load {
-                opcode: ref v11,
-                arg: v12,
-                flags: v13,
-                offset: v14,
-            } = v10
-            {
-                if let &Opcode::Load = v11 {
-                    let v15 = C::bigendian(ctx, v13);
-                    if let Some(v16) = v15 {
-                        let v17 = &constructor_sink_load(ctx, v9);
-                        let v18 = constructor_sext32_mem(ctx, v7, v17);
-                        // Rule at src/isa/s390x/inst.isle line 3213.
-                        return v18;
-                    }
-                }
-            }
-        }
-        let v19 = C::put_in_reg(ctx, arg0);
-        let v20 = constructor_sext32_reg(ctx, v7, v19);
-        // Rule at src/isa/s390x/inst.isle line 3215.
-        return v20;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "put_in_reg_sext32", "src/isa/s390x/inst.isle line 3210"
-    )
-}
-
-// Generated as internal constructor for term put_in_reg_zext64.
-pub fn constructor_put_in_reg_zext64<C: Context>(ctx: &mut C, arg0: Value) -> Reg {
-    let v2 = C::u64_from_value(ctx, arg0);
-    if let Some(v3) = v2 {
-        let v1 = C::value_type(ctx, arg0);
-        let v4 = constructor_ty_ext64(ctx, v1);
-        let v5 = constructor_imm(ctx, v4, v3);
-        // Rule at src/isa/s390x/inst.isle line 3222.
-        return v5;
-    }
-    let v1 = C::value_type(ctx, arg0);
-    let v21 = C::gpr64_ty(ctx, v1);
-    if let Some(v22) = v21 {
-        let v19 = C::put_in_reg(ctx, arg0);
-        // Rule at src/isa/s390x/inst.isle line 3228.
-        return v19;
-    }
-    let v6 = C::gpr32_ty(ctx, v1);
-    if let Some(v7) = v6 {
-        let v8 = C::sinkable_inst(ctx, arg0);
-        if let Some(v9) = v8 {
-            let v10 = &C::inst_data(ctx, v9);
-            if let &InstructionData::Load {
-                opcode: ref v11,
-                arg: v12,
-                flags: v13,
-                offset: v14,
-            } = v10
-            {
-                if let &Opcode::Load = v11 {
-                    let v15 = C::bigendian(ctx, v13);
-                    if let Some(v16) = v15 {
-                        let v17 = &constructor_sink_load(ctx, v9);
-                        let v18 = constructor_zext64_mem(ctx, v7, v17);
-                        // Rule at src/isa/s390x/inst.isle line 3224.
-                        return v18;
-                    }
-                }
-            }
-        }
-        let v19 = C::put_in_reg(ctx, arg0);
-        let v20 = constructor_zext64_reg(ctx, v7, v19);
-        // Rule at src/isa/s390x/inst.isle line 3226.
-        return v20;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "put_in_reg_zext64", "src/isa/s390x/inst.isle line 3221"
-    )
-}
-
-// Generated as internal constructor for term put_in_reg_sext64.
-pub fn constructor_put_in_reg_sext64<C: Context>(ctx: &mut C, arg0: Value) -> Reg {
-    let v2 = C::u64_from_signed_value(ctx, arg0);
-    if let Some(v3) = v2 {
-        let v1 = C::value_type(ctx, arg0);
-        let v4 = constructor_ty_ext64(ctx, v1);
-        let v5 = constructor_imm(ctx, v4, v3);
-        // Rule at src/isa/s390x/inst.isle line 3233.
-        return v5;
-    }
-    let v1 = C::value_type(ctx, arg0);
-    let v21 = C::gpr64_ty(ctx, v1);
-    if let Some(v22) = v21 {
-        let v19 = C::put_in_reg(ctx, arg0);
-        // Rule at src/isa/s390x/inst.isle line 3239.
-        return v19;
-    }
-    let v6 = C::gpr32_ty(ctx, v1);
-    if let Some(v7) = v6 {
-        let v8 = C::sinkable_inst(ctx, arg0);
-        if let Some(v9) = v8 {
-            let v10 = &C::inst_data(ctx, v9);
-            if let &InstructionData::Load {
-                opcode: ref v11,
-                arg: v12,
-                flags: v13,
-                offset: v14,
-            } = v10
-            {
-                if let &Opcode::Load = v11 {
-                    let v15 = C::bigendian(ctx, v13);
-                    if let Some(v16) = v15 {
-                        let v17 = &constructor_sink_load(ctx, v9);
-                        let v18 = constructor_sext64_mem(ctx, v7, v17);
-                        // Rule at src/isa/s390x/inst.isle line 3235.
-                        return v18;
-                    }
-                }
-            }
-        }
-        let v19 = C::put_in_reg(ctx, arg0);
-        let v20 = constructor_sext64_reg(ctx, v7, v19);
-        // Rule at src/isa/s390x/inst.isle line 3237.
-        return v20;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "put_in_reg_sext64", "src/isa/s390x/inst.isle line 3232"
-    )
-}
-
-// Generated as internal constructor for term cmov_imm.
-pub fn constructor_cmov_imm<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &Cond,
-    arg2: i16,
-    arg3: Reg,
-) -> ConsumesFlags {
-    let v10 = C::gpr64_ty(ctx, arg0);
-    if let Some(v11) = v10 {
-        let v12 = C::temp_writable_reg(ctx, v11);
-        let v13 = MInst::CMov64SImm16 {
-            rd: v12,
-            cond: arg1.clone(),
-            ri: arg3,
-            imm: arg2,
-        };
-        let v14 = C::writable_reg_to_reg(ctx, v12);
-        let v15 = ConsumesFlags::ConsumesFlagsReturnsReg {
-            inst: v13,
-            result: v14,
-        };
-        // Rule at src/isa/s390x/inst.isle line 3251.
-        return v15;
-    }
-    let v1 = C::gpr32_ty(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v6 = C::temp_writable_reg(ctx, v2);
-        let v7 = MInst::CMov32SImm16 {
-            rd: v6,
-            cond: arg1.clone(),
-            ri: arg3,
-            imm: arg2,
-        };
-        let v8 = C::writable_reg_to_reg(ctx, v6);
-        let v9 = ConsumesFlags::ConsumesFlagsReturnsReg {
-            inst: v7,
-            result: v8,
-        };
-        // Rule at src/isa/s390x/inst.isle line 3247.
-        return v9;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "cmov_imm", "src/isa/s390x/inst.isle line 3246"
-    )
-}
-
-// Generated as internal constructor for term cmov_imm_imm.
-pub fn constructor_cmov_imm_imm<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &Cond,
-    arg2: i16,
-    arg3: i16,
-) -> ConsumesFlags {
-    let v14 = C::gpr64_ty(ctx, arg0);
-    if let Some(v15) = v14 {
-        let v16 = C::temp_writable_reg(ctx, v15);
-        let v17 = C::temp_writable_reg(ctx, v15);
-        let v21 = C::writable_reg_to_reg(ctx, v17);
-        let v22 = C::value_reg(ctx, v21);
-        let v18 = MInst::Mov64SImm16 { rd: v16, imm: arg3 };
-        let v19 = C::writable_reg_to_reg(ctx, v16);
-        let v20 = MInst::CMov64SImm16 {
-            rd: v17,
-            cond: arg1.clone(),
-            ri: v19,
-            imm: arg2,
-        };
-        let v23 = ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
-            inst1: v18,
-            inst2: v20,
-            result: v22,
-        };
-        // Rule at src/isa/s390x/inst.isle line 3265.
-        return v23;
-    }
-    let v1 = C::gpr32_ty(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v6 = C::temp_writable_reg(ctx, v2);
-        let v7 = C::temp_writable_reg(ctx, v2);
-        let v11 = C::writable_reg_to_reg(ctx, v7);
-        let v12 = C::value_reg(ctx, v11);
-        let v8 = MInst::Mov32SImm16 { rd: v6, imm: arg3 };
-        let v9 = C::writable_reg_to_reg(ctx, v6);
-        let v10 = MInst::CMov32SImm16 {
-            rd: v7,
-            cond: arg1.clone(),
-            ri: v9,
-            imm: arg2,
-        };
-        let v13 = ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
-            inst1: v8,
-            inst2: v10,
-            result: v12,
-        };
-        // Rule at src/isa/s390x/inst.isle line 3258.
-        return v13;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "cmov_imm_imm", "src/isa/s390x/inst.isle line 3257"
-    )
-}
-
-// Generated as internal constructor for term cmov_reg_reg.
-pub fn constructor_cmov_reg_reg<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &Cond,
-    arg2: Reg,
-    arg3: Reg,
-) -> ConsumesFlags {
-    match arg0 {
-        F32 => {
-            let v17 = C::temp_writable_reg(ctx, F32);
-            let v18 = MInst::FpuCMov32 {
-                rd: v17,
-                cond: arg1.clone(),
-                ri: arg3,
-                rm: arg2,
-            };
-            let v19 = C::writable_reg_to_reg(ctx, v17);
-            let v20 = ConsumesFlags::ConsumesFlagsReturnsReg {
-                inst: v18,
-                result: v19,
-            };
-            // Rule at src/isa/s390x/inst.isle line 3283.
-            return v20;
-        }
-        F64 => {
-            let v22 = C::temp_writable_reg(ctx, F64);
-            let v23 = MInst::FpuCMov64 {
-                rd: v22,
-                cond: arg1.clone(),
-                ri: arg3,
-                rm: arg2,
-            };
-            let v24 = C::writable_reg_to_reg(ctx, v22);
-            let v25 = ConsumesFlags::ConsumesFlagsReturnsReg {
-                inst: v23,
-                result: v24,
-            };
-            // Rule at src/isa/s390x/inst.isle line 3287.
-            return v25;
-        }
-        _ => {}
-    }
-    let v10 = C::gpr64_ty(ctx, arg0);
-    if let Some(v11) = v10 {
-        let v12 = C::temp_writable_reg(ctx, v11);
-        let v13 = MInst::CMov64 {
-            rd: v12,
-            cond: arg1.clone(),
-            ri: arg3,
-            rm: arg2,
-        };
-        let v14 = C::writable_reg_to_reg(ctx, v12);
-        let v15 = ConsumesFlags::ConsumesFlagsReturnsReg {
-            inst: v13,
-            result: v14,
-        };
-        // Rule at src/isa/s390x/inst.isle line 3279.
-        return v15;
-    }
-    let v1 = C::gpr32_ty(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v6 = C::temp_writable_reg(ctx, v2);
-        let v7 = MInst::CMov32 {
-            rd: v6,
-            cond: arg1.clone(),
-            ri: arg3,
-            rm: arg2,
-        };
-        let v8 = C::writable_reg_to_reg(ctx, v6);
-        let v9 = ConsumesFlags::ConsumesFlagsReturnsReg {
-            inst: v7,
-            result: v8,
-        };
-        // Rule at src/isa/s390x/inst.isle line 3275.
-        return v9;
-    }
-    let v26 = C::vr128_ty(ctx, arg0);
-    if let Some(v27) = v26 {
-        let v22 = C::temp_writable_reg(ctx, F64);
-        let v28 = MInst::VecCMov {
-            rd: v22,
-            cond: arg1.clone(),
-            ri: arg3,
-            rm: arg2,
-        };
-        let v24 = C::writable_reg_to_reg(ctx, v22);
-        let v29 = ConsumesFlags::ConsumesFlagsReturnsReg {
-            inst: v28,
-            result: v24,
-        };
-        // Rule at src/isa/s390x/inst.isle line 3291.
-        return v29;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "cmov_reg_reg", "src/isa/s390x/inst.isle line 3274"
-    )
-}
-
-// Generated as internal constructor for term trap_if.
-pub fn constructor_trap_if<C: Context>(
-    ctx: &mut C,
-    arg0: &ProducesFlags,
-    arg1: &Cond,
-    arg2: &TrapCode,
-) -> Reg {
-    let v3 = &constructor_trap_if_impl(ctx, arg1, arg2);
-    let v4 = &constructor_with_flags_side_effect(ctx, arg0, v3);
-    let v5 = constructor_side_effect(ctx, v4);
-    let v6 = C::invalid_reg(ctx);
-    // Rule at src/isa/s390x/inst.isle line 3300.
-    return v6;
-}
-
-// Generated as internal constructor for term icmps_reg_and_trap.
-pub fn constructor_icmps_reg_and_trap<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: Reg,
-    arg3: &Cond,
-    arg4: &TrapCode,
-) -> Reg {
-    let v5 = &constructor_cmpop_cmps(ctx, arg0);
-    let v6 = MInst::CmpTrapRR {
-        op: v5.clone(),
-        rn: arg1,
-        rm: arg2,
-        cond: arg3.clone(),
-        trap_code: arg4.clone(),
-    };
-    let v7 = C::emit(ctx, &v6);
-    let v8 = C::invalid_reg(ctx);
-    // Rule at src/isa/s390x/inst.isle line 3306.
-    return v8;
-}
-
-// Generated as internal constructor for term icmps_simm16_and_trap.
-pub fn constructor_icmps_simm16_and_trap<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: i16,
-    arg3: &Cond,
-    arg4: &TrapCode,
-) -> Reg {
-    let v5 = &constructor_cmpop_cmps(ctx, arg0);
-    let v6 = MInst::CmpTrapRSImm16 {
-        op: v5.clone(),
-        rn: arg1,
-        imm: arg2,
-        cond: arg3.clone(),
-        trap_code: arg4.clone(),
-    };
-    let v7 = C::emit(ctx, &v6);
-    let v8 = C::invalid_reg(ctx);
-    // Rule at src/isa/s390x/inst.isle line 3312.
-    return v8;
-}
-
-// Generated as internal constructor for term icmpu_reg_and_trap.
-pub fn constructor_icmpu_reg_and_trap<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: Reg,
-    arg3: &Cond,
-    arg4: &TrapCode,
-) -> Reg {
-    let v5 = &constructor_cmpop_cmpu(ctx, arg0);
-    let v6 = MInst::CmpTrapRR {
-        op: v5.clone(),
-        rn: arg1,
-        rm: arg2,
-        cond: arg3.clone(),
-        trap_code: arg4.clone(),
-    };
-    let v7 = C::emit(ctx, &v6);
-    let v8 = C::invalid_reg(ctx);
-    // Rule at src/isa/s390x/inst.isle line 3318.
-    return v8;
-}
-
-// Generated as internal constructor for term icmpu_uimm16_and_trap.
-pub fn constructor_icmpu_uimm16_and_trap<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: u16,
-    arg3: &Cond,
-    arg4: &TrapCode,
-) -> Reg {
-    let v5 = &constructor_cmpop_cmpu(ctx, arg0);
-    let v6 = MInst::CmpTrapRUImm16 {
-        op: v5.clone(),
-        rn: arg1,
-        imm: arg2,
-        cond: arg3.clone(),
-        trap_code: arg4.clone(),
-    };
-    let v7 = C::emit(ctx, &v6);
-    let v8 = C::invalid_reg(ctx);
-    // Rule at src/isa/s390x/inst.isle line 3324.
-    return v8;
-}
-
-// Generated as internal constructor for term trap_impl.
-pub fn constructor_trap_impl<C: Context>(ctx: &mut C, arg0: &TrapCode) -> SideEffectNoResult {
-    let v1 = MInst::Trap {
-        trap_code: arg0.clone(),
-    };
-    let v2 = SideEffectNoResult::Inst { inst: v1 };
-    // Rule at src/isa/s390x/inst.isle line 3330.
-    return v2;
-}
-
-// Generated as internal constructor for term trap_if_impl.
-pub fn constructor_trap_if_impl<C: Context>(
-    ctx: &mut C,
-    arg0: &Cond,
-    arg1: &TrapCode,
-) -> ConsumesFlags {
-    let v2 = MInst::TrapIf {
-        cond: arg0.clone(),
-        trap_code: arg1.clone(),
-    };
-    let v3 = ConsumesFlags::ConsumesFlagsSideEffect { inst: v2 };
-    // Rule at src/isa/s390x/inst.isle line 3334.
-    return v3;
-}
-
-// Generated as internal constructor for term debugtrap_impl.
-pub fn constructor_debugtrap_impl<C: Context>(ctx: &mut C) -> SideEffectNoResult {
-    let v1 = SideEffectNoResult::Inst {
-        inst: MInst::Debugtrap,
-    };
-    // Rule at src/isa/s390x/inst.isle line 3338.
-    return v1;
-}
-
-// Generated as internal constructor for term bool.
-pub fn constructor_bool<C: Context>(
-    ctx: &mut C,
-    arg0: &ProducesFlags,
-    arg1: &Cond,
-) -> ProducesBool {
-    let v2 = ProducesBool::ProducesBool {
-        producer: arg0.clone(),
-        cond: arg1.clone(),
-    };
-    // Rule at src/isa/s390x/inst.isle line 3349.
-    return v2;
-}
-
-// Generated as internal constructor for term invert_bool.
-pub fn constructor_invert_bool<C: Context>(ctx: &mut C, arg0: &ProducesBool) -> ProducesBool {
-    if let &ProducesBool::ProducesBool {
-        producer: ref v1,
-        cond: ref v2,
-    } = arg0
-    {
-        let v3 = &C::invert_cond(ctx, v2);
-        let v4 = &constructor_bool(ctx, v1, v3);
-        // Rule at src/isa/s390x/inst.isle line 3353.
-        return v4.clone();
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "invert_bool", "src/isa/s390x/inst.isle line 3352"
-    )
-}
-
-// Generated as internal constructor for term select_bool_reg.
-pub fn constructor_select_bool_reg<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &ProducesBool,
-    arg2: Reg,
-    arg3: Reg,
-) -> Reg {
-    if let &ProducesBool::ProducesBool {
-        producer: ref v2,
-        cond: ref v3,
-    } = arg1
-    {
-        let v6 = &constructor_cmov_reg_reg(ctx, arg0, v3, arg2, arg3);
-        let v7 = constructor_with_flags_reg(ctx, v2, v6);
-        // Rule at src/isa/s390x/inst.isle line 3358.
-        return v7;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "select_bool_reg", "src/isa/s390x/inst.isle line 3357"
-    )
-}
-
-// Generated as internal constructor for term select_bool_imm.
-pub fn constructor_select_bool_imm<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &ProducesBool,
-    arg2: i16,
-    arg3: i16,
-) -> Reg {
-    if let &ProducesBool::ProducesBool {
-        producer: ref v2,
-        cond: ref v3,
-    } = arg1
-    {
-        let v6 = &constructor_cmov_imm_imm(ctx, arg0, v3, arg2, arg3);
-        let v7 = constructor_with_flags_reg(ctx, v2, v6);
-        // Rule at src/isa/s390x/inst.isle line 3363.
-        return v7;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "select_bool_imm", "src/isa/s390x/inst.isle line 3362"
-    )
-}
-
-// Generated as internal constructor for term lower_bool.
-pub fn constructor_lower_bool<C: Context>(ctx: &mut C, arg0: Type, arg1: &ProducesBool) -> Reg {
-    if arg0 == I8 {
-        let v5 = constructor_select_bool_imm(ctx, I8, arg1, 0x1, 0x0);
-        // Rule at src/isa/s390x/inst.isle line 3369.
-        return v5;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "lower_bool", "src/isa/s390x/inst.isle line 3368"
-    )
-}
-
-// Generated as internal constructor for term lower_bool_to_mask.
-pub fn constructor_lower_bool_to_mask<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &ProducesBool,
-) -> Reg {
-    if arg0 == I128 {
-        let v8 = constructor_lower_bool_to_mask(ctx, I64, arg1);
-        let v10 = constructor_mov_to_vec128(ctx, I128, v8, v8);
-        // Rule at src/isa/s390x/inst.isle line 3376.
-        return v10;
-    }
-    let v1 = C::fits_in_64(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v6 = constructor_select_bool_imm(ctx, v2, arg1, -0x1, 0x0);
-        // Rule at src/isa/s390x/inst.isle line 3373.
-        return v6;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "lower_bool_to_mask", "src/isa/s390x/inst.isle line 3372"
-    )
-}
-
-// Generated as internal constructor for term cond_br_bool.
-pub fn constructor_cond_br_bool<C: Context>(
-    ctx: &mut C,
-    arg0: &ProducesBool,
-    arg1: MachLabel,
-    arg2: MachLabel,
-) -> SideEffectNoResult {
-    if let &ProducesBool::ProducesBool {
-        producer: ref v1,
-        cond: ref v2,
-    } = arg0
-    {
-        let v5 = &constructor_cond_br(ctx, arg1, arg2, v2);
-        let v6 = &constructor_with_flags_side_effect(ctx, v1, v5);
-        // Rule at src/isa/s390x/inst.isle line 3382.
-        return v6.clone();
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "cond_br_bool", "src/isa/s390x/inst.isle line 3381"
-    )
-}
-
-// Generated as internal constructor for term oneway_cond_br_bool.
-pub fn constructor_oneway_cond_br_bool<C: Context>(
-    ctx: &mut C,
-    arg0: &ProducesBool,
-    arg1: MachLabel,
-) -> SideEffectNoResult {
-    if let &ProducesBool::ProducesBool {
-        producer: ref v1,
-        cond: ref v2,
-    } = arg0
-    {
-        let v4 = &constructor_oneway_cond_br(ctx, arg1, v2);
-        let v5 = &constructor_with_flags_side_effect(ctx, v1, v4);
-        // Rule at src/isa/s390x/inst.isle line 3387.
-        return v5.clone();
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "oneway_cond_br_bool", "src/isa/s390x/inst.isle line 3386"
-    )
-}
-
-// Generated as internal constructor for term trap_if_bool.
-pub fn constructor_trap_if_bool<C: Context>(
-    ctx: &mut C,
-    arg0: &ProducesBool,
-    arg1: &TrapCode,
-) -> SideEffectNoResult {
-    if let &ProducesBool::ProducesBool {
-        producer: ref v1,
-        cond: ref v2,
-    } = arg0
-    {
-        let v4 = &constructor_trap_if_impl(ctx, v2, arg1);
-        let v5 = &constructor_with_flags_side_effect(ctx, v1, v4);
-        // Rule at src/isa/s390x/inst.isle line 3392.
-        return v5.clone();
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "trap_if_bool", "src/isa/s390x/inst.isle line 3391"
-    )
-}
-
-// Generated as internal constructor for term casloop_val_reg.
-pub fn constructor_casloop_val_reg<C: Context>(ctx: &mut C) -> WritableReg {
-    let v1 = C::writable_gpr(ctx, 0x0);
-    // Rule at src/isa/s390x/inst.isle line 3405.
-    return v1;
-}
-
-// Generated as internal constructor for term casloop_tmp_reg.
-pub fn constructor_casloop_tmp_reg<C: Context>(ctx: &mut C) -> WritableReg {
-    let v1 = C::writable_gpr(ctx, 0x1);
-    // Rule at src/isa/s390x/inst.isle line 3409.
-    return v1;
-}
-
-// Generated as internal constructor for term casloop_emit.
-pub fn constructor_casloop_emit<C: Context>(
-    ctx: &mut C,
-    arg0: &VecMInstBuilder,
-    arg1: Type,
-    arg2: MemFlags,
-    arg3: Reg,
-    arg4: Reg,
-) -> PReg {
-    let v7 = &C::memarg_reg_plus_off(ctx, arg3, 0x0, 0x0, arg2);
-    let v8 = constructor_ty_ext32(ctx, arg1);
-    let v9 = constructor_casloop_val_reg(ctx);
-    let v10 = constructor_push_atomic_cas(ctx, arg0, v8, v9, arg4, v7);
-    let v11 = constructor_ty_ext32(ctx, arg1);
-    let v12 = constructor_casloop_val_reg(ctx);
-    let v13 = constructor_emit_load(ctx, v11, v12, v7);
-    let v15 = &C::intcc_as_cond(ctx, &IntCC::NotEqual);
-    let v16 = constructor_emit_loop(ctx, arg0, v15);
-    let v17 = C::preg_gpr_0(ctx);
-    // Rule at src/isa/s390x/inst.isle line 3418.
-    return v17;
-}
-
-// Generated as internal constructor for term casloop_result.
-pub fn constructor_casloop_result<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: MemFlags,
-    arg2: PReg,
-) -> Reg {
-    let v1 = C::ty_32_or_64(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v4 = C::bigendian(ctx, arg1);
-        if let Some(v5) = v4 {
-            let v7 = constructor_mov_preg(ctx, arg2);
-            // Rule at src/isa/s390x/inst.isle line 3440.
-            return v7;
-        }
-        let v8 = C::littleendian(ctx, arg1);
-        if let Some(v9) = v8 {
-            let v10 = C::preg_to_reg(ctx, arg2);
-            let v11 = constructor_bswap_reg(ctx, v2, v10);
-            // Rule at src/isa/s390x/inst.isle line 3442.
-            return v11;
-        }
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "casloop_result", "src/isa/s390x/inst.isle line 3439"
-    )
-}
-
-// Generated as internal constructor for term casloop.
-pub fn constructor_casloop<C: Context>(
-    ctx: &mut C,
-    arg0: &VecMInstBuilder,
-    arg1: Type,
-    arg2: MemFlags,
-    arg3: Reg,
-    arg4: Reg,
-) -> Reg {
-    let v5 = constructor_casloop_emit(ctx, arg0, arg1, arg2, arg3, arg4);
-    let v6 = constructor_casloop_result(ctx, arg1, arg2, v5);
-    // Rule at src/isa/s390x/inst.isle line 3447.
-    return v6;
-}
-
-// Generated as internal constructor for term casloop_bitshift.
-pub fn constructor_casloop_bitshift<C: Context>(ctx: &mut C, arg0: Reg) -> Reg {
-    let v3 = constructor_lshl_imm(ctx, I32, arg0, 0x3);
-    // Rule at src/isa/s390x/inst.isle line 3462.
-    return v3;
-}
-
-// Generated as internal constructor for term casloop_aligned_addr.
-pub fn constructor_casloop_aligned_addr<C: Context>(ctx: &mut C, arg0: Reg) -> Reg {
-    let v4 = C::uimm16shifted(ctx, 0xFFFC, 0x0);
-    let v5 = constructor_and_uimm16shifted(ctx, I64, arg0, v4);
-    // Rule at src/isa/s390x/inst.isle line 3467.
-    return v5;
-}
-
-// Generated as internal constructor for term casloop_rotate_in.
-pub fn constructor_casloop_rotate_in<C: Context>(
-    ctx: &mut C,
-    arg0: &VecMInstBuilder,
-    arg1: Type,
-    arg2: MemFlags,
-    arg3: Reg,
-    arg4: Reg,
-) -> Reg {
-    match arg1 {
-        I8 => {
-            let v6 = constructor_casloop_tmp_reg(ctx);
-            let v8 = constructor_push_rot_imm_reg(ctx, arg0, I32, v6, arg4, 0x0, arg3);
-            // Rule at src/isa/s390x/inst.isle line 3477.
-            return v8;
-        }
-        I16 => {
-            let v9 = C::bigendian(ctx, arg2);
-            if let Some(v10) = v9 {
-                let v6 = constructor_casloop_tmp_reg(ctx);
-                let v8 = constructor_push_rot_imm_reg(ctx, arg0, I32, v6, arg4, 0x0, arg3);
-                // Rule at src/isa/s390x/inst.isle line 3479.
-                return v8;
-            }
-            let v11 = C::littleendian(ctx, arg2);
-            if let Some(v12) = v11 {
-                let v6 = constructor_casloop_tmp_reg(ctx);
-                let v14 = constructor_push_rot_imm_reg(ctx, arg0, I32, v6, arg4, 0x10, arg3);
-                // Rule at src/isa/s390x/inst.isle line 3481.
-                return v14;
-            }
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "casloop_rotate_in", "src/isa/s390x/inst.isle line 3476"
-    )
-}
-
-// Generated as internal constructor for term casloop_rotate_out.
-pub fn constructor_casloop_rotate_out<C: Context>(
-    ctx: &mut C,
-    arg0: &VecMInstBuilder,
-    arg1: Type,
-    arg2: MemFlags,
-    arg3: Reg,
-    arg4: Reg,
-) -> Reg {
-    match arg1 {
-        I8 => {
-            let v6 = constructor_casloop_tmp_reg(ctx);
-            let v8 = constructor_neg_reg(ctx, I32, arg3);
-            let v9 = constructor_push_rot_imm_reg(ctx, arg0, I32, v6, arg4, 0x0, v8);
-            // Rule at src/isa/s390x/inst.isle line 3490.
-            return v9;
-        }
-        I16 => {
-            let v10 = C::bigendian(ctx, arg2);
-            if let Some(v11) = v10 {
-                let v6 = constructor_casloop_tmp_reg(ctx);
-                let v12 = constructor_push_rot_imm_reg(ctx, arg0, I32, v6, arg4, 0x0, arg3);
-                // Rule at src/isa/s390x/inst.isle line 3492.
-                return v12;
-            }
-            let v13 = C::littleendian(ctx, arg2);
-            if let Some(v14) = v13 {
-                let v6 = constructor_casloop_tmp_reg(ctx);
-                let v16 = constructor_push_rot_imm_reg(ctx, arg0, I32, v6, arg4, 0x10, arg3);
-                // Rule at src/isa/s390x/inst.isle line 3494.
-                return v16;
-            }
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "casloop_rotate_out", "src/isa/s390x/inst.isle line 3489"
-    )
-}
-
-// Generated as internal constructor for term casloop_rotate_result.
-pub fn constructor_casloop_rotate_result<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: MemFlags,
-    arg2: Reg,
-    arg3: Reg,
-) -> Reg {
-    match arg0 {
-        I8 => {
-            let v6 = constructor_rot_imm_reg(ctx, I32, arg3, 0x8, arg2);
-            // Rule at src/isa/s390x/inst.isle line 3505.
-            return v6;
-        }
-        I16 => {
-            let v7 = C::bigendian(ctx, arg1);
-            if let Some(v8) = v7 {
-                let v10 = constructor_rot_imm_reg(ctx, I32, arg3, 0x10, arg2);
-                // Rule at src/isa/s390x/inst.isle line 3507.
-                return v10;
-            }
-            let v11 = C::littleendian(ctx, arg1);
-            if let Some(v12) = v11 {
-                let v13 = constructor_rot_reg(ctx, I32, arg3, arg2);
-                let v14 = constructor_bswap_reg(ctx, I32, v13);
-                // Rule at src/isa/s390x/inst.isle line 3509.
-                return v14;
-            }
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "casloop_rotate_result", "src/isa/s390x/inst.isle line 3504"
-    )
-}
-
-// Generated as internal constructor for term casloop_subword.
-pub fn constructor_casloop_subword<C: Context>(
-    ctx: &mut C,
-    arg0: &VecMInstBuilder,
-    arg1: Type,
-    arg2: MemFlags,
-    arg3: Reg,
-    arg4: Reg,
-    arg5: Reg,
-) -> Reg {
-    let v6 = constructor_casloop_emit(ctx, arg0, arg1, arg2, arg3, arg5);
-    let v7 = C::preg_to_reg(ctx, v6);
-    let v8 = constructor_casloop_rotate_result(ctx, arg1, arg2, arg4, v7);
-    // Rule at src/isa/s390x/inst.isle line 3514.
-    return v8;
-}
-
-// Generated as internal constructor for term writable_link_reg.
-pub fn constructor_writable_link_reg<C: Context>(ctx: &mut C) -> WritableReg {
-    let v1 = C::writable_gpr(ctx, 0xE);
-    // Rule at src/isa/s390x/inst.isle line 3560.
-    return v1;
-}
-
-// Generated as internal constructor for term abi_call.
-pub fn constructor_abi_call<C: Context>(
-    ctx: &mut C,
-    arg0: Sig,
-    arg1: ExternalName,
-    arg2: &CallArgList,
-    arg3: &CallRetList,
-    arg4: &Opcode,
-) -> SideEffectNoResult {
-    let v5 = constructor_writable_link_reg(ctx);
-    let v6 = C::abi_call_info(ctx, arg0, arg1, arg2, arg3, arg4);
-    let v7 = &constructor_call_impl(ctx, v5, v6);
-    // Rule at src/isa/s390x/inst.isle line 3563.
-    return v7.clone();
-}
-
-// Generated as internal constructor for term abi_call_ind.
-pub fn constructor_abi_call_ind<C: Context>(
-    ctx: &mut C,
-    arg0: Sig,
-    arg1: Reg,
-    arg2: &CallArgList,
-    arg3: &CallRetList,
-    arg4: &Opcode,
-) -> SideEffectNoResult {
-    let v5 = constructor_writable_link_reg(ctx);
-    let v6 = C::abi_call_ind_info(ctx, arg0, arg1, arg2, arg3, arg4);
-    let v7 = &constructor_call_ind_impl(ctx, v5, v6);
-    // Rule at src/isa/s390x/inst.isle line 3567.
-    return v7.clone();
-}
-
-// Generated as internal constructor for term lib_call.
-pub fn constructor_lib_call<C: Context>(ctx: &mut C, arg0: &LibCallInfo) -> SideEffectNoResult {
-    let v1 = constructor_writable_link_reg(ctx);
-    let v2 = C::lib_call_info(ctx, arg0);
-    let v3 = &constructor_call_impl(ctx, v1, v2);
-    // Rule at src/isa/s390x/inst.isle line 3591.
-    return v3.clone();
-}
-
-// Generated as internal constructor for term vec_widen_type.
-pub fn constructor_vec_widen_type<C: Context>(ctx: &mut C, arg0: Type) -> Type {
-    match arg0 {
-        I8X16 => {
-            // Rule at src/isa/s390x/inst.isle line 3601.
-            return I16X8;
-        }
-        I16X8 => {
-            // Rule at src/isa/s390x/inst.isle line 3602.
-            return I32X4;
-        }
-        I32X4 => {
-            // Rule at src/isa/s390x/inst.isle line 3603.
-            return I64X2;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_widen_type", "src/isa/s390x/inst.isle line 3600"
-    )
-}
-
-// Generated as internal constructor for term vecop_pack.
-pub fn constructor_vecop_pack<C: Context>(ctx: &mut C, arg0: Type) -> VecBinaryOp {
-    match arg0 {
-        I16X8 => {
-            // Rule at src/isa/s390x/inst.isle line 3606.
-            return VecBinaryOp::Pack16x8;
-        }
-        I32X4 => {
-            // Rule at src/isa/s390x/inst.isle line 3607.
-            return VecBinaryOp::Pack32x4;
-        }
-        I64X2 => {
-            // Rule at src/isa/s390x/inst.isle line 3608.
-            return VecBinaryOp::Pack64x2;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vecop_pack", "src/isa/s390x/inst.isle line 3605"
-    )
-}
-
-// Generated as internal constructor for term vec_pack.
-pub fn constructor_vec_pack<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v3 = &constructor_vecop_pack(ctx, arg0);
-    let v4 = constructor_vec_rrr(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 3611.
-    return v4;
-}
-
-// Generated as internal constructor for term vecop_pack_ssat.
-pub fn constructor_vecop_pack_ssat<C: Context>(ctx: &mut C, arg0: Type) -> VecBinaryOp {
-    match arg0 {
-        I16X8 => {
-            // Rule at src/isa/s390x/inst.isle line 3614.
-            return VecBinaryOp::PackSSat16x8;
-        }
-        I32X4 => {
-            // Rule at src/isa/s390x/inst.isle line 3615.
-            return VecBinaryOp::PackSSat32x4;
-        }
-        I64X2 => {
-            // Rule at src/isa/s390x/inst.isle line 3616.
-            return VecBinaryOp::PackSSat64x2;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vecop_pack_ssat", "src/isa/s390x/inst.isle line 3613"
-    )
-}
-
-// Generated as internal constructor for term vec_pack_ssat.
-pub fn constructor_vec_pack_ssat<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v3 = &constructor_vecop_pack_ssat(ctx, arg0);
-    let v4 = constructor_vec_rrr(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 3619.
-    return v4;
-}
-
-// Generated as internal constructor for term vecop_pack_usat.
-pub fn constructor_vecop_pack_usat<C: Context>(ctx: &mut C, arg0: Type) -> VecBinaryOp {
-    match arg0 {
-        I16X8 => {
-            // Rule at src/isa/s390x/inst.isle line 3622.
-            return VecBinaryOp::PackUSat16x8;
-        }
-        I32X4 => {
-            // Rule at src/isa/s390x/inst.isle line 3623.
-            return VecBinaryOp::PackUSat32x4;
-        }
-        I64X2 => {
-            // Rule at src/isa/s390x/inst.isle line 3624.
-            return VecBinaryOp::PackUSat64x2;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vecop_pack_usat", "src/isa/s390x/inst.isle line 3621"
-    )
-}
-
-// Generated as internal constructor for term vec_pack_usat.
-pub fn constructor_vec_pack_usat<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v3 = &constructor_vecop_pack_usat(ctx, arg0);
-    let v4 = constructor_vec_rrr(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 3627.
-    return v4;
-}
-
-// Generated as internal constructor for term vecop_unpacks_low.
-pub fn constructor_vecop_unpacks_low<C: Context>(ctx: &mut C, arg0: Type) -> VecUnaryOp {
-    match arg0 {
-        I8X16 => {
-            // Rule at src/isa/s390x/inst.isle line 3630.
-            return VecUnaryOp::UnpackSLow8x16;
-        }
-        I16X8 => {
-            // Rule at src/isa/s390x/inst.isle line 3631.
-            return VecUnaryOp::UnpackSLow16x8;
-        }
-        I32X4 => {
-            // Rule at src/isa/s390x/inst.isle line 3632.
-            return VecUnaryOp::UnpackSLow32x4;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vecop_unpacks_low", "src/isa/s390x/inst.isle line 3629"
-    )
-}
-
-// Generated as internal constructor for term vec_unpacks_low.
-pub fn constructor_vec_unpacks_low<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
-    let v2 = &constructor_vecop_unpacks_low(ctx, arg0);
-    let v3 = constructor_vec_rr(ctx, arg0, v2, arg1);
-    // Rule at src/isa/s390x/inst.isle line 3635.
-    return v3;
-}
-
-// Generated as internal constructor for term vecop_unpacks_high.
-pub fn constructor_vecop_unpacks_high<C: Context>(ctx: &mut C, arg0: Type) -> VecUnaryOp {
-    match arg0 {
-        I8X16 => {
-            // Rule at src/isa/s390x/inst.isle line 3638.
-            return VecUnaryOp::UnpackSHigh8x16;
-        }
-        I16X8 => {
-            // Rule at src/isa/s390x/inst.isle line 3639.
-            return VecUnaryOp::UnpackSHigh16x8;
-        }
-        I32X4 => {
-            // Rule at src/isa/s390x/inst.isle line 3640.
-            return VecUnaryOp::UnpackSHigh32x4;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vecop_unpacks_high", "src/isa/s390x/inst.isle line 3637"
-    )
-}
-
-// Generated as internal constructor for term vec_unpacks_high.
-pub fn constructor_vec_unpacks_high<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
-    let v2 = &constructor_vecop_unpacks_high(ctx, arg0);
-    let v3 = constructor_vec_rr(ctx, arg0, v2, arg1);
-    // Rule at src/isa/s390x/inst.isle line 3643.
-    return v3;
-}
-
-// Generated as internal constructor for term vecop_unpacku_low.
-pub fn constructor_vecop_unpacku_low<C: Context>(ctx: &mut C, arg0: Type) -> VecUnaryOp {
-    match arg0 {
-        I8X16 => {
-            // Rule at src/isa/s390x/inst.isle line 3646.
-            return VecUnaryOp::UnpackULow8x16;
-        }
-        I16X8 => {
-            // Rule at src/isa/s390x/inst.isle line 3647.
-            return VecUnaryOp::UnpackULow16x8;
-        }
-        I32X4 => {
-            // Rule at src/isa/s390x/inst.isle line 3648.
-            return VecUnaryOp::UnpackULow32x4;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vecop_unpacku_low", "src/isa/s390x/inst.isle line 3645"
-    )
-}
-
-// Generated as internal constructor for term vec_unpacku_low.
-pub fn constructor_vec_unpacku_low<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
-    let v2 = &constructor_vecop_unpacku_low(ctx, arg0);
-    let v3 = constructor_vec_rr(ctx, arg0, v2, arg1);
-    // Rule at src/isa/s390x/inst.isle line 3651.
-    return v3;
-}
-
-// Generated as internal constructor for term vecop_unpacku_high.
-pub fn constructor_vecop_unpacku_high<C: Context>(ctx: &mut C, arg0: Type) -> VecUnaryOp {
-    match arg0 {
-        I8X16 => {
-            // Rule at src/isa/s390x/inst.isle line 3654.
-            return VecUnaryOp::UnpackUHigh8x16;
-        }
-        I16X8 => {
-            // Rule at src/isa/s390x/inst.isle line 3655.
-            return VecUnaryOp::UnpackUHigh16x8;
-        }
-        I32X4 => {
-            // Rule at src/isa/s390x/inst.isle line 3656.
-            return VecUnaryOp::UnpackUHigh32x4;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vecop_unpacku_high", "src/isa/s390x/inst.isle line 3653"
-    )
-}
-
-// Generated as internal constructor for term vec_unpacku_high.
-pub fn constructor_vec_unpacku_high<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
-    let v2 = &constructor_vecop_unpacku_high(ctx, arg0);
-    let v3 = constructor_vec_rr(ctx, arg0, v2, arg1);
-    // Rule at src/isa/s390x/inst.isle line 3659.
-    return v3;
-}
-
-// Generated as internal constructor for term vec_pack_lane_order.
-pub fn constructor_vec_pack_lane_order<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: Reg,
-) -> Reg {
-    let v3 = &C::lane_order(ctx);
-    match v3 {
-        &LaneOrder::LittleEndian => {
-            let v5 = constructor_vec_pack(ctx, arg0, arg2, arg1);
-            // Rule at src/isa/s390x/inst.isle line 3670.
-            return v5;
-        }
-        &LaneOrder::BigEndian => {
-            let v4 = constructor_vec_pack(ctx, arg0, arg1, arg2);
-            // Rule at src/isa/s390x/inst.isle line 3667.
-            return v4;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_pack_lane_order", "src/isa/s390x/inst.isle line 3666"
-    )
-}
-
-// Generated as internal constructor for term vec_pack_ssat_lane_order.
-pub fn constructor_vec_pack_ssat_lane_order<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: Reg,
-) -> Reg {
-    let v3 = &C::lane_order(ctx);
-    match v3 {
-        &LaneOrder::LittleEndian => {
-            let v5 = constructor_vec_pack_ssat(ctx, arg0, arg2, arg1);
-            // Rule at src/isa/s390x/inst.isle line 3678.
-            return v5;
-        }
-        &LaneOrder::BigEndian => {
-            let v4 = constructor_vec_pack_ssat(ctx, arg0, arg1, arg2);
-            // Rule at src/isa/s390x/inst.isle line 3675.
-            return v4;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_pack_ssat_lane_order", "src/isa/s390x/inst.isle line 3674"
-    )
-}
-
-// Generated as internal constructor for term vec_pack_usat_lane_order.
-pub fn constructor_vec_pack_usat_lane_order<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: Reg,
-) -> Reg {
-    let v3 = &C::lane_order(ctx);
-    match v3 {
-        &LaneOrder::LittleEndian => {
-            let v5 = constructor_vec_pack_usat(ctx, arg0, arg2, arg1);
-            // Rule at src/isa/s390x/inst.isle line 3686.
-            return v5;
-        }
-        &LaneOrder::BigEndian => {
-            let v4 = constructor_vec_pack_usat(ctx, arg0, arg1, arg2);
-            // Rule at src/isa/s390x/inst.isle line 3683.
-            return v4;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_pack_usat_lane_order", "src/isa/s390x/inst.isle line 3682"
-    )
-}
-
-// Generated as internal constructor for term vec_unpacks_low_lane_order.
-pub fn constructor_vec_unpacks_low_lane_order<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-) -> Reg {
-    let v2 = &C::lane_order(ctx);
-    match v2 {
-        &LaneOrder::LittleEndian => {
-            let v4 = constructor_vec_unpacks_low(ctx, arg0, arg1);
-            // Rule at src/isa/s390x/inst.isle line 3699.
-            return v4;
-        }
-        &LaneOrder::BigEndian => {
-            let v3 = constructor_vec_unpacks_high(ctx, arg0, arg1);
-            // Rule at src/isa/s390x/inst.isle line 3696.
-            return v3;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_unpacks_low_lane_order", "src/isa/s390x/inst.isle line 3695"
-    )
-}
-
-// Generated as internal constructor for term vec_unpacks_high_lane_order.
-pub fn constructor_vec_unpacks_high_lane_order<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-) -> Reg {
-    let v2 = &C::lane_order(ctx);
-    match v2 {
-        &LaneOrder::LittleEndian => {
-            let v4 = constructor_vec_unpacks_high(ctx, arg0, arg1);
-            // Rule at src/isa/s390x/inst.isle line 3707.
-            return v4;
-        }
-        &LaneOrder::BigEndian => {
-            let v3 = constructor_vec_unpacks_low(ctx, arg0, arg1);
-            // Rule at src/isa/s390x/inst.isle line 3704.
-            return v3;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_unpacks_high_lane_order", "src/isa/s390x/inst.isle line 3703"
-    )
-}
-
-// Generated as internal constructor for term vec_unpacku_low_lane_order.
-pub fn constructor_vec_unpacku_low_lane_order<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-) -> Reg {
-    let v2 = &C::lane_order(ctx);
-    match v2 {
-        &LaneOrder::LittleEndian => {
-            let v4 = constructor_vec_unpacku_low(ctx, arg0, arg1);
-            // Rule at src/isa/s390x/inst.isle line 3715.
-            return v4;
-        }
-        &LaneOrder::BigEndian => {
-            let v3 = constructor_vec_unpacku_high(ctx, arg0, arg1);
-            // Rule at src/isa/s390x/inst.isle line 3712.
-            return v3;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_unpacku_low_lane_order", "src/isa/s390x/inst.isle line 3711"
-    )
-}
-
-// Generated as internal constructor for term vec_unpacku_high_lane_order.
-pub fn constructor_vec_unpacku_high_lane_order<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-) -> Reg {
-    let v2 = &C::lane_order(ctx);
-    match v2 {
-        &LaneOrder::LittleEndian => {
-            let v4 = constructor_vec_unpacku_high(ctx, arg0, arg1);
-            // Rule at src/isa/s390x/inst.isle line 3723.
-            return v4;
-        }
-        &LaneOrder::BigEndian => {
-            let v3 = constructor_vec_unpacku_low(ctx, arg0, arg1);
-            // Rule at src/isa/s390x/inst.isle line 3720.
-            return v3;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_unpacku_high_lane_order", "src/isa/s390x/inst.isle line 3719"
-    )
-}
-
-// Generated as internal constructor for term vecop_merge_low.
-pub fn constructor_vecop_merge_low<C: Context>(ctx: &mut C, arg0: Type) -> VecBinaryOp {
-    match arg0 {
-        I8X16 => {
-            // Rule at src/isa/s390x/inst.isle line 3731.
-            return VecBinaryOp::MergeLow8x16;
-        }
-        I16X8 => {
-            // Rule at src/isa/s390x/inst.isle line 3732.
-            return VecBinaryOp::MergeLow16x8;
-        }
-        I32X4 => {
-            // Rule at src/isa/s390x/inst.isle line 3733.
-            return VecBinaryOp::MergeLow32x4;
-        }
-        I64X2 => {
-            // Rule at src/isa/s390x/inst.isle line 3734.
-            return VecBinaryOp::MergeLow64x2;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vecop_merge_low", "src/isa/s390x/inst.isle line 3730"
-    )
-}
-
-// Generated as internal constructor for term vec_merge_low.
-pub fn constructor_vec_merge_low<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v3 = &constructor_vecop_merge_low(ctx, arg0);
-    let v4 = constructor_vec_rrr(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 3737.
-    return v4;
-}
-
-// Generated as internal constructor for term vecop_merge_high.
-pub fn constructor_vecop_merge_high<C: Context>(ctx: &mut C, arg0: Type) -> VecBinaryOp {
-    match arg0 {
-        I8X16 => {
-            // Rule at src/isa/s390x/inst.isle line 3740.
-            return VecBinaryOp::MergeHigh8x16;
-        }
-        I16X8 => {
-            // Rule at src/isa/s390x/inst.isle line 3741.
-            return VecBinaryOp::MergeHigh16x8;
-        }
-        I32X4 => {
-            // Rule at src/isa/s390x/inst.isle line 3742.
-            return VecBinaryOp::MergeHigh32x4;
-        }
-        I64X2 => {
-            // Rule at src/isa/s390x/inst.isle line 3743.
-            return VecBinaryOp::MergeHigh64x2;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vecop_merge_high", "src/isa/s390x/inst.isle line 3739"
-    )
-}
-
-// Generated as internal constructor for term vec_merge_high.
-pub fn constructor_vec_merge_high<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: Reg,
-) -> Reg {
-    let v3 = &constructor_vecop_merge_high(ctx, arg0);
-    let v4 = constructor_vec_rrr(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 3746.
-    return v4;
-}
-
-// Generated as internal constructor for term vec_merge_low_lane_order.
-pub fn constructor_vec_merge_low_lane_order<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: Reg,
-) -> Reg {
-    let v3 = &C::lane_order(ctx);
-    match v3 {
-        &LaneOrder::LittleEndian => {
-            let v5 = constructor_vec_merge_low(ctx, arg0, arg2, arg1);
-            // Rule at src/isa/s390x/inst.isle line 3760.
-            return v5;
-        }
-        &LaneOrder::BigEndian => {
-            let v4 = constructor_vec_merge_high(ctx, arg0, arg1, arg2);
-            // Rule at src/isa/s390x/inst.isle line 3757.
-            return v4;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_merge_low_lane_order", "src/isa/s390x/inst.isle line 3756"
-    )
-}
-
-// Generated as internal constructor for term vec_merge_high_lane_order.
-pub fn constructor_vec_merge_high_lane_order<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: Reg,
-) -> Reg {
-    let v3 = &C::lane_order(ctx);
-    match v3 {
-        &LaneOrder::LittleEndian => {
-            let v5 = constructor_vec_merge_high(ctx, arg0, arg2, arg1);
-            // Rule at src/isa/s390x/inst.isle line 3768.
-            return v5;
-        }
-        &LaneOrder::BigEndian => {
-            let v4 = constructor_vec_merge_low(ctx, arg0, arg1, arg2);
-            // Rule at src/isa/s390x/inst.isle line 3765.
-            return v4;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_merge_high_lane_order", "src/isa/s390x/inst.isle line 3764"
-    )
-}
-
-// Generated as internal constructor for term clz_reg.
-pub fn constructor_clz_reg<C: Context>(ctx: &mut C, arg0: i16, arg1: Reg) -> Reg {
-    if arg0 == 0x40 {
-        let v2 = constructor_temp_writable_regpair(ctx);
-        let v3 = MInst::Flogr { rd: v2, rn: arg1 };
-        let v4 = C::emit(ctx, &v3);
-        let v5 = constructor_writable_regpair_to_regpair(ctx, v2);
-        let v6 = C::regpair_hi(ctx, v5);
-        // Rule at src/isa/s390x/inst.isle line 3779.
-        return v6;
-    }
-    let v2 = constructor_temp_writable_regpair(ctx);
-    let v10 = &C::intcc_as_cond(ctx, &IntCC::Equal);
-    let v5 = constructor_writable_regpair_to_regpair(ctx, v2);
-    let v6 = C::regpair_hi(ctx, v5);
-    let v11 = &constructor_cmov_imm(ctx, I64, v10, arg0, v6);
-    let v3 = MInst::Flogr { rd: v2, rn: arg1 };
-    let v7 = ProducesFlags::ProducesFlagsSideEffect { inst: v3 };
-    let v12 = constructor_with_flags_reg(ctx, &v7, v11);
-    // Rule at src/isa/s390x/inst.isle line 3785.
-    return v12;
-}
-
-// Generated as internal constructor for term vecop_clz.
-pub fn constructor_vecop_clz<C: Context>(ctx: &mut C, arg0: Type) -> VecUnaryOp {
-    match arg0 {
-        I8X16 => {
-            // Rule at src/isa/s390x/inst.isle line 3793.
-            return VecUnaryOp::Clz8x16;
-        }
-        I16X8 => {
-            // Rule at src/isa/s390x/inst.isle line 3794.
-            return VecUnaryOp::Clz16x8;
-        }
-        I32X4 => {
-            // Rule at src/isa/s390x/inst.isle line 3795.
-            return VecUnaryOp::Clz32x4;
-        }
-        I64X2 => {
-            // Rule at src/isa/s390x/inst.isle line 3796.
-            return VecUnaryOp::Clz64x2;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vecop_clz", "src/isa/s390x/inst.isle line 3792"
-    )
-}
-
-// Generated as internal constructor for term vec_clz.
-pub fn constructor_vec_clz<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
-    let v2 = &constructor_vecop_clz(ctx, arg0);
-    let v3 = constructor_vec_rr(ctx, arg0, v2, arg1);
-    // Rule at src/isa/s390x/inst.isle line 3799.
-    return v3;
-}
-
-// Generated as internal constructor for term vecop_ctz.
-pub fn constructor_vecop_ctz<C: Context>(ctx: &mut C, arg0: Type) -> VecUnaryOp {
-    match arg0 {
-        I8X16 => {
-            // Rule at src/isa/s390x/inst.isle line 3803.
-            return VecUnaryOp::Ctz8x16;
-        }
-        I16X8 => {
-            // Rule at src/isa/s390x/inst.isle line 3804.
-            return VecUnaryOp::Ctz16x8;
-        }
-        I32X4 => {
-            // Rule at src/isa/s390x/inst.isle line 3805.
-            return VecUnaryOp::Ctz32x4;
-        }
-        I64X2 => {
-            // Rule at src/isa/s390x/inst.isle line 3806.
-            return VecUnaryOp::Ctz64x2;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vecop_ctz", "src/isa/s390x/inst.isle line 3802"
-    )
-}
-
-// Generated as internal constructor for term vec_ctz.
-pub fn constructor_vec_ctz<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
-    let v2 = &constructor_vecop_ctz(ctx, arg0);
-    let v3 = constructor_vec_rr(ctx, arg0, v2, arg1);
-    // Rule at src/isa/s390x/inst.isle line 3809.
-    return v3;
-}
-
-// Generated as internal constructor for term uint_sat_reg.
-pub fn constructor_uint_sat_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Type, arg2: Reg) -> Reg {
-    if arg0 == arg1 {
-        // Rule at src/isa/s390x/inst.isle line 3815.
-        return arg2;
-    }
-    match arg0 {
-        I8 => {
-            let v3 = C::ty_32_or_64(ctx, arg1);
-            if let Some(v4) = v3 {
-                let v6 = &constructor_icmpu_uimm32(ctx, v4, arg2, 0x100);
-                let v8 = &C::intcc_as_cond(ctx, &IntCC::UnsignedGreaterThan);
-                let v10 = &constructor_cmov_imm(ctx, v4, v8, 0xFF, arg2);
-                let v11 = constructor_with_flags_reg(ctx, v6, v10);
-                // Rule at src/isa/s390x/inst.isle line 3816.
-                return v11;
-            }
-        }
-        I16 => {
-            let v3 = C::ty_32_or_64(ctx, arg1);
-            if let Some(v4) = v3 {
-                let v13 = &constructor_icmpu_uimm32(ctx, v4, arg2, 0xFFFF);
-                let v8 = &C::intcc_as_cond(ctx, &IntCC::UnsignedGreaterThan);
-                let v15 = &constructor_cmov_imm(ctx, v4, v8, -0x1, arg2);
-                let v16 = constructor_with_flags_reg(ctx, v13, v15);
-                // Rule at src/isa/s390x/inst.isle line 3819.
-                return v16;
-            }
-        }
-        I32 => {
-            if arg1 == I64 {
-                let v19 = constructor_imm(ctx, I64, 0xFFFFFFFF);
-                let v20 = &constructor_icmpu_reg(ctx, I64, arg2, v19);
-                let v21 = &C::intcc_as_cond(ctx, &IntCC::UnsignedGreaterThan);
-                let v22 = &constructor_bool(ctx, v20, v21);
-                let v23 = constructor_select_bool_reg(ctx, I64, v22, v19, arg2);
-                // Rule at src/isa/s390x/inst.isle line 3822.
-                return v23;
-            }
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "uint_sat_reg", "src/isa/s390x/inst.isle line 3814"
-    )
-}
-
-// Generated as internal constructor for term sint_sat_reg.
-pub fn constructor_sint_sat_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Type, arg2: Reg) -> Reg {
-    if arg0 == arg1 {
-        // Rule at src/isa/s390x/inst.isle line 3830.
-        return arg2;
-    }
-    match arg0 {
-        I8 => {
-            let v3 = C::ty_32_or_64(ctx, arg1);
-            if let Some(v4) = v3 {
-                let v6 = &constructor_icmps_simm16(ctx, v4, arg2, 0x7F);
-                let v8 = &C::intcc_as_cond(ctx, &IntCC::SignedGreaterThan);
-                let v9 = &constructor_cmov_imm(ctx, v4, v8, 0x7F, arg2);
-                let v10 = constructor_with_flags_reg(ctx, v6, v9);
-                let v12 = &constructor_icmps_simm16(ctx, v4, v10, -0x80);
-                let v14 = &C::intcc_as_cond(ctx, &IntCC::SignedLessThan);
-                let v15 = &constructor_cmov_imm(ctx, v4, v14, -0x80, v10);
-                let v16 = constructor_with_flags_reg(ctx, v12, v15);
-                // Rule at src/isa/s390x/inst.isle line 3831.
-                return v16;
-            }
-        }
-        I16 => {
-            let v3 = C::ty_32_or_64(ctx, arg1);
-            if let Some(v4) = v3 {
-                let v18 = &constructor_icmps_simm16(ctx, v4, arg2, 0x7FFF);
-                let v8 = &C::intcc_as_cond(ctx, &IntCC::SignedGreaterThan);
-                let v19 = &constructor_cmov_imm(ctx, v4, v8, 0x7FFF, arg2);
-                let v20 = constructor_with_flags_reg(ctx, v18, v19);
-                let v22 = &constructor_icmps_simm16(ctx, v4, v20, -0x8000);
-                let v14 = &C::intcc_as_cond(ctx, &IntCC::SignedLessThan);
-                let v23 = &constructor_cmov_imm(ctx, v4, v14, -0x8000, v20);
-                let v24 = constructor_with_flags_reg(ctx, v22, v23);
-                // Rule at src/isa/s390x/inst.isle line 3837.
-                return v24;
-            }
-        }
-        I32 => {
-            if arg1 == I64 {
-                let v27 = constructor_imm32(ctx, I64, 0x7FFFFFFF);
-                let v28 = &constructor_icmps_reg(ctx, I64, arg2, v27);
-                let v29 = &C::intcc_as_cond(ctx, &IntCC::SignedGreaterThan);
-                let v30 = &constructor_bool(ctx, v28, v29);
-                let v31 = constructor_select_bool_reg(ctx, I64, v30, v27, arg2);
-                let v33 = constructor_imm32(ctx, I64, -0x80000000);
-                let v34 = &constructor_icmps_reg(ctx, I64, v31, v33);
-                let v35 = &C::intcc_as_cond(ctx, &IntCC::SignedLessThan);
-                let v36 = &constructor_bool(ctx, v34, v35);
-                let v37 = constructor_select_bool_reg(ctx, I64, v36, v33, v31);
-                // Rule at src/isa/s390x/inst.isle line 3843.
-                return v37;
-            }
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "sint_sat_reg", "src/isa/s390x/inst.isle line 3829"
-    )
-}
-
-// Generated as internal constructor for term aluop_add.
-pub fn constructor_aluop_add<C: Context>(ctx: &mut C, arg0: Type) -> ALUOp {
-    match arg0 {
-        I8 => {
-            // Rule at src/isa/s390x/inst.isle line 3859.
-            return ALUOp::Add32;
-        }
-        I16 => {
-            // Rule at src/isa/s390x/inst.isle line 3860.
-            return ALUOp::Add32;
-        }
-        I32 => {
-            // Rule at src/isa/s390x/inst.isle line 3861.
-            return ALUOp::Add32;
-        }
-        I64 => {
-            // Rule at src/isa/s390x/inst.isle line 3862.
-            return ALUOp::Add64;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "aluop_add", "src/isa/s390x/inst.isle line 3858"
-    )
-}
-
-// Generated as internal constructor for term aluop_add_sext16.
-pub fn constructor_aluop_add_sext16<C: Context>(ctx: &mut C, arg0: Type) -> ALUOp {
-    match arg0 {
-        I16 => {
-            // Rule at src/isa/s390x/inst.isle line 3865.
-            return ALUOp::Add32Ext16;
-        }
-        I32 => {
-            // Rule at src/isa/s390x/inst.isle line 3866.
-            return ALUOp::Add32Ext16;
-        }
-        I64 => {
-            // Rule at src/isa/s390x/inst.isle line 3867.
-            return ALUOp::Add64Ext16;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "aluop_add_sext16", "src/isa/s390x/inst.isle line 3864"
-    )
-}
-
-// Generated as internal constructor for term aluop_add_sext32.
-pub fn constructor_aluop_add_sext32<C: Context>(ctx: &mut C, arg0: Type) -> ALUOp {
-    if arg0 == I64 {
-        // Rule at src/isa/s390x/inst.isle line 3870.
-        return ALUOp::Add64Ext32;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "aluop_add_sext32", "src/isa/s390x/inst.isle line 3869"
-    )
-}
-
-// Generated as internal constructor for term add_reg.
-pub fn constructor_add_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v3 = &constructor_aluop_add(ctx, arg0);
-    let v4 = constructor_alu_rrr(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 3873.
-    return v4;
-}
-
-// Generated as internal constructor for term add_reg_sext32.
-pub fn constructor_add_reg_sext32<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: Reg,
-) -> Reg {
-    let v3 = &constructor_aluop_add_sext32(ctx, arg0);
-    let v4 = constructor_alu_rr(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 3876.
-    return v4;
-}
-
-// Generated as internal constructor for term add_simm16.
-pub fn constructor_add_simm16<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: i16) -> Reg {
-    let v3 = &constructor_aluop_add(ctx, arg0);
-    let v4 = constructor_alu_rrsimm16(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 3879.
-    return v4;
-}
-
-// Generated as internal constructor for term add_simm32.
-pub fn constructor_add_simm32<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: i32) -> Reg {
-    let v3 = &constructor_aluop_add(ctx, arg0);
-    let v4 = constructor_alu_rsimm32(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 3882.
-    return v4;
-}
-
-// Generated as internal constructor for term add_mem.
-pub fn constructor_add_mem<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: &MemArg) -> Reg {
-    let v3 = &constructor_aluop_add(ctx, arg0);
-    let v4 = constructor_alu_rx(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 3885.
-    return v4;
-}
-
-// Generated as internal constructor for term add_mem_sext16.
-pub fn constructor_add_mem_sext16<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: &MemArg,
-) -> Reg {
-    let v3 = &constructor_aluop_add_sext16(ctx, arg0);
-    let v4 = constructor_alu_rx(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 3888.
-    return v4;
-}
-
-// Generated as internal constructor for term add_mem_sext32.
-pub fn constructor_add_mem_sext32<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: &MemArg,
-) -> Reg {
-    let v3 = &constructor_aluop_add_sext32(ctx, arg0);
-    let v4 = constructor_alu_rx(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 3891.
-    return v4;
-}
-
-// Generated as internal constructor for term vecop_add.
-pub fn constructor_vecop_add<C: Context>(ctx: &mut C, arg0: Type) -> VecBinaryOp {
-    match arg0 {
-        I128 => {
-            // Rule at src/isa/s390x/inst.isle line 3898.
-            return VecBinaryOp::Add128;
-        }
-        I8X16 => {
-            // Rule at src/isa/s390x/inst.isle line 3894.
-            return VecBinaryOp::Add8x16;
-        }
-        I16X8 => {
-            // Rule at src/isa/s390x/inst.isle line 3895.
-            return VecBinaryOp::Add16x8;
-        }
-        I32X4 => {
-            // Rule at src/isa/s390x/inst.isle line 3896.
-            return VecBinaryOp::Add32x4;
-        }
-        I64X2 => {
-            // Rule at src/isa/s390x/inst.isle line 3897.
-            return VecBinaryOp::Add64x2;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vecop_add", "src/isa/s390x/inst.isle line 3893"
-    )
-}
-
-// Generated as internal constructor for term vec_add.
-pub fn constructor_vec_add<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v3 = &constructor_vecop_add(ctx, arg0);
-    let v4 = constructor_vec_rrr(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 3901.
-    return v4;
-}
-
-// Generated as internal constructor for term aluop_add_logical.
-pub fn constructor_aluop_add_logical<C: Context>(ctx: &mut C, arg0: Type) -> ALUOp {
-    match arg0 {
-        I32 => {
-            // Rule at src/isa/s390x/inst.isle line 3907.
-            return ALUOp::AddLogical32;
-        }
-        I64 => {
-            // Rule at src/isa/s390x/inst.isle line 3908.
-            return ALUOp::AddLogical64;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "aluop_add_logical", "src/isa/s390x/inst.isle line 3906"
-    )
-}
-
-// Generated as internal constructor for term aluop_add_logical_zext32.
-pub fn constructor_aluop_add_logical_zext32<C: Context>(ctx: &mut C, arg0: Type) -> ALUOp {
-    if arg0 == I64 {
-        // Rule at src/isa/s390x/inst.isle line 3911.
-        return ALUOp::AddLogical64Ext32;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "aluop_add_logical_zext32", "src/isa/s390x/inst.isle line 3910"
-    )
-}
-
-// Generated as internal constructor for term add_logical_reg.
-pub fn constructor_add_logical_reg<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: Reg,
-) -> Reg {
-    let v3 = &constructor_aluop_add_logical(ctx, arg0);
-    let v4 = constructor_alu_rrr(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 3914.
-    return v4;
-}
-
-// Generated as internal constructor for term add_logical_reg_with_flags_paired.
-pub fn constructor_add_logical_reg_with_flags_paired<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: Reg,
-) -> ProducesFlags {
-    let v3 = &constructor_aluop_add_logical(ctx, arg0);
-    let v4 = &constructor_alu_rrr_with_flags_paired(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 3917.
-    return v4.clone();
-}
-
-// Generated as internal constructor for term add_logical_reg_zext32.
-pub fn constructor_add_logical_reg_zext32<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: Reg,
-) -> Reg {
-    let v3 = &constructor_aluop_add_logical_zext32(ctx, arg0);
-    let v4 = constructor_alu_rr(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 3921.
-    return v4;
-}
-
-// Generated as internal constructor for term add_logical_reg_zext32_with_flags_paired.
-pub fn constructor_add_logical_reg_zext32_with_flags_paired<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: Reg,
-) -> ProducesFlags {
-    let v3 = &constructor_aluop_add_logical_zext32(ctx, arg0);
-    let v4 = &constructor_alu_rr_with_flags_paired(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 3924.
-    return v4.clone();
-}
-
-// Generated as internal constructor for term add_logical_zimm32.
-pub fn constructor_add_logical_zimm32<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: u32,
-) -> Reg {
-    let v3 = &constructor_aluop_add_logical(ctx, arg0);
-    let v4 = constructor_alu_ruimm32(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 3928.
-    return v4;
-}
-
-// Generated as internal constructor for term add_logical_zimm32_with_flags_paired.
-pub fn constructor_add_logical_zimm32_with_flags_paired<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: u32,
-) -> ProducesFlags {
-    let v3 = &constructor_aluop_add_logical(ctx, arg0);
-    let v4 = &constructor_alu_ruimm32_with_flags_paired(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 3931.
-    return v4.clone();
-}
-
-// Generated as internal constructor for term add_logical_mem.
-pub fn constructor_add_logical_mem<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: &MemArg,
-) -> Reg {
-    let v3 = &constructor_aluop_add_logical(ctx, arg0);
-    let v4 = constructor_alu_rx(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 3935.
-    return v4;
-}
-
-// Generated as internal constructor for term add_logical_mem_with_flags_paired.
-pub fn constructor_add_logical_mem_with_flags_paired<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: &MemArg,
-) -> ProducesFlags {
-    let v3 = &constructor_aluop_add_logical(ctx, arg0);
-    let v4 = &constructor_alu_rx_with_flags_paired(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 3938.
-    return v4.clone();
-}
-
-// Generated as internal constructor for term add_logical_mem_zext32.
-pub fn constructor_add_logical_mem_zext32<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: &MemArg,
-) -> Reg {
-    let v3 = &constructor_aluop_add_logical_zext32(ctx, arg0);
-    let v4 = constructor_alu_rx(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 3942.
-    return v4;
-}
-
-// Generated as internal constructor for term add_logical_mem_zext32_with_flags_paired.
-pub fn constructor_add_logical_mem_zext32_with_flags_paired<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: &MemArg,
-) -> ProducesFlags {
-    let v3 = &constructor_aluop_add_logical_zext32(ctx, arg0);
-    let v4 = &constructor_alu_rx_with_flags_paired(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 3945.
-    return v4.clone();
-}
-
-// Generated as internal constructor for term aluop_sub.
-pub fn constructor_aluop_sub<C: Context>(ctx: &mut C, arg0: Type) -> ALUOp {
-    match arg0 {
-        I8 => {
-            // Rule at src/isa/s390x/inst.isle line 3952.
-            return ALUOp::Sub32;
-        }
-        I16 => {
-            // Rule at src/isa/s390x/inst.isle line 3953.
-            return ALUOp::Sub32;
-        }
-        I32 => {
-            // Rule at src/isa/s390x/inst.isle line 3954.
-            return ALUOp::Sub32;
-        }
-        I64 => {
-            // Rule at src/isa/s390x/inst.isle line 3955.
-            return ALUOp::Sub64;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "aluop_sub", "src/isa/s390x/inst.isle line 3951"
-    )
-}
-
-// Generated as internal constructor for term aluop_sub_sext16.
-pub fn constructor_aluop_sub_sext16<C: Context>(ctx: &mut C, arg0: Type) -> ALUOp {
-    match arg0 {
-        I16 => {
-            // Rule at src/isa/s390x/inst.isle line 3958.
-            return ALUOp::Sub32Ext16;
-        }
-        I32 => {
-            // Rule at src/isa/s390x/inst.isle line 3959.
-            return ALUOp::Sub32Ext16;
-        }
-        I64 => {
-            // Rule at src/isa/s390x/inst.isle line 3960.
-            return ALUOp::Sub64Ext16;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "aluop_sub_sext16", "src/isa/s390x/inst.isle line 3957"
-    )
-}
-
-// Generated as internal constructor for term aluop_sub_sext32.
-pub fn constructor_aluop_sub_sext32<C: Context>(ctx: &mut C, arg0: Type) -> ALUOp {
-    if arg0 == I64 {
-        // Rule at src/isa/s390x/inst.isle line 3963.
-        return ALUOp::Sub64Ext32;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "aluop_sub_sext32", "src/isa/s390x/inst.isle line 3962"
-    )
-}
-
-// Generated as internal constructor for term sub_reg.
-pub fn constructor_sub_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v3 = &constructor_aluop_sub(ctx, arg0);
-    let v4 = constructor_alu_rrr(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 3966.
-    return v4;
-}
-
-// Generated as internal constructor for term sub_reg_sext32.
-pub fn constructor_sub_reg_sext32<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: Reg,
-) -> Reg {
-    let v3 = &constructor_aluop_sub_sext32(ctx, arg0);
-    let v4 = constructor_alu_rr(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 3969.
-    return v4;
-}
-
-// Generated as internal constructor for term sub_mem.
-pub fn constructor_sub_mem<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: &MemArg) -> Reg {
-    let v3 = &constructor_aluop_sub(ctx, arg0);
-    let v4 = constructor_alu_rx(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 3972.
-    return v4;
-}
-
-// Generated as internal constructor for term sub_mem_sext16.
-pub fn constructor_sub_mem_sext16<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: &MemArg,
-) -> Reg {
-    let v3 = &constructor_aluop_sub_sext16(ctx, arg0);
-    let v4 = constructor_alu_rx(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 3975.
-    return v4;
-}
-
-// Generated as internal constructor for term sub_mem_sext32.
-pub fn constructor_sub_mem_sext32<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: &MemArg,
-) -> Reg {
-    let v3 = &constructor_aluop_sub_sext32(ctx, arg0);
-    let v4 = constructor_alu_rx(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 3978.
-    return v4;
-}
-
-// Generated as internal constructor for term vecop_sub.
-pub fn constructor_vecop_sub<C: Context>(ctx: &mut C, arg0: Type) -> VecBinaryOp {
-    match arg0 {
-        I128 => {
-            // Rule at src/isa/s390x/inst.isle line 3985.
-            return VecBinaryOp::Sub128;
-        }
-        I8X16 => {
-            // Rule at src/isa/s390x/inst.isle line 3981.
-            return VecBinaryOp::Sub8x16;
-        }
-        I16X8 => {
-            // Rule at src/isa/s390x/inst.isle line 3982.
-            return VecBinaryOp::Sub16x8;
-        }
-        I32X4 => {
-            // Rule at src/isa/s390x/inst.isle line 3983.
-            return VecBinaryOp::Sub32x4;
-        }
-        I64X2 => {
-            // Rule at src/isa/s390x/inst.isle line 3984.
-            return VecBinaryOp::Sub64x2;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vecop_sub", "src/isa/s390x/inst.isle line 3980"
-    )
-}
-
-// Generated as internal constructor for term vec_sub.
-pub fn constructor_vec_sub<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v3 = &constructor_vecop_sub(ctx, arg0);
-    let v4 = constructor_vec_rrr(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 3988.
-    return v4;
-}
-
-// Generated as internal constructor for term aluop_sub_logical.
-pub fn constructor_aluop_sub_logical<C: Context>(ctx: &mut C, arg0: Type) -> ALUOp {
-    match arg0 {
-        I32 => {
-            // Rule at src/isa/s390x/inst.isle line 3994.
-            return ALUOp::SubLogical32;
-        }
-        I64 => {
-            // Rule at src/isa/s390x/inst.isle line 3995.
-            return ALUOp::SubLogical64;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "aluop_sub_logical", "src/isa/s390x/inst.isle line 3993"
-    )
-}
-
-// Generated as internal constructor for term aluop_sub_logical_zext32.
-pub fn constructor_aluop_sub_logical_zext32<C: Context>(ctx: &mut C, arg0: Type) -> ALUOp {
-    if arg0 == I64 {
-        // Rule at src/isa/s390x/inst.isle line 3998.
-        return ALUOp::SubLogical64Ext32;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "aluop_sub_logical_zext32", "src/isa/s390x/inst.isle line 3997"
-    )
-}
-
-// Generated as internal constructor for term sub_logical_reg.
-pub fn constructor_sub_logical_reg<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: Reg,
-) -> Reg {
-    let v3 = &constructor_aluop_sub_logical(ctx, arg0);
-    let v4 = constructor_alu_rrr(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4001.
-    return v4;
-}
-
-// Generated as internal constructor for term sub_logical_reg_zext32.
-pub fn constructor_sub_logical_reg_zext32<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: Reg,
-) -> Reg {
-    let v3 = &constructor_aluop_sub_logical_zext32(ctx, arg0);
-    let v4 = constructor_alu_rr(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4004.
-    return v4;
-}
-
-// Generated as internal constructor for term sub_logical_zimm32.
-pub fn constructor_sub_logical_zimm32<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: u32,
-) -> Reg {
-    let v3 = &constructor_aluop_sub_logical(ctx, arg0);
-    let v4 = constructor_alu_ruimm32(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4007.
-    return v4;
-}
-
-// Generated as internal constructor for term sub_logical_mem.
-pub fn constructor_sub_logical_mem<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: &MemArg,
-) -> Reg {
-    let v3 = &constructor_aluop_sub_logical(ctx, arg0);
-    let v4 = constructor_alu_rx(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4010.
-    return v4;
-}
-
-// Generated as internal constructor for term sub_logical_mem_zext32.
-pub fn constructor_sub_logical_mem_zext32<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: &MemArg,
-) -> Reg {
-    let v3 = &constructor_aluop_sub_logical(ctx, arg0);
-    let v4 = constructor_alu_rx(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4013.
-    return v4;
-}
-
-// Generated as internal constructor for term aluop_mul.
-pub fn constructor_aluop_mul<C: Context>(ctx: &mut C, arg0: Type) -> ALUOp {
-    match arg0 {
-        I8 => {
-            // Rule at src/isa/s390x/inst.isle line 4019.
-            return ALUOp::Mul32;
-        }
-        I16 => {
-            // Rule at src/isa/s390x/inst.isle line 4020.
-            return ALUOp::Mul32;
-        }
-        I32 => {
-            // Rule at src/isa/s390x/inst.isle line 4021.
-            return ALUOp::Mul32;
-        }
-        I64 => {
-            // Rule at src/isa/s390x/inst.isle line 4022.
-            return ALUOp::Mul64;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "aluop_mul", "src/isa/s390x/inst.isle line 4018"
-    )
-}
-
-// Generated as internal constructor for term aluop_mul_sext16.
-pub fn constructor_aluop_mul_sext16<C: Context>(ctx: &mut C, arg0: Type) -> ALUOp {
-    match arg0 {
-        I16 => {
-            // Rule at src/isa/s390x/inst.isle line 4025.
-            return ALUOp::Mul32Ext16;
-        }
-        I32 => {
-            // Rule at src/isa/s390x/inst.isle line 4026.
-            return ALUOp::Mul32Ext16;
-        }
-        I64 => {
-            // Rule at src/isa/s390x/inst.isle line 4027.
-            return ALUOp::Mul64Ext16;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "aluop_mul_sext16", "src/isa/s390x/inst.isle line 4024"
-    )
-}
-
-// Generated as internal constructor for term aluop_mul_sext32.
-pub fn constructor_aluop_mul_sext32<C: Context>(ctx: &mut C, arg0: Type) -> ALUOp {
-    if arg0 == I64 {
-        // Rule at src/isa/s390x/inst.isle line 4030.
-        return ALUOp::Mul64Ext32;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "aluop_mul_sext32", "src/isa/s390x/inst.isle line 4029"
-    )
-}
-
-// Generated as internal constructor for term mul_reg.
-pub fn constructor_mul_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v3 = &constructor_aluop_mul(ctx, arg0);
-    let v4 = constructor_alu_rrr(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4033.
-    return v4;
-}
-
-// Generated as internal constructor for term mul_reg_sext32.
-pub fn constructor_mul_reg_sext32<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: Reg,
-) -> Reg {
-    let v3 = &constructor_aluop_mul_sext32(ctx, arg0);
-    let v4 = constructor_alu_rr(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4036.
-    return v4;
-}
-
-// Generated as internal constructor for term mul_simm16.
-pub fn constructor_mul_simm16<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: i16) -> Reg {
-    let v3 = &constructor_aluop_mul(ctx, arg0);
-    let v4 = constructor_alu_rsimm16(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4039.
-    return v4;
-}
-
-// Generated as internal constructor for term mul_simm32.
-pub fn constructor_mul_simm32<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: i32) -> Reg {
-    let v3 = &constructor_aluop_mul(ctx, arg0);
-    let v4 = constructor_alu_rsimm32(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4042.
-    return v4;
-}
-
-// Generated as internal constructor for term mul_mem.
-pub fn constructor_mul_mem<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: &MemArg) -> Reg {
-    let v3 = &constructor_aluop_mul(ctx, arg0);
-    let v4 = constructor_alu_rx(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4045.
-    return v4;
-}
-
-// Generated as internal constructor for term mul_mem_sext16.
-pub fn constructor_mul_mem_sext16<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: &MemArg,
-) -> Reg {
-    let v3 = &constructor_aluop_mul_sext16(ctx, arg0);
-    let v4 = constructor_alu_rx(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4048.
-    return v4;
-}
-
-// Generated as internal constructor for term mul_mem_sext32.
-pub fn constructor_mul_mem_sext32<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: &MemArg,
-) -> Reg {
-    let v3 = &constructor_aluop_mul_sext32(ctx, arg0);
-    let v4 = constructor_alu_rx(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4051.
-    return v4;
-}
-
-// Generated as internal constructor for term vecop_mul.
-pub fn constructor_vecop_mul<C: Context>(ctx: &mut C, arg0: Type) -> VecBinaryOp {
-    match arg0 {
-        I8X16 => {
-            // Rule at src/isa/s390x/inst.isle line 4054.
-            return VecBinaryOp::Mul8x16;
-        }
-        I16X8 => {
-            // Rule at src/isa/s390x/inst.isle line 4055.
-            return VecBinaryOp::Mul16x8;
-        }
-        I32X4 => {
-            // Rule at src/isa/s390x/inst.isle line 4056.
-            return VecBinaryOp::Mul32x4;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vecop_mul", "src/isa/s390x/inst.isle line 4053"
-    )
-}
-
-// Generated as internal constructor for term vec_mul.
-pub fn constructor_vec_mul<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v3 = &constructor_vecop_mul(ctx, arg0);
-    let v4 = constructor_vec_rrr(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4060.
-    return v4;
-}
-
-// Generated as internal constructor for term vecop_umulhi.
-pub fn constructor_vecop_umulhi<C: Context>(ctx: &mut C, arg0: Type) -> VecBinaryOp {
-    match arg0 {
-        I8X16 => {
-            // Rule at src/isa/s390x/inst.isle line 4063.
-            return VecBinaryOp::UMulHi8x16;
-        }
-        I16X8 => {
-            // Rule at src/isa/s390x/inst.isle line 4064.
-            return VecBinaryOp::UMulHi16x8;
-        }
-        I32X4 => {
-            // Rule at src/isa/s390x/inst.isle line 4065.
-            return VecBinaryOp::UMulHi32x4;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vecop_umulhi", "src/isa/s390x/inst.isle line 4062"
-    )
-}
-
-// Generated as internal constructor for term vec_umulhi.
-pub fn constructor_vec_umulhi<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v3 = &constructor_vecop_umulhi(ctx, arg0);
-    let v4 = constructor_vec_rrr(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4069.
-    return v4;
-}
-
-// Generated as internal constructor for term vecop_smulhi.
-pub fn constructor_vecop_smulhi<C: Context>(ctx: &mut C, arg0: Type) -> VecBinaryOp {
-    match arg0 {
-        I8X16 => {
-            // Rule at src/isa/s390x/inst.isle line 4072.
-            return VecBinaryOp::SMulHi8x16;
-        }
-        I16X8 => {
-            // Rule at src/isa/s390x/inst.isle line 4073.
-            return VecBinaryOp::SMulHi16x8;
-        }
-        I32X4 => {
-            // Rule at src/isa/s390x/inst.isle line 4074.
-            return VecBinaryOp::SMulHi32x4;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vecop_smulhi", "src/isa/s390x/inst.isle line 4071"
-    )
-}
-
-// Generated as internal constructor for term vec_smulhi.
-pub fn constructor_vec_smulhi<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v3 = &constructor_vecop_smulhi(ctx, arg0);
-    let v4 = constructor_vec_rrr(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4078.
-    return v4;
-}
-
-// Generated as internal constructor for term vecop_umul_even.
-pub fn constructor_vecop_umul_even<C: Context>(ctx: &mut C, arg0: Type) -> VecBinaryOp {
-    match arg0 {
-        I8X16 => {
-            // Rule at src/isa/s390x/inst.isle line 4081.
-            return VecBinaryOp::UMulEven8x16;
-        }
-        I16X8 => {
-            // Rule at src/isa/s390x/inst.isle line 4082.
-            return VecBinaryOp::UMulEven16x8;
-        }
-        I32X4 => {
-            // Rule at src/isa/s390x/inst.isle line 4083.
-            return VecBinaryOp::UMulEven32x4;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vecop_umul_even", "src/isa/s390x/inst.isle line 4080"
-    )
-}
-
-// Generated as internal constructor for term vec_umul_even.
-pub fn constructor_vec_umul_even<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v3 = &constructor_vecop_umul_even(ctx, arg0);
-    let v4 = constructor_vec_rrr(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4087.
-    return v4;
-}
-
-// Generated as internal constructor for term vecop_smul_even.
-pub fn constructor_vecop_smul_even<C: Context>(ctx: &mut C, arg0: Type) -> VecBinaryOp {
-    match arg0 {
-        I8X16 => {
-            // Rule at src/isa/s390x/inst.isle line 4090.
-            return VecBinaryOp::SMulEven8x16;
-        }
-        I16X8 => {
-            // Rule at src/isa/s390x/inst.isle line 4091.
-            return VecBinaryOp::SMulEven16x8;
-        }
-        I32X4 => {
-            // Rule at src/isa/s390x/inst.isle line 4092.
-            return VecBinaryOp::SMulEven32x4;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vecop_smul_even", "src/isa/s390x/inst.isle line 4089"
-    )
-}
-
-// Generated as internal constructor for term vec_smul_even.
-pub fn constructor_vec_smul_even<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v3 = &constructor_vecop_smul_even(ctx, arg0);
-    let v4 = constructor_vec_rrr(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4096.
-    return v4;
-}
-
-// Generated as internal constructor for term vecop_umul_odd.
-pub fn constructor_vecop_umul_odd<C: Context>(ctx: &mut C, arg0: Type) -> VecBinaryOp {
-    match arg0 {
-        I8X16 => {
-            // Rule at src/isa/s390x/inst.isle line 4099.
-            return VecBinaryOp::UMulOdd8x16;
-        }
-        I16X8 => {
-            // Rule at src/isa/s390x/inst.isle line 4100.
-            return VecBinaryOp::UMulOdd16x8;
-        }
-        I32X4 => {
-            // Rule at src/isa/s390x/inst.isle line 4101.
-            return VecBinaryOp::UMulOdd32x4;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vecop_umul_odd", "src/isa/s390x/inst.isle line 4098"
-    )
-}
-
-// Generated as internal constructor for term vec_umul_odd.
-pub fn constructor_vec_umul_odd<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v3 = &constructor_vecop_umul_odd(ctx, arg0);
-    let v4 = constructor_vec_rrr(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4105.
-    return v4;
-}
-
-// Generated as internal constructor for term vecop_smul_odd.
-pub fn constructor_vecop_smul_odd<C: Context>(ctx: &mut C, arg0: Type) -> VecBinaryOp {
-    match arg0 {
-        I8X16 => {
-            // Rule at src/isa/s390x/inst.isle line 4108.
-            return VecBinaryOp::SMulOdd8x16;
-        }
-        I16X8 => {
-            // Rule at src/isa/s390x/inst.isle line 4109.
-            return VecBinaryOp::SMulOdd16x8;
-        }
-        I32X4 => {
-            // Rule at src/isa/s390x/inst.isle line 4110.
-            return VecBinaryOp::SMulOdd32x4;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vecop_smul_odd", "src/isa/s390x/inst.isle line 4107"
-    )
-}
-
-// Generated as internal constructor for term vec_smul_odd.
-pub fn constructor_vec_smul_odd<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v3 = &constructor_vecop_smul_odd(ctx, arg0);
-    let v4 = constructor_vec_rrr(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4114.
-    return v4;
-}
-
-// Generated as internal constructor for term udivmod.
-pub fn constructor_udivmod<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: RegPair,
-    arg2: Reg,
-) -> RegPair {
-    match arg0 {
-        I32 => {
-            let v3 = constructor_udivmod32(ctx, arg1, arg2);
-            // Rule at src/isa/s390x/inst.isle line 4120.
-            return v3;
-        }
-        I64 => {
-            let v4 = constructor_udivmod64(ctx, arg1, arg2);
-            // Rule at src/isa/s390x/inst.isle line 4121.
-            return v4;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "udivmod", "src/isa/s390x/inst.isle line 4119"
-    )
-}
-
-// Generated as internal constructor for term sdivmod.
-pub fn constructor_sdivmod<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> RegPair {
-    match arg0 {
-        I32 => {
-            let v3 = constructor_sdivmod32(ctx, arg1, arg2);
-            // Rule at src/isa/s390x/inst.isle line 4127.
-            return v3;
-        }
-        I64 => {
-            let v4 = constructor_sdivmod64(ctx, arg1, arg2);
-            // Rule at src/isa/s390x/inst.isle line 4128.
-            return v4;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "sdivmod", "src/isa/s390x/inst.isle line 4126"
-    )
-}
-
-// Generated as internal constructor for term vecop_umax.
-pub fn constructor_vecop_umax<C: Context>(ctx: &mut C, arg0: Type) -> VecBinaryOp {
-    match arg0 {
-        I8X16 => {
-            // Rule at src/isa/s390x/inst.isle line 4134.
-            return VecBinaryOp::UMax8x16;
-        }
-        I16X8 => {
-            // Rule at src/isa/s390x/inst.isle line 4135.
-            return VecBinaryOp::UMax16x8;
-        }
-        I32X4 => {
-            // Rule at src/isa/s390x/inst.isle line 4136.
-            return VecBinaryOp::UMax32x4;
-        }
-        I64X2 => {
-            // Rule at src/isa/s390x/inst.isle line 4137.
-            return VecBinaryOp::UMax64x2;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vecop_umax", "src/isa/s390x/inst.isle line 4133"
-    )
-}
-
-// Generated as internal constructor for term vec_umax.
-pub fn constructor_vec_umax<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v3 = &constructor_vecop_umax(ctx, arg0);
-    let v4 = constructor_vec_rrr(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4140.
-    return v4;
-}
-
-// Generated as internal constructor for term vecop_smax.
-pub fn constructor_vecop_smax<C: Context>(ctx: &mut C, arg0: Type) -> VecBinaryOp {
-    match arg0 {
-        I8X16 => {
-            // Rule at src/isa/s390x/inst.isle line 4146.
-            return VecBinaryOp::SMax8x16;
-        }
-        I16X8 => {
-            // Rule at src/isa/s390x/inst.isle line 4147.
-            return VecBinaryOp::SMax16x8;
-        }
-        I32X4 => {
-            // Rule at src/isa/s390x/inst.isle line 4148.
-            return VecBinaryOp::SMax32x4;
-        }
-        I64X2 => {
-            // Rule at src/isa/s390x/inst.isle line 4149.
-            return VecBinaryOp::SMax64x2;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vecop_smax", "src/isa/s390x/inst.isle line 4145"
-    )
-}
-
-// Generated as internal constructor for term vec_smax.
-pub fn constructor_vec_smax<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v3 = &constructor_vecop_smax(ctx, arg0);
-    let v4 = constructor_vec_rrr(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4152.
-    return v4;
-}
-
-// Generated as internal constructor for term vecop_umin.
-pub fn constructor_vecop_umin<C: Context>(ctx: &mut C, arg0: Type) -> VecBinaryOp {
-    match arg0 {
-        I8X16 => {
-            // Rule at src/isa/s390x/inst.isle line 4158.
-            return VecBinaryOp::UMin8x16;
-        }
-        I16X8 => {
-            // Rule at src/isa/s390x/inst.isle line 4159.
-            return VecBinaryOp::UMin16x8;
-        }
-        I32X4 => {
-            // Rule at src/isa/s390x/inst.isle line 4160.
-            return VecBinaryOp::UMin32x4;
-        }
-        I64X2 => {
-            // Rule at src/isa/s390x/inst.isle line 4161.
-            return VecBinaryOp::UMin64x2;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vecop_umin", "src/isa/s390x/inst.isle line 4157"
-    )
-}
-
-// Generated as internal constructor for term vec_umin.
-pub fn constructor_vec_umin<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v3 = &constructor_vecop_umin(ctx, arg0);
-    let v4 = constructor_vec_rrr(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4164.
-    return v4;
-}
-
-// Generated as internal constructor for term vecop_smin.
-pub fn constructor_vecop_smin<C: Context>(ctx: &mut C, arg0: Type) -> VecBinaryOp {
-    match arg0 {
-        I8X16 => {
-            // Rule at src/isa/s390x/inst.isle line 4170.
-            return VecBinaryOp::SMin8x16;
-        }
-        I16X8 => {
-            // Rule at src/isa/s390x/inst.isle line 4171.
-            return VecBinaryOp::SMin16x8;
-        }
-        I32X4 => {
-            // Rule at src/isa/s390x/inst.isle line 4172.
-            return VecBinaryOp::SMin32x4;
-        }
-        I64X2 => {
-            // Rule at src/isa/s390x/inst.isle line 4173.
-            return VecBinaryOp::SMin64x2;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vecop_smin", "src/isa/s390x/inst.isle line 4169"
-    )
-}
-
-// Generated as internal constructor for term vec_smin.
-pub fn constructor_vec_smin<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v3 = &constructor_vecop_smin(ctx, arg0);
-    let v4 = constructor_vec_rrr(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4176.
-    return v4;
-}
-
-// Generated as internal constructor for term vecop_uavg.
-pub fn constructor_vecop_uavg<C: Context>(ctx: &mut C, arg0: Type) -> VecBinaryOp {
-    match arg0 {
-        I8X16 => {
-            // Rule at src/isa/s390x/inst.isle line 4182.
-            return VecBinaryOp::UAvg8x16;
-        }
-        I16X8 => {
-            // Rule at src/isa/s390x/inst.isle line 4183.
-            return VecBinaryOp::UAvg16x8;
-        }
-        I32X4 => {
-            // Rule at src/isa/s390x/inst.isle line 4184.
-            return VecBinaryOp::UAvg32x4;
-        }
-        I64X2 => {
-            // Rule at src/isa/s390x/inst.isle line 4185.
-            return VecBinaryOp::UAvg64x2;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vecop_uavg", "src/isa/s390x/inst.isle line 4181"
-    )
-}
-
-// Generated as internal constructor for term vec_uavg.
-pub fn constructor_vec_uavg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v3 = &constructor_vecop_uavg(ctx, arg0);
-    let v4 = constructor_vec_rrr(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4188.
-    return v4;
-}
-
-// Generated as internal constructor for term aluop_and.
-pub fn constructor_aluop_and<C: Context>(ctx: &mut C, arg0: Type) -> ALUOp {
-    let v4 = C::gpr64_ty(ctx, arg0);
-    if let Some(v5) = v4 {
-        // Rule at src/isa/s390x/inst.isle line 4195.
-        return ALUOp::And64;
-    }
-    let v1 = C::gpr32_ty(ctx, arg0);
-    if let Some(v2) = v1 {
-        // Rule at src/isa/s390x/inst.isle line 4194.
-        return ALUOp::And32;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "aluop_and", "src/isa/s390x/inst.isle line 4193"
-    )
-}
-
-// Generated as internal constructor for term and_reg.
-pub fn constructor_and_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v3 = &constructor_aluop_and(ctx, arg0);
-    let v4 = constructor_alu_rrr(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4198.
-    return v4;
-}
-
-// Generated as internal constructor for term and_uimm16shifted.
-pub fn constructor_and_uimm16shifted<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: UImm16Shifted,
-) -> Reg {
-    let v3 = &constructor_aluop_and(ctx, arg0);
-    let v4 = constructor_alu_ruimm16shifted(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4201.
-    return v4;
-}
-
-// Generated as internal constructor for term and_uimm32shifted.
-pub fn constructor_and_uimm32shifted<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: UImm32Shifted,
-) -> Reg {
-    let v3 = &constructor_aluop_and(ctx, arg0);
-    let v4 = constructor_alu_ruimm32shifted(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4204.
-    return v4;
-}
-
-// Generated as internal constructor for term and_mem.
-pub fn constructor_and_mem<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: &MemArg) -> Reg {
-    let v3 = &constructor_aluop_and(ctx, arg0);
-    let v4 = constructor_alu_rx(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4207.
-    return v4;
-}
-
-// Generated as internal constructor for term vec_and.
-pub fn constructor_vec_and<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v1 = C::vr128_ty(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v6 = constructor_vec_rrr(ctx, v2, &VecBinaryOp::And128, arg1, arg2);
-        // Rule at src/isa/s390x/inst.isle line 4210.
-        return v6;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_and", "src/isa/s390x/inst.isle line 4209"
-    )
-}
-
-// Generated as internal constructor for term aluop_or.
-pub fn constructor_aluop_or<C: Context>(ctx: &mut C, arg0: Type) -> ALUOp {
-    let v4 = C::gpr64_ty(ctx, arg0);
-    if let Some(v5) = v4 {
-        // Rule at src/isa/s390x/inst.isle line 4217.
-        return ALUOp::Orr64;
-    }
-    let v1 = C::gpr32_ty(ctx, arg0);
-    if let Some(v2) = v1 {
-        // Rule at src/isa/s390x/inst.isle line 4216.
-        return ALUOp::Orr32;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "aluop_or", "src/isa/s390x/inst.isle line 4215"
-    )
-}
-
-// Generated as internal constructor for term or_reg.
-pub fn constructor_or_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v3 = &constructor_aluop_or(ctx, arg0);
-    let v4 = constructor_alu_rrr(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4220.
-    return v4;
-}
-
-// Generated as internal constructor for term or_uimm16shifted.
-pub fn constructor_or_uimm16shifted<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: UImm16Shifted,
-) -> Reg {
-    let v3 = &constructor_aluop_or(ctx, arg0);
-    let v4 = constructor_alu_ruimm16shifted(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4223.
-    return v4;
-}
-
-// Generated as internal constructor for term or_uimm32shifted.
-pub fn constructor_or_uimm32shifted<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: UImm32Shifted,
-) -> Reg {
-    let v3 = &constructor_aluop_or(ctx, arg0);
-    let v4 = constructor_alu_ruimm32shifted(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4226.
-    return v4;
-}
-
-// Generated as internal constructor for term or_mem.
-pub fn constructor_or_mem<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: &MemArg) -> Reg {
-    let v3 = &constructor_aluop_or(ctx, arg0);
-    let v4 = constructor_alu_rx(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4229.
-    return v4;
-}
-
-// Generated as internal constructor for term vec_or.
-pub fn constructor_vec_or<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v1 = C::vr128_ty(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v6 = constructor_vec_rrr(ctx, v2, &VecBinaryOp::Orr128, arg1, arg2);
-        // Rule at src/isa/s390x/inst.isle line 4232.
-        return v6;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_or", "src/isa/s390x/inst.isle line 4231"
-    )
-}
-
-// Generated as internal constructor for term aluop_xor.
-pub fn constructor_aluop_xor<C: Context>(ctx: &mut C, arg0: Type) -> ALUOp {
-    let v4 = C::gpr64_ty(ctx, arg0);
-    if let Some(v5) = v4 {
-        // Rule at src/isa/s390x/inst.isle line 4239.
-        return ALUOp::Xor64;
-    }
-    let v1 = C::gpr32_ty(ctx, arg0);
-    if let Some(v2) = v1 {
-        // Rule at src/isa/s390x/inst.isle line 4238.
-        return ALUOp::Xor32;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "aluop_xor", "src/isa/s390x/inst.isle line 4237"
-    )
-}
-
-// Generated as internal constructor for term xor_reg.
-pub fn constructor_xor_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v3 = &constructor_aluop_xor(ctx, arg0);
-    let v4 = constructor_alu_rrr(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4242.
-    return v4;
-}
-
-// Generated as internal constructor for term xor_uimm32shifted.
-pub fn constructor_xor_uimm32shifted<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: UImm32Shifted,
-) -> Reg {
-    let v3 = &constructor_aluop_xor(ctx, arg0);
-    let v4 = constructor_alu_ruimm32shifted(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4245.
-    return v4;
-}
-
-// Generated as internal constructor for term xor_mem.
-pub fn constructor_xor_mem<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: &MemArg) -> Reg {
-    let v3 = &constructor_aluop_xor(ctx, arg0);
-    let v4 = constructor_alu_rx(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4248.
-    return v4;
-}
-
-// Generated as internal constructor for term push_xor_uimm32shifted.
-pub fn constructor_push_xor_uimm32shifted<C: Context>(
-    ctx: &mut C,
-    arg0: &VecMInstBuilder,
-    arg1: Type,
-    arg2: WritableReg,
-    arg3: Reg,
-    arg4: UImm32Shifted,
-) -> Reg {
-    let v5 = &constructor_aluop_xor(ctx, arg1);
-    let v6 = constructor_push_alu_uimm32shifted(ctx, arg0, v5, arg2, arg3, arg4);
-    // Rule at src/isa/s390x/inst.isle line 4251.
-    return v6;
-}
-
-// Generated as internal constructor for term vec_xor.
-pub fn constructor_vec_xor<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v1 = C::vr128_ty(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v6 = constructor_vec_rrr(ctx, v2, &VecBinaryOp::Xor128, arg1, arg2);
-        // Rule at src/isa/s390x/inst.isle line 4255.
-        return v6;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_xor", "src/isa/s390x/inst.isle line 4254"
-    )
-}
-
-// Generated as internal constructor for term not_reg.
-pub fn constructor_not_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
-    let v8 = C::gpr64_ty(ctx, arg0);
-    if let Some(v9) = v8 {
-        let v6 = C::uimm32shifted(ctx, 0xFFFFFFFF, 0x0);
-        let v10 = constructor_xor_uimm32shifted(ctx, v9, arg1, v6);
-        let v12 = C::uimm32shifted(ctx, 0xFFFFFFFF, 0x20);
-        let v13 = constructor_xor_uimm32shifted(ctx, v9, v10, v12);
-        // Rule at src/isa/s390x/inst.isle line 4263.
-        return v13;
-    }
-    let v1 = C::gpr32_ty(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v6 = C::uimm32shifted(ctx, 0xFFFFFFFF, 0x0);
-        let v7 = constructor_xor_uimm32shifted(ctx, v2, arg1, v6);
-        // Rule at src/isa/s390x/inst.isle line 4261.
-        return v7;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "not_reg", "src/isa/s390x/inst.isle line 4260"
-    )
-}
-
-// Generated as internal constructor for term push_not_reg.
-pub fn constructor_push_not_reg<C: Context>(
-    ctx: &mut C,
-    arg0: &VecMInstBuilder,
-    arg1: Type,
-    arg2: WritableReg,
-    arg3: Reg,
-) -> Reg {
-    let v10 = C::gpr64_ty(ctx, arg1);
-    if let Some(v11) = v10 {
-        let v8 = C::uimm32shifted(ctx, 0xFFFFFFFF, 0x0);
-        let v12 = constructor_push_xor_uimm32shifted(ctx, arg0, v11, arg2, arg3, v8);
-        let v14 = C::uimm32shifted(ctx, 0xFFFFFFFF, 0x20);
-        let v15 = constructor_push_xor_uimm32shifted(ctx, arg0, v11, arg2, v12, v14);
-        // Rule at src/isa/s390x/inst.isle line 4271.
-        return v15;
-    }
-    let v2 = C::gpr32_ty(ctx, arg1);
-    if let Some(v3) = v2 {
-        let v8 = C::uimm32shifted(ctx, 0xFFFFFFFF, 0x0);
-        let v9 = constructor_push_xor_uimm32shifted(ctx, arg0, v3, arg2, arg3, v8);
-        // Rule at src/isa/s390x/inst.isle line 4269.
-        return v9;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "push_not_reg", "src/isa/s390x/inst.isle line 4268"
-    )
-}
-
-// Generated as internal constructor for term vec_not.
-pub fn constructor_vec_not<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
-    let v2 = constructor_vec_not_or(ctx, arg0, arg1, arg1);
-    // Rule at src/isa/s390x/inst.isle line 4276.
-    return v2;
-}
-
-// Generated as internal constructor for term aluop_not_and.
-pub fn constructor_aluop_not_and<C: Context>(ctx: &mut C, arg0: Type) -> ALUOp {
-    let v4 = C::gpr64_ty(ctx, arg0);
-    if let Some(v5) = v4 {
-        // Rule at src/isa/s390x/inst.isle line 4283.
-        return ALUOp::NotAnd64;
-    }
-    let v1 = C::gpr32_ty(ctx, arg0);
-    if let Some(v2) = v1 {
-        // Rule at src/isa/s390x/inst.isle line 4282.
-        return ALUOp::NotAnd32;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "aluop_not_and", "src/isa/s390x/inst.isle line 4281"
-    )
-}
-
-// Generated as internal constructor for term not_and_reg.
-pub fn constructor_not_and_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v3 = &constructor_aluop_not_and(ctx, arg0);
-    let v4 = constructor_alu_rrr(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4286.
-    return v4;
-}
-
-// Generated as internal constructor for term vec_not_and.
-pub fn constructor_vec_not_and<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v1 = C::vr128_ty(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v6 = constructor_vec_rrr(ctx, v2, &VecBinaryOp::NotAnd128, arg1, arg2);
-        // Rule at src/isa/s390x/inst.isle line 4289.
-        return v6;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_not_and", "src/isa/s390x/inst.isle line 4288"
-    )
-}
-
-// Generated as internal constructor for term aluop_not_or.
-pub fn constructor_aluop_not_or<C: Context>(ctx: &mut C, arg0: Type) -> ALUOp {
-    let v4 = C::gpr64_ty(ctx, arg0);
-    if let Some(v5) = v4 {
-        // Rule at src/isa/s390x/inst.isle line 4296.
-        return ALUOp::NotOrr64;
-    }
-    let v1 = C::gpr32_ty(ctx, arg0);
-    if let Some(v2) = v1 {
-        // Rule at src/isa/s390x/inst.isle line 4295.
-        return ALUOp::NotOrr32;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "aluop_not_or", "src/isa/s390x/inst.isle line 4294"
-    )
-}
-
-// Generated as internal constructor for term not_or_reg.
-pub fn constructor_not_or_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v3 = &constructor_aluop_not_or(ctx, arg0);
-    let v4 = constructor_alu_rrr(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4299.
-    return v4;
-}
-
-// Generated as internal constructor for term vec_not_or.
-pub fn constructor_vec_not_or<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v1 = C::vr128_ty(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v6 = constructor_vec_rrr(ctx, v2, &VecBinaryOp::NotOrr128, arg1, arg2);
-        // Rule at src/isa/s390x/inst.isle line 4302.
-        return v6;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_not_or", "src/isa/s390x/inst.isle line 4301"
-    )
-}
-
-// Generated as internal constructor for term aluop_not_xor.
-pub fn constructor_aluop_not_xor<C: Context>(ctx: &mut C, arg0: Type) -> ALUOp {
-    let v4 = C::gpr64_ty(ctx, arg0);
-    if let Some(v5) = v4 {
-        // Rule at src/isa/s390x/inst.isle line 4309.
-        return ALUOp::NotXor64;
-    }
-    let v1 = C::gpr32_ty(ctx, arg0);
-    if let Some(v2) = v1 {
-        // Rule at src/isa/s390x/inst.isle line 4308.
-        return ALUOp::NotXor32;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "aluop_not_xor", "src/isa/s390x/inst.isle line 4307"
-    )
-}
-
-// Generated as internal constructor for term not_xor_reg.
-pub fn constructor_not_xor_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v3 = &constructor_aluop_not_xor(ctx, arg0);
-    let v4 = constructor_alu_rrr(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4312.
-    return v4;
-}
-
-// Generated as internal constructor for term vec_not_xor.
-pub fn constructor_vec_not_xor<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v1 = C::vr128_ty(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v6 = constructor_vec_rrr(ctx, v2, &VecBinaryOp::NotXor128, arg1, arg2);
-        // Rule at src/isa/s390x/inst.isle line 4315.
-        return v6;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_not_xor", "src/isa/s390x/inst.isle line 4314"
-    )
-}
-
-// Generated as internal constructor for term aluop_and_not.
-pub fn constructor_aluop_and_not<C: Context>(ctx: &mut C, arg0: Type) -> ALUOp {
-    let v4 = C::gpr64_ty(ctx, arg0);
-    if let Some(v5) = v4 {
-        // Rule at src/isa/s390x/inst.isle line 4322.
-        return ALUOp::AndNot64;
-    }
-    let v1 = C::gpr32_ty(ctx, arg0);
-    if let Some(v2) = v1 {
-        // Rule at src/isa/s390x/inst.isle line 4321.
-        return ALUOp::AndNot32;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "aluop_and_not", "src/isa/s390x/inst.isle line 4320"
-    )
-}
-
-// Generated as internal constructor for term and_not_reg.
-pub fn constructor_and_not_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v3 = &constructor_aluop_and_not(ctx, arg0);
-    let v4 = constructor_alu_rrr(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4325.
-    return v4;
-}
-
-// Generated as internal constructor for term vec_and_not.
-pub fn constructor_vec_and_not<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v1 = C::vr128_ty(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v6 = constructor_vec_rrr(ctx, v2, &VecBinaryOp::AndNot128, arg1, arg2);
-        // Rule at src/isa/s390x/inst.isle line 4328.
-        return v6;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_and_not", "src/isa/s390x/inst.isle line 4327"
-    )
-}
-
-// Generated as internal constructor for term aluop_or_not.
-pub fn constructor_aluop_or_not<C: Context>(ctx: &mut C, arg0: Type) -> ALUOp {
-    let v4 = C::gpr64_ty(ctx, arg0);
-    if let Some(v5) = v4 {
-        // Rule at src/isa/s390x/inst.isle line 4335.
-        return ALUOp::OrrNot64;
-    }
-    let v1 = C::gpr32_ty(ctx, arg0);
-    if let Some(v2) = v1 {
-        // Rule at src/isa/s390x/inst.isle line 4334.
-        return ALUOp::OrrNot32;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "aluop_or_not", "src/isa/s390x/inst.isle line 4333"
-    )
-}
-
-// Generated as internal constructor for term or_not_reg.
-pub fn constructor_or_not_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v3 = &constructor_aluop_or_not(ctx, arg0);
-    let v4 = constructor_alu_rrr(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4338.
-    return v4;
-}
-
-// Generated as internal constructor for term vec_or_not.
-pub fn constructor_vec_or_not<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v1 = C::vr128_ty(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v6 = constructor_vec_rrr(ctx, v2, &VecBinaryOp::OrrNot128, arg1, arg2);
-        // Rule at src/isa/s390x/inst.isle line 4341.
-        return v6;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_or_not", "src/isa/s390x/inst.isle line 4340"
-    )
-}
-
-// Generated as internal constructor for term vec_bitpermute.
-pub fn constructor_vec_bitpermute<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg) -> Reg {
-    let v4 = constructor_vec_rrr(ctx, I64X2, &VecBinaryOp::BitPermute128, arg0, arg1);
-    // Rule at src/isa/s390x/inst.isle line 4347.
-    return v4;
-}
-
-// Generated as internal constructor for term unaryop_abs.
-pub fn constructor_unaryop_abs<C: Context>(ctx: &mut C, arg0: Type) -> UnaryOp {
-    match arg0 {
-        I32 => {
-            // Rule at src/isa/s390x/inst.isle line 4353.
-            return UnaryOp::Abs32;
-        }
-        I64 => {
-            // Rule at src/isa/s390x/inst.isle line 4354.
-            return UnaryOp::Abs64;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "unaryop_abs", "src/isa/s390x/inst.isle line 4352"
-    )
-}
-
-// Generated as internal constructor for term unaryop_abs_sext32.
-pub fn constructor_unaryop_abs_sext32<C: Context>(ctx: &mut C, arg0: Type) -> UnaryOp {
-    if arg0 == I64 {
-        // Rule at src/isa/s390x/inst.isle line 4357.
-        return UnaryOp::Abs64Ext32;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "unaryop_abs_sext32", "src/isa/s390x/inst.isle line 4356"
-    )
-}
-
-// Generated as internal constructor for term abs_reg.
-pub fn constructor_abs_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
-    let v2 = &constructor_unaryop_abs(ctx, arg0);
-    let v3 = constructor_unary_rr(ctx, arg0, v2, arg1);
-    // Rule at src/isa/s390x/inst.isle line 4360.
-    return v3;
-}
-
-// Generated as internal constructor for term abs_reg_sext32.
-pub fn constructor_abs_reg_sext32<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
-    let v2 = &constructor_unaryop_abs_sext32(ctx, arg0);
-    let v3 = constructor_unary_rr(ctx, arg0, v2, arg1);
-    // Rule at src/isa/s390x/inst.isle line 4363.
-    return v3;
-}
-
-// Generated as internal constructor for term vecop_abs.
-pub fn constructor_vecop_abs<C: Context>(ctx: &mut C, arg0: Type) -> VecUnaryOp {
-    match arg0 {
-        I8X16 => {
-            // Rule at src/isa/s390x/inst.isle line 4366.
-            return VecUnaryOp::Abs8x16;
-        }
-        I16X8 => {
-            // Rule at src/isa/s390x/inst.isle line 4367.
-            return VecUnaryOp::Abs16x8;
-        }
-        I32X4 => {
-            // Rule at src/isa/s390x/inst.isle line 4368.
-            return VecUnaryOp::Abs32x4;
-        }
-        I64X2 => {
-            // Rule at src/isa/s390x/inst.isle line 4369.
-            return VecUnaryOp::Abs64x2;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vecop_abs", "src/isa/s390x/inst.isle line 4365"
-    )
-}
-
-// Generated as internal constructor for term vec_abs.
-pub fn constructor_vec_abs<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
-    let v2 = &constructor_vecop_abs(ctx, arg0);
-    let v3 = constructor_vec_rr(ctx, arg0, v2, arg1);
-    // Rule at src/isa/s390x/inst.isle line 4372.
-    return v3;
-}
-
-// Generated as internal constructor for term unaryop_neg.
-pub fn constructor_unaryop_neg<C: Context>(ctx: &mut C, arg0: Type) -> UnaryOp {
-    match arg0 {
-        I8 => {
-            // Rule at src/isa/s390x/inst.isle line 4378.
-            return UnaryOp::Neg32;
-        }
-        I16 => {
-            // Rule at src/isa/s390x/inst.isle line 4379.
-            return UnaryOp::Neg32;
-        }
-        I32 => {
-            // Rule at src/isa/s390x/inst.isle line 4380.
-            return UnaryOp::Neg32;
-        }
-        I64 => {
-            // Rule at src/isa/s390x/inst.isle line 4381.
-            return UnaryOp::Neg64;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "unaryop_neg", "src/isa/s390x/inst.isle line 4377"
-    )
-}
-
-// Generated as internal constructor for term unaryop_neg_sext32.
-pub fn constructor_unaryop_neg_sext32<C: Context>(ctx: &mut C, arg0: Type) -> UnaryOp {
-    if arg0 == I64 {
-        // Rule at src/isa/s390x/inst.isle line 4384.
-        return UnaryOp::Neg64Ext32;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "unaryop_neg_sext32", "src/isa/s390x/inst.isle line 4383"
-    )
-}
-
-// Generated as internal constructor for term neg_reg.
-pub fn constructor_neg_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
-    let v2 = &constructor_unaryop_neg(ctx, arg0);
-    let v3 = constructor_unary_rr(ctx, arg0, v2, arg1);
-    // Rule at src/isa/s390x/inst.isle line 4387.
-    return v3;
-}
-
-// Generated as internal constructor for term neg_reg_sext32.
-pub fn constructor_neg_reg_sext32<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
-    let v2 = &constructor_unaryop_neg_sext32(ctx, arg0);
-    let v3 = constructor_unary_rr(ctx, arg0, v2, arg1);
-    // Rule at src/isa/s390x/inst.isle line 4390.
-    return v3;
-}
-
-// Generated as internal constructor for term vecop_neg.
-pub fn constructor_vecop_neg<C: Context>(ctx: &mut C, arg0: Type) -> VecUnaryOp {
-    match arg0 {
-        I8X16 => {
-            // Rule at src/isa/s390x/inst.isle line 4393.
-            return VecUnaryOp::Neg8x16;
-        }
-        I16X8 => {
-            // Rule at src/isa/s390x/inst.isle line 4394.
-            return VecUnaryOp::Neg16x8;
-        }
-        I32X4 => {
-            // Rule at src/isa/s390x/inst.isle line 4395.
-            return VecUnaryOp::Neg32x4;
-        }
-        I64X2 => {
-            // Rule at src/isa/s390x/inst.isle line 4396.
-            return VecUnaryOp::Neg64x2;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vecop_neg", "src/isa/s390x/inst.isle line 4392"
-    )
-}
-
-// Generated as internal constructor for term vec_neg.
-pub fn constructor_vec_neg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
-    let v2 = &constructor_vecop_neg(ctx, arg0);
-    let v3 = constructor_vec_rr(ctx, arg0, v2, arg1);
-    // Rule at src/isa/s390x/inst.isle line 4399.
-    return v3;
-}
-
-// Generated as internal constructor for term unaryop_bswap.
-pub fn constructor_unaryop_bswap<C: Context>(ctx: &mut C, arg0: Type) -> UnaryOp {
-    match arg0 {
-        I32 => {
-            // Rule at src/isa/s390x/inst.isle line 4405.
-            return UnaryOp::BSwap32;
-        }
-        I64 => {
-            // Rule at src/isa/s390x/inst.isle line 4406.
-            return UnaryOp::BSwap64;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "unaryop_bswap", "src/isa/s390x/inst.isle line 4404"
-    )
-}
-
-// Generated as internal constructor for term bswap_reg.
-pub fn constructor_bswap_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
-    let v2 = &constructor_unaryop_bswap(ctx, arg0);
-    let v3 = constructor_unary_rr(ctx, arg0, v2, arg1);
-    // Rule at src/isa/s390x/inst.isle line 4409.
-    return v3;
-}
-
-// Generated as internal constructor for term push_bswap_reg.
-pub fn constructor_push_bswap_reg<C: Context>(
-    ctx: &mut C,
-    arg0: &VecMInstBuilder,
-    arg1: Type,
-    arg2: WritableReg,
-    arg3: Reg,
-) -> Reg {
-    let v4 = &constructor_unaryop_bswap(ctx, arg1);
-    let v5 = constructor_push_unary(ctx, arg0, v4, arg2, arg3);
-    // Rule at src/isa/s390x/inst.isle line 4412.
-    return v5;
-}
-
-// Generated as internal constructor for term shiftop_rot.
-pub fn constructor_shiftop_rot<C: Context>(ctx: &mut C, arg0: Type) -> ShiftOp {
-    match arg0 {
-        I32 => {
-            // Rule at src/isa/s390x/inst.isle line 4418.
-            return ShiftOp::RotL32;
-        }
-        I64 => {
-            // Rule at src/isa/s390x/inst.isle line 4419.
-            return ShiftOp::RotL64;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "shiftop_rot", "src/isa/s390x/inst.isle line 4417"
-    )
-}
-
-// Generated as internal constructor for term rot_reg.
-pub fn constructor_rot_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v3 = &constructor_shiftop_rot(ctx, arg0);
-    let v5 = constructor_shift_rr(ctx, arg0, v3, arg1, 0x0, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4422.
-    return v5;
-}
-
-// Generated as internal constructor for term rot_imm.
-pub fn constructor_rot_imm<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: u8) -> Reg {
-    let v3 = &constructor_shiftop_rot(ctx, arg0);
-    let v4 = C::zero_reg(ctx);
-    let v5 = constructor_shift_rr(ctx, arg0, v3, arg1, arg2, v4);
-    // Rule at src/isa/s390x/inst.isle line 4426.
-    return v5;
-}
-
-// Generated as internal constructor for term rot_imm_reg.
-pub fn constructor_rot_imm_reg<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: u8,
-    arg3: Reg,
-) -> Reg {
-    let v4 = &constructor_shiftop_rot(ctx, arg0);
-    let v5 = constructor_shift_rr(ctx, arg0, v4, arg1, arg2, arg3);
-    // Rule at src/isa/s390x/inst.isle line 4430.
-    return v5;
-}
-
-// Generated as internal constructor for term push_rot_imm_reg.
-pub fn constructor_push_rot_imm_reg<C: Context>(
-    ctx: &mut C,
-    arg0: &VecMInstBuilder,
-    arg1: Type,
-    arg2: WritableReg,
-    arg3: Reg,
-    arg4: u8,
-    arg5: Reg,
-) -> Reg {
-    let v6 = &constructor_shiftop_rot(ctx, arg1);
-    let v7 = constructor_push_shift(ctx, arg0, v6, arg2, arg3, arg4, arg5);
-    // Rule at src/isa/s390x/inst.isle line 4434.
-    return v7;
-}
-
-// Generated as internal constructor for term vec_shiftop_rot.
-pub fn constructor_vec_shiftop_rot<C: Context>(ctx: &mut C, arg0: Type) -> VecShiftOp {
-    match arg0 {
-        I8X16 => {
-            // Rule at src/isa/s390x/inst.isle line 4438.
-            return VecShiftOp::RotL8x16;
-        }
-        I16X8 => {
-            // Rule at src/isa/s390x/inst.isle line 4439.
-            return VecShiftOp::RotL16x8;
-        }
-        I32X4 => {
-            // Rule at src/isa/s390x/inst.isle line 4440.
-            return VecShiftOp::RotL32x4;
-        }
-        I64X2 => {
-            // Rule at src/isa/s390x/inst.isle line 4441.
-            return VecShiftOp::RotL64x2;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_shiftop_rot", "src/isa/s390x/inst.isle line 4437"
-    )
-}
-
-// Generated as internal constructor for term vec_rot_reg.
-pub fn constructor_vec_rot_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v3 = &constructor_vec_shiftop_rot(ctx, arg0);
-    let v5 = constructor_vec_shift_rr(ctx, arg0, v3, arg1, 0x0, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4444.
-    return v5;
-}
-
-// Generated as internal constructor for term vec_rot_imm.
-pub fn constructor_vec_rot_imm<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: u8) -> Reg {
-    let v3 = &constructor_vec_shiftop_rot(ctx, arg0);
-    let v4 = C::zero_reg(ctx);
-    let v5 = constructor_vec_shift_rr(ctx, arg0, v3, arg1, arg2, v4);
-    // Rule at src/isa/s390x/inst.isle line 4448.
-    return v5;
-}
-
-// Generated as internal constructor for term shiftop_lshl.
-pub fn constructor_shiftop_lshl<C: Context>(ctx: &mut C, arg0: Type) -> ShiftOp {
-    match arg0 {
-        I8 => {
-            // Rule at src/isa/s390x/inst.isle line 4455.
-            return ShiftOp::LShL32;
-        }
-        I16 => {
-            // Rule at src/isa/s390x/inst.isle line 4456.
-            return ShiftOp::LShL32;
-        }
-        I32 => {
-            // Rule at src/isa/s390x/inst.isle line 4457.
-            return ShiftOp::LShL32;
-        }
-        I64 => {
-            // Rule at src/isa/s390x/inst.isle line 4458.
-            return ShiftOp::LShL64;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "shiftop_lshl", "src/isa/s390x/inst.isle line 4454"
-    )
-}
-
-// Generated as internal constructor for term lshl_reg.
-pub fn constructor_lshl_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v3 = &constructor_shiftop_lshl(ctx, arg0);
-    let v5 = constructor_shift_rr(ctx, arg0, v3, arg1, 0x0, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4461.
-    return v5;
-}
-
-// Generated as internal constructor for term lshl_imm.
-pub fn constructor_lshl_imm<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: u8) -> Reg {
-    let v3 = &constructor_shiftop_lshl(ctx, arg0);
-    let v4 = C::zero_reg(ctx);
-    let v5 = constructor_shift_rr(ctx, arg0, v3, arg1, arg2, v4);
-    // Rule at src/isa/s390x/inst.isle line 4465.
-    return v5;
-}
-
-// Generated as internal constructor for term vec_shiftop_lshl.
-pub fn constructor_vec_shiftop_lshl<C: Context>(ctx: &mut C, arg0: Type) -> VecShiftOp {
-    match arg0 {
-        I8X16 => {
-            // Rule at src/isa/s390x/inst.isle line 4469.
-            return VecShiftOp::LShL8x16;
-        }
-        I16X8 => {
-            // Rule at src/isa/s390x/inst.isle line 4470.
-            return VecShiftOp::LShL16x8;
-        }
-        I32X4 => {
-            // Rule at src/isa/s390x/inst.isle line 4471.
-            return VecShiftOp::LShL32x4;
-        }
-        I64X2 => {
-            // Rule at src/isa/s390x/inst.isle line 4472.
-            return VecShiftOp::LShL64x2;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_shiftop_lshl", "src/isa/s390x/inst.isle line 4468"
-    )
-}
-
-// Generated as internal constructor for term vec_lshl_reg.
-pub fn constructor_vec_lshl_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v3 = &constructor_vec_shiftop_lshl(ctx, arg0);
-    let v5 = constructor_vec_shift_rr(ctx, arg0, v3, arg1, 0x0, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4475.
-    return v5;
-}
-
-// Generated as internal constructor for term vec_lshl_imm.
-pub fn constructor_vec_lshl_imm<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: u8) -> Reg {
-    let v3 = &constructor_vec_shiftop_lshl(ctx, arg0);
-    let v4 = C::zero_reg(ctx);
-    let v5 = constructor_vec_shift_rr(ctx, arg0, v3, arg1, arg2, v4);
-    // Rule at src/isa/s390x/inst.isle line 4479.
-    return v5;
-}
-
-// Generated as internal constructor for term vec_lshl_by_byte.
-pub fn constructor_vec_lshl_by_byte<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg) -> Reg {
-    let v4 = constructor_vec_rrr(ctx, I8X16, &VecBinaryOp::LShLByByte128, arg0, arg1);
-    // Rule at src/isa/s390x/inst.isle line 4483.
-    return v4;
-}
-
-// Generated as internal constructor for term vec_lshl_by_bit.
-pub fn constructor_vec_lshl_by_bit<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg) -> Reg {
-    let v4 = constructor_vec_rrr(ctx, I8X16, &VecBinaryOp::LShLByBit128, arg0, arg1);
-    // Rule at src/isa/s390x/inst.isle line 4486.
-    return v4;
-}
-
-// Generated as internal constructor for term shiftop_lshr.
-pub fn constructor_shiftop_lshr<C: Context>(ctx: &mut C, arg0: Type) -> ShiftOp {
-    match arg0 {
-        I32 => {
-            // Rule at src/isa/s390x/inst.isle line 4492.
-            return ShiftOp::LShR32;
-        }
-        I64 => {
-            // Rule at src/isa/s390x/inst.isle line 4493.
-            return ShiftOp::LShR64;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "shiftop_lshr", "src/isa/s390x/inst.isle line 4491"
-    )
-}
-
-// Generated as internal constructor for term lshr_reg.
-pub fn constructor_lshr_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v3 = &constructor_shiftop_lshr(ctx, arg0);
-    let v5 = constructor_shift_rr(ctx, arg0, v3, arg1, 0x0, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4496.
-    return v5;
-}
-
-// Generated as internal constructor for term lshr_imm.
-pub fn constructor_lshr_imm<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: u8) -> Reg {
-    let v3 = &constructor_shiftop_lshr(ctx, arg0);
-    let v4 = C::zero_reg(ctx);
-    let v5 = constructor_shift_rr(ctx, arg0, v3, arg1, arg2, v4);
-    // Rule at src/isa/s390x/inst.isle line 4500.
-    return v5;
-}
-
-// Generated as internal constructor for term vec_shiftop_lshr.
-pub fn constructor_vec_shiftop_lshr<C: Context>(ctx: &mut C, arg0: Type) -> VecShiftOp {
-    match arg0 {
-        I8X16 => {
-            // Rule at src/isa/s390x/inst.isle line 4504.
-            return VecShiftOp::LShR8x16;
-        }
-        I16X8 => {
-            // Rule at src/isa/s390x/inst.isle line 4505.
-            return VecShiftOp::LShR16x8;
-        }
-        I32X4 => {
-            // Rule at src/isa/s390x/inst.isle line 4506.
-            return VecShiftOp::LShR32x4;
-        }
-        I64X2 => {
-            // Rule at src/isa/s390x/inst.isle line 4507.
-            return VecShiftOp::LShR64x2;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_shiftop_lshr", "src/isa/s390x/inst.isle line 4503"
-    )
-}
-
-// Generated as internal constructor for term vec_lshr_reg.
-pub fn constructor_vec_lshr_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v3 = &constructor_vec_shiftop_lshr(ctx, arg0);
-    let v5 = constructor_vec_shift_rr(ctx, arg0, v3, arg1, 0x0, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4510.
-    return v5;
-}
-
-// Generated as internal constructor for term vec_lshr_imm.
-pub fn constructor_vec_lshr_imm<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: u8) -> Reg {
-    let v3 = &constructor_vec_shiftop_lshr(ctx, arg0);
-    let v4 = C::zero_reg(ctx);
-    let v5 = constructor_vec_shift_rr(ctx, arg0, v3, arg1, arg2, v4);
-    // Rule at src/isa/s390x/inst.isle line 4514.
-    return v5;
-}
-
-// Generated as internal constructor for term vec_lshr_by_byte.
-pub fn constructor_vec_lshr_by_byte<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg) -> Reg {
-    let v4 = constructor_vec_rrr(ctx, I8X16, &VecBinaryOp::LShRByByte128, arg0, arg1);
-    // Rule at src/isa/s390x/inst.isle line 4518.
-    return v4;
-}
-
-// Generated as internal constructor for term vec_lshr_by_bit.
-pub fn constructor_vec_lshr_by_bit<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg) -> Reg {
-    let v4 = constructor_vec_rrr(ctx, I8X16, &VecBinaryOp::LShRByBit128, arg0, arg1);
-    // Rule at src/isa/s390x/inst.isle line 4521.
-    return v4;
-}
-
-// Generated as internal constructor for term shiftop_ashr.
-pub fn constructor_shiftop_ashr<C: Context>(ctx: &mut C, arg0: Type) -> ShiftOp {
-    match arg0 {
-        I32 => {
-            // Rule at src/isa/s390x/inst.isle line 4527.
-            return ShiftOp::AShR32;
-        }
-        I64 => {
-            // Rule at src/isa/s390x/inst.isle line 4528.
-            return ShiftOp::AShR64;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "shiftop_ashr", "src/isa/s390x/inst.isle line 4526"
-    )
-}
-
-// Generated as internal constructor for term ashr_reg.
-pub fn constructor_ashr_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v3 = &constructor_shiftop_ashr(ctx, arg0);
-    let v5 = constructor_shift_rr(ctx, arg0, v3, arg1, 0x0, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4531.
-    return v5;
-}
-
-// Generated as internal constructor for term ashr_imm.
-pub fn constructor_ashr_imm<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: u8) -> Reg {
-    let v3 = &constructor_shiftop_ashr(ctx, arg0);
-    let v4 = C::zero_reg(ctx);
-    let v5 = constructor_shift_rr(ctx, arg0, v3, arg1, arg2, v4);
-    // Rule at src/isa/s390x/inst.isle line 4535.
-    return v5;
-}
-
-// Generated as internal constructor for term vec_shiftop_ashr.
-pub fn constructor_vec_shiftop_ashr<C: Context>(ctx: &mut C, arg0: Type) -> VecShiftOp {
-    match arg0 {
-        I8X16 => {
-            // Rule at src/isa/s390x/inst.isle line 4539.
-            return VecShiftOp::AShR8x16;
-        }
-        I16X8 => {
-            // Rule at src/isa/s390x/inst.isle line 4540.
-            return VecShiftOp::AShR16x8;
-        }
-        I32X4 => {
-            // Rule at src/isa/s390x/inst.isle line 4541.
-            return VecShiftOp::AShR32x4;
-        }
-        I64X2 => {
-            // Rule at src/isa/s390x/inst.isle line 4542.
-            return VecShiftOp::AShR64x2;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_shiftop_ashr", "src/isa/s390x/inst.isle line 4538"
-    )
-}
-
-// Generated as internal constructor for term vec_ashr_reg.
-pub fn constructor_vec_ashr_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v3 = &constructor_vec_shiftop_ashr(ctx, arg0);
-    let v5 = constructor_vec_shift_rr(ctx, arg0, v3, arg1, 0x0, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4545.
-    return v5;
-}
-
-// Generated as internal constructor for term vec_ashr_imm.
-pub fn constructor_vec_ashr_imm<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: u8) -> Reg {
-    let v3 = &constructor_vec_shiftop_ashr(ctx, arg0);
-    let v4 = C::zero_reg(ctx);
-    let v5 = constructor_vec_shift_rr(ctx, arg0, v3, arg1, arg2, v4);
-    // Rule at src/isa/s390x/inst.isle line 4549.
-    return v5;
-}
-
-// Generated as internal constructor for term vec_ashr_by_byte.
-pub fn constructor_vec_ashr_by_byte<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg) -> Reg {
-    let v4 = constructor_vec_rrr(ctx, I8X16, &VecBinaryOp::AShRByByte128, arg0, arg1);
-    // Rule at src/isa/s390x/inst.isle line 4553.
-    return v4;
-}
-
-// Generated as internal constructor for term vec_ashr_by_bit.
-pub fn constructor_vec_ashr_by_bit<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg) -> Reg {
-    let v4 = constructor_vec_rrr(ctx, I8X16, &VecBinaryOp::AShRByBit128, arg0, arg1);
-    // Rule at src/isa/s390x/inst.isle line 4556.
-    return v4;
-}
-
-// Generated as internal constructor for term popcnt_byte.
-pub fn constructor_popcnt_byte<C: Context>(ctx: &mut C, arg0: Reg) -> Reg {
-    let v3 = constructor_unary_rr(ctx, I64, &UnaryOp::PopcntByte, arg0);
-    // Rule at src/isa/s390x/inst.isle line 4562.
-    return v3;
-}
-
-// Generated as internal constructor for term popcnt_reg.
-pub fn constructor_popcnt_reg<C: Context>(ctx: &mut C, arg0: Reg) -> Reg {
-    let v3 = constructor_unary_rr(ctx, I64, &UnaryOp::PopcntReg, arg0);
-    // Rule at src/isa/s390x/inst.isle line 4565.
-    return v3;
-}
-
-// Generated as internal constructor for term vecop_popcnt.
-pub fn constructor_vecop_popcnt<C: Context>(ctx: &mut C, arg0: Type) -> VecUnaryOp {
-    match arg0 {
-        I8X16 => {
-            // Rule at src/isa/s390x/inst.isle line 4568.
-            return VecUnaryOp::Popcnt8x16;
-        }
-        I16X8 => {
-            // Rule at src/isa/s390x/inst.isle line 4569.
-            return VecUnaryOp::Popcnt16x8;
-        }
-        I32X4 => {
-            // Rule at src/isa/s390x/inst.isle line 4570.
-            return VecUnaryOp::Popcnt32x4;
-        }
-        I64X2 => {
-            // Rule at src/isa/s390x/inst.isle line 4571.
-            return VecUnaryOp::Popcnt64x2;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vecop_popcnt", "src/isa/s390x/inst.isle line 4567"
-    )
-}
-
-// Generated as internal constructor for term vec_popcnt.
-pub fn constructor_vec_popcnt<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
-    let v2 = &constructor_vecop_popcnt(ctx, arg0);
-    let v3 = constructor_vec_rr(ctx, arg0, v2, arg1);
-    // Rule at src/isa/s390x/inst.isle line 4574.
-    return v3;
-}
-
-// Generated as internal constructor for term atomic_rmw_and.
-pub fn constructor_atomic_rmw_and<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: &MemArg,
-) -> Reg {
-    match arg0 {
-        I32 => {
-            let v5 = constructor_atomic_rmw_impl(ctx, I32, &ALUOp::And32, arg1, arg2);
-            // Rule at src/isa/s390x/inst.isle line 4580.
-            return v5;
-        }
-        I64 => {
-            let v8 = constructor_atomic_rmw_impl(ctx, I64, &ALUOp::And64, arg1, arg2);
-            // Rule at src/isa/s390x/inst.isle line 4581.
-            return v8;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "atomic_rmw_and", "src/isa/s390x/inst.isle line 4579"
-    )
-}
-
-// Generated as internal constructor for term atomic_rmw_or.
-pub fn constructor_atomic_rmw_or<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: &MemArg,
-) -> Reg {
-    match arg0 {
-        I32 => {
-            let v5 = constructor_atomic_rmw_impl(ctx, I32, &ALUOp::Orr32, arg1, arg2);
-            // Rule at src/isa/s390x/inst.isle line 4584.
-            return v5;
-        }
-        I64 => {
-            let v8 = constructor_atomic_rmw_impl(ctx, I64, &ALUOp::Orr64, arg1, arg2);
-            // Rule at src/isa/s390x/inst.isle line 4585.
-            return v8;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "atomic_rmw_or", "src/isa/s390x/inst.isle line 4583"
-    )
-}
-
-// Generated as internal constructor for term atomic_rmw_xor.
-pub fn constructor_atomic_rmw_xor<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: &MemArg,
-) -> Reg {
-    match arg0 {
-        I32 => {
-            let v5 = constructor_atomic_rmw_impl(ctx, I32, &ALUOp::Xor32, arg1, arg2);
-            // Rule at src/isa/s390x/inst.isle line 4588.
-            return v5;
-        }
-        I64 => {
-            let v8 = constructor_atomic_rmw_impl(ctx, I64, &ALUOp::Xor64, arg1, arg2);
-            // Rule at src/isa/s390x/inst.isle line 4589.
-            return v8;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "atomic_rmw_xor", "src/isa/s390x/inst.isle line 4587"
-    )
-}
-
-// Generated as internal constructor for term atomic_rmw_add.
-pub fn constructor_atomic_rmw_add<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: &MemArg,
-) -> Reg {
-    match arg0 {
-        I32 => {
-            let v5 = constructor_atomic_rmw_impl(ctx, I32, &ALUOp::Add32, arg1, arg2);
-            // Rule at src/isa/s390x/inst.isle line 4592.
-            return v5;
-        }
-        I64 => {
-            let v8 = constructor_atomic_rmw_impl(ctx, I64, &ALUOp::Add64, arg1, arg2);
-            // Rule at src/isa/s390x/inst.isle line 4593.
-            return v8;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "atomic_rmw_add", "src/isa/s390x/inst.isle line 4591"
-    )
-}
-
-// Generated as internal constructor for term atomic_cas_impl.
-pub fn constructor_atomic_cas_impl<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: Reg,
-    arg3: &MemArg,
-) -> Reg {
-    match arg0 {
-        I32 => {
-            let v4 = constructor_atomic_cas32(ctx, arg1, arg2, arg3);
-            // Rule at src/isa/s390x/inst.isle line 4599.
-            return v4;
-        }
-        I64 => {
-            let v5 = constructor_atomic_cas64(ctx, arg1, arg2, arg3);
-            // Rule at src/isa/s390x/inst.isle line 4600.
-            return v5;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "atomic_cas_impl", "src/isa/s390x/inst.isle line 4598"
-    )
-}
-
-// Generated as internal constructor for term push_atomic_cas.
-pub fn constructor_push_atomic_cas<C: Context>(
-    ctx: &mut C,
-    arg0: &VecMInstBuilder,
-    arg1: Type,
-    arg2: WritableReg,
-    arg3: Reg,
-    arg4: &MemArg,
-) -> Reg {
-    match arg1 {
-        I32 => {
-            let v5 = constructor_push_atomic_cas32(ctx, arg0, arg2, arg3, arg4);
-            // Rule at src/isa/s390x/inst.isle line 4603.
-            return v5;
-        }
-        I64 => {
-            let v6 = constructor_push_atomic_cas64(ctx, arg0, arg2, arg3, arg4);
-            // Rule at src/isa/s390x/inst.isle line 4604.
-            return v6;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "push_atomic_cas", "src/isa/s390x/inst.isle line 4602"
-    )
-}
-
-// Generated as internal constructor for term fpuop2_add.
-pub fn constructor_fpuop2_add<C: Context>(ctx: &mut C, arg0: Type) -> FPUOp2 {
-    match arg0 {
-        F32 => {
-            // Rule at src/isa/s390x/inst.isle line 4610.
-            return FPUOp2::Add32;
-        }
-        F64 => {
-            // Rule at src/isa/s390x/inst.isle line 4611.
-            return FPUOp2::Add64;
-        }
-        F32X4 => {
-            // Rule at src/isa/s390x/inst.isle line 4612.
-            return FPUOp2::Add32x4;
-        }
-        F64X2 => {
-            // Rule at src/isa/s390x/inst.isle line 4613.
-            return FPUOp2::Add64x2;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "fpuop2_add", "src/isa/s390x/inst.isle line 4609"
-    )
-}
-
-// Generated as internal constructor for term fadd_reg.
-pub fn constructor_fadd_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v3 = &constructor_fpuop2_add(ctx, arg0);
-    let v4 = constructor_fpu_rrr(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4616.
-    return v4;
-}
-
-// Generated as internal constructor for term fpuop2_sub.
-pub fn constructor_fpuop2_sub<C: Context>(ctx: &mut C, arg0: Type) -> FPUOp2 {
-    match arg0 {
-        F32 => {
-            // Rule at src/isa/s390x/inst.isle line 4622.
-            return FPUOp2::Sub32;
-        }
-        F64 => {
-            // Rule at src/isa/s390x/inst.isle line 4623.
-            return FPUOp2::Sub64;
-        }
-        F32X4 => {
-            // Rule at src/isa/s390x/inst.isle line 4624.
-            return FPUOp2::Sub32x4;
-        }
-        F64X2 => {
-            // Rule at src/isa/s390x/inst.isle line 4625.
-            return FPUOp2::Sub64x2;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "fpuop2_sub", "src/isa/s390x/inst.isle line 4621"
-    )
-}
-
-// Generated as internal constructor for term fsub_reg.
-pub fn constructor_fsub_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v3 = &constructor_fpuop2_sub(ctx, arg0);
-    let v4 = constructor_fpu_rrr(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4628.
-    return v4;
-}
-
-// Generated as internal constructor for term fpuop2_mul.
-pub fn constructor_fpuop2_mul<C: Context>(ctx: &mut C, arg0: Type) -> FPUOp2 {
-    match arg0 {
-        F32 => {
-            // Rule at src/isa/s390x/inst.isle line 4634.
-            return FPUOp2::Mul32;
-        }
-        F64 => {
-            // Rule at src/isa/s390x/inst.isle line 4635.
-            return FPUOp2::Mul64;
-        }
-        F32X4 => {
-            // Rule at src/isa/s390x/inst.isle line 4636.
-            return FPUOp2::Mul32x4;
-        }
-        F64X2 => {
-            // Rule at src/isa/s390x/inst.isle line 4637.
-            return FPUOp2::Mul64x2;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "fpuop2_mul", "src/isa/s390x/inst.isle line 4633"
-    )
-}
-
-// Generated as internal constructor for term fmul_reg.
-pub fn constructor_fmul_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v3 = &constructor_fpuop2_mul(ctx, arg0);
-    let v4 = constructor_fpu_rrr(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4640.
-    return v4;
-}
-
-// Generated as internal constructor for term fpuop2_div.
-pub fn constructor_fpuop2_div<C: Context>(ctx: &mut C, arg0: Type) -> FPUOp2 {
-    match arg0 {
-        F32 => {
-            // Rule at src/isa/s390x/inst.isle line 4646.
-            return FPUOp2::Div32;
-        }
-        F64 => {
-            // Rule at src/isa/s390x/inst.isle line 4647.
-            return FPUOp2::Div64;
-        }
-        F32X4 => {
-            // Rule at src/isa/s390x/inst.isle line 4648.
-            return FPUOp2::Div32x4;
-        }
-        F64X2 => {
-            // Rule at src/isa/s390x/inst.isle line 4649.
-            return FPUOp2::Div64x2;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "fpuop2_div", "src/isa/s390x/inst.isle line 4645"
-    )
-}
-
-// Generated as internal constructor for term fdiv_reg.
-pub fn constructor_fdiv_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v3 = &constructor_fpuop2_div(ctx, arg0);
-    let v4 = constructor_fpu_rrr(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4652.
-    return v4;
-}
-
-// Generated as internal constructor for term fpuop2_min.
-pub fn constructor_fpuop2_min<C: Context>(ctx: &mut C, arg0: Type) -> FPUOp2 {
-    match arg0 {
-        F32 => {
-            // Rule at src/isa/s390x/inst.isle line 4658.
-            return FPUOp2::Min32;
-        }
-        F64 => {
-            // Rule at src/isa/s390x/inst.isle line 4659.
-            return FPUOp2::Min64;
-        }
-        F32X4 => {
-            // Rule at src/isa/s390x/inst.isle line 4660.
-            return FPUOp2::Min32x4;
-        }
-        F64X2 => {
-            // Rule at src/isa/s390x/inst.isle line 4661.
-            return FPUOp2::Min64x2;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "fpuop2_min", "src/isa/s390x/inst.isle line 4657"
-    )
-}
-
-// Generated as internal constructor for term fmin_reg.
-pub fn constructor_fmin_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v3 = &constructor_fpuop2_min(ctx, arg0);
-    let v4 = constructor_fpu_rrr(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4664.
-    return v4;
-}
-
-// Generated as internal constructor for term fpuop2_max.
-pub fn constructor_fpuop2_max<C: Context>(ctx: &mut C, arg0: Type) -> FPUOp2 {
-    match arg0 {
-        F32 => {
-            // Rule at src/isa/s390x/inst.isle line 4670.
-            return FPUOp2::Max32;
-        }
-        F64 => {
-            // Rule at src/isa/s390x/inst.isle line 4671.
-            return FPUOp2::Max64;
-        }
-        F32X4 => {
-            // Rule at src/isa/s390x/inst.isle line 4672.
-            return FPUOp2::Max32x4;
-        }
-        F64X2 => {
-            // Rule at src/isa/s390x/inst.isle line 4673.
-            return FPUOp2::Max64x2;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "fpuop2_max", "src/isa/s390x/inst.isle line 4669"
-    )
-}
-
-// Generated as internal constructor for term fmax_reg.
-pub fn constructor_fmax_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v3 = &constructor_fpuop2_max(ctx, arg0);
-    let v4 = constructor_fpu_rrr(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4676.
-    return v4;
-}
-
-// Generated as internal constructor for term fpuop2_min_pseudo.
-pub fn constructor_fpuop2_min_pseudo<C: Context>(ctx: &mut C, arg0: Type) -> FPUOp2 {
-    match arg0 {
-        F32 => {
-            // Rule at src/isa/s390x/inst.isle line 4682.
-            return FPUOp2::MinPseudo32;
-        }
-        F64 => {
-            // Rule at src/isa/s390x/inst.isle line 4683.
-            return FPUOp2::MinPseudo64;
-        }
-        F32X4 => {
-            // Rule at src/isa/s390x/inst.isle line 4684.
-            return FPUOp2::MinPseudo32x4;
-        }
-        F64X2 => {
-            // Rule at src/isa/s390x/inst.isle line 4685.
-            return FPUOp2::MinPseudo64x2;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "fpuop2_min_pseudo", "src/isa/s390x/inst.isle line 4681"
-    )
-}
-
-// Generated as internal constructor for term fmin_pseudo_reg.
-pub fn constructor_fmin_pseudo_reg<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: Reg,
-) -> Reg {
-    let v3 = &constructor_fpuop2_min_pseudo(ctx, arg0);
-    let v4 = constructor_fpu_rrr(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4688.
-    return v4;
-}
-
-// Generated as internal constructor for term fpuop2_max_pseudo.
-pub fn constructor_fpuop2_max_pseudo<C: Context>(ctx: &mut C, arg0: Type) -> FPUOp2 {
-    match arg0 {
-        F32 => {
-            // Rule at src/isa/s390x/inst.isle line 4694.
-            return FPUOp2::MaxPseudo32;
-        }
-        F64 => {
-            // Rule at src/isa/s390x/inst.isle line 4695.
-            return FPUOp2::MaxPseudo64;
-        }
-        F32X4 => {
-            // Rule at src/isa/s390x/inst.isle line 4696.
-            return FPUOp2::MaxPseudo32x4;
-        }
-        F64X2 => {
-            // Rule at src/isa/s390x/inst.isle line 4697.
-            return FPUOp2::MaxPseudo64x2;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "fpuop2_max_pseudo", "src/isa/s390x/inst.isle line 4693"
-    )
-}
-
-// Generated as internal constructor for term fmax_pseudo_reg.
-pub fn constructor_fmax_pseudo_reg<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: Reg,
-) -> Reg {
-    let v3 = &constructor_fpuop2_max_pseudo(ctx, arg0);
-    let v4 = constructor_fpu_rrr(ctx, arg0, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4700.
-    return v4;
-}
-
-// Generated as internal constructor for term fpuop3_fma.
-pub fn constructor_fpuop3_fma<C: Context>(ctx: &mut C, arg0: Type) -> FPUOp3 {
-    match arg0 {
-        F32 => {
-            // Rule at src/isa/s390x/inst.isle line 4706.
-            return FPUOp3::MAdd32;
-        }
-        F64 => {
-            // Rule at src/isa/s390x/inst.isle line 4707.
-            return FPUOp3::MAdd64;
-        }
-        F32X4 => {
-            // Rule at src/isa/s390x/inst.isle line 4708.
-            return FPUOp3::MAdd32x4;
-        }
-        F64X2 => {
-            // Rule at src/isa/s390x/inst.isle line 4709.
-            return FPUOp3::MAdd64x2;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "fpuop3_fma", "src/isa/s390x/inst.isle line 4705"
-    )
-}
-
-// Generated as internal constructor for term fma_reg.
-pub fn constructor_fma_reg<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: Reg,
-    arg3: Reg,
-) -> Reg {
-    let v4 = &constructor_fpuop3_fma(ctx, arg0);
-    let v5 = constructor_fpu_rrrr(ctx, arg0, v4, arg1, arg2, arg3);
-    // Rule at src/isa/s390x/inst.isle line 4712.
-    return v5;
-}
-
-// Generated as internal constructor for term fpuop1_sqrt.
-pub fn constructor_fpuop1_sqrt<C: Context>(ctx: &mut C, arg0: Type) -> FPUOp1 {
-    match arg0 {
-        F32 => {
-            // Rule at src/isa/s390x/inst.isle line 4718.
-            return FPUOp1::Sqrt32;
-        }
-        F64 => {
-            // Rule at src/isa/s390x/inst.isle line 4719.
-            return FPUOp1::Sqrt64;
-        }
-        F32X4 => {
-            // Rule at src/isa/s390x/inst.isle line 4720.
-            return FPUOp1::Sqrt32x4;
-        }
-        F64X2 => {
-            // Rule at src/isa/s390x/inst.isle line 4721.
-            return FPUOp1::Sqrt64x2;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "fpuop1_sqrt", "src/isa/s390x/inst.isle line 4717"
-    )
-}
-
-// Generated as internal constructor for term sqrt_reg.
-pub fn constructor_sqrt_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
-    let v2 = &constructor_fpuop1_sqrt(ctx, arg0);
-    let v3 = constructor_fpu_rr(ctx, arg0, v2, arg1);
-    // Rule at src/isa/s390x/inst.isle line 4724.
-    return v3;
-}
-
-// Generated as internal constructor for term fpuop1_neg.
-pub fn constructor_fpuop1_neg<C: Context>(ctx: &mut C, arg0: Type) -> FPUOp1 {
-    match arg0 {
-        F32 => {
-            // Rule at src/isa/s390x/inst.isle line 4730.
-            return FPUOp1::Neg32;
-        }
-        F64 => {
-            // Rule at src/isa/s390x/inst.isle line 4731.
-            return FPUOp1::Neg64;
-        }
-        F32X4 => {
-            // Rule at src/isa/s390x/inst.isle line 4732.
-            return FPUOp1::Neg32x4;
-        }
-        F64X2 => {
-            // Rule at src/isa/s390x/inst.isle line 4733.
-            return FPUOp1::Neg64x2;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "fpuop1_neg", "src/isa/s390x/inst.isle line 4729"
-    )
-}
-
-// Generated as internal constructor for term fneg_reg.
-pub fn constructor_fneg_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
-    let v2 = &constructor_fpuop1_neg(ctx, arg0);
-    let v3 = constructor_fpu_rr(ctx, arg0, v2, arg1);
-    // Rule at src/isa/s390x/inst.isle line 4736.
-    return v3;
-}
-
-// Generated as internal constructor for term fpuop1_abs.
-pub fn constructor_fpuop1_abs<C: Context>(ctx: &mut C, arg0: Type) -> FPUOp1 {
-    match arg0 {
-        F32 => {
-            // Rule at src/isa/s390x/inst.isle line 4742.
-            return FPUOp1::Abs32;
-        }
-        F64 => {
-            // Rule at src/isa/s390x/inst.isle line 4743.
-            return FPUOp1::Abs64;
-        }
-        F32X4 => {
-            // Rule at src/isa/s390x/inst.isle line 4744.
-            return FPUOp1::Abs32x4;
-        }
-        F64X2 => {
-            // Rule at src/isa/s390x/inst.isle line 4745.
-            return FPUOp1::Abs64x2;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "fpuop1_abs", "src/isa/s390x/inst.isle line 4741"
-    )
-}
-
-// Generated as internal constructor for term fabs_reg.
-pub fn constructor_fabs_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
-    let v2 = &constructor_fpuop1_abs(ctx, arg0);
-    let v3 = constructor_fpu_rr(ctx, arg0, v2, arg1);
-    // Rule at src/isa/s390x/inst.isle line 4748.
-    return v3;
-}
-
-// Generated as internal constructor for term fpuroundop_round.
-pub fn constructor_fpuroundop_round<C: Context>(ctx: &mut C, arg0: Type) -> FpuRoundOp {
-    match arg0 {
-        F32 => {
-            // Rule at src/isa/s390x/inst.isle line 4754.
-            return FpuRoundOp::Round32;
-        }
-        F64 => {
-            // Rule at src/isa/s390x/inst.isle line 4755.
-            return FpuRoundOp::Round64;
-        }
-        F32X4 => {
-            // Rule at src/isa/s390x/inst.isle line 4756.
-            return FpuRoundOp::Round32x4;
-        }
-        F64X2 => {
-            // Rule at src/isa/s390x/inst.isle line 4757.
-            return FpuRoundOp::Round64x2;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "fpuroundop_round", "src/isa/s390x/inst.isle line 4753"
-    )
-}
-
-// Generated as internal constructor for term ceil_reg.
-pub fn constructor_ceil_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
-    let v2 = &constructor_fpuroundop_round(ctx, arg0);
-    let v4 = constructor_fpu_round(ctx, arg0, v2, &FpuRoundMode::ToPosInfinity, arg1);
-    // Rule at src/isa/s390x/inst.isle line 4760.
-    return v4;
-}
-
-// Generated as internal constructor for term floor_reg.
-pub fn constructor_floor_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
-    let v2 = &constructor_fpuroundop_round(ctx, arg0);
-    let v4 = constructor_fpu_round(ctx, arg0, v2, &FpuRoundMode::ToNegInfinity, arg1);
-    // Rule at src/isa/s390x/inst.isle line 4764.
-    return v4;
-}
-
-// Generated as internal constructor for term trunc_reg.
-pub fn constructor_trunc_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
-    let v2 = &constructor_fpuroundop_round(ctx, arg0);
-    let v4 = constructor_fpu_round(ctx, arg0, v2, &FpuRoundMode::ToZero, arg1);
-    // Rule at src/isa/s390x/inst.isle line 4768.
-    return v4;
-}
-
-// Generated as internal constructor for term nearest_reg.
-pub fn constructor_nearest_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
-    let v2 = &constructor_fpuroundop_round(ctx, arg0);
-    let v4 = constructor_fpu_round(ctx, arg0, v2, &FpuRoundMode::ToNearestTiesToEven, arg1);
-    // Rule at src/isa/s390x/inst.isle line 4772.
-    return v4;
-}
-
-// Generated as internal constructor for term fpromote_reg.
-pub fn constructor_fpromote_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Type, arg2: Reg) -> Reg {
-    if arg0 == arg1 {
-        // Rule at src/isa/s390x/inst.isle line 4779.
-        return arg2;
-    }
-    match arg0 {
-        F64 => {
-            if arg1 == F32 {
-                let v5 = constructor_fpu_rr(ctx, F64, &FPUOp1::Cvt32To64, arg2);
-                // Rule at src/isa/s390x/inst.isle line 4780.
-                return v5;
-            }
-        }
-        F64X2 => {
-            if arg1 == F32X4 {
-                let v7 = constructor_fpu_rr(ctx, F64, &FPUOp1::Cvt32x4To64x2, arg2);
-                // Rule at src/isa/s390x/inst.isle line 4782.
-                return v7;
-            }
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "fpromote_reg", "src/isa/s390x/inst.isle line 4778"
-    )
-}
-
-// Generated as internal constructor for term fdemote_reg.
-pub fn constructor_fdemote_reg<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Type,
-    arg2: &FpuRoundMode,
-    arg3: Reg,
-) -> Reg {
-    if arg0 == arg1 {
-        // Rule at src/isa/s390x/inst.isle line 4789.
-        return arg3;
-    }
-    match arg0 {
-        F32 => {
-            if arg1 == F64 {
-                let v6 = constructor_fpu_round(ctx, F32, &FpuRoundOp::Cvt64To32, arg2, arg3);
-                // Rule at src/isa/s390x/inst.isle line 4790.
-                return v6;
-            }
-        }
-        F32X4 => {
-            if arg1 == F64X2 {
-                let v9 = constructor_fpu_round(ctx, F32X4, &FpuRoundOp::Cvt64x2To32x4, arg2, arg3);
-                // Rule at src/isa/s390x/inst.isle line 4792.
-                return v9;
-            }
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "fdemote_reg", "src/isa/s390x/inst.isle line 4788"
-    )
-}
-
-// Generated as internal constructor for term fcvt_from_uint_reg.
-pub fn constructor_fcvt_from_uint_reg<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &FpuRoundMode,
-    arg2: Reg,
-) -> Reg {
-    match arg0 {
-        F32 => {
-            let v7 = C::zero_reg(ctx);
-            let v8 = constructor_vec_insert_lane_undef(ctx, I32X4, arg2, 0x0, v7);
-            let v9 = constructor_fpu_round(ctx, F32, &FpuRoundOp::FromUInt32, arg1, v8);
-            // Rule at src/isa/s390x/inst.isle line 4799.
-            return v9;
-        }
-        F64 => {
-            let v7 = C::zero_reg(ctx);
-            let v13 = constructor_vec_insert_lane_undef(ctx, I64X2, arg2, 0x0, v7);
-            let v14 = constructor_fpu_round(ctx, F64, &FpuRoundOp::FromUInt64, arg1, v13);
-            // Rule at src/isa/s390x/inst.isle line 4801.
-            return v14;
-        }
-        F32X4 => {
-            let v17 = constructor_fpu_round(ctx, F32X4, &FpuRoundOp::FromUInt32x4, arg1, arg2);
-            // Rule at src/isa/s390x/inst.isle line 4803.
-            return v17;
-        }
-        F64X2 => {
-            let v20 = constructor_fpu_round(ctx, F64X2, &FpuRoundOp::FromUInt64x2, arg1, arg2);
-            // Rule at src/isa/s390x/inst.isle line 4805.
-            return v20;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "fcvt_from_uint_reg", "src/isa/s390x/inst.isle line 4798"
-    )
-}
-
-// Generated as internal constructor for term fcvt_from_sint_reg.
-pub fn constructor_fcvt_from_sint_reg<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &FpuRoundMode,
-    arg2: Reg,
-) -> Reg {
-    match arg0 {
-        F32 => {
-            let v7 = C::zero_reg(ctx);
-            let v8 = constructor_vec_insert_lane_undef(ctx, I32X4, arg2, 0x0, v7);
-            let v9 = constructor_fpu_round(ctx, F32, &FpuRoundOp::FromSInt32, arg1, v8);
-            // Rule at src/isa/s390x/inst.isle line 4812.
-            return v9;
-        }
-        F64 => {
-            let v7 = C::zero_reg(ctx);
-            let v13 = constructor_vec_insert_lane_undef(ctx, I64X2, arg2, 0x0, v7);
-            let v14 = constructor_fpu_round(ctx, F64, &FpuRoundOp::FromSInt64, arg1, v13);
-            // Rule at src/isa/s390x/inst.isle line 4814.
-            return v14;
-        }
-        F32X4 => {
-            let v17 = constructor_fpu_round(ctx, F32X4, &FpuRoundOp::FromSInt32x4, arg1, arg2);
-            // Rule at src/isa/s390x/inst.isle line 4816.
-            return v17;
-        }
-        F64X2 => {
-            let v20 = constructor_fpu_round(ctx, F64X2, &FpuRoundOp::FromSInt64x2, arg1, arg2);
-            // Rule at src/isa/s390x/inst.isle line 4818.
-            return v20;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "fcvt_from_sint_reg", "src/isa/s390x/inst.isle line 4811"
-    )
-}
-
-// Generated as internal constructor for term fcvt_flt_ty.
-pub fn constructor_fcvt_flt_ty<C: Context>(ctx: &mut C, arg0: Type, arg1: Type) -> Type {
-    match arg1 {
-        F32 => {
-            let v1 = C::fits_in_32(ctx, arg0);
-            if let Some(v2) = v1 {
-                let v4 = C::vxrs_ext2_enabled(ctx, arg1);
-                if let Some(v5) = v4 {
-                    // Rule at src/isa/s390x/inst.isle line 4825.
-                    return F32;
-                }
-            }
-            let v7 = C::fits_in_64(ctx, arg0);
-            if let Some(v8) = v7 {
-                // Rule at src/isa/s390x/inst.isle line 4826.
-                return F64;
-            }
-        }
-        F64 => {
-            let v7 = C::fits_in_64(ctx, arg0);
-            if let Some(v8) = v7 {
-                // Rule at src/isa/s390x/inst.isle line 4827.
-                return F64;
-            }
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "fcvt_flt_ty", "src/isa/s390x/inst.isle line 4824"
-    )
-}
-
-// Generated as internal constructor for term fcvt_int_ty.
-pub fn constructor_fcvt_int_ty<C: Context>(ctx: &mut C, arg0: Type, arg1: Type) -> Type {
-    match arg1 {
-        F32 => {
-            let v1 = C::fits_in_32(ctx, arg0);
-            if let Some(v2) = v1 {
-                let v4 = C::vxrs_ext2_enabled(ctx, arg1);
-                if let Some(v5) = v4 {
-                    // Rule at src/isa/s390x/inst.isle line 4830.
-                    return I32;
-                }
-            }
-            let v7 = C::fits_in_64(ctx, arg0);
-            if let Some(v8) = v7 {
-                // Rule at src/isa/s390x/inst.isle line 4831.
-                return I64;
-            }
-        }
-        F64 => {
-            let v7 = C::fits_in_64(ctx, arg0);
-            if let Some(v8) = v7 {
-                // Rule at src/isa/s390x/inst.isle line 4832.
-                return I64;
-            }
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "fcvt_int_ty", "src/isa/s390x/inst.isle line 4829"
-    )
-}
-
-// Generated as internal constructor for term fcvt_to_uint_reg.
-pub fn constructor_fcvt_to_uint_reg<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &FpuRoundMode,
-    arg2: Reg,
-) -> Reg {
-    match arg0 {
-        F32 => {
-            let v6 = constructor_fpu_round(ctx, F32, &FpuRoundOp::ToUInt32, arg1, arg2);
-            let v8 = C::zero_reg(ctx);
-            let v9 = constructor_vec_extract_lane(ctx, I32X4, v6, 0x0, v8);
-            // Rule at src/isa/s390x/inst.isle line 4838.
-            return v9;
-        }
-        F64 => {
-            let v13 = constructor_fpu_round(ctx, F64, &FpuRoundOp::ToUInt64, arg1, arg2);
-            let v8 = C::zero_reg(ctx);
-            let v14 = constructor_vec_extract_lane(ctx, I64X2, v13, 0x0, v8);
-            // Rule at src/isa/s390x/inst.isle line 4840.
-            return v14;
-        }
-        F32X4 => {
-            let v17 = constructor_fpu_round(ctx, F32X4, &FpuRoundOp::ToUInt32x4, arg1, arg2);
-            // Rule at src/isa/s390x/inst.isle line 4842.
-            return v17;
-        }
-        F64X2 => {
-            let v20 = constructor_fpu_round(ctx, F64X2, &FpuRoundOp::ToUInt64x2, arg1, arg2);
-            // Rule at src/isa/s390x/inst.isle line 4844.
-            return v20;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "fcvt_to_uint_reg", "src/isa/s390x/inst.isle line 4837"
-    )
-}
-
-// Generated as internal constructor for term fcvt_to_uint_ub.
-pub fn constructor_fcvt_to_uint_ub<C: Context>(ctx: &mut C, arg0: Type, arg1: Type) -> Reg {
-    match arg0 {
-        F32 => {
-            let v3 = C::ty_bits(ctx, arg1);
-            let v4 = C::fcvt_to_uint_ub32(ctx, v3);
-            let v5 = constructor_imm(ctx, F32, v4);
-            // Rule at src/isa/s390x/inst.isle line 4848.
-            return v5;
-        }
-        F64 => {
-            let v3 = C::ty_bits(ctx, arg1);
-            let v7 = C::fcvt_to_uint_ub64(ctx, v3);
-            let v8 = constructor_imm(ctx, F64, v7);
-            // Rule at src/isa/s390x/inst.isle line 4850.
-            return v8;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "fcvt_to_uint_ub", "src/isa/s390x/inst.isle line 4847"
-    )
-}
-
-// Generated as internal constructor for term fcvt_to_uint_lb.
-pub fn constructor_fcvt_to_uint_lb<C: Context>(ctx: &mut C, arg0: Type) -> Reg {
-    match arg0 {
-        F32 => {
-            let v2 = C::fcvt_to_uint_lb32(ctx);
-            let v3 = constructor_imm(ctx, F32, v2);
-            // Rule at src/isa/s390x/inst.isle line 4854.
-            return v3;
-        }
-        F64 => {
-            let v5 = C::fcvt_to_uint_lb64(ctx);
-            let v6 = constructor_imm(ctx, F64, v5);
-            // Rule at src/isa/s390x/inst.isle line 4855.
-            return v6;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "fcvt_to_uint_lb", "src/isa/s390x/inst.isle line 4853"
-    )
-}
-
-// Generated as internal constructor for term fcvt_to_sint_reg.
-pub fn constructor_fcvt_to_sint_reg<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &FpuRoundMode,
-    arg2: Reg,
-) -> Reg {
-    match arg0 {
-        F32 => {
-            let v6 = constructor_fpu_round(ctx, F32, &FpuRoundOp::ToSInt32, arg1, arg2);
-            let v8 = C::zero_reg(ctx);
-            let v9 = constructor_vec_extract_lane(ctx, F32X4, v6, 0x0, v8);
-            // Rule at src/isa/s390x/inst.isle line 4870.
-            return v9;
-        }
-        F64 => {
-            let v13 = constructor_fpu_round(ctx, F64, &FpuRoundOp::ToSInt64, arg1, arg2);
-            let v8 = C::zero_reg(ctx);
-            let v14 = constructor_vec_extract_lane(ctx, F64X2, v13, 0x0, v8);
-            // Rule at src/isa/s390x/inst.isle line 4872.
-            return v14;
-        }
-        F32X4 => {
-            let v16 = constructor_fpu_round(ctx, F32X4, &FpuRoundOp::ToSInt32x4, arg1, arg2);
-            // Rule at src/isa/s390x/inst.isle line 4874.
-            return v16;
-        }
-        F64X2 => {
-            let v18 = constructor_fpu_round(ctx, F64X2, &FpuRoundOp::ToSInt64x2, arg1, arg2);
-            // Rule at src/isa/s390x/inst.isle line 4876.
-            return v18;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "fcvt_to_sint_reg", "src/isa/s390x/inst.isle line 4869"
-    )
-}
-
-// Generated as internal constructor for term fcvt_to_sint_ub.
-pub fn constructor_fcvt_to_sint_ub<C: Context>(ctx: &mut C, arg0: Type, arg1: Type) -> Reg {
-    match arg0 {
-        F32 => {
-            let v3 = C::ty_bits(ctx, arg1);
-            let v4 = C::fcvt_to_sint_ub32(ctx, v3);
-            let v5 = constructor_imm(ctx, F32, v4);
-            // Rule at src/isa/s390x/inst.isle line 4880.
-            return v5;
-        }
-        F64 => {
-            let v3 = C::ty_bits(ctx, arg1);
-            let v7 = C::fcvt_to_sint_ub64(ctx, v3);
-            let v8 = constructor_imm(ctx, F64, v7);
-            // Rule at src/isa/s390x/inst.isle line 4882.
-            return v8;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "fcvt_to_sint_ub", "src/isa/s390x/inst.isle line 4879"
-    )
-}
-
-// Generated as internal constructor for term fcvt_to_sint_lb.
-pub fn constructor_fcvt_to_sint_lb<C: Context>(ctx: &mut C, arg0: Type, arg1: Type) -> Reg {
-    match arg0 {
-        F32 => {
-            let v3 = C::ty_bits(ctx, arg1);
-            let v4 = C::fcvt_to_sint_lb32(ctx, v3);
-            let v5 = constructor_imm(ctx, F32, v4);
-            // Rule at src/isa/s390x/inst.isle line 4886.
-            return v5;
-        }
-        F64 => {
-            let v3 = C::ty_bits(ctx, arg1);
-            let v7 = C::fcvt_to_sint_lb64(ctx, v3);
-            let v8 = constructor_imm(ctx, F64, v7);
-            // Rule at src/isa/s390x/inst.isle line 4888.
-            return v8;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "fcvt_to_sint_lb", "src/isa/s390x/inst.isle line 4885"
-    )
-}
-
-// Generated as internal constructor for term cmpop_cmps.
-pub fn constructor_cmpop_cmps<C: Context>(ctx: &mut C, arg0: Type) -> CmpOp {
-    match arg0 {
-        I32 => {
-            // Rule at src/isa/s390x/inst.isle line 4904.
-            return CmpOp::CmpS32;
-        }
-        I64 => {
-            // Rule at src/isa/s390x/inst.isle line 4905.
-            return CmpOp::CmpS64;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "cmpop_cmps", "src/isa/s390x/inst.isle line 4903"
-    )
-}
-
-// Generated as internal constructor for term cmpop_cmps_sext16.
-pub fn constructor_cmpop_cmps_sext16<C: Context>(ctx: &mut C, arg0: Type) -> CmpOp {
-    match arg0 {
-        I32 => {
-            // Rule at src/isa/s390x/inst.isle line 4908.
-            return CmpOp::CmpS32Ext16;
-        }
-        I64 => {
-            // Rule at src/isa/s390x/inst.isle line 4909.
-            return CmpOp::CmpS64Ext16;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "cmpop_cmps_sext16", "src/isa/s390x/inst.isle line 4907"
-    )
-}
-
-// Generated as internal constructor for term cmpop_cmps_sext32.
-pub fn constructor_cmpop_cmps_sext32<C: Context>(ctx: &mut C, arg0: Type) -> CmpOp {
-    if arg0 == I64 {
-        // Rule at src/isa/s390x/inst.isle line 4912.
-        return CmpOp::CmpS64Ext32;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "cmpop_cmps_sext32", "src/isa/s390x/inst.isle line 4911"
-    )
-}
-
-// Generated as internal constructor for term icmps_reg.
-pub fn constructor_icmps_reg<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: Reg,
-) -> ProducesFlags {
-    let v3 = &constructor_cmpop_cmps(ctx, arg0);
-    let v4 = &constructor_cmp_rr(ctx, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4915.
-    return v4.clone();
-}
-
-// Generated as internal constructor for term icmps_reg_sext32.
-pub fn constructor_icmps_reg_sext32<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: Reg,
-) -> ProducesFlags {
-    let v3 = &constructor_cmpop_cmps_sext32(ctx, arg0);
-    let v4 = &constructor_cmp_rr(ctx, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4918.
-    return v4.clone();
-}
-
-// Generated as internal constructor for term icmps_simm16.
-pub fn constructor_icmps_simm16<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: i16,
-) -> ProducesFlags {
-    let v3 = &constructor_cmpop_cmps(ctx, arg0);
-    let v4 = &constructor_cmp_rsimm16(ctx, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4921.
-    return v4.clone();
-}
-
-// Generated as internal constructor for term icmps_simm32.
-pub fn constructor_icmps_simm32<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: i32,
-) -> ProducesFlags {
-    let v3 = &constructor_cmpop_cmps(ctx, arg0);
-    let v4 = &constructor_cmp_rsimm32(ctx, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4924.
-    return v4.clone();
-}
-
-// Generated as internal constructor for term icmps_mem.
-pub fn constructor_icmps_mem<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: &MemArg,
-) -> ProducesFlags {
-    let v3 = &constructor_cmpop_cmps(ctx, arg0);
-    let v4 = &constructor_cmp_rx(ctx, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4927.
-    return v4.clone();
-}
-
-// Generated as internal constructor for term icmps_mem_sext16.
-pub fn constructor_icmps_mem_sext16<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: &MemArg,
-) -> ProducesFlags {
-    let v3 = &constructor_cmpop_cmps_sext16(ctx, arg0);
-    let v4 = &constructor_cmp_rx(ctx, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4930.
-    return v4.clone();
-}
-
-// Generated as internal constructor for term icmps_mem_sext32.
-pub fn constructor_icmps_mem_sext32<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: &MemArg,
-) -> ProducesFlags {
-    let v3 = &constructor_cmpop_cmps_sext32(ctx, arg0);
-    let v4 = &constructor_cmp_rx(ctx, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4933.
-    return v4.clone();
-}
-
-// Generated as internal constructor for term cmpop_cmpu.
-pub fn constructor_cmpop_cmpu<C: Context>(ctx: &mut C, arg0: Type) -> CmpOp {
-    match arg0 {
-        I32 => {
-            // Rule at src/isa/s390x/inst.isle line 4939.
-            return CmpOp::CmpL32;
-        }
-        I64 => {
-            // Rule at src/isa/s390x/inst.isle line 4940.
-            return CmpOp::CmpL64;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "cmpop_cmpu", "src/isa/s390x/inst.isle line 4938"
-    )
-}
-
-// Generated as internal constructor for term cmpop_cmpu_zext16.
-pub fn constructor_cmpop_cmpu_zext16<C: Context>(ctx: &mut C, arg0: Type) -> CmpOp {
-    match arg0 {
-        I32 => {
-            // Rule at src/isa/s390x/inst.isle line 4943.
-            return CmpOp::CmpL32Ext16;
-        }
-        I64 => {
-            // Rule at src/isa/s390x/inst.isle line 4944.
-            return CmpOp::CmpL64Ext16;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "cmpop_cmpu_zext16", "src/isa/s390x/inst.isle line 4942"
-    )
-}
-
-// Generated as internal constructor for term cmpop_cmpu_zext32.
-pub fn constructor_cmpop_cmpu_zext32<C: Context>(ctx: &mut C, arg0: Type) -> CmpOp {
-    if arg0 == I64 {
-        // Rule at src/isa/s390x/inst.isle line 4947.
-        return CmpOp::CmpL64Ext32;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "cmpop_cmpu_zext32", "src/isa/s390x/inst.isle line 4946"
-    )
-}
-
-// Generated as internal constructor for term icmpu_reg.
-pub fn constructor_icmpu_reg<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: Reg,
-) -> ProducesFlags {
-    let v3 = &constructor_cmpop_cmpu(ctx, arg0);
-    let v4 = &constructor_cmp_rr(ctx, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4950.
-    return v4.clone();
-}
-
-// Generated as internal constructor for term icmpu_reg_zext32.
-pub fn constructor_icmpu_reg_zext32<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: Reg,
-) -> ProducesFlags {
-    let v3 = &constructor_cmpop_cmpu_zext32(ctx, arg0);
-    let v4 = &constructor_cmp_rr(ctx, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4953.
-    return v4.clone();
-}
-
-// Generated as internal constructor for term icmpu_uimm32.
-pub fn constructor_icmpu_uimm32<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: u32,
-) -> ProducesFlags {
-    let v3 = &constructor_cmpop_cmpu(ctx, arg0);
-    let v4 = &constructor_cmp_ruimm32(ctx, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4956.
-    return v4.clone();
-}
-
-// Generated as internal constructor for term icmpu_mem.
-pub fn constructor_icmpu_mem<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: &MemArg,
-) -> ProducesFlags {
-    let v3 = &constructor_cmpop_cmpu(ctx, arg0);
-    let v4 = &constructor_cmp_rx(ctx, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4959.
-    return v4.clone();
-}
-
-// Generated as internal constructor for term icmpu_mem_zext16.
-pub fn constructor_icmpu_mem_zext16<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: &MemArg,
-) -> ProducesFlags {
-    let v3 = &constructor_cmpop_cmpu_zext16(ctx, arg0);
-    let v4 = &constructor_cmp_rx(ctx, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4962.
-    return v4.clone();
-}
-
-// Generated as internal constructor for term icmpu_mem_zext32.
-pub fn constructor_icmpu_mem_zext32<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: &MemArg,
-) -> ProducesFlags {
-    let v3 = &constructor_cmpop_cmpu_zext32(ctx, arg0);
-    let v4 = &constructor_cmp_rx(ctx, v3, arg1, arg2);
-    // Rule at src/isa/s390x/inst.isle line 4965.
-    return v4.clone();
-}
-
-// Generated as internal constructor for term vecop_int_cmpeq.
-pub fn constructor_vecop_int_cmpeq<C: Context>(ctx: &mut C, arg0: Type) -> VecIntCmpOp {
-    let v1 = C::multi_lane(ctx, arg0);
-    if let Some(v2) = v1 {
-        match v2.0 {
-            0x8 => {
-                if v2.1 == 0x10 {
-                    // Rule at src/isa/s390x/inst.isle line 4971.
-                    return VecIntCmpOp::CmpEq8x16;
-                }
-            }
-            0x10 => {
-                if v2.1 == 0x8 {
-                    // Rule at src/isa/s390x/inst.isle line 4972.
-                    return VecIntCmpOp::CmpEq16x8;
-                }
-            }
-            0x20 => {
-                if v2.1 == 0x4 {
-                    // Rule at src/isa/s390x/inst.isle line 4973.
-                    return VecIntCmpOp::CmpEq32x4;
-                }
-            }
-            0x40 => {
-                if v2.1 == 0x2 {
-                    // Rule at src/isa/s390x/inst.isle line 4974.
-                    return VecIntCmpOp::CmpEq64x2;
-                }
-            }
-            _ => {}
-        }
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vecop_int_cmpeq", "src/isa/s390x/inst.isle line 4970"
-    )
-}
-
-// Generated as internal constructor for term vec_cmpeq.
-pub fn constructor_vec_cmpeq<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v1 = C::ty_vec128(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v5 = &constructor_vecop_int_cmpeq(ctx, v2);
-        let v6 = constructor_vec_int_cmp(ctx, v2, v5, arg1, arg2);
-        // Rule at src/isa/s390x/inst.isle line 4977.
-        return v6;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_cmpeq", "src/isa/s390x/inst.isle line 4976"
-    )
-}
-
-// Generated as internal constructor for term vec_cmpeqs.
-pub fn constructor_vec_cmpeqs<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: Reg,
-) -> ProducesFlags {
-    let v1 = C::ty_vec128(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v5 = &constructor_vecop_int_cmpeq(ctx, v2);
-        let v6 = &constructor_vec_int_cmps(ctx, v2, v5, arg1, arg2);
-        // Rule at src/isa/s390x/inst.isle line 4979.
-        return v6.clone();
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_cmpeqs", "src/isa/s390x/inst.isle line 4978"
-    )
-}
-
-// Generated as internal constructor for term vecop_int_cmph.
-pub fn constructor_vecop_int_cmph<C: Context>(ctx: &mut C, arg0: Type) -> VecIntCmpOp {
-    let v1 = C::multi_lane(ctx, arg0);
-    if let Some(v2) = v1 {
-        match v2.0 {
-            0x8 => {
-                if v2.1 == 0x10 {
-                    // Rule at src/isa/s390x/inst.isle line 4982.
-                    return VecIntCmpOp::SCmpHi8x16;
-                }
-            }
-            0x10 => {
-                if v2.1 == 0x8 {
-                    // Rule at src/isa/s390x/inst.isle line 4983.
-                    return VecIntCmpOp::SCmpHi16x8;
-                }
-            }
-            0x20 => {
-                if v2.1 == 0x4 {
-                    // Rule at src/isa/s390x/inst.isle line 4984.
-                    return VecIntCmpOp::SCmpHi32x4;
-                }
-            }
-            0x40 => {
-                if v2.1 == 0x2 {
-                    // Rule at src/isa/s390x/inst.isle line 4985.
-                    return VecIntCmpOp::SCmpHi64x2;
-                }
-            }
-            _ => {}
-        }
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vecop_int_cmph", "src/isa/s390x/inst.isle line 4981"
-    )
-}
-
-// Generated as internal constructor for term vec_cmph.
-pub fn constructor_vec_cmph<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v1 = C::ty_vec128(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v5 = &constructor_vecop_int_cmph(ctx, v2);
-        let v6 = constructor_vec_int_cmp(ctx, v2, v5, arg1, arg2);
-        // Rule at src/isa/s390x/inst.isle line 4988.
-        return v6;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_cmph", "src/isa/s390x/inst.isle line 4987"
-    )
-}
-
-// Generated as internal constructor for term vec_cmphs.
-pub fn constructor_vec_cmphs<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: Reg,
-) -> ProducesFlags {
-    let v1 = C::ty_vec128(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v5 = &constructor_vecop_int_cmph(ctx, v2);
-        let v6 = &constructor_vec_int_cmps(ctx, v2, v5, arg1, arg2);
-        // Rule at src/isa/s390x/inst.isle line 4990.
-        return v6.clone();
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_cmphs", "src/isa/s390x/inst.isle line 4989"
-    )
-}
-
-// Generated as internal constructor for term vecop_int_cmphl.
-pub fn constructor_vecop_int_cmphl<C: Context>(ctx: &mut C, arg0: Type) -> VecIntCmpOp {
-    let v1 = C::multi_lane(ctx, arg0);
-    if let Some(v2) = v1 {
-        match v2.0 {
-            0x8 => {
-                if v2.1 == 0x10 {
-                    // Rule at src/isa/s390x/inst.isle line 4993.
-                    return VecIntCmpOp::UCmpHi8x16;
-                }
-            }
-            0x10 => {
-                if v2.1 == 0x8 {
-                    // Rule at src/isa/s390x/inst.isle line 4994.
-                    return VecIntCmpOp::UCmpHi16x8;
-                }
-            }
-            0x20 => {
-                if v2.1 == 0x4 {
-                    // Rule at src/isa/s390x/inst.isle line 4995.
-                    return VecIntCmpOp::UCmpHi32x4;
-                }
-            }
-            0x40 => {
-                if v2.1 == 0x2 {
-                    // Rule at src/isa/s390x/inst.isle line 4996.
-                    return VecIntCmpOp::UCmpHi64x2;
-                }
-            }
-            _ => {}
-        }
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vecop_int_cmphl", "src/isa/s390x/inst.isle line 4992"
-    )
-}
-
-// Generated as internal constructor for term vec_cmphl.
-pub fn constructor_vec_cmphl<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v1 = C::ty_vec128(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v5 = &constructor_vecop_int_cmphl(ctx, v2);
-        let v6 = constructor_vec_int_cmp(ctx, v2, v5, arg1, arg2);
-        // Rule at src/isa/s390x/inst.isle line 4999.
-        return v6;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_cmphl", "src/isa/s390x/inst.isle line 4998"
-    )
-}
-
-// Generated as internal constructor for term vec_cmphls.
-pub fn constructor_vec_cmphls<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: Reg,
-) -> ProducesFlags {
-    let v1 = C::ty_vec128(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v5 = &constructor_vecop_int_cmphl(ctx, v2);
-        let v6 = &constructor_vec_int_cmps(ctx, v2, v5, arg1, arg2);
-        // Rule at src/isa/s390x/inst.isle line 5001.
-        return v6.clone();
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_cmphls", "src/isa/s390x/inst.isle line 5000"
-    )
-}
-
-// Generated as internal constructor for term fcmp_reg.
-pub fn constructor_fcmp_reg<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: Reg,
-) -> ProducesFlags {
-    match arg0 {
-        F32 => {
-            let v3 = &constructor_fpu_cmp32(ctx, arg1, arg2);
-            // Rule at src/isa/s390x/inst.isle line 5007.
-            return v3.clone();
-        }
-        F64 => {
-            let v4 = &constructor_fpu_cmp64(ctx, arg1, arg2);
-            // Rule at src/isa/s390x/inst.isle line 5008.
-            return v4.clone();
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "fcmp_reg", "src/isa/s390x/inst.isle line 5006"
-    )
-}
-
-// Generated as internal constructor for term vecop_float_cmpeq.
-pub fn constructor_vecop_float_cmpeq<C: Context>(ctx: &mut C, arg0: Type) -> VecFloatCmpOp {
-    let v1 = C::multi_lane(ctx, arg0);
-    if let Some(v2) = v1 {
-        match v2.0 {
-            0x20 => {
-                if v2.1 == 0x4 {
-                    // Rule at src/isa/s390x/inst.isle line 5014.
-                    return VecFloatCmpOp::CmpEq32x4;
-                }
-            }
-            0x40 => {
-                if v2.1 == 0x2 {
-                    // Rule at src/isa/s390x/inst.isle line 5015.
-                    return VecFloatCmpOp::CmpEq64x2;
-                }
-            }
-            _ => {}
-        }
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vecop_float_cmpeq", "src/isa/s390x/inst.isle line 5013"
-    )
-}
-
-// Generated as internal constructor for term vec_fcmpeq.
-pub fn constructor_vec_fcmpeq<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v1 = C::ty_vec128(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v5 = &constructor_vecop_float_cmpeq(ctx, v2);
-        let v6 = constructor_vec_float_cmp(ctx, v2, v5, arg1, arg2);
-        // Rule at src/isa/s390x/inst.isle line 5018.
-        return v6;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_fcmpeq", "src/isa/s390x/inst.isle line 5017"
-    )
-}
-
-// Generated as internal constructor for term vec_fcmpeqs.
-pub fn constructor_vec_fcmpeqs<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: Reg,
-) -> ProducesFlags {
-    let v1 = C::ty_vec128(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v5 = &constructor_vecop_float_cmpeq(ctx, v2);
-        let v6 = &constructor_vec_float_cmps(ctx, v2, v5, arg1, arg2);
-        // Rule at src/isa/s390x/inst.isle line 5020.
-        return v6.clone();
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_fcmpeqs", "src/isa/s390x/inst.isle line 5019"
-    )
-}
-
-// Generated as internal constructor for term vecop_float_cmph.
-pub fn constructor_vecop_float_cmph<C: Context>(ctx: &mut C, arg0: Type) -> VecFloatCmpOp {
-    let v1 = C::multi_lane(ctx, arg0);
-    if let Some(v2) = v1 {
-        match v2.0 {
-            0x20 => {
-                if v2.1 == 0x4 {
-                    // Rule at src/isa/s390x/inst.isle line 5023.
-                    return VecFloatCmpOp::CmpHi32x4;
-                }
-            }
-            0x40 => {
-                if v2.1 == 0x2 {
-                    // Rule at src/isa/s390x/inst.isle line 5024.
-                    return VecFloatCmpOp::CmpHi64x2;
-                }
-            }
-            _ => {}
-        }
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vecop_float_cmph", "src/isa/s390x/inst.isle line 5022"
-    )
-}
-
-// Generated as internal constructor for term vec_fcmph.
-pub fn constructor_vec_fcmph<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v1 = C::ty_vec128(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v5 = &constructor_vecop_float_cmph(ctx, v2);
-        let v6 = constructor_vec_float_cmp(ctx, v2, v5, arg1, arg2);
-        // Rule at src/isa/s390x/inst.isle line 5027.
-        return v6;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_fcmph", "src/isa/s390x/inst.isle line 5026"
-    )
-}
-
-// Generated as internal constructor for term vec_fcmphs.
-pub fn constructor_vec_fcmphs<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: Reg,
-) -> ProducesFlags {
-    let v1 = C::ty_vec128(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v5 = &constructor_vecop_float_cmph(ctx, v2);
-        let v6 = &constructor_vec_float_cmps(ctx, v2, v5, arg1, arg2);
-        // Rule at src/isa/s390x/inst.isle line 5029.
-        return v6.clone();
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_fcmphs", "src/isa/s390x/inst.isle line 5028"
-    )
-}
-
-// Generated as internal constructor for term vecop_float_cmphe.
-pub fn constructor_vecop_float_cmphe<C: Context>(ctx: &mut C, arg0: Type) -> VecFloatCmpOp {
-    let v1 = C::multi_lane(ctx, arg0);
-    if let Some(v2) = v1 {
-        match v2.0 {
-            0x20 => {
-                if v2.1 == 0x4 {
-                    // Rule at src/isa/s390x/inst.isle line 5032.
-                    return VecFloatCmpOp::CmpHiEq32x4;
-                }
-            }
-            0x40 => {
-                if v2.1 == 0x2 {
-                    // Rule at src/isa/s390x/inst.isle line 5033.
-                    return VecFloatCmpOp::CmpHiEq64x2;
-                }
-            }
-            _ => {}
-        }
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vecop_float_cmphe", "src/isa/s390x/inst.isle line 5031"
-    )
-}
-
-// Generated as internal constructor for term vec_fcmphe.
-pub fn constructor_vec_fcmphe<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    let v1 = C::ty_vec128(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v5 = &constructor_vecop_float_cmphe(ctx, v2);
-        let v6 = constructor_vec_float_cmp(ctx, v2, v5, arg1, arg2);
-        // Rule at src/isa/s390x/inst.isle line 5036.
-        return v6;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_fcmphe", "src/isa/s390x/inst.isle line 5035"
-    )
-}
-
-// Generated as internal constructor for term vec_fcmphes.
-pub fn constructor_vec_fcmphes<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: Reg,
-) -> ProducesFlags {
-    let v1 = C::ty_vec128(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v5 = &constructor_vecop_float_cmphe(ctx, v2);
-        let v6 = &constructor_vec_float_cmps(ctx, v2, v5, arg1, arg2);
-        // Rule at src/isa/s390x/inst.isle line 5038.
-        return v6.clone();
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_fcmphes", "src/isa/s390x/inst.isle line 5037"
-    )
-}
-
-// Generated as internal constructor for term lower.
-pub fn constructor_lower<C: Context>(ctx: &mut C, arg0: Inst) -> Option<InstOutput> {
-    let v4 = &C::inst_data(ctx, arg0);
-    match v4 {
-        &InstructionData::AtomicCas {
-            opcode: ref v1664,
-            args: ref v1665,
-            flags: v1666,
-        } => {
-            if let &Opcode::AtomicCas = v1664 {
-                let v1 = C::first_result(ctx, arg0);
-                if let Some(v2) = v1 {
-                    let v3 = C::value_type(ctx, v2);
-                    let v507 = C::ty_32_or_64(ctx, v3);
-                    if let Some(v508) = v507 {
-                        let v1671 = C::bigendian(ctx, v1666);
-                        if let Some(v1672) = v1671 {
-                            let v1667 = C::unpack_value_array_3(ctx, v1665);
-                            let v1673 = C::put_in_reg(ctx, v1667.1);
-                            let v1674 = C::put_in_reg(ctx, v1667.2);
-                            let v1625 = C::zero_offset(ctx);
-                            let v1675 = &constructor_lower_address(ctx, v1666, v1667.0, v1625);
-                            let v1676 = constructor_atomic_cas_impl(ctx, v508, v1673, v1674, v1675);
-                            let v1677 = constructor_output_reg(ctx, v1676);
-                            // Rule at src/isa/s390x/lower.isle line 3131.
-                            return Some(v1677);
-                        }
-                        let v1678 = C::littleendian(ctx, v1666);
-                        if let Some(v1679) = v1678 {
-                            let v1667 = C::unpack_value_array_3(ctx, v1665);
-                            let v1673 = C::put_in_reg(ctx, v1667.1);
-                            let v1680 = constructor_bswap_reg(ctx, v508, v1673);
-                            let v1681 = C::put_in_reg(ctx, v1667.2);
-                            let v1682 = constructor_bswap_reg(ctx, v508, v1681);
-                            let v1683 = C::zero_offset(ctx);
-                            let v1684 = &constructor_lower_address(ctx, v1666, v1667.0, v1683);
-                            let v1685 = constructor_atomic_cas_impl(ctx, v508, v1680, v1682, v1684);
-                            let v1686 = constructor_bswap_reg(ctx, v508, v1685);
-                            let v1687 = constructor_output_reg(ctx, v1686);
-                            // Rule at src/isa/s390x/lower.isle line 3138.
-                            return Some(v1687);
-                        }
-                    }
-                    let v368 = C::ty_8_or_16(ctx, v3);
-                    if let Some(v369) = v368 {
-                        let v1667 = C::unpack_value_array_3(ctx, v1665);
-                        let v1673 = C::put_in_reg(ctx, v1667.1);
-                        let v1674 = C::put_in_reg(ctx, v1667.2);
-                        let v1688 = C::put_in_reg(ctx, v1667.0);
-                        let v1689 = constructor_casloop_bitshift(ctx, v1688);
-                        let v1690 = constructor_casloop_aligned_addr(ctx, v1688);
-                        let v1691 = &C::inst_builder_new(ctx);
-                        let v1692 = constructor_casloop_val_reg(ctx);
-                        let v1693 = C::writable_reg_to_reg(ctx, v1692);
-                        let v1694 =
-                            constructor_casloop_rotate_in(ctx, v1691, v369, v1666, v1689, v1693);
-                        let v1695 = constructor_casloop_tmp_reg(ctx);
-                        let v1696 = constructor_atomic_cas_body(
-                            ctx, v1691, v369, v1666, v1695, v1694, v1673, v1674,
-                        );
-                        let v1697 =
-                            constructor_casloop_rotate_out(ctx, v1691, v369, v1666, v1689, v1696);
-                        let v1698 = constructor_casloop_subword(
-                            ctx, v1691, v369, v1666, v1690, v1689, v1697,
-                        );
-                        let v1699 = constructor_output_reg(ctx, v1698);
-                        // Rule at src/isa/s390x/lower.isle line 3145.
-                        return Some(v1699);
-                    }
-                }
-            }
-        }
-        &InstructionData::AtomicRmw {
-            opcode: ref v1608,
-            args: ref v1609,
-            flags: v1610,
-            op: ref v1611,
-        } => {
-            if let &Opcode::AtomicRmw = v1608 {
-                let v1 = C::first_result(ctx, arg0);
-                if let Some(v2) = v1 {
-                    let v3 = C::value_type(ctx, v2);
-                    let v507 = C::ty_32_or_64(ctx, v3);
-                    if let Some(v508) = v507 {
-                        match v1611 {
-                            &AtomicRmwOp::Add => {
-                                let v1615 = C::bigendian(ctx, v1610);
-                                if let Some(v1616) = v1615 {
-                                    let v1612 = C::unpack_value_array_2(ctx, v1609);
-                                    let v1617 = C::put_in_reg(ctx, v1612.1);
-                                    let v1618 = C::zero_offset(ctx);
-                                    let v1619 =
-                                        &constructor_lower_address(ctx, v1610, v1612.0, v1618);
-                                    let v1640 = constructor_atomic_rmw_add(ctx, v508, v1617, v1619);
-                                    let v1641 = constructor_output_reg(ctx, v1640);
-                                    // Rule at src/isa/s390x/lower.isle line 2911.
-                                    return Some(v1641);
-                                }
-                            }
-                            &AtomicRmwOp::And => {
-                                let v1615 = C::bigendian(ctx, v1610);
-                                if let Some(v1616) = v1615 {
-                                    let v1612 = C::unpack_value_array_2(ctx, v1609);
-                                    let v1617 = C::put_in_reg(ctx, v1612.1);
-                                    let v1618 = C::zero_offset(ctx);
-                                    let v1619 =
-                                        &constructor_lower_address(ctx, v1610, v1612.0, v1618);
-                                    let v1620 = constructor_atomic_rmw_and(ctx, v508, v1617, v1619);
-                                    let v1621 = constructor_output_reg(ctx, v1620);
-                                    // Rule at src/isa/s390x/lower.isle line 2875.
-                                    return Some(v1621);
-                                }
-                                let v1622 = C::littleendian(ctx, v1610);
-                                if let Some(v1623) = v1622 {
-                                    let v1612 = C::unpack_value_array_2(ctx, v1609);
-                                    let v1617 = C::put_in_reg(ctx, v1612.1);
-                                    let v1624 = constructor_bswap_reg(ctx, v508, v1617);
-                                    let v1625 = C::zero_offset(ctx);
-                                    let v1626 =
-                                        &constructor_lower_address(ctx, v1610, v1612.0, v1625);
-                                    let v1627 = constructor_atomic_rmw_and(ctx, v508, v1624, v1626);
-                                    let v1628 = constructor_bswap_reg(ctx, v508, v1627);
-                                    let v1629 = constructor_output_reg(ctx, v1628);
-                                    // Rule at src/isa/s390x/lower.isle line 2881.
-                                    return Some(v1629);
-                                }
-                            }
-                            &AtomicRmwOp::Or => {
-                                let v1615 = C::bigendian(ctx, v1610);
-                                if let Some(v1616) = v1615 {
-                                    let v1612 = C::unpack_value_array_2(ctx, v1609);
-                                    let v1617 = C::put_in_reg(ctx, v1612.1);
-                                    let v1618 = C::zero_offset(ctx);
-                                    let v1619 =
-                                        &constructor_lower_address(ctx, v1610, v1612.0, v1618);
-                                    let v1630 = constructor_atomic_rmw_or(ctx, v508, v1617, v1619);
-                                    let v1631 = constructor_output_reg(ctx, v1630);
-                                    // Rule at src/isa/s390x/lower.isle line 2887.
-                                    return Some(v1631);
-                                }
-                                let v1622 = C::littleendian(ctx, v1610);
-                                if let Some(v1623) = v1622 {
-                                    let v1612 = C::unpack_value_array_2(ctx, v1609);
-                                    let v1617 = C::put_in_reg(ctx, v1612.1);
-                                    let v1624 = constructor_bswap_reg(ctx, v508, v1617);
-                                    let v1625 = C::zero_offset(ctx);
-                                    let v1626 =
-                                        &constructor_lower_address(ctx, v1610, v1612.0, v1625);
-                                    let v1632 = constructor_atomic_rmw_or(ctx, v508, v1624, v1626);
-                                    let v1633 = constructor_bswap_reg(ctx, v508, v1632);
-                                    let v1634 = constructor_output_reg(ctx, v1633);
-                                    // Rule at src/isa/s390x/lower.isle line 2893.
-                                    return Some(v1634);
-                                }
-                            }
-                            &AtomicRmwOp::Sub => {
-                                let v1615 = C::bigendian(ctx, v1610);
-                                if let Some(v1616) = v1615 {
-                                    let v1612 = C::unpack_value_array_2(ctx, v1609);
-                                    let v1617 = C::put_in_reg(ctx, v1612.1);
-                                    let v1642 = constructor_neg_reg(ctx, v508, v1617);
-                                    let v1625 = C::zero_offset(ctx);
-                                    let v1626 =
-                                        &constructor_lower_address(ctx, v1610, v1612.0, v1625);
-                                    let v1643 = constructor_atomic_rmw_add(ctx, v508, v1642, v1626);
-                                    let v1644 = constructor_output_reg(ctx, v1643);
-                                    // Rule at src/isa/s390x/lower.isle line 2917.
-                                    return Some(v1644);
-                                }
-                            }
-                            &AtomicRmwOp::Xor => {
-                                let v1615 = C::bigendian(ctx, v1610);
-                                if let Some(v1616) = v1615 {
-                                    let v1612 = C::unpack_value_array_2(ctx, v1609);
-                                    let v1617 = C::put_in_reg(ctx, v1612.1);
-                                    let v1618 = C::zero_offset(ctx);
-                                    let v1619 =
-                                        &constructor_lower_address(ctx, v1610, v1612.0, v1618);
-                                    let v1635 = constructor_atomic_rmw_xor(ctx, v508, v1617, v1619);
-                                    let v1636 = constructor_output_reg(ctx, v1635);
-                                    // Rule at src/isa/s390x/lower.isle line 2899.
-                                    return Some(v1636);
-                                }
-                                let v1622 = C::littleendian(ctx, v1610);
-                                if let Some(v1623) = v1622 {
-                                    let v1612 = C::unpack_value_array_2(ctx, v1609);
-                                    let v1617 = C::put_in_reg(ctx, v1612.1);
-                                    let v1624 = constructor_bswap_reg(ctx, v508, v1617);
-                                    let v1625 = C::zero_offset(ctx);
-                                    let v1626 =
-                                        &constructor_lower_address(ctx, v1610, v1612.0, v1625);
-                                    let v1637 = constructor_atomic_rmw_xor(ctx, v508, v1624, v1626);
-                                    let v1638 = constructor_bswap_reg(ctx, v508, v1637);
-                                    let v1639 = constructor_output_reg(ctx, v1638);
-                                    // Rule at src/isa/s390x/lower.isle line 2905.
-                                    return Some(v1639);
-                                }
-                            }
-                            _ => {}
-                        }
-                        let v1612 = C::unpack_value_array_2(ctx, v1609);
-                        let v1617 = C::put_in_reg(ctx, v1612.1);
-                        let v1645 = C::put_in_reg(ctx, v1612.0);
-                        let v1646 = &C::inst_builder_new(ctx);
-                        let v1647 = constructor_casloop_val_reg(ctx);
-                        let v1649 = constructor_casloop_tmp_reg(ctx);
-                        let v1648 = C::writable_reg_to_reg(ctx, v1647);
-                        let v1650 = constructor_atomic_rmw_body(
-                            ctx, v1646, v508, v1610, v1611, v1649, v1648, v1617,
-                        );
-                        let v1651 = constructor_casloop(ctx, v1646, v508, v1610, v1645, v1650);
-                        let v1652 = constructor_output_reg(ctx, v1651);
-                        // Rule at src/isa/s390x/lower.isle line 2926.
-                        return Some(v1652);
-                    }
-                    let v368 = C::ty_8_or_16(ctx, v3);
-                    if let Some(v369) = v368 {
-                        let v1612 = C::unpack_value_array_2(ctx, v1609);
-                        let v1617 = C::put_in_reg(ctx, v1612.1);
-                        let v1645 = C::put_in_reg(ctx, v1612.0);
-                        let v1653 = constructor_casloop_bitshift(ctx, v1645);
-                        let v1654 = constructor_casloop_aligned_addr(ctx, v1645);
-                        let v1655 = &C::inst_builder_new(ctx);
-                        let v1656 = constructor_casloop_val_reg(ctx);
-                        let v1657 = C::writable_reg_to_reg(ctx, v1656);
-                        let v1658 =
-                            constructor_casloop_rotate_in(ctx, v1655, v369, v1610, v1653, v1657);
-                        let v1659 = constructor_casloop_tmp_reg(ctx);
-                        let v1660 = constructor_atomic_rmw_body(
-                            ctx, v1655, v369, v1610, v1611, v1659, v1658, v1617,
-                        );
-                        let v1661 =
-                            constructor_casloop_rotate_out(ctx, v1655, v369, v1610, v1653, v1660);
-                        let v1662 = constructor_casloop_subword(
-                            ctx, v1655, v369, v1610, v1654, v1653, v1661,
-                        );
-                        let v1663 = constructor_output_reg(ctx, v1662);
-                        // Rule at src/isa/s390x/lower.isle line 2938.
-                        return Some(v1663);
-                    }
-                }
-            }
-        }
-        &InstructionData::Binary {
-            opcode: ref v38,
-            args: ref v39,
-        } => {
-            match v38 {
-                &Opcode::Swizzle => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v149 = C::ty_vec128(ctx, v3);
-                        if let Some(v150) = v149 {
-                            let v1433 = &C::lane_order(ctx);
-                            match v1433 {
-                                &LaneOrder::LittleEndian => {
-                                    let v1440 = constructor_vec_imm(ctx, v150, 0x0);
-                                    let v40 = C::unpack_value_array_2(ctx, v39);
-                                    let v44 = C::put_in_reg(ctx, v40.0);
-                                    let v1442 = constructor_vec_imm_splat(ctx, I8X16, 0xEF);
-                                    let v394 = C::put_in_reg(ctx, v40.1);
-                                    let v1443 = constructor_vec_not(ctx, I8X16, v394);
-                                    let v1444 = constructor_vec_umax(ctx, I8X16, v1442, v1443);
-                                    let v1445 =
-                                        constructor_vec_permute(ctx, v150, v1440, v44, v1444);
-                                    let v1446 = constructor_output_reg(ctx, v1445);
-                                    // Rule at src/isa/s390x/lower.isle line 2228.
-                                    return Some(v1446);
-                                }
-                                &LaneOrder::BigEndian => {
-                                    let v40 = C::unpack_value_array_2(ctx, v39);
-                                    let v63 = C::put_in_reg(ctx, v40.0);
-                                    let v1434 = constructor_vec_imm(ctx, v150, 0x0);
-                                    let v1436 = constructor_vec_imm_splat(ctx, I8X16, 0x10);
-                                    let v394 = C::put_in_reg(ctx, v40.1);
-                                    let v1437 = constructor_vec_umin(ctx, I8X16, v1436, v394);
-                                    let v1438 =
-                                        constructor_vec_permute(ctx, v150, v63, v1434, v1437);
-                                    let v1439 = constructor_output_reg(ctx, v1438);
-                                    // Rule at src/isa/s390x/lower.isle line 2209.
-                                    return Some(v1439);
-                                }
-                                _ => {}
-                            }
-                        }
-                    }
-                }
-                &Opcode::Smin => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v61 = C::fits_in_64(ctx, v3);
-                        if let Some(v62) = v61 {
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v311 = constructor_put_in_reg_sext32(ctx, v40.0);
-                            let v312 = constructor_put_in_reg_sext32(ctx, v40.1);
-                            let v289 = constructor_ty_ext32(ctx, v62);
-                            let v313 = &constructor_icmps_reg(ctx, v289, v311, v312);
-                            let v325 = &C::intcc_as_cond(ctx, &IntCC::SignedGreaterThan);
-                            let v326 = &constructor_bool(ctx, v313, v325);
-                            let v327 = constructor_select_bool_reg(ctx, v62, v326, v312, v311);
-                            let v328 = constructor_output_reg(ctx, v327);
-                            // Rule at src/isa/s390x/lower.isle line 316.
-                            return Some(v328);
-                        }
-                        if v3 == I128 {
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v63 = C::put_in_reg(ctx, v40.0);
-                            let v64 = C::put_in_reg(ctx, v40.1);
-                            let v329 = &constructor_vec_int128_scmphi(ctx, v63, v64);
-                            let v330 = constructor_select_bool_reg(ctx, I128, v329, v64, v63);
-                            let v331 = constructor_output_reg(ctx, v330);
-                            // Rule at src/isa/s390x/lower.isle line 324.
-                            return Some(v331);
-                        }
-                        let v149 = C::ty_vec128(ctx, v3);
-                        if let Some(v150) = v149 {
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v63 = C::put_in_reg(ctx, v40.0);
-                            let v64 = C::put_in_reg(ctx, v40.1);
-                            let v332 = constructor_vec_smin(ctx, v150, v63, v64);
-                            let v333 = constructor_output_reg(ctx, v332);
-                            // Rule at src/isa/s390x/lower.isle line 331.
-                            return Some(v333);
-                        }
-                    }
-                }
-                &Opcode::Umin => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v61 = C::fits_in_64(ctx, v3);
-                        if let Some(v62) = v61 {
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v287 = constructor_put_in_reg_zext32(ctx, v40.0);
-                            let v288 = constructor_put_in_reg_zext32(ctx, v40.1);
-                            let v289 = constructor_ty_ext32(ctx, v62);
-                            let v290 = &constructor_icmpu_reg(ctx, v289, v287, v288);
-                            let v302 = &C::intcc_as_cond(ctx, &IntCC::UnsignedGreaterThan);
-                            let v303 = &constructor_bool(ctx, v290, v302);
-                            let v304 = constructor_select_bool_reg(ctx, v62, v303, v288, v287);
-                            let v305 = constructor_output_reg(ctx, v304);
-                            // Rule at src/isa/s390x/lower.isle line 272.
-                            return Some(v305);
-                        }
-                        if v3 == I128 {
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v63 = C::put_in_reg(ctx, v40.0);
-                            let v64 = C::put_in_reg(ctx, v40.1);
-                            let v306 = &constructor_vec_int128_ucmphi(ctx, v63, v64);
-                            let v307 = constructor_select_bool_reg(ctx, I128, v306, v64, v63);
-                            let v308 = constructor_output_reg(ctx, v307);
-                            // Rule at src/isa/s390x/lower.isle line 280.
-                            return Some(v308);
-                        }
-                        let v149 = C::ty_vec128(ctx, v3);
-                        if let Some(v150) = v149 {
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v63 = C::put_in_reg(ctx, v40.0);
-                            let v64 = C::put_in_reg(ctx, v40.1);
-                            let v309 = constructor_vec_umin(ctx, v150, v63, v64);
-                            let v310 = constructor_output_reg(ctx, v309);
-                            // Rule at src/isa/s390x/lower.isle line 287.
-                            return Some(v310);
-                        }
-                    }
-                }
-                &Opcode::Smax => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v61 = C::fits_in_64(ctx, v3);
-                        if let Some(v62) = v61 {
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v311 = constructor_put_in_reg_sext32(ctx, v40.0);
-                            let v312 = constructor_put_in_reg_sext32(ctx, v40.1);
-                            let v289 = constructor_ty_ext32(ctx, v62);
-                            let v313 = &constructor_icmps_reg(ctx, v289, v311, v312);
-                            let v315 = &C::intcc_as_cond(ctx, &IntCC::SignedLessThan);
-                            let v316 = &constructor_bool(ctx, v313, v315);
-                            let v317 = constructor_select_bool_reg(ctx, v62, v316, v312, v311);
-                            let v318 = constructor_output_reg(ctx, v317);
-                            // Rule at src/isa/s390x/lower.isle line 294.
-                            return Some(v318);
-                        }
-                        if v3 == I128 {
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v63 = C::put_in_reg(ctx, v40.0);
-                            let v64 = C::put_in_reg(ctx, v40.1);
-                            let v319 = &constructor_vec_int128_scmphi(ctx, v64, v63);
-                            let v320 = constructor_select_bool_reg(ctx, I128, v319, v64, v63);
-                            let v321 = constructor_output_reg(ctx, v320);
-                            // Rule at src/isa/s390x/lower.isle line 302.
-                            return Some(v321);
-                        }
-                        let v149 = C::ty_vec128(ctx, v3);
-                        if let Some(v150) = v149 {
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v63 = C::put_in_reg(ctx, v40.0);
-                            let v64 = C::put_in_reg(ctx, v40.1);
-                            let v322 = constructor_vec_smax(ctx, v150, v63, v64);
-                            let v323 = constructor_output_reg(ctx, v322);
-                            // Rule at src/isa/s390x/lower.isle line 309.
-                            return Some(v323);
-                        }
-                    }
-                }
-                &Opcode::Umax => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v61 = C::fits_in_64(ctx, v3);
-                        if let Some(v62) = v61 {
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v287 = constructor_put_in_reg_zext32(ctx, v40.0);
-                            let v288 = constructor_put_in_reg_zext32(ctx, v40.1);
-                            let v289 = constructor_ty_ext32(ctx, v62);
-                            let v290 = &constructor_icmpu_reg(ctx, v289, v287, v288);
-                            let v292 = &C::intcc_as_cond(ctx, &IntCC::UnsignedLessThan);
-                            let v293 = &constructor_bool(ctx, v290, v292);
-                            let v294 = constructor_select_bool_reg(ctx, v62, v293, v288, v287);
-                            let v295 = constructor_output_reg(ctx, v294);
-                            // Rule at src/isa/s390x/lower.isle line 250.
-                            return Some(v295);
-                        }
-                        if v3 == I128 {
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v63 = C::put_in_reg(ctx, v40.0);
-                            let v64 = C::put_in_reg(ctx, v40.1);
-                            let v296 = &constructor_vec_int128_ucmphi(ctx, v64, v63);
-                            let v297 = constructor_select_bool_reg(ctx, I128, v296, v64, v63);
-                            let v298 = constructor_output_reg(ctx, v297);
-                            // Rule at src/isa/s390x/lower.isle line 258.
-                            return Some(v298);
-                        }
-                        let v149 = C::ty_vec128(ctx, v3);
-                        if let Some(v150) = v149 {
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v63 = C::put_in_reg(ctx, v40.0);
-                            let v64 = C::put_in_reg(ctx, v40.1);
-                            let v299 = constructor_vec_umax(ctx, v150, v63, v64);
-                            let v300 = constructor_output_reg(ctx, v299);
-                            // Rule at src/isa/s390x/lower.isle line 265.
-                            return Some(v300);
-                        }
-                    }
-                }
-                &Opcode::AvgRound => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v149 = C::ty_vec128(ctx, v3);
-                        if let Some(v150) = v149 {
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v63 = C::put_in_reg(ctx, v40.0);
-                            let v64 = C::put_in_reg(ctx, v40.1);
-                            let v334 = constructor_vec_uavg(ctx, v150, v63, v64);
-                            let v335 = constructor_output_reg(ctx, v334);
-                            // Rule at src/isa/s390x/lower.isle line 338.
-                            return Some(v335);
-                        }
-                    }
-                }
-                &Opcode::UaddSat => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v149 = C::ty_vec128(ctx, v3);
-                        if let Some(v150) = v149 {
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v63 = C::put_in_reg(ctx, v40.0);
-                            let v64 = C::put_in_reg(ctx, v40.1);
-                            let v151 = constructor_vec_add(ctx, v150, v63, v64);
-                            let v152 = C::put_in_reg(ctx, v40.0);
-                            let v153 = constructor_vec_cmphl(ctx, v150, v152, v151);
-                            let v154 = constructor_vec_or(ctx, v150, v151, v153);
-                            let v155 = constructor_output_reg(ctx, v154);
-                            // Rule at src/isa/s390x/lower.isle line 116.
-                            return Some(v155);
-                        }
-                    }
-                }
-                &Opcode::SaddSat => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v149 = C::ty_vec128(ctx, v3);
-                        if let Some(v150) = v149 {
-                            let v156 = constructor_vec_widen_type(ctx, v150);
-                            let v157 = constructor_vec_widen_type(ctx, v150);
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v158 = C::put_in_reg(ctx, v40.0);
-                            let v159 = constructor_vec_unpacks_high(ctx, v150, v158);
-                            let v160 = C::put_in_reg(ctx, v40.1);
-                            let v161 = constructor_vec_unpacks_high(ctx, v150, v160);
-                            let v162 = constructor_vec_add(ctx, v157, v159, v161);
-                            let v163 = constructor_vec_widen_type(ctx, v150);
-                            let v164 = C::put_in_reg(ctx, v40.0);
-                            let v165 = constructor_vec_unpacks_low(ctx, v150, v164);
-                            let v166 = C::put_in_reg(ctx, v40.1);
-                            let v167 = constructor_vec_unpacks_low(ctx, v150, v166);
-                            let v168 = constructor_vec_add(ctx, v163, v165, v167);
-                            let v169 = constructor_vec_pack_ssat(ctx, v156, v162, v168);
-                            let v170 = constructor_output_reg(ctx, v169);
-                            // Rule at src/isa/s390x/lower.isle line 124.
-                            return Some(v170);
-                        }
-                    }
-                }
-                &Opcode::UsubSat => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v149 = C::ty_vec128(ctx, v3);
-                        if let Some(v150) = v149 {
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v63 = C::put_in_reg(ctx, v40.0);
-                            let v64 = C::put_in_reg(ctx, v40.1);
-                            let v248 = constructor_vec_sub(ctx, v150, v63, v64);
-                            let v152 = C::put_in_reg(ctx, v40.0);
-                            let v160 = C::put_in_reg(ctx, v40.1);
-                            let v249 = constructor_vec_cmphl(ctx, v150, v152, v160);
-                            let v250 = constructor_vec_and(ctx, v150, v248, v249);
-                            let v251 = constructor_output_reg(ctx, v250);
-                            // Rule at src/isa/s390x/lower.isle line 188.
-                            return Some(v251);
-                        }
-                    }
-                }
-                &Opcode::SsubSat => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v149 = C::ty_vec128(ctx, v3);
-                        if let Some(v150) = v149 {
-                            let v156 = constructor_vec_widen_type(ctx, v150);
-                            let v157 = constructor_vec_widen_type(ctx, v150);
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v158 = C::put_in_reg(ctx, v40.0);
-                            let v159 = constructor_vec_unpacks_high(ctx, v150, v158);
-                            let v160 = C::put_in_reg(ctx, v40.1);
-                            let v161 = constructor_vec_unpacks_high(ctx, v150, v160);
-                            let v252 = constructor_vec_sub(ctx, v157, v159, v161);
-                            let v163 = constructor_vec_widen_type(ctx, v150);
-                            let v164 = C::put_in_reg(ctx, v40.0);
-                            let v165 = constructor_vec_unpacks_low(ctx, v150, v164);
-                            let v166 = C::put_in_reg(ctx, v40.1);
-                            let v167 = constructor_vec_unpacks_low(ctx, v150, v166);
-                            let v253 = constructor_vec_sub(ctx, v163, v165, v167);
-                            let v254 = constructor_vec_pack_ssat(ctx, v156, v252, v253);
-                            let v255 = constructor_output_reg(ctx, v254);
-                            // Rule at src/isa/s390x/lower.isle line 195.
-                            return Some(v255);
-                        }
-                    }
-                }
-                &Opcode::Iadd => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v61 = C::fits_in_64(ctx, v3);
-                        if let Some(v62) = v61 {
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v76 = C::def_inst(ctx, v40.0);
-                            if let Some(v77) = v76 {
-                                let v78 = &C::inst_data(ctx, v77);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v79,
-                                    arg: v80,
-                                } = v78
-                                {
-                                    if let &Opcode::Sextend = v79 {
-                                        let v81 = C::value_type(ctx, v80);
-                                        if v81 == I32 {
-                                            let v43 = C::put_in_reg(ctx, v40.1);
-                                            let v82 = C::put_in_reg(ctx, v80);
-                                            let v83 =
-                                                constructor_add_reg_sext32(ctx, v62, v43, v82);
-                                            let v84 = constructor_output_reg(ctx, v83);
-                                            // Rule at src/isa/s390x/lower.isle line 73.
-                                            return Some(v84);
-                                        }
-                                    }
-                                }
-                            }
-                            let v89 = C::i16_from_value(ctx, v40.0);
-                            if let Some(v90) = v89 {
-                                let v43 = C::put_in_reg(ctx, v40.1);
-                                let v91 = constructor_add_simm16(ctx, v62, v43, v90);
-                                let v92 = constructor_output_reg(ctx, v91);
-                                // Rule at src/isa/s390x/lower.isle line 79.
-                                return Some(v92);
-                            }
-                            let v97 = C::i32_from_value(ctx, v40.0);
-                            if let Some(v98) = v97 {
-                                let v43 = C::put_in_reg(ctx, v40.1);
-                                let v99 = constructor_add_simm32(ctx, v62, v43, v98);
-                                let v100 = constructor_output_reg(ctx, v99);
-                                // Rule at src/isa/s390x/lower.isle line 83.
-                                return Some(v100);
-                            }
-                            let v119 = C::sinkable_inst(ctx, v40.0);
-                            if let Some(v120) = v119 {
-                                let v121 = &C::inst_data(ctx, v120);
-                                if let &InstructionData::Load {
-                                    opcode: ref v122,
-                                    arg: v123,
-                                    flags: v124,
-                                    offset: v125,
-                                } = v121
-                                {
-                                    match v122 {
-                                        &Opcode::Load => {
-                                            let v126 = C::bigendian(ctx, v124);
-                                            if let Some(v127) = v126 {
-                                                let v116 = C::value_type(ctx, v40.0);
-                                                let v117 = C::ty_32_or_64(ctx, v116);
-                                                if let Some(v118) = v117 {
-                                                    let v43 = C::put_in_reg(ctx, v40.1);
-                                                    let v128 = &constructor_sink_load(ctx, v120);
-                                                    let v129 =
-                                                        constructor_add_mem(ctx, v62, v43, v128);
-                                                    let v130 = constructor_output_reg(ctx, v129);
-                                                    // Rule at src/isa/s390x/lower.isle line 89.
-                                                    return Some(v130);
-                                                }
-                                                if v116 == I16 {
-                                                    let v43 = C::put_in_reg(ctx, v40.1);
-                                                    let v128 = &constructor_sink_load(ctx, v120);
-                                                    let v133 = constructor_add_mem_sext16(
-                                                        ctx, v62, v43, v128,
-                                                    );
-                                                    let v134 = constructor_output_reg(ctx, v133);
-                                                    // Rule at src/isa/s390x/lower.isle line 95.
-                                                    return Some(v134);
-                                                }
-                                            }
-                                        }
-                                        &Opcode::Sload16 => {
-                                            let v126 = C::bigendian(ctx, v124);
-                                            if let Some(v127) = v126 {
-                                                let v43 = C::put_in_reg(ctx, v40.1);
-                                                let v138 = &constructor_sink_sload16(ctx, v120);
-                                                let v139 =
-                                                    constructor_add_mem_sext16(ctx, v62, v43, v138);
-                                                let v140 = constructor_output_reg(ctx, v139);
-                                                // Rule at src/isa/s390x/lower.isle line 101.
-                                                return Some(v140);
-                                            }
-                                        }
-                                        &Opcode::Sload32 => {
-                                            let v126 = C::bigendian(ctx, v124);
-                                            if let Some(v127) = v126 {
-                                                let v43 = C::put_in_reg(ctx, v40.1);
-                                                let v144 = &constructor_sink_sload32(ctx, v120);
-                                                let v145 =
-                                                    constructor_add_mem_sext32(ctx, v62, v43, v144);
-                                                let v146 = constructor_output_reg(ctx, v145);
-                                                // Rule at src/isa/s390x/lower.isle line 105.
-                                                return Some(v146);
-                                            }
-                                        }
-                                        _ => {}
-                                    }
-                                }
-                            }
-                            let v67 = C::def_inst(ctx, v40.1);
-                            if let Some(v68) = v67 {
-                                let v69 = &C::inst_data(ctx, v68);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v70,
-                                    arg: v71,
-                                } = v69
-                                {
-                                    if let &Opcode::Sextend = v70 {
-                                        let v72 = C::value_type(ctx, v71);
-                                        if v72 == I32 {
-                                            let v63 = C::put_in_reg(ctx, v40.0);
-                                            let v73 = C::put_in_reg(ctx, v71);
-                                            let v74 =
-                                                constructor_add_reg_sext32(ctx, v62, v63, v73);
-                                            let v75 = constructor_output_reg(ctx, v74);
-                                            // Rule at src/isa/s390x/lower.isle line 71.
-                                            return Some(v75);
-                                        }
-                                    }
-                                }
-                            }
-                            let v85 = C::i16_from_value(ctx, v40.1);
-                            if let Some(v86) = v85 {
-                                let v63 = C::put_in_reg(ctx, v40.0);
-                                let v87 = constructor_add_simm16(ctx, v62, v63, v86);
-                                let v88 = constructor_output_reg(ctx, v87);
-                                // Rule at src/isa/s390x/lower.isle line 77.
-                                return Some(v88);
-                            }
-                            let v93 = C::i32_from_value(ctx, v40.1);
-                            if let Some(v94) = v93 {
-                                let v63 = C::put_in_reg(ctx, v40.0);
-                                let v95 = constructor_add_simm32(ctx, v62, v63, v94);
-                                let v96 = constructor_output_reg(ctx, v95);
-                                // Rule at src/isa/s390x/lower.isle line 81.
-                                return Some(v96);
-                            }
-                            let v104 = C::sinkable_inst(ctx, v40.1);
-                            if let Some(v105) = v104 {
-                                let v106 = &C::inst_data(ctx, v105);
-                                if let &InstructionData::Load {
-                                    opcode: ref v107,
-                                    arg: v108,
-                                    flags: v109,
-                                    offset: v110,
-                                } = v106
-                                {
-                                    match v107 {
-                                        &Opcode::Load => {
-                                            let v111 = C::bigendian(ctx, v109);
-                                            if let Some(v112) = v111 {
-                                                let v101 = C::value_type(ctx, v40.1);
-                                                let v102 = C::ty_32_or_64(ctx, v101);
-                                                if let Some(v103) = v102 {
-                                                    let v63 = C::put_in_reg(ctx, v40.0);
-                                                    let v113 = &constructor_sink_load(ctx, v105);
-                                                    let v114 =
-                                                        constructor_add_mem(ctx, v62, v63, v113);
-                                                    let v115 = constructor_output_reg(ctx, v114);
-                                                    // Rule at src/isa/s390x/lower.isle line 87.
-                                                    return Some(v115);
-                                                }
-                                                if v101 == I16 {
-                                                    let v63 = C::put_in_reg(ctx, v40.0);
-                                                    let v113 = &constructor_sink_load(ctx, v105);
-                                                    let v131 = constructor_add_mem_sext16(
-                                                        ctx, v62, v63, v113,
-                                                    );
-                                                    let v132 = constructor_output_reg(ctx, v131);
-                                                    // Rule at src/isa/s390x/lower.isle line 93.
-                                                    return Some(v132);
-                                                }
-                                            }
-                                        }
-                                        &Opcode::Sload16 => {
-                                            let v111 = C::bigendian(ctx, v109);
-                                            if let Some(v112) = v111 {
-                                                let v63 = C::put_in_reg(ctx, v40.0);
-                                                let v135 = &constructor_sink_sload16(ctx, v105);
-                                                let v136 =
-                                                    constructor_add_mem_sext16(ctx, v62, v63, v135);
-                                                let v137 = constructor_output_reg(ctx, v136);
-                                                // Rule at src/isa/s390x/lower.isle line 99.
-                                                return Some(v137);
-                                            }
-                                        }
-                                        &Opcode::Sload32 => {
-                                            let v111 = C::bigendian(ctx, v109);
-                                            if let Some(v112) = v111 {
-                                                let v63 = C::put_in_reg(ctx, v40.0);
-                                                let v141 = &constructor_sink_sload32(ctx, v105);
-                                                let v142 =
-                                                    constructor_add_mem_sext32(ctx, v62, v63, v141);
-                                                let v143 = constructor_output_reg(ctx, v142);
-                                                // Rule at src/isa/s390x/lower.isle line 103.
-                                                return Some(v143);
-                                            }
-                                        }
-                                        _ => {}
-                                    }
-                                }
-                            }
-                        }
-                        let v36 = C::vr128_ty(ctx, v3);
-                        if let Some(v37) = v36 {
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v63 = C::put_in_reg(ctx, v40.0);
-                            let v64 = C::put_in_reg(ctx, v40.1);
-                            let v147 = constructor_vec_add(ctx, v37, v63, v64);
-                            let v148 = constructor_output_reg(ctx, v147);
-                            // Rule at src/isa/s390x/lower.isle line 109.
-                            return Some(v148);
-                        }
-                        if let Some(v62) = v61 {
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v63 = C::put_in_reg(ctx, v40.0);
-                            let v64 = C::put_in_reg(ctx, v40.1);
-                            let v65 = constructor_add_reg(ctx, v62, v63, v64);
-                            let v66 = constructor_output_reg(ctx, v65);
-                            // Rule at src/isa/s390x/lower.isle line 67.
-                            return Some(v66);
-                        }
-                    }
-                }
-                &Opcode::Isub => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v61 = C::fits_in_64(ctx, v3);
-                        if let Some(v62) = v61 {
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v67 = C::def_inst(ctx, v40.1);
-                            if let Some(v68) = v67 {
-                                let v69 = &C::inst_data(ctx, v68);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v70,
-                                    arg: v71,
-                                } = v69
-                                {
-                                    if let &Opcode::Sextend = v70 {
-                                        let v72 = C::value_type(ctx, v71);
-                                        if v72 == I32 {
-                                            let v63 = C::put_in_reg(ctx, v40.0);
-                                            let v73 = C::put_in_reg(ctx, v71);
-                                            let v228 =
-                                                constructor_sub_reg_sext32(ctx, v62, v63, v73);
-                                            let v229 = constructor_output_reg(ctx, v228);
-                                            // Rule at src/isa/s390x/lower.isle line 157.
-                                            return Some(v229);
-                                        }
-                                    }
-                                }
-                            }
-                            let v230 = C::i16_from_negated_value(ctx, v40.1);
-                            if let Some(v231) = v230 {
-                                let v63 = C::put_in_reg(ctx, v40.0);
-                                let v232 = constructor_add_simm16(ctx, v62, v63, v231);
-                                let v233 = constructor_output_reg(ctx, v232);
-                                // Rule at src/isa/s390x/lower.isle line 161.
-                                return Some(v233);
-                            }
-                            let v234 = C::i32_from_negated_value(ctx, v40.1);
-                            if let Some(v235) = v234 {
-                                let v63 = C::put_in_reg(ctx, v40.0);
-                                let v236 = constructor_add_simm32(ctx, v62, v63, v235);
-                                let v237 = constructor_output_reg(ctx, v236);
-                                // Rule at src/isa/s390x/lower.isle line 163.
-                                return Some(v237);
-                            }
-                            let v104 = C::sinkable_inst(ctx, v40.1);
-                            if let Some(v105) = v104 {
-                                let v106 = &C::inst_data(ctx, v105);
-                                if let &InstructionData::Load {
-                                    opcode: ref v107,
-                                    arg: v108,
-                                    flags: v109,
-                                    offset: v110,
-                                } = v106
-                                {
-                                    match v107 {
-                                        &Opcode::Load => {
-                                            let v111 = C::bigendian(ctx, v109);
-                                            if let Some(v112) = v111 {
-                                                let v101 = C::value_type(ctx, v40.1);
-                                                let v102 = C::ty_32_or_64(ctx, v101);
-                                                if let Some(v103) = v102 {
-                                                    let v63 = C::put_in_reg(ctx, v40.0);
-                                                    let v113 = &constructor_sink_load(ctx, v105);
-                                                    let v238 =
-                                                        constructor_sub_mem(ctx, v62, v63, v113);
-                                                    let v239 = constructor_output_reg(ctx, v238);
-                                                    // Rule at src/isa/s390x/lower.isle line 167.
-                                                    return Some(v239);
-                                                }
-                                                if v101 == I16 {
-                                                    let v63 = C::put_in_reg(ctx, v40.0);
-                                                    let v113 = &constructor_sink_load(ctx, v105);
-                                                    let v240 = constructor_sub_mem_sext16(
-                                                        ctx, v62, v63, v113,
-                                                    );
-                                                    let v241 = constructor_output_reg(ctx, v240);
-                                                    // Rule at src/isa/s390x/lower.isle line 171.
-                                                    return Some(v241);
-                                                }
-                                            }
-                                        }
-                                        &Opcode::Sload16 => {
-                                            let v111 = C::bigendian(ctx, v109);
-                                            if let Some(v112) = v111 {
-                                                let v63 = C::put_in_reg(ctx, v40.0);
-                                                let v135 = &constructor_sink_sload16(ctx, v105);
-                                                let v242 =
-                                                    constructor_sub_mem_sext16(ctx, v62, v63, v135);
-                                                let v243 = constructor_output_reg(ctx, v242);
-                                                // Rule at src/isa/s390x/lower.isle line 175.
-                                                return Some(v243);
-                                            }
-                                        }
-                                        &Opcode::Sload32 => {
-                                            let v111 = C::bigendian(ctx, v109);
-                                            if let Some(v112) = v111 {
-                                                let v63 = C::put_in_reg(ctx, v40.0);
-                                                let v141 = &constructor_sink_sload32(ctx, v105);
-                                                let v244 =
-                                                    constructor_sub_mem_sext32(ctx, v62, v63, v141);
-                                                let v245 = constructor_output_reg(ctx, v244);
-                                                // Rule at src/isa/s390x/lower.isle line 177.
-                                                return Some(v245);
-                                            }
-                                        }
-                                        _ => {}
-                                    }
-                                }
-                            }
-                        }
-                        let v36 = C::vr128_ty(ctx, v3);
-                        if let Some(v37) = v36 {
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v63 = C::put_in_reg(ctx, v40.0);
-                            let v64 = C::put_in_reg(ctx, v40.1);
-                            let v246 = constructor_vec_sub(ctx, v37, v63, v64);
-                            let v247 = constructor_output_reg(ctx, v246);
-                            // Rule at src/isa/s390x/lower.isle line 181.
-                            return Some(v247);
-                        }
-                        if let Some(v62) = v61 {
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v63 = C::put_in_reg(ctx, v40.0);
-                            let v64 = C::put_in_reg(ctx, v40.1);
-                            let v226 = constructor_sub_reg(ctx, v62, v63, v64);
-                            let v227 = constructor_output_reg(ctx, v226);
-                            // Rule at src/isa/s390x/lower.isle line 153.
-                            return Some(v227);
-                        }
-                    }
-                }
-                &Opcode::Imul => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v61 = C::fits_in_64(ctx, v3);
-                        if let Some(v62) = v61 {
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v76 = C::def_inst(ctx, v40.0);
-                            if let Some(v77) = v76 {
-                                let v78 = &C::inst_data(ctx, v77);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v79,
-                                    arg: v80,
-                                } = v78
-                                {
-                                    if let &Opcode::Sextend = v79 {
-                                        let v81 = C::value_type(ctx, v80);
-                                        if v81 == I32 {
-                                            let v43 = C::put_in_reg(ctx, v40.1);
-                                            let v82 = C::put_in_reg(ctx, v80);
-                                            let v340 =
-                                                constructor_mul_reg_sext32(ctx, v62, v43, v82);
-                                            let v341 = constructor_output_reg(ctx, v340);
-                                            // Rule at src/isa/s390x/lower.isle line 351.
-                                            return Some(v341);
-                                        }
-                                    }
-                                }
-                            }
-                            let v89 = C::i16_from_value(ctx, v40.0);
-                            if let Some(v90) = v89 {
-                                let v43 = C::put_in_reg(ctx, v40.1);
-                                let v344 = constructor_mul_simm16(ctx, v62, v43, v90);
-                                let v345 = constructor_output_reg(ctx, v344);
-                                // Rule at src/isa/s390x/lower.isle line 357.
-                                return Some(v345);
-                            }
-                            let v97 = C::i32_from_value(ctx, v40.0);
-                            if let Some(v98) = v97 {
-                                let v43 = C::put_in_reg(ctx, v40.1);
-                                let v348 = constructor_mul_simm32(ctx, v62, v43, v98);
-                                let v349 = constructor_output_reg(ctx, v348);
-                                // Rule at src/isa/s390x/lower.isle line 361.
-                                return Some(v349);
-                            }
-                            let v119 = C::sinkable_inst(ctx, v40.0);
-                            if let Some(v120) = v119 {
-                                let v121 = &C::inst_data(ctx, v120);
-                                if let &InstructionData::Load {
-                                    opcode: ref v122,
-                                    arg: v123,
-                                    flags: v124,
-                                    offset: v125,
-                                } = v121
-                                {
-                                    match v122 {
-                                        &Opcode::Load => {
-                                            let v126 = C::bigendian(ctx, v124);
-                                            if let Some(v127) = v126 {
-                                                let v116 = C::value_type(ctx, v40.0);
-                                                let v117 = C::ty_32_or_64(ctx, v116);
-                                                if let Some(v118) = v117 {
-                                                    let v43 = C::put_in_reg(ctx, v40.1);
-                                                    let v128 = &constructor_sink_load(ctx, v120);
-                                                    let v352 =
-                                                        constructor_mul_mem(ctx, v62, v43, v128);
-                                                    let v353 = constructor_output_reg(ctx, v352);
-                                                    // Rule at src/isa/s390x/lower.isle line 367.
-                                                    return Some(v353);
-                                                }
-                                                if v116 == I16 {
-                                                    let v43 = C::put_in_reg(ctx, v40.1);
-                                                    let v128 = &constructor_sink_load(ctx, v120);
-                                                    let v356 = constructor_mul_mem_sext16(
-                                                        ctx, v62, v43, v128,
-                                                    );
-                                                    let v357 = constructor_output_reg(ctx, v356);
-                                                    // Rule at src/isa/s390x/lower.isle line 373.
-                                                    return Some(v357);
-                                                }
-                                            }
-                                        }
-                                        &Opcode::Sload16 => {
-                                            let v126 = C::bigendian(ctx, v124);
-                                            if let Some(v127) = v126 {
-                                                let v43 = C::put_in_reg(ctx, v40.1);
-                                                let v138 = &constructor_sink_sload16(ctx, v120);
-                                                let v360 =
-                                                    constructor_mul_mem_sext16(ctx, v62, v43, v138);
-                                                let v361 = constructor_output_reg(ctx, v360);
-                                                // Rule at src/isa/s390x/lower.isle line 379.
-                                                return Some(v361);
-                                            }
-                                        }
-                                        &Opcode::Sload32 => {
-                                            let v126 = C::bigendian(ctx, v124);
-                                            if let Some(v127) = v126 {
-                                                let v43 = C::put_in_reg(ctx, v40.1);
-                                                let v144 = &constructor_sink_sload32(ctx, v120);
-                                                let v364 =
-                                                    constructor_mul_mem_sext32(ctx, v62, v43, v144);
-                                                let v365 = constructor_output_reg(ctx, v364);
-                                                // Rule at src/isa/s390x/lower.isle line 383.
-                                                return Some(v365);
-                                            }
-                                        }
-                                        _ => {}
-                                    }
-                                }
-                            }
-                            let v67 = C::def_inst(ctx, v40.1);
-                            if let Some(v68) = v67 {
-                                let v69 = &C::inst_data(ctx, v68);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v70,
-                                    arg: v71,
-                                } = v69
-                                {
-                                    if let &Opcode::Sextend = v70 {
-                                        let v72 = C::value_type(ctx, v71);
-                                        if v72 == I32 {
-                                            let v63 = C::put_in_reg(ctx, v40.0);
-                                            let v73 = C::put_in_reg(ctx, v71);
-                                            let v338 =
-                                                constructor_mul_reg_sext32(ctx, v62, v63, v73);
-                                            let v339 = constructor_output_reg(ctx, v338);
-                                            // Rule at src/isa/s390x/lower.isle line 349.
-                                            return Some(v339);
-                                        }
-                                    }
-                                }
-                            }
-                            let v85 = C::i16_from_value(ctx, v40.1);
-                            if let Some(v86) = v85 {
-                                let v63 = C::put_in_reg(ctx, v40.0);
-                                let v342 = constructor_mul_simm16(ctx, v62, v63, v86);
-                                let v343 = constructor_output_reg(ctx, v342);
-                                // Rule at src/isa/s390x/lower.isle line 355.
-                                return Some(v343);
-                            }
-                            let v93 = C::i32_from_value(ctx, v40.1);
-                            if let Some(v94) = v93 {
-                                let v63 = C::put_in_reg(ctx, v40.0);
-                                let v346 = constructor_mul_simm32(ctx, v62, v63, v94);
-                                let v347 = constructor_output_reg(ctx, v346);
-                                // Rule at src/isa/s390x/lower.isle line 359.
-                                return Some(v347);
-                            }
-                            let v104 = C::sinkable_inst(ctx, v40.1);
-                            if let Some(v105) = v104 {
-                                let v106 = &C::inst_data(ctx, v105);
-                                if let &InstructionData::Load {
-                                    opcode: ref v107,
-                                    arg: v108,
-                                    flags: v109,
-                                    offset: v110,
-                                } = v106
-                                {
-                                    match v107 {
-                                        &Opcode::Load => {
-                                            let v111 = C::bigendian(ctx, v109);
-                                            if let Some(v112) = v111 {
-                                                let v101 = C::value_type(ctx, v40.1);
-                                                let v102 = C::ty_32_or_64(ctx, v101);
-                                                if let Some(v103) = v102 {
-                                                    let v63 = C::put_in_reg(ctx, v40.0);
-                                                    let v113 = &constructor_sink_load(ctx, v105);
-                                                    let v350 =
-                                                        constructor_mul_mem(ctx, v62, v63, v113);
-                                                    let v351 = constructor_output_reg(ctx, v350);
-                                                    // Rule at src/isa/s390x/lower.isle line 365.
-                                                    return Some(v351);
-                                                }
-                                                if v101 == I16 {
-                                                    let v63 = C::put_in_reg(ctx, v40.0);
-                                                    let v113 = &constructor_sink_load(ctx, v105);
-                                                    let v354 = constructor_mul_mem_sext16(
-                                                        ctx, v62, v63, v113,
-                                                    );
-                                                    let v355 = constructor_output_reg(ctx, v354);
-                                                    // Rule at src/isa/s390x/lower.isle line 371.
-                                                    return Some(v355);
-                                                }
-                                            }
-                                        }
-                                        &Opcode::Sload16 => {
-                                            let v111 = C::bigendian(ctx, v109);
-                                            if let Some(v112) = v111 {
-                                                let v63 = C::put_in_reg(ctx, v40.0);
-                                                let v135 = &constructor_sink_sload16(ctx, v105);
-                                                let v358 =
-                                                    constructor_mul_mem_sext16(ctx, v62, v63, v135);
-                                                let v359 = constructor_output_reg(ctx, v358);
-                                                // Rule at src/isa/s390x/lower.isle line 377.
-                                                return Some(v359);
-                                            }
-                                        }
-                                        &Opcode::Sload32 => {
-                                            let v111 = C::bigendian(ctx, v109);
-                                            if let Some(v112) = v111 {
-                                                let v63 = C::put_in_reg(ctx, v40.0);
-                                                let v141 = &constructor_sink_sload32(ctx, v105);
-                                                let v362 =
-                                                    constructor_mul_mem_sext32(ctx, v62, v63, v141);
-                                                let v363 = constructor_output_reg(ctx, v362);
-                                                // Rule at src/isa/s390x/lower.isle line 381.
-                                                return Some(v363);
-                                            }
-                                        }
-                                        _ => {}
-                                    }
-                                }
-                            }
-                        }
-                        let v36 = C::vr128_ty(ctx, v3);
-                        if let Some(v37) = v36 {
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v63 = C::put_in_reg(ctx, v40.0);
-                            let v64 = C::put_in_reg(ctx, v40.1);
-                            let v366 = constructor_vec_mul_impl(ctx, v37, v63, v64);
-                            let v367 = constructor_output_reg(ctx, v366);
-                            // Rule at src/isa/s390x/lower.isle line 388.
-                            return Some(v367);
-                        }
-                        if let Some(v62) = v61 {
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v63 = C::put_in_reg(ctx, v40.0);
-                            let v64 = C::put_in_reg(ctx, v40.1);
-                            let v336 = constructor_mul_reg(ctx, v62, v63, v64);
-                            let v337 = constructor_output_reg(ctx, v336);
-                            // Rule at src/isa/s390x/lower.isle line 345.
-                            return Some(v337);
-                        }
-                    }
-                }
-                &Opcode::Umulhi => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            I32 => {
-                                let v40 = C::unpack_value_array_2(ctx, v39);
-                                let v375 = constructor_put_in_reg_zext64(ctx, v40.0);
-                                let v376 = constructor_put_in_reg_zext64(ctx, v40.1);
-                                let v378 = constructor_mul_reg(ctx, I64, v375, v376);
-                                let v380 = constructor_lshr_imm(ctx, I64, v378, 0x20);
-                                let v381 = constructor_output_reg(ctx, v380);
-                                // Rule at src/isa/s390x/lower.isle line 429.
-                                return Some(v381);
-                            }
-                            I64 => {
-                                let v40 = C::unpack_value_array_2(ctx, v39);
-                                let v63 = C::put_in_reg(ctx, v40.0);
-                                let v64 = C::put_in_reg(ctx, v40.1);
-                                let v382 = constructor_umul_wide(ctx, v63, v64);
-                                let v383 = C::regpair_hi(ctx, v382);
-                                let v384 = constructor_output_reg(ctx, v383);
-                                // Rule at src/isa/s390x/lower.isle line 436.
-                                return Some(v384);
-                            }
-                            I8X16 => {
-                                let v40 = C::unpack_value_array_2(ctx, v39);
-                                let v63 = C::put_in_reg(ctx, v40.0);
-                                let v64 = C::put_in_reg(ctx, v40.1);
-                                let v385 = constructor_vec_umulhi(ctx, I8X16, v63, v64);
-                                let v386 = constructor_output_reg(ctx, v385);
-                                // Rule at src/isa/s390x/lower.isle line 441.
-                                return Some(v386);
-                            }
-                            I16X8 => {
-                                let v40 = C::unpack_value_array_2(ctx, v39);
-                                let v63 = C::put_in_reg(ctx, v40.0);
-                                let v64 = C::put_in_reg(ctx, v40.1);
-                                let v388 = constructor_vec_umulhi(ctx, I16X8, v63, v64);
-                                let v389 = constructor_output_reg(ctx, v388);
-                                // Rule at src/isa/s390x/lower.isle line 442.
-                                return Some(v389);
-                            }
-                            I32X4 => {
-                                let v40 = C::unpack_value_array_2(ctx, v39);
-                                let v63 = C::put_in_reg(ctx, v40.0);
-                                let v64 = C::put_in_reg(ctx, v40.1);
-                                let v391 = constructor_vec_umulhi(ctx, I32X4, v63, v64);
-                                let v392 = constructor_output_reg(ctx, v391);
-                                // Rule at src/isa/s390x/lower.isle line 443.
-                                return Some(v392);
-                            }
-                            I64X2 => {
-                                let v40 = C::unpack_value_array_2(ctx, v39);
-                                let v63 = C::put_in_reg(ctx, v40.0);
-                                let v53 = C::zero_reg(ctx);
-                                let v393 = constructor_vec_extract_lane(ctx, I64X2, v63, 0x0, v53);
-                                let v394 = C::put_in_reg(ctx, v40.1);
-                                let v395 = C::zero_reg(ctx);
-                                let v396 =
-                                    constructor_vec_extract_lane(ctx, I64X2, v394, 0x0, v395);
-                                let v397 = constructor_umul_wide(ctx, v393, v396);
-                                let v398 = C::regpair_hi(ctx, v397);
-                                let v164 = C::put_in_reg(ctx, v40.0);
-                                let v399 = C::zero_reg(ctx);
-                                let v400 =
-                                    constructor_vec_extract_lane(ctx, I64X2, v164, 0x1, v399);
-                                let v401 = C::put_in_reg(ctx, v40.1);
-                                let v402 = C::zero_reg(ctx);
-                                let v403 =
-                                    constructor_vec_extract_lane(ctx, I64X2, v401, 0x1, v402);
-                                let v404 = constructor_umul_wide(ctx, v400, v403);
-                                let v405 = C::regpair_hi(ctx, v404);
-                                let v406 = constructor_mov_to_vec128(ctx, I64X2, v398, v405);
-                                let v407 = constructor_output_reg(ctx, v406);
-                                // Rule at src/isa/s390x/lower.isle line 447.
-                                return Some(v407);
-                            }
-                            _ => {}
-                        }
-                        let v368 = C::ty_8_or_16(ctx, v3);
-                        if let Some(v369) = v368 {
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v287 = constructor_put_in_reg_zext32(ctx, v40.0);
-                            let v288 = constructor_put_in_reg_zext32(ctx, v40.1);
-                            let v371 = constructor_mul_reg(ctx, I32, v287, v288);
-                            let v372 = C::ty_bits(ctx, v369);
-                            let v373 = constructor_lshr_imm(ctx, I32, v371, v372);
-                            let v374 = constructor_output_reg(ctx, v373);
-                            // Rule at src/isa/s390x/lower.isle line 422.
-                            return Some(v374);
-                        }
-                    }
-                }
-                &Opcode::Smulhi => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            I32 => {
-                                let v40 = C::unpack_value_array_2(ctx, v39);
-                                let v411 = constructor_put_in_reg_sext64(ctx, v40.0);
-                                let v412 = constructor_put_in_reg_sext64(ctx, v40.1);
-                                let v413 = constructor_mul_reg(ctx, I64, v411, v412);
-                                let v414 = constructor_ashr_imm(ctx, I64, v413, 0x20);
-                                let v415 = constructor_output_reg(ctx, v414);
-                                // Rule at src/isa/s390x/lower.isle line 467.
-                                return Some(v415);
-                            }
-                            I64 => {
-                                let v40 = C::unpack_value_array_2(ctx, v39);
-                                let v63 = C::put_in_reg(ctx, v40.0);
-                                let v64 = C::put_in_reg(ctx, v40.1);
-                                let v416 = constructor_smul_wide(ctx, v63, v64);
-                                let v417 = C::regpair_hi(ctx, v416);
-                                let v418 = constructor_output_reg(ctx, v417);
-                                // Rule at src/isa/s390x/lower.isle line 474.
-                                return Some(v418);
-                            }
-                            I8X16 => {
-                                let v40 = C::unpack_value_array_2(ctx, v39);
-                                let v63 = C::put_in_reg(ctx, v40.0);
-                                let v64 = C::put_in_reg(ctx, v40.1);
-                                let v419 = constructor_vec_smulhi(ctx, I8X16, v63, v64);
-                                let v420 = constructor_output_reg(ctx, v419);
-                                // Rule at src/isa/s390x/lower.isle line 479.
-                                return Some(v420);
-                            }
-                            I16X8 => {
-                                let v40 = C::unpack_value_array_2(ctx, v39);
-                                let v63 = C::put_in_reg(ctx, v40.0);
-                                let v64 = C::put_in_reg(ctx, v40.1);
-                                let v421 = constructor_vec_smulhi(ctx, I16X8, v63, v64);
-                                let v422 = constructor_output_reg(ctx, v421);
-                                // Rule at src/isa/s390x/lower.isle line 480.
-                                return Some(v422);
-                            }
-                            I32X4 => {
-                                let v40 = C::unpack_value_array_2(ctx, v39);
-                                let v63 = C::put_in_reg(ctx, v40.0);
-                                let v64 = C::put_in_reg(ctx, v40.1);
-                                let v423 = constructor_vec_smulhi(ctx, I32X4, v63, v64);
-                                let v424 = constructor_output_reg(ctx, v423);
-                                // Rule at src/isa/s390x/lower.isle line 481.
-                                return Some(v424);
-                            }
-                            I64X2 => {
-                                let v40 = C::unpack_value_array_2(ctx, v39);
-                                let v63 = C::put_in_reg(ctx, v40.0);
-                                let v53 = C::zero_reg(ctx);
-                                let v393 = constructor_vec_extract_lane(ctx, I64X2, v63, 0x0, v53);
-                                let v394 = C::put_in_reg(ctx, v40.1);
-                                let v395 = C::zero_reg(ctx);
-                                let v396 =
-                                    constructor_vec_extract_lane(ctx, I64X2, v394, 0x0, v395);
-                                let v425 = constructor_smul_wide(ctx, v393, v396);
-                                let v426 = C::regpair_hi(ctx, v425);
-                                let v427 = constructor_copy_reg(ctx, I64, v426);
-                                let v428 = C::put_in_reg(ctx, v40.0);
-                                let v429 = C::zero_reg(ctx);
-                                let v430 =
-                                    constructor_vec_extract_lane(ctx, I64X2, v428, 0x1, v429);
-                                let v431 = C::put_in_reg(ctx, v40.1);
-                                let v432 = C::zero_reg(ctx);
-                                let v433 =
-                                    constructor_vec_extract_lane(ctx, I64X2, v431, 0x1, v432);
-                                let v434 = constructor_smul_wide(ctx, v430, v433);
-                                let v435 = C::regpair_hi(ctx, v434);
-                                let v436 = constructor_mov_to_vec128(ctx, I64X2, v427, v435);
-                                let v437 = constructor_output_reg(ctx, v436);
-                                // Rule at src/isa/s390x/lower.isle line 485.
-                                return Some(v437);
-                            }
-                            _ => {}
-                        }
-                        let v368 = C::ty_8_or_16(ctx, v3);
-                        if let Some(v369) = v368 {
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v311 = constructor_put_in_reg_sext32(ctx, v40.0);
-                            let v312 = constructor_put_in_reg_sext32(ctx, v40.1);
-                            let v408 = constructor_mul_reg(ctx, I32, v311, v312);
-                            let v372 = C::ty_bits(ctx, v369);
-                            let v409 = constructor_ashr_imm(ctx, I32, v408, v372);
-                            let v410 = constructor_output_reg(ctx, v409);
-                            // Rule at src/isa/s390x/lower.isle line 460.
-                            return Some(v410);
-                        }
-                    }
-                }
-                &Opcode::SqmulRoundSat => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v149 = C::ty_vec128(ctx, v3);
-                        if let Some(v150) = v149 {
-                            let v156 = constructor_vec_widen_type(ctx, v150);
-                            let v157 = constructor_vec_widen_type(ctx, v150);
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v158 = C::put_in_reg(ctx, v40.0);
-                            let v159 = constructor_vec_unpacks_high(ctx, v150, v158);
-                            let v160 = C::put_in_reg(ctx, v40.1);
-                            let v161 = constructor_vec_unpacks_high(ctx, v150, v160);
-                            let v438 = constructor_sqmul_impl(ctx, v157, v159, v161);
-                            let v163 = constructor_vec_widen_type(ctx, v150);
-                            let v164 = C::put_in_reg(ctx, v40.0);
-                            let v165 = constructor_vec_unpacks_low(ctx, v150, v164);
-                            let v166 = C::put_in_reg(ctx, v40.1);
-                            let v167 = constructor_vec_unpacks_low(ctx, v150, v166);
-                            let v439 = constructor_sqmul_impl(ctx, v163, v165, v167);
-                            let v440 = constructor_vec_pack_ssat(ctx, v156, v438, v439);
-                            let v441 = constructor_output_reg(ctx, v440);
-                            // Rule at src/isa/s390x/lower.isle line 498.
-                            return Some(v441);
-                        }
-                    }
-                }
-                &Opcode::Udiv => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v61 = C::fits_in_64(ctx, v3);
-                        if let Some(v62) = v61 {
-                            let v256 = constructor_ty_ext32(ctx, v62);
-                            let v442 = constructor_imm(ctx, v256, 0x0);
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v443 = constructor_put_in_reg_zext32(ctx, v40.0);
-                            let v444 = C::regpair(ctx, v442, v443);
-                            let v445 = constructor_put_in_reg_zext32(ctx, v40.1);
-                            let v446 = constructor_ty_ext32(ctx, v62);
-                            let v447 = constructor_udivmod(ctx, v446, v444, v445);
-                            let v448 = C::regpair_lo(ctx, v447);
-                            let v449 = constructor_output_reg(ctx, v448);
-                            // Rule at src/isa/s390x/lower.isle line 536.
-                            return Some(v449);
-                        }
-                    }
-                }
-                &Opcode::Sdiv => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v61 = C::fits_in_64(ctx, v3);
-                        if let Some(v62) = v61 {
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v452 = constructor_div_overflow_check_needed(ctx, v40.1);
-                            let v453 = constructor_put_in_reg_sext64(ctx, v40.0);
-                            let v454 = constructor_put_in_reg_sext32(ctx, v40.1);
-                            let v455 = constructor_ty_ext32(ctx, v62);
-                            let v456 = constructor_maybe_trap_if_sdiv_overflow(
-                                ctx, v452, v455, v62, v453, v454,
-                            );
-                            let v457 = constructor_sdivmod(ctx, v455, v453, v454);
-                            let v458 = C::regpair_lo(ctx, v457);
-                            let v459 = constructor_output_reg(ctx, v458);
-                            // Rule at src/isa/s390x/lower.isle line 580.
-                            return Some(v459);
-                        }
-                    }
-                }
-                &Opcode::Urem => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v61 = C::fits_in_64(ctx, v3);
-                        if let Some(v62) = v61 {
-                            let v256 = constructor_ty_ext32(ctx, v62);
-                            let v442 = constructor_imm(ctx, v256, 0x0);
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v443 = constructor_put_in_reg_zext32(ctx, v40.0);
-                            let v444 = C::regpair(ctx, v442, v443);
-                            let v445 = constructor_put_in_reg_zext32(ctx, v40.1);
-                            let v446 = constructor_ty_ext32(ctx, v62);
-                            let v447 = constructor_udivmod(ctx, v446, v444, v445);
-                            let v450 = C::regpair_hi(ctx, v447);
-                            let v451 = constructor_output_reg(ctx, v450);
-                            // Rule at src/isa/s390x/lower.isle line 554.
-                            return Some(v451);
-                        }
-                    }
-                }
-                &Opcode::Srem => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v61 = C::fits_in_64(ctx, v3);
-                        if let Some(v62) = v61 {
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v452 = constructor_div_overflow_check_needed(ctx, v40.1);
-                            let v453 = constructor_put_in_reg_sext64(ctx, v40.0);
-                            let v454 = constructor_put_in_reg_sext32(ctx, v40.1);
-                            let v455 = constructor_ty_ext32(ctx, v62);
-                            let v460 =
-                                constructor_maybe_avoid_srem_overflow(ctx, v452, v455, v453, v454);
-                            let v461 = constructor_sdivmod(ctx, v455, v460, v454);
-                            let v462 = C::regpair_hi(ctx, v461);
-                            let v463 = constructor_output_reg(ctx, v462);
-                            // Rule at src/isa/s390x/lower.isle line 599.
-                            return Some(v463);
-                        }
-                    }
-                }
-                &Opcode::Band => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v36 = C::vr128_ty(ctx, v3);
-                        if let Some(v37) = v36 {
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v76 = C::def_inst(ctx, v40.0);
-                            if let Some(v77) = v76 {
-                                let v78 = &C::inst_data(ctx, v77);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v79,
-                                    arg: v80,
-                                } = v78
-                                {
-                                    if let &Opcode::Bnot = v79 {
-                                        let v43 = C::put_in_reg(ctx, v40.1);
-                                        let v82 = C::put_in_reg(ctx, v80);
-                                        let v675 = constructor_vec_and_not(ctx, v37, v43, v82);
-                                        let v676 = constructor_output_reg(ctx, v675);
-                                        // Rule at src/isa/s390x/lower.isle line 1032.
-                                        return Some(v676);
-                                    }
-                                }
-                            }
-                            let v67 = C::def_inst(ctx, v40.1);
-                            if let Some(v68) = v67 {
-                                let v69 = &C::inst_data(ctx, v68);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v70,
-                                    arg: v71,
-                                } = v69
-                                {
-                                    if let &Opcode::Bnot = v70 {
-                                        let v63 = C::put_in_reg(ctx, v40.0);
-                                        let v73 = C::put_in_reg(ctx, v71);
-                                        let v673 = constructor_vec_and_not(ctx, v37, v63, v73);
-                                        let v674 = constructor_output_reg(ctx, v673);
-                                        // Rule at src/isa/s390x/lower.isle line 1030.
-                                        return Some(v674);
-                                    }
-                                }
-                            }
-                        }
-                        let v61 = C::fits_in_64(ctx, v3);
-                        if let Some(v62) = v61 {
-                            let v624 = C::mie2_enabled(ctx, v3);
-                            if let Some(v625) = v624 {
-                                let v40 = C::unpack_value_array_2(ctx, v39);
-                                let v76 = C::def_inst(ctx, v40.0);
-                                if let Some(v77) = v76 {
-                                    let v78 = &C::inst_data(ctx, v77);
-                                    if let &InstructionData::Unary {
-                                        opcode: ref v79,
-                                        arg: v80,
-                                    } = v78
-                                    {
-                                        if let &Opcode::Bnot = v79 {
-                                            let v43 = C::put_in_reg(ctx, v40.1);
-                                            let v82 = C::put_in_reg(ctx, v80);
-                                            let v671 = constructor_and_not_reg(ctx, v62, v43, v82);
-                                            let v672 = constructor_output_reg(ctx, v671);
-                                            // Rule at src/isa/s390x/lower.isle line 1026.
-                                            return Some(v672);
-                                        }
-                                    }
-                                }
-                                let v67 = C::def_inst(ctx, v40.1);
-                                if let Some(v68) = v67 {
-                                    let v69 = &C::inst_data(ctx, v68);
-                                    if let &InstructionData::Unary {
-                                        opcode: ref v70,
-                                        arg: v71,
-                                    } = v69
-                                    {
-                                        if let &Opcode::Bnot = v70 {
-                                            let v63 = C::put_in_reg(ctx, v40.0);
-                                            let v73 = C::put_in_reg(ctx, v71);
-                                            let v669 = constructor_and_not_reg(ctx, v62, v63, v73);
-                                            let v670 = constructor_output_reg(ctx, v669);
-                                            // Rule at src/isa/s390x/lower.isle line 1024.
-                                            return Some(v670);
-                                        }
-                                    }
-                                }
-                            }
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v651 = C::uimm16shifted_from_inverted_value(ctx, v40.0);
-                            if let Some(v652) = v651 {
-                                let v43 = C::put_in_reg(ctx, v40.1);
-                                let v653 = constructor_and_uimm16shifted(ctx, v62, v43, v652);
-                                let v654 = constructor_output_reg(ctx, v653);
-                                // Rule at src/isa/s390x/lower.isle line 1002.
-                                return Some(v654);
-                            }
-                            let v647 = C::uimm16shifted_from_inverted_value(ctx, v40.1);
-                            if let Some(v648) = v647 {
-                                let v63 = C::put_in_reg(ctx, v40.0);
-                                let v649 = constructor_and_uimm16shifted(ctx, v62, v63, v648);
-                                let v650 = constructor_output_reg(ctx, v649);
-                                // Rule at src/isa/s390x/lower.isle line 1000.
-                                return Some(v650);
-                            }
-                            let v659 = C::uimm32shifted_from_inverted_value(ctx, v40.0);
-                            if let Some(v660) = v659 {
-                                let v43 = C::put_in_reg(ctx, v40.1);
-                                let v661 = constructor_and_uimm32shifted(ctx, v62, v43, v660);
-                                let v662 = constructor_output_reg(ctx, v661);
-                                // Rule at src/isa/s390x/lower.isle line 1006.
-                                return Some(v662);
-                            }
-                            let v655 = C::uimm32shifted_from_inverted_value(ctx, v40.1);
-                            if let Some(v656) = v655 {
-                                let v63 = C::put_in_reg(ctx, v40.0);
-                                let v657 = constructor_and_uimm32shifted(ctx, v62, v63, v656);
-                                let v658 = constructor_output_reg(ctx, v657);
-                                // Rule at src/isa/s390x/lower.isle line 1004.
-                                return Some(v658);
-                            }
-                            let v116 = C::value_type(ctx, v40.0);
-                            let v117 = C::ty_32_or_64(ctx, v116);
-                            if let Some(v118) = v117 {
-                                let v119 = C::sinkable_inst(ctx, v40.0);
-                                if let Some(v120) = v119 {
-                                    let v121 = &C::inst_data(ctx, v120);
-                                    if let &InstructionData::Load {
-                                        opcode: ref v122,
-                                        arg: v123,
-                                        flags: v124,
-                                        offset: v125,
-                                    } = v121
-                                    {
-                                        if let &Opcode::Load = v122 {
-                                            let v126 = C::bigendian(ctx, v124);
-                                            if let Some(v127) = v126 {
-                                                let v43 = C::put_in_reg(ctx, v40.1);
-                                                let v128 = &constructor_sink_load(ctx, v120);
-                                                let v665 = constructor_and_mem(ctx, v62, v43, v128);
-                                                let v666 = constructor_output_reg(ctx, v665);
-                                                // Rule at src/isa/s390x/lower.isle line 1012.
-                                                return Some(v666);
-                                            }
-                                        }
-                                    }
-                                }
-                            }
-                            let v101 = C::value_type(ctx, v40.1);
-                            let v102 = C::ty_32_or_64(ctx, v101);
-                            if let Some(v103) = v102 {
-                                let v104 = C::sinkable_inst(ctx, v40.1);
-                                if let Some(v105) = v104 {
-                                    let v106 = &C::inst_data(ctx, v105);
-                                    if let &InstructionData::Load {
-                                        opcode: ref v107,
-                                        arg: v108,
-                                        flags: v109,
-                                        offset: v110,
-                                    } = v106
-                                    {
-                                        if let &Opcode::Load = v107 {
-                                            let v111 = C::bigendian(ctx, v109);
-                                            if let Some(v112) = v111 {
-                                                let v63 = C::put_in_reg(ctx, v40.0);
-                                                let v113 = &constructor_sink_load(ctx, v105);
-                                                let v663 = constructor_and_mem(ctx, v62, v63, v113);
-                                                let v664 = constructor_output_reg(ctx, v663);
-                                                // Rule at src/isa/s390x/lower.isle line 1010.
-                                                return Some(v664);
-                                            }
-                                        }
-                                    }
-                                }
-                            }
-                        }
-                        if let Some(v37) = v36 {
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v63 = C::put_in_reg(ctx, v40.0);
-                            let v64 = C::put_in_reg(ctx, v40.1);
-                            let v667 = constructor_vec_and(ctx, v37, v63, v64);
-                            let v668 = constructor_output_reg(ctx, v667);
-                            // Rule at src/isa/s390x/lower.isle line 1016.
-                            return Some(v668);
-                        }
-                        if let Some(v62) = v61 {
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v63 = C::put_in_reg(ctx, v40.0);
-                            let v64 = C::put_in_reg(ctx, v40.1);
-                            let v645 = constructor_and_reg(ctx, v62, v63, v64);
-                            let v646 = constructor_output_reg(ctx, v645);
-                            // Rule at src/isa/s390x/lower.isle line 996.
-                            return Some(v646);
-                        }
-                    }
-                }
-                &Opcode::Bor => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v36 = C::vr128_ty(ctx, v3);
-                        if let Some(v37) = v36 {
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v76 = C::def_inst(ctx, v40.0);
-                            if let Some(v77) = v76 {
-                                let v78 = &C::inst_data(ctx, v77);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v79,
-                                    arg: v80,
-                                } = v78
-                                {
-                                    if let &Opcode::Bnot = v79 {
-                                        let v43 = C::put_in_reg(ctx, v40.1);
-                                        let v82 = C::put_in_reg(ctx, v80);
-                                        let v707 = constructor_vec_or_not(ctx, v37, v43, v82);
-                                        let v708 = constructor_output_reg(ctx, v707);
-                                        // Rule at src/isa/s390x/lower.isle line 1074.
-                                        return Some(v708);
-                                    }
-                                }
-                            }
-                            let v67 = C::def_inst(ctx, v40.1);
-                            if let Some(v68) = v67 {
-                                let v69 = &C::inst_data(ctx, v68);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v70,
-                                    arg: v71,
-                                } = v69
-                                {
-                                    if let &Opcode::Bnot = v70 {
-                                        let v63 = C::put_in_reg(ctx, v40.0);
-                                        let v73 = C::put_in_reg(ctx, v71);
-                                        let v705 = constructor_vec_or_not(ctx, v37, v63, v73);
-                                        let v706 = constructor_output_reg(ctx, v705);
-                                        // Rule at src/isa/s390x/lower.isle line 1072.
-                                        return Some(v706);
-                                    }
-                                }
-                            }
-                        }
-                        let v61 = C::fits_in_64(ctx, v3);
-                        if let Some(v62) = v61 {
-                            let v624 = C::mie2_enabled(ctx, v3);
-                            if let Some(v625) = v624 {
-                                let v40 = C::unpack_value_array_2(ctx, v39);
-                                let v76 = C::def_inst(ctx, v40.0);
-                                if let Some(v77) = v76 {
-                                    let v78 = &C::inst_data(ctx, v77);
-                                    if let &InstructionData::Unary {
-                                        opcode: ref v79,
-                                        arg: v80,
-                                    } = v78
-                                    {
-                                        if let &Opcode::Bnot = v79 {
-                                            let v43 = C::put_in_reg(ctx, v40.1);
-                                            let v82 = C::put_in_reg(ctx, v80);
-                                            let v703 = constructor_or_not_reg(ctx, v62, v43, v82);
-                                            let v704 = constructor_output_reg(ctx, v703);
-                                            // Rule at src/isa/s390x/lower.isle line 1068.
-                                            return Some(v704);
-                                        }
-                                    }
-                                }
-                                let v67 = C::def_inst(ctx, v40.1);
-                                if let Some(v68) = v67 {
-                                    let v69 = &C::inst_data(ctx, v68);
-                                    if let &InstructionData::Unary {
-                                        opcode: ref v70,
-                                        arg: v71,
-                                    } = v69
-                                    {
-                                        if let &Opcode::Bnot = v70 {
-                                            let v63 = C::put_in_reg(ctx, v40.0);
-                                            let v73 = C::put_in_reg(ctx, v71);
-                                            let v701 = constructor_or_not_reg(ctx, v62, v63, v73);
-                                            let v702 = constructor_output_reg(ctx, v701);
-                                            // Rule at src/isa/s390x/lower.isle line 1066.
-                                            return Some(v702);
-                                        }
-                                    }
-                                }
-                            }
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v683 = C::uimm16shifted_from_value(ctx, v40.0);
-                            if let Some(v684) = v683 {
-                                let v43 = C::put_in_reg(ctx, v40.1);
-                                let v685 = constructor_or_uimm16shifted(ctx, v62, v43, v684);
-                                let v686 = constructor_output_reg(ctx, v685);
-                                // Rule at src/isa/s390x/lower.isle line 1044.
-                                return Some(v686);
-                            }
-                            let v679 = C::uimm16shifted_from_value(ctx, v40.1);
-                            if let Some(v680) = v679 {
-                                let v63 = C::put_in_reg(ctx, v40.0);
-                                let v681 = constructor_or_uimm16shifted(ctx, v62, v63, v680);
-                                let v682 = constructor_output_reg(ctx, v681);
-                                // Rule at src/isa/s390x/lower.isle line 1042.
-                                return Some(v682);
-                            }
-                            let v691 = C::uimm32shifted_from_value(ctx, v40.0);
-                            if let Some(v692) = v691 {
-                                let v43 = C::put_in_reg(ctx, v40.1);
-                                let v693 = constructor_or_uimm32shifted(ctx, v62, v43, v692);
-                                let v694 = constructor_output_reg(ctx, v693);
-                                // Rule at src/isa/s390x/lower.isle line 1048.
-                                return Some(v694);
-                            }
-                            let v687 = C::uimm32shifted_from_value(ctx, v40.1);
-                            if let Some(v688) = v687 {
-                                let v63 = C::put_in_reg(ctx, v40.0);
-                                let v689 = constructor_or_uimm32shifted(ctx, v62, v63, v688);
-                                let v690 = constructor_output_reg(ctx, v689);
-                                // Rule at src/isa/s390x/lower.isle line 1046.
-                                return Some(v690);
-                            }
-                            let v116 = C::value_type(ctx, v40.0);
-                            let v117 = C::ty_32_or_64(ctx, v116);
-                            if let Some(v118) = v117 {
-                                let v119 = C::sinkable_inst(ctx, v40.0);
-                                if let Some(v120) = v119 {
-                                    let v121 = &C::inst_data(ctx, v120);
-                                    if let &InstructionData::Load {
-                                        opcode: ref v122,
-                                        arg: v123,
-                                        flags: v124,
-                                        offset: v125,
-                                    } = v121
-                                    {
-                                        if let &Opcode::Load = v122 {
-                                            let v126 = C::bigendian(ctx, v124);
-                                            if let Some(v127) = v126 {
-                                                let v43 = C::put_in_reg(ctx, v40.1);
-                                                let v128 = &constructor_sink_load(ctx, v120);
-                                                let v697 = constructor_or_mem(ctx, v62, v43, v128);
-                                                let v698 = constructor_output_reg(ctx, v697);
-                                                // Rule at src/isa/s390x/lower.isle line 1054.
-                                                return Some(v698);
-                                            }
-                                        }
-                                    }
-                                }
-                            }
-                            let v101 = C::value_type(ctx, v40.1);
-                            let v102 = C::ty_32_or_64(ctx, v101);
-                            if let Some(v103) = v102 {
-                                let v104 = C::sinkable_inst(ctx, v40.1);
-                                if let Some(v105) = v104 {
-                                    let v106 = &C::inst_data(ctx, v105);
-                                    if let &InstructionData::Load {
-                                        opcode: ref v107,
-                                        arg: v108,
-                                        flags: v109,
-                                        offset: v110,
-                                    } = v106
-                                    {
-                                        if let &Opcode::Load = v107 {
-                                            let v111 = C::bigendian(ctx, v109);
-                                            if let Some(v112) = v111 {
-                                                let v63 = C::put_in_reg(ctx, v40.0);
-                                                let v113 = &constructor_sink_load(ctx, v105);
-                                                let v695 = constructor_or_mem(ctx, v62, v63, v113);
-                                                let v696 = constructor_output_reg(ctx, v695);
-                                                // Rule at src/isa/s390x/lower.isle line 1052.
-                                                return Some(v696);
-                                            }
-                                        }
-                                    }
-                                }
-                            }
-                        }
-                        if let Some(v37) = v36 {
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v63 = C::put_in_reg(ctx, v40.0);
-                            let v64 = C::put_in_reg(ctx, v40.1);
-                            let v699 = constructor_vec_or(ctx, v37, v63, v64);
-                            let v700 = constructor_output_reg(ctx, v699);
-                            // Rule at src/isa/s390x/lower.isle line 1058.
-                            return Some(v700);
-                        }
-                        if let Some(v62) = v61 {
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v63 = C::put_in_reg(ctx, v40.0);
-                            let v64 = C::put_in_reg(ctx, v40.1);
-                            let v677 = constructor_or_reg(ctx, v62, v63, v64);
-                            let v678 = constructor_output_reg(ctx, v677);
-                            // Rule at src/isa/s390x/lower.isle line 1038.
-                            return Some(v678);
-                        }
-                    }
-                }
-                &Opcode::Bxor => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v36 = C::vr128_ty(ctx, v3);
-                        if let Some(v37) = v36 {
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v76 = C::def_inst(ctx, v40.0);
-                            if let Some(v77) = v76 {
-                                let v78 = &C::inst_data(ctx, v77);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v79,
-                                    arg: v80,
-                                } = v78
-                                {
-                                    if let &Opcode::Bnot = v79 {
-                                        let v43 = C::put_in_reg(ctx, v40.1);
-                                        let v82 = C::put_in_reg(ctx, v80);
-                                        let v727 = constructor_vec_not_xor(ctx, v37, v43, v82);
-                                        let v728 = constructor_output_reg(ctx, v727);
-                                        // Rule at src/isa/s390x/lower.isle line 1113.
-                                        return Some(v728);
-                                    }
-                                }
-                            }
-                            let v67 = C::def_inst(ctx, v40.1);
-                            if let Some(v68) = v67 {
-                                let v69 = &C::inst_data(ctx, v68);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v70,
-                                    arg: v71,
-                                } = v69
-                                {
-                                    if let &Opcode::Bnot = v70 {
-                                        let v63 = C::put_in_reg(ctx, v40.0);
-                                        let v73 = C::put_in_reg(ctx, v71);
-                                        let v725 = constructor_vec_not_xor(ctx, v37, v63, v73);
-                                        let v726 = constructor_output_reg(ctx, v725);
-                                        // Rule at src/isa/s390x/lower.isle line 1111.
-                                        return Some(v726);
-                                    }
-                                }
-                            }
-                        }
-                        let v61 = C::fits_in_64(ctx, v3);
-                        if let Some(v62) = v61 {
-                            let v624 = C::mie2_enabled(ctx, v3);
-                            if let Some(v625) = v624 {
-                                let v40 = C::unpack_value_array_2(ctx, v39);
-                                let v76 = C::def_inst(ctx, v40.0);
-                                if let Some(v77) = v76 {
-                                    let v78 = &C::inst_data(ctx, v77);
-                                    if let &InstructionData::Unary {
-                                        opcode: ref v79,
-                                        arg: v80,
-                                    } = v78
-                                    {
-                                        if let &Opcode::Bnot = v79 {
-                                            let v43 = C::put_in_reg(ctx, v40.1);
-                                            let v82 = C::put_in_reg(ctx, v80);
-                                            let v723 = constructor_not_xor_reg(ctx, v62, v43, v82);
-                                            let v724 = constructor_output_reg(ctx, v723);
-                                            // Rule at src/isa/s390x/lower.isle line 1107.
-                                            return Some(v724);
-                                        }
-                                    }
-                                }
-                                let v67 = C::def_inst(ctx, v40.1);
-                                if let Some(v68) = v67 {
-                                    let v69 = &C::inst_data(ctx, v68);
-                                    if let &InstructionData::Unary {
-                                        opcode: ref v70,
-                                        arg: v71,
-                                    } = v69
-                                    {
-                                        if let &Opcode::Bnot = v70 {
-                                            let v63 = C::put_in_reg(ctx, v40.0);
-                                            let v73 = C::put_in_reg(ctx, v71);
-                                            let v721 = constructor_not_xor_reg(ctx, v62, v63, v73);
-                                            let v722 = constructor_output_reg(ctx, v721);
-                                            // Rule at src/isa/s390x/lower.isle line 1105.
-                                            return Some(v722);
-                                        }
-                                    }
-                                }
-                            }
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v691 = C::uimm32shifted_from_value(ctx, v40.0);
-                            if let Some(v692) = v691 {
-                                let v43 = C::put_in_reg(ctx, v40.1);
-                                let v713 = constructor_xor_uimm32shifted(ctx, v62, v43, v692);
-                                let v714 = constructor_output_reg(ctx, v713);
-                                // Rule at src/isa/s390x/lower.isle line 1087.
-                                return Some(v714);
-                            }
-                            let v687 = C::uimm32shifted_from_value(ctx, v40.1);
-                            if let Some(v688) = v687 {
-                                let v63 = C::put_in_reg(ctx, v40.0);
-                                let v711 = constructor_xor_uimm32shifted(ctx, v62, v63, v688);
-                                let v712 = constructor_output_reg(ctx, v711);
-                                // Rule at src/isa/s390x/lower.isle line 1085.
-                                return Some(v712);
-                            }
-                            let v116 = C::value_type(ctx, v40.0);
-                            let v117 = C::ty_32_or_64(ctx, v116);
-                            if let Some(v118) = v117 {
-                                let v119 = C::sinkable_inst(ctx, v40.0);
-                                if let Some(v120) = v119 {
-                                    let v121 = &C::inst_data(ctx, v120);
-                                    if let &InstructionData::Load {
-                                        opcode: ref v122,
-                                        arg: v123,
-                                        flags: v124,
-                                        offset: v125,
-                                    } = v121
-                                    {
-                                        if let &Opcode::Load = v122 {
-                                            let v126 = C::bigendian(ctx, v124);
-                                            if let Some(v127) = v126 {
-                                                let v43 = C::put_in_reg(ctx, v40.1);
-                                                let v128 = &constructor_sink_load(ctx, v120);
-                                                let v717 = constructor_xor_mem(ctx, v62, v43, v128);
-                                                let v718 = constructor_output_reg(ctx, v717);
-                                                // Rule at src/isa/s390x/lower.isle line 1093.
-                                                return Some(v718);
-                                            }
-                                        }
-                                    }
-                                }
-                            }
-                            let v101 = C::value_type(ctx, v40.1);
-                            let v102 = C::ty_32_or_64(ctx, v101);
-                            if let Some(v103) = v102 {
-                                let v104 = C::sinkable_inst(ctx, v40.1);
-                                if let Some(v105) = v104 {
-                                    let v106 = &C::inst_data(ctx, v105);
-                                    if let &InstructionData::Load {
-                                        opcode: ref v107,
-                                        arg: v108,
-                                        flags: v109,
-                                        offset: v110,
-                                    } = v106
-                                    {
-                                        if let &Opcode::Load = v107 {
-                                            let v111 = C::bigendian(ctx, v109);
-                                            if let Some(v112) = v111 {
-                                                let v63 = C::put_in_reg(ctx, v40.0);
-                                                let v113 = &constructor_sink_load(ctx, v105);
-                                                let v715 = constructor_xor_mem(ctx, v62, v63, v113);
-                                                let v716 = constructor_output_reg(ctx, v715);
-                                                // Rule at src/isa/s390x/lower.isle line 1091.
-                                                return Some(v716);
-                                            }
-                                        }
-                                    }
-                                }
-                            }
-                        }
-                        if let Some(v37) = v36 {
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v63 = C::put_in_reg(ctx, v40.0);
-                            let v64 = C::put_in_reg(ctx, v40.1);
-                            let v719 = constructor_vec_xor(ctx, v37, v63, v64);
-                            let v720 = constructor_output_reg(ctx, v719);
-                            // Rule at src/isa/s390x/lower.isle line 1097.
-                            return Some(v720);
-                        }
-                        if let Some(v62) = v61 {
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v63 = C::put_in_reg(ctx, v40.0);
-                            let v64 = C::put_in_reg(ctx, v40.1);
-                            let v709 = constructor_xor_reg(ctx, v62, v63, v64);
-                            let v710 = constructor_output_reg(ctx, v709);
-                            // Rule at src/isa/s390x/lower.isle line 1081.
-                            return Some(v710);
-                        }
-                    }
-                }
-                &Opcode::Rotl => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        if v3 == I128 {
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v63 = C::put_in_reg(ctx, v40.0);
-                            let v535 = constructor_amt_vr(ctx, v40.1);
-                            let v536 = constructor_vec_neg(ctx, I8X16, v535);
-                            let v537 = constructor_vec_lshl_by_byte(ctx, v63, v535);
-                            let v538 = constructor_vec_lshl_by_bit(ctx, v537, v535);
-                            let v539 = constructor_vec_lshr_by_byte(ctx, v63, v536);
-                            let v540 = constructor_vec_lshr_by_bit(ctx, v539, v536);
-                            let v541 = constructor_vec_or(ctx, I128, v538, v540);
-                            let v542 = constructor_output_reg(ctx, v541);
-                            // Rule at src/isa/s390x/lower.isle line 808.
-                            return Some(v542);
-                        }
-                        let v149 = C::ty_vec128(ctx, v3);
-                        if let Some(v150) = v149 {
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v468 = C::i64_from_value(ctx, v40.1);
-                            if let Some(v469) = v468 {
-                                let v476 = C::mask_amt_imm(ctx, v150, v469);
-                                let v44 = C::put_in_reg(ctx, v40.0);
-                                let v533 = constructor_vec_rot_imm(ctx, v150, v44, v476);
-                                let v534 = constructor_output_reg(ctx, v533);
-                                // Rule at src/isa/s390x/lower.isle line 802.
-                                return Some(v534);
-                            }
-                            let v63 = C::put_in_reg(ctx, v40.0);
-                            let v473 = constructor_amt_reg(ctx, v40.1);
-                            let v531 = constructor_vec_rot_reg(ctx, v150, v63, v473);
-                            let v532 = constructor_output_reg(ctx, v531);
-                            // Rule at src/isa/s390x/lower.isle line 798.
-                            return Some(v532);
-                        }
-                        let v368 = C::ty_8_or_16(ctx, v3);
-                        if let Some(v369) = v368 {
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v468 = C::i64_from_value(ctx, v40.1);
-                            if let Some(v469) = v468 {
-                                let v523 = C::i64_from_negated_value(ctx, v40.1);
-                                if let Some(v524) = v523 {
-                                    let v287 = constructor_put_in_reg_zext32(ctx, v40.0);
-                                    let v514 = constructor_ty_ext32(ctx, v369);
-                                    let v525 = C::mask_amt_imm(ctx, v369, v469);
-                                    let v526 = C::mask_amt_imm(ctx, v369, v524);
-                                    let v527 = constructor_lshl_imm(ctx, v514, v287, v525);
-                                    let v528 = constructor_lshr_imm(ctx, v514, v287, v526);
-                                    let v529 = constructor_or_reg(ctx, v369, v527, v528);
-                                    let v530 = constructor_output_reg(ctx, v529);
-                                    // Rule at src/isa/s390x/lower.isle line 788.
-                                    return Some(v530);
-                                }
-                            }
-                            let v287 = constructor_put_in_reg_zext32(ctx, v40.0);
-                            let v514 = constructor_ty_ext32(ctx, v369);
-                            let v515 = constructor_amt_reg(ctx, v40.1);
-                            let v516 = constructor_neg_reg(ctx, I32, v515);
-                            let v517 = constructor_mask_amt_reg(ctx, v369, v515);
-                            let v518 = constructor_mask_amt_reg(ctx, v369, v516);
-                            let v519 = constructor_lshl_reg(ctx, v514, v287, v517);
-                            let v520 = constructor_lshr_reg(ctx, v514, v287, v518);
-                            let v521 = constructor_or_reg(ctx, v369, v519, v520);
-                            let v522 = constructor_output_reg(ctx, v521);
-                            // Rule at src/isa/s390x/lower.isle line 776.
-                            return Some(v522);
-                        }
-                        let v507 = C::ty_32_or_64(ctx, v3);
-                        if let Some(v508) = v507 {
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v468 = C::i64_from_value(ctx, v40.1);
-                            if let Some(v469) = v468 {
-                                let v511 = C::mask_amt_imm(ctx, v508, v469);
-                                let v44 = C::put_in_reg(ctx, v40.0);
-                                let v512 = constructor_rot_imm(ctx, v508, v44, v511);
-                                let v513 = constructor_output_reg(ctx, v512);
-                                // Rule at src/isa/s390x/lower.isle line 770.
-                                return Some(v513);
-                            }
-                            let v63 = C::put_in_reg(ctx, v40.0);
-                            let v473 = constructor_amt_reg(ctx, v40.1);
-                            let v509 = constructor_rot_reg(ctx, v508, v63, v473);
-                            let v510 = constructor_output_reg(ctx, v509);
-                            // Rule at src/isa/s390x/lower.isle line 766.
-                            return Some(v510);
-                        }
-                    }
-                }
-                &Opcode::Rotr => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        if v3 == I128 {
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v63 = C::put_in_reg(ctx, v40.0);
-                            let v535 = constructor_amt_vr(ctx, v40.1);
-                            let v536 = constructor_vec_neg(ctx, I8X16, v535);
-                            let v562 = constructor_vec_lshl_by_byte(ctx, v63, v536);
-                            let v563 = constructor_vec_lshl_by_bit(ctx, v562, v536);
-                            let v564 = constructor_vec_lshr_by_byte(ctx, v63, v535);
-                            let v565 = constructor_vec_lshr_by_bit(ctx, v564, v535);
-                            let v566 = constructor_vec_or(ctx, I128, v563, v565);
-                            let v567 = constructor_output_reg(ctx, v566);
-                            // Rule at src/isa/s390x/lower.isle line 868.
-                            return Some(v567);
-                        }
-                        let v149 = C::ty_vec128(ctx, v3);
-                        if let Some(v150) = v149 {
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v523 = C::i64_from_negated_value(ctx, v40.1);
-                            if let Some(v524) = v523 {
-                                let v559 = C::mask_amt_imm(ctx, v150, v524);
-                                let v44 = C::put_in_reg(ctx, v40.0);
-                                let v560 = constructor_vec_rot_imm(ctx, v150, v44, v559);
-                                let v561 = constructor_output_reg(ctx, v560);
-                                // Rule at src/isa/s390x/lower.isle line 862.
-                                return Some(v561);
-                            }
-                            let v464 = constructor_amt_reg(ctx, v40.1);
-                            let v543 = constructor_neg_reg(ctx, I32, v464);
-                            let v158 = C::put_in_reg(ctx, v40.0);
-                            let v557 = constructor_vec_rot_reg(ctx, v150, v158, v543);
-                            let v558 = constructor_output_reg(ctx, v557);
-                            // Rule at src/isa/s390x/lower.isle line 856.
-                            return Some(v558);
-                        }
-                        let v368 = C::ty_8_or_16(ctx, v3);
-                        if let Some(v369) = v368 {
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v468 = C::i64_from_value(ctx, v40.1);
-                            if let Some(v469) = v468 {
-                                let v523 = C::i64_from_negated_value(ctx, v40.1);
-                                if let Some(v524) = v523 {
-                                    let v287 = constructor_put_in_reg_zext32(ctx, v40.0);
-                                    let v514 = constructor_ty_ext32(ctx, v369);
-                                    let v525 = C::mask_amt_imm(ctx, v369, v469);
-                                    let v526 = C::mask_amt_imm(ctx, v369, v524);
-                                    let v553 = constructor_lshl_imm(ctx, v514, v287, v526);
-                                    let v554 = constructor_lshr_imm(ctx, v514, v287, v525);
-                                    let v555 = constructor_or_reg(ctx, v369, v553, v554);
-                                    let v556 = constructor_output_reg(ctx, v555);
-                                    // Rule at src/isa/s390x/lower.isle line 845.
-                                    return Some(v556);
-                                }
-                            }
-                            let v287 = constructor_put_in_reg_zext32(ctx, v40.0);
-                            let v514 = constructor_ty_ext32(ctx, v369);
-                            let v515 = constructor_amt_reg(ctx, v40.1);
-                            let v516 = constructor_neg_reg(ctx, I32, v515);
-                            let v517 = constructor_mask_amt_reg(ctx, v369, v515);
-                            let v518 = constructor_mask_amt_reg(ctx, v369, v516);
-                            let v549 = constructor_lshl_reg(ctx, v514, v287, v518);
-                            let v550 = constructor_lshr_reg(ctx, v514, v287, v517);
-                            let v551 = constructor_or_reg(ctx, v369, v549, v550);
-                            let v552 = constructor_output_reg(ctx, v551);
-                            // Rule at src/isa/s390x/lower.isle line 833.
-                            return Some(v552);
-                        }
-                        let v507 = C::ty_32_or_64(ctx, v3);
-                        if let Some(v508) = v507 {
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v523 = C::i64_from_negated_value(ctx, v40.1);
-                            if let Some(v524) = v523 {
-                                let v546 = C::mask_amt_imm(ctx, v508, v524);
-                                let v44 = C::put_in_reg(ctx, v40.0);
-                                let v547 = constructor_rot_imm(ctx, v508, v44, v546);
-                                let v548 = constructor_output_reg(ctx, v547);
-                                // Rule at src/isa/s390x/lower.isle line 827.
-                                return Some(v548);
-                            }
-                            let v464 = constructor_amt_reg(ctx, v40.1);
-                            let v543 = constructor_neg_reg(ctx, I32, v464);
-                            let v158 = C::put_in_reg(ctx, v40.0);
-                            let v544 = constructor_rot_reg(ctx, v508, v158, v543);
-                            let v545 = constructor_output_reg(ctx, v544);
-                            // Rule at src/isa/s390x/lower.isle line 821.
-                            return Some(v545);
-                        }
-                    }
-                }
-                &Opcode::Ishl => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        if v3 == I128 {
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v479 = constructor_amt_vr(ctx, v40.1);
-                            let v44 = C::put_in_reg(ctx, v40.0);
-                            let v480 = constructor_vec_lshl_by_byte(ctx, v44, v479);
-                            let v481 = constructor_vec_lshl_by_bit(ctx, v480, v479);
-                            let v482 = constructor_output_reg(ctx, v481);
-                            // Rule at src/isa/s390x/lower.isle line 696.
-                            return Some(v482);
-                        }
-                        let v149 = C::ty_vec128(ctx, v3);
-                        if let Some(v150) = v149 {
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v468 = C::i64_from_value(ctx, v40.1);
-                            if let Some(v469) = v468 {
-                                let v476 = C::mask_amt_imm(ctx, v150, v469);
-                                let v44 = C::put_in_reg(ctx, v40.0);
-                                let v477 = constructor_vec_lshl_imm(ctx, v150, v44, v476);
-                                let v478 = constructor_output_reg(ctx, v477);
-                                // Rule at src/isa/s390x/lower.isle line 691.
-                                return Some(v478);
-                            }
-                            let v63 = C::put_in_reg(ctx, v40.0);
-                            let v473 = constructor_amt_reg(ctx, v40.1);
-                            let v474 = constructor_vec_lshl_reg(ctx, v150, v63, v473);
-                            let v475 = constructor_output_reg(ctx, v474);
-                            // Rule at src/isa/s390x/lower.isle line 687.
-                            return Some(v475);
-                        }
-                        let v61 = C::fits_in_64(ctx, v3);
-                        if let Some(v62) = v61 {
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v468 = C::i64_from_value(ctx, v40.1);
-                            if let Some(v469) = v468 {
-                                let v470 = C::mask_amt_imm(ctx, v62, v469);
-                                let v44 = C::put_in_reg(ctx, v40.0);
-                                let v471 = constructor_lshl_imm(ctx, v62, v44, v470);
-                                let v472 = constructor_output_reg(ctx, v471);
-                                // Rule at src/isa/s390x/lower.isle line 682.
-                                return Some(v472);
-                            }
-                            let v464 = constructor_amt_reg(ctx, v40.1);
-                            let v465 = constructor_mask_amt_reg(ctx, v62, v464);
-                            let v158 = C::put_in_reg(ctx, v40.0);
-                            let v466 = constructor_lshl_reg(ctx, v62, v158, v465);
-                            let v467 = constructor_output_reg(ctx, v466);
-                            // Rule at src/isa/s390x/lower.isle line 677.
-                            return Some(v467);
-                        }
-                    }
-                }
-                &Opcode::Ushr => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        if v3 == I128 {
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v479 = constructor_amt_vr(ctx, v40.1);
-                            let v44 = C::put_in_reg(ctx, v40.0);
-                            let v493 = constructor_vec_lshr_by_byte(ctx, v44, v479);
-                            let v494 = constructor_vec_lshr_by_bit(ctx, v493, v479);
-                            let v495 = constructor_output_reg(ctx, v494);
-                            // Rule at src/isa/s390x/lower.isle line 727.
-                            return Some(v495);
-                        }
-                        let v149 = C::ty_vec128(ctx, v3);
-                        if let Some(v150) = v149 {
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v468 = C::i64_from_value(ctx, v40.1);
-                            if let Some(v469) = v468 {
-                                let v476 = C::mask_amt_imm(ctx, v150, v469);
-                                let v44 = C::put_in_reg(ctx, v40.0);
-                                let v491 = constructor_vec_lshr_imm(ctx, v150, v44, v476);
-                                let v492 = constructor_output_reg(ctx, v491);
-                                // Rule at src/isa/s390x/lower.isle line 722.
-                                return Some(v492);
-                            }
-                            let v63 = C::put_in_reg(ctx, v40.0);
-                            let v473 = constructor_amt_reg(ctx, v40.1);
-                            let v489 = constructor_vec_lshr_reg(ctx, v150, v63, v473);
-                            let v490 = constructor_output_reg(ctx, v489);
-                            // Rule at src/isa/s390x/lower.isle line 718.
-                            return Some(v490);
-                        }
-                        let v61 = C::fits_in_64(ctx, v3);
-                        if let Some(v62) = v61 {
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v468 = C::i64_from_value(ctx, v40.1);
-                            if let Some(v469) = v468 {
-                                let v287 = constructor_put_in_reg_zext32(ctx, v40.0);
-                                let v486 = C::mask_amt_imm(ctx, v62, v469);
-                                let v289 = constructor_ty_ext32(ctx, v62);
-                                let v487 = constructor_lshr_imm(ctx, v289, v287, v486);
-                                let v488 = constructor_output_reg(ctx, v487);
-                                // Rule at src/isa/s390x/lower.isle line 712.
-                                return Some(v488);
-                            }
-                            let v287 = constructor_put_in_reg_zext32(ctx, v40.0);
-                            let v473 = constructor_amt_reg(ctx, v40.1);
-                            let v483 = constructor_mask_amt_reg(ctx, v62, v473);
-                            let v455 = constructor_ty_ext32(ctx, v62);
-                            let v484 = constructor_lshr_reg(ctx, v455, v287, v483);
-                            let v485 = constructor_output_reg(ctx, v484);
-                            // Rule at src/isa/s390x/lower.isle line 705.
-                            return Some(v485);
-                        }
-                    }
-                }
-                &Opcode::Sshr => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        if v3 == I128 {
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v479 = constructor_amt_vr(ctx, v40.1);
-                            let v44 = C::put_in_reg(ctx, v40.0);
-                            let v504 = constructor_vec_ashr_by_byte(ctx, v44, v479);
-                            let v505 = constructor_vec_ashr_by_bit(ctx, v504, v479);
-                            let v506 = constructor_output_reg(ctx, v505);
-                            // Rule at src/isa/s390x/lower.isle line 758.
-                            return Some(v506);
-                        }
-                        let v149 = C::ty_vec128(ctx, v3);
-                        if let Some(v150) = v149 {
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v468 = C::i64_from_value(ctx, v40.1);
-                            if let Some(v469) = v468 {
-                                let v476 = C::mask_amt_imm(ctx, v150, v469);
-                                let v44 = C::put_in_reg(ctx, v40.0);
-                                let v502 = constructor_vec_ashr_imm(ctx, v150, v44, v476);
-                                let v503 = constructor_output_reg(ctx, v502);
-                                // Rule at src/isa/s390x/lower.isle line 753.
-                                return Some(v503);
-                            }
-                            let v63 = C::put_in_reg(ctx, v40.0);
-                            let v473 = constructor_amt_reg(ctx, v40.1);
-                            let v500 = constructor_vec_ashr_reg(ctx, v150, v63, v473);
-                            let v501 = constructor_output_reg(ctx, v500);
-                            // Rule at src/isa/s390x/lower.isle line 749.
-                            return Some(v501);
-                        }
-                        let v61 = C::fits_in_64(ctx, v3);
-                        if let Some(v62) = v61 {
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v468 = C::i64_from_value(ctx, v40.1);
-                            if let Some(v469) = v468 {
-                                let v311 = constructor_put_in_reg_sext32(ctx, v40.0);
-                                let v486 = C::mask_amt_imm(ctx, v62, v469);
-                                let v289 = constructor_ty_ext32(ctx, v62);
-                                let v498 = constructor_ashr_imm(ctx, v289, v311, v486);
-                                let v499 = constructor_output_reg(ctx, v498);
-                                // Rule at src/isa/s390x/lower.isle line 743.
-                                return Some(v499);
-                            }
-                            let v311 = constructor_put_in_reg_sext32(ctx, v40.0);
-                            let v473 = constructor_amt_reg(ctx, v40.1);
-                            let v483 = constructor_mask_amt_reg(ctx, v62, v473);
-                            let v455 = constructor_ty_ext32(ctx, v62);
-                            let v496 = constructor_ashr_reg(ctx, v455, v311, v483);
-                            let v497 = constructor_output_reg(ctx, v496);
-                            // Rule at src/isa/s390x/lower.isle line 736.
-                            return Some(v497);
-                        }
-                    }
-                }
-                &Opcode::Fadd => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v40 = C::unpack_value_array_2(ctx, v39);
-                        let v63 = C::put_in_reg(ctx, v40.0);
-                        let v64 = C::put_in_reg(ctx, v40.1);
-                        let v3 = C::value_type(ctx, v2);
-                        let v857 = constructor_fadd_reg(ctx, v3, v63, v64);
-                        let v858 = constructor_output_reg(ctx, v857);
-                        // Rule at src/isa/s390x/lower.isle line 1353.
-                        return Some(v858);
-                    }
-                }
-                &Opcode::Fsub => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v40 = C::unpack_value_array_2(ctx, v39);
-                        let v63 = C::put_in_reg(ctx, v40.0);
-                        let v64 = C::put_in_reg(ctx, v40.1);
-                        let v3 = C::value_type(ctx, v2);
-                        let v859 = constructor_fsub_reg(ctx, v3, v63, v64);
-                        let v860 = constructor_output_reg(ctx, v859);
-                        // Rule at src/isa/s390x/lower.isle line 1360.
-                        return Some(v860);
-                    }
-                }
-                &Opcode::Fmul => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v40 = C::unpack_value_array_2(ctx, v39);
-                        let v63 = C::put_in_reg(ctx, v40.0);
-                        let v64 = C::put_in_reg(ctx, v40.1);
-                        let v3 = C::value_type(ctx, v2);
-                        let v861 = constructor_fmul_reg(ctx, v3, v63, v64);
-                        let v862 = constructor_output_reg(ctx, v861);
-                        // Rule at src/isa/s390x/lower.isle line 1367.
-                        return Some(v862);
-                    }
-                }
-                &Opcode::Fdiv => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v40 = C::unpack_value_array_2(ctx, v39);
-                        let v63 = C::put_in_reg(ctx, v40.0);
-                        let v64 = C::put_in_reg(ctx, v40.1);
-                        let v3 = C::value_type(ctx, v2);
-                        let v863 = constructor_fdiv_reg(ctx, v3, v63, v64);
-                        let v864 = constructor_output_reg(ctx, v863);
-                        // Rule at src/isa/s390x/lower.isle line 1374.
-                        return Some(v864);
-                    }
-                }
-                &Opcode::Fcopysign => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            F32 => {
-                                let v40 = C::unpack_value_array_2(ctx, v39);
-                                let v63 = C::put_in_reg(ctx, v40.0);
-                                let v64 = C::put_in_reg(ctx, v40.1);
-                                let v874 = constructor_imm(ctx, F32, 0x7FFFFFFF);
-                                let v875 = constructor_vec_select(ctx, F32, v63, v64, v874);
-                                let v876 = constructor_output_reg(ctx, v875);
-                                // Rule at src/isa/s390x/lower.isle line 1409.
-                                return Some(v876);
-                            }
-                            F64 => {
-                                let v40 = C::unpack_value_array_2(ctx, v39);
-                                let v63 = C::put_in_reg(ctx, v40.0);
-                                let v64 = C::put_in_reg(ctx, v40.1);
-                                let v878 = constructor_imm(ctx, F64, 0x7FFFFFFFFFFFFFFF);
-                                let v879 = constructor_vec_select(ctx, F64, v63, v64, v878);
-                                let v880 = constructor_output_reg(ctx, v879);
-                                // Rule at src/isa/s390x/lower.isle line 1411.
-                                return Some(v880);
-                            }
-                            F32X4 => {
-                                let v40 = C::unpack_value_array_2(ctx, v39);
-                                let v63 = C::put_in_reg(ctx, v40.0);
-                                let v64 = C::put_in_reg(ctx, v40.1);
-                                let v883 = constructor_vec_imm_bit_mask(ctx, F32X4, 0x1, 0x1F);
-                                let v884 = constructor_vec_select(ctx, F32X4, v63, v64, v883);
-                                let v885 = constructor_output_reg(ctx, v884);
-                                // Rule at src/isa/s390x/lower.isle line 1413.
-                                return Some(v885);
-                            }
-                            F64X2 => {
-                                let v40 = C::unpack_value_array_2(ctx, v39);
-                                let v63 = C::put_in_reg(ctx, v40.0);
-                                let v64 = C::put_in_reg(ctx, v40.1);
-                                let v887 = constructor_vec_imm_bit_mask(ctx, F64X2, 0x1, 0x3F);
-                                let v888 = constructor_vec_select(ctx, F64X2, v63, v64, v887);
-                                let v889 = constructor_output_reg(ctx, v888);
-                                // Rule at src/isa/s390x/lower.isle line 1415.
-                                return Some(v889);
-                            }
-                            _ => {}
-                        }
-                    }
-                }
-                &Opcode::Fmin => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v40 = C::unpack_value_array_2(ctx, v39);
-                        let v63 = C::put_in_reg(ctx, v40.0);
-                        let v64 = C::put_in_reg(ctx, v40.1);
-                        let v3 = C::value_type(ctx, v2);
-                        let v865 = constructor_fmin_reg(ctx, v3, v63, v64);
-                        let v866 = constructor_output_reg(ctx, v865);
-                        // Rule at src/isa/s390x/lower.isle line 1381.
-                        return Some(v866);
-                    }
-                }
-                &Opcode::FminPseudo => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v40 = C::unpack_value_array_2(ctx, v39);
-                        let v63 = C::put_in_reg(ctx, v40.0);
-                        let v64 = C::put_in_reg(ctx, v40.1);
-                        let v3 = C::value_type(ctx, v2);
-                        let v869 = constructor_fmin_pseudo_reg(ctx, v3, v63, v64);
-                        let v870 = constructor_output_reg(ctx, v869);
-                        // Rule at src/isa/s390x/lower.isle line 1395.
-                        return Some(v870);
-                    }
-                }
-                &Opcode::Fmax => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v40 = C::unpack_value_array_2(ctx, v39);
-                        let v63 = C::put_in_reg(ctx, v40.0);
-                        let v64 = C::put_in_reg(ctx, v40.1);
-                        let v3 = C::value_type(ctx, v2);
-                        let v867 = constructor_fmax_reg(ctx, v3, v63, v64);
-                        let v868 = constructor_output_reg(ctx, v867);
-                        // Rule at src/isa/s390x/lower.isle line 1388.
-                        return Some(v868);
-                    }
-                }
-                &Opcode::FmaxPseudo => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v40 = C::unpack_value_array_2(ctx, v39);
-                        let v63 = C::put_in_reg(ctx, v40.0);
-                        let v64 = C::put_in_reg(ctx, v40.1);
-                        let v3 = C::value_type(ctx, v2);
-                        let v871 = constructor_fmax_pseudo_reg(ctx, v3, v63, v64);
-                        let v872 = constructor_output_reg(ctx, v871);
-                        // Rule at src/isa/s390x/lower.isle line 1402.
-                        return Some(v872);
-                    }
-                }
-                &Opcode::Snarrow => {
-                    let v40 = C::unpack_value_array_2(ctx, v39);
-                    let v116 = C::value_type(ctx, v40.0);
-                    let v603 = C::ty_vec128(ctx, v116);
-                    if let Some(v604) = v603 {
-                        let v63 = C::put_in_reg(ctx, v40.0);
-                        let v64 = C::put_in_reg(ctx, v40.1);
-                        let v605 = constructor_vec_pack_ssat_lane_order(ctx, v604, v63, v64);
-                        let v606 = constructor_output_reg(ctx, v605);
-                        // Rule at src/isa/s390x/lower.isle line 927.
-                        return Some(v606);
-                    }
-                }
-                &Opcode::Unarrow => {
-                    let v40 = C::unpack_value_array_2(ctx, v39);
-                    let v116 = C::value_type(ctx, v40.0);
-                    let v603 = C::ty_vec128(ctx, v116);
-                    if let Some(v604) = v603 {
-                        let v609 = constructor_vec_imm(ctx, v604, 0x0);
-                        let v44 = C::put_in_reg(ctx, v40.0);
-                        let v610 = constructor_vec_smax(ctx, v604, v44, v609);
-                        let v394 = C::put_in_reg(ctx, v40.1);
-                        let v611 = constructor_vec_smax(ctx, v604, v394, v609);
-                        let v612 = constructor_vec_pack_usat_lane_order(ctx, v604, v610, v611);
-                        let v613 = constructor_output_reg(ctx, v612);
-                        // Rule at src/isa/s390x/lower.isle line 939.
-                        return Some(v613);
-                    }
-                }
-                &Opcode::Uunarrow => {
-                    let v40 = C::unpack_value_array_2(ctx, v39);
-                    let v116 = C::value_type(ctx, v40.0);
-                    let v603 = C::ty_vec128(ctx, v116);
-                    if let Some(v604) = v603 {
-                        let v63 = C::put_in_reg(ctx, v40.0);
-                        let v64 = C::put_in_reg(ctx, v40.1);
-                        let v607 = constructor_vec_pack_usat_lane_order(ctx, v604, v63, v64);
-                        let v608 = constructor_output_reg(ctx, v607);
-                        // Rule at src/isa/s390x/lower.isle line 933.
-                        return Some(v608);
-                    }
-                }
-                &Opcode::IaddPairwise => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v40 = C::unpack_value_array_2(ctx, v39);
-                        let v67 = C::def_inst(ctx, v40.1);
-                        if let Some(v68) = v67 {
-                            let v69 = &C::inst_data(ctx, v68);
-                            if let &InstructionData::Binary {
-                                opcode: ref v203,
-                                args: ref v204,
-                            } = v69
-                            {
-                                if let &Opcode::Imul = v203 {
-                                    let v76 = C::def_inst(ctx, v40.0);
-                                    if let Some(v77) = v76 {
-                                        let v78 = &C::inst_data(ctx, v77);
-                                        if let &InstructionData::Binary {
-                                            opcode: ref v187,
-                                            args: ref v188,
-                                        } = v78
-                                        {
-                                            if let &Opcode::Imul = v187 {
-                                                let v189 = C::unpack_value_array_2(ctx, v188);
-                                                let v192 = C::def_inst(ctx, v189.0);
-                                                if let Some(v193) = v192 {
-                                                    let v194 = &C::inst_data(ctx, v193);
-                                                    if let &InstructionData::Unary {
-                                                        opcode: ref v195,
-                                                        arg: v196,
-                                                    } = v194
-                                                    {
-                                                        if let &Opcode::SwidenLow = v195 {
-                                                            let v198 = C::def_inst(ctx, v189.1);
-                                                            if let Some(v199) = v198 {
-                                                                let v200 = &C::inst_data(ctx, v199);
-                                                                if let &InstructionData::Unary {
-                                                                    opcode: ref v201,
-                                                                    arg: v202,
-                                                                } = v200
-                                                                {
-                                                                    if let &Opcode::SwidenLow = v201
-                                                                    {
-                                                                        let v205 =
-                                                                            C::unpack_value_array_2(
-                                                                                ctx, v204,
-                                                                            );
-                                                                        let v208 = C::def_inst(
-                                                                            ctx, v205.0,
-                                                                        );
-                                                                        if let Some(v209) = v208 {
-                                                                            let v210 =
-                                                                                &C::inst_data(
-                                                                                    ctx, v209,
-                                                                                );
-                                                                            if let &InstructionData::Unary {
-                                                                                opcode: ref v211,
-                                                                                arg: v212,
-                                                                            } = v210 {
-                                                                                if let &Opcode::SwidenHigh = v211 {
-                                                                                    if v196 == v212 {
-                                                                                        let v213 = C::def_inst(ctx, v205.1);
-                                                                                        if let Some(v214) = v213 {
-                                                                                            let v215 = &C::inst_data(ctx, v214);
-                                                                                            if let &InstructionData::Unary {
-                                                                                                opcode: ref v216,
-                                                                                                arg: v217,
-                                                                                            } = v215 {
-                                                                                                if let &Opcode::SwidenHigh = v216 {
-                                                                                                    if v202 == v217 {
-                                                                                                        let v218 = C::put_in_reg(ctx, v196);
-                                                                                                        let v219 = C::put_in_reg(ctx, v202);
-                                                                                                        let v197 = C::value_type(ctx, v196);
-                                                                                                        let v220 = constructor_vec_smul_even(ctx, v197, v218, v219);
-                                                                                                        let v221 = C::put_in_reg(ctx, v196);
-                                                                                                        let v222 = C::put_in_reg(ctx, v202);
-                                                                                                        let v223 = constructor_vec_smul_odd(ctx, v197, v221, v222);
-                                                                                                        let v3 = C::value_type(ctx, v2);
-                                                                                                        let v224 = constructor_vec_add(ctx, v3, v220, v223);
-                                                                                                        let v225 = constructor_output_reg(ctx, v224);
-                                                                                                        // Rule at src/isa/s390x/lower.isle line 142.
-                                                                                                        return Some(v225);
-                                                                                                    }
-                                                                                                }
-                                                                                            }
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                            }
-                        }
-                        let v3 = C::value_type(ctx, v2);
-                        let v171 = C::multi_lane(ctx, v3);
-                        if let Some(v172) = v171 {
-                            let v176 = C::u32_as_u64(ctx, v172.0);
-                            let v177 = constructor_vec_imm_splat(ctx, I8X16, v176);
-                            let v178 = constructor_vec_widen_type(ctx, v3);
-                            let v158 = C::put_in_reg(ctx, v40.0);
-                            let v152 = C::put_in_reg(ctx, v40.0);
-                            let v179 = constructor_vec_lshr_by_byte(ctx, v152, v177);
-                            let v180 = constructor_vec_add(ctx, v3, v158, v179);
-                            let v181 = C::put_in_reg(ctx, v40.1);
-                            let v182 = C::put_in_reg(ctx, v40.1);
-                            let v183 = constructor_vec_lshr_by_byte(ctx, v182, v177);
-                            let v184 = constructor_vec_add(ctx, v3, v181, v183);
-                            let v185 = constructor_vec_pack_lane_order(ctx, v178, v180, v184);
-                            let v186 = constructor_output_reg(ctx, v185);
-                            // Rule at src/isa/s390x/lower.isle line 135.
-                            return Some(v186);
-                        }
-                    }
-                }
-                &Opcode::Iconcat => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v36 = C::vr128_ty(ctx, v3);
-                        if let Some(v37) = v36 {
-                            let v40 = C::unpack_value_array_2(ctx, v39);
-                            let v43 = C::put_in_reg(ctx, v40.1);
-                            let v44 = C::put_in_reg(ctx, v40.0);
-                            let v45 = constructor_mov_to_vec128(ctx, v37, v43, v44);
-                            let v46 = constructor_output_reg(ctx, v45);
-                            // Rule at src/isa/s390x/lower.isle line 51.
-                            return Some(v46);
-                        }
-                    }
-                }
-                _ => {}
-            }
-        }
-        &InstructionData::BinaryImm8 {
-            opcode: ref v1141,
-            arg: v1142,
-            imm: v1143,
-        } => {
-            if let &Opcode::Extractlane = v1141 {
-                let v1 = C::first_result(ctx, arg0);
-                if let Some(v2) = v1 {
-                    let v3 = C::value_type(ctx, v2);
-                    let v1146 = C::ty_int_ref_scalar_64(ctx, v3);
-                    if let Some(v1147) = v1146 {
-                        let v1148 = C::put_in_reg(ctx, v1142);
-                        let v1144 = C::value_type(ctx, v1142);
-                        let v1145 = C::u8_from_uimm8(ctx, v1143);
-                        let v1149 = C::be_lane_idx(ctx, v1144, v1145);
-                        let v584 = C::zero_reg(ctx);
-                        let v1150 = constructor_vec_extract_lane(ctx, v1144, v1148, v1149, v584);
-                        let v1151 = constructor_output_reg(ctx, v1150);
-                        // Rule at src/isa/s390x/lower.isle line 1883.
-                        return Some(v1151);
-                    }
-                    let v1074 = C::ty_scalar_float(ctx, v3);
-                    if let Some(v1075) = v1074 {
-                        let v1148 = C::put_in_reg(ctx, v1142);
-                        let v1144 = C::value_type(ctx, v1142);
-                        let v1145 = C::u8_from_uimm8(ctx, v1143);
-                        let v1149 = C::be_lane_idx(ctx, v1144, v1145);
-                        let v1152 = constructor_vec_replicate_lane(ctx, v1144, v1148, v1149);
-                        let v1153 = constructor_output_reg(ctx, v1152);
-                        // Rule at src/isa/s390x/lower.isle line 1889.
-                        return Some(v1153);
-                    }
-                }
-            }
-        }
-        &InstructionData::Call {
-            opcode: ref v1996,
-            args: v1997,
-            func_ref: v1998,
-        } => {
-            if let &Opcode::Call = v1996 {
-                let v2000 = C::func_ref_data(ctx, v1998);
-                let v2004 = C::reloc_distance_near(ctx, v2000.2);
-                if let Some(v2005) = v2004 {
-                    let v2006 = C::abi_sig(ctx, v2000.0);
-                    let v2007 = C::abi_accumulate_outgoing_args_size(ctx, v2006);
-                    let v2009 = C::abi_num_args(ctx, v2006);
-                    let v2010 = C::range(ctx, 0x0, v2009);
-                    let v1999 = C::value_list_slice(ctx, v1997);
-                    let v2011 = &constructor_lower_call_args(ctx, v2006, v2010, v1999);
-                    let v2012 = &C::defs_init(ctx, v2006);
-                    let v2014 =
-                        &constructor_abi_call(ctx, v2006, v2000.1, v2011, v2012, &Opcode::Call);
-                    let v2015 = constructor_side_effect(ctx, v2014);
-                    let v2016 = C::abi_first_ret(ctx, v2000.0, v2006);
-                    let v2017 = C::abi_num_rets(ctx, v2006);
-                    let v2019 = &C::output_builder_new(ctx);
-                    let v2018 = C::range(ctx, v2016, v2017);
-                    let v2020 = constructor_lower_call_rets(ctx, v2006, v2012, v2018, v2019);
-                    // Rule at src/isa/s390x/lower.isle line 3898.
-                    return Some(v2020);
-                }
-                let v2006 = C::abi_sig(ctx, v2000.0);
-                let v2007 = C::abi_accumulate_outgoing_args_size(ctx, v2006);
-                let v2009 = C::abi_num_args(ctx, v2006);
-                let v2010 = C::range(ctx, 0x0, v2009);
-                let v1999 = C::value_list_slice(ctx, v1997);
-                let v2011 = &constructor_lower_call_args(ctx, v2006, v2010, v1999);
-                let v2012 = &C::defs_init(ctx, v2006);
-                let v2021 = SymbolReloc::Absolute {
-                    name: v2000.1,
-                    offset: 0x0,
-                };
-                let v2022 = constructor_load_symbol_reloc(ctx, &v2021);
-                let v2023 =
-                    &constructor_abi_call_ind(ctx, v2006, v2022, v2011, v2012, &Opcode::Call);
-                let v2024 = constructor_side_effect(ctx, v2023);
-                let v2025 = C::abi_first_ret(ctx, v2000.0, v2006);
-                let v2026 = C::abi_num_rets(ctx, v2006);
-                let v2028 = &C::output_builder_new(ctx);
-                let v2027 = C::range(ctx, v2025, v2026);
-                let v2029 = constructor_lower_call_rets(ctx, v2006, v2012, v2027, v2028);
-                // Rule at src/isa/s390x/lower.isle line 3908.
-                return Some(v2029);
-            }
-        }
-        &InstructionData::CallIndirect {
-            opcode: ref v2030,
-            args: v2031,
-            sig_ref: v2032,
-        } => {
-            if let &Opcode::CallIndirect = v2030 {
-                let v2033 = C::value_list_slice(ctx, v2031);
-                let v2034 = C::value_slice_unwrap(ctx, v2033);
-                if let Some(v2035) = v2034 {
-                    let v2038 = C::abi_sig(ctx, v2032);
-                    let v2039 = C::put_in_reg(ctx, v2035.0);
-                    let v2040 = C::abi_accumulate_outgoing_args_size(ctx, v2038);
-                    let v2041 = C::abi_num_args(ctx, v2038);
-                    let v2042 = C::range(ctx, 0x0, v2041);
-                    let v2043 = &constructor_lower_call_args(ctx, v2038, v2042, v2035.1);
-                    let v2044 = &C::defs_init(ctx, v2038);
-                    let v2046 = &constructor_abi_call_ind(
-                        ctx,
-                        v2038,
-                        v2039,
-                        v2043,
-                        v2044,
-                        &Opcode::CallIndirect,
-                    );
-                    let v2047 = constructor_side_effect(ctx, v2046);
-                    let v2048 = C::abi_first_ret(ctx, v2032, v2038);
-                    let v2049 = C::abi_num_rets(ctx, v2038);
-                    let v2028 = &C::output_builder_new(ctx);
-                    let v2050 = C::range(ctx, v2048, v2049);
-                    let v2051 = constructor_lower_call_rets(ctx, v2038, v2044, v2050, v2028);
-                    // Rule at src/isa/s390x/lower.isle line 3919.
-                    return Some(v2051);
-                }
-            }
-        }
-        &InstructionData::CondTrap {
-            opcode: ref v1895,
-            arg: v1896,
-            code: ref v1897,
-        } => {
-            match v1895 {
-                &Opcode::Trapz => {
-                    let v1898 = &constructor_value_nonzero(ctx, v1896);
-                    let v1899 = &constructor_invert_bool(ctx, v1898);
-                    let v1900 = &constructor_trap_if_bool(ctx, v1899, v1897);
-                    let v1901 = constructor_side_effect(ctx, v1900);
-                    // Rule at src/isa/s390x/lower.isle line 3799.
-                    return Some(v1901);
-                }
-                &Opcode::Trapnz => {
-                    let v1898 = &constructor_value_nonzero(ctx, v1896);
-                    let v1902 = &constructor_trap_if_bool(ctx, v1898, v1897);
-                    let v1903 = constructor_side_effect(ctx, v1902);
-                    // Rule at src/isa/s390x/lower.isle line 3805.
-                    return Some(v1903);
-                }
-                &Opcode::ResumableTrapnz => {
-                    let v1898 = &constructor_value_nonzero(ctx, v1896);
-                    let v1902 = &constructor_trap_if_bool(ctx, v1898, v1897);
-                    let v1903 = constructor_side_effect(ctx, v1902);
-                    // Rule at src/isa/s390x/lower.isle line 3811.
-                    return Some(v1903);
-                }
-                _ => {}
-            }
-        }
-        &InstructionData::FloatCompare {
-            opcode: ref v1771,
-            args: ref v1772,
-            cond: ref v1773,
-        } => {
-            if let &Opcode::Fcmp = v1771 {
-                let v1 = C::first_result(ctx, arg0);
-                if let Some(v2) = v1 {
-                    match v1773 {
-                        &FloatCC::Equal => {
-                            let v3 = C::value_type(ctx, v2);
-                            let v149 = C::ty_vec128(ctx, v3);
-                            if let Some(v150) = v149 {
-                                let v1774 = C::unpack_value_array_2(ctx, v1772);
-                                let v1780 = C::put_in_reg(ctx, v1774.0);
-                                let v1781 = C::put_in_reg(ctx, v1774.1);
-                                let v1782 = constructor_vec_fcmpeq(ctx, v150, v1780, v1781);
-                                let v1783 = constructor_output_reg(ctx, v1782);
-                                // Rule at src/isa/s390x/lower.isle line 3451.
-                                return Some(v1783);
-                            }
-                        }
-                        &FloatCC::GreaterThan => {
-                            let v3 = C::value_type(ctx, v2);
-                            let v149 = C::ty_vec128(ctx, v3);
-                            if let Some(v150) = v149 {
-                                let v1774 = C::unpack_value_array_2(ctx, v1772);
-                                let v1780 = C::put_in_reg(ctx, v1774.0);
-                                let v1781 = C::put_in_reg(ctx, v1774.1);
-                                let v1786 = constructor_vec_fcmph(ctx, v150, v1780, v1781);
-                                let v1787 = constructor_output_reg(ctx, v1786);
-                                // Rule at src/isa/s390x/lower.isle line 3455.
-                                return Some(v1787);
-                            }
-                        }
-                        &FloatCC::GreaterThanOrEqual => {
-                            let v3 = C::value_type(ctx, v2);
-                            let v149 = C::ty_vec128(ctx, v3);
-                            if let Some(v150) = v149 {
-                                let v1774 = C::unpack_value_array_2(ctx, v1772);
-                                let v1780 = C::put_in_reg(ctx, v1774.0);
-                                let v1781 = C::put_in_reg(ctx, v1774.1);
-                                let v1790 = constructor_vec_fcmphe(ctx, v150, v1780, v1781);
-                                let v1791 = constructor_output_reg(ctx, v1790);
-                                // Rule at src/isa/s390x/lower.isle line 3459.
-                                return Some(v1791);
-                            }
-                        }
-                        &FloatCC::LessThan => {
-                            let v3 = C::value_type(ctx, v2);
-                            let v149 = C::ty_vec128(ctx, v3);
-                            if let Some(v150) = v149 {
-                                let v1774 = C::unpack_value_array_2(ctx, v1772);
-                                let v1794 = C::put_in_reg(ctx, v1774.1);
-                                let v1795 = C::put_in_reg(ctx, v1774.0);
-                                let v1796 = constructor_vec_fcmph(ctx, v150, v1794, v1795);
-                                let v1797 = constructor_output_reg(ctx, v1796);
-                                // Rule at src/isa/s390x/lower.isle line 3463.
-                                return Some(v1797);
-                            }
-                        }
-                        &FloatCC::LessThanOrEqual => {
-                            let v3 = C::value_type(ctx, v2);
-                            let v149 = C::ty_vec128(ctx, v3);
-                            if let Some(v150) = v149 {
-                                let v1774 = C::unpack_value_array_2(ctx, v1772);
-                                let v1794 = C::put_in_reg(ctx, v1774.1);
-                                let v1795 = C::put_in_reg(ctx, v1774.0);
-                                let v1800 = constructor_vec_fcmphe(ctx, v150, v1794, v1795);
-                                let v1801 = constructor_output_reg(ctx, v1800);
-                                // Rule at src/isa/s390x/lower.isle line 3467.
-                                return Some(v1801);
-                            }
-                        }
-                        &FloatCC::NotEqual => {
-                            let v3 = C::value_type(ctx, v2);
-                            let v149 = C::ty_vec128(ctx, v3);
-                            if let Some(v150) = v149 {
-                                let v1774 = C::unpack_value_array_2(ctx, v1772);
-                                let v1780 = C::put_in_reg(ctx, v1774.0);
-                                let v1781 = C::put_in_reg(ctx, v1774.1);
-                                let v1782 = constructor_vec_fcmpeq(ctx, v150, v1780, v1781);
-                                let v1784 = constructor_vec_not(ctx, v150, v1782);
-                                let v1785 = constructor_output_reg(ctx, v1784);
-                                // Rule at src/isa/s390x/lower.isle line 3453.
-                                return Some(v1785);
-                            }
-                        }
-                        &FloatCC::Ordered => {
-                            let v3 = C::value_type(ctx, v2);
-                            let v149 = C::ty_vec128(ctx, v3);
-                            if let Some(v150) = v149 {
-                                let v1774 = C::unpack_value_array_2(ctx, v1772);
-                                let v1780 = C::put_in_reg(ctx, v1774.0);
-                                let v1781 = C::put_in_reg(ctx, v1774.1);
-                                let v1790 = constructor_vec_fcmphe(ctx, v150, v1780, v1781);
-                                let v1804 = C::put_in_reg(ctx, v1774.1);
-                                let v1805 = C::put_in_reg(ctx, v1774.0);
-                                let v1806 = constructor_vec_fcmphe(ctx, v150, v1804, v1805);
-                                let v1807 = constructor_vec_or(ctx, v150, v1790, v1806);
-                                let v1808 = constructor_output_reg(ctx, v1807);
-                                // Rule at src/isa/s390x/lower.isle line 3471.
-                                return Some(v1808);
-                            }
-                        }
-                        &FloatCC::OrderedNotEqual => {
-                            let v3 = C::value_type(ctx, v2);
-                            let v149 = C::ty_vec128(ctx, v3);
-                            if let Some(v150) = v149 {
-                                let v1774 = C::unpack_value_array_2(ctx, v1772);
-                                let v1780 = C::put_in_reg(ctx, v1774.0);
-                                let v1781 = C::put_in_reg(ctx, v1774.1);
-                                let v1786 = constructor_vec_fcmph(ctx, v150, v1780, v1781);
-                                let v1804 = C::put_in_reg(ctx, v1774.1);
-                                let v1805 = C::put_in_reg(ctx, v1774.0);
-                                let v1811 = constructor_vec_fcmph(ctx, v150, v1804, v1805);
-                                let v1812 = constructor_vec_or(ctx, v150, v1786, v1811);
-                                let v1813 = constructor_output_reg(ctx, v1812);
-                                // Rule at src/isa/s390x/lower.isle line 3475.
-                                return Some(v1813);
-                            }
-                        }
-                        &FloatCC::Unordered => {
-                            let v3 = C::value_type(ctx, v2);
-                            let v149 = C::ty_vec128(ctx, v3);
-                            if let Some(v150) = v149 {
-                                let v1774 = C::unpack_value_array_2(ctx, v1772);
-                                let v1780 = C::put_in_reg(ctx, v1774.0);
-                                let v1781 = C::put_in_reg(ctx, v1774.1);
-                                let v1790 = constructor_vec_fcmphe(ctx, v150, v1780, v1781);
-                                let v1804 = C::put_in_reg(ctx, v1774.1);
-                                let v1805 = C::put_in_reg(ctx, v1774.0);
-                                let v1806 = constructor_vec_fcmphe(ctx, v150, v1804, v1805);
-                                let v1809 = constructor_vec_not_or(ctx, v150, v1790, v1806);
-                                let v1810 = constructor_output_reg(ctx, v1809);
-                                // Rule at src/isa/s390x/lower.isle line 3473.
-                                return Some(v1810);
-                            }
-                        }
-                        &FloatCC::UnorderedOrEqual => {
-                            let v3 = C::value_type(ctx, v2);
-                            let v149 = C::ty_vec128(ctx, v3);
-                            if let Some(v150) = v149 {
-                                let v1774 = C::unpack_value_array_2(ctx, v1772);
-                                let v1780 = C::put_in_reg(ctx, v1774.0);
-                                let v1781 = C::put_in_reg(ctx, v1774.1);
-                                let v1786 = constructor_vec_fcmph(ctx, v150, v1780, v1781);
-                                let v1804 = C::put_in_reg(ctx, v1774.1);
-                                let v1805 = C::put_in_reg(ctx, v1774.0);
-                                let v1811 = constructor_vec_fcmph(ctx, v150, v1804, v1805);
-                                let v1814 = constructor_vec_not_or(ctx, v150, v1786, v1811);
-                                let v1815 = constructor_output_reg(ctx, v1814);
-                                // Rule at src/isa/s390x/lower.isle line 3477.
-                                return Some(v1815);
-                            }
-                        }
-                        &FloatCC::UnorderedOrGreaterThan => {
-                            let v3 = C::value_type(ctx, v2);
-                            let v149 = C::ty_vec128(ctx, v3);
-                            if let Some(v150) = v149 {
-                                let v1774 = C::unpack_value_array_2(ctx, v1772);
-                                let v1794 = C::put_in_reg(ctx, v1774.1);
-                                let v1795 = C::put_in_reg(ctx, v1774.0);
-                                let v1800 = constructor_vec_fcmphe(ctx, v150, v1794, v1795);
-                                let v1802 = constructor_vec_not(ctx, v150, v1800);
-                                let v1803 = constructor_output_reg(ctx, v1802);
-                                // Rule at src/isa/s390x/lower.isle line 3469.
-                                return Some(v1803);
-                            }
-                        }
-                        &FloatCC::UnorderedOrGreaterThanOrEqual => {
-                            let v3 = C::value_type(ctx, v2);
-                            let v149 = C::ty_vec128(ctx, v3);
-                            if let Some(v150) = v149 {
-                                let v1774 = C::unpack_value_array_2(ctx, v1772);
-                                let v1794 = C::put_in_reg(ctx, v1774.1);
-                                let v1795 = C::put_in_reg(ctx, v1774.0);
-                                let v1796 = constructor_vec_fcmph(ctx, v150, v1794, v1795);
-                                let v1798 = constructor_vec_not(ctx, v150, v1796);
-                                let v1799 = constructor_output_reg(ctx, v1798);
-                                // Rule at src/isa/s390x/lower.isle line 3465.
-                                return Some(v1799);
-                            }
-                        }
-                        &FloatCC::UnorderedOrLessThan => {
-                            let v3 = C::value_type(ctx, v2);
-                            let v149 = C::ty_vec128(ctx, v3);
-                            if let Some(v150) = v149 {
-                                let v1774 = C::unpack_value_array_2(ctx, v1772);
-                                let v1780 = C::put_in_reg(ctx, v1774.0);
-                                let v1781 = C::put_in_reg(ctx, v1774.1);
-                                let v1790 = constructor_vec_fcmphe(ctx, v150, v1780, v1781);
-                                let v1792 = constructor_vec_not(ctx, v150, v1790);
-                                let v1793 = constructor_output_reg(ctx, v1792);
-                                // Rule at src/isa/s390x/lower.isle line 3461.
-                                return Some(v1793);
-                            }
-                        }
-                        &FloatCC::UnorderedOrLessThanOrEqual => {
-                            let v3 = C::value_type(ctx, v2);
-                            let v149 = C::ty_vec128(ctx, v3);
-                            if let Some(v150) = v149 {
-                                let v1774 = C::unpack_value_array_2(ctx, v1772);
-                                let v1780 = C::put_in_reg(ctx, v1774.0);
-                                let v1781 = C::put_in_reg(ctx, v1774.1);
-                                let v1786 = constructor_vec_fcmph(ctx, v150, v1780, v1781);
-                                let v1788 = constructor_vec_not(ctx, v150, v1786);
-                                let v1789 = constructor_output_reg(ctx, v1788);
-                                // Rule at src/isa/s390x/lower.isle line 3457.
-                                return Some(v1789);
-                            }
-                        }
-                        _ => {}
-                    }
-                    let v3 = C::value_type(ctx, v2);
-                    let v61 = C::fits_in_64(ctx, v3);
-                    if let Some(v62) = v61 {
-                        let v1774 = C::unpack_value_array_2(ctx, v1772);
-                        let v1777 = &constructor_fcmp_val(ctx, v1773, v1774.0, v1774.1);
-                        let v1778 = constructor_lower_bool(ctx, v62, v1777);
-                        let v1779 = constructor_output_reg(ctx, v1778);
-                        // Rule at src/isa/s390x/lower.isle line 3439.
-                        return Some(v1779);
-                    }
-                }
-            }
-        }
-        &InstructionData::FuncAddr {
-            opcode: ref v1452,
-            func_ref: v1453,
-        } => {
-            if let &Opcode::FuncAddr = v1452 {
-                let v1454 = C::func_ref_data(ctx, v1453);
-                let v1458 = C::reloc_distance_near(ctx, v1454.2);
-                if let Some(v1459) = v1458 {
-                    let v1461 = C::memflags_trusted(ctx);
-                    let v1462 = &C::memarg_symbol(ctx, v1454.1, 0x0, v1461);
-                    let v1463 = constructor_load_addr(ctx, v1462);
-                    let v1464 = constructor_output_reg(ctx, v1463);
-                    // Rule at src/isa/s390x/lower.isle line 2245.
-                    return Some(v1464);
-                }
-                let v1466 = SymbolReloc::Absolute {
-                    name: v1454.1,
-                    offset: 0x0,
-                };
-                let v1467 = constructor_load_symbol_reloc(ctx, &v1466);
-                let v1468 = constructor_output_reg(ctx, v1467);
-                // Rule at src/isa/s390x/lower.isle line 2249.
-                return Some(v1468);
-            }
-        }
-        &InstructionData::IntAddTrap {
-            opcode: ref v1906,
-            args: ref v1907,
-            code: ref v1908,
-        } => {
-            if let &Opcode::UaddOverflowTrap = v1906 {
-                let v1 = C::first_result(ctx, arg0);
-                if let Some(v2) = v1 {
-                    let v3 = C::value_type(ctx, v2);
-                    let v61 = C::fits_in_64(ctx, v3);
-                    if let Some(v62) = v61 {
-                        let v1909 = C::unpack_value_array_2(ctx, v1907);
-                        let v1929 = C::def_inst(ctx, v1909.0);
-                        if let Some(v1930) = v1929 {
-                            let v1931 = &C::inst_data(ctx, v1930);
-                            if let &InstructionData::Unary {
-                                opcode: ref v1932,
-                                arg: v1933,
-                            } = v1931
-                            {
-                                if let &Opcode::Uextend = v1932 {
-                                    let v1934 = C::value_type(ctx, v1933);
-                                    if v1934 == I32 {
-                                        let v1935 = C::put_in_reg(ctx, v1909.1);
-                                        let v1936 = C::put_in_reg(ctx, v1933);
-                                        let v1937 =
-                                            &constructor_add_logical_reg_zext32_with_flags_paired(
-                                                ctx, v62, v1935, v1936,
-                                            );
-                                        let v1915 = &C::mask_as_cond(ctx, 0x3);
-                                        let v1916 = &constructor_trap_if_impl(ctx, v1915, v1908);
-                                        let v1938 = constructor_with_flags(ctx, v1937, v1916);
-                                        let v1939 = C::output(ctx, v1938);
-                                        // Rule at src/isa/s390x/lower.isle line 3847.
-                                        return Some(v1939);
-                                    }
-                                }
-                            }
-                        }
-                        let v1947 = C::u32_from_value(ctx, v1909.0);
-                        if let Some(v1948) = v1947 {
-                            let v1935 = C::put_in_reg(ctx, v1909.1);
-                            let v1949 = &constructor_add_logical_zimm32_with_flags_paired(
-                                ctx, v62, v1935, v1948,
-                            );
-                            let v1943 = &C::mask_as_cond(ctx, 0x3);
-                            let v1944 = &constructor_trap_if_impl(ctx, v1943, v1908);
-                            let v1950 = constructor_with_flags(ctx, v1949, v1944);
-                            let v1951 = C::output(ctx, v1950);
-                            // Rule at src/isa/s390x/lower.isle line 3859.
-                            return Some(v1951);
-                        }
-                        let v1971 = C::sinkable_inst(ctx, v1909.0);
-                        if let Some(v1972) = v1971 {
-                            let v1973 = &C::inst_data(ctx, v1972);
-                            if let &InstructionData::Load {
-                                opcode: ref v1974,
-                                arg: v1975,
-                                flags: v1976,
-                                offset: v1977,
-                            } = v1973
-                            {
-                                match v1974 {
-                                    &Opcode::Load => {
-                                        let v1968 = C::value_type(ctx, v1909.0);
-                                        let v1969 = C::ty_32_or_64(ctx, v1968);
-                                        if let Some(v1970) = v1969 {
-                                            let v1978 = C::bigendian(ctx, v1976);
-                                            if let Some(v1979) = v1978 {
-                                                let v1935 = C::put_in_reg(ctx, v1909.1);
-                                                let v1980 = &constructor_sink_load(ctx, v1972);
-                                                let v1981 =
-                                                    &constructor_add_logical_mem_with_flags_paired(
-                                                        ctx, v62, v1935, v1980,
-                                                    );
-                                                let v1915 = &C::mask_as_cond(ctx, 0x3);
-                                                let v1916 =
-                                                    &constructor_trap_if_impl(ctx, v1915, v1908);
-                                                let v1982 =
-                                                    constructor_with_flags(ctx, v1981, v1916);
-                                                let v1983 = C::output(ctx, v1982);
-                                                // Rule at src/isa/s390x/lower.isle line 3871.
-                                                return Some(v1983);
-                                            }
-                                        }
-                                    }
-                                    &Opcode::Uload32 => {
-                                        let v1978 = C::bigendian(ctx, v1976);
-                                        if let Some(v1979) = v1978 {
-                                            let v1935 = C::put_in_reg(ctx, v1909.1);
-                                            let v1988 = &constructor_sink_uload32(ctx, v1972);
-                                            let v1989 = &constructor_add_logical_mem_zext32_with_flags_paired(ctx, v62, v1935, v1988);
-                                            let v1915 = &C::mask_as_cond(ctx, 0x3);
-                                            let v1916 =
-                                                &constructor_trap_if_impl(ctx, v1915, v1908);
-                                            let v1990 = constructor_with_flags(ctx, v1989, v1916);
-                                            let v1991 = C::output(ctx, v1990);
-                                            // Rule at src/isa/s390x/lower.isle line 3883.
-                                            return Some(v1991);
-                                        }
-                                    }
-                                    _ => {}
-                                }
-                            }
-                        }
-                        let v1919 = C::def_inst(ctx, v1909.1);
-                        if let Some(v1920) = v1919 {
-                            let v1921 = &C::inst_data(ctx, v1920);
-                            if let &InstructionData::Unary {
-                                opcode: ref v1922,
-                                arg: v1923,
-                            } = v1921
-                            {
-                                if let &Opcode::Uextend = v1922 {
-                                    let v1924 = C::value_type(ctx, v1923);
-                                    if v1924 == I32 {
-                                        let v1912 = C::put_in_reg(ctx, v1909.0);
-                                        let v1925 = C::put_in_reg(ctx, v1923);
-                                        let v1926 =
-                                            &constructor_add_logical_reg_zext32_with_flags_paired(
-                                                ctx, v62, v1912, v1925,
-                                            );
-                                        let v1915 = &C::mask_as_cond(ctx, 0x3);
-                                        let v1916 = &constructor_trap_if_impl(ctx, v1915, v1908);
-                                        let v1927 = constructor_with_flags(ctx, v1926, v1916);
-                                        let v1928 = C::output(ctx, v1927);
-                                        // Rule at src/isa/s390x/lower.isle line 3842.
-                                        return Some(v1928);
-                                    }
-                                }
-                            }
-                        }
-                        let v1940 = C::u32_from_value(ctx, v1909.1);
-                        if let Some(v1941) = v1940 {
-                            let v1912 = C::put_in_reg(ctx, v1909.0);
-                            let v1942 = &constructor_add_logical_zimm32_with_flags_paired(
-                                ctx, v62, v1912, v1941,
-                            );
-                            let v1943 = &C::mask_as_cond(ctx, 0x3);
-                            let v1944 = &constructor_trap_if_impl(ctx, v1943, v1908);
-                            let v1945 = constructor_with_flags(ctx, v1942, v1944);
-                            let v1946 = C::output(ctx, v1945);
-                            // Rule at src/isa/s390x/lower.isle line 3854.
-                            return Some(v1946);
-                        }
-                        let v1955 = C::sinkable_inst(ctx, v1909.1);
-                        if let Some(v1956) = v1955 {
-                            let v1957 = &C::inst_data(ctx, v1956);
-                            if let &InstructionData::Load {
-                                opcode: ref v1958,
-                                arg: v1959,
-                                flags: v1960,
-                                offset: v1961,
-                            } = v1957
-                            {
-                                match v1958 {
-                                    &Opcode::Load => {
-                                        let v1952 = C::value_type(ctx, v1909.1);
-                                        let v1953 = C::ty_32_or_64(ctx, v1952);
-                                        if let Some(v1954) = v1953 {
-                                            let v1962 = C::bigendian(ctx, v1960);
-                                            if let Some(v1963) = v1962 {
-                                                let v1912 = C::put_in_reg(ctx, v1909.0);
-                                                let v1964 = &constructor_sink_load(ctx, v1956);
-                                                let v1965 =
-                                                    &constructor_add_logical_mem_with_flags_paired(
-                                                        ctx, v62, v1912, v1964,
-                                                    );
-                                                let v1915 = &C::mask_as_cond(ctx, 0x3);
-                                                let v1916 =
-                                                    &constructor_trap_if_impl(ctx, v1915, v1908);
-                                                let v1966 =
-                                                    constructor_with_flags(ctx, v1965, v1916);
-                                                let v1967 = C::output(ctx, v1966);
-                                                // Rule at src/isa/s390x/lower.isle line 3866.
-                                                return Some(v1967);
-                                            }
-                                        }
-                                    }
-                                    &Opcode::Uload32 => {
-                                        let v1962 = C::bigendian(ctx, v1960);
-                                        if let Some(v1963) = v1962 {
-                                            let v1912 = C::put_in_reg(ctx, v1909.0);
-                                            let v1984 = &constructor_sink_uload32(ctx, v1956);
-                                            let v1985 = &constructor_add_logical_mem_zext32_with_flags_paired(ctx, v62, v1912, v1984);
-                                            let v1915 = &C::mask_as_cond(ctx, 0x3);
-                                            let v1916 =
-                                                &constructor_trap_if_impl(ctx, v1915, v1908);
-                                            let v1986 = constructor_with_flags(ctx, v1985, v1916);
-                                            let v1987 = C::output(ctx, v1986);
-                                            // Rule at src/isa/s390x/lower.isle line 3878.
-                                            return Some(v1987);
-                                        }
-                                    }
-                                    _ => {}
-                                }
-                            }
-                        }
-                        let v1912 = C::put_in_reg(ctx, v1909.0);
-                        let v1913 = C::put_in_reg(ctx, v1909.1);
-                        let v1914 =
-                            &constructor_add_logical_reg_with_flags_paired(ctx, v62, v1912, v1913);
-                        let v1915 = &C::mask_as_cond(ctx, 0x3);
-                        let v1916 = &constructor_trap_if_impl(ctx, v1915, v1908);
-                        let v1917 = constructor_with_flags(ctx, v1914, v1916);
-                        let v1918 = C::output(ctx, v1917);
-                        // Rule at src/isa/s390x/lower.isle line 3836.
-                        return Some(v1918);
-                    }
-                }
-            }
-        }
-        &InstructionData::IntCompare {
-            opcode: ref v1737,
-            args: ref v1738,
-            cond: ref v1739,
-        } => {
-            if let &Opcode::Icmp = v1737 {
-                let v1 = C::first_result(ctx, arg0);
-                if let Some(v2) = v1 {
-                    match v1739 {
-                        &IntCC::Equal => {
-                            let v3 = C::value_type(ctx, v2);
-                            let v149 = C::ty_vec128(ctx, v3);
-                            if let Some(v150) = v149 {
-                                let v1740 = C::unpack_value_array_2(ctx, v1738);
-                                let v1747 = C::put_in_reg(ctx, v1740.0);
-                                let v1748 = C::put_in_reg(ctx, v1740.1);
-                                let v1749 = constructor_vec_cmpeq(ctx, v150, v1747, v1748);
-                                let v1750 = constructor_output_reg(ctx, v1749);
-                                // Rule at src/isa/s390x/lower.isle line 3413.
-                                return Some(v1750);
-                            }
-                        }
-                        &IntCC::NotEqual => {
-                            let v3 = C::value_type(ctx, v2);
-                            let v149 = C::ty_vec128(ctx, v3);
-                            if let Some(v150) = v149 {
-                                let v1740 = C::unpack_value_array_2(ctx, v1738);
-                                let v1747 = C::put_in_reg(ctx, v1740.0);
-                                let v1748 = C::put_in_reg(ctx, v1740.1);
-                                let v1749 = constructor_vec_cmpeq(ctx, v150, v1747, v1748);
-                                let v1751 = constructor_vec_not(ctx, v150, v1749);
-                                let v1752 = constructor_output_reg(ctx, v1751);
-                                // Rule at src/isa/s390x/lower.isle line 3415.
-                                return Some(v1752);
-                            }
-                        }
-                        &IntCC::SignedGreaterThan => {
-                            let v3 = C::value_type(ctx, v2);
-                            let v149 = C::ty_vec128(ctx, v3);
-                            if let Some(v150) = v149 {
-                                let v1740 = C::unpack_value_array_2(ctx, v1738);
-                                let v1747 = C::put_in_reg(ctx, v1740.0);
-                                let v1748 = C::put_in_reg(ctx, v1740.1);
-                                let v1753 = constructor_vec_cmph(ctx, v150, v1747, v1748);
-                                let v1754 = constructor_output_reg(ctx, v1753);
-                                // Rule at src/isa/s390x/lower.isle line 3417.
-                                return Some(v1754);
-                            }
-                        }
-                        &IntCC::SignedGreaterThanOrEqual => {
-                            let v3 = C::value_type(ctx, v2);
-                            let v149 = C::ty_vec128(ctx, v3);
-                            if let Some(v150) = v149 {
-                                let v1740 = C::unpack_value_array_2(ctx, v1738);
-                                let v1757 = C::put_in_reg(ctx, v1740.1);
-                                let v1758 = C::put_in_reg(ctx, v1740.0);
-                                let v1759 = constructor_vec_cmph(ctx, v150, v1757, v1758);
-                                let v1761 = constructor_vec_not(ctx, v150, v1759);
-                                let v1762 = constructor_output_reg(ctx, v1761);
-                                // Rule at src/isa/s390x/lower.isle line 3423.
-                                return Some(v1762);
-                            }
-                        }
-                        &IntCC::SignedLessThan => {
-                            let v3 = C::value_type(ctx, v2);
-                            let v149 = C::ty_vec128(ctx, v3);
-                            if let Some(v150) = v149 {
-                                let v1740 = C::unpack_value_array_2(ctx, v1738);
-                                let v1757 = C::put_in_reg(ctx, v1740.1);
-                                let v1758 = C::put_in_reg(ctx, v1740.0);
-                                let v1759 = constructor_vec_cmph(ctx, v150, v1757, v1758);
-                                let v1760 = constructor_output_reg(ctx, v1759);
-                                // Rule at src/isa/s390x/lower.isle line 3421.
-                                return Some(v1760);
-                            }
-                        }
-                        &IntCC::SignedLessThanOrEqual => {
-                            let v3 = C::value_type(ctx, v2);
-                            let v149 = C::ty_vec128(ctx, v3);
-                            if let Some(v150) = v149 {
-                                let v1740 = C::unpack_value_array_2(ctx, v1738);
-                                let v1747 = C::put_in_reg(ctx, v1740.0);
-                                let v1748 = C::put_in_reg(ctx, v1740.1);
-                                let v1753 = constructor_vec_cmph(ctx, v150, v1747, v1748);
-                                let v1755 = constructor_vec_not(ctx, v150, v1753);
-                                let v1756 = constructor_output_reg(ctx, v1755);
-                                // Rule at src/isa/s390x/lower.isle line 3419.
-                                return Some(v1756);
-                            }
-                        }
-                        &IntCC::UnsignedGreaterThan => {
-                            let v3 = C::value_type(ctx, v2);
-                            let v149 = C::ty_vec128(ctx, v3);
-                            if let Some(v150) = v149 {
-                                let v1740 = C::unpack_value_array_2(ctx, v1738);
-                                let v1747 = C::put_in_reg(ctx, v1740.0);
-                                let v1748 = C::put_in_reg(ctx, v1740.1);
-                                let v1763 = constructor_vec_cmphl(ctx, v150, v1747, v1748);
-                                let v1764 = constructor_output_reg(ctx, v1763);
-                                // Rule at src/isa/s390x/lower.isle line 3425.
-                                return Some(v1764);
-                            }
-                        }
-                        &IntCC::UnsignedGreaterThanOrEqual => {
-                            let v3 = C::value_type(ctx, v2);
-                            let v149 = C::ty_vec128(ctx, v3);
-                            if let Some(v150) = v149 {
-                                let v1740 = C::unpack_value_array_2(ctx, v1738);
-                                let v1757 = C::put_in_reg(ctx, v1740.1);
-                                let v1758 = C::put_in_reg(ctx, v1740.0);
-                                let v1767 = constructor_vec_cmphl(ctx, v150, v1757, v1758);
-                                let v1769 = constructor_vec_not(ctx, v150, v1767);
-                                let v1770 = constructor_output_reg(ctx, v1769);
-                                // Rule at src/isa/s390x/lower.isle line 3431.
-                                return Some(v1770);
-                            }
-                        }
-                        &IntCC::UnsignedLessThan => {
-                            let v3 = C::value_type(ctx, v2);
-                            let v149 = C::ty_vec128(ctx, v3);
-                            if let Some(v150) = v149 {
-                                let v1740 = C::unpack_value_array_2(ctx, v1738);
-                                let v1757 = C::put_in_reg(ctx, v1740.1);
-                                let v1758 = C::put_in_reg(ctx, v1740.0);
-                                let v1767 = constructor_vec_cmphl(ctx, v150, v1757, v1758);
-                                let v1768 = constructor_output_reg(ctx, v1767);
-                                // Rule at src/isa/s390x/lower.isle line 3429.
-                                return Some(v1768);
-                            }
-                        }
-                        &IntCC::UnsignedLessThanOrEqual => {
-                            let v3 = C::value_type(ctx, v2);
-                            let v149 = C::ty_vec128(ctx, v3);
-                            if let Some(v150) = v149 {
-                                let v1740 = C::unpack_value_array_2(ctx, v1738);
-                                let v1747 = C::put_in_reg(ctx, v1740.0);
-                                let v1748 = C::put_in_reg(ctx, v1740.1);
-                                let v1763 = constructor_vec_cmphl(ctx, v150, v1747, v1748);
-                                let v1765 = constructor_vec_not(ctx, v150, v1763);
-                                let v1766 = constructor_output_reg(ctx, v1765);
-                                // Rule at src/isa/s390x/lower.isle line 3427.
-                                return Some(v1766);
-                            }
-                        }
-                        _ => {}
-                    }
-                    let v3 = C::value_type(ctx, v2);
-                    let v61 = C::fits_in_64(ctx, v3);
-                    if let Some(v62) = v61 {
-                        let v1740 = C::unpack_value_array_2(ctx, v1738);
-                        let v1744 = &constructor_icmp_val(ctx, true, v1739, v1740.0, v1740.1);
-                        let v1745 = constructor_lower_bool(ctx, v62, v1744);
-                        let v1746 = constructor_output_reg(ctx, v1745);
-                        // Rule at src/isa/s390x/lower.isle line 3291.
-                        return Some(v1746);
-                    }
-                }
-            }
-        }
-        &InstructionData::Load {
-            opcode: ref v1496,
-            arg: v1497,
-            flags: v1498,
-            offset: v1499,
-        } => {
-            match v1496 {
-                &Opcode::Load => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v36 = C::vr128_ty(ctx, v3);
-                        if let Some(v37) = v36 {
-                            let v1433 = &C::lane_order(ctx);
-                            match v1433 {
-                                &LaneOrder::LittleEndian => {
-                                    let v1504 = C::bigendian(ctx, v1498);
-                                    if let Some(v1505) = v1504 {
-                                        let v1533 = constructor_vec_load_elt_rev(
-                                            ctx, v37, v1498, v1497, v1499,
-                                        );
-                                        let v1534 = constructor_output_reg(ctx, v1533);
-                                        // Rule at src/isa/s390x/lower.isle line 2357.
-                                        return Some(v1534);
-                                    }
-                                    let v1509 = C::littleendian(ctx, v1498);
-                                    if let Some(v1510) = v1509 {
-                                        let v1535 = constructor_vec_load_full_rev(
-                                            ctx, v37, v1498, v1497, v1499,
-                                        );
-                                        let v1536 = constructor_output_reg(ctx, v1535);
-                                        // Rule at src/isa/s390x/lower.isle line 2362.
-                                        return Some(v1536);
-                                    }
-                                }
-                                &LaneOrder::BigEndian => {
-                                    let v1504 = C::bigendian(ctx, v1498);
-                                    if let Some(v1505) = v1504 {
-                                        let v1501 =
-                                            &constructor_lower_address(ctx, v1498, v1497, v1499);
-                                        let v1529 = constructor_vec_load(ctx, v37, v1501);
-                                        let v1530 = constructor_output_reg(ctx, v1529);
-                                        // Rule at src/isa/s390x/lower.isle line 2347.
-                                        return Some(v1530);
-                                    }
-                                    let v1509 = C::littleendian(ctx, v1498);
-                                    if let Some(v1510) = v1509 {
-                                        let v1531 = constructor_vec_load_byte_rev(
-                                            ctx, v37, v1498, v1497, v1499,
-                                        );
-                                        let v1532 = constructor_output_reg(ctx, v1531);
-                                        // Rule at src/isa/s390x/lower.isle line 2352.
-                                        return Some(v1532);
-                                    }
-                                }
-                                _ => {}
-                            }
-                        }
-                        match v3 {
-                            I8 => {
-                                let v1501 = &constructor_lower_address(ctx, v1498, v1497, v1499);
-                                let v1502 = constructor_zext32_mem(ctx, I8, v1501);
-                                let v1503 = constructor_output_reg(ctx, v1502);
-                                // Rule at src/isa/s390x/lower.isle line 2295.
-                                return Some(v1503);
-                            }
-                            I16 => {
-                                let v1504 = C::bigendian(ctx, v1498);
-                                if let Some(v1505) = v1504 {
-                                    let v1501 =
-                                        &constructor_lower_address(ctx, v1498, v1497, v1499);
-                                    let v1507 = constructor_zext32_mem(ctx, I16, v1501);
-                                    let v1508 = constructor_output_reg(ctx, v1507);
-                                    // Rule at src/isa/s390x/lower.isle line 2299.
-                                    return Some(v1508);
-                                }
-                                let v1509 = C::littleendian(ctx, v1498);
-                                if let Some(v1510) = v1509 {
-                                    let v1501 =
-                                        &constructor_lower_address(ctx, v1498, v1497, v1499);
-                                    let v1511 = constructor_loadrev16(ctx, v1501);
-                                    let v1512 = constructor_output_reg(ctx, v1511);
-                                    // Rule at src/isa/s390x/lower.isle line 2303.
-                                    return Some(v1512);
-                                }
-                            }
-                            I32 => {
-                                let v1504 = C::bigendian(ctx, v1498);
-                                if let Some(v1505) = v1504 {
-                                    let v1501 =
-                                        &constructor_lower_address(ctx, v1498, v1497, v1499);
-                                    let v1513 = constructor_load32(ctx, v1501);
-                                    let v1514 = constructor_output_reg(ctx, v1513);
-                                    // Rule at src/isa/s390x/lower.isle line 2307.
-                                    return Some(v1514);
-                                }
-                                let v1509 = C::littleendian(ctx, v1498);
-                                if let Some(v1510) = v1509 {
-                                    let v1501 =
-                                        &constructor_lower_address(ctx, v1498, v1497, v1499);
-                                    let v1515 = constructor_loadrev32(ctx, v1501);
-                                    let v1516 = constructor_output_reg(ctx, v1515);
-                                    // Rule at src/isa/s390x/lower.isle line 2311.
-                                    return Some(v1516);
-                                }
-                            }
-                            I64 => {
-                                let v1504 = C::bigendian(ctx, v1498);
-                                if let Some(v1505) = v1504 {
-                                    let v1501 =
-                                        &constructor_lower_address(ctx, v1498, v1497, v1499);
-                                    let v1517 = constructor_load64(ctx, v1501);
-                                    let v1518 = constructor_output_reg(ctx, v1517);
-                                    // Rule at src/isa/s390x/lower.isle line 2315.
-                                    return Some(v1518);
-                                }
-                                let v1509 = C::littleendian(ctx, v1498);
-                                if let Some(v1510) = v1509 {
-                                    let v1501 =
-                                        &constructor_lower_address(ctx, v1498, v1497, v1499);
-                                    let v1519 = constructor_loadrev64(ctx, v1501);
-                                    let v1520 = constructor_output_reg(ctx, v1519);
-                                    // Rule at src/isa/s390x/lower.isle line 2319.
-                                    return Some(v1520);
-                                }
-                            }
-                            R64 => {
-                                let v1504 = C::bigendian(ctx, v1498);
-                                if let Some(v1505) = v1504 {
-                                    let v1501 =
-                                        &constructor_lower_address(ctx, v1498, v1497, v1499);
-                                    let v1517 = constructor_load64(ctx, v1501);
-                                    let v1518 = constructor_output_reg(ctx, v1517);
-                                    // Rule at src/isa/s390x/lower.isle line 2323.
-                                    return Some(v1518);
-                                }
-                                let v1509 = C::littleendian(ctx, v1498);
-                                if let Some(v1510) = v1509 {
-                                    let v1501 =
-                                        &constructor_lower_address(ctx, v1498, v1497, v1499);
-                                    let v1519 = constructor_loadrev64(ctx, v1501);
-                                    let v1520 = constructor_output_reg(ctx, v1519);
-                                    // Rule at src/isa/s390x/lower.isle line 2327.
-                                    return Some(v1520);
-                                }
-                            }
-                            F32 => {
-                                let v1504 = C::bigendian(ctx, v1498);
-                                if let Some(v1505) = v1504 {
-                                    let v1501 =
-                                        &constructor_lower_address(ctx, v1498, v1497, v1499);
-                                    let v1521 =
-                                        constructor_vec_load_lane_undef(ctx, F32X4, v1501, 0x0);
-                                    let v1522 = constructor_output_reg(ctx, v1521);
-                                    // Rule at src/isa/s390x/lower.isle line 2331.
-                                    return Some(v1522);
-                                }
-                                let v1509 = C::littleendian(ctx, v1498);
-                                if let Some(v1510) = v1509 {
-                                    let v1501 =
-                                        &constructor_lower_address(ctx, v1498, v1497, v1499);
-                                    let v1523 = constructor_vec_load_lane_little_undef(
-                                        ctx, F32X4, v1501, 0x0,
-                                    );
-                                    let v1524 = constructor_output_reg(ctx, v1523);
-                                    // Rule at src/isa/s390x/lower.isle line 2335.
-                                    return Some(v1524);
-                                }
-                            }
-                            F64 => {
-                                let v1504 = C::bigendian(ctx, v1498);
-                                if let Some(v1505) = v1504 {
-                                    let v1501 =
-                                        &constructor_lower_address(ctx, v1498, v1497, v1499);
-                                    let v1525 =
-                                        constructor_vec_load_lane_undef(ctx, F64X2, v1501, 0x0);
-                                    let v1526 = constructor_output_reg(ctx, v1525);
-                                    // Rule at src/isa/s390x/lower.isle line 2339.
-                                    return Some(v1526);
-                                }
-                                let v1509 = C::littleendian(ctx, v1498);
-                                if let Some(v1510) = v1509 {
-                                    let v1501 =
-                                        &constructor_lower_address(ctx, v1498, v1497, v1499);
-                                    let v1527 = constructor_vec_load_lane_little_undef(
-                                        ctx, F64X2, v1501, 0x0,
-                                    );
-                                    let v1528 = constructor_output_reg(ctx, v1527);
-                                    // Rule at src/isa/s390x/lower.isle line 2343.
-                                    return Some(v1528);
-                                }
-                            }
-                            _ => {}
-                        }
-                    }
-                }
-                &Opcode::Uload8 => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v579 = C::gpr64_ty(ctx, v3);
-                        if let Some(v580) = v579 {
-                            let v1501 = &constructor_lower_address(ctx, v1498, v1497, v1499);
-                            let v1537 = constructor_zext64_mem(ctx, I8, v1501);
-                            let v1538 = constructor_output_reg(ctx, v1537);
-                            // Rule at src/isa/s390x/lower.isle line 2459.
-                            return Some(v1538);
-                        }
-                        let v575 = C::gpr32_ty(ctx, v3);
-                        if let Some(v576) = v575 {
-                            let v1501 = &constructor_lower_address(ctx, v1498, v1497, v1499);
-                            let v1502 = constructor_zext32_mem(ctx, I8, v1501);
-                            let v1503 = constructor_output_reg(ctx, v1502);
-                            // Rule at src/isa/s390x/lower.isle line 2455.
-                            return Some(v1503);
-                        }
-                    }
-                }
-                &Opcode::Sload8 => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v579 = C::gpr64_ty(ctx, v3);
-                        if let Some(v580) = v579 {
-                            let v1501 = &constructor_lower_address(ctx, v1498, v1497, v1499);
-                            let v1541 = constructor_sext64_mem(ctx, I8, v1501);
-                            let v1542 = constructor_output_reg(ctx, v1541);
-                            // Rule at src/isa/s390x/lower.isle line 2470.
-                            return Some(v1542);
-                        }
-                        let v575 = C::gpr32_ty(ctx, v3);
-                        if let Some(v576) = v575 {
-                            let v1501 = &constructor_lower_address(ctx, v1498, v1497, v1499);
-                            let v1539 = constructor_sext32_mem(ctx, I8, v1501);
-                            let v1540 = constructor_output_reg(ctx, v1539);
-                            // Rule at src/isa/s390x/lower.isle line 2466.
-                            return Some(v1540);
-                        }
-                    }
-                }
-                &Opcode::Uload16 => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v1504 = C::bigendian(ctx, v1498);
-                        if let Some(v1505) = v1504 {
-                            let v3 = C::value_type(ctx, v2);
-                            let v579 = C::gpr64_ty(ctx, v3);
-                            if let Some(v580) = v579 {
-                                let v1501 = &constructor_lower_address(ctx, v1498, v1497, v1499);
-                                let v1545 = constructor_zext64_mem(ctx, I16, v1501);
-                                let v1546 = constructor_output_reg(ctx, v1545);
-                                // Rule at src/isa/s390x/lower.isle line 2488.
-                                return Some(v1546);
-                            }
-                            let v575 = C::gpr32_ty(ctx, v3);
-                            if let Some(v576) = v575 {
-                                let v1501 = &constructor_lower_address(ctx, v1498, v1497, v1499);
-                                let v1507 = constructor_zext32_mem(ctx, I16, v1501);
-                                let v1508 = constructor_output_reg(ctx, v1507);
-                                // Rule at src/isa/s390x/lower.isle line 2477.
-                                return Some(v1508);
-                            }
-                        }
-                        let v1509 = C::littleendian(ctx, v1498);
-                        if let Some(v1510) = v1509 {
-                            let v3 = C::value_type(ctx, v2);
-                            let v579 = C::gpr64_ty(ctx, v3);
-                            if let Some(v580) = v579 {
-                                let v1501 = &constructor_lower_address(ctx, v1498, v1497, v1499);
-                                let v1511 = constructor_loadrev16(ctx, v1501);
-                                let v1547 = constructor_zext64_reg(ctx, I16, v1511);
-                                let v1548 = constructor_output_reg(ctx, v1547);
-                                // Rule at src/isa/s390x/lower.isle line 2493.
-                                return Some(v1548);
-                            }
-                            let v575 = C::gpr32_ty(ctx, v3);
-                            if let Some(v576) = v575 {
-                                let v1501 = &constructor_lower_address(ctx, v1498, v1497, v1499);
-                                let v1511 = constructor_loadrev16(ctx, v1501);
-                                let v1543 = constructor_zext32_reg(ctx, I16, v1511);
-                                let v1544 = constructor_output_reg(ctx, v1543);
-                                // Rule at src/isa/s390x/lower.isle line 2482.
-                                return Some(v1544);
-                            }
-                        }
-                    }
-                }
-                &Opcode::Sload16 => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v1504 = C::bigendian(ctx, v1498);
-                        if let Some(v1505) = v1504 {
-                            let v3 = C::value_type(ctx, v2);
-                            let v579 = C::gpr64_ty(ctx, v3);
-                            if let Some(v580) = v579 {
-                                let v1501 = &constructor_lower_address(ctx, v1498, v1497, v1499);
-                                let v1553 = constructor_sext64_mem(ctx, I16, v1501);
-                                let v1554 = constructor_output_reg(ctx, v1553);
-                                // Rule at src/isa/s390x/lower.isle line 2513.
-                                return Some(v1554);
-                            }
-                            let v575 = C::gpr32_ty(ctx, v3);
-                            if let Some(v576) = v575 {
-                                let v1501 = &constructor_lower_address(ctx, v1498, v1497, v1499);
-                                let v1549 = constructor_sext32_mem(ctx, I16, v1501);
-                                let v1550 = constructor_output_reg(ctx, v1549);
-                                // Rule at src/isa/s390x/lower.isle line 2502.
-                                return Some(v1550);
-                            }
-                        }
-                        let v1509 = C::littleendian(ctx, v1498);
-                        if let Some(v1510) = v1509 {
-                            let v3 = C::value_type(ctx, v2);
-                            let v579 = C::gpr64_ty(ctx, v3);
-                            if let Some(v580) = v579 {
-                                let v1501 = &constructor_lower_address(ctx, v1498, v1497, v1499);
-                                let v1511 = constructor_loadrev16(ctx, v1501);
-                                let v1555 = constructor_sext64_reg(ctx, I16, v1511);
-                                let v1556 = constructor_output_reg(ctx, v1555);
-                                // Rule at src/isa/s390x/lower.isle line 2518.
-                                return Some(v1556);
-                            }
-                            let v575 = C::gpr32_ty(ctx, v3);
-                            if let Some(v576) = v575 {
-                                let v1501 = &constructor_lower_address(ctx, v1498, v1497, v1499);
-                                let v1511 = constructor_loadrev16(ctx, v1501);
-                                let v1551 = constructor_sext32_reg(ctx, I16, v1511);
-                                let v1552 = constructor_output_reg(ctx, v1551);
-                                // Rule at src/isa/s390x/lower.isle line 2507.
-                                return Some(v1552);
-                            }
-                        }
-                    }
-                }
-                &Opcode::Uload32 => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v579 = C::gpr64_ty(ctx, v3);
-                        if let Some(v580) = v579 {
-                            let v1504 = C::bigendian(ctx, v1498);
-                            if let Some(v1505) = v1504 {
-                                let v1501 = &constructor_lower_address(ctx, v1498, v1497, v1499);
-                                let v1557 = constructor_zext64_mem(ctx, I32, v1501);
-                                let v1558 = constructor_output_reg(ctx, v1557);
-                                // Rule at src/isa/s390x/lower.isle line 2527.
-                                return Some(v1558);
-                            }
-                            let v1509 = C::littleendian(ctx, v1498);
-                            if let Some(v1510) = v1509 {
-                                let v1501 = &constructor_lower_address(ctx, v1498, v1497, v1499);
-                                let v1515 = constructor_loadrev32(ctx, v1501);
-                                let v1559 = constructor_zext64_reg(ctx, I32, v1515);
-                                let v1560 = constructor_output_reg(ctx, v1559);
-                                // Rule at src/isa/s390x/lower.isle line 2532.
-                                return Some(v1560);
-                            }
-                        }
-                    }
-                }
-                &Opcode::Sload32 => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v579 = C::gpr64_ty(ctx, v3);
-                        if let Some(v580) = v579 {
-                            let v1504 = C::bigendian(ctx, v1498);
-                            if let Some(v1505) = v1504 {
-                                let v1501 = &constructor_lower_address(ctx, v1498, v1497, v1499);
-                                let v1561 = constructor_sext64_mem(ctx, I32, v1501);
-                                let v1562 = constructor_output_reg(ctx, v1561);
-                                // Rule at src/isa/s390x/lower.isle line 2541.
-                                return Some(v1562);
-                            }
-                            let v1509 = C::littleendian(ctx, v1498);
-                            if let Some(v1510) = v1509 {
-                                let v1501 = &constructor_lower_address(ctx, v1498, v1497, v1499);
-                                let v1515 = constructor_loadrev32(ctx, v1501);
-                                let v1563 = constructor_sext64_reg(ctx, I32, v1515);
-                                let v1564 = constructor_output_reg(ctx, v1563);
-                                // Rule at src/isa/s390x/lower.isle line 2546.
-                                return Some(v1564);
-                            }
-                        }
-                    }
-                }
-                &Opcode::Uload8x8 => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        if v3 == I16X8 {
-                            let v1565 = constructor_load_v64(ctx, I8X16, v1498, v1497, v1499);
-                            let v1566 = constructor_vec_unpacku_high(ctx, I8X16, v1565);
-                            let v1567 = constructor_output_reg(ctx, v1566);
-                            // Rule at src/isa/s390x/lower.isle line 2555.
-                            return Some(v1567);
-                        }
-                    }
-                }
-                &Opcode::Sload8x8 => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        if v3 == I16X8 {
-                            let v1565 = constructor_load_v64(ctx, I8X16, v1498, v1497, v1499);
-                            let v1568 = constructor_vec_unpacks_high(ctx, I8X16, v1565);
-                            let v1569 = constructor_output_reg(ctx, v1568);
-                            // Rule at src/isa/s390x/lower.isle line 2559.
-                            return Some(v1569);
-                        }
-                    }
-                }
-                &Opcode::Uload16x4 => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        if v3 == I32X4 {
-                            let v1570 = constructor_load_v64(ctx, I16X8, v1498, v1497, v1499);
-                            let v1571 = constructor_vec_unpacku_high(ctx, I16X8, v1570);
-                            let v1572 = constructor_output_reg(ctx, v1571);
-                            // Rule at src/isa/s390x/lower.isle line 2563.
-                            return Some(v1572);
-                        }
-                    }
-                }
-                &Opcode::Sload16x4 => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        if v3 == I32X4 {
-                            let v1570 = constructor_load_v64(ctx, I16X8, v1498, v1497, v1499);
-                            let v1573 = constructor_vec_unpacks_high(ctx, I16X8, v1570);
-                            let v1574 = constructor_output_reg(ctx, v1573);
-                            // Rule at src/isa/s390x/lower.isle line 2567.
-                            return Some(v1574);
-                        }
-                    }
-                }
-                &Opcode::Uload32x2 => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        if v3 == I64X2 {
-                            let v1575 = constructor_load_v64(ctx, I32X4, v1498, v1497, v1499);
-                            let v1576 = constructor_vec_unpacku_high(ctx, I32X4, v1575);
-                            let v1577 = constructor_output_reg(ctx, v1576);
-                            // Rule at src/isa/s390x/lower.isle line 2571.
-                            return Some(v1577);
-                        }
-                    }
-                }
-                &Opcode::Sload32x2 => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        if v3 == I64X2 {
-                            let v1575 = constructor_load_v64(ctx, I32X4, v1498, v1497, v1499);
-                            let v1578 = constructor_vec_unpacks_high(ctx, I32X4, v1575);
-                            let v1579 = constructor_output_reg(ctx, v1578);
-                            // Rule at src/isa/s390x/lower.isle line 2575.
-                            return Some(v1579);
-                        }
-                    }
-                }
-                _ => {}
-            }
-        }
-        &InstructionData::LoadNoOffset {
-            opcode: ref v1056,
-            arg: v1057,
-            flags: v1058,
-        } => {
-            match v1056 {
-                &Opcode::Bitcast => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v171 = C::multi_lane(ctx, v3);
-                        if let Some(v172) = v171 {
-                            let v1059 = C::value_type(ctx, v1057);
-                            let v1078 = C::multi_lane(ctx, v1059);
-                            if let Some(v1079) = v1078 {
-                                if v172.0 == v1079.0 {
-                                    if v172.1 == v1079.1 {
-                                        let v1071 = constructor_output_value(ctx, v1057);
-                                        // Rule at src/isa/s390x/lower.isle line 1747.
-                                        return Some(v1071);
-                                    }
-                                }
-                            }
-                        }
-                        let v36 = C::vr128_ty(ctx, v3);
-                        if let Some(v37) = v36 {
-                            let v1059 = C::value_type(ctx, v1057);
-                            let v1082 = C::vr128_ty(ctx, v1059);
-                            if let Some(v1083) = v1082 {
-                                let v1060 = C::put_in_reg(ctx, v1057);
-                                let v1084 = &constructor_lane_order_from_memflags(ctx, v1058);
-                                let v1085 = constructor_abi_vec_elt_rev(ctx, v1084, v1083, v1060);
-                                let v1086 = constructor_abi_vec_elt_rev(ctx, v1084, v37, v1085);
-                                let v1087 = constructor_output_reg(ctx, v1086);
-                                // Rule at src/isa/s390x/lower.isle line 1757.
-                                return Some(v1087);
-                            }
-                        }
-                        let v1074 = C::ty_scalar_float(ctx, v3);
-                        if let Some(v1075) = v1074 {
-                            let v1059 = C::value_type(ctx, v1057);
-                            let v1076 = C::ty_scalar_float(ctx, v1059);
-                            if let Some(v1077) = v1076 {
-                                let v1071 = constructor_output_value(ctx, v1057);
-                                // Rule at src/isa/s390x/lower.isle line 1743.
-                                return Some(v1071);
-                            }
-                        }
-                        let v579 = C::gpr64_ty(ctx, v3);
-                        if let Some(v580) = v579 {
-                            let v1059 = C::value_type(ctx, v1057);
-                            let v1072 = C::gpr64_ty(ctx, v1059);
-                            if let Some(v1073) = v1072 {
-                                let v1071 = constructor_output_value(ctx, v1057);
-                                // Rule at src/isa/s390x/lower.isle line 1739.
-                                return Some(v1071);
-                            }
-                        }
-                        let v575 = C::gpr32_ty(ctx, v3);
-                        if let Some(v576) = v575 {
-                            let v1059 = C::value_type(ctx, v1057);
-                            let v1069 = C::gpr32_ty(ctx, v1059);
-                            if let Some(v1070) = v1069 {
-                                let v1071 = constructor_output_value(ctx, v1057);
-                                // Rule at src/isa/s390x/lower.isle line 1737.
-                                return Some(v1071);
-                            }
-                        }
-                        match v3 {
-                            I32 => {
-                                let v1059 = C::value_type(ctx, v1057);
-                                if v1059 == F32 {
-                                    let v1060 = C::put_in_reg(ctx, v1057);
-                                    let v53 = C::zero_reg(ctx);
-                                    let v1067 =
-                                        constructor_vec_extract_lane(ctx, F32X4, v1060, 0x0, v53);
-                                    let v1068 = constructor_output_reg(ctx, v1067);
-                                    // Rule at src/isa/s390x/lower.isle line 1733.
-                                    return Some(v1068);
-                                }
-                            }
-                            I64 => {
-                                let v1059 = C::value_type(ctx, v1057);
-                                if v1059 == F64 {
-                                    let v1060 = C::put_in_reg(ctx, v1057);
-                                    let v53 = C::zero_reg(ctx);
-                                    let v1063 =
-                                        constructor_vec_extract_lane(ctx, F64X2, v1060, 0x0, v53);
-                                    let v1064 = constructor_output_reg(ctx, v1063);
-                                    // Rule at src/isa/s390x/lower.isle line 1725.
-                                    return Some(v1064);
-                                }
-                            }
-                            F32 => {
-                                let v1059 = C::value_type(ctx, v1057);
-                                if v1059 == I32 {
-                                    let v1060 = C::put_in_reg(ctx, v1057);
-                                    let v53 = C::zero_reg(ctx);
-                                    let v1065 = constructor_vec_insert_lane_undef(
-                                        ctx, F32X4, v1060, 0x0, v53,
-                                    );
-                                    let v1066 = constructor_output_reg(ctx, v1065);
-                                    // Rule at src/isa/s390x/lower.isle line 1729.
-                                    return Some(v1066);
-                                }
-                            }
-                            F64 => {
-                                let v1059 = C::value_type(ctx, v1057);
-                                if v1059 == I64 {
-                                    let v1060 = C::put_in_reg(ctx, v1057);
-                                    let v53 = C::zero_reg(ctx);
-                                    let v1061 = constructor_vec_insert_lane_undef(
-                                        ctx, F64X2, v1060, 0x0, v53,
-                                    );
-                                    let v1062 = constructor_output_reg(ctx, v1061);
-                                    // Rule at src/isa/s390x/lower.isle line 1721.
-                                    return Some(v1062);
-                                }
-                            }
-                            _ => {}
-                        }
-                    }
-                }
-                &Opcode::AtomicLoad => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            I8 => {
-                                let v1700 = C::zero_offset(ctx);
-                                let v1701 = &constructor_lower_address(ctx, v1058, v1057, v1700);
-                                let v1702 = constructor_zext32_mem(ctx, I8, v1701);
-                                let v1703 = constructor_output_reg(ctx, v1702);
-                                // Rule at src/isa/s390x/lower.isle line 3202.
-                                return Some(v1703);
-                            }
-                            I16 => {
-                                let v1704 = C::bigendian(ctx, v1058);
-                                if let Some(v1705) = v1704 {
-                                    let v1700 = C::zero_offset(ctx);
-                                    let v1701 =
-                                        &constructor_lower_address(ctx, v1058, v1057, v1700);
-                                    let v1706 = constructor_zext32_mem(ctx, I16, v1701);
-                                    let v1707 = constructor_output_reg(ctx, v1706);
-                                    // Rule at src/isa/s390x/lower.isle line 3206.
-                                    return Some(v1707);
-                                }
-                                let v1708 = C::littleendian(ctx, v1058);
-                                if let Some(v1709) = v1708 {
-                                    let v1700 = C::zero_offset(ctx);
-                                    let v1701 =
-                                        &constructor_lower_address(ctx, v1058, v1057, v1700);
-                                    let v1710 = constructor_loadrev16(ctx, v1701);
-                                    let v1711 = constructor_output_reg(ctx, v1710);
-                                    // Rule at src/isa/s390x/lower.isle line 3210.
-                                    return Some(v1711);
-                                }
-                            }
-                            I32 => {
-                                let v1704 = C::bigendian(ctx, v1058);
-                                if let Some(v1705) = v1704 {
-                                    let v1700 = C::zero_offset(ctx);
-                                    let v1701 =
-                                        &constructor_lower_address(ctx, v1058, v1057, v1700);
-                                    let v1712 = constructor_load32(ctx, v1701);
-                                    let v1713 = constructor_output_reg(ctx, v1712);
-                                    // Rule at src/isa/s390x/lower.isle line 3214.
-                                    return Some(v1713);
-                                }
-                                let v1708 = C::littleendian(ctx, v1058);
-                                if let Some(v1709) = v1708 {
-                                    let v1700 = C::zero_offset(ctx);
-                                    let v1701 =
-                                        &constructor_lower_address(ctx, v1058, v1057, v1700);
-                                    let v1714 = constructor_loadrev32(ctx, v1701);
-                                    let v1715 = constructor_output_reg(ctx, v1714);
-                                    // Rule at src/isa/s390x/lower.isle line 3218.
-                                    return Some(v1715);
-                                }
-                            }
-                            I64 => {
-                                let v1704 = C::bigendian(ctx, v1058);
-                                if let Some(v1705) = v1704 {
-                                    let v1700 = C::zero_offset(ctx);
-                                    let v1701 =
-                                        &constructor_lower_address(ctx, v1058, v1057, v1700);
-                                    let v1716 = constructor_load64(ctx, v1701);
-                                    let v1717 = constructor_output_reg(ctx, v1716);
-                                    // Rule at src/isa/s390x/lower.isle line 3222.
-                                    return Some(v1717);
-                                }
-                                let v1708 = C::littleendian(ctx, v1058);
-                                if let Some(v1709) = v1708 {
-                                    let v1700 = C::zero_offset(ctx);
-                                    let v1701 =
-                                        &constructor_lower_address(ctx, v1058, v1057, v1700);
-                                    let v1718 = constructor_loadrev64(ctx, v1701);
-                                    let v1719 = constructor_output_reg(ctx, v1718);
-                                    // Rule at src/isa/s390x/lower.isle line 3226.
-                                    return Some(v1719);
-                                }
-                            }
-                            _ => {}
-                        }
-                    }
-                }
-                _ => {}
-            }
-        }
-        &InstructionData::MultiAry {
-            opcode: ref v1992,
-            args: v1993,
-        } => {
-            if let &Opcode::Return = v1992 {
-                let v1994 = C::value_list_slice(ctx, v1993);
-                let v1995 = constructor_lower_return(ctx, v1994);
-                // Rule at src/isa/s390x/lower.isle line 3891.
-                return Some(v1995);
-            }
-        }
-        &InstructionData::NullAry { opcode: ref v30 } => {
-            match v30 {
-                &Opcode::Debugtrap => {
-                    let v1904 = &constructor_debugtrap_impl(ctx);
-                    let v1905 = constructor_side_effect(ctx, v1904);
-                    // Rule at src/isa/s390x/lower.isle line 3817.
-                    return Some(v1905);
-                }
-                &Opcode::GetFramePointer => {
-                    let v2054 = &C::memarg_stack_off(ctx, 0x0, 0x0);
-                    let v2055 = constructor_load64(ctx, v2054);
-                    let v2056 = constructor_output_reg(ctx, v2055);
-                    // Rule at src/isa/s390x/lower.isle line 3977.
-                    return Some(v2056);
-                }
-                &Opcode::GetStackPointer => {
-                    let v2052 = constructor_sp(ctx);
-                    let v2053 = constructor_output_reg(ctx, v2052);
-                    // Rule at src/isa/s390x/lower.isle line 3974.
-                    return Some(v2053);
-                }
-                &Opcode::GetReturnAddress => {
-                    let v2058 = &C::memarg_initial_sp_offset(ctx, 0x70);
-                    let v2059 = constructor_load64(ctx, v2058);
-                    let v2060 = constructor_output_reg(ctx, v2059);
-                    // Rule at src/isa/s390x/lower.isle line 3980.
-                    return Some(v2060);
-                }
-                &Opcode::Null => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v32 = constructor_imm(ctx, v3, 0x0);
-                        let v33 = constructor_output_reg(ctx, v32);
-                        // Rule at src/isa/s390x/lower.isle line 39.
-                        return Some(v33);
-                    }
-                }
-                &Opcode::Nop => {
-                    let v34 = C::invalid_reg(ctx);
-                    let v35 = constructor_output_reg(ctx, v34);
-                    // Rule at src/isa/s390x/lower.isle line 45.
-                    return Some(v35);
-                }
-                &Opcode::Fence => {
-                    let v1735 = &constructor_fence_impl(ctx);
-                    let v1736 = constructor_side_effect(ctx, v1735);
-                    // Rule at src/isa/s390x/lower.isle line 3258.
-                    return Some(v1736);
-                }
-                _ => {}
-            }
-        }
-        &InstructionData::Shuffle {
-            opcode: ref v1236,
-            args: ref v1237,
-            imm: v1238,
-        } => {
-            if let &Opcode::Shuffle = v1236 {
-                let v1242 = C::u128_from_immediate(ctx, v1238);
-                if let Some(v1243) = v1242 {
-                    let v1244 = C::shuffle_mask_from_u128(ctx, v1243);
-                    match v1244.1 {
-                        0xF0F => {
-                            let v1259 = C::u64_pair_split(ctx, v1244.0);
-                            let v1262 = C::u32_pair_split(ctx, v1259.0);
-                            let v1274 = C::u16_pair_split(ctx, v1262.1);
-                            let v1277 = C::u8_pair_split(ctx, v1274.0);
-                            match v1277.0 {
-                                0x0 => {
-                                    if v1277.1 == 0x1 {
-                                        let v1280 = C::u8_pair_split(ctx, v1274.1);
-                                        if v1280.0 == 0x2 {
-                                            if v1280.1 == 0x3 {
-                                                let v1283 = C::u32_pair_split(ctx, v1259.1);
-                                                let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                let v1298 = C::u8_pair_split(ctx, v1295.0);
-                                                if v1298.0 == 0x4 {
-                                                    if v1298.1 == 0x5 {
-                                                        let v1301 = C::u8_pair_split(ctx, v1295.1);
-                                                        if v1301.0 == 0x6 {
-                                                            if v1301.1 == 0x7 {
-                                                                let v1239 = C::unpack_value_array_2(
-                                                                    ctx, v1237,
-                                                                );
-                                                                let v1254 =
-                                                                    C::put_in_reg(ctx, v1239.0);
-                                                                let v1393 =
-                                                                    constructor_vec_unpacku_high(
-                                                                        ctx, I32X4, v1254,
-                                                                    );
-                                                                let v1394 = constructor_output_reg(
-                                                                    ctx, v1393,
-                                                                );
-                                                                // Rule at src/isa/s390x/lower.isle line 2154.
-                                                                return Some(v1394);
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                                0x8 => {
-                                    if v1277.1 == 0x9 {
-                                        let v1280 = C::u8_pair_split(ctx, v1274.1);
-                                        if v1280.0 == 0xA {
-                                            if v1280.1 == 0xB {
-                                                let v1283 = C::u32_pair_split(ctx, v1259.1);
-                                                let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                let v1298 = C::u8_pair_split(ctx, v1295.0);
-                                                if v1298.0 == 0xC {
-                                                    if v1298.1 == 0xD {
-                                                        let v1301 = C::u8_pair_split(ctx, v1295.1);
-                                                        if v1301.0 == 0xE {
-                                                            if v1301.1 == 0xF {
-                                                                let v1239 = C::unpack_value_array_2(
-                                                                    ctx, v1237,
-                                                                );
-                                                                let v1254 =
-                                                                    C::put_in_reg(ctx, v1239.0);
-                                                                let v1405 =
-                                                                    constructor_vec_unpacku_low(
-                                                                        ctx, I32X4, v1254,
-                                                                    );
-                                                                let v1406 = constructor_output_reg(
-                                                                    ctx, v1405,
-                                                                );
-                                                                // Rule at src/isa/s390x/lower.isle line 2168.
-                                                                return Some(v1406);
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                                0x10 => {
-                                    if v1277.1 == 0x11 {
-                                        let v1280 = C::u8_pair_split(ctx, v1274.1);
-                                        if v1280.0 == 0x12 {
-                                            if v1280.1 == 0x13 {
-                                                let v1283 = C::u32_pair_split(ctx, v1259.1);
-                                                let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                let v1298 = C::u8_pair_split(ctx, v1295.0);
-                                                if v1298.0 == 0x14 {
-                                                    if v1298.1 == 0x15 {
-                                                        let v1301 = C::u8_pair_split(ctx, v1295.1);
-                                                        if v1301.0 == 0x16 {
-                                                            if v1301.1 == 0x17 {
-                                                                let v1239 = C::unpack_value_array_2(
-                                                                    ctx, v1237,
-                                                                );
-                                                                let v1312 =
-                                                                    C::put_in_reg(ctx, v1239.1);
-                                                                let v1399 =
-                                                                    constructor_vec_unpacku_high(
-                                                                        ctx, I32X4, v1312,
-                                                                    );
-                                                                let v1400 = constructor_output_reg(
-                                                                    ctx, v1399,
-                                                                );
-                                                                // Rule at src/isa/s390x/lower.isle line 2160.
-                                                                return Some(v1400);
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                                0x18 => {
-                                    if v1277.1 == 0x19 {
-                                        let v1280 = C::u8_pair_split(ctx, v1274.1);
-                                        if v1280.0 == 0x1A {
-                                            if v1280.1 == 0x1B {
-                                                let v1283 = C::u32_pair_split(ctx, v1259.1);
-                                                let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                let v1298 = C::u8_pair_split(ctx, v1295.0);
-                                                if v1298.0 == 0x1C {
-                                                    if v1298.1 == 0x1D {
-                                                        let v1301 = C::u8_pair_split(ctx, v1295.1);
-                                                        if v1301.0 == 0x1E {
-                                                            if v1301.1 == 0x1F {
-                                                                let v1239 = C::unpack_value_array_2(
-                                                                    ctx, v1237,
-                                                                );
-                                                                let v1312 =
-                                                                    C::put_in_reg(ctx, v1239.1);
-                                                                let v1411 =
-                                                                    constructor_vec_unpacku_low(
-                                                                        ctx, I32X4, v1312,
-                                                                    );
-                                                                let v1412 = constructor_output_reg(
-                                                                    ctx, v1411,
-                                                                );
-                                                                // Rule at src/isa/s390x/lower.isle line 2174.
-                                                                return Some(v1412);
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                                _ => {}
-                            }
-                        }
-                        0x3333 => {
-                            let v1259 = C::u64_pair_split(ctx, v1244.0);
-                            let v1262 = C::u32_pair_split(ctx, v1259.0);
-                            let v1265 = C::u16_pair_split(ctx, v1262.0);
-                            let v1271 = C::u8_pair_split(ctx, v1265.1);
-                            match v1271.0 {
-                                0x0 => {
-                                    if v1271.1 == 0x1 {
-                                        let v1274 = C::u16_pair_split(ctx, v1262.1);
-                                        let v1280 = C::u8_pair_split(ctx, v1274.1);
-                                        if v1280.0 == 0x2 {
-                                            if v1280.1 == 0x3 {
-                                                let v1283 = C::u32_pair_split(ctx, v1259.1);
-                                                let v1286 = C::u16_pair_split(ctx, v1283.0);
-                                                let v1292 = C::u8_pair_split(ctx, v1286.1);
-                                                if v1292.0 == 0x4 {
-                                                    if v1292.1 == 0x5 {
-                                                        let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                        let v1301 = C::u8_pair_split(ctx, v1295.1);
-                                                        if v1301.0 == 0x6 {
-                                                            if v1301.1 == 0x7 {
-                                                                let v1239 = C::unpack_value_array_2(
-                                                                    ctx, v1237,
-                                                                );
-                                                                let v1254 =
-                                                                    C::put_in_reg(ctx, v1239.0);
-                                                                let v1395 =
-                                                                    constructor_vec_unpacku_high(
-                                                                        ctx, I16X8, v1254,
-                                                                    );
-                                                                let v1396 = constructor_output_reg(
-                                                                    ctx, v1395,
-                                                                );
-                                                                // Rule at src/isa/s390x/lower.isle line 2156.
-                                                                return Some(v1396);
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                                0x8 => {
-                                    if v1271.1 == 0x9 {
-                                        let v1274 = C::u16_pair_split(ctx, v1262.1);
-                                        let v1280 = C::u8_pair_split(ctx, v1274.1);
-                                        if v1280.0 == 0xA {
-                                            if v1280.1 == 0xB {
-                                                let v1283 = C::u32_pair_split(ctx, v1259.1);
-                                                let v1286 = C::u16_pair_split(ctx, v1283.0);
-                                                let v1292 = C::u8_pair_split(ctx, v1286.1);
-                                                if v1292.0 == 0xC {
-                                                    if v1292.1 == 0xD {
-                                                        let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                        let v1301 = C::u8_pair_split(ctx, v1295.1);
-                                                        if v1301.0 == 0xE {
-                                                            if v1301.1 == 0xF {
-                                                                let v1239 = C::unpack_value_array_2(
-                                                                    ctx, v1237,
-                                                                );
-                                                                let v1254 =
-                                                                    C::put_in_reg(ctx, v1239.0);
-                                                                let v1407 =
-                                                                    constructor_vec_unpacku_low(
-                                                                        ctx, I16X8, v1254,
-                                                                    );
-                                                                let v1408 = constructor_output_reg(
-                                                                    ctx, v1407,
-                                                                );
-                                                                // Rule at src/isa/s390x/lower.isle line 2170.
-                                                                return Some(v1408);
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                                0x10 => {
-                                    if v1271.1 == 0x11 {
-                                        let v1274 = C::u16_pair_split(ctx, v1262.1);
-                                        let v1280 = C::u8_pair_split(ctx, v1274.1);
-                                        if v1280.0 == 0x12 {
-                                            if v1280.1 == 0x13 {
-                                                let v1283 = C::u32_pair_split(ctx, v1259.1);
-                                                let v1286 = C::u16_pair_split(ctx, v1283.0);
-                                                let v1292 = C::u8_pair_split(ctx, v1286.1);
-                                                if v1292.0 == 0x14 {
-                                                    if v1292.1 == 0x15 {
-                                                        let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                        let v1301 = C::u8_pair_split(ctx, v1295.1);
-                                                        if v1301.0 == 0x16 {
-                                                            if v1301.1 == 0x17 {
-                                                                let v1239 = C::unpack_value_array_2(
-                                                                    ctx, v1237,
-                                                                );
-                                                                let v1312 =
-                                                                    C::put_in_reg(ctx, v1239.1);
-                                                                let v1401 =
-                                                                    constructor_vec_unpacku_high(
-                                                                        ctx, I16X8, v1312,
-                                                                    );
-                                                                let v1402 = constructor_output_reg(
-                                                                    ctx, v1401,
-                                                                );
-                                                                // Rule at src/isa/s390x/lower.isle line 2162.
-                                                                return Some(v1402);
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                                0x18 => {
-                                    if v1271.1 == 0x19 {
-                                        let v1274 = C::u16_pair_split(ctx, v1262.1);
-                                        let v1280 = C::u8_pair_split(ctx, v1274.1);
-                                        if v1280.0 == 0x1A {
-                                            if v1280.1 == 0x1B {
-                                                let v1283 = C::u32_pair_split(ctx, v1259.1);
-                                                let v1286 = C::u16_pair_split(ctx, v1283.0);
-                                                let v1292 = C::u8_pair_split(ctx, v1286.1);
-                                                if v1292.0 == 0x1C {
-                                                    if v1292.1 == 0x1D {
-                                                        let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                        let v1301 = C::u8_pair_split(ctx, v1295.1);
-                                                        if v1301.0 == 0x1E {
-                                                            if v1301.1 == 0x1F {
-                                                                let v1239 = C::unpack_value_array_2(
-                                                                    ctx, v1237,
-                                                                );
-                                                                let v1312 =
-                                                                    C::put_in_reg(ctx, v1239.1);
-                                                                let v1413 =
-                                                                    constructor_vec_unpacku_low(
-                                                                        ctx, I16X8, v1312,
-                                                                    );
-                                                                let v1414 = constructor_output_reg(
-                                                                    ctx, v1413,
-                                                                );
-                                                                // Rule at src/isa/s390x/lower.isle line 2176.
-                                                                return Some(v1414);
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                                _ => {}
-                            }
-                        }
-                        0x5555 => {
-                            let v1259 = C::u64_pair_split(ctx, v1244.0);
-                            let v1262 = C::u32_pair_split(ctx, v1259.0);
-                            let v1265 = C::u16_pair_split(ctx, v1262.0);
-                            let v1268 = C::u8_pair_split(ctx, v1265.0);
-                            match v1268.1 {
-                                0x0 => {
-                                    let v1271 = C::u8_pair_split(ctx, v1265.1);
-                                    if v1271.1 == 0x1 {
-                                        let v1274 = C::u16_pair_split(ctx, v1262.1);
-                                        let v1277 = C::u8_pair_split(ctx, v1274.0);
-                                        if v1277.1 == 0x2 {
-                                            let v1280 = C::u8_pair_split(ctx, v1274.1);
-                                            if v1280.1 == 0x3 {
-                                                let v1283 = C::u32_pair_split(ctx, v1259.1);
-                                                let v1286 = C::u16_pair_split(ctx, v1283.0);
-                                                let v1289 = C::u8_pair_split(ctx, v1286.0);
-                                                if v1289.1 == 0x4 {
-                                                    let v1292 = C::u8_pair_split(ctx, v1286.1);
-                                                    if v1292.1 == 0x5 {
-                                                        let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                        let v1298 = C::u8_pair_split(ctx, v1295.0);
-                                                        if v1298.1 == 0x6 {
-                                                            let v1301 =
-                                                                C::u8_pair_split(ctx, v1295.1);
-                                                            if v1301.1 == 0x7 {
-                                                                let v1239 = C::unpack_value_array_2(
-                                                                    ctx, v1237,
-                                                                );
-                                                                let v1254 =
-                                                                    C::put_in_reg(ctx, v1239.0);
-                                                                let v1397 =
-                                                                    constructor_vec_unpacku_high(
-                                                                        ctx, I8X16, v1254,
-                                                                    );
-                                                                let v1398 = constructor_output_reg(
-                                                                    ctx, v1397,
-                                                                );
-                                                                // Rule at src/isa/s390x/lower.isle line 2158.
-                                                                return Some(v1398);
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                                0x8 => {
-                                    let v1271 = C::u8_pair_split(ctx, v1265.1);
-                                    if v1271.1 == 0x9 {
-                                        let v1274 = C::u16_pair_split(ctx, v1262.1);
-                                        let v1277 = C::u8_pair_split(ctx, v1274.0);
-                                        if v1277.1 == 0xA {
-                                            let v1280 = C::u8_pair_split(ctx, v1274.1);
-                                            if v1280.1 == 0xB {
-                                                let v1283 = C::u32_pair_split(ctx, v1259.1);
-                                                let v1286 = C::u16_pair_split(ctx, v1283.0);
-                                                let v1289 = C::u8_pair_split(ctx, v1286.0);
-                                                if v1289.1 == 0xC {
-                                                    let v1292 = C::u8_pair_split(ctx, v1286.1);
-                                                    if v1292.1 == 0xD {
-                                                        let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                        let v1298 = C::u8_pair_split(ctx, v1295.0);
-                                                        if v1298.1 == 0xE {
-                                                            let v1301 =
-                                                                C::u8_pair_split(ctx, v1295.1);
-                                                            if v1301.1 == 0xF {
-                                                                let v1239 = C::unpack_value_array_2(
-                                                                    ctx, v1237,
-                                                                );
-                                                                let v1254 =
-                                                                    C::put_in_reg(ctx, v1239.0);
-                                                                let v1409 =
-                                                                    constructor_vec_unpacku_low(
-                                                                        ctx, I8X16, v1254,
-                                                                    );
-                                                                let v1410 = constructor_output_reg(
-                                                                    ctx, v1409,
-                                                                );
-                                                                // Rule at src/isa/s390x/lower.isle line 2172.
-                                                                return Some(v1410);
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                                0x10 => {
-                                    let v1271 = C::u8_pair_split(ctx, v1265.1);
-                                    if v1271.1 == 0x11 {
-                                        let v1274 = C::u16_pair_split(ctx, v1262.1);
-                                        let v1277 = C::u8_pair_split(ctx, v1274.0);
-                                        if v1277.1 == 0x12 {
-                                            let v1280 = C::u8_pair_split(ctx, v1274.1);
-                                            if v1280.1 == 0x13 {
-                                                let v1283 = C::u32_pair_split(ctx, v1259.1);
-                                                let v1286 = C::u16_pair_split(ctx, v1283.0);
-                                                let v1289 = C::u8_pair_split(ctx, v1286.0);
-                                                if v1289.1 == 0x14 {
-                                                    let v1292 = C::u8_pair_split(ctx, v1286.1);
-                                                    if v1292.1 == 0x15 {
-                                                        let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                        let v1298 = C::u8_pair_split(ctx, v1295.0);
-                                                        if v1298.1 == 0x16 {
-                                                            let v1301 =
-                                                                C::u8_pair_split(ctx, v1295.1);
-                                                            if v1301.1 == 0x17 {
-                                                                let v1239 = C::unpack_value_array_2(
-                                                                    ctx, v1237,
-                                                                );
-                                                                let v1312 =
-                                                                    C::put_in_reg(ctx, v1239.1);
-                                                                let v1403 =
-                                                                    constructor_vec_unpacku_high(
-                                                                        ctx, I8X16, v1312,
-                                                                    );
-                                                                let v1404 = constructor_output_reg(
-                                                                    ctx, v1403,
-                                                                );
-                                                                // Rule at src/isa/s390x/lower.isle line 2164.
-                                                                return Some(v1404);
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                                0x18 => {
-                                    let v1271 = C::u8_pair_split(ctx, v1265.1);
-                                    if v1271.1 == 0x19 {
-                                        let v1274 = C::u16_pair_split(ctx, v1262.1);
-                                        let v1277 = C::u8_pair_split(ctx, v1274.0);
-                                        if v1277.1 == 0x1A {
-                                            let v1280 = C::u8_pair_split(ctx, v1274.1);
-                                            if v1280.1 == 0x1B {
-                                                let v1283 = C::u32_pair_split(ctx, v1259.1);
-                                                let v1286 = C::u16_pair_split(ctx, v1283.0);
-                                                let v1289 = C::u8_pair_split(ctx, v1286.0);
-                                                if v1289.1 == 0x1C {
-                                                    let v1292 = C::u8_pair_split(ctx, v1286.1);
-                                                    if v1292.1 == 0x1D {
-                                                        let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                        let v1298 = C::u8_pair_split(ctx, v1295.0);
-                                                        if v1298.1 == 0x1E {
-                                                            let v1301 =
-                                                                C::u8_pair_split(ctx, v1295.1);
-                                                            if v1301.1 == 0x1F {
-                                                                let v1239 = C::unpack_value_array_2(
-                                                                    ctx, v1237,
-                                                                );
-                                                                let v1312 =
-                                                                    C::put_in_reg(ctx, v1239.1);
-                                                                let v1415 =
-                                                                    constructor_vec_unpacku_low(
-                                                                        ctx, I8X16, v1312,
-                                                                    );
-                                                                let v1416 = constructor_output_reg(
-                                                                    ctx, v1415,
-                                                                );
-                                                                // Rule at src/isa/s390x/lower.isle line 2178.
-                                                                return Some(v1416);
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                                _ => {}
-                            }
-                        }
-                        0xFFFF => {
-                            let v1259 = C::u64_pair_split(ctx, v1244.0);
-                            let v1262 = C::u32_pair_split(ctx, v1259.0);
-                            let v1265 = C::u16_pair_split(ctx, v1262.0);
-                            let v1268 = C::u8_pair_split(ctx, v1265.0);
-                            match v1268.0 {
-                                0x0 => {
-                                    match v1268.1 {
-                                        0x0 => {
-                                            let v1271 = C::u8_pair_split(ctx, v1265.1);
-                                            if v1271.0 == 0x1 {
-                                                if v1271.1 == 0x1 {
-                                                    let v1274 = C::u16_pair_split(ctx, v1262.1);
-                                                    let v1277 = C::u8_pair_split(ctx, v1274.0);
-                                                    if v1277.0 == 0x2 {
-                                                        if v1277.1 == 0x2 {
-                                                            let v1280 =
-                                                                C::u8_pair_split(ctx, v1274.1);
-                                                            if v1280.0 == 0x3 {
-                                                                if v1280.1 == 0x3 {
-                                                                    let v1283 = C::u32_pair_split(
-                                                                        ctx, v1259.1,
-                                                                    );
-                                                                    let v1286 = C::u16_pair_split(
-                                                                        ctx, v1283.0,
-                                                                    );
-                                                                    let v1289 = C::u8_pair_split(
-                                                                        ctx, v1286.0,
-                                                                    );
-                                                                    if v1289.0 == 0x4 {
-                                                                        if v1289.1 == 0x4 {
-                                                                            let v1292 =
-                                                                                C::u8_pair_split(
-                                                                                    ctx, v1286.1,
-                                                                                );
-                                                                            if v1292.0 == 0x5 {
-                                                                                if v1292.1 == 0x5 {
-                                                                                    let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                                                    let v1298 = C::u8_pair_split(ctx, v1295.0);
-                                                                                    if v1298.0
-                                                                                        == 0x6
-                                                                                    {
-                                                                                        if v1298.1
-                                                                                            == 0x6
-                                                                                        {
-                                                                                            let v1301 = C::u8_pair_split(ctx, v1295.1);
-                                                                                            if v1301.0 == 0x7 {
-                                                                                                if v1301.1 == 0x7 {
-                                                                                                    let v1239 = C::unpack_value_array_2(ctx, v1237);
-                                                                                                    let v1254 = C::put_in_reg(ctx, v1239.0);
-                                                                                                    let v1248 = C::put_in_reg(ctx, v1239.0);
-                                                                                                    let v1327 = constructor_vec_merge_high(ctx, I8X16, v1254, v1248);
-                                                                                                    let v1328 = constructor_output_reg(ctx, v1327);
-                                                                                                    // Rule at src/isa/s390x/lower.isle line 2082.
-                                                                                                    return Some(v1328);
-                                                                                                }
-                                                                                            }
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                        0x1 => {
-                                            let v1271 = C::u8_pair_split(ctx, v1265.1);
-                                            match v1271.0 {
-                                                0x0 => {
-                                                    if v1271.1 == 0x1 {
-                                                        let v1274 = C::u16_pair_split(ctx, v1262.1);
-                                                        let v1277 = C::u8_pair_split(ctx, v1274.0);
-                                                        if v1277.0 == 0x2 {
-                                                            if v1277.1 == 0x3 {
-                                                                let v1280 =
-                                                                    C::u8_pair_split(ctx, v1274.1);
-                                                                if v1280.0 == 0x2 {
-                                                                    if v1280.1 == 0x3 {
-                                                                        let v1283 =
-                                                                            C::u32_pair_split(
-                                                                                ctx, v1259.1,
-                                                                            );
-                                                                        let v1286 =
-                                                                            C::u16_pair_split(
-                                                                                ctx, v1283.0,
-                                                                            );
-                                                                        let v1289 =
-                                                                            C::u8_pair_split(
-                                                                                ctx, v1286.0,
-                                                                            );
-                                                                        if v1289.0 == 0x4 {
-                                                                            if v1289.1 == 0x5 {
-                                                                                let v1292 = C::u8_pair_split(ctx, v1286.1);
-                                                                                if v1292.0 == 0x4 {
-                                                                                    if v1292.1
-                                                                                        == 0x5
-                                                                                    {
-                                                                                        let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                                                        let v1298 = C::u8_pair_split(ctx, v1295.0);
-                                                                                        if v1298.0
-                                                                                            == 0x6
-                                                                                        {
-                                                                                            if v1298.1 == 0x7 {
-                                                                                                let v1301 = C::u8_pair_split(ctx, v1295.1);
-                                                                                                if v1301.0 == 0x6 {
-                                                                                                    if v1301.1 == 0x7 {
-                                                                                                        let v1239 = C::unpack_value_array_2(ctx, v1237);
-                                                                                                        let v1254 = C::put_in_reg(ctx, v1239.0);
-                                                                                                        let v1248 = C::put_in_reg(ctx, v1239.0);
-                                                                                                        let v1325 = constructor_vec_merge_high(ctx, I16X8, v1254, v1248);
-                                                                                                        let v1326 = constructor_output_reg(ctx, v1325);
-                                                                                                        // Rule at src/isa/s390x/lower.isle line 2080.
-                                                                                                        return Some(v1326);
-                                                                                                    }
-                                                                                                }
-                                                                                            }
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                                0x2 => {
-                                                    if v1271.1 == 0x3 {
-                                                        let v1274 = C::u16_pair_split(ctx, v1262.1);
-                                                        let v1277 = C::u8_pair_split(ctx, v1274.0);
-                                                        match v1277.0 {
-                                                            0x0 => {
-                                                                if v1277.1 == 0x1 {
-                                                                    let v1280 = C::u8_pair_split(
-                                                                        ctx, v1274.1,
-                                                                    );
-                                                                    if v1280.0 == 0x2 {
-                                                                        if v1280.1 == 0x3 {
-                                                                            let v1283 =
-                                                                                C::u32_pair_split(
-                                                                                    ctx, v1259.1,
-                                                                                );
-                                                                            let v1286 =
-                                                                                C::u16_pair_split(
-                                                                                    ctx, v1283.0,
-                                                                                );
-                                                                            let v1289 =
-                                                                                C::u8_pair_split(
-                                                                                    ctx, v1286.0,
-                                                                                );
-                                                                            if v1289.0 == 0x4 {
-                                                                                if v1289.1 == 0x5 {
-                                                                                    let v1292 = C::u8_pair_split(ctx, v1286.1);
-                                                                                    if v1292.0
-                                                                                        == 0x6
-                                                                                    {
-                                                                                        if v1292.1
-                                                                                            == 0x7
-                                                                                        {
-                                                                                            let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                                                            let v1298 = C::u8_pair_split(ctx, v1295.0);
-                                                                                            if v1298.0 == 0x4 {
-                                                                                                if v1298.1 == 0x5 {
-                                                                                                    let v1301 = C::u8_pair_split(ctx, v1295.1);
-                                                                                                    if v1301.0 == 0x6 {
-                                                                                                        if v1301.1 == 0x7 {
-                                                                                                            let v1239 = C::unpack_value_array_2(ctx, v1237);
-                                                                                                            let v1254 = C::put_in_reg(ctx, v1239.0);
-                                                                                                            let v1248 = C::put_in_reg(ctx, v1239.0);
-                                                                                                            let v1323 = constructor_vec_merge_high(ctx, I32X4, v1254, v1248);
-                                                                                                            let v1324 = constructor_output_reg(ctx, v1323);
-                                                                                                            // Rule at src/isa/s390x/lower.isle line 2078.
-                                                                                                            return Some(v1324);
-                                                                                                        }
-                                                                                                    }
-                                                                                                }
-                                                                                            }
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                            0x4 => {
-                                                                if v1277.1 == 0x5 {
-                                                                    let v1280 = C::u8_pair_split(
-                                                                        ctx, v1274.1,
-                                                                    );
-                                                                    if v1280.0 == 0x6 {
-                                                                        if v1280.1 == 0x7 {
-                                                                            let v1283 =
-                                                                                C::u32_pair_split(
-                                                                                    ctx, v1259.1,
-                                                                                );
-                                                                            let v1286 =
-                                                                                C::u16_pair_split(
-                                                                                    ctx, v1283.0,
-                                                                                );
-                                                                            let v1289 =
-                                                                                C::u8_pair_split(
-                                                                                    ctx, v1286.0,
-                                                                                );
-                                                                            match v1289.0 {
-                                                                                0x0 => {
-                                                                                    if v1289.1
-                                                                                        == 0x1
-                                                                                    {
-                                                                                        let v1292 = C::u8_pair_split(ctx, v1286.1);
-                                                                                        if v1292.0
-                                                                                            == 0x2
-                                                                                        {
-                                                                                            if v1292.1 == 0x3 {
-                                                                                                let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                                                                let v1298 = C::u8_pair_split(ctx, v1295.0);
-                                                                                                if v1298.0 == 0x4 {
-                                                                                                    if v1298.1 == 0x5 {
-                                                                                                        let v1301 = C::u8_pair_split(ctx, v1295.1);
-                                                                                                        if v1301.0 == 0x6 {
-                                                                                                            if v1301.1 == 0x7 {
-                                                                                                                let v1239 = C::unpack_value_array_2(ctx, v1237);
-                                                                                                                let v1254 = C::put_in_reg(ctx, v1239.0);
-                                                                                                                let v1248 = C::put_in_reg(ctx, v1239.0);
-                                                                                                                let v1321 = constructor_vec_merge_high(ctx, I64X2, v1254, v1248);
-                                                                                                                let v1322 = constructor_output_reg(ctx, v1321);
-                                                                                                                // Rule at src/isa/s390x/lower.isle line 2076.
-                                                                                                                return Some(v1322);
-                                                                                                            }
-                                                                                                        }
-                                                                                                    }
-                                                                                                }
-                                                                                            }
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                                0x8 => {
-                                                                                    if v1289.1
-                                                                                        == 0x9
-                                                                                    {
-                                                                                        let v1292 = C::u8_pair_split(ctx, v1286.1);
-                                                                                        if v1292.0
-                                                                                            == 0xA
-                                                                                        {
-                                                                                            if v1292.1 == 0xB {
-                                                                                                let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                                                                let v1298 = C::u8_pair_split(ctx, v1295.0);
-                                                                                                if v1298.0 == 0xC {
-                                                                                                    if v1298.1 == 0xD {
-                                                                                                        let v1301 = C::u8_pair_split(ctx, v1295.1);
-                                                                                                        if v1301.0 == 0xE {
-                                                                                                            if v1301.1 == 0xF {
-                                                                                                                let v1239 = C::unpack_value_array_2(ctx, v1237);
-                                                                                                                let v1254 = C::put_in_reg(ctx, v1239.0);
-                                                                                                                let v1248 = C::put_in_reg(ctx, v1239.0);
-                                                                                                                let v1425 = constructor_vec_permute_dw_imm(ctx, I8X16, v1254, 0x0, v1248, 0x1);
-                                                                                                                let v1426 = constructor_output_reg(ctx, v1425);
-                                                                                                                // Rule at src/isa/s390x/lower.isle line 2190.
-                                                                                                                return Some(v1426);
-                                                                                                            }
-                                                                                                        }
-                                                                                                    }
-                                                                                                }
-                                                                                            }
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                                0x10 => {
-                                                                                    if v1289.1
-                                                                                        == 0x11
-                                                                                    {
-                                                                                        let v1292 = C::u8_pair_split(ctx, v1286.1);
-                                                                                        if v1292.0
-                                                                                            == 0x12
-                                                                                        {
-                                                                                            if v1292.1 == 0x13 {
-                                                                                                let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                                                                let v1298 = C::u8_pair_split(ctx, v1295.0);
-                                                                                                if v1298.0 == 0x14 {
-                                                                                                    if v1298.1 == 0x15 {
-                                                                                                        let v1301 = C::u8_pair_split(ctx, v1295.1);
-                                                                                                        if v1301.0 == 0x16 {
-                                                                                                            if v1301.1 == 0x17 {
-                                                                                                                let v1239 = C::unpack_value_array_2(ctx, v1237);
-                                                                                                                let v1254 = C::put_in_reg(ctx, v1239.0);
-                                                                                                                let v1255 = C::put_in_reg(ctx, v1239.1);
-                                                                                                                let v1304 = constructor_vec_merge_high(ctx, I64X2, v1254, v1255);
-                                                                                                                let v1305 = constructor_output_reg(ctx, v1304);
-                                                                                                                // Rule at src/isa/s390x/lower.isle line 2060.
-                                                                                                                return Some(v1305);
-                                                                                                            }
-                                                                                                        }
-                                                                                                    }
-                                                                                                }
-                                                                                            }
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                                0x18 => {
-                                                                                    if v1289.1
-                                                                                        == 0x19
-                                                                                    {
-                                                                                        let v1292 = C::u8_pair_split(ctx, v1286.1);
-                                                                                        if v1292.0
-                                                                                            == 0x1A
-                                                                                        {
-                                                                                            if v1292.1 == 0x1B {
-                                                                                                let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                                                                let v1298 = C::u8_pair_split(ctx, v1295.0);
-                                                                                                if v1298.0 == 0x1C {
-                                                                                                    if v1298.1 == 0x1D {
-                                                                                                        let v1301 = C::u8_pair_split(ctx, v1295.1);
-                                                                                                        if v1301.0 == 0x1E {
-                                                                                                            if v1301.1 == 0x1F {
-                                                                                                                let v1239 = C::unpack_value_array_2(ctx, v1237);
-                                                                                                                let v1254 = C::put_in_reg(ctx, v1239.0);
-                                                                                                                let v1255 = C::put_in_reg(ctx, v1239.1);
-                                                                                                                let v1417 = constructor_vec_permute_dw_imm(ctx, I8X16, v1254, 0x0, v1255, 0x1);
-                                                                                                                let v1418 = constructor_output_reg(ctx, v1417);
-                                                                                                                // Rule at src/isa/s390x/lower.isle line 2182.
-                                                                                                                return Some(v1418);
-                                                                                                            }
-                                                                                                        }
-                                                                                                    }
-                                                                                                }
-                                                                                            }
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                                _ => {}
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                            0x10 => {
-                                                                if v1277.1 == 0x11 {
-                                                                    let v1280 = C::u8_pair_split(
-                                                                        ctx, v1274.1,
-                                                                    );
-                                                                    if v1280.0 == 0x12 {
-                                                                        if v1280.1 == 0x13 {
-                                                                            let v1283 =
-                                                                                C::u32_pair_split(
-                                                                                    ctx, v1259.1,
-                                                                                );
-                                                                            let v1286 =
-                                                                                C::u16_pair_split(
-                                                                                    ctx, v1283.0,
-                                                                                );
-                                                                            let v1289 =
-                                                                                C::u8_pair_split(
-                                                                                    ctx, v1286.0,
-                                                                                );
-                                                                            if v1289.0 == 0x4 {
-                                                                                if v1289.1 == 0x5 {
-                                                                                    let v1292 = C::u8_pair_split(ctx, v1286.1);
-                                                                                    if v1292.0
-                                                                                        == 0x6
-                                                                                    {
-                                                                                        if v1292.1
-                                                                                            == 0x7
-                                                                                        {
-                                                                                            let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                                                            let v1298 = C::u8_pair_split(ctx, v1295.0);
-                                                                                            if v1298.0 == 0x14 {
-                                                                                                if v1298.1 == 0x15 {
-                                                                                                    let v1301 = C::u8_pair_split(ctx, v1295.1);
-                                                                                                    if v1301.0 == 0x16 {
-                                                                                                        if v1301.1 == 0x17 {
-                                                                                                            let v1239 = C::unpack_value_array_2(ctx, v1237);
-                                                                                                            let v1254 = C::put_in_reg(ctx, v1239.0);
-                                                                                                            let v1255 = C::put_in_reg(ctx, v1239.1);
-                                                                                                            let v1306 = constructor_vec_merge_high(ctx, I32X4, v1254, v1255);
-                                                                                                            let v1307 = constructor_output_reg(ctx, v1306);
-                                                                                                            // Rule at src/isa/s390x/lower.isle line 2062.
-                                                                                                            return Some(v1307);
-                                                                                                        }
-                                                                                                    }
-                                                                                                }
-                                                                                            }
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                            _ => {}
-                                                        }
-                                                    }
-                                                }
-                                                0x10 => {
-                                                    if v1271.1 == 0x11 {
-                                                        let v1274 = C::u16_pair_split(ctx, v1262.1);
-                                                        let v1277 = C::u8_pair_split(ctx, v1274.0);
-                                                        if v1277.0 == 0x2 {
-                                                            if v1277.1 == 0x3 {
-                                                                let v1280 =
-                                                                    C::u8_pair_split(ctx, v1274.1);
-                                                                if v1280.0 == 0x12 {
-                                                                    if v1280.1 == 0x13 {
-                                                                        let v1283 =
-                                                                            C::u32_pair_split(
-                                                                                ctx, v1259.1,
-                                                                            );
-                                                                        let v1286 =
-                                                                            C::u16_pair_split(
-                                                                                ctx, v1283.0,
-                                                                            );
-                                                                        let v1289 =
-                                                                            C::u8_pair_split(
-                                                                                ctx, v1286.0,
-                                                                            );
-                                                                        if v1289.0 == 0x4 {
-                                                                            if v1289.1 == 0x5 {
-                                                                                let v1292 = C::u8_pair_split(ctx, v1286.1);
-                                                                                if v1292.0 == 0x14 {
-                                                                                    if v1292.1
-                                                                                        == 0x15
-                                                                                    {
-                                                                                        let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                                                        let v1298 = C::u8_pair_split(ctx, v1295.0);
-                                                                                        if v1298.0
-                                                                                            == 0x6
-                                                                                        {
-                                                                                            if v1298.1 == 0x7 {
-                                                                                                let v1301 = C::u8_pair_split(ctx, v1295.1);
-                                                                                                if v1301.0 == 0x16 {
-                                                                                                    if v1301.1 == 0x17 {
-                                                                                                        let v1239 = C::unpack_value_array_2(ctx, v1237);
-                                                                                                        let v1254 = C::put_in_reg(ctx, v1239.0);
-                                                                                                        let v1255 = C::put_in_reg(ctx, v1239.1);
-                                                                                                        let v1308 = constructor_vec_merge_high(ctx, I16X8, v1254, v1255);
-                                                                                                        let v1309 = constructor_output_reg(ctx, v1308);
-                                                                                                        // Rule at src/isa/s390x/lower.isle line 2064.
-                                                                                                        return Some(v1309);
-                                                                                                    }
-                                                                                                }
-                                                                                            }
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                                _ => {}
-                                            }
-                                        }
-                                        0x10 => {
-                                            let v1271 = C::u8_pair_split(ctx, v1265.1);
-                                            if v1271.0 == 0x1 {
-                                                if v1271.1 == 0x11 {
-                                                    let v1274 = C::u16_pair_split(ctx, v1262.1);
-                                                    let v1277 = C::u8_pair_split(ctx, v1274.0);
-                                                    if v1277.0 == 0x2 {
-                                                        if v1277.1 == 0x12 {
-                                                            let v1280 =
-                                                                C::u8_pair_split(ctx, v1274.1);
-                                                            if v1280.0 == 0x3 {
-                                                                if v1280.1 == 0x13 {
-                                                                    let v1283 = C::u32_pair_split(
-                                                                        ctx, v1259.1,
-                                                                    );
-                                                                    let v1286 = C::u16_pair_split(
-                                                                        ctx, v1283.0,
-                                                                    );
-                                                                    let v1289 = C::u8_pair_split(
-                                                                        ctx, v1286.0,
-                                                                    );
-                                                                    if v1289.0 == 0x4 {
-                                                                        if v1289.1 == 0x14 {
-                                                                            let v1292 =
-                                                                                C::u8_pair_split(
-                                                                                    ctx, v1286.1,
-                                                                                );
-                                                                            if v1292.0 == 0x5 {
-                                                                                if v1292.1 == 0x15 {
-                                                                                    let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                                                    let v1298 = C::u8_pair_split(ctx, v1295.0);
-                                                                                    if v1298.0
-                                                                                        == 0x6
-                                                                                    {
-                                                                                        if v1298.1
-                                                                                            == 0x16
-                                                                                        {
-                                                                                            let v1301 = C::u8_pair_split(ctx, v1295.1);
-                                                                                            if v1301.0 == 0x7 {
-                                                                                                if v1301.1 == 0x17 {
-                                                                                                    let v1239 = C::unpack_value_array_2(ctx, v1237);
-                                                                                                    let v1254 = C::put_in_reg(ctx, v1239.0);
-                                                                                                    let v1255 = C::put_in_reg(ctx, v1239.1);
-                                                                                                    let v1310 = constructor_vec_merge_high(ctx, I8X16, v1254, v1255);
-                                                                                                    let v1311 = constructor_output_reg(ctx, v1310);
-                                                                                                    // Rule at src/isa/s390x/lower.isle line 2066.
-                                                                                                    return Some(v1311);
-                                                                                                }
-                                                                                            }
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                        _ => {}
-                                    }
-                                }
-                                0x1 => {
-                                    if v1268.1 == 0x3 {
-                                        let v1271 = C::u8_pair_split(ctx, v1265.1);
-                                        if v1271.0 == 0x5 {
-                                            if v1271.1 == 0x7 {
-                                                let v1274 = C::u16_pair_split(ctx, v1262.1);
-                                                let v1277 = C::u8_pair_split(ctx, v1274.0);
-                                                if v1277.0 == 0x9 {
-                                                    if v1277.1 == 0xB {
-                                                        let v1280 = C::u8_pair_split(ctx, v1274.1);
-                                                        if v1280.0 == 0xD {
-                                                            if v1280.1 == 0xF {
-                                                                let v1283 =
-                                                                    C::u32_pair_split(ctx, v1259.1);
-                                                                let v1286 =
-                                                                    C::u16_pair_split(ctx, v1283.0);
-                                                                let v1289 =
-                                                                    C::u8_pair_split(ctx, v1286.0);
-                                                                match v1289.0 {
-                                                                    0x1 => {
-                                                                        if v1289.1 == 0x3 {
-                                                                            let v1292 =
-                                                                                C::u8_pair_split(
-                                                                                    ctx, v1286.1,
-                                                                                );
-                                                                            if v1292.0 == 0x5 {
-                                                                                if v1292.1 == 0x7 {
-                                                                                    let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                                                    let v1298 = C::u8_pair_split(ctx, v1295.0);
-                                                                                    if v1298.0
-                                                                                        == 0x9
-                                                                                    {
-                                                                                        if v1298.1
-                                                                                            == 0xB
-                                                                                        {
-                                                                                            let v1301 = C::u8_pair_split(ctx, v1295.1);
-                                                                                            if v1301.0 == 0xD {
-                                                                                                if v1301.1 == 0xF {
-                                                                                                    let v1239 = C::unpack_value_array_2(ctx, v1237);
-                                                                                                    let v1254 = C::put_in_reg(ctx, v1239.0);
-                                                                                                    let v1248 = C::put_in_reg(ctx, v1239.0);
-                                                                                                    let v1385 = constructor_vec_pack(ctx, I16X8, v1254, v1248);
-                                                                                                    let v1386 = constructor_output_reg(ctx, v1385);
-                                                                                                    // Rule at src/isa/s390x/lower.isle line 2144.
-                                                                                                    return Some(v1386);
-                                                                                                }
-                                                                                            }
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                    0x11 => {
-                                                                        if v1289.1 == 0x13 {
-                                                                            let v1292 =
-                                                                                C::u8_pair_split(
-                                                                                    ctx, v1286.1,
-                                                                                );
-                                                                            if v1292.0 == 0x15 {
-                                                                                if v1292.1 == 0x17 {
-                                                                                    let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                                                    let v1298 = C::u8_pair_split(ctx, v1295.0);
-                                                                                    if v1298.0
-                                                                                        == 0x19
-                                                                                    {
-                                                                                        if v1298.1
-                                                                                            == 0x1B
-                                                                                        {
-                                                                                            let v1301 = C::u8_pair_split(ctx, v1295.1);
-                                                                                            if v1301.0 == 0x1D {
-                                                                                                if v1301.1 == 0x1F {
-                                                                                                    let v1239 = C::unpack_value_array_2(ctx, v1237);
-                                                                                                    let v1254 = C::put_in_reg(ctx, v1239.0);
-                                                                                                    let v1255 = C::put_in_reg(ctx, v1239.1);
-                                                                                                    let v1373 = constructor_vec_pack(ctx, I16X8, v1254, v1255);
-                                                                                                    let v1374 = constructor_output_reg(ctx, v1373);
-                                                                                                    // Rule at src/isa/s390x/lower.isle line 2132.
-                                                                                                    return Some(v1374);
-                                                                                                }
-                                                                                            }
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                    _ => {}
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                                0x2 => {
-                                    if v1268.1 == 0x3 {
-                                        let v1271 = C::u8_pair_split(ctx, v1265.1);
-                                        if v1271.0 == 0x6 {
-                                            if v1271.1 == 0x7 {
-                                                let v1274 = C::u16_pair_split(ctx, v1262.1);
-                                                let v1277 = C::u8_pair_split(ctx, v1274.0);
-                                                if v1277.0 == 0xA {
-                                                    if v1277.1 == 0xB {
-                                                        let v1280 = C::u8_pair_split(ctx, v1274.1);
-                                                        if v1280.0 == 0xE {
-                                                            if v1280.1 == 0xF {
-                                                                let v1283 =
-                                                                    C::u32_pair_split(ctx, v1259.1);
-                                                                let v1286 =
-                                                                    C::u16_pair_split(ctx, v1283.0);
-                                                                let v1289 =
-                                                                    C::u8_pair_split(ctx, v1286.0);
-                                                                match v1289.0 {
-                                                                    0x2 => {
-                                                                        if v1289.1 == 0x3 {
-                                                                            let v1292 =
-                                                                                C::u8_pair_split(
-                                                                                    ctx, v1286.1,
-                                                                                );
-                                                                            if v1292.0 == 0x6 {
-                                                                                if v1292.1 == 0x7 {
-                                                                                    let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                                                    let v1298 = C::u8_pair_split(ctx, v1295.0);
-                                                                                    if v1298.0
-                                                                                        == 0xA
-                                                                                    {
-                                                                                        if v1298.1
-                                                                                            == 0xB
-                                                                                        {
-                                                                                            let v1301 = C::u8_pair_split(ctx, v1295.1);
-                                                                                            if v1301.0 == 0xE {
-                                                                                                if v1301.1 == 0xF {
-                                                                                                    let v1239 = C::unpack_value_array_2(ctx, v1237);
-                                                                                                    let v1254 = C::put_in_reg(ctx, v1239.0);
-                                                                                                    let v1248 = C::put_in_reg(ctx, v1239.0);
-                                                                                                    let v1383 = constructor_vec_pack(ctx, I32X4, v1254, v1248);
-                                                                                                    let v1384 = constructor_output_reg(ctx, v1383);
-                                                                                                    // Rule at src/isa/s390x/lower.isle line 2142.
-                                                                                                    return Some(v1384);
-                                                                                                }
-                                                                                            }
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                    0x12 => {
-                                                                        if v1289.1 == 0x13 {
-                                                                            let v1292 =
-                                                                                C::u8_pair_split(
-                                                                                    ctx, v1286.1,
-                                                                                );
-                                                                            if v1292.0 == 0x16 {
-                                                                                if v1292.1 == 0x17 {
-                                                                                    let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                                                    let v1298 = C::u8_pair_split(ctx, v1295.0);
-                                                                                    if v1298.0
-                                                                                        == 0x1A
-                                                                                    {
-                                                                                        if v1298.1
-                                                                                            == 0x1B
-                                                                                        {
-                                                                                            let v1301 = C::u8_pair_split(ctx, v1295.1);
-                                                                                            if v1301.0 == 0x1E {
-                                                                                                if v1301.1 == 0x1F {
-                                                                                                    let v1239 = C::unpack_value_array_2(ctx, v1237);
-                                                                                                    let v1254 = C::put_in_reg(ctx, v1239.0);
-                                                                                                    let v1255 = C::put_in_reg(ctx, v1239.1);
-                                                                                                    let v1371 = constructor_vec_pack(ctx, I32X4, v1254, v1255);
-                                                                                                    let v1372 = constructor_output_reg(ctx, v1371);
-                                                                                                    // Rule at src/isa/s390x/lower.isle line 2130.
-                                                                                                    return Some(v1372);
-                                                                                                }
-                                                                                            }
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                    _ => {}
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                                0x4 => {
-                                    if v1268.1 == 0x5 {
-                                        let v1271 = C::u8_pair_split(ctx, v1265.1);
-                                        if v1271.0 == 0x6 {
-                                            if v1271.1 == 0x7 {
-                                                let v1274 = C::u16_pair_split(ctx, v1262.1);
-                                                let v1277 = C::u8_pair_split(ctx, v1274.0);
-                                                if v1277.0 == 0xC {
-                                                    if v1277.1 == 0xD {
-                                                        let v1280 = C::u8_pair_split(ctx, v1274.1);
-                                                        if v1280.0 == 0xE {
-                                                            if v1280.1 == 0xF {
-                                                                let v1283 =
-                                                                    C::u32_pair_split(ctx, v1259.1);
-                                                                let v1286 =
-                                                                    C::u16_pair_split(ctx, v1283.0);
-                                                                let v1289 =
-                                                                    C::u8_pair_split(ctx, v1286.0);
-                                                                match v1289.0 {
-                                                                    0x4 => {
-                                                                        if v1289.1 == 0x5 {
-                                                                            let v1292 =
-                                                                                C::u8_pair_split(
-                                                                                    ctx, v1286.1,
-                                                                                );
-                                                                            if v1292.0 == 0x6 {
-                                                                                if v1292.1 == 0x7 {
-                                                                                    let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                                                    let v1298 = C::u8_pair_split(ctx, v1295.0);
-                                                                                    if v1298.0
-                                                                                        == 0xC
-                                                                                    {
-                                                                                        if v1298.1
-                                                                                            == 0xD
-                                                                                        {
-                                                                                            let v1301 = C::u8_pair_split(ctx, v1295.1);
-                                                                                            if v1301.0 == 0xE {
-                                                                                                if v1301.1 == 0xF {
-                                                                                                    let v1239 = C::unpack_value_array_2(ctx, v1237);
-                                                                                                    let v1254 = C::put_in_reg(ctx, v1239.0);
-                                                                                                    let v1248 = C::put_in_reg(ctx, v1239.0);
-                                                                                                    let v1381 = constructor_vec_pack(ctx, I64X2, v1254, v1248);
-                                                                                                    let v1382 = constructor_output_reg(ctx, v1381);
-                                                                                                    // Rule at src/isa/s390x/lower.isle line 2140.
-                                                                                                    return Some(v1382);
-                                                                                                }
-                                                                                            }
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                    0x14 => {
-                                                                        if v1289.1 == 0x15 {
-                                                                            let v1292 =
-                                                                                C::u8_pair_split(
-                                                                                    ctx, v1286.1,
-                                                                                );
-                                                                            if v1292.0 == 0x16 {
-                                                                                if v1292.1 == 0x17 {
-                                                                                    let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                                                    let v1298 = C::u8_pair_split(ctx, v1295.0);
-                                                                                    if v1298.0
-                                                                                        == 0x1C
-                                                                                    {
-                                                                                        if v1298.1
-                                                                                            == 0x1D
-                                                                                        {
-                                                                                            let v1301 = C::u8_pair_split(ctx, v1295.1);
-                                                                                            if v1301.0 == 0x1E {
-                                                                                                if v1301.1 == 0x1F {
-                                                                                                    let v1239 = C::unpack_value_array_2(ctx, v1237);
-                                                                                                    let v1254 = C::put_in_reg(ctx, v1239.0);
-                                                                                                    let v1255 = C::put_in_reg(ctx, v1239.1);
-                                                                                                    let v1369 = constructor_vec_pack(ctx, I64X2, v1254, v1255);
-                                                                                                    let v1370 = constructor_output_reg(ctx, v1369);
-                                                                                                    // Rule at src/isa/s390x/lower.isle line 2128.
-                                                                                                    return Some(v1370);
-                                                                                                }
-                                                                                            }
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                    _ => {}
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                                0x8 => {
-                                    match v1268.1 {
-                                        0x8 => {
-                                            let v1271 = C::u8_pair_split(ctx, v1265.1);
-                                            if v1271.0 == 0x9 {
-                                                if v1271.1 == 0x9 {
-                                                    let v1274 = C::u16_pair_split(ctx, v1262.1);
-                                                    let v1277 = C::u8_pair_split(ctx, v1274.0);
-                                                    if v1277.0 == 0xA {
-                                                        if v1277.1 == 0xA {
-                                                            let v1280 =
-                                                                C::u8_pair_split(ctx, v1274.1);
-                                                            if v1280.0 == 0xB {
-                                                                if v1280.1 == 0xB {
-                                                                    let v1283 = C::u32_pair_split(
-                                                                        ctx, v1259.1,
-                                                                    );
-                                                                    let v1286 = C::u16_pair_split(
-                                                                        ctx, v1283.0,
-                                                                    );
-                                                                    let v1289 = C::u8_pair_split(
-                                                                        ctx, v1286.0,
-                                                                    );
-                                                                    if v1289.0 == 0xC {
-                                                                        if v1289.1 == 0xC {
-                                                                            let v1292 =
-                                                                                C::u8_pair_split(
-                                                                                    ctx, v1286.1,
-                                                                                );
-                                                                            if v1292.0 == 0xD {
-                                                                                if v1292.1 == 0xD {
-                                                                                    let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                                                    let v1298 = C::u8_pair_split(ctx, v1295.0);
-                                                                                    if v1298.0
-                                                                                        == 0xE
-                                                                                    {
-                                                                                        if v1298.1
-                                                                                            == 0xE
-                                                                                        {
-                                                                                            let v1301 = C::u8_pair_split(ctx, v1295.1);
-                                                                                            if v1301.0 == 0xF {
-                                                                                                if v1301.1 == 0xF {
-                                                                                                    let v1239 = C::unpack_value_array_2(ctx, v1237);
-                                                                                                    let v1254 = C::put_in_reg(ctx, v1239.0);
-                                                                                                    let v1248 = C::put_in_reg(ctx, v1239.0);
-                                                                                                    let v1359 = constructor_vec_merge_low(ctx, I8X16, v1254, v1248);
-                                                                                                    let v1360 = constructor_output_reg(ctx, v1359);
-                                                                                                    // Rule at src/isa/s390x/lower.isle line 2116.
-                                                                                                    return Some(v1360);
-                                                                                                }
-                                                                                            }
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                        0x9 => {
-                                            let v1271 = C::u8_pair_split(ctx, v1265.1);
-                                            match v1271.0 {
-                                                0x8 => {
-                                                    if v1271.1 == 0x9 {
-                                                        let v1274 = C::u16_pair_split(ctx, v1262.1);
-                                                        let v1277 = C::u8_pair_split(ctx, v1274.0);
-                                                        if v1277.0 == 0xA {
-                                                            if v1277.1 == 0xB {
-                                                                let v1280 =
-                                                                    C::u8_pair_split(ctx, v1274.1);
-                                                                if v1280.0 == 0xA {
-                                                                    if v1280.1 == 0xB {
-                                                                        let v1283 =
-                                                                            C::u32_pair_split(
-                                                                                ctx, v1259.1,
-                                                                            );
-                                                                        let v1286 =
-                                                                            C::u16_pair_split(
-                                                                                ctx, v1283.0,
-                                                                            );
-                                                                        let v1289 =
-                                                                            C::u8_pair_split(
-                                                                                ctx, v1286.0,
-                                                                            );
-                                                                        if v1289.0 == 0xC {
-                                                                            if v1289.1 == 0xD {
-                                                                                let v1292 = C::u8_pair_split(ctx, v1286.1);
-                                                                                if v1292.0 == 0xC {
-                                                                                    if v1292.1
-                                                                                        == 0xD
-                                                                                    {
-                                                                                        let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                                                        let v1298 = C::u8_pair_split(ctx, v1295.0);
-                                                                                        if v1298.0
-                                                                                            == 0xE
-                                                                                        {
-                                                                                            if v1298.1 == 0xF {
-                                                                                                let v1301 = C::u8_pair_split(ctx, v1295.1);
-                                                                                                if v1301.0 == 0xE {
-                                                                                                    if v1301.1 == 0xF {
-                                                                                                        let v1239 = C::unpack_value_array_2(ctx, v1237);
-                                                                                                        let v1254 = C::put_in_reg(ctx, v1239.0);
-                                                                                                        let v1248 = C::put_in_reg(ctx, v1239.0);
-                                                                                                        let v1357 = constructor_vec_merge_low(ctx, I16X8, v1254, v1248);
-                                                                                                        let v1358 = constructor_output_reg(ctx, v1357);
-                                                                                                        // Rule at src/isa/s390x/lower.isle line 2114.
-                                                                                                        return Some(v1358);
-                                                                                                    }
-                                                                                                }
-                                                                                            }
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                                0xA => {
-                                                    if v1271.1 == 0xB {
-                                                        let v1274 = C::u16_pair_split(ctx, v1262.1);
-                                                        let v1277 = C::u8_pair_split(ctx, v1274.0);
-                                                        match v1277.0 {
-                                                            0x8 => {
-                                                                if v1277.1 == 0x9 {
-                                                                    let v1280 = C::u8_pair_split(
-                                                                        ctx, v1274.1,
-                                                                    );
-                                                                    if v1280.0 == 0xA {
-                                                                        if v1280.1 == 0xB {
-                                                                            let v1283 =
-                                                                                C::u32_pair_split(
-                                                                                    ctx, v1259.1,
-                                                                                );
-                                                                            let v1286 =
-                                                                                C::u16_pair_split(
-                                                                                    ctx, v1283.0,
-                                                                                );
-                                                                            let v1289 =
-                                                                                C::u8_pair_split(
-                                                                                    ctx, v1286.0,
-                                                                                );
-                                                                            if v1289.0 == 0xC {
-                                                                                if v1289.1 == 0xD {
-                                                                                    let v1292 = C::u8_pair_split(ctx, v1286.1);
-                                                                                    if v1292.0
-                                                                                        == 0xE
-                                                                                    {
-                                                                                        if v1292.1
-                                                                                            == 0xF
-                                                                                        {
-                                                                                            let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                                                            let v1298 = C::u8_pair_split(ctx, v1295.0);
-                                                                                            if v1298.0 == 0xC {
-                                                                                                if v1298.1 == 0xD {
-                                                                                                    let v1301 = C::u8_pair_split(ctx, v1295.1);
-                                                                                                    if v1301.0 == 0xE {
-                                                                                                        if v1301.1 == 0xF {
-                                                                                                            let v1239 = C::unpack_value_array_2(ctx, v1237);
-                                                                                                            let v1254 = C::put_in_reg(ctx, v1239.0);
-                                                                                                            let v1248 = C::put_in_reg(ctx, v1239.0);
-                                                                                                            let v1355 = constructor_vec_merge_low(ctx, I32X4, v1254, v1248);
-                                                                                                            let v1356 = constructor_output_reg(ctx, v1355);
-                                                                                                            // Rule at src/isa/s390x/lower.isle line 2112.
-                                                                                                            return Some(v1356);
-                                                                                                        }
-                                                                                                    }
-                                                                                                }
-                                                                                            }
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                            0xC => {
-                                                                if v1277.1 == 0xD {
-                                                                    let v1280 = C::u8_pair_split(
-                                                                        ctx, v1274.1,
-                                                                    );
-                                                                    if v1280.0 == 0xE {
-                                                                        if v1280.1 == 0xF {
-                                                                            let v1283 =
-                                                                                C::u32_pair_split(
-                                                                                    ctx, v1259.1,
-                                                                                );
-                                                                            let v1286 =
-                                                                                C::u16_pair_split(
-                                                                                    ctx, v1283.0,
-                                                                                );
-                                                                            let v1289 =
-                                                                                C::u8_pair_split(
-                                                                                    ctx, v1286.0,
-                                                                                );
-                                                                            match v1289.0 {
-                                                                                0x0 => {
-                                                                                    if v1289.1
-                                                                                        == 0x1
-                                                                                    {
-                                                                                        let v1292 = C::u8_pair_split(ctx, v1286.1);
-                                                                                        if v1292.0
-                                                                                            == 0x2
-                                                                                        {
-                                                                                            if v1292.1 == 0x3 {
-                                                                                                let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                                                                let v1298 = C::u8_pair_split(ctx, v1295.0);
-                                                                                                if v1298.0 == 0x4 {
-                                                                                                    if v1298.1 == 0x5 {
-                                                                                                        let v1301 = C::u8_pair_split(ctx, v1295.1);
-                                                                                                        if v1301.0 == 0x6 {
-                                                                                                            if v1301.1 == 0x7 {
-                                                                                                                let v1239 = C::unpack_value_array_2(ctx, v1237);
-                                                                                                                let v1254 = C::put_in_reg(ctx, v1239.0);
-                                                                                                                let v1248 = C::put_in_reg(ctx, v1239.0);
-                                                                                                                let v1427 = constructor_vec_permute_dw_imm(ctx, I8X16, v1254, 0x1, v1248, 0x0);
-                                                                                                                let v1428 = constructor_output_reg(ctx, v1427);
-                                                                                                                // Rule at src/isa/s390x/lower.isle line 2192.
-                                                                                                                return Some(v1428);
-                                                                                                            }
-                                                                                                        }
-                                                                                                    }
-                                                                                                }
-                                                                                            }
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                                0x8 => {
-                                                                                    if v1289.1
-                                                                                        == 0x9
-                                                                                    {
-                                                                                        let v1292 = C::u8_pair_split(ctx, v1286.1);
-                                                                                        if v1292.0
-                                                                                            == 0xA
-                                                                                        {
-                                                                                            if v1292.1 == 0xB {
-                                                                                                let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                                                                let v1298 = C::u8_pair_split(ctx, v1295.0);
-                                                                                                if v1298.0 == 0xC {
-                                                                                                    if v1298.1 == 0xD {
-                                                                                                        let v1301 = C::u8_pair_split(ctx, v1295.1);
-                                                                                                        if v1301.0 == 0xE {
-                                                                                                            if v1301.1 == 0xF {
-                                                                                                                let v1239 = C::unpack_value_array_2(ctx, v1237);
-                                                                                                                let v1254 = C::put_in_reg(ctx, v1239.0);
-                                                                                                                let v1248 = C::put_in_reg(ctx, v1239.0);
-                                                                                                                let v1353 = constructor_vec_merge_low(ctx, I64X2, v1254, v1248);
-                                                                                                                let v1354 = constructor_output_reg(ctx, v1353);
-                                                                                                                // Rule at src/isa/s390x/lower.isle line 2110.
-                                                                                                                return Some(v1354);
-                                                                                                            }
-                                                                                                        }
-                                                                                                    }
-                                                                                                }
-                                                                                            }
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                                0x10 => {
-                                                                                    if v1289.1
-                                                                                        == 0x11
-                                                                                    {
-                                                                                        let v1292 = C::u8_pair_split(ctx, v1286.1);
-                                                                                        if v1292.0
-                                                                                            == 0x12
-                                                                                        {
-                                                                                            if v1292.1 == 0x13 {
-                                                                                                let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                                                                let v1298 = C::u8_pair_split(ctx, v1295.0);
-                                                                                                if v1298.0 == 0x14 {
-                                                                                                    if v1298.1 == 0x15 {
-                                                                                                        let v1301 = C::u8_pair_split(ctx, v1295.1);
-                                                                                                        if v1301.0 == 0x16 {
-                                                                                                            if v1301.1 == 0x17 {
-                                                                                                                let v1239 = C::unpack_value_array_2(ctx, v1237);
-                                                                                                                let v1254 = C::put_in_reg(ctx, v1239.0);
-                                                                                                                let v1255 = C::put_in_reg(ctx, v1239.1);
-                                                                                                                let v1419 = constructor_vec_permute_dw_imm(ctx, I8X16, v1254, 0x1, v1255, 0x0);
-                                                                                                                let v1420 = constructor_output_reg(ctx, v1419);
-                                                                                                                // Rule at src/isa/s390x/lower.isle line 2184.
-                                                                                                                return Some(v1420);
-                                                                                                            }
-                                                                                                        }
-                                                                                                    }
-                                                                                                }
-                                                                                            }
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                                0x18 => {
-                                                                                    if v1289.1
-                                                                                        == 0x19
-                                                                                    {
-                                                                                        let v1292 = C::u8_pair_split(ctx, v1286.1);
-                                                                                        if v1292.0
-                                                                                            == 0x1A
-                                                                                        {
-                                                                                            if v1292.1 == 0x1B {
-                                                                                                let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                                                                let v1298 = C::u8_pair_split(ctx, v1295.0);
-                                                                                                if v1298.0 == 0x1C {
-                                                                                                    if v1298.1 == 0x1D {
-                                                                                                        let v1301 = C::u8_pair_split(ctx, v1295.1);
-                                                                                                        if v1301.0 == 0x1E {
-                                                                                                            if v1301.1 == 0x1F {
-                                                                                                                let v1239 = C::unpack_value_array_2(ctx, v1237);
-                                                                                                                let v1254 = C::put_in_reg(ctx, v1239.0);
-                                                                                                                let v1255 = C::put_in_reg(ctx, v1239.1);
-                                                                                                                let v1337 = constructor_vec_merge_low(ctx, I64X2, v1254, v1255);
-                                                                                                                let v1338 = constructor_output_reg(ctx, v1337);
-                                                                                                                // Rule at src/isa/s390x/lower.isle line 2094.
-                                                                                                                return Some(v1338);
-                                                                                                            }
-                                                                                                        }
-                                                                                                    }
-                                                                                                }
-                                                                                            }
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                                _ => {}
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                            0x18 => {
-                                                                if v1277.1 == 0x19 {
-                                                                    let v1280 = C::u8_pair_split(
-                                                                        ctx, v1274.1,
-                                                                    );
-                                                                    if v1280.0 == 0x1A {
-                                                                        if v1280.1 == 0x1B {
-                                                                            let v1283 =
-                                                                                C::u32_pair_split(
-                                                                                    ctx, v1259.1,
-                                                                                );
-                                                                            let v1286 =
-                                                                                C::u16_pair_split(
-                                                                                    ctx, v1283.0,
-                                                                                );
-                                                                            let v1289 =
-                                                                                C::u8_pair_split(
-                                                                                    ctx, v1286.0,
-                                                                                );
-                                                                            if v1289.0 == 0xC {
-                                                                                if v1289.1 == 0xD {
-                                                                                    let v1292 = C::u8_pair_split(ctx, v1286.1);
-                                                                                    if v1292.0
-                                                                                        == 0xE
-                                                                                    {
-                                                                                        if v1292.1
-                                                                                            == 0xF
-                                                                                        {
-                                                                                            let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                                                            let v1298 = C::u8_pair_split(ctx, v1295.0);
-                                                                                            if v1298.0 == 0x1C {
-                                                                                                if v1298.1 == 0x1D {
-                                                                                                    let v1301 = C::u8_pair_split(ctx, v1295.1);
-                                                                                                    if v1301.0 == 0x1E {
-                                                                                                        if v1301.1 == 0x1F {
-                                                                                                            let v1239 = C::unpack_value_array_2(ctx, v1237);
-                                                                                                            let v1254 = C::put_in_reg(ctx, v1239.0);
-                                                                                                            let v1255 = C::put_in_reg(ctx, v1239.1);
-                                                                                                            let v1339 = constructor_vec_merge_low(ctx, I32X4, v1254, v1255);
-                                                                                                            let v1340 = constructor_output_reg(ctx, v1339);
-                                                                                                            // Rule at src/isa/s390x/lower.isle line 2096.
-                                                                                                            return Some(v1340);
-                                                                                                        }
-                                                                                                    }
-                                                                                                }
-                                                                                            }
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                            _ => {}
-                                                        }
-                                                    }
-                                                }
-                                                0x18 => {
-                                                    if v1271.1 == 0x19 {
-                                                        let v1274 = C::u16_pair_split(ctx, v1262.1);
-                                                        let v1277 = C::u8_pair_split(ctx, v1274.0);
-                                                        if v1277.0 == 0xA {
-                                                            if v1277.1 == 0xB {
-                                                                let v1280 =
-                                                                    C::u8_pair_split(ctx, v1274.1);
-                                                                if v1280.0 == 0x1A {
-                                                                    if v1280.1 == 0x1B {
-                                                                        let v1283 =
-                                                                            C::u32_pair_split(
-                                                                                ctx, v1259.1,
-                                                                            );
-                                                                        let v1286 =
-                                                                            C::u16_pair_split(
-                                                                                ctx, v1283.0,
-                                                                            );
-                                                                        let v1289 =
-                                                                            C::u8_pair_split(
-                                                                                ctx, v1286.0,
-                                                                            );
-                                                                        if v1289.0 == 0xC {
-                                                                            if v1289.1 == 0xD {
-                                                                                let v1292 = C::u8_pair_split(ctx, v1286.1);
-                                                                                if v1292.0 == 0x1C {
-                                                                                    if v1292.1
-                                                                                        == 0x1D
-                                                                                    {
-                                                                                        let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                                                        let v1298 = C::u8_pair_split(ctx, v1295.0);
-                                                                                        if v1298.0
-                                                                                            == 0xE
-                                                                                        {
-                                                                                            if v1298.1 == 0xF {
-                                                                                                let v1301 = C::u8_pair_split(ctx, v1295.1);
-                                                                                                if v1301.0 == 0x1E {
-                                                                                                    if v1301.1 == 0x1F {
-                                                                                                        let v1239 = C::unpack_value_array_2(ctx, v1237);
-                                                                                                        let v1254 = C::put_in_reg(ctx, v1239.0);
-                                                                                                        let v1255 = C::put_in_reg(ctx, v1239.1);
-                                                                                                        let v1341 = constructor_vec_merge_low(ctx, I16X8, v1254, v1255);
-                                                                                                        let v1342 = constructor_output_reg(ctx, v1341);
-                                                                                                        // Rule at src/isa/s390x/lower.isle line 2098.
-                                                                                                        return Some(v1342);
-                                                                                                    }
-                                                                                                }
-                                                                                            }
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                                _ => {}
-                                            }
-                                        }
-                                        0x18 => {
-                                            let v1271 = C::u8_pair_split(ctx, v1265.1);
-                                            if v1271.0 == 0x9 {
-                                                if v1271.1 == 0x19 {
-                                                    let v1274 = C::u16_pair_split(ctx, v1262.1);
-                                                    let v1277 = C::u8_pair_split(ctx, v1274.0);
-                                                    if v1277.0 == 0xA {
-                                                        if v1277.1 == 0x1A {
-                                                            let v1280 =
-                                                                C::u8_pair_split(ctx, v1274.1);
-                                                            if v1280.0 == 0xB {
-                                                                if v1280.1 == 0x1B {
-                                                                    let v1283 = C::u32_pair_split(
-                                                                        ctx, v1259.1,
-                                                                    );
-                                                                    let v1286 = C::u16_pair_split(
-                                                                        ctx, v1283.0,
-                                                                    );
-                                                                    let v1289 = C::u8_pair_split(
-                                                                        ctx, v1286.0,
-                                                                    );
-                                                                    if v1289.0 == 0xC {
-                                                                        if v1289.1 == 0x1C {
-                                                                            let v1292 =
-                                                                                C::u8_pair_split(
-                                                                                    ctx, v1286.1,
-                                                                                );
-                                                                            if v1292.0 == 0xD {
-                                                                                if v1292.1 == 0x1D {
-                                                                                    let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                                                    let v1298 = C::u8_pair_split(ctx, v1295.0);
-                                                                                    if v1298.0
-                                                                                        == 0xE
-                                                                                    {
-                                                                                        if v1298.1
-                                                                                            == 0x1E
-                                                                                        {
-                                                                                            let v1301 = C::u8_pair_split(ctx, v1295.1);
-                                                                                            if v1301.0 == 0xF {
-                                                                                                if v1301.1 == 0x1F {
-                                                                                                    let v1239 = C::unpack_value_array_2(ctx, v1237);
-                                                                                                    let v1254 = C::put_in_reg(ctx, v1239.0);
-                                                                                                    let v1255 = C::put_in_reg(ctx, v1239.1);
-                                                                                                    let v1343 = constructor_vec_merge_low(ctx, I8X16, v1254, v1255);
-                                                                                                    let v1344 = constructor_output_reg(ctx, v1343);
-                                                                                                    // Rule at src/isa/s390x/lower.isle line 2100.
-                                                                                                    return Some(v1344);
-                                                                                                }
-                                                                                            }
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                        _ => {}
-                                    }
-                                }
-                                0x10 => {
-                                    match v1268.1 {
-                                        0x0 => {
-                                            let v1271 = C::u8_pair_split(ctx, v1265.1);
-                                            if v1271.0 == 0x11 {
-                                                if v1271.1 == 0x1 {
-                                                    let v1274 = C::u16_pair_split(ctx, v1262.1);
-                                                    let v1277 = C::u8_pair_split(ctx, v1274.0);
-                                                    if v1277.0 == 0x12 {
-                                                        if v1277.1 == 0x2 {
-                                                            let v1280 =
-                                                                C::u8_pair_split(ctx, v1274.1);
-                                                            if v1280.0 == 0x13 {
-                                                                if v1280.1 == 0x3 {
-                                                                    let v1283 = C::u32_pair_split(
-                                                                        ctx, v1259.1,
-                                                                    );
-                                                                    let v1286 = C::u16_pair_split(
-                                                                        ctx, v1283.0,
-                                                                    );
-                                                                    let v1289 = C::u8_pair_split(
-                                                                        ctx, v1286.0,
-                                                                    );
-                                                                    if v1289.0 == 0x14 {
-                                                                        if v1289.1 == 0x4 {
-                                                                            let v1292 =
-                                                                                C::u8_pair_split(
-                                                                                    ctx, v1286.1,
-                                                                                );
-                                                                            if v1292.0 == 0x15 {
-                                                                                if v1292.1 == 0x5 {
-                                                                                    let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                                                    let v1298 = C::u8_pair_split(ctx, v1295.0);
-                                                                                    if v1298.0
-                                                                                        == 0x16
-                                                                                    {
-                                                                                        if v1298.1
-                                                                                            == 0x6
-                                                                                        {
-                                                                                            let v1301 = C::u8_pair_split(ctx, v1295.1);
-                                                                                            if v1301.0 == 0x17 {
-                                                                                                if v1301.1 == 0x7 {
-                                                                                                    let v1239 = C::unpack_value_array_2(ctx, v1237);
-                                                                                                    let v1312 = C::put_in_reg(ctx, v1239.1);
-                                                                                                    let v1248 = C::put_in_reg(ctx, v1239.0);
-                                                                                                    let v1319 = constructor_vec_merge_high(ctx, I8X16, v1312, v1248);
-                                                                                                    let v1320 = constructor_output_reg(ctx, v1319);
-                                                                                                    // Rule at src/isa/s390x/lower.isle line 2074.
-                                                                                                    return Some(v1320);
-                                                                                                }
-                                                                                            }
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                        0x10 => {
-                                            let v1271 = C::u8_pair_split(ctx, v1265.1);
-                                            if v1271.0 == 0x11 {
-                                                if v1271.1 == 0x11 {
-                                                    let v1274 = C::u16_pair_split(ctx, v1262.1);
-                                                    let v1277 = C::u8_pair_split(ctx, v1274.0);
-                                                    if v1277.0 == 0x12 {
-                                                        if v1277.1 == 0x12 {
-                                                            let v1280 =
-                                                                C::u8_pair_split(ctx, v1274.1);
-                                                            if v1280.0 == 0x13 {
-                                                                if v1280.1 == 0x13 {
-                                                                    let v1283 = C::u32_pair_split(
-                                                                        ctx, v1259.1,
-                                                                    );
-                                                                    let v1286 = C::u16_pair_split(
-                                                                        ctx, v1283.0,
-                                                                    );
-                                                                    let v1289 = C::u8_pair_split(
-                                                                        ctx, v1286.0,
-                                                                    );
-                                                                    if v1289.0 == 0x14 {
-                                                                        if v1289.1 == 0x14 {
-                                                                            let v1292 =
-                                                                                C::u8_pair_split(
-                                                                                    ctx, v1286.1,
-                                                                                );
-                                                                            if v1292.0 == 0x15 {
-                                                                                if v1292.1 == 0x15 {
-                                                                                    let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                                                    let v1298 = C::u8_pair_split(ctx, v1295.0);
-                                                                                    if v1298.0
-                                                                                        == 0x16
-                                                                                    {
-                                                                                        if v1298.1
-                                                                                            == 0x16
-                                                                                        {
-                                                                                            let v1301 = C::u8_pair_split(ctx, v1295.1);
-                                                                                            if v1301.0 == 0x17 {
-                                                                                                if v1301.1 == 0x17 {
-                                                                                                    let v1239 = C::unpack_value_array_2(ctx, v1237);
-                                                                                                    let v1312 = C::put_in_reg(ctx, v1239.1);
-                                                                                                    let v1255 = C::put_in_reg(ctx, v1239.1);
-                                                                                                    let v1335 = constructor_vec_merge_high(ctx, I8X16, v1312, v1255);
-                                                                                                    let v1336 = constructor_output_reg(ctx, v1335);
-                                                                                                    // Rule at src/isa/s390x/lower.isle line 2090.
-                                                                                                    return Some(v1336);
-                                                                                                }
-                                                                                            }
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                        0x11 => {
-                                            let v1271 = C::u8_pair_split(ctx, v1265.1);
-                                            match v1271.0 {
-                                                0x0 => {
-                                                    if v1271.1 == 0x1 {
-                                                        let v1274 = C::u16_pair_split(ctx, v1262.1);
-                                                        let v1277 = C::u8_pair_split(ctx, v1274.0);
-                                                        if v1277.0 == 0x12 {
-                                                            if v1277.1 == 0x13 {
-                                                                let v1280 =
-                                                                    C::u8_pair_split(ctx, v1274.1);
-                                                                if v1280.0 == 0x2 {
-                                                                    if v1280.1 == 0x3 {
-                                                                        let v1283 =
-                                                                            C::u32_pair_split(
-                                                                                ctx, v1259.1,
-                                                                            );
-                                                                        let v1286 =
-                                                                            C::u16_pair_split(
-                                                                                ctx, v1283.0,
-                                                                            );
-                                                                        let v1289 =
-                                                                            C::u8_pair_split(
-                                                                                ctx, v1286.0,
-                                                                            );
-                                                                        if v1289.0 == 0x14 {
-                                                                            if v1289.1 == 0x15 {
-                                                                                let v1292 = C::u8_pair_split(ctx, v1286.1);
-                                                                                if v1292.0 == 0x4 {
-                                                                                    if v1292.1
-                                                                                        == 0x5
-                                                                                    {
-                                                                                        let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                                                        let v1298 = C::u8_pair_split(ctx, v1295.0);
-                                                                                        if v1298.0
-                                                                                            == 0x16
-                                                                                        {
-                                                                                            if v1298.1 == 0x17 {
-                                                                                                let v1301 = C::u8_pair_split(ctx, v1295.1);
-                                                                                                if v1301.0 == 0x6 {
-                                                                                                    if v1301.1 == 0x7 {
-                                                                                                        let v1239 = C::unpack_value_array_2(ctx, v1237);
-                                                                                                        let v1312 = C::put_in_reg(ctx, v1239.1);
-                                                                                                        let v1248 = C::put_in_reg(ctx, v1239.0);
-                                                                                                        let v1317 = constructor_vec_merge_high(ctx, I16X8, v1312, v1248);
-                                                                                                        let v1318 = constructor_output_reg(ctx, v1317);
-                                                                                                        // Rule at src/isa/s390x/lower.isle line 2072.
-                                                                                                        return Some(v1318);
-                                                                                                    }
-                                                                                                }
-                                                                                            }
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                                0x10 => {
-                                                    if v1271.1 == 0x11 {
-                                                        let v1274 = C::u16_pair_split(ctx, v1262.1);
-                                                        let v1277 = C::u8_pair_split(ctx, v1274.0);
-                                                        if v1277.0 == 0x12 {
-                                                            if v1277.1 == 0x13 {
-                                                                let v1280 =
-                                                                    C::u8_pair_split(ctx, v1274.1);
-                                                                if v1280.0 == 0x12 {
-                                                                    if v1280.1 == 0x13 {
-                                                                        let v1283 =
-                                                                            C::u32_pair_split(
-                                                                                ctx, v1259.1,
-                                                                            );
-                                                                        let v1286 =
-                                                                            C::u16_pair_split(
-                                                                                ctx, v1283.0,
-                                                                            );
-                                                                        let v1289 =
-                                                                            C::u8_pair_split(
-                                                                                ctx, v1286.0,
-                                                                            );
-                                                                        if v1289.0 == 0x14 {
-                                                                            if v1289.1 == 0x15 {
-                                                                                let v1292 = C::u8_pair_split(ctx, v1286.1);
-                                                                                if v1292.0 == 0x14 {
-                                                                                    if v1292.1
-                                                                                        == 0x15
-                                                                                    {
-                                                                                        let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                                                        let v1298 = C::u8_pair_split(ctx, v1295.0);
-                                                                                        if v1298.0
-                                                                                            == 0x16
-                                                                                        {
-                                                                                            if v1298.1 == 0x17 {
-                                                                                                let v1301 = C::u8_pair_split(ctx, v1295.1);
-                                                                                                if v1301.0 == 0x16 {
-                                                                                                    if v1301.1 == 0x17 {
-                                                                                                        let v1239 = C::unpack_value_array_2(ctx, v1237);
-                                                                                                        let v1312 = C::put_in_reg(ctx, v1239.1);
-                                                                                                        let v1255 = C::put_in_reg(ctx, v1239.1);
-                                                                                                        let v1333 = constructor_vec_merge_high(ctx, I16X8, v1312, v1255);
-                                                                                                        let v1334 = constructor_output_reg(ctx, v1333);
-                                                                                                        // Rule at src/isa/s390x/lower.isle line 2088.
-                                                                                                        return Some(v1334);
-                                                                                                    }
-                                                                                                }
-                                                                                            }
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                                0x12 => {
-                                                    if v1271.1 == 0x13 {
-                                                        let v1274 = C::u16_pair_split(ctx, v1262.1);
-                                                        let v1277 = C::u8_pair_split(ctx, v1274.0);
-                                                        match v1277.0 {
-                                                            0x0 => {
-                                                                if v1277.1 == 0x1 {
-                                                                    let v1280 = C::u8_pair_split(
-                                                                        ctx, v1274.1,
-                                                                    );
-                                                                    if v1280.0 == 0x2 {
-                                                                        if v1280.1 == 0x3 {
-                                                                            let v1283 =
-                                                                                C::u32_pair_split(
-                                                                                    ctx, v1259.1,
-                                                                                );
-                                                                            let v1286 =
-                                                                                C::u16_pair_split(
-                                                                                    ctx, v1283.0,
-                                                                                );
-                                                                            let v1289 =
-                                                                                C::u8_pair_split(
-                                                                                    ctx, v1286.0,
-                                                                                );
-                                                                            if v1289.0 == 0x14 {
-                                                                                if v1289.1 == 0x15 {
-                                                                                    let v1292 = C::u8_pair_split(ctx, v1286.1);
-                                                                                    if v1292.0
-                                                                                        == 0x16
-                                                                                    {
-                                                                                        if v1292.1
-                                                                                            == 0x17
-                                                                                        {
-                                                                                            let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                                                            let v1298 = C::u8_pair_split(ctx, v1295.0);
-                                                                                            if v1298.0 == 0x4 {
-                                                                                                if v1298.1 == 0x5 {
-                                                                                                    let v1301 = C::u8_pair_split(ctx, v1295.1);
-                                                                                                    if v1301.0 == 0x6 {
-                                                                                                        if v1301.1 == 0x7 {
-                                                                                                            let v1239 = C::unpack_value_array_2(ctx, v1237);
-                                                                                                            let v1312 = C::put_in_reg(ctx, v1239.1);
-                                                                                                            let v1248 = C::put_in_reg(ctx, v1239.0);
-                                                                                                            let v1315 = constructor_vec_merge_high(ctx, I32X4, v1312, v1248);
-                                                                                                            let v1316 = constructor_output_reg(ctx, v1315);
-                                                                                                            // Rule at src/isa/s390x/lower.isle line 2070.
-                                                                                                            return Some(v1316);
-                                                                                                        }
-                                                                                                    }
-                                                                                                }
-                                                                                            }
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                            0x10 => {
-                                                                if v1277.1 == 0x11 {
-                                                                    let v1280 = C::u8_pair_split(
-                                                                        ctx, v1274.1,
-                                                                    );
-                                                                    if v1280.0 == 0x12 {
-                                                                        if v1280.1 == 0x13 {
-                                                                            let v1283 =
-                                                                                C::u32_pair_split(
-                                                                                    ctx, v1259.1,
-                                                                                );
-                                                                            let v1286 =
-                                                                                C::u16_pair_split(
-                                                                                    ctx, v1283.0,
-                                                                                );
-                                                                            let v1289 =
-                                                                                C::u8_pair_split(
-                                                                                    ctx, v1286.0,
-                                                                                );
-                                                                            if v1289.0 == 0x14 {
-                                                                                if v1289.1 == 0x15 {
-                                                                                    let v1292 = C::u8_pair_split(ctx, v1286.1);
-                                                                                    if v1292.0
-                                                                                        == 0x16
-                                                                                    {
-                                                                                        if v1292.1
-                                                                                            == 0x17
-                                                                                        {
-                                                                                            let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                                                            let v1298 = C::u8_pair_split(ctx, v1295.0);
-                                                                                            if v1298.0 == 0x14 {
-                                                                                                if v1298.1 == 0x15 {
-                                                                                                    let v1301 = C::u8_pair_split(ctx, v1295.1);
-                                                                                                    if v1301.0 == 0x16 {
-                                                                                                        if v1301.1 == 0x17 {
-                                                                                                            let v1239 = C::unpack_value_array_2(ctx, v1237);
-                                                                                                            let v1312 = C::put_in_reg(ctx, v1239.1);
-                                                                                                            let v1255 = C::put_in_reg(ctx, v1239.1);
-                                                                                                            let v1331 = constructor_vec_merge_high(ctx, I32X4, v1312, v1255);
-                                                                                                            let v1332 = constructor_output_reg(ctx, v1331);
-                                                                                                            // Rule at src/isa/s390x/lower.isle line 2086.
-                                                                                                            return Some(v1332);
-                                                                                                        }
-                                                                                                    }
-                                                                                                }
-                                                                                            }
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                            0x14 => {
-                                                                if v1277.1 == 0x15 {
-                                                                    let v1280 = C::u8_pair_split(
-                                                                        ctx, v1274.1,
-                                                                    );
-                                                                    if v1280.0 == 0x16 {
-                                                                        if v1280.1 == 0x17 {
-                                                                            let v1283 =
-                                                                                C::u32_pair_split(
-                                                                                    ctx, v1259.1,
-                                                                                );
-                                                                            let v1286 =
-                                                                                C::u16_pair_split(
-                                                                                    ctx, v1283.0,
-                                                                                );
-                                                                            let v1289 =
-                                                                                C::u8_pair_split(
-                                                                                    ctx, v1286.0,
-                                                                                );
-                                                                            match v1289.0 {
-                                                                                0x0 => {
-                                                                                    if v1289.1
-                                                                                        == 0x1
-                                                                                    {
-                                                                                        let v1292 = C::u8_pair_split(ctx, v1286.1);
-                                                                                        if v1292.0
-                                                                                            == 0x2
-                                                                                        {
-                                                                                            if v1292.1 == 0x3 {
-                                                                                                let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                                                                let v1298 = C::u8_pair_split(ctx, v1295.0);
-                                                                                                if v1298.0 == 0x4 {
-                                                                                                    if v1298.1 == 0x5 {
-                                                                                                        let v1301 = C::u8_pair_split(ctx, v1295.1);
-                                                                                                        if v1301.0 == 0x6 {
-                                                                                                            if v1301.1 == 0x7 {
-                                                                                                                let v1239 = C::unpack_value_array_2(ctx, v1237);
-                                                                                                                let v1312 = C::put_in_reg(ctx, v1239.1);
-                                                                                                                let v1248 = C::put_in_reg(ctx, v1239.0);
-                                                                                                                let v1313 = constructor_vec_merge_high(ctx, I64X2, v1312, v1248);
-                                                                                                                let v1314 = constructor_output_reg(ctx, v1313);
-                                                                                                                // Rule at src/isa/s390x/lower.isle line 2068.
-                                                                                                                return Some(v1314);
-                                                                                                            }
-                                                                                                        }
-                                                                                                    }
-                                                                                                }
-                                                                                            }
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                                0x8 => {
-                                                                                    if v1289.1
-                                                                                        == 0x9
-                                                                                    {
-                                                                                        let v1292 = C::u8_pair_split(ctx, v1286.1);
-                                                                                        if v1292.0
-                                                                                            == 0xA
-                                                                                        {
-                                                                                            if v1292.1 == 0xB {
-                                                                                                let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                                                                let v1298 = C::u8_pair_split(ctx, v1295.0);
-                                                                                                if v1298.0 == 0xC {
-                                                                                                    if v1298.1 == 0xD {
-                                                                                                        let v1301 = C::u8_pair_split(ctx, v1295.1);
-                                                                                                        if v1301.0 == 0xE {
-                                                                                                            if v1301.1 == 0xF {
-                                                                                                                let v1239 = C::unpack_value_array_2(ctx, v1237);
-                                                                                                                let v1312 = C::put_in_reg(ctx, v1239.1);
-                                                                                                                let v1248 = C::put_in_reg(ctx, v1239.0);
-                                                                                                                let v1421 = constructor_vec_permute_dw_imm(ctx, I8X16, v1312, 0x0, v1248, 0x1);
-                                                                                                                let v1422 = constructor_output_reg(ctx, v1421);
-                                                                                                                // Rule at src/isa/s390x/lower.isle line 2186.
-                                                                                                                return Some(v1422);
-                                                                                                            }
-                                                                                                        }
-                                                                                                    }
-                                                                                                }
-                                                                                            }
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                                0x10 => {
-                                                                                    if v1289.1
-                                                                                        == 0x11
-                                                                                    {
-                                                                                        let v1292 = C::u8_pair_split(ctx, v1286.1);
-                                                                                        if v1292.0
-                                                                                            == 0x12
-                                                                                        {
-                                                                                            if v1292.1 == 0x13 {
-                                                                                                let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                                                                let v1298 = C::u8_pair_split(ctx, v1295.0);
-                                                                                                if v1298.0 == 0x14 {
-                                                                                                    if v1298.1 == 0x15 {
-                                                                                                        let v1301 = C::u8_pair_split(ctx, v1295.1);
-                                                                                                        if v1301.0 == 0x16 {
-                                                                                                            if v1301.1 == 0x17 {
-                                                                                                                let v1239 = C::unpack_value_array_2(ctx, v1237);
-                                                                                                                let v1312 = C::put_in_reg(ctx, v1239.1);
-                                                                                                                let v1255 = C::put_in_reg(ctx, v1239.1);
-                                                                                                                let v1329 = constructor_vec_merge_high(ctx, I64X2, v1312, v1255);
-                                                                                                                let v1330 = constructor_output_reg(ctx, v1329);
-                                                                                                                // Rule at src/isa/s390x/lower.isle line 2084.
-                                                                                                                return Some(v1330);
-                                                                                                            }
-                                                                                                        }
-                                                                                                    }
-                                                                                                }
-                                                                                            }
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                                0x18 => {
-                                                                                    if v1289.1
-                                                                                        == 0x19
-                                                                                    {
-                                                                                        let v1292 = C::u8_pair_split(ctx, v1286.1);
-                                                                                        if v1292.0
-                                                                                            == 0x1A
-                                                                                        {
-                                                                                            if v1292.1 == 0x1B {
-                                                                                                let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                                                                let v1298 = C::u8_pair_split(ctx, v1295.0);
-                                                                                                if v1298.0 == 0x1C {
-                                                                                                    if v1298.1 == 0x1D {
-                                                                                                        let v1301 = C::u8_pair_split(ctx, v1295.1);
-                                                                                                        if v1301.0 == 0x1E {
-                                                                                                            if v1301.1 == 0x1F {
-                                                                                                                let v1239 = C::unpack_value_array_2(ctx, v1237);
-                                                                                                                let v1312 = C::put_in_reg(ctx, v1239.1);
-                                                                                                                let v1255 = C::put_in_reg(ctx, v1239.1);
-                                                                                                                let v1429 = constructor_vec_permute_dw_imm(ctx, I8X16, v1312, 0x0, v1255, 0x1);
-                                                                                                                let v1430 = constructor_output_reg(ctx, v1429);
-                                                                                                                // Rule at src/isa/s390x/lower.isle line 2194.
-                                                                                                                return Some(v1430);
-                                                                                                            }
-                                                                                                        }
-                                                                                                    }
-                                                                                                }
-                                                                                            }
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                                _ => {}
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                            _ => {}
-                                                        }
-                                                    }
-                                                }
-                                                _ => {}
-                                            }
-                                        }
-                                        _ => {}
-                                    }
-                                }
-                                0x11 => {
-                                    if v1268.1 == 0x13 {
-                                        let v1271 = C::u8_pair_split(ctx, v1265.1);
-                                        if v1271.0 == 0x15 {
-                                            if v1271.1 == 0x17 {
-                                                let v1274 = C::u16_pair_split(ctx, v1262.1);
-                                                let v1277 = C::u8_pair_split(ctx, v1274.0);
-                                                if v1277.0 == 0x19 {
-                                                    if v1277.1 == 0x1B {
-                                                        let v1280 = C::u8_pair_split(ctx, v1274.1);
-                                                        if v1280.0 == 0x1D {
-                                                            if v1280.1 == 0x1F {
-                                                                let v1283 =
-                                                                    C::u32_pair_split(ctx, v1259.1);
-                                                                let v1286 =
-                                                                    C::u16_pair_split(ctx, v1283.0);
-                                                                let v1289 =
-                                                                    C::u8_pair_split(ctx, v1286.0);
-                                                                match v1289.0 {
-                                                                    0x1 => {
-                                                                        if v1289.1 == 0x3 {
-                                                                            let v1292 =
-                                                                                C::u8_pair_split(
-                                                                                    ctx, v1286.1,
-                                                                                );
-                                                                            if v1292.0 == 0x5 {
-                                                                                if v1292.1 == 0x7 {
-                                                                                    let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                                                    let v1298 = C::u8_pair_split(ctx, v1295.0);
-                                                                                    if v1298.0
-                                                                                        == 0x9
-                                                                                    {
-                                                                                        if v1298.1
-                                                                                            == 0xB
-                                                                                        {
-                                                                                            let v1301 = C::u8_pair_split(ctx, v1295.1);
-                                                                                            if v1301.0 == 0xD {
-                                                                                                if v1301.1 == 0xF {
-                                                                                                    let v1239 = C::unpack_value_array_2(ctx, v1237);
-                                                                                                    let v1312 = C::put_in_reg(ctx, v1239.1);
-                                                                                                    let v1248 = C::put_in_reg(ctx, v1239.0);
-                                                                                                    let v1379 = constructor_vec_pack(ctx, I16X8, v1312, v1248);
-                                                                                                    let v1380 = constructor_output_reg(ctx, v1379);
-                                                                                                    // Rule at src/isa/s390x/lower.isle line 2138.
-                                                                                                    return Some(v1380);
-                                                                                                }
-                                                                                            }
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                    0x11 => {
-                                                                        if v1289.1 == 0x13 {
-                                                                            let v1292 =
-                                                                                C::u8_pair_split(
-                                                                                    ctx, v1286.1,
-                                                                                );
-                                                                            if v1292.0 == 0x15 {
-                                                                                if v1292.1 == 0x17 {
-                                                                                    let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                                                    let v1298 = C::u8_pair_split(ctx, v1295.0);
-                                                                                    if v1298.0
-                                                                                        == 0x19
-                                                                                    {
-                                                                                        if v1298.1
-                                                                                            == 0x1B
-                                                                                        {
-                                                                                            let v1301 = C::u8_pair_split(ctx, v1295.1);
-                                                                                            if v1301.0 == 0x1D {
-                                                                                                if v1301.1 == 0x1F {
-                                                                                                    let v1239 = C::unpack_value_array_2(ctx, v1237);
-                                                                                                    let v1312 = C::put_in_reg(ctx, v1239.1);
-                                                                                                    let v1255 = C::put_in_reg(ctx, v1239.1);
-                                                                                                    let v1391 = constructor_vec_pack(ctx, I16X8, v1312, v1255);
-                                                                                                    let v1392 = constructor_output_reg(ctx, v1391);
-                                                                                                    // Rule at src/isa/s390x/lower.isle line 2150.
-                                                                                                    return Some(v1392);
-                                                                                                }
-                                                                                            }
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                    _ => {}
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                                0x12 => {
-                                    if v1268.1 == 0x13 {
-                                        let v1271 = C::u8_pair_split(ctx, v1265.1);
-                                        if v1271.0 == 0x16 {
-                                            if v1271.1 == 0x17 {
-                                                let v1274 = C::u16_pair_split(ctx, v1262.1);
-                                                let v1277 = C::u8_pair_split(ctx, v1274.0);
-                                                if v1277.0 == 0x1A {
-                                                    if v1277.1 == 0x1B {
-                                                        let v1280 = C::u8_pair_split(ctx, v1274.1);
-                                                        if v1280.0 == 0x1E {
-                                                            if v1280.1 == 0x1F {
-                                                                let v1283 =
-                                                                    C::u32_pair_split(ctx, v1259.1);
-                                                                let v1286 =
-                                                                    C::u16_pair_split(ctx, v1283.0);
-                                                                let v1289 =
-                                                                    C::u8_pair_split(ctx, v1286.0);
-                                                                match v1289.0 {
-                                                                    0x2 => {
-                                                                        if v1289.1 == 0x3 {
-                                                                            let v1292 =
-                                                                                C::u8_pair_split(
-                                                                                    ctx, v1286.1,
-                                                                                );
-                                                                            if v1292.0 == 0x6 {
-                                                                                if v1292.1 == 0x7 {
-                                                                                    let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                                                    let v1298 = C::u8_pair_split(ctx, v1295.0);
-                                                                                    if v1298.0
-                                                                                        == 0xA
-                                                                                    {
-                                                                                        if v1298.1
-                                                                                            == 0xB
-                                                                                        {
-                                                                                            let v1301 = C::u8_pair_split(ctx, v1295.1);
-                                                                                            if v1301.0 == 0xE {
-                                                                                                if v1301.1 == 0xF {
-                                                                                                    let v1239 = C::unpack_value_array_2(ctx, v1237);
-                                                                                                    let v1312 = C::put_in_reg(ctx, v1239.1);
-                                                                                                    let v1248 = C::put_in_reg(ctx, v1239.0);
-                                                                                                    let v1377 = constructor_vec_pack(ctx, I32X4, v1312, v1248);
-                                                                                                    let v1378 = constructor_output_reg(ctx, v1377);
-                                                                                                    // Rule at src/isa/s390x/lower.isle line 2136.
-                                                                                                    return Some(v1378);
-                                                                                                }
-                                                                                            }
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                    0x12 => {
-                                                                        if v1289.1 == 0x13 {
-                                                                            let v1292 =
-                                                                                C::u8_pair_split(
-                                                                                    ctx, v1286.1,
-                                                                                );
-                                                                            if v1292.0 == 0x16 {
-                                                                                if v1292.1 == 0x17 {
-                                                                                    let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                                                    let v1298 = C::u8_pair_split(ctx, v1295.0);
-                                                                                    if v1298.0
-                                                                                        == 0x1A
-                                                                                    {
-                                                                                        if v1298.1
-                                                                                            == 0x1B
-                                                                                        {
-                                                                                            let v1301 = C::u8_pair_split(ctx, v1295.1);
-                                                                                            if v1301.0 == 0x1E {
-                                                                                                if v1301.1 == 0x1F {
-                                                                                                    let v1239 = C::unpack_value_array_2(ctx, v1237);
-                                                                                                    let v1312 = C::put_in_reg(ctx, v1239.1);
-                                                                                                    let v1255 = C::put_in_reg(ctx, v1239.1);
-                                                                                                    let v1389 = constructor_vec_pack(ctx, I32X4, v1312, v1255);
-                                                                                                    let v1390 = constructor_output_reg(ctx, v1389);
-                                                                                                    // Rule at src/isa/s390x/lower.isle line 2148.
-                                                                                                    return Some(v1390);
-                                                                                                }
-                                                                                            }
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                    _ => {}
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                                0x14 => {
-                                    if v1268.1 == 0x15 {
-                                        let v1271 = C::u8_pair_split(ctx, v1265.1);
-                                        if v1271.0 == 0x16 {
-                                            if v1271.1 == 0x17 {
-                                                let v1274 = C::u16_pair_split(ctx, v1262.1);
-                                                let v1277 = C::u8_pair_split(ctx, v1274.0);
-                                                if v1277.0 == 0x1C {
-                                                    if v1277.1 == 0x1D {
-                                                        let v1280 = C::u8_pair_split(ctx, v1274.1);
-                                                        if v1280.0 == 0x1E {
-                                                            if v1280.1 == 0x1F {
-                                                                let v1283 =
-                                                                    C::u32_pair_split(ctx, v1259.1);
-                                                                let v1286 =
-                                                                    C::u16_pair_split(ctx, v1283.0);
-                                                                let v1289 =
-                                                                    C::u8_pair_split(ctx, v1286.0);
-                                                                match v1289.0 {
-                                                                    0x4 => {
-                                                                        if v1289.1 == 0x5 {
-                                                                            let v1292 =
-                                                                                C::u8_pair_split(
-                                                                                    ctx, v1286.1,
-                                                                                );
-                                                                            if v1292.0 == 0x6 {
-                                                                                if v1292.1 == 0x7 {
-                                                                                    let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                                                    let v1298 = C::u8_pair_split(ctx, v1295.0);
-                                                                                    if v1298.0
-                                                                                        == 0xC
-                                                                                    {
-                                                                                        if v1298.1
-                                                                                            == 0xD
-                                                                                        {
-                                                                                            let v1301 = C::u8_pair_split(ctx, v1295.1);
-                                                                                            if v1301.0 == 0xE {
-                                                                                                if v1301.1 == 0xF {
-                                                                                                    let v1239 = C::unpack_value_array_2(ctx, v1237);
-                                                                                                    let v1312 = C::put_in_reg(ctx, v1239.1);
-                                                                                                    let v1248 = C::put_in_reg(ctx, v1239.0);
-                                                                                                    let v1375 = constructor_vec_pack(ctx, I64X2, v1312, v1248);
-                                                                                                    let v1376 = constructor_output_reg(ctx, v1375);
-                                                                                                    // Rule at src/isa/s390x/lower.isle line 2134.
-                                                                                                    return Some(v1376);
-                                                                                                }
-                                                                                            }
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                    0x14 => {
-                                                                        if v1289.1 == 0x15 {
-                                                                            let v1292 =
-                                                                                C::u8_pair_split(
-                                                                                    ctx, v1286.1,
-                                                                                );
-                                                                            if v1292.0 == 0x16 {
-                                                                                if v1292.1 == 0x17 {
-                                                                                    let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                                                    let v1298 = C::u8_pair_split(ctx, v1295.0);
-                                                                                    if v1298.0
-                                                                                        == 0x1C
-                                                                                    {
-                                                                                        if v1298.1
-                                                                                            == 0x1D
-                                                                                        {
-                                                                                            let v1301 = C::u8_pair_split(ctx, v1295.1);
-                                                                                            if v1301.0 == 0x1E {
-                                                                                                if v1301.1 == 0x1F {
-                                                                                                    let v1239 = C::unpack_value_array_2(ctx, v1237);
-                                                                                                    let v1312 = C::put_in_reg(ctx, v1239.1);
-                                                                                                    let v1255 = C::put_in_reg(ctx, v1239.1);
-                                                                                                    let v1387 = constructor_vec_pack(ctx, I64X2, v1312, v1255);
-                                                                                                    let v1388 = constructor_output_reg(ctx, v1387);
-                                                                                                    // Rule at src/isa/s390x/lower.isle line 2146.
-                                                                                                    return Some(v1388);
-                                                                                                }
-                                                                                            }
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                    _ => {}
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                                0x18 => {
-                                    match v1268.1 {
-                                        0x8 => {
-                                            let v1271 = C::u8_pair_split(ctx, v1265.1);
-                                            if v1271.0 == 0x19 {
-                                                if v1271.1 == 0x9 {
-                                                    let v1274 = C::u16_pair_split(ctx, v1262.1);
-                                                    let v1277 = C::u8_pair_split(ctx, v1274.0);
-                                                    if v1277.0 == 0x1A {
-                                                        if v1277.1 == 0xA {
-                                                            let v1280 =
-                                                                C::u8_pair_split(ctx, v1274.1);
-                                                            if v1280.0 == 0x1B {
-                                                                if v1280.1 == 0xB {
-                                                                    let v1283 = C::u32_pair_split(
-                                                                        ctx, v1259.1,
-                                                                    );
-                                                                    let v1286 = C::u16_pair_split(
-                                                                        ctx, v1283.0,
-                                                                    );
-                                                                    let v1289 = C::u8_pair_split(
-                                                                        ctx, v1286.0,
-                                                                    );
-                                                                    if v1289.0 == 0x1C {
-                                                                        if v1289.1 == 0xC {
-                                                                            let v1292 =
-                                                                                C::u8_pair_split(
-                                                                                    ctx, v1286.1,
-                                                                                );
-                                                                            if v1292.0 == 0x1D {
-                                                                                if v1292.1 == 0xD {
-                                                                                    let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                                                    let v1298 = C::u8_pair_split(ctx, v1295.0);
-                                                                                    if v1298.0
-                                                                                        == 0x1E
-                                                                                    {
-                                                                                        if v1298.1
-                                                                                            == 0xE
-                                                                                        {
-                                                                                            let v1301 = C::u8_pair_split(ctx, v1295.1);
-                                                                                            if v1301.0 == 0x1F {
-                                                                                                if v1301.1 == 0xF {
-                                                                                                    let v1239 = C::unpack_value_array_2(ctx, v1237);
-                                                                                                    let v1312 = C::put_in_reg(ctx, v1239.1);
-                                                                                                    let v1248 = C::put_in_reg(ctx, v1239.0);
-                                                                                                    let v1351 = constructor_vec_merge_low(ctx, I8X16, v1312, v1248);
-                                                                                                    let v1352 = constructor_output_reg(ctx, v1351);
-                                                                                                    // Rule at src/isa/s390x/lower.isle line 2108.
-                                                                                                    return Some(v1352);
-                                                                                                }
-                                                                                            }
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                        0x18 => {
-                                            let v1271 = C::u8_pair_split(ctx, v1265.1);
-                                            if v1271.0 == 0x19 {
-                                                if v1271.1 == 0x19 {
-                                                    let v1274 = C::u16_pair_split(ctx, v1262.1);
-                                                    let v1277 = C::u8_pair_split(ctx, v1274.0);
-                                                    if v1277.0 == 0x1A {
-                                                        if v1277.1 == 0x1A {
-                                                            let v1280 =
-                                                                C::u8_pair_split(ctx, v1274.1);
-                                                            if v1280.0 == 0x1B {
-                                                                if v1280.1 == 0x1B {
-                                                                    let v1283 = C::u32_pair_split(
-                                                                        ctx, v1259.1,
-                                                                    );
-                                                                    let v1286 = C::u16_pair_split(
-                                                                        ctx, v1283.0,
-                                                                    );
-                                                                    let v1289 = C::u8_pair_split(
-                                                                        ctx, v1286.0,
-                                                                    );
-                                                                    if v1289.0 == 0x1C {
-                                                                        if v1289.1 == 0x1C {
-                                                                            let v1292 =
-                                                                                C::u8_pair_split(
-                                                                                    ctx, v1286.1,
-                                                                                );
-                                                                            if v1292.0 == 0x1D {
-                                                                                if v1292.1 == 0x1D {
-                                                                                    let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                                                    let v1298 = C::u8_pair_split(ctx, v1295.0);
-                                                                                    if v1298.0
-                                                                                        == 0x1E
-                                                                                    {
-                                                                                        if v1298.1
-                                                                                            == 0x1E
-                                                                                        {
-                                                                                            let v1301 = C::u8_pair_split(ctx, v1295.1);
-                                                                                            if v1301.0 == 0x1F {
-                                                                                                if v1301.1 == 0x1F {
-                                                                                                    let v1239 = C::unpack_value_array_2(ctx, v1237);
-                                                                                                    let v1312 = C::put_in_reg(ctx, v1239.1);
-                                                                                                    let v1255 = C::put_in_reg(ctx, v1239.1);
-                                                                                                    let v1367 = constructor_vec_merge_low(ctx, I8X16, v1312, v1255);
-                                                                                                    let v1368 = constructor_output_reg(ctx, v1367);
-                                                                                                    // Rule at src/isa/s390x/lower.isle line 2124.
-                                                                                                    return Some(v1368);
-                                                                                                }
-                                                                                            }
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                        0x19 => {
-                                            let v1271 = C::u8_pair_split(ctx, v1265.1);
-                                            match v1271.0 {
-                                                0x8 => {
-                                                    if v1271.1 == 0x9 {
-                                                        let v1274 = C::u16_pair_split(ctx, v1262.1);
-                                                        let v1277 = C::u8_pair_split(ctx, v1274.0);
-                                                        if v1277.0 == 0x1A {
-                                                            if v1277.1 == 0x1B {
-                                                                let v1280 =
-                                                                    C::u8_pair_split(ctx, v1274.1);
-                                                                if v1280.0 == 0xA {
-                                                                    if v1280.1 == 0xB {
-                                                                        let v1283 =
-                                                                            C::u32_pair_split(
-                                                                                ctx, v1259.1,
-                                                                            );
-                                                                        let v1286 =
-                                                                            C::u16_pair_split(
-                                                                                ctx, v1283.0,
-                                                                            );
-                                                                        let v1289 =
-                                                                            C::u8_pair_split(
-                                                                                ctx, v1286.0,
-                                                                            );
-                                                                        if v1289.0 == 0x1C {
-                                                                            if v1289.1 == 0x1D {
-                                                                                let v1292 = C::u8_pair_split(ctx, v1286.1);
-                                                                                if v1292.0 == 0xC {
-                                                                                    if v1292.1
-                                                                                        == 0xD
-                                                                                    {
-                                                                                        let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                                                        let v1298 = C::u8_pair_split(ctx, v1295.0);
-                                                                                        if v1298.0
-                                                                                            == 0x1E
-                                                                                        {
-                                                                                            if v1298.1 == 0x1F {
-                                                                                                let v1301 = C::u8_pair_split(ctx, v1295.1);
-                                                                                                if v1301.0 == 0xE {
-                                                                                                    if v1301.1 == 0xF {
-                                                                                                        let v1239 = C::unpack_value_array_2(ctx, v1237);
-                                                                                                        let v1312 = C::put_in_reg(ctx, v1239.1);
-                                                                                                        let v1248 = C::put_in_reg(ctx, v1239.0);
-                                                                                                        let v1349 = constructor_vec_merge_low(ctx, I16X8, v1312, v1248);
-                                                                                                        let v1350 = constructor_output_reg(ctx, v1349);
-                                                                                                        // Rule at src/isa/s390x/lower.isle line 2106.
-                                                                                                        return Some(v1350);
-                                                                                                    }
-                                                                                                }
-                                                                                            }
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                                0x18 => {
-                                                    if v1271.1 == 0x19 {
-                                                        let v1274 = C::u16_pair_split(ctx, v1262.1);
-                                                        let v1277 = C::u8_pair_split(ctx, v1274.0);
-                                                        if v1277.0 == 0x1A {
-                                                            if v1277.1 == 0x1B {
-                                                                let v1280 =
-                                                                    C::u8_pair_split(ctx, v1274.1);
-                                                                if v1280.0 == 0x1A {
-                                                                    if v1280.1 == 0x1B {
-                                                                        let v1283 =
-                                                                            C::u32_pair_split(
-                                                                                ctx, v1259.1,
-                                                                            );
-                                                                        let v1286 =
-                                                                            C::u16_pair_split(
-                                                                                ctx, v1283.0,
-                                                                            );
-                                                                        let v1289 =
-                                                                            C::u8_pair_split(
-                                                                                ctx, v1286.0,
-                                                                            );
-                                                                        if v1289.0 == 0x1C {
-                                                                            if v1289.1 == 0x1D {
-                                                                                let v1292 = C::u8_pair_split(ctx, v1286.1);
-                                                                                if v1292.0 == 0x1C {
-                                                                                    if v1292.1
-                                                                                        == 0x1D
-                                                                                    {
-                                                                                        let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                                                        let v1298 = C::u8_pair_split(ctx, v1295.0);
-                                                                                        if v1298.0
-                                                                                            == 0x1E
-                                                                                        {
-                                                                                            if v1298.1 == 0x1F {
-                                                                                                let v1301 = C::u8_pair_split(ctx, v1295.1);
-                                                                                                if v1301.0 == 0x1E {
-                                                                                                    if v1301.1 == 0x1F {
-                                                                                                        let v1239 = C::unpack_value_array_2(ctx, v1237);
-                                                                                                        let v1312 = C::put_in_reg(ctx, v1239.1);
-                                                                                                        let v1255 = C::put_in_reg(ctx, v1239.1);
-                                                                                                        let v1365 = constructor_vec_merge_low(ctx, I16X8, v1312, v1255);
-                                                                                                        let v1366 = constructor_output_reg(ctx, v1365);
-                                                                                                        // Rule at src/isa/s390x/lower.isle line 2122.
-                                                                                                        return Some(v1366);
-                                                                                                    }
-                                                                                                }
-                                                                                            }
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                                0x1A => {
-                                                    if v1271.1 == 0x1B {
-                                                        let v1274 = C::u16_pair_split(ctx, v1262.1);
-                                                        let v1277 = C::u8_pair_split(ctx, v1274.0);
-                                                        match v1277.0 {
-                                                            0x8 => {
-                                                                if v1277.1 == 0x9 {
-                                                                    let v1280 = C::u8_pair_split(
-                                                                        ctx, v1274.1,
-                                                                    );
-                                                                    if v1280.0 == 0xA {
-                                                                        if v1280.1 == 0xB {
-                                                                            let v1283 =
-                                                                                C::u32_pair_split(
-                                                                                    ctx, v1259.1,
-                                                                                );
-                                                                            let v1286 =
-                                                                                C::u16_pair_split(
-                                                                                    ctx, v1283.0,
-                                                                                );
-                                                                            let v1289 =
-                                                                                C::u8_pair_split(
-                                                                                    ctx, v1286.0,
-                                                                                );
-                                                                            if v1289.0 == 0x1C {
-                                                                                if v1289.1 == 0x1D {
-                                                                                    let v1292 = C::u8_pair_split(ctx, v1286.1);
-                                                                                    if v1292.0
-                                                                                        == 0x1E
-                                                                                    {
-                                                                                        if v1292.1
-                                                                                            == 0x1F
-                                                                                        {
-                                                                                            let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                                                            let v1298 = C::u8_pair_split(ctx, v1295.0);
-                                                                                            if v1298.0 == 0xC {
-                                                                                                if v1298.1 == 0xD {
-                                                                                                    let v1301 = C::u8_pair_split(ctx, v1295.1);
-                                                                                                    if v1301.0 == 0xE {
-                                                                                                        if v1301.1 == 0xF {
-                                                                                                            let v1239 = C::unpack_value_array_2(ctx, v1237);
-                                                                                                            let v1312 = C::put_in_reg(ctx, v1239.1);
-                                                                                                            let v1248 = C::put_in_reg(ctx, v1239.0);
-                                                                                                            let v1347 = constructor_vec_merge_low(ctx, I32X4, v1312, v1248);
-                                                                                                            let v1348 = constructor_output_reg(ctx, v1347);
-                                                                                                            // Rule at src/isa/s390x/lower.isle line 2104.
-                                                                                                            return Some(v1348);
-                                                                                                        }
-                                                                                                    }
-                                                                                                }
-                                                                                            }
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                            0x18 => {
-                                                                if v1277.1 == 0x19 {
-                                                                    let v1280 = C::u8_pair_split(
-                                                                        ctx, v1274.1,
-                                                                    );
-                                                                    if v1280.0 == 0x1A {
-                                                                        if v1280.1 == 0x1B {
-                                                                            let v1283 =
-                                                                                C::u32_pair_split(
-                                                                                    ctx, v1259.1,
-                                                                                );
-                                                                            let v1286 =
-                                                                                C::u16_pair_split(
-                                                                                    ctx, v1283.0,
-                                                                                );
-                                                                            let v1289 =
-                                                                                C::u8_pair_split(
-                                                                                    ctx, v1286.0,
-                                                                                );
-                                                                            if v1289.0 == 0x1C {
-                                                                                if v1289.1 == 0x1D {
-                                                                                    let v1292 = C::u8_pair_split(ctx, v1286.1);
-                                                                                    if v1292.0
-                                                                                        == 0x1E
-                                                                                    {
-                                                                                        if v1292.1
-                                                                                            == 0x1F
-                                                                                        {
-                                                                                            let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                                                            let v1298 = C::u8_pair_split(ctx, v1295.0);
-                                                                                            if v1298.0 == 0x1C {
-                                                                                                if v1298.1 == 0x1D {
-                                                                                                    let v1301 = C::u8_pair_split(ctx, v1295.1);
-                                                                                                    if v1301.0 == 0x1E {
-                                                                                                        if v1301.1 == 0x1F {
-                                                                                                            let v1239 = C::unpack_value_array_2(ctx, v1237);
-                                                                                                            let v1312 = C::put_in_reg(ctx, v1239.1);
-                                                                                                            let v1255 = C::put_in_reg(ctx, v1239.1);
-                                                                                                            let v1363 = constructor_vec_merge_low(ctx, I32X4, v1312, v1255);
-                                                                                                            let v1364 = constructor_output_reg(ctx, v1363);
-                                                                                                            // Rule at src/isa/s390x/lower.isle line 2120.
-                                                                                                            return Some(v1364);
-                                                                                                        }
-                                                                                                    }
-                                                                                                }
-                                                                                            }
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                            0x1C => {
-                                                                if v1277.1 == 0x1D {
-                                                                    let v1280 = C::u8_pair_split(
-                                                                        ctx, v1274.1,
-                                                                    );
-                                                                    if v1280.0 == 0x1E {
-                                                                        if v1280.1 == 0x1F {
-                                                                            let v1283 =
-                                                                                C::u32_pair_split(
-                                                                                    ctx, v1259.1,
-                                                                                );
-                                                                            let v1286 =
-                                                                                C::u16_pair_split(
-                                                                                    ctx, v1283.0,
-                                                                                );
-                                                                            let v1289 =
-                                                                                C::u8_pair_split(
-                                                                                    ctx, v1286.0,
-                                                                                );
-                                                                            match v1289.0 {
-                                                                                0x0 => {
-                                                                                    if v1289.1
-                                                                                        == 0x1
-                                                                                    {
-                                                                                        let v1292 = C::u8_pair_split(ctx, v1286.1);
-                                                                                        if v1292.0
-                                                                                            == 0x2
-                                                                                        {
-                                                                                            if v1292.1 == 0x3 {
-                                                                                                let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                                                                let v1298 = C::u8_pair_split(ctx, v1295.0);
-                                                                                                if v1298.0 == 0x4 {
-                                                                                                    if v1298.1 == 0x5 {
-                                                                                                        let v1301 = C::u8_pair_split(ctx, v1295.1);
-                                                                                                        if v1301.0 == 0x6 {
-                                                                                                            if v1301.1 == 0x7 {
-                                                                                                                let v1239 = C::unpack_value_array_2(ctx, v1237);
-                                                                                                                let v1312 = C::put_in_reg(ctx, v1239.1);
-                                                                                                                let v1248 = C::put_in_reg(ctx, v1239.0);
-                                                                                                                let v1423 = constructor_vec_permute_dw_imm(ctx, I8X16, v1312, 0x1, v1248, 0x0);
-                                                                                                                let v1424 = constructor_output_reg(ctx, v1423);
-                                                                                                                // Rule at src/isa/s390x/lower.isle line 2188.
-                                                                                                                return Some(v1424);
-                                                                                                            }
-                                                                                                        }
-                                                                                                    }
-                                                                                                }
-                                                                                            }
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                                0x8 => {
-                                                                                    if v1289.1
-                                                                                        == 0x9
-                                                                                    {
-                                                                                        let v1292 = C::u8_pair_split(ctx, v1286.1);
-                                                                                        if v1292.0
-                                                                                            == 0xA
-                                                                                        {
-                                                                                            if v1292.1 == 0xB {
-                                                                                                let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                                                                let v1298 = C::u8_pair_split(ctx, v1295.0);
-                                                                                                if v1298.0 == 0xC {
-                                                                                                    if v1298.1 == 0xD {
-                                                                                                        let v1301 = C::u8_pair_split(ctx, v1295.1);
-                                                                                                        if v1301.0 == 0xE {
-                                                                                                            if v1301.1 == 0xF {
-                                                                                                                let v1239 = C::unpack_value_array_2(ctx, v1237);
-                                                                                                                let v1312 = C::put_in_reg(ctx, v1239.1);
-                                                                                                                let v1248 = C::put_in_reg(ctx, v1239.0);
-                                                                                                                let v1345 = constructor_vec_merge_low(ctx, I64X2, v1312, v1248);
-                                                                                                                let v1346 = constructor_output_reg(ctx, v1345);
-                                                                                                                // Rule at src/isa/s390x/lower.isle line 2102.
-                                                                                                                return Some(v1346);
-                                                                                                            }
-                                                                                                        }
-                                                                                                    }
-                                                                                                }
-                                                                                            }
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                                0x10 => {
-                                                                                    if v1289.1
-                                                                                        == 0x11
-                                                                                    {
-                                                                                        let v1292 = C::u8_pair_split(ctx, v1286.1);
-                                                                                        if v1292.0
-                                                                                            == 0x12
-                                                                                        {
-                                                                                            if v1292.1 == 0x13 {
-                                                                                                let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                                                                let v1298 = C::u8_pair_split(ctx, v1295.0);
-                                                                                                if v1298.0 == 0x14 {
-                                                                                                    if v1298.1 == 0x15 {
-                                                                                                        let v1301 = C::u8_pair_split(ctx, v1295.1);
-                                                                                                        if v1301.0 == 0x16 {
-                                                                                                            if v1301.1 == 0x17 {
-                                                                                                                let v1239 = C::unpack_value_array_2(ctx, v1237);
-                                                                                                                let v1312 = C::put_in_reg(ctx, v1239.1);
-                                                                                                                let v1255 = C::put_in_reg(ctx, v1239.1);
-                                                                                                                let v1431 = constructor_vec_permute_dw_imm(ctx, I8X16, v1312, 0x1, v1255, 0x0);
-                                                                                                                let v1432 = constructor_output_reg(ctx, v1431);
-                                                                                                                // Rule at src/isa/s390x/lower.isle line 2196.
-                                                                                                                return Some(v1432);
-                                                                                                            }
-                                                                                                        }
-                                                                                                    }
-                                                                                                }
-                                                                                            }
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                                0x18 => {
-                                                                                    if v1289.1
-                                                                                        == 0x19
-                                                                                    {
-                                                                                        let v1292 = C::u8_pair_split(ctx, v1286.1);
-                                                                                        if v1292.0
-                                                                                            == 0x1A
-                                                                                        {
-                                                                                            if v1292.1 == 0x1B {
-                                                                                                let v1295 = C::u16_pair_split(ctx, v1283.1);
-                                                                                                let v1298 = C::u8_pair_split(ctx, v1295.0);
-                                                                                                if v1298.0 == 0x1C {
-                                                                                                    if v1298.1 == 0x1D {
-                                                                                                        let v1301 = C::u8_pair_split(ctx, v1295.1);
-                                                                                                        if v1301.0 == 0x1E {
-                                                                                                            if v1301.1 == 0x1F {
-                                                                                                                let v1239 = C::unpack_value_array_2(ctx, v1237);
-                                                                                                                let v1312 = C::put_in_reg(ctx, v1239.1);
-                                                                                                                let v1255 = C::put_in_reg(ctx, v1239.1);
-                                                                                                                let v1361 = constructor_vec_merge_low(ctx, I64X2, v1312, v1255);
-                                                                                                                let v1362 = constructor_output_reg(ctx, v1361);
-                                                                                                                // Rule at src/isa/s390x/lower.isle line 2118.
-                                                                                                                return Some(v1362);
-                                                                                                            }
-                                                                                                        }
-                                                                                                    }
-                                                                                                }
-                                                                                            }
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                                _ => {}
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                            _ => {}
-                                                        }
-                                                    }
-                                                }
-                                                _ => {}
-                                            }
-                                        }
-                                        _ => {}
-                                    }
-                                }
-                                _ => {}
-                            }
-                            let v1239 = C::unpack_value_array_2(ctx, v1237);
-                            let v1254 = C::put_in_reg(ctx, v1239.0);
-                            let v1255 = C::put_in_reg(ctx, v1239.1);
-                            let v1256 = constructor_vec_imm(ctx, I8X16, v1244.0);
-                            let v1257 = constructor_vec_permute(ctx, I8X16, v1254, v1255, v1256);
-                            let v1258 = constructor_output_reg(ctx, v1257);
-                            // Rule at src/isa/s390x/lower.isle line 2056.
-                            return Some(v1258);
-                        }
-                        _ => {}
-                    }
-                    let v1247 = constructor_vec_imm_byte_mask(ctx, I8X16, v1244.1);
-                    let v1239 = C::unpack_value_array_2(ctx, v1237);
-                    let v1248 = C::put_in_reg(ctx, v1239.0);
-                    let v1249 = C::put_in_reg(ctx, v1239.1);
-                    let v1250 = constructor_vec_imm(ctx, I8X16, v1244.0);
-                    let v1251 = constructor_vec_permute(ctx, I8X16, v1248, v1249, v1250);
-                    let v1252 = constructor_vec_and(ctx, I8X16, v1247, v1251);
-                    let v1253 = constructor_output_reg(ctx, v1252);
-                    // Rule at src/isa/s390x/lower.isle line 2051.
-                    return Some(v1253);
-                }
-            }
-        }
-        &InstructionData::StackLoad {
-            opcode: ref v1447,
-            stack_slot: v1448,
-            offset: v1449,
-        } => {
-            if let &Opcode::StackAddr = v1447 {
-                let v1 = C::first_result(ctx, arg0);
-                if let Some(v2) = v1 {
-                    let v3 = C::value_type(ctx, v2);
-                    let v1450 = constructor_stack_addr_impl(ctx, v3, v1448, v1449);
-                    let v1451 = constructor_output_reg(ctx, v1450);
-                    // Rule at src/isa/s390x/lower.isle line 2238.
-                    return Some(v1451);
-                }
-            }
-        }
-        &InstructionData::Store {
-            opcode: ref v1154,
-            args: ref v1155,
-            flags: v1156,
-            offset: v1157,
-        } => {
-            match v1154 {
-                &Opcode::Store => {
-                    let v1158 = C::unpack_value_array_2(ctx, v1155);
-                    let v1161 = C::def_inst(ctx, v1158.0);
-                    if let Some(v1162) = v1161 {
-                        let v1163 = &C::inst_data(ctx, v1162);
-                        if let &InstructionData::BinaryImm8 {
-                            opcode: ref v1164,
-                            arg: v1165,
-                            imm: v1166,
-                        } = v1163
-                        {
-                            if let &Opcode::Extractlane = v1164 {
-                                let v1169 = C::bigendian(ctx, v1156);
-                                if let Some(v1170) = v1169 {
-                                    let v1171 = C::put_in_reg(ctx, v1165);
-                                    let v1172 =
-                                        &constructor_lower_address(ctx, v1156, v1158.1, v1157);
-                                    let v1167 = C::value_type(ctx, v1165);
-                                    let v1168 = C::u8_from_uimm8(ctx, v1166);
-                                    let v1173 = C::be_lane_idx(ctx, v1167, v1168);
-                                    let v1174 = &constructor_vec_store_lane(
-                                        ctx, v1167, v1171, v1172, v1173,
-                                    );
-                                    let v1175 = constructor_side_effect(ctx, v1174);
-                                    // Rule at src/isa/s390x/lower.isle line 1894.
-                                    return Some(v1175);
-                                }
-                                let v1176 = C::littleendian(ctx, v1156);
-                                if let Some(v1177) = v1176 {
-                                    let v1171 = C::put_in_reg(ctx, v1165);
-                                    let v1172 =
-                                        &constructor_lower_address(ctx, v1156, v1158.1, v1157);
-                                    let v1167 = C::value_type(ctx, v1165);
-                                    let v1168 = C::u8_from_uimm8(ctx, v1166);
-                                    let v1173 = C::be_lane_idx(ctx, v1167, v1168);
-                                    let v1178 = &constructor_vec_store_lane_little(
-                                        ctx, v1167, v1171, v1172, v1173,
-                                    );
-                                    let v1179 = constructor_side_effect(ctx, v1178);
-                                    // Rule at src/isa/s390x/lower.isle line 1901.
-                                    return Some(v1179);
-                                }
-                            }
-                        }
-                    }
-                    let v1433 = &C::lane_order(ctx);
-                    match v1433 {
-                        &LaneOrder::LittleEndian => {
-                            let v1580 = C::value_type(ctx, v1158.0);
-                            let v1598 = C::vr128_ty(ctx, v1580);
-                            if let Some(v1599) = v1598 {
-                                let v1169 = C::bigendian(ctx, v1156);
-                                if let Some(v1170) = v1169 {
-                                    let v1589 = C::put_in_reg(ctx, v1158.0);
-                                    let v1604 = &constructor_vec_store_elt_rev(
-                                        ctx, v1599, v1589, v1156, v1158.1, v1157,
-                                    );
-                                    let v1605 = constructor_side_effect(ctx, v1604);
-                                    // Rule at src/isa/s390x/lower.isle line 2689.
-                                    return Some(v1605);
-                                }
-                                let v1176 = C::littleendian(ctx, v1156);
-                                if let Some(v1177) = v1176 {
-                                    let v1589 = C::put_in_reg(ctx, v1158.0);
-                                    let v1606 = &constructor_vec_store_full_rev(
-                                        ctx, v1599, v1589, v1156, v1158.1, v1157,
-                                    );
-                                    let v1607 = constructor_side_effect(ctx, v1606);
-                                    // Rule at src/isa/s390x/lower.isle line 2695.
-                                    return Some(v1607);
-                                }
-                            }
-                        }
-                        &LaneOrder::BigEndian => {
-                            let v1580 = C::value_type(ctx, v1158.0);
-                            let v1598 = C::vr128_ty(ctx, v1580);
-                            if let Some(v1599) = v1598 {
-                                let v1169 = C::bigendian(ctx, v1156);
-                                if let Some(v1170) = v1169 {
-                                    let v1589 = C::put_in_reg(ctx, v1158.0);
-                                    let v1172 =
-                                        &constructor_lower_address(ctx, v1156, v1158.1, v1157);
-                                    let v1600 = &constructor_vec_store(ctx, v1589, v1172);
-                                    let v1601 = constructor_side_effect(ctx, v1600);
-                                    // Rule at src/isa/s390x/lower.isle line 2677.
-                                    return Some(v1601);
-                                }
-                                let v1176 = C::littleendian(ctx, v1156);
-                                if let Some(v1177) = v1176 {
-                                    let v1589 = C::put_in_reg(ctx, v1158.0);
-                                    let v1602 = &constructor_vec_store_byte_rev(
-                                        ctx, v1599, v1589, v1156, v1158.1, v1157,
-                                    );
-                                    let v1603 = constructor_side_effect(ctx, v1602);
-                                    // Rule at src/isa/s390x/lower.isle line 2683.
-                                    return Some(v1603);
-                                }
-                            }
-                        }
-                        _ => {}
-                    }
-                    let v1580 = C::value_type(ctx, v1158.0);
-                    match v1580 {
-                        I8 => {
-                            let v1581 =
-                                &constructor_istore8_impl(ctx, v1156, v1158.0, v1158.1, v1157);
-                            let v1582 = constructor_side_effect(ctx, v1581);
-                            // Rule at src/isa/s390x/lower.isle line 2633.
-                            return Some(v1582);
-                        }
-                        I16 => {
-                            let v1583 =
-                                &constructor_istore16_impl(ctx, v1156, v1158.0, v1158.1, v1157);
-                            let v1584 = constructor_side_effect(ctx, v1583);
-                            // Rule at src/isa/s390x/lower.isle line 2637.
-                            return Some(v1584);
-                        }
-                        I32 => {
-                            let v1585 =
-                                &constructor_istore32_impl(ctx, v1156, v1158.0, v1158.1, v1157);
-                            let v1586 = constructor_side_effect(ctx, v1585);
-                            // Rule at src/isa/s390x/lower.isle line 2641.
-                            return Some(v1586);
-                        }
-                        I64 => {
-                            let v1587 =
-                                &constructor_istore64_impl(ctx, v1156, v1158.0, v1158.1, v1157);
-                            let v1588 = constructor_side_effect(ctx, v1587);
-                            // Rule at src/isa/s390x/lower.isle line 2645.
-                            return Some(v1588);
-                        }
-                        R64 => {
-                            let v1587 =
-                                &constructor_istore64_impl(ctx, v1156, v1158.0, v1158.1, v1157);
-                            let v1588 = constructor_side_effect(ctx, v1587);
-                            // Rule at src/isa/s390x/lower.isle line 2649.
-                            return Some(v1588);
-                        }
-                        F32 => {
-                            let v1176 = C::littleendian(ctx, v1156);
-                            if let Some(v1177) = v1176 {
-                                let v1589 = C::put_in_reg(ctx, v1158.0);
-                                let v1172 = &constructor_lower_address(ctx, v1156, v1158.1, v1157);
-                                let v1592 = &constructor_vec_store_lane_little(
-                                    ctx, F32X4, v1589, v1172, 0x0,
-                                );
-                                let v1593 = constructor_side_effect(ctx, v1592);
-                                // Rule at src/isa/s390x/lower.isle line 2659.
-                                return Some(v1593);
-                            }
-                            let v1169 = C::bigendian(ctx, v1156);
-                            if let Some(v1170) = v1169 {
-                                let v1589 = C::put_in_reg(ctx, v1158.0);
-                                let v1172 = &constructor_lower_address(ctx, v1156, v1158.1, v1157);
-                                let v1590 =
-                                    &constructor_vec_store_lane(ctx, F32X4, v1589, v1172, 0x0);
-                                let v1591 = constructor_side_effect(ctx, v1590);
-                                // Rule at src/isa/s390x/lower.isle line 2653.
-                                return Some(v1591);
-                            }
-                        }
-                        F64 => {
-                            let v1176 = C::littleendian(ctx, v1156);
-                            if let Some(v1177) = v1176 {
-                                let v1589 = C::put_in_reg(ctx, v1158.0);
-                                let v1172 = &constructor_lower_address(ctx, v1156, v1158.1, v1157);
-                                let v1596 = &constructor_vec_store_lane_little(
-                                    ctx, F64X2, v1589, v1172, 0x0,
-                                );
-                                let v1597 = constructor_side_effect(ctx, v1596);
-                                // Rule at src/isa/s390x/lower.isle line 2671.
-                                return Some(v1597);
-                            }
-                            let v1169 = C::bigendian(ctx, v1156);
-                            if let Some(v1170) = v1169 {
-                                let v1589 = C::put_in_reg(ctx, v1158.0);
-                                let v1172 = &constructor_lower_address(ctx, v1156, v1158.1, v1157);
-                                let v1594 =
-                                    &constructor_vec_store_lane(ctx, F64X2, v1589, v1172, 0x0);
-                                let v1595 = constructor_side_effect(ctx, v1594);
-                                // Rule at src/isa/s390x/lower.isle line 2665.
-                                return Some(v1595);
-                            }
-                        }
-                        _ => {}
-                    }
-                }
-                &Opcode::Istore8 => {
-                    let v1158 = C::unpack_value_array_2(ctx, v1155);
-                    let v1581 = &constructor_istore8_impl(ctx, v1156, v1158.0, v1158.1, v1157);
-                    let v1582 = constructor_side_effect(ctx, v1581);
-                    // Rule at src/isa/s390x/lower.isle line 2789.
-                    return Some(v1582);
-                }
-                &Opcode::Istore16 => {
-                    let v1158 = C::unpack_value_array_2(ctx, v1155);
-                    let v1583 = &constructor_istore16_impl(ctx, v1156, v1158.0, v1158.1, v1157);
-                    let v1584 = constructor_side_effect(ctx, v1583);
-                    // Rule at src/isa/s390x/lower.isle line 2807.
-                    return Some(v1584);
-                }
-                &Opcode::Istore32 => {
-                    let v1158 = C::unpack_value_array_2(ctx, v1155);
-                    let v1585 = &constructor_istore32_impl(ctx, v1156, v1158.0, v1158.1, v1157);
-                    let v1586 = constructor_side_effect(ctx, v1585);
-                    // Rule at src/isa/s390x/lower.isle line 2833.
-                    return Some(v1586);
-                }
-                _ => {}
-            }
-        }
-        &InstructionData::StoreNoOffset {
-            opcode: ref v1720,
-            args: ref v1721,
-            flags: v1722,
-        } => {
-            if let &Opcode::AtomicStore = v1720 {
-                let v1723 = C::unpack_value_array_2(ctx, v1721);
-                let v1726 = C::value_type(ctx, v1723.0);
-                match v1726 {
-                    I8 => {
-                        let v1700 = C::zero_offset(ctx);
-                        let v1727 = &constructor_istore8_impl(ctx, v1722, v1723.0, v1723.1, v1700);
-                        let v1728 = constructor_atomic_store_impl(ctx, v1727);
-                        // Rule at src/isa/s390x/lower.isle line 3239.
-                        return Some(v1728);
-                    }
-                    I16 => {
-                        let v1700 = C::zero_offset(ctx);
-                        let v1729 = &constructor_istore16_impl(ctx, v1722, v1723.0, v1723.1, v1700);
-                        let v1730 = constructor_atomic_store_impl(ctx, v1729);
-                        // Rule at src/isa/s390x/lower.isle line 3243.
-                        return Some(v1730);
-                    }
-                    I32 => {
-                        let v1700 = C::zero_offset(ctx);
-                        let v1731 = &constructor_istore32_impl(ctx, v1722, v1723.0, v1723.1, v1700);
-                        let v1732 = constructor_atomic_store_impl(ctx, v1731);
-                        // Rule at src/isa/s390x/lower.isle line 3247.
-                        return Some(v1732);
-                    }
-                    I64 => {
-                        let v1700 = C::zero_offset(ctx);
-                        let v1733 = &constructor_istore64_impl(ctx, v1722, v1723.0, v1723.1, v1700);
-                        let v1734 = constructor_atomic_store_impl(ctx, v1733);
-                        // Rule at src/isa/s390x/lower.isle line 3251.
-                        return Some(v1734);
-                    }
-                    _ => {}
-                }
-            }
-        }
-        &InstructionData::Ternary {
-            opcode: ref v729,
-            args: ref v730,
-        } => {
-            match v729 {
-                &Opcode::Select => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v731 = C::unpack_value_array_3(ctx, v730);
-                        let v1888 = &constructor_value_nonzero(ctx, v731.0);
-                        let v736 = C::put_in_reg(ctx, v731.1);
-                        let v890 = C::put_in_reg(ctx, v731.2);
-                        let v3 = C::value_type(ctx, v2);
-                        let v1889 = constructor_select_bool_reg(ctx, v3, v1888, v736, v890);
-                        let v1890 = constructor_output_reg(ctx, v1889);
-                        // Rule at src/isa/s390x/lower.isle line 3718.
-                        return Some(v1890);
-                    }
-                }
-                &Opcode::SelectSpectreGuard => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v731 = C::unpack_value_array_3(ctx, v730);
-                        let v1888 = &constructor_value_nonzero(ctx, v731.0);
-                        let v736 = C::put_in_reg(ctx, v731.1);
-                        let v890 = C::put_in_reg(ctx, v731.2);
-                        let v3 = C::value_type(ctx, v2);
-                        let v1889 = constructor_select_bool_reg(ctx, v3, v1888, v736, v890);
-                        let v1890 = constructor_output_reg(ctx, v1889);
-                        // Rule at src/isa/s390x/lower.isle line 3728.
-                        return Some(v1890);
-                    }
-                }
-                &Opcode::Bitselect => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v61 = C::fits_in_64(ctx, v3);
-                        if let Some(v62) = v61 {
-                            let v624 = C::mie2_enabled(ctx, v3);
-                            if let Some(v625) = v624 {
-                                let v731 = C::unpack_value_array_3(ctx, v730);
-                                let v735 = C::put_in_reg(ctx, v731.0);
-                                let v736 = C::put_in_reg(ctx, v731.1);
-                                let v737 = constructor_and_reg(ctx, v62, v736, v735);
-                                let v738 = C::put_in_reg(ctx, v731.2);
-                                let v739 = constructor_and_not_reg(ctx, v62, v738, v735);
-                                let v740 = constructor_or_reg(ctx, v62, v739, v737);
-                                let v741 = constructor_output_reg(ctx, v740);
-                                // Rule at src/isa/s390x/lower.isle line 1120.
-                                return Some(v741);
-                            }
-                            let v628 = C::mie2_disabled(ctx, v3);
-                            if let Some(v629) = v628 {
-                                let v731 = C::unpack_value_array_3(ctx, v730);
-                                let v735 = C::put_in_reg(ctx, v731.0);
-                                let v736 = C::put_in_reg(ctx, v731.1);
-                                let v737 = constructor_and_reg(ctx, v62, v736, v735);
-                                let v738 = C::put_in_reg(ctx, v731.2);
-                                let v742 = constructor_not_reg(ctx, v62, v735);
-                                let v743 = constructor_and_reg(ctx, v62, v738, v742);
-                                let v744 = constructor_or_reg(ctx, v62, v743, v737);
-                                let v745 = constructor_output_reg(ctx, v744);
-                                // Rule at src/isa/s390x/lower.isle line 1127.
-                                return Some(v745);
-                            }
-                        }
-                        let v36 = C::vr128_ty(ctx, v3);
-                        if let Some(v37) = v36 {
-                            let v731 = C::unpack_value_array_3(ctx, v730);
-                            let v746 = C::put_in_reg(ctx, v731.1);
-                            let v747 = C::put_in_reg(ctx, v731.2);
-                            let v748 = C::put_in_reg(ctx, v731.0);
-                            let v749 = constructor_vec_select(ctx, v37, v746, v747, v748);
-                            let v750 = constructor_output_reg(ctx, v749);
-                            // Rule at src/isa/s390x/lower.isle line 1134.
-                            return Some(v750);
-                        }
-                    }
-                }
-                &Opcode::Fma => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v731 = C::unpack_value_array_3(ctx, v730);
-                        let v735 = C::put_in_reg(ctx, v731.0);
-                        let v736 = C::put_in_reg(ctx, v731.1);
-                        let v890 = C::put_in_reg(ctx, v731.2);
-                        let v3 = C::value_type(ctx, v2);
-                        let v891 = constructor_fma_reg(ctx, v3, v735, v736, v890);
-                        let v892 = constructor_output_reg(ctx, v891);
-                        // Rule at src/isa/s390x/lower.isle line 1422.
-                        return Some(v892);
-                    }
-                }
-                _ => {}
-            }
-        }
-        &InstructionData::TernaryImm8 {
-            opcode: ref v1088,
-            args: ref v1089,
-            imm: v1090,
-        } => {
-            if let &Opcode::Insertlane = v1088 {
-                let v1091 = C::unpack_value_array_2(ctx, v1089);
-                let v1125 = C::sinkable_inst(ctx, v1091.1);
-                if let Some(v1126) = v1125 {
-                    let v1127 = &C::inst_data(ctx, v1126);
-                    if let &InstructionData::Load {
-                        opcode: ref v1128,
-                        arg: v1129,
-                        flags: v1130,
-                        offset: v1131,
-                    } = v1127
-                    {
-                        if let &Opcode::Load = v1128 {
-                            let v1137 = C::littleendian(ctx, v1130);
-                            if let Some(v1138) = v1137 {
-                                let v1099 = C::put_in_reg(ctx, v1091.0);
-                                let v1134 = &constructor_sink_load(ctx, v1126);
-                                let v1094 = C::value_type(ctx, v1091.0);
-                                let v1096 = C::u8_from_uimm8(ctx, v1090);
-                                let v1101 = C::be_lane_idx(ctx, v1094, v1096);
-                                let v1139 = constructor_vec_load_lane_little(
-                                    ctx, v1094, v1099, v1134, v1101,
-                                );
-                                let v1140 = constructor_output_reg(ctx, v1139);
-                                // Rule at src/isa/s390x/lower.isle line 1796.
-                                return Some(v1140);
-                            }
-                            let v1132 = C::bigendian(ctx, v1130);
-                            if let Some(v1133) = v1132 {
-                                let v1099 = C::put_in_reg(ctx, v1091.0);
-                                let v1134 = &constructor_sink_load(ctx, v1126);
-                                let v1094 = C::value_type(ctx, v1091.0);
-                                let v1096 = C::u8_from_uimm8(ctx, v1090);
-                                let v1101 = C::be_lane_idx(ctx, v1094, v1096);
-                                let v1135 =
-                                    constructor_vec_load_lane(ctx, v1094, v1099, v1134, v1101);
-                                let v1136 = constructor_output_reg(ctx, v1135);
-                                // Rule at src/isa/s390x/lower.isle line 1791.
-                                return Some(v1136);
-                            }
-                        }
-                    }
-                }
-                let v1121 = C::i16_from_value(ctx, v1091.1);
-                if let Some(v1122) = v1121 {
-                    let v1099 = C::put_in_reg(ctx, v1091.0);
-                    let v1094 = C::value_type(ctx, v1091.0);
-                    let v1096 = C::u8_from_uimm8(ctx, v1090);
-                    let v1106 = C::be_lane_idx(ctx, v1094, v1096);
-                    let v1123 = constructor_vec_insert_lane_imm(ctx, v1094, v1099, v1122, v1106);
-                    let v1124 = constructor_output_reg(ctx, v1123);
-                    // Rule at src/isa/s390x/lower.isle line 1786.
-                    return Some(v1124);
-                }
-                let v1110 = C::def_inst(ctx, v1091.1);
-                if let Some(v1111) = v1110 {
-                    let v1112 = &C::inst_data(ctx, v1111);
-                    if let &InstructionData::BinaryImm8 {
-                        opcode: ref v1113,
-                        arg: v1114,
-                        imm: v1115,
-                    } = v1112
-                    {
-                        if let &Opcode::Extractlane = v1113 {
-                            let v1099 = C::put_in_reg(ctx, v1091.0);
-                            let v1094 = C::value_type(ctx, v1091.0);
-                            let v1096 = C::u8_from_uimm8(ctx, v1090);
-                            let v1106 = C::be_lane_idx(ctx, v1094, v1096);
-                            let v1117 = C::put_in_reg(ctx, v1114);
-                            let v1116 = C::u8_from_uimm8(ctx, v1115);
-                            let v1118 = C::be_lane_idx(ctx, v1094, v1116);
-                            let v1119 = constructor_vec_move_lane_and_insert(
-                                ctx, v1094, v1099, v1106, v1117, v1118,
-                            );
-                            let v1120 = constructor_output_reg(ctx, v1119);
-                            // Rule at src/isa/s390x/lower.isle line 1779.
-                            return Some(v1120);
-                        }
-                    }
-                }
-                let v1095 = C::value_type(ctx, v1091.1);
-                let v1097 = C::ty_int_ref_scalar_64(ctx, v1095);
-                if let Some(v1098) = v1097 {
-                    let v1099 = C::put_in_reg(ctx, v1091.0);
-                    let v1100 = C::put_in_reg(ctx, v1091.1);
-                    let v1094 = C::value_type(ctx, v1091.0);
-                    let v1096 = C::u8_from_uimm8(ctx, v1090);
-                    let v1101 = C::be_lane_idx(ctx, v1094, v1096);
-                    let v56 = C::zero_reg(ctx);
-                    let v1102 = constructor_vec_insert_lane(ctx, v1094, v1099, v1100, v1101, v56);
-                    let v1103 = constructor_output_reg(ctx, v1102);
-                    // Rule at src/isa/s390x/lower.isle line 1766.
-                    return Some(v1103);
-                }
-                let v1104 = C::ty_scalar_float(ctx, v1095);
-                if let Some(v1105) = v1104 {
-                    let v1099 = C::put_in_reg(ctx, v1091.0);
-                    let v1094 = C::value_type(ctx, v1091.0);
-                    let v1096 = C::u8_from_uimm8(ctx, v1090);
-                    let v1106 = C::be_lane_idx(ctx, v1094, v1096);
-                    let v1107 = C::put_in_reg(ctx, v1091.1);
-                    let v1108 =
-                        constructor_vec_move_lane_and_insert(ctx, v1094, v1099, v1106, v1107, 0x0);
-                    let v1109 = constructor_output_reg(ctx, v1108);
-                    // Rule at src/isa/s390x/lower.isle line 1773.
-                    return Some(v1109);
-                }
-            }
-        }
-        &InstructionData::Trap {
-            opcode: ref v1891,
-            code: ref v1892,
-        } => {
-            match v1891 {
-                &Opcode::Trap => {
-                    let v1893 = &constructor_trap_impl(ctx, v1892);
-                    let v1894 = constructor_side_effect(ctx, v1893);
-                    // Rule at src/isa/s390x/lower.isle line 3787.
-                    return Some(v1894);
-                }
-                &Opcode::ResumableTrap => {
-                    let v1893 = &constructor_trap_impl(ctx, v1892);
-                    let v1894 = constructor_side_effect(ctx, v1893);
-                    // Rule at src/isa/s390x/lower.isle line 3793.
-                    return Some(v1894);
-                }
-                _ => {}
-            }
-        }
-        &InstructionData::Unary {
-            opcode: ref v47,
-            arg: v48,
-        } => {
-            match v47 {
-                &Opcode::Splat => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v1201 = C::sinkable_inst(ctx, v48);
-                        if let Some(v1202) = v1201 {
-                            let v1203 = &C::inst_data(ctx, v1202);
-                            if let &InstructionData::Load {
-                                opcode: ref v1204,
-                                arg: v1205,
-                                flags: v1206,
-                                offset: v1207,
-                            } = v1203
-                            {
-                                if let &Opcode::Load = v1204 {
-                                    let v1213 = C::littleendian(ctx, v1206);
-                                    if let Some(v1214) = v1213 {
-                                        let v1210 = &constructor_sink_load(ctx, v1202);
-                                        let v3 = C::value_type(ctx, v2);
-                                        let v1215 =
-                                            constructor_vec_load_replicate_little(ctx, v3, v1210);
-                                        let v1216 = constructor_output_reg(ctx, v1215);
-                                        // Rule at src/isa/s390x/lower.isle line 1963.
-                                        return Some(v1216);
-                                    }
-                                    let v1208 = C::bigendian(ctx, v1206);
-                                    if let Some(v1209) = v1208 {
-                                        let v1210 = &constructor_sink_load(ctx, v1202);
-                                        let v3 = C::value_type(ctx, v2);
-                                        let v1211 = constructor_vec_load_replicate(ctx, v3, v1210);
-                                        let v1212 = constructor_output_reg(ctx, v1211);
-                                        // Rule at src/isa/s390x/lower.isle line 1959.
-                                        return Some(v1212);
-                                    }
-                                }
-                            }
-                        }
-                        let v1197 = C::i16_from_value(ctx, v48);
-                        if let Some(v1198) = v1197 {
-                            let v3 = C::value_type(ctx, v2);
-                            let v1199 = constructor_vec_imm_replicate(ctx, v3, v1198);
-                            let v1200 = constructor_output_reg(ctx, v1199);
-                            // Rule at src/isa/s390x/lower.isle line 1955.
-                            return Some(v1200);
-                        }
-                        let v260 = C::def_inst(ctx, v48);
-                        if let Some(v261) = v260 {
-                            let v262 = &C::inst_data(ctx, v261);
-                            if let &InstructionData::BinaryImm8 {
-                                opcode: ref v1189,
-                                arg: v1190,
-                                imm: v1191,
-                            } = v262
-                            {
-                                if let &Opcode::Extractlane = v1189 {
-                                    let v1193 = C::put_in_reg(ctx, v1190);
-                                    let v3 = C::value_type(ctx, v2);
-                                    let v1192 = C::u8_from_uimm8(ctx, v1191);
-                                    let v1194 = C::be_lane_idx(ctx, v3, v1192);
-                                    let v1195 =
-                                        constructor_vec_replicate_lane(ctx, v3, v1193, v1194);
-                                    let v1196 = constructor_output_reg(ctx, v1195);
-                                    // Rule at src/isa/s390x/lower.isle line 1951.
-                                    return Some(v1196);
-                                }
-                            }
-                        }
-                        let v49 = C::value_type(ctx, v48);
-                        let v1180 = C::ty_int_ref_scalar_64(ctx, v49);
-                        if let Some(v1181) = v1180 {
-                            let v50 = C::put_in_reg(ctx, v48);
-                            let v53 = C::zero_reg(ctx);
-                            let v3 = C::value_type(ctx, v2);
-                            let v1182 = constructor_vec_insert_lane_undef(ctx, v3, v50, 0x0, v53);
-                            let v1183 = constructor_vec_replicate_lane(ctx, v3, v1182, 0x0);
-                            let v1184 = constructor_output_reg(ctx, v1183);
-                            // Rule at src/isa/s390x/lower.isle line 1941.
-                            return Some(v1184);
-                        }
-                        let v1185 = C::ty_scalar_float(ctx, v49);
-                        if let Some(v1186) = v1185 {
-                            let v50 = C::put_in_reg(ctx, v48);
-                            let v3 = C::value_type(ctx, v2);
-                            let v1187 = constructor_vec_replicate_lane(ctx, v3, v50, 0x0);
-                            let v1188 = constructor_output_reg(ctx, v1187);
-                            // Rule at src/isa/s390x/lower.isle line 1946.
-                            return Some(v1188);
-                        }
-                    }
-                }
-                &Opcode::VanyTrue => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v61 = C::fits_in_64(ctx, v3);
-                        if let Some(v62) = v61 {
-                            let v1819 = &constructor_vany_true_val(ctx, v48);
-                            let v1820 = constructor_lower_bool(ctx, v62, v1819);
-                            let v1821 = constructor_output_reg(ctx, v1820);
-                            // Rule at src/isa/s390x/lower.isle line 3563.
-                            return Some(v1821);
-                        }
-                    }
-                }
-                &Opcode::VallTrue => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v61 = C::fits_in_64(ctx, v3);
-                        if let Some(v62) = v61 {
-                            let v1816 = &constructor_vall_true_val(ctx, v48);
-                            let v1817 = constructor_lower_bool(ctx, v62, v1816);
-                            let v1818 = constructor_output_reg(ctx, v1817);
-                            // Rule at src/isa/s390x/lower.isle line 3485.
-                            return Some(v1818);
-                        }
-                    }
-                }
-                &Opcode::VhighBits => {
-                    let v1433 = &C::lane_order(ctx);
-                    match v1433 {
-                        &LaneOrder::LittleEndian => {
-                            let v49 = C::value_type(ctx, v48);
-                            let v1822 = C::multi_lane(ctx, v49);
-                            if let Some(v1823) = v1822 {
-                                match v1823.0 {
-                                    0x8 => {
-                                        if v1823.1 == 0x10 {
-                                            let v1836 = constructor_imm8x16(
-                                                ctx, 0x0, 0x8, 0x10, 0x18, 0x20, 0x28, 0x30, 0x38,
-                                                0x40, 0x48, 0x50, 0x58, 0x60, 0x68, 0x70, 0x78,
-                                            );
-                                            let v1837 = constructor_vec_imm(ctx, I8X16, v1836);
-                                            let v1838 = C::put_in_reg(ctx, v48);
-                                            let v1839 =
-                                                constructor_vec_bitpermute(ctx, v1838, v1837);
-                                            let v395 = C::zero_reg(ctx);
-                                            let v1840 = constructor_vec_extract_lane(
-                                                ctx, I64X2, v1839, 0x0, v395,
-                                            );
-                                            let v1841 = constructor_output_reg(ctx, v1840);
-                                            // Rule at src/isa/s390x/lower.isle line 3639.
-                                            return Some(v1841);
-                                        }
-                                    }
-                                    0x10 => {
-                                        if v1823.1 == 0x8 {
-                                            let v1848 = constructor_imm8x16(
-                                                ctx, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80,
-                                                0x80, 0x0, 0x10, 0x20, 0x30, 0x40, 0x50, 0x60,
-                                                0x70,
-                                            );
-                                            let v1849 = constructor_vec_imm(ctx, I8X16, v1848);
-                                            let v1838 = C::put_in_reg(ctx, v48);
-                                            let v1850 =
-                                                constructor_vec_bitpermute(ctx, v1838, v1849);
-                                            let v395 = C::zero_reg(ctx);
-                                            let v1851 = constructor_vec_extract_lane(
-                                                ctx, I64X2, v1850, 0x0, v395,
-                                            );
-                                            let v1852 = constructor_output_reg(ctx, v1851);
-                                            // Rule at src/isa/s390x/lower.isle line 3650.
-                                            return Some(v1852);
-                                        }
-                                    }
-                                    0x20 => {
-                                        if v1823.1 == 0x4 {
-                                            let v1858 = constructor_imm8x16(
-                                                ctx, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80,
-                                                0x80, 0x80, 0x80, 0x80, 0x80, 0x0, 0x20, 0x40,
-                                                0x60,
-                                            );
-                                            let v1859 = constructor_vec_imm(ctx, I8X16, v1858);
-                                            let v1838 = C::put_in_reg(ctx, v48);
-                                            let v1860 =
-                                                constructor_vec_bitpermute(ctx, v1838, v1859);
-                                            let v395 = C::zero_reg(ctx);
-                                            let v1861 = constructor_vec_extract_lane(
-                                                ctx, I64X2, v1860, 0x0, v395,
-                                            );
-                                            let v1862 = constructor_output_reg(ctx, v1861);
-                                            // Rule at src/isa/s390x/lower.isle line 3661.
-                                            return Some(v1862);
-                                        }
-                                    }
-                                    0x40 => {
-                                        if v1823.1 == 0x2 {
-                                            let v1868 = constructor_imm8x16(
-                                                ctx, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80,
-                                                0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x0,
-                                                0x40,
-                                            );
-                                            let v1869 = constructor_vec_imm(ctx, I8X16, v1868);
-                                            let v1838 = C::put_in_reg(ctx, v48);
-                                            let v1870 =
-                                                constructor_vec_bitpermute(ctx, v1838, v1869);
-                                            let v395 = C::zero_reg(ctx);
-                                            let v1871 = constructor_vec_extract_lane(
-                                                ctx, I64X2, v1870, 0x0, v395,
-                                            );
-                                            let v1872 = constructor_output_reg(ctx, v1871);
-                                            // Rule at src/isa/s390x/lower.isle line 3672.
-                                            return Some(v1872);
-                                        }
-                                    }
-                                    _ => {}
-                                }
-                            }
-                        }
-                        &LaneOrder::BigEndian => {
-                            let v49 = C::value_type(ctx, v48);
-                            let v1822 = C::multi_lane(ctx, v49);
-                            if let Some(v1823) = v1822 {
-                                match v1823.0 {
-                                    0x8 => {
-                                        if v1823.1 == 0x10 {
-                                            let v1842 = constructor_imm8x16(
-                                                ctx, 0x78, 0x70, 0x68, 0x60, 0x58, 0x50, 0x48,
-                                                0x40, 0x38, 0x30, 0x28, 0x20, 0x18, 0x10, 0x8, 0x0,
-                                            );
-                                            let v1843 = constructor_vec_imm(ctx, I8X16, v1842);
-                                            let v1838 = C::put_in_reg(ctx, v48);
-                                            let v1844 =
-                                                constructor_vec_bitpermute(ctx, v1838, v1843);
-                                            let v395 = C::zero_reg(ctx);
-                                            let v1845 = constructor_vec_extract_lane(
-                                                ctx, I64X2, v1844, 0x0, v395,
-                                            );
-                                            let v1846 = constructor_output_reg(ctx, v1845);
-                                            // Rule at src/isa/s390x/lower.isle line 3644.
-                                            return Some(v1846);
-                                        }
-                                    }
-                                    0x10 => {
-                                        if v1823.1 == 0x8 {
-                                            let v1853 = constructor_imm8x16(
-                                                ctx, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80,
-                                                0x80, 0x70, 0x60, 0x50, 0x40, 0x30, 0x20, 0x10,
-                                                0x0,
-                                            );
-                                            let v1854 = constructor_vec_imm(ctx, I8X16, v1853);
-                                            let v1838 = C::put_in_reg(ctx, v48);
-                                            let v1855 =
-                                                constructor_vec_bitpermute(ctx, v1838, v1854);
-                                            let v395 = C::zero_reg(ctx);
-                                            let v1856 = constructor_vec_extract_lane(
-                                                ctx, I64X2, v1855, 0x0, v395,
-                                            );
-                                            let v1857 = constructor_output_reg(ctx, v1856);
-                                            // Rule at src/isa/s390x/lower.isle line 3655.
-                                            return Some(v1857);
-                                        }
-                                    }
-                                    0x20 => {
-                                        if v1823.1 == 0x4 {
-                                            let v1863 = constructor_imm8x16(
-                                                ctx, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80,
-                                                0x80, 0x80, 0x80, 0x80, 0x80, 0x60, 0x40, 0x20,
-                                                0x0,
-                                            );
-                                            let v1864 = constructor_vec_imm(ctx, I8X16, v1863);
-                                            let v1838 = C::put_in_reg(ctx, v48);
-                                            let v1865 =
-                                                constructor_vec_bitpermute(ctx, v1838, v1864);
-                                            let v395 = C::zero_reg(ctx);
-                                            let v1866 = constructor_vec_extract_lane(
-                                                ctx, I64X2, v1865, 0x0, v395,
-                                            );
-                                            let v1867 = constructor_output_reg(ctx, v1866);
-                                            // Rule at src/isa/s390x/lower.isle line 3666.
-                                            return Some(v1867);
-                                        }
-                                    }
-                                    0x40 => {
-                                        if v1823.1 == 0x2 {
-                                            let v1873 = constructor_imm8x16(
-                                                ctx, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80,
-                                                0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x40,
-                                                0x0,
-                                            );
-                                            let v1874 = constructor_vec_imm(ctx, I8X16, v1873);
-                                            let v1838 = C::put_in_reg(ctx, v48);
-                                            let v1875 =
-                                                constructor_vec_bitpermute(ctx, v1838, v1874);
-                                            let v395 = C::zero_reg(ctx);
-                                            let v1876 = constructor_vec_extract_lane(
-                                                ctx, I64X2, v1875, 0x0, v395,
-                                            );
-                                            let v1877 = constructor_output_reg(ctx, v1876);
-                                            // Rule at src/isa/s390x/lower.isle line 3677.
-                                            return Some(v1877);
-                                        }
-                                    }
-                                    _ => {}
-                                }
-                            }
-                        }
-                        _ => {}
-                    }
-                }
-                &Opcode::Ineg => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v61 = C::fits_in_64(ctx, v3);
-                        if let Some(v62) = v61 {
-                            let v260 = C::def_inst(ctx, v48);
-                            if let Some(v261) = v260 {
-                                let v262 = &C::inst_data(ctx, v261);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v263,
-                                    arg: v264,
-                                } = v262
-                                {
-                                    if let &Opcode::Sextend = v263 {
-                                        let v265 = C::value_type(ctx, v264);
-                                        if v265 == I32 {
-                                            let v266 = C::put_in_reg(ctx, v264);
-                                            let v282 = constructor_neg_reg_sext32(ctx, v62, v266);
-                                            let v283 = constructor_output_reg(ctx, v282);
-                                            // Rule at src/isa/s390x/lower.isle line 235.
-                                            return Some(v283);
-                                        }
-                                    }
-                                }
-                            }
-                            let v50 = C::put_in_reg(ctx, v48);
-                            let v280 = constructor_neg_reg(ctx, v62, v50);
-                            let v281 = constructor_output_reg(ctx, v280);
-                            // Rule at src/isa/s390x/lower.isle line 231.
-                            return Some(v281);
-                        }
-                        let v149 = C::ty_vec128(ctx, v3);
-                        if let Some(v150) = v149 {
-                            let v50 = C::put_in_reg(ctx, v48);
-                            let v284 = constructor_vec_neg(ctx, v150, v50);
-                            let v285 = constructor_output_reg(ctx, v284);
-                            // Rule at src/isa/s390x/lower.isle line 239.
-                            return Some(v285);
-                        }
-                        if v3 == I128 {
-                            let v273 = constructor_vec_imm(ctx, I128, 0x0);
-                            let v274 = C::put_in_reg(ctx, v48);
-                            let v275 = constructor_vec_sub(ctx, I128, v273, v274);
-                            let v286 = constructor_output_reg(ctx, v275);
-                            // Rule at src/isa/s390x/lower.isle line 243.
-                            return Some(v286);
-                        }
-                    }
-                }
-                &Opcode::Iabs => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v61 = C::fits_in_64(ctx, v3);
-                        if let Some(v62) = v61 {
-                            let v260 = C::def_inst(ctx, v48);
-                            if let Some(v261) = v260 {
-                                let v262 = &C::inst_data(ctx, v261);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v263,
-                                    arg: v264,
-                                } = v262
-                                {
-                                    if let &Opcode::Sextend = v263 {
-                                        let v265 = C::value_type(ctx, v264);
-                                        if v265 == I32 {
-                                            let v266 = C::put_in_reg(ctx, v264);
-                                            let v267 = constructor_abs_reg_sext32(ctx, v62, v266);
-                                            let v268 = constructor_output_reg(ctx, v267);
-                                            // Rule at src/isa/s390x/lower.isle line 211.
-                                            return Some(v268);
-                                        }
-                                    }
-                                }
-                            }
-                            let v256 = constructor_ty_ext32(ctx, v62);
-                            let v257 = constructor_put_in_reg_sext32(ctx, v48);
-                            let v258 = constructor_abs_reg(ctx, v256, v257);
-                            let v259 = constructor_output_reg(ctx, v258);
-                            // Rule at src/isa/s390x/lower.isle line 207.
-                            return Some(v259);
-                        }
-                        let v149 = C::ty_vec128(ctx, v3);
-                        if let Some(v150) = v149 {
-                            let v50 = C::put_in_reg(ctx, v48);
-                            let v269 = constructor_vec_abs(ctx, v150, v50);
-                            let v270 = constructor_output_reg(ctx, v269);
-                            // Rule at src/isa/s390x/lower.isle line 215.
-                            return Some(v270);
-                        }
-                        if v3 == I128 {
-                            let v273 = constructor_vec_imm(ctx, I128, 0x0);
-                            let v274 = C::put_in_reg(ctx, v48);
-                            let v275 = constructor_vec_sub(ctx, I128, v273, v274);
-                            let v276 = constructor_vec_replicate_lane(ctx, I64X2, v274, 0x0);
-                            let v277 = constructor_vec_cmph(ctx, I64X2, v273, v276);
-                            let v278 = constructor_vec_select(ctx, I128, v275, v274, v277);
-                            let v279 = constructor_output_reg(ctx, v278);
-                            // Rule at src/isa/s390x/lower.isle line 219.
-                            return Some(v279);
-                        }
-                    }
-                }
-                &Opcode::Bnot => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v260 = C::def_inst(ctx, v48);
-                        if let Some(v261) = v260 {
-                            let v262 = &C::inst_data(ctx, v261);
-                            if let &InstructionData::Binary {
-                                opcode: ref v634,
-                                args: ref v635,
-                            } = v262
-                            {
-                                if let &Opcode::Bxor = v634 {
-                                    let v3 = C::value_type(ctx, v2);
-                                    let v36 = C::vr128_ty(ctx, v3);
-                                    if let Some(v37) = v36 {
-                                        let v636 = C::unpack_value_array_2(ctx, v635);
-                                        let v639 = C::put_in_reg(ctx, v636.0);
-                                        let v640 = C::put_in_reg(ctx, v636.1);
-                                        let v643 = constructor_vec_not_xor(ctx, v37, v639, v640);
-                                        let v644 = constructor_output_reg(ctx, v643);
-                                        // Rule at src/isa/s390x/lower.isle line 989.
-                                        return Some(v644);
-                                    }
-                                    let v61 = C::fits_in_64(ctx, v3);
-                                    if let Some(v62) = v61 {
-                                        let v624 = C::mie2_enabled(ctx, v3);
-                                        if let Some(v625) = v624 {
-                                            let v636 = C::unpack_value_array_2(ctx, v635);
-                                            let v639 = C::put_in_reg(ctx, v636.0);
-                                            let v640 = C::put_in_reg(ctx, v636.1);
-                                            let v641 =
-                                                constructor_not_xor_reg(ctx, v62, v639, v640);
-                                            let v642 = constructor_output_reg(ctx, v641);
-                                            // Rule at src/isa/s390x/lower.isle line 985.
-                                            return Some(v642);
-                                        }
-                                    }
-                                }
-                            }
-                        }
-                        let v3 = C::value_type(ctx, v2);
-                        let v61 = C::fits_in_64(ctx, v3);
-                        if let Some(v62) = v61 {
-                            let v624 = C::mie2_enabled(ctx, v3);
-                            if let Some(v625) = v624 {
-                                let v50 = C::put_in_reg(ctx, v48);
-                                let v626 = constructor_not_or_reg(ctx, v62, v50, v50);
-                                let v627 = constructor_output_reg(ctx, v626);
-                                // Rule at src/isa/s390x/lower.isle line 971.
-                                return Some(v627);
-                            }
-                            let v628 = C::mie2_disabled(ctx, v3);
-                            if let Some(v629) = v628 {
-                                let v50 = C::put_in_reg(ctx, v48);
-                                let v630 = constructor_not_reg(ctx, v62, v50);
-                                let v631 = constructor_output_reg(ctx, v630);
-                                // Rule at src/isa/s390x/lower.isle line 976.
-                                return Some(v631);
-                            }
-                        }
-                        let v36 = C::vr128_ty(ctx, v3);
-                        if let Some(v37) = v36 {
-                            let v50 = C::put_in_reg(ctx, v48);
-                            let v632 = constructor_vec_not(ctx, v37, v50);
-                            let v633 = constructor_output_reg(ctx, v632);
-                            // Rule at src/isa/s390x/lower.isle line 980.
-                            return Some(v633);
-                        }
-                    }
-                }
-                &Opcode::Bitrev => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v50 = C::put_in_reg(ctx, v48);
-                        let v3 = C::value_type(ctx, v2);
-                        let v759 = constructor_bitrev_bits(ctx, 0x1, 0xAAAAAAAAAAAAAAAA, v3, v50);
-                        let v760 = constructor_bitrev_bits(ctx, 0x2, 0xCCCCCCCCCCCCCCCC, v3, v759);
-                        let v761 = constructor_bitrev_bits(ctx, 0x4, 0xF0F0F0F0F0F0F0F0, v3, v760);
-                        let v762 = constructor_bitrev_bytes(ctx, v3, v761);
-                        let v763 = constructor_output_reg(ctx, v762);
-                        // Rule at src/isa/s390x/lower.isle line 1146.
-                        return Some(v763);
-                    }
-                }
-                &Opcode::Clz => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v61 = C::fits_in_64(ctx, v3);
-                        if let Some(v62) = v61 {
-                            let v581 = constructor_put_in_reg_zext64(ctx, v48);
-                            let v767 = constructor_clz_reg(ctx, 0x40, v581);
-                            let v768 = constructor_clz_offset(ctx, v62, v767);
-                            let v769 = constructor_output_reg(ctx, v768);
-                            // Rule at src/isa/s390x/lower.isle line 1197.
-                            return Some(v769);
-                        }
-                        if v3 == I128 {
-                            let v50 = C::put_in_reg(ctx, v48);
-                            let v770 = constructor_vec_clz(ctx, I64X2, v50);
-                            let v771 = constructor_vec_imm(ctx, I64X2, 0x0);
-                            let v772 =
-                                constructor_vec_permute_dw_imm(ctx, I64X2, v771, 0x0, v770, 0x0);
-                            let v773 =
-                                constructor_vec_permute_dw_imm(ctx, I64X2, v771, 0x0, v770, 0x1);
-                            let v774 = constructor_vec_add(ctx, I64X2, v772, v773);
-                            let v776 = constructor_vec_imm_splat(ctx, I64X2, 0x40);
-                            let v777 = constructor_vec_cmpeq(ctx, I64X2, v772, v776);
-                            let v778 = constructor_vec_select(ctx, I128, v774, v772, v777);
-                            let v779 = constructor_output_reg(ctx, v778);
-                            // Rule at src/isa/s390x/lower.isle line 1205.
-                            return Some(v779);
-                        }
-                    }
-                }
-                &Opcode::Cls => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v61 = C::fits_in_64(ctx, v3);
-                        if let Some(v62) = v61 {
-                            let v597 = constructor_put_in_reg_sext64(ctx, v48);
-                            let v600 = constructor_ashr_imm(ctx, I64, v597, 0x3F);
-                            let v780 = constructor_xor_reg(ctx, I64, v597, v600);
-                            let v781 = constructor_clz_reg(ctx, 0x40, v780);
-                            let v782 = constructor_cls_offset(ctx, v62, v781);
-                            let v783 = constructor_output_reg(ctx, v782);
-                            // Rule at src/isa/s390x/lower.isle line 1231.
-                            return Some(v783);
-                        }
-                        if v3 == I128 {
-                            let v50 = C::put_in_reg(ctx, v48);
-                            let v785 = constructor_vec_imm_splat(ctx, I8X16, 0xFF);
-                            let v786 = constructor_vec_ashr_by_byte(ctx, v50, v785);
-                            let v787 = constructor_vec_ashr_by_bit(ctx, v786, v785);
-                            let v788 = constructor_vec_xor(ctx, I128, v50, v787);
-                            let v789 = constructor_vec_clz(ctx, I64X2, v788);
-                            let v790 = constructor_vec_imm(ctx, I64X2, 0x0);
-                            let v791 =
-                                constructor_vec_permute_dw_imm(ctx, I64X2, v790, 0x0, v789, 0x0);
-                            let v792 =
-                                constructor_vec_permute_dw_imm(ctx, I64X2, v790, 0x0, v789, 0x1);
-                            let v793 = constructor_vec_add(ctx, I64X2, v791, v792);
-                            let v794 = constructor_vec_imm_splat(ctx, I64X2, 0x40);
-                            let v795 = constructor_vec_cmpeq(ctx, I64X2, v791, v794);
-                            let v796 = constructor_vec_select(ctx, I128, v793, v791, v795);
-                            let v797 = constructor_vec_add(ctx, I128, v796, v785);
-                            let v798 = constructor_output_reg(ctx, v797);
-                            // Rule at src/isa/s390x/lower.isle line 1239.
-                            return Some(v798);
-                        }
-                    }
-                }
-                &Opcode::Ctz => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v575 = C::gpr32_ty(ctx, v3);
-                        if let Some(v576) = v575 {
-                            let v50 = C::put_in_reg(ctx, v48);
-                            let v799 = constructor_ctz_guardbit(ctx, v576);
-                            let v800 = constructor_or_uimm16shifted(ctx, I64, v50, v799);
-                            let v801 = constructor_neg_reg(ctx, I64, v800);
-                            let v802 = constructor_and_reg(ctx, I64, v800, v801);
-                            let v803 = constructor_clz_reg(ctx, 0x40, v802);
-                            let v805 = constructor_imm(ctx, v576, 0x3F);
-                            let v806 = constructor_sub_reg(ctx, v576, v805, v803);
-                            let v807 = constructor_output_reg(ctx, v806);
-                            // Rule at src/isa/s390x/lower.isle line 1268.
-                            return Some(v807);
-                        }
-                        let v579 = C::gpr64_ty(ctx, v3);
-                        if let Some(v580) = v579 {
-                            let v50 = C::put_in_reg(ctx, v48);
-                            let v808 = constructor_neg_reg(ctx, I64, v50);
-                            let v809 = constructor_and_reg(ctx, I64, v50, v808);
-                            let v811 = constructor_clz_reg(ctx, -0x1, v809);
-                            let v812 = constructor_imm(ctx, I64, 0x3F);
-                            let v813 = constructor_sub_reg(ctx, I64, v812, v811);
-                            let v814 = constructor_output_reg(ctx, v813);
-                            // Rule at src/isa/s390x/lower.isle line 1283.
-                            return Some(v814);
-                        }
-                        if v3 == I128 {
-                            let v50 = C::put_in_reg(ctx, v48);
-                            let v815 = constructor_vec_ctz(ctx, I64X2, v50);
-                            let v771 = constructor_vec_imm(ctx, I64X2, 0x0);
-                            let v816 =
-                                constructor_vec_permute_dw_imm(ctx, I64X2, v771, 0x0, v815, 0x0);
-                            let v817 =
-                                constructor_vec_permute_dw_imm(ctx, I64X2, v771, 0x0, v815, 0x1);
-                            let v818 = constructor_vec_add(ctx, I64X2, v816, v817);
-                            let v776 = constructor_vec_imm_splat(ctx, I64X2, 0x40);
-                            let v819 = constructor_vec_cmpeq(ctx, I64X2, v817, v776);
-                            let v820 = constructor_vec_select(ctx, I128, v818, v817, v819);
-                            let v821 = constructor_output_reg(ctx, v820);
-                            // Rule at src/isa/s390x/lower.isle line 1290.
-                            return Some(v821);
-                        }
-                    }
-                }
-                &Opcode::Bswap => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v50 = C::put_in_reg(ctx, v48);
-                        let v3 = C::value_type(ctx, v2);
-                        let v764 = constructor_bitrev_bytes(ctx, v3, v50);
-                        let v765 = constructor_output_reg(ctx, v764);
-                        // Rule at src/isa/s390x/lower.isle line 1181.
-                        return Some(v765);
-                    }
-                }
-                &Opcode::Popcnt => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v149 = C::ty_vec128(ctx, v3);
-                        if let Some(v150) = v149 {
-                            let v50 = C::put_in_reg(ctx, v48);
-                            let v850 = constructor_vec_popcnt(ctx, v150, v50);
-                            let v851 = constructor_output_reg(ctx, v850);
-                            // Rule at src/isa/s390x/lower.isle line 1338.
-                            return Some(v851);
-                        }
-                        match v3 {
-                            I8 => {
-                                let v50 = C::put_in_reg(ctx, v48);
-                                let v822 = constructor_popcnt_byte(ctx, v50);
-                                let v823 = constructor_output_reg(ctx, v822);
-                                // Rule at src/isa/s390x/lower.isle line 1303.
-                                return Some(v823);
-                            }
-                            I16 => {
-                                let v628 = C::mie2_disabled(ctx, v3);
-                                if let Some(v629) = v628 {
-                                    let v50 = C::put_in_reg(ctx, v48);
-                                    let v822 = constructor_popcnt_byte(ctx, v50);
-                                    let v827 = constructor_lshr_imm(ctx, I32, v822, 0x8);
-                                    let v828 = constructor_add_reg(ctx, I32, v822, v827);
-                                    let v830 = C::uimm16shifted(ctx, 0xFF, 0x0);
-                                    let v831 = constructor_and_uimm16shifted(ctx, I32, v828, v830);
-                                    let v832 = constructor_output_reg(ctx, v831);
-                                    // Rule at src/isa/s390x/lower.isle line 1319.
-                                    return Some(v832);
-                                }
-                            }
-                            I32 => {
-                                let v628 = C::mie2_disabled(ctx, v3);
-                                if let Some(v629) = v628 {
-                                    let v50 = C::put_in_reg(ctx, v48);
-                                    let v822 = constructor_popcnt_byte(ctx, v50);
-                                    let v834 = constructor_lshl_imm(ctx, I32, v822, 0x10);
-                                    let v835 = constructor_add_reg(ctx, I32, v822, v834);
-                                    let v836 = constructor_lshl_imm(ctx, I32, v835, 0x8);
-                                    let v837 = constructor_add_reg(ctx, I32, v835, v836);
-                                    let v839 = constructor_lshr_imm(ctx, I32, v837, 0x18);
-                                    let v840 = constructor_output_reg(ctx, v839);
-                                    // Rule at src/isa/s390x/lower.isle line 1324.
-                                    return Some(v840);
-                                }
-                            }
-                            I64 => {
-                                let v628 = C::mie2_disabled(ctx, v3);
-                                if let Some(v629) = v628 {
-                                    let v50 = C::put_in_reg(ctx, v48);
-                                    let v822 = constructor_popcnt_byte(ctx, v50);
-                                    let v841 = constructor_lshl_imm(ctx, I64, v822, 0x20);
-                                    let v842 = constructor_add_reg(ctx, I64, v822, v841);
-                                    let v843 = constructor_lshl_imm(ctx, I64, v842, 0x10);
-                                    let v844 = constructor_add_reg(ctx, I64, v842, v843);
-                                    let v845 = constructor_lshl_imm(ctx, I64, v844, 0x8);
-                                    let v846 = constructor_add_reg(ctx, I64, v844, v845);
-                                    let v848 = constructor_lshr_imm(ctx, I64, v846, 0x38);
-                                    let v849 = constructor_output_reg(ctx, v848);
-                                    // Rule at src/isa/s390x/lower.isle line 1330.
-                                    return Some(v849);
-                                }
-                            }
-                            I128 => {
-                                let v50 = C::put_in_reg(ctx, v48);
-                                let v852 = constructor_vec_popcnt(ctx, I64X2, v50);
-                                let v771 = constructor_vec_imm(ctx, I64X2, 0x0);
-                                let v853 = constructor_vec_permute_dw_imm(
-                                    ctx, I64X2, v771, 0x0, v852, 0x0,
-                                );
-                                let v854 = constructor_vec_permute_dw_imm(
-                                    ctx, I64X2, v771, 0x0, v852, 0x1,
-                                );
-                                let v855 = constructor_vec_add(ctx, I64X2, v853, v854);
-                                let v856 = constructor_output_reg(ctx, v855);
-                                // Rule at src/isa/s390x/lower.isle line 1342.
-                                return Some(v856);
-                            }
-                            _ => {}
-                        }
-                        let v61 = C::fits_in_64(ctx, v3);
-                        if let Some(v62) = v61 {
-                            let v624 = C::mie2_enabled(ctx, v3);
-                            if let Some(v625) = v624 {
-                                let v581 = constructor_put_in_reg_zext64(ctx, v48);
-                                let v824 = constructor_popcnt_reg(ctx, v581);
-                                let v825 = constructor_output_reg(ctx, v824);
-                                // Rule at src/isa/s390x/lower.isle line 1308.
-                                return Some(v825);
-                            }
-                        }
-                    }
-                }
-                &Opcode::Sqrt => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v50 = C::put_in_reg(ctx, v48);
-                        let v3 = C::value_type(ctx, v2);
-                        let v893 = constructor_sqrt_reg(ctx, v3, v50);
-                        let v894 = constructor_output_reg(ctx, v893);
-                        // Rule at src/isa/s390x/lower.isle line 1429.
-                        return Some(v894);
-                    }
-                }
-                &Opcode::Fneg => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v50 = C::put_in_reg(ctx, v48);
-                        let v3 = C::value_type(ctx, v2);
-                        let v895 = constructor_fneg_reg(ctx, v3, v50);
-                        let v896 = constructor_output_reg(ctx, v895);
-                        // Rule at src/isa/s390x/lower.isle line 1436.
-                        return Some(v896);
-                    }
-                }
-                &Opcode::Fabs => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v50 = C::put_in_reg(ctx, v48);
-                        let v3 = C::value_type(ctx, v2);
-                        let v897 = constructor_fabs_reg(ctx, v3, v50);
-                        let v898 = constructor_output_reg(ctx, v897);
-                        // Rule at src/isa/s390x/lower.isle line 1443.
-                        return Some(v898);
-                    }
-                }
-                &Opcode::Ceil => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v50 = C::put_in_reg(ctx, v48);
-                        let v3 = C::value_type(ctx, v2);
-                        let v899 = constructor_ceil_reg(ctx, v3, v50);
-                        let v900 = constructor_output_reg(ctx, v899);
-                        // Rule at src/isa/s390x/lower.isle line 1450.
-                        return Some(v900);
-                    }
-                }
-                &Opcode::Floor => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v50 = C::put_in_reg(ctx, v48);
-                        let v3 = C::value_type(ctx, v2);
-                        let v901 = constructor_floor_reg(ctx, v3, v50);
-                        let v902 = constructor_output_reg(ctx, v901);
-                        // Rule at src/isa/s390x/lower.isle line 1457.
-                        return Some(v902);
-                    }
-                }
-                &Opcode::Trunc => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v50 = C::put_in_reg(ctx, v48);
-                        let v3 = C::value_type(ctx, v2);
-                        let v903 = constructor_trunc_reg(ctx, v3, v50);
-                        let v904 = constructor_output_reg(ctx, v903);
-                        // Rule at src/isa/s390x/lower.isle line 1464.
-                        return Some(v904);
-                    }
-                }
-                &Opcode::Nearest => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v50 = C::put_in_reg(ctx, v48);
-                        let v3 = C::value_type(ctx, v2);
-                        let v905 = constructor_nearest_reg(ctx, v3, v50);
-                        let v906 = constructor_output_reg(ctx, v905);
-                        // Rule at src/isa/s390x/lower.isle line 1471.
-                        return Some(v906);
-                    }
-                }
-                &Opcode::IsNull => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        if v3 == I8 {
-                            let v49 = C::value_type(ctx, v48);
-                            if v49 == R64 {
-                                let v50 = C::put_in_reg(ctx, v48);
-                                let v1878 = &constructor_icmps_simm16(ctx, I64, v50, 0x0);
-                                let v1880 = &C::intcc_as_cond(ctx, &IntCC::Equal);
-                                let v1881 = &constructor_bool(ctx, v1878, v1880);
-                                let v1882 = constructor_lower_bool(ctx, I8, v1881);
-                                let v1883 = constructor_output_reg(ctx, v1882);
-                                // Rule at src/isa/s390x/lower.isle line 3687.
-                                return Some(v1883);
-                            }
-                        }
-                    }
-                }
-                &Opcode::IsInvalid => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        if v3 == I8 {
-                            let v49 = C::value_type(ctx, v48);
-                            if v49 == R64 {
-                                let v50 = C::put_in_reg(ctx, v48);
-                                let v1884 = &constructor_icmps_simm16(ctx, I64, v50, -0x1);
-                                let v1880 = &C::intcc_as_cond(ctx, &IntCC::Equal);
-                                let v1885 = &constructor_bool(ctx, v1884, v1880);
-                                let v1886 = constructor_lower_bool(ctx, I8, v1885);
-                                let v1887 = constructor_output_reg(ctx, v1886);
-                                // Rule at src/isa/s390x/lower.isle line 3693.
-                                return Some(v1887);
-                            }
-                        }
-                    }
-                }
-                &Opcode::ScalarToVector => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v1201 = C::sinkable_inst(ctx, v48);
-                        if let Some(v1202) = v1201 {
-                            let v1203 = &C::inst_data(ctx, v1202);
-                            if let &InstructionData::Load {
-                                opcode: ref v1204,
-                                arg: v1205,
-                                flags: v1206,
-                                offset: v1207,
-                            } = v1203
-                            {
-                                if let &Opcode::Load = v1204 {
-                                    let v1213 = C::littleendian(ctx, v1206);
-                                    if let Some(v1214) = v1213 {
-                                        let v3 = C::value_type(ctx, v2);
-                                        let v1217 = constructor_vec_imm(ctx, v3, 0x0);
-                                        let v1231 = &constructor_sink_load(ctx, v1202);
-                                        let v1218 = C::be_lane_idx(ctx, v3, 0x0);
-                                        let v1234 = constructor_vec_load_lane_little(
-                                            ctx, v3, v1217, v1231, v1218,
-                                        );
-                                        let v1235 = constructor_output_reg(ctx, v1234);
-                                        // Rule at src/isa/s390x/lower.isle line 2024.
-                                        return Some(v1235);
-                                    }
-                                    let v1208 = C::bigendian(ctx, v1206);
-                                    if let Some(v1209) = v1208 {
-                                        let v3 = C::value_type(ctx, v2);
-                                        let v1217 = constructor_vec_imm(ctx, v3, 0x0);
-                                        let v1231 = &constructor_sink_load(ctx, v1202);
-                                        let v1218 = C::be_lane_idx(ctx, v3, 0x0);
-                                        let v1232 =
-                                            constructor_vec_load_lane(ctx, v3, v1217, v1231, v1218);
-                                        let v1233 = constructor_output_reg(ctx, v1232);
-                                        // Rule at src/isa/s390x/lower.isle line 2020.
-                                        return Some(v1233);
-                                    }
-                                }
-                            }
-                        }
-                        let v1197 = C::i16_from_value(ctx, v48);
-                        if let Some(v1198) = v1197 {
-                            let v3 = C::value_type(ctx, v2);
-                            let v1217 = constructor_vec_imm(ctx, v3, 0x0);
-                            let v1228 = C::be_lane_idx(ctx, v3, 0x0);
-                            let v1229 =
-                                constructor_vec_insert_lane_imm(ctx, v3, v1217, v1198, v1228);
-                            let v1230 = constructor_output_reg(ctx, v1229);
-                            // Rule at src/isa/s390x/lower.isle line 2016.
-                            return Some(v1230);
-                        }
-                        let v260 = C::def_inst(ctx, v48);
-                        if let Some(v261) = v260 {
-                            let v262 = &C::inst_data(ctx, v261);
-                            if let &InstructionData::BinaryImm8 {
-                                opcode: ref v1189,
-                                arg: v1190,
-                                imm: v1191,
-                            } = v262
-                            {
-                                if let &Opcode::Extractlane = v1189 {
-                                    let v3 = C::value_type(ctx, v2);
-                                    let v1221 = C::be_lane_idx(ctx, v3, 0x0);
-                                    let v1224 = C::put_in_reg(ctx, v1190);
-                                    let v1192 = C::u8_from_uimm8(ctx, v1191);
-                                    let v1225 = C::be_lane_idx(ctx, v3, v1192);
-                                    let v1226 = constructor_vec_move_lane_and_zero(
-                                        ctx, v3, v1221, v1224, v1225,
-                                    );
-                                    let v1227 = constructor_output_reg(ctx, v1226);
-                                    // Rule at src/isa/s390x/lower.isle line 2011.
-                                    return Some(v1227);
-                                }
-                            }
-                        }
-                        let v49 = C::value_type(ctx, v48);
-                        let v1180 = C::ty_int_ref_scalar_64(ctx, v49);
-                        if let Some(v1181) = v1180 {
-                            let v3 = C::value_type(ctx, v2);
-                            let v1217 = constructor_vec_imm(ctx, v3, 0x0);
-                            let v274 = C::put_in_reg(ctx, v48);
-                            let v1218 = C::be_lane_idx(ctx, v3, 0x0);
-                            let v56 = C::zero_reg(ctx);
-                            let v1219 =
-                                constructor_vec_insert_lane(ctx, v3, v1217, v274, v1218, v56);
-                            let v1220 = constructor_output_reg(ctx, v1219);
-                            // Rule at src/isa/s390x/lower.isle line 2000.
-                            return Some(v1220);
-                        }
-                        let v1185 = C::ty_scalar_float(ctx, v49);
-                        if let Some(v1186) = v1185 {
-                            let v3 = C::value_type(ctx, v2);
-                            let v1221 = C::be_lane_idx(ctx, v3, 0x0);
-                            let v274 = C::put_in_reg(ctx, v48);
-                            let v1222 =
-                                constructor_vec_move_lane_and_zero(ctx, v3, v1221, v274, 0x0);
-                            let v1223 = constructor_output_reg(ctx, v1222);
-                            // Rule at src/isa/s390x/lower.isle line 2006.
-                            return Some(v1223);
-                        }
-                    }
-                }
-                &Opcode::Bmask => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v751 = &constructor_value_nonzero(ctx, v48);
-                        let v3 = C::value_type(ctx, v2);
-                        let v752 = constructor_lower_bool_to_mask(ctx, v3, v751);
-                        let v753 = constructor_output_reg(ctx, v752);
-                        // Rule at src/isa/s390x/lower.isle line 1140.
-                        return Some(v753);
-                    }
-                }
-                &Opcode::Ireduce => {
-                    let v49 = C::value_type(ctx, v48);
-                    let v568 = C::fits_in_64(ctx, v49);
-                    if let Some(v569) = v568 {
-                        let v570 = constructor_output_value(ctx, v48);
-                        // Rule at src/isa/s390x/lower.isle line 880.
-                        return Some(v570);
-                    }
-                    let v571 = C::vr128_ty(ctx, v49);
-                    if let Some(v572) = v571 {
-                        let v50 = C::put_in_reg(ctx, v48);
-                        let v53 = C::zero_reg(ctx);
-                        let v573 = constructor_vec_extract_lane(ctx, I64X2, v50, 0x1, v53);
-                        let v574 = constructor_output_reg(ctx, v573);
-                        // Rule at src/isa/s390x/lower.isle line 884.
-                        return Some(v574);
-                    }
-                }
-                &Opcode::SwidenLow => {
-                    let v49 = C::value_type(ctx, v48);
-                    let v614 = C::ty_vec128(ctx, v49);
-                    if let Some(v615) = v614 {
-                        let v50 = C::put_in_reg(ctx, v48);
-                        let v616 = constructor_vec_unpacks_low_lane_order(ctx, v615, v50);
-                        let v617 = constructor_output_reg(ctx, v616);
-                        // Rule at src/isa/s390x/lower.isle line 946.
-                        return Some(v617);
-                    }
-                }
-                &Opcode::SwidenHigh => {
-                    let v49 = C::value_type(ctx, v48);
-                    let v614 = C::ty_vec128(ctx, v49);
-                    if let Some(v615) = v614 {
-                        let v50 = C::put_in_reg(ctx, v48);
-                        let v618 = constructor_vec_unpacks_high_lane_order(ctx, v615, v50);
-                        let v619 = constructor_output_reg(ctx, v618);
-                        // Rule at src/isa/s390x/lower.isle line 952.
-                        return Some(v619);
-                    }
-                }
-                &Opcode::UwidenLow => {
-                    let v49 = C::value_type(ctx, v48);
-                    let v614 = C::ty_vec128(ctx, v49);
-                    if let Some(v615) = v614 {
-                        let v50 = C::put_in_reg(ctx, v48);
-                        let v620 = constructor_vec_unpacku_low_lane_order(ctx, v615, v50);
-                        let v621 = constructor_output_reg(ctx, v620);
-                        // Rule at src/isa/s390x/lower.isle line 958.
-                        return Some(v621);
-                    }
-                }
-                &Opcode::UwidenHigh => {
-                    let v49 = C::value_type(ctx, v48);
-                    let v614 = C::ty_vec128(ctx, v49);
-                    if let Some(v615) = v614 {
-                        let v50 = C::put_in_reg(ctx, v48);
-                        let v622 = constructor_vec_unpacku_high_lane_order(ctx, v615, v50);
-                        let v623 = constructor_output_reg(ctx, v622);
-                        // Rule at src/isa/s390x/lower.isle line 964.
-                        return Some(v623);
-                    }
-                }
-                &Opcode::Uextend => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v579 = C::gpr64_ty(ctx, v3);
-                        if let Some(v580) = v579 {
-                            let v581 = constructor_put_in_reg_zext64(ctx, v48);
-                            let v582 = constructor_output_reg(ctx, v581);
-                            // Rule at src/isa/s390x/lower.isle line 895.
-                            return Some(v582);
-                        }
-                        let v575 = C::gpr32_ty(ctx, v3);
-                        if let Some(v576) = v575 {
-                            let v577 = constructor_put_in_reg_zext32(ctx, v48);
-                            let v578 = constructor_output_reg(ctx, v577);
-                            // Rule at src/isa/s390x/lower.isle line 891.
-                            return Some(v578);
-                        }
-                        if v3 == I128 {
-                            let v49 = C::value_type(ctx, v48);
-                            match v49 {
-                                I8 => {
-                                    let v273 = constructor_vec_imm(ctx, I128, 0x0);
-                                    let v274 = C::put_in_reg(ctx, v48);
-                                    let v584 = C::zero_reg(ctx);
-                                    let v585 = constructor_vec_insert_lane(
-                                        ctx, I8X16, v273, v274, 0xF, v584,
-                                    );
-                                    let v586 = constructor_output_reg(ctx, v585);
-                                    // Rule at src/isa/s390x/lower.isle line 899.
-                                    return Some(v586);
-                                }
-                                I16 => {
-                                    let v273 = constructor_vec_imm(ctx, I128, 0x0);
-                                    let v274 = C::put_in_reg(ctx, v48);
-                                    let v584 = C::zero_reg(ctx);
-                                    let v588 = constructor_vec_insert_lane(
-                                        ctx, I16X8, v273, v274, 0x7, v584,
-                                    );
-                                    let v589 = constructor_output_reg(ctx, v588);
-                                    // Rule at src/isa/s390x/lower.isle line 901.
-                                    return Some(v589);
-                                }
-                                I32 => {
-                                    let v273 = constructor_vec_imm(ctx, I128, 0x0);
-                                    let v274 = C::put_in_reg(ctx, v48);
-                                    let v584 = C::zero_reg(ctx);
-                                    let v591 = constructor_vec_insert_lane(
-                                        ctx, I32X4, v273, v274, 0x3, v584,
-                                    );
-                                    let v592 = constructor_output_reg(ctx, v591);
-                                    // Rule at src/isa/s390x/lower.isle line 903.
-                                    return Some(v592);
-                                }
-                                I64 => {
-                                    let v273 = constructor_vec_imm(ctx, I128, 0x0);
-                                    let v274 = C::put_in_reg(ctx, v48);
-                                    let v584 = C::zero_reg(ctx);
-                                    let v593 = constructor_vec_insert_lane(
-                                        ctx, I64X2, v273, v274, 0x1, v584,
-                                    );
-                                    let v594 = constructor_output_reg(ctx, v593);
-                                    // Rule at src/isa/s390x/lower.isle line 905.
-                                    return Some(v594);
-                                }
-                                _ => {}
-                            }
-                        }
-                    }
-                }
-                &Opcode::Sextend => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v579 = C::gpr64_ty(ctx, v3);
-                        if let Some(v580) = v579 {
-                            let v597 = constructor_put_in_reg_sext64(ctx, v48);
-                            let v598 = constructor_output_reg(ctx, v597);
-                            // Rule at src/isa/s390x/lower.isle line 916.
-                            return Some(v598);
-                        }
-                        let v575 = C::gpr32_ty(ctx, v3);
-                        if let Some(v576) = v575 {
-                            let v595 = constructor_put_in_reg_sext32(ctx, v48);
-                            let v596 = constructor_output_reg(ctx, v595);
-                            // Rule at src/isa/s390x/lower.isle line 912.
-                            return Some(v596);
-                        }
-                        if v3 == I128 {
-                            let v597 = constructor_put_in_reg_sext64(ctx, v48);
-                            let v600 = constructor_ashr_imm(ctx, I64, v597, 0x3F);
-                            let v601 = constructor_mov_to_vec128(ctx, I128, v600, v597);
-                            let v602 = constructor_output_reg(ctx, v601);
-                            // Rule at src/isa/s390x/lower.isle line 920.
-                            return Some(v602);
-                        }
-                    }
-                }
-                &Opcode::Fpromote => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v61 = C::fits_in_64(ctx, v3);
-                        if let Some(v62) = v61 {
-                            let v50 = C::put_in_reg(ctx, v48);
-                            let v49 = C::value_type(ctx, v48);
-                            let v907 = constructor_fpromote_reg(ctx, v62, v49, v50);
-                            let v908 = constructor_output_reg(ctx, v907);
-                            // Rule at src/isa/s390x/lower.isle line 1478.
-                            return Some(v908);
-                        }
-                    }
-                }
-                &Opcode::Fdemote => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v61 = C::fits_in_64(ctx, v3);
-                        if let Some(v62) = v61 {
-                            let v50 = C::put_in_reg(ctx, v48);
-                            let v49 = C::value_type(ctx, v48);
-                            let v913 =
-                                constructor_fdemote_reg(ctx, v62, v49, &FpuRoundMode::Current, v50);
-                            let v914 = constructor_output_reg(ctx, v913);
-                            // Rule at src/isa/s390x/lower.isle line 1492.
-                            return Some(v914);
-                        }
-                    }
-                }
-                &Opcode::Fvdemote => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        if v3 == F32X4 {
-                            let v49 = C::value_type(ctx, v48);
-                            if v49 == F64X2 {
-                                let v50 = C::put_in_reg(ctx, v48);
-                                let v915 = constructor_fdemote_reg(
-                                    ctx,
-                                    F32X4,
-                                    F64X2,
-                                    &FpuRoundMode::Current,
-                                    v50,
-                                );
-                                let v916 = constructor_vec_lshr_imm(ctx, I64X2, v915, 0x20);
-                                let v917 = constructor_vec_imm(ctx, I64X2, 0x0);
-                                let v918 = constructor_vec_pack_lane_order(ctx, I64X2, v916, v917);
-                                let v919 = constructor_output_reg(ctx, v918);
-                                // Rule at src/isa/s390x/lower.isle line 1499.
-                                return Some(v919);
-                            }
-                        }
-                    }
-                }
-                &Opcode::FvpromoteLow => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        if v3 == F64X2 {
-                            let v49 = C::value_type(ctx, v48);
-                            if v49 == F32X4 {
-                                let v50 = C::put_in_reg(ctx, v48);
-                                let v274 = C::put_in_reg(ctx, v48);
-                                let v909 =
-                                    constructor_vec_merge_low_lane_order(ctx, I32X4, v50, v274);
-                                let v910 = constructor_fpromote_reg(ctx, F64X2, F32X4, v909);
-                                let v911 = constructor_output_reg(ctx, v910);
-                                // Rule at src/isa/s390x/lower.isle line 1485.
-                                return Some(v911);
-                            }
-                        }
-                    }
-                }
-                &Opcode::FcvtToUint => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v61 = C::fits_in_64(ctx, v3);
-                        if let Some(v62) = v61 {
-                            let v50 = C::put_in_reg(ctx, v48);
-                            let v49 = C::value_type(ctx, v48);
-                            let v980 = &constructor_fcmp_reg(ctx, v49, v50, v50);
-                            let v982 = &C::floatcc_as_cond(ctx, &FloatCC::Unordered);
-                            let v983 = &C::trap_code_bad_conversion_to_integer(ctx);
-                            let v984 = constructor_trap_if(ctx, v980, v982, v983);
-                            let v985 = constructor_fcvt_to_uint_ub(ctx, v49, v62);
-                            let v986 = &constructor_fcmp_reg(ctx, v49, v50, v985);
-                            let v988 = &C::floatcc_as_cond(ctx, &FloatCC::GreaterThanOrEqual);
-                            let v989 = &C::trap_code_integer_overflow(ctx);
-                            let v990 = constructor_trap_if(ctx, v986, v988, v989);
-                            let v991 = constructor_fcvt_to_uint_lb(ctx, v49);
-                            let v992 = &constructor_fcmp_reg(ctx, v49, v50, v991);
-                            let v994 = &C::floatcc_as_cond(ctx, &FloatCC::LessThanOrEqual);
-                            let v995 = constructor_trap_if(ctx, v992, v994, v989);
-                            let v996 = constructor_fcvt_flt_ty(ctx, v62, v49);
-                            let v997 = constructor_fpromote_reg(ctx, v996, v49, v50);
-                            let v999 = constructor_fcvt_to_uint_reg(
-                                ctx,
-                                v996,
-                                &FpuRoundMode::ToZero,
-                                v997,
-                            );
-                            let v1000 = constructor_output_reg(ctx, v999);
-                            // Rule at src/isa/s390x/lower.isle line 1591.
-                            return Some(v1000);
-                        }
-                    }
-                }
-                &Opcode::FcvtToSint => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v61 = C::fits_in_64(ctx, v3);
-                        if let Some(v62) = v61 {
-                            let v50 = C::put_in_reg(ctx, v48);
-                            let v49 = C::value_type(ctx, v48);
-                            let v980 = &constructor_fcmp_reg(ctx, v49, v50, v50);
-                            let v982 = &C::floatcc_as_cond(ctx, &FloatCC::Unordered);
-                            let v983 = &C::trap_code_bad_conversion_to_integer(ctx);
-                            let v984 = constructor_trap_if(ctx, v980, v982, v983);
-                            let v1001 = constructor_fcvt_to_sint_ub(ctx, v49, v62);
-                            let v1002 = &constructor_fcmp_reg(ctx, v49, v50, v1001);
-                            let v988 = &C::floatcc_as_cond(ctx, &FloatCC::GreaterThanOrEqual);
-                            let v989 = &C::trap_code_integer_overflow(ctx);
-                            let v1003 = constructor_trap_if(ctx, v1002, v988, v989);
-                            let v1004 = constructor_fcvt_to_sint_lb(ctx, v49, v62);
-                            let v1005 = &constructor_fcmp_reg(ctx, v49, v50, v1004);
-                            let v994 = &C::floatcc_as_cond(ctx, &FloatCC::LessThanOrEqual);
-                            let v1006 = constructor_trap_if(ctx, v1005, v994, v989);
-                            let v996 = constructor_fcvt_flt_ty(ctx, v62, v49);
-                            let v997 = constructor_fpromote_reg(ctx, v996, v49, v50);
-                            let v1007 = constructor_fcvt_to_sint_reg(
-                                ctx,
-                                v996,
-                                &FpuRoundMode::ToZero,
-                                v997,
-                            );
-                            let v1008 = constructor_output_reg(ctx, v1007);
-                            // Rule at src/isa/s390x/lower.isle line 1615.
-                            return Some(v1008);
-                        }
-                    }
-                }
-                &Opcode::FcvtToUintSat => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            I32X4 => {
-                                let v49 = C::value_type(ctx, v48);
-                                if v49 == F32X4 {
-                                    let v933 = C::vxrs_ext2_enabled(ctx, v3);
-                                    if let Some(v934) = v933 {
-                                        let v50 = C::put_in_reg(ctx, v48);
-                                        let v1015 = constructor_fcvt_to_uint_reg(
-                                            ctx,
-                                            F32X4,
-                                            &FpuRoundMode::ToZero,
-                                            v50,
-                                        );
-                                        let v1016 = constructor_output_reg(ctx, v1015);
-                                        // Rule at src/isa/s390x/lower.isle line 1651.
-                                        return Some(v1016);
-                                    }
-                                    let v937 = C::vxrs_ext2_disabled(ctx, v3);
-                                    if let Some(v938) = v937 {
-                                        let v50 = C::put_in_reg(ctx, v48);
-                                        let v274 = C::put_in_reg(ctx, v48);
-                                        let v1017 =
-                                            constructor_vec_merge_high(ctx, I32X4, v50, v274);
-                                        let v1018 =
-                                            constructor_fpromote_reg(ctx, F64X2, F32X4, v1017);
-                                        let v1019 = constructor_fcvt_to_uint_reg(
-                                            ctx,
-                                            F64X2,
-                                            &FpuRoundMode::ToZero,
-                                            v1018,
-                                        );
-                                        let v1020 = C::put_in_reg(ctx, v48);
-                                        let v1021 = C::put_in_reg(ctx, v48);
-                                        let v1022 =
-                                            constructor_vec_merge_low(ctx, I32X4, v1020, v1021);
-                                        let v1023 =
-                                            constructor_fpromote_reg(ctx, F64X2, F32X4, v1022);
-                                        let v1024 = constructor_fcvt_to_uint_reg(
-                                            ctx,
-                                            F64X2,
-                                            &FpuRoundMode::ToZero,
-                                            v1023,
-                                        );
-                                        let v1025 =
-                                            constructor_vec_pack_usat(ctx, I64X2, v1019, v1024);
-                                        let v1026 = constructor_output_reg(ctx, v1025);
-                                        // Rule at src/isa/s390x/lower.isle line 1656.
-                                        return Some(v1026);
-                                    }
-                                }
-                            }
-                            I64X2 => {
-                                let v49 = C::value_type(ctx, v48);
-                                if v49 == F64X2 {
-                                    let v50 = C::put_in_reg(ctx, v48);
-                                    let v1027 = constructor_fcvt_to_uint_reg(
-                                        ctx,
-                                        F64X2,
-                                        &FpuRoundMode::ToZero,
-                                        v50,
-                                    );
-                                    let v1028 = constructor_output_reg(ctx, v1027);
-                                    // Rule at src/isa/s390x/lower.isle line 1665.
-                                    return Some(v1028);
-                                }
-                            }
-                            _ => {}
-                        }
-                        let v61 = C::fits_in_64(ctx, v3);
-                        if let Some(v62) = v61 {
-                            let v50 = C::put_in_reg(ctx, v48);
-                            let v49 = C::value_type(ctx, v48);
-                            let v1009 = constructor_fcvt_flt_ty(ctx, v62, v49);
-                            let v1010 = constructor_fcvt_int_ty(ctx, v62, v49);
-                            let v1011 = constructor_fpromote_reg(ctx, v1009, v49, v50);
-                            let v1012 = constructor_fcvt_to_uint_reg(
-                                ctx,
-                                v1009,
-                                &FpuRoundMode::ToZero,
-                                v1011,
-                            );
-                            let v1013 = constructor_uint_sat_reg(ctx, v62, v1010, v1012);
-                            let v1014 = constructor_output_reg(ctx, v1013);
-                            // Rule at src/isa/s390x/lower.isle line 1639.
-                            return Some(v1014);
-                        }
-                    }
-                }
-                &Opcode::FcvtToSintSat => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            I32X4 => {
-                                let v49 = C::value_type(ctx, v48);
-                                if v49 == F32X4 {
-                                    let v933 = C::vxrs_ext2_enabled(ctx, v3);
-                                    if let Some(v934) = v933 {
-                                        let v50 = C::put_in_reg(ctx, v48);
-                                        let v1037 = constructor_fcvt_to_sint_reg(
-                                            ctx,
-                                            F32X4,
-                                            &FpuRoundMode::ToZero,
-                                            v50,
-                                        );
-                                        let v1038 = constructor_vec_imm(ctx, I32X4, 0x0);
-                                        let v1039 = C::put_in_reg(ctx, v48);
-                                        let v942 = C::put_in_reg(ctx, v48);
-                                        let v1040 = constructor_vec_fcmpeq(ctx, F32X4, v1039, v942);
-                                        let v1041 =
-                                            constructor_vec_select(ctx, I32X4, v1037, v1038, v1040);
-                                        let v1042 = constructor_output_reg(ctx, v1041);
-                                        // Rule at src/isa/s390x/lower.isle line 1691.
-                                        return Some(v1042);
-                                    }
-                                    let v937 = C::vxrs_ext2_disabled(ctx, v3);
-                                    if let Some(v938) = v937 {
-                                        let v50 = C::put_in_reg(ctx, v48);
-                                        let v274 = C::put_in_reg(ctx, v48);
-                                        let v1017 =
-                                            constructor_vec_merge_high(ctx, I32X4, v50, v274);
-                                        let v1018 =
-                                            constructor_fpromote_reg(ctx, F64X2, F32X4, v1017);
-                                        let v1043 = constructor_fcvt_to_sint_reg(
-                                            ctx,
-                                            F64X2,
-                                            &FpuRoundMode::ToZero,
-                                            v1018,
-                                        );
-                                        let v1020 = C::put_in_reg(ctx, v48);
-                                        let v1021 = C::put_in_reg(ctx, v48);
-                                        let v1022 =
-                                            constructor_vec_merge_low(ctx, I32X4, v1020, v1021);
-                                        let v1023 =
-                                            constructor_fpromote_reg(ctx, F64X2, F32X4, v1022);
-                                        let v1044 = constructor_fcvt_to_sint_reg(
-                                            ctx,
-                                            F64X2,
-                                            &FpuRoundMode::ToZero,
-                                            v1023,
-                                        );
-                                        let v1045 =
-                                            constructor_vec_pack_ssat(ctx, I64X2, v1043, v1044);
-                                        let v1046 = constructor_vec_imm(ctx, I32X4, 0x0);
-                                        let v1047 = C::put_in_reg(ctx, v48);
-                                        let v1048 = C::put_in_reg(ctx, v48);
-                                        let v1049 =
-                                            constructor_vec_fcmpeq(ctx, F32X4, v1047, v1048);
-                                        let v1050 =
-                                            constructor_vec_select(ctx, I32X4, v1045, v1046, v1049);
-                                        let v1051 = constructor_output_reg(ctx, v1050);
-                                        // Rule at src/isa/s390x/lower.isle line 1699.
-                                        return Some(v1051);
-                                    }
-                                }
-                            }
-                            I64X2 => {
-                                let v49 = C::value_type(ctx, v48);
-                                if v49 == F64X2 {
-                                    let v50 = C::put_in_reg(ctx, v48);
-                                    let v1052 = constructor_fcvt_to_sint_reg(
-                                        ctx,
-                                        F64X2,
-                                        &FpuRoundMode::ToZero,
-                                        v50,
-                                    );
-                                    let v771 = constructor_vec_imm(ctx, I64X2, 0x0);
-                                    let v1039 = C::put_in_reg(ctx, v48);
-                                    let v942 = C::put_in_reg(ctx, v48);
-                                    let v1053 = constructor_vec_fcmpeq(ctx, F64X2, v1039, v942);
-                                    let v1054 =
-                                        constructor_vec_select(ctx, I64X2, v1052, v771, v1053);
-                                    let v1055 = constructor_output_reg(ctx, v1054);
-                                    // Rule at src/isa/s390x/lower.isle line 1711.
-                                    return Some(v1055);
-                                }
-                            }
-                            _ => {}
-                        }
-                        let v61 = C::fits_in_64(ctx, v3);
-                        if let Some(v62) = v61 {
-                            let v50 = C::put_in_reg(ctx, v48);
-                            let v49 = C::value_type(ctx, v48);
-                            let v1009 = constructor_fcvt_flt_ty(ctx, v62, v49);
-                            let v1010 = constructor_fcvt_int_ty(ctx, v62, v49);
-                            let v1011 = constructor_fpromote_reg(ctx, v1009, v49, v50);
-                            let v1029 = constructor_fcvt_to_sint_reg(
-                                ctx,
-                                v1009,
-                                &FpuRoundMode::ToZero,
-                                v1011,
-                            );
-                            let v1030 = &constructor_fcmp_reg(ctx, v49, v50, v50);
-                            let v1031 = &C::floatcc_as_cond(ctx, &FloatCC::Unordered);
-                            let v1033 = &constructor_cmov_imm(ctx, v1010, v1031, 0x0, v1029);
-                            let v1034 = constructor_with_flags_reg(ctx, v1030, v1033);
-                            let v1035 = constructor_sint_sat_reg(ctx, v62, v1010, v1034);
-                            let v1036 = constructor_output_reg(ctx, v1035);
-                            // Rule at src/isa/s390x/lower.isle line 1672.
-                            return Some(v1036);
-                        }
-                    }
-                }
-                &Opcode::FcvtFromUint => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            F32 => {
-                                let v49 = C::value_type(ctx, v48);
-                                let v920 = C::vxrs_ext2_enabled(ctx, v49);
-                                if let Some(v921) = v920 {
-                                    let v922 = C::fits_in_32(ctx, v49);
-                                    if let Some(v923) = v922 {
-                                        let v577 = constructor_put_in_reg_zext32(ctx, v48);
-                                        let v925 = constructor_fcvt_from_uint_reg(
-                                            ctx,
-                                            F32,
-                                            &FpuRoundMode::ToNearestTiesToEven,
-                                            v577,
-                                        );
-                                        let v926 = constructor_output_reg(ctx, v925);
-                                        // Rule at src/isa/s390x/lower.isle line 1508.
-                                        return Some(v926);
-                                    }
-                                }
-                                let v568 = C::fits_in_64(ctx, v49);
-                                if let Some(v569) = v568 {
-                                    let v581 = constructor_put_in_reg_zext64(ctx, v48);
-                                    let v928 = constructor_fcvt_from_uint_reg(
-                                        ctx,
-                                        F64,
-                                        &FpuRoundMode::ShorterPrecision,
-                                        v581,
-                                    );
-                                    let v929 = constructor_fdemote_reg(
-                                        ctx,
-                                        F32,
-                                        F64,
-                                        &FpuRoundMode::ToNearestTiesToEven,
-                                        v928,
-                                    );
-                                    let v930 = constructor_output_reg(ctx, v929);
-                                    // Rule at src/isa/s390x/lower.isle line 1514.
-                                    return Some(v930);
-                                }
-                            }
-                            F64 => {
-                                let v49 = C::value_type(ctx, v48);
-                                let v568 = C::fits_in_64(ctx, v49);
-                                if let Some(v569) = v568 {
-                                    let v581 = constructor_put_in_reg_zext64(ctx, v48);
-                                    let v931 = constructor_fcvt_from_uint_reg(
-                                        ctx,
-                                        F64,
-                                        &FpuRoundMode::ToNearestTiesToEven,
-                                        v581,
-                                    );
-                                    let v932 = constructor_output_reg(ctx, v931);
-                                    // Rule at src/isa/s390x/lower.isle line 1520.
-                                    return Some(v932);
-                                }
-                            }
-                            F32X4 => {
-                                let v49 = C::value_type(ctx, v48);
-                                if v49 == I32X4 {
-                                    let v933 = C::vxrs_ext2_enabled(ctx, v3);
-                                    if let Some(v934) = v933 {
-                                        let v50 = C::put_in_reg(ctx, v48);
-                                        let v935 = constructor_fcvt_from_uint_reg(
-                                            ctx,
-                                            F32X4,
-                                            &FpuRoundMode::ToNearestTiesToEven,
-                                            v50,
-                                        );
-                                        let v936 = constructor_output_reg(ctx, v935);
-                                        // Rule at src/isa/s390x/lower.isle line 1525.
-                                        return Some(v936);
-                                    }
-                                    let v937 = C::vxrs_ext2_disabled(ctx, v3);
-                                    if let Some(v938) = v937 {
-                                        let v50 = C::put_in_reg(ctx, v48);
-                                        let v939 = constructor_vec_unpacku_high(ctx, I32X4, v50);
-                                        let v940 = constructor_fcvt_from_uint_reg(
-                                            ctx,
-                                            F64X2,
-                                            &FpuRoundMode::ShorterPrecision,
-                                            v939,
-                                        );
-                                        let v941 = constructor_fdemote_reg(
-                                            ctx,
-                                            F32X4,
-                                            F64X2,
-                                            &FpuRoundMode::ToNearestTiesToEven,
-                                            v940,
-                                        );
-                                        let v942 = C::put_in_reg(ctx, v48);
-                                        let v943 = constructor_vec_unpacku_low(ctx, I32X4, v942);
-                                        let v944 = constructor_fcvt_from_uint_reg(
-                                            ctx,
-                                            F64X2,
-                                            &FpuRoundMode::ShorterPrecision,
-                                            v943,
-                                        );
-                                        let v945 = constructor_fdemote_reg(
-                                            ctx,
-                                            F32X4,
-                                            F64X2,
-                                            &FpuRoundMode::ToNearestTiesToEven,
-                                            v944,
-                                        );
-                                        let v955 = constructor_imm8x16(
-                                            ctx, 0x0, 0x1, 0x2, 0x3, 0x8, 0x9, 0xA, 0xB, 0x10,
-                                            0x11, 0x12, 0x13, 0x18, 0x19, 0x1A, 0x1B,
-                                        );
-                                        let v956 = constructor_vec_imm(ctx, I8X16, v955);
-                                        let v957 =
-                                            constructor_vec_permute(ctx, F32X4, v941, v945, v956);
-                                        let v958 = constructor_output_reg(ctx, v957);
-                                        // Rule at src/isa/s390x/lower.isle line 1530.
-                                        return Some(v958);
-                                    }
-                                }
-                            }
-                            F64X2 => {
-                                let v49 = C::value_type(ctx, v48);
-                                if v49 == I64X2 {
-                                    let v50 = C::put_in_reg(ctx, v48);
-                                    let v959 = constructor_fcvt_from_uint_reg(
-                                        ctx,
-                                        F64X2,
-                                        &FpuRoundMode::ToNearestTiesToEven,
-                                        v50,
-                                    );
-                                    let v960 = constructor_output_reg(ctx, v959);
-                                    // Rule at src/isa/s390x/lower.isle line 1542.
-                                    return Some(v960);
-                                }
-                            }
-                            _ => {}
-                        }
-                    }
-                }
-                &Opcode::FcvtFromSint => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            F32 => {
-                                let v49 = C::value_type(ctx, v48);
-                                let v920 = C::vxrs_ext2_enabled(ctx, v49);
-                                if let Some(v921) = v920 {
-                                    let v922 = C::fits_in_32(ctx, v49);
-                                    if let Some(v923) = v922 {
-                                        let v595 = constructor_put_in_reg_sext32(ctx, v48);
-                                        let v961 = constructor_fcvt_from_sint_reg(
-                                            ctx,
-                                            F32,
-                                            &FpuRoundMode::ToNearestTiesToEven,
-                                            v595,
-                                        );
-                                        let v962 = constructor_output_reg(ctx, v961);
-                                        // Rule at src/isa/s390x/lower.isle line 1549.
-                                        return Some(v962);
-                                    }
-                                }
-                                let v568 = C::fits_in_64(ctx, v49);
-                                if let Some(v569) = v568 {
-                                    let v597 = constructor_put_in_reg_sext64(ctx, v48);
-                                    let v963 = constructor_fcvt_from_sint_reg(
-                                        ctx,
-                                        F64,
-                                        &FpuRoundMode::ShorterPrecision,
-                                        v597,
-                                    );
-                                    let v964 = constructor_fdemote_reg(
-                                        ctx,
-                                        F32,
-                                        F64,
-                                        &FpuRoundMode::ToNearestTiesToEven,
-                                        v963,
-                                    );
-                                    let v965 = constructor_output_reg(ctx, v964);
-                                    // Rule at src/isa/s390x/lower.isle line 1555.
-                                    return Some(v965);
-                                }
-                            }
-                            F64 => {
-                                let v49 = C::value_type(ctx, v48);
-                                let v568 = C::fits_in_64(ctx, v49);
-                                if let Some(v569) = v568 {
-                                    let v597 = constructor_put_in_reg_sext64(ctx, v48);
-                                    let v966 = constructor_fcvt_from_sint_reg(
-                                        ctx,
-                                        F64,
-                                        &FpuRoundMode::ToNearestTiesToEven,
-                                        v597,
-                                    );
-                                    let v967 = constructor_output_reg(ctx, v966);
-                                    // Rule at src/isa/s390x/lower.isle line 1561.
-                                    return Some(v967);
-                                }
-                            }
-                            F32X4 => {
-                                let v49 = C::value_type(ctx, v48);
-                                if v49 == I32X4 {
-                                    let v933 = C::vxrs_ext2_enabled(ctx, v3);
-                                    if let Some(v934) = v933 {
-                                        let v50 = C::put_in_reg(ctx, v48);
-                                        let v968 = constructor_fcvt_from_sint_reg(
-                                            ctx,
-                                            F32X4,
-                                            &FpuRoundMode::ToNearestTiesToEven,
-                                            v50,
-                                        );
-                                        let v969 = constructor_output_reg(ctx, v968);
-                                        // Rule at src/isa/s390x/lower.isle line 1566.
-                                        return Some(v969);
-                                    }
-                                    let v937 = C::vxrs_ext2_disabled(ctx, v3);
-                                    if let Some(v938) = v937 {
-                                        let v50 = C::put_in_reg(ctx, v48);
-                                        let v970 = constructor_vec_unpacks_high(ctx, I32X4, v50);
-                                        let v971 = constructor_fcvt_from_sint_reg(
-                                            ctx,
-                                            F64X2,
-                                            &FpuRoundMode::ShorterPrecision,
-                                            v970,
-                                        );
-                                        let v972 = constructor_fdemote_reg(
-                                            ctx,
-                                            F32X4,
-                                            F64X2,
-                                            &FpuRoundMode::ToNearestTiesToEven,
-                                            v971,
-                                        );
-                                        let v942 = C::put_in_reg(ctx, v48);
-                                        let v973 = constructor_vec_unpacks_low(ctx, I32X4, v942);
-                                        let v974 = constructor_fcvt_from_sint_reg(
-                                            ctx,
-                                            F64X2,
-                                            &FpuRoundMode::ShorterPrecision,
-                                            v973,
-                                        );
-                                        let v975 = constructor_fdemote_reg(
-                                            ctx,
-                                            F32X4,
-                                            F64X2,
-                                            &FpuRoundMode::ToNearestTiesToEven,
-                                            v974,
-                                        );
-                                        let v955 = constructor_imm8x16(
-                                            ctx, 0x0, 0x1, 0x2, 0x3, 0x8, 0x9, 0xA, 0xB, 0x10,
-                                            0x11, 0x12, 0x13, 0x18, 0x19, 0x1A, 0x1B,
-                                        );
-                                        let v956 = constructor_vec_imm(ctx, I8X16, v955);
-                                        let v976 =
-                                            constructor_vec_permute(ctx, F32X4, v972, v975, v956);
-                                        let v977 = constructor_output_reg(ctx, v976);
-                                        // Rule at src/isa/s390x/lower.isle line 1571.
-                                        return Some(v977);
-                                    }
-                                }
-                            }
-                            F64X2 => {
-                                let v49 = C::value_type(ctx, v48);
-                                if v49 == I64X2 {
-                                    let v50 = C::put_in_reg(ctx, v48);
-                                    let v978 = constructor_fcvt_from_sint_reg(
-                                        ctx,
-                                        F64X2,
-                                        &FpuRoundMode::ToNearestTiesToEven,
-                                        v50,
-                                    );
-                                    let v979 = constructor_output_reg(ctx, v978);
-                                    // Rule at src/isa/s390x/lower.isle line 1583.
-                                    return Some(v979);
-                                }
-                            }
-                            _ => {}
-                        }
-                    }
-                }
-                &Opcode::Isplit => {
-                    let v49 = C::value_type(ctx, v48);
-                    if v49 == I128 {
-                        let v50 = C::put_in_reg(ctx, v48);
-                        let v53 = C::zero_reg(ctx);
-                        let v54 = constructor_vec_extract_lane(ctx, I64X2, v50, 0x0, v53);
-                        let v56 = C::zero_reg(ctx);
-                        let v57 = constructor_vec_extract_lane(ctx, I64X2, v50, 0x1, v56);
-                        let v58 = C::value_reg(ctx, v57);
-                        let v59 = C::value_reg(ctx, v54);
-                        let v60 = C::output_pair(ctx, v58, v59);
-                        // Rule at src/isa/s390x/lower.isle line 57.
-                        return Some(v60);
-                    }
-                }
-                _ => {}
-            }
-        }
-        &InstructionData::UnaryConst {
-            opcode: ref v23,
-            constant_handle: v24,
-        } => {
-            if let &Opcode::Vconst = v23 {
-                let v1 = C::first_result(ctx, arg0);
-                if let Some(v2) = v1 {
-                    let v25 = C::u128_from_constant(ctx, v24);
-                    if let Some(v26) = v25 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v27 = C::be_vec_const(ctx, v3, v26);
-                        let v28 = constructor_vec_imm(ctx, v3, v27);
-                        let v29 = constructor_output_reg(ctx, v28);
-                        // Rule at src/isa/s390x/lower.isle line 33.
-                        return Some(v29);
-                    }
-                }
-            }
-        }
-        &InstructionData::UnaryGlobalValue {
-            opcode: ref v1469,
-            global_value: v1470,
-        } => {
-            match v1469 {
-                &Opcode::SymbolValue => {
-                    let v1471 = C::symbol_value_data(ctx, v1470);
-                    if let Some(v1472) = v1471 {
-                        let v1476 = C::reloc_distance_near(ctx, v1472.1);
-                        if let Some(v1477) = v1476 {
-                            let v1478 = constructor_memarg_symbol_offset(ctx, v1472.2);
-                            if let Some(v1479) = v1478 {
-                                let v1461 = C::memflags_trusted(ctx);
-                                let v1480 = &C::memarg_symbol(ctx, v1472.0, v1479, v1461);
-                                let v1481 = constructor_load_addr(ctx, v1480);
-                                let v1482 = constructor_output_reg(ctx, v1481);
-                                // Rule at src/isa/s390x/lower.isle line 2256.
-                                return Some(v1482);
-                            }
-                        }
-                        let v1483 = SymbolReloc::Absolute {
-                            name: v1472.0,
-                            offset: v1472.2,
-                        };
-                        let v1484 = constructor_load_symbol_reloc(ctx, &v1483);
-                        let v1485 = constructor_output_reg(ctx, v1484);
-                        // Rule at src/isa/s390x/lower.isle line 2262.
-                        return Some(v1485);
-                    }
-                }
-                &Opcode::TlsValue => {
-                    let v1471 = C::symbol_value_data(ctx, v1470);
-                    if let Some(v1472) = v1471 {
-                        if v1472.2 == 0x0 {
-                            let v1486 = C::tls_model_is_elf_gd(ctx);
-                            if let Some(v1487) = v1486 {
-                                let v1489 = &C::memarg_got(ctx);
-                                let v1490 = constructor_load_addr(ctx, v1489);
-                                let v1488 = SymbolReloc::TlsGd { name: v1472.0 };
-                                let v1491 = constructor_load_symbol_reloc(ctx, &v1488);
-                                let v1492 =
-                                    constructor_lib_call_tls_get_offset(ctx, v1490, v1491, &v1488);
-                                let v1493 = constructor_thread_pointer(ctx);
-                                let v1494 = constructor_add_reg(ctx, I64, v1492, v1493);
-                                let v1495 = constructor_output_reg(ctx, v1494);
-                                // Rule at src/isa/s390x/lower.isle line 2269.
-                                return Some(v1495);
-                            }
-                        }
-                    }
-                }
-                _ => {}
-            }
-        }
-        &InstructionData::UnaryIeee32 {
-            opcode: ref v10,
-            imm: v11,
-        } => {
-            if let &Opcode::F32const = v10 {
-                let v12 = C::u32_from_ieee32(ctx, v11);
-                let v14 = C::u32_as_u64(ctx, v12);
-                let v15 = constructor_imm(ctx, F32, v14);
-                let v16 = constructor_output_reg(ctx, v15);
-                // Rule at src/isa/s390x/lower.isle line 21.
-                return Some(v16);
-            }
-        }
-        &InstructionData::UnaryIeee64 {
-            opcode: ref v17,
-            imm: v18,
-        } => {
-            if let &Opcode::F64const = v17 {
-                let v19 = C::u64_from_ieee64(ctx, v18);
-                let v21 = constructor_imm(ctx, F64, v19);
-                let v22 = constructor_output_reg(ctx, v21);
-                // Rule at src/isa/s390x/lower.isle line 27.
-                return Some(v22);
-            }
-        }
-        &InstructionData::UnaryImm {
-            opcode: ref v5,
-            imm: v6,
-        } => {
-            if let &Opcode::Iconst = v5 {
-                let v1 = C::first_result(ctx, arg0);
-                if let Some(v2) = v1 {
-                    let v3 = C::value_type(ctx, v2);
-                    let v7 = C::u64_from_imm64(ctx, v6);
-                    let v8 = constructor_imm(ctx, v3, v7);
-                    let v9 = constructor_output_reg(ctx, v8);
-                    // Rule at src/isa/s390x/lower.isle line 15.
-                    return Some(v9);
-                }
-            }
-        }
-        _ => {}
-    }
-    None
-}
-
-// Generated as internal constructor for term lower_branch.
-pub fn constructor_lower_branch<C: Context>(
-    ctx: &mut C,
-    arg0: Inst,
-    arg1: &VecMachLabel,
-) -> Option<Unit> {
-    let v1 = &C::inst_data(ctx, arg0);
-    match v1 {
-        &InstructionData::BranchTable {
-            opcode: ref v9,
-            arg: v10,
-            table: v11,
-        } => {
-            if let &Opcode::BrTable = v9 {
-                let v12 = constructor_put_in_reg_zext64(ctx, v10);
-                let v14 = C::vec_length_minus1(ctx, arg1);
-                let v15 = &constructor_icmpu_uimm32(ctx, I64, v12, v14);
-                let v17 = &C::intcc_as_cond(ctx, &IntCC::UnsignedGreaterThanOrEqual);
-                let v18 = &constructor_bool(ctx, v15, v17);
-                let v19 = C::vec_element(ctx, arg1, 0x0);
-                let v20 = &constructor_oneway_cond_br_bool(ctx, v18, v19);
-                let v21 = constructor_emit_side_effect(ctx, v20);
-                let v23 = constructor_lshl_imm(ctx, I64, v12, 0x2);
-                let v24 = &constructor_jt_sequence(ctx, v23, arg1);
-                let v25 = constructor_emit_side_effect(ctx, v24);
-                // Rule at src/isa/s390x/lower.isle line 3746.
-                return Some(v25);
-            }
-        }
-        &InstructionData::Brif {
-            opcode: ref v26,
-            arg: v27,
-            blocks: ref v28,
-        } => {
-            if let &Opcode::Brif = v26 {
-                let v32 = &constructor_value_nonzero(ctx, v27);
-                let v33 = C::vec_element(ctx, arg1, 0x0);
-                let v35 = C::vec_element(ctx, arg1, 0x1);
-                let v36 = &constructor_cond_br_bool(ctx, v32, v33, v35);
-                let v37 = constructor_emit_side_effect(ctx, v36);
-                // Rule at src/isa/s390x/lower.isle line 3779.
-                return Some(v37);
-            }
-        }
-        &InstructionData::Jump {
-            opcode: ref v2,
-            destination: v3,
-        } => {
-            if let &Opcode::Jump = v2 {
-                let v6 = C::vec_element(ctx, arg1, 0x0);
-                let v7 = &constructor_jump_impl(ctx, v6);
-                let v8 = constructor_emit_side_effect(ctx, v7);
-                // Rule at src/isa/s390x/lower.isle line 3738.
-                return Some(v8);
-            }
-        }
-        _ => {}
-    }
-    None
-}
-
-// Generated as internal constructor for term vec_mul_impl.
-pub fn constructor_vec_mul_impl<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    match arg0 {
-        I128 => {
-            let v12 = C::zero_reg(ctx);
-            let v13 = constructor_vec_extract_lane(ctx, I64X2, arg1, 0x0, v12);
-            let v14 = C::zero_reg(ctx);
-            let v24 = constructor_vec_extract_lane(ctx, I64X2, arg1, 0x1, v14);
-            let v25 = C::zero_reg(ctx);
-            let v26 = constructor_vec_extract_lane(ctx, I64X2, arg2, 0x0, v25);
-            let v27 = C::zero_reg(ctx);
-            let v28 = constructor_vec_extract_lane(ctx, I64X2, arg2, 0x1, v27);
-            let v29 = constructor_umul_wide(ctx, v24, v28);
-            let v30 = C::regpair_lo(ctx, v29);
-            let v31 = C::regpair_hi(ctx, v29);
-            let v32 = constructor_mul_reg(ctx, I64, v24, v26);
-            let v33 = constructor_mul_reg(ctx, I64, v13, v28);
-            let v34 = constructor_add_reg(ctx, I64, v32, v31);
-            let v35 = constructor_add_reg(ctx, I64, v33, v34);
-            let v36 = constructor_mov_to_vec128(ctx, I64X2, v35, v30);
-            // Rule at src/isa/s390x/lower.isle line 405.
-            return v36;
-        }
-        I8X16 => {
-            let v4 = constructor_vec_mul(ctx, I8X16, arg1, arg2);
-            // Rule at src/isa/s390x/lower.isle line 392.
-            return v4;
-        }
-        I16X8 => {
-            let v6 = constructor_vec_mul(ctx, I16X8, arg1, arg2);
-            // Rule at src/isa/s390x/lower.isle line 393.
-            return v6;
-        }
-        I32X4 => {
-            let v8 = constructor_vec_mul(ctx, I32X4, arg1, arg2);
-            // Rule at src/isa/s390x/lower.isle line 394.
-            return v8;
-        }
-        I64X2 => {
-            let v12 = C::zero_reg(ctx);
-            let v13 = constructor_vec_extract_lane(ctx, I64X2, arg1, 0x0, v12);
-            let v14 = C::zero_reg(ctx);
-            let v15 = constructor_vec_extract_lane(ctx, I64X2, arg2, 0x0, v14);
-            let v16 = constructor_mul_reg(ctx, I64, v13, v15);
-            let v18 = C::zero_reg(ctx);
-            let v19 = constructor_vec_extract_lane(ctx, I64X2, arg1, 0x1, v18);
-            let v20 = C::zero_reg(ctx);
-            let v21 = constructor_vec_extract_lane(ctx, I64X2, arg2, 0x1, v20);
-            let v22 = constructor_mul_reg(ctx, I64, v19, v21);
-            let v23 = constructor_mov_to_vec128(ctx, I64X2, v16, v22);
-            // Rule at src/isa/s390x/lower.isle line 397.
-            return v23;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_mul_impl", "src/isa/s390x/lower.isle line 387"
-    )
-}
-
-// Generated as internal constructor for term sqmul_impl.
-pub fn constructor_sqmul_impl<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg) -> Reg {
-    match arg0 {
-        I32X4 => {
-            let v4 = constructor_vec_mul_impl(ctx, I32X4, arg1, arg2);
-            let v6 = constructor_vec_imm_bit_mask(ctx, I32X4, 0x11, 0x11);
-            let v7 = constructor_vec_add(ctx, I32X4, v4, v6);
-            let v9 = constructor_vec_ashr_imm(ctx, I32X4, v7, 0xF);
-            // Rule at src/isa/s390x/lower.isle line 509.
-            return v9;
-        }
-        I64X2 => {
-            let v11 = constructor_vec_mul_impl(ctx, I64X2, arg1, arg2);
-            let v13 = constructor_vec_imm_bit_mask(ctx, I64X2, 0x21, 0x21);
-            let v14 = constructor_vec_add(ctx, I64X2, v11, v13);
-            let v16 = constructor_vec_ashr_imm(ctx, I64X2, v14, 0x1F);
-            // Rule at src/isa/s390x/lower.isle line 513.
-            return v16;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "sqmul_impl", "src/isa/s390x/lower.isle line 508"
-    )
-}
-
-// Generated as internal constructor for term div_overflow_check_needed.
-pub fn constructor_div_overflow_check_needed<C: Context>(ctx: &mut C, arg0: Value) -> bool {
-    let v1 = C::i64_from_value(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v3 = constructor_i64_not_neg1(ctx, v2);
-        if let Some(v4) = v3 {
-            // Rule at src/isa/s390x/lower.isle line 624.
-            return false;
-        }
-    }
-    // Rule at src/isa/s390x/lower.isle line 627.
-    return true;
-}
-
-// Generated as internal constructor for term maybe_trap_if_sdiv_overflow.
-pub fn constructor_maybe_trap_if_sdiv_overflow<C: Context>(
-    ctx: &mut C,
-    arg0: bool,
-    arg1: Type,
-    arg2: Type,
-    arg3: Reg,
-    arg4: Reg,
-) -> Reg {
-    match arg0 {
-        true => {
-            let v6 = constructor_int_max(ctx, arg2);
-            let v7 = constructor_imm(ctx, arg1, v6);
-            let v8 = constructor_xor_reg(ctx, arg1, v7, arg3);
-            let v9 = constructor_and_reg(ctx, arg1, v8, arg4);
-            let v12 = &C::intcc_as_cond(ctx, &IntCC::Equal);
-            let v13 = &C::trap_code_integer_overflow(ctx);
-            let v14 = constructor_icmps_simm16_and_trap(ctx, arg1, v9, -0x1, v12, v13);
-            // Rule at src/isa/s390x/lower.isle line 640.
-            return v14;
-        }
-        false => {
-            let v5 = C::invalid_reg(ctx);
-            // Rule at src/isa/s390x/lower.isle line 639.
-            return v5;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "maybe_trap_if_sdiv_overflow", "src/isa/s390x/lower.isle line 638"
-    )
-}
-
-// Generated as internal constructor for term int_max.
-pub fn constructor_int_max<C: Context>(ctx: &mut C, arg0: Type) -> u64 {
-    match arg0 {
-        I8 => {
-            // Rule at src/isa/s390x/lower.isle line 647.
-            return 0x7F;
-        }
-        I16 => {
-            // Rule at src/isa/s390x/lower.isle line 648.
-            return 0x7FFF;
-        }
-        I32 => {
-            // Rule at src/isa/s390x/lower.isle line 649.
-            return 0x7FFFFFFF;
-        }
-        I64 => {
-            // Rule at src/isa/s390x/lower.isle line 650.
-            return 0x7FFFFFFFFFFFFFFF;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "int_max", "src/isa/s390x/lower.isle line 646"
-    )
-}
-
-// Generated as internal constructor for term maybe_avoid_srem_overflow.
-pub fn constructor_maybe_avoid_srem_overflow<C: Context>(
-    ctx: &mut C,
-    arg0: bool,
-    arg1: Type,
-    arg2: Reg,
-    arg3: Reg,
-) -> Reg {
-    match arg0 {
-        true => {
-            match arg1 {
-                I32 => {
-                    // Rule at src/isa/s390x/lower.isle line 668.
-                    return arg2;
-                }
-                I64 => {
-                    let v6 = &constructor_icmps_simm16(ctx, I64, arg3, -0x1);
-                    let v8 = &C::intcc_as_cond(ctx, &IntCC::Equal);
-                    let v10 = &constructor_cmov_imm(ctx, I64, v8, 0x0, arg2);
-                    let v11 = constructor_with_flags_reg(ctx, v6, v10);
-                    // Rule at src/isa/s390x/lower.isle line 669.
-                    return v11;
-                }
-                _ => {}
-            }
-        }
-        false => {
-            // Rule at src/isa/s390x/lower.isle line 667.
-            return arg2;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "maybe_avoid_srem_overflow", "src/isa/s390x/lower.isle line 666"
-    )
-}
-
-// Generated as internal constructor for term bitrev_bits.
-pub fn constructor_bitrev_bits<C: Context>(
-    ctx: &mut C,
-    arg0: u8,
-    arg1: u64,
-    arg2: Type,
-    arg3: Reg,
-) -> Reg {
-    let v3 = C::fits_in_64(ctx, arg2);
-    if let Some(v4) = v3 {
-        let v6 = constructor_imm(ctx, v4, arg1);
-        let v7 = constructor_ty_ext32(ctx, v4);
-        let v8 = constructor_lshl_imm(ctx, v7, arg3, arg0);
-        let v9 = constructor_ty_ext32(ctx, v4);
-        let v10 = constructor_lshr_imm(ctx, v9, arg3, arg0);
-        let v11 = constructor_and_reg(ctx, v4, v8, v6);
-        let v12 = constructor_not_reg(ctx, v4, v6);
-        let v13 = constructor_and_reg(ctx, v4, v10, v12);
-        let v14 = constructor_or_reg(ctx, v4, v11, v13);
-        // Rule at src/isa/s390x/lower.isle line 1153.
-        return v14;
-    }
-    let v15 = C::vr128_ty(ctx, arg2);
-    if let Some(v16) = v15 {
-        let v18 = constructor_vec_imm_splat(ctx, I64X2, arg1);
-        let v20 = C::u8_as_u64(ctx, arg0);
-        let v21 = constructor_vec_imm_splat(ctx, I8X16, v20);
-        let v22 = constructor_vec_lshl_by_bit(ctx, arg3, v21);
-        let v23 = constructor_vec_lshr_by_bit(ctx, arg3, v21);
-        let v24 = constructor_vec_select(ctx, v16, v22, v23, v18);
-        // Rule at src/isa/s390x/lower.isle line 1161.
-        return v24;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "bitrev_bits", "src/isa/s390x/lower.isle line 1152"
-    )
-}
-
-// Generated as internal constructor for term bitrev_bytes.
-pub fn constructor_bitrev_bytes<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
-    match arg0 {
-        I8 => {
-            // Rule at src/isa/s390x/lower.isle line 1169.
-            return arg1;
-        }
-        I16 => {
-            let v3 = constructor_bswap_reg(ctx, I32, arg1);
-            let v5 = constructor_lshr_imm(ctx, I32, v3, 0x10);
-            // Rule at src/isa/s390x/lower.isle line 1170.
-            return v5;
-        }
-        I32 => {
-            let v3 = constructor_bswap_reg(ctx, I32, arg1);
-            // Rule at src/isa/s390x/lower.isle line 1171.
-            return v3;
-        }
-        I64 => {
-            let v7 = constructor_bswap_reg(ctx, I64, arg1);
-            // Rule at src/isa/s390x/lower.isle line 1172.
-            return v7;
-        }
-        I128 => {
-            let v26 = constructor_imm8x16(
-                ctx, 0xF, 0xE, 0xD, 0xC, 0xB, 0xA, 0x9, 0x8, 0x7, 0x6, 0x5, 0x4, 0x3, 0x2, 0x1, 0x0,
-            );
-            let v27 = constructor_vec_imm(ctx, I8X16, v26);
-            let v28 = constructor_vec_permute(ctx, I128, arg1, arg1, v27);
-            // Rule at src/isa/s390x/lower.isle line 1173.
-            return v28;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "bitrev_bytes", "src/isa/s390x/lower.isle line 1168"
-    )
-}
-
-// Generated as internal constructor for term clz_offset.
-pub fn constructor_clz_offset<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
-    match arg0 {
-        I8 => {
-            let v4 = constructor_add_simm16(ctx, I8, arg1, -0x38);
-            // Rule at src/isa/s390x/lower.isle line 1190.
-            return v4;
-        }
-        I16 => {
-            let v7 = constructor_add_simm16(ctx, I16, arg1, -0x30);
-            // Rule at src/isa/s390x/lower.isle line 1191.
-            return v7;
-        }
-        I32 => {
-            let v10 = constructor_add_simm16(ctx, I32, arg1, -0x20);
-            // Rule at src/isa/s390x/lower.isle line 1192.
-            return v10;
-        }
-        I64 => {
-            // Rule at src/isa/s390x/lower.isle line 1193.
-            return arg1;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "clz_offset", "src/isa/s390x/lower.isle line 1189"
-    )
-}
-
-// Generated as internal constructor for term cls_offset.
-pub fn constructor_cls_offset<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Reg {
-    match arg0 {
-        I8 => {
-            let v4 = constructor_add_simm16(ctx, I8, arg1, -0x39);
-            // Rule at src/isa/s390x/lower.isle line 1221.
-            return v4;
-        }
-        I16 => {
-            let v7 = constructor_add_simm16(ctx, I16, arg1, -0x31);
-            // Rule at src/isa/s390x/lower.isle line 1222.
-            return v7;
-        }
-        I32 => {
-            let v10 = constructor_add_simm16(ctx, I32, arg1, -0x21);
-            // Rule at src/isa/s390x/lower.isle line 1223.
-            return v10;
-        }
-        I64 => {
-            let v13 = constructor_add_simm16(ctx, I64, arg1, -0x1);
-            // Rule at src/isa/s390x/lower.isle line 1224.
-            return v13;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "cls_offset", "src/isa/s390x/lower.isle line 1220"
-    )
-}
-
-// Generated as internal constructor for term ctz_guardbit.
-pub fn constructor_ctz_guardbit<C: Context>(ctx: &mut C, arg0: Type) -> UImm16Shifted {
-    match arg0 {
-        I8 => {
-            let v3 = C::uimm16shifted(ctx, 0x100, 0x0);
-            // Rule at src/isa/s390x/lower.isle line 1275.
-            return v3;
-        }
-        I16 => {
-            let v6 = C::uimm16shifted(ctx, 0x1, 0x10);
-            // Rule at src/isa/s390x/lower.isle line 1276.
-            return v6;
-        }
-        I32 => {
-            let v8 = C::uimm16shifted(ctx, 0x1, 0x20);
-            // Rule at src/isa/s390x/lower.isle line 1277.
-            return v8;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "ctz_guardbit", "src/isa/s390x/lower.isle line 1274"
-    )
-}
-
-// Generated as internal constructor for term vec_move_lane_and_insert.
-pub fn constructor_vec_move_lane_and_insert<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: u8,
-    arg3: Reg,
-    arg4: u8,
-) -> Reg {
-    let v1 = C::multi_lane(ctx, arg0);
-    if let Some(v2) = v1 {
-        if v2.0 == 0x40 {
-            match arg2 {
-                0x0 => {
-                    let v10 = constructor_vec_permute_dw_imm(ctx, arg0, arg3, arg4, arg1, 0x1);
-                    // Rule at src/isa/s390x/lower.isle line 1805.
-                    return v10;
-                }
-                0x1 => {
-                    let v12 = constructor_vec_permute_dw_imm(ctx, arg0, arg1, 0x0, arg3, arg4);
-                    // Rule at src/isa/s390x/lower.isle line 1807.
-                    return v12;
-                }
-                _ => {}
-            }
-        }
-    }
-    if arg2 == arg4 {
-        let v13 = C::lane_byte_mask(ctx, arg0, arg2);
-        let v14 = constructor_vec_imm_byte_mask(ctx, arg0, v13);
-        let v15 = constructor_vec_select(ctx, arg0, arg3, arg1, v14);
-        // Rule at src/isa/s390x/lower.isle line 1811.
-        return v15;
-    }
-    let v16 = constructor_vec_replicate_lane(ctx, arg0, arg3, arg4);
-    let v17 = C::lane_byte_mask(ctx, arg0, arg2);
-    let v18 = constructor_vec_imm_byte_mask(ctx, arg0, v17);
-    let v19 = constructor_vec_select(ctx, arg0, v16, arg1, v18);
-    // Rule at src/isa/s390x/lower.isle line 1816.
-    return v19;
-}
-
-// Generated as internal constructor for term vec_load_lane_little.
-pub fn constructor_vec_load_lane_little<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: &MemArg,
-    arg3: u8,
-) -> Reg {
-    let v1 = C::multi_lane(ctx, arg0);
-    if let Some(v2) = v1 {
-        match v2.0 {
-            0x8 => {
-                let v8 = constructor_vec_load_lane(ctx, arg0, arg1, arg2, arg3);
-                // Rule at src/isa/s390x/lower.isle line 1825.
-                return v8;
-            }
-            0x10 => {
-                let v9 = C::vxrs_ext2_enabled(ctx, arg0);
-                if let Some(v10) = v9 {
-                    let v11 = constructor_vec_load_lane_rev(ctx, arg0, arg1, arg2, arg3);
-                    // Rule at src/isa/s390x/lower.isle line 1829.
-                    return v11;
-                }
-                let v12 = C::vxrs_ext2_disabled(ctx, arg0);
-                if let Some(v13) = v12 {
-                    let v14 = constructor_loadrev16(ctx, arg2);
-                    let v15 = C::zero_reg(ctx);
-                    let v16 = constructor_vec_insert_lane(ctx, arg0, arg1, v14, arg3, v15);
-                    // Rule at src/isa/s390x/lower.isle line 1840.
-                    return v16;
-                }
-            }
-            0x20 => {
-                let v9 = C::vxrs_ext2_enabled(ctx, arg0);
-                if let Some(v10) = v9 {
-                    let v11 = constructor_vec_load_lane_rev(ctx, arg0, arg1, arg2, arg3);
-                    // Rule at src/isa/s390x/lower.isle line 1832.
-                    return v11;
-                }
-                let v12 = C::vxrs_ext2_disabled(ctx, arg0);
-                if let Some(v13) = v12 {
-                    let v17 = constructor_loadrev32(ctx, arg2);
-                    let v15 = C::zero_reg(ctx);
-                    let v18 = constructor_vec_insert_lane(ctx, arg0, arg1, v17, arg3, v15);
-                    // Rule at src/isa/s390x/lower.isle line 1843.
-                    return v18;
-                }
-            }
-            0x40 => {
-                let v9 = C::vxrs_ext2_enabled(ctx, arg0);
-                if let Some(v10) = v9 {
-                    let v11 = constructor_vec_load_lane_rev(ctx, arg0, arg1, arg2, arg3);
-                    // Rule at src/isa/s390x/lower.isle line 1835.
-                    return v11;
-                }
-                let v12 = C::vxrs_ext2_disabled(ctx, arg0);
-                if let Some(v13) = v12 {
-                    let v19 = constructor_loadrev64(ctx, arg2);
-                    let v15 = C::zero_reg(ctx);
-                    let v20 = constructor_vec_insert_lane(ctx, arg0, arg1, v19, arg3, v15);
-                    // Rule at src/isa/s390x/lower.isle line 1846.
-                    return v20;
-                }
-            }
-            _ => {}
-        }
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_load_lane_little", "src/isa/s390x/lower.isle line 1822"
-    )
-}
-
-// Generated as internal constructor for term vec_load_lane_little_undef.
-pub fn constructor_vec_load_lane_little_undef<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &MemArg,
-    arg2: u8,
-) -> Reg {
-    let v1 = C::multi_lane(ctx, arg0);
-    if let Some(v2) = v1 {
-        match v2.0 {
-            0x8 => {
-                let v7 = constructor_vec_load_lane_undef(ctx, arg0, arg1, arg2);
-                // Rule at src/isa/s390x/lower.isle line 1854.
-                return v7;
-            }
-            0x10 => {
-                let v8 = C::vxrs_ext2_enabled(ctx, arg0);
-                if let Some(v9) = v8 {
-                    let v10 = constructor_vec_load_lane_rev_undef(ctx, arg0, arg1, arg2);
-                    // Rule at src/isa/s390x/lower.isle line 1858.
-                    return v10;
-                }
-                let v11 = C::vxrs_ext2_disabled(ctx, arg0);
-                if let Some(v12) = v11 {
-                    let v13 = constructor_loadrev16(ctx, arg1);
-                    let v14 = C::zero_reg(ctx);
-                    let v15 = constructor_vec_insert_lane_undef(ctx, arg0, v13, arg2, v14);
-                    // Rule at src/isa/s390x/lower.isle line 1869.
-                    return v15;
-                }
-            }
-            0x20 => {
-                let v8 = C::vxrs_ext2_enabled(ctx, arg0);
-                if let Some(v9) = v8 {
-                    let v10 = constructor_vec_load_lane_rev_undef(ctx, arg0, arg1, arg2);
-                    // Rule at src/isa/s390x/lower.isle line 1861.
-                    return v10;
-                }
-                let v11 = C::vxrs_ext2_disabled(ctx, arg0);
-                if let Some(v12) = v11 {
-                    let v16 = constructor_loadrev32(ctx, arg1);
-                    let v14 = C::zero_reg(ctx);
-                    let v17 = constructor_vec_insert_lane_undef(ctx, arg0, v16, arg2, v14);
-                    // Rule at src/isa/s390x/lower.isle line 1872.
-                    return v17;
-                }
-            }
-            0x40 => {
-                let v8 = C::vxrs_ext2_enabled(ctx, arg0);
-                if let Some(v9) = v8 {
-                    let v10 = constructor_vec_load_lane_rev_undef(ctx, arg0, arg1, arg2);
-                    // Rule at src/isa/s390x/lower.isle line 1864.
-                    return v10;
-                }
-                let v11 = C::vxrs_ext2_disabled(ctx, arg0);
-                if let Some(v12) = v11 {
-                    let v18 = constructor_loadrev64(ctx, arg1);
-                    let v14 = C::zero_reg(ctx);
-                    let v19 = constructor_vec_insert_lane_undef(ctx, arg0, v18, arg2, v14);
-                    // Rule at src/isa/s390x/lower.isle line 1875.
-                    return v19;
-                }
-            }
-            _ => {}
-        }
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_load_lane_little_undef", "src/isa/s390x/lower.isle line 1851"
-    )
-}
-
-// Generated as internal constructor for term vec_store_lane_little.
-pub fn constructor_vec_store_lane_little<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: &MemArg,
-    arg3: u8,
-) -> SideEffectNoResult {
-    let v1 = C::multi_lane(ctx, arg0);
-    if let Some(v2) = v1 {
-        match v2.0 {
-            0x8 => {
-                let v8 = &constructor_vec_store_lane(ctx, arg0, arg1, arg2, arg3);
-                // Rule at src/isa/s390x/lower.isle line 1912.
-                return v8.clone();
-            }
-            0x10 => {
-                let v9 = C::vxrs_ext2_enabled(ctx, arg0);
-                if let Some(v10) = v9 {
-                    let v11 = &constructor_vec_store_lane_rev(ctx, arg0, arg1, arg2, arg3);
-                    // Rule at src/isa/s390x/lower.isle line 1916.
-                    return v11.clone();
-                }
-                let v12 = C::vxrs_ext2_disabled(ctx, arg0);
-                if let Some(v13) = v12 {
-                    let v14 = C::zero_reg(ctx);
-                    let v15 = constructor_vec_extract_lane(ctx, arg0, arg1, arg3, v14);
-                    let v16 = &constructor_storerev16(ctx, v15, arg2);
-                    // Rule at src/isa/s390x/lower.isle line 1927.
-                    return v16.clone();
-                }
-            }
-            0x20 => {
-                let v9 = C::vxrs_ext2_enabled(ctx, arg0);
-                if let Some(v10) = v9 {
-                    let v11 = &constructor_vec_store_lane_rev(ctx, arg0, arg1, arg2, arg3);
-                    // Rule at src/isa/s390x/lower.isle line 1919.
-                    return v11.clone();
-                }
-                let v12 = C::vxrs_ext2_disabled(ctx, arg0);
-                if let Some(v13) = v12 {
-                    let v14 = C::zero_reg(ctx);
-                    let v15 = constructor_vec_extract_lane(ctx, arg0, arg1, arg3, v14);
-                    let v17 = &constructor_storerev32(ctx, v15, arg2);
-                    // Rule at src/isa/s390x/lower.isle line 1930.
-                    return v17.clone();
-                }
-            }
-            0x40 => {
-                let v9 = C::vxrs_ext2_enabled(ctx, arg0);
-                if let Some(v10) = v9 {
-                    let v11 = &constructor_vec_store_lane_rev(ctx, arg0, arg1, arg2, arg3);
-                    // Rule at src/isa/s390x/lower.isle line 1922.
-                    return v11.clone();
-                }
-                let v12 = C::vxrs_ext2_disabled(ctx, arg0);
-                if let Some(v13) = v12 {
-                    let v14 = C::zero_reg(ctx);
-                    let v15 = constructor_vec_extract_lane(ctx, arg0, arg1, arg3, v14);
-                    let v18 = &constructor_storerev64(ctx, v15, arg2);
-                    // Rule at src/isa/s390x/lower.isle line 1933.
-                    return v18.clone();
-                }
-            }
-            _ => {}
-        }
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_store_lane_little", "src/isa/s390x/lower.isle line 1909"
-    )
-}
-
-// Generated as internal constructor for term vec_load_replicate_little.
-pub fn constructor_vec_load_replicate_little<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &MemArg,
-) -> Reg {
-    let v1 = C::multi_lane(ctx, arg0);
-    if let Some(v2) = v1 {
-        match v2.0 {
-            0x8 => {
-                let v6 = constructor_vec_load_replicate(ctx, arg0, arg1);
-                // Rule at src/isa/s390x/lower.isle line 1971.
-                return v6;
-            }
-            0x10 => {
-                let v7 = C::vxrs_ext2_enabled(ctx, arg0);
-                if let Some(v8) = v7 {
-                    let v9 = constructor_vec_load_replicate_rev(ctx, arg0, arg1);
-                    // Rule at src/isa/s390x/lower.isle line 1975.
-                    return v9;
-                }
-                let v10 = C::vxrs_ext2_disabled(ctx, arg0);
-                if let Some(v11) = v10 {
-                    let v13 = constructor_vec_load_lane_little_undef(ctx, arg0, arg1, 0x0);
-                    let v14 = constructor_vec_replicate_lane(ctx, arg0, v13, 0x0);
-                    // Rule at src/isa/s390x/lower.isle line 1986.
-                    return v14;
-                }
-            }
-            0x20 => {
-                let v7 = C::vxrs_ext2_enabled(ctx, arg0);
-                if let Some(v8) = v7 {
-                    let v9 = constructor_vec_load_replicate_rev(ctx, arg0, arg1);
-                    // Rule at src/isa/s390x/lower.isle line 1978.
-                    return v9;
-                }
-                let v10 = C::vxrs_ext2_disabled(ctx, arg0);
-                if let Some(v11) = v10 {
-                    let v13 = constructor_vec_load_lane_little_undef(ctx, arg0, arg1, 0x0);
-                    let v14 = constructor_vec_replicate_lane(ctx, arg0, v13, 0x0);
-                    // Rule at src/isa/s390x/lower.isle line 1989.
-                    return v14;
-                }
-            }
-            0x40 => {
-                let v7 = C::vxrs_ext2_enabled(ctx, arg0);
-                if let Some(v8) = v7 {
-                    let v9 = constructor_vec_load_replicate_rev(ctx, arg0, arg1);
-                    // Rule at src/isa/s390x/lower.isle line 1981.
-                    return v9;
-                }
-                let v10 = C::vxrs_ext2_disabled(ctx, arg0);
-                if let Some(v11) = v10 {
-                    let v13 = constructor_vec_load_lane_little_undef(ctx, arg0, arg1, 0x0);
-                    let v14 = constructor_vec_replicate_lane(ctx, arg0, v13, 0x0);
-                    // Rule at src/isa/s390x/lower.isle line 1992.
-                    return v14;
-                }
-            }
-            _ => {}
-        }
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_load_replicate_little", "src/isa/s390x/lower.isle line 1968"
-    )
-}
-
-// Generated as internal constructor for term vec_move_lane_and_zero.
-pub fn constructor_vec_move_lane_and_zero<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: u8,
-    arg2: Reg,
-    arg3: u8,
-) -> Reg {
-    let v1 = C::multi_lane(ctx, arg0);
-    if let Some(v2) = v1 {
-        if v2.0 == 0x40 {
-            match arg1 {
-                0x0 => {
-                    let v9 = constructor_vec_imm(ctx, arg0, 0x0);
-                    let v11 = constructor_vec_permute_dw_imm(ctx, arg0, arg2, arg3, v9, 0x0);
-                    // Rule at src/isa/s390x/lower.isle line 2032.
-                    return v11;
-                }
-                0x1 => {
-                    let v9 = constructor_vec_imm(ctx, arg0, 0x0);
-                    let v12 = constructor_vec_permute_dw_imm(ctx, arg0, v9, 0x0, arg2, arg3);
-                    // Rule at src/isa/s390x/lower.isle line 2034.
-                    return v12;
-                }
-                _ => {}
-            }
-        }
-    }
-    if arg1 == arg3 {
-        let v13 = C::lane_byte_mask(ctx, arg0, arg1);
-        let v14 = constructor_vec_imm_byte_mask(ctx, arg0, v13);
-        let v15 = constructor_vec_and(ctx, arg0, arg2, v14);
-        // Rule at src/isa/s390x/lower.isle line 2038.
-        return v15;
-    }
-    let v16 = constructor_vec_replicate_lane(ctx, arg0, arg2, arg3);
-    let v17 = C::lane_byte_mask(ctx, arg0, arg1);
-    let v18 = constructor_vec_imm_byte_mask(ctx, arg0, v17);
-    let v19 = constructor_vec_and(ctx, arg0, v16, v18);
-    // Rule at src/isa/s390x/lower.isle line 2043.
-    return v19;
-}
-
-// Generated as internal constructor for term lib_call_tls_get_offset.
-pub fn constructor_lib_call_tls_get_offset<C: Context>(
-    ctx: &mut C,
-    arg0: Reg,
-    arg1: Reg,
-    arg2: &SymbolReloc,
-) -> Reg {
-    let v4 = C::temp_writable_reg(ctx, I64);
-    let v5 = &C::lib_call_info_tls_get_offset(ctx, v4, arg0, arg1, arg2);
-    let v6 = C::lib_accumulate_outgoing_args_size(ctx, v5);
-    let v7 = &constructor_lib_call(ctx, v5);
-    let v8 = constructor_side_effect(ctx, v7);
-    let v9 = C::writable_reg_to_reg(ctx, v4);
-    // Rule at src/isa/s390x/lower.isle line 2279.
-    return v9;
-}
-
-// Generated as internal constructor for term thread_pointer.
-pub fn constructor_thread_pointer<C: Context>(ctx: &mut C) -> Reg {
-    let v2 = constructor_load_ar(ctx, 0x0);
-    let v4 = constructor_lshl_imm(ctx, I64, v2, 0x20);
-    let v6 = constructor_insert_ar(ctx, v4, 0x1);
-    // Rule at src/isa/s390x/lower.isle line 2288.
-    return v6;
-}
-
-// Generated as internal constructor for term vec_load_full_rev.
-pub fn constructor_vec_load_full_rev<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: MemFlags,
-    arg2: Value,
-    arg3: Offset32,
-) -> Reg {
-    let v3 = C::vr128_ty(ctx, arg0);
-    if let Some(v4) = v3 {
-        let v1 = C::vxrs_ext2_enabled(ctx, arg0);
-        if let Some(v2) = v1 {
-            let v8 = &constructor_lower_address(ctx, arg1, arg2, arg3);
-            let v9 = constructor_vec_loadrev(ctx, v4, v8);
-            // Rule at src/isa/s390x/lower.isle line 2371.
-            return v9;
-        }
-        let v10 = C::vxrs_ext2_disabled(ctx, arg0);
-        if let Some(v11) = v10 {
-            let v13 = &constructor_lower_address_bias(ctx, arg1, arg2, arg3, 0x0);
-            let v15 = &constructor_lower_address_bias(ctx, arg1, arg2, arg3, 0x8);
-            let v16 = constructor_loadrev64(ctx, v13);
-            let v17 = constructor_loadrev64(ctx, v15);
-            let v18 = constructor_mov_to_vec128(ctx, v4, v17, v16);
-            // Rule at src/isa/s390x/lower.isle line 2375.
-            return v18;
-        }
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_load_full_rev", "src/isa/s390x/lower.isle line 2368"
-    )
-}
-
-// Generated as internal constructor for term vec_load_byte_rev.
-pub fn constructor_vec_load_byte_rev<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: MemFlags,
-    arg2: Value,
-    arg3: Offset32,
-) -> Reg {
-    let v6 = C::multi_lane(ctx, arg0);
-    if let Some(v7) = v6 {
-        match v7.0 {
-            0x8 => {
-                if v7.1 == 0x10 {
-                    let v10 = &constructor_lower_address(ctx, arg1, arg2, arg3);
-                    let v11 = constructor_vec_load(ctx, arg0, v10);
-                    // Rule at src/isa/s390x/lower.isle line 2391.
-                    return v11;
-                }
-            }
-            0x10 => {
-                if v7.1 == 0x8 {
-                    let v12 = C::vxrs_ext2_enabled(ctx, arg0);
-                    if let Some(v13) = v12 {
-                        let v10 = &constructor_lower_address(ctx, arg1, arg2, arg3);
-                        let v16 = constructor_vec_load_byte16rev(ctx, arg0, v10);
-                        // Rule at src/isa/s390x/lower.isle line 2401.
-                        return v16;
-                    }
-                    let v17 = C::vxrs_ext2_disabled(ctx, arg0);
-                    if let Some(v18) = v17 {
-                        let v19 = constructor_vec_load_full_rev(ctx, arg0, arg1, arg2, arg3);
-                        let v20 = constructor_vec_elt_rev(ctx, arg0, v19);
-                        // Rule at src/isa/s390x/lower.isle line 2412.
-                        return v20;
-                    }
-                }
-            }
-            0x20 => {
-                if v7.1 == 0x4 {
-                    let v12 = C::vxrs_ext2_enabled(ctx, arg0);
-                    if let Some(v13) = v12 {
-                        let v10 = &constructor_lower_address(ctx, arg1, arg2, arg3);
-                        let v15 = constructor_vec_load_byte32rev(ctx, arg0, v10);
-                        // Rule at src/isa/s390x/lower.isle line 2398.
-                        return v15;
-                    }
-                    let v17 = C::vxrs_ext2_disabled(ctx, arg0);
-                    if let Some(v18) = v17 {
-                        let v19 = constructor_vec_load_full_rev(ctx, arg0, arg1, arg2, arg3);
-                        let v20 = constructor_vec_elt_rev(ctx, arg0, v19);
-                        // Rule at src/isa/s390x/lower.isle line 2409.
-                        return v20;
-                    }
-                }
-            }
-            0x40 => {
-                if v7.1 == 0x2 {
-                    let v12 = C::vxrs_ext2_enabled(ctx, arg0);
-                    if let Some(v13) = v12 {
-                        let v10 = &constructor_lower_address(ctx, arg1, arg2, arg3);
-                        let v14 = constructor_vec_load_byte64rev(ctx, arg0, v10);
-                        // Rule at src/isa/s390x/lower.isle line 2395.
-                        return v14;
-                    }
-                    let v17 = C::vxrs_ext2_disabled(ctx, arg0);
-                    if let Some(v18) = v17 {
-                        let v19 = constructor_vec_load_full_rev(ctx, arg0, arg1, arg2, arg3);
-                        let v20 = constructor_vec_elt_rev(ctx, arg0, v19);
-                        // Rule at src/isa/s390x/lower.isle line 2406.
-                        return v20;
-                    }
-                }
-            }
-            _ => {}
-        }
-    }
-    if arg0 == I128 {
-        let v5 = constructor_vec_load_full_rev(ctx, I128, arg1, arg2, arg3);
-        // Rule at src/isa/s390x/lower.isle line 2387.
-        return v5;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_load_byte_rev", "src/isa/s390x/lower.isle line 2384"
-    )
-}
-
-// Generated as internal constructor for term vec_load_elt_rev.
-pub fn constructor_vec_load_elt_rev<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: MemFlags,
-    arg2: Value,
-    arg3: Offset32,
-) -> Reg {
-    let v7 = C::multi_lane(ctx, arg0);
-    if let Some(v8) = v7 {
-        match v8.0 {
-            0x8 => {
-                if v8.1 == 0x10 {
-                    let v11 = constructor_vec_load_full_rev(ctx, arg0, arg1, arg2, arg3);
-                    // Rule at src/isa/s390x/lower.isle line 2426.
-                    return v11;
-                }
-            }
-            0x10 => {
-                if v8.1 == 0x8 {
-                    let v12 = C::vxrs_ext2_enabled(ctx, arg0);
-                    if let Some(v13) = v12 {
-                        let v5 = &constructor_lower_address(ctx, arg1, arg2, arg3);
-                        let v16 = constructor_vec_load_elt16rev(ctx, arg0, v5);
-                        // Rule at src/isa/s390x/lower.isle line 2436.
-                        return v16;
-                    }
-                    let v17 = C::vxrs_ext2_disabled(ctx, arg0);
-                    if let Some(v18) = v17 {
-                        let v5 = &constructor_lower_address(ctx, arg1, arg2, arg3);
-                        let v19 = constructor_vec_load(ctx, arg0, v5);
-                        let v20 = constructor_vec_elt_rev(ctx, arg0, v19);
-                        // Rule at src/isa/s390x/lower.isle line 2447.
-                        return v20;
-                    }
-                }
-            }
-            0x20 => {
-                if v8.1 == 0x4 {
-                    let v12 = C::vxrs_ext2_enabled(ctx, arg0);
-                    if let Some(v13) = v12 {
-                        let v5 = &constructor_lower_address(ctx, arg1, arg2, arg3);
-                        let v15 = constructor_vec_load_elt32rev(ctx, arg0, v5);
-                        // Rule at src/isa/s390x/lower.isle line 2433.
-                        return v15;
-                    }
-                    let v17 = C::vxrs_ext2_disabled(ctx, arg0);
-                    if let Some(v18) = v17 {
-                        let v5 = &constructor_lower_address(ctx, arg1, arg2, arg3);
-                        let v19 = constructor_vec_load(ctx, arg0, v5);
-                        let v20 = constructor_vec_elt_rev(ctx, arg0, v19);
-                        // Rule at src/isa/s390x/lower.isle line 2444.
-                        return v20;
-                    }
-                }
-            }
-            0x40 => {
-                if v8.1 == 0x2 {
-                    let v12 = C::vxrs_ext2_enabled(ctx, arg0);
-                    if let Some(v13) = v12 {
-                        let v5 = &constructor_lower_address(ctx, arg1, arg2, arg3);
-                        let v14 = constructor_vec_load_elt64rev(ctx, arg0, v5);
-                        // Rule at src/isa/s390x/lower.isle line 2430.
-                        return v14;
-                    }
-                    let v17 = C::vxrs_ext2_disabled(ctx, arg0);
-                    if let Some(v18) = v17 {
-                        let v5 = &constructor_lower_address(ctx, arg1, arg2, arg3);
-                        let v19 = constructor_vec_load(ctx, arg0, v5);
-                        let v20 = constructor_vec_elt_rev(ctx, arg0, v19);
-                        // Rule at src/isa/s390x/lower.isle line 2441.
-                        return v20;
-                    }
-                }
-            }
-            _ => {}
-        }
-    }
-    if arg0 == I128 {
-        let v5 = &constructor_lower_address(ctx, arg1, arg2, arg3);
-        let v6 = constructor_vec_load(ctx, I128, v5);
-        // Rule at src/isa/s390x/lower.isle line 2422.
-        return v6;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_load_elt_rev", "src/isa/s390x/lower.isle line 2418"
-    )
-}
-
-// Generated as internal constructor for term load_v64.
-pub fn constructor_load_v64<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: MemFlags,
-    arg2: Value,
-    arg3: Offset32,
-) -> Reg {
-    let v6 = &C::lane_order(ctx);
-    match v6 {
-        &LaneOrder::LittleEndian => {
-            let v14 = C::multi_lane(ctx, arg0);
-            if let Some(v15) = v14 {
-                match v15.0 {
-                    0x8 => {
-                        if v15.1 == 0x10 {
-                            let v8 = &constructor_lower_address(ctx, arg1, arg2, arg3);
-                            let v13 = constructor_vec_load_lane_little_undef(ctx, I64X2, v8, 0x0);
-                            // Rule at src/isa/s390x/lower.isle line 2598.
-                            return v13;
-                        }
-                    }
-                    0x10 => {
-                        let v2 = C::bigendian(ctx, arg1);
-                        if let Some(v3) = v2 {
-                            if v15.1 == 0x8 {
-                                let v8 = &constructor_lower_address(ctx, arg1, arg2, arg3);
-                                let v13 =
-                                    constructor_vec_load_lane_little_undef(ctx, I64X2, v8, 0x0);
-                                let v21 = constructor_vec_rot_imm(ctx, I16X8, v13, 0x8);
-                                // Rule at src/isa/s390x/lower.isle line 2609.
-                                return v21;
-                            }
-                        }
-                    }
-                    0x20 => {
-                        let v2 = C::bigendian(ctx, arg1);
-                        if let Some(v3) = v2 {
-                            if v15.1 == 0x4 {
-                                let v8 = &constructor_lower_address(ctx, arg1, arg2, arg3);
-                                let v10 = constructor_vec_load_lane_undef(ctx, I64X2, v8, 0x0);
-                                let v24 = constructor_vec_rot_imm(ctx, I64X2, v10, 0x20);
-                                // Rule at src/isa/s390x/lower.isle line 2621.
-                                return v24;
-                            }
-                        }
-                    }
-                    _ => {}
-                }
-            }
-            let v11 = C::littleendian(ctx, arg1);
-            if let Some(v12) = v11 {
-                let v8 = &constructor_lower_address(ctx, arg1, arg2, arg3);
-                let v13 = constructor_vec_load_lane_little_undef(ctx, I64X2, v8, 0x0);
-                // Rule at src/isa/s390x/lower.isle line 2588.
-                return v13;
-            }
-        }
-        &LaneOrder::BigEndian => {
-            let v14 = C::multi_lane(ctx, arg0);
-            if let Some(v15) = v14 {
-                match v15.0 {
-                    0x8 => {
-                        if v15.1 == 0x10 {
-                            let v8 = &constructor_lower_address(ctx, arg1, arg2, arg3);
-                            let v10 = constructor_vec_load_lane_undef(ctx, I64X2, v8, 0x0);
-                            // Rule at src/isa/s390x/lower.isle line 2593.
-                            return v10;
-                        }
-                    }
-                    0x10 => {
-                        let v11 = C::littleendian(ctx, arg1);
-                        if let Some(v12) = v11 {
-                            if v15.1 == 0x8 {
-                                let v8 = &constructor_lower_address(ctx, arg1, arg2, arg3);
-                                let v10 = constructor_vec_load_lane_undef(ctx, I64X2, v8, 0x0);
-                                let v20 = constructor_vec_rot_imm(ctx, I16X8, v10, 0x8);
-                                // Rule at src/isa/s390x/lower.isle line 2603.
-                                return v20;
-                            }
-                        }
-                    }
-                    0x20 => {
-                        let v11 = C::littleendian(ctx, arg1);
-                        if let Some(v12) = v11 {
-                            if v15.1 == 0x4 {
-                                let v8 = &constructor_lower_address(ctx, arg1, arg2, arg3);
-                                let v13 =
-                                    constructor_vec_load_lane_little_undef(ctx, I64X2, v8, 0x0);
-                                let v23 = constructor_vec_rot_imm(ctx, I64X2, v13, 0x20);
-                                // Rule at src/isa/s390x/lower.isle line 2615.
-                                return v23;
-                            }
-                        }
-                    }
-                    _ => {}
-                }
-            }
-            let v2 = C::bigendian(ctx, arg1);
-            if let Some(v3) = v2 {
-                let v8 = &constructor_lower_address(ctx, arg1, arg2, arg3);
-                let v10 = constructor_vec_load_lane_undef(ctx, I64X2, v8, 0x0);
-                // Rule at src/isa/s390x/lower.isle line 2583.
-                return v10;
-            }
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "load_v64", "src/isa/s390x/lower.isle line 2580"
-    )
-}
-
-// Generated as internal constructor for term vec_store_full_rev.
-pub fn constructor_vec_store_full_rev<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: MemFlags,
-    arg3: Value,
-    arg4: Offset32,
-) -> SideEffectNoResult {
-    let v1 = C::vxrs_ext2_enabled(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v7 = &constructor_lower_address(ctx, arg2, arg3, arg4);
-        let v8 = &constructor_vec_storerev(ctx, arg1, v7);
-        // Rule at src/isa/s390x/lower.isle line 2705.
-        return v8.clone();
-    }
-    let v9 = C::vxrs_ext2_disabled(ctx, arg0);
-    if let Some(v10) = v9 {
-        let v12 = &constructor_lower_address_bias(ctx, arg2, arg3, arg4, 0x0);
-        let v14 = &constructor_lower_address_bias(ctx, arg2, arg3, arg4, 0x8);
-        let v17 = C::zero_reg(ctx);
-        let v18 = constructor_vec_extract_lane(ctx, I64X2, arg1, 0x1, v17);
-        let v19 = C::zero_reg(ctx);
-        let v20 = constructor_vec_extract_lane(ctx, I64X2, arg1, 0x0, v19);
-        let v21 = &constructor_storerev64(ctx, v18, v12);
-        let v22 = &constructor_storerev64(ctx, v20, v14);
-        let v23 = &constructor_side_effect_concat(ctx, v21, v22);
-        // Rule at src/isa/s390x/lower.isle line 2709.
-        return v23.clone();
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_store_full_rev", "src/isa/s390x/lower.isle line 2702"
-    )
-}
-
-// Generated as internal constructor for term vec_store_byte_rev.
-pub fn constructor_vec_store_byte_rev<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: MemFlags,
-    arg3: Value,
-    arg4: Offset32,
-) -> SideEffectNoResult {
-    let v7 = C::multi_lane(ctx, arg0);
-    if let Some(v8) = v7 {
-        match v8.0 {
-            0x8 => {
-                if v8.1 == 0x10 {
-                    let v11 = &constructor_lower_address(ctx, arg2, arg3, arg4);
-                    let v12 = &constructor_vec_store(ctx, arg1, v11);
-                    // Rule at src/isa/s390x/lower.isle line 2726.
-                    return v12.clone();
-                }
-            }
-            0x10 => {
-                if v8.1 == 0x8 {
-                    let v13 = C::vxrs_ext2_enabled(ctx, arg0);
-                    if let Some(v14) = v13 {
-                        let v11 = &constructor_lower_address(ctx, arg2, arg3, arg4);
-                        let v17 = &constructor_vec_store_byte16rev(ctx, arg1, v11);
-                        // Rule at src/isa/s390x/lower.isle line 2736.
-                        return v17.clone();
-                    }
-                    let v18 = C::vxrs_ext2_disabled(ctx, arg0);
-                    if let Some(v19) = v18 {
-                        let v20 = constructor_vec_elt_rev(ctx, arg0, arg1);
-                        let v21 = &constructor_vec_store_full_rev(ctx, arg0, v20, arg2, arg3, arg4);
-                        // Rule at src/isa/s390x/lower.isle line 2747.
-                        return v21.clone();
-                    }
-                }
-            }
-            0x20 => {
-                if v8.1 == 0x4 {
-                    let v13 = C::vxrs_ext2_enabled(ctx, arg0);
-                    if let Some(v14) = v13 {
-                        let v11 = &constructor_lower_address(ctx, arg2, arg3, arg4);
-                        let v16 = &constructor_vec_store_byte32rev(ctx, arg1, v11);
-                        // Rule at src/isa/s390x/lower.isle line 2733.
-                        return v16.clone();
-                    }
-                    let v18 = C::vxrs_ext2_disabled(ctx, arg0);
-                    if let Some(v19) = v18 {
-                        let v20 = constructor_vec_elt_rev(ctx, arg0, arg1);
-                        let v21 = &constructor_vec_store_full_rev(ctx, arg0, v20, arg2, arg3, arg4);
-                        // Rule at src/isa/s390x/lower.isle line 2744.
-                        return v21.clone();
-                    }
-                }
-            }
-            0x40 => {
-                if v8.1 == 0x2 {
-                    let v13 = C::vxrs_ext2_enabled(ctx, arg0);
-                    if let Some(v14) = v13 {
-                        let v11 = &constructor_lower_address(ctx, arg2, arg3, arg4);
-                        let v15 = &constructor_vec_store_byte64rev(ctx, arg1, v11);
-                        // Rule at src/isa/s390x/lower.isle line 2730.
-                        return v15.clone();
-                    }
-                    let v18 = C::vxrs_ext2_disabled(ctx, arg0);
-                    if let Some(v19) = v18 {
-                        let v20 = constructor_vec_elt_rev(ctx, arg0, arg1);
-                        let v21 = &constructor_vec_store_full_rev(ctx, arg0, v20, arg2, arg3, arg4);
-                        // Rule at src/isa/s390x/lower.isle line 2741.
-                        return v21.clone();
-                    }
-                }
-            }
-            _ => {}
-        }
-    }
-    if arg0 == I128 {
-        let v6 = &constructor_vec_store_full_rev(ctx, I128, arg1, arg2, arg3, arg4);
-        // Rule at src/isa/s390x/lower.isle line 2722.
-        return v6.clone();
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_store_byte_rev", "src/isa/s390x/lower.isle line 2719"
-    )
-}
-
-// Generated as internal constructor for term vec_store_elt_rev.
-pub fn constructor_vec_store_elt_rev<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Reg,
-    arg2: MemFlags,
-    arg3: Value,
-    arg4: Offset32,
-) -> SideEffectNoResult {
-    let v7 = C::multi_lane(ctx, arg0);
-    if let Some(v8) = v7 {
-        match v8.0 {
-            0x8 => {
-                if v8.1 == 0x10 {
-                    let v11 = &constructor_vec_store_full_rev(ctx, arg0, arg1, arg2, arg3, arg4);
-                    // Rule at src/isa/s390x/lower.isle line 2760.
-                    return v11.clone();
-                }
-            }
-            0x10 => {
-                if v8.1 == 0x8 {
-                    let v12 = C::vxrs_ext2_enabled(ctx, arg0);
-                    if let Some(v13) = v12 {
-                        let v5 = &constructor_lower_address(ctx, arg2, arg3, arg4);
-                        let v16 = &constructor_vec_store_elt16rev(ctx, arg1, v5);
-                        // Rule at src/isa/s390x/lower.isle line 2770.
-                        return v16.clone();
-                    }
-                    let v17 = C::vxrs_ext2_disabled(ctx, arg0);
-                    if let Some(v18) = v17 {
-                        let v19 = constructor_vec_elt_rev(ctx, arg0, arg1);
-                        let v20 = &constructor_lower_address(ctx, arg2, arg3, arg4);
-                        let v21 = &constructor_vec_store(ctx, v19, v20);
-                        // Rule at src/isa/s390x/lower.isle line 2781.
-                        return v21.clone();
-                    }
-                }
-            }
-            0x20 => {
-                if v8.1 == 0x4 {
-                    let v12 = C::vxrs_ext2_enabled(ctx, arg0);
-                    if let Some(v13) = v12 {
-                        let v5 = &constructor_lower_address(ctx, arg2, arg3, arg4);
-                        let v15 = &constructor_vec_store_elt32rev(ctx, arg1, v5);
-                        // Rule at src/isa/s390x/lower.isle line 2767.
-                        return v15.clone();
-                    }
-                    let v17 = C::vxrs_ext2_disabled(ctx, arg0);
-                    if let Some(v18) = v17 {
-                        let v19 = constructor_vec_elt_rev(ctx, arg0, arg1);
-                        let v20 = &constructor_lower_address(ctx, arg2, arg3, arg4);
-                        let v21 = &constructor_vec_store(ctx, v19, v20);
-                        // Rule at src/isa/s390x/lower.isle line 2778.
-                        return v21.clone();
-                    }
-                }
-            }
-            0x40 => {
-                if v8.1 == 0x2 {
-                    let v12 = C::vxrs_ext2_enabled(ctx, arg0);
-                    if let Some(v13) = v12 {
-                        let v5 = &constructor_lower_address(ctx, arg2, arg3, arg4);
-                        let v14 = &constructor_vec_store_elt64rev(ctx, arg1, v5);
-                        // Rule at src/isa/s390x/lower.isle line 2764.
-                        return v14.clone();
-                    }
-                    let v17 = C::vxrs_ext2_disabled(ctx, arg0);
-                    if let Some(v18) = v17 {
-                        let v19 = constructor_vec_elt_rev(ctx, arg0, arg1);
-                        let v20 = &constructor_lower_address(ctx, arg2, arg3, arg4);
-                        let v21 = &constructor_vec_store(ctx, v19, v20);
-                        // Rule at src/isa/s390x/lower.isle line 2775.
-                        return v21.clone();
-                    }
-                }
-            }
-            _ => {}
-        }
-    }
-    if arg0 == I128 {
-        let v5 = &constructor_lower_address(ctx, arg2, arg3, arg4);
-        let v6 = &constructor_vec_store(ctx, arg1, v5);
-        // Rule at src/isa/s390x/lower.isle line 2756.
-        return v6.clone();
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_store_elt_rev", "src/isa/s390x/lower.isle line 2753"
-    )
-}
-
-// Generated as internal constructor for term istore8_impl.
-pub fn constructor_istore8_impl<C: Context>(
-    ctx: &mut C,
-    arg0: MemFlags,
-    arg1: Value,
-    arg2: Value,
-    arg3: Offset32,
-) -> SideEffectNoResult {
-    let v7 = C::u8_from_value(ctx, arg1);
-    if let Some(v8) = v7 {
-        let v9 = &constructor_lower_address(ctx, arg0, arg2, arg3);
-        let v10 = &constructor_store8_imm(ctx, v8, v9);
-        // Rule at src/isa/s390x/lower.isle line 2800.
-        return v10.clone();
-    }
-    let v4 = C::put_in_reg(ctx, arg1);
-    let v5 = &constructor_lower_address(ctx, arg0, arg2, arg3);
-    let v6 = &constructor_store8(ctx, v4, v5);
-    // Rule at src/isa/s390x/lower.isle line 2796.
-    return v6.clone();
-}
-
-// Generated as internal constructor for term istore16_impl.
-pub fn constructor_istore16_impl<C: Context>(
-    ctx: &mut C,
-    arg0: MemFlags,
-    arg1: Value,
-    arg2: Value,
-    arg3: Offset32,
-) -> SideEffectNoResult {
-    let v1 = C::bigendian(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v12 = C::i16_from_value(ctx, arg1);
-        if let Some(v13) = v12 {
-            let v14 = &constructor_lower_address(ctx, arg0, arg2, arg3);
-            let v15 = &constructor_store16_imm(ctx, v13, v14);
-            // Rule at src/isa/s390x/lower.isle line 2822.
-            return v15.clone();
-        }
-        let v6 = C::put_in_reg(ctx, arg1);
-        let v7 = &constructor_lower_address(ctx, arg0, arg2, arg3);
-        let v8 = &constructor_store16(ctx, v6, v7);
-        // Rule at src/isa/s390x/lower.isle line 2814.
-        return v8.clone();
-    }
-    let v9 = C::littleendian(ctx, arg0);
-    if let Some(v10) = v9 {
-        let v16 = C::i16_from_swapped_value(ctx, arg1);
-        if let Some(v17) = v16 {
-            let v14 = &constructor_lower_address(ctx, arg0, arg2, arg3);
-            let v18 = &constructor_store16_imm(ctx, v17, v14);
-            // Rule at src/isa/s390x/lower.isle line 2826.
-            return v18.clone();
-        }
-        let v6 = C::put_in_reg(ctx, arg1);
-        let v7 = &constructor_lower_address(ctx, arg0, arg2, arg3);
-        let v11 = &constructor_storerev16(ctx, v6, v7);
-        // Rule at src/isa/s390x/lower.isle line 2818.
-        return v11.clone();
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "istore16_impl", "src/isa/s390x/lower.isle line 2811"
-    )
-}
-
-// Generated as internal constructor for term istore32_impl.
-pub fn constructor_istore32_impl<C: Context>(
-    ctx: &mut C,
-    arg0: MemFlags,
-    arg1: Value,
-    arg2: Value,
-    arg3: Offset32,
-) -> SideEffectNoResult {
-    let v1 = C::bigendian(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v9 = C::i16_from_value(ctx, arg1);
-        if let Some(v10) = v9 {
-            let v11 = &constructor_lower_address(ctx, arg0, arg2, arg3);
-            let v12 = &constructor_store32_simm16(ctx, v10, v11);
-            // Rule at src/isa/s390x/lower.isle line 2844.
-            return v12.clone();
-        }
-        let v6 = C::put_in_reg(ctx, arg1);
-        let v7 = &constructor_lower_address(ctx, arg0, arg2, arg3);
-        let v8 = &constructor_store32(ctx, v6, v7);
-        // Rule at src/isa/s390x/lower.isle line 2840.
-        return v8.clone();
-    }
-    let v13 = C::littleendian(ctx, arg0);
-    if let Some(v14) = v13 {
-        let v6 = C::put_in_reg(ctx, arg1);
-        let v7 = &constructor_lower_address(ctx, arg0, arg2, arg3);
-        let v15 = &constructor_storerev32(ctx, v6, v7);
-        // Rule at src/isa/s390x/lower.isle line 2848.
-        return v15.clone();
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "istore32_impl", "src/isa/s390x/lower.isle line 2837"
-    )
-}
-
-// Generated as internal constructor for term istore64_impl.
-pub fn constructor_istore64_impl<C: Context>(
-    ctx: &mut C,
-    arg0: MemFlags,
-    arg1: Value,
-    arg2: Value,
-    arg3: Offset32,
-) -> SideEffectNoResult {
-    let v1 = C::bigendian(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v9 = C::i16_from_value(ctx, arg1);
-        if let Some(v10) = v9 {
-            let v11 = &constructor_lower_address(ctx, arg0, arg2, arg3);
-            let v12 = &constructor_store64_simm16(ctx, v10, v11);
-            // Rule at src/isa/s390x/lower.isle line 2862.
-            return v12.clone();
-        }
-        let v6 = C::put_in_reg(ctx, arg1);
-        let v7 = &constructor_lower_address(ctx, arg0, arg2, arg3);
-        let v8 = &constructor_store64(ctx, v6, v7);
-        // Rule at src/isa/s390x/lower.isle line 2858.
-        return v8.clone();
-    }
-    let v13 = C::littleendian(ctx, arg0);
-    if let Some(v14) = v13 {
-        let v6 = C::put_in_reg(ctx, arg1);
-        let v7 = &constructor_lower_address(ctx, arg0, arg2, arg3);
-        let v15 = &constructor_storerev64(ctx, v6, v7);
-        // Rule at src/isa/s390x/lower.isle line 2866.
-        return v15.clone();
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "istore64_impl", "src/isa/s390x/lower.isle line 2855"
-    )
-}
-
-// Generated as internal constructor for term atomic_rmw_body.
-pub fn constructor_atomic_rmw_body<C: Context>(
-    ctx: &mut C,
-    arg0: &VecMInstBuilder,
-    arg1: Type,
-    arg2: MemFlags,
-    arg3: &AtomicRmwOp,
-    arg4: WritableReg,
-    arg5: Reg,
-    arg6: Reg,
-) -> Reg {
-    match arg3 {
-        &AtomicRmwOp::Add => {
-            let v38 = constructor_ty_ext32(ctx, arg1);
-            let v39 = &constructor_aluop_add(ctx, v38);
-            let v40 =
-                constructor_atomic_rmw_body_addsub(ctx, arg0, arg1, arg2, v39, arg4, arg5, arg6);
-            // Rule at src/isa/s390x/lower.isle line 3029.
-            return v40;
-        }
-        &AtomicRmwOp::And => {
-            let v27 = C::ty_8_or_16(ctx, arg1);
-            if let Some(v28) = v27 {
-                let v32 = constructor_atomic_rmw_body_rxsbg(
-                    ctx,
-                    arg0,
-                    v28,
-                    arg2,
-                    &RxSBGOp::And,
-                    arg4,
-                    arg5,
-                    arg6,
-                );
-                // Rule at src/isa/s390x/lower.isle line 2991.
-                return v32;
-            }
-        }
-        &AtomicRmwOp::Nand => {
-            let v2 = C::ty_32_or_64(ctx, arg1);
-            if let Some(v3) = v2 {
-                let v14 = C::mie2_enabled(ctx, arg1);
-                if let Some(v15) = v14 {
-                    let v5 = C::bigendian(ctx, arg2);
-                    if let Some(v6) = v5 {
-                        let v16 = &constructor_aluop_not_and(ctx, v3);
-                        let v17 = constructor_push_alu_reg(ctx, arg0, v16, arg4, arg5, arg6);
-                        // Rule at src/isa/s390x/lower.isle line 2971.
-                        return v17;
-                    }
-                    let v11 = C::littleendian(ctx, arg2);
-                    if let Some(v12) = v11 {
-                        let v16 = &constructor_aluop_not_and(ctx, v3);
-                        let v18 = constructor_bswap_reg(ctx, v3, arg6);
-                        let v19 = constructor_push_alu_reg(ctx, arg0, v16, arg4, arg5, v18);
-                        // Rule at src/isa/s390x/lower.isle line 2974.
-                        return v19;
-                    }
-                }
-                let v20 = C::mie2_disabled(ctx, arg1);
-                if let Some(v21) = v20 {
-                    let v5 = C::bigendian(ctx, arg2);
-                    if let Some(v6) = v5 {
-                        let v22 = &constructor_aluop_and(ctx, v3);
-                        let v23 = constructor_push_alu_reg(ctx, arg0, v22, arg4, arg5, arg6);
-                        let v24 = constructor_push_not_reg(ctx, arg0, v3, arg4, v23);
-                        // Rule at src/isa/s390x/lower.isle line 2977.
-                        return v24;
-                    }
-                    let v11 = C::littleendian(ctx, arg2);
-                    if let Some(v12) = v11 {
-                        let v22 = &constructor_aluop_and(ctx, v3);
-                        let v18 = constructor_bswap_reg(ctx, v3, arg6);
-                        let v25 = constructor_push_alu_reg(ctx, arg0, v22, arg4, arg5, v18);
-                        let v26 = constructor_push_not_reg(ctx, arg0, v3, arg4, v25);
-                        // Rule at src/isa/s390x/lower.isle line 2981.
-                        return v26;
-                    }
-                }
-            }
-            let v27 = C::ty_8_or_16(ctx, arg1);
-            if let Some(v28) = v27 {
-                let v32 = constructor_atomic_rmw_body_rxsbg(
-                    ctx,
-                    arg0,
-                    v28,
-                    arg2,
-                    &RxSBGOp::And,
-                    arg4,
-                    arg5,
-                    arg6,
-                );
-                let v37 = constructor_atomic_rmw_body_invert(ctx, arg0, v28, arg2, arg4, v32);
-                // Rule at src/isa/s390x/lower.isle line 2997.
-                return v37;
-            }
-        }
-        &AtomicRmwOp::Or => {
-            let v27 = C::ty_8_or_16(ctx, arg1);
-            if let Some(v28) = v27 {
-                let v34 = constructor_atomic_rmw_body_rxsbg(
-                    ctx,
-                    arg0,
-                    v28,
-                    arg2,
-                    &RxSBGOp::Or,
-                    arg4,
-                    arg5,
-                    arg6,
-                );
-                // Rule at src/isa/s390x/lower.isle line 2993.
-                return v34;
-            }
-        }
-        &AtomicRmwOp::Smax => {
-            let v38 = constructor_ty_ext32(ctx, arg1);
-            let v43 = &constructor_cmpop_cmps(ctx, v38);
-            let v48 = &C::intcc_as_cond(ctx, &IntCC::SignedGreaterThan);
-            let v49 = constructor_atomic_rmw_body_minmax(
-                ctx, arg0, arg1, arg2, v43, v48, arg4, arg5, arg6,
-            );
-            // Rule at src/isa/s390x/lower.isle line 3070.
-            return v49;
-        }
-        &AtomicRmwOp::Smin => {
-            let v38 = constructor_ty_ext32(ctx, arg1);
-            let v43 = &constructor_cmpop_cmps(ctx, v38);
-            let v45 = &C::intcc_as_cond(ctx, &IntCC::SignedLessThan);
-            let v46 = constructor_atomic_rmw_body_minmax(
-                ctx, arg0, arg1, arg2, v43, v45, arg4, arg5, arg6,
-            );
-            // Rule at src/isa/s390x/lower.isle line 3067.
-            return v46;
-        }
-        &AtomicRmwOp::Sub => {
-            let v38 = constructor_ty_ext32(ctx, arg1);
-            let v41 = &constructor_aluop_sub(ctx, v38);
-            let v42 =
-                constructor_atomic_rmw_body_addsub(ctx, arg0, arg1, arg2, v41, arg4, arg5, arg6);
-            // Rule at src/isa/s390x/lower.isle line 3031.
-            return v42;
-        }
-        &AtomicRmwOp::Umax => {
-            let v38 = constructor_ty_ext32(ctx, arg1);
-            let v50 = &constructor_cmpop_cmpu(ctx, v38);
-            let v55 = &C::intcc_as_cond(ctx, &IntCC::UnsignedGreaterThan);
-            let v56 = constructor_atomic_rmw_body_minmax(
-                ctx, arg0, arg1, arg2, v50, v55, arg4, arg5, arg6,
-            );
-            // Rule at src/isa/s390x/lower.isle line 3076.
-            return v56;
-        }
-        &AtomicRmwOp::Umin => {
-            let v38 = constructor_ty_ext32(ctx, arg1);
-            let v50 = &constructor_cmpop_cmpu(ctx, v38);
-            let v52 = &C::intcc_as_cond(ctx, &IntCC::UnsignedLessThan);
-            let v53 = constructor_atomic_rmw_body_minmax(
-                ctx, arg0, arg1, arg2, v50, v52, arg4, arg5, arg6,
-            );
-            // Rule at src/isa/s390x/lower.isle line 3073.
-            return v53;
-        }
-        &AtomicRmwOp::Xchg => {
-            let v2 = C::ty_32_or_64(ctx, arg1);
-            if let Some(v3) = v2 {
-                let v5 = C::bigendian(ctx, arg2);
-                if let Some(v6) = v5 {
-                    // Rule at src/isa/s390x/lower.isle line 2960.
-                    return arg6;
-                }
-                let v11 = C::littleendian(ctx, arg2);
-                if let Some(v12) = v11 {
-                    let v13 = constructor_bswap_reg(ctx, v3, arg6);
-                    // Rule at src/isa/s390x/lower.isle line 2963.
-                    return v13;
-                }
-            }
-            let v27 = C::ty_8_or_16(ctx, arg1);
-            if let Some(v28) = v27 {
-                let v30 = constructor_atomic_rmw_body_rxsbg(
-                    ctx,
-                    arg0,
-                    v28,
-                    arg2,
-                    &RxSBGOp::Insert,
-                    arg4,
-                    arg5,
-                    arg6,
-                );
-                // Rule at src/isa/s390x/lower.isle line 2989.
-                return v30;
-            }
-        }
-        &AtomicRmwOp::Xor => {
-            let v27 = C::ty_8_or_16(ctx, arg1);
-            if let Some(v28) = v27 {
-                let v36 = constructor_atomic_rmw_body_rxsbg(
-                    ctx,
-                    arg0,
-                    v28,
-                    arg2,
-                    &RxSBGOp::Xor,
-                    arg4,
-                    arg5,
-                    arg6,
-                );
-                // Rule at src/isa/s390x/lower.isle line 2995.
-                return v36;
-            }
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "atomic_rmw_body", "src/isa/s390x/lower.isle line 2955"
-    )
-}
-
-// Generated as internal constructor for term atomic_rmw_body_rxsbg.
-pub fn constructor_atomic_rmw_body_rxsbg<C: Context>(
-    ctx: &mut C,
-    arg0: &VecMInstBuilder,
-    arg1: Type,
-    arg2: MemFlags,
-    arg3: &RxSBGOp,
-    arg4: WritableReg,
-    arg5: Reg,
-    arg6: Reg,
-) -> Reg {
-    match arg1 {
-        I8 => {
-            let v10 = constructor_push_rxsbg(ctx, arg0, arg3, arg4, arg5, arg6, 0x20, 0x28, 0x18);
-            // Rule at src/isa/s390x/lower.isle line 3005.
-            return v10;
-        }
-        I16 => {
-            let v11 = C::bigendian(ctx, arg2);
-            if let Some(v12) = v11 {
-                let v15 =
-                    constructor_push_rxsbg(ctx, arg0, arg3, arg4, arg5, arg6, 0x20, 0x30, 0x10);
-                // Rule at src/isa/s390x/lower.isle line 3009.
-                return v15;
-            }
-            let v16 = C::littleendian(ctx, arg2);
-            if let Some(v17) = v16 {
-                let v19 = constructor_bswap_reg(ctx, I32, arg6);
-                let v22 =
-                    constructor_push_rxsbg(ctx, arg0, arg3, arg4, arg5, v19, 0x30, 0x40, -0x10);
-                // Rule at src/isa/s390x/lower.isle line 3013.
-                return v22;
-            }
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "atomic_rmw_body_rxsbg", "src/isa/s390x/lower.isle line 3002"
-    )
-}
-
-// Generated as internal constructor for term atomic_rmw_body_invert.
-pub fn constructor_atomic_rmw_body_invert<C: Context>(
-    ctx: &mut C,
-    arg0: &VecMInstBuilder,
-    arg1: Type,
-    arg2: MemFlags,
-    arg3: WritableReg,
-    arg4: Reg,
-) -> Reg {
-    match arg1 {
-        I8 => {
-            let v8 = C::uimm32shifted(ctx, 0xFF000000, 0x0);
-            let v9 = constructor_push_xor_uimm32shifted(ctx, arg0, I32, arg3, arg4, v8);
-            // Rule at src/isa/s390x/lower.isle line 3019.
-            return v9;
-        }
-        I16 => {
-            let v10 = C::bigendian(ctx, arg2);
-            if let Some(v11) = v10 {
-                let v13 = C::uimm32shifted(ctx, 0xFFFF0000, 0x0);
-                let v14 = constructor_push_xor_uimm32shifted(ctx, arg0, I32, arg3, arg4, v13);
-                // Rule at src/isa/s390x/lower.isle line 3022.
-                return v14;
-            }
-            let v15 = C::littleendian(ctx, arg2);
-            if let Some(v16) = v15 {
-                let v18 = C::uimm32shifted(ctx, 0xFFFF, 0x0);
-                let v19 = constructor_push_xor_uimm32shifted(ctx, arg0, I32, arg3, arg4, v18);
-                // Rule at src/isa/s390x/lower.isle line 3025.
-                return v19;
-            }
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "atomic_rmw_body_invert", "src/isa/s390x/lower.isle line 3017"
-    )
-}
-
-// Generated as internal constructor for term atomic_rmw_body_addsub.
-pub fn constructor_atomic_rmw_body_addsub<C: Context>(
-    ctx: &mut C,
-    arg0: &VecMInstBuilder,
-    arg1: Type,
-    arg2: MemFlags,
-    arg3: &ALUOp,
-    arg4: WritableReg,
-    arg5: Reg,
-    arg6: Reg,
-) -> Reg {
-    let v5 = C::bigendian(ctx, arg2);
-    if let Some(v6) = v5 {
-        if arg1 == I16 {
-            let v22 = constructor_lshl_imm(ctx, I32, arg6, 0x10);
-            let v23 = constructor_push_alu_reg(ctx, arg0, arg3, arg4, arg5, v22);
-            // Rule at src/isa/s390x/lower.isle line 3052.
-            return v23;
-        }
-        let v2 = C::ty_32_or_64(ctx, arg1);
-        if let Some(v3) = v2 {
-            let v11 = constructor_push_alu_reg(ctx, arg0, arg3, arg4, arg5, arg6);
-            // Rule at src/isa/s390x/lower.isle line 3038.
-            return v11;
-        }
-    }
-    let v12 = C::littleendian(ctx, arg2);
-    if let Some(v13) = v12 {
-        let v2 = C::ty_32_or_64(ctx, arg1);
-        if let Some(v3) = v2 {
-            let v14 = constructor_push_bswap_reg(ctx, arg0, v3, arg4, arg5);
-            let v15 = constructor_push_alu_reg(ctx, arg0, arg3, arg4, v14, arg6);
-            let v16 = constructor_push_bswap_reg(ctx, arg0, v3, arg4, v15);
-            // Rule at src/isa/s390x/lower.isle line 3042.
-            return v16;
-        }
-        if arg1 == I16 {
-            let v22 = constructor_lshl_imm(ctx, I32, arg6, 0x10);
-            let v24 = constructor_push_bswap_reg(ctx, arg0, I32, arg4, arg5);
-            let v25 = constructor_push_alu_reg(ctx, arg0, arg3, arg4, v24, v22);
-            let v26 = constructor_push_bswap_reg(ctx, arg0, I32, arg4, v25);
-            // Rule at src/isa/s390x/lower.isle line 3060.
-            return v26;
-        }
-    }
-    if arg1 == I8 {
-        let v19 = constructor_lshl_imm(ctx, I32, arg6, 0x18);
-        let v20 = constructor_push_alu_reg(ctx, arg0, arg3, arg4, arg5, v19);
-        // Rule at src/isa/s390x/lower.isle line 3048.
-        return v20;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "atomic_rmw_body_addsub", "src/isa/s390x/lower.isle line 3035"
-    )
-}
-
-// Generated as internal constructor for term atomic_rmw_body_minmax.
-pub fn constructor_atomic_rmw_body_minmax<C: Context>(
-    ctx: &mut C,
-    arg0: &VecMInstBuilder,
-    arg1: Type,
-    arg2: MemFlags,
-    arg3: &CmpOp,
-    arg4: &Cond,
-    arg5: WritableReg,
-    arg6: Reg,
-    arg7: Reg,
-) -> Reg {
-    let v5 = C::bigendian(ctx, arg2);
-    if let Some(v6) = v5 {
-        if arg1 == I16 {
-            let v33 = constructor_lshl_imm(ctx, I32, arg7, 0x10);
-            let v34 = &constructor_cmp_rr(ctx, arg3, v33, arg6);
-            let v19 = &C::invert_cond(ctx, arg4);
-            let v35 = constructor_push_break_if(ctx, arg0, v34, v19);
-            let v37 = constructor_push_rxsbg(
-                ctx,
-                arg0,
-                &RxSBGOp::Insert,
-                arg5,
-                arg6,
-                v33,
-                0x20,
-                0x30,
-                0x0,
-            );
-            // Rule at src/isa/s390x/lower.isle line 3111.
-            return v37;
-        }
-        let v2 = C::ty_32_or_64(ctx, arg1);
-        if let Some(v3) = v2 {
-            let v12 = &constructor_cmp_rr(ctx, arg3, arg7, arg6);
-            let v13 = &C::invert_cond(ctx, arg4);
-            let v14 = constructor_push_break_if(ctx, arg0, v12, v13);
-            // Rule at src/isa/s390x/lower.isle line 3086.
-            return arg7;
-        }
-    }
-    let v15 = C::littleendian(ctx, arg2);
-    if let Some(v16) = v15 {
-        let v2 = C::ty_32_or_64(ctx, arg1);
-        if let Some(v3) = v2 {
-            let v17 = constructor_push_bswap_reg(ctx, arg0, v3, arg5, arg6);
-            let v18 = &constructor_cmp_rr(ctx, arg3, arg7, v17);
-            let v19 = &C::invert_cond(ctx, arg4);
-            let v20 = constructor_push_break_if(ctx, arg0, v18, v19);
-            let v21 = constructor_push_bswap_reg(ctx, arg0, v3, arg5, arg7);
-            // Rule at src/isa/s390x/lower.isle line 3093.
-            return v21;
-        }
-        if arg1 == I16 {
-            let v33 = constructor_lshl_imm(ctx, I32, arg7, 0x10);
-            let v38 = constructor_push_bswap_reg(ctx, arg0, I32, arg5, arg6);
-            let v39 = &constructor_cmp_rr(ctx, arg3, v33, v38);
-            let v40 = &C::invert_cond(ctx, arg4);
-            let v41 = constructor_push_break_if(ctx, arg0, v39, v40);
-            let v42 = constructor_push_rxsbg(
-                ctx,
-                arg0,
-                &RxSBGOp::Insert,
-                arg5,
-                v38,
-                v33,
-                0x20,
-                0x30,
-                0x0,
-            );
-            let v43 = constructor_push_bswap_reg(ctx, arg0, I32, arg5, v42);
-            // Rule at src/isa/s390x/lower.isle line 3118.
-            return v43;
-        }
-    }
-    if arg1 == I8 {
-        let v24 = constructor_lshl_imm(ctx, I32, arg7, 0x18);
-        let v25 = &constructor_cmp_rr(ctx, arg3, v24, arg6);
-        let v19 = &C::invert_cond(ctx, arg4);
-        let v26 = constructor_push_break_if(ctx, arg0, v25, v19);
-        let v31 = constructor_push_rxsbg(
-            ctx,
-            arg0,
-            &RxSBGOp::Insert,
-            arg5,
-            arg6,
-            v24,
-            0x20,
-            0x28,
-            0x0,
-        );
-        // Rule at src/isa/s390x/lower.isle line 3105.
-        return v31;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "atomic_rmw_body_minmax", "src/isa/s390x/lower.isle line 3081"
-    )
-}
-
-// Generated as internal constructor for term atomic_cas_body.
-pub fn constructor_atomic_cas_body<C: Context>(
-    ctx: &mut C,
-    arg0: &VecMInstBuilder,
-    arg1: Type,
-    arg2: MemFlags,
-    arg3: WritableReg,
-    arg4: Reg,
-    arg5: Reg,
-    arg6: Reg,
-) -> Reg {
-    match arg1 {
-        I8 => {
-            let v11 = &constructor_rxsbg_test(ctx, &RxSBGOp::Xor, arg4, arg5, 0x20, 0x28, 0x18);
-            let v13 = &C::intcc_as_cond(ctx, &IntCC::NotEqual);
-            let v14 = constructor_push_break_if(ctx, arg0, v11, v13);
-            let v16 = constructor_push_rxsbg(
-                ctx,
-                arg0,
-                &RxSBGOp::Insert,
-                arg3,
-                arg4,
-                arg6,
-                0x20,
-                0x28,
-                0x18,
-            );
-            // Rule at src/isa/s390x/lower.isle line 3170.
-            return v16;
-        }
-        I16 => {
-            let v17 = C::bigendian(ctx, arg2);
-            if let Some(v18) = v17 {
-                let v21 = &constructor_rxsbg_test(ctx, &RxSBGOp::Xor, arg4, arg5, 0x20, 0x30, 0x10);
-                let v13 = &C::intcc_as_cond(ctx, &IntCC::NotEqual);
-                let v22 = constructor_push_break_if(ctx, arg0, v21, v13);
-                let v23 = constructor_push_rxsbg(
-                    ctx,
-                    arg0,
-                    &RxSBGOp::Insert,
-                    arg3,
-                    arg4,
-                    arg6,
-                    0x20,
-                    0x30,
-                    0x10,
-                );
-                // Rule at src/isa/s390x/lower.isle line 3177.
-                return v23;
-            }
-            let v24 = C::littleendian(ctx, arg2);
-            if let Some(v25) = v24 {
-                let v27 = constructor_bswap_reg(ctx, I32, arg5);
-                let v28 = constructor_bswap_reg(ctx, I32, arg6);
-                let v31 = &constructor_rxsbg_test(ctx, &RxSBGOp::Xor, arg4, v27, 0x30, 0x40, -0x10);
-                let v32 = &C::intcc_as_cond(ctx, &IntCC::NotEqual);
-                let v33 = constructor_push_break_if(ctx, arg0, v31, v32);
-                let v34 = constructor_push_rxsbg(
-                    ctx,
-                    arg0,
-                    &RxSBGOp::Insert,
-                    arg3,
-                    arg4,
-                    v28,
-                    0x30,
-                    0x40,
-                    -0x10,
-                );
-                // Rule at src/isa/s390x/lower.isle line 3188.
-                return v34;
-            }
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "atomic_cas_body", "src/isa/s390x/lower.isle line 3163"
-    )
-}
-
-// Generated as internal constructor for term atomic_store_impl.
-pub fn constructor_atomic_store_impl<C: Context>(
-    ctx: &mut C,
-    arg0: &SideEffectNoResult,
-) -> InstOutput {
-    let v1 = constructor_side_effect(ctx, arg0);
-    let v2 = &constructor_fence_impl(ctx);
-    let v3 = constructor_side_effect(ctx, v2);
-    // Rule at src/isa/s390x/lower.isle line 3234.
-    return v3;
-}
-
-// Generated as internal constructor for term icmp_val.
-pub fn constructor_icmp_val<C: Context>(
-    ctx: &mut C,
-    arg0: bool,
-    arg1: &IntCC,
-    arg2: Value,
-    arg3: Value,
-) -> ProducesBool {
-    match arg1 {
-        &IntCC::Equal => {
-            let v5 = C::value_type(ctx, arg2);
-            let v16 = C::vr128_ty(ctx, v5);
-            if let Some(v17) = v16 {
-                let v19 = C::put_in_reg(ctx, arg2);
-                let v20 = C::put_in_reg(ctx, arg3);
-                let v21 = &constructor_vec_cmpeqs(ctx, I64X2, v19, v20);
-                let v23 = &C::floatcc_as_cond(ctx, &FloatCC::Equal);
-                let v24 = &constructor_bool(ctx, v21, v23);
-                // Rule at src/isa/s390x/lower.isle line 3380.
-                return v24.clone();
-            }
-        }
-        &IntCC::NotEqual => {
-            let v5 = C::value_type(ctx, arg2);
-            let v16 = C::vr128_ty(ctx, v5);
-            if let Some(v17) = v16 {
-                let v19 = C::put_in_reg(ctx, arg2);
-                let v20 = C::put_in_reg(ctx, arg3);
-                let v21 = &constructor_vec_cmpeqs(ctx, I64X2, v19, v20);
-                let v26 = &C::floatcc_as_cond(ctx, &FloatCC::NotEqual);
-                let v27 = &constructor_bool(ctx, v21, v26);
-                // Rule at src/isa/s390x/lower.isle line 3383.
-                return v27.clone();
-            }
-        }
-        &IntCC::SignedGreaterThan => {
-            let v5 = C::value_type(ctx, arg2);
-            let v16 = C::vr128_ty(ctx, v5);
-            if let Some(v17) = v16 {
-                let v19 = C::put_in_reg(ctx, arg2);
-                let v20 = C::put_in_reg(ctx, arg3);
-                let v28 = &constructor_vec_int128_scmphi(ctx, v19, v20);
-                // Rule at src/isa/s390x/lower.isle line 3389.
-                return v28.clone();
-            }
-        }
-        &IntCC::SignedGreaterThanOrEqual => {
-            let v5 = C::value_type(ctx, arg2);
-            let v16 = C::vr128_ty(ctx, v5);
-            if let Some(v17) = v16 {
-                let v29 = C::put_in_reg(ctx, arg3);
-                let v30 = C::put_in_reg(ctx, arg2);
-                let v31 = &constructor_vec_int128_scmphi(ctx, v29, v30);
-                let v32 = &constructor_invert_bool(ctx, v31);
-                // Rule at src/isa/s390x/lower.isle line 3393.
-                return v32.clone();
-            }
-        }
-        &IntCC::SignedLessThan => {
-            let v5 = C::value_type(ctx, arg2);
-            let v16 = C::vr128_ty(ctx, v5);
-            if let Some(v17) = v16 {
-                let v29 = C::put_in_reg(ctx, arg3);
-                let v30 = C::put_in_reg(ctx, arg2);
-                let v31 = &constructor_vec_int128_scmphi(ctx, v29, v30);
-                // Rule at src/isa/s390x/lower.isle line 3391.
-                return v31.clone();
-            }
-        }
-        &IntCC::SignedLessThanOrEqual => {
-            let v5 = C::value_type(ctx, arg2);
-            let v16 = C::vr128_ty(ctx, v5);
-            if let Some(v17) = v16 {
-                let v19 = C::put_in_reg(ctx, arg2);
-                let v20 = C::put_in_reg(ctx, arg3);
-                let v28 = &constructor_vec_int128_scmphi(ctx, v19, v20);
-                let v33 = &constructor_invert_bool(ctx, v28);
-                // Rule at src/isa/s390x/lower.isle line 3395.
-                return v33.clone();
-            }
-        }
-        &IntCC::UnsignedGreaterThan => {
-            let v5 = C::value_type(ctx, arg2);
-            let v16 = C::vr128_ty(ctx, v5);
-            if let Some(v17) = v16 {
-                let v19 = C::put_in_reg(ctx, arg2);
-                let v20 = C::put_in_reg(ctx, arg3);
-                let v34 = &constructor_vec_int128_ucmphi(ctx, v19, v20);
-                // Rule at src/isa/s390x/lower.isle line 3400.
-                return v34.clone();
-            }
-        }
-        &IntCC::UnsignedGreaterThanOrEqual => {
-            let v5 = C::value_type(ctx, arg2);
-            let v16 = C::vr128_ty(ctx, v5);
-            if let Some(v17) = v16 {
-                let v29 = C::put_in_reg(ctx, arg3);
-                let v30 = C::put_in_reg(ctx, arg2);
-                let v35 = &constructor_vec_int128_ucmphi(ctx, v29, v30);
-                let v36 = &constructor_invert_bool(ctx, v35);
-                // Rule at src/isa/s390x/lower.isle line 3404.
-                return v36.clone();
-            }
-        }
-        &IntCC::UnsignedLessThan => {
-            let v5 = C::value_type(ctx, arg2);
-            let v16 = C::vr128_ty(ctx, v5);
-            if let Some(v17) = v16 {
-                let v29 = C::put_in_reg(ctx, arg3);
-                let v30 = C::put_in_reg(ctx, arg2);
-                let v35 = &constructor_vec_int128_ucmphi(ctx, v29, v30);
-                // Rule at src/isa/s390x/lower.isle line 3402.
-                return v35.clone();
-            }
-        }
-        &IntCC::UnsignedLessThanOrEqual => {
-            let v5 = C::value_type(ctx, arg2);
-            let v16 = C::vr128_ty(ctx, v5);
-            if let Some(v17) = v16 {
-                let v19 = C::put_in_reg(ctx, arg2);
-                let v20 = C::put_in_reg(ctx, arg3);
-                let v34 = &constructor_vec_int128_ucmphi(ctx, v19, v20);
-                let v37 = &constructor_invert_bool(ctx, v34);
-                // Rule at src/isa/s390x/lower.isle line 3406.
-                return v37.clone();
-            }
-        }
-        _ => {}
-    }
-    let v5 = C::value_type(ctx, arg2);
-    let v6 = C::fits_in_64(ctx, v5);
-    if let Some(v7) = v6 {
-        let v2 = C::signed(ctx, arg1);
-        if let Some(v3) = v2 {
-            let v9 = &constructor_icmps_val(ctx, arg0, arg2, arg3);
-            let v10 = &C::intcc_as_cond(ctx, arg1);
-            let v11 = &constructor_bool(ctx, v9, v10);
-            // Rule at src/isa/s390x/lower.isle line 3301.
-            return v11.clone();
-        }
-        let v12 = C::unsigned(ctx, arg1);
-        if let Some(v13) = v12 {
-            let v14 = &constructor_icmpu_val(ctx, arg0, arg2, arg3);
-            let v10 = &C::intcc_as_cond(ctx, arg1);
-            let v15 = &constructor_bool(ctx, v14, v10);
-            // Rule at src/isa/s390x/lower.isle line 3304.
-            return v15.clone();
-        }
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "icmp_val", "src/isa/s390x/lower.isle line 3298"
-    )
-}
-
-// Generated as internal constructor for term icmps_val.
-pub fn constructor_icmps_val<C: Context>(
-    ctx: &mut C,
-    arg0: bool,
-    arg1: Value,
-    arg2: Value,
-) -> ProducesFlags {
-    let v2 = C::value_type(ctx, arg1);
-    let v3 = C::fits_in_64(ctx, v2);
-    if let Some(v4) = v3 {
-        if arg0 == true {
-            let v28 = C::sinkable_inst(ctx, arg2);
-            if let Some(v29) = v28 {
-                let v30 = &C::inst_data(ctx, v29);
-                if let &InstructionData::Load {
-                    opcode: ref v31,
-                    arg: v32,
-                    flags: v33,
-                    offset: v34,
-                } = v30
-                {
-                    match v31 {
-                        &Opcode::Load => {
-                            let v35 = C::bigendian(ctx, v33);
-                            if let Some(v36) = v35 {
-                                let v25 = C::value_type(ctx, arg2);
-                                if v25 == I16 {
-                                    let v6 = constructor_ty_ext32(ctx, v4);
-                                    let v7 = constructor_put_in_reg_sext32(ctx, arg1);
-                                    let v39 = &constructor_sink_load(ctx, v29);
-                                    let v40 = &constructor_icmps_mem_sext16(ctx, v6, v7, v39);
-                                    // Rule at src/isa/s390x/lower.isle line 3330.
-                                    return v40.clone();
-                                }
-                                let v26 = C::ty_32_or_64(ctx, v25);
-                                if let Some(v27) = v26 {
-                                    let v16 = C::put_in_reg(ctx, arg1);
-                                    let v37 = &constructor_sink_load(ctx, v29);
-                                    let v38 = &constructor_icmps_mem(ctx, v4, v16, v37);
-                                    // Rule at src/isa/s390x/lower.isle line 3326.
-                                    return v38.clone();
-                                }
-                            }
-                        }
-                        &Opcode::Sload16 => {
-                            let v35 = C::bigendian(ctx, v33);
-                            if let Some(v36) = v35 {
-                                let v16 = C::put_in_reg(ctx, arg1);
-                                let v41 = &constructor_sink_sload16(ctx, v29);
-                                let v42 = &constructor_icmps_mem_sext16(ctx, v4, v16, v41);
-                                // Rule at src/isa/s390x/lower.isle line 3334.
-                                return v42.clone();
-                            }
-                        }
-                        &Opcode::Sload32 => {
-                            let v35 = C::bigendian(ctx, v33);
-                            if let Some(v36) = v35 {
-                                let v16 = C::put_in_reg(ctx, arg1);
-                                let v43 = &constructor_sink_sload32(ctx, v29);
-                                let v44 = &constructor_icmps_mem_sext32(ctx, v4, v16, v43);
-                                // Rule at src/isa/s390x/lower.isle line 3336.
-                                return v44.clone();
-                            }
-                        }
-                        _ => {}
-                    }
-                }
-            }
-        }
-        let v10 = C::def_inst(ctx, arg2);
-        if let Some(v11) = v10 {
-            let v12 = &C::inst_data(ctx, v11);
-            if let &InstructionData::Unary {
-                opcode: ref v13,
-                arg: v14,
-            } = v12
-            {
-                if let &Opcode::Sextend = v13 {
-                    let v15 = C::value_type(ctx, v14);
-                    if v15 == I32 {
-                        let v16 = C::put_in_reg(ctx, arg1);
-                        let v17 = C::put_in_reg(ctx, v14);
-                        let v18 = &constructor_icmps_reg_sext32(ctx, v4, v16, v17);
-                        // Rule at src/isa/s390x/lower.isle line 3316.
-                        return v18.clone();
-                    }
-                }
-            }
-        }
-        let v19 = C::i16_from_value(ctx, arg2);
-        if let Some(v20) = v19 {
-            let v6 = constructor_ty_ext32(ctx, v4);
-            let v7 = constructor_put_in_reg_sext32(ctx, arg1);
-            let v21 = &constructor_icmps_simm16(ctx, v6, v7, v20);
-            // Rule at src/isa/s390x/lower.isle line 3320.
-            return v21.clone();
-        }
-        let v22 = C::i32_from_value(ctx, arg2);
-        if let Some(v23) = v22 {
-            let v6 = constructor_ty_ext32(ctx, v4);
-            let v7 = constructor_put_in_reg_sext32(ctx, arg1);
-            let v24 = &constructor_icmps_simm32(ctx, v6, v7, v23);
-            // Rule at src/isa/s390x/lower.isle line 3322.
-            return v24.clone();
-        }
-        let v6 = constructor_ty_ext32(ctx, v4);
-        let v7 = constructor_put_in_reg_sext32(ctx, arg1);
-        let v8 = constructor_put_in_reg_sext32(ctx, arg2);
-        let v9 = &constructor_icmps_reg(ctx, v6, v7, v8);
-        // Rule at src/isa/s390x/lower.isle line 3312.
-        return v9.clone();
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "icmps_val", "src/isa/s390x/lower.isle line 3309"
-    )
-}
-
-// Generated as internal constructor for term icmpu_val.
-pub fn constructor_icmpu_val<C: Context>(
-    ctx: &mut C,
-    arg0: bool,
-    arg1: Value,
-    arg2: Value,
-) -> ProducesFlags {
-    let v2 = C::value_type(ctx, arg1);
-    let v3 = C::fits_in_64(ctx, v2);
-    if let Some(v4) = v3 {
-        if arg0 == true {
-            let v25 = C::sinkable_inst(ctx, arg2);
-            if let Some(v26) = v25 {
-                let v27 = &C::inst_data(ctx, v26);
-                if let &InstructionData::Load {
-                    opcode: ref v28,
-                    arg: v29,
-                    flags: v30,
-                    offset: v31,
-                } = v27
-                {
-                    match v28 {
-                        &Opcode::Load => {
-                            let v32 = C::bigendian(ctx, v30);
-                            if let Some(v33) = v32 {
-                                let v22 = C::value_type(ctx, arg2);
-                                let v23 = C::ty_32_or_64(ctx, v22);
-                                if let Some(v24) = v23 {
-                                    let v16 = C::put_in_reg(ctx, arg1);
-                                    let v34 = &constructor_sink_load(ctx, v26);
-                                    let v35 = &constructor_icmpu_mem(ctx, v4, v16, v34);
-                                    // Rule at src/isa/s390x/lower.isle line 3356.
-                                    return v35.clone();
-                                }
-                                if v22 == I16 {
-                                    let v36 = constructor_load_sym(ctx, v26);
-                                    if let Some(v37) = v36 {
-                                        let v6 = constructor_ty_ext32(ctx, v4);
-                                        let v7 = constructor_put_in_reg_zext32(ctx, arg1);
-                                        let v38 = &constructor_sink_load(ctx, v37);
-                                        let v39 = &constructor_icmpu_mem_zext16(ctx, v6, v7, v38);
-                                        // Rule at src/isa/s390x/lower.isle line 3362.
-                                        return v39.clone();
-                                    }
-                                }
-                            }
-                        }
-                        &Opcode::Uload16 => {
-                            let v32 = C::bigendian(ctx, v30);
-                            if let Some(v33) = v32 {
-                                let v40 = constructor_uload16_sym(ctx, v26);
-                                if let Some(v41) = v40 {
-                                    let v16 = C::put_in_reg(ctx, arg1);
-                                    let v42 = &constructor_sink_uload16(ctx, v41);
-                                    let v43 = &constructor_icmpu_mem_zext16(ctx, v4, v16, v42);
-                                    // Rule at src/isa/s390x/lower.isle line 3370.
-                                    return v43.clone();
-                                }
-                            }
-                        }
-                        &Opcode::Uload32 => {
-                            let v32 = C::bigendian(ctx, v30);
-                            if let Some(v33) = v32 {
-                                let v16 = C::put_in_reg(ctx, arg1);
-                                let v44 = &constructor_sink_uload32(ctx, v26);
-                                let v45 = &constructor_icmpu_mem_zext32(ctx, v4, v16, v44);
-                                // Rule at src/isa/s390x/lower.isle line 3374.
-                                return v45.clone();
-                            }
-                        }
-                        _ => {}
-                    }
-                }
-            }
-        }
-        let v19 = C::u32_from_value(ctx, arg2);
-        if let Some(v20) = v19 {
-            let v6 = constructor_ty_ext32(ctx, v4);
-            let v7 = constructor_put_in_reg_zext32(ctx, arg1);
-            let v21 = &constructor_icmpu_uimm32(ctx, v6, v7, v20);
-            // Rule at src/isa/s390x/lower.isle line 3352.
-            return v21.clone();
-        }
-        let v10 = C::def_inst(ctx, arg2);
-        if let Some(v11) = v10 {
-            let v12 = &C::inst_data(ctx, v11);
-            if let &InstructionData::Unary {
-                opcode: ref v13,
-                arg: v14,
-            } = v12
-            {
-                if let &Opcode::Uextend = v13 {
-                    let v15 = C::value_type(ctx, v14);
-                    if v15 == I32 {
-                        let v16 = C::put_in_reg(ctx, arg1);
-                        let v17 = C::put_in_reg(ctx, v14);
-                        let v18 = &constructor_icmpu_reg_zext32(ctx, v4, v16, v17);
-                        // Rule at src/isa/s390x/lower.isle line 3348.
-                        return v18.clone();
-                    }
-                }
-            }
-        }
-        let v6 = constructor_ty_ext32(ctx, v4);
-        let v7 = constructor_put_in_reg_zext32(ctx, arg1);
-        let v8 = constructor_put_in_reg_zext32(ctx, arg2);
-        let v9 = &constructor_icmpu_reg(ctx, v6, v7, v8);
-        // Rule at src/isa/s390x/lower.isle line 3344.
-        return v9.clone();
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "icmpu_val", "src/isa/s390x/lower.isle line 3341"
-    )
-}
-
-// Generated as internal constructor for term fcmp_val.
-pub fn constructor_fcmp_val<C: Context>(
-    ctx: &mut C,
-    arg0: &FloatCC,
-    arg1: Value,
-    arg2: Value,
-) -> ProducesBool {
-    let v4 = C::put_in_reg(ctx, arg1);
-    let v5 = C::put_in_reg(ctx, arg2);
-    let v2 = C::value_type(ctx, arg1);
-    let v6 = &constructor_fcmp_reg(ctx, v2, v4, v5);
-    let v7 = &C::floatcc_as_cond(ctx, arg0);
-    let v8 = &constructor_bool(ctx, v6, v7);
-    // Rule at src/isa/s390x/lower.isle line 3444.
-    return v8.clone();
-}
-
-// Generated as internal constructor for term vall_true_val.
-pub fn constructor_vall_true_val<C: Context>(ctx: &mut C, arg0: Value) -> ProducesBool {
-    let v9 = C::def_inst(ctx, arg0);
-    if let Some(v10) = v9 {
-        let v11 = C::first_result(ctx, v10);
-        if let Some(v12) = v11 {
-            let v14 = &C::inst_data(ctx, v10);
-            match v14 {
-                &InstructionData::FloatCompare {
-                    opcode: ref v42,
-                    args: ref v43,
-                    cond: ref v44,
-                } => {
-                    if let &Opcode::Fcmp = v42 {
-                        match v44 {
-                            &FloatCC::Equal => {
-                                let v45 = C::unpack_value_array_2(ctx, v43);
-                                let v48 = C::put_in_reg(ctx, v45.0);
-                                let v49 = C::put_in_reg(ctx, v45.1);
-                                let v13 = C::value_type(ctx, v12);
-                                let v50 = &constructor_vec_fcmpeqs(ctx, v13, v48, v49);
-                                let v25 = &C::floatcc_as_cond(ctx, &FloatCC::Equal);
-                                let v51 = &constructor_bool(ctx, v50, v25);
-                                // Rule at src/isa/s390x/lower.isle line 3527.
-                                return v51.clone();
-                            }
-                            &FloatCC::GreaterThan => {
-                                let v45 = C::unpack_value_array_2(ctx, v43);
-                                let v48 = C::put_in_reg(ctx, v45.0);
-                                let v49 = C::put_in_reg(ctx, v45.1);
-                                let v13 = C::value_type(ctx, v12);
-                                let v53 = &constructor_vec_fcmphs(ctx, v13, v48, v49);
-                                let v25 = &C::floatcc_as_cond(ctx, &FloatCC::Equal);
-                                let v54 = &constructor_bool(ctx, v53, v25);
-                                // Rule at src/isa/s390x/lower.isle line 3533.
-                                return v54.clone();
-                            }
-                            &FloatCC::GreaterThanOrEqual => {
-                                let v45 = C::unpack_value_array_2(ctx, v43);
-                                let v48 = C::put_in_reg(ctx, v45.0);
-                                let v49 = C::put_in_reg(ctx, v45.1);
-                                let v13 = C::value_type(ctx, v12);
-                                let v56 = &constructor_vec_fcmphes(ctx, v13, v48, v49);
-                                let v25 = &C::floatcc_as_cond(ctx, &FloatCC::Equal);
-                                let v57 = &constructor_bool(ctx, v56, v25);
-                                // Rule at src/isa/s390x/lower.isle line 3539.
-                                return v57.clone();
-                            }
-                            &FloatCC::LessThan => {
-                                let v45 = C::unpack_value_array_2(ctx, v43);
-                                let v59 = C::put_in_reg(ctx, v45.1);
-                                let v60 = C::put_in_reg(ctx, v45.0);
-                                let v13 = C::value_type(ctx, v12);
-                                let v61 = &constructor_vec_fcmphs(ctx, v13, v59, v60);
-                                let v25 = &C::floatcc_as_cond(ctx, &FloatCC::Equal);
-                                let v62 = &constructor_bool(ctx, v61, v25);
-                                // Rule at src/isa/s390x/lower.isle line 3545.
-                                return v62.clone();
-                            }
-                            &FloatCC::LessThanOrEqual => {
-                                let v45 = C::unpack_value_array_2(ctx, v43);
-                                let v59 = C::put_in_reg(ctx, v45.1);
-                                let v60 = C::put_in_reg(ctx, v45.0);
-                                let v13 = C::value_type(ctx, v12);
-                                let v64 = &constructor_vec_fcmphes(ctx, v13, v59, v60);
-                                let v25 = &C::floatcc_as_cond(ctx, &FloatCC::Equal);
-                                let v65 = &constructor_bool(ctx, v64, v25);
-                                // Rule at src/isa/s390x/lower.isle line 3551.
-                                return v65.clone();
-                            }
-                            &FloatCC::NotEqual => {
-                                let v45 = C::unpack_value_array_2(ctx, v43);
-                                let v48 = C::put_in_reg(ctx, v45.0);
-                                let v49 = C::put_in_reg(ctx, v45.1);
-                                let v13 = C::value_type(ctx, v12);
-                                let v50 = &constructor_vec_fcmpeqs(ctx, v13, v48, v49);
-                                let v7 = &C::floatcc_as_cond(ctx, &FloatCC::Unordered);
-                                let v52 = &constructor_bool(ctx, v50, v7);
-                                // Rule at src/isa/s390x/lower.isle line 3530.
-                                return v52.clone();
-                            }
-                            &FloatCC::UnorderedOrGreaterThan => {
-                                let v45 = C::unpack_value_array_2(ctx, v43);
-                                let v59 = C::put_in_reg(ctx, v45.1);
-                                let v60 = C::put_in_reg(ctx, v45.0);
-                                let v13 = C::value_type(ctx, v12);
-                                let v64 = &constructor_vec_fcmphes(ctx, v13, v59, v60);
-                                let v7 = &C::floatcc_as_cond(ctx, &FloatCC::Unordered);
-                                let v66 = &constructor_bool(ctx, v64, v7);
-                                // Rule at src/isa/s390x/lower.isle line 3554.
-                                return v66.clone();
-                            }
-                            &FloatCC::UnorderedOrGreaterThanOrEqual => {
-                                let v45 = C::unpack_value_array_2(ctx, v43);
-                                let v59 = C::put_in_reg(ctx, v45.1);
-                                let v60 = C::put_in_reg(ctx, v45.0);
-                                let v13 = C::value_type(ctx, v12);
-                                let v61 = &constructor_vec_fcmphs(ctx, v13, v59, v60);
-                                let v7 = &C::floatcc_as_cond(ctx, &FloatCC::Unordered);
-                                let v63 = &constructor_bool(ctx, v61, v7);
-                                // Rule at src/isa/s390x/lower.isle line 3548.
-                                return v63.clone();
-                            }
-                            &FloatCC::UnorderedOrLessThan => {
-                                let v45 = C::unpack_value_array_2(ctx, v43);
-                                let v48 = C::put_in_reg(ctx, v45.0);
-                                let v49 = C::put_in_reg(ctx, v45.1);
-                                let v13 = C::value_type(ctx, v12);
-                                let v56 = &constructor_vec_fcmphes(ctx, v13, v48, v49);
-                                let v7 = &C::floatcc_as_cond(ctx, &FloatCC::Unordered);
-                                let v58 = &constructor_bool(ctx, v56, v7);
-                                // Rule at src/isa/s390x/lower.isle line 3542.
-                                return v58.clone();
-                            }
-                            &FloatCC::UnorderedOrLessThanOrEqual => {
-                                let v45 = C::unpack_value_array_2(ctx, v43);
-                                let v48 = C::put_in_reg(ctx, v45.0);
-                                let v49 = C::put_in_reg(ctx, v45.1);
-                                let v13 = C::value_type(ctx, v12);
-                                let v53 = &constructor_vec_fcmphs(ctx, v13, v48, v49);
-                                let v7 = &C::floatcc_as_cond(ctx, &FloatCC::Unordered);
-                                let v55 = &constructor_bool(ctx, v53, v7);
-                                // Rule at src/isa/s390x/lower.isle line 3536.
-                                return v55.clone();
-                            }
-                            _ => {}
-                        }
-                    }
-                }
-                &InstructionData::IntCompare {
-                    opcode: ref v15,
-                    args: ref v16,
-                    cond: ref v17,
-                } => {
-                    if let &Opcode::Icmp = v15 {
-                        match v17 {
-                            &IntCC::Equal => {
-                                let v18 = C::unpack_value_array_2(ctx, v16);
-                                let v21 = C::put_in_reg(ctx, v18.0);
-                                let v22 = C::put_in_reg(ctx, v18.1);
-                                let v13 = C::value_type(ctx, v12);
-                                let v23 = &constructor_vec_cmpeqs(ctx, v13, v21, v22);
-                                let v25 = &C::floatcc_as_cond(ctx, &FloatCC::Equal);
-                                let v26 = &constructor_bool(ctx, v23, v25);
-                                // Rule at src/isa/s390x/lower.isle line 3495.
-                                return v26.clone();
-                            }
-                            &IntCC::NotEqual => {
-                                let v18 = C::unpack_value_array_2(ctx, v16);
-                                let v21 = C::put_in_reg(ctx, v18.0);
-                                let v22 = C::put_in_reg(ctx, v18.1);
-                                let v13 = C::value_type(ctx, v12);
-                                let v23 = &constructor_vec_cmpeqs(ctx, v13, v21, v22);
-                                let v7 = &C::floatcc_as_cond(ctx, &FloatCC::Unordered);
-                                let v27 = &constructor_bool(ctx, v23, v7);
-                                // Rule at src/isa/s390x/lower.isle line 3498.
-                                return v27.clone();
-                            }
-                            &IntCC::SignedGreaterThan => {
-                                let v18 = C::unpack_value_array_2(ctx, v16);
-                                let v21 = C::put_in_reg(ctx, v18.0);
-                                let v22 = C::put_in_reg(ctx, v18.1);
-                                let v13 = C::value_type(ctx, v12);
-                                let v28 = &constructor_vec_cmphs(ctx, v13, v21, v22);
-                                let v25 = &C::floatcc_as_cond(ctx, &FloatCC::Equal);
-                                let v29 = &constructor_bool(ctx, v28, v25);
-                                // Rule at src/isa/s390x/lower.isle line 3501.
-                                return v29.clone();
-                            }
-                            &IntCC::SignedGreaterThanOrEqual => {
-                                let v18 = C::unpack_value_array_2(ctx, v16);
-                                let v31 = C::put_in_reg(ctx, v18.1);
-                                let v32 = C::put_in_reg(ctx, v18.0);
-                                let v13 = C::value_type(ctx, v12);
-                                let v33 = &constructor_vec_cmphs(ctx, v13, v31, v32);
-                                let v7 = &C::floatcc_as_cond(ctx, &FloatCC::Unordered);
-                                let v35 = &constructor_bool(ctx, v33, v7);
-                                // Rule at src/isa/s390x/lower.isle line 3510.
-                                return v35.clone();
-                            }
-                            &IntCC::SignedLessThan => {
-                                let v18 = C::unpack_value_array_2(ctx, v16);
-                                let v31 = C::put_in_reg(ctx, v18.1);
-                                let v32 = C::put_in_reg(ctx, v18.0);
-                                let v13 = C::value_type(ctx, v12);
-                                let v33 = &constructor_vec_cmphs(ctx, v13, v31, v32);
-                                let v25 = &C::floatcc_as_cond(ctx, &FloatCC::Equal);
-                                let v34 = &constructor_bool(ctx, v33, v25);
-                                // Rule at src/isa/s390x/lower.isle line 3507.
-                                return v34.clone();
-                            }
-                            &IntCC::SignedLessThanOrEqual => {
-                                let v18 = C::unpack_value_array_2(ctx, v16);
-                                let v21 = C::put_in_reg(ctx, v18.0);
-                                let v22 = C::put_in_reg(ctx, v18.1);
-                                let v13 = C::value_type(ctx, v12);
-                                let v28 = &constructor_vec_cmphs(ctx, v13, v21, v22);
-                                let v7 = &C::floatcc_as_cond(ctx, &FloatCC::Unordered);
-                                let v30 = &constructor_bool(ctx, v28, v7);
-                                // Rule at src/isa/s390x/lower.isle line 3504.
-                                return v30.clone();
-                            }
-                            &IntCC::UnsignedGreaterThan => {
-                                let v18 = C::unpack_value_array_2(ctx, v16);
-                                let v21 = C::put_in_reg(ctx, v18.0);
-                                let v22 = C::put_in_reg(ctx, v18.1);
-                                let v13 = C::value_type(ctx, v12);
-                                let v36 = &constructor_vec_cmphls(ctx, v13, v21, v22);
-                                let v25 = &C::floatcc_as_cond(ctx, &FloatCC::Equal);
-                                let v37 = &constructor_bool(ctx, v36, v25);
-                                // Rule at src/isa/s390x/lower.isle line 3513.
-                                return v37.clone();
-                            }
-                            &IntCC::UnsignedGreaterThanOrEqual => {
-                                let v18 = C::unpack_value_array_2(ctx, v16);
-                                let v31 = C::put_in_reg(ctx, v18.1);
-                                let v32 = C::put_in_reg(ctx, v18.0);
-                                let v13 = C::value_type(ctx, v12);
-                                let v39 = &constructor_vec_cmphls(ctx, v13, v31, v32);
-                                let v7 = &C::floatcc_as_cond(ctx, &FloatCC::Unordered);
-                                let v41 = &constructor_bool(ctx, v39, v7);
-                                // Rule at src/isa/s390x/lower.isle line 3522.
-                                return v41.clone();
-                            }
-                            &IntCC::UnsignedLessThan => {
-                                let v18 = C::unpack_value_array_2(ctx, v16);
-                                let v31 = C::put_in_reg(ctx, v18.1);
-                                let v32 = C::put_in_reg(ctx, v18.0);
-                                let v13 = C::value_type(ctx, v12);
-                                let v39 = &constructor_vec_cmphls(ctx, v13, v31, v32);
-                                let v25 = &C::floatcc_as_cond(ctx, &FloatCC::Equal);
-                                let v40 = &constructor_bool(ctx, v39, v25);
-                                // Rule at src/isa/s390x/lower.isle line 3519.
-                                return v40.clone();
-                            }
-                            &IntCC::UnsignedLessThanOrEqual => {
-                                let v18 = C::unpack_value_array_2(ctx, v16);
-                                let v21 = C::put_in_reg(ctx, v18.0);
-                                let v22 = C::put_in_reg(ctx, v18.1);
-                                let v13 = C::value_type(ctx, v12);
-                                let v36 = &constructor_vec_cmphls(ctx, v13, v21, v22);
-                                let v7 = &C::floatcc_as_cond(ctx, &FloatCC::Unordered);
-                                let v38 = &constructor_bool(ctx, v36, v7);
-                                // Rule at src/isa/s390x/lower.isle line 3516.
-                                return v38.clone();
-                            }
-                            _ => {}
-                        }
-                    }
-                }
-                _ => {}
-            }
-        }
-    }
-    let v2 = C::put_in_reg(ctx, arg0);
-    let v1 = C::value_type(ctx, arg0);
-    let v4 = constructor_vec_imm(ctx, v1, 0x0);
-    let v5 = &constructor_vec_cmpeqs(ctx, v1, v2, v4);
-    let v7 = &C::floatcc_as_cond(ctx, &FloatCC::Unordered);
-    let v8 = &constructor_bool(ctx, v5, v7);
-    // Rule at src/isa/s390x/lower.isle line 3490.
-    return v8.clone();
-}
-
-// Generated as internal constructor for term vany_true_val.
-pub fn constructor_vany_true_val<C: Context>(ctx: &mut C, arg0: Value) -> ProducesBool {
-    let v9 = C::def_inst(ctx, arg0);
-    if let Some(v10) = v9 {
-        let v11 = C::first_result(ctx, v10);
-        if let Some(v12) = v11 {
-            let v14 = &C::inst_data(ctx, v10);
-            match v14 {
-                &InstructionData::FloatCompare {
-                    opcode: ref v42,
-                    args: ref v43,
-                    cond: ref v44,
-                } => {
-                    if let &Opcode::Fcmp = v42 {
-                        match v44 {
-                            &FloatCC::Equal => {
-                                let v45 = C::unpack_value_array_2(ctx, v43);
-                                let v48 = C::put_in_reg(ctx, v45.0);
-                                let v49 = C::put_in_reg(ctx, v45.1);
-                                let v13 = C::value_type(ctx, v12);
-                                let v50 = &constructor_vec_fcmpeqs(ctx, v13, v48, v49);
-                                let v25 = &C::floatcc_as_cond(ctx, &FloatCC::Ordered);
-                                let v51 = &constructor_bool(ctx, v50, v25);
-                                // Rule at src/isa/s390x/lower.isle line 3605.
-                                return v51.clone();
-                            }
-                            &FloatCC::GreaterThan => {
-                                let v45 = C::unpack_value_array_2(ctx, v43);
-                                let v48 = C::put_in_reg(ctx, v45.0);
-                                let v49 = C::put_in_reg(ctx, v45.1);
-                                let v13 = C::value_type(ctx, v12);
-                                let v53 = &constructor_vec_fcmphs(ctx, v13, v48, v49);
-                                let v25 = &C::floatcc_as_cond(ctx, &FloatCC::Ordered);
-                                let v54 = &constructor_bool(ctx, v53, v25);
-                                // Rule at src/isa/s390x/lower.isle line 3611.
-                                return v54.clone();
-                            }
-                            &FloatCC::GreaterThanOrEqual => {
-                                let v45 = C::unpack_value_array_2(ctx, v43);
-                                let v48 = C::put_in_reg(ctx, v45.0);
-                                let v49 = C::put_in_reg(ctx, v45.1);
-                                let v13 = C::value_type(ctx, v12);
-                                let v56 = &constructor_vec_fcmphes(ctx, v13, v48, v49);
-                                let v25 = &C::floatcc_as_cond(ctx, &FloatCC::Ordered);
-                                let v57 = &constructor_bool(ctx, v56, v25);
-                                // Rule at src/isa/s390x/lower.isle line 3617.
-                                return v57.clone();
-                            }
-                            &FloatCC::LessThan => {
-                                let v45 = C::unpack_value_array_2(ctx, v43);
-                                let v59 = C::put_in_reg(ctx, v45.1);
-                                let v60 = C::put_in_reg(ctx, v45.0);
-                                let v13 = C::value_type(ctx, v12);
-                                let v61 = &constructor_vec_fcmphs(ctx, v13, v59, v60);
-                                let v25 = &C::floatcc_as_cond(ctx, &FloatCC::Ordered);
-                                let v62 = &constructor_bool(ctx, v61, v25);
-                                // Rule at src/isa/s390x/lower.isle line 3623.
-                                return v62.clone();
-                            }
-                            &FloatCC::LessThanOrEqual => {
-                                let v45 = C::unpack_value_array_2(ctx, v43);
-                                let v59 = C::put_in_reg(ctx, v45.1);
-                                let v60 = C::put_in_reg(ctx, v45.0);
-                                let v13 = C::value_type(ctx, v12);
-                                let v64 = &constructor_vec_fcmphes(ctx, v13, v59, v60);
-                                let v25 = &C::floatcc_as_cond(ctx, &FloatCC::Ordered);
-                                let v65 = &constructor_bool(ctx, v64, v25);
-                                // Rule at src/isa/s390x/lower.isle line 3629.
-                                return v65.clone();
-                            }
-                            &FloatCC::NotEqual => {
-                                let v45 = C::unpack_value_array_2(ctx, v43);
-                                let v48 = C::put_in_reg(ctx, v45.0);
-                                let v49 = C::put_in_reg(ctx, v45.1);
-                                let v13 = C::value_type(ctx, v12);
-                                let v50 = &constructor_vec_fcmpeqs(ctx, v13, v48, v49);
-                                let v7 = &C::floatcc_as_cond(ctx, &FloatCC::NotEqual);
-                                let v52 = &constructor_bool(ctx, v50, v7);
-                                // Rule at src/isa/s390x/lower.isle line 3608.
-                                return v52.clone();
-                            }
-                            &FloatCC::UnorderedOrGreaterThan => {
-                                let v45 = C::unpack_value_array_2(ctx, v43);
-                                let v59 = C::put_in_reg(ctx, v45.1);
-                                let v60 = C::put_in_reg(ctx, v45.0);
-                                let v13 = C::value_type(ctx, v12);
-                                let v64 = &constructor_vec_fcmphes(ctx, v13, v59, v60);
-                                let v7 = &C::floatcc_as_cond(ctx, &FloatCC::NotEqual);
-                                let v66 = &constructor_bool(ctx, v64, v7);
-                                // Rule at src/isa/s390x/lower.isle line 3632.
-                                return v66.clone();
-                            }
-                            &FloatCC::UnorderedOrGreaterThanOrEqual => {
-                                let v45 = C::unpack_value_array_2(ctx, v43);
-                                let v59 = C::put_in_reg(ctx, v45.1);
-                                let v60 = C::put_in_reg(ctx, v45.0);
-                                let v13 = C::value_type(ctx, v12);
-                                let v61 = &constructor_vec_fcmphs(ctx, v13, v59, v60);
-                                let v7 = &C::floatcc_as_cond(ctx, &FloatCC::NotEqual);
-                                let v63 = &constructor_bool(ctx, v61, v7);
-                                // Rule at src/isa/s390x/lower.isle line 3626.
-                                return v63.clone();
-                            }
-                            &FloatCC::UnorderedOrLessThan => {
-                                let v45 = C::unpack_value_array_2(ctx, v43);
-                                let v48 = C::put_in_reg(ctx, v45.0);
-                                let v49 = C::put_in_reg(ctx, v45.1);
-                                let v13 = C::value_type(ctx, v12);
-                                let v56 = &constructor_vec_fcmphes(ctx, v13, v48, v49);
-                                let v7 = &C::floatcc_as_cond(ctx, &FloatCC::NotEqual);
-                                let v58 = &constructor_bool(ctx, v56, v7);
-                                // Rule at src/isa/s390x/lower.isle line 3620.
-                                return v58.clone();
-                            }
-                            &FloatCC::UnorderedOrLessThanOrEqual => {
-                                let v45 = C::unpack_value_array_2(ctx, v43);
-                                let v48 = C::put_in_reg(ctx, v45.0);
-                                let v49 = C::put_in_reg(ctx, v45.1);
-                                let v13 = C::value_type(ctx, v12);
-                                let v53 = &constructor_vec_fcmphs(ctx, v13, v48, v49);
-                                let v7 = &C::floatcc_as_cond(ctx, &FloatCC::NotEqual);
-                                let v55 = &constructor_bool(ctx, v53, v7);
-                                // Rule at src/isa/s390x/lower.isle line 3614.
-                                return v55.clone();
-                            }
-                            _ => {}
-                        }
-                    }
-                }
-                &InstructionData::IntCompare {
-                    opcode: ref v15,
-                    args: ref v16,
-                    cond: ref v17,
-                } => {
-                    if let &Opcode::Icmp = v15 {
-                        match v17 {
-                            &IntCC::Equal => {
-                                let v18 = C::unpack_value_array_2(ctx, v16);
-                                let v21 = C::put_in_reg(ctx, v18.0);
-                                let v22 = C::put_in_reg(ctx, v18.1);
-                                let v13 = C::value_type(ctx, v12);
-                                let v23 = &constructor_vec_cmpeqs(ctx, v13, v21, v22);
-                                let v25 = &C::floatcc_as_cond(ctx, &FloatCC::Ordered);
-                                let v26 = &constructor_bool(ctx, v23, v25);
-                                // Rule at src/isa/s390x/lower.isle line 3573.
-                                return v26.clone();
-                            }
-                            &IntCC::NotEqual => {
-                                let v18 = C::unpack_value_array_2(ctx, v16);
-                                let v21 = C::put_in_reg(ctx, v18.0);
-                                let v22 = C::put_in_reg(ctx, v18.1);
-                                let v13 = C::value_type(ctx, v12);
-                                let v23 = &constructor_vec_cmpeqs(ctx, v13, v21, v22);
-                                let v7 = &C::floatcc_as_cond(ctx, &FloatCC::NotEqual);
-                                let v27 = &constructor_bool(ctx, v23, v7);
-                                // Rule at src/isa/s390x/lower.isle line 3576.
-                                return v27.clone();
-                            }
-                            &IntCC::SignedGreaterThan => {
-                                let v18 = C::unpack_value_array_2(ctx, v16);
-                                let v21 = C::put_in_reg(ctx, v18.0);
-                                let v22 = C::put_in_reg(ctx, v18.1);
-                                let v13 = C::value_type(ctx, v12);
-                                let v28 = &constructor_vec_cmphs(ctx, v13, v21, v22);
-                                let v25 = &C::floatcc_as_cond(ctx, &FloatCC::Ordered);
-                                let v29 = &constructor_bool(ctx, v28, v25);
-                                // Rule at src/isa/s390x/lower.isle line 3579.
-                                return v29.clone();
-                            }
-                            &IntCC::SignedGreaterThanOrEqual => {
-                                let v18 = C::unpack_value_array_2(ctx, v16);
-                                let v31 = C::put_in_reg(ctx, v18.1);
-                                let v32 = C::put_in_reg(ctx, v18.0);
-                                let v13 = C::value_type(ctx, v12);
-                                let v33 = &constructor_vec_cmphs(ctx, v13, v31, v32);
-                                let v7 = &C::floatcc_as_cond(ctx, &FloatCC::NotEqual);
-                                let v35 = &constructor_bool(ctx, v33, v7);
-                                // Rule at src/isa/s390x/lower.isle line 3588.
-                                return v35.clone();
-                            }
-                            &IntCC::SignedLessThan => {
-                                let v18 = C::unpack_value_array_2(ctx, v16);
-                                let v31 = C::put_in_reg(ctx, v18.1);
-                                let v32 = C::put_in_reg(ctx, v18.0);
-                                let v13 = C::value_type(ctx, v12);
-                                let v33 = &constructor_vec_cmphs(ctx, v13, v31, v32);
-                                let v25 = &C::floatcc_as_cond(ctx, &FloatCC::Ordered);
-                                let v34 = &constructor_bool(ctx, v33, v25);
-                                // Rule at src/isa/s390x/lower.isle line 3585.
-                                return v34.clone();
-                            }
-                            &IntCC::SignedLessThanOrEqual => {
-                                let v18 = C::unpack_value_array_2(ctx, v16);
-                                let v21 = C::put_in_reg(ctx, v18.0);
-                                let v22 = C::put_in_reg(ctx, v18.1);
-                                let v13 = C::value_type(ctx, v12);
-                                let v28 = &constructor_vec_cmphs(ctx, v13, v21, v22);
-                                let v7 = &C::floatcc_as_cond(ctx, &FloatCC::NotEqual);
-                                let v30 = &constructor_bool(ctx, v28, v7);
-                                // Rule at src/isa/s390x/lower.isle line 3582.
-                                return v30.clone();
-                            }
-                            &IntCC::UnsignedGreaterThan => {
-                                let v18 = C::unpack_value_array_2(ctx, v16);
-                                let v21 = C::put_in_reg(ctx, v18.0);
-                                let v22 = C::put_in_reg(ctx, v18.1);
-                                let v13 = C::value_type(ctx, v12);
-                                let v36 = &constructor_vec_cmphls(ctx, v13, v21, v22);
-                                let v25 = &C::floatcc_as_cond(ctx, &FloatCC::Ordered);
-                                let v37 = &constructor_bool(ctx, v36, v25);
-                                // Rule at src/isa/s390x/lower.isle line 3591.
-                                return v37.clone();
-                            }
-                            &IntCC::UnsignedGreaterThanOrEqual => {
-                                let v18 = C::unpack_value_array_2(ctx, v16);
-                                let v31 = C::put_in_reg(ctx, v18.1);
-                                let v32 = C::put_in_reg(ctx, v18.0);
-                                let v13 = C::value_type(ctx, v12);
-                                let v39 = &constructor_vec_cmphls(ctx, v13, v31, v32);
-                                let v7 = &C::floatcc_as_cond(ctx, &FloatCC::NotEqual);
-                                let v41 = &constructor_bool(ctx, v39, v7);
-                                // Rule at src/isa/s390x/lower.isle line 3600.
-                                return v41.clone();
-                            }
-                            &IntCC::UnsignedLessThan => {
-                                let v18 = C::unpack_value_array_2(ctx, v16);
-                                let v31 = C::put_in_reg(ctx, v18.1);
-                                let v32 = C::put_in_reg(ctx, v18.0);
-                                let v13 = C::value_type(ctx, v12);
-                                let v39 = &constructor_vec_cmphls(ctx, v13, v31, v32);
-                                let v25 = &C::floatcc_as_cond(ctx, &FloatCC::Ordered);
-                                let v40 = &constructor_bool(ctx, v39, v25);
-                                // Rule at src/isa/s390x/lower.isle line 3597.
-                                return v40.clone();
-                            }
-                            &IntCC::UnsignedLessThanOrEqual => {
-                                let v18 = C::unpack_value_array_2(ctx, v16);
-                                let v21 = C::put_in_reg(ctx, v18.0);
-                                let v22 = C::put_in_reg(ctx, v18.1);
-                                let v13 = C::value_type(ctx, v12);
-                                let v36 = &constructor_vec_cmphls(ctx, v13, v21, v22);
-                                let v7 = &C::floatcc_as_cond(ctx, &FloatCC::NotEqual);
-                                let v38 = &constructor_bool(ctx, v36, v7);
-                                // Rule at src/isa/s390x/lower.isle line 3594.
-                                return v38.clone();
-                            }
-                            _ => {}
-                        }
-                    }
-                }
-                _ => {}
-            }
-        }
-    }
-    let v2 = C::put_in_reg(ctx, arg0);
-    let v1 = C::value_type(ctx, arg0);
-    let v4 = constructor_vec_imm(ctx, v1, 0x0);
-    let v5 = &constructor_vec_cmpeqs(ctx, v1, v2, v4);
-    let v7 = &C::floatcc_as_cond(ctx, &FloatCC::NotEqual);
-    let v8 = &constructor_bool(ctx, v5, v7);
-    // Rule at src/isa/s390x/lower.isle line 3568.
-    return v8.clone();
-}
-
-// Generated as internal constructor for term value_nonzero.
-pub fn constructor_value_nonzero<C: Context>(ctx: &mut C, arg0: Value) -> ProducesBool {
-    let v1 = C::def_inst(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v3 = &C::inst_data(ctx, v2);
-        match v3 {
-            &InstructionData::FloatCompare {
-                opcode: ref v12,
-                args: ref v13,
-                cond: ref v14,
-            } => {
-                if let &Opcode::Fcmp = v12 {
-                    let v15 = C::unpack_value_array_2(ctx, v13);
-                    let v18 = &constructor_fcmp_val(ctx, v14, v15.0, v15.1);
-                    // Rule at src/isa/s390x/lower.isle line 3706.
-                    return v18.clone();
-                }
-            }
-            &InstructionData::IntCompare {
-                opcode: ref v4,
-                args: ref v5,
-                cond: ref v6,
-            } => {
-                if let &Opcode::Icmp = v4 {
-                    let v7 = C::unpack_value_array_2(ctx, v5);
-                    let v11 = &constructor_icmp_val(ctx, false, v6, v7.0, v7.1);
-                    // Rule at src/isa/s390x/lower.isle line 3705.
-                    return v11.clone();
-                }
-            }
-            _ => {}
-        }
-    }
-    let v19 = C::value_type(ctx, arg0);
-    let v20 = C::gpr32_ty(ctx, v19);
-    if let Some(v21) = v20 {
-        let v23 = constructor_put_in_reg_sext32(ctx, arg0);
-        let v25 = &constructor_icmps_simm16(ctx, I32, v23, 0x0);
-        let v27 = &C::intcc_as_cond(ctx, &IntCC::NotEqual);
-        let v28 = &constructor_bool(ctx, v25, v27);
-        // Rule at src/isa/s390x/lower.isle line 3707.
-        return v28.clone();
-    }
-    let v29 = C::gpr64_ty(ctx, v19);
-    if let Some(v30) = v29 {
-        let v32 = C::put_in_reg(ctx, arg0);
-        let v33 = &constructor_icmps_simm16(ctx, I64, v32, 0x0);
-        let v27 = &C::intcc_as_cond(ctx, &IntCC::NotEqual);
-        let v34 = &constructor_bool(ctx, v33, v27);
-        // Rule at src/isa/s390x/lower.isle line 3710.
-        return v34.clone();
-    }
-    let v35 = C::vr128_ty(ctx, v19);
-    if let Some(v36) = v35 {
-        let v32 = C::put_in_reg(ctx, arg0);
-        let v39 = constructor_vec_imm(ctx, I64X2, 0x0);
-        let v40 = &constructor_vec_cmpeqs(ctx, I64X2, v32, v39);
-        let v42 = &C::floatcc_as_cond(ctx, &FloatCC::NotEqual);
-        let v43 = &constructor_bool(ctx, v40, v42);
-        // Rule at src/isa/s390x/lower.isle line 3713.
-        return v43.clone();
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "value_nonzero", "src/isa/s390x/lower.isle line 3704"
-    )
-}
-
-// Generated as internal constructor for term lower_call_args.
-pub fn constructor_lower_call_args<C: Context>(
-    ctx: &mut C,
-    arg0: Sig,
-    arg1: Range,
-    arg2: ValueSlice,
-) -> CallArgList {
-    let v3 = &C::args_builder_new(ctx);
-    let v4 = constructor_lower_call_args_buffer(ctx, arg0, arg1, arg2);
-    let v5 = constructor_lower_call_args_slots(ctx, arg0, v3, arg1, arg2);
-    let v6 = constructor_lower_call_ret_arg(ctx, arg0, v3);
-    let v7 = &C::args_builder_finish(ctx, v3);
-    // Rule at src/isa/s390x/lower.isle line 3931.
-    return v7.clone();
-}
-
-// Generated as internal constructor for term lower_call_args_buffer.
-pub fn constructor_lower_call_args_buffer<C: Context>(
-    ctx: &mut C,
-    arg0: Sig,
-    arg1: Range,
-    arg2: ValueSlice,
-) -> InstOutput {
-    let v2 = &C::range_view(ctx, arg1);
-    match v2 {
-        &RangeView::Empty => {
-            let v4 = C::output_none(ctx);
-            // Rule at src/isa/s390x/lower.isle line 3940.
-            return v4;
-        }
-        &RangeView::NonEmpty {
-            index: v5,
-            rest: v6,
-        } => {
-            let v8 = &C::abi_get_arg(ctx, arg0, v5);
-            let v9 = C::value_slice_get(ctx, arg2, v5);
-            let v10 = constructor_copy_to_buffer(ctx, 0x0, v8, v9);
-            let v11 = constructor_lower_call_args_buffer(ctx, arg0, v6, arg2);
-            // Rule at src/isa/s390x/lower.isle line 3941.
-            return v11;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "lower_call_args_buffer", "src/isa/s390x/lower.isle line 3939"
-    )
-}
-
-// Generated as internal constructor for term lower_call_args_slots.
-pub fn constructor_lower_call_args_slots<C: Context>(
-    ctx: &mut C,
-    arg0: Sig,
-    arg1: &CallArgListBuilder,
-    arg2: Range,
-    arg3: ValueSlice,
-) -> InstOutput {
-    let v3 = &C::range_view(ctx, arg2);
-    match v3 {
-        &RangeView::Empty => {
-            let v5 = C::output_none(ctx);
-            // Rule at src/isa/s390x/lower.isle line 3948.
-            return v5;
-        }
-        &RangeView::NonEmpty {
-            index: v6,
-            rest: v7,
-        } => {
-            let v8 = &C::abi_lane_order(ctx, arg0);
-            let v10 = &C::abi_get_arg(ctx, arg0, v6);
-            let v11 = C::value_slice_get(ctx, arg3, v6);
-            let v12 = constructor_copy_to_arg(ctx, arg1, v8, 0x0, v10, v11);
-            let v13 = constructor_lower_call_args_slots(ctx, arg0, arg1, v7, arg3);
-            // Rule at src/isa/s390x/lower.isle line 3949.
-            return v13;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "lower_call_args_slots", "src/isa/s390x/lower.isle line 3947"
-    )
-}
-
-// Generated as internal constructor for term lower_call_ret_arg.
-pub fn constructor_lower_call_ret_arg<C: Context>(
-    ctx: &mut C,
-    arg0: Sig,
-    arg1: &CallArgListBuilder,
-) -> InstOutput {
-    let v5 = &C::abi_ret_arg(ctx, arg0);
-    if let Some(v6) = v5 {
-        let v7 = &C::abi_arg_only_slot(ctx, v6);
-        if let Some(v8) = v7 {
-            let v9 = C::abi_sized_stack_arg_space(ctx, arg0);
-            let v11 = &C::memarg_stack_off(ctx, v9, 0x0);
-            let v12 = &C::abi_lane_order(ctx, arg0);
-            let v13 = constructor_load_addr(ctx, v11);
-            let v14 = constructor_copy_reg_to_arg_slot(ctx, arg1, v12, 0x0, v8, v13);
-            // Rule at src/isa/s390x/lower.isle line 3958.
-            return v14;
-        }
-    }
-    let v1 = C::abi_no_ret_arg(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v4 = C::output_none(ctx);
-        // Rule at src/isa/s390x/lower.isle line 3957.
-        return v4;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "lower_call_ret_arg", "src/isa/s390x/lower.isle line 3956"
-    )
-}
-
-// Generated as internal constructor for term lower_call_rets.
-pub fn constructor_lower_call_rets<C: Context>(
-    ctx: &mut C,
-    arg0: Sig,
-    arg1: &CallRetList,
-    arg2: Range,
-    arg3: &InstOutputBuilder,
-) -> InstOutput {
-    let v3 = &C::range_view(ctx, arg2);
-    match v3 {
-        &RangeView::Empty => {
-            let v5 = C::output_builder_finish(ctx, arg3);
-            // Rule at src/isa/s390x/lower.isle line 3964.
-            return v5;
-        }
-        &RangeView::NonEmpty {
-            index: v6,
-            rest: v7,
-        } => {
-            let v8 = &C::abi_lane_order(ctx, arg0);
-            let v9 = C::abi_sized_stack_arg_space(ctx, arg0);
-            let v10 = &C::abi_get_ret(ctx, arg0, v6);
-            let v11 = constructor_copy_from_arg(ctx, arg1, v8, v9, v10);
-            let v12 = C::output_builder_push(ctx, arg3, v11);
-            let v13 = constructor_lower_call_rets(ctx, arg0, arg1, v7, arg3);
-            // Rule at src/isa/s390x/lower.isle line 3965.
-            return v13;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "lower_call_rets", "src/isa/s390x/lower.isle line 3963"
-    )
-}
diff --git a/cranelift/codegen/isle_generated_code/isle_x64.rs b/cranelift/codegen/isle_generated_code/isle_x64.rs
deleted file mode 100644
index e0452b9e0ef8..000000000000
--- a/cranelift/codegen/isle_generated_code/isle_x64.rs
+++ /dev/null
@@ -1,20315 +0,0 @@
-// GENERATED BY ISLE. DO NOT EDIT!
-//
-// Generated automatically from the instruction-selection DSL code in:
-// - src/prelude.isle
-// - src/prelude_lower.isle
-// - src/isa/x64/inst.isle
-// - src/isa/x64/lower.isle
-// - /Users/admin/projects/public/wasmtime/cranelift/codegen/isle_generated_code/clif_lower.isle
-
-use super::*; // Pulls in all external types.
-use std::marker::PhantomData;
-
-/// Context during lowering: an implementation of this trait
-/// must be provided with all external constructors and extractors.
-/// A mutable borrow is passed along through all lowering logic.
-pub trait Context {
-    fn unit(&mut self) -> Unit;
-    fn value_type(&mut self, arg0: Value) -> Type;
-    fn u32_nonnegative(&mut self, arg0: u32) -> Option<u32>;
-    fn offset32(&mut self, arg0: Offset32) -> u32;
-    fn u32_lteq(&mut self, arg0: u32, arg1: u32) -> Option<Unit>;
-    fn u8_lteq(&mut self, arg0: u8, arg1: u8) -> Option<Unit>;
-    fn u8_lt(&mut self, arg0: u8, arg1: u8) -> Option<Unit>;
-    fn simm32(&mut self, arg0: Imm64) -> Option<u32>;
-    fn uimm8(&mut self, arg0: Imm64) -> Option<u8>;
-    fn u8_as_u32(&mut self, arg0: u8) -> u32;
-    fn u8_as_u64(&mut self, arg0: u8) -> u64;
-    fn u16_as_u64(&mut self, arg0: u16) -> u64;
-    fn u32_as_u64(&mut self, arg0: u32) -> u64;
-    fn i64_as_u64(&mut self, arg0: i64) -> u64;
-    fn i64_neg(&mut self, arg0: i64) -> i64;
-    fn u128_as_u64(&mut self, arg0: u128) -> Option<u64>;
-    fn u64_as_u32(&mut self, arg0: u64) -> Option<u32>;
-    fn u64_as_i32(&mut self, arg0: u64) -> i32;
-    fn u8_and(&mut self, arg0: u8, arg1: u8) -> u8;
-    fn u8_shl(&mut self, arg0: u8, arg1: u8) -> u8;
-    fn u8_shr(&mut self, arg0: u8, arg1: u8) -> u8;
-    fn u32_add(&mut self, arg0: u32, arg1: u32) -> u32;
-    fn u32_sub(&mut self, arg0: u32, arg1: u32) -> u32;
-    fn u32_and(&mut self, arg0: u32, arg1: u32) -> u32;
-    fn s32_add_fallible(&mut self, arg0: u32, arg1: u32) -> Option<u32>;
-    fn u64_add(&mut self, arg0: u64, arg1: u64) -> u64;
-    fn u64_sub(&mut self, arg0: u64, arg1: u64) -> u64;
-    fn u64_mul(&mut self, arg0: u64, arg1: u64) -> u64;
-    fn u64_sdiv(&mut self, arg0: u64, arg1: u64) -> Option<u64>;
-    fn u64_udiv(&mut self, arg0: u64, arg1: u64) -> Option<u64>;
-    fn u64_and(&mut self, arg0: u64, arg1: u64) -> u64;
-    fn u64_or(&mut self, arg0: u64, arg1: u64) -> u64;
-    fn u64_xor(&mut self, arg0: u64, arg1: u64) -> u64;
-    fn u64_shl(&mut self, arg0: u64, arg1: u64) -> u64;
-    fn imm64_shl(&mut self, arg0: Type, arg1: Imm64, arg2: Imm64) -> Imm64;
-    fn imm64_ushr(&mut self, arg0: Type, arg1: Imm64, arg2: Imm64) -> Imm64;
-    fn imm64_sshr(&mut self, arg0: Type, arg1: Imm64, arg2: Imm64) -> Imm64;
-    fn u64_not(&mut self, arg0: u64) -> u64;
-    fn u64_eq(&mut self, arg0: u64, arg1: u64) -> bool;
-    fn u64_le(&mut self, arg0: u64, arg1: u64) -> bool;
-    fn u64_lt(&mut self, arg0: u64, arg1: u64) -> bool;
-    fn i64_sextend_imm64(&mut self, arg0: Type, arg1: Imm64) -> i64;
-    fn u64_uextend_imm64(&mut self, arg0: Type, arg1: Imm64) -> u64;
-    fn imm64_icmp(&mut self, arg0: Type, arg1: &IntCC, arg2: Imm64, arg3: Imm64) -> Imm64;
-    fn u64_is_zero(&mut self, arg0: u64) -> bool;
-    fn u64_is_odd(&mut self, arg0: u64) -> bool;
-    fn ty_umin(&mut self, arg0: Type) -> u64;
-    fn ty_umax(&mut self, arg0: Type) -> u64;
-    fn ty_smin(&mut self, arg0: Type) -> u64;
-    fn ty_smax(&mut self, arg0: Type) -> u64;
-    fn ty_bits(&mut self, arg0: Type) -> u8;
-    fn ty_bits_u16(&mut self, arg0: Type) -> u16;
-    fn ty_bits_u64(&mut self, arg0: Type) -> u64;
-    fn ty_mask(&mut self, arg0: Type) -> u64;
-    fn ty_lane_mask(&mut self, arg0: Type) -> u64;
-    fn ty_lane_count(&mut self, arg0: Type) -> u64;
-    fn ty_bytes(&mut self, arg0: Type) -> u16;
-    fn lane_type(&mut self, arg0: Type) -> Type;
-    fn ty_half_lanes(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_half_width(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_equal(&mut self, arg0: Type, arg1: Type) -> bool;
-    fn mem_flags_trusted(&mut self) -> MemFlags;
-    fn intcc_reverse(&mut self, arg0: &IntCC) -> IntCC;
-    fn intcc_inverse(&mut self, arg0: &IntCC) -> IntCC;
-    fn floatcc_reverse(&mut self, arg0: &FloatCC) -> FloatCC;
-    fn floatcc_inverse(&mut self, arg0: &FloatCC) -> FloatCC;
-    fn floatcc_unordered(&mut self, arg0: &FloatCC) -> bool;
-    fn fits_in_16(&mut self, arg0: Type) -> Option<Type>;
-    fn fits_in_32(&mut self, arg0: Type) -> Option<Type>;
-    fn lane_fits_in_32(&mut self, arg0: Type) -> Option<Type>;
-    fn fits_in_64(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_32(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_64(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_int_ref_scalar_64_extract(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_int_ref_scalar_64(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_32_or_64(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_8_or_16(&mut self, arg0: Type) -> Option<Type>;
-    fn int_fits_in_32(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_int_ref_64(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_int_ref_16_to_64(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_int(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_scalar(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_scalar_float(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_float_or_vec(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_vector_float(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_vector_not_float(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_vec64(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_vec64_ctor(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_vec128(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_dyn_vec64(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_dyn_vec128(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_vec64_int(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_vec128_int(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_addr64(&mut self, arg0: Type) -> Option<Type>;
-    fn not_vec32x2(&mut self, arg0: Type) -> Option<Type>;
-    fn not_i64x2(&mut self, arg0: Type) -> Option<()>;
-    fn u8_from_uimm8(&mut self, arg0: Uimm8) -> u8;
-    fn u64_from_bool(&mut self, arg0: bool) -> u64;
-    fn u64_from_imm64(&mut self, arg0: Imm64) -> u64;
-    fn nonzero_u64_from_imm64(&mut self, arg0: Imm64) -> Option<u64>;
-    fn imm64_power_of_two(&mut self, arg0: Imm64) -> Option<u64>;
-    fn imm64(&mut self, arg0: u64) -> Imm64;
-    fn imm64_masked(&mut self, arg0: Type, arg1: u64) -> Imm64;
-    fn u32_from_ieee32(&mut self, arg0: Ieee32) -> u32;
-    fn u64_from_ieee64(&mut self, arg0: Ieee64) -> u64;
-    fn multi_lane(&mut self, arg0: Type) -> Option<(u32, u32)>;
-    fn dynamic_lane(&mut self, arg0: Type) -> Option<(u32, u32)>;
-    fn dynamic_int_lane(&mut self, arg0: Type) -> Option<u32>;
-    fn dynamic_fp_lane(&mut self, arg0: Type) -> Option<u32>;
-    fn ty_dyn64_int(&mut self, arg0: Type) -> Option<Type>;
-    fn ty_dyn128_int(&mut self, arg0: Type) -> Option<Type>;
-    fn offset32_to_u32(&mut self, arg0: Offset32) -> u32;
-    fn u32_to_offset32(&mut self, arg0: u32) -> Offset32;
-    fn intcc_unsigned(&mut self, arg0: &IntCC) -> IntCC;
-    fn signed_cond_code(&mut self, arg0: &IntCC) -> Option<IntCC>;
-    fn trap_code_division_by_zero(&mut self) -> TrapCode;
-    fn trap_code_integer_overflow(&mut self) -> TrapCode;
-    fn trap_code_bad_conversion_to_integer(&mut self) -> TrapCode;
-    fn range(&mut self, arg0: usize, arg1: usize) -> Range;
-    fn range_view(&mut self, arg0: Range) -> RangeView;
-    fn value_reg(&mut self, arg0: Reg) -> ValueRegs;
-    fn value_regs(&mut self, arg0: Reg, arg1: Reg) -> ValueRegs;
-    fn value_regs_invalid(&mut self) -> ValueRegs;
-    fn output_none(&mut self) -> InstOutput;
-    fn output(&mut self, arg0: ValueRegs) -> InstOutput;
-    fn output_pair(&mut self, arg0: ValueRegs, arg1: ValueRegs) -> InstOutput;
-    fn output_builder_new(&mut self) -> InstOutputBuilder;
-    fn output_builder_push(&mut self, arg0: &InstOutputBuilder, arg1: ValueRegs) -> Unit;
-    fn output_builder_finish(&mut self, arg0: &InstOutputBuilder) -> InstOutput;
-    fn temp_writable_reg(&mut self, arg0: Type) -> WritableReg;
-    fn is_valid_reg(&mut self, arg0: Reg) -> bool;
-    fn invalid_reg(&mut self) -> Reg;
-    fn mark_value_used(&mut self, arg0: Value) -> Unit;
-    fn put_in_reg(&mut self, arg0: Value) -> Reg;
-    fn put_in_regs(&mut self, arg0: Value) -> ValueRegs;
-    fn ensure_in_vreg(&mut self, arg0: Reg, arg1: Type) -> Reg;
-    fn value_regs_get(&mut self, arg0: ValueRegs, arg1: usize) -> Reg;
-    fn value_regs_len(&mut self, arg0: ValueRegs) -> usize;
-    fn preg_to_reg(&mut self, arg0: PReg) -> Reg;
-    fn value_list_slice(&mut self, arg0: ValueList) -> ValueSlice;
-    fn value_slice_empty(&mut self, arg0: ValueSlice) -> Option<()>;
-    fn value_slice_unwrap(&mut self, arg0: ValueSlice) -> Option<(Value, ValueSlice)>;
-    fn value_slice_len(&mut self, arg0: ValueSlice) -> usize;
-    fn value_slice_get(&mut self, arg0: ValueSlice, arg1: usize) -> Value;
-    fn writable_reg_to_reg(&mut self, arg0: WritableReg) -> Reg;
-    fn inst_results(&mut self, arg0: Inst) -> ValueSlice;
-    fn first_result(&mut self, arg0: Inst) -> Option<Value>;
-    fn inst_data(&mut self, arg0: Inst) -> InstructionData;
-    fn def_inst(&mut self, arg0: Value) -> Option<Inst>;
-    fn zero_value(&mut self, arg0: Value) -> Option<Value>;
-    fn is_sinkable_inst(&mut self, arg0: Value) -> Option<Inst>;
-    fn maybe_uextend(&mut self, arg0: Value) -> Option<Value>;
-    fn emit(&mut self, arg0: &MInst) -> Unit;
-    fn sink_inst(&mut self, arg0: Inst) -> Unit;
-    fn emit_u64_le_const(&mut self, arg0: u64) -> VCodeConstant;
-    fn emit_u128_le_const(&mut self, arg0: u128) -> VCodeConstant;
-    fn const_to_vconst(&mut self, arg0: Constant) -> VCodeConstant;
-    fn tls_model(&mut self, arg0: Type) -> TlsModel;
-    fn tls_model_is_elf_gd(&mut self) -> Option<Unit>;
-    fn tls_model_is_macho(&mut self) -> Option<Unit>;
-    fn tls_model_is_coff(&mut self) -> Option<Unit>;
-    fn preserve_frame_pointers(&mut self) -> Option<Unit>;
-    fn box_external_name(&mut self, arg0: ExternalName) -> BoxExternalName;
-    fn func_ref_data(&mut self, arg0: FuncRef) -> (SigRef, ExternalName, RelocDistance);
-    fn symbol_value_data(
-        &mut self,
-        arg0: GlobalValue,
-    ) -> Option<(ExternalName, RelocDistance, i64)>;
-    fn reloc_distance_near(&mut self, arg0: RelocDistance) -> Option<()>;
-    fn vec_mask_from_immediate(&mut self, arg0: Immediate) -> Option<VecMask>;
-    fn u128_from_immediate(&mut self, arg0: Immediate) -> Option<u128>;
-    fn vconst_from_immediate(&mut self, arg0: Immediate) -> Option<VCodeConstant>;
-    fn u128_from_constant(&mut self, arg0: Constant) -> Option<u128>;
-    fn u64_from_constant(&mut self, arg0: Constant) -> Option<u64>;
-    fn shuffle64_from_imm(&mut self, arg0: Immediate) -> Option<(u8, u8)>;
-    fn shuffle32_from_imm(&mut self, arg0: Immediate) -> Option<(u8, u8, u8, u8)>;
-    fn shuffle16_from_imm(&mut self, arg0: Immediate) -> Option<(u8, u8, u8, u8, u8, u8, u8, u8)>;
-    fn only_writable_reg(&mut self, arg0: WritableValueRegs) -> Option<WritableReg>;
-    fn writable_regs_get(&mut self, arg0: WritableValueRegs, arg1: usize) -> WritableReg;
-    fn abi_num_args(&mut self, arg0: Sig) -> usize;
-    fn abi_get_arg(&mut self, arg0: Sig, arg1: usize) -> ABIArg;
-    fn abi_num_rets(&mut self, arg0: Sig) -> usize;
-    fn abi_get_ret(&mut self, arg0: Sig, arg1: usize) -> ABIArg;
-    fn abi_ret_arg(&mut self, arg0: Sig) -> Option<ABIArg>;
-    fn abi_no_ret_arg(&mut self, arg0: Sig) -> Option<()>;
-    fn abi_sized_stack_arg_space(&mut self, arg0: Sig) -> i64;
-    fn abi_sized_stack_ret_space(&mut self, arg0: Sig) -> i64;
-    fn abi_stackslot_addr(&mut self, arg0: WritableReg, arg1: StackSlot, arg2: Offset32) -> MInst;
-    fn abi_dynamic_stackslot_addr(&mut self, arg0: WritableReg, arg1: DynamicStackSlot) -> MInst;
-    fn abi_arg_only_slot(&mut self, arg0: &ABIArg) -> Option<ABIArgSlot>;
-    fn abi_arg_struct_pointer(&mut self, arg0: &ABIArg) -> Option<(ABIArgSlot, i64, u64)>;
-    fn abi_arg_implicit_pointer(&mut self, arg0: &ABIArg) -> Option<(ABIArgSlot, i64, Type)>;
-    fn real_reg_to_reg(&mut self, arg0: RealReg) -> Reg;
-    fn real_reg_to_writable_reg(&mut self, arg0: RealReg) -> WritableReg;
-    fn gen_move(&mut self, arg0: Type, arg1: WritableReg, arg2: Reg) -> MInst;
-    fn gen_return(&mut self, arg0: ValueSlice) -> Unit;
-    fn gen_return_call(
-        &mut self,
-        arg0: SigRef,
-        arg1: ExternalName,
-        arg2: RelocDistance,
-        arg3: ValueSlice,
-    ) -> InstOutput;
-    fn gen_return_call_indirect(
-        &mut self,
-        arg0: SigRef,
-        arg1: Value,
-        arg2: ValueSlice,
-    ) -> InstOutput;
-    fn safe_divisor_from_imm64(&mut self, arg0: Type, arg1: Imm64) -> Option<u64>;
-    fn jump_table_size(&mut self, arg0: &BoxVecMachLabel) -> u32;
-    fn single_target(&mut self, arg0: &MachLabelSlice) -> Option<MachLabel>;
-    fn two_targets(&mut self, arg0: &MachLabelSlice) -> Option<(MachLabel, MachLabel)>;
-    fn jump_table_targets(&mut self, arg0: &MachLabelSlice)
-        -> Option<(MachLabel, BoxVecMachLabel)>;
-    fn operand_size_of_type_32_64(&mut self, arg0: Type) -> OperandSize;
-    fn raw_operand_size_of_type(&mut self, arg0: Type) -> OperandSize;
-    fn put_in_reg_mem_imm(&mut self, arg0: Value) -> RegMemImm;
-    fn put_in_reg_mem(&mut self, arg0: Value) -> RegMem;
-    fn synthetic_amode_to_reg_mem(&mut self, arg0: &SyntheticAmode) -> RegMem;
-    fn amode_to_synthetic_amode(&mut self, arg0: &Amode) -> SyntheticAmode;
-    fn sum_extend_fits_in_32_bits(
-        &mut self,
-        arg0: Type,
-        arg1: Imm64,
-        arg2: Offset32,
-    ) -> Option<u32>;
-    fn amode_offset(&mut self, arg0: &Amode, arg1: u32) -> Amode;
-    fn zero_offset(&mut self) -> Offset32;
-    fn intcc_to_cc(&mut self, arg0: &IntCC) -> CC;
-    fn cc_invert(&mut self, arg0: &CC) -> CC;
-    fn cc_nz_or_z(&mut self, arg0: &CC) -> Option<CC>;
-    fn encode_fcmp_imm(&mut self, arg0: &FcmpImm) -> u8;
-    fn encode_round_imm(&mut self, arg0: &RoundImm) -> u8;
-    fn imm8_reg_to_imm8_gpr(&mut self, arg0: &Imm8Reg) -> Imm8Gpr;
-    fn writable_gpr_to_reg(&mut self, arg0: WritableGpr) -> WritableReg;
-    fn writable_xmm_to_reg(&mut self, arg0: WritableXmm) -> WritableReg;
-    fn writable_reg_to_xmm(&mut self, arg0: WritableReg) -> WritableXmm;
-    fn writable_xmm_to_xmm(&mut self, arg0: WritableXmm) -> Xmm;
-    fn writable_gpr_to_gpr(&mut self, arg0: WritableGpr) -> Gpr;
-    fn gpr_to_reg(&mut self, arg0: Gpr) -> Reg;
-    fn gpr_to_gpr_mem(&mut self, arg0: Gpr) -> GprMem;
-    fn gpr_to_gpr_mem_imm(&mut self, arg0: Gpr) -> GprMemImm;
-    fn xmm_to_reg(&mut self, arg0: Xmm) -> Reg;
-    fn xmm_to_xmm_mem_imm(&mut self, arg0: Xmm) -> XmmMemImm;
-    fn xmm_mem_to_xmm_mem_imm(&mut self, arg0: &XmmMem) -> XmmMemImm;
-    fn xmm_mem_to_xmm_mem_aligned(&mut self, arg0: &XmmMem) -> XmmMemAligned;
-    fn xmm_mem_imm_to_xmm_mem_aligned_imm(&mut self, arg0: &XmmMemImm) -> XmmMemAlignedImm;
-    fn temp_writable_gpr(&mut self) -> WritableGpr;
-    fn temp_writable_xmm(&mut self) -> WritableXmm;
-    fn reg_mem_to_xmm_mem(&mut self, arg0: &RegMem) -> XmmMem;
-    fn reg_to_reg_mem_imm(&mut self, arg0: Reg) -> RegMemImm;
-    fn gpr_mem_imm_new(&mut self, arg0: &RegMemImm) -> GprMemImm;
-    fn xmm_mem_imm_new(&mut self, arg0: &RegMemImm) -> XmmMemImm;
-    fn xmm_to_xmm_mem(&mut self, arg0: Xmm) -> XmmMem;
-    fn xmm_mem_to_reg_mem(&mut self, arg0: &XmmMem) -> RegMem;
-    fn gpr_mem_to_reg_mem(&mut self, arg0: &GprMem) -> RegMem;
-    fn xmm_new(&mut self, arg0: Reg) -> Xmm;
-    fn gpr_new(&mut self, arg0: Reg) -> Gpr;
-    fn reg_mem_to_gpr_mem(&mut self, arg0: &RegMem) -> GprMem;
-    fn reg_to_gpr_mem(&mut self, arg0: Reg) -> GprMem;
-    fn put_in_xmm_mem(&mut self, arg0: Value) -> XmmMem;
-    fn put_in_xmm_mem_imm(&mut self, arg0: Value) -> XmmMemImm;
-    fn gpr_to_imm8_gpr(&mut self, arg0: Gpr) -> Imm8Gpr;
-    fn imm8_to_imm8_gpr(&mut self, arg0: u8) -> Imm8Gpr;
-    fn xmi_imm(&mut self, arg0: u32) -> XmmMemImm;
-    fn intcc_without_eq(&mut self, arg0: &IntCC) -> IntCC;
-    fn type_register_class(&mut self, arg0: Type) -> Option<RegisterClass>;
-    fn use_avx512vl(&mut self) -> bool;
-    fn use_avx512dq(&mut self) -> bool;
-    fn use_avx512f(&mut self) -> bool;
-    fn use_avx512bitalg(&mut self) -> bool;
-    fn use_avx512vbmi(&mut self) -> bool;
-    fn use_lzcnt(&mut self) -> bool;
-    fn use_bmi1(&mut self) -> bool;
-    fn use_popcnt(&mut self) -> bool;
-    fn use_fma(&mut self) -> bool;
-    fn use_ssse3(&mut self) -> bool;
-    fn use_sse41(&mut self) -> bool;
-    fn use_sse42(&mut self) -> bool;
-    fn use_avx(&mut self) -> bool;
-    fn use_avx2(&mut self) -> bool;
-    fn imm8_from_value(&mut self, arg0: Value) -> Option<Imm8Reg>;
-    fn const_to_type_masked_imm8(&mut self, arg0: u64, arg1: Type) -> Imm8Gpr;
-    fn shift_mask(&mut self, arg0: Type) -> u8;
-    fn shift_amount_masked(&mut self, arg0: Type, arg1: Imm64) -> u8;
-    fn simm32_from_value(&mut self, arg0: Value) -> Option<GprMemImm>;
-    fn simm32_from_imm64(&mut self, arg0: Imm64) -> Option<GprMemImm>;
-    fn sinkable_load(&mut self, arg0: Value) -> Option<SinkableLoad>;
-    fn sinkable_load_exact(&mut self, arg0: Value) -> Option<SinkableLoad>;
-    fn sink_load(&mut self, arg0: &SinkableLoad) -> SyntheticAmode;
-    fn ext_mode(&mut self, arg0: u16, arg1: u16) -> ExtMode;
-    fn gen_call(
-        &mut self,
-        arg0: SigRef,
-        arg1: ExternalName,
-        arg2: RelocDistance,
-        arg3: ValueSlice,
-    ) -> InstOutput;
-    fn gen_call_indirect(&mut self, arg0: SigRef, arg1: Value, arg2: ValueSlice) -> InstOutput;
-    fn nonzero_u64_fits_in_u32(&mut self, arg0: u64) -> Option<u64>;
-    fn ty_int_bool_or_ref(&mut self, arg0: Type) -> Option<()>;
-    fn atomic_rmw_op_to_mach_atomic_rmw_op(&mut self, arg0: &AtomicRmwOp) -> MachAtomicRmwOp;
-    fn shuffle_0_31_mask(&mut self, arg0: &VecMask) -> VCodeConstant;
-    fn shuffle_0_15_mask(&mut self, arg0: &VecMask) -> VCodeConstant;
-    fn shuffle_16_31_mask(&mut self, arg0: &VecMask) -> VCodeConstant;
-    fn perm_from_mask(&mut self, arg0: &VecMask) -> VCodeConstant;
-    fn perm_from_mask_with_zeros(
-        &mut self,
-        arg0: &VecMask,
-    ) -> Option<(VCodeConstant, VCodeConstant)>;
-    fn const_to_synthetic_amode(&mut self, arg0: VCodeConstant) -> SyntheticAmode;
-    fn preg_rbp(&mut self) -> PReg;
-    fn preg_rsp(&mut self) -> PReg;
-    fn preg_pinned(&mut self) -> PReg;
-    fn libcall_1(&mut self, arg0: &LibCall, arg1: Reg) -> Reg;
-    fn libcall_2(&mut self, arg0: &LibCall, arg1: Reg, arg2: Reg) -> Reg;
-    fn libcall_3(&mut self, arg0: &LibCall, arg1: Reg, arg2: Reg, arg3: Reg) -> Reg;
-    fn ishl_i8x16_mask_for_const(&mut self, arg0: u32) -> SyntheticAmode;
-    fn ishl_i8x16_mask_table(&mut self) -> SyntheticAmode;
-    fn ushr_i8x16_mask_for_const(&mut self, arg0: u32) -> SyntheticAmode;
-    fn ushr_i8x16_mask_table(&mut self) -> SyntheticAmode;
-    fn vconst_all_ones_or_all_zeros(&mut self, arg0: Constant) -> Option<()>;
-    fn insert_i8x16_lane_hole(&mut self, arg0: u8) -> VCodeConstant;
-    fn sse_insertps_lane_imm(&mut self, arg0: u8) -> u8;
-    fn pblendw_imm(&mut self, arg0: Immediate) -> Option<u8>;
-    fn palignr_imm_from_immediate(&mut self, arg0: Immediate) -> Option<u8>;
-    fn pshuflw_lhs_imm(&mut self, arg0: Immediate) -> Option<u8>;
-    fn pshuflw_rhs_imm(&mut self, arg0: Immediate) -> Option<u8>;
-    fn pshufhw_lhs_imm(&mut self, arg0: Immediate) -> Option<u8>;
-    fn pshufhw_rhs_imm(&mut self, arg0: Immediate) -> Option<u8>;
-    fn pshufd_lhs_imm(&mut self, arg0: Immediate) -> Option<u8>;
-    fn pshufd_rhs_imm(&mut self, arg0: Immediate) -> Option<u8>;
-    fn shufps_imm(&mut self, arg0: Immediate) -> Option<u8>;
-    fn shufps_rev_imm(&mut self, arg0: Immediate) -> Option<u8>;
-    fn unpack_value_array_2(&mut self, arg0: &ValueArray2) -> (Value, Value);
-    fn pack_value_array_2(&mut self, arg0: Value, arg1: Value) -> ValueArray2;
-    fn unpack_value_array_3(&mut self, arg0: &ValueArray3) -> (Value, Value, Value);
-    fn pack_value_array_3(&mut self, arg0: Value, arg1: Value, arg2: Value) -> ValueArray3;
-    fn unpack_block_array_2(&mut self, arg0: &BlockArray2) -> (BlockCall, BlockCall);
-    fn pack_block_array_2(&mut self, arg0: BlockCall, arg1: BlockCall) -> BlockArray2;
-}
-
-pub trait ContextIter {
-    type Context;
-    type Output;
-    fn next(&mut self, ctx: &mut Self::Context) -> Option<Self::Output>;
-}
-
-pub struct ContextIterWrapper<Item, I: Iterator<Item = Item>, C: Context> {
-    iter: I,
-    _ctx: PhantomData<C>,
-}
-impl<Item, I: Iterator<Item = Item>, C: Context> From<I> for ContextIterWrapper<Item, I, C> {
-    fn from(iter: I) -> Self {
-        Self {
-            iter,
-            _ctx: PhantomData,
-        }
-    }
-}
-impl<Item, I: Iterator<Item = Item>, C: Context> ContextIter for ContextIterWrapper<Item, I, C> {
-    type Context = C;
-    type Output = Item;
-    fn next(&mut self, _ctx: &mut Self::Context) -> Option<Self::Output> {
-        self.iter.next()
-    }
-}
-
-/// Internal type MultiReg: defined at src/prelude_lower.isle line 21.
-#[derive(Clone, Debug)]
-pub enum MultiReg {
-    Empty,
-    One { a: Reg },
-    Two { a: Reg, b: Reg },
-    Three { a: Reg, b: Reg, c: Reg },
-    Four { a: Reg, b: Reg, c: Reg, d: Reg },
-}
-
-/// Internal type SideEffectNoResult: defined at src/prelude_lower.isle line 309.
-#[derive(Clone, Debug)]
-pub enum SideEffectNoResult {
-    Inst {
-        inst: MInst,
-    },
-    Inst2 {
-        inst1: MInst,
-        inst2: MInst,
-    },
-    Inst3 {
-        inst1: MInst,
-        inst2: MInst,
-        inst3: MInst,
-    },
-}
-
-/// Internal type ProducesFlags: defined at src/prelude_lower.isle line 351.
-#[derive(Clone, Debug)]
-pub enum ProducesFlags {
-    AlreadyExistingFlags,
-    ProducesFlagsSideEffect { inst: MInst },
-    ProducesFlagsTwiceSideEffect { inst1: MInst, inst2: MInst },
-    ProducesFlagsReturnsReg { inst: MInst, result: Reg },
-    ProducesFlagsReturnsResultWithConsumer { inst: MInst, result: Reg },
-}
-
-/// Internal type ConsumesAndProducesFlags: defined at src/prelude_lower.isle line 370.
-#[derive(Clone, Debug)]
-pub enum ConsumesAndProducesFlags {
-    SideEffect { inst: MInst },
-    ReturnsReg { inst: MInst, result: Reg },
-}
-
-/// Internal type ConsumesFlags: defined at src/prelude_lower.isle line 378.
-#[derive(Clone, Debug)]
-pub enum ConsumesFlags {
-    ConsumesFlagsSideEffect {
-        inst: MInst,
-    },
-    ConsumesFlagsSideEffect2 {
-        inst1: MInst,
-        inst2: MInst,
-    },
-    ConsumesFlagsReturnsResultWithProducer {
-        inst: MInst,
-        result: Reg,
-    },
-    ConsumesFlagsReturnsReg {
-        inst: MInst,
-        result: Reg,
-    },
-    ConsumesFlagsTwiceReturnsValueRegs {
-        inst1: MInst,
-        inst2: MInst,
-        result: ValueRegs,
-    },
-    ConsumesFlagsFourTimesReturnsValueRegs {
-        inst1: MInst,
-        inst2: MInst,
-        inst3: MInst,
-        inst4: MInst,
-        result: ValueRegs,
-    },
-}
-
-/// Internal type MInst: defined at src/isa/x64/inst.isle line 8.
-#[derive(Clone)]
-pub enum MInst {
-    Nop {
-        len: u8,
-    },
-    AluRmiR {
-        size: OperandSize,
-        op: AluRmiROpcode,
-        src1: Gpr,
-        src2: GprMemImm,
-        dst: WritableGpr,
-    },
-    AluRM {
-        size: OperandSize,
-        op: AluRmiROpcode,
-        src1_dst: SyntheticAmode,
-        src2: Gpr,
-    },
-    AluRmRVex {
-        size: OperandSize,
-        op: AluRmROpcode,
-        src1: Gpr,
-        src2: Gpr,
-        dst: WritableGpr,
-    },
-    AluConstOp {
-        op: AluRmiROpcode,
-        size: OperandSize,
-        dst: WritableGpr,
-    },
-    UnaryRmR {
-        size: OperandSize,
-        op: UnaryRmROpcode,
-        src: GprMem,
-        dst: WritableGpr,
-    },
-    UnaryRmRVex {
-        size: OperandSize,
-        op: UnaryRmRVexOpcode,
-        src: GprMem,
-        dst: WritableGpr,
-    },
-    Not {
-        size: OperandSize,
-        src: Gpr,
-        dst: WritableGpr,
-    },
-    Neg {
-        size: OperandSize,
-        src: Gpr,
-        dst: WritableGpr,
-    },
-    Div {
-        size: OperandSize,
-        sign: DivSignedness,
-        trap: TrapCode,
-        divisor: GprMem,
-        dividend_lo: Gpr,
-        dividend_hi: Gpr,
-        dst_quotient: WritableGpr,
-        dst_remainder: WritableGpr,
-    },
-    Div8 {
-        sign: DivSignedness,
-        trap: TrapCode,
-        divisor: GprMem,
-        dividend: Gpr,
-        dst: WritableGpr,
-    },
-    MulHi {
-        size: OperandSize,
-        signed: bool,
-        src1: Gpr,
-        src2: GprMem,
-        dst_lo: WritableGpr,
-        dst_hi: WritableGpr,
-    },
-    UMulLo {
-        size: OperandSize,
-        src1: Gpr,
-        src2: GprMem,
-        dst: WritableGpr,
-    },
-    CheckedSRemSeq {
-        size: OperandSize,
-        dividend_lo: Gpr,
-        dividend_hi: Gpr,
-        divisor: Gpr,
-        dst_quotient: WritableGpr,
-        dst_remainder: WritableGpr,
-    },
-    CheckedSRemSeq8 {
-        dividend: Gpr,
-        divisor: Gpr,
-        dst: WritableGpr,
-    },
-    SignExtendData {
-        size: OperandSize,
-        src: Gpr,
-        dst: WritableGpr,
-    },
-    Imm {
-        dst_size: OperandSize,
-        simm64: u64,
-        dst: WritableGpr,
-    },
-    MovRR {
-        size: OperandSize,
-        src: Gpr,
-        dst: WritableGpr,
-    },
-    MovFromPReg {
-        src: PReg,
-        dst: WritableGpr,
-    },
-    MovToPReg {
-        src: Gpr,
-        dst: PReg,
-    },
-    MovzxRmR {
-        ext_mode: ExtMode,
-        src: GprMem,
-        dst: WritableGpr,
-    },
-    Mov64MR {
-        src: SyntheticAmode,
-        dst: WritableGpr,
-    },
-    LoadEffectiveAddress {
-        addr: SyntheticAmode,
-        dst: WritableGpr,
-        size: OperandSize,
-    },
-    MovsxRmR {
-        ext_mode: ExtMode,
-        src: GprMem,
-        dst: WritableGpr,
-    },
-    MovImmM {
-        size: OperandSize,
-        simm64: u64,
-        dst: SyntheticAmode,
-    },
-    MovRM {
-        size: OperandSize,
-        src: Gpr,
-        dst: SyntheticAmode,
-    },
-    ShiftR {
-        size: OperandSize,
-        kind: ShiftKind,
-        src: Gpr,
-        num_bits: Imm8Gpr,
-        dst: WritableGpr,
-    },
-    XmmRmiReg {
-        opcode: SseOpcode,
-        src1: Xmm,
-        src2: XmmMemAlignedImm,
-        dst: WritableXmm,
-    },
-    CmpRmiR {
-        size: OperandSize,
-        opcode: CmpOpcode,
-        src: GprMemImm,
-        dst: Gpr,
-    },
-    Setcc {
-        cc: CC,
-        dst: WritableGpr,
-    },
-    Bswap {
-        size: OperandSize,
-        src: Gpr,
-        dst: WritableGpr,
-    },
-    Cmove {
-        size: OperandSize,
-        cc: CC,
-        consequent: GprMem,
-        alternative: Gpr,
-        dst: WritableGpr,
-    },
-    XmmCmove {
-        ty: Type,
-        cc: CC,
-        consequent: XmmMemAligned,
-        alternative: Xmm,
-        dst: WritableXmm,
-    },
-    Push64 {
-        src: GprMemImm,
-    },
-    Pop64 {
-        dst: WritableGpr,
-    },
-    StackProbeLoop {
-        tmp: WritableReg,
-        frame_size: u32,
-        guard_size: u32,
-    },
-    XmmRmR {
-        op: SseOpcode,
-        src1: Xmm,
-        src2: XmmMemAligned,
-        dst: WritableXmm,
-    },
-    XmmRmRUnaligned {
-        op: SseOpcode,
-        src1: Xmm,
-        src2: XmmMem,
-        dst: WritableXmm,
-    },
-    XmmRmRBlend {
-        op: SseOpcode,
-        src1: Xmm,
-        src2: XmmMemAligned,
-        mask: Xmm,
-        dst: WritableXmm,
-    },
-    XmmRmiRVex {
-        op: AvxOpcode,
-        src1: Xmm,
-        src2: XmmMemImm,
-        dst: WritableXmm,
-    },
-    XmmRmRImmVex {
-        op: AvxOpcode,
-        src1: Xmm,
-        src2: XmmMem,
-        dst: WritableXmm,
-        imm: u8,
-    },
-    XmmVexPinsr {
-        op: AvxOpcode,
-        src1: Xmm,
-        src2: GprMem,
-        dst: WritableXmm,
-        imm: u8,
-    },
-    XmmRmRVex3 {
-        op: AvxOpcode,
-        src1: Xmm,
-        src2: Xmm,
-        src3: XmmMem,
-        dst: WritableXmm,
-    },
-    XmmRmRBlendVex {
-        op: AvxOpcode,
-        src1: Xmm,
-        src2: XmmMem,
-        mask: Xmm,
-        dst: WritableXmm,
-    },
-    XmmUnaryRmRVex {
-        op: AvxOpcode,
-        src: XmmMem,
-        dst: WritableXmm,
-    },
-    XmmUnaryRmRImmVex {
-        op: AvxOpcode,
-        src: XmmMem,
-        dst: WritableXmm,
-        imm: u8,
-    },
-    XmmMovRMVex {
-        op: AvxOpcode,
-        src: Xmm,
-        dst: SyntheticAmode,
-    },
-    XmmMovRMImmVex {
-        op: AvxOpcode,
-        src: Xmm,
-        dst: SyntheticAmode,
-        imm: u8,
-    },
-    XmmToGprImmVex {
-        op: AvxOpcode,
-        src: Xmm,
-        dst: WritableGpr,
-        imm: u8,
-    },
-    GprToXmmVex {
-        op: AvxOpcode,
-        src: GprMem,
-        dst: WritableXmm,
-        src_size: OperandSize,
-    },
-    XmmToGprVex {
-        op: AvxOpcode,
-        src: Xmm,
-        dst: WritableGpr,
-        dst_size: OperandSize,
-    },
-    XmmRmREvex {
-        op: Avx512Opcode,
-        src1: Xmm,
-        src2: XmmMem,
-        dst: WritableXmm,
-    },
-    XmmUnaryRmRImmEvex {
-        op: Avx512Opcode,
-        src: XmmMem,
-        dst: WritableXmm,
-        imm: u8,
-    },
-    XmmRmREvex3 {
-        op: Avx512Opcode,
-        src1: Xmm,
-        src2: Xmm,
-        src3: XmmMem,
-        dst: WritableXmm,
-    },
-    XmmUnaryRmR {
-        op: SseOpcode,
-        src: XmmMemAligned,
-        dst: WritableXmm,
-    },
-    XmmUnaryRmRUnaligned {
-        op: SseOpcode,
-        src: XmmMem,
-        dst: WritableXmm,
-    },
-    XmmUnaryRmRImm {
-        op: SseOpcode,
-        src: XmmMemAligned,
-        imm: u8,
-        dst: WritableXmm,
-    },
-    XmmUnaryRmREvex {
-        op: Avx512Opcode,
-        src: XmmMem,
-        dst: WritableXmm,
-    },
-    XmmMovRM {
-        op: SseOpcode,
-        src: Xmm,
-        dst: SyntheticAmode,
-    },
-    XmmMovRMImm {
-        op: SseOpcode,
-        src: Xmm,
-        dst: SyntheticAmode,
-        imm: u8,
-    },
-    XmmToGpr {
-        op: SseOpcode,
-        src: Xmm,
-        dst: WritableGpr,
-        dst_size: OperandSize,
-    },
-    XmmToGprImm {
-        op: SseOpcode,
-        src: Xmm,
-        dst: WritableGpr,
-        imm: u8,
-    },
-    GprToXmm {
-        op: SseOpcode,
-        src: GprMem,
-        dst: WritableXmm,
-        src_size: OperandSize,
-    },
-    CvtUint64ToFloatSeq {
-        dst_size: OperandSize,
-        src: Gpr,
-        dst: WritableXmm,
-        tmp_gpr1: WritableGpr,
-        tmp_gpr2: WritableGpr,
-    },
-    CvtFloatToSintSeq {
-        dst_size: OperandSize,
-        src_size: OperandSize,
-        is_saturating: bool,
-        src: Xmm,
-        dst: WritableGpr,
-        tmp_gpr: WritableGpr,
-        tmp_xmm: WritableXmm,
-    },
-    CvtFloatToUintSeq {
-        dst_size: OperandSize,
-        src_size: OperandSize,
-        is_saturating: bool,
-        src: Xmm,
-        dst: WritableGpr,
-        tmp_gpr: WritableGpr,
-        tmp_xmm: WritableXmm,
-        tmp_xmm2: WritableXmm,
-    },
-    XmmMinMaxSeq {
-        size: OperandSize,
-        is_min: bool,
-        lhs: Xmm,
-        rhs: Xmm,
-        dst: WritableXmm,
-    },
-    XmmCmpRmR {
-        op: SseOpcode,
-        src: XmmMemAligned,
-        dst: Xmm,
-    },
-    XmmRmRImm {
-        op: SseOpcode,
-        src1: Reg,
-        src2: RegMem,
-        dst: WritableReg,
-        imm: u8,
-        size: OperandSize,
-    },
-    CallKnown {
-        dest: ExternalName,
-        info: BoxCallInfo,
-    },
-    CallUnknown {
-        dest: RegMem,
-        info: BoxCallInfo,
-    },
-    ReturnCallKnown {
-        callee: ExternalName,
-        info: BoxReturnCallInfo,
-    },
-    ReturnCallUnknown {
-        callee: RegMem,
-        info: BoxReturnCallInfo,
-    },
-    Args {
-        args: VecArgPair,
-    },
-    Ret {
-        rets: VecRetPair,
-        stack_bytes_to_pop: u32,
-    },
-    JmpKnown {
-        dst: MachLabel,
-    },
-    JmpIf {
-        cc: CC,
-        taken: MachLabel,
-    },
-    JmpCond {
-        cc: CC,
-        taken: MachLabel,
-        not_taken: MachLabel,
-    },
-    JmpTableSeq {
-        idx: Reg,
-        tmp1: WritableReg,
-        tmp2: WritableReg,
-        default_target: MachLabel,
-        targets: BoxVecMachLabel,
-    },
-    JmpUnknown {
-        target: RegMem,
-    },
-    TrapIf {
-        cc: CC,
-        trap_code: TrapCode,
-    },
-    TrapIfAnd {
-        cc1: CC,
-        cc2: CC,
-        trap_code: TrapCode,
-    },
-    TrapIfOr {
-        cc1: CC,
-        cc2: CC,
-        trap_code: TrapCode,
-    },
-    Hlt,
-    Ud2 {
-        trap_code: TrapCode,
-    },
-    LoadExtName {
-        dst: WritableReg,
-        name: BoxExternalName,
-        offset: i64,
-        distance: RelocDistance,
-    },
-    LockCmpxchg {
-        ty: Type,
-        replacement: Reg,
-        expected: Reg,
-        mem: SyntheticAmode,
-        dst_old: WritableReg,
-    },
-    AtomicRmwSeq {
-        ty: Type,
-        op: MachAtomicRmwOp,
-        mem: SyntheticAmode,
-        operand: Reg,
-        temp: WritableReg,
-        dst_old: WritableReg,
-    },
-    Fence {
-        kind: FenceKind,
-    },
-    VirtualSPOffsetAdj {
-        offset: i64,
-    },
-    XmmUninitializedValue {
-        dst: WritableXmm,
-    },
-    ElfTlsGetAddr {
-        symbol: ExternalName,
-        dst: WritableGpr,
-    },
-    MachOTlsGetAddr {
-        symbol: ExternalName,
-        dst: WritableGpr,
-    },
-    CoffTlsGetAddr {
-        symbol: ExternalName,
-        dst: WritableGpr,
-        tmp: WritableGpr,
-    },
-    Unwind {
-        inst: UnwindInst,
-    },
-    DummyUse {
-        reg: Reg,
-    },
-}
-
-/// Internal type DivSignedness: defined at src/isa/x64/inst.isle line 692.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum DivSignedness {
-    Signed,
-    Unsigned,
-}
-
-/// Internal type UnaryRmRVexOpcode: defined at src/isa/x64/inst.isle line 759.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum UnaryRmRVexOpcode {
-    Blsi,
-    Blsmsk,
-    Blsr,
-}
-
-/// Internal type Amode: defined at src/isa/x64/inst.isle line 1007.
-#[derive(Clone, Debug)]
-pub enum Amode {
-    ImmReg {
-        simm32: u32,
-        base: Reg,
-        flags: MemFlags,
-    },
-    ImmRegRegShift {
-        simm32: u32,
-        base: Gpr,
-        index: Gpr,
-        shift: u8,
-        flags: MemFlags,
-    },
-    RipRelative {
-        target: MachLabel,
-    },
-}
-
-/// Internal type AvxOpcode: defined at src/isa/x64/inst.isle line 1156.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum AvxOpcode {
-    Vfmadd213ss,
-    Vfmadd213sd,
-    Vfmadd213ps,
-    Vfmadd213pd,
-    Vfmadd132ss,
-    Vfmadd132sd,
-    Vfmadd132ps,
-    Vfmadd132pd,
-    Vfnmadd213ss,
-    Vfnmadd213sd,
-    Vfnmadd213ps,
-    Vfnmadd213pd,
-    Vfnmadd132ss,
-    Vfnmadd132sd,
-    Vfnmadd132ps,
-    Vfnmadd132pd,
-    Vcmpps,
-    Vcmppd,
-    Vpsrlw,
-    Vpsrld,
-    Vpsrlq,
-    Vpaddb,
-    Vpaddw,
-    Vpaddd,
-    Vpaddq,
-    Vpaddsb,
-    Vpaddsw,
-    Vpaddusb,
-    Vpaddusw,
-    Vpsubb,
-    Vpsubw,
-    Vpsubd,
-    Vpsubq,
-    Vpsubsb,
-    Vpsubsw,
-    Vpsubusb,
-    Vpsubusw,
-    Vpavgb,
-    Vpavgw,
-    Vpand,
-    Vandps,
-    Vandpd,
-    Vpor,
-    Vorps,
-    Vorpd,
-    Vpxor,
-    Vxorps,
-    Vxorpd,
-    Vpmullw,
-    Vpmulld,
-    Vpmulhw,
-    Vpmulhd,
-    Vpmulhrsw,
-    Vpmulhuw,
-    Vpmuldq,
-    Vpmuludq,
-    Vpunpckhwd,
-    Vpunpcklwd,
-    Vunpcklps,
-    Vunpckhps,
-    Vandnps,
-    Vandnpd,
-    Vpandn,
-    Vaddps,
-    Vaddpd,
-    Vsubps,
-    Vsubpd,
-    Vmulps,
-    Vmulpd,
-    Vdivps,
-    Vdivpd,
-    Vpcmpeqb,
-    Vpcmpeqw,
-    Vpcmpeqd,
-    Vpcmpeqq,
-    Vpcmpgtb,
-    Vpcmpgtw,
-    Vpcmpgtd,
-    Vpcmpgtq,
-    Vminps,
-    Vminpd,
-    Vmaxps,
-    Vmaxpd,
-    Vblendvpd,
-    Vblendvps,
-    Vpblendvb,
-    Vmovlhps,
-    Vpmaxsb,
-    Vpmaxsw,
-    Vpmaxsd,
-    Vpminsb,
-    Vpminsw,
-    Vpminsd,
-    Vpmaxub,
-    Vpmaxuw,
-    Vpmaxud,
-    Vpminub,
-    Vpminuw,
-    Vpminud,
-    Vpunpcklbw,
-    Vpunpckhbw,
-    Vpacksswb,
-    Vpackssdw,
-    Vpackuswb,
-    Vpackusdw,
-    Vpalignr,
-    Vpinsrb,
-    Vpinsrw,
-    Vpinsrd,
-    Vpinsrq,
-    Vpmaddwd,
-    Vpmaddubsw,
-    Vinsertps,
-    Vpshufb,
-    Vshufps,
-    Vpsllw,
-    Vpslld,
-    Vpsllq,
-    Vpsraw,
-    Vpsrad,
-    Vpmovsxbw,
-    Vpmovzxbw,
-    Vpmovsxwd,
-    Vpmovzxwd,
-    Vpmovsxdq,
-    Vpmovzxdq,
-    Vaddss,
-    Vaddsd,
-    Vmulss,
-    Vmulsd,
-    Vsubss,
-    Vsubsd,
-    Vdivss,
-    Vdivsd,
-    Vpabsb,
-    Vpabsw,
-    Vpabsd,
-    Vminss,
-    Vminsd,
-    Vmaxss,
-    Vmaxsd,
-    Vsqrtps,
-    Vsqrtpd,
-    Vroundps,
-    Vroundpd,
-    Vcvtdq2pd,
-    Vcvtdq2ps,
-    Vcvtpd2ps,
-    Vcvtps2pd,
-    Vcvttpd2dq,
-    Vcvttps2dq,
-    Vphaddw,
-    Vphaddd,
-    Vpunpckhdq,
-    Vpunpckldq,
-    Vpunpckhqdq,
-    Vpunpcklqdq,
-    Vpshuflw,
-    Vpshufhw,
-    Vpshufd,
-    Vmovss,
-    Vmovsd,
-    Vmovups,
-    Vmovupd,
-    Vmovdqu,
-    Vpextrb,
-    Vpextrw,
-    Vpextrd,
-    Vpextrq,
-    Vpblendw,
-    Vmovddup,
-    Vpbroadcastb,
-    Vpbroadcastw,
-    Vpbroadcastd,
-    Vbroadcastss,
-    Vmovd,
-    Vmovq,
-    Vmovmskps,
-    Vmovmskpd,
-    Vpmovmskb,
-    Vcvtsi2ss,
-    Vcvtsi2sd,
-    Vcvtss2sd,
-    Vcvtsd2ss,
-    Vsqrtss,
-    Vsqrtsd,
-    Vroundss,
-    Vroundsd,
-}
-
-/// Internal type Avx512Opcode: defined at src/isa/x64/inst.isle line 1347.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum Avx512Opcode {
-    Vcvtudq2ps,
-    Vpabsq,
-    Vpermi2b,
-    Vpmullq,
-    Vpopcntb,
-    Vpsraq,
-    VpsraqImm,
-}
-
-/// Internal type RegisterClass: defined at src/isa/x64/inst.isle line 1624.
-#[derive(Clone, Debug)]
-pub enum RegisterClass {
-    Gpr { single_register: bool },
-    Xmm,
-}
-
-/// Internal type ExtendKind: defined at src/isa/x64/inst.isle line 2072.
-#[derive(Copy, Clone, PartialEq, Eq, Debug)]
-pub enum ExtendKind {
-    Sign,
-    Zero,
-}
-
-/// Internal type IcmpCondResult: defined at src/isa/x64/inst.isle line 4521.
-#[derive(Clone, Debug)]
-pub enum IcmpCondResult {
-    Condition { producer: ProducesFlags, cc: CC },
-}
-
-/// Internal type FcmpCondResult: defined at src/isa/x64/inst.isle line 4634.
-#[derive(Clone, Debug)]
-pub enum FcmpCondResult {
-    Condition {
-        producer: ProducesFlags,
-        cc: CC,
-    },
-    AndCondition {
-        producer: ProducesFlags,
-        cc1: CC,
-        cc2: CC,
-    },
-    OrCondition {
-        producer: ProducesFlags,
-        cc1: CC,
-        cc2: CC,
-    },
-}
-
-// Generated as internal constructor for term output_reg.
-pub fn constructor_output_reg<C: Context>(ctx: &mut C, arg0: Reg) -> InstOutput {
-    let v1 = C::value_reg(ctx, arg0);
-    let v2 = C::output(ctx, v1);
-    // Rule at src/prelude_lower.isle line 65.
-    return v2;
-}
-
-// Generated as internal constructor for term output_value.
-pub fn constructor_output_value<C: Context>(ctx: &mut C, arg0: Value) -> InstOutput {
-    let v1 = C::put_in_regs(ctx, arg0);
-    let v2 = C::output(ctx, v1);
-    // Rule at src/prelude_lower.isle line 69.
-    return v2;
-}
-
-// Generated as internal constructor for term temp_reg.
-pub fn constructor_temp_reg<C: Context>(ctx: &mut C, arg0: Type) -> Reg {
-    let v1 = C::temp_writable_reg(ctx, arg0);
-    let v2 = C::writable_reg_to_reg(ctx, v1);
-    // Rule at src/prelude_lower.isle line 89.
-    return v2;
-}
-
-// Generated as internal constructor for term value_regs_range.
-pub fn constructor_value_regs_range<C: Context>(ctx: &mut C, arg0: ValueRegs) -> Range {
-    let v2 = C::value_regs_len(ctx, arg0);
-    let v3 = C::range(ctx, 0x0, v2);
-    // Rule at src/prelude_lower.isle line 138.
-    return v3;
-}
-
-// Generated as internal constructor for term lo_reg.
-pub fn constructor_lo_reg<C: Context>(ctx: &mut C, arg0: Value) -> Reg {
-    let v1 = C::put_in_regs(ctx, arg0);
-    let v3 = C::value_regs_get(ctx, v1, 0x0);
-    // Rule at src/prelude_lower.isle line 149.
-    return v3;
-}
-
-// Generated as internal constructor for term multi_reg_to_pair_and_single.
-pub fn constructor_multi_reg_to_pair_and_single<C: Context>(
-    ctx: &mut C,
-    arg0: &MultiReg,
-) -> InstOutput {
-    if let &MultiReg::Three {
-        a: v1,
-        b: v2,
-        c: v3,
-    } = arg0
-    {
-        let v4 = C::value_regs(ctx, v1, v2);
-        let v5 = C::value_reg(ctx, v3);
-        let v6 = C::output_pair(ctx, v4, v5);
-        // Rule at src/prelude_lower.isle line 160.
-        return v6;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "multi_reg_to_pair_and_single", "src/prelude_lower.isle line 159"
-    )
-}
-
-// Generated as internal constructor for term multi_reg_to_pair.
-pub fn constructor_multi_reg_to_pair<C: Context>(ctx: &mut C, arg0: &MultiReg) -> InstOutput {
-    if let &MultiReg::Two { a: v1, b: v2 } = arg0 {
-        let v3 = C::value_regs(ctx, v1, v2);
-        let v4 = C::output(ctx, v3);
-        // Rule at src/prelude_lower.isle line 165.
-        return v4;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "multi_reg_to_pair", "src/prelude_lower.isle line 164"
-    )
-}
-
-// Generated as internal constructor for term multi_reg_to_single.
-pub fn constructor_multi_reg_to_single<C: Context>(ctx: &mut C, arg0: &MultiReg) -> InstOutput {
-    if let &MultiReg::One { a: v1 } = arg0 {
-        let v2 = C::value_reg(ctx, v1);
-        let v3 = C::output(ctx, v2);
-        // Rule at src/prelude_lower.isle line 170.
-        return v3;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "multi_reg_to_single", "src/prelude_lower.isle line 169"
-    )
-}
-
-// Generated as internal constructor for term emit_side_effect.
-pub fn constructor_emit_side_effect<C: Context>(ctx: &mut C, arg0: &SideEffectNoResult) -> Unit {
-    match arg0 {
-        &SideEffectNoResult::Inst { inst: ref v1 } => {
-            let v2 = C::emit(ctx, v1);
-            // Rule at src/prelude_lower.isle line 319.
-            return v2;
-        }
-        &SideEffectNoResult::Inst2 {
-            inst1: ref v3,
-            inst2: ref v4,
-        } => {
-            let v5 = C::emit(ctx, v3);
-            let v6 = C::emit(ctx, v4);
-            // Rule at src/prelude_lower.isle line 321.
-            return v6;
-        }
-        &SideEffectNoResult::Inst3 {
-            inst1: ref v7,
-            inst2: ref v8,
-            inst3: ref v9,
-        } => {
-            let v10 = C::emit(ctx, v7);
-            let v11 = C::emit(ctx, v8);
-            let v12 = C::emit(ctx, v9);
-            // Rule at src/prelude_lower.isle line 324.
-            return v12;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "emit_side_effect", "src/prelude_lower.isle line 318"
-    )
-}
-
-// Generated as internal constructor for term side_effect.
-pub fn constructor_side_effect<C: Context>(ctx: &mut C, arg0: &SideEffectNoResult) -> InstOutput {
-    let v1 = constructor_emit_side_effect(ctx, arg0);
-    let v2 = C::output_none(ctx);
-    // Rule at src/prelude_lower.isle line 332.
-    return v2;
-}
-
-// Generated as internal constructor for term side_effect_concat.
-pub fn constructor_side_effect_concat<C: Context>(
-    ctx: &mut C,
-    arg0: &SideEffectNoResult,
-    arg1: &SideEffectNoResult,
-) -> SideEffectNoResult {
-    match arg0 {
-        &SideEffectNoResult::Inst { inst: ref v1 } => {
-            match arg1 {
-                &SideEffectNoResult::Inst { inst: ref v3 } => {
-                    let v4 = SideEffectNoResult::Inst2 {
-                        inst1: v1.clone(),
-                        inst2: v3.clone(),
-                    };
-                    // Rule at src/prelude_lower.isle line 337.
-                    return v4;
-                }
-                &SideEffectNoResult::Inst2 {
-                    inst1: ref v5,
-                    inst2: ref v6,
-                } => {
-                    let v7 = SideEffectNoResult::Inst3 {
-                        inst1: v1.clone(),
-                        inst2: v5.clone(),
-                        inst3: v6.clone(),
-                    };
-                    // Rule at src/prelude_lower.isle line 339.
-                    return v7;
-                }
-                _ => {}
-            }
-        }
-        &SideEffectNoResult::Inst2 {
-            inst1: ref v8,
-            inst2: ref v9,
-        } => {
-            if let &SideEffectNoResult::Inst { inst: ref v3 } = arg1 {
-                let v10 = SideEffectNoResult::Inst3 {
-                    inst1: v8.clone(),
-                    inst2: v9.clone(),
-                    inst3: v3.clone(),
-                };
-                // Rule at src/prelude_lower.isle line 341.
-                return v10;
-            }
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "side_effect_concat", "src/prelude_lower.isle line 336"
-    )
-}
-
-// Generated as internal constructor for term produces_flags_concat.
-pub fn constructor_produces_flags_concat<C: Context>(
-    ctx: &mut C,
-    arg0: &ProducesFlags,
-    arg1: &ProducesFlags,
-) -> ProducesFlags {
-    if let &ProducesFlags::ProducesFlagsSideEffect { inst: ref v1 } = arg0 {
-        if let &ProducesFlags::ProducesFlagsSideEffect { inst: ref v3 } = arg1 {
-            let v4 = ProducesFlags::ProducesFlagsTwiceSideEffect {
-                inst1: v1.clone(),
-                inst2: v3.clone(),
-            };
-            // Rule at src/prelude_lower.isle line 366.
-            return v4;
-        }
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "produces_flags_concat", "src/prelude_lower.isle line 365"
-    )
-}
-
-// Generated as internal constructor for term produces_flags_get_reg.
-pub fn constructor_produces_flags_get_reg<C: Context>(ctx: &mut C, arg0: &ProducesFlags) -> Reg {
-    match arg0 {
-        &ProducesFlags::ProducesFlagsReturnsReg {
-            inst: ref v1,
-            result: v2,
-        } => {
-            // Rule at src/prelude_lower.isle line 396.
-            return v2;
-        }
-        &ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
-            inst: ref v3,
-            result: v4,
-        } => {
-            // Rule at src/prelude_lower.isle line 397.
-            return v4;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "produces_flags_get_reg", "src/prelude_lower.isle line 395"
-    )
-}
-
-// Generated as internal constructor for term produces_flags_ignore.
-pub fn constructor_produces_flags_ignore<C: Context>(
-    ctx: &mut C,
-    arg0: &ProducesFlags,
-) -> ProducesFlags {
-    match arg0 {
-        &ProducesFlags::ProducesFlagsReturnsReg {
-            inst: ref v1,
-            result: v2,
-        } => {
-            let v3 = ProducesFlags::ProducesFlagsSideEffect { inst: v1.clone() };
-            // Rule at src/prelude_lower.isle line 402.
-            return v3;
-        }
-        &ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
-            inst: ref v4,
-            result: v5,
-        } => {
-            let v6 = ProducesFlags::ProducesFlagsSideEffect { inst: v4.clone() };
-            // Rule at src/prelude_lower.isle line 404.
-            return v6;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "produces_flags_ignore", "src/prelude_lower.isle line 401"
-    )
-}
-
-// Generated as internal constructor for term consumes_flags_concat.
-pub fn constructor_consumes_flags_concat<C: Context>(
-    ctx: &mut C,
-    arg0: &ConsumesFlags,
-    arg1: &ConsumesFlags,
-) -> ConsumesFlags {
-    match arg0 {
-        &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v8 } => {
-            if let &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v9 } = arg1 {
-                let v10 = ConsumesFlags::ConsumesFlagsSideEffect2 {
-                    inst1: v8.clone(),
-                    inst2: v9.clone(),
-                };
-                // Rule at src/prelude_lower.isle line 417.
-                return v10;
-            }
-        }
-        &ConsumesFlags::ConsumesFlagsReturnsReg {
-            inst: ref v1,
-            result: v2,
-        } => {
-            if let &ConsumesFlags::ConsumesFlagsReturnsReg {
-                inst: ref v4,
-                result: v5,
-            } = arg1
-            {
-                let v6 = C::value_regs(ctx, v2, v5);
-                let v7 = ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
-                    inst1: v1.clone(),
-                    inst2: v4.clone(),
-                    result: v6,
-                };
-                // Rule at src/prelude_lower.isle line 411.
-                return v7;
-            }
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "consumes_flags_concat", "src/prelude_lower.isle line 410"
-    )
-}
-
-// Generated as internal constructor for term with_flags.
-pub fn constructor_with_flags<C: Context>(
-    ctx: &mut C,
-    arg0: &ProducesFlags,
-    arg1: &ConsumesFlags,
-) -> ValueRegs {
-    match arg0 {
-        &ProducesFlags::ProducesFlagsSideEffect { inst: ref v12 } => {
-            match arg1 {
-                &ConsumesFlags::ConsumesFlagsReturnsReg {
-                    inst: ref v13,
-                    result: v14,
-                } => {
-                    let v15 = C::emit(ctx, v12);
-                    let v16 = C::emit(ctx, v13);
-                    let v17 = C::value_reg(ctx, v14);
-                    // Rule at src/prelude_lower.isle line 448.
-                    return v17;
-                }
-                &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
-                    inst1: ref v18,
-                    inst2: ref v19,
-                    result: v20,
-                } => {
-                    let v15 = C::emit(ctx, v12);
-                    let v21 = C::emit(ctx, v18);
-                    let v22 = C::emit(ctx, v19);
-                    // Rule at src/prelude_lower.isle line 454.
-                    return v20;
-                }
-                &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
-                    inst1: ref v23,
-                    inst2: ref v24,
-                    inst3: ref v25,
-                    inst4: ref v26,
-                    result: v27,
-                } => {
-                    let v15 = C::emit(ctx, v12);
-                    let v28 = C::emit(ctx, v23);
-                    let v29 = C::emit(ctx, v24);
-                    let v30 = C::emit(ctx, v25);
-                    let v31 = C::emit(ctx, v26);
-                    // Rule at src/prelude_lower.isle line 466.
-                    return v27;
-                }
-                _ => {}
-            }
-        }
-        &ProducesFlags::ProducesFlagsTwiceSideEffect {
-            inst1: ref v32,
-            inst2: ref v33,
-        } => {
-            match arg1 {
-                &ConsumesFlags::ConsumesFlagsReturnsReg {
-                    inst: ref v13,
-                    result: v14,
-                } => {
-                    let v34 = C::emit(ctx, v32);
-                    let v35 = C::emit(ctx, v33);
-                    let v36 = C::emit(ctx, v13);
-                    let v37 = C::value_reg(ctx, v14);
-                    // Rule at src/prelude_lower.isle line 482.
-                    return v37;
-                }
-                &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
-                    inst1: ref v18,
-                    inst2: ref v19,
-                    result: v20,
-                } => {
-                    let v34 = C::emit(ctx, v32);
-                    let v35 = C::emit(ctx, v33);
-                    let v38 = C::emit(ctx, v18);
-                    let v39 = C::emit(ctx, v19);
-                    // Rule at src/prelude_lower.isle line 489.
-                    return v20;
-                }
-                &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
-                    inst1: ref v23,
-                    inst2: ref v24,
-                    inst3: ref v25,
-                    inst4: ref v26,
-                    result: v27,
-                } => {
-                    let v34 = C::emit(ctx, v32);
-                    let v35 = C::emit(ctx, v33);
-                    let v40 = C::emit(ctx, v23);
-                    let v41 = C::emit(ctx, v24);
-                    let v42 = C::emit(ctx, v25);
-                    let v43 = C::emit(ctx, v26);
-                    // Rule at src/prelude_lower.isle line 502.
-                    return v27;
-                }
-                _ => {}
-            }
-        }
-        &ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
-            inst: ref v1,
-            result: v2,
-        } => {
-            match arg1 {
-                &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v9 } => {
-                    let v6 = C::emit(ctx, v1);
-                    let v10 = C::emit(ctx, v9);
-                    let v11 = C::value_reg(ctx, v2);
-                    // Rule at src/prelude_lower.isle line 442.
-                    return v11;
-                }
-                &ConsumesFlags::ConsumesFlagsReturnsResultWithProducer {
-                    inst: ref v4,
-                    result: v5,
-                } => {
-                    let v6 = C::emit(ctx, v1);
-                    let v7 = C::emit(ctx, v4);
-                    let v8 = C::value_regs(ctx, v2, v5);
-                    // Rule at src/prelude_lower.isle line 434.
-                    return v8;
-                }
-                _ => {}
-            }
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "with_flags", "src/prelude_lower.isle line 432"
-    )
-}
-
-// Generated as internal constructor for term with_flags_reg.
-pub fn constructor_with_flags_reg<C: Context>(
-    ctx: &mut C,
-    arg0: &ProducesFlags,
-    arg1: &ConsumesFlags,
-) -> Reg {
-    let v2 = constructor_with_flags(ctx, arg0, arg1);
-    let v4 = C::value_regs_get(ctx, v2, 0x0);
-    // Rule at src/prelude_lower.isle line 520.
-    return v4;
-}
-
-// Generated as internal constructor for term flags_to_producesflags.
-pub fn constructor_flags_to_producesflags<C: Context>(ctx: &mut C, arg0: Value) -> ProducesFlags {
-    let v1 = C::mark_value_used(ctx, arg0);
-    // Rule at src/prelude_lower.isle line 527.
-    return ProducesFlags::AlreadyExistingFlags;
-}
-
-// Generated as internal constructor for term with_flags_side_effect.
-pub fn constructor_with_flags_side_effect<C: Context>(
-    ctx: &mut C,
-    arg0: &ProducesFlags,
-    arg1: &ConsumesFlags,
-) -> SideEffectNoResult {
-    match arg0 {
-        &ProducesFlags::AlreadyExistingFlags => {
-            match arg1 {
-                &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v2 } => {
-                    let v3 = SideEffectNoResult::Inst { inst: v2.clone() };
-                    // Rule at src/prelude_lower.isle line 538.
-                    return v3;
-                }
-                &ConsumesFlags::ConsumesFlagsSideEffect2 {
-                    inst1: ref v4,
-                    inst2: ref v5,
-                } => {
-                    let v6 = SideEffectNoResult::Inst2 {
-                        inst1: v4.clone(),
-                        inst2: v5.clone(),
-                    };
-                    // Rule at src/prelude_lower.isle line 543.
-                    return v6;
-                }
-                _ => {}
-            }
-        }
-        &ProducesFlags::ProducesFlagsSideEffect { inst: ref v7 } => {
-            match arg1 {
-                &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v2 } => {
-                    let v8 = SideEffectNoResult::Inst2 {
-                        inst1: v7.clone(),
-                        inst2: v2.clone(),
-                    };
-                    // Rule at src/prelude_lower.isle line 548.
-                    return v8;
-                }
-                &ConsumesFlags::ConsumesFlagsSideEffect2 {
-                    inst1: ref v4,
-                    inst2: ref v5,
-                } => {
-                    let v9 = SideEffectNoResult::Inst3 {
-                        inst1: v7.clone(),
-                        inst2: v4.clone(),
-                        inst3: v5.clone(),
-                    };
-                    // Rule at src/prelude_lower.isle line 553.
-                    return v9;
-                }
-                _ => {}
-            }
-        }
-        &ProducesFlags::ProducesFlagsTwiceSideEffect {
-            inst1: ref v10,
-            inst2: ref v11,
-        } => {
-            if let &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v2 } = arg1 {
-                let v12 = SideEffectNoResult::Inst3 {
-                    inst1: v10.clone(),
-                    inst2: v11.clone(),
-                    inst3: v2.clone(),
-                };
-                // Rule at src/prelude_lower.isle line 558.
-                return v12;
-            }
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "with_flags_side_effect", "src/prelude_lower.isle line 536"
-    )
-}
-
-// Generated as internal constructor for term with_flags_chained.
-pub fn constructor_with_flags_chained<C: Context>(
-    ctx: &mut C,
-    arg0: &ProducesFlags,
-    arg1: &ConsumesAndProducesFlags,
-    arg2: &ConsumesFlags,
-) -> MultiReg {
-    match arg0 {
-        &ProducesFlags::ProducesFlagsSideEffect { inst: ref v1 } => {
-            match arg1 {
-                &ConsumesAndProducesFlags::SideEffect { inst: ref v3 } => {
-                    match arg2 {
-                        &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v5 } => {
-                            let v6 = C::emit(ctx, v1);
-                            let v7 = C::emit(ctx, v3);
-                            let v8 = C::emit(ctx, v5);
-                            // Rule at src/prelude_lower.isle line 567.
-                            return MultiReg::Empty;
-                        }
-                        &ConsumesFlags::ConsumesFlagsSideEffect2 {
-                            inst1: ref v10,
-                            inst2: ref v11,
-                        } => {
-                            let v6 = C::emit(ctx, v1);
-                            let v7 = C::emit(ctx, v3);
-                            let v12 = C::emit(ctx, v10);
-                            let v13 = C::emit(ctx, v11);
-                            // Rule at src/prelude_lower.isle line 575.
-                            return MultiReg::Empty;
-                        }
-                        &ConsumesFlags::ConsumesFlagsReturnsReg {
-                            inst: ref v14,
-                            result: v15,
-                        } => {
-                            let v6 = C::emit(ctx, v1);
-                            let v7 = C::emit(ctx, v3);
-                            let v16 = C::emit(ctx, v14);
-                            let v17 = MultiReg::One { a: v15 };
-                            // Rule at src/prelude_lower.isle line 584.
-                            return v17;
-                        }
-                        &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
-                            inst1: ref v18,
-                            inst2: ref v19,
-                            result: v20,
-                        } => {
-                            let v6 = C::emit(ctx, v1);
-                            let v7 = C::emit(ctx, v3);
-                            let v21 = C::emit(ctx, v18);
-                            let v22 = C::emit(ctx, v19);
-                            let v24 = C::value_regs_get(ctx, v20, 0x0);
-                            let v26 = C::value_regs_get(ctx, v20, 0x1);
-                            let v27 = MultiReg::Two { a: v24, b: v26 };
-                            // Rule at src/prelude_lower.isle line 592.
-                            return v27;
-                        }
-                        &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
-                            inst1: ref v28,
-                            inst2: ref v29,
-                            inst3: ref v30,
-                            inst4: ref v31,
-                            result: v32,
-                        } => {
-                            let v6 = C::emit(ctx, v1);
-                            let v7 = C::emit(ctx, v3);
-                            let v33 = C::emit(ctx, v28);
-                            let v34 = C::emit(ctx, v29);
-                            let v35 = C::emit(ctx, v30);
-                            let v36 = C::emit(ctx, v31);
-                            let v37 = C::value_regs_get(ctx, v32, 0x0);
-                            let v38 = C::value_regs_get(ctx, v32, 0x1);
-                            let v39 = MultiReg::Two { a: v37, b: v38 };
-                            // Rule at src/prelude_lower.isle line 601.
-                            return v39;
-                        }
-                        _ => {}
-                    }
-                }
-                &ConsumesAndProducesFlags::ReturnsReg {
-                    inst: ref v47,
-                    result: v48,
-                } => {
-                    match arg2 {
-                        &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v5 } => {
-                            let v6 = C::emit(ctx, v1);
-                            let v49 = C::emit(ctx, v47);
-                            let v8 = C::emit(ctx, v5);
-                            let v50 = MultiReg::One { a: v48 };
-                            // Rule at src/prelude_lower.isle line 661.
-                            return v50;
-                        }
-                        &ConsumesFlags::ConsumesFlagsSideEffect2 {
-                            inst1: ref v10,
-                            inst2: ref v11,
-                        } => {
-                            let v6 = C::emit(ctx, v1);
-                            let v49 = C::emit(ctx, v47);
-                            let v12 = C::emit(ctx, v10);
-                            let v13 = C::emit(ctx, v11);
-                            let v50 = MultiReg::One { a: v48 };
-                            // Rule at src/prelude_lower.isle line 669.
-                            return v50;
-                        }
-                        &ConsumesFlags::ConsumesFlagsReturnsReg {
-                            inst: ref v14,
-                            result: v15,
-                        } => {
-                            let v6 = C::emit(ctx, v1);
-                            let v49 = C::emit(ctx, v47);
-                            let v16 = C::emit(ctx, v14);
-                            let v51 = MultiReg::Two { a: v48, b: v15 };
-                            // Rule at src/prelude_lower.isle line 678.
-                            return v51;
-                        }
-                        &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
-                            inst1: ref v18,
-                            inst2: ref v19,
-                            result: v20,
-                        } => {
-                            let v6 = C::emit(ctx, v1);
-                            let v49 = C::emit(ctx, v47);
-                            let v21 = C::emit(ctx, v18);
-                            let v22 = C::emit(ctx, v19);
-                            let v24 = C::value_regs_get(ctx, v20, 0x0);
-                            let v26 = C::value_regs_get(ctx, v20, 0x1);
-                            let v52 = MultiReg::Three {
-                                a: v48,
-                                b: v24,
-                                c: v26,
-                            };
-                            // Rule at src/prelude_lower.isle line 686.
-                            return v52;
-                        }
-                        &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
-                            inst1: ref v28,
-                            inst2: ref v29,
-                            inst3: ref v30,
-                            inst4: ref v31,
-                            result: v32,
-                        } => {
-                            let v6 = C::emit(ctx, v1);
-                            let v49 = C::emit(ctx, v47);
-                            let v33 = C::emit(ctx, v28);
-                            let v34 = C::emit(ctx, v29);
-                            let v35 = C::emit(ctx, v30);
-                            let v36 = C::emit(ctx, v31);
-                            let v37 = C::value_regs_get(ctx, v32, 0x0);
-                            let v38 = C::value_regs_get(ctx, v32, 0x1);
-                            let v53 = MultiReg::Three {
-                                a: v48,
-                                b: v37,
-                                c: v38,
-                            };
-                            // Rule at src/prelude_lower.isle line 695.
-                            return v53;
-                        }
-                        _ => {}
-                    }
-                }
-                _ => {}
-            }
-        }
-        &ProducesFlags::ProducesFlagsReturnsReg {
-            inst: ref v40,
-            result: v41,
-        } => {
-            match arg1 {
-                &ConsumesAndProducesFlags::SideEffect { inst: ref v3 } => {
-                    match arg2 {
-                        &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v5 } => {
-                            let v42 = C::emit(ctx, v40);
-                            let v7 = C::emit(ctx, v3);
-                            let v8 = C::emit(ctx, v5);
-                            let v43 = MultiReg::One { a: v41 };
-                            // Rule at src/prelude_lower.isle line 614.
-                            return v43;
-                        }
-                        &ConsumesFlags::ConsumesFlagsSideEffect2 {
-                            inst1: ref v10,
-                            inst2: ref v11,
-                        } => {
-                            let v42 = C::emit(ctx, v40);
-                            let v7 = C::emit(ctx, v3);
-                            let v12 = C::emit(ctx, v10);
-                            let v13 = C::emit(ctx, v11);
-                            let v43 = MultiReg::One { a: v41 };
-                            // Rule at src/prelude_lower.isle line 622.
-                            return v43;
-                        }
-                        &ConsumesFlags::ConsumesFlagsReturnsReg {
-                            inst: ref v14,
-                            result: v15,
-                        } => {
-                            let v42 = C::emit(ctx, v40);
-                            let v7 = C::emit(ctx, v3);
-                            let v16 = C::emit(ctx, v14);
-                            let v44 = MultiReg::Two { a: v41, b: v15 };
-                            // Rule at src/prelude_lower.isle line 631.
-                            return v44;
-                        }
-                        &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
-                            inst1: ref v18,
-                            inst2: ref v19,
-                            result: v20,
-                        } => {
-                            let v42 = C::emit(ctx, v40);
-                            let v7 = C::emit(ctx, v3);
-                            let v21 = C::emit(ctx, v18);
-                            let v22 = C::emit(ctx, v19);
-                            let v24 = C::value_regs_get(ctx, v20, 0x0);
-                            let v26 = C::value_regs_get(ctx, v20, 0x1);
-                            let v45 = MultiReg::Three {
-                                a: v41,
-                                b: v24,
-                                c: v26,
-                            };
-                            // Rule at src/prelude_lower.isle line 639.
-                            return v45;
-                        }
-                        &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
-                            inst1: ref v28,
-                            inst2: ref v29,
-                            inst3: ref v30,
-                            inst4: ref v31,
-                            result: v32,
-                        } => {
-                            let v42 = C::emit(ctx, v40);
-                            let v7 = C::emit(ctx, v3);
-                            let v33 = C::emit(ctx, v28);
-                            let v34 = C::emit(ctx, v29);
-                            let v35 = C::emit(ctx, v30);
-                            let v36 = C::emit(ctx, v31);
-                            let v37 = C::value_regs_get(ctx, v32, 0x0);
-                            let v38 = C::value_regs_get(ctx, v32, 0x1);
-                            let v46 = MultiReg::Three {
-                                a: v41,
-                                b: v37,
-                                c: v38,
-                            };
-                            // Rule at src/prelude_lower.isle line 648.
-                            return v46;
-                        }
-                        _ => {}
-                    }
-                }
-                &ConsumesAndProducesFlags::ReturnsReg {
-                    inst: ref v47,
-                    result: v48,
-                } => {
-                    match arg2 {
-                        &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v5 } => {
-                            let v42 = C::emit(ctx, v40);
-                            let v49 = C::emit(ctx, v47);
-                            let v8 = C::emit(ctx, v5);
-                            let v54 = MultiReg::Two { a: v41, b: v48 };
-                            // Rule at src/prelude_lower.isle line 708.
-                            return v54;
-                        }
-                        &ConsumesFlags::ConsumesFlagsSideEffect2 {
-                            inst1: ref v10,
-                            inst2: ref v11,
-                        } => {
-                            let v42 = C::emit(ctx, v40);
-                            let v49 = C::emit(ctx, v47);
-                            let v12 = C::emit(ctx, v10);
-                            let v13 = C::emit(ctx, v11);
-                            let v54 = MultiReg::Two { a: v41, b: v48 };
-                            // Rule at src/prelude_lower.isle line 716.
-                            return v54;
-                        }
-                        &ConsumesFlags::ConsumesFlagsReturnsReg {
-                            inst: ref v14,
-                            result: v15,
-                        } => {
-                            let v42 = C::emit(ctx, v40);
-                            let v49 = C::emit(ctx, v47);
-                            let v16 = C::emit(ctx, v14);
-                            let v55 = MultiReg::Three {
-                                a: v41,
-                                b: v48,
-                                c: v15,
-                            };
-                            // Rule at src/prelude_lower.isle line 725.
-                            return v55;
-                        }
-                        &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
-                            inst1: ref v18,
-                            inst2: ref v19,
-                            result: v20,
-                        } => {
-                            let v42 = C::emit(ctx, v40);
-                            let v49 = C::emit(ctx, v47);
-                            let v21 = C::emit(ctx, v18);
-                            let v22 = C::emit(ctx, v19);
-                            let v24 = C::value_regs_get(ctx, v20, 0x0);
-                            let v26 = C::value_regs_get(ctx, v20, 0x1);
-                            let v56 = MultiReg::Four {
-                                a: v41,
-                                b: v48,
-                                c: v24,
-                                d: v26,
-                            };
-                            // Rule at src/prelude_lower.isle line 733.
-                            return v56;
-                        }
-                        &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
-                            inst1: ref v28,
-                            inst2: ref v29,
-                            inst3: ref v30,
-                            inst4: ref v31,
-                            result: v32,
-                        } => {
-                            let v42 = C::emit(ctx, v40);
-                            let v49 = C::emit(ctx, v47);
-                            let v33 = C::emit(ctx, v28);
-                            let v34 = C::emit(ctx, v29);
-                            let v35 = C::emit(ctx, v30);
-                            let v36 = C::emit(ctx, v31);
-                            let v37 = C::value_regs_get(ctx, v32, 0x0);
-                            let v38 = C::value_regs_get(ctx, v32, 0x1);
-                            let v57 = MultiReg::Four {
-                                a: v41,
-                                b: v48,
-                                c: v37,
-                                d: v38,
-                            };
-                            // Rule at src/prelude_lower.isle line 742.
-                            return v57;
-                        }
-                        _ => {}
-                    }
-                }
-                _ => {}
-            }
-        }
-        &ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
-            inst: ref v58,
-            result: v59,
-        } => {
-            if let &ConsumesAndProducesFlags::ReturnsReg {
-                inst: ref v47,
-                result: v48,
-            } = arg1
-            {
-                match arg2 {
-                    &ConsumesFlags::ConsumesFlagsSideEffect { inst: ref v5 } => {
-                        let v60 = C::emit(ctx, v58);
-                        let v49 = C::emit(ctx, v47);
-                        let v8 = C::emit(ctx, v5);
-                        let v61 = MultiReg::Two { a: v59, b: v48 };
-                        // Rule at src/prelude_lower.isle line 754.
-                        return v61;
-                    }
-                    &ConsumesFlags::ConsumesFlagsSideEffect2 {
-                        inst1: ref v10,
-                        inst2: ref v11,
-                    } => {
-                        let v60 = C::emit(ctx, v58);
-                        let v49 = C::emit(ctx, v47);
-                        let v12 = C::emit(ctx, v10);
-                        let v13 = C::emit(ctx, v11);
-                        let v61 = MultiReg::Two { a: v59, b: v48 };
-                        // Rule at src/prelude_lower.isle line 762.
-                        return v61;
-                    }
-                    &ConsumesFlags::ConsumesFlagsReturnsResultWithProducer {
-                        inst: ref v63,
-                        result: v64,
-                    } => {
-                        let v60 = C::emit(ctx, v58);
-                        let v49 = C::emit(ctx, v47);
-                        let v65 = C::emit(ctx, v63);
-                        let v66 = MultiReg::Three {
-                            a: v59,
-                            b: v48,
-                            c: v64,
-                        };
-                        // Rule at src/prelude_lower.isle line 779.
-                        return v66;
-                    }
-                    &ConsumesFlags::ConsumesFlagsReturnsReg {
-                        inst: ref v14,
-                        result: v15,
-                    } => {
-                        let v60 = C::emit(ctx, v58);
-                        let v49 = C::emit(ctx, v47);
-                        let v16 = C::emit(ctx, v14);
-                        let v62 = MultiReg::Three {
-                            a: v59,
-                            b: v48,
-                            c: v15,
-                        };
-                        // Rule at src/prelude_lower.isle line 771.
-                        return v62;
-                    }
-                    &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
-                        inst1: ref v18,
-                        inst2: ref v19,
-                        result: v20,
-                    } => {
-                        let v60 = C::emit(ctx, v58);
-                        let v49 = C::emit(ctx, v47);
-                        let v21 = C::emit(ctx, v18);
-                        let v22 = C::emit(ctx, v19);
-                        let v24 = C::value_regs_get(ctx, v20, 0x0);
-                        let v26 = C::value_regs_get(ctx, v20, 0x1);
-                        let v67 = MultiReg::Four {
-                            a: v59,
-                            b: v48,
-                            c: v24,
-                            d: v26,
-                        };
-                        // Rule at src/prelude_lower.isle line 787.
-                        return v67;
-                    }
-                    &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
-                        inst1: ref v28,
-                        inst2: ref v29,
-                        inst3: ref v30,
-                        inst4: ref v31,
-                        result: v32,
-                    } => {
-                        let v60 = C::emit(ctx, v58);
-                        let v49 = C::emit(ctx, v47);
-                        let v33 = C::emit(ctx, v28);
-                        let v34 = C::emit(ctx, v29);
-                        let v35 = C::emit(ctx, v30);
-                        let v36 = C::emit(ctx, v31);
-                        let v37 = C::value_regs_get(ctx, v32, 0x0);
-                        let v38 = C::value_regs_get(ctx, v32, 0x1);
-                        let v68 = MultiReg::Four {
-                            a: v59,
-                            b: v48,
-                            c: v37,
-                            d: v38,
-                        };
-                        // Rule at src/prelude_lower.isle line 796.
-                        return v68;
-                    }
-                    _ => {}
-                }
-            }
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "with_flags_chained", "src/prelude_lower.isle line 564"
-    )
-}
-
-// Generated as internal constructor for term lower_return.
-pub fn constructor_lower_return<C: Context>(ctx: &mut C, arg0: ValueSlice) -> InstOutput {
-    let v1 = C::gen_return(ctx, arg0);
-    let v2 = C::output_none(ctx);
-    // Rule at src/prelude_lower.isle line 996.
-    return v2;
-}
-
-// Generated as internal constructor for term operand_size_bits.
-pub fn constructor_operand_size_bits<C: Context>(ctx: &mut C, arg0: &OperandSize) -> u16 {
-    match arg0 {
-        &OperandSize::Size8 => {
-            // Rule at src/isa/x64/inst.isle line 734.
-            return 0x8;
-        }
-        &OperandSize::Size16 => {
-            // Rule at src/isa/x64/inst.isle line 735.
-            return 0x10;
-        }
-        &OperandSize::Size32 => {
-            // Rule at src/isa/x64/inst.isle line 736.
-            return 0x20;
-        }
-        &OperandSize::Size64 => {
-            // Rule at src/isa/x64/inst.isle line 737.
-            return 0x40;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "operand_size_bits", "src/isa/x64/inst.isle line 733"
-    )
-}
-
-// Generated as internal constructor for term reg_mem_to_reg_mem_imm.
-pub fn constructor_reg_mem_to_reg_mem_imm<C: Context>(ctx: &mut C, arg0: &RegMem) -> RegMemImm {
-    match arg0 {
-        &RegMem::Reg { reg: v1 } => {
-            let v2 = RegMemImm::Reg { reg: v1 };
-            // Rule at src/isa/x64/inst.isle line 981.
-            return v2;
-        }
-        &RegMem::Mem { addr: ref v3 } => {
-            let v4 = RegMemImm::Mem { addr: v3.clone() };
-            // Rule at src/isa/x64/inst.isle line 983.
-            return v4;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "reg_mem_to_reg_mem_imm", "src/isa/x64/inst.isle line 980"
-    )
-}
-
-// Generated as internal constructor for term to_amode.
-pub fn constructor_to_amode<C: Context>(
-    ctx: &mut C,
-    arg0: MemFlags,
-    arg1: Value,
-    arg2: Offset32,
-) -> Amode {
-    let v6 = C::def_inst(ctx, arg1);
-    if let Some(v7) = v6 {
-        let v8 = &C::inst_data(ctx, v7);
-        if let &InstructionData::Binary {
-            opcode: ref v9,
-            args: ref v10,
-        } = v8
-        {
-            if let &Opcode::Iadd = v9 {
-                let v11 = C::unpack_value_array_2(ctx, v10);
-                let v14 = &constructor_to_amode_add(ctx, arg0, v11.0, v11.1, arg2);
-                // Rule at src/isa/x64/inst.isle line 1045.
-                return v14.clone();
-            }
-        }
-    }
-    let v4 = C::put_in_reg(ctx, arg1);
-    let v3 = C::offset32_to_u32(ctx, arg2);
-    let v5 = Amode::ImmReg {
-        simm32: v3,
-        base: v4,
-        flags: arg0,
-    };
-    // Rule at src/isa/x64/inst.isle line 1040.
-    return v5;
-}
-
-// Generated as internal constructor for term to_amode_add.
-pub fn constructor_to_amode_add<C: Context>(
-    ctx: &mut C,
-    arg0: MemFlags,
-    arg1: Value,
-    arg2: Value,
-    arg3: Offset32,
-) -> Amode {
-    let v30 = C::def_inst(ctx, arg1);
-    if let Some(v31) = v30 {
-        let v32 = &C::inst_data(ctx, v31);
-        if let &InstructionData::UnaryImm {
-            opcode: ref v71,
-            imm: v72,
-        } = v32
-        {
-            if let &Opcode::Iconst = v71 {
-                let v73 = C::simm32(ctx, v72);
-                if let Some(v74) = v73 {
-                    let v4 = C::offset32_to_u32(ctx, arg3);
-                    let v75 = C::s32_add_fallible(ctx, v4, v74);
-                    if let Some(v76) = v75 {
-                        let v77 = C::u32_to_offset32(ctx, v76);
-                        let v78 = &constructor_to_amode(ctx, arg0, arg2, v77);
-                        // Rule at src/isa/x64/inst.isle line 1084.
-                        return v78.clone();
-                    }
-                }
-            }
-        }
-    }
-    let v9 = C::def_inst(ctx, arg2);
-    if let Some(v10) = v9 {
-        let v11 = &C::inst_data(ctx, v10);
-        match v11 {
-            &InstructionData::Binary {
-                opcode: ref v12,
-                args: ref v13,
-            } => {
-                if let &Opcode::Iadd = v12 {
-                    let v14 = C::unpack_value_array_2(ctx, v13);
-                    let v17 = C::def_inst(ctx, v14.1);
-                    if let Some(v18) = v17 {
-                        let v19 = &C::inst_data(ctx, v18);
-                        if let &InstructionData::UnaryImm {
-                            opcode: ref v20,
-                            imm: v21,
-                        } = v19
-                        {
-                            if let &Opcode::Iconst = v20 {
-                                let v57 = C::simm32(ctx, v21);
-                                if let Some(v58) = v57 {
-                                    let v4 = C::offset32_to_u32(ctx, arg3);
-                                    let v59 = C::s32_add_fallible(ctx, v4, v58);
-                                    if let Some(v60) = v59 {
-                                        let v61 = C::u32_to_offset32(ctx, v60);
-                                        let v62 =
-                                            &constructor_to_amode_add(ctx, arg0, arg1, v14.0, v61);
-                                        // Rule at src/isa/x64/inst.isle line 1078.
-                                        return v62.clone();
-                                    }
-                                }
-                            }
-                        }
-                    }
-                }
-            }
-            &InstructionData::UnaryImm {
-                opcode: ref v63,
-                imm: v64,
-            } => {
-                if let &Opcode::Iconst = v63 {
-                    let v65 = C::simm32(ctx, v64);
-                    if let Some(v66) = v65 {
-                        let v4 = C::offset32_to_u32(ctx, arg3);
-                        let v67 = C::s32_add_fallible(ctx, v4, v66);
-                        if let Some(v68) = v67 {
-                            let v69 = C::u32_to_offset32(ctx, v68);
-                            let v70 = &constructor_to_amode(ctx, arg0, arg1, v69);
-                            // Rule at src/isa/x64/inst.isle line 1081.
-                            return v70.clone();
-                        }
-                    }
-                }
-            }
-            _ => {}
-        }
-    }
-    if let Some(v31) = v30 {
-        let v32 = &C::inst_data(ctx, v31);
-        if let &InstructionData::Binary {
-            opcode: ref v33,
-            args: ref v34,
-        } = v32
-        {
-            match v33 {
-                &Opcode::Iadd => {
-                    let v35 = C::unpack_value_array_2(ctx, v34);
-                    let v38 = C::def_inst(ctx, v35.1);
-                    if let Some(v39) = v38 {
-                        let v40 = &C::inst_data(ctx, v39);
-                        if let &InstructionData::UnaryImm {
-                            opcode: ref v41,
-                            imm: v42,
-                        } = v40
-                        {
-                            if let &Opcode::Iconst = v41 {
-                                let v51 = C::simm32(ctx, v42);
-                                if let Some(v52) = v51 {
-                                    let v4 = C::offset32_to_u32(ctx, arg3);
-                                    let v53 = C::s32_add_fallible(ctx, v4, v52);
-                                    if let Some(v54) = v53 {
-                                        let v55 = C::u32_to_offset32(ctx, v54);
-                                        let v56 =
-                                            &constructor_to_amode_add(ctx, arg0, v35.0, arg2, v55);
-                                        // Rule at src/isa/x64/inst.isle line 1075.
-                                        return v56.clone();
-                                    }
-                                }
-                            }
-                        }
-                    }
-                }
-                &Opcode::Ishl => {
-                    let v35 = C::unpack_value_array_2(ctx, v34);
-                    let v38 = C::def_inst(ctx, v35.1);
-                    if let Some(v39) = v38 {
-                        let v40 = &C::inst_data(ctx, v39);
-                        if let &InstructionData::UnaryImm {
-                            opcode: ref v41,
-                            imm: v42,
-                        } = v40
-                        {
-                            if let &Opcode::Iconst = v41 {
-                                let v43 = C::uimm8(ctx, v42);
-                                if let Some(v44) = v43 {
-                                    let v45 = C::u8_as_u32(ctx, v44);
-                                    let v46 = C::u32_lteq(ctx, v45, 0x3);
-                                    if let Some(v47) = v46 {
-                                        let v48 = constructor_put_in_gpr(ctx, arg2);
-                                        let v49 = constructor_put_in_gpr(ctx, v35.0);
-                                        let v4 = C::offset32_to_u32(ctx, arg3);
-                                        let v50 = Amode::ImmRegRegShift {
-                                            simm32: v4,
-                                            base: v48,
-                                            index: v49,
-                                            shift: v44,
-                                            flags: arg0,
-                                        };
-                                        // Rule at src/isa/x64/inst.isle line 1062.
-                                        return v50;
-                                    }
-                                }
-                            }
-                        }
-                    }
-                }
-                _ => {}
-            }
-        }
-    }
-    if let Some(v10) = v9 {
-        let v11 = &C::inst_data(ctx, v10);
-        if let &InstructionData::Binary {
-            opcode: ref v12,
-            args: ref v13,
-        } = v11
-        {
-            if let &Opcode::Ishl = v12 {
-                let v14 = C::unpack_value_array_2(ctx, v13);
-                let v17 = C::def_inst(ctx, v14.1);
-                if let Some(v18) = v17 {
-                    let v19 = &C::inst_data(ctx, v18);
-                    if let &InstructionData::UnaryImm {
-                        opcode: ref v20,
-                        imm: v21,
-                    } = v19
-                    {
-                        if let &Opcode::Iconst = v20 {
-                            let v22 = C::uimm8(ctx, v21);
-                            if let Some(v23) = v22 {
-                                let v24 = C::u8_as_u32(ctx, v23);
-                                let v26 = C::u32_lteq(ctx, v24, 0x3);
-                                if let Some(v27) = v26 {
-                                    let v5 = constructor_put_in_gpr(ctx, arg1);
-                                    let v28 = constructor_put_in_gpr(ctx, v14.0);
-                                    let v4 = C::offset32_to_u32(ctx, arg3);
-                                    let v29 = Amode::ImmRegRegShift {
-                                        simm32: v4,
-                                        base: v5,
-                                        index: v28,
-                                        shift: v23,
-                                        flags: arg0,
-                                    };
-                                    // Rule at src/isa/x64/inst.isle line 1059.
-                                    return v29;
-                                }
-                            }
-                        }
-                    }
-                }
-            }
-        }
-    }
-    let v5 = constructor_put_in_gpr(ctx, arg1);
-    let v6 = constructor_put_in_gpr(ctx, arg2);
-    let v4 = C::offset32_to_u32(ctx, arg3);
-    let v8 = Amode::ImmRegRegShift {
-        simm32: v4,
-        base: v5,
-        index: v6,
-        shift: 0x0,
-        flags: arg0,
-    };
-    // Rule at src/isa/x64/inst.isle line 1054.
-    return v8;
-}
-
-// Generated as internal constructor for term put_masked_in_imm8_gpr.
-pub fn constructor_put_masked_in_imm8_gpr<C: Context>(
-    ctx: &mut C,
-    arg0: Value,
-    arg1: Type,
-) -> Imm8Gpr {
-    let v1 = C::def_inst(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v3 = &C::inst_data(ctx, v2);
-        if let &InstructionData::UnaryImm {
-            opcode: ref v4,
-            imm: v5,
-        } = v3
-        {
-            if let &Opcode::Iconst = v4 {
-                let v6 = C::u64_from_imm64(ctx, v5);
-                let v8 = &C::const_to_type_masked_imm8(ctx, v6, arg1);
-                // Rule at src/isa/x64/inst.isle line 1120.
-                return v8.clone();
-            }
-        }
-    }
-    let v9 = C::fits_in_16(ctx, arg1);
-    if let Some(v10) = v9 {
-        let v12 = C::put_in_regs(ctx, arg0);
-        let v14 = constructor_value_regs_get_gpr(ctx, v12, 0x0);
-        let v15 = C::shift_mask(ctx, v10);
-        let v16 = C::u8_as_u32(ctx, v15);
-        let v17 = RegMemImm::Imm { simm32: v16 };
-        let v18 = &C::gpr_mem_imm_new(ctx, &v17);
-        let v19 = constructor_x64_and(ctx, I64, v14, v18);
-        let v20 = &C::gpr_to_imm8_gpr(ctx, v19);
-        // Rule at src/isa/x64/inst.isle line 1122.
-        return v20.clone();
-    }
-    let v12 = C::put_in_regs(ctx, arg0);
-    let v14 = constructor_value_regs_get_gpr(ctx, v12, 0x0);
-    let v21 = &C::gpr_to_imm8_gpr(ctx, v14);
-    // Rule at src/isa/x64/inst.isle line 1124.
-    return v21.clone();
-}
-
-// Generated as internal constructor for term reg_to_gpr_mem_imm.
-pub fn constructor_reg_to_gpr_mem_imm<C: Context>(ctx: &mut C, arg0: Reg) -> GprMemImm {
-    let v1 = C::gpr_new(ctx, arg0);
-    let v2 = &C::gpr_to_gpr_mem_imm(ctx, v1);
-    // Rule at src/isa/x64/inst.isle line 1532.
-    return v2.clone();
-}
-
-// Generated as internal constructor for term put_in_gpr.
-pub fn constructor_put_in_gpr<C: Context>(ctx: &mut C, arg0: Value) -> Gpr {
-    let v1 = C::put_in_reg(ctx, arg0);
-    let v2 = C::gpr_new(ctx, v1);
-    // Rule at src/isa/x64/inst.isle line 1539.
-    return v2;
-}
-
-// Generated as internal constructor for term put_in_gpr_mem.
-pub fn constructor_put_in_gpr_mem<C: Context>(ctx: &mut C, arg0: Value) -> GprMem {
-    let v1 = &C::put_in_reg_mem(ctx, arg0);
-    let v2 = &C::reg_mem_to_gpr_mem(ctx, v1);
-    // Rule at src/isa/x64/inst.isle line 1546.
-    return v2.clone();
-}
-
-// Generated as internal constructor for term put_in_gpr_mem_imm.
-pub fn constructor_put_in_gpr_mem_imm<C: Context>(ctx: &mut C, arg0: Value) -> GprMemImm {
-    let v1 = &C::put_in_reg_mem_imm(ctx, arg0);
-    let v2 = &C::gpr_mem_imm_new(ctx, v1);
-    // Rule at src/isa/x64/inst.isle line 1553.
-    return v2.clone();
-}
-
-// Generated as internal constructor for term put_in_xmm.
-pub fn constructor_put_in_xmm<C: Context>(ctx: &mut C, arg0: Value) -> Xmm {
-    let v1 = C::put_in_reg(ctx, arg0);
-    let v2 = C::xmm_new(ctx, v1);
-    // Rule at src/isa/x64/inst.isle line 1560.
-    return v2;
-}
-
-// Generated as internal constructor for term output_gpr.
-pub fn constructor_output_gpr<C: Context>(ctx: &mut C, arg0: Gpr) -> InstOutput {
-    let v1 = C::gpr_to_reg(ctx, arg0);
-    let v2 = constructor_output_reg(ctx, v1);
-    // Rule at src/isa/x64/inst.isle line 1577.
-    return v2;
-}
-
-// Generated as internal constructor for term value_gprs.
-pub fn constructor_value_gprs<C: Context>(ctx: &mut C, arg0: Gpr, arg1: Gpr) -> ValueRegs {
-    let v2 = C::gpr_to_reg(ctx, arg0);
-    let v3 = C::gpr_to_reg(ctx, arg1);
-    let v4 = C::value_regs(ctx, v2, v3);
-    // Rule at src/isa/x64/inst.isle line 1582.
-    return v4;
-}
-
-// Generated as internal constructor for term output_xmm.
-pub fn constructor_output_xmm<C: Context>(ctx: &mut C, arg0: Xmm) -> InstOutput {
-    let v1 = C::xmm_to_reg(ctx, arg0);
-    let v2 = constructor_output_reg(ctx, v1);
-    // Rule at src/isa/x64/inst.isle line 1587.
-    return v2;
-}
-
-// Generated as internal constructor for term value_regs_get_gpr.
-pub fn constructor_value_regs_get_gpr<C: Context>(
-    ctx: &mut C,
-    arg0: ValueRegs,
-    arg1: usize,
-) -> Gpr {
-    let v2 = C::value_regs_get(ctx, arg0, arg1);
-    let v3 = C::gpr_new(ctx, v2);
-    // Rule at src/isa/x64/inst.isle line 1594.
-    return v3;
-}
-
-// Generated as internal constructor for term lo_gpr.
-pub fn constructor_lo_gpr<C: Context>(ctx: &mut C, arg0: Value) -> Gpr {
-    let v1 = constructor_lo_reg(ctx, arg0);
-    let v2 = C::gpr_new(ctx, v1);
-    // Rule at src/isa/x64/inst.isle line 1607.
-    return v2;
-}
-
-// Generated as internal constructor for term sink_load_to_gpr_mem_imm.
-pub fn constructor_sink_load_to_gpr_mem_imm<C: Context>(
-    ctx: &mut C,
-    arg0: &SinkableLoad,
-) -> GprMemImm {
-    let v1 = &constructor_sink_load_to_reg_mem_imm(ctx, arg0);
-    let v2 = &C::gpr_mem_imm_new(ctx, v1);
-    // Rule at src/isa/x64/inst.isle line 1748.
-    return v2.clone();
-}
-
-// Generated as internal constructor for term sink_load_to_xmm_mem.
-pub fn constructor_sink_load_to_xmm_mem<C: Context>(ctx: &mut C, arg0: &SinkableLoad) -> XmmMem {
-    let v1 = &constructor_sink_load_to_reg_mem(ctx, arg0);
-    let v2 = &C::reg_mem_to_xmm_mem(ctx, v1);
-    // Rule at src/isa/x64/inst.isle line 1752.
-    return v2.clone();
-}
-
-// Generated as internal constructor for term sink_load_to_reg_mem.
-pub fn constructor_sink_load_to_reg_mem<C: Context>(ctx: &mut C, arg0: &SinkableLoad) -> RegMem {
-    let v1 = &C::sink_load(ctx, arg0);
-    let v2 = RegMem::Mem { addr: v1.clone() };
-    // Rule at src/isa/x64/inst.isle line 1756.
-    return v2;
-}
-
-// Generated as internal constructor for term sink_load_to_gpr_mem.
-pub fn constructor_sink_load_to_gpr_mem<C: Context>(ctx: &mut C, arg0: &SinkableLoad) -> GprMem {
-    let v1 = &C::sink_load(ctx, arg0);
-    let v2 = RegMem::Mem { addr: v1.clone() };
-    let v3 = &C::reg_mem_to_gpr_mem(ctx, &v2);
-    // Rule at src/isa/x64/inst.isle line 1759.
-    return v3.clone();
-}
-
-// Generated as internal constructor for term sink_load_to_reg_mem_imm.
-pub fn constructor_sink_load_to_reg_mem_imm<C: Context>(
-    ctx: &mut C,
-    arg0: &SinkableLoad,
-) -> RegMemImm {
-    let v1 = &C::sink_load(ctx, arg0);
-    let v2 = RegMemImm::Mem { addr: v1.clone() };
-    // Rule at src/isa/x64/inst.isle line 1762.
-    return v2;
-}
-
-// Generated as internal constructor for term xmm_uninit_value.
-pub fn constructor_xmm_uninit_value<C: Context>(ctx: &mut C) -> Xmm {
-    let v0 = C::temp_writable_xmm(ctx);
-    let v1 = MInst::XmmUninitializedValue { dst: v0 };
-    let v2 = C::emit(ctx, &v1);
-    let v3 = C::writable_xmm_to_xmm(ctx, v0);
-    // Rule at src/isa/x64/inst.isle line 1774.
-    return v3;
-}
-
-// Generated as internal constructor for term load_ext_name.
-pub fn constructor_load_ext_name<C: Context>(
-    ctx: &mut C,
-    arg0: ExternalName,
-    arg1: i64,
-    arg2: RelocDistance,
-) -> Reg {
-    let v3 = C::temp_writable_gpr(ctx);
-    let v4 = C::writable_gpr_to_reg(ctx, v3);
-    let v5 = C::box_external_name(ctx, arg0);
-    let v6 = MInst::LoadExtName {
-        dst: v4,
-        name: v5,
-        offset: arg1,
-        distance: arg2,
-    };
-    let v7 = C::emit(ctx, &v6);
-    let v8 = constructor_writable_gpr_to_r_reg(ctx, v3);
-    // Rule at src/isa/x64/inst.isle line 1781.
-    return v8;
-}
-
-// Generated as internal constructor for term mov64_mr.
-pub fn constructor_mov64_mr<C: Context>(ctx: &mut C, arg0: &SyntheticAmode) -> Reg {
-    let v1 = C::temp_writable_gpr(ctx);
-    let v2 = MInst::Mov64MR {
-        src: arg0.clone(),
-        dst: v1,
-    };
-    let v3 = C::emit(ctx, &v2);
-    let v4 = constructor_writable_gpr_to_r_reg(ctx, v1);
-    // Rule at src/isa/x64/inst.isle line 1788.
-    return v4;
-}
-
-// Generated as internal constructor for term alu_rmi_r.
-pub fn constructor_alu_rmi_r<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &AluRmiROpcode,
-    arg2: Gpr,
-    arg3: &GprMemImm,
-) -> Gpr {
-    let v4 = C::temp_writable_gpr(ctx);
-    let v5 = &C::operand_size_of_type_32_64(ctx, arg0);
-    let v6 = MInst::AluRmiR {
-        size: v5.clone(),
-        op: arg1.clone(),
-        src1: arg2,
-        src2: arg3.clone(),
-        dst: v4,
-    };
-    let v7 = C::emit(ctx, &v6);
-    let v8 = C::writable_gpr_to_gpr(ctx, v4);
-    // Rule at src/isa/x64/inst.isle line 1795.
-    return v8;
-}
-
-// Generated as internal constructor for term alu_rm_r_vex.
-pub fn constructor_alu_rm_r_vex<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &AluRmROpcode,
-    arg2: Gpr,
-    arg3: Gpr,
-) -> Gpr {
-    let v4 = C::temp_writable_gpr(ctx);
-    let v5 = &C::operand_size_of_type_32_64(ctx, arg0);
-    let v6 = MInst::AluRmRVex {
-        size: v5.clone(),
-        op: arg1.clone(),
-        src1: arg2,
-        src2: arg3,
-        dst: v4,
-    };
-    let v7 = C::emit(ctx, &v6);
-    let v8 = C::writable_gpr_to_gpr(ctx, v4);
-    // Rule at src/isa/x64/inst.isle line 1803.
-    return v8;
-}
-
-// Generated as internal constructor for term xmm_rm_r.
-pub fn constructor_xmm_rm_r<C: Context>(
-    ctx: &mut C,
-    arg0: &SseOpcode,
-    arg1: Xmm,
-    arg2: &XmmMemAligned,
-) -> Xmm {
-    let v3 = C::temp_writable_xmm(ctx);
-    let v4 = MInst::XmmRmR {
-        op: arg0.clone(),
-        src1: arg1,
-        src2: arg2.clone(),
-        dst: v3,
-    };
-    let v5 = C::emit(ctx, &v4);
-    let v6 = C::writable_xmm_to_xmm(ctx, v3);
-    // Rule at src/isa/x64/inst.isle line 1811.
-    return v6;
-}
-
-// Generated as internal constructor for term xmm_rm_r_unaligned.
-pub fn constructor_xmm_rm_r_unaligned<C: Context>(
-    ctx: &mut C,
-    arg0: &SseOpcode,
-    arg1: Xmm,
-    arg2: &XmmMem,
-) -> Xmm {
-    let v3 = C::temp_writable_xmm(ctx);
-    let v4 = MInst::XmmRmRUnaligned {
-        op: arg0.clone(),
-        src1: arg1,
-        src2: arg2.clone(),
-        dst: v3,
-    };
-    let v5 = C::emit(ctx, &v4);
-    let v6 = C::writable_xmm_to_xmm(ctx, v3);
-    // Rule at src/isa/x64/inst.isle line 1818.
-    return v6;
-}
-
-// Generated as internal constructor for term xmm_rm_r_blend.
-pub fn constructor_xmm_rm_r_blend<C: Context>(
-    ctx: &mut C,
-    arg0: &SseOpcode,
-    arg1: Xmm,
-    arg2: &XmmMemAligned,
-    arg3: Xmm,
-) -> Xmm {
-    let v4 = C::temp_writable_xmm(ctx);
-    let v5 = MInst::XmmRmRBlend {
-        op: arg0.clone(),
-        src1: arg1,
-        src2: arg2.clone(),
-        mask: arg3,
-        dst: v4,
-    };
-    let v6 = C::emit(ctx, &v5);
-    let v7 = C::writable_xmm_to_xmm(ctx, v4);
-    // Rule at src/isa/x64/inst.isle line 1825.
-    return v7;
-}
-
-// Generated as internal constructor for term xmm_rmr_blend_vex.
-pub fn constructor_xmm_rmr_blend_vex<C: Context>(
-    ctx: &mut C,
-    arg0: &AvxOpcode,
-    arg1: Xmm,
-    arg2: &XmmMem,
-    arg3: Xmm,
-) -> Xmm {
-    let v4 = C::temp_writable_xmm(ctx);
-    let v5 = MInst::XmmRmRBlendVex {
-        op: arg0.clone(),
-        src1: arg1,
-        src2: arg2.clone(),
-        mask: arg3,
-        dst: v4,
-    };
-    let v6 = C::emit(ctx, &v5);
-    let v7 = C::writable_xmm_to_xmm(ctx, v4);
-    // Rule at src/isa/x64/inst.isle line 1832.
-    return v7;
-}
-
-// Generated as internal constructor for term xmm_unary_rm_r_vex.
-pub fn constructor_xmm_unary_rm_r_vex<C: Context>(
-    ctx: &mut C,
-    arg0: &AvxOpcode,
-    arg1: &XmmMem,
-) -> Xmm {
-    let v2 = C::temp_writable_xmm(ctx);
-    let v3 = MInst::XmmUnaryRmRVex {
-        op: arg0.clone(),
-        src: arg1.clone(),
-        dst: v2,
-    };
-    let v4 = C::emit(ctx, &v3);
-    let v5 = C::writable_xmm_to_xmm(ctx, v2);
-    // Rule at src/isa/x64/inst.isle line 1839.
-    return v5;
-}
-
-// Generated as internal constructor for term xmm_unary_rm_r_imm_vex.
-pub fn constructor_xmm_unary_rm_r_imm_vex<C: Context>(
-    ctx: &mut C,
-    arg0: &AvxOpcode,
-    arg1: &XmmMem,
-    arg2: u8,
-) -> Xmm {
-    let v3 = C::temp_writable_xmm(ctx);
-    let v4 = MInst::XmmUnaryRmRImmVex {
-        op: arg0.clone(),
-        src: arg1.clone(),
-        dst: v3,
-        imm: arg2,
-    };
-    let v5 = C::emit(ctx, &v4);
-    let v6 = C::writable_xmm_to_xmm(ctx, v3);
-    // Rule at src/isa/x64/inst.isle line 1846.
-    return v6;
-}
-
-// Generated as internal constructor for term xmm_rm_r_imm.
-pub fn constructor_xmm_rm_r_imm<C: Context>(
-    ctx: &mut C,
-    arg0: &SseOpcode,
-    arg1: Reg,
-    arg2: &RegMem,
-    arg3: u8,
-    arg4: &OperandSize,
-) -> Xmm {
-    let v5 = C::temp_writable_xmm(ctx);
-    let v6 = C::writable_xmm_to_reg(ctx, v5);
-    let v7 = MInst::XmmRmRImm {
-        op: arg0.clone(),
-        src1: arg1,
-        src2: arg2.clone(),
-        dst: v6,
-        imm: arg3,
-        size: arg4.clone(),
-    };
-    let v8 = C::emit(ctx, &v7);
-    let v9 = C::writable_xmm_to_xmm(ctx, v5);
-    // Rule at src/isa/x64/inst.isle line 1853.
-    return v9;
-}
-
-// Generated as internal constructor for term xmm_vex_pinsr.
-pub fn constructor_xmm_vex_pinsr<C: Context>(
-    ctx: &mut C,
-    arg0: &AvxOpcode,
-    arg1: Xmm,
-    arg2: &GprMem,
-    arg3: u8,
-) -> Xmm {
-    let v4 = C::temp_writable_xmm(ctx);
-    let v5 = MInst::XmmVexPinsr {
-        op: arg0.clone(),
-        src1: arg1,
-        src2: arg2.clone(),
-        dst: v4,
-        imm: arg3,
-    };
-    let v6 = C::emit(ctx, &v5);
-    let v7 = C::writable_xmm_to_xmm(ctx, v4);
-    // Rule at src/isa/x64/inst.isle line 1865.
-    return v7;
-}
-
-// Generated as internal constructor for term xmm_unary_rm_r_imm.
-pub fn constructor_xmm_unary_rm_r_imm<C: Context>(
-    ctx: &mut C,
-    arg0: &SseOpcode,
-    arg1: &XmmMemAligned,
-    arg2: u8,
-) -> Xmm {
-    let v3 = C::temp_writable_xmm(ctx);
-    let v4 = MInst::XmmUnaryRmRImm {
-        op: arg0.clone(),
-        src: arg1.clone(),
-        imm: arg2,
-        dst: v3,
-    };
-    let v5 = C::emit(ctx, &v4);
-    let v6 = C::writable_xmm_to_xmm(ctx, v3);
-    // Rule at src/isa/x64/inst.isle line 1872.
-    return v6;
-}
-
-// Generated as internal constructor for term xmm_unary_rm_r.
-pub fn constructor_xmm_unary_rm_r<C: Context>(
-    ctx: &mut C,
-    arg0: &SseOpcode,
-    arg1: &XmmMemAligned,
-) -> Xmm {
-    let v2 = C::temp_writable_xmm(ctx);
-    let v3 = MInst::XmmUnaryRmR {
-        op: arg0.clone(),
-        src: arg1.clone(),
-        dst: v2,
-    };
-    let v4 = C::emit(ctx, &v3);
-    let v5 = C::writable_xmm_to_xmm(ctx, v2);
-    // Rule at src/isa/x64/inst.isle line 1879.
-    return v5;
-}
-
-// Generated as internal constructor for term xmm_unary_rm_r_unaligned.
-pub fn constructor_xmm_unary_rm_r_unaligned<C: Context>(
-    ctx: &mut C,
-    arg0: &SseOpcode,
-    arg1: &XmmMem,
-) -> Xmm {
-    let v2 = C::temp_writable_xmm(ctx);
-    let v3 = MInst::XmmUnaryRmRUnaligned {
-        op: arg0.clone(),
-        src: arg1.clone(),
-        dst: v2,
-    };
-    let v4 = C::emit(ctx, &v3);
-    let v5 = C::writable_xmm_to_xmm(ctx, v2);
-    // Rule at src/isa/x64/inst.isle line 1886.
-    return v5;
-}
-
-// Generated as internal constructor for term xmm_unary_rm_r_evex.
-pub fn constructor_xmm_unary_rm_r_evex<C: Context>(
-    ctx: &mut C,
-    arg0: &Avx512Opcode,
-    arg1: &XmmMem,
-) -> Xmm {
-    let v2 = C::temp_writable_xmm(ctx);
-    let v3 = MInst::XmmUnaryRmREvex {
-        op: arg0.clone(),
-        src: arg1.clone(),
-        dst: v2,
-    };
-    let v4 = C::emit(ctx, &v3);
-    let v5 = C::writable_xmm_to_xmm(ctx, v2);
-    // Rule at src/isa/x64/inst.isle line 1893.
-    return v5;
-}
-
-// Generated as internal constructor for term xmm_rm_r_evex.
-pub fn constructor_xmm_rm_r_evex<C: Context>(
-    ctx: &mut C,
-    arg0: &Avx512Opcode,
-    arg1: Xmm,
-    arg2: &XmmMem,
-) -> Xmm {
-    let v3 = C::temp_writable_xmm(ctx);
-    let v4 = MInst::XmmRmREvex {
-        op: arg0.clone(),
-        src1: arg1,
-        src2: arg2.clone(),
-        dst: v3,
-    };
-    let v5 = C::emit(ctx, &v4);
-    let v6 = C::writable_xmm_to_xmm(ctx, v3);
-    // Rule at src/isa/x64/inst.isle line 1900.
-    return v6;
-}
-
-// Generated as internal constructor for term xmm_unary_rm_r_imm_evex.
-pub fn constructor_xmm_unary_rm_r_imm_evex<C: Context>(
-    ctx: &mut C,
-    arg0: &Avx512Opcode,
-    arg1: &XmmMem,
-    arg2: u8,
-) -> Xmm {
-    let v3 = C::temp_writable_xmm(ctx);
-    let v4 = MInst::XmmUnaryRmRImmEvex {
-        op: arg0.clone(),
-        src: arg1.clone(),
-        dst: v3,
-        imm: arg2,
-    };
-    let v5 = C::emit(ctx, &v4);
-    let v6 = C::writable_xmm_to_xmm(ctx, v3);
-    // Rule at src/isa/x64/inst.isle line 1910.
-    return v6;
-}
-
-// Generated as internal constructor for term xmm_rmi_xmm.
-pub fn constructor_xmm_rmi_xmm<C: Context>(
-    ctx: &mut C,
-    arg0: &SseOpcode,
-    arg1: Xmm,
-    arg2: &XmmMemAlignedImm,
-) -> Xmm {
-    let v3 = C::temp_writable_xmm(ctx);
-    let v4 = MInst::XmmRmiReg {
-        opcode: arg0.clone(),
-        src1: arg1,
-        src2: arg2.clone(),
-        dst: v3,
-    };
-    let v5 = C::emit(ctx, &v4);
-    let v6 = C::writable_xmm_to_xmm(ctx, v3);
-    // Rule at src/isa/x64/inst.isle line 1917.
-    return v6;
-}
-
-// Generated as internal constructor for term xmm_to_gpr_imm.
-pub fn constructor_xmm_to_gpr_imm<C: Context>(
-    ctx: &mut C,
-    arg0: &SseOpcode,
-    arg1: Xmm,
-    arg2: u8,
-) -> Gpr {
-    let v3 = C::temp_writable_gpr(ctx);
-    let v4 = MInst::XmmToGprImm {
-        op: arg0.clone(),
-        src: arg1,
-        dst: v3,
-        imm: arg2,
-    };
-    let v5 = C::emit(ctx, &v4);
-    let v6 = C::writable_gpr_to_gpr(ctx, v3);
-    // Rule at src/isa/x64/inst.isle line 1927.
-    return v6;
-}
-
-// Generated as internal constructor for term xmm_to_gpr_imm_vex.
-pub fn constructor_xmm_to_gpr_imm_vex<C: Context>(
-    ctx: &mut C,
-    arg0: &AvxOpcode,
-    arg1: Xmm,
-    arg2: u8,
-) -> Gpr {
-    let v3 = C::temp_writable_gpr(ctx);
-    let v4 = MInst::XmmToGprImmVex {
-        op: arg0.clone(),
-        src: arg1,
-        dst: v3,
-        imm: arg2,
-    };
-    let v5 = C::emit(ctx, &v4);
-    let v6 = C::writable_gpr_to_gpr(ctx, v3);
-    // Rule at src/isa/x64/inst.isle line 1934.
-    return v6;
-}
-
-// Generated as internal constructor for term gpr_to_xmm.
-pub fn constructor_gpr_to_xmm<C: Context>(
-    ctx: &mut C,
-    arg0: &SseOpcode,
-    arg1: &GprMem,
-    arg2: &OperandSize,
-) -> Xmm {
-    let v3 = C::temp_writable_xmm(ctx);
-    let v4 = MInst::GprToXmm {
-        op: arg0.clone(),
-        src: arg1.clone(),
-        dst: v3,
-        src_size: arg2.clone(),
-    };
-    let v5 = C::emit(ctx, &v4);
-    let v6 = C::writable_xmm_to_xmm(ctx, v3);
-    // Rule at src/isa/x64/inst.isle line 1941.
-    return v6;
-}
-
-// Generated as internal constructor for term gpr_to_xmm_vex.
-pub fn constructor_gpr_to_xmm_vex<C: Context>(
-    ctx: &mut C,
-    arg0: &AvxOpcode,
-    arg1: &GprMem,
-    arg2: &OperandSize,
-) -> Xmm {
-    let v3 = C::temp_writable_xmm(ctx);
-    let v4 = MInst::GprToXmmVex {
-        op: arg0.clone(),
-        src: arg1.clone(),
-        dst: v3,
-        src_size: arg2.clone(),
-    };
-    let v5 = C::emit(ctx, &v4);
-    let v6 = C::writable_xmm_to_xmm(ctx, v3);
-    // Rule at src/isa/x64/inst.isle line 1948.
-    return v6;
-}
-
-// Generated as internal constructor for term xmm_to_gpr.
-pub fn constructor_xmm_to_gpr<C: Context>(
-    ctx: &mut C,
-    arg0: &SseOpcode,
-    arg1: Xmm,
-    arg2: &OperandSize,
-) -> Gpr {
-    let v3 = C::temp_writable_gpr(ctx);
-    let v4 = MInst::XmmToGpr {
-        op: arg0.clone(),
-        src: arg1,
-        dst: v3,
-        dst_size: arg2.clone(),
-    };
-    let v5 = C::emit(ctx, &v4);
-    let v6 = C::writable_gpr_to_gpr(ctx, v3);
-    // Rule at src/isa/x64/inst.isle line 1955.
-    return v6;
-}
-
-// Generated as internal constructor for term xmm_to_gpr_vex.
-pub fn constructor_xmm_to_gpr_vex<C: Context>(
-    ctx: &mut C,
-    arg0: &AvxOpcode,
-    arg1: Xmm,
-    arg2: &OperandSize,
-) -> Gpr {
-    let v3 = C::temp_writable_gpr(ctx);
-    let v4 = MInst::XmmToGprVex {
-        op: arg0.clone(),
-        src: arg1,
-        dst: v3,
-        dst_size: arg2.clone(),
-    };
-    let v5 = C::emit(ctx, &v4);
-    let v6 = C::writable_gpr_to_gpr(ctx, v3);
-    // Rule at src/isa/x64/inst.isle line 1962.
-    return v6;
-}
-
-// Generated as internal constructor for term xmm_min_max_seq.
-pub fn constructor_xmm_min_max_seq<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: bool,
-    arg2: Xmm,
-    arg3: Xmm,
-) -> Xmm {
-    let v4 = C::temp_writable_xmm(ctx);
-    let v5 = &C::operand_size_of_type_32_64(ctx, arg0);
-    let v6 = MInst::XmmMinMaxSeq {
-        size: v5.clone(),
-        is_min: arg1,
-        lhs: arg2,
-        rhs: arg3,
-        dst: v4,
-    };
-    let v7 = C::emit(ctx, &v6);
-    let v8 = C::writable_xmm_to_xmm(ctx, v4);
-    // Rule at src/isa/x64/inst.isle line 1969.
-    return v8;
-}
-
-// Generated as internal constructor for term xmm_rmir_vex.
-pub fn constructor_xmm_rmir_vex<C: Context>(
-    ctx: &mut C,
-    arg0: &AvxOpcode,
-    arg1: Xmm,
-    arg2: &XmmMemImm,
-) -> Xmm {
-    let v3 = C::temp_writable_xmm(ctx);
-    let v4 = MInst::XmmRmiRVex {
-        op: arg0.clone(),
-        src1: arg1,
-        src2: arg2.clone(),
-        dst: v3,
-    };
-    let v5 = C::emit(ctx, &v4);
-    let v6 = C::writable_xmm_to_xmm(ctx, v3);
-    // Rule at src/isa/x64/inst.isle line 1977.
-    return v6;
-}
-
-// Generated as internal constructor for term xmm_rmr_imm_vex.
-pub fn constructor_xmm_rmr_imm_vex<C: Context>(
-    ctx: &mut C,
-    arg0: &AvxOpcode,
-    arg1: Xmm,
-    arg2: &XmmMem,
-    arg3: u8,
-) -> Xmm {
-    let v4 = C::temp_writable_xmm(ctx);
-    let v5 = MInst::XmmRmRImmVex {
-        op: arg0.clone(),
-        src1: arg1,
-        src2: arg2.clone(),
-        dst: v4,
-        imm: arg3,
-    };
-    let v6 = C::emit(ctx, &v5);
-    let v7 = C::writable_xmm_to_xmm(ctx, v4);
-    // Rule at src/isa/x64/inst.isle line 1984.
-    return v7;
-}
-
-// Generated as internal constructor for term xmm_rmr_vex3.
-pub fn constructor_xmm_rmr_vex3<C: Context>(
-    ctx: &mut C,
-    arg0: &AvxOpcode,
-    arg1: Xmm,
-    arg2: Xmm,
-    arg3: &XmmMem,
-) -> Xmm {
-    let v4 = C::temp_writable_xmm(ctx);
-    let v5 = MInst::XmmRmRVex3 {
-        op: arg0.clone(),
-        src1: arg1,
-        src2: arg2,
-        src3: arg3.clone(),
-        dst: v4,
-    };
-    let v6 = C::emit(ctx, &v5);
-    let v7 = C::writable_xmm_to_xmm(ctx, v4);
-    // Rule at src/isa/x64/inst.isle line 1991.
-    return v7;
-}
-
-// Generated as internal constructor for term mul_hi.
-pub fn constructor_mul_hi<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: bool,
-    arg2: Gpr,
-    arg3: &GprMem,
-) -> ValueRegs {
-    let v4 = C::temp_writable_gpr(ctx);
-    let v5 = C::temp_writable_gpr(ctx);
-    let v6 = &C::raw_operand_size_of_type(ctx, arg0);
-    let v7 = MInst::MulHi {
-        size: v6.clone(),
-        signed: arg1,
-        src1: arg2,
-        src2: arg3.clone(),
-        dst_lo: v4,
-        dst_hi: v5,
-    };
-    let v8 = C::emit(ctx, &v7);
-    let v9 = C::writable_gpr_to_gpr(ctx, v4);
-    let v10 = C::writable_gpr_to_gpr(ctx, v5);
-    let v11 = constructor_value_gprs(ctx, v9, v10);
-    // Rule at src/isa/x64/inst.isle line 2000.
-    return v11;
-}
-
-// Generated as internal constructor for term unary_rm_r.
-pub fn constructor_unary_rm_r<C: Context>(
-    ctx: &mut C,
-    arg0: &UnaryRmROpcode,
-    arg1: Gpr,
-    arg2: &OperandSize,
-) -> Gpr {
-    let v3 = C::temp_writable_gpr(ctx);
-    let v4 = &C::gpr_to_gpr_mem(ctx, arg1);
-    let v5 = MInst::UnaryRmR {
-        size: arg2.clone(),
-        op: arg0.clone(),
-        src: v4.clone(),
-        dst: v3,
-    };
-    let v6 = C::emit(ctx, &v5);
-    let v7 = C::writable_gpr_to_gpr(ctx, v3);
-    // Rule at src/isa/x64/inst.isle line 2014.
-    return v7;
-}
-
-// Generated as internal constructor for term unary_rm_r_vex.
-pub fn constructor_unary_rm_r_vex<C: Context>(
-    ctx: &mut C,
-    arg0: &UnaryRmRVexOpcode,
-    arg1: &GprMem,
-    arg2: &OperandSize,
-) -> Gpr {
-    let v3 = C::temp_writable_gpr(ctx);
-    let v4 = MInst::UnaryRmRVex {
-        size: arg2.clone(),
-        op: arg0.clone(),
-        src: arg1.clone(),
-        dst: v3,
-    };
-    let v5 = C::emit(ctx, &v4);
-    let v6 = C::writable_gpr_to_gpr(ctx, v3);
-    // Rule at src/isa/x64/inst.isle line 2021.
-    return v6;
-}
-
-// Generated as internal constructor for term cvt_u64_to_float_seq.
-pub fn constructor_cvt_u64_to_float_seq<C: Context>(ctx: &mut C, arg0: Type, arg1: Gpr) -> Xmm {
-    let v2 = &C::raw_operand_size_of_type(ctx, arg0);
-    let v3 = C::temp_writable_xmm(ctx);
-    let v4 = C::temp_writable_gpr(ctx);
-    let v5 = C::temp_writable_gpr(ctx);
-    let v6 = MInst::CvtUint64ToFloatSeq {
-        dst_size: v2.clone(),
-        src: arg1,
-        dst: v3,
-        tmp_gpr1: v4,
-        tmp_gpr2: v5,
-    };
-    let v7 = C::emit(ctx, &v6);
-    let v8 = C::writable_xmm_to_xmm(ctx, v3);
-    // Rule at src/isa/x64/inst.isle line 2027.
-    return v8;
-}
-
-// Generated as internal constructor for term cvt_float_to_uint_seq.
-pub fn constructor_cvt_float_to_uint_seq<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Value,
-    arg2: bool,
-) -> Gpr {
-    let v4 = &C::raw_operand_size_of_type(ctx, arg0);
-    let v2 = C::value_type(ctx, arg1);
-    let v5 = &C::raw_operand_size_of_type(ctx, v2);
-    let v6 = C::temp_writable_gpr(ctx);
-    let v7 = C::temp_writable_xmm(ctx);
-    let v8 = C::temp_writable_xmm(ctx);
-    let v9 = C::temp_writable_gpr(ctx);
-    let v10 = constructor_put_in_xmm(ctx, arg1);
-    let v11 = MInst::CvtFloatToUintSeq {
-        dst_size: v4.clone(),
-        src_size: v5.clone(),
-        is_saturating: arg2,
-        src: v10,
-        dst: v6,
-        tmp_gpr: v9,
-        tmp_xmm: v7,
-        tmp_xmm2: v8,
-    };
-    let v12 = C::emit(ctx, &v11);
-    let v13 = C::writable_gpr_to_gpr(ctx, v6);
-    // Rule at src/isa/x64/inst.isle line 2036.
-    return v13;
-}
-
-// Generated as internal constructor for term cvt_float_to_sint_seq.
-pub fn constructor_cvt_float_to_sint_seq<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Value,
-    arg2: bool,
-) -> Gpr {
-    let v4 = &C::raw_operand_size_of_type(ctx, arg0);
-    let v2 = C::value_type(ctx, arg1);
-    let v5 = &C::raw_operand_size_of_type(ctx, v2);
-    let v6 = C::temp_writable_gpr(ctx);
-    let v7 = C::temp_writable_xmm(ctx);
-    let v8 = C::temp_writable_gpr(ctx);
-    let v9 = constructor_put_in_xmm(ctx, arg1);
-    let v10 = MInst::CvtFloatToSintSeq {
-        dst_size: v4.clone(),
-        src_size: v5.clone(),
-        is_saturating: arg2,
-        src: v9,
-        dst: v6,
-        tmp_gpr: v8,
-        tmp_xmm: v7,
-    };
-    let v11 = C::emit(ctx, &v10);
-    let v12 = C::writable_gpr_to_gpr(ctx, v6);
-    // Rule at src/isa/x64/inst.isle line 2048.
-    return v12;
-}
-
-// Generated as internal constructor for term mov_from_preg.
-pub fn constructor_mov_from_preg<C: Context>(ctx: &mut C, arg0: PReg) -> Reg {
-    let v1 = C::temp_writable_gpr(ctx);
-    let v2 = MInst::MovFromPReg { src: arg0, dst: v1 };
-    let v3 = C::emit(ctx, &v2);
-    let v4 = constructor_writable_gpr_to_r_reg(ctx, v1);
-    // Rule at src/isa/x64/inst.isle line 2060.
-    return v4;
-}
-
-// Generated as internal constructor for term extend_to_gpr.
-pub fn constructor_extend_to_gpr<C: Context>(
-    ctx: &mut C,
-    arg0: Value,
-    arg1: Type,
-    arg2: &ExtendKind,
-) -> Gpr {
-    let v1 = C::value_type(ctx, arg0);
-    if v1 == arg1 {
-        let v4 = constructor_put_in_gpr(ctx, arg0);
-        // Rule at src/isa/x64/inst.isle line 2084.
-        return v4;
-    }
-    if v1 == I32 {
-        if arg1 == I64 {
-            if let &ExtendKind::Zero = arg2 {
-                let v5 = constructor_value32_zeros_upper32(ctx, arg0);
-                if v5 == true {
-                    let v4 = constructor_put_in_gpr(ctx, arg0);
-                    // Rule at src/isa/x64/inst.isle line 2092.
-                    return v4;
-                }
-            }
-        }
-    }
-    let v7 = &C::operand_size_of_type_32_64(ctx, arg1);
-    let v8 = constructor_operand_size_bits(ctx, v7);
-    let v6 = C::ty_bits_u16(ctx, v1);
-    let v9 = &C::ext_mode(ctx, v6, v8);
-    let v10 = &constructor_put_in_gpr_mem(ctx, arg0);
-    let v11 = constructor_extend(ctx, arg2, arg1, v9, v10);
-    // Rule at src/isa/x64/inst.isle line 2096.
-    return v11;
-}
-
-// Generated as internal constructor for term extend.
-pub fn constructor_extend<C: Context>(
-    ctx: &mut C,
-    arg0: &ExtendKind,
-    arg1: Type,
-    arg2: &ExtMode,
-    arg3: &GprMem,
-) -> Gpr {
-    match arg0 {
-        &ExtendKind::Sign => {
-            let v5 = constructor_x64_movsx(ctx, arg2, arg3);
-            // Rule at src/isa/x64/inst.isle line 2116.
-            return v5;
-        }
-        &ExtendKind::Zero => {
-            let v4 = constructor_x64_movzx(ctx, arg2, arg3);
-            // Rule at src/isa/x64/inst.isle line 2112.
-            return v4;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "extend", "src/isa/x64/inst.isle line 2109"
-    )
-}
-
-// Generated as internal constructor for term value32_zeros_upper32.
-pub fn constructor_value32_zeros_upper32<C: Context>(ctx: &mut C, arg0: Value) -> bool {
-    let v1 = C::def_inst(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v3 = &C::inst_data(ctx, v2);
-        match v3 {
-            &InstructionData::Binary {
-                opcode: ref v4,
-                args: ref v5,
-            } => {
-                match v4 {
-                    &Opcode::Iadd => {
-                        // Rule at src/isa/x64/inst.isle line 2123.
-                        return true;
-                    }
-                    &Opcode::Isub => {
-                        // Rule at src/isa/x64/inst.isle line 2124.
-                        return true;
-                    }
-                    &Opcode::Imul => {
-                        // Rule at src/isa/x64/inst.isle line 2125.
-                        return true;
-                    }
-                    &Opcode::Band => {
-                        // Rule at src/isa/x64/inst.isle line 2126.
-                        return true;
-                    }
-                    &Opcode::Bor => {
-                        // Rule at src/isa/x64/inst.isle line 2127.
-                        return true;
-                    }
-                    &Opcode::Bxor => {
-                        // Rule at src/isa/x64/inst.isle line 2128.
-                        return true;
-                    }
-                    &Opcode::Ishl => {
-                        // Rule at src/isa/x64/inst.isle line 2129.
-                        return true;
-                    }
-                    &Opcode::Ushr => {
-                        // Rule at src/isa/x64/inst.isle line 2130.
-                        return true;
-                    }
-                    _ => {}
-                }
-            }
-            &InstructionData::Load {
-                opcode: ref v10,
-                arg: v11,
-                flags: v12,
-                offset: v13,
-            } => {
-                if let &Opcode::Uload32 = v10 {
-                    // Rule at src/isa/x64/inst.isle line 2131.
-                    return true;
-                }
-            }
-            _ => {}
-        }
-    }
-    // Rule at src/isa/x64/inst.isle line 2132.
-    return false;
-}
-
-// Generated as internal constructor for term vec_int_type.
-pub fn constructor_vec_int_type<C: Context>(ctx: &mut C, arg0: Type) -> Type {
-    let v1 = C::multi_lane(ctx, arg0);
-    if let Some(v2) = v1 {
-        match v2.0 {
-            0x8 => {
-                if v2.1 == 0x10 {
-                    // Rule at src/isa/x64/inst.isle line 2138.
-                    return I8X16;
-                }
-            }
-            0x10 => {
-                if v2.1 == 0x8 {
-                    // Rule at src/isa/x64/inst.isle line 2139.
-                    return I16X8;
-                }
-            }
-            0x20 => {
-                if v2.1 == 0x4 {
-                    // Rule at src/isa/x64/inst.isle line 2140.
-                    return I32X4;
-                }
-            }
-            0x40 => {
-                if v2.1 == 0x2 {
-                    // Rule at src/isa/x64/inst.isle line 2141.
-                    return I64X2;
-                }
-            }
-            _ => {}
-        }
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_int_type", "src/isa/x64/inst.isle line 2137"
-    )
-}
-
-// Generated as internal constructor for term x64_xor_vector.
-pub fn constructor_x64_xor_vector<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Xmm,
-    arg2: &XmmMem,
-) -> Xmm {
-    match arg0 {
-        F32 => {
-            let v3 = constructor_x64_xorps(ctx, arg1, arg2);
-            // Rule at src/isa/x64/inst.isle line 2145.
-            return v3;
-        }
-        F64 => {
-            let v4 = constructor_x64_xorpd(ctx, arg1, arg2);
-            // Rule at src/isa/x64/inst.isle line 2146.
-            return v4;
-        }
-        F32X4 => {
-            let v3 = constructor_x64_xorps(ctx, arg1, arg2);
-            // Rule at src/isa/x64/inst.isle line 2147.
-            return v3;
-        }
-        F64X2 => {
-            let v4 = constructor_x64_xorpd(ctx, arg1, arg2);
-            // Rule at src/isa/x64/inst.isle line 2148.
-            return v4;
-        }
-        _ => {}
-    }
-    let v5 = C::multi_lane(ctx, arg0);
-    if let Some(v6) = v5 {
-        let v9 = constructor_x64_pxor(ctx, arg1, arg2);
-        // Rule at src/isa/x64/inst.isle line 2149.
-        return v9;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "x64_xor_vector", "src/isa/x64/inst.isle line 2144"
-    )
-}
-
-// Generated as internal constructor for term vector_all_ones.
-pub fn constructor_vector_all_ones<C: Context>(ctx: &mut C) -> Xmm {
-    let v0 = constructor_xmm_uninit_value(ctx);
-    let v1 = &C::xmm_to_xmm_mem(ctx, v0);
-    let v2 = constructor_x64_pcmpeqd(ctx, v0, v1);
-    // Rule at src/isa/x64/inst.isle line 2161.
-    return v2;
-}
-
-// Generated as internal constructor for term mov_rmi_to_xmm.
-pub fn constructor_mov_rmi_to_xmm<C: Context>(ctx: &mut C, arg0: &RegMemImm) -> XmmMemImm {
-    match arg0 {
-        &RegMemImm::Reg { reg: v4 } => {
-            let v5 = &C::reg_to_gpr_mem(ctx, v4);
-            let v6 = constructor_x64_movd_to_xmm(ctx, v5);
-            let v7 = &C::xmm_to_xmm_mem_imm(ctx, v6);
-            // Rule at src/isa/x64/inst.isle line 2169.
-            return v7.clone();
-        }
-        &RegMemImm::Mem { addr: ref v1 } => {
-            let v2 = &C::xmm_mem_imm_new(ctx, arg0);
-            // Rule at src/isa/x64/inst.isle line 2167.
-            return v2.clone();
-        }
-        &RegMemImm::Imm { simm32: v3 } => {
-            let v2 = &C::xmm_mem_imm_new(ctx, arg0);
-            // Rule at src/isa/x64/inst.isle line 2168.
-            return v2.clone();
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "mov_rmi_to_xmm", "src/isa/x64/inst.isle line 2166"
-    )
-}
-
-// Generated as internal constructor for term x64_load.
-pub fn constructor_x64_load<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &SyntheticAmode,
-    arg2: &ExtKind,
-) -> Reg {
-    match arg0 {
-        I64 => {
-            let v11 = constructor_mov64_mr(ctx, arg1);
-            // Rule at src/isa/x64/inst.isle line 2188.
-            return v11;
-        }
-        F32 => {
-            let v12 = constructor_x64_movss_load(ctx, arg1);
-            let v13 = C::xmm_to_reg(ctx, v12);
-            // Rule at src/isa/x64/inst.isle line 2191.
-            return v13;
-        }
-        F64 => {
-            let v14 = constructor_x64_movsd_load(ctx, arg1);
-            let v15 = C::xmm_to_reg(ctx, v14);
-            // Rule at src/isa/x64/inst.isle line 2194.
-            return v15;
-        }
-        F32X4 => {
-            let v16 = constructor_x64_movups_load(ctx, arg1);
-            let v17 = C::xmm_to_reg(ctx, v16);
-            // Rule at src/isa/x64/inst.isle line 2197.
-            return v17;
-        }
-        F64X2 => {
-            let v18 = constructor_x64_movupd_load(ctx, arg1);
-            let v19 = C::xmm_to_reg(ctx, v18);
-            // Rule at src/isa/x64/inst.isle line 2200.
-            return v19;
-        }
-        _ => {}
-    }
-    let v1 = C::fits_in_32(ctx, arg0);
-    if let Some(v2) = v1 {
-        if let &ExtKind::SignExtend = arg2 {
-            let v5 = C::ty_bytes(ctx, v2);
-            let v7 = &C::ext_mode(ctx, v5, 0x8);
-            let v8 = &constructor_synthetic_amode_to_gpr_mem(ctx, arg1);
-            let v9 = constructor_x64_movsx(ctx, v7, v8);
-            let v10 = C::gpr_to_reg(ctx, v9);
-            // Rule at src/isa/x64/inst.isle line 2184.
-            return v10;
-        }
-    }
-    let v20 = C::multi_lane(ctx, arg0);
-    if let Some(v21) = v20 {
-        let v24 = &constructor_synthetic_amode_to_xmm_mem(ctx, arg1);
-        let v25 = constructor_x64_movdqu_load(ctx, v24);
-        let v26 = C::xmm_to_reg(ctx, v25);
-        // Rule at src/isa/x64/inst.isle line 2203.
-        return v26;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "x64_load", "src/isa/x64/inst.isle line 2182"
-    )
-}
-
-// Generated as internal constructor for term x64_mov.
-pub fn constructor_x64_mov<C: Context>(ctx: &mut C, arg0: &Amode) -> Reg {
-    let v1 = &C::amode_to_synthetic_amode(ctx, arg0);
-    let v2 = constructor_mov64_mr(ctx, v1);
-    // Rule at src/isa/x64/inst.isle line 2207.
-    return v2;
-}
-
-// Generated as internal constructor for term x64_movzx.
-pub fn constructor_x64_movzx<C: Context>(ctx: &mut C, arg0: &ExtMode, arg1: &GprMem) -> Gpr {
-    let v2 = C::temp_writable_gpr(ctx);
-    let v3 = MInst::MovzxRmR {
-        ext_mode: arg0.clone(),
-        src: arg1.clone(),
-        dst: v2,
-    };
-    let v4 = C::emit(ctx, &v3);
-    let v5 = C::writable_gpr_to_gpr(ctx, v2);
-    // Rule at src/isa/x64/inst.isle line 2211.
-    return v5;
-}
-
-// Generated as internal constructor for term x64_movsx.
-pub fn constructor_x64_movsx<C: Context>(ctx: &mut C, arg0: &ExtMode, arg1: &GprMem) -> Gpr {
-    let v2 = C::temp_writable_gpr(ctx);
-    let v3 = MInst::MovsxRmR {
-        ext_mode: arg0.clone(),
-        src: arg1.clone(),
-        dst: v2,
-    };
-    let v4 = C::emit(ctx, &v3);
-    let v5 = C::writable_gpr_to_gpr(ctx, v2);
-    // Rule at src/isa/x64/inst.isle line 2217.
-    return v5;
-}
-
-// Generated as internal constructor for term x64_movss_load.
-pub fn constructor_x64_movss_load<C: Context>(ctx: &mut C, arg0: &SyntheticAmode) -> Xmm {
-    let v4 = C::use_avx(ctx);
-    if v4 == true {
-        let v2 = &constructor_synthetic_amode_to_xmm_mem(ctx, arg0);
-        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vmovss, v2);
-        // Rule at src/isa/x64/inst.isle line 2225.
-        return v6;
-    }
-    let v2 = &constructor_synthetic_amode_to_xmm_mem(ctx, arg0);
-    let v3 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Movss, v2);
-    // Rule at src/isa/x64/inst.isle line 2223.
-    return v3;
-}
-
-// Generated as internal constructor for term x64_movss_store.
-pub fn constructor_x64_movss_store<C: Context>(
-    ctx: &mut C,
-    arg0: &SyntheticAmode,
-    arg1: Xmm,
-) -> SideEffectNoResult {
-    let v4 = C::use_avx(ctx);
-    if v4 == true {
-        let v6 = &constructor_xmm_movrm_vex(ctx, &AvxOpcode::Vmovss, arg0, arg1);
-        // Rule at src/isa/x64/inst.isle line 2232.
-        return v6.clone();
-    }
-    let v3 = &constructor_xmm_movrm(ctx, &SseOpcode::Movss, arg0, arg1);
-    // Rule at src/isa/x64/inst.isle line 2230.
-    return v3.clone();
-}
-
-// Generated as internal constructor for term x64_movsd_load.
-pub fn constructor_x64_movsd_load<C: Context>(ctx: &mut C, arg0: &SyntheticAmode) -> Xmm {
-    let v4 = C::use_avx(ctx);
-    if v4 == true {
-        let v2 = &constructor_synthetic_amode_to_xmm_mem(ctx, arg0);
-        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vmovsd, v2);
-        // Rule at src/isa/x64/inst.isle line 2239.
-        return v6;
-    }
-    let v2 = &constructor_synthetic_amode_to_xmm_mem(ctx, arg0);
-    let v3 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Movsd, v2);
-    // Rule at src/isa/x64/inst.isle line 2237.
-    return v3;
-}
-
-// Generated as internal constructor for term x64_movsd_store.
-pub fn constructor_x64_movsd_store<C: Context>(
-    ctx: &mut C,
-    arg0: &SyntheticAmode,
-    arg1: Xmm,
-) -> SideEffectNoResult {
-    let v4 = C::use_avx(ctx);
-    if v4 == true {
-        let v6 = &constructor_xmm_movrm_vex(ctx, &AvxOpcode::Vmovsd, arg0, arg1);
-        // Rule at src/isa/x64/inst.isle line 2246.
-        return v6.clone();
-    }
-    let v3 = &constructor_xmm_movrm(ctx, &SseOpcode::Movsd, arg0, arg1);
-    // Rule at src/isa/x64/inst.isle line 2244.
-    return v3.clone();
-}
-
-// Generated as internal constructor for term x64_movups_load.
-pub fn constructor_x64_movups_load<C: Context>(ctx: &mut C, arg0: &SyntheticAmode) -> Xmm {
-    let v4 = C::use_avx(ctx);
-    if v4 == true {
-        let v2 = &constructor_synthetic_amode_to_xmm_mem(ctx, arg0);
-        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vmovups, v2);
-        // Rule at src/isa/x64/inst.isle line 2253.
-        return v6;
-    }
-    let v2 = &constructor_synthetic_amode_to_xmm_mem(ctx, arg0);
-    let v3 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Movups, v2);
-    // Rule at src/isa/x64/inst.isle line 2251.
-    return v3;
-}
-
-// Generated as internal constructor for term x64_movups_store.
-pub fn constructor_x64_movups_store<C: Context>(
-    ctx: &mut C,
-    arg0: &SyntheticAmode,
-    arg1: Xmm,
-) -> SideEffectNoResult {
-    let v4 = C::use_avx(ctx);
-    if v4 == true {
-        let v6 = &constructor_xmm_movrm_vex(ctx, &AvxOpcode::Vmovups, arg0, arg1);
-        // Rule at src/isa/x64/inst.isle line 2260.
-        return v6.clone();
-    }
-    let v3 = &constructor_xmm_movrm(ctx, &SseOpcode::Movups, arg0, arg1);
-    // Rule at src/isa/x64/inst.isle line 2258.
-    return v3.clone();
-}
-
-// Generated as internal constructor for term x64_movupd_load.
-pub fn constructor_x64_movupd_load<C: Context>(ctx: &mut C, arg0: &SyntheticAmode) -> Xmm {
-    let v4 = C::use_avx(ctx);
-    if v4 == true {
-        let v2 = &constructor_synthetic_amode_to_xmm_mem(ctx, arg0);
-        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vmovupd, v2);
-        // Rule at src/isa/x64/inst.isle line 2267.
-        return v6;
-    }
-    let v2 = &constructor_synthetic_amode_to_xmm_mem(ctx, arg0);
-    let v3 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Movupd, v2);
-    // Rule at src/isa/x64/inst.isle line 2265.
-    return v3;
-}
-
-// Generated as internal constructor for term x64_movupd_store.
-pub fn constructor_x64_movupd_store<C: Context>(
-    ctx: &mut C,
-    arg0: &SyntheticAmode,
-    arg1: Xmm,
-) -> SideEffectNoResult {
-    let v4 = C::use_avx(ctx);
-    if v4 == true {
-        let v6 = &constructor_xmm_movrm_vex(ctx, &AvxOpcode::Vmovupd, arg0, arg1);
-        // Rule at src/isa/x64/inst.isle line 2274.
-        return v6.clone();
-    }
-    let v3 = &constructor_xmm_movrm(ctx, &SseOpcode::Movupd, arg0, arg1);
-    // Rule at src/isa/x64/inst.isle line 2272.
-    return v3.clone();
-}
-
-// Generated as internal constructor for term x64_movd_to_gpr.
-pub fn constructor_x64_movd_to_gpr<C: Context>(ctx: &mut C, arg0: Xmm) -> Gpr {
-    let v4 = C::use_avx(ctx);
-    if v4 == true {
-        let v6 = constructor_xmm_to_gpr_vex(ctx, &AvxOpcode::Vmovd, arg0, &OperandSize::Size32);
-        // Rule at src/isa/x64/inst.isle line 2282.
-        return v6;
-    }
-    let v3 = constructor_xmm_to_gpr(ctx, &SseOpcode::Movd, arg0, &OperandSize::Size32);
-    // Rule at src/isa/x64/inst.isle line 2280.
-    return v3;
-}
-
-// Generated as internal constructor for term x64_movd_to_xmm.
-pub fn constructor_x64_movd_to_xmm<C: Context>(ctx: &mut C, arg0: &GprMem) -> Xmm {
-    let v4 = C::use_avx(ctx);
-    if v4 == true {
-        let v6 = constructor_gpr_to_xmm_vex(ctx, &AvxOpcode::Vmovd, arg0, &OperandSize::Size32);
-        // Rule at src/isa/x64/inst.isle line 2290.
-        return v6;
-    }
-    let v3 = constructor_gpr_to_xmm(ctx, &SseOpcode::Movd, arg0, &OperandSize::Size32);
-    // Rule at src/isa/x64/inst.isle line 2288.
-    return v3;
-}
-
-// Generated as internal constructor for term x64_movq_to_xmm.
-pub fn constructor_x64_movq_to_xmm<C: Context>(ctx: &mut C, arg0: &GprMem) -> Xmm {
-    let v4 = C::use_avx(ctx);
-    if v4 == true {
-        let v6 = constructor_gpr_to_xmm_vex(ctx, &AvxOpcode::Vmovq, arg0, &OperandSize::Size64);
-        // Rule at src/isa/x64/inst.isle line 2298.
-        return v6;
-    }
-    let v3 = constructor_gpr_to_xmm(ctx, &SseOpcode::Movq, arg0, &OperandSize::Size64);
-    // Rule at src/isa/x64/inst.isle line 2296.
-    return v3;
-}
-
-// Generated as internal constructor for term x64_movq_to_gpr.
-pub fn constructor_x64_movq_to_gpr<C: Context>(ctx: &mut C, arg0: Xmm) -> Gpr {
-    let v4 = C::use_avx(ctx);
-    if v4 == true {
-        let v6 = constructor_xmm_to_gpr_vex(ctx, &AvxOpcode::Vmovq, arg0, &OperandSize::Size64);
-        // Rule at src/isa/x64/inst.isle line 2306.
-        return v6;
-    }
-    let v3 = constructor_xmm_to_gpr(ctx, &SseOpcode::Movq, arg0, &OperandSize::Size64);
-    // Rule at src/isa/x64/inst.isle line 2304.
-    return v3;
-}
-
-// Generated as internal constructor for term x64_movdqu_load.
-pub fn constructor_x64_movdqu_load<C: Context>(ctx: &mut C, arg0: &XmmMem) -> Xmm {
-    let v3 = C::use_avx(ctx);
-    if v3 == true {
-        let v5 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vmovdqu, arg0);
-        // Rule at src/isa/x64/inst.isle line 2313.
-        return v5;
-    }
-    let v2 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Movdqu, arg0);
-    // Rule at src/isa/x64/inst.isle line 2311.
-    return v2;
-}
-
-// Generated as internal constructor for term x64_movdqu_store.
-pub fn constructor_x64_movdqu_store<C: Context>(
-    ctx: &mut C,
-    arg0: &SyntheticAmode,
-    arg1: Xmm,
-) -> SideEffectNoResult {
-    let v4 = C::use_avx(ctx);
-    if v4 == true {
-        let v6 = &constructor_xmm_movrm_vex(ctx, &AvxOpcode::Vmovdqu, arg0, arg1);
-        // Rule at src/isa/x64/inst.isle line 2320.
-        return v6.clone();
-    }
-    let v3 = &constructor_xmm_movrm(ctx, &SseOpcode::Movdqu, arg0, arg1);
-    // Rule at src/isa/x64/inst.isle line 2318.
-    return v3.clone();
-}
-
-// Generated as internal constructor for term x64_pmovsxbw.
-pub fn constructor_x64_pmovsxbw<C: Context>(ctx: &mut C, arg0: &XmmMem) -> Xmm {
-    let v3 = C::use_avx(ctx);
-    if v3 == true {
-        let v5 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vpmovsxbw, arg0);
-        // Rule at src/isa/x64/inst.isle line 2327.
-        return v5;
-    }
-    let v2 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Pmovsxbw, arg0);
-    // Rule at src/isa/x64/inst.isle line 2325.
-    return v2;
-}
-
-// Generated as internal constructor for term x64_pmovzxbw.
-pub fn constructor_x64_pmovzxbw<C: Context>(ctx: &mut C, arg0: &XmmMem) -> Xmm {
-    let v3 = C::use_avx(ctx);
-    if v3 == true {
-        let v5 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vpmovzxbw, arg0);
-        // Rule at src/isa/x64/inst.isle line 2334.
-        return v5;
-    }
-    let v2 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Pmovzxbw, arg0);
-    // Rule at src/isa/x64/inst.isle line 2332.
-    return v2;
-}
-
-// Generated as internal constructor for term x64_pmovsxwd.
-pub fn constructor_x64_pmovsxwd<C: Context>(ctx: &mut C, arg0: &XmmMem) -> Xmm {
-    let v3 = C::use_avx(ctx);
-    if v3 == true {
-        let v5 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vpmovsxwd, arg0);
-        // Rule at src/isa/x64/inst.isle line 2341.
-        return v5;
-    }
-    let v2 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Pmovsxwd, arg0);
-    // Rule at src/isa/x64/inst.isle line 2339.
-    return v2;
-}
-
-// Generated as internal constructor for term x64_pmovzxwd.
-pub fn constructor_x64_pmovzxwd<C: Context>(ctx: &mut C, arg0: &XmmMem) -> Xmm {
-    let v3 = C::use_avx(ctx);
-    if v3 == true {
-        let v5 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vpmovzxwd, arg0);
-        // Rule at src/isa/x64/inst.isle line 2348.
-        return v5;
-    }
-    let v2 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Pmovzxwd, arg0);
-    // Rule at src/isa/x64/inst.isle line 2346.
-    return v2;
-}
-
-// Generated as internal constructor for term x64_pmovsxdq.
-pub fn constructor_x64_pmovsxdq<C: Context>(ctx: &mut C, arg0: &XmmMem) -> Xmm {
-    let v3 = C::use_avx(ctx);
-    if v3 == true {
-        let v5 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vpmovsxdq, arg0);
-        // Rule at src/isa/x64/inst.isle line 2355.
-        return v5;
-    }
-    let v2 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Pmovsxdq, arg0);
-    // Rule at src/isa/x64/inst.isle line 2353.
-    return v2;
-}
-
-// Generated as internal constructor for term x64_pmovzxdq.
-pub fn constructor_x64_pmovzxdq<C: Context>(ctx: &mut C, arg0: &XmmMem) -> Xmm {
-    let v3 = C::use_avx(ctx);
-    if v3 == true {
-        let v5 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vpmovzxdq, arg0);
-        // Rule at src/isa/x64/inst.isle line 2362.
-        return v5;
-    }
-    let v2 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Pmovzxdq, arg0);
-    // Rule at src/isa/x64/inst.isle line 2360.
-    return v2;
-}
-
-// Generated as internal constructor for term x64_movrm.
-pub fn constructor_x64_movrm<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &SyntheticAmode,
-    arg2: Gpr,
-) -> SideEffectNoResult {
-    let v3 = &C::raw_operand_size_of_type(ctx, arg0);
-    let v4 = MInst::MovRM {
-        size: v3.clone(),
-        src: arg2,
-        dst: arg1.clone(),
-    };
-    let v5 = SideEffectNoResult::Inst { inst: v4 };
-    // Rule at src/isa/x64/inst.isle line 2367.
-    return v5;
-}
-
-// Generated as internal constructor for term xmm_movrm.
-pub fn constructor_xmm_movrm<C: Context>(
-    ctx: &mut C,
-    arg0: &SseOpcode,
-    arg1: &SyntheticAmode,
-    arg2: Xmm,
-) -> SideEffectNoResult {
-    let v3 = MInst::XmmMovRM {
-        op: arg0.clone(),
-        src: arg2,
-        dst: arg1.clone(),
-    };
-    let v4 = SideEffectNoResult::Inst { inst: v3 };
-    // Rule at src/isa/x64/inst.isle line 2372.
-    return v4;
-}
-
-// Generated as internal constructor for term xmm_movrm_imm.
-pub fn constructor_xmm_movrm_imm<C: Context>(
-    ctx: &mut C,
-    arg0: &SseOpcode,
-    arg1: &SyntheticAmode,
-    arg2: Xmm,
-    arg3: u8,
-) -> SideEffectNoResult {
-    let v4 = MInst::XmmMovRMImm {
-        op: arg0.clone(),
-        src: arg2,
-        dst: arg1.clone(),
-        imm: arg3,
-    };
-    let v5 = SideEffectNoResult::Inst { inst: v4 };
-    // Rule at src/isa/x64/inst.isle line 2376.
-    return v5;
-}
-
-// Generated as internal constructor for term xmm_movrm_vex.
-pub fn constructor_xmm_movrm_vex<C: Context>(
-    ctx: &mut C,
-    arg0: &AvxOpcode,
-    arg1: &SyntheticAmode,
-    arg2: Xmm,
-) -> SideEffectNoResult {
-    let v3 = MInst::XmmMovRMVex {
-        op: arg0.clone(),
-        src: arg2,
-        dst: arg1.clone(),
-    };
-    let v4 = SideEffectNoResult::Inst { inst: v3 };
-    // Rule at src/isa/x64/inst.isle line 2380.
-    return v4;
-}
-
-// Generated as internal constructor for term xmm_movrm_imm_vex.
-pub fn constructor_xmm_movrm_imm_vex<C: Context>(
-    ctx: &mut C,
-    arg0: &AvxOpcode,
-    arg1: &SyntheticAmode,
-    arg2: Xmm,
-    arg3: u8,
-) -> SideEffectNoResult {
-    let v4 = MInst::XmmMovRMImmVex {
-        op: arg0.clone(),
-        src: arg2,
-        dst: arg1.clone(),
-        imm: arg3,
-    };
-    let v5 = SideEffectNoResult::Inst { inst: v4 };
-    // Rule at src/isa/x64/inst.isle line 2384.
-    return v5;
-}
-
-// Generated as internal constructor for term x64_xmm_load_const.
-pub fn constructor_x64_xmm_load_const<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: VCodeConstant,
-) -> Xmm {
-    let v2 = &C::const_to_synthetic_amode(ctx, arg1);
-    let v4 = constructor_x64_load(ctx, arg0, v2, &ExtKind::None);
-    let v5 = C::xmm_new(ctx, v4);
-    // Rule at src/isa/x64/inst.isle line 2389.
-    return v5;
-}
-
-// Generated as internal constructor for term x64_add.
-pub fn constructor_x64_add<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Gpr,
-    arg2: &GprMemImm,
-) -> Gpr {
-    let v4 = constructor_alu_rmi_r(ctx, arg0, &AluRmiROpcode::Add, arg1, arg2);
-    // Rule at src/isa/x64/inst.isle line 2400.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_add_with_flags_paired.
-pub fn constructor_x64_add_with_flags_paired<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Gpr,
-    arg2: &GprMemImm,
-) -> ProducesFlags {
-    let v3 = C::temp_writable_gpr(ctx);
-    let v4 = &C::operand_size_of_type_32_64(ctx, arg0);
-    let v7 = constructor_writable_gpr_to_r_reg(ctx, v3);
-    let v6 = MInst::AluRmiR {
-        size: v4.clone(),
-        op: AluRmiROpcode::Add,
-        src1: arg1,
-        src2: arg2.clone(),
-        dst: v3,
-    };
-    let v8 = ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
-        inst: v6,
-        result: v7,
-    };
-    // Rule at src/isa/x64/inst.isle line 2408.
-    return v8;
-}
-
-// Generated as internal constructor for term x64_alurmi_with_flags_paired.
-pub fn constructor_x64_alurmi_with_flags_paired<C: Context>(
-    ctx: &mut C,
-    arg0: &AluRmiROpcode,
-    arg1: Type,
-    arg2: Gpr,
-    arg3: &GprMemImm,
-) -> ProducesFlags {
-    let v2 = C::fits_in_64(ctx, arg1);
-    if let Some(v3) = v2 {
-        let v6 = C::temp_writable_gpr(ctx);
-        let v7 = &C::raw_operand_size_of_type(ctx, v3);
-        let v9 = constructor_writable_gpr_to_r_reg(ctx, v6);
-        let v8 = MInst::AluRmiR {
-            size: v7.clone(),
-            op: arg0.clone(),
-            src1: arg2,
-            src2: arg3.clone(),
-            dst: v6,
-        };
-        let v10 = ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
-            inst: v8,
-            result: v9,
-        };
-        // Rule at src/isa/x64/inst.isle line 2419.
-        return v10;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "x64_alurmi_with_flags_paired", "src/isa/x64/inst.isle line 2418"
-    )
-}
-
-// Generated as internal constructor for term x64_alurmi_with_flags_chained.
-pub fn constructor_x64_alurmi_with_flags_chained<C: Context>(
-    ctx: &mut C,
-    arg0: &AluRmiROpcode,
-    arg1: Type,
-    arg2: Gpr,
-    arg3: &GprMemImm,
-) -> ConsumesAndProducesFlags {
-    let v2 = C::fits_in_64(ctx, arg1);
-    if let Some(v3) = v2 {
-        let v6 = C::temp_writable_gpr(ctx);
-        let v7 = &C::raw_operand_size_of_type(ctx, v3);
-        let v9 = constructor_writable_gpr_to_r_reg(ctx, v6);
-        let v8 = MInst::AluRmiR {
-            size: v7.clone(),
-            op: arg0.clone(),
-            src1: arg2,
-            src2: arg3.clone(),
-            dst: v6,
-        };
-        let v10 = ConsumesAndProducesFlags::ReturnsReg {
-            inst: v8,
-            result: v9,
-        };
-        // Rule at src/isa/x64/inst.isle line 2431.
-        return v10;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "x64_alurmi_with_flags_chained", "src/isa/x64/inst.isle line 2430"
-    )
-}
-
-// Generated as internal constructor for term x64_adc_paired.
-pub fn constructor_x64_adc_paired<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Gpr,
-    arg2: &GprMemImm,
-) -> ConsumesFlags {
-    let v3 = C::temp_writable_gpr(ctx);
-    let v4 = &C::operand_size_of_type_32_64(ctx, arg0);
-    let v7 = constructor_writable_gpr_to_r_reg(ctx, v3);
-    let v6 = MInst::AluRmiR {
-        size: v4.clone(),
-        op: AluRmiROpcode::Adc,
-        src1: arg1,
-        src2: arg2.clone(),
-        dst: v3,
-    };
-    let v8 = ConsumesFlags::ConsumesFlagsReturnsResultWithProducer {
-        inst: v6,
-        result: v7,
-    };
-    // Rule at src/isa/x64/inst.isle line 2443.
-    return v8;
-}
-
-// Generated as internal constructor for term x64_sub.
-pub fn constructor_x64_sub<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Gpr,
-    arg2: &GprMemImm,
-) -> Gpr {
-    let v4 = constructor_alu_rmi_r(ctx, arg0, &AluRmiROpcode::Sub, arg1, arg2);
-    // Rule at src/isa/x64/inst.isle line 2455.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_sub_with_flags_paired.
-pub fn constructor_x64_sub_with_flags_paired<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Gpr,
-    arg2: &GprMemImm,
-) -> ProducesFlags {
-    let v3 = C::temp_writable_gpr(ctx);
-    let v4 = &C::operand_size_of_type_32_64(ctx, arg0);
-    let v7 = constructor_writable_gpr_to_r_reg(ctx, v3);
-    let v6 = MInst::AluRmiR {
-        size: v4.clone(),
-        op: AluRmiROpcode::Sub,
-        src1: arg1,
-        src2: arg2.clone(),
-        dst: v3,
-    };
-    let v8 = ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
-        inst: v6,
-        result: v7,
-    };
-    // Rule at src/isa/x64/inst.isle line 2463.
-    return v8;
-}
-
-// Generated as internal constructor for term x64_sbb_paired.
-pub fn constructor_x64_sbb_paired<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Gpr,
-    arg2: &GprMemImm,
-) -> ConsumesFlags {
-    let v3 = C::temp_writable_gpr(ctx);
-    let v4 = &C::operand_size_of_type_32_64(ctx, arg0);
-    let v7 = constructor_writable_gpr_to_r_reg(ctx, v3);
-    let v6 = MInst::AluRmiR {
-        size: v4.clone(),
-        op: AluRmiROpcode::Sbb,
-        src1: arg1,
-        src2: arg2.clone(),
-        dst: v3,
-    };
-    let v8 = ConsumesFlags::ConsumesFlagsReturnsResultWithProducer {
-        inst: v6,
-        result: v7,
-    };
-    // Rule at src/isa/x64/inst.isle line 2475.
-    return v8;
-}
-
-// Generated as internal constructor for term x64_mul.
-pub fn constructor_x64_mul<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Gpr,
-    arg2: &GprMemImm,
-) -> Gpr {
-    let v4 = constructor_alu_rmi_r(ctx, arg0, &AluRmiROpcode::Mul, arg1, arg2);
-    // Rule at src/isa/x64/inst.isle line 2487.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_umullo.
-pub fn constructor_x64_umullo<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Gpr,
-    arg2: &GprMem,
-) -> Gpr {
-    let v3 = C::temp_writable_gpr(ctx);
-    let v4 = &C::raw_operand_size_of_type(ctx, arg0);
-    let v5 = MInst::UMulLo {
-        size: v4.clone(),
-        src1: arg1,
-        src2: arg2.clone(),
-        dst: v3,
-    };
-    let v6 = C::emit(ctx, &v5);
-    let v7 = C::writable_gpr_to_gpr(ctx, v3);
-    // Rule at src/isa/x64/inst.isle line 2495.
-    return v7;
-}
-
-// Generated as internal constructor for term x64_umullo_with_flags_paired.
-pub fn constructor_x64_umullo_with_flags_paired<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Gpr,
-    arg2: &GprMem,
-) -> ProducesFlags {
-    let v3 = C::temp_writable_gpr(ctx);
-    let v4 = &C::raw_operand_size_of_type(ctx, arg0);
-    let v6 = constructor_writable_gpr_to_r_reg(ctx, v3);
-    let v5 = MInst::UMulLo {
-        size: v4.clone(),
-        src1: arg1,
-        src2: arg2.clone(),
-        dst: v3,
-    };
-    let v7 = ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
-        inst: v5,
-        result: v6,
-    };
-    // Rule at src/isa/x64/inst.isle line 2502.
-    return v7;
-}
-
-// Generated as internal constructor for term x64_and.
-pub fn constructor_x64_and<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Gpr,
-    arg2: &GprMemImm,
-) -> Gpr {
-    let v4 = constructor_alu_rmi_r(ctx, arg0, &AluRmiROpcode::And, arg1, arg2);
-    // Rule at src/isa/x64/inst.isle line 2513.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_and_with_flags_paired.
-pub fn constructor_x64_and_with_flags_paired<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Gpr,
-    arg2: &GprMemImm,
-) -> ProducesFlags {
-    let v3 = C::temp_writable_gpr(ctx);
-    let v4 = &C::operand_size_of_type_32_64(ctx, arg0);
-    let v6 = MInst::AluRmiR {
-        size: v4.clone(),
-        op: AluRmiROpcode::And,
-        src1: arg1,
-        src2: arg2.clone(),
-        dst: v3,
-    };
-    let v7 = ProducesFlags::ProducesFlagsSideEffect { inst: v6 };
-    // Rule at src/isa/x64/inst.isle line 2520.
-    return v7;
-}
-
-// Generated as internal constructor for term x64_or.
-pub fn constructor_x64_or<C: Context>(ctx: &mut C, arg0: Type, arg1: Gpr, arg2: &GprMemImm) -> Gpr {
-    let v4 = constructor_alu_rmi_r(ctx, arg0, &AluRmiROpcode::Or, arg1, arg2);
-    // Rule at src/isa/x64/inst.isle line 2531.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_xor.
-pub fn constructor_x64_xor<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Gpr,
-    arg2: &GprMemImm,
-) -> Gpr {
-    let v4 = constructor_alu_rmi_r(ctx, arg0, &AluRmiROpcode::Xor, arg1, arg2);
-    // Rule at src/isa/x64/inst.isle line 2539.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_andn.
-pub fn constructor_x64_andn<C: Context>(ctx: &mut C, arg0: Type, arg1: Gpr, arg2: Gpr) -> Gpr {
-    let v4 = constructor_alu_rm_r_vex(ctx, arg0, &AluRmROpcode::Andn, arg1, arg2);
-    // Rule at src/isa/x64/inst.isle line 2546.
-    return v4;
-}
-
-// Generated as internal constructor for term imm_i64.
-pub fn constructor_imm_i64<C: Context>(ctx: &mut C, arg0: Type, arg1: i64) -> Reg {
-    let v2 = C::i64_as_u64(ctx, arg1);
-    let v3 = constructor_imm(ctx, arg0, v2);
-    // Rule at src/isa/x64/inst.isle line 2553.
-    return v3;
-}
-
-// Generated as internal constructor for term imm.
-pub fn constructor_imm<C: Context>(ctx: &mut C, arg0: Type, arg1: u64) -> Reg {
-    match arg0 {
-        I64 => {
-            let v20 = C::nonzero_u64_fits_in_u32(ctx, arg1);
-            if let Some(v21) = v20 {
-                let v5 = C::temp_writable_gpr(ctx);
-                let v23 = MInst::Imm {
-                    dst_size: OperandSize::Size32,
-                    simm64: v21,
-                    dst: v5,
-                };
-                let v24 = C::emit(ctx, &v23);
-                let v25 = constructor_writable_gpr_to_r_reg(ctx, v5);
-                // Rule at src/isa/x64/inst.isle line 2584.
-                return v25;
-            }
-        }
-        F32 => {
-            let v4 = C::u64_is_zero(ctx, arg1);
-            match v4 {
-                true => {
-                    let v35 = constructor_xmm_zero(ctx, arg0);
-                    let v36 = C::xmm_to_reg(ctx, v35);
-                    // Rule at src/isa/x64/inst.isle line 2602.
-                    return v36;
-                }
-                false => {
-                    let v11 = constructor_imm(ctx, I32, arg1);
-                    let v12 = &C::reg_to_gpr_mem(ctx, v11);
-                    let v13 = constructor_x64_movd_to_xmm(ctx, v12);
-                    let v14 = C::xmm_to_reg(ctx, v13);
-                    // Rule at src/isa/x64/inst.isle line 2575.
-                    return v14;
-                }
-                _ => {}
-            }
-        }
-        F64 => {
-            let v4 = C::u64_is_zero(ctx, arg1);
-            match v4 {
-                true => {
-                    let v35 = constructor_xmm_zero(ctx, arg0);
-                    let v36 = C::xmm_to_reg(ctx, v35);
-                    // Rule at src/isa/x64/inst.isle line 2607.
-                    return v36;
-                }
-                false => {
-                    let v16 = constructor_imm(ctx, I64, arg1);
-                    let v17 = &C::reg_to_gpr_mem(ctx, v16);
-                    let v18 = constructor_x64_movq_to_xmm(ctx, v17);
-                    let v19 = C::xmm_to_reg(ctx, v18);
-                    // Rule at src/isa/x64/inst.isle line 2579.
-                    return v19;
-                }
-                _ => {}
-            }
-        }
-        _ => {}
-    }
-    let v1 = C::fits_in_64(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v4 = C::u64_is_zero(ctx, arg1);
-        match v4 {
-            true => {
-                let v5 = C::temp_writable_gpr(ctx);
-                let v6 = &C::operand_size_of_type_32_64(ctx, v2);
-                let v27 = MInst::AluConstOp {
-                    op: AluRmiROpcode::Xor,
-                    size: v6.clone(),
-                    dst: v5,
-                };
-                let v28 = C::emit(ctx, &v27);
-                let v29 = C::writable_gpr_to_gpr(ctx, v5);
-                let v30 = C::gpr_to_reg(ctx, v29);
-                // Rule at src/isa/x64/inst.isle line 2590.
-                return v30;
-            }
-            false => {
-                let v5 = C::temp_writable_gpr(ctx);
-                let v6 = &C::operand_size_of_type_32_64(ctx, v2);
-                let v7 = MInst::Imm {
-                    dst_size: v6.clone(),
-                    simm64: arg1,
-                    dst: v5,
-                };
-                let v8 = C::emit(ctx, &v7);
-                let v9 = constructor_writable_gpr_to_r_reg(ctx, v5);
-                // Rule at src/isa/x64/inst.isle line 2568.
-                return v9;
-            }
-            _ => {}
-        }
-    }
-    if arg1 == 0x0 {
-        let v31 = C::multi_lane(ctx, arg0);
-        if let Some(v32) = v31 {
-            let v35 = constructor_xmm_zero(ctx, arg0);
-            let v36 = C::xmm_to_reg(ctx, v35);
-            // Rule at src/isa/x64/inst.isle line 2598.
-            return v36;
-        }
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "imm", "src/isa/x64/inst.isle line 2565"
-    )
-}
-
-// Generated as internal constructor for term xmm_zero.
-pub fn constructor_xmm_zero<C: Context>(ctx: &mut C, arg0: Type) -> Xmm {
-    let v1 = constructor_xmm_uninit_value(ctx);
-    let v2 = &C::xmm_to_xmm_mem(ctx, v1);
-    let v3 = constructor_x64_xor_vector(ctx, arg0, v1, v2);
-    // Rule at src/isa/x64/inst.isle line 2612.
-    return v3;
-}
-
-// Generated as internal constructor for term shift_r.
-pub fn constructor_shift_r<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &ShiftKind,
-    arg2: Gpr,
-    arg3: &Imm8Gpr,
-) -> Gpr {
-    let v4 = C::temp_writable_gpr(ctx);
-    let v5 = &C::raw_operand_size_of_type(ctx, arg0);
-    let v6 = MInst::ShiftR {
-        size: v5.clone(),
-        kind: arg1.clone(),
-        src: arg2,
-        num_bits: arg3.clone(),
-        dst: v4,
-    };
-    let v7 = C::emit(ctx, &v6);
-    let v8 = C::writable_gpr_to_gpr(ctx, v4);
-    // Rule at src/isa/x64/inst.isle line 2618.
-    return v8;
-}
-
-// Generated as internal constructor for term x64_rotl.
-pub fn constructor_x64_rotl<C: Context>(ctx: &mut C, arg0: Type, arg1: Gpr, arg2: &Imm8Gpr) -> Gpr {
-    let v4 = constructor_shift_r(ctx, arg0, &ShiftKind::RotateLeft, arg1, arg2);
-    // Rule at src/isa/x64/inst.isle line 2628.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_rotr.
-pub fn constructor_x64_rotr<C: Context>(ctx: &mut C, arg0: Type, arg1: Gpr, arg2: &Imm8Gpr) -> Gpr {
-    let v4 = constructor_shift_r(ctx, arg0, &ShiftKind::RotateRight, arg1, arg2);
-    // Rule at src/isa/x64/inst.isle line 2633.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_shl.
-pub fn constructor_x64_shl<C: Context>(ctx: &mut C, arg0: Type, arg1: Gpr, arg2: &Imm8Gpr) -> Gpr {
-    let v4 = constructor_shift_r(ctx, arg0, &ShiftKind::ShiftLeft, arg1, arg2);
-    // Rule at src/isa/x64/inst.isle line 2638.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_shr.
-pub fn constructor_x64_shr<C: Context>(ctx: &mut C, arg0: Type, arg1: Gpr, arg2: &Imm8Gpr) -> Gpr {
-    let v4 = constructor_shift_r(ctx, arg0, &ShiftKind::ShiftRightLogical, arg1, arg2);
-    // Rule at src/isa/x64/inst.isle line 2643.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_sar.
-pub fn constructor_x64_sar<C: Context>(ctx: &mut C, arg0: Type, arg1: Gpr, arg2: &Imm8Gpr) -> Gpr {
-    let v4 = constructor_shift_r(ctx, arg0, &ShiftKind::ShiftRightArithmetic, arg1, arg2);
-    // Rule at src/isa/x64/inst.isle line 2648.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_bswap.
-pub fn constructor_x64_bswap<C: Context>(ctx: &mut C, arg0: Type, arg1: Gpr) -> Gpr {
-    let v2 = C::temp_writable_gpr(ctx);
-    let v3 = &C::operand_size_of_type_32_64(ctx, arg0);
-    let v4 = MInst::Bswap {
-        size: v3.clone(),
-        src: arg1,
-        dst: v2,
-    };
-    let v5 = C::emit(ctx, &v4);
-    let v6 = C::writable_gpr_to_gpr(ctx, v2);
-    // Rule at src/isa/x64/inst.isle line 2655.
-    return v6;
-}
-
-// Generated as internal constructor for term cmp_rmi_r.
-pub fn constructor_cmp_rmi_r<C: Context>(
-    ctx: &mut C,
-    arg0: &OperandSize,
-    arg1: &CmpOpcode,
-    arg2: &GprMemImm,
-    arg3: Gpr,
-) -> ProducesFlags {
-    let v4 = MInst::CmpRmiR {
-        size: arg0.clone(),
-        opcode: arg1.clone(),
-        src: arg2.clone(),
-        dst: arg3,
-    };
-    let v5 = ProducesFlags::ProducesFlagsSideEffect { inst: v4 };
-    // Rule at src/isa/x64/inst.isle line 2663.
-    return v5;
-}
-
-// Generated as internal constructor for term x64_cmp.
-pub fn constructor_x64_cmp<C: Context>(
-    ctx: &mut C,
-    arg0: &OperandSize,
-    arg1: &GprMemImm,
-    arg2: Gpr,
-) -> ProducesFlags {
-    let v4 = &constructor_cmp_rmi_r(ctx, arg0, &CmpOpcode::Cmp, arg1, arg2);
-    // Rule at src/isa/x64/inst.isle line 2672.
-    return v4.clone();
-}
-
-// Generated as internal constructor for term x64_cmp_imm.
-pub fn constructor_x64_cmp_imm<C: Context>(
-    ctx: &mut C,
-    arg0: &OperandSize,
-    arg1: u32,
-    arg2: Gpr,
-) -> ProducesFlags {
-    let v4 = RegMemImm::Imm { simm32: arg1 };
-    let v5 = &C::gpr_mem_imm_new(ctx, &v4);
-    let v6 = &constructor_cmp_rmi_r(ctx, arg0, &CmpOpcode::Cmp, v5, arg2);
-    // Rule at src/isa/x64/inst.isle line 2677.
-    return v6.clone();
-}
-
-// Generated as internal constructor for term xmm_cmp_rm_r.
-pub fn constructor_xmm_cmp_rm_r<C: Context>(
-    ctx: &mut C,
-    arg0: &SseOpcode,
-    arg1: &XmmMemAligned,
-    arg2: Xmm,
-) -> ProducesFlags {
-    let v3 = MInst::XmmCmpRmR {
-        op: arg0.clone(),
-        src: arg1.clone(),
-        dst: arg2,
-    };
-    let v4 = ProducesFlags::ProducesFlagsSideEffect { inst: v3 };
-    // Rule at src/isa/x64/inst.isle line 2682.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_ucomis.
-pub fn constructor_x64_ucomis<C: Context>(ctx: &mut C, arg0: Value, arg1: Value) -> ProducesFlags {
-    let v1 = C::value_type(ctx, arg0);
-    match v1 {
-        F32 => {
-            let v4 = constructor_put_in_xmm(ctx, arg0);
-            let v5 = &constructor_xmm_to_xmm_mem_aligned(ctx, v4);
-            let v6 = constructor_put_in_xmm(ctx, arg1);
-            let v7 = &constructor_xmm_cmp_rm_r(ctx, &SseOpcode::Ucomiss, v5, v6);
-            // Rule at src/isa/x64/inst.isle line 2688.
-            return v7.clone();
-        }
-        F64 => {
-            let v4 = constructor_put_in_xmm(ctx, arg0);
-            let v5 = &constructor_xmm_to_xmm_mem_aligned(ctx, v4);
-            let v6 = constructor_put_in_xmm(ctx, arg1);
-            let v9 = &constructor_xmm_cmp_rm_r(ctx, &SseOpcode::Ucomisd, v5, v6);
-            // Rule at src/isa/x64/inst.isle line 2692.
-            return v9.clone();
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "x64_ucomis", "src/isa/x64/inst.isle line 2687"
-    )
-}
-
-// Generated as internal constructor for term x64_test.
-pub fn constructor_x64_test<C: Context>(
-    ctx: &mut C,
-    arg0: &OperandSize,
-    arg1: &GprMemImm,
-    arg2: Gpr,
-) -> ProducesFlags {
-    let v4 = &constructor_cmp_rmi_r(ctx, arg0, &CmpOpcode::Test, arg1, arg2);
-    // Rule at src/isa/x64/inst.isle line 2697.
-    return v4.clone();
-}
-
-// Generated as internal constructor for term x64_ptest.
-pub fn constructor_x64_ptest<C: Context>(ctx: &mut C, arg0: &XmmMem, arg1: Xmm) -> ProducesFlags {
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
-    let v4 = &constructor_xmm_cmp_rm_r(ctx, &SseOpcode::Ptest, v3, arg1);
-    // Rule at src/isa/x64/inst.isle line 2702.
-    return v4.clone();
-}
-
-// Generated as internal constructor for term cmove.
-pub fn constructor_cmove<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &CC,
-    arg2: &GprMem,
-    arg3: Gpr,
-) -> ConsumesFlags {
-    let v4 = C::temp_writable_gpr(ctx);
-    let v5 = &C::operand_size_of_type_32_64(ctx, arg0);
-    let v7 = constructor_writable_gpr_to_r_reg(ctx, v4);
-    let v6 = MInst::Cmove {
-        size: v5.clone(),
-        cc: arg1.clone(),
-        consequent: arg2.clone(),
-        alternative: arg3,
-        dst: v4,
-    };
-    let v8 = ConsumesFlags::ConsumesFlagsReturnsReg {
-        inst: v6,
-        result: v7,
-    };
-    // Rule at src/isa/x64/inst.isle line 2709.
-    return v8;
-}
-
-// Generated as internal constructor for term cmove_xmm.
-pub fn constructor_cmove_xmm<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &CC,
-    arg2: &XmmMemAligned,
-    arg3: Xmm,
-) -> ConsumesFlags {
-    let v4 = C::temp_writable_xmm(ctx);
-    let v6 = constructor_writable_xmm_to_r_reg(ctx, v4);
-    let v5 = MInst::XmmCmove {
-        ty: arg0,
-        cc: arg1.clone(),
-        consequent: arg2.clone(),
-        alternative: arg3,
-        dst: v4,
-    };
-    let v7 = ConsumesFlags::ConsumesFlagsReturnsReg {
-        inst: v5,
-        result: v6,
-    };
-    // Rule at src/isa/x64/inst.isle line 2717.
-    return v7;
-}
-
-// Generated as internal constructor for term cmove_from_values.
-pub fn constructor_cmove_from_values<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &CC,
-    arg2: Value,
-    arg3: Value,
-) -> ConsumesFlags {
-    let v1 = &C::type_register_class(ctx, arg0);
-    if let Some(v2) = v1 {
-        match v2 {
-            &RegisterClass::Gpr {
-                single_register: v3,
-            } => {
-                match v3 {
-                    true => {
-                        let v26 = &constructor_put_in_gpr_mem(ctx, arg2);
-                        let v27 = constructor_put_in_gpr(ctx, arg3);
-                        let v28 = &constructor_cmove(ctx, arg0, arg1, v26, v27);
-                        // Rule at src/isa/x64/inst.isle line 2748.
-                        return v28.clone();
-                    }
-                    false => {
-                        if arg0 == I128 {
-                            let v7 = C::put_in_regs(ctx, arg2);
-                            let v8 = C::put_in_regs(ctx, arg3);
-                            let v9 = C::temp_writable_gpr(ctx);
-                            let v10 = C::temp_writable_gpr(ctx);
-                            let v13 = constructor_value_regs_get_gpr(ctx, v7, 0x0);
-                            let v14 = &C::gpr_to_gpr_mem(ctx, v13);
-                            let v15 = constructor_value_regs_get_gpr(ctx, v8, 0x0);
-                            let v18 = constructor_value_regs_get_gpr(ctx, v7, 0x1);
-                            let v19 = &C::gpr_to_gpr_mem(ctx, v18);
-                            let v20 = constructor_value_regs_get_gpr(ctx, v8, 0x1);
-                            let v22 = constructor_writable_gpr_to_r_reg(ctx, v9);
-                            let v23 = constructor_writable_gpr_to_r_reg(ctx, v10);
-                            let v24 = C::value_regs(ctx, v22, v23);
-                            let v16 = MInst::Cmove {
-                                size: OperandSize::Size64,
-                                cc: arg1.clone(),
-                                consequent: v14.clone(),
-                                alternative: v15,
-                                dst: v9,
-                            };
-                            let v21 = MInst::Cmove {
-                                size: OperandSize::Size64,
-                                cc: arg1.clone(),
-                                consequent: v19.clone(),
-                                alternative: v20,
-                                dst: v10,
-                            };
-                            let v25 = ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
-                                inst1: v16,
-                                inst2: v21,
-                                result: v24,
-                            };
-                            // Rule at src/isa/x64/inst.isle line 2727.
-                            return v25;
-                        }
-                    }
-                    _ => {}
-                }
-            }
-            &RegisterClass::Xmm => {
-                let v29 = &constructor_put_in_xmm_mem_aligned(ctx, arg2);
-                let v30 = constructor_put_in_xmm(ctx, arg3);
-                let v31 = &constructor_cmove_xmm(ctx, arg0, arg1, v29, v30);
-                // Rule at src/isa/x64/inst.isle line 2751.
-                return v31.clone();
-            }
-            _ => {}
-        }
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "cmove_from_values", "src/isa/x64/inst.isle line 2726"
-    )
-}
-
-// Generated as internal constructor for term cmove_or.
-pub fn constructor_cmove_or<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &CC,
-    arg2: &CC,
-    arg3: &GprMem,
-    arg4: Gpr,
-) -> ConsumesFlags {
-    let v5 = C::temp_writable_gpr(ctx);
-    let v6 = C::temp_writable_gpr(ctx);
-    let v7 = &C::operand_size_of_type_32_64(ctx, arg0);
-    let v9 = C::writable_gpr_to_gpr(ctx, v6);
-    let v11 = constructor_writable_gpr_to_value_regs(ctx, v5);
-    let v8 = MInst::Cmove {
-        size: v7.clone(),
-        cc: arg1.clone(),
-        consequent: arg3.clone(),
-        alternative: arg4,
-        dst: v6,
-    };
-    let v10 = MInst::Cmove {
-        size: v7.clone(),
-        cc: arg2.clone(),
-        consequent: arg3.clone(),
-        alternative: v9,
-        dst: v5,
-    };
-    let v12 = ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
-        inst1: v8,
-        inst2: v10,
-        result: v11,
-    };
-    // Rule at src/isa/x64/inst.isle line 2758.
-    return v12;
-}
-
-// Generated as internal constructor for term cmove_or_xmm.
-pub fn constructor_cmove_or_xmm<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &CC,
-    arg2: &CC,
-    arg3: &XmmMemAligned,
-    arg4: Xmm,
-) -> ConsumesFlags {
-    let v5 = C::temp_writable_xmm(ctx);
-    let v6 = C::temp_writable_xmm(ctx);
-    let v8 = C::writable_xmm_to_xmm(ctx, v6);
-    let v10 = constructor_writable_xmm_to_value_regs(ctx, v5);
-    let v7 = MInst::XmmCmove {
-        ty: arg0,
-        cc: arg1.clone(),
-        consequent: arg3.clone(),
-        alternative: arg4,
-        dst: v6,
-    };
-    let v9 = MInst::XmmCmove {
-        ty: arg0,
-        cc: arg2.clone(),
-        consequent: arg3.clone(),
-        alternative: v8,
-        dst: v5,
-    };
-    let v11 = ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
-        inst1: v7,
-        inst2: v9,
-        result: v10,
-    };
-    // Rule at src/isa/x64/inst.isle line 2770.
-    return v11;
-}
-
-// Generated as internal constructor for term cmove_or_from_values.
-pub fn constructor_cmove_or_from_values<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &CC,
-    arg2: &CC,
-    arg3: Value,
-    arg4: Value,
-) -> ConsumesFlags {
-    let v1 = &C::type_register_class(ctx, arg0);
-    if let Some(v2) = v1 {
-        match v2 {
-            &RegisterClass::Gpr {
-                single_register: v3,
-            } => {
-                match v3 {
-                    true => {
-                        let v37 = &constructor_put_in_gpr_mem(ctx, arg3);
-                        let v38 = constructor_put_in_gpr(ctx, arg4);
-                        let v39 = &constructor_cmove_or(ctx, arg0, arg1, arg2, v37, v38);
-                        // Rule at src/isa/x64/inst.isle line 2803.
-                        return v39.clone();
-                    }
-                    false => {
-                        if arg0 == I128 {
-                            let v8 = C::put_in_regs(ctx, arg3);
-                            let v9 = C::put_in_regs(ctx, arg4);
-                            let v10 = C::temp_writable_gpr(ctx);
-                            let v11 = C::temp_writable_gpr(ctx);
-                            let v12 = C::temp_writable_gpr(ctx);
-                            let v13 = C::temp_writable_gpr(ctx);
-                            let v16 = constructor_value_regs_get_gpr(ctx, v8, 0x0);
-                            let v17 = &C::gpr_to_gpr_mem(ctx, v16);
-                            let v18 = constructor_value_regs_get_gpr(ctx, v9, 0x0);
-                            let v20 = constructor_value_regs_get_gpr(ctx, v8, 0x0);
-                            let v21 = &C::gpr_to_gpr_mem(ctx, v20);
-                            let v22 = C::writable_gpr_to_gpr(ctx, v12);
-                            let v25 = constructor_value_regs_get_gpr(ctx, v8, 0x1);
-                            let v26 = &C::gpr_to_gpr_mem(ctx, v25);
-                            let v27 = constructor_value_regs_get_gpr(ctx, v9, 0x1);
-                            let v29 = constructor_value_regs_get_gpr(ctx, v8, 0x1);
-                            let v30 = &C::gpr_to_gpr_mem(ctx, v29);
-                            let v31 = C::writable_gpr_to_gpr(ctx, v13);
-                            let v33 = constructor_writable_gpr_to_r_reg(ctx, v10);
-                            let v34 = constructor_writable_gpr_to_r_reg(ctx, v11);
-                            let v35 = C::value_regs(ctx, v33, v34);
-                            let v19 = MInst::Cmove {
-                                size: OperandSize::Size64,
-                                cc: arg1.clone(),
-                                consequent: v17.clone(),
-                                alternative: v18,
-                                dst: v12,
-                            };
-                            let v23 = MInst::Cmove {
-                                size: OperandSize::Size64,
-                                cc: arg2.clone(),
-                                consequent: v21.clone(),
-                                alternative: v22,
-                                dst: v10,
-                            };
-                            let v28 = MInst::Cmove {
-                                size: OperandSize::Size64,
-                                cc: arg1.clone(),
-                                consequent: v26.clone(),
-                                alternative: v27,
-                                dst: v13,
-                            };
-                            let v32 = MInst::Cmove {
-                                size: OperandSize::Size64,
-                                cc: arg2.clone(),
-                                consequent: v30.clone(),
-                                alternative: v31,
-                                dst: v11,
-                            };
-                            let v36 = ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
-                                inst1: v19,
-                                inst2: v23,
-                                inst3: v28,
-                                inst4: v32,
-                                result: v35,
-                            };
-                            // Rule at src/isa/x64/inst.isle line 2784.
-                            return v36;
-                        }
-                    }
-                    _ => {}
-                }
-            }
-            &RegisterClass::Xmm => {
-                let v40 = &constructor_put_in_xmm_mem_aligned(ctx, arg3);
-                let v41 = constructor_put_in_xmm(ctx, arg4);
-                let v42 = &constructor_cmove_or_xmm(ctx, arg0, arg1, arg2, v40, v41);
-                // Rule at src/isa/x64/inst.isle line 2806.
-                return v42.clone();
-            }
-            _ => {}
-        }
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "cmove_or_from_values", "src/isa/x64/inst.isle line 2783"
-    )
-}
-
-// Generated as internal constructor for term x64_setcc.
-pub fn constructor_x64_setcc<C: Context>(ctx: &mut C, arg0: &CC) -> ConsumesFlags {
-    let v1 = C::temp_writable_gpr(ctx);
-    let v3 = constructor_writable_gpr_to_r_reg(ctx, v1);
-    let v2 = MInst::Setcc {
-        cc: arg0.clone(),
-        dst: v1,
-    };
-    let v4 = ConsumesFlags::ConsumesFlagsReturnsReg {
-        inst: v2,
-        result: v3,
-    };
-    // Rule at src/isa/x64/inst.isle line 2811.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_setcc_paired.
-pub fn constructor_x64_setcc_paired<C: Context>(ctx: &mut C, arg0: &CC) -> ConsumesFlags {
-    let v1 = C::temp_writable_gpr(ctx);
-    let v3 = constructor_writable_gpr_to_r_reg(ctx, v1);
-    let v2 = MInst::Setcc {
-        cc: arg0.clone(),
-        dst: v1,
-    };
-    let v4 = ConsumesFlags::ConsumesFlagsReturnsResultWithProducer {
-        inst: v2,
-        result: v3,
-    };
-    // Rule at src/isa/x64/inst.isle line 2820.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_paddb.
-pub fn constructor_x64_paddb<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpaddb, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 2830.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Paddb, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 2828.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_paddw.
-pub fn constructor_x64_paddw<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpaddw, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 2838.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Paddw, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 2836.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_paddd.
-pub fn constructor_x64_paddd<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpaddd, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 2846.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Paddd, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 2844.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_paddq.
-pub fn constructor_x64_paddq<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpaddq, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 2854.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Paddq, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 2852.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_paddsb.
-pub fn constructor_x64_paddsb<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpaddsb, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 2862.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Paddsb, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 2860.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_paddsw.
-pub fn constructor_x64_paddsw<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpaddsw, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 2870.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Paddsw, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 2868.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_phaddw.
-pub fn constructor_x64_phaddw<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vphaddw, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 2878.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Phaddw, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 2876.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_phaddd.
-pub fn constructor_x64_phaddd<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vphaddd, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 2886.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Phaddd, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 2884.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_paddusb.
-pub fn constructor_x64_paddusb<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpaddusb, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 2894.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Paddusb, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 2892.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_paddusw.
-pub fn constructor_x64_paddusw<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpaddusw, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 2902.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Paddusw, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 2900.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_psubb.
-pub fn constructor_x64_psubb<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsubb, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 2910.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Psubb, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 2908.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_psubw.
-pub fn constructor_x64_psubw<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsubw, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 2918.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Psubw, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 2916.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_psubd.
-pub fn constructor_x64_psubd<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsubd, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 2926.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Psubd, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 2924.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_psubq.
-pub fn constructor_x64_psubq<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsubq, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 2934.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Psubq, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 2932.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_psubsb.
-pub fn constructor_x64_psubsb<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsubsb, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 2942.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Psubsb, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 2940.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_psubsw.
-pub fn constructor_x64_psubsw<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsubsw, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 2950.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Psubsw, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 2948.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_psubusb.
-pub fn constructor_x64_psubusb<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsubusb, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 2958.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Psubusb, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 2956.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_psubusw.
-pub fn constructor_x64_psubusw<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsubusw, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 2966.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Psubusw, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 2964.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_pavgb.
-pub fn constructor_x64_pavgb<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpavgb, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 2974.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pavgb, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 2972.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_pavgw.
-pub fn constructor_x64_pavgw<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpavgw, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 2982.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pavgw, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 2980.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_pand.
-pub fn constructor_x64_pand<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpand, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 2990.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pand, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 2988.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_andps.
-pub fn constructor_x64_andps<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vandps, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 2998.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Andps, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 2996.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_andpd.
-pub fn constructor_x64_andpd<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vandpd, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 3006.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Andpd, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3004.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_por.
-pub fn constructor_x64_por<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpor, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 3014.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Por, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3012.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_orps.
-pub fn constructor_x64_orps<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vorps, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 3022.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Orps, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3020.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_orpd.
-pub fn constructor_x64_orpd<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vorpd, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 3030.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Orpd, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3028.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_pxor.
-pub fn constructor_x64_pxor<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpxor, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 3038.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pxor, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3036.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_xorps.
-pub fn constructor_x64_xorps<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vxorps, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 3046.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Xorps, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3044.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_xorpd.
-pub fn constructor_x64_xorpd<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vxorpd, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 3054.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Xorpd, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3052.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_pmullw.
-pub fn constructor_x64_pmullw<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmullw, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 3062.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmullw, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3060.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_pmulld.
-pub fn constructor_x64_pmulld<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmulld, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 3070.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmulld, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3068.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_pmulhw.
-pub fn constructor_x64_pmulhw<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmulhw, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 3078.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmulhw, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3076.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_pmulhrsw.
-pub fn constructor_x64_pmulhrsw<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmulhrsw, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 3086.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmulhrsw, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3084.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_pmulhuw.
-pub fn constructor_x64_pmulhuw<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmulhuw, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 3094.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmulhuw, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3092.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_pmuldq.
-pub fn constructor_x64_pmuldq<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmuldq, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 3102.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmuldq, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3100.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_pmuludq.
-pub fn constructor_x64_pmuludq<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmuludq, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 3110.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmuludq, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3108.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_punpckhwd.
-pub fn constructor_x64_punpckhwd<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpunpckhwd, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 3118.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Punpckhwd, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3116.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_punpcklwd.
-pub fn constructor_x64_punpcklwd<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpunpcklwd, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 3126.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Punpcklwd, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3124.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_punpckldq.
-pub fn constructor_x64_punpckldq<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpunpckldq, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 3134.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Punpckldq, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3132.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_punpckhdq.
-pub fn constructor_x64_punpckhdq<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpunpckhdq, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 3142.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Punpckhdq, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3140.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_punpcklqdq.
-pub fn constructor_x64_punpcklqdq<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpunpcklqdq, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 3150.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Punpcklqdq, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3148.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_punpckhqdq.
-pub fn constructor_x64_punpckhqdq<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpunpckhqdq, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 3158.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Punpckhqdq, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3156.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_unpcklps.
-pub fn constructor_x64_unpcklps<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vunpcklps, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 3166.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Unpcklps, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3164.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_unpckhps.
-pub fn constructor_x64_unpckhps<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vunpckhps, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 3174.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Unpckhps, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3172.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_andnps.
-pub fn constructor_x64_andnps<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vandnps, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 3182.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Andnps, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3180.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_andnpd.
-pub fn constructor_x64_andnpd<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vandnpd, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 3190.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Andnpd, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3188.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_pandn.
-pub fn constructor_x64_pandn<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpandn, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 3198.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pandn, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3196.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_addss.
-pub fn constructor_x64_addss<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v4 = C::use_avx(ctx);
-    if v4 == true {
-        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vaddss, arg0, v6);
-        // Rule at src/isa/x64/inst.isle line 3206.
-        return v7;
-    }
-    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Addss, arg0, arg1);
-    // Rule at src/isa/x64/inst.isle line 3204.
-    return v3;
-}
-
-// Generated as internal constructor for term x64_addsd.
-pub fn constructor_x64_addsd<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v4 = C::use_avx(ctx);
-    if v4 == true {
-        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vaddsd, arg0, v6);
-        // Rule at src/isa/x64/inst.isle line 3214.
-        return v7;
-    }
-    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Addsd, arg0, arg1);
-    // Rule at src/isa/x64/inst.isle line 3212.
-    return v3;
-}
-
-// Generated as internal constructor for term x64_addps.
-pub fn constructor_x64_addps<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vaddps, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 3222.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Addps, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3220.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_addpd.
-pub fn constructor_x64_addpd<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vaddpd, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 3230.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Addpd, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3228.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_subss.
-pub fn constructor_x64_subss<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v4 = C::use_avx(ctx);
-    if v4 == true {
-        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vsubss, arg0, v6);
-        // Rule at src/isa/x64/inst.isle line 3238.
-        return v7;
-    }
-    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Subss, arg0, arg1);
-    // Rule at src/isa/x64/inst.isle line 3236.
-    return v3;
-}
-
-// Generated as internal constructor for term x64_subsd.
-pub fn constructor_x64_subsd<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v4 = C::use_avx(ctx);
-    if v4 == true {
-        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vsubsd, arg0, v6);
-        // Rule at src/isa/x64/inst.isle line 3246.
-        return v7;
-    }
-    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Subsd, arg0, arg1);
-    // Rule at src/isa/x64/inst.isle line 3244.
-    return v3;
-}
-
-// Generated as internal constructor for term x64_subps.
-pub fn constructor_x64_subps<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vsubps, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 3254.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Subps, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3252.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_subpd.
-pub fn constructor_x64_subpd<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vsubpd, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 3262.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Subpd, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3260.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_mulss.
-pub fn constructor_x64_mulss<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v4 = C::use_avx(ctx);
-    if v4 == true {
-        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vmulss, arg0, v6);
-        // Rule at src/isa/x64/inst.isle line 3270.
-        return v7;
-    }
-    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Mulss, arg0, arg1);
-    // Rule at src/isa/x64/inst.isle line 3268.
-    return v3;
-}
-
-// Generated as internal constructor for term x64_mulsd.
-pub fn constructor_x64_mulsd<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v4 = C::use_avx(ctx);
-    if v4 == true {
-        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vmulsd, arg0, v6);
-        // Rule at src/isa/x64/inst.isle line 3278.
-        return v7;
-    }
-    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Mulsd, arg0, arg1);
-    // Rule at src/isa/x64/inst.isle line 3276.
-    return v3;
-}
-
-// Generated as internal constructor for term x64_mulps.
-pub fn constructor_x64_mulps<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vmulps, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 3286.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Mulps, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3284.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_mulpd.
-pub fn constructor_x64_mulpd<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vmulpd, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 3294.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Mulpd, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3292.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_divss.
-pub fn constructor_x64_divss<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v4 = C::use_avx(ctx);
-    if v4 == true {
-        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vdivss, arg0, v6);
-        // Rule at src/isa/x64/inst.isle line 3302.
-        return v7;
-    }
-    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Divss, arg0, arg1);
-    // Rule at src/isa/x64/inst.isle line 3300.
-    return v3;
-}
-
-// Generated as internal constructor for term x64_divsd.
-pub fn constructor_x64_divsd<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v4 = C::use_avx(ctx);
-    if v4 == true {
-        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vdivsd, arg0, v6);
-        // Rule at src/isa/x64/inst.isle line 3310.
-        return v7;
-    }
-    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Divsd, arg0, arg1);
-    // Rule at src/isa/x64/inst.isle line 3308.
-    return v3;
-}
-
-// Generated as internal constructor for term x64_divps.
-pub fn constructor_x64_divps<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vdivps, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 3318.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Divps, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3316.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_divpd.
-pub fn constructor_x64_divpd<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vdivpd, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 3326.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Divpd, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3324.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_blend.
-pub fn constructor_x64_blend<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Xmm,
-    arg2: &XmmMem,
-    arg3: Xmm,
-) -> Xmm {
-    match arg0 {
-        F32X4 => {
-            let v4 = constructor_x64_blendvps(ctx, arg3, arg2, arg1);
-            // Rule at src/isa/x64/inst.isle line 3332.
-            return v4;
-        }
-        F64X2 => {
-            let v5 = constructor_x64_blendvpd(ctx, arg3, arg2, arg1);
-            // Rule at src/isa/x64/inst.isle line 3333.
-            return v5;
-        }
-        _ => {}
-    }
-    let v6 = C::multi_lane(ctx, arg0);
-    if let Some(v7) = v6 {
-        let v10 = constructor_x64_pblendvb(ctx, arg3, arg2, arg1);
-        // Rule at src/isa/x64/inst.isle line 3334.
-        return v10;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "x64_blend", "src/isa/x64/inst.isle line 3331"
-    )
-}
-
-// Generated as internal constructor for term x64_blendvpd.
-pub fn constructor_x64_blendvpd<C: Context>(
-    ctx: &mut C,
-    arg0: Xmm,
-    arg1: &XmmMem,
-    arg2: Xmm,
-) -> Xmm {
-    let v6 = C::use_avx(ctx);
-    if v6 == true {
-        let v8 = constructor_xmm_rmr_blend_vex(ctx, &AvxOpcode::Vblendvpd, arg0, arg1, arg2);
-        // Rule at src/isa/x64/inst.isle line 3340.
-        return v8;
-    }
-    let v4 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v5 = constructor_xmm_rm_r_blend(ctx, &SseOpcode::Blendvpd, arg0, v4, arg2);
-    // Rule at src/isa/x64/inst.isle line 3338.
-    return v5;
-}
-
-// Generated as internal constructor for term x64_blendvps.
-pub fn constructor_x64_blendvps<C: Context>(
-    ctx: &mut C,
-    arg0: Xmm,
-    arg1: &XmmMem,
-    arg2: Xmm,
-) -> Xmm {
-    let v6 = C::use_avx(ctx);
-    if v6 == true {
-        let v8 = constructor_xmm_rmr_blend_vex(ctx, &AvxOpcode::Vblendvps, arg0, arg1, arg2);
-        // Rule at src/isa/x64/inst.isle line 3348.
-        return v8;
-    }
-    let v4 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v5 = constructor_xmm_rm_r_blend(ctx, &SseOpcode::Blendvps, arg0, v4, arg2);
-    // Rule at src/isa/x64/inst.isle line 3346.
-    return v5;
-}
-
-// Generated as internal constructor for term x64_pblendvb.
-pub fn constructor_x64_pblendvb<C: Context>(
-    ctx: &mut C,
-    arg0: Xmm,
-    arg1: &XmmMem,
-    arg2: Xmm,
-) -> Xmm {
-    let v6 = C::use_avx(ctx);
-    if v6 == true {
-        let v8 = constructor_xmm_rmr_blend_vex(ctx, &AvxOpcode::Vpblendvb, arg0, arg1, arg2);
-        // Rule at src/isa/x64/inst.isle line 3356.
-        return v8;
-    }
-    let v4 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v5 = constructor_xmm_rm_r_blend(ctx, &SseOpcode::Pblendvb, arg0, v4, arg2);
-    // Rule at src/isa/x64/inst.isle line 3354.
-    return v5;
-}
-
-// Generated as internal constructor for term x64_pblendw.
-pub fn constructor_x64_pblendw<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem, arg2: u8) -> Xmm {
-    let v8 = C::use_avx(ctx);
-    if v8 == true {
-        let v10 = constructor_xmm_rmr_imm_vex(ctx, &AvxOpcode::Vpblendw, arg0, arg1, arg2);
-        // Rule at src/isa/x64/inst.isle line 3364.
-        return v10;
-    }
-    let v4 = C::xmm_to_reg(ctx, arg0);
-    let v5 = &C::xmm_mem_to_reg_mem(ctx, arg1);
-    let v7 = constructor_xmm_rm_r_imm(ctx, &SseOpcode::Pblendw, v4, v5, arg2, &OperandSize::Size32);
-    // Rule at src/isa/x64/inst.isle line 3362.
-    return v7;
-}
-
-// Generated as internal constructor for term x64_movsd_regmove.
-pub fn constructor_x64_movsd_regmove<C: Context>(ctx: &mut C, arg0: Xmm, arg1: Xmm) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vmovsd, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 3379.
-        return v8;
-    }
-    let v3 = &C::xmm_to_xmm_mem(ctx, arg1);
-    let v4 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Movsd, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3377.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_movss_regmove.
-pub fn constructor_x64_movss_regmove<C: Context>(ctx: &mut C, arg0: Xmm, arg1: Xmm) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vmovss, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 3386.
-        return v8;
-    }
-    let v3 = &C::xmm_to_xmm_mem(ctx, arg1);
-    let v4 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Movss, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3384.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_movlhps.
-pub fn constructor_x64_movlhps<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vmovlhps, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 3394.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Movlhps, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3392.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_pmaxs.
-pub fn constructor_x64_pmaxs<C: Context>(ctx: &mut C, arg0: Type, arg1: Xmm, arg2: &XmmMem) -> Xmm {
-    match arg0 {
-        I8X16 => {
-            let v3 = constructor_x64_pmaxsb(ctx, arg1, arg2);
-            // Rule at src/isa/x64/inst.isle line 3400.
-            return v3;
-        }
-        I16X8 => {
-            let v4 = constructor_x64_pmaxsw(ctx, arg1, arg2);
-            // Rule at src/isa/x64/inst.isle line 3401.
-            return v4;
-        }
-        I32X4 => {
-            let v5 = constructor_x64_pmaxsd(ctx, arg1, arg2);
-            // Rule at src/isa/x64/inst.isle line 3402.
-            return v5;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "x64_pmaxs", "src/isa/x64/inst.isle line 3399"
-    )
-}
-
-// Generated as internal constructor for term x64_pmaxsb.
-pub fn constructor_x64_pmaxsb<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmaxsb, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 3406.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmaxsb, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3405.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_pmaxsw.
-pub fn constructor_x64_pmaxsw<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmaxsw, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 3411.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmaxsw, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3410.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_pmaxsd.
-pub fn constructor_x64_pmaxsd<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmaxsd, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 3416.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmaxsd, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3415.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_pmins.
-pub fn constructor_x64_pmins<C: Context>(ctx: &mut C, arg0: Type, arg1: Xmm, arg2: &XmmMem) -> Xmm {
-    match arg0 {
-        I8X16 => {
-            let v3 = constructor_x64_pminsb(ctx, arg1, arg2);
-            // Rule at src/isa/x64/inst.isle line 3422.
-            return v3;
-        }
-        I16X8 => {
-            let v4 = constructor_x64_pminsw(ctx, arg1, arg2);
-            // Rule at src/isa/x64/inst.isle line 3423.
-            return v4;
-        }
-        I32X4 => {
-            let v5 = constructor_x64_pminsd(ctx, arg1, arg2);
-            // Rule at src/isa/x64/inst.isle line 3424.
-            return v5;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "x64_pmins", "src/isa/x64/inst.isle line 3421"
-    )
-}
-
-// Generated as internal constructor for term x64_pminsb.
-pub fn constructor_x64_pminsb<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpminsb, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 3428.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pminsb, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3427.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_pminsw.
-pub fn constructor_x64_pminsw<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpminsw, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 3433.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pminsw, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3432.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_pminsd.
-pub fn constructor_x64_pminsd<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpminsd, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 3438.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pminsd, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3437.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_pmaxu.
-pub fn constructor_x64_pmaxu<C: Context>(ctx: &mut C, arg0: Type, arg1: Xmm, arg2: &XmmMem) -> Xmm {
-    match arg0 {
-        I8X16 => {
-            let v3 = constructor_x64_pmaxub(ctx, arg1, arg2);
-            // Rule at src/isa/x64/inst.isle line 3444.
-            return v3;
-        }
-        I16X8 => {
-            let v4 = constructor_x64_pmaxuw(ctx, arg1, arg2);
-            // Rule at src/isa/x64/inst.isle line 3445.
-            return v4;
-        }
-        I32X4 => {
-            let v5 = constructor_x64_pmaxud(ctx, arg1, arg2);
-            // Rule at src/isa/x64/inst.isle line 3446.
-            return v5;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "x64_pmaxu", "src/isa/x64/inst.isle line 3443"
-    )
-}
-
-// Generated as internal constructor for term x64_pmaxub.
-pub fn constructor_x64_pmaxub<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmaxub, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 3450.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmaxub, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3449.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_pmaxuw.
-pub fn constructor_x64_pmaxuw<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmaxuw, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 3455.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmaxuw, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3454.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_pmaxud.
-pub fn constructor_x64_pmaxud<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmaxud, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 3460.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmaxud, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3459.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_pminu.
-pub fn constructor_x64_pminu<C: Context>(ctx: &mut C, arg0: Type, arg1: Xmm, arg2: &XmmMem) -> Xmm {
-    match arg0 {
-        I8X16 => {
-            let v3 = constructor_x64_pminub(ctx, arg1, arg2);
-            // Rule at src/isa/x64/inst.isle line 3466.
-            return v3;
-        }
-        I16X8 => {
-            let v4 = constructor_x64_pminuw(ctx, arg1, arg2);
-            // Rule at src/isa/x64/inst.isle line 3467.
-            return v4;
-        }
-        I32X4 => {
-            let v5 = constructor_x64_pminud(ctx, arg1, arg2);
-            // Rule at src/isa/x64/inst.isle line 3468.
-            return v5;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "x64_pminu", "src/isa/x64/inst.isle line 3465"
-    )
-}
-
-// Generated as internal constructor for term x64_pminub.
-pub fn constructor_x64_pminub<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpminub, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 3472.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pminub, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3471.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_pminuw.
-pub fn constructor_x64_pminuw<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpminuw, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 3477.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pminuw, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3476.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_pminud.
-pub fn constructor_x64_pminud<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpminud, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 3482.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pminud, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3481.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_punpcklbw.
-pub fn constructor_x64_punpcklbw<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpunpcklbw, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 3490.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Punpcklbw, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3488.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_punpckhbw.
-pub fn constructor_x64_punpckhbw<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpunpckhbw, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 3498.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Punpckhbw, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3496.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_packsswb.
-pub fn constructor_x64_packsswb<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpacksswb, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 3506.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Packsswb, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3504.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_packssdw.
-pub fn constructor_x64_packssdw<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpackssdw, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 3514.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Packssdw, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3512.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_packuswb.
-pub fn constructor_x64_packuswb<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpackuswb, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 3522.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Packuswb, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3520.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_packusdw.
-pub fn constructor_x64_packusdw<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpackusdw, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 3530.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Packusdw, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3528.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_palignr.
-pub fn constructor_x64_palignr<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem, arg2: u8) -> Xmm {
-    let v8 = C::use_avx(ctx);
-    if v8 == true {
-        let v10 = constructor_xmm_rmr_imm_vex(ctx, &AvxOpcode::Vpalignr, arg0, arg1, arg2);
-        // Rule at src/isa/x64/inst.isle line 3542.
-        return v10;
-    }
-    let v4 = C::xmm_to_reg(ctx, arg0);
-    let v5 = &C::xmm_mem_to_reg_mem(ctx, arg1);
-    let v7 = constructor_xmm_rm_r_imm(ctx, &SseOpcode::Palignr, v4, v5, arg2, &OperandSize::Size32);
-    // Rule at src/isa/x64/inst.isle line 3536.
-    return v7;
-}
-
-// Generated as internal constructor for term x64_cmpp.
-pub fn constructor_x64_cmpp<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Xmm,
-    arg2: &XmmMem,
-    arg3: &FcmpImm,
-) -> Xmm {
-    match arg0 {
-        F32X4 => {
-            let v4 = constructor_x64_cmpps(ctx, arg1, arg2, arg3);
-            // Rule at src/isa/x64/inst.isle line 3548.
-            return v4;
-        }
-        F64X2 => {
-            let v5 = constructor_x64_cmppd(ctx, arg1, arg2, arg3);
-            // Rule at src/isa/x64/inst.isle line 3549.
-            return v5;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "x64_cmpp", "src/isa/x64/inst.isle line 3547"
-    )
-}
-
-// Generated as internal constructor for term x64_cmpps.
-pub fn constructor_x64_cmpps<C: Context>(
-    ctx: &mut C,
-    arg0: Xmm,
-    arg1: &XmmMem,
-    arg2: &FcmpImm,
-) -> Xmm {
-    let v9 = C::use_avx(ctx);
-    if v9 == true {
-        let v11 = C::encode_fcmp_imm(ctx, arg2);
-        let v12 = constructor_xmm_rmr_imm_vex(ctx, &AvxOpcode::Vcmpps, arg0, arg1, v11);
-        // Rule at src/isa/x64/inst.isle line 3558.
-        return v12;
-    }
-    let v4 = C::xmm_to_reg(ctx, arg0);
-    let v5 = &C::xmm_mem_to_reg_mem(ctx, arg1);
-    let v6 = C::encode_fcmp_imm(ctx, arg2);
-    let v8 = constructor_xmm_rm_r_imm(ctx, &SseOpcode::Cmpps, v4, v5, v6, &OperandSize::Size32);
-    // Rule at src/isa/x64/inst.isle line 3552.
-    return v8;
-}
-
-// Generated as internal constructor for term x64_cmppd.
-pub fn constructor_x64_cmppd<C: Context>(
-    ctx: &mut C,
-    arg0: Xmm,
-    arg1: &XmmMem,
-    arg2: &FcmpImm,
-) -> Xmm {
-    let v9 = C::use_avx(ctx);
-    if v9 == true {
-        let v11 = C::encode_fcmp_imm(ctx, arg2);
-        let v12 = constructor_xmm_rmr_imm_vex(ctx, &AvxOpcode::Vcmppd, arg0, arg1, v11);
-        // Rule at src/isa/x64/inst.isle line 3575.
-        return v12;
-    }
-    let v4 = C::xmm_to_reg(ctx, arg0);
-    let v5 = &C::xmm_mem_to_reg_mem(ctx, arg1);
-    let v6 = C::encode_fcmp_imm(ctx, arg2);
-    let v8 = constructor_xmm_rm_r_imm(ctx, &SseOpcode::Cmppd, v4, v5, v6, &OperandSize::Size32);
-    // Rule at src/isa/x64/inst.isle line 3569.
-    return v8;
-}
-
-// Generated as internal constructor for term x64_pinsrb.
-pub fn constructor_x64_pinsrb<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &GprMem, arg2: u8) -> Xmm {
-    let v8 = C::use_avx(ctx);
-    if v8 == true {
-        let v10 = constructor_xmm_vex_pinsr(ctx, &AvxOpcode::Vpinsrb, arg0, arg1, arg2);
-        // Rule at src/isa/x64/inst.isle line 3590.
-        return v10;
-    }
-    let v4 = C::xmm_to_reg(ctx, arg0);
-    let v5 = &C::gpr_mem_to_reg_mem(ctx, arg1);
-    let v7 = constructor_xmm_rm_r_imm(ctx, &SseOpcode::Pinsrb, v4, v5, arg2, &OperandSize::Size32);
-    // Rule at src/isa/x64/inst.isle line 3584.
-    return v7;
-}
-
-// Generated as internal constructor for term x64_pinsrw.
-pub fn constructor_x64_pinsrw<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &GprMem, arg2: u8) -> Xmm {
-    let v8 = C::use_avx(ctx);
-    if v8 == true {
-        let v10 = constructor_xmm_vex_pinsr(ctx, &AvxOpcode::Vpinsrw, arg0, arg1, arg2);
-        // Rule at src/isa/x64/inst.isle line 3602.
-        return v10;
-    }
-    let v4 = C::xmm_to_reg(ctx, arg0);
-    let v5 = &C::gpr_mem_to_reg_mem(ctx, arg1);
-    let v7 = constructor_xmm_rm_r_imm(ctx, &SseOpcode::Pinsrw, v4, v5, arg2, &OperandSize::Size32);
-    // Rule at src/isa/x64/inst.isle line 3596.
-    return v7;
-}
-
-// Generated as internal constructor for term x64_pinsrd.
-pub fn constructor_x64_pinsrd<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &GprMem, arg2: u8) -> Xmm {
-    let v8 = C::use_avx(ctx);
-    if v8 == true {
-        let v10 = constructor_xmm_vex_pinsr(ctx, &AvxOpcode::Vpinsrd, arg0, arg1, arg2);
-        // Rule at src/isa/x64/inst.isle line 3614.
-        return v10;
-    }
-    let v4 = C::xmm_to_reg(ctx, arg0);
-    let v5 = &C::gpr_mem_to_reg_mem(ctx, arg1);
-    let v7 = constructor_xmm_rm_r_imm(ctx, &SseOpcode::Pinsrd, v4, v5, arg2, &OperandSize::Size32);
-    // Rule at src/isa/x64/inst.isle line 3608.
-    return v7;
-}
-
-// Generated as internal constructor for term x64_pinsrq.
-pub fn constructor_x64_pinsrq<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &GprMem, arg2: u8) -> Xmm {
-    let v8 = C::use_avx(ctx);
-    if v8 == true {
-        let v10 = constructor_xmm_vex_pinsr(ctx, &AvxOpcode::Vpinsrq, arg0, arg1, arg2);
-        // Rule at src/isa/x64/inst.isle line 3626.
-        return v10;
-    }
-    let v4 = C::xmm_to_reg(ctx, arg0);
-    let v5 = &C::gpr_mem_to_reg_mem(ctx, arg1);
-    let v7 = constructor_xmm_rm_r_imm(ctx, &SseOpcode::Pinsrd, v4, v5, arg2, &OperandSize::Size64);
-    // Rule at src/isa/x64/inst.isle line 3620.
-    return v7;
-}
-
-// Generated as internal constructor for term x64_roundss.
-pub fn constructor_x64_roundss<C: Context>(ctx: &mut C, arg0: &XmmMem, arg1: &RoundImm) -> Xmm {
-    let v6 = C::use_avx(ctx);
-    if v6 == true {
-        let v8 = C::encode_round_imm(ctx, arg1);
-        let v9 = constructor_xmm_unary_rm_r_imm_vex(ctx, &AvxOpcode::Vroundss, arg0, v8);
-        // Rule at src/isa/x64/inst.isle line 3634.
-        return v9;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
-    let v4 = C::encode_round_imm(ctx, arg1);
-    let v5 = constructor_xmm_unary_rm_r_imm(ctx, &SseOpcode::Roundss, v3, v4);
-    // Rule at src/isa/x64/inst.isle line 3632.
-    return v5;
-}
-
-// Generated as internal constructor for term x64_roundsd.
-pub fn constructor_x64_roundsd<C: Context>(ctx: &mut C, arg0: &XmmMem, arg1: &RoundImm) -> Xmm {
-    let v6 = C::use_avx(ctx);
-    if v6 == true {
-        let v8 = C::encode_round_imm(ctx, arg1);
-        let v9 = constructor_xmm_unary_rm_r_imm_vex(ctx, &AvxOpcode::Vroundsd, arg0, v8);
-        // Rule at src/isa/x64/inst.isle line 3642.
-        return v9;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
-    let v4 = C::encode_round_imm(ctx, arg1);
-    let v5 = constructor_xmm_unary_rm_r_imm(ctx, &SseOpcode::Roundsd, v3, v4);
-    // Rule at src/isa/x64/inst.isle line 3640.
-    return v5;
-}
-
-// Generated as internal constructor for term x64_roundps.
-pub fn constructor_x64_roundps<C: Context>(ctx: &mut C, arg0: &XmmMem, arg1: &RoundImm) -> Xmm {
-    let v6 = C::use_avx(ctx);
-    if v6 == true {
-        let v8 = C::encode_round_imm(ctx, arg1);
-        let v9 = constructor_xmm_unary_rm_r_imm_vex(ctx, &AvxOpcode::Vroundps, arg0, v8);
-        // Rule at src/isa/x64/inst.isle line 3650.
-        return v9;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
-    let v4 = C::encode_round_imm(ctx, arg1);
-    let v5 = constructor_xmm_unary_rm_r_imm(ctx, &SseOpcode::Roundps, v3, v4);
-    // Rule at src/isa/x64/inst.isle line 3648.
-    return v5;
-}
-
-// Generated as internal constructor for term x64_roundpd.
-pub fn constructor_x64_roundpd<C: Context>(ctx: &mut C, arg0: &XmmMem, arg1: &RoundImm) -> Xmm {
-    let v6 = C::use_avx(ctx);
-    if v6 == true {
-        let v8 = C::encode_round_imm(ctx, arg1);
-        let v9 = constructor_xmm_unary_rm_r_imm_vex(ctx, &AvxOpcode::Vroundpd, arg0, v8);
-        // Rule at src/isa/x64/inst.isle line 3658.
-        return v9;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
-    let v4 = C::encode_round_imm(ctx, arg1);
-    let v5 = constructor_xmm_unary_rm_r_imm(ctx, &SseOpcode::Roundpd, v3, v4);
-    // Rule at src/isa/x64/inst.isle line 3656.
-    return v5;
-}
-
-// Generated as internal constructor for term x64_pmaddwd.
-pub fn constructor_x64_pmaddwd<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmaddwd, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 3666.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmaddwd, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3664.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_pmaddubsw.
-pub fn constructor_x64_pmaddubsw<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmaddubsw, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 3673.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmaddubsw, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3671.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_insertps.
-pub fn constructor_x64_insertps<C: Context>(
-    ctx: &mut C,
-    arg0: Xmm,
-    arg1: &XmmMem,
-    arg2: u8,
-) -> Xmm {
-    let v8 = C::use_avx(ctx);
-    if v8 == true {
-        let v10 = constructor_xmm_rmr_imm_vex(ctx, &AvxOpcode::Vinsertps, arg0, arg1, arg2);
-        // Rule at src/isa/x64/inst.isle line 3685.
-        return v10;
-    }
-    let v4 = C::xmm_to_reg(ctx, arg0);
-    let v5 = &C::xmm_mem_to_reg_mem(ctx, arg1);
-    let v7 = constructor_xmm_rm_r_imm(
-        ctx,
-        &SseOpcode::Insertps,
-        v4,
-        v5,
-        arg2,
-        &OperandSize::Size32,
-    );
-    // Rule at src/isa/x64/inst.isle line 3679.
-    return v7;
-}
-
-// Generated as internal constructor for term x64_pshufd.
-pub fn constructor_x64_pshufd<C: Context>(ctx: &mut C, arg0: &XmmMem, arg1: u8) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = constructor_xmm_unary_rm_r_imm_vex(ctx, &AvxOpcode::Vpshufd, arg0, arg1);
-        // Rule at src/isa/x64/inst.isle line 3693.
-        return v7;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
-    let v4 = constructor_xmm_unary_rm_r_imm(ctx, &SseOpcode::Pshufd, v3, arg1);
-    // Rule at src/isa/x64/inst.isle line 3691.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_pshufb.
-pub fn constructor_x64_pshufb<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpshufb, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 3701.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pshufb, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3699.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_pshuflw.
-pub fn constructor_x64_pshuflw<C: Context>(ctx: &mut C, arg0: &XmmMem, arg1: u8) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = constructor_xmm_unary_rm_r_imm_vex(ctx, &AvxOpcode::Vpshuflw, arg0, arg1);
-        // Rule at src/isa/x64/inst.isle line 3709.
-        return v7;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
-    let v4 = constructor_xmm_unary_rm_r_imm(ctx, &SseOpcode::Pshuflw, v3, arg1);
-    // Rule at src/isa/x64/inst.isle line 3707.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_pshufhw.
-pub fn constructor_x64_pshufhw<C: Context>(ctx: &mut C, arg0: &XmmMem, arg1: u8) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = constructor_xmm_unary_rm_r_imm_vex(ctx, &AvxOpcode::Vpshufhw, arg0, arg1);
-        // Rule at src/isa/x64/inst.isle line 3717.
-        return v7;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
-    let v4 = constructor_xmm_unary_rm_r_imm(ctx, &SseOpcode::Pshufhw, v3, arg1);
-    // Rule at src/isa/x64/inst.isle line 3715.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_shufps.
-pub fn constructor_x64_shufps<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem, arg2: u8) -> Xmm {
-    let v8 = C::use_avx(ctx);
-    if v8 == true {
-        let v10 = constructor_xmm_rmr_imm_vex(ctx, &AvxOpcode::Vshufps, arg0, arg1, arg2);
-        // Rule at src/isa/x64/inst.isle line 3729.
-        return v10;
-    }
-    let v4 = C::xmm_to_reg(ctx, arg0);
-    let v5 = &C::xmm_mem_to_reg_mem(ctx, arg1);
-    let v7 = constructor_xmm_rm_r_imm(ctx, &SseOpcode::Shufps, v4, v5, arg2, &OperandSize::Size32);
-    // Rule at src/isa/x64/inst.isle line 3723.
-    return v7;
-}
-
-// Generated as internal constructor for term x64_pabsb.
-pub fn constructor_x64_pabsb<C: Context>(ctx: &mut C, arg0: &XmmMem) -> Xmm {
-    let v4 = C::use_avx(ctx);
-    if v4 == true {
-        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vpabsb, arg0);
-        // Rule at src/isa/x64/inst.isle line 3737.
-        return v6;
-    }
-    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
-    let v3 = constructor_xmm_unary_rm_r(ctx, &SseOpcode::Pabsb, v2);
-    // Rule at src/isa/x64/inst.isle line 3735.
-    return v3;
-}
-
-// Generated as internal constructor for term x64_pabsw.
-pub fn constructor_x64_pabsw<C: Context>(ctx: &mut C, arg0: &XmmMem) -> Xmm {
-    let v4 = C::use_avx(ctx);
-    if v4 == true {
-        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vpabsw, arg0);
-        // Rule at src/isa/x64/inst.isle line 3745.
-        return v6;
-    }
-    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
-    let v3 = constructor_xmm_unary_rm_r(ctx, &SseOpcode::Pabsw, v2);
-    // Rule at src/isa/x64/inst.isle line 3743.
-    return v3;
-}
-
-// Generated as internal constructor for term x64_pabsd.
-pub fn constructor_x64_pabsd<C: Context>(ctx: &mut C, arg0: &XmmMem) -> Xmm {
-    let v4 = C::use_avx(ctx);
-    if v4 == true {
-        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vpabsd, arg0);
-        // Rule at src/isa/x64/inst.isle line 3753.
-        return v6;
-    }
-    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
-    let v3 = constructor_xmm_unary_rm_r(ctx, &SseOpcode::Pabsd, v2);
-    // Rule at src/isa/x64/inst.isle line 3751.
-    return v3;
-}
-
-// Generated as internal constructor for term x64_vcvtudq2ps.
-pub fn constructor_x64_vcvtudq2ps<C: Context>(ctx: &mut C, arg0: &XmmMem) -> Xmm {
-    let v2 = constructor_xmm_unary_rm_r_evex(ctx, &Avx512Opcode::Vcvtudq2ps, arg0);
-    // Rule at src/isa/x64/inst.isle line 3759.
-    return v2;
-}
-
-// Generated as internal constructor for term x64_vpabsq.
-pub fn constructor_x64_vpabsq<C: Context>(ctx: &mut C, arg0: &XmmMem) -> Xmm {
-    let v2 = constructor_xmm_unary_rm_r_evex(ctx, &Avx512Opcode::Vpabsq, arg0);
-    // Rule at src/isa/x64/inst.isle line 3764.
-    return v2;
-}
-
-// Generated as internal constructor for term x64_vpopcntb.
-pub fn constructor_x64_vpopcntb<C: Context>(ctx: &mut C, arg0: &XmmMem) -> Xmm {
-    let v2 = constructor_xmm_unary_rm_r_evex(ctx, &Avx512Opcode::Vpopcntb, arg0);
-    // Rule at src/isa/x64/inst.isle line 3769.
-    return v2;
-}
-
-// Generated as internal constructor for term x64_vpmullq.
-pub fn constructor_x64_vpmullq<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v3 = constructor_xmm_rm_r_evex(ctx, &Avx512Opcode::Vpmullq, arg0, arg1);
-    // Rule at src/isa/x64/inst.isle line 3776.
-    return v3;
-}
-
-// Generated as internal constructor for term x64_vpermi2b.
-pub fn constructor_x64_vpermi2b<C: Context>(
-    ctx: &mut C,
-    arg0: Xmm,
-    arg1: Xmm,
-    arg2: &XmmMem,
-) -> Xmm {
-    let v3 = C::temp_writable_xmm(ctx);
-    let v5 = MInst::XmmRmREvex3 {
-        op: Avx512Opcode::Vpermi2b,
-        src1: arg0,
-        src2: arg1,
-        src3: arg2.clone(),
-        dst: v3,
-    };
-    let v6 = C::emit(ctx, &v5);
-    let v7 = C::writable_xmm_to_xmm(ctx, v3);
-    // Rule at src/isa/x64/inst.isle line 3785.
-    return v7;
-}
-
-// Generated as internal constructor for term mulhi_u.
-pub fn constructor_mulhi_u<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Gpr,
-    arg2: &GprMem,
-) -> ValueRegs {
-    let v4 = constructor_mul_hi(ctx, arg0, false, arg1, arg2);
-    // Rule at src/isa/x64/inst.isle line 3797.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_psllw.
-pub fn constructor_x64_psllw<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMemImm) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsllw, arg0, arg1);
-        // Rule at src/isa/x64/inst.isle line 3804.
-        return v7;
-    }
-    let v3 = &C::xmm_mem_imm_to_xmm_mem_aligned_imm(ctx, arg1);
-    let v4 = constructor_xmm_rmi_xmm(ctx, &SseOpcode::Psllw, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3802.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_pslld.
-pub fn constructor_x64_pslld<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMemImm) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpslld, arg0, arg1);
-        // Rule at src/isa/x64/inst.isle line 3812.
-        return v7;
-    }
-    let v3 = &C::xmm_mem_imm_to_xmm_mem_aligned_imm(ctx, arg1);
-    let v4 = constructor_xmm_rmi_xmm(ctx, &SseOpcode::Pslld, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3810.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_psllq.
-pub fn constructor_x64_psllq<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMemImm) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsllq, arg0, arg1);
-        // Rule at src/isa/x64/inst.isle line 3820.
-        return v7;
-    }
-    let v3 = &C::xmm_mem_imm_to_xmm_mem_aligned_imm(ctx, arg1);
-    let v4 = constructor_xmm_rmi_xmm(ctx, &SseOpcode::Psllq, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3818.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_psrlw.
-pub fn constructor_x64_psrlw<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMemImm) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsrlw, arg0, arg1);
-        // Rule at src/isa/x64/inst.isle line 3828.
-        return v7;
-    }
-    let v3 = &C::xmm_mem_imm_to_xmm_mem_aligned_imm(ctx, arg1);
-    let v4 = constructor_xmm_rmi_xmm(ctx, &SseOpcode::Psrlw, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3826.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_psrld.
-pub fn constructor_x64_psrld<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMemImm) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsrld, arg0, arg1);
-        // Rule at src/isa/x64/inst.isle line 3836.
-        return v7;
-    }
-    let v3 = &C::xmm_mem_imm_to_xmm_mem_aligned_imm(ctx, arg1);
-    let v4 = constructor_xmm_rmi_xmm(ctx, &SseOpcode::Psrld, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3834.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_psrlq.
-pub fn constructor_x64_psrlq<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMemImm) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsrlq, arg0, arg1);
-        // Rule at src/isa/x64/inst.isle line 3844.
-        return v7;
-    }
-    let v3 = &C::xmm_mem_imm_to_xmm_mem_aligned_imm(ctx, arg1);
-    let v4 = constructor_xmm_rmi_xmm(ctx, &SseOpcode::Psrlq, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3842.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_psraw.
-pub fn constructor_x64_psraw<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMemImm) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsraw, arg0, arg1);
-        // Rule at src/isa/x64/inst.isle line 3852.
-        return v7;
-    }
-    let v3 = &C::xmm_mem_imm_to_xmm_mem_aligned_imm(ctx, arg1);
-    let v4 = constructor_xmm_rmi_xmm(ctx, &SseOpcode::Psraw, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3850.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_psrad.
-pub fn constructor_x64_psrad<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMemImm) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsrad, arg0, arg1);
-        // Rule at src/isa/x64/inst.isle line 3860.
-        return v7;
-    }
-    let v3 = &C::xmm_mem_imm_to_xmm_mem_aligned_imm(ctx, arg1);
-    let v4 = constructor_xmm_rmi_xmm(ctx, &SseOpcode::Psrad, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 3858.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_vpsraq.
-pub fn constructor_x64_vpsraq<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v3 = constructor_xmm_rm_r_evex(ctx, &Avx512Opcode::Vpsraq, arg0, arg1);
-    // Rule at src/isa/x64/inst.isle line 3866.
-    return v3;
-}
-
-// Generated as internal constructor for term x64_vpsraq_imm.
-pub fn constructor_x64_vpsraq_imm<C: Context>(ctx: &mut C, arg0: &XmmMem, arg1: u8) -> Xmm {
-    let v3 = constructor_xmm_unary_rm_r_imm_evex(ctx, &Avx512Opcode::VpsraqImm, arg0, arg1);
-    // Rule at src/isa/x64/inst.isle line 3871.
-    return v3;
-}
-
-// Generated as internal constructor for term x64_pextrb.
-pub fn constructor_x64_pextrb<C: Context>(ctx: &mut C, arg0: Xmm, arg1: u8) -> Gpr {
-    let v4 = C::use_avx(ctx);
-    if v4 == true {
-        let v6 = constructor_xmm_to_gpr_imm_vex(ctx, &AvxOpcode::Vpextrb, arg0, arg1);
-        // Rule at src/isa/x64/inst.isle line 3878.
-        return v6;
-    }
-    let v3 = constructor_xmm_to_gpr_imm(ctx, &SseOpcode::Pextrb, arg0, arg1);
-    // Rule at src/isa/x64/inst.isle line 3876.
-    return v3;
-}
-
-// Generated as internal constructor for term x64_pextrb_store.
-pub fn constructor_x64_pextrb_store<C: Context>(
-    ctx: &mut C,
-    arg0: &SyntheticAmode,
-    arg1: Xmm,
-    arg2: u8,
-) -> SideEffectNoResult {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &constructor_xmm_movrm_imm_vex(ctx, &AvxOpcode::Vpextrb, arg0, arg1, arg2);
-        // Rule at src/isa/x64/inst.isle line 3885.
-        return v7.clone();
-    }
-    let v4 = &constructor_xmm_movrm_imm(ctx, &SseOpcode::Pextrb, arg0, arg1, arg2);
-    // Rule at src/isa/x64/inst.isle line 3883.
-    return v4.clone();
-}
-
-// Generated as internal constructor for term x64_pextrw.
-pub fn constructor_x64_pextrw<C: Context>(ctx: &mut C, arg0: Xmm, arg1: u8) -> Gpr {
-    let v4 = C::use_avx(ctx);
-    if v4 == true {
-        let v6 = constructor_xmm_to_gpr_imm_vex(ctx, &AvxOpcode::Vpextrw, arg0, arg1);
-        // Rule at src/isa/x64/inst.isle line 3893.
-        return v6;
-    }
-    let v3 = constructor_xmm_to_gpr_imm(ctx, &SseOpcode::Pextrw, arg0, arg1);
-    // Rule at src/isa/x64/inst.isle line 3891.
-    return v3;
-}
-
-// Generated as internal constructor for term x64_pextrw_store.
-pub fn constructor_x64_pextrw_store<C: Context>(
-    ctx: &mut C,
-    arg0: &SyntheticAmode,
-    arg1: Xmm,
-    arg2: u8,
-) -> SideEffectNoResult {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &constructor_xmm_movrm_imm_vex(ctx, &AvxOpcode::Vpextrw, arg0, arg1, arg2);
-        // Rule at src/isa/x64/inst.isle line 3900.
-        return v7.clone();
-    }
-    let v4 = &constructor_xmm_movrm_imm(ctx, &SseOpcode::Pextrw, arg0, arg1, arg2);
-    // Rule at src/isa/x64/inst.isle line 3898.
-    return v4.clone();
-}
-
-// Generated as internal constructor for term x64_pextrd.
-pub fn constructor_x64_pextrd<C: Context>(ctx: &mut C, arg0: Xmm, arg1: u8) -> Gpr {
-    let v4 = C::use_avx(ctx);
-    if v4 == true {
-        let v6 = constructor_xmm_to_gpr_imm_vex(ctx, &AvxOpcode::Vpextrd, arg0, arg1);
-        // Rule at src/isa/x64/inst.isle line 3908.
-        return v6;
-    }
-    let v3 = constructor_xmm_to_gpr_imm(ctx, &SseOpcode::Pextrd, arg0, arg1);
-    // Rule at src/isa/x64/inst.isle line 3906.
-    return v3;
-}
-
-// Generated as internal constructor for term x64_pextrd_store.
-pub fn constructor_x64_pextrd_store<C: Context>(
-    ctx: &mut C,
-    arg0: &SyntheticAmode,
-    arg1: Xmm,
-    arg2: u8,
-) -> SideEffectNoResult {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &constructor_xmm_movrm_imm_vex(ctx, &AvxOpcode::Vpextrd, arg0, arg1, arg2);
-        // Rule at src/isa/x64/inst.isle line 3915.
-        return v7.clone();
-    }
-    let v4 = &constructor_xmm_movrm_imm(ctx, &SseOpcode::Pextrd, arg0, arg1, arg2);
-    // Rule at src/isa/x64/inst.isle line 3913.
-    return v4.clone();
-}
-
-// Generated as internal constructor for term x64_pextrq.
-pub fn constructor_x64_pextrq<C: Context>(ctx: &mut C, arg0: Xmm, arg1: u8) -> Gpr {
-    let v4 = C::use_avx(ctx);
-    if v4 == true {
-        let v6 = constructor_xmm_to_gpr_imm_vex(ctx, &AvxOpcode::Vpextrq, arg0, arg1);
-        // Rule at src/isa/x64/inst.isle line 3923.
-        return v6;
-    }
-    let v3 = constructor_xmm_to_gpr_imm(ctx, &SseOpcode::Pextrq, arg0, arg1);
-    // Rule at src/isa/x64/inst.isle line 3921.
-    return v3;
-}
-
-// Generated as internal constructor for term x64_pextrq_store.
-pub fn constructor_x64_pextrq_store<C: Context>(
-    ctx: &mut C,
-    arg0: &SyntheticAmode,
-    arg1: Xmm,
-    arg2: u8,
-) -> SideEffectNoResult {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &constructor_xmm_movrm_imm_vex(ctx, &AvxOpcode::Vpextrq, arg0, arg1, arg2);
-        // Rule at src/isa/x64/inst.isle line 3930.
-        return v7.clone();
-    }
-    let v4 = &constructor_xmm_movrm_imm(ctx, &SseOpcode::Pextrq, arg0, arg1, arg2);
-    // Rule at src/isa/x64/inst.isle line 3928.
-    return v4.clone();
-}
-
-// Generated as internal constructor for term x64_pmovmskb.
-pub fn constructor_x64_pmovmskb<C: Context>(ctx: &mut C, arg0: &OperandSize, arg1: Xmm) -> Gpr {
-    let v4 = C::use_avx(ctx);
-    if v4 == true {
-        let v6 = constructor_xmm_to_gpr_vex(ctx, &AvxOpcode::Vpmovmskb, arg1, arg0);
-        // Rule at src/isa/x64/inst.isle line 3938.
-        return v6;
-    }
-    let v3 = constructor_xmm_to_gpr(ctx, &SseOpcode::Pmovmskb, arg1, arg0);
-    // Rule at src/isa/x64/inst.isle line 3936.
-    return v3;
-}
-
-// Generated as internal constructor for term x64_movmskps.
-pub fn constructor_x64_movmskps<C: Context>(ctx: &mut C, arg0: &OperandSize, arg1: Xmm) -> Gpr {
-    let v4 = C::use_avx(ctx);
-    if v4 == true {
-        let v6 = constructor_xmm_to_gpr_vex(ctx, &AvxOpcode::Vmovmskps, arg1, arg0);
-        // Rule at src/isa/x64/inst.isle line 3946.
-        return v6;
-    }
-    let v3 = constructor_xmm_to_gpr(ctx, &SseOpcode::Movmskps, arg1, arg0);
-    // Rule at src/isa/x64/inst.isle line 3944.
-    return v3;
-}
-
-// Generated as internal constructor for term x64_movmskpd.
-pub fn constructor_x64_movmskpd<C: Context>(ctx: &mut C, arg0: &OperandSize, arg1: Xmm) -> Gpr {
-    let v4 = C::use_avx(ctx);
-    if v4 == true {
-        let v6 = constructor_xmm_to_gpr_vex(ctx, &AvxOpcode::Vmovmskpd, arg1, arg0);
-        // Rule at src/isa/x64/inst.isle line 3954.
-        return v6;
-    }
-    let v3 = constructor_xmm_to_gpr(ctx, &SseOpcode::Movmskpd, arg1, arg0);
-    // Rule at src/isa/x64/inst.isle line 3952.
-    return v3;
-}
-
-// Generated as internal constructor for term x64_not.
-pub fn constructor_x64_not<C: Context>(ctx: &mut C, arg0: Type, arg1: Gpr) -> Gpr {
-    let v2 = C::temp_writable_gpr(ctx);
-    let v3 = &C::operand_size_of_type_32_64(ctx, arg0);
-    let v4 = MInst::Not {
-        size: v3.clone(),
-        src: arg1,
-        dst: v2,
-    };
-    let v5 = C::emit(ctx, &v4);
-    let v6 = C::writable_gpr_to_gpr(ctx, v2);
-    // Rule at src/isa/x64/inst.isle line 3960.
-    return v6;
-}
-
-// Generated as internal constructor for term x64_neg.
-pub fn constructor_x64_neg<C: Context>(ctx: &mut C, arg0: Type, arg1: Gpr) -> Gpr {
-    let v2 = C::temp_writable_gpr(ctx);
-    let v3 = &C::raw_operand_size_of_type(ctx, arg0);
-    let v4 = MInst::Neg {
-        size: v3.clone(),
-        src: arg1,
-        dst: v2,
-    };
-    let v5 = C::emit(ctx, &v4);
-    let v6 = C::writable_gpr_to_gpr(ctx, v2);
-    // Rule at src/isa/x64/inst.isle line 3968.
-    return v6;
-}
-
-// Generated as internal constructor for term x64_neg_paired.
-pub fn constructor_x64_neg_paired<C: Context>(ctx: &mut C, arg0: Type, arg1: Gpr) -> ProducesFlags {
-    let v2 = C::temp_writable_gpr(ctx);
-    let v3 = &C::raw_operand_size_of_type(ctx, arg0);
-    let v5 = constructor_writable_gpr_to_r_reg(ctx, v2);
-    let v4 = MInst::Neg {
-        size: v3.clone(),
-        src: arg1,
-        dst: v2,
-    };
-    let v6 = ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
-        inst: v4,
-        result: v5,
-    };
-    // Rule at src/isa/x64/inst.isle line 3976.
-    return v6;
-}
-
-// Generated as internal constructor for term x64_lea.
-pub fn constructor_x64_lea<C: Context>(ctx: &mut C, arg0: Type, arg1: &SyntheticAmode) -> Gpr {
-    let v2 = C::temp_writable_gpr(ctx);
-    let v3 = &C::operand_size_of_type_32_64(ctx, arg0);
-    let v4 = MInst::LoadEffectiveAddress {
-        addr: arg1.clone(),
-        dst: v2,
-        size: v3.clone(),
-    };
-    let v5 = C::emit(ctx, &v4);
-    let v6 = C::writable_gpr_to_gpr(ctx, v2);
-    // Rule at src/isa/x64/inst.isle line 3983.
-    return v6;
-}
-
-// Generated as internal constructor for term x64_ud2.
-pub fn constructor_x64_ud2<C: Context>(ctx: &mut C, arg0: &TrapCode) -> SideEffectNoResult {
-    let v1 = MInst::Ud2 {
-        trap_code: arg0.clone(),
-    };
-    let v2 = SideEffectNoResult::Inst { inst: v1 };
-    // Rule at src/isa/x64/inst.isle line 3990.
-    return v2;
-}
-
-// Generated as internal constructor for term x64_hlt.
-pub fn constructor_x64_hlt<C: Context>(ctx: &mut C) -> SideEffectNoResult {
-    let v1 = SideEffectNoResult::Inst { inst: MInst::Hlt };
-    // Rule at src/isa/x64/inst.isle line 3995.
-    return v1;
-}
-
-// Generated as internal constructor for term x64_lzcnt.
-pub fn constructor_x64_lzcnt<C: Context>(ctx: &mut C, arg0: Type, arg1: Gpr) -> Gpr {
-    let v3 = &C::operand_size_of_type_32_64(ctx, arg0);
-    let v4 = constructor_unary_rm_r(ctx, &UnaryRmROpcode::Lzcnt, arg1, v3);
-    // Rule at src/isa/x64/inst.isle line 4000.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_tzcnt.
-pub fn constructor_x64_tzcnt<C: Context>(ctx: &mut C, arg0: Type, arg1: Gpr) -> Gpr {
-    let v3 = &C::operand_size_of_type_32_64(ctx, arg0);
-    let v4 = constructor_unary_rm_r(ctx, &UnaryRmROpcode::Tzcnt, arg1, v3);
-    // Rule at src/isa/x64/inst.isle line 4005.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_bsr.
-pub fn constructor_x64_bsr<C: Context>(ctx: &mut C, arg0: Type, arg1: Gpr) -> ProducesFlags {
-    let v2 = C::temp_writable_gpr(ctx);
-    let v3 = &C::operand_size_of_type_32_64(ctx, arg0);
-    let v5 = &C::gpr_to_gpr_mem(ctx, arg1);
-    let v7 = constructor_writable_gpr_to_r_reg(ctx, v2);
-    let v6 = MInst::UnaryRmR {
-        size: v3.clone(),
-        op: UnaryRmROpcode::Bsr,
-        src: v5.clone(),
-        dst: v2,
-    };
-    let v8 = ProducesFlags::ProducesFlagsReturnsReg {
-        inst: v6,
-        result: v7,
-    };
-    // Rule at src/isa/x64/inst.isle line 4010.
-    return v8;
-}
-
-// Generated as internal constructor for term bsr_or_else.
-pub fn constructor_bsr_or_else<C: Context>(ctx: &mut C, arg0: Type, arg1: Gpr, arg2: Gpr) -> Gpr {
-    let v3 = &constructor_x64_bsr(ctx, arg0, arg1);
-    let v4 = constructor_produces_flags_get_reg(ctx, v3);
-    let v5 = C::gpr_new(ctx, v4);
-    let v7 = &C::gpr_to_gpr_mem(ctx, arg2);
-    let v8 = &constructor_cmove(ctx, arg0, &CC::Z, v7, v5);
-    let v9 = &constructor_produces_flags_ignore(ctx, v3);
-    let v10 = constructor_with_flags_reg(ctx, v9, v8);
-    let v11 = C::gpr_new(ctx, v10);
-    // Rule at src/isa/x64/inst.isle line 4019.
-    return v11;
-}
-
-// Generated as internal constructor for term x64_bsf.
-pub fn constructor_x64_bsf<C: Context>(ctx: &mut C, arg0: Type, arg1: Gpr) -> ProducesFlags {
-    let v2 = C::temp_writable_gpr(ctx);
-    let v3 = &C::operand_size_of_type_32_64(ctx, arg0);
-    let v5 = &C::gpr_to_gpr_mem(ctx, arg1);
-    let v7 = constructor_writable_gpr_to_r_reg(ctx, v2);
-    let v6 = MInst::UnaryRmR {
-        size: v3.clone(),
-        op: UnaryRmROpcode::Bsf,
-        src: v5.clone(),
-        dst: v2,
-    };
-    let v8 = ProducesFlags::ProducesFlagsReturnsReg {
-        inst: v6,
-        result: v7,
-    };
-    // Rule at src/isa/x64/inst.isle line 4030.
-    return v8;
-}
-
-// Generated as internal constructor for term bsf_or_else.
-pub fn constructor_bsf_or_else<C: Context>(ctx: &mut C, arg0: Type, arg1: Gpr, arg2: Gpr) -> Gpr {
-    let v3 = &constructor_x64_bsf(ctx, arg0, arg1);
-    let v4 = constructor_produces_flags_get_reg(ctx, v3);
-    let v5 = C::gpr_new(ctx, v4);
-    let v7 = &C::gpr_to_gpr_mem(ctx, arg2);
-    let v8 = &constructor_cmove(ctx, arg0, &CC::Z, v7, v5);
-    let v9 = &constructor_produces_flags_ignore(ctx, v3);
-    let v10 = constructor_with_flags_reg(ctx, v9, v8);
-    let v11 = C::gpr_new(ctx, v10);
-    // Rule at src/isa/x64/inst.isle line 4039.
-    return v11;
-}
-
-// Generated as internal constructor for term x64_blsi.
-pub fn constructor_x64_blsi<C: Context>(ctx: &mut C, arg0: Type, arg1: &GprMem) -> Gpr {
-    let v3 = &C::operand_size_of_type_32_64(ctx, arg0);
-    let v4 = constructor_unary_rm_r_vex(ctx, &UnaryRmRVexOpcode::Blsi, arg1, v3);
-    // Rule at src/isa/x64/inst.isle line 4050.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_blsmsk.
-pub fn constructor_x64_blsmsk<C: Context>(ctx: &mut C, arg0: Type, arg1: &GprMem) -> Gpr {
-    let v3 = &C::operand_size_of_type_32_64(ctx, arg0);
-    let v4 = constructor_unary_rm_r_vex(ctx, &UnaryRmRVexOpcode::Blsmsk, arg1, v3);
-    // Rule at src/isa/x64/inst.isle line 4055.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_blsr.
-pub fn constructor_x64_blsr<C: Context>(ctx: &mut C, arg0: Type, arg1: &GprMem) -> Gpr {
-    let v3 = &C::operand_size_of_type_32_64(ctx, arg0);
-    let v4 = constructor_unary_rm_r_vex(ctx, &UnaryRmRVexOpcode::Blsr, arg1, v3);
-    // Rule at src/isa/x64/inst.isle line 4060.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_popcnt.
-pub fn constructor_x64_popcnt<C: Context>(ctx: &mut C, arg0: Type, arg1: Gpr) -> Gpr {
-    let v3 = &C::operand_size_of_type_32_64(ctx, arg0);
-    let v4 = constructor_unary_rm_r(ctx, &UnaryRmROpcode::Popcnt, arg1, v3);
-    // Rule at src/isa/x64/inst.isle line 4065.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_minss.
-pub fn constructor_x64_minss<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v4 = C::use_avx(ctx);
-    if v4 == true {
-        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vminss, arg0, v6);
-        // Rule at src/isa/x64/inst.isle line 4072.
-        return v7;
-    }
-    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Minss, arg0, arg1);
-    // Rule at src/isa/x64/inst.isle line 4070.
-    return v3;
-}
-
-// Generated as internal constructor for term x64_minsd.
-pub fn constructor_x64_minsd<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v4 = C::use_avx(ctx);
-    if v4 == true {
-        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vminsd, arg0, v6);
-        // Rule at src/isa/x64/inst.isle line 4080.
-        return v7;
-    }
-    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Minsd, arg0, arg1);
-    // Rule at src/isa/x64/inst.isle line 4078.
-    return v3;
-}
-
-// Generated as internal constructor for term x64_minps.
-pub fn constructor_x64_minps<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vminps, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 4088.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Minps, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 4086.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_minpd.
-pub fn constructor_x64_minpd<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vminpd, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 4096.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Minpd, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 4094.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_maxss.
-pub fn constructor_x64_maxss<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v4 = C::use_avx(ctx);
-    if v4 == true {
-        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vmaxss, arg0, v6);
-        // Rule at src/isa/x64/inst.isle line 4104.
-        return v7;
-    }
-    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Maxss, arg0, arg1);
-    // Rule at src/isa/x64/inst.isle line 4102.
-    return v3;
-}
-
-// Generated as internal constructor for term x64_maxsd.
-pub fn constructor_x64_maxsd<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v4 = C::use_avx(ctx);
-    if v4 == true {
-        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vmaxsd, arg0, v6);
-        // Rule at src/isa/x64/inst.isle line 4112.
-        return v7;
-    }
-    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Maxsd, arg0, arg1);
-    // Rule at src/isa/x64/inst.isle line 4110.
-    return v3;
-}
-
-// Generated as internal constructor for term x64_maxps.
-pub fn constructor_x64_maxps<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vmaxps, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 4120.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Maxps, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 4118.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_maxpd.
-pub fn constructor_x64_maxpd<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vmaxpd, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 4128.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Maxpd, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 4126.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_vfmadd213.
-pub fn constructor_x64_vfmadd213<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Xmm,
-    arg2: Xmm,
-    arg3: &XmmMem,
-) -> Xmm {
-    match arg0 {
-        F32 => {
-            let v5 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfmadd213ss, arg1, arg2, arg3);
-            // Rule at src/isa/x64/inst.isle line 4134.
-            return v5;
-        }
-        F64 => {
-            let v7 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfmadd213sd, arg1, arg2, arg3);
-            // Rule at src/isa/x64/inst.isle line 4135.
-            return v7;
-        }
-        F32X4 => {
-            let v9 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfmadd213ps, arg1, arg2, arg3);
-            // Rule at src/isa/x64/inst.isle line 4136.
-            return v9;
-        }
-        F64X2 => {
-            let v11 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfmadd213pd, arg1, arg2, arg3);
-            // Rule at src/isa/x64/inst.isle line 4137.
-            return v11;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "x64_vfmadd213", "src/isa/x64/inst.isle line 4133"
-    )
-}
-
-// Generated as internal constructor for term x64_vfmadd132.
-pub fn constructor_x64_vfmadd132<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Xmm,
-    arg2: Xmm,
-    arg3: &XmmMem,
-) -> Xmm {
-    match arg0 {
-        F32 => {
-            let v5 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfmadd132ss, arg1, arg2, arg3);
-            // Rule at src/isa/x64/inst.isle line 4141.
-            return v5;
-        }
-        F64 => {
-            let v7 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfmadd132sd, arg1, arg2, arg3);
-            // Rule at src/isa/x64/inst.isle line 4142.
-            return v7;
-        }
-        F32X4 => {
-            let v9 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfmadd132ps, arg1, arg2, arg3);
-            // Rule at src/isa/x64/inst.isle line 4143.
-            return v9;
-        }
-        F64X2 => {
-            let v11 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfmadd132pd, arg1, arg2, arg3);
-            // Rule at src/isa/x64/inst.isle line 4144.
-            return v11;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "x64_vfmadd132", "src/isa/x64/inst.isle line 4140"
-    )
-}
-
-// Generated as internal constructor for term x64_vfnmadd213.
-pub fn constructor_x64_vfnmadd213<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Xmm,
-    arg2: Xmm,
-    arg3: &XmmMem,
-) -> Xmm {
-    match arg0 {
-        F32 => {
-            let v5 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfnmadd213ss, arg1, arg2, arg3);
-            // Rule at src/isa/x64/inst.isle line 4148.
-            return v5;
-        }
-        F64 => {
-            let v7 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfnmadd213sd, arg1, arg2, arg3);
-            // Rule at src/isa/x64/inst.isle line 4149.
-            return v7;
-        }
-        F32X4 => {
-            let v9 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfnmadd213ps, arg1, arg2, arg3);
-            // Rule at src/isa/x64/inst.isle line 4150.
-            return v9;
-        }
-        F64X2 => {
-            let v11 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfnmadd213pd, arg1, arg2, arg3);
-            // Rule at src/isa/x64/inst.isle line 4151.
-            return v11;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "x64_vfnmadd213", "src/isa/x64/inst.isle line 4147"
-    )
-}
-
-// Generated as internal constructor for term x64_vfnmadd132.
-pub fn constructor_x64_vfnmadd132<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Xmm,
-    arg2: Xmm,
-    arg3: &XmmMem,
-) -> Xmm {
-    match arg0 {
-        F32 => {
-            let v5 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfnmadd132ss, arg1, arg2, arg3);
-            // Rule at src/isa/x64/inst.isle line 4155.
-            return v5;
-        }
-        F64 => {
-            let v7 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfnmadd132sd, arg1, arg2, arg3);
-            // Rule at src/isa/x64/inst.isle line 4156.
-            return v7;
-        }
-        F32X4 => {
-            let v9 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfnmadd132ps, arg1, arg2, arg3);
-            // Rule at src/isa/x64/inst.isle line 4157.
-            return v9;
-        }
-        F64X2 => {
-            let v11 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfnmadd132pd, arg1, arg2, arg3);
-            // Rule at src/isa/x64/inst.isle line 4158.
-            return v11;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "x64_vfnmadd132", "src/isa/x64/inst.isle line 4154"
-    )
-}
-
-// Generated as internal constructor for term x64_sqrtss.
-pub fn constructor_x64_sqrtss<C: Context>(ctx: &mut C, arg0: &XmmMem) -> Xmm {
-    let v3 = C::use_avx(ctx);
-    if v3 == true {
-        let v5 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vsqrtss, arg0);
-        // Rule at src/isa/x64/inst.isle line 4163.
-        return v5;
-    }
-    let v2 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Sqrtss, arg0);
-    // Rule at src/isa/x64/inst.isle line 4162.
-    return v2;
-}
-
-// Generated as internal constructor for term x64_sqrtsd.
-pub fn constructor_x64_sqrtsd<C: Context>(ctx: &mut C, arg0: &XmmMem) -> Xmm {
-    let v3 = C::use_avx(ctx);
-    if v3 == true {
-        let v5 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vsqrtsd, arg0);
-        // Rule at src/isa/x64/inst.isle line 4170.
-        return v5;
-    }
-    let v2 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Sqrtsd, arg0);
-    // Rule at src/isa/x64/inst.isle line 4169.
-    return v2;
-}
-
-// Generated as internal constructor for term x64_sqrtps.
-pub fn constructor_x64_sqrtps<C: Context>(ctx: &mut C, arg0: &XmmMem) -> Xmm {
-    let v4 = C::use_avx(ctx);
-    if v4 == true {
-        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vsqrtps, arg0);
-        // Rule at src/isa/x64/inst.isle line 4177.
-        return v6;
-    }
-    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
-    let v3 = constructor_xmm_unary_rm_r(ctx, &SseOpcode::Sqrtps, v2);
-    // Rule at src/isa/x64/inst.isle line 4176.
-    return v3;
-}
-
-// Generated as internal constructor for term x64_sqrtpd.
-pub fn constructor_x64_sqrtpd<C: Context>(ctx: &mut C, arg0: &XmmMem) -> Xmm {
-    let v4 = C::use_avx(ctx);
-    if v4 == true {
-        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vsqrtpd, arg0);
-        // Rule at src/isa/x64/inst.isle line 4184.
-        return v6;
-    }
-    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
-    let v3 = constructor_xmm_unary_rm_r(ctx, &SseOpcode::Sqrtpd, v2);
-    // Rule at src/isa/x64/inst.isle line 4183.
-    return v3;
-}
-
-// Generated as internal constructor for term x64_cvtss2sd.
-pub fn constructor_x64_cvtss2sd<C: Context>(ctx: &mut C, arg0: &XmmMem) -> Xmm {
-    let v3 = C::use_avx(ctx);
-    if v3 == true {
-        let v5 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vcvtss2sd, arg0);
-        // Rule at src/isa/x64/inst.isle line 4191.
-        return v5;
-    }
-    let v2 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Cvtss2sd, arg0);
-    // Rule at src/isa/x64/inst.isle line 4190.
-    return v2;
-}
-
-// Generated as internal constructor for term x64_cvtsd2ss.
-pub fn constructor_x64_cvtsd2ss<C: Context>(ctx: &mut C, arg0: &XmmMem) -> Xmm {
-    let v3 = C::use_avx(ctx);
-    if v3 == true {
-        let v5 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vcvtsd2ss, arg0);
-        // Rule at src/isa/x64/inst.isle line 4198.
-        return v5;
-    }
-    let v2 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Cvtsd2ss, arg0);
-    // Rule at src/isa/x64/inst.isle line 4197.
-    return v2;
-}
-
-// Generated as internal constructor for term x64_cvtdq2ps.
-pub fn constructor_x64_cvtdq2ps<C: Context>(ctx: &mut C, arg0: &XmmMem) -> Xmm {
-    let v4 = C::use_avx(ctx);
-    if v4 == true {
-        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vcvtdq2ps, arg0);
-        // Rule at src/isa/x64/inst.isle line 4205.
-        return v6;
-    }
-    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
-    let v3 = constructor_xmm_unary_rm_r(ctx, &SseOpcode::Cvtdq2ps, v2);
-    // Rule at src/isa/x64/inst.isle line 4204.
-    return v3;
-}
-
-// Generated as internal constructor for term x64_cvtps2pd.
-pub fn constructor_x64_cvtps2pd<C: Context>(ctx: &mut C, arg0: &XmmMem) -> Xmm {
-    let v4 = C::use_avx(ctx);
-    if v4 == true {
-        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vcvtps2pd, arg0);
-        // Rule at src/isa/x64/inst.isle line 4212.
-        return v6;
-    }
-    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
-    let v3 = constructor_xmm_unary_rm_r(ctx, &SseOpcode::Cvtps2pd, v2);
-    // Rule at src/isa/x64/inst.isle line 4211.
-    return v3;
-}
-
-// Generated as internal constructor for term x64_cvtpd2ps.
-pub fn constructor_x64_cvtpd2ps<C: Context>(ctx: &mut C, arg0: &XmmMem) -> Xmm {
-    let v4 = C::use_avx(ctx);
-    if v4 == true {
-        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vcvtpd2ps, arg0);
-        // Rule at src/isa/x64/inst.isle line 4219.
-        return v6;
-    }
-    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
-    let v3 = constructor_xmm_unary_rm_r(ctx, &SseOpcode::Cvtpd2ps, v2);
-    // Rule at src/isa/x64/inst.isle line 4218.
-    return v3;
-}
-
-// Generated as internal constructor for term x64_cvtdq2pd.
-pub fn constructor_x64_cvtdq2pd<C: Context>(ctx: &mut C, arg0: &XmmMem) -> Xmm {
-    let v4 = C::use_avx(ctx);
-    if v4 == true {
-        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vcvtdq2pd, arg0);
-        // Rule at src/isa/x64/inst.isle line 4226.
-        return v6;
-    }
-    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
-    let v3 = constructor_xmm_unary_rm_r(ctx, &SseOpcode::Cvtdq2pd, v2);
-    // Rule at src/isa/x64/inst.isle line 4225.
-    return v3;
-}
-
-// Generated as internal constructor for term x64_cvtsi2ss.
-pub fn constructor_x64_cvtsi2ss<C: Context>(ctx: &mut C, arg0: Type, arg1: &GprMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v3 = &C::raw_operand_size_of_type(ctx, arg0);
-        let v7 = constructor_gpr_to_xmm_vex(ctx, &AvxOpcode::Vcvtsi2ss, arg1, v3);
-        // Rule at src/isa/x64/inst.isle line 4234.
-        return v7;
-    }
-    let v3 = &C::raw_operand_size_of_type(ctx, arg0);
-    let v4 = constructor_gpr_to_xmm(ctx, &SseOpcode::Cvtsi2ss, arg1, v3);
-    // Rule at src/isa/x64/inst.isle line 4232.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_cvtsi2sd.
-pub fn constructor_x64_cvtsi2sd<C: Context>(ctx: &mut C, arg0: Type, arg1: &GprMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v3 = &C::raw_operand_size_of_type(ctx, arg0);
-        let v7 = constructor_gpr_to_xmm_vex(ctx, &AvxOpcode::Vcvtsi2sd, arg1, v3);
-        // Rule at src/isa/x64/inst.isle line 4242.
-        return v7;
-    }
-    let v3 = &C::raw_operand_size_of_type(ctx, arg0);
-    let v4 = constructor_gpr_to_xmm(ctx, &SseOpcode::Cvtsi2sd, arg1, v3);
-    // Rule at src/isa/x64/inst.isle line 4240.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_cvttps2dq.
-pub fn constructor_x64_cvttps2dq<C: Context>(ctx: &mut C, arg0: &XmmMem) -> Xmm {
-    let v4 = C::use_avx(ctx);
-    if v4 == true {
-        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vcvttps2dq, arg0);
-        // Rule at src/isa/x64/inst.isle line 4250.
-        return v6;
-    }
-    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
-    let v3 = constructor_xmm_unary_rm_r(ctx, &SseOpcode::Cvttps2dq, v2);
-    // Rule at src/isa/x64/inst.isle line 4248.
-    return v3;
-}
-
-// Generated as internal constructor for term x64_cvttpd2dq.
-pub fn constructor_x64_cvttpd2dq<C: Context>(ctx: &mut C, arg0: &XmmMem) -> Xmm {
-    let v4 = C::use_avx(ctx);
-    if v4 == true {
-        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vcvttpd2dq, arg0);
-        // Rule at src/isa/x64/inst.isle line 4258.
-        return v6;
-    }
-    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
-    let v3 = constructor_xmm_unary_rm_r(ctx, &SseOpcode::Cvttpd2dq, v2);
-    // Rule at src/isa/x64/inst.isle line 4256.
-    return v3;
-}
-
-// Generated as internal constructor for term x64_pcmpeq.
-pub fn constructor_x64_pcmpeq<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Xmm,
-    arg2: &XmmMem,
-) -> Xmm {
-    match arg0 {
-        I8X16 => {
-            let v3 = constructor_x64_pcmpeqb(ctx, arg1, arg2);
-            // Rule at src/isa/x64/inst.isle line 4264.
-            return v3;
-        }
-        I16X8 => {
-            let v4 = constructor_x64_pcmpeqw(ctx, arg1, arg2);
-            // Rule at src/isa/x64/inst.isle line 4265.
-            return v4;
-        }
-        I32X4 => {
-            let v5 = constructor_x64_pcmpeqd(ctx, arg1, arg2);
-            // Rule at src/isa/x64/inst.isle line 4266.
-            return v5;
-        }
-        I64X2 => {
-            let v6 = C::use_sse41(ctx);
-            if v6 == true {
-                let v7 = constructor_x64_pcmpeqq(ctx, arg1, arg2);
-                // Rule at src/isa/x64/inst.isle line 4267.
-                return v7;
-            }
-            let v5 = constructor_x64_pcmpeqd(ctx, arg1, arg2);
-            let v8 = &C::xmm_to_xmm_mem(ctx, v5);
-            let v10 = constructor_x64_pshufd(ctx, v8, 0xB1);
-            let v11 = &C::xmm_to_xmm_mem(ctx, v10);
-            let v12 = constructor_x64_pand(ctx, v5, v11);
-            // Rule at src/isa/x64/inst.isle line 4276.
-            return v12;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "x64_pcmpeq", "src/isa/x64/inst.isle line 4263"
-    )
-}
-
-// Generated as internal constructor for term x64_pcmpeqb.
-pub fn constructor_x64_pcmpeqb<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpcmpeqb, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 4283.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pcmpeqb, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 4282.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_pcmpeqw.
-pub fn constructor_x64_pcmpeqw<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpcmpeqw, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 4288.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pcmpeqw, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 4287.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_pcmpeqd.
-pub fn constructor_x64_pcmpeqd<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpcmpeqd, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 4293.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pcmpeqd, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 4292.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_pcmpeqq.
-pub fn constructor_x64_pcmpeqq<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpcmpeqq, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 4298.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pcmpeqq, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 4297.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_pcmpgt.
-pub fn constructor_x64_pcmpgt<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Xmm,
-    arg2: &XmmMem,
-) -> Xmm {
-    match arg0 {
-        I8X16 => {
-            let v3 = constructor_x64_pcmpgtb(ctx, arg1, arg2);
-            // Rule at src/isa/x64/inst.isle line 4304.
-            return v3;
-        }
-        I16X8 => {
-            let v4 = constructor_x64_pcmpgtw(ctx, arg1, arg2);
-            // Rule at src/isa/x64/inst.isle line 4305.
-            return v4;
-        }
-        I32X4 => {
-            let v5 = constructor_x64_pcmpgtd(ctx, arg1, arg2);
-            // Rule at src/isa/x64/inst.isle line 4306.
-            return v5;
-        }
-        I64X2 => {
-            let v6 = C::use_sse42(ctx);
-            if v6 == true {
-                let v7 = constructor_x64_pcmpgtq(ctx, arg1, arg2);
-                // Rule at src/isa/x64/inst.isle line 4310.
-                return v7;
-            }
-            let v9 = C::emit_u128_le_const(ctx, 0x800000000000000080000000);
-            let v10 = &constructor_const_to_xmm_mem(ctx, v9);
-            let v11 = constructor_x64_movdqu_load(ctx, v10);
-            let v12 = &C::xmm_to_xmm_mem(ctx, arg1);
-            let v13 = constructor_x64_pxor(ctx, v11, v12);
-            let v14 = constructor_x64_pxor(ctx, v11, arg2);
-            let v15 = &C::xmm_to_xmm_mem(ctx, v14);
-            let v16 = constructor_x64_pcmpgtd(ctx, v13, v15);
-            let v17 = &C::xmm_to_xmm_mem(ctx, v16);
-            let v19 = constructor_x64_pshufd(ctx, v17, 0xA0);
-            let v20 = &C::xmm_to_xmm_mem(ctx, v16);
-            let v22 = constructor_x64_pshufd(ctx, v20, 0xF5);
-            let v23 = &C::xmm_to_xmm_mem(ctx, v14);
-            let v24 = constructor_x64_pcmpeqd(ctx, v13, v23);
-            let v25 = &C::xmm_to_xmm_mem(ctx, v24);
-            let v26 = constructor_x64_pshufd(ctx, v25, 0xF5);
-            let v27 = &C::xmm_to_xmm_mem(ctx, v26);
-            let v28 = constructor_x64_pand(ctx, v19, v27);
-            let v29 = &C::xmm_to_xmm_mem(ctx, v22);
-            let v30 = constructor_x64_por(ctx, v28, v29);
-            // Rule at src/isa/x64/inst.isle line 4339.
-            return v30;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "x64_pcmpgt", "src/isa/x64/inst.isle line 4303"
-    )
-}
-
-// Generated as internal constructor for term x64_pcmpgtb.
-pub fn constructor_x64_pcmpgtb<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpcmpgtb, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 4355.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pcmpgtb, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 4354.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_pcmpgtw.
-pub fn constructor_x64_pcmpgtw<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpcmpgtw, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 4360.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pcmpgtw, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 4359.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_pcmpgtd.
-pub fn constructor_x64_pcmpgtd<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpcmpgtd, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 4365.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pcmpgtd, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 4364.
-    return v4;
-}
-
-// Generated as internal constructor for term x64_pcmpgtq.
-pub fn constructor_x64_pcmpgtq<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Xmm {
-    let v5 = C::use_avx(ctx);
-    if v5 == true {
-        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
-        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpcmpgtq, arg0, v7);
-        // Rule at src/isa/x64/inst.isle line 4370.
-        return v8;
-    }
-    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
-    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pcmpgtq, arg0, v3);
-    // Rule at src/isa/x64/inst.isle line 4369.
-    return v4;
-}
-
-// Generated as internal constructor for term alu_rm.
-pub fn constructor_alu_rm<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &AluRmiROpcode,
-    arg2: &Amode,
-    arg3: Gpr,
-) -> SideEffectNoResult {
-    let v4 = &C::operand_size_of_type_32_64(ctx, arg0);
-    let v5 = &C::amode_to_synthetic_amode(ctx, arg2);
-    let v6 = MInst::AluRM {
-        size: v4.clone(),
-        op: arg1.clone(),
-        src1_dst: v5.clone(),
-        src2: arg3,
-    };
-    let v7 = SideEffectNoResult::Inst { inst: v6 };
-    // Rule at src/isa/x64/inst.isle line 4376.
-    return v7;
-}
-
-// Generated as internal constructor for term x64_add_mem.
-pub fn constructor_x64_add_mem<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &Amode,
-    arg2: Gpr,
-) -> SideEffectNoResult {
-    let v4 = &constructor_alu_rm(ctx, arg0, &AluRmiROpcode::Add, arg1, arg2);
-    // Rule at src/isa/x64/inst.isle line 4381.
-    return v4.clone();
-}
-
-// Generated as internal constructor for term x64_sub_mem.
-pub fn constructor_x64_sub_mem<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &Amode,
-    arg2: Gpr,
-) -> SideEffectNoResult {
-    let v4 = &constructor_alu_rm(ctx, arg0, &AluRmiROpcode::Sub, arg1, arg2);
-    // Rule at src/isa/x64/inst.isle line 4385.
-    return v4.clone();
-}
-
-// Generated as internal constructor for term x64_and_mem.
-pub fn constructor_x64_and_mem<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &Amode,
-    arg2: Gpr,
-) -> SideEffectNoResult {
-    let v4 = &constructor_alu_rm(ctx, arg0, &AluRmiROpcode::And, arg1, arg2);
-    // Rule at src/isa/x64/inst.isle line 4389.
-    return v4.clone();
-}
-
-// Generated as internal constructor for term x64_or_mem.
-pub fn constructor_x64_or_mem<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &Amode,
-    arg2: Gpr,
-) -> SideEffectNoResult {
-    let v4 = &constructor_alu_rm(ctx, arg0, &AluRmiROpcode::Or, arg1, arg2);
-    // Rule at src/isa/x64/inst.isle line 4393.
-    return v4.clone();
-}
-
-// Generated as internal constructor for term x64_xor_mem.
-pub fn constructor_x64_xor_mem<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &Amode,
-    arg2: Gpr,
-) -> SideEffectNoResult {
-    let v4 = &constructor_alu_rm(ctx, arg0, &AluRmiROpcode::Xor, arg1, arg2);
-    // Rule at src/isa/x64/inst.isle line 4397.
-    return v4.clone();
-}
-
-// Generated as internal constructor for term trap_if.
-pub fn constructor_trap_if<C: Context>(ctx: &mut C, arg0: &CC, arg1: &TrapCode) -> ConsumesFlags {
-    let v2 = MInst::TrapIf {
-        cc: arg0.clone(),
-        trap_code: arg1.clone(),
-    };
-    let v3 = ConsumesFlags::ConsumesFlagsSideEffect { inst: v2 };
-    // Rule at src/isa/x64/inst.isle line 4402.
-    return v3;
-}
-
-// Generated as internal constructor for term trap_if_and.
-pub fn constructor_trap_if_and<C: Context>(
-    ctx: &mut C,
-    arg0: &CC,
-    arg1: &CC,
-    arg2: &TrapCode,
-) -> ConsumesFlags {
-    let v3 = MInst::TrapIfAnd {
-        cc1: arg0.clone(),
-        cc2: arg1.clone(),
-        trap_code: arg2.clone(),
-    };
-    let v4 = ConsumesFlags::ConsumesFlagsSideEffect { inst: v3 };
-    // Rule at src/isa/x64/inst.isle line 4407.
-    return v4;
-}
-
-// Generated as internal constructor for term trap_if_or.
-pub fn constructor_trap_if_or<C: Context>(
-    ctx: &mut C,
-    arg0: &CC,
-    arg1: &CC,
-    arg2: &TrapCode,
-) -> ConsumesFlags {
-    let v3 = MInst::TrapIfOr {
-        cc1: arg0.clone(),
-        cc2: arg1.clone(),
-        trap_code: arg2.clone(),
-    };
-    let v4 = ConsumesFlags::ConsumesFlagsSideEffect { inst: v3 };
-    // Rule at src/isa/x64/inst.isle line 4412.
-    return v4;
-}
-
-// Generated as internal constructor for term trap_if_icmp.
-pub fn constructor_trap_if_icmp<C: Context>(
-    ctx: &mut C,
-    arg0: &IcmpCondResult,
-    arg1: &TrapCode,
-) -> SideEffectNoResult {
-    if let &IcmpCondResult::Condition {
-        producer: ref v1,
-        cc: ref v2,
-    } = arg0
-    {
-        let v4 = &constructor_trap_if(ctx, v2, arg1);
-        let v5 = &constructor_with_flags_side_effect(ctx, v1, v4);
-        // Rule at src/isa/x64/inst.isle line 4416.
-        return v5.clone();
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "trap_if_icmp", "src/isa/x64/inst.isle line 4415"
-    )
-}
-
-// Generated as internal constructor for term trap_if_fcmp.
-pub fn constructor_trap_if_fcmp<C: Context>(
-    ctx: &mut C,
-    arg0: &FcmpCondResult,
-    arg1: &TrapCode,
-) -> SideEffectNoResult {
-    match arg0 {
-        &FcmpCondResult::Condition {
-            producer: ref v1,
-            cc: ref v2,
-        } => {
-            let v4 = &constructor_trap_if(ctx, v2, arg1);
-            let v5 = &constructor_with_flags_side_effect(ctx, v1, v4);
-            // Rule at src/isa/x64/inst.isle line 4420.
-            return v5.clone();
-        }
-        &FcmpCondResult::AndCondition {
-            producer: ref v6,
-            cc1: ref v7,
-            cc2: ref v8,
-        } => {
-            let v9 = &constructor_trap_if_and(ctx, v7, v8, arg1);
-            let v10 = &constructor_with_flags_side_effect(ctx, v6, v9);
-            // Rule at src/isa/x64/inst.isle line 4422.
-            return v10.clone();
-        }
-        &FcmpCondResult::OrCondition {
-            producer: ref v11,
-            cc1: ref v12,
-            cc2: ref v13,
-        } => {
-            let v14 = &constructor_trap_if_or(ctx, v12, v13, arg1);
-            let v15 = &constructor_with_flags_side_effect(ctx, v11, v14);
-            // Rule at src/isa/x64/inst.isle line 4424.
-            return v15.clone();
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "trap_if_fcmp", "src/isa/x64/inst.isle line 4419"
-    )
-}
-
-// Generated as internal constructor for term x64_movddup.
-pub fn constructor_x64_movddup<C: Context>(ctx: &mut C, arg0: &XmmMem) -> Xmm {
-    let v3 = C::use_avx(ctx);
-    if v3 == true {
-        let v5 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vmovddup, arg0);
-        // Rule at src/isa/x64/inst.isle line 4431.
-        return v5;
-    }
-    let v2 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Movddup, arg0);
-    // Rule at src/isa/x64/inst.isle line 4429.
-    return v2;
-}
-
-// Generated as internal constructor for term x64_vpbroadcastb.
-pub fn constructor_x64_vpbroadcastb<C: Context>(ctx: &mut C, arg0: &XmmMem) -> Xmm {
-    let v2 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vpbroadcastb, arg0);
-    // Rule at src/isa/x64/inst.isle line 4437.
-    return v2;
-}
-
-// Generated as internal constructor for term x64_vpbroadcastw.
-pub fn constructor_x64_vpbroadcastw<C: Context>(ctx: &mut C, arg0: &XmmMem) -> Xmm {
-    let v2 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vpbroadcastw, arg0);
-    // Rule at src/isa/x64/inst.isle line 4442.
-    return v2;
-}
-
-// Generated as internal constructor for term x64_vpbroadcastd.
-pub fn constructor_x64_vpbroadcastd<C: Context>(ctx: &mut C, arg0: &XmmMem) -> Xmm {
-    let v2 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vpbroadcastd, arg0);
-    // Rule at src/isa/x64/inst.isle line 4447.
-    return v2;
-}
-
-// Generated as internal constructor for term x64_vbroadcastss.
-pub fn constructor_x64_vbroadcastss<C: Context>(ctx: &mut C, arg0: &XmmMem) -> Xmm {
-    let v2 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vbroadcastss, arg0);
-    // Rule at src/isa/x64/inst.isle line 4452.
-    return v2;
-}
-
-// Generated as internal constructor for term jmp_known.
-pub fn constructor_jmp_known<C: Context>(ctx: &mut C, arg0: MachLabel) -> SideEffectNoResult {
-    let v1 = MInst::JmpKnown { dst: arg0 };
-    let v2 = SideEffectNoResult::Inst { inst: v1 };
-    // Rule at src/isa/x64/inst.isle line 4459.
-    return v2;
-}
-
-// Generated as internal constructor for term jmp_if.
-pub fn constructor_jmp_if<C: Context>(ctx: &mut C, arg0: &CC, arg1: MachLabel) -> ConsumesFlags {
-    let v2 = MInst::JmpIf {
-        cc: arg0.clone(),
-        taken: arg1,
-    };
-    let v3 = ConsumesFlags::ConsumesFlagsSideEffect { inst: v2 };
-    // Rule at src/isa/x64/inst.isle line 4463.
-    return v3;
-}
-
-// Generated as internal constructor for term jmp_cond.
-pub fn constructor_jmp_cond<C: Context>(
-    ctx: &mut C,
-    arg0: &CC,
-    arg1: MachLabel,
-    arg2: MachLabel,
-) -> ConsumesFlags {
-    let v3 = MInst::JmpCond {
-        cc: arg0.clone(),
-        taken: arg1,
-        not_taken: arg2,
-    };
-    let v4 = ConsumesFlags::ConsumesFlagsSideEffect { inst: v3 };
-    // Rule at src/isa/x64/inst.isle line 4468.
-    return v4;
-}
-
-// Generated as internal constructor for term jmp_cond_icmp.
-pub fn constructor_jmp_cond_icmp<C: Context>(
-    ctx: &mut C,
-    arg0: &IcmpCondResult,
-    arg1: MachLabel,
-    arg2: MachLabel,
-) -> SideEffectNoResult {
-    if let &IcmpCondResult::Condition {
-        producer: ref v1,
-        cc: ref v2,
-    } = arg0
-    {
-        let v5 = &constructor_jmp_cond(ctx, v2, arg1, arg2);
-        let v6 = &constructor_with_flags_side_effect(ctx, v1, v5);
-        // Rule at src/isa/x64/inst.isle line 4473.
-        return v6.clone();
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "jmp_cond_icmp", "src/isa/x64/inst.isle line 4472"
-    )
-}
-
-// Generated as internal constructor for term jmp_cond_fcmp.
-pub fn constructor_jmp_cond_fcmp<C: Context>(
-    ctx: &mut C,
-    arg0: &FcmpCondResult,
-    arg1: MachLabel,
-    arg2: MachLabel,
-) -> SideEffectNoResult {
-    match arg0 {
-        &FcmpCondResult::Condition {
-            producer: ref v1,
-            cc: ref v2,
-        } => {
-            let v5 = &constructor_jmp_cond(ctx, v2, arg1, arg2);
-            let v6 = &constructor_with_flags_side_effect(ctx, v1, v5);
-            // Rule at src/isa/x64/inst.isle line 4478.
-            return v6.clone();
-        }
-        &FcmpCondResult::AndCondition {
-            producer: ref v7,
-            cc1: ref v8,
-            cc2: ref v9,
-        } => {
-            let v10 = &C::cc_invert(ctx, v8);
-            let v11 = &constructor_jmp_if(ctx, v10, arg2);
-            let v12 = &C::cc_invert(ctx, v9);
-            let v13 = &constructor_jmp_cond(ctx, v12, arg2, arg1);
-            let v14 = &constructor_consumes_flags_concat(ctx, v11, v13);
-            let v15 = &constructor_with_flags_side_effect(ctx, v7, v14);
-            // Rule at src/isa/x64/inst.isle line 4480.
-            return v15.clone();
-        }
-        &FcmpCondResult::OrCondition {
-            producer: ref v16,
-            cc1: ref v17,
-            cc2: ref v18,
-        } => {
-            let v19 = &constructor_jmp_if(ctx, v17, arg1);
-            let v20 = &constructor_jmp_cond(ctx, v18, arg1, arg2);
-            let v21 = &constructor_consumes_flags_concat(ctx, v19, v20);
-            let v22 = &constructor_with_flags_side_effect(ctx, v16, v21);
-            // Rule at src/isa/x64/inst.isle line 4485.
-            return v22.clone();
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "jmp_cond_fcmp", "src/isa/x64/inst.isle line 4477"
-    )
-}
-
-// Generated as internal constructor for term jmp_table_seq.
-pub fn constructor_jmp_table_seq<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Gpr,
-    arg2: MachLabel,
-    arg3: &BoxVecMachLabel,
-) -> SideEffectNoResult {
-    let v4 = C::temp_writable_gpr(ctx);
-    let v5 = C::temp_writable_gpr(ctx);
-    let v6 = C::gpr_to_reg(ctx, arg1);
-    let v7 = C::writable_gpr_to_reg(ctx, v4);
-    let v8 = C::writable_gpr_to_reg(ctx, v5);
-    let v9 = MInst::JmpTableSeq {
-        idx: v6,
-        tmp1: v7,
-        tmp2: v8,
-        default_target: arg2,
-        targets: arg3.clone(),
-    };
-    let v10 = SideEffectNoResult::Inst { inst: v9 };
-    // Rule at src/isa/x64/inst.isle line 4505.
-    return v10;
-}
-
-// Generated as internal constructor for term icmp_cond_result.
-pub fn constructor_icmp_cond_result<C: Context>(
-    ctx: &mut C,
-    arg0: &ProducesFlags,
-    arg1: &CC,
-) -> IcmpCondResult {
-    let v2 = IcmpCondResult::Condition {
-        producer: arg0.clone(),
-        cc: arg1.clone(),
-    };
-    // Rule at src/isa/x64/inst.isle line 4524.
-    return v2;
-}
-
-// Generated as internal constructor for term invert_icmp_cond_result.
-pub fn constructor_invert_icmp_cond_result<C: Context>(
-    ctx: &mut C,
-    arg0: &IcmpCondResult,
-) -> IcmpCondResult {
-    if let &IcmpCondResult::Condition {
-        producer: ref v1,
-        cc: ref v2,
-    } = arg0
-    {
-        let v3 = &C::cc_invert(ctx, v2);
-        let v4 = &constructor_icmp_cond_result(ctx, v1, v3);
-        // Rule at src/isa/x64/inst.isle line 4527.
-        return v4.clone();
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "invert_icmp_cond_result", "src/isa/x64/inst.isle line 4526"
-    )
-}
-
-// Generated as internal constructor for term lower_icmp_bool.
-pub fn constructor_lower_icmp_bool<C: Context>(ctx: &mut C, arg0: &IcmpCondResult) -> ValueRegs {
-    if let &IcmpCondResult::Condition {
-        producer: ref v1,
-        cc: ref v2,
-    } = arg0
-    {
-        let v3 = &constructor_x64_setcc(ctx, v2);
-        let v4 = constructor_with_flags(ctx, v1, v3);
-        // Rule at src/isa/x64/inst.isle line 4532.
-        return v4;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "lower_icmp_bool", "src/isa/x64/inst.isle line 4531"
-    )
-}
-
-// Generated as internal constructor for term select_icmp.
-pub fn constructor_select_icmp<C: Context>(
-    ctx: &mut C,
-    arg0: &IcmpCondResult,
-    arg1: Value,
-    arg2: Value,
-) -> ValueRegs {
-    if let &IcmpCondResult::Condition {
-        producer: ref v1,
-        cc: ref v2,
-    } = arg0
-    {
-        let v4 = C::value_type(ctx, arg1);
-        let v5 = &C::type_register_class(ctx, v4);
-        if let Some(v6) = v5 {
-            if let &RegisterClass::Gpr {
-                single_register: v7,
-            } = v6
-            {
-                if v7 == true {
-                    let v9 = constructor_put_in_gpr(ctx, arg1);
-                    let v10 = &C::gpr_to_gpr_mem(ctx, v9);
-                    let v11 = constructor_put_in_gpr(ctx, arg2);
-                    let v12 = &constructor_cmove(ctx, v4, v2, v10, v11);
-                    let v13 = constructor_with_flags(ctx, v1, v12);
-                    // Rule at src/isa/x64/inst.isle line 4541.
-                    return v13;
-                }
-            }
-        }
-        let v14 = &constructor_cmove_from_values(ctx, v4, v2, arg1, arg2);
-        let v15 = constructor_with_flags(ctx, v1, v14);
-        // Rule at src/isa/x64/inst.isle line 4545.
-        return v15;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "select_icmp", "src/isa/x64/inst.isle line 4536"
-    )
-}
-
-// Generated as internal constructor for term emit_cmp.
-pub fn constructor_emit_cmp<C: Context>(
-    ctx: &mut C,
-    arg0: &IntCC,
-    arg1: Value,
-    arg2: Value,
-) -> IcmpCondResult {
-    let v2 = C::value_type(ctx, arg1);
-    if v2 == I128 {
-        match arg0 {
-            &IntCC::Equal => {
-                let v44 = C::put_in_regs(ctx, arg1);
-                let v46 = constructor_value_regs_get_gpr(ctx, v44, 0x0);
-                let v47 = C::put_in_regs(ctx, arg1);
-                let v49 = constructor_value_regs_get_gpr(ctx, v47, 0x1);
-                let v50 = C::put_in_regs(ctx, arg2);
-                let v51 = constructor_value_regs_get_gpr(ctx, v50, 0x0);
-                let v52 = C::put_in_regs(ctx, arg2);
-                let v53 = constructor_value_regs_get_gpr(ctx, v52, 0x1);
-                let v55 = &C::gpr_to_gpr_mem_imm(ctx, v51);
-                let v56 = &constructor_x64_cmp(ctx, &OperandSize::Size64, v55, v46);
-                let v58 = &constructor_x64_setcc(ctx, &CC::Z);
-                let v59 = constructor_with_flags_reg(ctx, v56, v58);
-                let v60 = &C::gpr_to_gpr_mem_imm(ctx, v53);
-                let v61 = &constructor_x64_cmp(ctx, &OperandSize::Size64, v60, v49);
-                let v62 = &constructor_x64_setcc(ctx, &CC::Z);
-                let v63 = constructor_with_flags_reg(ctx, v61, v62);
-                let v65 = C::gpr_new(ctx, v59);
-                let v66 = &constructor_reg_to_gpr_mem_imm(ctx, v63);
-                let v67 = constructor_x64_and(ctx, I64, v65, v66);
-                let v68 = C::gpr_to_reg(ctx, v67);
-                let v70 = RegMemImm::Imm { simm32: 0x1 };
-                let v71 = &C::gpr_mem_imm_new(ctx, &v70);
-                let v72 = C::gpr_new(ctx, v68);
-                let v73 = &constructor_x64_test(ctx, &OperandSize::Size64, v71, v72);
-                let v75 = &constructor_icmp_cond_result(ctx, v73, &CC::NZ);
-                // Rule at src/isa/x64/inst.isle line 4577.
-                return v75.clone();
-            }
-            &IntCC::NotEqual => {
-                let v44 = C::put_in_regs(ctx, arg1);
-                let v46 = constructor_value_regs_get_gpr(ctx, v44, 0x0);
-                let v47 = C::put_in_regs(ctx, arg1);
-                let v49 = constructor_value_regs_get_gpr(ctx, v47, 0x1);
-                let v50 = C::put_in_regs(ctx, arg2);
-                let v51 = constructor_value_regs_get_gpr(ctx, v50, 0x0);
-                let v52 = C::put_in_regs(ctx, arg2);
-                let v53 = constructor_value_regs_get_gpr(ctx, v52, 0x1);
-                let v55 = &C::gpr_to_gpr_mem_imm(ctx, v51);
-                let v56 = &constructor_x64_cmp(ctx, &OperandSize::Size64, v55, v46);
-                let v76 = &constructor_x64_setcc(ctx, &CC::NZ);
-                let v77 = constructor_with_flags_reg(ctx, v56, v76);
-                let v60 = &C::gpr_to_gpr_mem_imm(ctx, v53);
-                let v61 = &constructor_x64_cmp(ctx, &OperandSize::Size64, v60, v49);
-                let v78 = &constructor_x64_setcc(ctx, &CC::NZ);
-                let v79 = constructor_with_flags_reg(ctx, v61, v78);
-                let v80 = C::gpr_new(ctx, v77);
-                let v81 = &constructor_reg_to_gpr_mem_imm(ctx, v79);
-                let v82 = constructor_x64_or(ctx, I64, v80, v81);
-                let v83 = C::gpr_to_reg(ctx, v82);
-                let v70 = RegMemImm::Imm { simm32: 0x1 };
-                let v71 = &C::gpr_mem_imm_new(ctx, &v70);
-                let v84 = C::gpr_new(ctx, v83);
-                let v85 = &constructor_x64_test(ctx, &OperandSize::Size64, v71, v84);
-                let v86 = &constructor_icmp_cond_result(ctx, v85, &CC::NZ);
-                // Rule at src/isa/x64/inst.isle line 4598.
-                return v86.clone();
-            }
-            _ => {}
-        }
-        let v44 = C::put_in_regs(ctx, arg1);
-        let v46 = constructor_value_regs_get_gpr(ctx, v44, 0x0);
-        let v47 = C::put_in_regs(ctx, arg1);
-        let v49 = constructor_value_regs_get_gpr(ctx, v47, 0x1);
-        let v50 = C::put_in_regs(ctx, arg2);
-        let v51 = constructor_value_regs_get_gpr(ctx, v50, 0x0);
-        let v52 = C::put_in_regs(ctx, arg2);
-        let v53 = constructor_value_regs_get_gpr(ctx, v52, 0x1);
-        let v87 = &C::gpr_to_gpr_mem_imm(ctx, v53);
-        let v88 = &constructor_x64_cmp(ctx, &OperandSize::Size64, v87, v49);
-        let v89 = &C::intcc_without_eq(ctx, arg0);
-        let v90 = &C::intcc_to_cc(ctx, v89);
-        let v91 = &constructor_x64_setcc(ctx, v90);
-        let v92 = &constructor_x64_setcc(ctx, &CC::Z);
-        let v93 = &constructor_consumes_flags_concat(ctx, v91, v92);
-        let v94 = constructor_with_flags(ctx, v88, v93);
-        let v95 = C::value_regs_get(ctx, v94, 0x0);
-        let v96 = C::value_regs_get(ctx, v94, 0x1);
-        let v97 = &C::gpr_to_gpr_mem_imm(ctx, v51);
-        let v98 = &constructor_x64_cmp(ctx, &OperandSize::Size64, v97, v46);
-        let v99 = &C::intcc_unsigned(ctx, arg0);
-        let v100 = &C::intcc_to_cc(ctx, v99);
-        let v101 = &constructor_x64_setcc(ctx, v100);
-        let v102 = constructor_with_flags_reg(ctx, v98, v101);
-        let v103 = C::gpr_new(ctx, v96);
-        let v104 = &constructor_reg_to_gpr_mem_imm(ctx, v102);
-        let v105 = constructor_x64_and(ctx, I64, v103, v104);
-        let v106 = C::gpr_to_reg(ctx, v105);
-        let v107 = C::gpr_new(ctx, v95);
-        let v108 = &constructor_reg_to_gpr_mem_imm(ctx, v106);
-        let v109 = constructor_x64_or(ctx, I64, v107, v108);
-        let v110 = C::gpr_to_reg(ctx, v109);
-        let v70 = RegMemImm::Imm { simm32: 0x1 };
-        let v111 = &C::gpr_mem_imm_new(ctx, &v70);
-        let v112 = C::gpr_new(ctx, v110);
-        let v113 = &constructor_x64_test(ctx, &OperandSize::Size64, v111, v112);
-        let v114 = &constructor_icmp_cond_result(ctx, v113, &CC::NZ);
-        // Rule at src/isa/x64/inst.isle line 4613.
-        return v114.clone();
-    }
-    let v29 = C::def_inst(ctx, arg1);
-    if let Some(v30) = v29 {
-        let v31 = &C::inst_data(ctx, v30);
-        if let &InstructionData::UnaryImm {
-            opcode: ref v32,
-            imm: v33,
-        } = v31
-        {
-            if let &Opcode::Iconst = v32 {
-                let v34 = C::u64_from_imm64(ctx, v33);
-                if v34 == 0x0 {
-                    let v35 = C::value_type(ctx, arg2);
-                    let v36 = &C::raw_operand_size_of_type(ctx, v35);
-                    let v37 = C::put_in_reg(ctx, arg2);
-                    let v38 = C::gpr_new(ctx, v37);
-                    let v39 = &C::gpr_to_gpr_mem_imm(ctx, v38);
-                    let v40 = &constructor_x64_test(ctx, v36, v39, v38);
-                    let v41 = &C::intcc_reverse(ctx, arg0);
-                    let v42 = &C::intcc_to_cc(ctx, v41);
-                    let v43 = &constructor_icmp_cond_result(ctx, v40, v42);
-                    // Rule at src/isa/x64/inst.isle line 4570.
-                    return v43.clone();
-                }
-            }
-        }
-    }
-    let v17 = C::def_inst(ctx, arg2);
-    if let Some(v18) = v17 {
-        let v19 = &C::inst_data(ctx, v18);
-        if let &InstructionData::UnaryImm {
-            opcode: ref v20,
-            imm: v21,
-        } = v19
-        {
-            if let &Opcode::Iconst = v20 {
-                let v22 = C::u64_from_imm64(ctx, v21);
-                if v22 == 0x0 {
-                    let v4 = &C::raw_operand_size_of_type(ctx, v2);
-                    let v23 = C::put_in_reg(ctx, arg1);
-                    let v24 = C::gpr_new(ctx, v23);
-                    let v25 = &C::gpr_to_gpr_mem_imm(ctx, v24);
-                    let v26 = &constructor_x64_test(ctx, v4, v25, v24);
-                    let v27 = &C::intcc_to_cc(ctx, arg0);
-                    let v28 = &constructor_icmp_cond_result(ctx, v26, v27);
-                    // Rule at src/isa/x64/inst.isle line 4565.
-                    return v28.clone();
-                }
-            }
-        }
-    }
-    let v10 = &C::simm32_from_value(ctx, arg1);
-    if let Some(v11) = v10 {
-        let v4 = &C::raw_operand_size_of_type(ctx, v2);
-        let v12 = constructor_put_in_gpr(ctx, arg2);
-        let v13 = &constructor_x64_cmp(ctx, v4, v11, v12);
-        let v14 = &C::intcc_reverse(ctx, arg0);
-        let v15 = &C::intcc_to_cc(ctx, v14);
-        let v16 = &constructor_icmp_cond_result(ctx, v13, v15);
-        // Rule at src/isa/x64/inst.isle line 4560.
-        return v16.clone();
-    }
-    let v4 = &C::raw_operand_size_of_type(ctx, v2);
-    let v5 = &constructor_put_in_gpr_mem_imm(ctx, arg2);
-    let v6 = constructor_put_in_gpr(ctx, arg1);
-    let v7 = &constructor_x64_cmp(ctx, v4, v5, v6);
-    let v8 = &C::intcc_to_cc(ctx, arg0);
-    let v9 = &constructor_icmp_cond_result(ctx, v7, v8);
-    // Rule at src/isa/x64/inst.isle line 4553.
-    return v9.clone();
-}
-
-// Generated as internal constructor for term lower_fcmp_bool.
-pub fn constructor_lower_fcmp_bool<C: Context>(ctx: &mut C, arg0: &FcmpCondResult) -> ValueRegs {
-    match arg0 {
-        &FcmpCondResult::Condition {
-            producer: ref v1,
-            cc: ref v2,
-        } => {
-            let v3 = &constructor_x64_setcc(ctx, v2);
-            let v4 = constructor_with_flags(ctx, v1, v3);
-            // Rule at src/isa/x64/inst.isle line 4648.
-            return v4;
-        }
-        &FcmpCondResult::AndCondition {
-            producer: ref v5,
-            cc1: ref v6,
-            cc2: ref v7,
-        } => {
-            let v8 = &constructor_x64_setcc(ctx, v6);
-            let v9 = &constructor_x64_setcc(ctx, v7);
-            let v10 = &constructor_consumes_flags_concat(ctx, v8, v9);
-            let v11 = constructor_with_flags(ctx, v5, v10);
-            let v13 = constructor_value_regs_get_gpr(ctx, v11, 0x0);
-            let v15 = constructor_value_regs_get_gpr(ctx, v11, 0x1);
-            let v17 = &C::gpr_to_gpr_mem_imm(ctx, v15);
-            let v18 = constructor_x64_and(ctx, I8, v13, v17);
-            let v19 = C::gpr_to_reg(ctx, v18);
-            let v20 = C::value_reg(ctx, v19);
-            // Rule at src/isa/x64/inst.isle line 4651.
-            return v20;
-        }
-        &FcmpCondResult::OrCondition {
-            producer: ref v21,
-            cc1: ref v22,
-            cc2: ref v23,
-        } => {
-            let v24 = &constructor_x64_setcc(ctx, v22);
-            let v25 = &constructor_x64_setcc(ctx, v23);
-            let v26 = &constructor_consumes_flags_concat(ctx, v24, v25);
-            let v27 = constructor_with_flags(ctx, v21, v26);
-            let v28 = constructor_value_regs_get_gpr(ctx, v27, 0x0);
-            let v29 = constructor_value_regs_get_gpr(ctx, v27, 0x1);
-            let v30 = &C::gpr_to_gpr_mem_imm(ctx, v29);
-            let v31 = constructor_x64_or(ctx, I8, v28, v30);
-            let v32 = C::gpr_to_reg(ctx, v31);
-            let v33 = C::value_reg(ctx, v32);
-            // Rule at src/isa/x64/inst.isle line 4660.
-            return v33;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "lower_fcmp_bool", "src/isa/x64/inst.isle line 4646"
-    )
-}
-
-// Generated as internal constructor for term emit_fcmp.
-pub fn constructor_emit_fcmp<C: Context>(
-    ctx: &mut C,
-    arg0: &FloatCC,
-    arg1: Value,
-    arg2: Value,
-) -> FcmpCondResult {
-    match arg0 {
-        &FloatCC::Equal => {
-            let v2 = C::value_type(ctx, arg1);
-            let v3 = C::ty_scalar_float(ctx, v2);
-            if let Some(v4) = v3 {
-                let v6 = &constructor_x64_ucomis(ctx, arg2, arg1);
-                let v9 = FcmpCondResult::AndCondition {
-                    producer: v6.clone(),
-                    cc1: CC::NP,
-                    cc2: CC::Z,
-                };
-                // Rule at src/isa/x64/inst.isle line 4687.
-                return v9;
-            }
-        }
-        &FloatCC::GreaterThan => {
-            let v2 = C::value_type(ctx, arg1);
-            let v3 = C::ty_scalar_float(ctx, v2);
-            if let Some(v4) = v3 {
-                let v6 = &constructor_x64_ucomis(ctx, arg2, arg1);
-                let v18 = FcmpCondResult::Condition {
-                    producer: v6.clone(),
-                    cc: CC::NBE,
-                };
-                // Rule at src/isa/x64/inst.isle line 4703.
-                return v18;
-            }
-        }
-        &FloatCC::GreaterThanOrEqual => {
-            let v2 = C::value_type(ctx, arg1);
-            let v3 = C::ty_scalar_float(ctx, v2);
-            if let Some(v4) = v3 {
-                let v6 = &constructor_x64_ucomis(ctx, arg2, arg1);
-                let v20 = FcmpCondResult::Condition {
-                    producer: v6.clone(),
-                    cc: CC::NB,
-                };
-                // Rule at src/isa/x64/inst.isle line 4705.
-                return v20;
-            }
-        }
-        &FloatCC::LessThan => {
-            let v2 = C::value_type(ctx, arg1);
-            let v3 = C::ty_scalar_float(ctx, v2);
-            if let Some(v4) = v3 {
-                let v25 = &constructor_x64_ucomis(ctx, arg1, arg2);
-                let v26 = FcmpCondResult::Condition {
-                    producer: v25.clone(),
-                    cc: CC::NBE,
-                };
-                // Rule at src/isa/x64/inst.isle line 4715.
-                return v26;
-            }
-        }
-        &FloatCC::LessThanOrEqual => {
-            let v2 = C::value_type(ctx, arg1);
-            let v3 = C::ty_scalar_float(ctx, v2);
-            if let Some(v4) = v3 {
-                let v25 = &constructor_x64_ucomis(ctx, arg1, arg2);
-                let v27 = FcmpCondResult::Condition {
-                    producer: v25.clone(),
-                    cc: CC::NB,
-                };
-                // Rule at src/isa/x64/inst.isle line 4718.
-                return v27;
-            }
-        }
-        &FloatCC::NotEqual => {
-            let v2 = C::value_type(ctx, arg1);
-            let v3 = C::ty_scalar_float(ctx, v2);
-            if let Some(v4) = v3 {
-                let v6 = &constructor_x64_ucomis(ctx, arg2, arg1);
-                let v12 = FcmpCondResult::OrCondition {
-                    producer: v6.clone(),
-                    cc1: CC::P,
-                    cc2: CC::NZ,
-                };
-                // Rule at src/isa/x64/inst.isle line 4690.
-                return v12;
-            }
-        }
-        &FloatCC::Ordered => {
-            let v2 = C::value_type(ctx, arg1);
-            let v3 = C::ty_scalar_float(ctx, v2);
-            if let Some(v4) = v3 {
-                let v6 = &constructor_x64_ucomis(ctx, arg2, arg1);
-                let v13 = FcmpCondResult::Condition {
-                    producer: v6.clone(),
-                    cc: CC::NP,
-                };
-                // Rule at src/isa/x64/inst.isle line 4695.
-                return v13;
-            }
-        }
-        &FloatCC::OrderedNotEqual => {
-            let v2 = C::value_type(ctx, arg1);
-            let v3 = C::ty_scalar_float(ctx, v2);
-            if let Some(v4) = v3 {
-                let v6 = &constructor_x64_ucomis(ctx, arg2, arg1);
-                let v15 = FcmpCondResult::Condition {
-                    producer: v6.clone(),
-                    cc: CC::NZ,
-                };
-                // Rule at src/isa/x64/inst.isle line 4699.
-                return v15;
-            }
-        }
-        &FloatCC::Unordered => {
-            let v2 = C::value_type(ctx, arg1);
-            let v3 = C::ty_scalar_float(ctx, v2);
-            if let Some(v4) = v3 {
-                let v6 = &constructor_x64_ucomis(ctx, arg2, arg1);
-                let v14 = FcmpCondResult::Condition {
-                    producer: v6.clone(),
-                    cc: CC::P,
-                };
-                // Rule at src/isa/x64/inst.isle line 4697.
-                return v14;
-            }
-        }
-        &FloatCC::UnorderedOrEqual => {
-            let v2 = C::value_type(ctx, arg1);
-            let v3 = C::ty_scalar_float(ctx, v2);
-            if let Some(v4) = v3 {
-                let v6 = &constructor_x64_ucomis(ctx, arg2, arg1);
-                let v16 = FcmpCondResult::Condition {
-                    producer: v6.clone(),
-                    cc: CC::Z,
-                };
-                // Rule at src/isa/x64/inst.isle line 4701.
-                return v16;
-            }
-        }
-        &FloatCC::UnorderedOrGreaterThan => {
-            let v2 = C::value_type(ctx, arg1);
-            let v3 = C::ty_scalar_float(ctx, v2);
-            if let Some(v4) = v3 {
-                let v25 = &constructor_x64_ucomis(ctx, arg1, arg2);
-                let v28 = FcmpCondResult::Condition {
-                    producer: v25.clone(),
-                    cc: CC::B,
-                };
-                // Rule at src/isa/x64/inst.isle line 4721.
-                return v28;
-            }
-        }
-        &FloatCC::UnorderedOrGreaterThanOrEqual => {
-            let v2 = C::value_type(ctx, arg1);
-            let v3 = C::ty_scalar_float(ctx, v2);
-            if let Some(v4) = v3 {
-                let v25 = &constructor_x64_ucomis(ctx, arg1, arg2);
-                let v29 = FcmpCondResult::Condition {
-                    producer: v25.clone(),
-                    cc: CC::BE,
-                };
-                // Rule at src/isa/x64/inst.isle line 4724.
-                return v29;
-            }
-        }
-        &FloatCC::UnorderedOrLessThan => {
-            let v2 = C::value_type(ctx, arg1);
-            let v3 = C::ty_scalar_float(ctx, v2);
-            if let Some(v4) = v3 {
-                let v6 = &constructor_x64_ucomis(ctx, arg2, arg1);
-                let v22 = FcmpCondResult::Condition {
-                    producer: v6.clone(),
-                    cc: CC::B,
-                };
-                // Rule at src/isa/x64/inst.isle line 4707.
-                return v22;
-            }
-        }
-        &FloatCC::UnorderedOrLessThanOrEqual => {
-            let v2 = C::value_type(ctx, arg1);
-            let v3 = C::ty_scalar_float(ctx, v2);
-            if let Some(v4) = v3 {
-                let v6 = &constructor_x64_ucomis(ctx, arg2, arg1);
-                let v24 = FcmpCondResult::Condition {
-                    producer: v6.clone(),
-                    cc: CC::BE,
-                };
-                // Rule at src/isa/x64/inst.isle line 4709.
-                return v24;
-            }
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "emit_fcmp", "src/isa/x64/inst.isle line 4685"
-    )
-}
-
-// Generated as internal constructor for term x64_mfence.
-pub fn constructor_x64_mfence<C: Context>(ctx: &mut C) -> SideEffectNoResult {
-    let v1 = MInst::Fence {
-        kind: FenceKind::MFence,
-    };
-    let v2 = SideEffectNoResult::Inst { inst: v1 };
-    // Rule at src/isa/x64/inst.isle line 4737.
-    return v2;
-}
-
-// Generated as internal constructor for term x64_cmpxchg.
-pub fn constructor_x64_cmpxchg<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Gpr,
-    arg2: Gpr,
-    arg3: &SyntheticAmode,
-) -> Gpr {
-    let v4 = C::temp_writable_gpr(ctx);
-    let v5 = C::gpr_to_reg(ctx, arg2);
-    let v6 = C::gpr_to_reg(ctx, arg1);
-    let v7 = C::writable_gpr_to_reg(ctx, v4);
-    let v8 = MInst::LockCmpxchg {
-        ty: arg0,
-        replacement: v5,
-        expected: v6,
-        mem: arg3.clone(),
-        dst_old: v7,
-    };
-    let v9 = C::emit(ctx, &v8);
-    let v10 = C::writable_gpr_to_gpr(ctx, v4);
-    // Rule at src/isa/x64/inst.isle line 4741.
-    return v10;
-}
-
-// Generated as internal constructor for term x64_atomic_rmw_seq.
-pub fn constructor_x64_atomic_rmw_seq<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &MachAtomicRmwOp,
-    arg2: &SyntheticAmode,
-    arg3: Gpr,
-) -> Gpr {
-    let v4 = C::temp_writable_gpr(ctx);
-    let v5 = C::temp_writable_gpr(ctx);
-    let v6 = C::gpr_to_reg(ctx, arg3);
-    let v7 = C::writable_gpr_to_reg(ctx, v5);
-    let v8 = C::writable_gpr_to_reg(ctx, v4);
-    let v9 = MInst::AtomicRmwSeq {
-        ty: arg0,
-        op: arg1.clone(),
-        mem: arg2.clone(),
-        operand: v6,
-        temp: v7,
-        dst_old: v8,
-    };
-    let v10 = C::emit(ctx, &v9);
-    let v11 = C::writable_gpr_to_gpr(ctx, v4);
-    // Rule at src/isa/x64/inst.isle line 4747.
-    return v11;
-}
-
-// Generated as internal constructor for term bitcast_xmm_to_gpr.
-pub fn constructor_bitcast_xmm_to_gpr<C: Context>(ctx: &mut C, arg0: Type, arg1: Xmm) -> Gpr {
-    match arg0 {
-        F32 => {
-            let v2 = constructor_x64_movd_to_gpr(ctx, arg1);
-            // Rule at src/isa/x64/inst.isle line 4762.
-            return v2;
-        }
-        F64 => {
-            let v3 = constructor_x64_movq_to_gpr(ctx, arg1);
-            // Rule at src/isa/x64/inst.isle line 4764.
-            return v3;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "bitcast_xmm_to_gpr", "src/isa/x64/inst.isle line 4761"
-    )
-}
-
-// Generated as internal constructor for term bitcast_gpr_to_xmm.
-pub fn constructor_bitcast_gpr_to_xmm<C: Context>(ctx: &mut C, arg0: Type, arg1: Gpr) -> Xmm {
-    match arg0 {
-        I32 => {
-            let v2 = &C::gpr_to_gpr_mem(ctx, arg1);
-            let v3 = constructor_x64_movd_to_xmm(ctx, v2);
-            // Rule at src/isa/x64/inst.isle line 4768.
-            return v3;
-        }
-        I64 => {
-            let v2 = &C::gpr_to_gpr_mem(ctx, arg1);
-            let v4 = constructor_x64_movq_to_xmm(ctx, v2);
-            // Rule at src/isa/x64/inst.isle line 4770.
-            return v4;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "bitcast_gpr_to_xmm", "src/isa/x64/inst.isle line 4767"
-    )
-}
-
-// Generated as internal constructor for term stack_addr_impl.
-pub fn constructor_stack_addr_impl<C: Context>(
-    ctx: &mut C,
-    arg0: StackSlot,
-    arg1: Offset32,
-) -> Gpr {
-    let v2 = C::temp_writable_gpr(ctx);
-    let v3 = C::writable_gpr_to_reg(ctx, v2);
-    let v4 = &C::abi_stackslot_addr(ctx, v3, arg0, arg1);
-    let v5 = C::emit(ctx, v4);
-    let v6 = C::writable_gpr_to_gpr(ctx, v2);
-    // Rule at src/isa/x64/inst.isle line 4776.
-    return v6;
-}
-
-// Generated as internal constructor for term x64_checked_srem_seq.
-pub fn constructor_x64_checked_srem_seq<C: Context>(
-    ctx: &mut C,
-    arg0: &OperandSize,
-    arg1: Gpr,
-    arg2: Gpr,
-    arg3: Gpr,
-) -> ValueRegs {
-    let v4 = C::temp_writable_gpr(ctx);
-    let v5 = C::temp_writable_gpr(ctx);
-    let v6 = MInst::CheckedSRemSeq {
-        size: arg0.clone(),
-        dividend_lo: arg1,
-        dividend_hi: arg2,
-        divisor: arg3,
-        dst_quotient: v4,
-        dst_remainder: v5,
-    };
-    let v7 = C::emit(ctx, &v6);
-    let v8 = constructor_writable_gpr_to_r_reg(ctx, v4);
-    let v9 = constructor_writable_gpr_to_r_reg(ctx, v5);
-    let v10 = C::value_regs(ctx, v8, v9);
-    // Rule at src/isa/x64/inst.isle line 4785.
-    return v10;
-}
-
-// Generated as internal constructor for term x64_checked_srem_seq8.
-pub fn constructor_x64_checked_srem_seq8<C: Context>(ctx: &mut C, arg0: Gpr, arg1: Gpr) -> Gpr {
-    let v2 = C::temp_writable_gpr(ctx);
-    let v3 = MInst::CheckedSRemSeq8 {
-        dividend: arg0,
-        divisor: arg1,
-        dst: v2,
-    };
-    let v4 = C::emit(ctx, &v3);
-    let v5 = C::writable_gpr_to_gpr(ctx, v2);
-    // Rule at src/isa/x64/inst.isle line 4792.
-    return v5;
-}
-
-// Generated as internal constructor for term x64_div8.
-pub fn constructor_x64_div8<C: Context>(
-    ctx: &mut C,
-    arg0: Gpr,
-    arg1: &GprMem,
-    arg2: &DivSignedness,
-    arg3: &TrapCode,
-) -> Gpr {
-    let v4 = C::temp_writable_gpr(ctx);
-    let v5 = MInst::Div8 {
-        sign: arg2.clone(),
-        trap: arg3.clone(),
-        divisor: arg1.clone(),
-        dividend: arg0,
-        dst: v4,
-    };
-    let v6 = C::emit(ctx, &v5);
-    let v7 = C::writable_gpr_to_gpr(ctx, v4);
-    // Rule at src/isa/x64/inst.isle line 4799.
-    return v7;
-}
-
-// Generated as internal constructor for term x64_div.
-pub fn constructor_x64_div<C: Context>(
-    ctx: &mut C,
-    arg0: Gpr,
-    arg1: Gpr,
-    arg2: &GprMem,
-    arg3: &OperandSize,
-    arg4: &DivSignedness,
-    arg5: &TrapCode,
-) -> ValueRegs {
-    let v6 = C::temp_writable_gpr(ctx);
-    let v7 = C::temp_writable_gpr(ctx);
-    let v8 = MInst::Div {
-        size: arg3.clone(),
-        sign: arg4.clone(),
-        trap: arg5.clone(),
-        divisor: arg2.clone(),
-        dividend_lo: arg0,
-        dividend_hi: arg1,
-        dst_quotient: v6,
-        dst_remainder: v7,
-    };
-    let v9 = C::emit(ctx, &v8);
-    let v10 = constructor_writable_gpr_to_r_reg(ctx, v6);
-    let v11 = constructor_writable_gpr_to_r_reg(ctx, v7);
-    let v12 = C::value_regs(ctx, v10, v11);
-    // Rule at src/isa/x64/inst.isle line 4809.
-    return v12;
-}
-
-// Generated as internal constructor for term x64_div_quotient.
-pub fn constructor_x64_div_quotient<C: Context>(
-    ctx: &mut C,
-    arg0: Gpr,
-    arg1: Gpr,
-    arg2: &GprMem,
-    arg3: &OperandSize,
-    arg4: &DivSignedness,
-    arg5: &TrapCode,
-) -> ValueRegs {
-    let v6 = constructor_x64_div(ctx, arg0, arg1, arg2, arg3, arg4, arg5);
-    let v8 = C::value_regs_get(ctx, v6, 0x0);
-    let v9 = C::value_reg(ctx, v8);
-    // Rule at src/isa/x64/inst.isle line 4817.
-    return v9;
-}
-
-// Generated as internal constructor for term x64_div_remainder.
-pub fn constructor_x64_div_remainder<C: Context>(
-    ctx: &mut C,
-    arg0: Gpr,
-    arg1: Gpr,
-    arg2: &GprMem,
-    arg3: &OperandSize,
-    arg4: &DivSignedness,
-    arg5: &TrapCode,
-) -> ValueRegs {
-    let v6 = constructor_x64_div(ctx, arg0, arg1, arg2, arg3, arg4, arg5);
-    let v8 = C::value_regs_get(ctx, v6, 0x1);
-    let v9 = C::value_reg(ctx, v8);
-    // Rule at src/isa/x64/inst.isle line 4822.
-    return v9;
-}
-
-// Generated as internal constructor for term x64_sign_extend_data.
-pub fn constructor_x64_sign_extend_data<C: Context>(
-    ctx: &mut C,
-    arg0: Gpr,
-    arg1: &OperandSize,
-) -> Gpr {
-    let v2 = C::temp_writable_gpr(ctx);
-    let v3 = MInst::SignExtendData {
-        size: arg1.clone(),
-        src: arg0,
-        dst: v2,
-    };
-    let v4 = C::emit(ctx, &v3);
-    let v5 = C::writable_gpr_to_gpr(ctx, v2);
-    // Rule at src/isa/x64/inst.isle line 4827.
-    return v5;
-}
-
-// Generated as internal constructor for term read_pinned_gpr.
-pub fn constructor_read_pinned_gpr<C: Context>(ctx: &mut C) -> Gpr {
-    let v0 = C::preg_pinned(ctx);
-    let v1 = constructor_mov_from_preg(ctx, v0);
-    let v2 = C::gpr_new(ctx, v1);
-    // Rule at src/isa/x64/inst.isle line 4835.
-    return v2;
-}
-
-// Generated as internal constructor for term write_pinned_gpr.
-pub fn constructor_write_pinned_gpr<C: Context>(ctx: &mut C, arg0: Gpr) -> SideEffectNoResult {
-    let v1 = C::preg_pinned(ctx);
-    let v2 = &constructor_mov_to_preg(ctx, v1, arg0);
-    // Rule at src/isa/x64/inst.isle line 4839.
-    return v2.clone();
-}
-
-// Generated as internal constructor for term elf_tls_get_addr.
-pub fn constructor_elf_tls_get_addr<C: Context>(ctx: &mut C, arg0: ExternalName) -> Gpr {
-    let v1 = C::temp_writable_gpr(ctx);
-    let v2 = MInst::ElfTlsGetAddr {
-        symbol: arg0,
-        dst: v1,
-    };
-    let v3 = C::emit(ctx, &v2);
-    let v4 = C::writable_gpr_to_gpr(ctx, v1);
-    // Rule at src/isa/x64/inst.isle line 4881.
-    return v4;
-}
-
-// Generated as internal constructor for term macho_tls_get_addr.
-pub fn constructor_macho_tls_get_addr<C: Context>(ctx: &mut C, arg0: ExternalName) -> Gpr {
-    let v1 = C::temp_writable_gpr(ctx);
-    let v2 = MInst::MachOTlsGetAddr {
-        symbol: arg0,
-        dst: v1,
-    };
-    let v3 = C::emit(ctx, &v2);
-    let v4 = C::writable_gpr_to_gpr(ctx, v1);
-    // Rule at src/isa/x64/inst.isle line 4888.
-    return v4;
-}
-
-// Generated as internal constructor for term coff_tls_get_addr.
-pub fn constructor_coff_tls_get_addr<C: Context>(ctx: &mut C, arg0: ExternalName) -> Gpr {
-    let v1 = C::temp_writable_gpr(ctx);
-    let v2 = C::temp_writable_gpr(ctx);
-    let v3 = MInst::CoffTlsGetAddr {
-        symbol: arg0,
-        dst: v1,
-        tmp: v2,
-    };
-    let v4 = C::emit(ctx, &v3);
-    let v5 = C::writable_gpr_to_gpr(ctx, v1);
-    // Rule at src/isa/x64/inst.isle line 4895.
-    return v5;
-}
-
-// Generated as internal constructor for term reg_to_xmm_mem.
-pub fn constructor_reg_to_xmm_mem<C: Context>(ctx: &mut C, arg0: Reg) -> XmmMem {
-    let v1 = C::xmm_new(ctx, arg0);
-    let v2 = &C::xmm_to_xmm_mem(ctx, v1);
-    // Rule at src/isa/x64/inst.isle line 4982.
-    return v2.clone();
-}
-
-// Generated as internal constructor for term xmm_to_reg_mem.
-pub fn constructor_xmm_to_reg_mem<C: Context>(ctx: &mut C, arg0: Reg) -> XmmMem {
-    let v1 = C::xmm_new(ctx, arg0);
-    let v2 = C::xmm_to_reg(ctx, v1);
-    let v3 = RegMem::Reg { reg: v2 };
-    let v4 = &C::reg_mem_to_xmm_mem(ctx, &v3);
-    // Rule at src/isa/x64/inst.isle line 4985.
-    return v4.clone();
-}
-
-// Generated as internal constructor for term writable_gpr_to_r_reg.
-pub fn constructor_writable_gpr_to_r_reg<C: Context>(ctx: &mut C, arg0: WritableGpr) -> Reg {
-    let v1 = C::writable_gpr_to_reg(ctx, arg0);
-    let v2 = C::writable_reg_to_reg(ctx, v1);
-    // Rule at src/isa/x64/inst.isle line 4989.
-    return v2;
-}
-
-// Generated as internal constructor for term writable_gpr_to_gpr_mem.
-pub fn constructor_writable_gpr_to_gpr_mem<C: Context>(ctx: &mut C, arg0: WritableGpr) -> GprMem {
-    let v1 = C::writable_gpr_to_gpr(ctx, arg0);
-    let v2 = &C::gpr_to_gpr_mem(ctx, v1);
-    // Rule at src/isa/x64/inst.isle line 4992.
-    return v2.clone();
-}
-
-// Generated as internal constructor for term writable_gpr_to_value_regs.
-pub fn constructor_writable_gpr_to_value_regs<C: Context>(
-    ctx: &mut C,
-    arg0: WritableGpr,
-) -> ValueRegs {
-    let v1 = constructor_writable_gpr_to_r_reg(ctx, arg0);
-    let v2 = C::value_reg(ctx, v1);
-    // Rule at src/isa/x64/inst.isle line 4995.
-    return v2;
-}
-
-// Generated as internal constructor for term writable_xmm_to_r_reg.
-pub fn constructor_writable_xmm_to_r_reg<C: Context>(ctx: &mut C, arg0: WritableXmm) -> Reg {
-    let v1 = C::writable_xmm_to_reg(ctx, arg0);
-    let v2 = C::writable_reg_to_reg(ctx, v1);
-    // Rule at src/isa/x64/inst.isle line 4998.
-    return v2;
-}
-
-// Generated as internal constructor for term writable_xmm_to_xmm_mem.
-pub fn constructor_writable_xmm_to_xmm_mem<C: Context>(ctx: &mut C, arg0: WritableXmm) -> XmmMem {
-    let v1 = C::writable_xmm_to_xmm(ctx, arg0);
-    let v2 = &C::xmm_to_xmm_mem(ctx, v1);
-    // Rule at src/isa/x64/inst.isle line 5001.
-    return v2.clone();
-}
-
-// Generated as internal constructor for term writable_xmm_to_value_regs.
-pub fn constructor_writable_xmm_to_value_regs<C: Context>(
-    ctx: &mut C,
-    arg0: WritableXmm,
-) -> ValueRegs {
-    let v1 = constructor_writable_xmm_to_r_reg(ctx, arg0);
-    let v2 = C::value_reg(ctx, v1);
-    // Rule at src/isa/x64/inst.isle line 5004.
-    return v2;
-}
-
-// Generated as internal constructor for term synthetic_amode_to_gpr_mem.
-pub fn constructor_synthetic_amode_to_gpr_mem<C: Context>(
-    ctx: &mut C,
-    arg0: &SyntheticAmode,
-) -> GprMem {
-    let v1 = &C::synthetic_amode_to_reg_mem(ctx, arg0);
-    let v2 = &C::reg_mem_to_gpr_mem(ctx, v1);
-    // Rule at src/isa/x64/inst.isle line 5011.
-    return v2.clone();
-}
-
-// Generated as internal constructor for term amode_to_gpr_mem.
-pub fn constructor_amode_to_gpr_mem<C: Context>(ctx: &mut C, arg0: &Amode) -> GprMem {
-    let v1 = &C::amode_to_synthetic_amode(ctx, arg0);
-    let v2 = &constructor_synthetic_amode_to_gpr_mem(ctx, v1);
-    // Rule at src/isa/x64/inst.isle line 5009.
-    return v2.clone();
-}
-
-// Generated as internal constructor for term amode_to_xmm_mem.
-pub fn constructor_amode_to_xmm_mem<C: Context>(ctx: &mut C, arg0: &Amode) -> XmmMem {
-    let v1 = &C::amode_to_synthetic_amode(ctx, arg0);
-    let v2 = &constructor_synthetic_amode_to_xmm_mem(ctx, v1);
-    // Rule at src/isa/x64/inst.isle line 5014.
-    return v2.clone();
-}
-
-// Generated as internal constructor for term synthetic_amode_to_xmm_mem.
-pub fn constructor_synthetic_amode_to_xmm_mem<C: Context>(
-    ctx: &mut C,
-    arg0: &SyntheticAmode,
-) -> XmmMem {
-    let v1 = &C::synthetic_amode_to_reg_mem(ctx, arg0);
-    let v2 = &C::reg_mem_to_xmm_mem(ctx, v1);
-    // Rule at src/isa/x64/inst.isle line 5017.
-    return v2.clone();
-}
-
-// Generated as internal constructor for term const_to_xmm_mem.
-pub fn constructor_const_to_xmm_mem<C: Context>(ctx: &mut C, arg0: VCodeConstant) -> XmmMem {
-    let v1 = &C::const_to_synthetic_amode(ctx, arg0);
-    let v2 = &constructor_synthetic_amode_to_xmm_mem(ctx, v1);
-    // Rule at src/isa/x64/inst.isle line 5022.
-    return v2.clone();
-}
-
-// Generated as internal constructor for term const_to_reg_mem.
-pub fn constructor_const_to_reg_mem<C: Context>(ctx: &mut C, arg0: VCodeConstant) -> RegMem {
-    let v1 = &C::const_to_synthetic_amode(ctx, arg0);
-    let v2 = RegMem::Mem { addr: v1.clone() };
-    // Rule at src/isa/x64/inst.isle line 5024.
-    return v2;
-}
-
-// Generated as internal constructor for term xmm_to_xmm_mem_aligned.
-pub fn constructor_xmm_to_xmm_mem_aligned<C: Context>(ctx: &mut C, arg0: Xmm) -> XmmMemAligned {
-    let v1 = &C::xmm_to_xmm_mem(ctx, arg0);
-    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, v1);
-    // Rule at src/isa/x64/inst.isle line 5027.
-    return v2.clone();
-}
-
-// Generated as internal constructor for term amode_to_xmm_mem_aligned.
-pub fn constructor_amode_to_xmm_mem_aligned<C: Context>(
-    ctx: &mut C,
-    arg0: &Amode,
-) -> XmmMemAligned {
-    let v1 = &constructor_amode_to_xmm_mem(ctx, arg0);
-    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, v1);
-    // Rule at src/isa/x64/inst.isle line 5029.
-    return v2.clone();
-}
-
-// Generated as internal constructor for term synthetic_amode_to_xmm_mem_aligned.
-pub fn constructor_synthetic_amode_to_xmm_mem_aligned<C: Context>(
-    ctx: &mut C,
-    arg0: &SyntheticAmode,
-) -> XmmMemAligned {
-    let v1 = &constructor_synthetic_amode_to_xmm_mem(ctx, arg0);
-    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, v1);
-    // Rule at src/isa/x64/inst.isle line 5031.
-    return v2.clone();
-}
-
-// Generated as internal constructor for term put_in_xmm_mem_aligned.
-pub fn constructor_put_in_xmm_mem_aligned<C: Context>(ctx: &mut C, arg0: Value) -> XmmMemAligned {
-    let v1 = &C::put_in_xmm_mem(ctx, arg0);
-    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, v1);
-    // Rule at src/isa/x64/inst.isle line 5033.
-    return v2.clone();
-}
-
-// Generated as internal constructor for term mov_to_preg.
-pub fn constructor_mov_to_preg<C: Context>(
-    ctx: &mut C,
-    arg0: PReg,
-    arg1: Gpr,
-) -> SideEffectNoResult {
-    let v2 = MInst::MovToPReg {
-        src: arg1,
-        dst: arg0,
-    };
-    let v3 = SideEffectNoResult::Inst { inst: v2 };
-    // Rule at src/isa/x64/inst.isle line 5036.
-    return v3;
-}
-
-// Generated as internal constructor for term x64_rbp.
-pub fn constructor_x64_rbp<C: Context>(ctx: &mut C) -> Reg {
-    let v0 = C::preg_rbp(ctx);
-    let v1 = constructor_mov_from_preg(ctx, v0);
-    // Rule at src/isa/x64/inst.isle line 5049.
-    return v1;
-}
-
-// Generated as internal constructor for term x64_rsp.
-pub fn constructor_x64_rsp<C: Context>(ctx: &mut C) -> Reg {
-    let v0 = C::preg_rsp(ctx);
-    let v1 = constructor_mov_from_preg(ctx, v0);
-    // Rule at src/isa/x64/inst.isle line 5053.
-    return v1;
-}
-
-// Generated as internal constructor for term lower.
-pub fn constructor_lower<C: Context>(ctx: &mut C, arg0: Inst) -> Option<InstOutput> {
-    let v6 = &C::inst_data(ctx, arg0);
-    match v6 {
-        &InstructionData::AtomicCas {
-            opcode: ref v1666,
-            args: ref v1667,
-            flags: v1668,
-        } => {
-            if let &Opcode::AtomicCas = v1666 {
-                let v1 = C::first_result(ctx, arg0);
-                if let Some(v2) = v1 {
-                    let v3 = C::value_type(ctx, v2);
-                    let v4 = C::fits_in_64(ctx, v3);
-                    if let Some(v5) = v4 {
-                        let v1641 = C::ty_int(ctx, v3);
-                        if let Some(v1642) = v1641 {
-                            let v1669 = C::unpack_value_array_3(ctx, v1667);
-                            let v1673 = constructor_put_in_gpr(ctx, v1669.1);
-                            let v1674 = constructor_put_in_gpr(ctx, v1669.2);
-                            let v1675 = C::zero_offset(ctx);
-                            let v1676 = &constructor_to_amode(ctx, v1668, v1669.0, v1675);
-                            let v1677 = &C::amode_to_synthetic_amode(ctx, v1676);
-                            let v1678 = constructor_x64_cmpxchg(ctx, v5, v1673, v1674, v1677);
-                            let v1679 = constructor_output_gpr(ctx, v1678);
-                            // Rule at src/isa/x64/lower.isle line 3163.
-                            return Some(v1679);
-                        }
-                    }
-                }
-            }
-        }
-        &InstructionData::AtomicRmw {
-            opcode: ref v1680,
-            args: ref v1681,
-            flags: v1682,
-            op: ref v1683,
-        } => {
-            if let &Opcode::AtomicRmw = v1680 {
-                let v1 = C::first_result(ctx, arg0);
-                if let Some(v2) = v1 {
-                    let v3 = C::value_type(ctx, v2);
-                    let v4 = C::fits_in_64(ctx, v3);
-                    if let Some(v5) = v4 {
-                        let v1641 = C::ty_int(ctx, v3);
-                        if let Some(v1642) = v1641 {
-                            let v1687 = &C::atomic_rmw_op_to_mach_atomic_rmw_op(ctx, v1683);
-                            let v1643 = C::zero_offset(ctx);
-                            let v1684 = C::unpack_value_array_2(ctx, v1681);
-                            let v1688 = &constructor_to_amode(ctx, v1682, v1684.0, v1643);
-                            let v1689 = &C::amode_to_synthetic_amode(ctx, v1688);
-                            let v1690 = constructor_put_in_gpr(ctx, v1684.1);
-                            let v1691 =
-                                constructor_x64_atomic_rmw_seq(ctx, v5, v1687, v1689, v1690);
-                            let v1692 = constructor_output_gpr(ctx, v1691);
-                            // Rule at src/isa/x64/lower.isle line 3179.
-                            return Some(v1692);
-                        }
-                    }
-                }
-            }
-        }
-        &InstructionData::Binary {
-            opcode: ref v36,
-            args: ref v37,
-        } => {
-            match v36 {
-                &Opcode::Swizzle => {
-                    let v38 = C::unpack_value_array_2(ctx, v37);
-                    let v1180 = constructor_put_in_xmm(ctx, v38.1);
-                    let v2274 = C::emit_u128_le_const(ctx, 0x70707070707070707070707070707070);
-                    let v2275 = &constructor_const_to_xmm_mem(ctx, v2274);
-                    let v2276 = constructor_x64_paddusb(ctx, v1180, v2275);
-                    let v339 = constructor_put_in_xmm(ctx, v38.0);
-                    let v2277 = C::xmm_to_reg(ctx, v2276);
-                    let v2278 = &constructor_xmm_to_reg_mem(ctx, v2277);
-                    let v2279 = &C::xmm_mem_to_reg_mem(ctx, v2278);
-                    let v2280 = constructor_lower_pshufb(ctx, v339, v2279);
-                    let v2281 = constructor_output_xmm(ctx, v2280);
-                    // Rule at src/isa/x64/lower.isle line 4272.
-                    return Some(v2281);
-                }
-                &Opcode::X86Pshufb => {
-                    let v520 = C::use_ssse3(ctx);
-                    if v520 == true {
-                        let v38 = C::unpack_value_array_2(ctx, v37);
-                        let v68 = constructor_put_in_xmm(ctx, v38.0);
-                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
-                        let v2282 = constructor_x64_pshufb(ctx, v68, v69);
-                        let v2283 = constructor_output_xmm(ctx, v2282);
-                        // Rule at src/isa/x64/lower.isle line 4278.
-                        return Some(v2283);
-                    }
-                }
-                &Opcode::Smin => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v682 = C::ty_vec128(ctx, v3);
-                        if let Some(v683) = v682 {
-                            let v686 = constructor_has_pmins(ctx, v683);
-                            if v686 == true {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
-                                let v687 = constructor_x64_pmins(ctx, v683, v68, v69);
-                                let v688 = constructor_output_xmm(ctx, v687);
-                                // Rule at src/isa/x64/lower.isle line 1630.
-                                return Some(v688);
-                            }
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v68 = constructor_put_in_xmm(ctx, v38.0);
-                            let v439 = constructor_put_in_xmm(ctx, v38.1);
-                            let v312 = &C::xmm_to_xmm_mem(ctx, v68);
-                            let v689 = constructor_x64_pcmpgt(ctx, v683, v439, v312);
-                            let v314 = &C::xmm_to_xmm_mem(ctx, v68);
-                            let v690 = constructor_x64_pand(ctx, v689, v314);
-                            let v444 = &C::xmm_to_xmm_mem(ctx, v439);
-                            let v691 = constructor_x64_pandn(ctx, v689, v444);
-                            let v692 = &C::xmm_to_xmm_mem(ctx, v691);
-                            let v693 = constructor_x64_por(ctx, v690, v692);
-                            let v694 = constructor_output_xmm(ctx, v693);
-                            // Rule at src/isa/x64/lower.isle line 1634.
-                            return Some(v694);
-                        }
-                        let v4 = C::fits_in_64(ctx, v3);
-                        if let Some(v5) = v4 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v677 = constructor_cmp_and_choose(ctx, v5, &CC::L, v38.0, v38.1);
-                            let v678 = C::output(ctx, v677);
-                            // Rule at src/isa/x64/lower.isle line 1580.
-                            return Some(v678);
-                        }
-                    }
-                }
-                &Opcode::Umin => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v682 = C::ty_vec128(ctx, v3);
-                        if let Some(v683) = v682 {
-                            let v716 = constructor_has_pminu(ctx, v683);
-                            if v716 == true {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
-                                let v717 = constructor_x64_pminu(ctx, v683, v68, v69);
-                                let v718 = constructor_output_xmm(ctx, v717);
-                                // Rule at src/isa/x64/lower.isle line 1682.
-                                return Some(v718);
-                            }
-                        }
-                        if v3 == I16X8 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v68 = constructor_put_in_xmm(ctx, v38.0);
-                            let v69 = &C::put_in_xmm_mem(ctx, v38.1);
-                            let v150 = constructor_x64_psubusw(ctx, v68, v69);
-                            let v719 = &C::xmm_to_xmm_mem(ctx, v150);
-                            let v720 = constructor_x64_psubw(ctx, v68, v719);
-                            let v721 = constructor_output_xmm(ctx, v720);
-                            // Rule at src/isa/x64/lower.isle line 1688.
-                            return Some(v721);
-                        }
-                        if let Some(v683) = v682 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v68 = constructor_put_in_xmm(ctx, v38.0);
-                            let v439 = constructor_put_in_xmm(ctx, v38.1);
-                            let v702 = constructor_flip_high_bit_mask(ctx, v683);
-                            let v703 = &C::xmm_to_xmm_mem(ctx, v702);
-                            let v704 = constructor_x64_pxor(ctx, v68, v703);
-                            let v705 = &C::xmm_to_xmm_mem(ctx, v702);
-                            let v706 = constructor_x64_pxor(ctx, v439, v705);
-                            let v722 = &C::xmm_to_xmm_mem(ctx, v704);
-                            let v723 = constructor_x64_pcmpgt(ctx, v683, v706, v722);
-                            let v709 = &C::xmm_to_xmm_mem(ctx, v68);
-                            let v724 = constructor_x64_pand(ctx, v723, v709);
-                            let v711 = &C::xmm_to_xmm_mem(ctx, v439);
-                            let v725 = constructor_x64_pandn(ctx, v723, v711);
-                            let v726 = &C::xmm_to_xmm_mem(ctx, v725);
-                            let v727 = constructor_x64_por(ctx, v724, v726);
-                            let v728 = constructor_output_xmm(ctx, v727);
-                            // Rule at src/isa/x64/lower.isle line 1693.
-                            return Some(v728);
-                        }
-                        let v4 = C::fits_in_64(ctx, v3);
-                        if let Some(v5) = v4 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v671 = constructor_cmp_and_choose(ctx, v5, &CC::B, v38.0, v38.1);
-                            let v672 = C::output(ctx, v671);
-                            // Rule at src/isa/x64/lower.isle line 1574.
-                            return Some(v672);
-                        }
-                    }
-                }
-                &Opcode::Smax => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v682 = C::ty_vec128(ctx, v3);
-                        if let Some(v683) = v682 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v68 = constructor_put_in_xmm(ctx, v38.0);
-                            let v439 = constructor_put_in_xmm(ctx, v38.1);
-                            let v684 = constructor_lower_vec_smax(ctx, v683, v68, v439);
-                            let v685 = constructor_output_xmm(ctx, v684);
-                            // Rule at src/isa/x64/lower.isle line 1610.
-                            return Some(v685);
-                        }
-                        let v4 = C::fits_in_64(ctx, v3);
-                        if let Some(v5) = v4 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v680 = constructor_cmp_and_choose(ctx, v5, &CC::NL, v38.0, v38.1);
-                            let v681 = C::output(ctx, v680);
-                            // Rule at src/isa/x64/lower.isle line 1583.
-                            return Some(v681);
-                        }
-                    }
-                }
-                &Opcode::Umax => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v682 = C::ty_vec128(ctx, v3);
-                        if let Some(v683) = v682 {
-                            let v695 = constructor_has_pmaxu(ctx, v683);
-                            if v695 == true {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
-                                let v696 = constructor_x64_pmaxu(ctx, v683, v68, v69);
-                                let v697 = constructor_output_xmm(ctx, v696);
-                                // Rule at src/isa/x64/lower.isle line 1646.
-                                return Some(v697);
-                            }
-                        }
-                        if v3 == I16X8 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v68 = constructor_put_in_xmm(ctx, v38.0);
-                            let v439 = constructor_put_in_xmm(ctx, v38.1);
-                            let v312 = &C::xmm_to_xmm_mem(ctx, v68);
-                            let v698 = constructor_x64_psubusw(ctx, v439, v312);
-                            let v699 = &C::xmm_to_xmm_mem(ctx, v698);
-                            let v700 = constructor_x64_paddw(ctx, v68, v699);
-                            let v701 = constructor_output_xmm(ctx, v700);
-                            // Rule at src/isa/x64/lower.isle line 1652.
-                            return Some(v701);
-                        }
-                        if let Some(v683) = v682 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v68 = constructor_put_in_xmm(ctx, v38.0);
-                            let v439 = constructor_put_in_xmm(ctx, v38.1);
-                            let v702 = constructor_flip_high_bit_mask(ctx, v683);
-                            let v703 = &C::xmm_to_xmm_mem(ctx, v702);
-                            let v704 = constructor_x64_pxor(ctx, v68, v703);
-                            let v705 = &C::xmm_to_xmm_mem(ctx, v702);
-                            let v706 = constructor_x64_pxor(ctx, v439, v705);
-                            let v707 = &C::xmm_to_xmm_mem(ctx, v706);
-                            let v708 = constructor_x64_pcmpgt(ctx, v683, v704, v707);
-                            let v709 = &C::xmm_to_xmm_mem(ctx, v68);
-                            let v710 = constructor_x64_pand(ctx, v708, v709);
-                            let v711 = &C::xmm_to_xmm_mem(ctx, v439);
-                            let v712 = constructor_x64_pandn(ctx, v708, v711);
-                            let v713 = &C::xmm_to_xmm_mem(ctx, v712);
-                            let v714 = constructor_x64_por(ctx, v710, v713);
-                            let v715 = constructor_output_xmm(ctx, v714);
-                            // Rule at src/isa/x64/lower.isle line 1659.
-                            return Some(v715);
-                        }
-                        let v4 = C::fits_in_64(ctx, v3);
-                        if let Some(v5) = v4 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v674 = constructor_cmp_and_choose(ctx, v5, &CC::NB, v38.0, v38.1);
-                            let v675 = C::output(ctx, v674);
-                            // Rule at src/isa/x64/lower.isle line 1577.
-                            return Some(v675);
-                        }
-                    }
-                }
-                &Opcode::AvgRound => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v64 = C::multi_lane(ctx, v3);
-                        if let Some(v65) = v64 {
-                            match v65.0 {
-                                0x8 => {
-                                    if v65.1 == 0x10 {
-                                        let v38 = C::unpack_value_array_2(ctx, v37);
-                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
-                                        let v410 = constructor_x64_pavgb(ctx, v68, v69);
-                                        let v411 = constructor_output_xmm(ctx, v410);
-                                        // Rule at src/isa/x64/lower.isle line 929.
-                                        return Some(v411);
-                                    }
-                                }
-                                0x10 => {
-                                    if v65.1 == 0x8 {
-                                        let v38 = C::unpack_value_array_2(ctx, v37);
-                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
-                                        let v412 = constructor_x64_pavgw(ctx, v68, v69);
-                                        let v413 = constructor_output_xmm(ctx, v412);
-                                        // Rule at src/isa/x64/lower.isle line 933.
-                                        return Some(v413);
-                                    }
-                                }
-                                _ => {}
-                            }
-                        }
-                    }
-                }
-                &Opcode::UaddSat => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v64 = C::multi_lane(ctx, v3);
-                        if let Some(v65) = v64 {
-                            match v65.0 {
-                                0x8 => {
-                                    if v65.1 == 0x10 {
-                                        let v38 = C::unpack_value_array_2(ctx, v37);
-                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
-                                        let v126 = constructor_x64_paddusb(ctx, v68, v69);
-                                        let v127 = constructor_output_xmm(ctx, v126);
-                                        // Rule at src/isa/x64/lower.isle line 194.
-                                        return Some(v127);
-                                    }
-                                }
-                                0x10 => {
-                                    if v65.1 == 0x8 {
-                                        let v38 = C::unpack_value_array_2(ctx, v37);
-                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
-                                        let v128 = constructor_x64_paddusw(ctx, v68, v69);
-                                        let v129 = constructor_output_xmm(ctx, v128);
-                                        // Rule at src/isa/x64/lower.isle line 198.
-                                        return Some(v129);
-                                    }
-                                }
-                                _ => {}
-                            }
-                        }
-                    }
-                }
-                &Opcode::SaddSat => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v64 = C::multi_lane(ctx, v3);
-                        if let Some(v65) = v64 {
-                            match v65.0 {
-                                0x8 => {
-                                    if v65.1 == 0x10 {
-                                        let v38 = C::unpack_value_array_2(ctx, v37);
-                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
-                                        let v122 = constructor_x64_paddsb(ctx, v68, v69);
-                                        let v123 = constructor_output_xmm(ctx, v122);
-                                        // Rule at src/isa/x64/lower.isle line 184.
-                                        return Some(v123);
-                                    }
-                                }
-                                0x10 => {
-                                    if v65.1 == 0x8 {
-                                        let v38 = C::unpack_value_array_2(ctx, v37);
-                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
-                                        let v124 = constructor_x64_paddsw(ctx, v68, v69);
-                                        let v125 = constructor_output_xmm(ctx, v124);
-                                        // Rule at src/isa/x64/lower.isle line 188.
-                                        return Some(v125);
-                                    }
-                                }
-                                _ => {}
-                            }
-                        }
-                    }
-                }
-                &Opcode::UsubSat => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v64 = C::multi_lane(ctx, v3);
-                        if let Some(v65) = v64 {
-                            match v65.0 {
-                                0x8 => {
-                                    if v65.1 == 0x10 {
-                                        let v38 = C::unpack_value_array_2(ctx, v37);
-                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
-                                        let v148 = constructor_x64_psubusb(ctx, v68, v69);
-                                        let v149 = constructor_output_xmm(ctx, v148);
-                                        // Rule at src/isa/x64/lower.isle line 255.
-                                        return Some(v149);
-                                    }
-                                }
-                                0x10 => {
-                                    if v65.1 == 0x8 {
-                                        let v38 = C::unpack_value_array_2(ctx, v37);
-                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
-                                        let v150 = constructor_x64_psubusw(ctx, v68, v69);
-                                        let v151 = constructor_output_xmm(ctx, v150);
-                                        // Rule at src/isa/x64/lower.isle line 259.
-                                        return Some(v151);
-                                    }
-                                }
-                                _ => {}
-                            }
-                        }
-                    }
-                }
-                &Opcode::SsubSat => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v64 = C::multi_lane(ctx, v3);
-                        if let Some(v65) = v64 {
-                            match v65.0 {
-                                0x8 => {
-                                    if v65.1 == 0x10 {
-                                        let v38 = C::unpack_value_array_2(ctx, v37);
-                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
-                                        let v144 = constructor_x64_psubsb(ctx, v68, v69);
-                                        let v145 = constructor_output_xmm(ctx, v144);
-                                        // Rule at src/isa/x64/lower.isle line 245.
-                                        return Some(v145);
-                                    }
-                                }
-                                0x10 => {
-                                    if v65.1 == 0x8 {
-                                        let v38 = C::unpack_value_array_2(ctx, v37);
-                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
-                                        let v146 = constructor_x64_psubsw(ctx, v68, v69);
-                                        let v147 = constructor_output_xmm(ctx, v146);
-                                        // Rule at src/isa/x64/lower.isle line 249.
-                                        return Some(v147);
-                                    }
-                                }
-                                _ => {}
-                            }
-                        }
-                    }
-                }
-                &Opcode::Iadd => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        if v3 == I128 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v78 = C::put_in_regs(ctx, v38.0);
-                            let v80 = constructor_value_regs_get_gpr(ctx, v78, 0x0);
-                            let v82 = constructor_value_regs_get_gpr(ctx, v78, 0x1);
-                            let v83 = C::put_in_regs(ctx, v38.1);
-                            let v84 = constructor_value_regs_get_gpr(ctx, v83, 0x0);
-                            let v85 = constructor_value_regs_get_gpr(ctx, v83, 0x1);
-                            let v86 = &C::gpr_to_gpr_mem_imm(ctx, v84);
-                            let v87 = &constructor_x64_add_with_flags_paired(ctx, I64, v80, v86);
-                            let v88 = &C::gpr_to_gpr_mem_imm(ctx, v85);
-                            let v89 = &constructor_x64_adc_paired(ctx, I64, v82, v88);
-                            let v90 = constructor_with_flags(ctx, v87, v89);
-                            let v91 = C::output(ctx, v90);
-                            // Rule at src/isa/x64/lower.isle line 88.
-                            return Some(v91);
-                        }
-                        let v64 = C::multi_lane(ctx, v3);
-                        if let Some(v65) = v64 {
-                            match v65.0 {
-                                0x8 => {
-                                    if v65.1 == 0x10 {
-                                        let v38 = C::unpack_value_array_2(ctx, v37);
-                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
-                                        let v70 = constructor_x64_paddb(ctx, v68, v69);
-                                        let v71 = constructor_output_xmm(ctx, v70);
-                                        // Rule at src/isa/x64/lower.isle line 71.
-                                        return Some(v71);
-                                    }
-                                }
-                                0x10 => {
-                                    if v65.1 == 0x8 {
-                                        let v38 = C::unpack_value_array_2(ctx, v37);
-                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
-                                        let v72 = constructor_x64_paddw(ctx, v68, v69);
-                                        let v73 = constructor_output_xmm(ctx, v72);
-                                        // Rule at src/isa/x64/lower.isle line 75.
-                                        return Some(v73);
-                                    }
-                                }
-                                0x20 => {
-                                    if v65.1 == 0x4 {
-                                        let v38 = C::unpack_value_array_2(ctx, v37);
-                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
-                                        let v74 = constructor_x64_paddd(ctx, v68, v69);
-                                        let v75 = constructor_output_xmm(ctx, v74);
-                                        // Rule at src/isa/x64/lower.isle line 79.
-                                        return Some(v75);
-                                    }
-                                }
-                                0x40 => {
-                                    if v65.1 == 0x2 {
-                                        let v38 = C::unpack_value_array_2(ctx, v37);
-                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
-                                        let v76 = constructor_x64_paddq(ctx, v68, v69);
-                                        let v77 = constructor_output_xmm(ctx, v76);
-                                        // Rule at src/isa/x64/lower.isle line 83.
-                                        return Some(v77);
-                                    }
-                                }
-                                _ => {}
-                            }
-                        }
-                        let v4 = C::fits_in_64(ctx, v3);
-                        if let Some(v5) = v4 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v58 = &C::sinkable_load(ctx, v38.0);
-                            if let Some(v59) = v58 {
-                                let v60 = constructor_put_in_gpr(ctx, v38.1);
-                                let v61 = &constructor_sink_load_to_gpr_mem_imm(ctx, v59);
-                                let v62 = constructor_x64_add(ctx, v5, v60, v61);
-                                let v63 = constructor_output_gpr(ctx, v62);
-                                // Rule at src/isa/x64/lower.isle line 65.
-                                return Some(v63);
-                            }
-                            let v53 = &C::sinkable_load(ctx, v38.1);
-                            if let Some(v54) = v53 {
-                                let v41 = constructor_put_in_gpr(ctx, v38.0);
-                                let v55 = &constructor_sink_load_to_gpr_mem_imm(ctx, v54);
-                                let v56 = constructor_x64_add(ctx, v5, v41, v55);
-                                let v57 = constructor_output_gpr(ctx, v56);
-                                // Rule at src/isa/x64/lower.isle line 62.
-                                return Some(v57);
-                            }
-                        }
-                        let v45 = C::ty_32_or_64(ctx, v3);
-                        if let Some(v46) = v45 {
-                            let v48 = C::zero_offset(ctx);
-                            let v47 = C::mem_flags_trusted(ctx);
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v49 = &constructor_to_amode_add(ctx, v47, v38.0, v38.1, v48);
-                            let v50 = &C::amode_to_synthetic_amode(ctx, v49);
-                            let v51 = constructor_x64_lea(ctx, v46, v50);
-                            let v52 = constructor_output_gpr(ctx, v51);
-                            // Rule at src/isa/x64/lower.isle line 56.
-                            return Some(v52);
-                        }
-                        let v34 = C::fits_in_16(ctx, v3);
-                        if let Some(v35) = v34 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v41 = constructor_put_in_gpr(ctx, v38.0);
-                            let v42 = &constructor_put_in_gpr_mem_imm(ctx, v38.1);
-                            let v43 = constructor_x64_add(ctx, v35, v41, v42);
-                            let v44 = constructor_output_gpr(ctx, v43);
-                            // Rule at src/isa/x64/lower.isle line 45.
-                            return Some(v44);
-                        }
-                    }
-                }
-                &Opcode::Isub => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        if v3 == I128 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v78 = C::put_in_regs(ctx, v38.0);
-                            let v80 = constructor_value_regs_get_gpr(ctx, v78, 0x0);
-                            let v82 = constructor_value_regs_get_gpr(ctx, v78, 0x1);
-                            let v83 = C::put_in_regs(ctx, v38.1);
-                            let v84 = constructor_value_regs_get_gpr(ctx, v83, 0x0);
-                            let v85 = constructor_value_regs_get_gpr(ctx, v83, 0x1);
-                            let v86 = &C::gpr_to_gpr_mem_imm(ctx, v84);
-                            let v140 = &constructor_x64_sub_with_flags_paired(ctx, I64, v80, v86);
-                            let v88 = &C::gpr_to_gpr_mem_imm(ctx, v85);
-                            let v141 = &constructor_x64_sbb_paired(ctx, I64, v82, v88);
-                            let v142 = constructor_with_flags(ctx, v140, v141);
-                            let v143 = C::output(ctx, v142);
-                            // Rule at src/isa/x64/lower.isle line 230.
-                            return Some(v143);
-                        }
-                        let v64 = C::multi_lane(ctx, v3);
-                        if let Some(v65) = v64 {
-                            match v65.0 {
-                                0x8 => {
-                                    if v65.1 == 0x10 {
-                                        let v38 = C::unpack_value_array_2(ctx, v37);
-                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
-                                        let v132 = constructor_x64_psubb(ctx, v68, v69);
-                                        let v133 = constructor_output_xmm(ctx, v132);
-                                        // Rule at src/isa/x64/lower.isle line 213.
-                                        return Some(v133);
-                                    }
-                                }
-                                0x10 => {
-                                    if v65.1 == 0x8 {
-                                        let v38 = C::unpack_value_array_2(ctx, v37);
-                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
-                                        let v134 = constructor_x64_psubw(ctx, v68, v69);
-                                        let v135 = constructor_output_xmm(ctx, v134);
-                                        // Rule at src/isa/x64/lower.isle line 217.
-                                        return Some(v135);
-                                    }
-                                }
-                                0x20 => {
-                                    if v65.1 == 0x4 {
-                                        let v38 = C::unpack_value_array_2(ctx, v37);
-                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
-                                        let v136 = constructor_x64_psubd(ctx, v68, v69);
-                                        let v137 = constructor_output_xmm(ctx, v136);
-                                        // Rule at src/isa/x64/lower.isle line 221.
-                                        return Some(v137);
-                                    }
-                                }
-                                0x40 => {
-                                    if v65.1 == 0x2 {
-                                        let v38 = C::unpack_value_array_2(ctx, v37);
-                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
-                                        let v138 = constructor_x64_psubq(ctx, v68, v69);
-                                        let v139 = constructor_output_xmm(ctx, v138);
-                                        // Rule at src/isa/x64/lower.isle line 225.
-                                        return Some(v139);
-                                    }
-                                }
-                                _ => {}
-                            }
-                        }
-                        let v4 = C::fits_in_64(ctx, v3);
-                        if let Some(v5) = v4 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v41 = constructor_put_in_gpr(ctx, v38.0);
-                            let v42 = &constructor_put_in_gpr_mem_imm(ctx, v38.1);
-                            let v130 = constructor_x64_sub(ctx, v5, v41, v42);
-                            let v131 = constructor_output_gpr(ctx, v130);
-                            // Rule at src/isa/x64/lower.isle line 207.
-                            return Some(v131);
-                        }
-                    }
-                }
-                &Opcode::Imul => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v64 = C::multi_lane(ctx, v3);
-                        if let Some(v65) = v64 {
-                            if v65.0 == 0x40 {
-                                if v65.1 == 0x2 {
-                                    let v328 = C::use_avx512vl(ctx);
-                                    if v328 == true {
-                                        let v456 = C::use_avx512dq(ctx);
-                                        if v456 == true {
-                                            let v38 = C::unpack_value_array_2(ctx, v37);
-                                            let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                            let v69 = &C::put_in_xmm_mem(ctx, v38.1);
-                                            let v457 = constructor_x64_vpmullq(ctx, v68, v69);
-                                            let v458 = constructor_output_xmm(ctx, v457);
-                                            // Rule at src/isa/x64/lower.isle line 1020.
-                                            return Some(v458);
-                                        }
-                                    }
-                                }
-                            }
-                        }
-                        if v3 == I128 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v78 = C::put_in_regs(ctx, v38.0);
-                            let v80 = constructor_value_regs_get_gpr(ctx, v78, 0x0);
-                            let v82 = constructor_value_regs_get_gpr(ctx, v78, 0x1);
-                            let v83 = C::put_in_regs(ctx, v38.1);
-                            let v84 = constructor_value_regs_get_gpr(ctx, v83, 0x0);
-                            let v85 = constructor_value_regs_get_gpr(ctx, v83, 0x1);
-                            let v420 = &C::gpr_to_gpr_mem_imm(ctx, v85);
-                            let v421 = constructor_x64_mul(ctx, I64, v80, v420);
-                            let v422 = &C::gpr_to_gpr_mem_imm(ctx, v84);
-                            let v423 = constructor_x64_mul(ctx, I64, v82, v422);
-                            let v424 = &C::gpr_to_gpr_mem_imm(ctx, v423);
-                            let v425 = constructor_x64_add(ctx, I64, v421, v424);
-                            let v426 = &C::gpr_to_gpr_mem(ctx, v84);
-                            let v427 = constructor_mulhi_u(ctx, I64, v80, v426);
-                            let v428 = constructor_value_regs_get_gpr(ctx, v427, 0x0);
-                            let v429 = constructor_value_regs_get_gpr(ctx, v427, 0x1);
-                            let v430 = &C::gpr_to_gpr_mem_imm(ctx, v429);
-                            let v431 = constructor_x64_add(ctx, I64, v425, v430);
-                            let v432 = constructor_value_gprs(ctx, v428, v431);
-                            let v433 = C::output(ctx, v432);
-                            // Rule at src/isa/x64/lower.isle line 970.
-                            return Some(v433);
-                        }
-                        if let Some(v65) = v64 {
-                            match v65.0 {
-                                0x10 => {
-                                    if v65.1 == 0x8 {
-                                        let v38 = C::unpack_value_array_2(ctx, v37);
-                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
-                                        let v434 = constructor_x64_pmullw(ctx, v68, v69);
-                                        let v435 = constructor_output_xmm(ctx, v434);
-                                        // Rule at src/isa/x64/lower.isle line 997.
-                                        return Some(v435);
-                                    }
-                                }
-                                0x20 => {
-                                    if v65.1 == 0x4 {
-                                        let v38 = C::unpack_value_array_2(ctx, v37);
-                                        let v172 = C::def_inst(ctx, v38.1);
-                                        if let Some(v173) = v172 {
-                                            let v174 = &C::inst_data(ctx, v173);
-                                            if let &InstructionData::Unary {
-                                                opcode: ref v175,
-                                                arg: v176,
-                                            } = v174
-                                            {
-                                                match v175 {
-                                                    &Opcode::SwidenLow => {
-                                                        let v181 = C::def_inst(ctx, v38.0);
-                                                        if let Some(v182) = v181 {
-                                                            let v183 = &C::inst_data(ctx, v182);
-                                                            if let &InstructionData::Unary {
-                                                                opcode: ref v184,
-                                                                arg: v185,
-                                                            } = v183
-                                                            {
-                                                                if let &Opcode::SwidenLow = v184 {
-                                                                    let v476 =
-                                                                        C::value_type(ctx, v185);
-                                                                    let v477 =
-                                                                        C::multi_lane(ctx, v476);
-                                                                    if let Some(v478) = v477 {
-                                                                        if v478.0 == 0x10 {
-                                                                            if v478.1 == 0x8 {
-                                                                                let v481 =
-                                                                                    C::value_type(
-                                                                                        ctx, v176,
-                                                                                    );
-                                                                                let v482 =
-                                                                                    C::multi_lane(
-                                                                                        ctx, v481,
-                                                                                    );
-                                                                                if let Some(v483) =
-                                                                                    v482
-                                                                                {
-                                                                                    if v483.0
-                                                                                        == 0x10
-                                                                                    {
-                                                                                        if v483.1
-                                                                                            == 0x8
-                                                                                        {
-                                                                                            let v186 = constructor_put_in_xmm(ctx, v185);
-                                                                                            let v486 = constructor_put_in_xmm(ctx, v176);
-                                                                                            let v487 = &C::xmm_to_xmm_mem(ctx, v486);
-                                                                                            let v488 = constructor_x64_pmullw(ctx, v186, v487);
-                                                                                            let v489 = &C::xmm_to_xmm_mem(ctx, v486);
-                                                                                            let v490 = constructor_x64_pmulhw(ctx, v186, v489);
-                                                                                            let v491 = &C::xmm_to_xmm_mem(ctx, v490);
-                                                                                            let v502 = constructor_x64_punpcklwd(ctx, v488, v491);
-                                                                                            let v503 = constructor_output_xmm(ctx, v502);
-                                                                                            // Rule at src/isa/x64/lower.isle line 1090.
-                                                                                            return Some(v503);
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                    &Opcode::SwidenHigh => {
-                                                        let v181 = C::def_inst(ctx, v38.0);
-                                                        if let Some(v182) = v181 {
-                                                            let v183 = &C::inst_data(ctx, v182);
-                                                            if let &InstructionData::Unary {
-                                                                opcode: ref v184,
-                                                                arg: v185,
-                                                            } = v183
-                                                            {
-                                                                if let &Opcode::SwidenHigh = v184 {
-                                                                    let v476 =
-                                                                        C::value_type(ctx, v185);
-                                                                    let v477 =
-                                                                        C::multi_lane(ctx, v476);
-                                                                    if let Some(v478) = v477 {
-                                                                        if v478.0 == 0x10 {
-                                                                            if v478.1 == 0x8 {
-                                                                                let v481 =
-                                                                                    C::value_type(
-                                                                                        ctx, v176,
-                                                                                    );
-                                                                                let v482 =
-                                                                                    C::multi_lane(
-                                                                                        ctx, v481,
-                                                                                    );
-                                                                                if let Some(v483) =
-                                                                                    v482
-                                                                                {
-                                                                                    if v483.0
-                                                                                        == 0x10
-                                                                                    {
-                                                                                        if v483.1
-                                                                                            == 0x8
-                                                                                        {
-                                                                                            let v186 = constructor_put_in_xmm(ctx, v185);
-                                                                                            let v486 = constructor_put_in_xmm(ctx, v176);
-                                                                                            let v487 = &C::xmm_to_xmm_mem(ctx, v486);
-                                                                                            let v488 = constructor_x64_pmullw(ctx, v186, v487);
-                                                                                            let v489 = &C::xmm_to_xmm_mem(ctx, v486);
-                                                                                            let v490 = constructor_x64_pmulhw(ctx, v186, v489);
-                                                                                            let v491 = &C::xmm_to_xmm_mem(ctx, v490);
-                                                                                            let v492 = constructor_x64_punpckhwd(ctx, v488, v491);
-                                                                                            let v493 = constructor_output_xmm(ctx, v492);
-                                                                                            // Rule at src/isa/x64/lower.isle line 1067.
-                                                                                            return Some(v493);
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                    &Opcode::UwidenLow => {
-                                                        let v181 = C::def_inst(ctx, v38.0);
-                                                        if let Some(v182) = v181 {
-                                                            let v183 = &C::inst_data(ctx, v182);
-                                                            if let &InstructionData::Unary {
-                                                                opcode: ref v184,
-                                                                arg: v185,
-                                                            } = v183
-                                                            {
-                                                                if let &Opcode::UwidenLow = v184 {
-                                                                    let v476 =
-                                                                        C::value_type(ctx, v185);
-                                                                    let v477 =
-                                                                        C::multi_lane(ctx, v476);
-                                                                    if let Some(v478) = v477 {
-                                                                        if v478.0 == 0x10 {
-                                                                            if v478.1 == 0x8 {
-                                                                                let v481 =
-                                                                                    C::value_type(
-                                                                                        ctx, v176,
-                                                                                    );
-                                                                                let v482 =
-                                                                                    C::multi_lane(
-                                                                                        ctx, v481,
-                                                                                    );
-                                                                                if let Some(v483) =
-                                                                                    v482
-                                                                                {
-                                                                                    if v483.0
-                                                                                        == 0x10
-                                                                                    {
-                                                                                        if v483.1
-                                                                                            == 0x8
-                                                                                        {
-                                                                                            let v186 = constructor_put_in_xmm(ctx, v185);
-                                                                                            let v486 = constructor_put_in_xmm(ctx, v176);
-                                                                                            let v487 = &C::xmm_to_xmm_mem(ctx, v486);
-                                                                                            let v488 = constructor_x64_pmullw(ctx, v186, v487);
-                                                                                            let v489 = &C::xmm_to_xmm_mem(ctx, v486);
-                                                                                            let v510 = constructor_x64_pmulhuw(ctx, v186, v489);
-                                                                                            let v511 = &C::xmm_to_xmm_mem(ctx, v510);
-                                                                                            let v516 = constructor_x64_punpcklwd(ctx, v488, v511);
-                                                                                            let v517 = constructor_output_xmm(ctx, v516);
-                                                                                            // Rule at src/isa/x64/lower.isle line 1135.
-                                                                                            return Some(v517);
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                    &Opcode::UwidenHigh => {
-                                                        let v181 = C::def_inst(ctx, v38.0);
-                                                        if let Some(v182) = v181 {
-                                                            let v183 = &C::inst_data(ctx, v182);
-                                                            if let &InstructionData::Unary {
-                                                                opcode: ref v184,
-                                                                arg: v185,
-                                                            } = v183
-                                                            {
-                                                                if let &Opcode::UwidenHigh = v184 {
-                                                                    let v476 =
-                                                                        C::value_type(ctx, v185);
-                                                                    let v477 =
-                                                                        C::multi_lane(ctx, v476);
-                                                                    if let Some(v478) = v477 {
-                                                                        if v478.0 == 0x10 {
-                                                                            if v478.1 == 0x8 {
-                                                                                let v481 =
-                                                                                    C::value_type(
-                                                                                        ctx, v176,
-                                                                                    );
-                                                                                let v482 =
-                                                                                    C::multi_lane(
-                                                                                        ctx, v481,
-                                                                                    );
-                                                                                if let Some(v483) =
-                                                                                    v482
-                                                                                {
-                                                                                    if v483.0
-                                                                                        == 0x10
-                                                                                    {
-                                                                                        if v483.1
-                                                                                            == 0x8
-                                                                                        {
-                                                                                            let v186 = constructor_put_in_xmm(ctx, v185);
-                                                                                            let v486 = constructor_put_in_xmm(ctx, v176);
-                                                                                            let v487 = &C::xmm_to_xmm_mem(ctx, v486);
-                                                                                            let v488 = constructor_x64_pmullw(ctx, v186, v487);
-                                                                                            let v489 = &C::xmm_to_xmm_mem(ctx, v486);
-                                                                                            let v510 = constructor_x64_pmulhuw(ctx, v186, v489);
-                                                                                            let v511 = &C::xmm_to_xmm_mem(ctx, v510);
-                                                                                            let v512 = constructor_x64_punpckhwd(ctx, v488, v511);
-                                                                                            let v513 = constructor_output_xmm(ctx, v512);
-                                                                                            // Rule at src/isa/x64/lower.isle line 1113.
-                                                                                            return Some(v513);
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                    _ => {}
-                                                }
-                                            }
-                                        }
-                                        let v436 = C::use_sse41(ctx);
-                                        if v436 == true {
-                                            let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                            let v69 = &C::put_in_xmm_mem(ctx, v38.1);
-                                            let v437 = constructor_x64_pmulld(ctx, v68, v69);
-                                            let v438 = constructor_output_xmm(ctx, v437);
-                                            // Rule at src/isa/x64/lower.isle line 1000.
-                                            return Some(v438);
-                                        }
-                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                        let v439 = constructor_put_in_xmm(ctx, v38.1);
-                                        let v312 = &C::xmm_to_xmm_mem(ctx, v68);
-                                        let v441 = constructor_x64_pshufd(ctx, v312, 0x31);
-                                        let v442 = &C::xmm_to_xmm_mem(ctx, v439);
-                                        let v443 = constructor_x64_pshufd(ctx, v442, 0x31);
-                                        let v444 = &C::xmm_to_xmm_mem(ctx, v439);
-                                        let v445 = constructor_x64_pmuludq(ctx, v68, v444);
-                                        let v446 = &C::xmm_to_xmm_mem(ctx, v445);
-                                        let v448 = constructor_x64_pshufd(ctx, v446, 0x8);
-                                        let v449 = &C::xmm_to_xmm_mem(ctx, v443);
-                                        let v450 = constructor_x64_pmuludq(ctx, v441, v449);
-                                        let v451 = &C::xmm_to_xmm_mem(ctx, v450);
-                                        let v452 = constructor_x64_pshufd(ctx, v451, 0x8);
-                                        let v453 = &C::xmm_to_xmm_mem(ctx, v452);
-                                        let v454 = constructor_x64_punpckldq(ctx, v448, v453);
-                                        let v455 = constructor_output_xmm(ctx, v454);
-                                        // Rule at src/isa/x64/lower.isle line 1007.
-                                        return Some(v455);
-                                    }
-                                }
-                                0x40 => {
-                                    if v65.1 == 0x2 {
-                                        let v38 = C::unpack_value_array_2(ctx, v37);
-                                        let v172 = C::def_inst(ctx, v38.1);
-                                        if let Some(v173) = v172 {
-                                            let v174 = &C::inst_data(ctx, v173);
-                                            if let &InstructionData::Unary {
-                                                opcode: ref v175,
-                                                arg: v176,
-                                            } = v174
-                                            {
-                                                match v175 {
-                                                    &Opcode::SwidenLow => {
-                                                        let v181 = C::def_inst(ctx, v38.0);
-                                                        if let Some(v182) = v181 {
-                                                            let v183 = &C::inst_data(ctx, v182);
-                                                            if let &InstructionData::Unary {
-                                                                opcode: ref v184,
-                                                                arg: v185,
-                                                            } = v183
-                                                            {
-                                                                if let &Opcode::SwidenLow = v184 {
-                                                                    let v436 = C::use_sse41(ctx);
-                                                                    if v436 == true {
-                                                                        let v476 = C::value_type(
-                                                                            ctx, v185,
-                                                                        );
-                                                                        let v477 = C::multi_lane(
-                                                                            ctx, v476,
-                                                                        );
-                                                                        if let Some(v478) = v477 {
-                                                                            if v478.0 == 0x20 {
-                                                                                if v478.1 == 0x4 {
-                                                                                    let v481 = C::value_type(ctx, v176);
-                                                                                    let v482 = C::multi_lane(ctx, v481);
-                                                                                    if let Some(
-                                                                                        v483,
-                                                                                    ) = v482
-                                                                                    {
-                                                                                        if v483.0
-                                                                                            == 0x20
-                                                                                        {
-                                                                                            if v483.1 == 0x4 {
-                                                                                                let v494 = &C::put_in_xmm_mem(ctx, v185);
-                                                                                                let v505 = constructor_x64_pshufd(ctx, v494, 0x50);
-                                                                                                let v497 = &C::put_in_xmm_mem(ctx, v176);
-                                                                                                let v506 = constructor_x64_pshufd(ctx, v497, 0x50);
-                                                                                                let v507 = &C::xmm_to_xmm_mem(ctx, v506);
-                                                                                                let v508 = constructor_x64_pmuldq(ctx, v505, v507);
-                                                                                                let v509 = constructor_output_xmm(ctx, v508);
-                                                                                                // Rule at src/isa/x64/lower.isle line 1102.
-                                                                                                return Some(v509);
-                                                                                            }
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                    &Opcode::SwidenHigh => {
-                                                        let v181 = C::def_inst(ctx, v38.0);
-                                                        if let Some(v182) = v181 {
-                                                            let v183 = &C::inst_data(ctx, v182);
-                                                            if let &InstructionData::Unary {
-                                                                opcode: ref v184,
-                                                                arg: v185,
-                                                            } = v183
-                                                            {
-                                                                if let &Opcode::SwidenHigh = v184 {
-                                                                    let v436 = C::use_sse41(ctx);
-                                                                    if v436 == true {
-                                                                        let v476 = C::value_type(
-                                                                            ctx, v185,
-                                                                        );
-                                                                        let v477 = C::multi_lane(
-                                                                            ctx, v476,
-                                                                        );
-                                                                        if let Some(v478) = v477 {
-                                                                            if v478.0 == 0x20 {
-                                                                                if v478.1 == 0x4 {
-                                                                                    let v481 = C::value_type(ctx, v176);
-                                                                                    let v482 = C::multi_lane(ctx, v481);
-                                                                                    if let Some(
-                                                                                        v483,
-                                                                                    ) = v482
-                                                                                    {
-                                                                                        if v483.0
-                                                                                            == 0x20
-                                                                                        {
-                                                                                            if v483.1 == 0x4 {
-                                                                                                let v494 = &C::put_in_xmm_mem(ctx, v185);
-                                                                                                let v496 = constructor_x64_pshufd(ctx, v494, 0xFA);
-                                                                                                let v497 = &C::put_in_xmm_mem(ctx, v176);
-                                                                                                let v498 = constructor_x64_pshufd(ctx, v497, 0xFA);
-                                                                                                let v499 = &C::xmm_to_xmm_mem(ctx, v498);
-                                                                                                let v500 = constructor_x64_pmuldq(ctx, v496, v499);
-                                                                                                let v501 = constructor_output_xmm(ctx, v500);
-                                                                                                // Rule at src/isa/x64/lower.isle line 1079.
-                                                                                                return Some(v501);
-                                                                                            }
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                    &Opcode::UwidenLow => {
-                                                        let v181 = C::def_inst(ctx, v38.0);
-                                                        if let Some(v182) = v181 {
-                                                            let v183 = &C::inst_data(ctx, v182);
-                                                            if let &InstructionData::Unary {
-                                                                opcode: ref v184,
-                                                                arg: v185,
-                                                            } = v183
-                                                            {
-                                                                if let &Opcode::UwidenLow = v184 {
-                                                                    let v476 =
-                                                                        C::value_type(ctx, v185);
-                                                                    let v477 =
-                                                                        C::multi_lane(ctx, v476);
-                                                                    if let Some(v478) = v477 {
-                                                                        if v478.0 == 0x20 {
-                                                                            if v478.1 == 0x4 {
-                                                                                let v481 =
-                                                                                    C::value_type(
-                                                                                        ctx, v176,
-                                                                                    );
-                                                                                let v482 =
-                                                                                    C::multi_lane(
-                                                                                        ctx, v481,
-                                                                                    );
-                                                                                if let Some(v483) =
-                                                                                    v482
-                                                                                {
-                                                                                    if v483.0
-                                                                                        == 0x20
-                                                                                    {
-                                                                                        if v483.1
-                                                                                            == 0x4
-                                                                                        {
-                                                                                            let v494 = &C::put_in_xmm_mem(ctx, v185);
-                                                                                            let v505 = constructor_x64_pshufd(ctx, v494, 0x50);
-                                                                                            let v497 = &C::put_in_xmm_mem(ctx, v176);
-                                                                                            let v506 = constructor_x64_pshufd(ctx, v497, 0x50);
-                                                                                            let v507 = &C::xmm_to_xmm_mem(ctx, v506);
-                                                                                            let v518 = constructor_x64_pmuludq(ctx, v505, v507);
-                                                                                            let v519 = constructor_output_xmm(ctx, v518);
-                                                                                            // Rule at src/isa/x64/lower.isle line 1147.
-                                                                                            return Some(v519);
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                    &Opcode::UwidenHigh => {
-                                                        let v181 = C::def_inst(ctx, v38.0);
-                                                        if let Some(v182) = v181 {
-                                                            let v183 = &C::inst_data(ctx, v182);
-                                                            if let &InstructionData::Unary {
-                                                                opcode: ref v184,
-                                                                arg: v185,
-                                                            } = v183
-                                                            {
-                                                                if let &Opcode::UwidenHigh = v184 {
-                                                                    let v476 =
-                                                                        C::value_type(ctx, v185);
-                                                                    let v477 =
-                                                                        C::multi_lane(ctx, v476);
-                                                                    if let Some(v478) = v477 {
-                                                                        if v478.0 == 0x20 {
-                                                                            if v478.1 == 0x4 {
-                                                                                let v481 =
-                                                                                    C::value_type(
-                                                                                        ctx, v176,
-                                                                                    );
-                                                                                let v482 =
-                                                                                    C::multi_lane(
-                                                                                        ctx, v481,
-                                                                                    );
-                                                                                if let Some(v483) =
-                                                                                    v482
-                                                                                {
-                                                                                    if v483.0
-                                                                                        == 0x20
-                                                                                    {
-                                                                                        if v483.1
-                                                                                            == 0x4
-                                                                                        {
-                                                                                            let v494 = &C::put_in_xmm_mem(ctx, v185);
-                                                                                            let v496 = constructor_x64_pshufd(ctx, v494, 0xFA);
-                                                                                            let v497 = &C::put_in_xmm_mem(ctx, v176);
-                                                                                            let v498 = constructor_x64_pshufd(ctx, v497, 0xFA);
-                                                                                            let v499 = &C::xmm_to_xmm_mem(ctx, v498);
-                                                                                            let v514 = constructor_x64_pmuludq(ctx, v496, v499);
-                                                                                            let v515 = constructor_output_xmm(ctx, v514);
-                                                                                            // Rule at src/isa/x64/lower.isle line 1125.
-                                                                                            return Some(v515);
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                    _ => {}
-                                                }
-                                            }
-                                        }
-                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                        let v439 = constructor_put_in_xmm(ctx, v38.1);
-                                        let v460 = &C::xmi_imm(ctx, 0x20);
-                                        let v461 = constructor_x64_psrlq(ctx, v68, v460);
-                                        let v442 = &C::xmm_to_xmm_mem(ctx, v439);
-                                        let v462 = constructor_x64_pmuludq(ctx, v461, v442);
-                                        let v463 = &C::xmi_imm(ctx, 0x20);
-                                        let v464 = constructor_x64_psrlq(ctx, v439, v463);
-                                        let v465 = &C::xmm_to_xmm_mem(ctx, v464);
-                                        let v466 = constructor_x64_pmuludq(ctx, v68, v465);
-                                        let v467 = &C::xmm_to_xmm_mem(ctx, v466);
-                                        let v468 = constructor_x64_paddq(ctx, v462, v467);
-                                        let v469 = &C::xmi_imm(ctx, 0x20);
-                                        let v470 = constructor_x64_psllq(ctx, v468, v469);
-                                        let v471 = &C::xmm_to_xmm_mem(ctx, v439);
-                                        let v472 = constructor_x64_pmuludq(ctx, v68, v471);
-                                        let v473 = &C::xmm_to_xmm_mem(ctx, v470);
-                                        let v474 = constructor_x64_paddq(ctx, v472, v473);
-                                        let v475 = constructor_output_xmm(ctx, v474);
-                                        // Rule at src/isa/x64/lower.isle line 1045.
-                                        return Some(v475);
-                                    }
-                                }
-                                _ => {}
-                            }
-                        }
-                        let v4 = C::fits_in_64(ctx, v3);
-                        if let Some(v5) = v4 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v58 = &C::sinkable_load(ctx, v38.0);
-                            if let Some(v59) = v58 {
-                                let v60 = constructor_put_in_gpr(ctx, v38.1);
-                                let v61 = &constructor_sink_load_to_gpr_mem_imm(ctx, v59);
-                                let v418 = constructor_x64_mul(ctx, v5, v60, v61);
-                                let v419 = constructor_output_gpr(ctx, v418);
-                                // Rule at src/isa/x64/lower.isle line 951.
-                                return Some(v419);
-                            }
-                            let v158 = &C::simm32_from_value(ctx, v38.0);
-                            if let Some(v159) = v158 {
-                                let v60 = constructor_put_in_gpr(ctx, v38.1);
-                                let v416 = constructor_x64_mul(ctx, v5, v60, v159);
-                                let v417 = constructor_output_gpr(ctx, v416);
-                                // Rule at src/isa/x64/lower.isle line 948.
-                                return Some(v417);
-                            }
-                            let v41 = constructor_put_in_gpr(ctx, v38.0);
-                            let v42 = &constructor_put_in_gpr_mem_imm(ctx, v38.1);
-                            let v414 = constructor_x64_mul(ctx, v5, v41, v42);
-                            let v415 = constructor_output_gpr(ctx, v414);
-                            // Rule at src/isa/x64/lower.isle line 942.
-                            return Some(v415);
-                        }
-                    }
-                }
-                &Opcode::Umulhi => {
-                    let v38 = C::unpack_value_array_2(ctx, v37);
-                    let v2000 = C::value_type(ctx, v38.0);
-                    match v2000 {
-                        I16 => {
-                            let v41 = constructor_put_in_gpr(ctx, v38.0);
-                            let v109 = &constructor_put_in_gpr_mem(ctx, v38.1);
-                            let v2140 = constructor_mul_hi(ctx, I16, false, v41, v109);
-                            let v2141 = constructor_value_regs_get_gpr(ctx, v2140, 0x1);
-                            let v2142 = constructor_output_gpr(ctx, v2141);
-                            // Rule at src/isa/x64/lower.isle line 4069.
-                            return Some(v2142);
-                        }
-                        I32 => {
-                            let v41 = constructor_put_in_gpr(ctx, v38.0);
-                            let v109 = &constructor_put_in_gpr_mem(ctx, v38.1);
-                            let v2143 = constructor_mul_hi(ctx, I32, false, v41, v109);
-                            let v2144 = constructor_value_regs_get_gpr(ctx, v2143, 0x1);
-                            let v2145 = constructor_output_gpr(ctx, v2144);
-                            // Rule at src/isa/x64/lower.isle line 4074.
-                            return Some(v2145);
-                        }
-                        I64 => {
-                            let v41 = constructor_put_in_gpr(ctx, v38.0);
-                            let v109 = &constructor_put_in_gpr_mem(ctx, v38.1);
-                            let v2146 = constructor_mul_hi(ctx, I64, false, v41, v109);
-                            let v2147 = constructor_value_regs_get_gpr(ctx, v2146, 0x1);
-                            let v2148 = constructor_output_gpr(ctx, v2147);
-                            // Rule at src/isa/x64/lower.isle line 4079.
-                            return Some(v2148);
-                        }
-                        _ => {}
-                    }
-                }
-                &Opcode::Smulhi => {
-                    let v38 = C::unpack_value_array_2(ctx, v37);
-                    let v2000 = C::value_type(ctx, v38.0);
-                    match v2000 {
-                        I16 => {
-                            let v41 = constructor_put_in_gpr(ctx, v38.0);
-                            let v109 = &constructor_put_in_gpr_mem(ctx, v38.1);
-                            let v2149 = constructor_mul_hi(ctx, I16, true, v41, v109);
-                            let v2150 = constructor_value_regs_get_gpr(ctx, v2149, 0x1);
-                            let v2151 = constructor_output_gpr(ctx, v2150);
-                            // Rule at src/isa/x64/lower.isle line 4086.
-                            return Some(v2151);
-                        }
-                        I32 => {
-                            let v41 = constructor_put_in_gpr(ctx, v38.0);
-                            let v109 = &constructor_put_in_gpr_mem(ctx, v38.1);
-                            let v2152 = constructor_mul_hi(ctx, I32, true, v41, v109);
-                            let v2153 = constructor_value_regs_get_gpr(ctx, v2152, 0x1);
-                            let v2154 = constructor_output_gpr(ctx, v2153);
-                            // Rule at src/isa/x64/lower.isle line 4091.
-                            return Some(v2154);
-                        }
-                        I64 => {
-                            let v41 = constructor_put_in_gpr(ctx, v38.0);
-                            let v109 = &constructor_put_in_gpr_mem(ctx, v38.1);
-                            let v2155 = constructor_mul_hi(ctx, I64, true, v41, v109);
-                            let v2156 = constructor_value_regs_get_gpr(ctx, v2155, 0x1);
-                            let v2157 = constructor_output_gpr(ctx, v2156);
-                            // Rule at src/isa/x64/lower.isle line 4096.
-                            return Some(v2157);
-                        }
-                        _ => {}
-                    }
-                }
-                &Opcode::SqmulRoundSat => {
-                    let v38 = C::unpack_value_array_2(ctx, v37);
-                    let v2000 = C::value_type(ctx, v38.0);
-                    if v2000 == I16X8 {
-                        let v520 = C::use_ssse3(ctx);
-                        if v520 == true {
-                            let v68 = constructor_put_in_xmm(ctx, v38.0);
-                            let v439 = constructor_put_in_xmm(ctx, v38.1);
-                            let v2463 =
-                                C::emit_u128_le_const(ctx, 0x80008000800080008000800080008000);
-                            let v2464 = &constructor_const_to_xmm_mem(ctx, v2463);
-                            let v442 = &C::xmm_to_xmm_mem(ctx, v439);
-                            let v2465 = constructor_x64_pmulhrsw(ctx, v68, v442);
-                            let v2466 = constructor_x64_pcmpeqw(ctx, v2465, v2464);
-                            let v2467 = &C::xmm_to_xmm_mem(ctx, v2466);
-                            let v2468 = constructor_x64_pxor(ctx, v2465, v2467);
-                            let v2469 = constructor_output_xmm(ctx, v2468);
-                            // Rule at src/isa/x64/lower.isle line 4562.
-                            return Some(v2469);
-                        }
-                        let v68 = constructor_put_in_xmm(ctx, v38.0);
-                        let v439 = constructor_put_in_xmm(ctx, v38.1);
-                        let v1899 = &C::xmm_to_xmm_mem(ctx, v439);
-                        let v2470 = constructor_x64_pmullw(ctx, v68, v1899);
-                        let v442 = &C::xmm_to_xmm_mem(ctx, v439);
-                        let v2471 = constructor_x64_pmulhw(ctx, v68, v442);
-                        let v2472 = &C::xmm_to_xmm_mem(ctx, v2471);
-                        let v2473 = constructor_x64_punpcklwd(ctx, v2470, v2472);
-                        let v2474 = &C::xmm_to_xmm_mem(ctx, v2471);
-                        let v2475 = constructor_x64_punpckhwd(ctx, v2470, v2474);
-                        let v2477 = C::emit_u128_le_const(ctx, 0x4000000040000000400000004000);
-                        let v2478 = &constructor_const_to_xmm_mem(ctx, v2477);
-                        let v2479 = constructor_x64_movdqu_load(ctx, v2478);
-                        let v2480 = &C::xmm_to_xmm_mem(ctx, v2479);
-                        let v2481 = constructor_x64_paddd(ctx, v2473, v2480);
-                        let v2482 = &C::xmm_to_xmm_mem(ctx, v2479);
-                        let v2483 = constructor_x64_paddd(ctx, v2475, v2482);
-                        let v2485 = &C::xmi_imm(ctx, 0xF);
-                        let v2486 = constructor_x64_psrad(ctx, v2481, v2485);
-                        let v2487 = &C::xmi_imm(ctx, 0xF);
-                        let v2488 = constructor_x64_psrad(ctx, v2483, v2487);
-                        let v2489 = &C::xmm_to_xmm_mem(ctx, v2488);
-                        let v2490 = constructor_x64_packssdw(ctx, v2486, v2489);
-                        let v2491 = constructor_output_xmm(ctx, v2490);
-                        // Rule at src/isa/x64/lower.isle line 4578.
-                        return Some(v2491);
-                    }
-                }
-                &Opcode::X86Pmulhrsw => {
-                    let v520 = C::use_ssse3(ctx);
-                    if v520 == true {
-                        let v38 = C::unpack_value_array_2(ctx, v37);
-                        let v2000 = C::value_type(ctx, v38.0);
-                        if v2000 == I16X8 {
-                            let v68 = constructor_put_in_xmm(ctx, v38.0);
-                            let v69 = &C::put_in_xmm_mem(ctx, v38.1);
-                            let v2492 = constructor_x64_pmulhrsw(ctx, v68, v69);
-                            let v2493 = constructor_output_xmm(ctx, v2492);
-                            // Rule at src/isa/x64/lower.isle line 4604.
-                            return Some(v2493);
-                        }
-                    }
-                }
-                &Opcode::Udiv => {
-                    let v38 = C::unpack_value_array_2(ctx, v37);
-                    let v2000 = C::value_type(ctx, v38.0);
-                    if v2000 == I8 {
-                        let v2084 = constructor_extend_to_gpr(ctx, v38.0, I32, &ExtendKind::Zero);
-                        let v195 = constructor_put_in_gpr(ctx, v38.1);
-                        let v2085 = &C::gpr_to_gpr_mem(ctx, v195);
-                        let v2088 = constructor_x64_div8(
-                            ctx,
-                            v2084,
-                            v2085,
-                            &DivSignedness::Unsigned,
-                            &TrapCode::IntegerDivisionByZero,
-                        );
-                        let v2089 = constructor_output_gpr(ctx, v2088);
-                        // Rule at src/isa/x64/lower.isle line 3948.
-                        return Some(v2089);
-                    }
-                    let v2090 = C::fits_in_64(ctx, v2000);
-                    if let Some(v2091) = v2090 {
-                        let v41 = constructor_put_in_gpr(ctx, v38.0);
-                        let v15 = constructor_imm(ctx, I64, 0x0);
-                        let v2092 = C::gpr_new(ctx, v15);
-                        let v2093 = constructor_put_in_gpr(ctx, v38.1);
-                        let v2094 = &C::gpr_to_gpr_mem(ctx, v2093);
-                        let v2095 = &C::raw_operand_size_of_type(ctx, v2091);
-                        let v2096 = constructor_x64_div_quotient(
-                            ctx,
-                            v41,
-                            v2092,
-                            v2094,
-                            v2095,
-                            &DivSignedness::Unsigned,
-                            &TrapCode::IntegerDivisionByZero,
-                        );
-                        let v2097 = C::output(ctx, v2096);
-                        // Rule at src/isa/x64/lower.isle line 3957.
-                        return Some(v2097);
-                    }
-                }
-                &Opcode::Sdiv => {
-                    let v38 = C::unpack_value_array_2(ctx, v37);
-                    let v2000 = C::value_type(ctx, v38.0);
-                    if v2000 == I8 {
-                        let v41 = constructor_put_in_gpr(ctx, v38.0);
-                        let v2099 = constructor_x64_sign_extend_data(ctx, v41, &OperandSize::Size8);
-                        let v2100 = constructor_nonzero_sdiv_divisor(ctx, I8, v38.1);
-                        let v2101 = &C::reg_to_gpr_mem(ctx, v2100);
-                        let v2104 = constructor_x64_div8(
-                            ctx,
-                            v2099,
-                            v2101,
-                            &DivSignedness::Signed,
-                            &TrapCode::IntegerOverflow,
-                        );
-                        let v2105 = constructor_output_gpr(ctx, v2104);
-                        // Rule at src/isa/x64/lower.isle line 3967.
-                        return Some(v2105);
-                    }
-                    let v2090 = C::fits_in_64(ctx, v2000);
-                    if let Some(v2091) = v2090 {
-                        let v41 = constructor_put_in_gpr(ctx, v38.0);
-                        let v2106 = &C::raw_operand_size_of_type(ctx, v2091);
-                        let v2107 = constructor_x64_sign_extend_data(ctx, v41, v2106);
-                        let v2108 = constructor_nonzero_sdiv_divisor(ctx, v2091, v38.1);
-                        let v2109 = &C::reg_to_gpr_mem(ctx, v2108);
-                        let v2110 = constructor_x64_div_quotient(
-                            ctx,
-                            v41,
-                            v2107,
-                            v2109,
-                            v2106,
-                            &DivSignedness::Signed,
-                            &TrapCode::IntegerOverflow,
-                        );
-                        let v2111 = C::output(ctx, v2110);
-                        // Rule at src/isa/x64/lower.isle line 3973.
-                        return Some(v2111);
-                    }
-                }
-                &Opcode::Urem => {
-                    let v38 = C::unpack_value_array_2(ctx, v37);
-                    let v2000 = C::value_type(ctx, v38.0);
-                    if v2000 == I8 {
-                        let v2084 = constructor_extend_to_gpr(ctx, v38.0, I32, &ExtendKind::Zero);
-                        let v195 = constructor_put_in_gpr(ctx, v38.1);
-                        let v2085 = &C::gpr_to_gpr_mem(ctx, v195);
-                        let v2088 = constructor_x64_div8(
-                            ctx,
-                            v2084,
-                            v2085,
-                            &DivSignedness::Unsigned,
-                            &TrapCode::IntegerDivisionByZero,
-                        );
-                        let v1135 = Imm8Reg::Imm8 { imm: 0x8 };
-                        let v2112 = &C::imm8_reg_to_imm8_gpr(ctx, &v1135);
-                        let v2113 = constructor_x64_shr(ctx, I64, v2088, v2112);
-                        let v2114 = constructor_output_gpr(ctx, v2113);
-                        // Rule at src/isa/x64/lower.isle line 4006.
-                        return Some(v2114);
-                    }
-                    let v2090 = C::fits_in_64(ctx, v2000);
-                    if let Some(v2091) = v2090 {
-                        let v41 = constructor_put_in_gpr(ctx, v38.0);
-                        let v15 = constructor_imm(ctx, I64, 0x0);
-                        let v2092 = C::gpr_new(ctx, v15);
-                        let v2093 = constructor_put_in_gpr(ctx, v38.1);
-                        let v2094 = &C::gpr_to_gpr_mem(ctx, v2093);
-                        let v2095 = &C::raw_operand_size_of_type(ctx, v2091);
-                        let v2115 = constructor_x64_div_remainder(
-                            ctx,
-                            v41,
-                            v2092,
-                            v2094,
-                            v2095,
-                            &DivSignedness::Unsigned,
-                            &TrapCode::IntegerDivisionByZero,
-                        );
-                        let v2116 = C::output(ctx, v2115);
-                        // Rule at src/isa/x64/lower.isle line 4015.
-                        return Some(v2116);
-                    }
-                }
-                &Opcode::Srem => {
-                    let v38 = C::unpack_value_array_2(ctx, v37);
-                    let v172 = C::def_inst(ctx, v38.1);
-                    if let Some(v173) = v172 {
-                        let v174 = &C::inst_data(ctx, v173);
-                        if let &InstructionData::UnaryImm {
-                            opcode: ref v326,
-                            imm: v327,
-                        } = v174
-                        {
-                            if let &Opcode::Iconst = v326 {
-                                let v2000 = C::value_type(ctx, v38.0);
-                                if v2000 == I8 {
-                                    let v2117 = C::safe_divisor_from_imm64(ctx, I8, v327);
-                                    if let Some(v2118) = v2117 {
-                                        let v41 = constructor_put_in_gpr(ctx, v38.0);
-                                        let v2099 = constructor_x64_sign_extend_data(
-                                            ctx,
-                                            v41,
-                                            &OperandSize::Size8,
-                                        );
-                                        let v2119 = constructor_imm(ctx, I8, v2118);
-                                        let v2120 = &C::reg_to_gpr_mem(ctx, v2119);
-                                        let v2121 = constructor_x64_div8(
-                                            ctx,
-                                            v2099,
-                                            v2120,
-                                            &DivSignedness::Signed,
-                                            &TrapCode::IntegerDivisionByZero,
-                                        );
-                                        let v1135 = Imm8Reg::Imm8 { imm: 0x8 };
-                                        let v2122 = &C::imm8_reg_to_imm8_gpr(ctx, &v1135);
-                                        let v2123 = constructor_x64_shr(ctx, I64, v2121, v2122);
-                                        let v2124 = constructor_output_gpr(ctx, v2123);
-                                        // Rule at src/isa/x64/lower.isle line 4030.
-                                        return Some(v2124);
-                                    }
-                                }
-                                let v2125 = C::safe_divisor_from_imm64(ctx, v2000, v327);
-                                if let Some(v2126) = v2125 {
-                                    let v41 = constructor_put_in_gpr(ctx, v38.0);
-                                    let v2127 = &C::raw_operand_size_of_type(ctx, v2000);
-                                    let v2128 = constructor_x64_sign_extend_data(ctx, v41, v2127);
-                                    let v2129 = constructor_imm(ctx, v2000, v2126);
-                                    let v2130 = &C::reg_to_gpr_mem(ctx, v2129);
-                                    let v2131 = constructor_x64_div_remainder(
-                                        ctx,
-                                        v41,
-                                        v2128,
-                                        v2130,
-                                        v2127,
-                                        &DivSignedness::Signed,
-                                        &TrapCode::IntegerDivisionByZero,
-                                    );
-                                    let v2132 = C::output(ctx, v2131);
-                                    // Rule at src/isa/x64/lower.isle line 4039.
-                                    return Some(v2132);
-                                }
-                            }
-                        }
-                    }
-                    let v2000 = C::value_type(ctx, v38.0);
-                    if v2000 == I8 {
-                        let v41 = constructor_put_in_gpr(ctx, v38.0);
-                        let v2099 = constructor_x64_sign_extend_data(ctx, v41, &OperandSize::Size8);
-                        let v2133 = constructor_put_in_gpr(ctx, v38.1);
-                        let v2134 = constructor_x64_checked_srem_seq8(ctx, v2099, v2133);
-                        let v1135 = Imm8Reg::Imm8 { imm: 0x8 };
-                        let v2112 = &C::imm8_reg_to_imm8_gpr(ctx, &v1135);
-                        let v2135 = constructor_x64_shr(ctx, I64, v2134, v2112);
-                        let v2136 = constructor_output_gpr(ctx, v2135);
-                        // Rule at src/isa/x64/lower.isle line 4052.
-                        return Some(v2136);
-                    }
-                    let v41 = constructor_put_in_gpr(ctx, v38.0);
-                    let v2127 = &C::raw_operand_size_of_type(ctx, v2000);
-                    let v2128 = constructor_x64_sign_extend_data(ctx, v41, v2127);
-                    let v2093 = constructor_put_in_gpr(ctx, v38.1);
-                    let v2137 = constructor_x64_checked_srem_seq(ctx, v2127, v41, v2128, v2093);
-                    let v2138 = C::value_regs_get(ctx, v2137, 0x1);
-                    let v2139 = constructor_output_reg(ctx, v2138);
-                    // Rule at src/isa/x64/lower.isle line 4058.
-                    return Some(v2139);
-                }
-                &Opcode::UaddOverflow => {
-                    let v38 = C::unpack_value_array_2(ctx, v37);
-                    let v92 = C::value_type(ctx, v38.1);
-                    let v93 = C::fits_in_64(ctx, v92);
-                    if let Some(v94) = v93 {
-                        let v41 = constructor_put_in_gpr(ctx, v38.0);
-                        let v42 = &constructor_put_in_gpr_mem_imm(ctx, v38.1);
-                        let v97 = constructor_construct_overflow_op_alu(
-                            ctx,
-                            v94,
-                            &CC::B,
-                            &AluRmiROpcode::Add,
-                            v41,
-                            v42,
-                        );
-                        // Rule at src/isa/x64/lower.isle line 137.
-                        return Some(v97);
-                    }
-                    if v92 == I128 {
-                        let v99 = constructor_construct_overflow_op_alu_128(
-                            ctx,
-                            &CC::B,
-                            &AluRmiROpcode::Add,
-                            &AluRmiROpcode::Adc,
-                            v38.0,
-                            v38.1,
-                        );
-                        // Rule at src/isa/x64/lower.isle line 141.
-                        return Some(v99);
-                    }
-                }
-                &Opcode::SaddOverflow => {
-                    let v38 = C::unpack_value_array_2(ctx, v37);
-                    let v92 = C::value_type(ctx, v38.1);
-                    let v93 = C::fits_in_64(ctx, v92);
-                    if let Some(v94) = v93 {
-                        let v41 = constructor_put_in_gpr(ctx, v38.0);
-                        let v42 = &constructor_put_in_gpr_mem_imm(ctx, v38.1);
-                        let v101 = constructor_construct_overflow_op_alu(
-                            ctx,
-                            v94,
-                            &CC::O,
-                            &AluRmiROpcode::Add,
-                            v41,
-                            v42,
-                        );
-                        // Rule at src/isa/x64/lower.isle line 146.
-                        return Some(v101);
-                    }
-                    if v92 == I128 {
-                        let v102 = constructor_construct_overflow_op_alu_128(
-                            ctx,
-                            &CC::O,
-                            &AluRmiROpcode::Add,
-                            &AluRmiROpcode::Adc,
-                            v38.0,
-                            v38.1,
-                        );
-                        // Rule at src/isa/x64/lower.isle line 149.
-                        return Some(v102);
-                    }
-                }
-                &Opcode::UsubOverflow => {
-                    let v38 = C::unpack_value_array_2(ctx, v37);
-                    let v92 = C::value_type(ctx, v38.1);
-                    let v93 = C::fits_in_64(ctx, v92);
-                    if let Some(v94) = v93 {
-                        let v41 = constructor_put_in_gpr(ctx, v38.0);
-                        let v42 = &constructor_put_in_gpr_mem_imm(ctx, v38.1);
-                        let v104 = constructor_construct_overflow_op_alu(
-                            ctx,
-                            v94,
-                            &CC::B,
-                            &AluRmiROpcode::Sub,
-                            v41,
-                            v42,
-                        );
-                        // Rule at src/isa/x64/lower.isle line 154.
-                        return Some(v104);
-                    }
-                    if v92 == I128 {
-                        let v106 = constructor_construct_overflow_op_alu_128(
-                            ctx,
-                            &CC::B,
-                            &AluRmiROpcode::Sub,
-                            &AluRmiROpcode::Sbb,
-                            v38.0,
-                            v38.1,
-                        );
-                        // Rule at src/isa/x64/lower.isle line 157.
-                        return Some(v106);
-                    }
-                }
-                &Opcode::SsubOverflow => {
-                    let v38 = C::unpack_value_array_2(ctx, v37);
-                    let v92 = C::value_type(ctx, v38.1);
-                    let v93 = C::fits_in_64(ctx, v92);
-                    if let Some(v94) = v93 {
-                        let v41 = constructor_put_in_gpr(ctx, v38.0);
-                        let v42 = &constructor_put_in_gpr_mem_imm(ctx, v38.1);
-                        let v107 = constructor_construct_overflow_op_alu(
-                            ctx,
-                            v94,
-                            &CC::O,
-                            &AluRmiROpcode::Sub,
-                            v41,
-                            v42,
-                        );
-                        // Rule at src/isa/x64/lower.isle line 162.
-                        return Some(v107);
-                    }
-                    if v92 == I128 {
-                        let v108 = constructor_construct_overflow_op_alu_128(
-                            ctx,
-                            &CC::O,
-                            &AluRmiROpcode::Sub,
-                            &AluRmiROpcode::Sbb,
-                            v38.0,
-                            v38.1,
-                        );
-                        // Rule at src/isa/x64/lower.isle line 165.
-                        return Some(v108);
-                    }
-                }
-                &Opcode::UmulOverflow => {
-                    let v38 = C::unpack_value_array_2(ctx, v37);
-                    let v92 = C::value_type(ctx, v38.1);
-                    let v93 = C::fits_in_64(ctx, v92);
-                    if let Some(v94) = v93 {
-                        let v41 = constructor_put_in_gpr(ctx, v38.0);
-                        let v109 = &constructor_put_in_gpr_mem(ctx, v38.1);
-                        let v110 = &constructor_x64_umullo_with_flags_paired(ctx, v94, v41, v109);
-                        let v111 = constructor_construct_overflow_op(ctx, &CC::O, v110);
-                        // Rule at src/isa/x64/lower.isle line 170.
-                        return Some(v111);
-                    }
-                }
-                &Opcode::SmulOverflow => {
-                    let v38 = C::unpack_value_array_2(ctx, v37);
-                    let v92 = C::value_type(ctx, v38.1);
-                    let v112 = C::ty_int_ref_16_to_64(ctx, v92);
-                    if let Some(v113) = v112 {
-                        let v41 = constructor_put_in_gpr(ctx, v38.0);
-                        let v42 = &constructor_put_in_gpr_mem_imm(ctx, v38.1);
-                        let v115 = constructor_construct_overflow_op_alu(
-                            ctx,
-                            v113,
-                            &CC::O,
-                            &AluRmiROpcode::Mul,
-                            v41,
-                            v42,
-                        );
-                        // Rule at src/isa/x64/lower.isle line 175.
-                        return Some(v115);
-                    }
-                    if v92 == I8 {
-                        let v41 = constructor_put_in_gpr(ctx, v38.0);
-                        let v117 = &C::put_in_reg_mem(ctx, v38.1);
-                        let v118 = &constructor_reg_mem_to_reg_mem_imm(ctx, v117);
-                        let v119 = &C::gpr_mem_imm_new(ctx, v118);
-                        let v120 = &constructor_x64_alurmi_with_flags_paired(
-                            ctx,
-                            &AluRmiROpcode::Mul,
-                            I8,
-                            v41,
-                            v119,
-                        );
-                        let v121 = constructor_construct_overflow_op(ctx, &CC::O, v120);
-                        // Rule at src/isa/x64/lower.isle line 179.
-                        return Some(v121);
-                    }
-                }
-                &Opcode::Band => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v189 = C::use_bmi1(ctx);
-                        if v189 == true {
-                            let v3 = C::value_type(ctx, v2);
-                            let v45 = C::ty_32_or_64(ctx, v3);
-                            if let Some(v46) = v45 {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v172 = C::def_inst(ctx, v38.1);
-                                if let Some(v173) = v172 {
-                                    let v174 = &C::inst_data(ctx, v173);
-                                    match v174 {
-                                        &InstructionData::Binary {
-                                            opcode: ref v212,
-                                            args: ref v213,
-                                        } => {
-                                            if let &Opcode::Isub = v212 {
-                                                let v214 = C::unpack_value_array_2(ctx, v213);
-                                                let v217 = C::def_inst(ctx, v214.1);
-                                                if let Some(v218) = v217 {
-                                                    let v219 = &C::inst_data(ctx, v218);
-                                                    if let &InstructionData::UnaryImm {
-                                                        opcode: ref v220,
-                                                        imm: v221,
-                                                    } = v219
-                                                    {
-                                                        if let &Opcode::Iconst = v220 {
-                                                            let v222 = C::u64_from_imm64(ctx, v221);
-                                                            if v222 == 0x1 {
-                                                                if v38.0 == v214.0 {
-                                                                    let v223 =
-                                                                        &constructor_put_in_gpr_mem(
-                                                                            ctx, v38.0,
-                                                                        );
-                                                                    let v224 = constructor_x64_blsr(
-                                                                        ctx, v46, v223,
-                                                                    );
-                                                                    let v225 =
-                                                                        constructor_output_gpr(
-                                                                            ctx, v224,
-                                                                        );
-                                                                    // Rule at src/isa/x64/lower.isle line 349.
-                                                                    return Some(v225);
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                        &InstructionData::Unary {
-                                            opcode: ref v175,
-                                            arg: v176,
-                                        } => {
-                                            if let &Opcode::Ineg = v175 {
-                                                if v38.0 == v176 {
-                                                    let v223 =
-                                                        &constructor_put_in_gpr_mem(ctx, v38.0);
-                                                    let v229 = constructor_x64_blsi(ctx, v46, v223);
-                                                    let v230 = constructor_output_gpr(ctx, v229);
-                                                    // Rule at src/isa/x64/lower.isle line 358.
-                                                    return Some(v230);
-                                                }
-                                            }
-                                        }
-                                        _ => {}
-                                    }
-                                }
-                                let v181 = C::def_inst(ctx, v38.0);
-                                if let Some(v182) = v181 {
-                                    let v183 = &C::inst_data(ctx, v182);
-                                    match v183 {
-                                        &InstructionData::Binary {
-                                            opcode: ref v198,
-                                            args: ref v199,
-                                        } => {
-                                            if let &Opcode::Isub = v198 {
-                                                let v200 = C::unpack_value_array_2(ctx, v199);
-                                                let v203 = C::def_inst(ctx, v200.1);
-                                                if let Some(v204) = v203 {
-                                                    let v205 = &C::inst_data(ctx, v204);
-                                                    if let &InstructionData::UnaryImm {
-                                                        opcode: ref v206,
-                                                        imm: v207,
-                                                    } = v205
-                                                    {
-                                                        if let &Opcode::Iconst = v206 {
-                                                            let v208 = C::u64_from_imm64(ctx, v207);
-                                                            if v208 == 0x1 {
-                                                                if v38.1 == v200.0 {
-                                                                    let v209 =
-                                                                        &constructor_put_in_gpr_mem(
-                                                                            ctx, v200.0,
-                                                                        );
-                                                                    let v210 = constructor_x64_blsr(
-                                                                        ctx, v46, v209,
-                                                                    );
-                                                                    let v211 =
-                                                                        constructor_output_gpr(
-                                                                            ctx, v210,
-                                                                        );
-                                                                    // Rule at src/isa/x64/lower.isle line 346.
-                                                                    return Some(v211);
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                        &InstructionData::Unary {
-                                            opcode: ref v184,
-                                            arg: v185,
-                                        } => {
-                                            if let &Opcode::Ineg = v184 {
-                                                if v38.1 == v185 {
-                                                    let v226 =
-                                                        &constructor_put_in_gpr_mem(ctx, v185);
-                                                    let v227 = constructor_x64_blsi(ctx, v46, v226);
-                                                    let v228 = constructor_output_gpr(ctx, v227);
-                                                    // Rule at src/isa/x64/lower.isle line 355.
-                                                    return Some(v228);
-                                                }
-                                            }
-                                        }
-                                        _ => {}
-                                    }
-                                }
-                            }
-                            let v152 = C::ty_int_ref_scalar_64(ctx, v3);
-                            if let Some(v153) = v152 {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v181 = C::def_inst(ctx, v38.0);
-                                if let Some(v182) = v181 {
-                                    let v183 = &C::inst_data(ctx, v182);
-                                    if let &InstructionData::Unary {
-                                        opcode: ref v184,
-                                        arg: v185,
-                                    } = v183
-                                    {
-                                        if let &Opcode::Bnot = v184 {
-                                            let v194 = constructor_put_in_gpr(ctx, v185);
-                                            let v195 = constructor_put_in_gpr(ctx, v38.1);
-                                            let v196 = constructor_x64_andn(ctx, v3, v194, v195);
-                                            let v197 = constructor_output_gpr(ctx, v196);
-                                            // Rule at src/isa/x64/lower.isle line 339.
-                                            return Some(v197);
-                                        }
-                                    }
-                                }
-                                let v172 = C::def_inst(ctx, v38.1);
-                                if let Some(v173) = v172 {
-                                    let v174 = &C::inst_data(ctx, v173);
-                                    if let &InstructionData::Unary {
-                                        opcode: ref v175,
-                                        arg: v176,
-                                    } = v174
-                                    {
-                                        if let &Opcode::Bnot = v175 {
-                                            let v190 = constructor_put_in_gpr(ctx, v176);
-                                            let v191 = constructor_put_in_gpr(ctx, v38.0);
-                                            let v192 = constructor_x64_andn(ctx, v3, v190, v191);
-                                            let v193 = constructor_output_gpr(ctx, v192);
-                                            // Rule at src/isa/x64/lower.isle line 334.
-                                            return Some(v193);
-                                        }
-                                    }
-                                }
-                            }
-                        }
-                        let v3 = C::value_type(ctx, v2);
-                        let v64 = C::multi_lane(ctx, v3);
-                        if let Some(v65) = v64 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v181 = C::def_inst(ctx, v38.0);
-                            if let Some(v182) = v181 {
-                                let v183 = &C::inst_data(ctx, v182);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v184,
-                                    arg: v185,
-                                } = v183
-                                {
-                                    if let &Opcode::Bnot = v184 {
-                                        let v186 = constructor_put_in_xmm(ctx, v185);
-                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
-                                        let v187 = constructor_sse_and_not(ctx, v3, v186, v69);
-                                        let v188 = constructor_output_xmm(ctx, v187);
-                                        // Rule at src/isa/x64/lower.isle line 331.
-                                        return Some(v188);
-                                    }
-                                }
-                            }
-                            let v172 = C::def_inst(ctx, v38.1);
-                            if let Some(v173) = v172 {
-                                let v174 = &C::inst_data(ctx, v173);
-                                if let &InstructionData::Unary {
-                                    opcode: ref v175,
-                                    arg: v176,
-                                } = v174
-                                {
-                                    if let &Opcode::Bnot = v175 {
-                                        let v177 = constructor_put_in_xmm(ctx, v176);
-                                        let v178 = &C::put_in_xmm_mem(ctx, v38.0);
-                                        let v179 = constructor_sse_and_not(ctx, v3, v177, v178);
-                                        let v180 = constructor_output_xmm(ctx, v179);
-                                        // Rule at src/isa/x64/lower.isle line 329.
-                                        return Some(v180);
-                                    }
-                                }
-                            }
-                        }
-                        if v3 == I128 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v78 = C::put_in_regs(ctx, v38.0);
-                            let v80 = constructor_value_regs_get_gpr(ctx, v78, 0x0);
-                            let v82 = constructor_value_regs_get_gpr(ctx, v78, 0x1);
-                            let v83 = C::put_in_regs(ctx, v38.1);
-                            let v84 = constructor_value_regs_get_gpr(ctx, v83, 0x0);
-                            let v85 = constructor_value_regs_get_gpr(ctx, v83, 0x1);
-                            let v86 = &C::gpr_to_gpr_mem_imm(ctx, v84);
-                            let v168 = constructor_x64_and(ctx, I64, v80, v86);
-                            let v88 = &C::gpr_to_gpr_mem_imm(ctx, v85);
-                            let v169 = constructor_x64_and(ctx, I64, v82, v88);
-                            let v170 = constructor_value_gprs(ctx, v168, v169);
-                            let v171 = C::output(ctx, v170);
-                            // Rule at src/isa/x64/lower.isle line 303.
-                            return Some(v171);
-                        }
-                        if let Some(v65) = v64 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v68 = constructor_put_in_xmm(ctx, v38.0);
-                            let v69 = &C::put_in_xmm_mem(ctx, v38.1);
-                            let v166 = constructor_sse_and(ctx, v3, v68, v69);
-                            let v167 = constructor_output_xmm(ctx, v166);
-                            // Rule at src/isa/x64/lower.isle line 297.
-                            return Some(v167);
-                        }
-                        let v162 = C::ty_scalar_float(ctx, v3);
-                        if let Some(v163) = v162 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v68 = constructor_put_in_xmm(ctx, v38.0);
-                            let v69 = &C::put_in_xmm_mem(ctx, v38.1);
-                            let v164 = constructor_sse_and(ctx, v163, v68, v69);
-                            let v165 = constructor_output_xmm(ctx, v164);
-                            // Rule at src/isa/x64/lower.isle line 285.
-                            return Some(v165);
-                        }
-                        let v152 = C::ty_int_ref_scalar_64(ctx, v3);
-                        if let Some(v153) = v152 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v158 = &C::simm32_from_value(ctx, v38.0);
-                            if let Some(v159) = v158 {
-                                let v60 = constructor_put_in_gpr(ctx, v38.1);
-                                let v160 = constructor_x64_and(ctx, v3, v60, v159);
-                                let v161 = constructor_output_gpr(ctx, v160);
-                                // Rule at src/isa/x64/lower.isle line 279.
-                                return Some(v161);
-                            }
-                            let v58 = &C::sinkable_load(ctx, v38.0);
-                            if let Some(v59) = v58 {
-                                let v60 = constructor_put_in_gpr(ctx, v38.1);
-                                let v61 = &constructor_sink_load_to_gpr_mem_imm(ctx, v59);
-                                let v156 = constructor_x64_and(ctx, v3, v60, v61);
-                                let v157 = constructor_output_gpr(ctx, v156);
-                                // Rule at src/isa/x64/lower.isle line 275.
-                                return Some(v157);
-                            }
-                            let v41 = constructor_put_in_gpr(ctx, v38.0);
-                            let v42 = &constructor_put_in_gpr_mem_imm(ctx, v38.1);
-                            let v154 = constructor_x64_and(ctx, v3, v41, v42);
-                            let v155 = constructor_output_gpr(ctx, v154);
-                            // Rule at src/isa/x64/lower.isle line 268.
-                            return Some(v155);
-                        }
-                    }
-                }
-                &Opcode::Bor => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        if v3 == I128 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v78 = C::put_in_regs(ctx, v38.0);
-                            let v241 = C::put_in_regs(ctx, v38.1);
-                            let v242 = constructor_or_i128(ctx, v78, v241);
-                            let v243 = C::output(ctx, v242);
-                            // Rule at src/isa/x64/lower.isle line 411.
-                            return Some(v243);
-                        }
-                        let v64 = C::multi_lane(ctx, v3);
-                        if let Some(v65) = v64 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v68 = constructor_put_in_xmm(ctx, v38.0);
-                            let v69 = &C::put_in_xmm_mem(ctx, v38.1);
-                            let v239 = constructor_sse_or(ctx, v3, v68, v69);
-                            let v240 = constructor_output_xmm(ctx, v239);
-                            // Rule at src/isa/x64/lower.isle line 396.
-                            return Some(v240);
-                        }
-                        let v162 = C::ty_scalar_float(ctx, v3);
-                        if let Some(v163) = v162 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v68 = constructor_put_in_xmm(ctx, v38.0);
-                            let v69 = &C::put_in_xmm_mem(ctx, v38.1);
-                            let v237 = constructor_sse_or(ctx, v163, v68, v69);
-                            let v238 = constructor_output_xmm(ctx, v237);
-                            // Rule at src/isa/x64/lower.isle line 384.
-                            return Some(v238);
-                        }
-                        let v152 = C::ty_int_ref_scalar_64(ctx, v3);
-                        if let Some(v153) = v152 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v158 = &C::simm32_from_value(ctx, v38.0);
-                            if let Some(v159) = v158 {
-                                let v60 = constructor_put_in_gpr(ctx, v38.1);
-                                let v235 = constructor_x64_or(ctx, v3, v60, v159);
-                                let v236 = constructor_output_gpr(ctx, v235);
-                                // Rule at src/isa/x64/lower.isle line 378.
-                                return Some(v236);
-                            }
-                            let v58 = &C::sinkable_load(ctx, v38.0);
-                            if let Some(v59) = v58 {
-                                let v60 = constructor_put_in_gpr(ctx, v38.1);
-                                let v61 = &constructor_sink_load_to_gpr_mem_imm(ctx, v59);
-                                let v233 = constructor_x64_or(ctx, v3, v60, v61);
-                                let v234 = constructor_output_gpr(ctx, v233);
-                                // Rule at src/isa/x64/lower.isle line 374.
-                                return Some(v234);
-                            }
-                            let v41 = constructor_put_in_gpr(ctx, v38.0);
-                            let v42 = &constructor_put_in_gpr_mem_imm(ctx, v38.1);
-                            let v231 = constructor_x64_or(ctx, v3, v41, v42);
-                            let v232 = constructor_output_gpr(ctx, v231);
-                            // Rule at src/isa/x64/lower.isle line 367.
-                            return Some(v232);
-                        }
-                    }
-                }
-                &Opcode::Bxor => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v45 = C::ty_32_or_64(ctx, v3);
-                        if let Some(v46) = v45 {
-                            let v189 = C::use_bmi1(ctx);
-                            if v189 == true {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v172 = C::def_inst(ctx, v38.1);
-                                if let Some(v173) = v172 {
-                                    let v174 = &C::inst_data(ctx, v173);
-                                    if let &InstructionData::Binary {
-                                        opcode: ref v212,
-                                        args: ref v213,
-                                    } = v174
-                                    {
-                                        if let &Opcode::Isub = v212 {
-                                            let v214 = C::unpack_value_array_2(ctx, v213);
-                                            let v217 = C::def_inst(ctx, v214.1);
-                                            if let Some(v218) = v217 {
-                                                let v219 = &C::inst_data(ctx, v218);
-                                                if let &InstructionData::UnaryImm {
-                                                    opcode: ref v220,
-                                                    imm: v221,
-                                                } = v219
-                                                {
-                                                    if let &Opcode::Iconst = v220 {
-                                                        let v222 = C::u64_from_imm64(ctx, v221);
-                                                        if v222 == 0x1 {
-                                                            if v38.0 == v214.0 {
-                                                                let v223 =
-                                                                    &constructor_put_in_gpr_mem(
-                                                                        ctx, v38.0,
-                                                                    );
-                                                                let v260 = constructor_x64_blsmsk(
-                                                                    ctx, v46, v223,
-                                                                );
-                                                                let v261 = constructor_output_gpr(
-                                                                    ctx, v260,
-                                                                );
-                                                                // Rule at src/isa/x64/lower.isle line 461.
-                                                                return Some(v261);
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                                let v181 = C::def_inst(ctx, v38.0);
-                                if let Some(v182) = v181 {
-                                    let v183 = &C::inst_data(ctx, v182);
-                                    if let &InstructionData::Binary {
-                                        opcode: ref v198,
-                                        args: ref v199,
-                                    } = v183
-                                    {
-                                        if let &Opcode::Isub = v198 {
-                                            let v200 = C::unpack_value_array_2(ctx, v199);
-                                            let v203 = C::def_inst(ctx, v200.1);
-                                            if let Some(v204) = v203 {
-                                                let v205 = &C::inst_data(ctx, v204);
-                                                if let &InstructionData::UnaryImm {
-                                                    opcode: ref v206,
-                                                    imm: v207,
-                                                } = v205
-                                                {
-                                                    if let &Opcode::Iconst = v206 {
-                                                        let v208 = C::u64_from_imm64(ctx, v207);
-                                                        if v208 == 0x1 {
-                                                            if v38.1 == v200.0 {
-                                                                let v209 =
-                                                                    &constructor_put_in_gpr_mem(
-                                                                        ctx, v200.0,
-                                                                    );
-                                                                let v258 = constructor_x64_blsmsk(
-                                                                    ctx, v46, v209,
-                                                                );
-                                                                let v259 = constructor_output_gpr(
-                                                                    ctx, v258,
-                                                                );
-                                                                // Rule at src/isa/x64/lower.isle line 458.
-                                                                return Some(v259);
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                            }
-                        }
-                        if v3 == I128 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v78 = C::put_in_regs(ctx, v38.0);
-                            let v80 = constructor_value_regs_get_gpr(ctx, v78, 0x0);
-                            let v82 = constructor_value_regs_get_gpr(ctx, v78, 0x1);
-                            let v83 = C::put_in_regs(ctx, v38.1);
-                            let v84 = constructor_value_regs_get_gpr(ctx, v83, 0x0);
-                            let v85 = constructor_value_regs_get_gpr(ctx, v83, 0x1);
-                            let v86 = &C::gpr_to_gpr_mem_imm(ctx, v84);
-                            let v254 = constructor_x64_xor(ctx, I64, v80, v86);
-                            let v88 = &C::gpr_to_gpr_mem_imm(ctx, v85);
-                            let v255 = constructor_x64_xor(ctx, I64, v82, v88);
-                            let v256 = constructor_value_gprs(ctx, v254, v255);
-                            let v257 = C::output(ctx, v256);
-                            // Rule at src/isa/x64/lower.isle line 446.
-                            return Some(v257);
-                        }
-                        let v64 = C::multi_lane(ctx, v3);
-                        if let Some(v65) = v64 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v68 = constructor_put_in_xmm(ctx, v38.0);
-                            let v69 = &C::put_in_xmm_mem(ctx, v38.1);
-                            let v252 = constructor_x64_xor_vector(ctx, v3, v68, v69);
-                            let v253 = constructor_output_xmm(ctx, v252);
-                            // Rule at src/isa/x64/lower.isle line 441.
-                            return Some(v253);
-                        }
-                        let v162 = C::ty_scalar_float(ctx, v3);
-                        if let Some(v163) = v162 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v68 = constructor_put_in_xmm(ctx, v38.0);
-                            let v69 = &C::put_in_xmm_mem(ctx, v38.1);
-                            let v250 = constructor_x64_xor_vector(ctx, v163, v68, v69);
-                            let v251 = constructor_output_xmm(ctx, v250);
-                            // Rule at src/isa/x64/lower.isle line 436.
-                            return Some(v251);
-                        }
-                        let v152 = C::ty_int_ref_scalar_64(ctx, v3);
-                        if let Some(v153) = v152 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v158 = &C::simm32_from_value(ctx, v38.0);
-                            if let Some(v159) = v158 {
-                                let v60 = constructor_put_in_gpr(ctx, v38.1);
-                                let v248 = constructor_x64_xor(ctx, v3, v60, v159);
-                                let v249 = constructor_output_gpr(ctx, v248);
-                                // Rule at src/isa/x64/lower.isle line 430.
-                                return Some(v249);
-                            }
-                            let v58 = &C::sinkable_load(ctx, v38.0);
-                            if let Some(v59) = v58 {
-                                let v60 = constructor_put_in_gpr(ctx, v38.1);
-                                let v61 = &constructor_sink_load_to_gpr_mem_imm(ctx, v59);
-                                let v246 = constructor_x64_xor(ctx, v3, v60, v61);
-                                let v247 = constructor_output_gpr(ctx, v246);
-                                // Rule at src/isa/x64/lower.isle line 426.
-                                return Some(v247);
-                            }
-                            let v41 = constructor_put_in_gpr(ctx, v38.0);
-                            let v42 = &constructor_put_in_gpr_mem_imm(ctx, v38.1);
-                            let v244 = constructor_x64_xor(ctx, v3, v41, v42);
-                            let v245 = constructor_output_gpr(ctx, v244);
-                            // Rule at src/isa/x64/lower.isle line 419.
-                            return Some(v245);
-                        }
-                    }
-                }
-                &Opcode::Rotl => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        if v3 == I128 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v78 = C::put_in_regs(ctx, v38.0);
-                            let v359 = constructor_lo_gpr(ctx, v38.1);
-                            let v360 = constructor_shl_i128(ctx, v78, v359);
-                            let v362 = constructor_imm(ctx, I64, 0x80);
-                            let v363 = C::gpr_new(ctx, v362);
-                            let v364 = &C::gpr_to_gpr_mem_imm(ctx, v359);
-                            let v365 = constructor_x64_sub(ctx, I64, v363, v364);
-                            let v366 = constructor_shr_i128(ctx, v78, v365);
-                            let v367 = constructor_or_i128(ctx, v360, v366);
-                            let v368 = C::output(ctx, v367);
-                            // Rule at src/isa/x64/lower.isle line 866.
-                            return Some(v368);
-                        }
-                        let v4 = C::fits_in_64(ctx, v3);
-                        if let Some(v5) = v4 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v41 = constructor_put_in_gpr(ctx, v38.0);
-                            let v262 = &constructor_put_masked_in_imm8_gpr(ctx, v38.1, v5);
-                            let v357 = constructor_x64_rotl(ctx, v5, v41, v262);
-                            let v358 = constructor_output_gpr(ctx, v357);
-                            // Rule at src/isa/x64/lower.isle line 860.
-                            return Some(v358);
-                        }
-                    }
-                }
-                &Opcode::Rotr => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        if v3 == I128 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v78 = C::put_in_regs(ctx, v38.0);
-                            let v359 = constructor_lo_gpr(ctx, v38.1);
-                            let v371 = constructor_shr_i128(ctx, v78, v359);
-                            let v362 = constructor_imm(ctx, I64, 0x80);
-                            let v363 = C::gpr_new(ctx, v362);
-                            let v364 = &C::gpr_to_gpr_mem_imm(ctx, v359);
-                            let v365 = constructor_x64_sub(ctx, I64, v363, v364);
-                            let v372 = constructor_shl_i128(ctx, v78, v365);
-                            let v373 = constructor_or_i128(ctx, v371, v372);
-                            let v374 = C::output(ctx, v373);
-                            // Rule at src/isa/x64/lower.isle line 887.
-                            return Some(v374);
-                        }
-                        let v4 = C::fits_in_64(ctx, v3);
-                        if let Some(v5) = v4 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v41 = constructor_put_in_gpr(ctx, v38.0);
-                            let v262 = &constructor_put_masked_in_imm8_gpr(ctx, v38.1, v5);
-                            let v369 = constructor_x64_rotr(ctx, v5, v41, v262);
-                            let v370 = constructor_output_gpr(ctx, v369);
-                            // Rule at src/isa/x64/lower.isle line 881.
-                            return Some(v370);
-                        }
-                    }
-                }
-                &Opcode::Ishl => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            I128 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v265 = constructor_lo_gpr(ctx, v38.1);
-                                let v266 = C::put_in_regs(ctx, v38.0);
-                                let v267 = constructor_shl_i128(ctx, v266, v265);
-                                let v268 = C::output(ctx, v267);
-                                // Rule at src/isa/x64/lower.isle line 508.
-                                return Some(v268);
-                            }
-                            I8X16 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v269 = &constructor_mask_xmm_shift(ctx, v3, v38.1);
-                                let v270 = constructor_put_in_xmm(ctx, v38.0);
-                                let v271 = &constructor_mov_rmi_to_xmm(ctx, v269);
-                                let v272 = constructor_x64_psllw(ctx, v270, v271);
-                                let v273 = &constructor_ishl_i8x16_mask(ctx, v269);
-                                let v276 = constructor_x64_load(ctx, I8X16, v273, &ExtKind::None);
-                                let v277 = RegMem::Reg { reg: v276 };
-                                let v278 = &C::reg_mem_to_xmm_mem(ctx, &v277);
-                                let v279 = constructor_sse_and(ctx, I8X16, v272, v278);
-                                let v280 = constructor_output_xmm(ctx, v279);
-                                // Rule at src/isa/x64/lower.isle line 520.
-                                return Some(v280);
-                            }
-                            I16X8 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                let v281 = &constructor_mask_xmm_shift(ctx, v3, v38.1);
-                                let v282 = &constructor_mov_rmi_to_xmm(ctx, v281);
-                                let v283 = constructor_x64_psllw(ctx, v68, v282);
-                                let v284 = constructor_output_xmm(ctx, v283);
-                                // Rule at src/isa/x64/lower.isle line 565.
-                                return Some(v284);
-                            }
-                            I32X4 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                let v281 = &constructor_mask_xmm_shift(ctx, v3, v38.1);
-                                let v282 = &constructor_mov_rmi_to_xmm(ctx, v281);
-                                let v285 = constructor_x64_pslld(ctx, v68, v282);
-                                let v286 = constructor_output_xmm(ctx, v285);
-                                // Rule at src/isa/x64/lower.isle line 568.
-                                return Some(v286);
-                            }
-                            I64X2 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                let v281 = &constructor_mask_xmm_shift(ctx, v3, v38.1);
-                                let v282 = &constructor_mov_rmi_to_xmm(ctx, v281);
-                                let v287 = constructor_x64_psllq(ctx, v68, v282);
-                                let v288 = constructor_output_xmm(ctx, v287);
-                                // Rule at src/isa/x64/lower.isle line 571.
-                                return Some(v288);
-                            }
-                            _ => {}
-                        }
-                        let v4 = C::fits_in_64(ctx, v3);
-                        if let Some(v5) = v4 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v41 = constructor_put_in_gpr(ctx, v38.0);
-                            let v262 = &constructor_put_masked_in_imm8_gpr(ctx, v38.1, v5);
-                            let v263 = constructor_x64_shl(ctx, v5, v41, v262);
-                            let v264 = constructor_output_gpr(ctx, v263);
-                            // Rule at src/isa/x64/lower.isle line 469.
-                            return Some(v264);
-                        }
-                    }
-                }
-                &Opcode::Ushr => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            I128 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v265 = constructor_lo_gpr(ctx, v38.1);
-                                let v266 = C::put_in_regs(ctx, v38.0);
-                                let v293 = constructor_shr_i128(ctx, v266, v265);
-                                let v294 = C::output(ctx, v293);
-                                // Rule at src/isa/x64/lower.isle line 615.
-                                return Some(v294);
-                            }
-                            I8X16 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v269 = &constructor_mask_xmm_shift(ctx, v3, v38.1);
-                                let v270 = constructor_put_in_xmm(ctx, v38.0);
-                                let v271 = &constructor_mov_rmi_to_xmm(ctx, v269);
-                                let v295 = constructor_x64_psrlw(ctx, v270, v271);
-                                let v296 = &constructor_ushr_i8x16_mask(ctx, v269);
-                                let v297 = &constructor_synthetic_amode_to_xmm_mem(ctx, v296);
-                                let v298 = constructor_sse_and(ctx, I8X16, v295, v297);
-                                let v299 = constructor_output_xmm(ctx, v298);
-                                // Rule at src/isa/x64/lower.isle line 625.
-                                return Some(v299);
-                            }
-                            I16X8 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                let v281 = &constructor_mask_xmm_shift(ctx, v3, v38.1);
-                                let v282 = &constructor_mov_rmi_to_xmm(ctx, v281);
-                                let v300 = constructor_x64_psrlw(ctx, v68, v282);
-                                let v301 = constructor_output_xmm(ctx, v300);
-                                // Rule at src/isa/x64/lower.isle line 671.
-                                return Some(v301);
-                            }
-                            I32X4 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                let v281 = &constructor_mask_xmm_shift(ctx, v3, v38.1);
-                                let v282 = &constructor_mov_rmi_to_xmm(ctx, v281);
-                                let v302 = constructor_x64_psrld(ctx, v68, v282);
-                                let v303 = constructor_output_xmm(ctx, v302);
-                                // Rule at src/isa/x64/lower.isle line 674.
-                                return Some(v303);
-                            }
-                            I64X2 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                let v281 = &constructor_mask_xmm_shift(ctx, v3, v38.1);
-                                let v282 = &constructor_mov_rmi_to_xmm(ctx, v281);
-                                let v304 = constructor_x64_psrlq(ctx, v68, v282);
-                                let v305 = constructor_output_xmm(ctx, v304);
-                                // Rule at src/isa/x64/lower.isle line 677.
-                                return Some(v305);
-                            }
-                            _ => {}
-                        }
-                        let v4 = C::fits_in_64(ctx, v3);
-                        if let Some(v5) = v4 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v290 = constructor_extend_to_gpr(ctx, v38.0, v5, &ExtendKind::Zero);
-                            let v262 = &constructor_put_masked_in_imm8_gpr(ctx, v38.1, v5);
-                            let v291 = constructor_x64_shr(ctx, v5, v290, v262);
-                            let v292 = constructor_output_gpr(ctx, v291);
-                            // Rule at src/isa/x64/lower.isle line 578.
-                            return Some(v292);
-                        }
-                    }
-                }
-                &Opcode::Sshr => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            I128 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v265 = constructor_lo_gpr(ctx, v38.1);
-                                let v266 = C::put_in_regs(ctx, v38.0);
-                                let v310 = constructor_sar_i128(ctx, v266, v265);
-                                let v311 = C::output(ctx, v310);
-                                // Rule at src/isa/x64/lower.isle line 727.
-                                return Some(v311);
-                            }
-                            I8X16 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                let v281 = &constructor_mask_xmm_shift(ctx, v3, v38.1);
-                                let v312 = &C::xmm_to_xmm_mem(ctx, v68);
-                                let v313 = constructor_x64_punpcklbw(ctx, v68, v312);
-                                let v314 = &C::xmm_to_xmm_mem(ctx, v68);
-                                let v315 = constructor_x64_punpckhbw(ctx, v68, v314);
-                                let v92 = C::value_type(ctx, v38.1);
-                                let v316 = &constructor_sshr_i8x16_bigger_shift(ctx, v92, v281);
-                                let v317 = constructor_x64_psraw(ctx, v313, v316);
-                                let v318 = constructor_x64_psraw(ctx, v315, v316);
-                                let v319 = &C::xmm_to_xmm_mem(ctx, v318);
-                                let v320 = constructor_x64_packsswb(ctx, v317, v319);
-                                let v321 = constructor_output_xmm(ctx, v320);
-                                // Rule at src/isa/x64/lower.isle line 748.
-                                return Some(v321);
-                            }
-                            I16X8 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                let v281 = &constructor_mask_xmm_shift(ctx, v3, v38.1);
-                                let v282 = &constructor_mov_rmi_to_xmm(ctx, v281);
-                                let v322 = constructor_x64_psraw(ctx, v68, v282);
-                                let v323 = constructor_output_xmm(ctx, v322);
-                                // Rule at src/isa/x64/lower.isle line 777.
-                                return Some(v323);
-                            }
-                            I32X4 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                let v281 = &constructor_mask_xmm_shift(ctx, v3, v38.1);
-                                let v282 = &constructor_mov_rmi_to_xmm(ctx, v281);
-                                let v324 = constructor_x64_psrad(ctx, v68, v282);
-                                let v325 = constructor_output_xmm(ctx, v324);
-                                // Rule at src/isa/x64/lower.isle line 780.
-                                return Some(v325);
-                            }
-                            I64X2 => {
-                                let v328 = C::use_avx512vl(ctx);
-                                if v328 == true {
-                                    let v329 = C::use_avx512f(ctx);
-                                    if v329 == true {
-                                        let v38 = C::unpack_value_array_2(ctx, v37);
-                                        let v172 = C::def_inst(ctx, v38.1);
-                                        if let Some(v173) = v172 {
-                                            let v174 = &C::inst_data(ctx, v173);
-                                            if let &InstructionData::UnaryImm {
-                                                opcode: ref v326,
-                                                imm: v327,
-                                            } = v174
-                                            {
-                                                if let &Opcode::Iconst = v326 {
-                                                    let v330 = &C::put_in_xmm_mem(ctx, v38.0);
-                                                    let v331 =
-                                                        C::shift_amount_masked(ctx, v3, v327);
-                                                    let v332 =
-                                                        constructor_x64_vpsraq_imm(ctx, v330, v331);
-                                                    let v333 = constructor_output_xmm(ctx, v332);
-                                                    // Rule at src/isa/x64/lower.isle line 786.
-                                                    return Some(v333);
-                                                }
-                                            }
-                                        }
-                                        let v60 = constructor_put_in_gpr(ctx, v38.1);
-                                        let v334 = C::shift_mask(ctx, v3);
-                                        let v335 = C::u8_as_u32(ctx, v334);
-                                        let v336 = RegMemImm::Imm { simm32: v335 };
-                                        let v337 = &C::gpr_mem_imm_new(ctx, &v336);
-                                        let v338 = constructor_x64_and(ctx, I64, v60, v337);
-                                        let v339 = constructor_put_in_xmm(ctx, v38.0);
-                                        let v340 = &C::gpr_to_gpr_mem(ctx, v338);
-                                        let v341 = constructor_x64_movd_to_xmm(ctx, v340);
-                                        let v342 = &C::xmm_to_xmm_mem(ctx, v341);
-                                        let v343 = constructor_x64_vpsraq(ctx, v339, v342);
-                                        let v344 = constructor_output_xmm(ctx, v343);
-                                        // Rule at src/isa/x64/lower.isle line 791.
-                                        return Some(v344);
-                                    }
-                                }
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v172 = C::def_inst(ctx, v38.1);
-                                if let Some(v173) = v172 {
-                                    let v174 = &C::inst_data(ctx, v173);
-                                    if let &InstructionData::UnaryImm {
-                                        opcode: ref v326,
-                                        imm: v327,
-                                    } = v174
-                                    {
-                                        if let &Opcode::Iconst = v326 {
-                                            let v345 = C::u64_from_imm64(ctx, v327);
-                                            let v346 = C::u64_as_u32(ctx, v345);
-                                            if let Some(v347) = v346 {
-                                                let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                                let v349 = C::u32_and(ctx, v347, 0x3F);
-                                                let v350 = constructor_lower_i64x2_sshr_imm(
-                                                    ctx, v68, v349,
-                                                );
-                                                let v351 = constructor_output_xmm(ctx, v350);
-                                                // Rule at src/isa/x64/lower.isle line 797.
-                                                return Some(v351);
-                                            }
-                                        }
-                                    }
-                                }
-                                let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                let v195 = constructor_put_in_gpr(ctx, v38.1);
-                                let v352 = RegMemImm::Imm { simm32: 0x3F };
-                                let v353 = &C::gpr_mem_imm_new(ctx, &v352);
-                                let v354 = constructor_x64_and(ctx, I64, v195, v353);
-                                let v355 = constructor_lower_i64x2_sshr_gpr(ctx, v68, v354);
-                                let v356 = constructor_output_xmm(ctx, v355);
-                                // Rule at src/isa/x64/lower.isle line 800.
-                                return Some(v356);
-                            }
-                            _ => {}
-                        }
-                        let v4 = C::fits_in_64(ctx, v3);
-                        if let Some(v5) = v4 {
-                            let v38 = C::unpack_value_array_2(ctx, v37);
-                            let v307 = constructor_extend_to_gpr(ctx, v38.0, v5, &ExtendKind::Sign);
-                            let v262 = &constructor_put_masked_in_imm8_gpr(ctx, v38.1, v5);
-                            let v308 = constructor_x64_sar(ctx, v5, v307, v262);
-                            let v309 = constructor_output_gpr(ctx, v308);
-                            // Rule at src/isa/x64/lower.isle line 690.
-                            return Some(v309);
-                        }
-                    }
-                }
-                &Opcode::Fadd => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            F32 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v58 = &C::sinkable_load(ctx, v38.0);
-                                if let Some(v59) = v58 {
-                                    let v1180 = constructor_put_in_xmm(ctx, v38.1);
-                                    let v1191 = &constructor_sink_load_to_xmm_mem(ctx, v59);
-                                    let v1192 = constructor_x64_addss(ctx, v1180, v1191);
-                                    let v1193 = constructor_output_xmm(ctx, v1192);
-                                    // Rule at src/isa/x64/lower.isle line 2432.
-                                    return Some(v1193);
-                                }
-                                let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
-                                let v1183 = constructor_x64_addss(ctx, v68, v69);
-                                let v1184 = constructor_output_xmm(ctx, v1183);
-                                // Rule at src/isa/x64/lower.isle line 2421.
-                                return Some(v1184);
-                            }
-                            F64 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v58 = &C::sinkable_load(ctx, v38.0);
-                                if let Some(v59) = v58 {
-                                    let v1180 = constructor_put_in_xmm(ctx, v38.1);
-                                    let v1191 = &constructor_sink_load_to_xmm_mem(ctx, v59);
-                                    let v1194 = constructor_x64_addsd(ctx, v1180, v1191);
-                                    let v1195 = constructor_output_xmm(ctx, v1194);
-                                    // Rule at src/isa/x64/lower.isle line 2434.
-                                    return Some(v1195);
-                                }
-                                let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
-                                let v1185 = constructor_x64_addsd(ctx, v68, v69);
-                                let v1186 = constructor_output_xmm(ctx, v1185);
-                                // Rule at src/isa/x64/lower.isle line 2423.
-                                return Some(v1186);
-                            }
-                            F32X4 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v58 = &C::sinkable_load(ctx, v38.0);
-                                if let Some(v59) = v58 {
-                                    let v1180 = constructor_put_in_xmm(ctx, v38.1);
-                                    let v1191 = &constructor_sink_load_to_xmm_mem(ctx, v59);
-                                    let v1196 = constructor_x64_addps(ctx, v1180, v1191);
-                                    let v1197 = constructor_output_xmm(ctx, v1196);
-                                    // Rule at src/isa/x64/lower.isle line 2436.
-                                    return Some(v1197);
-                                }
-                                let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
-                                let v1187 = constructor_x64_addps(ctx, v68, v69);
-                                let v1188 = constructor_output_xmm(ctx, v1187);
-                                // Rule at src/isa/x64/lower.isle line 2425.
-                                return Some(v1188);
-                            }
-                            F64X2 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v58 = &C::sinkable_load(ctx, v38.0);
-                                if let Some(v59) = v58 {
-                                    let v1180 = constructor_put_in_xmm(ctx, v38.1);
-                                    let v1191 = &constructor_sink_load_to_xmm_mem(ctx, v59);
-                                    let v1198 = constructor_x64_addpd(ctx, v1180, v1191);
-                                    let v1199 = constructor_output_xmm(ctx, v1198);
-                                    // Rule at src/isa/x64/lower.isle line 2438.
-                                    return Some(v1199);
-                                }
-                                let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
-                                let v1189 = constructor_x64_addpd(ctx, v68, v69);
-                                let v1190 = constructor_output_xmm(ctx, v1189);
-                                // Rule at src/isa/x64/lower.isle line 2427.
-                                return Some(v1190);
-                            }
-                            _ => {}
-                        }
-                    }
-                }
-                &Opcode::Fsub => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            F32 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
-                                let v1200 = constructor_x64_subss(ctx, v68, v69);
-                                let v1201 = constructor_output_xmm(ctx, v1200);
-                                // Rule at src/isa/x64/lower.isle line 2443.
-                                return Some(v1201);
-                            }
-                            F64 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
-                                let v1202 = constructor_x64_subsd(ctx, v68, v69);
-                                let v1203 = constructor_output_xmm(ctx, v1202);
-                                // Rule at src/isa/x64/lower.isle line 2445.
-                                return Some(v1203);
-                            }
-                            F32X4 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
-                                let v1204 = constructor_x64_subps(ctx, v68, v69);
-                                let v1205 = constructor_output_xmm(ctx, v1204);
-                                // Rule at src/isa/x64/lower.isle line 2447.
-                                return Some(v1205);
-                            }
-                            F64X2 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
-                                let v1206 = constructor_x64_subpd(ctx, v68, v69);
-                                let v1207 = constructor_output_xmm(ctx, v1206);
-                                // Rule at src/isa/x64/lower.isle line 2449.
-                                return Some(v1207);
-                            }
-                            _ => {}
-                        }
-                    }
-                }
-                &Opcode::Fmul => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            F32 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v58 = &C::sinkable_load(ctx, v38.0);
-                                if let Some(v59) = v58 {
-                                    let v1180 = constructor_put_in_xmm(ctx, v38.1);
-                                    let v1191 = &constructor_sink_load_to_xmm_mem(ctx, v59);
-                                    let v1216 = constructor_x64_mulss(ctx, v1180, v1191);
-                                    let v1217 = constructor_output_xmm(ctx, v1216);
-                                    // Rule at src/isa/x64/lower.isle line 2465.
-                                    return Some(v1217);
-                                }
-                                let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
-                                let v1208 = constructor_x64_mulss(ctx, v68, v69);
-                                let v1209 = constructor_output_xmm(ctx, v1208);
-                                // Rule at src/isa/x64/lower.isle line 2454.
-                                return Some(v1209);
-                            }
-                            F64 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v58 = &C::sinkable_load(ctx, v38.0);
-                                if let Some(v59) = v58 {
-                                    let v1180 = constructor_put_in_xmm(ctx, v38.1);
-                                    let v1191 = &constructor_sink_load_to_xmm_mem(ctx, v59);
-                                    let v1218 = constructor_x64_mulsd(ctx, v1180, v1191);
-                                    let v1219 = constructor_output_xmm(ctx, v1218);
-                                    // Rule at src/isa/x64/lower.isle line 2467.
-                                    return Some(v1219);
-                                }
-                                let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
-                                let v1210 = constructor_x64_mulsd(ctx, v68, v69);
-                                let v1211 = constructor_output_xmm(ctx, v1210);
-                                // Rule at src/isa/x64/lower.isle line 2456.
-                                return Some(v1211);
-                            }
-                            F32X4 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v58 = &C::sinkable_load(ctx, v38.0);
-                                if let Some(v59) = v58 {
-                                    let v1180 = constructor_put_in_xmm(ctx, v38.1);
-                                    let v1191 = &constructor_sink_load_to_xmm_mem(ctx, v59);
-                                    let v1220 = constructor_x64_mulps(ctx, v1180, v1191);
-                                    let v1221 = constructor_output_xmm(ctx, v1220);
-                                    // Rule at src/isa/x64/lower.isle line 2469.
-                                    return Some(v1221);
-                                }
-                                let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
-                                let v1212 = constructor_x64_mulps(ctx, v68, v69);
-                                let v1213 = constructor_output_xmm(ctx, v1212);
-                                // Rule at src/isa/x64/lower.isle line 2458.
-                                return Some(v1213);
-                            }
-                            F64X2 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v58 = &C::sinkable_load(ctx, v38.0);
-                                if let Some(v59) = v58 {
-                                    let v1180 = constructor_put_in_xmm(ctx, v38.1);
-                                    let v1191 = &constructor_sink_load_to_xmm_mem(ctx, v59);
-                                    let v1222 = constructor_x64_mulpd(ctx, v1180, v1191);
-                                    let v1223 = constructor_output_xmm(ctx, v1222);
-                                    // Rule at src/isa/x64/lower.isle line 2471.
-                                    return Some(v1223);
-                                }
-                                let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
-                                let v1214 = constructor_x64_mulpd(ctx, v68, v69);
-                                let v1215 = constructor_output_xmm(ctx, v1214);
-                                // Rule at src/isa/x64/lower.isle line 2460.
-                                return Some(v1215);
-                            }
-                            _ => {}
-                        }
-                    }
-                }
-                &Opcode::Fdiv => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            F32 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
-                                let v1224 = constructor_x64_divss(ctx, v68, v69);
-                                let v1225 = constructor_output_xmm(ctx, v1224);
-                                // Rule at src/isa/x64/lower.isle line 2476.
-                                return Some(v1225);
-                            }
-                            F64 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
-                                let v1226 = constructor_x64_divsd(ctx, v68, v69);
-                                let v1227 = constructor_output_xmm(ctx, v1226);
-                                // Rule at src/isa/x64/lower.isle line 2478.
-                                return Some(v1227);
-                            }
-                            F32X4 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
-                                let v1228 = constructor_x64_divps(ctx, v68, v69);
-                                let v1229 = constructor_output_xmm(ctx, v1228);
-                                // Rule at src/isa/x64/lower.isle line 2480.
-                                return Some(v1229);
-                            }
-                            F64X2 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
-                                let v1230 = constructor_x64_divpd(ctx, v68, v69);
-                                let v1231 = constructor_output_xmm(ctx, v1230);
-                                // Rule at src/isa/x64/lower.isle line 2482.
-                                return Some(v1231);
-                            }
-                            _ => {}
-                        }
-                    }
-                }
-                &Opcode::Fcopysign => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            F32 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v2000 = C::value_type(ctx, v38.0);
-                                if v2000 == F32 {
-                                    let v2050 = constructor_imm(ctx, F32, 0x80000000);
-                                    let v2051 = C::xmm_new(ctx, v2050);
-                                    let v2052 = &C::put_in_xmm_mem(ctx, v38.0);
-                                    let v2053 = constructor_x64_andnps(ctx, v2051, v2052);
-                                    let v2054 = &C::put_in_xmm_mem(ctx, v38.1);
-                                    let v2055 = constructor_x64_andps(ctx, v2051, v2054);
-                                    let v2056 = &C::xmm_to_xmm_mem(ctx, v2055);
-                                    let v2057 = constructor_x64_orps(ctx, v2053, v2056);
-                                    let v2058 = constructor_output_xmm(ctx, v2057);
-                                    // Rule at src/isa/x64/lower.isle line 3847.
-                                    return Some(v2058);
-                                }
-                            }
-                            F64 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v2000 = C::value_type(ctx, v38.0);
-                                if v2000 == F64 {
-                                    let v2059 = constructor_imm(ctx, F64, 0x8000000000000000);
-                                    let v2060 = C::xmm_new(ctx, v2059);
-                                    let v2052 = &C::put_in_xmm_mem(ctx, v38.0);
-                                    let v2061 = constructor_x64_andnpd(ctx, v2060, v2052);
-                                    let v2054 = &C::put_in_xmm_mem(ctx, v38.1);
-                                    let v2062 = constructor_x64_andpd(ctx, v2060, v2054);
-                                    let v2063 = &C::xmm_to_xmm_mem(ctx, v2062);
-                                    let v2064 = constructor_x64_orpd(ctx, v2061, v2063);
-                                    let v2065 = constructor_output_xmm(ctx, v2064);
-                                    // Rule at src/isa/x64/lower.isle line 3853.
-                                    return Some(v2065);
-                                }
-                            }
-                            _ => {}
-                        }
-                    }
-                }
-                &Opcode::Fmin => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            F32 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                let v439 = constructor_put_in_xmm(ctx, v38.1);
-                                let v1250 = constructor_xmm_min_max_seq(ctx, F32, true, v68, v439);
-                                let v1251 = constructor_output_xmm(ctx, v1250);
-                                // Rule at src/isa/x64/lower.isle line 2513.
-                                return Some(v1251);
-                            }
-                            F64 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                let v439 = constructor_put_in_xmm(ctx, v38.1);
-                                let v1252 = constructor_xmm_min_max_seq(ctx, F64, true, v68, v439);
-                                let v1253 = constructor_output_xmm(ctx, v1252);
-                                // Rule at src/isa/x64/lower.isle line 2515.
-                                return Some(v1253);
-                            }
-                            F32X4 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
-                                let v1254 = constructor_x64_minps(ctx, v68, v69);
-                                let v1255 = constructor_put_in_xmm(ctx, v38.1);
-                                let v1256 = &C::put_in_xmm_mem(ctx, v38.0);
-                                let v1257 = constructor_x64_minps(ctx, v1255, v1256);
-                                let v1258 = &C::xmm_to_xmm_mem(ctx, v1257);
-                                let v1259 = constructor_x64_orps(ctx, v1254, v1258);
-                                let v1260 = &C::xmm_to_xmm_mem(ctx, v1257);
-                                let v1261 =
-                                    constructor_x64_cmpps(ctx, v1259, v1260, &FcmpImm::Unordered);
-                                let v1262 = &C::xmm_to_xmm_mem(ctx, v1261);
-                                let v1263 = constructor_x64_orps(ctx, v1259, v1262);
-                                let v1265 = &C::xmi_imm(ctx, 0xA);
-                                let v1266 = constructor_x64_psrld(ctx, v1261, v1265);
-                                let v1267 = &C::xmm_to_xmm_mem(ctx, v1263);
-                                let v1268 = constructor_x64_andnps(ctx, v1266, v1267);
-                                let v1269 = constructor_output_xmm(ctx, v1268);
-                                // Rule at src/isa/x64/lower.isle line 2530.
-                                return Some(v1269);
-                            }
-                            F64X2 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
-                                let v1270 = constructor_x64_minpd(ctx, v68, v69);
-                                let v1255 = constructor_put_in_xmm(ctx, v38.1);
-                                let v1256 = &C::put_in_xmm_mem(ctx, v38.0);
-                                let v1271 = constructor_x64_minpd(ctx, v1255, v1256);
-                                let v1272 = &C::xmm_to_xmm_mem(ctx, v1271);
-                                let v1273 = constructor_x64_orpd(ctx, v1270, v1272);
-                                let v1274 = &C::xmm_to_xmm_mem(ctx, v1271);
-                                let v1275 =
-                                    constructor_x64_cmppd(ctx, v1270, v1274, &FcmpImm::Unordered);
-                                let v1276 = &C::xmm_to_xmm_mem(ctx, v1275);
-                                let v1277 = constructor_x64_orpd(ctx, v1273, v1276);
-                                let v1279 = &C::xmi_imm(ctx, 0xD);
-                                let v1280 = constructor_x64_psrlq(ctx, v1275, v1279);
-                                let v1281 = &C::xmm_to_xmm_mem(ctx, v1277);
-                                let v1282 = constructor_x64_andnpd(ctx, v1280, v1281);
-                                let v1283 = constructor_output_xmm(ctx, v1282);
-                                // Rule at src/isa/x64/lower.isle line 2573.
-                                return Some(v1283);
-                            }
-                            _ => {}
-                        }
-                    }
-                }
-                &Opcode::FminPseudo => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            F32 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v1180 = constructor_put_in_xmm(ctx, v38.1);
-                                let v178 = &C::put_in_xmm_mem(ctx, v38.0);
-                                let v1319 = constructor_x64_minss(ctx, v1180, v178);
-                                let v1320 = constructor_output_xmm(ctx, v1319);
-                                // Rule at src/isa/x64/lower.isle line 2682.
-                                return Some(v1320);
-                            }
-                            F64 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v1180 = constructor_put_in_xmm(ctx, v38.1);
-                                let v178 = &C::put_in_xmm_mem(ctx, v38.0);
-                                let v1321 = constructor_x64_minsd(ctx, v1180, v178);
-                                let v1322 = constructor_output_xmm(ctx, v1321);
-                                // Rule at src/isa/x64/lower.isle line 2684.
-                                return Some(v1322);
-                            }
-                            F32X4 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v1180 = constructor_put_in_xmm(ctx, v38.1);
-                                let v178 = &C::put_in_xmm_mem(ctx, v38.0);
-                                let v1323 = constructor_x64_minps(ctx, v1180, v178);
-                                let v1324 = constructor_output_xmm(ctx, v1323);
-                                // Rule at src/isa/x64/lower.isle line 2686.
-                                return Some(v1324);
-                            }
-                            F64X2 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v1180 = constructor_put_in_xmm(ctx, v38.1);
-                                let v178 = &C::put_in_xmm_mem(ctx, v38.0);
-                                let v1325 = constructor_x64_minpd(ctx, v1180, v178);
-                                let v1326 = constructor_output_xmm(ctx, v1325);
-                                // Rule at src/isa/x64/lower.isle line 2688.
-                                return Some(v1326);
-                            }
-                            _ => {}
-                        }
-                    }
-                }
-                &Opcode::Fmax => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            F32 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                let v439 = constructor_put_in_xmm(ctx, v38.1);
-                                let v1285 = constructor_xmm_min_max_seq(ctx, F32, false, v68, v439);
-                                let v1286 = constructor_output_xmm(ctx, v1285);
-                                // Rule at src/isa/x64/lower.isle line 2585.
-                                return Some(v1286);
-                            }
-                            F64 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                let v439 = constructor_put_in_xmm(ctx, v38.1);
-                                let v1287 = constructor_xmm_min_max_seq(ctx, F64, false, v68, v439);
-                                let v1288 = constructor_output_xmm(ctx, v1287);
-                                // Rule at src/isa/x64/lower.isle line 2587.
-                                return Some(v1288);
-                            }
-                            F32X4 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
-                                let v1289 = constructor_x64_maxps(ctx, v68, v69);
-                                let v1255 = constructor_put_in_xmm(ctx, v38.1);
-                                let v1256 = &C::put_in_xmm_mem(ctx, v38.0);
-                                let v1290 = constructor_x64_maxps(ctx, v1255, v1256);
-                                let v1291 = &C::xmm_to_xmm_mem(ctx, v1290);
-                                let v1292 = constructor_x64_xorps(ctx, v1289, v1291);
-                                let v1293 = &C::xmm_to_xmm_mem(ctx, v1292);
-                                let v1294 = constructor_x64_orps(ctx, v1289, v1293);
-                                let v1295 = &C::xmm_to_xmm_mem(ctx, v1292);
-                                let v1296 = constructor_x64_subps(ctx, v1294, v1295);
-                                let v1297 = &C::xmm_to_xmm_mem(ctx, v1294);
-                                let v1298 =
-                                    constructor_x64_cmpps(ctx, v1294, v1297, &FcmpImm::Unordered);
-                                let v1299 = &C::xmi_imm(ctx, 0xA);
-                                let v1300 = constructor_x64_psrld(ctx, v1298, v1299);
-                                let v1301 = &C::xmm_to_xmm_mem(ctx, v1296);
-                                let v1302 = constructor_x64_andnps(ctx, v1300, v1301);
-                                let v1303 = constructor_output_xmm(ctx, v1302);
-                                // Rule at src/isa/x64/lower.isle line 2593.
-                                return Some(v1303);
-                            }
-                            F64X2 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
-                                let v1304 = constructor_x64_maxpd(ctx, v68, v69);
-                                let v1255 = constructor_put_in_xmm(ctx, v38.1);
-                                let v1256 = &C::put_in_xmm_mem(ctx, v38.0);
-                                let v1305 = constructor_x64_maxpd(ctx, v1255, v1256);
-                                let v1306 = &C::xmm_to_xmm_mem(ctx, v1305);
-                                let v1307 = constructor_x64_xorpd(ctx, v1304, v1306);
-                                let v1308 = &C::xmm_to_xmm_mem(ctx, v1307);
-                                let v1309 = constructor_x64_orpd(ctx, v1304, v1308);
-                                let v1310 = &C::xmm_to_xmm_mem(ctx, v1307);
-                                let v1311 = constructor_x64_subpd(ctx, v1309, v1310);
-                                let v1312 = &C::xmm_to_xmm_mem(ctx, v1309);
-                                let v1313 =
-                                    constructor_x64_cmppd(ctx, v1309, v1312, &FcmpImm::Unordered);
-                                let v1314 = &C::xmi_imm(ctx, 0xD);
-                                let v1315 = constructor_x64_psrlq(ctx, v1313, v1314);
-                                let v1316 = &C::xmm_to_xmm_mem(ctx, v1311);
-                                let v1317 = constructor_x64_andnpd(ctx, v1315, v1316);
-                                let v1318 = constructor_output_xmm(ctx, v1317);
-                                // Rule at src/isa/x64/lower.isle line 2636.
-                                return Some(v1318);
-                            }
-                            _ => {}
-                        }
-                    }
-                }
-                &Opcode::FmaxPseudo => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            F32 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v1180 = constructor_put_in_xmm(ctx, v38.1);
-                                let v178 = &C::put_in_xmm_mem(ctx, v38.0);
-                                let v1327 = constructor_x64_maxss(ctx, v1180, v178);
-                                let v1328 = constructor_output_xmm(ctx, v1327);
-                                // Rule at src/isa/x64/lower.isle line 2693.
-                                return Some(v1328);
-                            }
-                            F64 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v1180 = constructor_put_in_xmm(ctx, v38.1);
-                                let v178 = &C::put_in_xmm_mem(ctx, v38.0);
-                                let v1329 = constructor_x64_maxsd(ctx, v1180, v178);
-                                let v1330 = constructor_output_xmm(ctx, v1329);
-                                // Rule at src/isa/x64/lower.isle line 2695.
-                                return Some(v1330);
-                            }
-                            F32X4 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v1180 = constructor_put_in_xmm(ctx, v38.1);
-                                let v178 = &C::put_in_xmm_mem(ctx, v38.0);
-                                let v1331 = constructor_x64_maxps(ctx, v1180, v178);
-                                let v1332 = constructor_output_xmm(ctx, v1331);
-                                // Rule at src/isa/x64/lower.isle line 2697.
-                                return Some(v1332);
-                            }
-                            F64X2 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v1180 = constructor_put_in_xmm(ctx, v38.1);
-                                let v178 = &C::put_in_xmm_mem(ctx, v38.0);
-                                let v1333 = constructor_x64_maxpd(ctx, v1180, v178);
-                                let v1334 = constructor_output_xmm(ctx, v1333);
-                                // Rule at src/isa/x64/lower.isle line 2699.
-                                return Some(v1334);
-                            }
-                            _ => {}
-                        }
-                    }
-                }
-                &Opcode::Snarrow => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            I8X16 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v2000 = C::value_type(ctx, v38.0);
-                                if v2000 == I16X8 {
-                                    let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                    let v69 = &C::put_in_xmm_mem(ctx, v38.1);
-                                    let v2001 = constructor_x64_packsswb(ctx, v68, v69);
-                                    let v2002 = constructor_output_xmm(ctx, v2001);
-                                    // Rule at src/isa/x64/lower.isle line 3733.
-                                    return Some(v2002);
-                                }
-                            }
-                            I16X8 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v2000 = C::value_type(ctx, v38.0);
-                                if v2000 == I32X4 {
-                                    let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                    let v69 = &C::put_in_xmm_mem(ctx, v38.1);
-                                    let v2003 = constructor_x64_packssdw(ctx, v68, v69);
-                                    let v2004 = constructor_output_xmm(ctx, v2003);
-                                    // Rule at src/isa/x64/lower.isle line 3736.
-                                    return Some(v2004);
-                                }
-                            }
-                            I32X4 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v172 = C::def_inst(ctx, v38.1);
-                                if let Some(v173) = v172 {
-                                    let v174 = &C::inst_data(ctx, v173);
-                                    if let &InstructionData::UnaryConst {
-                                        opcode: ref v2008,
-                                        constant_handle: v2009,
-                                    } = v174
-                                    {
-                                        if let &Opcode::Vconst = v2008 {
-                                            let v181 = C::def_inst(ctx, v38.0);
-                                            if let Some(v182) = v181 {
-                                                let v183 = &C::inst_data(ctx, v182);
-                                                if let &InstructionData::Unary {
-                                                    opcode: ref v184,
-                                                    arg: v185,
-                                                } = v183
-                                                {
-                                                    match v184 {
-                                                        &Opcode::FcvtToSintSat => {
-                                                            let v2005 = C::first_result(ctx, v182);
-                                                            if let Some(v2006) = v2005 {
-                                                                let v2007 =
-                                                                    C::value_type(ctx, v2006);
-                                                                if v2007 == I64X2 {
-                                                                    let v2010 =
-                                                                        C::u128_from_constant(
-                                                                            ctx, v2009,
-                                                                        );
-                                                                    if let Some(v2011) = v2010 {
-                                                                        if v2011 == 0x0 {
-                                                                            let v186 = constructor_put_in_xmm(ctx, v185);
-                                                                            let v2012 =
-                                                                                &C::xmm_to_xmm_mem(
-                                                                                    ctx, v186,
-                                                                                );
-                                                                            let v2013 = constructor_x64_cmppd(ctx, v186, v2012, &FcmpImm::Equal);
-                                                                            let v2015 = C::emit_u128_le_const(ctx, 0x41DFFFFFFFC0000041DFFFFFFFC00000);
-                                                                            let v2016 = &constructor_const_to_xmm_mem(ctx, v2015);
-                                                                            let v2017 = constructor_x64_andps(ctx, v2013, v2016);
-                                                                            let v2018 =
-                                                                                &C::xmm_to_xmm_mem(
-                                                                                    ctx, v2017,
-                                                                                );
-                                                                            let v2019 = constructor_x64_minpd(ctx, v186, v2018);
-                                                                            let v2020 =
-                                                                                &C::xmm_to_xmm_mem(
-                                                                                    ctx, v2019,
-                                                                                );
-                                                                            let v2021 = constructor_x64_cvttpd2dq(ctx, v2020);
-                                                                            let v2022 = constructor_output_xmm(ctx, v2021);
-                                                                            // Rule at src/isa/x64/lower.isle line 3745.
-                                                                            return Some(v2022);
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                        &Opcode::X86Cvtt2dq => {
-                                                            let v2005 = C::first_result(ctx, v182);
-                                                            if let Some(v2006) = v2005 {
-                                                                let v2007 =
-                                                                    C::value_type(ctx, v2006);
-                                                                if v2007 == I64X2 {
-                                                                    let v2010 =
-                                                                        C::u128_from_constant(
-                                                                            ctx, v2009,
-                                                                        );
-                                                                    if let Some(v2011) = v2010 {
-                                                                        if v2011 == 0x0 {
-                                                                            let v494 =
-                                                                                &C::put_in_xmm_mem(
-                                                                                    ctx, v185,
-                                                                                );
-                                                                            let v2023 = constructor_x64_cvttpd2dq(ctx, v494);
-                                                                            let v2024 = constructor_output_xmm(ctx, v2023);
-                                                                            // Rule at src/isa/x64/lower.isle line 3769.
-                                                                            return Some(v2024);
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                        _ => {}
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                            }
-                            _ => {}
-                        }
-                    }
-                }
-                &Opcode::Unarrow => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            I8X16 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v2000 = C::value_type(ctx, v38.0);
-                                if v2000 == I16X8 {
-                                    let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                    let v69 = &C::put_in_xmm_mem(ctx, v38.1);
-                                    let v2025 = constructor_x64_packuswb(ctx, v68, v69);
-                                    let v2026 = constructor_output_xmm(ctx, v2025);
-                                    // Rule at src/isa/x64/lower.isle line 3775.
-                                    return Some(v2026);
-                                }
-                            }
-                            I16X8 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v2000 = C::value_type(ctx, v38.0);
-                                if v2000 == I32X4 {
-                                    let v436 = C::use_sse41(ctx);
-                                    if v436 == true {
-                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
-                                        let v2027 = constructor_x64_packusdw(ctx, v68, v69);
-                                        let v2028 = constructor_output_xmm(ctx, v2027);
-                                        // Rule at src/isa/x64/lower.isle line 3778.
-                                        return Some(v2028);
-                                    }
-                                    let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                    let v2029 =
-                                        constructor_unarrow_i32x4_lanes_to_low_u16_lanes(ctx, v68);
-                                    let v2030 = constructor_put_in_xmm(ctx, v38.1);
-                                    let v2031 = constructor_unarrow_i32x4_lanes_to_low_u16_lanes(
-                                        ctx, v2030,
-                                    );
-                                    let v2032 = &C::xmm_to_xmm_mem(ctx, v2031);
-                                    let v2033 = constructor_x64_punpcklqdq(ctx, v2029, v2032);
-                                    let v2034 = constructor_output_xmm(ctx, v2033);
-                                    // Rule at src/isa/x64/lower.isle line 3788.
-                                    return Some(v2034);
-                                }
-                            }
-                            _ => {}
-                        }
-                    }
-                }
-                &Opcode::Uunarrow => {
-                    let v38 = C::unpack_value_array_2(ctx, v37);
-                    let v172 = C::def_inst(ctx, v38.1);
-                    if let Some(v173) = v172 {
-                        let v174 = &C::inst_data(ctx, v173);
-                        if let &InstructionData::UnaryConst {
-                            opcode: ref v2008,
-                            constant_handle: v2009,
-                        } = v174
-                        {
-                            if let &Opcode::Vconst = v2008 {
-                                let v181 = C::def_inst(ctx, v38.0);
-                                if let Some(v182) = v181 {
-                                    let v183 = &C::inst_data(ctx, v182);
-                                    if let &InstructionData::Unary {
-                                        opcode: ref v184,
-                                        arg: v185,
-                                    } = v183
-                                    {
-                                        if let &Opcode::FcvtToUintSat = v184 {
-                                            let v476 = C::value_type(ctx, v185);
-                                            if v476 == F64X2 {
-                                                let v2010 = C::u128_from_constant(ctx, v2009);
-                                                if let Some(v2011) = v2010 {
-                                                    if v2011 == 0x0 {
-                                                        let v186 =
-                                                            constructor_put_in_xmm(ctx, v185);
-                                                        let v2494 =
-                                                            constructor_xmm_zero(ctx, F64X2);
-                                                        let v2495 = &C::xmm_to_xmm_mem(ctx, v2494);
-                                                        let v2496 =
-                                                            constructor_x64_maxpd(ctx, v186, v2495);
-                                                        let v2498 = C::emit_u128_le_const(
-                                                            ctx,
-                                                            0x41EFFFFFFFE0000041EFFFFFFFE00000,
-                                                        );
-                                                        let v2499 = &constructor_const_to_xmm_mem(
-                                                            ctx, v2498,
-                                                        );
-                                                        let v2500 = constructor_x64_minpd(
-                                                            ctx, v2496, v2499,
-                                                        );
-                                                        let v2501 = C::xmm_to_reg(ctx, v2500);
-                                                        let v2502 =
-                                                            &constructor_xmm_to_reg_mem(ctx, v2501);
-                                                        let v2503 =
-                                                            &C::xmm_mem_to_reg_mem(ctx, v2502);
-                                                        let v2504 = constructor_x64_round(
-                                                            ctx,
-                                                            F64X2,
-                                                            v2503,
-                                                            &RoundImm::RoundZero,
-                                                        );
-                                                        let v2505 = C::emit_u128_le_const(
-                                                            ctx,
-                                                            0x43300000000000004330000000000000,
-                                                        );
-                                                        let v2506 = &constructor_const_to_xmm_mem(
-                                                            ctx, v2505,
-                                                        );
-                                                        let v2507 = constructor_x64_addpd(
-                                                            ctx, v2504, v2506,
-                                                        );
-                                                        let v2508 = &C::xmm_to_xmm_mem(ctx, v2494);
-                                                        let v2509 = constructor_x64_shufps(
-                                                            ctx, v2507, v2508, 0x88,
-                                                        );
-                                                        let v2510 =
-                                                            constructor_output_xmm(ctx, v2509);
-                                                        // Rule at src/isa/x64/lower.isle line 4622.
-                                                        return Some(v2510);
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                            }
-                        }
-                    }
-                }
-                &Opcode::IaddPairwise => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            I8X16 => {
-                                let v1850 =
-                                    C::emit_u128_le_const(ctx, 0xFF00FF00FF00FF00FF00FF00FF00FF);
-                                let v1851 = &constructor_const_to_xmm_mem(ctx, v1850);
-                                let v1852 = constructor_x64_movdqu_load(ctx, v1851);
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v1853 = constructor_put_in_xmm(ctx, v38.0);
-                                let v1854 = &C::xmm_to_xmm_mem(ctx, v1852);
-                                let v1855 = constructor_x64_pand(ctx, v1853, v1854);
-                                let v1856 = constructor_put_in_xmm(ctx, v38.1);
-                                let v1857 = &C::xmm_to_xmm_mem(ctx, v1852);
-                                let v1858 = constructor_x64_pand(ctx, v1856, v1857);
-                                let v1859 = &C::xmm_to_xmm_mem(ctx, v1858);
-                                let v1860 = constructor_x64_packuswb(ctx, v1855, v1859);
-                                let v1861 = constructor_put_in_xmm(ctx, v38.0);
-                                let v1862 = &C::xmi_imm(ctx, 0x8);
-                                let v1863 = constructor_x64_psrlw(ctx, v1861, v1862);
-                                let v1864 = constructor_put_in_xmm(ctx, v38.1);
-                                let v1865 = &C::xmi_imm(ctx, 0x8);
-                                let v1866 = constructor_x64_psrlw(ctx, v1864, v1865);
-                                let v1867 = &C::xmm_to_xmm_mem(ctx, v1866);
-                                let v1868 = constructor_x64_packuswb(ctx, v1863, v1867);
-                                let v1869 = &C::xmm_to_xmm_mem(ctx, v1868);
-                                let v1870 = constructor_x64_paddb(ctx, v1860, v1869);
-                                let v1871 = constructor_output_xmm(ctx, v1870);
-                                // Rule at src/isa/x64/lower.isle line 3522.
-                                return Some(v1871);
-                            }
-                            I16X8 => {
-                                let v520 = C::use_ssse3(ctx);
-                                if v520 == true {
-                                    let v38 = C::unpack_value_array_2(ctx, v37);
-                                    let v172 = C::def_inst(ctx, v38.1);
-                                    if let Some(v173) = v172 {
-                                        let v174 = &C::inst_data(ctx, v173);
-                                        if let &InstructionData::Unary {
-                                            opcode: ref v175,
-                                            arg: v176,
-                                        } = v174
-                                        {
-                                            match v175 {
-                                                &Opcode::SwidenHigh => {
-                                                    let v181 = C::def_inst(ctx, v38.0);
-                                                    if let Some(v182) = v181 {
-                                                        let v183 = &C::inst_data(ctx, v182);
-                                                        if let &InstructionData::Unary {
-                                                            opcode: ref v184,
-                                                            arg: v185,
-                                                        } = v183
-                                                        {
-                                                            if let &Opcode::SwidenLow = v184 {
-                                                                if v176 == v185 {
-                                                                    let v476 =
-                                                                        C::value_type(ctx, v185);
-                                                                    if v476 == I8X16 {
-                                                                        let v1908 = C::emit_u128_le_const(ctx, 0x1010101010101010101010101010101);
-                                                                        let v1909 = constructor_x64_xmm_load_const(ctx, I8X16, v1908);
-                                                                        let v1910 =
-                                                                            &C::put_in_xmm_mem(
-                                                                                ctx, v185,
-                                                                            );
-                                                                        let v1911 = constructor_x64_pmaddubsw(ctx, v1909, v1910);
-                                                                        let v1912 =
-                                                                            constructor_output_xmm(
-                                                                                ctx, v1911,
-                                                                            );
-                                                                        // Rule at src/isa/x64/lower.isle line 3584.
-                                                                        return Some(v1912);
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                                &Opcode::UwidenHigh => {
-                                                    let v181 = C::def_inst(ctx, v38.0);
-                                                    if let Some(v182) = v181 {
-                                                        let v183 = &C::inst_data(ctx, v182);
-                                                        if let &InstructionData::Unary {
-                                                            opcode: ref v184,
-                                                            arg: v185,
-                                                        } = v183
-                                                        {
-                                                            if let &Opcode::UwidenLow = v184 {
-                                                                if v176 == v185 {
-                                                                    let v476 =
-                                                                        C::value_type(ctx, v185);
-                                                                    if v476 == I8X16 {
-                                                                        let v1908 = C::emit_u128_le_const(ctx, 0x1010101010101010101010101010101);
-                                                                        let v1919 = &constructor_const_to_xmm_mem(ctx, v1908);
-                                                                        let v1916 =
-                                                                            constructor_put_in_xmm(
-                                                                                ctx, v185,
-                                                                            );
-                                                                        let v1920 = constructor_x64_pmaddubsw(ctx, v1916, v1919);
-                                                                        let v1921 =
-                                                                            constructor_output_xmm(
-                                                                                ctx, v1920,
-                                                                            );
-                                                                        // Rule at src/isa/x64/lower.isle line 3602.
-                                                                        return Some(v1921);
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                                _ => {}
-                                            }
-                                        }
-                                    }
-                                    let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                    let v69 = &C::put_in_xmm_mem(ctx, v38.1);
-                                    let v1872 = constructor_x64_phaddw(ctx, v68, v69);
-                                    let v1873 = constructor_output_xmm(ctx, v1872);
-                                    // Rule at src/isa/x64/lower.isle line 3538.
-                                    return Some(v1873);
-                                }
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                let v439 = constructor_put_in_xmm(ctx, v38.1);
-                                let v312 = &C::xmm_to_xmm_mem(ctx, v68);
-                                let v1875 = constructor_x64_pshuflw(ctx, v312, 0xE8);
-                                let v1876 = &C::xmm_to_xmm_mem(ctx, v1875);
-                                let v1877 = constructor_x64_pshufhw(ctx, v1876, 0xE8);
-                                let v1878 = &C::xmm_to_xmm_mem(ctx, v1877);
-                                let v1879 = constructor_x64_pshufd(ctx, v1878, 0xE8);
-                                let v1880 = &C::xmm_to_xmm_mem(ctx, v439);
-                                let v1881 = constructor_x64_pshuflw(ctx, v1880, 0xE8);
-                                let v1882 = &C::xmm_to_xmm_mem(ctx, v1881);
-                                let v1883 = constructor_x64_pshufhw(ctx, v1882, 0xE8);
-                                let v1884 = &C::xmm_to_xmm_mem(ctx, v1883);
-                                let v1885 = constructor_x64_pshufd(ctx, v1884, 0xE8);
-                                let v1886 = &C::xmm_to_xmm_mem(ctx, v1885);
-                                let v1887 = constructor_x64_punpcklqdq(ctx, v1879, v1886);
-                                let v1888 = &C::xmi_imm(ctx, 0x10);
-                                let v1889 = constructor_x64_psrad(ctx, v68, v1888);
-                                let v1890 = &C::xmi_imm(ctx, 0x10);
-                                let v1891 = constructor_x64_psrad(ctx, v439, v1890);
-                                let v1892 = &C::xmm_to_xmm_mem(ctx, v1891);
-                                let v1893 = constructor_x64_packssdw(ctx, v1889, v1892);
-                                let v1894 = &C::xmm_to_xmm_mem(ctx, v1893);
-                                let v1895 = constructor_x64_paddw(ctx, v1887, v1894);
-                                let v1896 = constructor_output_xmm(ctx, v1895);
-                                // Rule at src/isa/x64/lower.isle line 3542.
-                                return Some(v1896);
-                            }
-                            I32X4 => {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v172 = C::def_inst(ctx, v38.1);
-                                if let Some(v173) = v172 {
-                                    let v174 = &C::inst_data(ctx, v173);
-                                    match v174 {
-                                        &InstructionData::Binary {
-                                            opcode: ref v212,
-                                            args: ref v213,
-                                        } => {
-                                            if let &Opcode::Imul = v212 {
-                                                let v181 = C::def_inst(ctx, v38.0);
-                                                if let Some(v182) = v181 {
-                                                    let v183 = &C::inst_data(ctx, v182);
-                                                    if let &InstructionData::Binary {
-                                                        opcode: ref v198,
-                                                        args: ref v199,
-                                                    } = v183
-                                                    {
-                                                        if let &Opcode::Imul = v198 {
-                                                            let v200 =
-                                                                C::unpack_value_array_2(ctx, v199);
-                                                            let v203 = C::def_inst(ctx, v200.1);
-                                                            if let Some(v204) = v203 {
-                                                                let v205 = &C::inst_data(ctx, v204);
-                                                                if let &InstructionData::Unary {
-                                                                    opcode: ref v1939,
-                                                                    arg: v1940,
-                                                                } = v205
-                                                                {
-                                                                    if let &Opcode::SwidenLow =
-                                                                        v1939
-                                                                    {
-                                                                        let v214 =
-                                                                            C::unpack_value_array_2(
-                                                                                ctx, v213,
-                                                                            );
-                                                                        let v217 = C::def_inst(
-                                                                            ctx, v214.1,
-                                                                        );
-                                                                        if let Some(v218) = v217 {
-                                                                            let v219 =
-                                                                                &C::inst_data(
-                                                                                    ctx, v218,
-                                                                                );
-                                                                            if let &InstructionData::Unary {
-                                                                                opcode: ref v1946,
-                                                                                arg: v1947,
-                                                                            } = v219 {
-                                                                                if let &Opcode::SwidenHigh = v1946 {
-                                                                                    if v1940 == v1947 {
-                                                                                        let v1934 = C::def_inst(ctx, v200.0);
-                                                                                        if let Some(v1935) = v1934 {
-                                                                                            let v1936 = &C::inst_data(ctx, v1935);
-                                                                                            if let &InstructionData::Unary {
-                                                                                                opcode: ref v1937,
-                                                                                                arg: v1938,
-                                                                                            } = v1936 {
-                                                                                                if let &Opcode::SwidenLow = v1937 {
-                                                                                                    let v1941 = C::def_inst(ctx, v214.0);
-                                                                                                    if let Some(v1942) = v1941 {
-                                                                                                        let v1943 = &C::inst_data(ctx, v1942);
-                                                                                                        if let &InstructionData::Unary {
-                                                                                                            opcode: ref v1944,
-                                                                                                            arg: v1945,
-                                                                                                        } = v1943 {
-                                                                                                            if let &Opcode::SwidenHigh = v1944 {
-                                                                                                                if v1938 == v1945 {
-                                                                                                                    let v1948 = constructor_put_in_xmm(ctx, v1938);
-                                                                                                                    let v1949 = &C::put_in_xmm_mem(ctx, v1940);
-                                                                                                                    let v1950 = constructor_x64_pmaddwd(ctx, v1948, v1949);
-                                                                                                                    let v1951 = constructor_output_xmm(ctx, v1950);
-                                                                                                                    // Rule at src/isa/x64/lower.isle line 3625.
-                                                                                                                    return Some(v1951);
-                                                                                                                }
-                                                                                                            }
-                                                                                                        }
-                                                                                                    }
-                                                                                                }
-                                                                                            }
-                                                                                        }
-                                                                                    }
-                                                                                }
-                                                                            }
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                        &InstructionData::Unary {
-                                            opcode: ref v175,
-                                            arg: v176,
-                                        } => {
-                                            match v175 {
-                                                &Opcode::SwidenHigh => {
-                                                    let v181 = C::def_inst(ctx, v38.0);
-                                                    if let Some(v182) = v181 {
-                                                        let v183 = &C::inst_data(ctx, v182);
-                                                        if let &InstructionData::Unary {
-                                                            opcode: ref v184,
-                                                            arg: v185,
-                                                        } = v183
-                                                        {
-                                                            if let &Opcode::SwidenLow = v184 {
-                                                                if v176 == v185 {
-                                                                    let v476 =
-                                                                        C::value_type(ctx, v185);
-                                                                    if v476 == I16X8 {
-                                                                        let v1914 = C::emit_u128_le_const(ctx, 0x10001000100010001000100010001);
-                                                                        let v1915 = &constructor_const_to_xmm_mem(ctx, v1914);
-                                                                        let v1916 =
-                                                                            constructor_put_in_xmm(
-                                                                                ctx, v185,
-                                                                            );
-                                                                        let v1917 =
-                                                                            constructor_x64_pmaddwd(
-                                                                                ctx, v1916, v1915,
-                                                                            );
-                                                                        let v1918 =
-                                                                            constructor_output_xmm(
-                                                                                ctx, v1917,
-                                                                            );
-                                                                        // Rule at src/isa/x64/lower.isle line 3594.
-                                                                        return Some(v1918);
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                                &Opcode::UwidenHigh => {
-                                                    let v181 = C::def_inst(ctx, v38.0);
-                                                    if let Some(v182) = v181 {
-                                                        let v183 = &C::inst_data(ctx, v182);
-                                                        if let &InstructionData::Unary {
-                                                            opcode: ref v184,
-                                                            arg: v185,
-                                                        } = v183
-                                                        {
-                                                            if let &Opcode::UwidenLow = v184 {
-                                                                if v176 == v185 {
-                                                                    let v476 =
-                                                                        C::value_type(ctx, v185);
-                                                                    if v476 == I16X8 {
-                                                                        let v1923 = C::emit_u128_le_const(ctx, 0x80008000800080008000800080008000);
-                                                                        let v1924 = &constructor_const_to_xmm_mem(ctx, v1923);
-                                                                        let v1916 =
-                                                                            constructor_put_in_xmm(
-                                                                                ctx, v185,
-                                                                            );
-                                                                        let v1925 =
-                                                                            constructor_x64_pxor(
-                                                                                ctx, v1916, v1924,
-                                                                            );
-                                                                        let v1926 = C::emit_u128_le_const(ctx, 0x10001000100010001000100010001);
-                                                                        let v1927 = &constructor_const_to_xmm_mem(ctx, v1926);
-                                                                        let v1928 =
-                                                                            constructor_x64_pmaddwd(
-                                                                                ctx, v1925, v1927,
-                                                                            );
-                                                                        let v1930 = C::emit_u128_le_const(ctx, 0x10000000100000001000000010000);
-                                                                        let v1931 = &constructor_const_to_xmm_mem(ctx, v1930);
-                                                                        let v1932 =
-                                                                            constructor_x64_paddd(
-                                                                                ctx, v1928, v1931,
-                                                                            );
-                                                                        let v1933 =
-                                                                            constructor_output_xmm(
-                                                                                ctx, v1932,
-                                                                            );
-                                                                        // Rule at src/isa/x64/lower.isle line 3611.
-                                                                        return Some(v1933);
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                                _ => {}
-                                            }
-                                        }
-                                        _ => {}
-                                    }
-                                }
-                                let v520 = C::use_ssse3(ctx);
-                                if v520 == true {
-                                    let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                    let v69 = &C::put_in_xmm_mem(ctx, v38.1);
-                                    let v1897 = constructor_x64_phaddd(ctx, v68, v69);
-                                    let v1898 = constructor_output_xmm(ctx, v1897);
-                                    // Rule at src/isa/x64/lower.isle line 3568.
-                                    return Some(v1898);
-                                }
-                                let v68 = constructor_put_in_xmm(ctx, v38.0);
-                                let v439 = constructor_put_in_xmm(ctx, v38.1);
-                                let v1899 = &C::xmm_to_xmm_mem(ctx, v439);
-                                let v1901 = constructor_x64_shufps(ctx, v68, v1899, 0x88);
-                                let v442 = &C::xmm_to_xmm_mem(ctx, v439);
-                                let v1903 = constructor_x64_shufps(ctx, v68, v442, 0xDD);
-                                let v1904 = &C::xmm_to_xmm_mem(ctx, v1903);
-                                let v1905 = constructor_x64_paddd(ctx, v1901, v1904);
-                                let v1906 = constructor_output_xmm(ctx, v1905);
-                                // Rule at src/isa/x64/lower.isle line 3572.
-                                return Some(v1906);
-                            }
-                            _ => {}
-                        }
-                    }
-                }
-                &Opcode::X86Pmaddubsw => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        if v3 == I16X8 {
-                            let v520 = C::use_ssse3(ctx);
-                            if v520 == true {
-                                let v38 = C::unpack_value_array_2(ctx, v37);
-                                let v1180 = constructor_put_in_xmm(ctx, v38.1);
-                                let v178 = &C::put_in_xmm_mem(ctx, v38.0);
-                                let v1181 = constructor_x64_pmaddubsw(ctx, v1180, v178);
-                                let v1182 = constructor_output_xmm(ctx, v1181);
-                                // Rule at src/isa/x64/lower.isle line 2415.
-                                return Some(v1182);
-                            }
-                        }
-                    }
-                }
-                &Opcode::Iconcat => {
-                    let v38 = C::unpack_value_array_2(ctx, v37);
-                    let v2000 = C::value_type(ctx, v38.0);
-                    if v2000 == I64 {
-                        let v2447 = C::put_in_reg(ctx, v38.0);
-                        let v2448 = C::put_in_reg(ctx, v38.1);
-                        let v2449 = C::value_regs(ctx, v2447, v2448);
-                        let v2450 = C::output(ctx, v2449);
-                        // Rule at src/isa/x64/lower.isle line 4538.
-                        return Some(v2450);
-                    }
-                }
-                _ => {}
-            }
-        }
-        &InstructionData::BinaryImm8 {
-            opcode: ref v2284,
-            arg: v2285,
-            imm: v2286,
-        } => {
-            if let &Opcode::Extractlane = v2284 {
-                if v2286 == 0x0 {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v162 = C::ty_scalar_float(ctx, v3);
-                        if let Some(v163) = v162 {
-                            let v2287 = constructor_output_value(ctx, v2285);
-                            // Rule at src/isa/x64/lower.isle line 4301.
-                            return Some(v2287);
-                        }
-                    }
-                }
-                let v2288 = C::value_type(ctx, v2285);
-                match v2288 {
-                    I8X16 => {
-                        let v436 = C::use_sse41(ctx);
-                        if v436 == true {
-                            let v2295 = constructor_put_in_xmm(ctx, v2285);
-                            let v2289 = C::u8_from_uimm8(ctx, v2286);
-                            let v2296 = constructor_x64_pextrb(ctx, v2295, v2289);
-                            let v2297 = constructor_output_gpr(ctx, v2296);
-                            // Rule at src/isa/x64/lower.isle line 4316.
-                            return Some(v2297);
-                        }
-                        let v2289 = C::u8_from_uimm8(ctx, v2286);
-                        let v2298 = C::u8_and(ctx, v2289, 0x1);
-                        match v2298 {
-                            0x0 => {
-                                let v2295 = constructor_put_in_xmm(ctx, v2285);
-                                let v2299 = C::u8_shr(ctx, v2289, 0x1);
-                                let v2300 = constructor_x64_pextrw(ctx, v2295, v2299);
-                                let v2304 = constructor_output_gpr(ctx, v2300);
-                                // Rule at src/isa/x64/lower.isle line 4327.
-                                return Some(v2304);
-                            }
-                            0x1 => {
-                                let v2295 = constructor_put_in_xmm(ctx, v2285);
-                                let v2299 = C::u8_shr(ctx, v2289, 0x1);
-                                let v2300 = constructor_x64_pextrw(ctx, v2295, v2299);
-                                let v1135 = Imm8Reg::Imm8 { imm: 0x8 };
-                                let v2301 = &C::imm8_reg_to_imm8_gpr(ctx, &v1135);
-                                let v2302 = constructor_x64_shr(ctx, I16, v2300, v2301);
-                                let v2303 = constructor_output_gpr(ctx, v2302);
-                                // Rule at src/isa/x64/lower.isle line 4320.
-                                return Some(v2303);
-                            }
-                            _ => {}
-                        }
-                    }
-                    I16X8 => {
-                        let v2295 = constructor_put_in_xmm(ctx, v2285);
-                        let v2289 = C::u8_from_uimm8(ctx, v2286);
-                        let v2305 = constructor_x64_pextrw(ctx, v2295, v2289);
-                        let v2306 = constructor_output_gpr(ctx, v2305);
-                        // Rule at src/isa/x64/lower.isle line 4332.
-                        return Some(v2306);
-                    }
-                    I32X4 => {
-                        let v436 = C::use_sse41(ctx);
-                        if v436 == true {
-                            let v2295 = constructor_put_in_xmm(ctx, v2285);
-                            let v2289 = C::u8_from_uimm8(ctx, v2286);
-                            let v2307 = constructor_x64_pextrd(ctx, v2295, v2289);
-                            let v2308 = constructor_output_gpr(ctx, v2307);
-                            // Rule at src/isa/x64/lower.isle line 4336.
-                            return Some(v2308);
-                        }
-                        if v2286 == 0x0 {
-                            let v2295 = constructor_put_in_xmm(ctx, v2285);
-                            let v2309 = constructor_x64_movd_to_gpr(ctx, v2295);
-                            let v2310 = constructor_output_gpr(ctx, v2309);
-                            // Rule at src/isa/x64/lower.isle line 4339.
-                            return Some(v2310);
-                        }
-                        let v2290 = &C::put_in_xmm_mem(ctx, v2285);
-                        let v2289 = C::u8_from_uimm8(ctx, v2286);
-                        let v2291 = constructor_x64_pshufd(ctx, v2290, v2289);
-                        let v2311 = constructor_x64_movd_to_gpr(ctx, v2291);
-                        let v2312 = constructor_output_gpr(ctx, v2311);
-                        // Rule at src/isa/x64/lower.isle line 4341.
-                        return Some(v2312);
-                    }
-                    I64X2 => {
-                        let v436 = C::use_sse41(ctx);
-                        if v436 == true {
-                            let v2295 = constructor_put_in_xmm(ctx, v2285);
-                            let v2289 = C::u8_from_uimm8(ctx, v2286);
-                            let v2313 = constructor_x64_pextrq(ctx, v2295, v2289);
-                            let v2314 = constructor_output_gpr(ctx, v2313);
-                            // Rule at src/isa/x64/lower.isle line 4345.
-                            return Some(v2314);
-                        }
-                        match v2286 {
-                            0x0 => {
-                                let v2295 = constructor_put_in_xmm(ctx, v2285);
-                                let v2315 = constructor_x64_movq_to_gpr(ctx, v2295);
-                                let v2316 = constructor_output_gpr(ctx, v2315);
-                                // Rule at src/isa/x64/lower.isle line 4348.
-                                return Some(v2316);
-                            }
-                            0x1 => {
-                                let v2290 = &C::put_in_xmm_mem(ctx, v2285);
-                                let v2317 = constructor_x64_pshufd(ctx, v2290, 0xE);
-                                let v2318 = constructor_x64_movq_to_gpr(ctx, v2317);
-                                let v2319 = constructor_output_gpr(ctx, v2318);
-                                // Rule at src/isa/x64/lower.isle line 4350.
-                                return Some(v2319);
-                            }
-                            _ => {}
-                        }
-                    }
-                    F32X4 => {
-                        let v2290 = &C::put_in_xmm_mem(ctx, v2285);
-                        let v2289 = C::u8_from_uimm8(ctx, v2286);
-                        let v2291 = constructor_x64_pshufd(ctx, v2290, v2289);
-                        let v2292 = constructor_output_xmm(ctx, v2291);
-                        // Rule at src/isa/x64/lower.isle line 4305.
-                        return Some(v2292);
-                    }
-                    F64X2 => {
-                        if v2286 == 0x1 {
-                            let v2290 = &C::put_in_xmm_mem(ctx, v2285);
-                            let v2293 = constructor_x64_pshufd(ctx, v2290, 0xEE);
-                            let v2294 = constructor_output_xmm(ctx, v2293);
-                            // Rule at src/isa/x64/lower.isle line 4309.
-                            return Some(v2294);
-                        }
-                    }
-                    _ => {}
-                }
-            }
-        }
-        &InstructionData::Call {
-            opcode: ref v1693,
-            args: v1694,
-            func_ref: v1695,
-        } => {
-            match v1693 {
-                &Opcode::Call => {
-                    let v1697 = C::func_ref_data(ctx, v1695);
-                    let v1696 = C::value_list_slice(ctx, v1694);
-                    let v1701 = C::gen_call(ctx, v1697.0, v1697.1, v1697.2, v1696);
-                    // Rule at src/isa/x64/lower.isle line 3185.
-                    return Some(v1701);
-                }
-                &Opcode::ReturnCall => {
-                    let v1697 = C::func_ref_data(ctx, v1695);
-                    let v1696 = C::value_list_slice(ctx, v1694);
-                    let v1711 = C::gen_return_call(ctx, v1697.0, v1697.1, v1697.2, v1696);
-                    // Rule at src/isa/x64/lower.isle line 3193.
-                    return Some(v1711);
-                }
-                _ => {}
-            }
-        }
-        &InstructionData::CallIndirect {
-            opcode: ref v1702,
-            args: v1703,
-            sig_ref: v1704,
-        } => {
-            match v1702 {
-                &Opcode::CallIndirect => {
-                    let v1705 = C::value_list_slice(ctx, v1703);
-                    let v1706 = C::value_slice_unwrap(ctx, v1705);
-                    if let Some(v1707) = v1706 {
-                        let v1710 = C::gen_call_indirect(ctx, v1704, v1707.0, v1707.1);
-                        // Rule at src/isa/x64/lower.isle line 3188.
-                        return Some(v1710);
-                    }
-                }
-                &Opcode::ReturnCallIndirect => {
-                    let v1705 = C::value_list_slice(ctx, v1703);
-                    let v1706 = C::value_slice_unwrap(ctx, v1705);
-                    if let Some(v1707) = v1706 {
-                        let v1712 = C::gen_return_call_indirect(ctx, v1704, v1707.0, v1707.1);
-                        // Rule at src/isa/x64/lower.isle line 3196.
-                        return Some(v1712);
-                    }
-                }
-                _ => {}
-            }
-        }
-        &InstructionData::FloatCompare {
-            opcode: ref v899,
-            args: ref v900,
-            cond: ref v901,
-        } => {
-            if let &Opcode::Fcmp = v899 {
-                match v901 {
-                    &FloatCC::Equal => {
-                        let v902 = C::unpack_value_array_2(ctx, v900);
-                        let v905 = C::value_type(ctx, v902.0);
-                        let v911 = C::ty_vec128(ctx, v905);
-                        if let Some(v912) = v911 {
-                            let v913 = constructor_put_in_xmm(ctx, v902.0);
-                            let v914 = &C::put_in_xmm_mem(ctx, v902.1);
-                            let v916 = constructor_x64_cmpp(ctx, v912, v913, v914, &FcmpImm::Equal);
-                            let v917 = constructor_output_xmm(ctx, v916);
-                            // Rule at src/isa/x64/lower.isle line 1946.
-                            return Some(v917);
-                        }
-                    }
-                    &FloatCC::GreaterThan => {
-                        let v902 = C::unpack_value_array_2(ctx, v900);
-                        let v905 = C::value_type(ctx, v902.0);
-                        let v911 = C::ty_vec128(ctx, v905);
-                        if let Some(v912) = v911 {
-                            let v939 = constructor_put_in_xmm(ctx, v902.1);
-                            let v940 = &C::put_in_xmm_mem(ctx, v902.0);
-                            let v941 =
-                                constructor_x64_cmpp(ctx, v912, v939, v940, &FcmpImm::LessThan);
-                            let v942 = constructor_output_xmm(ctx, v941);
-                            // Rule at src/isa/x64/lower.isle line 1966.
-                            return Some(v942);
-                        }
-                    }
-                    &FloatCC::GreaterThanOrEqual => {
-                        let v902 = C::unpack_value_array_2(ctx, v900);
-                        let v905 = C::value_type(ctx, v902.0);
-                        let v911 = C::ty_vec128(ctx, v905);
-                        if let Some(v912) = v911 {
-                            let v939 = constructor_put_in_xmm(ctx, v902.1);
-                            let v940 = &C::put_in_xmm_mem(ctx, v902.0);
-                            let v943 = constructor_x64_cmpp(
-                                ctx,
-                                v912,
-                                v939,
-                                v940,
-                                &FcmpImm::LessThanOrEqual,
-                            );
-                            let v944 = constructor_output_xmm(ctx, v943);
-                            // Rule at src/isa/x64/lower.isle line 1968.
-                            return Some(v944);
-                        }
-                    }
-                    &FloatCC::LessThan => {
-                        let v902 = C::unpack_value_array_2(ctx, v900);
-                        let v905 = C::value_type(ctx, v902.0);
-                        let v911 = C::ty_vec128(ctx, v905);
-                        if let Some(v912) = v911 {
-                            let v913 = constructor_put_in_xmm(ctx, v902.0);
-                            let v914 = &C::put_in_xmm_mem(ctx, v902.1);
-                            let v922 =
-                                constructor_x64_cmpp(ctx, v912, v913, v914, &FcmpImm::LessThan);
-                            let v923 = constructor_output_xmm(ctx, v922);
-                            // Rule at src/isa/x64/lower.isle line 1950.
-                            return Some(v923);
-                        }
-                    }
-                    &FloatCC::LessThanOrEqual => {
-                        let v902 = C::unpack_value_array_2(ctx, v900);
-                        let v905 = C::value_type(ctx, v902.0);
-                        let v911 = C::ty_vec128(ctx, v905);
-                        if let Some(v912) = v911 {
-                            let v913 = constructor_put_in_xmm(ctx, v902.0);
-                            let v914 = &C::put_in_xmm_mem(ctx, v902.1);
-                            let v925 = constructor_x64_cmpp(
-                                ctx,
-                                v912,
-                                v913,
-                                v914,
-                                &FcmpImm::LessThanOrEqual,
-                            );
-                            let v926 = constructor_output_xmm(ctx, v925);
-                            // Rule at src/isa/x64/lower.isle line 1952.
-                            return Some(v926);
-                        }
-                    }
-                    &FloatCC::NotEqual => {
-                        let v902 = C::unpack_value_array_2(ctx, v900);
-                        let v905 = C::value_type(ctx, v902.0);
-                        let v911 = C::ty_vec128(ctx, v905);
-                        if let Some(v912) = v911 {
-                            let v913 = constructor_put_in_xmm(ctx, v902.0);
-                            let v914 = &C::put_in_xmm_mem(ctx, v902.1);
-                            let v919 =
-                                constructor_x64_cmpp(ctx, v912, v913, v914, &FcmpImm::NotEqual);
-                            let v920 = constructor_output_xmm(ctx, v919);
-                            // Rule at src/isa/x64/lower.isle line 1948.
-                            return Some(v920);
-                        }
-                    }
-                    &FloatCC::Ordered => {
-                        let v902 = C::unpack_value_array_2(ctx, v900);
-                        let v905 = C::value_type(ctx, v902.0);
-                        let v911 = C::ty_vec128(ctx, v905);
-                        if let Some(v912) = v911 {
-                            let v913 = constructor_put_in_xmm(ctx, v902.0);
-                            let v914 = &C::put_in_xmm_mem(ctx, v902.1);
-                            let v928 =
-                                constructor_x64_cmpp(ctx, v912, v913, v914, &FcmpImm::Ordered);
-                            let v929 = constructor_output_xmm(ctx, v928);
-                            // Rule at src/isa/x64/lower.isle line 1954.
-                            return Some(v929);
-                        }
-                    }
-                    &FloatCC::Unordered => {
-                        let v902 = C::unpack_value_array_2(ctx, v900);
-                        let v905 = C::value_type(ctx, v902.0);
-                        let v911 = C::ty_vec128(ctx, v905);
-                        if let Some(v912) = v911 {
-                            let v913 = constructor_put_in_xmm(ctx, v902.0);
-                            let v914 = &C::put_in_xmm_mem(ctx, v902.1);
-                            let v931 =
-                                constructor_x64_cmpp(ctx, v912, v913, v914, &FcmpImm::Unordered);
-                            let v932 = constructor_output_xmm(ctx, v931);
-                            // Rule at src/isa/x64/lower.isle line 1956.
-                            return Some(v932);
-                        }
-                    }
-                    &FloatCC::UnorderedOrGreaterThan => {
-                        let v902 = C::unpack_value_array_2(ctx, v900);
-                        let v905 = C::value_type(ctx, v902.0);
-                        let v911 = C::ty_vec128(ctx, v905);
-                        if let Some(v912) = v911 {
-                            let v913 = constructor_put_in_xmm(ctx, v902.0);
-                            let v914 = &C::put_in_xmm_mem(ctx, v902.1);
-                            let v934 = constructor_x64_cmpp(
-                                ctx,
-                                v912,
-                                v913,
-                                v914,
-                                &FcmpImm::UnorderedOrGreaterThan,
-                            );
-                            let v935 = constructor_output_xmm(ctx, v934);
-                            // Rule at src/isa/x64/lower.isle line 1958.
-                            return Some(v935);
-                        }
-                    }
-                    &FloatCC::UnorderedOrGreaterThanOrEqual => {
-                        let v902 = C::unpack_value_array_2(ctx, v900);
-                        let v905 = C::value_type(ctx, v902.0);
-                        let v911 = C::ty_vec128(ctx, v905);
-                        if let Some(v912) = v911 {
-                            let v913 = constructor_put_in_xmm(ctx, v902.0);
-                            let v914 = &C::put_in_xmm_mem(ctx, v902.1);
-                            let v937 = constructor_x64_cmpp(
-                                ctx,
-                                v912,
-                                v913,
-                                v914,
-                                &FcmpImm::UnorderedOrGreaterThanOrEqual,
-                            );
-                            let v938 = constructor_output_xmm(ctx, v937);
-                            // Rule at src/isa/x64/lower.isle line 1960.
-                            return Some(v938);
-                        }
-                    }
-                    &FloatCC::UnorderedOrLessThan => {
-                        let v902 = C::unpack_value_array_2(ctx, v900);
-                        let v905 = C::value_type(ctx, v902.0);
-                        let v911 = C::ty_vec128(ctx, v905);
-                        if let Some(v912) = v911 {
-                            let v939 = constructor_put_in_xmm(ctx, v902.1);
-                            let v940 = &C::put_in_xmm_mem(ctx, v902.0);
-                            let v945 = constructor_x64_cmpp(
-                                ctx,
-                                v912,
-                                v939,
-                                v940,
-                                &FcmpImm::UnorderedOrGreaterThan,
-                            );
-                            let v946 = constructor_output_xmm(ctx, v945);
-                            // Rule at src/isa/x64/lower.isle line 1970.
-                            return Some(v946);
-                        }
-                    }
-                    &FloatCC::UnorderedOrLessThanOrEqual => {
-                        let v902 = C::unpack_value_array_2(ctx, v900);
-                        let v905 = C::value_type(ctx, v902.0);
-                        let v911 = C::ty_vec128(ctx, v905);
-                        if let Some(v912) = v911 {
-                            let v939 = constructor_put_in_xmm(ctx, v902.1);
-                            let v940 = &C::put_in_xmm_mem(ctx, v902.0);
-                            let v947 = constructor_x64_cmpp(
-                                ctx,
-                                v912,
-                                v939,
-                                v940,
-                                &FcmpImm::UnorderedOrGreaterThanOrEqual,
-                            );
-                            let v948 = constructor_output_xmm(ctx, v947);
-                            // Rule at src/isa/x64/lower.isle line 1972.
-                            return Some(v948);
-                        }
-                    }
-                    _ => {}
-                }
-                let v902 = C::unpack_value_array_2(ctx, v900);
-                let v905 = C::value_type(ctx, v902.0);
-                let v906 = C::ty_scalar_float(ctx, v905);
-                if let Some(v907) = v906 {
-                    let v908 = &constructor_emit_fcmp(ctx, v901, v902.0, v902.1);
-                    let v909 = constructor_lower_fcmp_bool(ctx, v908);
-                    let v910 = C::output(ctx, v909);
-                    // Rule at src/isa/x64/lower.isle line 1939.
-                    return Some(v910);
-                }
-            }
-        }
-        &InstructionData::FuncAddr {
-            opcode: ref v1617,
-            func_ref: v1618,
-        } => {
-            if let &Opcode::FuncAddr = v1617 {
-                let v1619 = C::func_ref_data(ctx, v1618);
-                let v1624 = constructor_load_ext_name(ctx, v1619.1, 0x0, v1619.2);
-                let v1625 = constructor_output_reg(ctx, v1624);
-                // Rule at src/isa/x64/lower.isle line 3127.
-                return Some(v1625);
-            }
-        }
-        &InstructionData::IntAddTrap {
-            opcode: ref v733,
-            args: ref v734,
-            code: ref v735,
-        } => {
-            if let &Opcode::UaddOverflowTrap = v733 {
-                let v1 = C::first_result(ctx, arg0);
-                if let Some(v2) = v1 {
-                    let v3 = C::value_type(ctx, v2);
-                    let v4 = C::fits_in_64(ctx, v3);
-                    if let Some(v5) = v4 {
-                        let v736 = C::unpack_value_array_2(ctx, v734);
-                        let v752 = &C::sinkable_load(ctx, v736.0);
-                        if let Some(v753) = v752 {
-                            let v747 = constructor_put_in_gpr(ctx, v736.1);
-                            let v754 = &constructor_sink_load_to_gpr_mem_imm(ctx, v753);
-                            let v755 = &constructor_x64_add_with_flags_paired(ctx, v5, v747, v754);
-                            let v742 = &constructor_trap_if(ctx, &CC::B, v735);
-                            let v756 = constructor_with_flags(ctx, v755, v742);
-                            let v757 = C::output(ctx, v756);
-                            // Rule at src/isa/x64/lower.isle line 1727.
-                            return Some(v757);
-                        }
-                        let v745 = &C::simm32_from_value(ctx, v736.0);
-                        if let Some(v746) = v745 {
-                            let v747 = constructor_put_in_gpr(ctx, v736.1);
-                            let v748 = &constructor_x64_add_with_flags_paired(ctx, v5, v747, v746);
-                            let v749 = &constructor_trap_if(ctx, &CC::B, v735);
-                            let v750 = constructor_with_flags(ctx, v748, v749);
-                            let v751 = C::output(ctx, v750);
-                            // Rule at src/isa/x64/lower.isle line 1721.
-                            return Some(v751);
-                        }
-                        let v739 = constructor_put_in_gpr(ctx, v736.0);
-                        let v740 = &constructor_put_in_gpr_mem_imm(ctx, v736.1);
-                        let v741 = &constructor_x64_add_with_flags_paired(ctx, v5, v739, v740);
-                        let v742 = &constructor_trap_if(ctx, &CC::B, v735);
-                        let v743 = constructor_with_flags(ctx, v741, v742);
-                        let v744 = C::output(ctx, v743);
-                        // Rule at src/isa/x64/lower.isle line 1713.
-                        return Some(v744);
-                    }
-                }
-            }
-        }
-        &InstructionData::IntCompare {
-            opcode: ref v762,
-            args: ref v763,
-            cond: ref v764,
-        } => {
-            if let &Opcode::Icmp = v762 {
-                match v764 {
-                    &IntCC::Equal => {
-                        let v765 = C::unpack_value_array_2(ctx, v763);
-                        let v768 = C::value_type(ctx, v765.0);
-                        let v816 = C::ty_vec128(ctx, v768);
-                        if let Some(v817) = v816 {
-                            let v818 = constructor_put_in_xmm(ctx, v765.0);
-                            let v819 = &C::put_in_xmm_mem(ctx, v765.1);
-                            let v820 = constructor_x64_pcmpeq(ctx, v817, v818, v819);
-                            let v821 = constructor_output_xmm(ctx, v820);
-                            // Rule at src/isa/x64/lower.isle line 1789.
-                            return Some(v821);
-                        }
-                    }
-                    &IntCC::NotEqual => {
-                        let v765 = C::unpack_value_array_2(ctx, v763);
-                        let v768 = C::value_type(ctx, v765.0);
-                        let v816 = C::ty_vec128(ctx, v768);
-                        if let Some(v817) = v816 {
-                            let v818 = constructor_put_in_xmm(ctx, v765.0);
-                            let v819 = &C::put_in_xmm_mem(ctx, v765.1);
-                            let v820 = constructor_x64_pcmpeq(ctx, v817, v818, v819);
-                            let v822 = constructor_vector_all_ones(ctx);
-                            let v823 = &C::xmm_to_xmm_mem(ctx, v822);
-                            let v824 = constructor_x64_pxor(ctx, v820, v823);
-                            let v825 = constructor_output_xmm(ctx, v824);
-                            // Rule at src/isa/x64/lower.isle line 1794.
-                            return Some(v825);
-                        }
-                    }
-                    &IntCC::SignedGreaterThan => {
-                        let v1 = C::first_result(ctx, arg0);
-                        if let Some(v2) = v1 {
-                            let v3 = C::value_type(ctx, v2);
-                            if v3 == I8 {
-                                let v765 = C::unpack_value_array_2(ctx, v763);
-                                let v786 = C::def_inst(ctx, v765.0);
-                                if let Some(v787) = v786 {
-                                    let v788 = &C::inst_data(ctx, v787);
-                                    if let &InstructionData::UnaryImm {
-                                        opcode: ref v789,
-                                        imm: v790,
-                                    } = v788
-                                    {
-                                        if let &Opcode::Iconst = v789 {
-                                            let v791 = C::u64_from_imm64(ctx, v790);
-                                            if v791 == 0x0 {
-                                                let v792 = C::value_type(ctx, v765.1);
-                                                match v792 {
-                                                    I32 => {
-                                                        let v793 =
-                                                            constructor_put_in_gpr(ctx, v765.1);
-                                                        let v805 = Imm8Reg::Imm8 { imm: 0x1F };
-                                                        let v806 =
-                                                            &C::imm8_reg_to_imm8_gpr(ctx, &v805);
-                                                        let v809 = constructor_x64_shr(
-                                                            ctx, I32, v793, v806,
-                                                        );
-                                                        let v810 =
-                                                            constructor_output_gpr(ctx, v809);
-                                                        // Rule at src/isa/x64/lower.isle line 1773.
-                                                        return Some(v810);
-                                                    }
-                                                    I64 => {
-                                                        let v793 =
-                                                            constructor_put_in_gpr(ctx, v765.1);
-                                                        let v782 = Imm8Reg::Imm8 { imm: 0x3F };
-                                                        let v783 =
-                                                            &C::imm8_reg_to_imm8_gpr(ctx, &v782);
-                                                        let v794 = constructor_x64_shr(
-                                                            ctx, I64, v793, v783,
-                                                        );
-                                                        let v795 =
-                                                            constructor_output_gpr(ctx, v794);
-                                                        // Rule at src/isa/x64/lower.isle line 1757.
-                                                        return Some(v795);
-                                                    }
-                                                    _ => {}
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                            }
-                        }
-                        let v765 = C::unpack_value_array_2(ctx, v763);
-                        let v768 = C::value_type(ctx, v765.0);
-                        let v816 = C::ty_vec128(ctx, v768);
-                        if let Some(v817) = v816 {
-                            let v818 = constructor_put_in_xmm(ctx, v765.0);
-                            let v819 = &C::put_in_xmm_mem(ctx, v765.1);
-                            let v826 = constructor_x64_pcmpgt(ctx, v817, v818, v819);
-                            let v827 = constructor_output_xmm(ctx, v826);
-                            // Rule at src/isa/x64/lower.isle line 1801.
-                            return Some(v827);
-                        }
-                    }
-                    &IntCC::SignedGreaterThanOrEqual => {
-                        let v1 = C::first_result(ctx, arg0);
-                        if let Some(v2) = v1 {
-                            let v3 = C::value_type(ctx, v2);
-                            if v3 == I8 {
-                                let v765 = C::unpack_value_array_2(ctx, v763);
-                                let v768 = C::value_type(ctx, v765.0);
-                                match v768 {
-                                    I32 => {
-                                        let v774 = C::def_inst(ctx, v765.1);
-                                        if let Some(v775) = v774 {
-                                            let v776 = &C::inst_data(ctx, v775);
-                                            if let &InstructionData::UnaryImm {
-                                                opcode: ref v777,
-                                                imm: v778,
-                                            } = v776
-                                            {
-                                                if let &Opcode::Iconst = v777 {
-                                                    let v779 = C::u64_from_imm64(ctx, v778);
-                                                    if v779 == 0x0 {
-                                                        let v780 =
-                                                            constructor_put_in_gpr(ctx, v765.0);
-                                                        let v800 =
-                                                            constructor_x64_not(ctx, I64, v780);
-                                                        let v805 = Imm8Reg::Imm8 { imm: 0x1F };
-                                                        let v811 =
-                                                            &C::imm8_reg_to_imm8_gpr(ctx, &v805);
-                                                        let v814 = constructor_x64_shr(
-                                                            ctx, I32, v800, v811,
-                                                        );
-                                                        let v815 =
-                                                            constructor_output_gpr(ctx, v814);
-                                                        // Rule at src/isa/x64/lower.isle line 1781.
-                                                        return Some(v815);
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                    I64 => {
-                                        let v774 = C::def_inst(ctx, v765.1);
-                                        if let Some(v775) = v774 {
-                                            let v776 = &C::inst_data(ctx, v775);
-                                            if let &InstructionData::UnaryImm {
-                                                opcode: ref v777,
-                                                imm: v778,
-                                            } = v776
-                                            {
-                                                if let &Opcode::Iconst = v777 {
-                                                    let v779 = C::u64_from_imm64(ctx, v778);
-                                                    if v779 == 0x0 {
-                                                        let v780 =
-                                                            constructor_put_in_gpr(ctx, v765.0);
-                                                        let v800 =
-                                                            constructor_x64_not(ctx, I64, v780);
-                                                        let v782 = Imm8Reg::Imm8 { imm: 0x3F };
-                                                        let v797 =
-                                                            &C::imm8_reg_to_imm8_gpr(ctx, &v782);
-                                                        let v801 = constructor_x64_shr(
-                                                            ctx, I64, v800, v797,
-                                                        );
-                                                        let v802 =
-                                                            constructor_output_gpr(ctx, v801);
-                                                        // Rule at src/isa/x64/lower.isle line 1765.
-                                                        return Some(v802);
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                    _ => {}
-                                }
-                            }
-                        }
-                        let v765 = C::unpack_value_array_2(ctx, v763);
-                        let v768 = C::value_type(ctx, v765.0);
-                        let v816 = C::ty_vec128(ctx, v768);
-                        if let Some(v817) = v816 {
-                            let v860 = constructor_has_pmaxs(ctx, v817);
-                            if v860 == true {
-                                let v818 = constructor_put_in_xmm(ctx, v765.0);
-                                let v843 = constructor_put_in_xmm(ctx, v765.0);
-                                let v861 = &C::put_in_xmm_mem(ctx, v765.1);
-                                let v862 = constructor_x64_pmaxs(ctx, v817, v843, v861);
-                                let v863 = &C::xmm_to_xmm_mem(ctx, v862);
-                                let v864 = constructor_x64_pcmpeq(ctx, v817, v818, v863);
-                                let v865 = constructor_output_xmm(ctx, v864);
-                                // Rule at src/isa/x64/lower.isle line 1851.
-                                return Some(v865);
-                            }
-                            let v828 = constructor_put_in_xmm(ctx, v765.1);
-                            let v829 = &C::put_in_xmm_mem(ctx, v765.0);
-                            let v830 = constructor_x64_pcmpgt(ctx, v817, v828, v829);
-                            let v822 = constructor_vector_all_ones(ctx);
-                            let v823 = &C::xmm_to_xmm_mem(ctx, v822);
-                            let v866 = constructor_x64_pxor(ctx, v830, v823);
-                            let v867 = constructor_output_xmm(ctx, v866);
-                            // Rule at src/isa/x64/lower.isle line 1857.
-                            return Some(v867);
-                        }
-                    }
-                    &IntCC::SignedLessThan => {
-                        let v1 = C::first_result(ctx, arg0);
-                        if let Some(v2) = v1 {
-                            let v3 = C::value_type(ctx, v2);
-                            if v3 == I8 {
-                                let v765 = C::unpack_value_array_2(ctx, v763);
-                                let v768 = C::value_type(ctx, v765.0);
-                                match v768 {
-                                    I32 => {
-                                        let v774 = C::def_inst(ctx, v765.1);
-                                        if let Some(v775) = v774 {
-                                            let v776 = &C::inst_data(ctx, v775);
-                                            if let &InstructionData::UnaryImm {
-                                                opcode: ref v777,
-                                                imm: v778,
-                                            } = v776
-                                            {
-                                                if let &Opcode::Iconst = v777 {
-                                                    let v779 = C::u64_from_imm64(ctx, v778);
-                                                    if v779 == 0x0 {
-                                                        let v780 =
-                                                            constructor_put_in_gpr(ctx, v765.0);
-                                                        let v805 = Imm8Reg::Imm8 { imm: 0x1F };
-                                                        let v806 =
-                                                            &C::imm8_reg_to_imm8_gpr(ctx, &v805);
-                                                        let v807 = constructor_x64_shr(
-                                                            ctx, I32, v780, v806,
-                                                        );
-                                                        let v808 =
-                                                            constructor_output_gpr(ctx, v807);
-                                                        // Rule at src/isa/x64/lower.isle line 1769.
-                                                        return Some(v808);
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                    I64 => {
-                                        let v774 = C::def_inst(ctx, v765.1);
-                                        if let Some(v775) = v774 {
-                                            let v776 = &C::inst_data(ctx, v775);
-                                            if let &InstructionData::UnaryImm {
-                                                opcode: ref v777,
-                                                imm: v778,
-                                            } = v776
-                                            {
-                                                if let &Opcode::Iconst = v777 {
-                                                    let v779 = C::u64_from_imm64(ctx, v778);
-                                                    if v779 == 0x0 {
-                                                        let v780 =
-                                                            constructor_put_in_gpr(ctx, v765.0);
-                                                        let v782 = Imm8Reg::Imm8 { imm: 0x3F };
-                                                        let v783 =
-                                                            &C::imm8_reg_to_imm8_gpr(ctx, &v782);
-                                                        let v784 = constructor_x64_shr(
-                                                            ctx, I64, v780, v783,
-                                                        );
-                                                        let v785 =
-                                                            constructor_output_gpr(ctx, v784);
-                                                        // Rule at src/isa/x64/lower.isle line 1753.
-                                                        return Some(v785);
-                                                    }
-                                                }
-                                            }
-                                        }
-                                    }
-                                    _ => {}
-                                }
-                            }
-                        }
-                        let v765 = C::unpack_value_array_2(ctx, v763);
-                        let v768 = C::value_type(ctx, v765.0);
-                        let v816 = C::ty_vec128(ctx, v768);
-                        if let Some(v817) = v816 {
-                            let v828 = constructor_put_in_xmm(ctx, v765.1);
-                            let v829 = &C::put_in_xmm_mem(ctx, v765.0);
-                            let v830 = constructor_x64_pcmpgt(ctx, v817, v828, v829);
-                            let v831 = constructor_output_xmm(ctx, v830);
-                            // Rule at src/isa/x64/lower.isle line 1806.
-                            return Some(v831);
-                        }
-                    }
-                    &IntCC::SignedLessThanOrEqual => {
-                        let v1 = C::first_result(ctx, arg0);
-                        if let Some(v2) = v1 {
-                            let v3 = C::value_type(ctx, v2);
-                            if v3 == I8 {
-                                let v765 = C::unpack_value_array_2(ctx, v763);
-                                let v786 = C::def_inst(ctx, v765.0);
-                                if let Some(v787) = v786 {
-                                    let v788 = &C::inst_data(ctx, v787);
-                                    if let &InstructionData::UnaryImm {
-                                        opcode: ref v789,
-                                        imm: v790,
-                                    } = v788
-                                    {
-                                        if let &Opcode::Iconst = v789 {
-                                            let v791 = C::u64_from_imm64(ctx, v790);
-                                            if v791 == 0x0 {
-                                                let v792 = C::value_type(ctx, v765.1);
-                                                match v792 {
-                                                    I32 => {
-                                                        let v793 =
-                                                            constructor_put_in_gpr(ctx, v765.1);
-                                                        let v796 =
-                                                            constructor_x64_not(ctx, I64, v793);
-                                                        let v805 = Imm8Reg::Imm8 { imm: 0x1F };
-                                                        let v811 =
-                                                            &C::imm8_reg_to_imm8_gpr(ctx, &v805);
-                                                        let v812 = constructor_x64_shr(
-                                                            ctx, I32, v796, v811,
-                                                        );
-                                                        let v813 =
-                                                            constructor_output_gpr(ctx, v812);
-                                                        // Rule at src/isa/x64/lower.isle line 1777.
-                                                        return Some(v813);
-                                                    }
-                                                    I64 => {
-                                                        let v793 =
-                                                            constructor_put_in_gpr(ctx, v765.1);
-                                                        let v796 =
-                                                            constructor_x64_not(ctx, I64, v793);
-                                                        let v782 = Imm8Reg::Imm8 { imm: 0x3F };
-                                                        let v797 =
-                                                            &C::imm8_reg_to_imm8_gpr(ctx, &v782);
-                                                        let v798 = constructor_x64_shr(
-                                                            ctx, I64, v796, v797,
-                                                        );
-                                                        let v799 =
-                                                            constructor_output_gpr(ctx, v798);
-                                                        // Rule at src/isa/x64/lower.isle line 1761.
-                                                        return Some(v799);
-                                                    }
-                                                    _ => {}
-                                                }
-                                            }
-                                        }
-                                    }
-                                }
-                            }
-                        }
-                        let v765 = C::unpack_value_array_2(ctx, v763);
-                        let v768 = C::value_type(ctx, v765.0);
-                        let v816 = C::ty_vec128(ctx, v768);
-                        if let Some(v817) = v816 {
-                            let v868 = constructor_has_pmins(ctx, v817);
-                            if v868 == true {
-                                let v818 = constructor_put_in_xmm(ctx, v765.0);
-                                let v843 = constructor_put_in_xmm(ctx, v765.0);
-                                let v861 = &C::put_in_xmm_mem(ctx, v765.1);
-                                let v869 = constructor_x64_pmins(ctx, v817, v843, v861);
-                                let v870 = &C::xmm_to_xmm_mem(ctx, v869);
-                                let v871 = constructor_x64_pcmpeq(ctx, v817, v818, v870);
-                                let v872 = constructor_output_xmm(ctx, v871);
-                                // Rule at src/isa/x64/lower.isle line 1863.
-                                return Some(v872);
-                            }
-                            let v818 = constructor_put_in_xmm(ctx, v765.0);
-                            let v819 = &C::put_in_xmm_mem(ctx, v765.1);
-                            let v826 = constructor_x64_pcmpgt(ctx, v817, v818, v819);
-                            let v822 = constructor_vector_all_ones(ctx);
-                            let v823 = &C::xmm_to_xmm_mem(ctx, v822);
-                            let v873 = constructor_x64_pxor(ctx, v826, v823);
-                            let v874 = constructor_output_xmm(ctx, v873);
-                            // Rule at src/isa/x64/lower.isle line 1868.
-                            return Some(v874);
-                        }
-                    }
-                    &IntCC::UnsignedGreaterThan => {
-                        let v765 = C::unpack_value_array_2(ctx, v763);
-                        let v768 = C::value_type(ctx, v765.0);
-                        let v816 = C::ty_vec128(ctx, v768);
-                        if let Some(v817) = v816 {
-                            let v832 = constructor_has_pmaxu(ctx, v817);
-                            if v832 == true {
-                                let v818 = constructor_put_in_xmm(ctx, v765.0);
-                                let v833 = constructor_put_in_xmm(ctx, v765.1);
-                                let v834 = &C::xmm_to_xmm_mem(ctx, v833);
-                                let v835 = constructor_x64_pmaxu(ctx, v817, v818, v834);
-                                let v836 = &C::xmm_to_xmm_mem(ctx, v833);
-                                let v837 = constructor_x64_pcmpeq(ctx, v817, v835, v836);
-                                let v838 = constructor_vector_all_ones(ctx);
-                                let v839 = &C::xmm_to_xmm_mem(ctx, v838);
-                                let v840 = constructor_x64_pxor(ctx, v837, v839);
-                                let v841 = constructor_output_xmm(ctx, v840);
-                                // Rule at src/isa/x64/lower.isle line 1813.
-                                return Some(v841);
-                            }
-                            let v842 = constructor_flip_high_bit_mask(ctx, v817);
-                            let v843 = constructor_put_in_xmm(ctx, v765.0);
-                            let v844 = &C::xmm_to_xmm_mem(ctx, v842);
-                            let v845 = constructor_x64_pxor(ctx, v843, v844);
-                            let v846 = constructor_put_in_xmm(ctx, v765.1);
-                            let v847 = &C::xmm_to_xmm_mem(ctx, v842);
-                            let v848 = constructor_x64_pxor(ctx, v846, v847);
-                            let v849 = &C::xmm_to_xmm_mem(ctx, v848);
-                            let v850 = constructor_x64_pcmpgt(ctx, v817, v845, v849);
-                            let v851 = constructor_output_xmm(ctx, v850);
-                            // Rule at src/isa/x64/lower.isle line 1823.
-                            return Some(v851);
-                        }
-                    }
-                    &IntCC::UnsignedGreaterThanOrEqual => {
-                        let v765 = C::unpack_value_array_2(ctx, v763);
-                        let v768 = C::value_type(ctx, v765.0);
-                        let v816 = C::ty_vec128(ctx, v768);
-                        if let Some(v817) = v816 {
-                            let v832 = constructor_has_pmaxu(ctx, v817);
-                            if v832 == true {
-                                let v818 = constructor_put_in_xmm(ctx, v765.0);
-                                let v843 = constructor_put_in_xmm(ctx, v765.0);
-                                let v861 = &C::put_in_xmm_mem(ctx, v765.1);
-                                let v875 = constructor_x64_pmaxu(ctx, v817, v843, v861);
-                                let v876 = &C::xmm_to_xmm_mem(ctx, v875);
-                                let v877 = constructor_x64_pcmpeq(ctx, v817, v818, v876);
-                                let v878 = constructor_output_xmm(ctx, v877);
-                                // Rule at src/isa/x64/lower.isle line 1873.
-                                return Some(v878);
-                            }
-                        }
-                        if v768 == I16X8 {
-                            let v828 = constructor_put_in_xmm(ctx, v765.1);
-                            let v829 = &C::put_in_xmm_mem(ctx, v765.0);
-                            let v879 = constructor_x64_psubusw(ctx, v828, v829);
-                            let v880 = constructor_xmm_zero(ctx, I16X8);
-                            let v881 = &C::xmm_to_xmm_mem(ctx, v880);
-                            let v882 = constructor_x64_pcmpeqw(ctx, v879, v881);
-                            let v883 = constructor_output_xmm(ctx, v882);
-                            // Rule at src/isa/x64/lower.isle line 1879.
-                            return Some(v883);
-                        }
-                        if let Some(v817) = v816 {
-                            let v842 = constructor_flip_high_bit_mask(ctx, v817);
-                            let v843 = constructor_put_in_xmm(ctx, v765.0);
-                            let v844 = &C::xmm_to_xmm_mem(ctx, v842);
-                            let v845 = constructor_x64_pxor(ctx, v843, v844);
-                            let v846 = constructor_put_in_xmm(ctx, v765.1);
-                            let v847 = &C::xmm_to_xmm_mem(ctx, v842);
-                            let v848 = constructor_x64_pxor(ctx, v846, v847);
-                            let v857 = &C::xmm_to_xmm_mem(ctx, v845);
-                            let v858 = constructor_x64_pcmpgt(ctx, v817, v848, v857);
-                            let v884 = constructor_vector_all_ones(ctx);
-                            let v885 = &C::xmm_to_xmm_mem(ctx, v884);
-                            let v886 = constructor_x64_pxor(ctx, v858, v885);
-                            let v887 = constructor_output_xmm(ctx, v886);
-                            // Rule at src/isa/x64/lower.isle line 1885.
-                            return Some(v887);
-                        }
-                    }
-                    &IntCC::UnsignedLessThan => {
-                        let v765 = C::unpack_value_array_2(ctx, v763);
-                        let v768 = C::value_type(ctx, v765.0);
-                        let v816 = C::ty_vec128(ctx, v768);
-                        if let Some(v817) = v816 {
-                            let v852 = constructor_has_pminu(ctx, v817);
-                            if v852 == true {
-                                let v818 = constructor_put_in_xmm(ctx, v765.0);
-                                let v833 = constructor_put_in_xmm(ctx, v765.1);
-                                let v834 = &C::xmm_to_xmm_mem(ctx, v833);
-                                let v853 = constructor_x64_pminu(ctx, v817, v818, v834);
-                                let v836 = &C::xmm_to_xmm_mem(ctx, v833);
-                                let v854 = constructor_x64_pcmpeq(ctx, v817, v853, v836);
-                                let v838 = constructor_vector_all_ones(ctx);
-                                let v839 = &C::xmm_to_xmm_mem(ctx, v838);
-                                let v855 = constructor_x64_pxor(ctx, v854, v839);
-                                let v856 = constructor_output_xmm(ctx, v855);
-                                // Rule at src/isa/x64/lower.isle line 1831.
-                                return Some(v856);
-                            }
-                            let v842 = constructor_flip_high_bit_mask(ctx, v817);
-                            let v843 = constructor_put_in_xmm(ctx, v765.0);
-                            let v844 = &C::xmm_to_xmm_mem(ctx, v842);
-                            let v845 = constructor_x64_pxor(ctx, v843, v844);
-                            let v846 = constructor_put_in_xmm(ctx, v765.1);
-                            let v847 = &C::xmm_to_xmm_mem(ctx, v842);
-                            let v848 = constructor_x64_pxor(ctx, v846, v847);
-                            let v857 = &C::xmm_to_xmm_mem(ctx, v845);
-                            let v858 = constructor_x64_pcmpgt(ctx, v817, v848, v857);
-                            let v859 = constructor_output_xmm(ctx, v858);
-                            // Rule at src/isa/x64/lower.isle line 1842.
-                            return Some(v859);
-                        }
-                    }
-                    &IntCC::UnsignedLessThanOrEqual => {
-                        let v765 = C::unpack_value_array_2(ctx, v763);
-                        let v768 = C::value_type(ctx, v765.0);
-                        let v816 = C::ty_vec128(ctx, v768);
-                        if let Some(v817) = v816 {
-                            let v852 = constructor_has_pminu(ctx, v817);
-                            if v852 == true {
-                                let v818 = constructor_put_in_xmm(ctx, v765.0);
-                                let v843 = constructor_put_in_xmm(ctx, v765.0);
-                                let v861 = &C::put_in_xmm_mem(ctx, v765.1);
-                                let v888 = constructor_x64_pminu(ctx, v817, v843, v861);
-                                let v889 = &C::xmm_to_xmm_mem(ctx, v888);
-                                let v890 = constructor_x64_pcmpeq(ctx, v817, v818, v889);
-                                let v891 = constructor_output_xmm(ctx, v890);
-                                // Rule at src/isa/x64/lower.isle line 1896.
-                                return Some(v891);
-                            }
-                        }
-                        if v768 == I16X8 {
-                            let v818 = constructor_put_in_xmm(ctx, v765.0);
-                            let v819 = &C::put_in_xmm_mem(ctx, v765.1);
-                            let v892 = constructor_x64_psubusw(ctx, v818, v819);
-                            let v893 = constructor_xmm_zero(ctx, I8X16);
-                            let v894 = &C::xmm_to_xmm_mem(ctx, v893);
-                            let v895 = constructor_x64_pcmpeqw(ctx, v892, v894);
-                            let v896 = constructor_output_xmm(ctx, v895);
-                            // Rule at src/isa/x64/lower.isle line 1903.
-                            return Some(v896);
-                        }
-                        if let Some(v817) = v816 {
-                            let v842 = constructor_flip_high_bit_mask(ctx, v817);
-                            let v843 = constructor_put_in_xmm(ctx, v765.0);
-                            let v844 = &C::xmm_to_xmm_mem(ctx, v842);
-                            let v845 = constructor_x64_pxor(ctx, v843, v844);
-                            let v846 = constructor_put_in_xmm(ctx, v765.1);
-                            let v847 = &C::xmm_to_xmm_mem(ctx, v842);
-                            let v848 = constructor_x64_pxor(ctx, v846, v847);
-                            let v849 = &C::xmm_to_xmm_mem(ctx, v848);
-                            let v850 = constructor_x64_pcmpgt(ctx, v817, v845, v849);
-                            let v884 = constructor_vector_all_ones(ctx);
-                            let v885 = &C::xmm_to_xmm_mem(ctx, v884);
-                            let v897 = constructor_x64_pxor(ctx, v850, v885);
-                            let v898 = constructor_output_xmm(ctx, v897);
-                            // Rule at src/isa/x64/lower.isle line 1911.
-                            return Some(v898);
-                        }
-                    }
-                    _ => {}
-                }
-                let v765 = C::unpack_value_array_2(ctx, v763);
-                let v768 = C::value_type(ctx, v765.0);
-                if v768 == I128 {
-                    let v771 = &constructor_emit_cmp(ctx, v764, v765.0, v765.1);
-                    let v772 = constructor_lower_icmp_bool(ctx, v771);
-                    let v773 = C::output(ctx, v772);
-                    // Rule at src/isa/x64/lower.isle line 1749.
-                    return Some(v773);
-                }
-                let v769 = C::fits_in_64(ctx, v768);
-                if let Some(v770) = v769 {
-                    let v771 = &constructor_emit_cmp(ctx, v764, v765.0, v765.1);
-                    let v772 = constructor_lower_icmp_bool(ctx, v771);
-                    let v773 = C::output(ctx, v772);
-                    // Rule at src/isa/x64/lower.isle line 1746.
-                    return Some(v773);
-                }
-            }
-        }
-        &InstructionData::Load {
-            opcode: ref v1422,
-            arg: v1423,
-            flags: v1424,
-            offset: v1425,
-        } => {
-            match v1422 {
-                &Opcode::Load => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            F32 => {
-                                let v1435 = &constructor_to_amode(ctx, v1424, v1423, v1425);
-                                let v1454 = &C::amode_to_synthetic_amode(ctx, v1435);
-                                let v1455 = constructor_x64_movss_load(ctx, v1454);
-                                let v1456 = constructor_output_xmm(ctx, v1455);
-                                // Rule at src/isa/x64/lower.isle line 2816.
-                                return Some(v1456);
-                            }
-                            F64 => {
-                                let v1435 = &constructor_to_amode(ctx, v1424, v1423, v1425);
-                                let v1454 = &C::amode_to_synthetic_amode(ctx, v1435);
-                                let v1457 = constructor_x64_movsd_load(ctx, v1454);
-                                let v1458 = constructor_output_xmm(ctx, v1457);
-                                // Rule at src/isa/x64/lower.isle line 2818.
-                                return Some(v1458);
-                            }
-                            F32X4 => {
-                                let v1435 = &constructor_to_amode(ctx, v1424, v1423, v1425);
-                                let v1454 = &C::amode_to_synthetic_amode(ctx, v1435);
-                                let v1459 = constructor_x64_movups_load(ctx, v1454);
-                                let v1460 = constructor_output_xmm(ctx, v1459);
-                                // Rule at src/isa/x64/lower.isle line 2820.
-                                return Some(v1460);
-                            }
-                            F64X2 => {
-                                let v1435 = &constructor_to_amode(ctx, v1424, v1423, v1425);
-                                let v1454 = &C::amode_to_synthetic_amode(ctx, v1435);
-                                let v1461 = constructor_x64_movupd_load(ctx, v1454);
-                                let v1462 = constructor_output_xmm(ctx, v1461);
-                                // Rule at src/isa/x64/lower.isle line 2822.
-                                return Some(v1462);
-                            }
-                            _ => {}
-                        }
-                        let v1433 = C::ty_int_ref_64(ctx, v3);
-                        if let Some(v1434) = v1433 {
-                            let v1435 = &constructor_to_amode(ctx, v1424, v1423, v1425);
-                            let v1436 = constructor_x64_mov(ctx, v1435);
-                            let v1437 = constructor_output_reg(ctx, v1436);
-                            // Rule at src/isa/x64/lower.isle line 2794.
-                            return Some(v1437);
-                        }
-                        let v682 = C::ty_vec128(ctx, v3);
-                        if let Some(v683) = v682 {
-                            let v1435 = &constructor_to_amode(ctx, v1424, v1423, v1425);
-                            let v1463 = &constructor_amode_to_xmm_mem(ctx, v1435);
-                            let v1464 = constructor_x64_movdqu_load(ctx, v1463);
-                            let v1465 = constructor_output_xmm(ctx, v1464);
-                            // Rule at src/isa/x64/lower.isle line 2824.
-                            return Some(v1465);
-                        }
-                        if v3 == I128 {
-                            let v1435 = &constructor_to_amode(ctx, v1424, v1423, v1425);
-                            let v1467 = &C::amode_offset(ctx, v1435, 0x8);
-                            let v1468 = constructor_x64_mov(ctx, v1435);
-                            let v1469 = constructor_x64_mov(ctx, v1467);
-                            let v1470 = C::value_regs(ctx, v1468, v1469);
-                            let v1471 = C::output(ctx, v1470);
-                            // Rule at src/isa/x64/lower.isle line 2828.
-                            return Some(v1471);
-                        }
-                        let v1164 = C::fits_in_32(ctx, v3);
-                        if let Some(v1165) = v1164 {
-                            let v1419 = &C::type_register_class(ctx, v3);
-                            if let Some(v1420) = v1419 {
-                                if let &RegisterClass::Gpr {
-                                    single_register: v1421,
-                                } = v1420
-                                {
-                                    let v1426 = C::ty_bits_u16(ctx, v1165);
-                                    let v1428 = &C::ext_mode(ctx, v1426, 0x40);
-                                    let v1429 = &constructor_to_amode(ctx, v1424, v1423, v1425);
-                                    let v1430 = &constructor_amode_to_gpr_mem(ctx, v1429);
-                                    let v1431 = constructor_x64_movzx(ctx, v1428, v1430);
-                                    let v1432 = constructor_output_gpr(ctx, v1431);
-                                    // Rule at src/isa/x64/lower.isle line 2790.
-                                    return Some(v1432);
-                                }
-                            }
-                        }
-                    }
-                }
-                &Opcode::Uload8 => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v1419 = &C::type_register_class(ctx, v3);
-                        if let Some(v1420) = v1419 {
-                            if let &RegisterClass::Gpr {
-                                single_register: v1421,
-                            } = v1420
-                            {
-                                let v1435 = &constructor_to_amode(ctx, v1424, v1423, v1425);
-                                let v1439 = &constructor_amode_to_gpr_mem(ctx, v1435);
-                                let v1440 = constructor_x64_movzx(ctx, &ExtMode::BQ, v1439);
-                                let v1441 = constructor_output_gpr(ctx, v1440);
-                                // Rule at src/isa/x64/lower.isle line 2799.
-                                return Some(v1441);
-                            }
-                        }
-                    }
-                }
-                &Opcode::Sload8 => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v1419 = &C::type_register_class(ctx, v3);
-                        if let Some(v1420) = v1419 {
-                            if let &RegisterClass::Gpr {
-                                single_register: v1421,
-                            } = v1420
-                            {
-                                let v1435 = &constructor_to_amode(ctx, v1424, v1423, v1425);
-                                let v1439 = &constructor_amode_to_gpr_mem(ctx, v1435);
-                                let v1442 = constructor_x64_movsx(ctx, &ExtMode::BQ, v1439);
-                                let v1443 = constructor_output_gpr(ctx, v1442);
-                                // Rule at src/isa/x64/lower.isle line 2801.
-                                return Some(v1443);
-                            }
-                        }
-                    }
-                }
-                &Opcode::Uload16 => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v1419 = &C::type_register_class(ctx, v3);
-                        if let Some(v1420) = v1419 {
-                            if let &RegisterClass::Gpr {
-                                single_register: v1421,
-                            } = v1420
-                            {
-                                let v1435 = &constructor_to_amode(ctx, v1424, v1423, v1425);
-                                let v1439 = &constructor_amode_to_gpr_mem(ctx, v1435);
-                                let v1445 = constructor_x64_movzx(ctx, &ExtMode::WQ, v1439);
-                                let v1446 = constructor_output_gpr(ctx, v1445);
-                                // Rule at src/isa/x64/lower.isle line 2803.
-                                return Some(v1446);
-                            }
-                        }
-                    }
-                }
-                &Opcode::Sload16 => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v1419 = &C::type_register_class(ctx, v3);
-                        if let Some(v1420) = v1419 {
-                            if let &RegisterClass::Gpr {
-                                single_register: v1421,
-                            } = v1420
-                            {
-                                let v1435 = &constructor_to_amode(ctx, v1424, v1423, v1425);
-                                let v1439 = &constructor_amode_to_gpr_mem(ctx, v1435);
-                                let v1447 = constructor_x64_movsx(ctx, &ExtMode::WQ, v1439);
-                                let v1448 = constructor_output_gpr(ctx, v1447);
-                                // Rule at src/isa/x64/lower.isle line 2805.
-                                return Some(v1448);
-                            }
-                        }
-                    }
-                }
-                &Opcode::Uload32 => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v1419 = &C::type_register_class(ctx, v3);
-                        if let Some(v1420) = v1419 {
-                            if let &RegisterClass::Gpr {
-                                single_register: v1421,
-                            } = v1420
-                            {
-                                let v1435 = &constructor_to_amode(ctx, v1424, v1423, v1425);
-                                let v1439 = &constructor_amode_to_gpr_mem(ctx, v1435);
-                                let v1450 = constructor_x64_movzx(ctx, &ExtMode::LQ, v1439);
-                                let v1451 = constructor_output_gpr(ctx, v1450);
-                                // Rule at src/isa/x64/lower.isle line 2807.
-                                return Some(v1451);
-                            }
-                        }
-                    }
-                }
-                &Opcode::Sload32 => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v1419 = &C::type_register_class(ctx, v3);
-                        if let Some(v1420) = v1419 {
-                            if let &RegisterClass::Gpr {
-                                single_register: v1421,
-                            } = v1420
-                            {
-                                let v1435 = &constructor_to_amode(ctx, v1424, v1423, v1425);
-                                let v1439 = &constructor_amode_to_gpr_mem(ctx, v1435);
-                                let v1452 = constructor_x64_movsx(ctx, &ExtMode::LQ, v1439);
-                                let v1453 = constructor_output_gpr(ctx, v1452);
-                                // Rule at src/isa/x64/lower.isle line 2809.
-                                return Some(v1453);
-                            }
-                        }
-                    }
-                }
-                &Opcode::Uload8x8 => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        if v3 == I16X8 {
-                            let v436 = C::use_sse41(ctx);
-                            if v436 == true {
-                                let v1435 = &constructor_to_amode(ctx, v1424, v1423, v1425);
-                                let v1463 = &constructor_amode_to_xmm_mem(ctx, v1435);
-                                let v1474 = constructor_x64_pmovzxbw(ctx, v1463);
-                                let v1475 = constructor_output_xmm(ctx, v1474);
-                                // Rule at src/isa/x64/lower.isle line 2841.
-                                return Some(v1475);
-                            }
-                            let v1435 = &constructor_to_amode(ctx, v1424, v1423, v1425);
-                            let v1439 = &constructor_amode_to_gpr_mem(ctx, v1435);
-                            let v1484 = constructor_x64_movq_to_xmm(ctx, v1439);
-                            let v1487 = constructor_lower_uwiden_low(ctx, I16X8, v1484);
-                            let v1488 = constructor_output_xmm(ctx, v1487);
-                            // Rule at src/isa/x64/lower.isle line 2859.
-                            return Some(v1488);
-                        }
-                    }
-                }
-                &Opcode::Sload8x8 => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        if v3 == I16X8 {
-                            let v436 = C::use_sse41(ctx);
-                            if v436 == true {
-                                let v1435 = &constructor_to_amode(ctx, v1424, v1423, v1425);
-                                let v1463 = &constructor_amode_to_xmm_mem(ctx, v1435);
-                                let v1472 = constructor_x64_pmovsxbw(ctx, v1463);
-                                let v1473 = constructor_output_xmm(ctx, v1472);
-                                // Rule at src/isa/x64/lower.isle line 2838.
-                                return Some(v1473);
-                            }
-                            let v1435 = &constructor_to_amode(ctx, v1424, v1423, v1425);
-                            let v1439 = &constructor_amode_to_gpr_mem(ctx, v1435);
-                            let v1484 = constructor_x64_movq_to_xmm(ctx, v1439);
-                            let v1485 = constructor_lower_swiden_low(ctx, I16X8, v1484);
-                            let v1486 = constructor_output_xmm(ctx, v1485);
-                            // Rule at src/isa/x64/lower.isle line 2857.
-                            return Some(v1486);
-                        }
-                    }
-                }
-                &Opcode::Uload16x4 => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        if v3 == I32X4 {
-                            let v436 = C::use_sse41(ctx);
-                            if v436 == true {
-                                let v1435 = &constructor_to_amode(ctx, v1424, v1423, v1425);
-                                let v1463 = &constructor_amode_to_xmm_mem(ctx, v1435);
-                                let v1478 = constructor_x64_pmovzxwd(ctx, v1463);
-                                let v1479 = constructor_output_xmm(ctx, v1478);
-                                // Rule at src/isa/x64/lower.isle line 2847.
-                                return Some(v1479);
-                            }
-                            let v1435 = &constructor_to_amode(ctx, v1424, v1423, v1425);
-                            let v1439 = &constructor_amode_to_gpr_mem(ctx, v1435);
-                            let v1484 = constructor_x64_movq_to_xmm(ctx, v1439);
-                            let v1491 = constructor_lower_uwiden_low(ctx, I32X4, v1484);
-                            let v1492 = constructor_output_xmm(ctx, v1491);
-                            // Rule at src/isa/x64/lower.isle line 2863.
-                            return Some(v1492);
-                        }
-                    }
-                }
-                &Opcode::Sload16x4 => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        if v3 == I32X4 {
-                            let v436 = C::use_sse41(ctx);
-                            if v436 == true {
-                                let v1435 = &constructor_to_amode(ctx, v1424, v1423, v1425);
-                                let v1463 = &constructor_amode_to_xmm_mem(ctx, v1435);
-                                let v1476 = constructor_x64_pmovsxwd(ctx, v1463);
-                                let v1477 = constructor_output_xmm(ctx, v1476);
-                                // Rule at src/isa/x64/lower.isle line 2844.
-                                return Some(v1477);
-                            }
-                            let v1435 = &constructor_to_amode(ctx, v1424, v1423, v1425);
-                            let v1439 = &constructor_amode_to_gpr_mem(ctx, v1435);
-                            let v1484 = constructor_x64_movq_to_xmm(ctx, v1439);
-                            let v1489 = constructor_lower_swiden_low(ctx, I32X4, v1484);
-                            let v1490 = constructor_output_xmm(ctx, v1489);
-                            // Rule at src/isa/x64/lower.isle line 2861.
-                            return Some(v1490);
-                        }
-                    }
-                }
-                &Opcode::Uload32x2 => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        if v3 == I64X2 {
-                            let v436 = C::use_sse41(ctx);
-                            if v436 == true {
-                                let v1435 = &constructor_to_amode(ctx, v1424, v1423, v1425);
-                                let v1463 = &constructor_amode_to_xmm_mem(ctx, v1435);
-                                let v1482 = constructor_x64_pmovzxdq(ctx, v1463);
-                                let v1483 = constructor_output_xmm(ctx, v1482);
-                                // Rule at src/isa/x64/lower.isle line 2853.
-                                return Some(v1483);
-                            }
-                            let v1435 = &constructor_to_amode(ctx, v1424, v1423, v1425);
-                            let v1439 = &constructor_amode_to_gpr_mem(ctx, v1435);
-                            let v1484 = constructor_x64_movq_to_xmm(ctx, v1439);
-                            let v1495 = constructor_lower_uwiden_low(ctx, I64X2, v1484);
-                            let v1496 = constructor_output_xmm(ctx, v1495);
-                            // Rule at src/isa/x64/lower.isle line 2867.
-                            return Some(v1496);
-                        }
-                    }
-                }
-                &Opcode::Sload32x2 => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        if v3 == I64X2 {
-                            let v436 = C::use_sse41(ctx);
-                            if v436 == true {
-                                let v1435 = &constructor_to_amode(ctx, v1424, v1423, v1425);
-                                let v1463 = &constructor_amode_to_xmm_mem(ctx, v1435);
-                                let v1480 = constructor_x64_pmovsxdq(ctx, v1463);
-                                let v1481 = constructor_output_xmm(ctx, v1480);
-                                // Rule at src/isa/x64/lower.isle line 2850.
-                                return Some(v1481);
-                            }
-                            let v1435 = &constructor_to_amode(ctx, v1424, v1423, v1425);
-                            let v1439 = &constructor_amode_to_gpr_mem(ctx, v1435);
-                            let v1484 = constructor_x64_movq_to_xmm(ctx, v1439);
-                            let v1493 = constructor_lower_swiden_low(ctx, I64X2, v1484);
-                            let v1494 = constructor_output_xmm(ctx, v1493);
-                            // Rule at src/isa/x64/lower.isle line 2865.
-                            return Some(v1494);
-                        }
-                    }
-                }
-                _ => {}
-            }
-        }
-        &InstructionData::LoadNoOffset {
-            opcode: ref v1635,
-            arg: v1636,
-            flags: v1637,
-        } => {
-            match v1635 {
-                &Opcode::Bitcast => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v1419 = &C::type_register_class(ctx, v3);
-                        if let Some(v1420) = v1419 {
-                            match v1420 {
-                                &RegisterClass::Gpr {
-                                    single_register: v1421,
-                                } => {
-                                    let v2035 = C::value_type(ctx, v1636);
-                                    let v2046 = &C::type_register_class(ctx, v2035);
-                                    if let Some(v2047) = v2046 {
-                                        if let &RegisterClass::Gpr {
-                                            single_register: v2048,
-                                        } = v2047
-                                        {
-                                            let v2049 = constructor_output_value(ctx, v1636);
-                                            // Rule at src/isa/x64/lower.isle line 3838.
-                                            return Some(v2049);
-                                        }
-                                    }
-                                }
-                                &RegisterClass::Xmm => {
-                                    let v2035 = C::value_type(ctx, v1636);
-                                    let v2046 = &C::type_register_class(ctx, v2035);
-                                    if let Some(v2047) = v2046 {
-                                        if let &RegisterClass::Xmm = v2047 {
-                                            let v2049 = constructor_output_value(ctx, v1636);
-                                            // Rule at src/isa/x64/lower.isle line 3842.
-                                            return Some(v2049);
-                                        }
-                                    }
-                                }
-                                _ => {}
-                            }
-                        }
-                        match v3 {
-                            I32 => {
-                                let v2035 = C::value_type(ctx, v1636);
-                                if v2035 == F32 {
-                                    let v2036 = constructor_put_in_xmm(ctx, v1636);
-                                    let v2037 = constructor_bitcast_xmm_to_gpr(ctx, F32, v2036);
-                                    let v2038 = constructor_output_gpr(ctx, v2037);
-                                    // Rule at src/isa/x64/lower.isle line 3825.
-                                    return Some(v2038);
-                                }
-                            }
-                            I64 => {
-                                let v2035 = C::value_type(ctx, v1636);
-                                if v2035 == F64 {
-                                    let v2036 = constructor_put_in_xmm(ctx, v1636);
-                                    let v2042 = constructor_bitcast_xmm_to_gpr(ctx, F64, v2036);
-                                    let v2043 = constructor_output_gpr(ctx, v2042);
-                                    // Rule at src/isa/x64/lower.isle line 3831.
-                                    return Some(v2043);
-                                }
-                            }
-                            F32 => {
-                                let v2035 = C::value_type(ctx, v1636);
-                                if v2035 == I32 {
-                                    let v2039 = constructor_put_in_gpr(ctx, v1636);
-                                    let v2040 = constructor_bitcast_gpr_to_xmm(ctx, I32, v2039);
-                                    let v2041 = constructor_output_xmm(ctx, v2040);
-                                    // Rule at src/isa/x64/lower.isle line 3828.
-                                    return Some(v2041);
-                                }
-                            }
-                            F64 => {
-                                let v2035 = C::value_type(ctx, v1636);
-                                if v2035 == I64 {
-                                    let v2039 = constructor_put_in_gpr(ctx, v1636);
-                                    let v2044 = constructor_bitcast_gpr_to_xmm(ctx, I64, v2039);
-                                    let v2045 = constructor_output_xmm(ctx, v2044);
-                                    // Rule at src/isa/x64/lower.isle line 3834.
-                                    return Some(v2045);
-                                }
-                            }
-                            _ => {}
-                        }
-                    }
-                }
-                &Opcode::AtomicLoad => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        if v3 == I64 {
-                            let v48 = C::zero_offset(ctx);
-                            let v1638 = &constructor_to_amode(ctx, v1637, v1636, v48);
-                            let v1639 = constructor_x64_mov(ctx, v1638);
-                            let v1640 = constructor_output_reg(ctx, v1639);
-                            // Rule at src/isa/x64/lower.isle line 3144.
-                            return Some(v1640);
-                        }
-                        let v1164 = C::fits_in_32(ctx, v3);
-                        if let Some(v1165) = v1164 {
-                            let v1641 = C::ty_int(ctx, v3);
-                            if let Some(v1642) = v1641 {
-                                let v1426 = C::ty_bits_u16(ctx, v1165);
-                                let v1428 = &C::ext_mode(ctx, v1426, 0x40);
-                                let v1643 = C::zero_offset(ctx);
-                                let v1644 = &constructor_to_amode(ctx, v1637, v1636, v1643);
-                                let v1645 = &constructor_amode_to_gpr_mem(ctx, v1644);
-                                let v1646 = constructor_x64_movzx(ctx, v1428, v1645);
-                                let v1647 = constructor_output_gpr(ctx, v1646);
-                                // Rule at src/isa/x64/lower.isle line 3146.
-                                return Some(v1647);
-                            }
-                        }
-                    }
-                }
-                _ => {}
-            }
-        }
-        &InstructionData::MultiAry {
-            opcode: ref v758,
-            args: v759,
-        } => {
-            if let &Opcode::Return = v758 {
-                let v760 = C::value_list_slice(ctx, v759);
-                let v761 = constructor_lower_return(ctx, v760);
-                // Rule at src/isa/x64/lower.isle line 1741.
-                return Some(v761);
-            }
-        }
-        &InstructionData::NullAry { opcode: ref v31 } => {
-            match v31 {
-                &Opcode::Debugtrap => {
-                    let v1178 = &constructor_x64_hlt(ctx);
-                    let v1179 = constructor_side_effect(ctx, v1178);
-                    // Rule at src/isa/x64/lower.isle line 2410.
-                    return Some(v1179);
-                }
-                &Opcode::GetPinnedReg => {
-                    let v2158 = constructor_read_pinned_gpr(ctx);
-                    let v2159 = constructor_output_gpr(ctx, v2158);
-                    // Rule at src/isa/x64/lower.isle line 4103.
-                    return Some(v2159);
-                }
-                &Opcode::GetFramePointer => {
-                    let v1713 = constructor_x64_rbp(ctx);
-                    let v1714 = constructor_output_reg(ctx, v1713);
-                    // Rule at src/isa/x64/lower.isle line 3201.
-                    return Some(v1714);
-                }
-                &Opcode::GetStackPointer => {
-                    let v1715 = constructor_x64_rsp(ctx);
-                    let v1716 = constructor_output_reg(ctx, v1715);
-                    // Rule at src/isa/x64/lower.isle line 3204.
-                    return Some(v1716);
-                }
-                &Opcode::GetReturnAddress => {
-                    let v1713 = constructor_x64_rbp(ctx);
-                    let v47 = C::mem_flags_trusted(ctx);
-                    let v1717 = Amode::ImmReg {
-                        simm32: 0x8,
-                        base: v1713,
-                        flags: v47,
-                    };
-                    let v1718 = &C::amode_to_synthetic_amode(ctx, &v1717);
-                    let v1719 = constructor_x64_load(ctx, I64, v1718, &ExtKind::None);
-                    let v1720 = constructor_output_reg(ctx, v1719);
-                    // Rule at src/isa/x64/lower.isle line 3207.
-                    return Some(v1720);
-                }
-                &Opcode::Null => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v32 = constructor_imm(ctx, v3, 0x0);
-                        let v33 = constructor_output_reg(ctx, v32);
-                        // Rule at src/isa/x64/lower.isle line 37.
-                        return Some(v33);
-                    }
-                }
-                &Opcode::Nop => {
-                    let v2511 = C::invalid_reg(ctx);
-                    let v2512 = constructor_output_reg(ctx, v2511);
-                    // Rule at src/isa/x64/lower.isle line 4650.
-                    return Some(v2512);
-                }
-                &Opcode::Fence => {
-                    let v1615 = &constructor_x64_mfence(ctx);
-                    let v1616 = constructor_side_effect(ctx, v1615);
-                    // Rule at src/isa/x64/lower.isle line 3122.
-                    return Some(v1616);
-                }
-                _ => {}
-            }
-        }
-        &InstructionData::Shuffle {
-            opcode: ref v2167,
-            args: ref v2168,
-            imm: v2169,
-        } => {
-            if let &Opcode::Shuffle = v2167 {
-                let v436 = C::use_sse41(ctx);
-                if v436 == true {
-                    let v2173 = C::pblendw_imm(ctx, v2169);
-                    if let Some(v2174) = v2173 {
-                        let v2170 = C::unpack_value_array_2(ctx, v2168);
-                        let v2175 = constructor_put_in_xmm(ctx, v2170.0);
-                        let v2176 = &C::put_in_xmm_mem(ctx, v2170.1);
-                        let v2177 = constructor_x64_pblendw(ctx, v2175, v2176, v2174);
-                        let v2178 = constructor_output_xmm(ctx, v2177);
-                        // Rule at src/isa/x64/lower.isle line 4123.
-                        return Some(v2178);
-                    }
-                }
-                let v520 = C::use_ssse3(ctx);
-                if v520 == true {
-                    let v2179 = C::palignr_imm_from_immediate(ctx, v2169);
-                    if let Some(v2180) = v2179 {
-                        let v2170 = C::unpack_value_array_2(ctx, v2168);
-                        let v2181 = constructor_put_in_xmm(ctx, v2170.1);
-                        let v2182 = &C::put_in_xmm_mem(ctx, v2170.0);
-                        let v2183 = constructor_x64_palignr(ctx, v2181, v2182, v2180);
-                        let v2184 = constructor_output_xmm(ctx, v2183);
-                        // Rule at src/isa/x64/lower.isle line 4134.
-                        return Some(v2184);
-                    }
-                }
-                let v2185 = C::pshuflw_lhs_imm(ctx, v2169);
-                if let Some(v2186) = v2185 {
-                    let v2170 = C::unpack_value_array_2(ctx, v2168);
-                    let v2187 = &C::put_in_xmm_mem(ctx, v2170.0);
-                    let v2188 = constructor_x64_pshuflw(ctx, v2187, v2186);
-                    let v2189 = constructor_output_xmm(ctx, v2188);
-                    // Rule at src/isa/x64/lower.isle line 4146.
-                    return Some(v2189);
-                }
-                let v2190 = C::pshuflw_rhs_imm(ctx, v2169);
-                if let Some(v2191) = v2190 {
-                    let v2170 = C::unpack_value_array_2(ctx, v2168);
-                    let v2192 = &C::put_in_xmm_mem(ctx, v2170.1);
-                    let v2193 = constructor_x64_pshuflw(ctx, v2192, v2191);
-                    let v2194 = constructor_output_xmm(ctx, v2193);
-                    // Rule at src/isa/x64/lower.isle line 4148.
-                    return Some(v2194);
-                }
-                let v2195 = C::pshufhw_lhs_imm(ctx, v2169);
-                if let Some(v2196) = v2195 {
-                    let v2170 = C::unpack_value_array_2(ctx, v2168);
-                    let v2187 = &C::put_in_xmm_mem(ctx, v2170.0);
-                    let v2197 = constructor_x64_pshufhw(ctx, v2187, v2196);
-                    let v2198 = constructor_output_xmm(ctx, v2197);
-                    // Rule at src/isa/x64/lower.isle line 4150.
-                    return Some(v2198);
-                }
-                let v2199 = C::pshufhw_rhs_imm(ctx, v2169);
-                if let Some(v2200) = v2199 {
-                    let v2170 = C::unpack_value_array_2(ctx, v2168);
-                    let v2192 = &C::put_in_xmm_mem(ctx, v2170.1);
-                    let v2201 = constructor_x64_pshufhw(ctx, v2192, v2200);
-                    let v2202 = constructor_output_xmm(ctx, v2201);
-                    // Rule at src/isa/x64/lower.isle line 4152.
-                    return Some(v2202);
-                }
-                let v2203 = C::pshufd_lhs_imm(ctx, v2169);
-                if let Some(v2204) = v2203 {
-                    let v2170 = C::unpack_value_array_2(ctx, v2168);
-                    let v2187 = &C::put_in_xmm_mem(ctx, v2170.0);
-                    let v2205 = constructor_x64_pshufd(ctx, v2187, v2204);
-                    let v2206 = constructor_output_xmm(ctx, v2205);
-                    // Rule at src/isa/x64/lower.isle line 4169.
-                    return Some(v2206);
-                }
-                let v2207 = C::pshufd_rhs_imm(ctx, v2169);
-                if let Some(v2208) = v2207 {
-                    let v2170 = C::unpack_value_array_2(ctx, v2168);
-                    let v2192 = &C::put_in_xmm_mem(ctx, v2170.1);
-                    let v2209 = constructor_x64_pshufd(ctx, v2192, v2208);
-                    let v2210 = constructor_output_xmm(ctx, v2209);
-                    // Rule at src/isa/x64/lower.isle line 4171.
-                    return Some(v2210);
-                }
-                let v2211 = C::u128_from_immediate(ctx, v2169);
-                if let Some(v2212) = v2211 {
-                    match v2212 {
-                        0x0 => {
-                            if v520 == true {
-                                let v2170 = C::unpack_value_array_2(ctx, v2168);
-                                let v2175 = constructor_put_in_xmm(ctx, v2170.0);
-                                let v525 = constructor_xmm_zero(ctx, I8X16);
-                                let v1993 = &C::xmm_to_xmm_mem(ctx, v525);
-                                let v2229 = constructor_x64_pshufb(ctx, v2175, v1993);
-                                let v2230 = constructor_output_xmm(ctx, v2229);
-                                // Rule at src/isa/x64/lower.isle line 4208.
-                                return Some(v2230);
-                            }
-                        }
-                        0x17071606150514041303120211011000 => {
-                            let v2170 = C::unpack_value_array_2(ctx, v2168);
-                            let v2175 = constructor_put_in_xmm(ctx, v2170.0);
-                            let v2176 = &C::put_in_xmm_mem(ctx, v2170.1);
-                            let v2215 = constructor_x64_punpcklbw(ctx, v2175, v2176);
-                            let v2216 = constructor_output_xmm(ctx, v2215);
-                            // Rule at src/isa/x64/lower.isle line 4182.
-                            return Some(v2216);
-                        }
-                        0x17160706151405041312030211100100 => {
-                            let v2170 = C::unpack_value_array_2(ctx, v2168);
-                            let v2175 = constructor_put_in_xmm(ctx, v2170.0);
-                            let v2176 = &C::put_in_xmm_mem(ctx, v2170.1);
-                            let v2219 = constructor_x64_punpcklwd(ctx, v2175, v2176);
-                            let v2220 = constructor_output_xmm(ctx, v2219);
-                            // Rule at src/isa/x64/lower.isle line 4188.
-                            return Some(v2220);
-                        }
-                        0x17161514070605041312111003020100 => {
-                            let v2170 = C::unpack_value_array_2(ctx, v2168);
-                            let v2175 = constructor_put_in_xmm(ctx, v2170.0);
-                            let v2176 = &C::put_in_xmm_mem(ctx, v2170.1);
-                            let v2223 = constructor_x64_punpckldq(ctx, v2175, v2176);
-                            let v2224 = constructor_output_xmm(ctx, v2223);
-                            // Rule at src/isa/x64/lower.isle line 4194.
-                            return Some(v2224);
-                        }
-                        0x17161514131211100706050403020100 => {
-                            let v2170 = C::unpack_value_array_2(ctx, v2168);
-                            let v2175 = constructor_put_in_xmm(ctx, v2170.0);
-                            let v2176 = &C::put_in_xmm_mem(ctx, v2170.1);
-                            let v2227 = constructor_x64_punpcklqdq(ctx, v2175, v2176);
-                            let v2228 = constructor_output_xmm(ctx, v2227);
-                            // Rule at src/isa/x64/lower.isle line 4200.
-                            return Some(v2228);
-                        }
-                        0x1F0F1E0E1D0D1C0C1B0B1A0A19091808 => {
-                            let v2170 = C::unpack_value_array_2(ctx, v2168);
-                            let v2175 = constructor_put_in_xmm(ctx, v2170.0);
-                            let v2176 = &C::put_in_xmm_mem(ctx, v2170.1);
-                            let v2213 = constructor_x64_punpckhbw(ctx, v2175, v2176);
-                            let v2214 = constructor_output_xmm(ctx, v2213);
-                            // Rule at src/isa/x64/lower.isle line 4180.
-                            return Some(v2214);
-                        }
-                        0x1F1E0F0E1D1C0D0C1B1A0B0A19180908 => {
-                            let v2170 = C::unpack_value_array_2(ctx, v2168);
-                            let v2175 = constructor_put_in_xmm(ctx, v2170.0);
-                            let v2176 = &C::put_in_xmm_mem(ctx, v2170.1);
-                            let v2217 = constructor_x64_punpckhwd(ctx, v2175, v2176);
-                            let v2218 = constructor_output_xmm(ctx, v2217);
-                            // Rule at src/isa/x64/lower.isle line 4186.
-                            return Some(v2218);
-                        }
-                        0x1F1E1D1C0F0E0D0C1B1A19180B0A0908 => {
-                            let v2170 = C::unpack_value_array_2(ctx, v2168);
-                            let v2175 = constructor_put_in_xmm(ctx, v2170.0);
-                            let v2176 = &C::put_in_xmm_mem(ctx, v2170.1);
-                            let v2221 = constructor_x64_punpckhdq(ctx, v2175, v2176);
-                            let v2222 = constructor_output_xmm(ctx, v2221);
-                            // Rule at src/isa/x64/lower.isle line 4192.
-                            return Some(v2222);
-                        }
-                        0x1F1E1D1C1B1A19180F0E0D0C0B0A0908 => {
-                            let v2170 = C::unpack_value_array_2(ctx, v2168);
-                            let v2175 = constructor_put_in_xmm(ctx, v2170.0);
-                            let v2176 = &C::put_in_xmm_mem(ctx, v2170.1);
-                            let v2225 = constructor_x64_punpckhqdq(ctx, v2175, v2176);
-                            let v2226 = constructor_output_xmm(ctx, v2225);
-                            // Rule at src/isa/x64/lower.isle line 4198.
-                            return Some(v2226);
-                        }
-                        _ => {}
-                    }
-                }
-                let v2231 = C::shufps_imm(ctx, v2169);
-                if let Some(v2232) = v2231 {
-                    let v2170 = C::unpack_value_array_2(ctx, v2168);
-                    let v2175 = constructor_put_in_xmm(ctx, v2170.0);
-                    let v2176 = &C::put_in_xmm_mem(ctx, v2170.1);
-                    let v2233 = constructor_x64_shufps(ctx, v2175, v2176, v2232);
-                    let v2234 = constructor_output_xmm(ctx, v2233);
-                    // Rule at src/isa/x64/lower.isle line 4222.
-                    return Some(v2234);
-                }
-                let v2235 = C::shufps_rev_imm(ctx, v2169);
-                if let Some(v2236) = v2235 {
-                    let v2170 = C::unpack_value_array_2(ctx, v2168);
-                    let v2181 = constructor_put_in_xmm(ctx, v2170.1);
-                    let v2182 = &C::put_in_xmm_mem(ctx, v2170.0);
-                    let v2237 = constructor_x64_shufps(ctx, v2181, v2182, v2236);
-                    let v2238 = constructor_output_xmm(ctx, v2237);
-                    // Rule at src/isa/x64/lower.isle line 4224.
-                    return Some(v2238);
-                }
-                let v2239 = &C::vec_mask_from_immediate(ctx, v2169);
-                if let Some(v2240) = v2239 {
-                    if v520 == true {
-                        let v2170 = C::unpack_value_array_2(ctx, v2168);
-                        if v2170.0 == v2170.1 {
-                            let v2175 = constructor_put_in_xmm(ctx, v2170.0);
-                            let v2241 = C::shuffle_0_31_mask(ctx, v2240);
-                            let v2242 = &constructor_const_to_xmm_mem(ctx, v2241);
-                            let v2243 = constructor_x64_pshufb(ctx, v2175, v2242);
-                            let v2244 = constructor_output_xmm(ctx, v2243);
-                            // Rule at src/isa/x64/lower.isle line 4237.
-                            return Some(v2244);
-                        }
-                    }
-                    let v328 = C::use_avx512vl(ctx);
-                    if v328 == true {
-                        let v2249 = C::use_avx512vbmi(ctx);
-                        if v2249 == true {
-                            let v2245 = C::perm_from_mask_with_zeros(ctx, v2240);
-                            if let Some(v2246) = v2245 {
-                                let v2250 = constructor_x64_xmm_load_const(ctx, I8X16, v2246.0);
-                                let v2170 = C::unpack_value_array_2(ctx, v2168);
-                                let v2251 = constructor_put_in_xmm(ctx, v2170.0);
-                                let v2252 = &C::put_in_xmm_mem(ctx, v2170.1);
-                                let v2253 = constructor_x64_vpermi2b(ctx, v2250, v2251, v2252);
-                                let v2254 = &constructor_const_to_xmm_mem(ctx, v2246.1);
-                                let v2255 = constructor_x64_andps(ctx, v2253, v2254);
-                                let v2256 = constructor_output_xmm(ctx, v2255);
-                                // Rule at src/isa/x64/lower.isle line 4244.
-                                return Some(v2256);
-                            }
-                            let v2257 = C::perm_from_mask(ctx, v2240);
-                            let v2258 = constructor_x64_xmm_load_const(ctx, I8X16, v2257);
-                            let v2170 = C::unpack_value_array_2(ctx, v2168);
-                            let v2259 = constructor_put_in_xmm(ctx, v2170.0);
-                            let v2260 = &C::put_in_xmm_mem(ctx, v2170.1);
-                            let v2261 = constructor_x64_vpermi2b(ctx, v2258, v2259, v2260);
-                            let v2262 = constructor_output_xmm(ctx, v2261);
-                            // Rule at src/isa/x64/lower.isle line 4251.
-                            return Some(v2262);
-                        }
-                    }
-                    let v2170 = C::unpack_value_array_2(ctx, v2168);
-                    let v2175 = constructor_put_in_xmm(ctx, v2170.0);
-                    let v2263 = C::shuffle_0_15_mask(ctx, v2240);
-                    let v2264 = &constructor_const_to_reg_mem(ctx, v2263);
-                    let v2265 = constructor_lower_pshufb(ctx, v2175, v2264);
-                    let v2266 = constructor_put_in_xmm(ctx, v2170.1);
-                    let v2267 = C::shuffle_16_31_mask(ctx, v2240);
-                    let v2268 = &constructor_const_to_reg_mem(ctx, v2267);
-                    let v2269 = constructor_lower_pshufb(ctx, v2266, v2268);
-                    let v2270 = &C::xmm_to_xmm_mem(ctx, v2269);
-                    let v2271 = constructor_x64_por(ctx, v2265, v2270);
-                    let v2272 = constructor_output_xmm(ctx, v2271);
-                    // Rule at src/isa/x64/lower.isle line 4259.
-                    return Some(v2272);
-                }
-            }
-        }
-        &InstructionData::StackLoad {
-            opcode: ref v2079,
-            stack_slot: v2080,
-            offset: v2081,
-        } => {
-            if let &Opcode::StackAddr = v2079 {
-                let v2082 = constructor_stack_addr_impl(ctx, v2080, v2081);
-                let v2083 = constructor_output_gpr(ctx, v2082);
-                // Rule at src/isa/x64/lower.isle line 3934.
-                return Some(v2083);
-            }
-        }
-        &InstructionData::Store {
-            opcode: ref v1497,
-            args: ref v1498,
-            flags: v1499,
-            offset: v1500,
-        } => {
-            match v1497 {
-                &Opcode::Store => {
-                    let v1501 = C::unpack_value_array_2(ctx, v1498);
-                    let v1543 = C::def_inst(ctx, v1501.0);
-                    if let Some(v1544) = v1543 {
-                        let v1545 = C::first_result(ctx, v1544);
-                        if let Some(v1546) = v1545 {
-                            let v1548 = &C::inst_data(ctx, v1544);
-                            match v1548 {
-                                &InstructionData::Binary {
-                                    opcode: ref v1568,
-                                    args: ref v1569,
-                                } => {
-                                    match v1568 {
-                                        &Opcode::Iadd => {
-                                            let v1547 = C::value_type(ctx, v1546);
-                                            let v1566 = C::ty_32_or_64(ctx, v1547);
-                                            if let Some(v1567) = v1566 {
-                                                let v1570 = C::unpack_value_array_2(ctx, v1569);
-                                                let v1573 = &C::sinkable_load(ctx, v1570.0);
-                                                if let Some(v1574) = v1573 {
-                                                    let v1575 = C::def_inst(ctx, v1570.0);
-                                                    if let Some(v1576) = v1575 {
-                                                        let v1577 = &C::inst_data(ctx, v1576);
-                                                        if let &InstructionData::Load {
-                                                            opcode: ref v1578,
-                                                            arg: v1579,
-                                                            flags: v1580,
-                                                            offset: v1581,
-                                                        } = v1577
-                                                        {
-                                                            if let &Opcode::Load = v1578 {
-                                                                if v1499 == v1580 {
-                                                                    if v1500 == v1581 {
-                                                                        if v1501.1 == v1579 {
-                                                                            let v1582 = &constructor_sink_load_to_reg_mem_imm(ctx, v1574);
-                                                                            let v1583 = &constructor_to_amode(ctx, v1580, v1579, v1581);
-                                                                            let v1584 = constructor_put_in_gpr(ctx, v1570.1);
-                                                                            let v1585 = &constructor_x64_add_mem(ctx, v1567, v1583, v1584);
-                                                                            let v1586 = constructor_side_effect(ctx, v1585);
-                                                                            // Rule at src/isa/x64/lower.isle line 2995.
-                                                                            return Some(v1586);
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                                let v1587 = &C::sinkable_load(ctx, v1570.1);
-                                                if let Some(v1588) = v1587 {
-                                                    let v1589 = C::def_inst(ctx, v1570.1);
-                                                    if let Some(v1590) = v1589 {
-                                                        let v1591 = &C::inst_data(ctx, v1590);
-                                                        if let &InstructionData::Load {
-                                                            opcode: ref v1592,
-                                                            arg: v1593,
-                                                            flags: v1594,
-                                                            offset: v1595,
-                                                        } = v1591
-                                                        {
-                                                            if let &Opcode::Load = v1592 {
-                                                                if v1499 == v1594 {
-                                                                    if v1500 == v1595 {
-                                                                        if v1501.1 == v1593 {
-                                                                            let v1596 = &constructor_sink_load_to_reg_mem_imm(ctx, v1588);
-                                                                            let v1597 = &constructor_to_amode(ctx, v1594, v1593, v1595);
-                                                                            let v1598 = constructor_put_in_gpr(ctx, v1570.0);
-                                                                            let v1599 = &constructor_x64_add_mem(ctx, v1567, v1597, v1598);
-                                                                            let v1600 = constructor_side_effect(ctx, v1599);
-                                                                            // Rule at src/isa/x64/lower.isle line 3009.
-                                                                            return Some(v1600);
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                        &Opcode::Isub => {
-                                            let v1547 = C::value_type(ctx, v1546);
-                                            let v1566 = C::ty_32_or_64(ctx, v1547);
-                                            if let Some(v1567) = v1566 {
-                                                let v1570 = C::unpack_value_array_2(ctx, v1569);
-                                                let v1573 = &C::sinkable_load(ctx, v1570.0);
-                                                if let Some(v1574) = v1573 {
-                                                    let v1575 = C::def_inst(ctx, v1570.0);
-                                                    if let Some(v1576) = v1575 {
-                                                        let v1577 = &C::inst_data(ctx, v1576);
-                                                        if let &InstructionData::Load {
-                                                            opcode: ref v1578,
-                                                            arg: v1579,
-                                                            flags: v1580,
-                                                            offset: v1581,
-                                                        } = v1577
-                                                        {
-                                                            if let &Opcode::Load = v1578 {
-                                                                if v1499 == v1580 {
-                                                                    if v1500 == v1581 {
-                                                                        if v1501.1 == v1579 {
-                                                                            let v1582 = &constructor_sink_load_to_reg_mem_imm(ctx, v1574);
-                                                                            let v1583 = &constructor_to_amode(ctx, v1580, v1579, v1581);
-                                                                            let v1584 = constructor_put_in_gpr(ctx, v1570.1);
-                                                                            let v1601 = &constructor_x64_sub_mem(ctx, v1567, v1583, v1584);
-                                                                            let v1602 = constructor_side_effect(ctx, v1601);
-                                                                            // Rule at src/isa/x64/lower.isle line 3023.
-                                                                            return Some(v1602);
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                        &Opcode::Band => {
-                                            let v1547 = C::value_type(ctx, v1546);
-                                            let v1566 = C::ty_32_or_64(ctx, v1547);
-                                            if let Some(v1567) = v1566 {
-                                                let v1570 = C::unpack_value_array_2(ctx, v1569);
-                                                let v1573 = &C::sinkable_load(ctx, v1570.0);
-                                                if let Some(v1574) = v1573 {
-                                                    let v1575 = C::def_inst(ctx, v1570.0);
-                                                    if let Some(v1576) = v1575 {
-                                                        let v1577 = &C::inst_data(ctx, v1576);
-                                                        if let &InstructionData::Load {
-                                                            opcode: ref v1578,
-                                                            arg: v1579,
-                                                            flags: v1580,
-                                                            offset: v1581,
-                                                        } = v1577
-                                                        {
-                                                            if let &Opcode::Load = v1578 {
-                                                                if v1499 == v1580 {
-                                                                    if v1500 == v1581 {
-                                                                        if v1501.1 == v1579 {
-                                                                            let v1582 = &constructor_sink_load_to_reg_mem_imm(ctx, v1574);
-                                                                            let v1583 = &constructor_to_amode(ctx, v1580, v1579, v1581);
-                                                                            let v1584 = constructor_put_in_gpr(ctx, v1570.1);
-                                                                            let v1603 = &constructor_x64_and_mem(ctx, v1567, v1583, v1584);
-                                                                            let v1604 = constructor_side_effect(ctx, v1603);
-                                                                            // Rule at src/isa/x64/lower.isle line 3037.
-                                                                            return Some(v1604);
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                                let v1587 = &C::sinkable_load(ctx, v1570.1);
-                                                if let Some(v1588) = v1587 {
-                                                    let v1589 = C::def_inst(ctx, v1570.1);
-                                                    if let Some(v1590) = v1589 {
-                                                        let v1591 = &C::inst_data(ctx, v1590);
-                                                        if let &InstructionData::Load {
-                                                            opcode: ref v1592,
-                                                            arg: v1593,
-                                                            flags: v1594,
-                                                            offset: v1595,
-                                                        } = v1591
-                                                        {
-                                                            if let &Opcode::Load = v1592 {
-                                                                if v1499 == v1594 {
-                                                                    if v1500 == v1595 {
-                                                                        if v1501.1 == v1593 {
-                                                                            let v1596 = &constructor_sink_load_to_reg_mem_imm(ctx, v1588);
-                                                                            let v1597 = &constructor_to_amode(ctx, v1594, v1593, v1595);
-                                                                            let v1598 = constructor_put_in_gpr(ctx, v1570.0);
-                                                                            let v1605 = &constructor_x64_and_mem(ctx, v1567, v1597, v1598);
-                                                                            let v1606 = constructor_side_effect(ctx, v1605);
-                                                                            // Rule at src/isa/x64/lower.isle line 3051.
-                                                                            return Some(v1606);
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                        &Opcode::Bor => {
-                                            let v1547 = C::value_type(ctx, v1546);
-                                            let v1566 = C::ty_32_or_64(ctx, v1547);
-                                            if let Some(v1567) = v1566 {
-                                                let v1570 = C::unpack_value_array_2(ctx, v1569);
-                                                let v1573 = &C::sinkable_load(ctx, v1570.0);
-                                                if let Some(v1574) = v1573 {
-                                                    let v1575 = C::def_inst(ctx, v1570.0);
-                                                    if let Some(v1576) = v1575 {
-                                                        let v1577 = &C::inst_data(ctx, v1576);
-                                                        if let &InstructionData::Load {
-                                                            opcode: ref v1578,
-                                                            arg: v1579,
-                                                            flags: v1580,
-                                                            offset: v1581,
-                                                        } = v1577
-                                                        {
-                                                            if let &Opcode::Load = v1578 {
-                                                                if v1499 == v1580 {
-                                                                    if v1500 == v1581 {
-                                                                        if v1501.1 == v1579 {
-                                                                            let v1582 = &constructor_sink_load_to_reg_mem_imm(ctx, v1574);
-                                                                            let v1583 = &constructor_to_amode(ctx, v1580, v1579, v1581);
-                                                                            let v1584 = constructor_put_in_gpr(ctx, v1570.1);
-                                                                            let v1607 = &constructor_x64_or_mem(ctx, v1567, v1583, v1584);
-                                                                            let v1608 = constructor_side_effect(ctx, v1607);
-                                                                            // Rule at src/isa/x64/lower.isle line 3065.
-                                                                            return Some(v1608);
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                                let v1587 = &C::sinkable_load(ctx, v1570.1);
-                                                if let Some(v1588) = v1587 {
-                                                    let v1589 = C::def_inst(ctx, v1570.1);
-                                                    if let Some(v1590) = v1589 {
-                                                        let v1591 = &C::inst_data(ctx, v1590);
-                                                        if let &InstructionData::Load {
-                                                            opcode: ref v1592,
-                                                            arg: v1593,
-                                                            flags: v1594,
-                                                            offset: v1595,
-                                                        } = v1591
-                                                        {
-                                                            if let &Opcode::Load = v1592 {
-                                                                if v1499 == v1594 {
-                                                                    if v1500 == v1595 {
-                                                                        if v1501.1 == v1593 {
-                                                                            let v1596 = &constructor_sink_load_to_reg_mem_imm(ctx, v1588);
-                                                                            let v1597 = &constructor_to_amode(ctx, v1594, v1593, v1595);
-                                                                            let v1598 = constructor_put_in_gpr(ctx, v1570.0);
-                                                                            let v1609 = &constructor_x64_or_mem(ctx, v1567, v1597, v1598);
-                                                                            let v1610 = constructor_side_effect(ctx, v1609);
-                                                                            // Rule at src/isa/x64/lower.isle line 3079.
-                                                                            return Some(v1610);
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                        &Opcode::Bxor => {
-                                            let v1547 = C::value_type(ctx, v1546);
-                                            let v1566 = C::ty_32_or_64(ctx, v1547);
-                                            if let Some(v1567) = v1566 {
-                                                let v1570 = C::unpack_value_array_2(ctx, v1569);
-                                                let v1573 = &C::sinkable_load(ctx, v1570.0);
-                                                if let Some(v1574) = v1573 {
-                                                    let v1575 = C::def_inst(ctx, v1570.0);
-                                                    if let Some(v1576) = v1575 {
-                                                        let v1577 = &C::inst_data(ctx, v1576);
-                                                        if let &InstructionData::Load {
-                                                            opcode: ref v1578,
-                                                            arg: v1579,
-                                                            flags: v1580,
-                                                            offset: v1581,
-                                                        } = v1577
-                                                        {
-                                                            if let &Opcode::Load = v1578 {
-                                                                if v1499 == v1580 {
-                                                                    if v1500 == v1581 {
-                                                                        if v1501.1 == v1579 {
-                                                                            let v1582 = &constructor_sink_load_to_reg_mem_imm(ctx, v1574);
-                                                                            let v1583 = &constructor_to_amode(ctx, v1580, v1579, v1581);
-                                                                            let v1584 = constructor_put_in_gpr(ctx, v1570.1);
-                                                                            let v1611 = &constructor_x64_xor_mem(ctx, v1567, v1583, v1584);
-                                                                            let v1612 = constructor_side_effect(ctx, v1611);
-                                                                            // Rule at src/isa/x64/lower.isle line 3093.
-                                                                            return Some(v1612);
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                                let v1587 = &C::sinkable_load(ctx, v1570.1);
-                                                if let Some(v1588) = v1587 {
-                                                    let v1589 = C::def_inst(ctx, v1570.1);
-                                                    if let Some(v1590) = v1589 {
-                                                        let v1591 = &C::inst_data(ctx, v1590);
-                                                        if let &InstructionData::Load {
-                                                            opcode: ref v1592,
-                                                            arg: v1593,
-                                                            flags: v1594,
-                                                            offset: v1595,
-                                                        } = v1591
-                                                        {
-                                                            if let &Opcode::Load = v1592 {
-                                                                if v1499 == v1594 {
-                                                                    if v1500 == v1595 {
-                                                                        if v1501.1 == v1593 {
-                                                                            let v1596 = &constructor_sink_load_to_reg_mem_imm(ctx, v1588);
-                                                                            let v1597 = &constructor_to_amode(ctx, v1594, v1593, v1595);
-                                                                            let v1598 = constructor_put_in_gpr(ctx, v1570.0);
-                                                                            let v1613 = &constructor_x64_xor_mem(ctx, v1567, v1597, v1598);
-                                                                            let v1614 = constructor_side_effect(ctx, v1613);
-                                                                            // Rule at src/isa/x64/lower.isle line 3107.
-                                                                            return Some(v1614);
-                                                                        }
-                                                                    }
-                                                                }
-                                                            }
-                                                        }
-                                                    }
-                                                }
-                                            }
-                                        }
-                                        _ => {}
-                                    }
-                                }
-                                &InstructionData::BinaryImm8 {
-                                    opcode: ref v1549,
-                                    arg: v1550,
-                                    imm: v1551,
-                                } => {
-                                    if let &Opcode::Extractlane = v1549 {
-                                        let v1547 = C::value_type(ctx, v1546);
-                                        match v1547 {
-                                            I8 => {
-                                                let v436 = C::use_sse41(ctx);
-                                                if v436 == true {
-                                                    let v1508 = &constructor_to_amode(
-                                                        ctx, v1499, v1501.1, v1500,
-                                                    );
-                                                    let v1509 =
-                                                        &C::amode_to_synthetic_amode(ctx, v1508);
-                                                    let v1553 = constructor_put_in_xmm(ctx, v1550);
-                                                    let v1552 = C::u8_from_uimm8(ctx, v1551);
-                                                    let v1558 = &constructor_x64_pextrb_store(
-                                                        ctx, v1509, v1553, v1552,
-                                                    );
-                                                    let v1559 = constructor_side_effect(ctx, v1558);
-                                                    // Rule at src/isa/x64/lower.isle line 2963.
-                                                    return Some(v1559);
-                                                }
-                                            }
-                                            I16 => {
-                                                let v436 = C::use_sse41(ctx);
-                                                if v436 == true {
-                                                    let v1508 = &constructor_to_amode(
-                                                        ctx, v1499, v1501.1, v1500,
-                                                    );
-                                                    let v1509 =
-                                                        &C::amode_to_synthetic_amode(ctx, v1508);
-                                                    let v1553 = constructor_put_in_xmm(ctx, v1550);
-                                                    let v1552 = C::u8_from_uimm8(ctx, v1551);
-                                                    let v1560 = &constructor_x64_pextrw_store(
-                                                        ctx, v1509, v1553, v1552,
-                                                    );
-                                                    let v1561 = constructor_side_effect(ctx, v1560);
-                                                    // Rule at src/isa/x64/lower.isle line 2970.
-                                                    return Some(v1561);
-                                                }
-                                            }
-                                            I32 => {
-                                                let v436 = C::use_sse41(ctx);
-                                                if v436 == true {
-                                                    let v1508 = &constructor_to_amode(
-                                                        ctx, v1499, v1501.1, v1500,
-                                                    );
-                                                    let v1509 =
-                                                        &C::amode_to_synthetic_amode(ctx, v1508);
-                                                    let v1553 = constructor_put_in_xmm(ctx, v1550);
-                                                    let v1552 = C::u8_from_uimm8(ctx, v1551);
-                                                    let v1562 = &constructor_x64_pextrd_store(
-                                                        ctx, v1509, v1553, v1552,
-                                                    );
-                                                    let v1563 = constructor_side_effect(ctx, v1562);
-                                                    // Rule at src/isa/x64/lower.isle line 2977.
-                                                    return Some(v1563);
-                                                }
-                                            }
-                                            I64 => {
-                                                let v436 = C::use_sse41(ctx);
-                                                if v436 == true {
-                                                    let v1508 = &constructor_to_amode(
-                                                        ctx, v1499, v1501.1, v1500,
-                                                    );
-                                                    let v1509 =
-                                                        &C::amode_to_synthetic_amode(ctx, v1508);
-                                                    let v1553 = constructor_put_in_xmm(ctx, v1550);
-                                                    let v1552 = C::u8_from_uimm8(ctx, v1551);
-                                                    let v1564 = &constructor_x64_pextrq_store(
-                                                        ctx, v1509, v1553, v1552,
-                                                    );
-                                                    let v1565 = constructor_side_effect(ctx, v1564);
-                                                    // Rule at src/isa/x64/lower.isle line 2984.
-                                                    return Some(v1565);
-                                                }
-                                            }
-                                            F32 => {
-                                                let v1552 = C::u8_from_uimm8(ctx, v1551);
-                                                if v1552 == 0x0 {
-                                                    let v1508 = &constructor_to_amode(
-                                                        ctx, v1499, v1501.1, v1500,
-                                                    );
-                                                    let v1509 =
-                                                        &C::amode_to_synthetic_amode(ctx, v1508);
-                                                    let v1553 = constructor_put_in_xmm(ctx, v1550);
-                                                    let v1554 = &constructor_x64_movss_store(
-                                                        ctx, v1509, v1553,
-                                                    );
-                                                    let v1555 = constructor_side_effect(ctx, v1554);
-                                                    // Rule at src/isa/x64/lower.isle line 2951.
-                                                    return Some(v1555);
-                                                }
-                                            }
-                                            F64 => {
-                                                let v1552 = C::u8_from_uimm8(ctx, v1551);
-                                                if v1552 == 0x0 {
-                                                    let v1508 = &constructor_to_amode(
-                                                        ctx, v1499, v1501.1, v1500,
-                                                    );
-                                                    let v1509 =
-                                                        &C::amode_to_synthetic_amode(ctx, v1508);
-                                                    let v1553 = constructor_put_in_xmm(ctx, v1550);
-                                                    let v1556 = &constructor_x64_movsd_store(
-                                                        ctx, v1509, v1553,
-                                                    );
-                                                    let v1557 = constructor_side_effect(ctx, v1556);
-                                                    // Rule at src/isa/x64/lower.isle line 2957.
-                                                    return Some(v1557);
-                                                }
-                                            }
-                                            _ => {}
-                                        }
-                                    }
-                                }
-                                _ => {}
-                            }
-                        }
-                    }
-                    let v1504 = C::value_type(ctx, v1501.0);
-                    match v1504 {
-                        I128 => {
-                            let v1532 = C::put_in_regs(ctx, v1501.0);
-                            let v1533 = constructor_value_regs_get_gpr(ctx, v1532, 0x0);
-                            let v1534 = constructor_value_regs_get_gpr(ctx, v1532, 0x1);
-                            let v1535 = &constructor_to_amode(ctx, v1499, v1501.1, v1500);
-                            let v1536 = &C::amode_offset(ctx, v1535, 0x8);
-                            let v1537 = &C::amode_to_synthetic_amode(ctx, v1535);
-                            let v1538 = &constructor_x64_movrm(ctx, I64, v1537, v1533);
-                            let v1539 = &C::amode_to_synthetic_amode(ctx, v1536);
-                            let v1540 = &constructor_x64_movrm(ctx, I64, v1539, v1534);
-                            let v1541 = &constructor_side_effect_concat(ctx, v1538, v1540);
-                            let v1542 = constructor_side_effect(ctx, v1541);
-                            // Rule at src/isa/x64/lower.isle line 2932.
-                            return Some(v1542);
-                        }
-                        F32 => {
-                            let v1508 = &constructor_to_amode(ctx, v1499, v1501.1, v1500);
-                            let v1509 = &C::amode_to_synthetic_amode(ctx, v1508);
-                            let v1519 = constructor_put_in_xmm(ctx, v1501.0);
-                            let v1520 = &constructor_x64_movss_store(ctx, v1509, v1519);
-                            let v1521 = constructor_side_effect(ctx, v1520);
-                            // Rule at src/isa/x64/lower.isle line 2892.
-                            return Some(v1521);
-                        }
-                        F64 => {
-                            let v1508 = &constructor_to_amode(ctx, v1499, v1501.1, v1500);
-                            let v1509 = &C::amode_to_synthetic_amode(ctx, v1508);
-                            let v1519 = constructor_put_in_xmm(ctx, v1501.0);
-                            let v1522 = &constructor_x64_movsd_store(ctx, v1509, v1519);
-                            let v1523 = constructor_side_effect(ctx, v1522);
-                            // Rule at src/isa/x64/lower.isle line 2900.
-                            return Some(v1523);
-                        }
-                        F32X4 => {
-                            let v1508 = &constructor_to_amode(ctx, v1499, v1501.1, v1500);
-                            let v1509 = &C::amode_to_synthetic_amode(ctx, v1508);
-                            let v1519 = constructor_put_in_xmm(ctx, v1501.0);
-                            let v1524 = &constructor_x64_movups_store(ctx, v1509, v1519);
-                            let v1525 = constructor_side_effect(ctx, v1524);
-                            // Rule at src/isa/x64/lower.isle line 2908.
-                            return Some(v1525);
-                        }
-                        F64X2 => {
-                            let v1508 = &constructor_to_amode(ctx, v1499, v1501.1, v1500);
-                            let v1509 = &C::amode_to_synthetic_amode(ctx, v1508);
-                            let v1519 = constructor_put_in_xmm(ctx, v1501.0);
-                            let v1526 = &constructor_x64_movupd_store(ctx, v1509, v1519);
-                            let v1527 = constructor_side_effect(ctx, v1526);
-                            // Rule at src/isa/x64/lower.isle line 2916.
-                            return Some(v1527);
-                        }
-                        _ => {}
-                    }
-                    let v1528 = C::ty_vec128_int(ctx, v1504);
-                    if let Some(v1529) = v1528 {
-                        let v1508 = &constructor_to_amode(ctx, v1499, v1501.1, v1500);
-                        let v1509 = &C::amode_to_synthetic_amode(ctx, v1508);
-                        let v1519 = constructor_put_in_xmm(ctx, v1501.0);
-                        let v1530 = &constructor_x64_movdqu_store(ctx, v1509, v1519);
-                        let v1531 = constructor_side_effect(ctx, v1530);
-                        // Rule at src/isa/x64/lower.isle line 2924.
-                        return Some(v1531);
-                    }
-                    let v1505 = &C::type_register_class(ctx, v1504);
-                    if let Some(v1506) = v1505 {
-                        if let &RegisterClass::Gpr {
-                            single_register: v1507,
-                        } = v1506
-                        {
-                            let v1508 = &constructor_to_amode(ctx, v1499, v1501.1, v1500);
-                            let v1509 = &C::amode_to_synthetic_amode(ctx, v1508);
-                            let v1510 = constructor_put_in_gpr(ctx, v1501.0);
-                            let v1511 = &constructor_x64_movrm(ctx, v1504, v1509, v1510);
-                            let v1512 = constructor_side_effect(ctx, v1511);
-                            // Rule at src/isa/x64/lower.isle line 2873.
-                            return Some(v1512);
-                        }
-                    }
-                }
-                &Opcode::Istore8 => {
-                    let v1501 = C::unpack_value_array_2(ctx, v1498);
-                    let v1508 = &constructor_to_amode(ctx, v1499, v1501.1, v1500);
-                    let v1509 = &C::amode_to_synthetic_amode(ctx, v1508);
-                    let v1510 = constructor_put_in_gpr(ctx, v1501.0);
-                    let v1513 = &constructor_x64_movrm(ctx, I8, v1509, v1510);
-                    let v1514 = constructor_side_effect(ctx, v1513);
-                    // Rule at src/isa/x64/lower.isle line 2881.
-                    return Some(v1514);
-                }
-                &Opcode::Istore16 => {
-                    let v1501 = C::unpack_value_array_2(ctx, v1498);
-                    let v1508 = &constructor_to_amode(ctx, v1499, v1501.1, v1500);
-                    let v1509 = &C::amode_to_synthetic_amode(ctx, v1508);
-                    let v1510 = constructor_put_in_gpr(ctx, v1501.0);
-                    let v1515 = &constructor_x64_movrm(ctx, I16, v1509, v1510);
-                    let v1516 = constructor_side_effect(ctx, v1515);
-                    // Rule at src/isa/x64/lower.isle line 2884.
-                    return Some(v1516);
-                }
-                &Opcode::Istore32 => {
-                    let v1501 = C::unpack_value_array_2(ctx, v1498);
-                    let v1508 = &constructor_to_amode(ctx, v1499, v1501.1, v1500);
-                    let v1509 = &C::amode_to_synthetic_amode(ctx, v1508);
-                    let v1510 = constructor_put_in_gpr(ctx, v1501.0);
-                    let v1517 = &constructor_x64_movrm(ctx, I32, v1509, v1510);
-                    let v1518 = constructor_side_effect(ctx, v1517);
-                    // Rule at src/isa/x64/lower.isle line 2887.
-                    return Some(v1518);
-                }
-                _ => {}
-            }
-        }
-        &InstructionData::StoreNoOffset {
-            opcode: ref v1648,
-            args: ref v1649,
-            flags: v1650,
-        } => {
-            if let &Opcode::AtomicStore = v1648 {
-                let v1651 = C::unpack_value_array_2(ctx, v1649);
-                let v1654 = C::value_type(ctx, v1651.0);
-                let v1655 = C::fits_in_64(ctx, v1654);
-                if let Some(v1656) = v1655 {
-                    let v1657 = C::ty_int(ctx, v1654);
-                    if let Some(v1658) = v1657 {
-                        let v48 = C::zero_offset(ctx);
-                        let v1659 = &constructor_to_amode(ctx, v1650, v1651.1, v48);
-                        let v1660 = &C::amode_to_synthetic_amode(ctx, v1659);
-                        let v1661 = constructor_put_in_gpr(ctx, v1651.0);
-                        let v1662 = &constructor_x64_movrm(ctx, v1656, v1660, v1661);
-                        let v1663 = &constructor_x64_mfence(ctx);
-                        let v1664 = &constructor_side_effect_concat(ctx, v1662, v1663);
-                        let v1665 = constructor_side_effect(ctx, v1664);
-                        // Rule at src/isa/x64/lower.isle line 3154.
-                        return Some(v1665);
-                    }
-                }
-            }
-        }
-        &InstructionData::Ternary {
-            opcode: ref v630,
-            args: ref v631,
-        } => {
-            match v630 {
-                &Opcode::Select => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v632 = C::unpack_value_array_3(ctx, v631);
-                        let v949 = C::maybe_uextend(ctx, v632.0);
-                        if let Some(v950) = v949 {
-                            let v951 = C::def_inst(ctx, v950);
-                            if let Some(v952) = v951 {
-                                let v953 = &C::inst_data(ctx, v952);
-                                match v953 {
-                                    &InstructionData::FloatCompare {
-                                        opcode: ref v954,
-                                        args: ref v955,
-                                        cond: ref v956,
-                                    } => {
-                                        if let &Opcode::Fcmp = v954 {
-                                            if let &FloatCC::Equal = v956 {
-                                                let v957 = C::unpack_value_array_2(ctx, v955);
-                                                let v963 = &constructor_emit_fcmp(
-                                                    ctx,
-                                                    &FloatCC::NotEqual,
-                                                    v957.0,
-                                                    v957.1,
-                                                );
-                                                let v3 = C::value_type(ctx, v2);
-                                                let v964 = constructor_lower_select_fcmp(
-                                                    ctx, v3, v963, v632.2, v632.1,
-                                                );
-                                                // Rule at src/isa/x64/lower.isle line 1992.
-                                                return Some(v964);
-                                            }
-                                            let v957 = C::unpack_value_array_2(ctx, v955);
-                                            let v960 =
-                                                &constructor_emit_fcmp(ctx, v956, v957.0, v957.1);
-                                            let v3 = C::value_type(ctx, v2);
-                                            let v961 = constructor_lower_select_fcmp(
-                                                ctx, v3, v960, v632.1, v632.2,
-                                            );
-                                            // Rule at src/isa/x64/lower.isle line 1990.
-                                            return Some(v961);
-                                        }
-                                    }
-                                    &InstructionData::IntCompare {
-                                        opcode: ref v965,
-                                        args: ref v966,
-                                        cond: ref v967,
-                                    } => {
-                                        if let &Opcode::Icmp = v965 {
-                                            let v968 = C::unpack_value_array_2(ctx, v966);
-                                            let v971 = C::value_type(ctx, v968.0);
-                                            let v972 = C::fits_in_64(ctx, v971);
-                                            if let Some(v973) = v972 {
-                                                let v974 = &C::raw_operand_size_of_type(ctx, v973);
-                                                let v975 =
-                                                    &constructor_put_in_gpr_mem_imm(ctx, v968.1);
-                                                let v976 = constructor_put_in_gpr(ctx, v968.0);
-                                                let v977 =
-                                                    &constructor_x64_cmp(ctx, v974, v975, v976);
-                                                let v978 = &C::intcc_to_cc(ctx, v967);
-                                                let v3 = C::value_type(ctx, v2);
-                                                let v979 = &constructor_cmove_from_values(
-                                                    ctx, v3, v978, v632.1, v632.2,
-                                                );
-                                                let v980 = constructor_with_flags(ctx, v977, v979);
-                                                let v981 = C::output(ctx, v980);
-                                                // Rule at src/isa/x64/lower.isle line 2006.
-                                                return Some(v981);
-                                            }
-                                        }
-                                    }
-                                    _ => {}
-                                }
-                            }
-                        }
-                        let v982 = C::value_type(ctx, v632.0);
-                        let v983 = C::fits_in_64(ctx, v982);
-                        if let Some(v984) = v983 {
-                            let v985 = &C::raw_operand_size_of_type(ctx, v984);
-                            let v986 = constructor_put_in_gpr(ctx, v632.0);
-                            let v987 = &C::gpr_to_gpr_mem_imm(ctx, v986);
-                            let v988 = &constructor_x64_test(ctx, v985, v987, v986);
-                            let v3 = C::value_type(ctx, v2);
-                            let v990 =
-                                &constructor_cmove_from_values(ctx, v3, &CC::NZ, v632.1, v632.2);
-                            let v991 = constructor_with_flags(ctx, v988, v990);
-                            let v992 = C::output(ctx, v991);
-                            // Rule at src/isa/x64/lower.isle line 2013.
-                            return Some(v992);
-                        }
-                        if v982 == I128 {
-                            let v994 = C::put_in_regs(ctx, v632.0);
-                            let v995 = &constructor_cmp_zero_i128(ctx, &CC::Z, v994);
-                            let v996 = constructor_select_icmp(ctx, v995, v632.1, v632.2);
-                            let v997 = C::output(ctx, v996);
-                            // Rule at src/isa/x64/lower.isle line 2020.
-                            return Some(v997);
-                        }
-                    }
-                }
-                &Opcode::SelectSpectreGuard => {
-                    let v632 = C::unpack_value_array_3(ctx, v631);
-                    let v1721 = C::def_inst(ctx, v632.0);
-                    if let Some(v1722) = v1721 {
-                        let v1723 = &C::inst_data(ctx, v1722);
-                        if let &InstructionData::IntCompare {
-                            opcode: ref v1724,
-                            args: ref v1725,
-                            cond: ref v1726,
-                        } = v1723
-                        {
-                            if let &Opcode::Icmp = v1724 {
-                                let v1727 = C::unpack_value_array_2(ctx, v1725);
-                                let v1730 = &constructor_emit_cmp(ctx, v1726, v1727.0, v1727.1);
-                                let v1731 = constructor_select_icmp(ctx, v1730, v632.1, v632.2);
-                                let v1732 = C::output(ctx, v1731);
-                                // Rule at src/isa/x64/lower.isle line 3273.
-                                return Some(v1732);
-                            }
-                        }
-                    }
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v982 = C::value_type(ctx, v632.0);
-                        let v983 = C::fits_in_64(ctx, v982);
-                        if let Some(v984) = v983 {
-                            let v985 = &C::raw_operand_size_of_type(ctx, v984);
-                            let v986 = constructor_put_in_gpr(ctx, v632.0);
-                            let v987 = &C::gpr_to_gpr_mem_imm(ctx, v986);
-                            let v988 = &constructor_x64_test(ctx, v985, v987, v986);
-                            let v3 = C::value_type(ctx, v2);
-                            let v990 =
-                                &constructor_cmove_from_values(ctx, v3, &CC::NZ, v632.1, v632.2);
-                            let v991 = constructor_with_flags(ctx, v988, v990);
-                            let v992 = C::output(ctx, v991);
-                            // Rule at src/isa/x64/lower.isle line 3276.
-                            return Some(v992);
-                        }
-                        if v982 == I128 {
-                            let v994 = C::put_in_regs(ctx, v632.0);
-                            let v995 = &constructor_cmp_zero_i128(ctx, &CC::Z, v994);
-                            let v996 = constructor_select_icmp(ctx, v995, v632.1, v632.2);
-                            let v997 = C::output(ctx, v996);
-                            // Rule at src/isa/x64/lower.isle line 3281.
-                            return Some(v997);
-                        }
-                    }
-                }
-                &Opcode::Bitselect => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v64 = C::multi_lane(ctx, v3);
-                        if let Some(v65) = v64 {
-                            let v436 = C::use_sse41(ctx);
-                            if v436 == true {
-                                let v632 = C::unpack_value_array_3(ctx, v631);
-                                let v645 = constructor_all_ones_or_all_zeros(ctx, v632.0);
-                                if let Some(v646) = v645 {
-                                    let v636 = constructor_put_in_xmm(ctx, v632.0);
-                                    let v647 = &C::put_in_xmm_mem(ctx, v632.1);
-                                    let v648 = constructor_put_in_xmm(ctx, v632.2);
-                                    let v649 = constructor_x64_blend(ctx, v3, v636, v647, v648);
-                                    let v650 = constructor_output_xmm(ctx, v649);
-                                    // Rule at src/isa/x64/lower.isle line 1367.
-                                    return Some(v650);
-                                }
-                            }
-                            let v632 = C::unpack_value_array_3(ctx, v631);
-                            let v636 = constructor_put_in_xmm(ctx, v632.0);
-                            let v637 = constructor_put_in_xmm(ctx, v632.1);
-                            let v638 = &C::xmm_to_xmm_mem(ctx, v636);
-                            let v639 = constructor_sse_and(ctx, v3, v637, v638);
-                            let v640 = &C::put_in_xmm_mem(ctx, v632.2);
-                            let v641 = constructor_sse_and_not(ctx, v3, v636, v640);
-                            let v642 = &C::xmm_to_xmm_mem(ctx, v639);
-                            let v643 = constructor_sse_or(ctx, v3, v641, v642);
-                            let v644 = constructor_output_xmm(ctx, v643);
-                            // Rule at src/isa/x64/lower.isle line 1353.
-                            return Some(v644);
-                        }
-                    }
-                }
-                &Opcode::X86Blendv => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            I8X16 => {
-                                let v436 = C::use_sse41(ctx);
-                                if v436 == true {
-                                    let v632 = C::unpack_value_array_3(ctx, v631);
-                                    let v651 = constructor_put_in_xmm(ctx, v632.2);
-                                    let v647 = &C::put_in_xmm_mem(ctx, v632.1);
-                                    let v652 = constructor_put_in_xmm(ctx, v632.0);
-                                    let v653 = constructor_x64_pblendvb(ctx, v651, v647, v652);
-                                    let v654 = constructor_output_xmm(ctx, v653);
-                                    // Rule at src/isa/x64/lower.isle line 1388.
-                                    return Some(v654);
-                                }
-                            }
-                            I32X4 => {
-                                let v436 = C::use_sse41(ctx);
-                                if v436 == true {
-                                    let v632 = C::unpack_value_array_3(ctx, v631);
-                                    let v651 = constructor_put_in_xmm(ctx, v632.2);
-                                    let v647 = &C::put_in_xmm_mem(ctx, v632.1);
-                                    let v652 = constructor_put_in_xmm(ctx, v632.0);
-                                    let v655 = constructor_x64_blendvps(ctx, v651, v647, v652);
-                                    let v656 = constructor_output_xmm(ctx, v655);
-                                    // Rule at src/isa/x64/lower.isle line 1393.
-                                    return Some(v656);
-                                }
-                            }
-                            I64X2 => {
-                                let v436 = C::use_sse41(ctx);
-                                if v436 == true {
-                                    let v632 = C::unpack_value_array_3(ctx, v631);
-                                    let v651 = constructor_put_in_xmm(ctx, v632.2);
-                                    let v647 = &C::put_in_xmm_mem(ctx, v632.1);
-                                    let v652 = constructor_put_in_xmm(ctx, v632.0);
-                                    let v657 = constructor_x64_blendvpd(ctx, v651, v647, v652);
-                                    let v658 = constructor_output_xmm(ctx, v657);
-                                    // Rule at src/isa/x64/lower.isle line 1398.
-                                    return Some(v658);
-                                }
-                            }
-                            _ => {}
-                        }
-                    }
-                }
-                &Opcode::Fma => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v1416 = C::use_fma(ctx);
-                        if v1416 == true {
-                            let v3 = C::value_type(ctx, v2);
-                            let v632 = C::unpack_value_array_3(ctx, v631);
-                            let v1417 = constructor_fmadd(ctx, v3, v632.0, v632.1, v632.2);
-                            let v1418 = constructor_output_xmm(ctx, v1417);
-                            // Rule at src/isa/x64/lower.isle line 2752.
-                            return Some(v1418);
-                        }
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            F32 => {
-                                let v632 = C::unpack_value_array_3(ctx, v631);
-                                let v1336 = C::put_in_reg(ctx, v632.0);
-                                let v1337 = C::put_in_reg(ctx, v632.1);
-                                let v1338 = C::put_in_reg(ctx, v632.2);
-                                let v1339 =
-                                    C::libcall_3(ctx, &LibCall::FmaF32, v1336, v1337, v1338);
-                                let v1340 = constructor_output_reg(ctx, v1339);
-                                // Rule at src/isa/x64/lower.isle line 2707.
-                                return Some(v1340);
-                            }
-                            F64 => {
-                                let v632 = C::unpack_value_array_3(ctx, v631);
-                                let v1336 = C::put_in_reg(ctx, v632.0);
-                                let v1337 = C::put_in_reg(ctx, v632.1);
-                                let v1338 = C::put_in_reg(ctx, v632.2);
-                                let v1342 =
-                                    C::libcall_3(ctx, &LibCall::FmaF64, v1336, v1337, v1338);
-                                let v1343 = constructor_output_reg(ctx, v1342);
-                                // Rule at src/isa/x64/lower.isle line 2709.
-                                return Some(v1343);
-                            }
-                            F32X4 => {
-                                let v632 = C::unpack_value_array_3(ctx, v631);
-                                let v636 = constructor_put_in_xmm(ctx, v632.0);
-                                let v637 = constructor_put_in_xmm(ctx, v632.1);
-                                let v648 = constructor_put_in_xmm(ctx, v632.2);
-                                let v1344 = C::xmm_to_reg(ctx, v636);
-                                let v1345 = C::xmm_to_reg(ctx, v637);
-                                let v1346 = C::xmm_to_reg(ctx, v648);
-                                let v1347 =
-                                    C::libcall_3(ctx, &LibCall::FmaF32, v1344, v1345, v1346);
-                                let v1348 = C::xmm_new(ctx, v1347);
-                                let v1349 = &C::xmm_to_xmm_mem(ctx, v636);
-                                let v1351 = constructor_x64_pshufd(ctx, v1349, 0x1);
-                                let v1352 = C::xmm_to_reg(ctx, v1351);
-                                let v1353 = &C::xmm_to_xmm_mem(ctx, v637);
-                                let v1354 = constructor_x64_pshufd(ctx, v1353, 0x1);
-                                let v1355 = C::xmm_to_reg(ctx, v1354);
-                                let v1356 = &C::xmm_to_xmm_mem(ctx, v648);
-                                let v1357 = constructor_x64_pshufd(ctx, v1356, 0x1);
-                                let v1358 = C::xmm_to_reg(ctx, v1357);
-                                let v1359 =
-                                    C::libcall_3(ctx, &LibCall::FmaF32, v1352, v1355, v1358);
-                                let v1360 = C::xmm_new(ctx, v1359);
-                                let v1361 = &C::xmm_to_xmm_mem(ctx, v636);
-                                let v1363 = constructor_x64_pshufd(ctx, v1361, 0x2);
-                                let v1364 = C::xmm_to_reg(ctx, v1363);
-                                let v1365 = &C::xmm_to_xmm_mem(ctx, v637);
-                                let v1366 = constructor_x64_pshufd(ctx, v1365, 0x2);
-                                let v1367 = C::xmm_to_reg(ctx, v1366);
-                                let v1368 = &C::xmm_to_xmm_mem(ctx, v648);
-                                let v1369 = constructor_x64_pshufd(ctx, v1368, 0x2);
-                                let v1370 = C::xmm_to_reg(ctx, v1369);
-                                let v1371 =
-                                    C::libcall_3(ctx, &LibCall::FmaF32, v1364, v1367, v1370);
-                                let v1372 = C::xmm_new(ctx, v1371);
-                                let v1373 = &C::xmm_to_xmm_mem(ctx, v636);
-                                let v1375 = constructor_x64_pshufd(ctx, v1373, 0x3);
-                                let v1376 = C::xmm_to_reg(ctx, v1375);
-                                let v1377 = &C::xmm_to_xmm_mem(ctx, v637);
-                                let v1378 = constructor_x64_pshufd(ctx, v1377, 0x3);
-                                let v1379 = C::xmm_to_reg(ctx, v1378);
-                                let v1380 = &C::xmm_to_xmm_mem(ctx, v648);
-                                let v1381 = constructor_x64_pshufd(ctx, v1380, 0x3);
-                                let v1382 = C::xmm_to_reg(ctx, v1381);
-                                let v1383 =
-                                    C::libcall_3(ctx, &LibCall::FmaF32, v1376, v1379, v1382);
-                                let v1384 = C::xmm_new(ctx, v1383);
-                                let v1386 = C::xmm_to_reg(ctx, v1360);
-                                let v1387 = &constructor_xmm_to_reg_mem(ctx, v1386);
-                                let v1388 = &C::xmm_mem_to_reg_mem(ctx, v1387);
-                                let v1389 =
-                                    constructor_vec_insert_lane(ctx, F32X4, v1348, v1388, 0x1);
-                                let v1390 = C::xmm_to_reg(ctx, v1372);
-                                let v1391 = &constructor_xmm_to_reg_mem(ctx, v1390);
-                                let v1392 = &C::xmm_mem_to_reg_mem(ctx, v1391);
-                                let v1393 =
-                                    constructor_vec_insert_lane(ctx, F32X4, v1389, v1392, 0x2);
-                                let v1394 = C::xmm_to_reg(ctx, v1384);
-                                let v1395 = &constructor_xmm_to_reg_mem(ctx, v1394);
-                                let v1396 = &C::xmm_mem_to_reg_mem(ctx, v1395);
-                                let v1397 =
-                                    constructor_vec_insert_lane(ctx, F32X4, v1393, v1396, 0x3);
-                                let v1398 = constructor_output_xmm(ctx, v1397);
-                                // Rule at src/isa/x64/lower.isle line 2712.
-                                return Some(v1398);
-                            }
-                            F64X2 => {
-                                let v632 = C::unpack_value_array_3(ctx, v631);
-                                let v636 = constructor_put_in_xmm(ctx, v632.0);
-                                let v637 = constructor_put_in_xmm(ctx, v632.1);
-                                let v648 = constructor_put_in_xmm(ctx, v632.2);
-                                let v1344 = C::xmm_to_reg(ctx, v636);
-                                let v1345 = C::xmm_to_reg(ctx, v637);
-                                let v1346 = C::xmm_to_reg(ctx, v648);
-                                let v1399 =
-                                    C::libcall_3(ctx, &LibCall::FmaF64, v1344, v1345, v1346);
-                                let v1400 = C::xmm_new(ctx, v1399);
-                                let v1349 = &C::xmm_to_xmm_mem(ctx, v636);
-                                let v1402 = constructor_x64_pshufd(ctx, v1349, 0xEE);
-                                let v1403 = C::xmm_to_reg(ctx, v1402);
-                                let v1353 = &C::xmm_to_xmm_mem(ctx, v637);
-                                let v1404 = constructor_x64_pshufd(ctx, v1353, 0xEE);
-                                let v1405 = C::xmm_to_reg(ctx, v1404);
-                                let v1356 = &C::xmm_to_xmm_mem(ctx, v648);
-                                let v1406 = constructor_x64_pshufd(ctx, v1356, 0xEE);
-                                let v1407 = C::xmm_to_reg(ctx, v1406);
-                                let v1408 =
-                                    C::libcall_3(ctx, &LibCall::FmaF64, v1403, v1405, v1407);
-                                let v1409 = C::xmm_new(ctx, v1408);
-                                let v1411 = C::xmm_to_reg(ctx, v1409);
-                                let v1412 = &constructor_xmm_to_reg_mem(ctx, v1411);
-                                let v1413 = &C::xmm_mem_to_reg_mem(ctx, v1412);
-                                let v1414 =
-                                    constructor_vec_insert_lane(ctx, F64X2, v1400, v1413, 0x1);
-                                let v1415 = constructor_output_xmm(ctx, v1414);
-                                // Rule at src/isa/x64/lower.isle line 2736.
-                                return Some(v1415);
-                            }
-                            _ => {}
-                        }
-                    }
-                }
-                _ => {}
-            }
-        }
-        &InstructionData::TernaryImm8 {
-            opcode: ref v659,
-            args: ref v660,
-            imm: v661,
-        } => {
-            if let &Opcode::Insertlane = v659 {
-                let v662 = C::unpack_value_array_2(ctx, v660);
-                let v667 = constructor_put_in_xmm(ctx, v662.0);
-                let v668 = &C::put_in_reg_mem(ctx, v662.1);
-                let v665 = C::value_type(ctx, v662.0);
-                let v666 = C::u8_from_uimm8(ctx, v661);
-                let v669 = constructor_vec_insert_lane(ctx, v665, v667, v668, v666);
-                let v670 = constructor_output_xmm(ctx, v669);
-                // Rule at src/isa/x64/lower.isle line 1405.
-                return Some(v670);
-            }
-        }
-        &InstructionData::Trap {
-            opcode: ref v729,
-            code: ref v730,
-        } => {
-            match v729 {
-                &Opcode::Trap => {
-                    let v731 = &constructor_x64_ud2(ctx, v730);
-                    let v732 = constructor_side_effect(ctx, v731);
-                    // Rule at src/isa/x64/lower.isle line 1708.
-                    return Some(v732);
-                }
-                &Opcode::ResumableTrap => {
-                    let v731 = &constructor_x64_ud2(ctx, v730);
-                    let v732 = constructor_side_effect(ctx, v731);
-                    // Rule at src/isa/x64/lower.isle line 1735.
-                    return Some(v732);
-                }
-                _ => {}
-            }
-        }
-        &InstructionData::Unary {
-            opcode: ref v375,
-            arg: v376,
-        } => {
-            match v375 {
-                &Opcode::Splat => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v64 = C::multi_lane(ctx, v3);
-                        if let Some(v65) = v64 {
-                            match v65.0 {
-                                0x20 => {
-                                    if v65.1 == 0x4 {
-                                        let v2322 = &C::sinkable_load(ctx, v376);
-                                        if let Some(v2323) = v2322 {
-                                            let v2387 = C::use_avx(ctx);
-                                            if v2387 == true {
-                                                let v2388 =
-                                                    &constructor_sink_load_to_xmm_mem(ctx, v2323);
-                                                let v2389 =
-                                                    constructor_x64_vbroadcastss(ctx, v2388);
-                                                let v2390 = constructor_output_xmm(ctx, v2389);
-                                                // Rule at src/isa/x64/lower.isle line 4452.
-                                                return Some(v2390);
-                                            }
-                                            let v2326 = &C::sink_load(ctx, v2323);
-                                            let v2327 = constructor_x64_movss_load(ctx, v2326);
-                                            let v2384 = &C::xmm_to_xmm_mem(ctx, v2327);
-                                            let v2385 =
-                                                constructor_x64_shufps(ctx, v2327, v2384, 0x0);
-                                            let v2386 = constructor_output_xmm(ctx, v2385);
-                                            // Rule at src/isa/x64/lower.isle line 4449.
-                                            return Some(v2386);
-                                        }
-                                    }
-                                }
-                                0x40 => {
-                                    if v65.1 == 0x2 {
-                                        let v520 = C::use_ssse3(ctx);
-                                        if v520 == true {
-                                            let v2322 = &C::sinkable_load(ctx, v376);
-                                            if let Some(v2323) = v2322 {
-                                                let v2388 =
-                                                    &constructor_sink_load_to_xmm_mem(ctx, v2323);
-                                                let v2398 = constructor_x64_movddup(ctx, v2388);
-                                                let v2399 = constructor_output_xmm(ctx, v2398);
-                                                // Rule at src/isa/x64/lower.isle line 4463.
-                                                return Some(v2399);
-                                            }
-                                        }
-                                    }
-                                }
-                                _ => {}
-                            }
-                        }
-                        match v3 {
-                            I8X16 => {
-                                let v2351 = &C::sinkable_load_exact(ctx, v376);
-                                if let Some(v2352) = v2351 {
-                                    let v2347 = C::use_avx2(ctx);
-                                    if v2347 == true {
-                                        let v2358 = &constructor_sink_load_to_xmm_mem(ctx, v2352);
-                                        let v2359 = constructor_x64_vpbroadcastb(ctx, v2358);
-                                        let v2360 = constructor_output_xmm(ctx, v2359);
-                                        // Rule at src/isa/x64/lower.isle line 4400.
-                                        return Some(v2360);
-                                    }
-                                    let v436 = C::use_sse41(ctx);
-                                    if v436 == true {
-                                        let v520 = C::use_ssse3(ctx);
-                                        if v520 == true {
-                                            let v2353 = constructor_xmm_uninit_value(ctx);
-                                            let v2354 =
-                                                &constructor_sink_load_to_gpr_mem(ctx, v2352);
-                                            let v2355 =
-                                                constructor_x64_pinsrb(ctx, v2353, v2354, 0x0);
-                                            let v893 = constructor_xmm_zero(ctx, I8X16);
-                                            let v894 = &C::xmm_to_xmm_mem(ctx, v893);
-                                            let v2356 = constructor_x64_pshufb(ctx, v2355, v894);
-                                            let v2357 = constructor_output_xmm(ctx, v2356);
-                                            // Rule at src/isa/x64/lower.isle line 4396.
-                                            return Some(v2357);
-                                        }
-                                    }
-                                }
-                                let v2347 = C::use_avx2(ctx);
-                                if v2347 == true {
-                                    let v377 = constructor_put_in_gpr(ctx, v376);
-                                    let v2342 = constructor_bitcast_gpr_to_xmm(ctx, I32, v377);
-                                    let v2348 = &C::xmm_to_xmm_mem(ctx, v2342);
-                                    let v2349 = constructor_x64_vpbroadcastb(ctx, v2348);
-                                    let v2350 = constructor_output_xmm(ctx, v2349);
-                                    // Rule at src/isa/x64/lower.isle line 4393.
-                                    return Some(v2350);
-                                }
-                                let v520 = C::use_ssse3(ctx);
-                                if v520 == true {
-                                    let v377 = constructor_put_in_gpr(ctx, v376);
-                                    let v2342 = constructor_bitcast_gpr_to_xmm(ctx, I32, v377);
-                                    let v2343 = constructor_xmm_zero(ctx, I8X16);
-                                    let v2344 = &C::xmm_to_xmm_mem(ctx, v2343);
-                                    let v2345 = constructor_x64_pshufb(ctx, v2342, v2344);
-                                    let v2346 = constructor_output_xmm(ctx, v2345);
-                                    // Rule at src/isa/x64/lower.isle line 4390.
-                                    return Some(v2346);
-                                }
-                                let v1740 = &constructor_put_in_gpr_mem(ctx, v376);
-                                let v2333 = constructor_x64_movd_to_xmm(ctx, v1740);
-                                let v2334 = &C::xmm_to_xmm_mem(ctx, v2333);
-                                let v2335 = constructor_x64_punpcklbw(ctx, v2333, v2334);
-                                let v2336 = &C::xmm_to_xmm_mem(ctx, v2335);
-                                let v2338 = constructor_x64_pshuflw(ctx, v2336, 0x0);
-                                let v2339 = &C::xmm_to_xmm_mem(ctx, v2338);
-                                let v2340 = constructor_x64_pshufd(ctx, v2339, 0x0);
-                                let v2341 = constructor_output_xmm(ctx, v2340);
-                                // Rule at src/isa/x64/lower.isle line 4387.
-                                return Some(v2341);
-                            }
-                            I16X8 => {
-                                let v2351 = &C::sinkable_load_exact(ctx, v376);
-                                if let Some(v2352) = v2351 {
-                                    let v2347 = C::use_avx2(ctx);
-                                    if v2347 == true {
-                                        let v2358 = &constructor_sink_load_to_xmm_mem(ctx, v2352);
-                                        let v2373 = constructor_x64_vpbroadcastw(ctx, v2358);
-                                        let v2374 = constructor_output_xmm(ctx, v2373);
-                                        // Rule at src/isa/x64/lower.isle line 4416.
-                                        return Some(v2374);
-                                    }
-                                    let v2353 = constructor_xmm_uninit_value(ctx);
-                                    let v2354 = &constructor_sink_load_to_gpr_mem(ctx, v2352);
-                                    let v2367 = constructor_x64_pinsrw(ctx, v2353, v2354, 0x0);
-                                    let v2368 = &C::xmm_to_xmm_mem(ctx, v2367);
-                                    let v2369 = constructor_x64_pshuflw(ctx, v2368, 0x0);
-                                    let v2370 = &C::xmm_to_xmm_mem(ctx, v2369);
-                                    let v2371 = constructor_x64_pshufd(ctx, v2370, 0x0);
-                                    let v2372 = constructor_output_xmm(ctx, v2371);
-                                    // Rule at src/isa/x64/lower.isle line 4414.
-                                    return Some(v2372);
-                                }
-                                let v2347 = C::use_avx2(ctx);
-                                if v2347 == true {
-                                    let v377 = constructor_put_in_gpr(ctx, v376);
-                                    let v2342 = constructor_bitcast_gpr_to_xmm(ctx, I32, v377);
-                                    let v2348 = &C::xmm_to_xmm_mem(ctx, v2342);
-                                    let v2365 = constructor_x64_vpbroadcastw(ctx, v2348);
-                                    let v2366 = constructor_output_xmm(ctx, v2365);
-                                    // Rule at src/isa/x64/lower.isle line 4411.
-                                    return Some(v2366);
-                                }
-                                let v377 = constructor_put_in_gpr(ctx, v376);
-                                let v2342 = constructor_bitcast_gpr_to_xmm(ctx, I32, v377);
-                                let v2348 = &C::xmm_to_xmm_mem(ctx, v2342);
-                                let v2361 = constructor_x64_pshuflw(ctx, v2348, 0x0);
-                                let v2362 = &C::xmm_to_xmm_mem(ctx, v2361);
-                                let v2363 = constructor_x64_pshufd(ctx, v2362, 0x0);
-                                let v2364 = constructor_output_xmm(ctx, v2363);
-                                // Rule at src/isa/x64/lower.isle line 4409.
-                                return Some(v2364);
-                            }
-                            I32X4 => {
-                                let v2347 = C::use_avx2(ctx);
-                                if v2347 == true {
-                                    let v377 = constructor_put_in_gpr(ctx, v376);
-                                    let v2342 = constructor_bitcast_gpr_to_xmm(ctx, I32, v377);
-                                    let v2348 = &C::xmm_to_xmm_mem(ctx, v2342);
-                                    let v2377 = constructor_x64_vpbroadcastd(ctx, v2348);
-                                    let v2378 = constructor_output_xmm(ctx, v2377);
-                                    // Rule at src/isa/x64/lower.isle line 4426.
-                                    return Some(v2378);
-                                }
-                                let v377 = constructor_put_in_gpr(ctx, v376);
-                                let v2342 = constructor_bitcast_gpr_to_xmm(ctx, I32, v377);
-                                let v2348 = &C::xmm_to_xmm_mem(ctx, v2342);
-                                let v2375 = constructor_x64_pshufd(ctx, v2348, 0x0);
-                                let v2376 = constructor_output_xmm(ctx, v2375);
-                                // Rule at src/isa/x64/lower.isle line 4424.
-                                return Some(v2376);
-                            }
-                            I64X2 => {
-                                let v377 = constructor_put_in_gpr(ctx, v376);
-                                let v2391 = constructor_bitcast_gpr_to_xmm(ctx, I64, v377);
-                                let v2392 = &C::xmm_to_xmm_mem(ctx, v2391);
-                                let v2394 = constructor_x64_pshufd(ctx, v2392, 0x44);
-                                let v2395 = constructor_output_xmm(ctx, v2394);
-                                // Rule at src/isa/x64/lower.isle line 4459.
-                                return Some(v2395);
-                            }
-                            F32X4 => {
-                                let v2347 = C::use_avx2(ctx);
-                                if v2347 == true {
-                                    let v521 = &C::put_in_xmm_mem(ctx, v376);
-                                    let v2382 = constructor_x64_vbroadcastss(ctx, v521);
-                                    let v2383 = constructor_output_xmm(ctx, v2382);
-                                    // Rule at src/isa/x64/lower.isle line 4436.
-                                    return Some(v2383);
-                                }
-                                let v524 = constructor_put_in_xmm(ctx, v376);
-                                let v2379 = constructor_put_in_xmm(ctx, v376);
-                                let v392 = &C::put_in_xmm_mem(ctx, v376);
-                                let v2380 = constructor_x64_shufps(ctx, v2379, v392, 0x0);
-                                let v2381 = constructor_output_xmm(ctx, v2380);
-                                // Rule at src/isa/x64/lower.isle line 4433.
-                                return Some(v2381);
-                            }
-                            F64X2 => {
-                                let v521 = &C::put_in_xmm_mem(ctx, v376);
-                                let v2396 = constructor_x64_pshufd(ctx, v521, 0x44);
-                                let v2397 = constructor_output_xmm(ctx, v2396);
-                                // Rule at src/isa/x64/lower.isle line 4461.
-                                return Some(v2397);
-                            }
-                            _ => {}
-                        }
-                    }
-                }
-                &Opcode::SetPinnedReg => {
-                    let v377 = constructor_put_in_gpr(ctx, v376);
-                    let v2160 = &constructor_write_pinned_gpr(ctx, v377);
-                    let v2161 = constructor_side_effect(ctx, v2160);
-                    // Rule at src/isa/x64/lower.isle line 4108.
-                    return Some(v2161);
-                }
-                &Opcode::VanyTrue => {
-                    let v436 = C::use_sse41(ctx);
-                    if v436 == true {
-                        let v524 = constructor_put_in_xmm(ctx, v376);
-                        let v1242 = &C::xmm_to_xmm_mem(ctx, v524);
-                        let v2400 = &constructor_x64_ptest(ctx, v1242, v524);
-                        let v2401 = &constructor_x64_setcc(ctx, &CC::NZ);
-                        let v2402 = constructor_with_flags(ctx, v2400, v2401);
-                        let v2403 = C::output(ctx, v2402);
-                        // Rule at src/isa/x64/lower.isle line 4469.
-                        return Some(v2403);
-                    }
-                    let v524 = constructor_put_in_xmm(ctx, v376);
-                    let v525 = constructor_xmm_zero(ctx, I8X16);
-                    let v1993 = &C::xmm_to_xmm_mem(ctx, v525);
-                    let v2404 = constructor_x64_pcmpeqb(ctx, v524, v1993);
-                    let v2406 = constructor_x64_pmovmskb(ctx, &OperandSize::Size32, v2404);
-                    let v2408 = RegMemImm::Imm { simm32: 0xFFFF };
-                    let v2409 = &C::gpr_mem_imm_new(ctx, &v2408);
-                    let v2410 = &constructor_x64_cmp(ctx, &OperandSize::Size32, v2409, v2406);
-                    let v2411 = &constructor_x64_setcc(ctx, &CC::NZ);
-                    let v2412 = constructor_with_flags(ctx, v2410, v2411);
-                    let v2413 = C::output(ctx, v2412);
-                    // Rule at src/isa/x64/lower.isle line 4478.
-                    return Some(v2413);
-                }
-                &Opcode::VallTrue => {
-                    let v436 = C::use_sse41(ctx);
-                    if v436 == true {
-                        let v524 = constructor_put_in_xmm(ctx, v376);
-                        let v618 = C::value_type(ctx, v376);
-                        let v2414 = constructor_xmm_zero(ctx, v618);
-                        let v2415 = constructor_vec_int_type(ctx, v618);
-                        let v2416 = &C::xmm_to_xmm_mem(ctx, v2414);
-                        let v2417 = constructor_x64_pcmpeq(ctx, v2415, v524, v2416);
-                        let v2418 = &C::xmm_to_xmm_mem(ctx, v2417);
-                        let v2419 = &constructor_x64_ptest(ctx, v2418, v2417);
-                        let v2420 = &constructor_x64_setcc(ctx, &CC::Z);
-                        let v2421 = constructor_with_flags(ctx, v2419, v2420);
-                        let v2422 = C::output(ctx, v2421);
-                        // Rule at src/isa/x64/lower.isle line 4488.
-                        return Some(v2422);
-                    }
-                    let v618 = C::value_type(ctx, v376);
-                    let v2423 = constructor_vec_int_type(ctx, v618);
-                    let v2379 = constructor_put_in_xmm(ctx, v376);
-                    let v2424 = constructor_xmm_zero(ctx, v618);
-                    let v2425 = &C::xmm_to_xmm_mem(ctx, v2424);
-                    let v2426 = constructor_x64_pcmpeq(ctx, v2423, v2379, v2425);
-                    let v2427 = constructor_x64_pmovmskb(ctx, &OperandSize::Size32, v2426);
-                    let v2428 = &C::gpr_to_gpr_mem_imm(ctx, v2427);
-                    let v2429 = &constructor_x64_test(ctx, &OperandSize::Size32, v2428, v2427);
-                    let v2430 = &constructor_x64_setcc(ctx, &CC::Z);
-                    let v2431 = constructor_with_flags(ctx, v2429, v2430);
-                    let v2432 = C::output(ctx, v2431);
-                    // Rule at src/isa/x64/lower.isle line 4498.
-                    return Some(v2432);
-                }
-                &Opcode::VhighBits => {
-                    let v618 = C::value_type(ctx, v376);
-                    let v2433 = C::multi_lane(ctx, v618);
-                    if let Some(v2434) = v2433 {
-                        match v2434.0 {
-                            0x8 => {
-                                if v2434.1 == 0x10 {
-                                    let v524 = constructor_put_in_xmm(ctx, v376);
-                                    let v2437 =
-                                        constructor_x64_pmovmskb(ctx, &OperandSize::Size32, v524);
-                                    let v2438 = constructor_output_gpr(ctx, v2437);
-                                    // Rule at src/isa/x64/lower.isle line 4515.
-                                    return Some(v2438);
-                                }
-                            }
-                            0x10 => {
-                                if v2434.1 == 0x8 {
-                                    let v524 = constructor_put_in_xmm(ctx, v376);
-                                    let v1242 = &C::xmm_to_xmm_mem(ctx, v524);
-                                    let v2443 = constructor_x64_packsswb(ctx, v524, v1242);
-                                    let v2444 =
-                                        constructor_x64_pmovmskb(ctx, &OperandSize::Size32, v2443);
-                                    let v1135 = Imm8Reg::Imm8 { imm: 0x8 };
-                                    let v2112 = &C::imm8_reg_to_imm8_gpr(ctx, &v1135);
-                                    let v2445 = constructor_x64_shr(ctx, I64, v2444, v2112);
-                                    let v2446 = constructor_output_gpr(ctx, v2445);
-                                    // Rule at src/isa/x64/lower.isle line 4530.
-                                    return Some(v2446);
-                                }
-                            }
-                            0x20 => {
-                                if v2434.1 == 0x4 {
-                                    let v524 = constructor_put_in_xmm(ctx, v376);
-                                    let v2439 =
-                                        constructor_x64_movmskps(ctx, &OperandSize::Size32, v524);
-                                    let v2440 = constructor_output_gpr(ctx, v2439);
-                                    // Rule at src/isa/x64/lower.isle line 4518.
-                                    return Some(v2440);
-                                }
-                            }
-                            0x40 => {
-                                if v2434.1 == 0x2 {
-                                    let v524 = constructor_put_in_xmm(ctx, v376);
-                                    let v2441 =
-                                        constructor_x64_movmskpd(ctx, &OperandSize::Size32, v524);
-                                    let v2442 = constructor_output_gpr(ctx, v2441);
-                                    // Rule at src/isa/x64/lower.isle line 4521.
-                                    return Some(v2442);
-                                }
-                            }
-                            _ => {}
-                        }
-                    }
-                }
-                &Opcode::Ineg => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            I8X16 => {
-                                let v390 = constructor_imm(ctx, I8X16, 0x0);
-                                let v391 = C::xmm_new(ctx, v390);
-                                let v392 = &C::put_in_xmm_mem(ctx, v376);
-                                let v393 = constructor_x64_psubb(ctx, v391, v392);
-                                let v394 = constructor_output_xmm(ctx, v393);
-                                // Rule at src/isa/x64/lower.isle line 915.
-                                return Some(v394);
-                            }
-                            I16X8 => {
-                                let v396 = constructor_imm(ctx, I16X8, 0x0);
-                                let v397 = C::xmm_new(ctx, v396);
-                                let v392 = &C::put_in_xmm_mem(ctx, v376);
-                                let v398 = constructor_x64_psubw(ctx, v397, v392);
-                                let v399 = constructor_output_xmm(ctx, v398);
-                                // Rule at src/isa/x64/lower.isle line 918.
-                                return Some(v399);
-                            }
-                            I32X4 => {
-                                let v401 = constructor_imm(ctx, I32X4, 0x0);
-                                let v402 = C::xmm_new(ctx, v401);
-                                let v392 = &C::put_in_xmm_mem(ctx, v376);
-                                let v403 = constructor_x64_psubd(ctx, v402, v392);
-                                let v404 = constructor_output_xmm(ctx, v403);
-                                // Rule at src/isa/x64/lower.isle line 921.
-                                return Some(v404);
-                            }
-                            I64X2 => {
-                                let v406 = constructor_imm(ctx, I64X2, 0x0);
-                                let v407 = C::xmm_new(ctx, v406);
-                                let v392 = &C::put_in_xmm_mem(ctx, v376);
-                                let v408 = constructor_x64_psubq(ctx, v407, v392);
-                                let v409 = constructor_output_xmm(ctx, v408);
-                                // Rule at src/isa/x64/lower.isle line 924.
-                                return Some(v409);
-                            }
-                            _ => {}
-                        }
-                        let v4 = C::fits_in_64(ctx, v3);
-                        if let Some(v5) = v4 {
-                            let v377 = constructor_put_in_gpr(ctx, v376);
-                            let v378 = constructor_x64_neg(ctx, v5, v377);
-                            let v379 = constructor_output_gpr(ctx, v378);
-                            // Rule at src/isa/x64/lower.isle line 901.
-                            return Some(v379);
-                        }
-                        if v3 == I128 {
-                            let v380 = C::put_in_regs(ctx, v376);
-                            let v381 = constructor_value_regs_get_gpr(ctx, v380, 0x0);
-                            let v382 = constructor_value_regs_get_gpr(ctx, v380, 0x1);
-                            let v383 = &constructor_x64_neg_paired(ctx, I64, v381);
-                            let v384 = constructor_imm(ctx, I64, 0x0);
-                            let v385 = C::gpr_new(ctx, v384);
-                            let v386 = &C::gpr_to_gpr_mem_imm(ctx, v382);
-                            let v387 = &constructor_x64_sbb_paired(ctx, I64, v385, v386);
-                            let v388 = constructor_with_flags(ctx, v383, v387);
-                            let v389 = C::output(ctx, v388);
-                            // Rule at src/isa/x64/lower.isle line 904.
-                            return Some(v389);
-                        }
-                    }
-                }
-                &Opcode::Iabs => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            I8X16 => {
-                                let v520 = C::use_ssse3(ctx);
-                                if v520 == true {
-                                    let v521 = &C::put_in_xmm_mem(ctx, v376);
-                                    let v522 = constructor_x64_pabsb(ctx, v521);
-                                    let v523 = constructor_output_xmm(ctx, v522);
-                                    // Rule at src/isa/x64/lower.isle line 1158.
-                                    return Some(v523);
-                                }
-                                let v524 = constructor_put_in_xmm(ctx, v376);
-                                let v525 = constructor_xmm_zero(ctx, I8X16);
-                                let v526 = &C::xmm_to_xmm_mem(ctx, v524);
-                                let v527 = constructor_x64_psubb(ctx, v525, v526);
-                                let v528 = &C::xmm_to_xmm_mem(ctx, v527);
-                                let v529 = constructor_x64_pminub(ctx, v524, v528);
-                                let v530 = constructor_output_xmm(ctx, v529);
-                                // Rule at src/isa/x64/lower.isle line 1165.
-                                return Some(v530);
-                            }
-                            I16X8 => {
-                                let v520 = C::use_ssse3(ctx);
-                                if v520 == true {
-                                    let v521 = &C::put_in_xmm_mem(ctx, v376);
-                                    let v531 = constructor_x64_pabsw(ctx, v521);
-                                    let v532 = constructor_output_xmm(ctx, v531);
-                                    // Rule at src/isa/x64/lower.isle line 1172.
-                                    return Some(v532);
-                                }
-                                let v524 = constructor_put_in_xmm(ctx, v376);
-                                let v533 = constructor_xmm_zero(ctx, I16X8);
-                                let v526 = &C::xmm_to_xmm_mem(ctx, v524);
-                                let v534 = constructor_x64_psubw(ctx, v533, v526);
-                                let v535 = &C::xmm_to_xmm_mem(ctx, v534);
-                                let v536 = constructor_x64_pmaxsw(ctx, v524, v535);
-                                let v537 = constructor_output_xmm(ctx, v536);
-                                // Rule at src/isa/x64/lower.isle line 1176.
-                                return Some(v537);
-                            }
-                            I32X4 => {
-                                let v520 = C::use_ssse3(ctx);
-                                if v520 == true {
-                                    let v521 = &C::put_in_xmm_mem(ctx, v376);
-                                    let v538 = constructor_x64_pabsd(ctx, v521);
-                                    let v539 = constructor_output_xmm(ctx, v538);
-                                    // Rule at src/isa/x64/lower.isle line 1183.
-                                    return Some(v539);
-                                }
-                                let v524 = constructor_put_in_xmm(ctx, v376);
-                                let v541 = &C::xmi_imm(ctx, 0x1F);
-                                let v542 = constructor_x64_psrad(ctx, v524, v541);
-                                let v543 = &C::xmm_to_xmm_mem(ctx, v542);
-                                let v544 = constructor_x64_pxor(ctx, v524, v543);
-                                let v545 = &C::xmm_to_xmm_mem(ctx, v542);
-                                let v546 = constructor_x64_psubd(ctx, v544, v545);
-                                let v547 = constructor_output_xmm(ctx, v546);
-                                // Rule at src/isa/x64/lower.isle line 1193.
-                                return Some(v547);
-                            }
-                            I64X2 => {
-                                let v328 = C::use_avx512vl(ctx);
-                                if v328 == true {
-                                    let v329 = C::use_avx512f(ctx);
-                                    if v329 == true {
-                                        let v521 = &C::put_in_xmm_mem(ctx, v376);
-                                        let v548 = constructor_x64_vpabsq(ctx, v521);
-                                        let v549 = constructor_output_xmm(ctx, v548);
-                                        // Rule at src/isa/x64/lower.isle line 1202.
-                                        return Some(v549);
-                                    }
-                                }
-                                let v436 = C::use_sse41(ctx);
-                                if v436 == true {
-                                    let v524 = constructor_put_in_xmm(ctx, v376);
-                                    let v550 = constructor_imm(ctx, I64X2, 0x0);
-                                    let v551 = C::xmm_new(ctx, v550);
-                                    let v552 = &C::xmm_to_xmm_mem(ctx, v524);
-                                    let v553 = constructor_x64_psubq(ctx, v551, v552);
-                                    let v554 = &C::xmm_to_xmm_mem(ctx, v524);
-                                    let v555 = constructor_x64_blendvpd(ctx, v553, v554, v553);
-                                    let v556 = constructor_output_xmm(ctx, v555);
-                                    // Rule at src/isa/x64/lower.isle line 1211.
-                                    return Some(v556);
-                                }
-                                let v524 = constructor_put_in_xmm(ctx, v376);
-                                let v557 = RegMemImm::Imm { simm32: 0x1F };
-                                let v558 = &C::xmm_mem_imm_new(ctx, &v557);
-                                let v559 = constructor_x64_psrad(ctx, v524, v558);
-                                let v560 = &C::xmm_to_xmm_mem(ctx, v559);
-                                let v562 = constructor_x64_pshufd(ctx, v560, 0xF5);
-                                let v563 = &C::xmm_to_xmm_mem(ctx, v562);
-                                let v564 = constructor_x64_pxor(ctx, v524, v563);
-                                let v565 = &C::xmm_to_xmm_mem(ctx, v562);
-                                let v566 = constructor_x64_psubq(ctx, v564, v565);
-                                let v567 = constructor_output_xmm(ctx, v566);
-                                // Rule at src/isa/x64/lower.isle line 1220.
-                                return Some(v567);
-                            }
-                            _ => {}
-                        }
-                        let v4 = C::fits_in_64(ctx, v3);
-                        if let Some(v5) = v4 {
-                            let v377 = constructor_put_in_gpr(ctx, v376);
-                            let v568 = &constructor_x64_neg_paired(ctx, v5, v377);
-                            let v569 = constructor_produces_flags_get_reg(ctx, v568);
-                            let v570 = C::gpr_new(ctx, v569);
-                            let v572 = &C::gpr_to_gpr_mem(ctx, v377);
-                            let v573 = &constructor_cmove(ctx, v5, &CC::S, v572, v570);
-                            let v574 = &constructor_produces_flags_ignore(ctx, v568);
-                            let v575 = constructor_with_flags_reg(ctx, v574, v573);
-                            let v576 = constructor_output_reg(ctx, v575);
-                            // Rule at src/isa/x64/lower.isle line 1229.
-                            return Some(v576);
-                        }
-                    }
-                }
-                &Opcode::Bnot => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        if v3 == I128 {
-                            let v623 = constructor_i128_not(ctx, v376);
-                            let v624 = C::output(ctx, v623);
-                            // Rule at src/isa/x64/lower.isle line 1338.
-                            return Some(v624);
-                        }
-                        let v64 = C::multi_lane(ctx, v3);
-                        if let Some(v65) = v64 {
-                            let v524 = constructor_put_in_xmm(ctx, v376);
-                            let v587 = constructor_vector_all_ones(ctx);
-                            let v625 = &C::xmm_to_xmm_mem(ctx, v587);
-                            let v628 = constructor_x64_xor_vector(ctx, v3, v524, v625);
-                            let v629 = constructor_output_xmm(ctx, v628);
-                            // Rule at src/isa/x64/lower.isle line 1348.
-                            return Some(v629);
-                        }
-                        let v152 = C::ty_int_ref_scalar_64(ctx, v3);
-                        if let Some(v153) = v152 {
-                            let v377 = constructor_put_in_gpr(ctx, v376);
-                            let v621 = constructor_x64_not(ctx, v3, v377);
-                            let v622 = constructor_output_gpr(ctx, v621);
-                            // Rule at src/isa/x64/lower.isle line 1323.
-                            return Some(v622);
-                        }
-                        let v162 = C::ty_scalar_float(ctx, v3);
-                        if let Some(v163) = v162 {
-                            let v524 = constructor_put_in_xmm(ctx, v376);
-                            let v587 = constructor_vector_all_ones(ctx);
-                            let v625 = &C::xmm_to_xmm_mem(ctx, v587);
-                            let v626 = constructor_x64_xor_vector(ctx, v163, v524, v625);
-                            let v627 = constructor_output_xmm(ctx, v626);
-                            // Rule at src/isa/x64/lower.isle line 1343.
-                            return Some(v627);
-                        }
-                    }
-                }
-                &Opcode::Bitrev => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            I8 => {
-                                let v377 = constructor_put_in_gpr(ctx, v376);
-                                let v1118 = constructor_do_bitrev8(ctx, I32, v377);
-                                let v1119 = constructor_output_gpr(ctx, v1118);
-                                // Rule at src/isa/x64/lower.isle line 2251.
-                                return Some(v1119);
-                            }
-                            I16 => {
-                                let v377 = constructor_put_in_gpr(ctx, v376);
-                                let v1120 = constructor_do_bitrev16(ctx, I32, v377);
-                                let v1121 = constructor_output_gpr(ctx, v1120);
-                                // Rule at src/isa/x64/lower.isle line 2254.
-                                return Some(v1121);
-                            }
-                            I32 => {
-                                let v377 = constructor_put_in_gpr(ctx, v376);
-                                let v1122 = constructor_do_bitrev32(ctx, I32, v377);
-                                let v1123 = constructor_output_gpr(ctx, v1122);
-                                // Rule at src/isa/x64/lower.isle line 2257.
-                                return Some(v1123);
-                            }
-                            I64 => {
-                                let v377 = constructor_put_in_gpr(ctx, v376);
-                                let v1124 = constructor_do_bitrev64(ctx, I64, v377);
-                                let v1125 = constructor_output_gpr(ctx, v1124);
-                                // Rule at src/isa/x64/lower.isle line 2260.
-                                return Some(v1125);
-                            }
-                            I128 => {
-                                let v380 = C::put_in_regs(ctx, v376);
-                                let v1008 = constructor_value_regs_get_gpr(ctx, v380, 0x1);
-                                let v1126 = constructor_do_bitrev64(ctx, I64, v1008);
-                                let v1127 = C::gpr_to_reg(ctx, v1126);
-                                let v1128 = C::put_in_regs(ctx, v376);
-                                let v1129 = constructor_value_regs_get_gpr(ctx, v1128, 0x0);
-                                let v1130 = constructor_do_bitrev64(ctx, I64, v1129);
-                                let v1131 = C::gpr_to_reg(ctx, v1130);
-                                let v1132 = C::value_regs(ctx, v1127, v1131);
-                                let v1133 = C::output(ctx, v1132);
-                                // Rule at src/isa/x64/lower.isle line 2263.
-                                return Some(v1133);
-                            }
-                            _ => {}
-                        }
-                    }
-                }
-                &Opcode::Clz => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v45 = C::ty_32_or_64(ctx, v3);
-                        if let Some(v46) = v45 {
-                            let v998 = C::use_lzcnt(ctx);
-                            if v998 == true {
-                                let v377 = constructor_put_in_gpr(ctx, v376);
-                                let v999 = constructor_x64_lzcnt(ctx, v46, v377);
-                                let v1000 = constructor_output_gpr(ctx, v999);
-                                // Rule at src/isa/x64/lower.isle line 2030.
-                                return Some(v1000);
-                            }
-                            let v377 = constructor_put_in_gpr(ctx, v376);
-                            let v1001 = constructor_do_clz(ctx, v46, v46, v377);
-                            let v1002 = constructor_output_gpr(ctx, v1001);
-                            // Rule at src/isa/x64/lower.isle line 2034.
-                            return Some(v1002);
-                        }
-                        let v1003 = C::ty_8_or_16(ctx, v3);
-                        if let Some(v1004) = v1003 {
-                            let v1005 =
-                                constructor_extend_to_gpr(ctx, v376, I32, &ExtendKind::Zero);
-                            let v1006 = constructor_do_clz(ctx, I32, v1004, v1005);
-                            let v1007 = constructor_output_gpr(ctx, v1006);
-                            // Rule at src/isa/x64/lower.isle line 2037.
-                            return Some(v1007);
-                        }
-                        if v3 == I128 {
-                            let v380 = C::put_in_regs(ctx, v376);
-                            let v1008 = constructor_value_regs_get_gpr(ctx, v380, 0x1);
-                            let v1009 = constructor_do_clz(ctx, I64, I64, v1008);
-                            let v1010 = C::put_in_regs(ctx, v376);
-                            let v1011 = constructor_value_regs_get_gpr(ctx, v1010, 0x0);
-                            let v1012 = constructor_do_clz(ctx, I64, I64, v1011);
-                            let v1014 = RegMemImm::Imm { simm32: 0x40 };
-                            let v1015 = &C::gpr_mem_imm_new(ctx, &v1014);
-                            let v1016 = constructor_x64_add(ctx, I64, v1012, v1015);
-                            let v1018 =
-                                &constructor_x64_cmp_imm(ctx, &OperandSize::Size64, 0x40, v1009);
-                            let v1019 = &C::gpr_to_gpr_mem(ctx, v1009);
-                            let v1020 = &constructor_cmove(ctx, I64, &CC::NZ, v1019, v1016);
-                            let v1021 = constructor_with_flags_reg(ctx, v1018, v1020);
-                            let v1022 = C::gpr_new(ctx, v1021);
-                            let v1023 = C::gpr_to_reg(ctx, v1022);
-                            let v1024 = constructor_imm(ctx, I64, 0x0);
-                            let v1025 = C::value_regs(ctx, v1023, v1024);
-                            let v1026 = C::output(ctx, v1025);
-                            // Rule at src/isa/x64/lower.isle line 2042.
-                            return Some(v1026);
-                        }
-                    }
-                }
-                &Opcode::Ctz => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v45 = C::ty_32_or_64(ctx, v3);
-                        if let Some(v46) = v45 {
-                            let v189 = C::use_bmi1(ctx);
-                            if v189 == true {
-                                let v377 = constructor_put_in_gpr(ctx, v376);
-                                let v1027 = constructor_x64_tzcnt(ctx, v46, v377);
-                                let v1028 = constructor_output_gpr(ctx, v1027);
-                                // Rule at src/isa/x64/lower.isle line 2067.
-                                return Some(v1028);
-                            }
-                            let v377 = constructor_put_in_gpr(ctx, v376);
-                            let v1029 = constructor_do_ctz(ctx, v46, v46, v377);
-                            let v1030 = constructor_output_gpr(ctx, v1029);
-                            // Rule at src/isa/x64/lower.isle line 2071.
-                            return Some(v1030);
-                        }
-                        let v1003 = C::ty_8_or_16(ctx, v3);
-                        if let Some(v1004) = v1003 {
-                            let v1005 =
-                                constructor_extend_to_gpr(ctx, v376, I32, &ExtendKind::Zero);
-                            let v1031 = constructor_do_ctz(ctx, I32, v1004, v1005);
-                            let v1032 = constructor_output_gpr(ctx, v1031);
-                            // Rule at src/isa/x64/lower.isle line 2074.
-                            return Some(v1032);
-                        }
-                        if v3 == I128 {
-                            let v380 = C::put_in_regs(ctx, v376);
-                            let v381 = constructor_value_regs_get_gpr(ctx, v380, 0x0);
-                            let v1033 = constructor_do_ctz(ctx, I64, I64, v381);
-                            let v1010 = C::put_in_regs(ctx, v376);
-                            let v1034 = constructor_value_regs_get_gpr(ctx, v1010, 0x1);
-                            let v1035 = constructor_do_ctz(ctx, I64, I64, v1034);
-                            let v1014 = RegMemImm::Imm { simm32: 0x40 };
-                            let v1015 = &C::gpr_mem_imm_new(ctx, &v1014);
-                            let v1036 = constructor_x64_add(ctx, I64, v1035, v1015);
-                            let v1037 =
-                                &constructor_x64_cmp_imm(ctx, &OperandSize::Size64, 0x40, v1033);
-                            let v1038 = &C::gpr_to_gpr_mem(ctx, v1036);
-                            let v1039 = &constructor_cmove(ctx, I64, &CC::Z, v1038, v1033);
-                            let v1040 = constructor_with_flags_reg(ctx, v1037, v1039);
-                            let v1041 = C::gpr_new(ctx, v1040);
-                            let v1042 = C::gpr_to_reg(ctx, v1041);
-                            let v1024 = constructor_imm(ctx, I64, 0x0);
-                            let v1043 = C::value_regs(ctx, v1042, v1024);
-                            let v1044 = C::output(ctx, v1043);
-                            // Rule at src/isa/x64/lower.isle line 2079.
-                            return Some(v1044);
-                        }
-                    }
-                }
-                &Opcode::Bswap => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            I16 => {
-                                let v377 = constructor_put_in_gpr(ctx, v376);
-                                let v1135 = Imm8Reg::Imm8 { imm: 0x8 };
-                                let v1136 = &C::imm8_reg_to_imm8_gpr(ctx, &v1135);
-                                let v1137 = constructor_x64_rotl(ctx, I16, v377, v1136);
-                                let v1138 = constructor_output_gpr(ctx, v1137);
-                                // Rule at src/isa/x64/lower.isle line 2330.
-                                return Some(v1138);
-                            }
-                            I32 => {
-                                let v377 = constructor_put_in_gpr(ctx, v376);
-                                let v1139 = constructor_x64_bswap(ctx, I32, v377);
-                                let v1140 = constructor_output_gpr(ctx, v1139);
-                                // Rule at src/isa/x64/lower.isle line 2333.
-                                return Some(v1140);
-                            }
-                            I64 => {
-                                let v377 = constructor_put_in_gpr(ctx, v376);
-                                let v1141 = constructor_x64_bswap(ctx, I64, v377);
-                                let v1142 = constructor_output_gpr(ctx, v1141);
-                                // Rule at src/isa/x64/lower.isle line 2336.
-                                return Some(v1142);
-                            }
-                            I128 => {
-                                let v380 = C::put_in_regs(ctx, v376);
-                                let v1008 = constructor_value_regs_get_gpr(ctx, v380, 0x1);
-                                let v1143 = constructor_x64_bswap(ctx, I64, v1008);
-                                let v1144 = C::gpr_to_reg(ctx, v1143);
-                                let v1128 = C::put_in_regs(ctx, v376);
-                                let v1129 = constructor_value_regs_get_gpr(ctx, v1128, 0x0);
-                                let v1145 = constructor_x64_bswap(ctx, I64, v1129);
-                                let v1146 = C::gpr_to_reg(ctx, v1145);
-                                let v1147 = C::value_regs(ctx, v1144, v1146);
-                                let v1148 = C::output(ctx, v1147);
-                                // Rule at src/isa/x64/lower.isle line 2339.
-                                return Some(v1148);
-                            }
-                            _ => {}
-                        }
-                    }
-                }
-                &Opcode::Popcnt => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v1045 = C::use_popcnt(ctx);
-                        if v1045 == true {
-                            let v3 = C::value_type(ctx, v2);
-                            let v45 = C::ty_32_or_64(ctx, v3);
-                            if let Some(v46) = v45 {
-                                let v377 = constructor_put_in_gpr(ctx, v376);
-                                let v1046 = constructor_x64_popcnt(ctx, v46, v377);
-                                let v1047 = constructor_output_gpr(ctx, v1046);
-                                // Rule at src/isa/x64/lower.isle line 2098.
-                                return Some(v1047);
-                            }
-                            let v1003 = C::ty_8_or_16(ctx, v3);
-                            if let Some(v1004) = v1003 {
-                                let v1005 =
-                                    constructor_extend_to_gpr(ctx, v376, I32, &ExtendKind::Zero);
-                                let v1048 = constructor_x64_popcnt(ctx, I32, v1005);
-                                let v1049 = constructor_output_gpr(ctx, v1048);
-                                // Rule at src/isa/x64/lower.isle line 2102.
-                                return Some(v1049);
-                            }
-                        }
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            I128 => {
-                                if v1045 == true {
-                                    let v380 = C::put_in_regs(ctx, v376);
-                                    let v381 = constructor_value_regs_get_gpr(ctx, v380, 0x0);
-                                    let v1050 = constructor_x64_popcnt(ctx, I64, v381);
-                                    let v1010 = C::put_in_regs(ctx, v376);
-                                    let v1034 = constructor_value_regs_get_gpr(ctx, v1010, 0x1);
-                                    let v1051 = constructor_x64_popcnt(ctx, I64, v1034);
-                                    let v1052 = &C::gpr_to_gpr_mem_imm(ctx, v1051);
-                                    let v1053 = constructor_x64_add(ctx, I64, v1050, v1052);
-                                    let v1054 = C::gpr_to_reg(ctx, v1053);
-                                    let v1055 = constructor_imm(ctx, I64, 0x0);
-                                    let v1056 = C::value_regs(ctx, v1054, v1055);
-                                    let v1057 = C::output(ctx, v1056);
-                                    // Rule at src/isa/x64/lower.isle line 2106.
-                                    return Some(v1057);
-                                }
-                                let v380 = C::put_in_regs(ctx, v376);
-                                let v381 = constructor_value_regs_get_gpr(ctx, v380, 0x0);
-                                let v1062 = constructor_do_popcnt(ctx, I64, v381);
-                                let v1010 = C::put_in_regs(ctx, v376);
-                                let v1034 = constructor_value_regs_get_gpr(ctx, v1010, 0x1);
-                                let v1063 = constructor_do_popcnt(ctx, I64, v1034);
-                                let v1064 = &C::gpr_to_gpr_mem_imm(ctx, v1063);
-                                let v1065 = constructor_x64_add(ctx, I64, v1062, v1064);
-                                let v1066 = C::gpr_to_reg(ctx, v1065);
-                                let v1055 = constructor_imm(ctx, I64, 0x0);
-                                let v1067 = C::value_regs(ctx, v1066, v1055);
-                                let v1068 = C::output(ctx, v1067);
-                                // Rule at src/isa/x64/lower.isle line 2122.
-                                return Some(v1068);
-                            }
-                            I8X16 => {
-                                let v328 = C::use_avx512vl(ctx);
-                                if v328 == true {
-                                    let v1069 = C::use_avx512bitalg(ctx);
-                                    if v1069 == true {
-                                        let v521 = &C::put_in_xmm_mem(ctx, v376);
-                                        let v1070 = constructor_x64_vpopcntb(ctx, v521);
-                                        let v1071 = constructor_output_xmm(ctx, v1070);
-                                        // Rule at src/isa/x64/lower.isle line 2195.
-                                        return Some(v1071);
-                                    }
-                                }
-                                let v520 = C::use_ssse3(ctx);
-                                if v520 == true {
-                                    let v1073 = C::emit_u128_le_const(
-                                        ctx,
-                                        0xF0F0F0F0F0F0F0F0F0F0F0F0F0F0F0F,
-                                    );
-                                    let v1074 = &constructor_const_to_xmm_mem(ctx, v1073);
-                                    let v1075 = constructor_put_in_xmm(ctx, v376);
-                                    let v1076 = constructor_sse_and(ctx, I8X16, v1075, v1074);
-                                    let v1077 = constructor_put_in_xmm(ctx, v376);
-                                    let v1079 = &C::xmi_imm(ctx, 0x4);
-                                    let v1080 = constructor_x64_psrlw(ctx, v1077, v1079);
-                                    let v1081 = constructor_sse_and(ctx, I8X16, v1080, v1074);
-                                    let v1083 = C::emit_u128_le_const(
-                                        ctx,
-                                        0x4030302030202010302020102010100,
-                                    );
-                                    let v1084 = constructor_x64_xmm_load_const(ctx, I8X16, v1083);
-                                    let v1085 = &C::xmm_to_xmm_mem(ctx, v1076);
-                                    let v1086 = constructor_x64_pshufb(ctx, v1084, v1085);
-                                    let v1087 = &C::xmm_to_xmm_mem(ctx, v1081);
-                                    let v1088 = constructor_x64_pshufb(ctx, v1084, v1087);
-                                    let v1089 = &C::xmm_to_xmm_mem(ctx, v1088);
-                                    let v1090 = constructor_x64_paddb(ctx, v1086, v1089);
-                                    let v1091 = constructor_output_xmm(ctx, v1090);
-                                    // Rule at src/isa/x64/lower.isle line 2221.
-                                    return Some(v1091);
-                                }
-                                let v1093 =
-                                    C::emit_u128_le_const(ctx, 0x77777777777777777777777777777777);
-                                let v1094 = &constructor_const_to_xmm_mem(ctx, v1093);
-                                let v1075 = constructor_put_in_xmm(ctx, v376);
-                                let v1095 = &C::xmi_imm(ctx, 0x1);
-                                let v1096 = constructor_x64_psrlq(ctx, v1075, v1095);
-                                let v1097 = constructor_x64_pand(ctx, v1096, v1094);
-                                let v1098 = &C::xmm_to_xmm_mem(ctx, v1097);
-                                let v1099 = constructor_x64_psubb(ctx, v1075, v1098);
-                                let v1100 = &C::xmi_imm(ctx, 0x1);
-                                let v1101 = constructor_x64_psrlq(ctx, v1097, v1100);
-                                let v1102 = constructor_x64_pand(ctx, v1101, v1094);
-                                let v1103 = &C::xmm_to_xmm_mem(ctx, v1102);
-                                let v1104 = constructor_x64_psubb(ctx, v1099, v1103);
-                                let v1105 = &C::xmi_imm(ctx, 0x1);
-                                let v1106 = constructor_x64_psrlq(ctx, v1102, v1105);
-                                let v1107 = constructor_x64_pand(ctx, v1106, v1094);
-                                let v1108 = &C::xmm_to_xmm_mem(ctx, v1107);
-                                let v1109 = constructor_x64_psubb(ctx, v1104, v1108);
-                                let v1110 = &C::xmi_imm(ctx, 0x4);
-                                let v1111 = constructor_x64_psrlw(ctx, v1109, v1110);
-                                let v1112 = &C::xmm_to_xmm_mem(ctx, v1111);
-                                let v1113 = constructor_x64_paddb(ctx, v1109, v1112);
-                                let v1114 =
-                                    C::emit_u128_le_const(ctx, 0xF0F0F0F0F0F0F0F0F0F0F0F0F0F0F0F);
-                                let v1115 = &constructor_const_to_xmm_mem(ctx, v1114);
-                                let v1116 = constructor_x64_pand(ctx, v1113, v1115);
-                                let v1117 = constructor_output_xmm(ctx, v1116);
-                                // Rule at src/isa/x64/lower.isle line 2237.
-                                return Some(v1117);
-                            }
-                            _ => {}
-                        }
-                        let v45 = C::ty_32_or_64(ctx, v3);
-                        if let Some(v46) = v45 {
-                            let v377 = constructor_put_in_gpr(ctx, v376);
-                            let v1058 = constructor_do_popcnt(ctx, v46, v377);
-                            let v1059 = constructor_output_gpr(ctx, v1058);
-                            // Rule at src/isa/x64/lower.isle line 2112.
-                            return Some(v1059);
-                        }
-                        let v1003 = C::ty_8_or_16(ctx, v3);
-                        if let Some(v1004) = v1003 {
-                            let v1005 =
-                                constructor_extend_to_gpr(ctx, v376, I32, &ExtendKind::Zero);
-                            let v1060 = constructor_do_popcnt(ctx, I32, v1005);
-                            let v1061 = constructor_output_gpr(ctx, v1060);
-                            // Rule at src/isa/x64/lower.isle line 2117.
-                            return Some(v1061);
-                        }
-                    }
-                }
-                &Opcode::Sqrt => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            F32 => {
-                                let v521 = &C::put_in_xmm_mem(ctx, v376);
-                                let v1232 = constructor_x64_sqrtss(ctx, v521);
-                                let v1233 = constructor_output_xmm(ctx, v1232);
-                                // Rule at src/isa/x64/lower.isle line 2486.
-                                return Some(v1233);
-                            }
-                            F64 => {
-                                let v521 = &C::put_in_xmm_mem(ctx, v376);
-                                let v1234 = constructor_x64_sqrtsd(ctx, v521);
-                                let v1235 = constructor_output_xmm(ctx, v1234);
-                                // Rule at src/isa/x64/lower.isle line 2488.
-                                return Some(v1235);
-                            }
-                            F32X4 => {
-                                let v521 = &C::put_in_xmm_mem(ctx, v376);
-                                let v1236 = constructor_x64_sqrtps(ctx, v521);
-                                let v1237 = constructor_output_xmm(ctx, v1236);
-                                // Rule at src/isa/x64/lower.isle line 2490.
-                                return Some(v1237);
-                            }
-                            F64X2 => {
-                                let v521 = &C::put_in_xmm_mem(ctx, v376);
-                                let v1238 = constructor_x64_sqrtpd(ctx, v521);
-                                let v1239 = constructor_output_xmm(ctx, v1238);
-                                // Rule at src/isa/x64/lower.isle line 2492.
-                                return Some(v1239);
-                            }
-                            _ => {}
-                        }
-                    }
-                }
-                &Opcode::Fneg => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            F32 => {
-                                let v524 = constructor_put_in_xmm(ctx, v376);
-                                let v599 = constructor_imm(ctx, F32, 0x80000000);
-                                let v600 = &constructor_reg_to_xmm_mem(ctx, v599);
-                                let v601 = constructor_x64_xorps(ctx, v524, v600);
-                                let v602 = constructor_output_xmm(ctx, v601);
-                                // Rule at src/isa/x64/lower.isle line 1261.
-                                return Some(v602);
-                            }
-                            F64 => {
-                                let v524 = constructor_put_in_xmm(ctx, v376);
-                                let v604 = constructor_imm(ctx, F64, 0x8000000000000000);
-                                let v605 = &constructor_reg_to_xmm_mem(ctx, v604);
-                                let v606 = constructor_x64_xorpd(ctx, v524, v605);
-                                let v607 = constructor_output_xmm(ctx, v606);
-                                // Rule at src/isa/x64/lower.isle line 1264.
-                                return Some(v607);
-                            }
-                            F32X4 => {
-                                let v524 = constructor_put_in_xmm(ctx, v376);
-                                let v587 = constructor_vector_all_ones(ctx);
-                                let v608 = &C::xmi_imm(ctx, 0x1F);
-                                let v609 = constructor_x64_pslld(ctx, v587, v608);
-                                let v610 = &C::xmm_to_xmm_mem(ctx, v609);
-                                let v611 = constructor_x64_xorps(ctx, v524, v610);
-                                let v612 = constructor_output_xmm(ctx, v611);
-                                // Rule at src/isa/x64/lower.isle line 1267.
-                                return Some(v612);
-                            }
-                            F64X2 => {
-                                let v524 = constructor_put_in_xmm(ctx, v376);
-                                let v587 = constructor_vector_all_ones(ctx);
-                                let v613 = &C::xmi_imm(ctx, 0x3F);
-                                let v614 = constructor_x64_psllq(ctx, v587, v613);
-                                let v615 = &C::xmm_to_xmm_mem(ctx, v614);
-                                let v616 = constructor_x64_xorpd(ctx, v524, v615);
-                                let v617 = constructor_output_xmm(ctx, v616);
-                                // Rule at src/isa/x64/lower.isle line 1271.
-                                return Some(v617);
-                            }
-                            _ => {}
-                        }
-                    }
-                }
-                &Opcode::Fabs => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            F32 => {
-                                let v524 = constructor_put_in_xmm(ctx, v376);
-                                let v578 = constructor_imm(ctx, F32, 0x7FFFFFFF);
-                                let v579 = &constructor_reg_to_xmm_mem(ctx, v578);
-                                let v580 = constructor_x64_andps(ctx, v524, v579);
-                                let v581 = constructor_output_xmm(ctx, v580);
-                                // Rule at src/isa/x64/lower.isle line 1243.
-                                return Some(v581);
-                            }
-                            F64 => {
-                                let v524 = constructor_put_in_xmm(ctx, v376);
-                                let v583 = constructor_imm(ctx, F64, 0x7FFFFFFFFFFFFFFF);
-                                let v584 = &constructor_reg_to_xmm_mem(ctx, v583);
-                                let v585 = constructor_x64_andpd(ctx, v524, v584);
-                                let v586 = constructor_output_xmm(ctx, v585);
-                                // Rule at src/isa/x64/lower.isle line 1246.
-                                return Some(v586);
-                            }
-                            F32X4 => {
-                                let v524 = constructor_put_in_xmm(ctx, v376);
-                                let v587 = constructor_vector_all_ones(ctx);
-                                let v589 = &C::xmi_imm(ctx, 0x1);
-                                let v590 = constructor_x64_psrld(ctx, v587, v589);
-                                let v591 = &C::xmm_to_xmm_mem(ctx, v590);
-                                let v592 = constructor_x64_andps(ctx, v524, v591);
-                                let v593 = constructor_output_xmm(ctx, v592);
-                                // Rule at src/isa/x64/lower.isle line 1250.
-                                return Some(v593);
-                            }
-                            F64X2 => {
-                                let v524 = constructor_put_in_xmm(ctx, v376);
-                                let v587 = constructor_vector_all_ones(ctx);
-                                let v589 = &C::xmi_imm(ctx, 0x1);
-                                let v594 = constructor_x64_psrlq(ctx, v587, v589);
-                                let v595 = &C::xmm_to_xmm_mem(ctx, v594);
-                                let v596 = constructor_x64_andpd(ctx, v524, v595);
-                                let v597 = constructor_output_xmm(ctx, v596);
-                                // Rule at src/isa/x64/lower.isle line 1255.
-                                return Some(v597);
-                            }
-                            _ => {}
-                        }
-                    }
-                }
-                &Opcode::Ceil => {
-                    let v2066 = &C::put_in_reg_mem(ctx, v376);
-                    let v618 = C::value_type(ctx, v376);
-                    let v2068 = constructor_x64_round(ctx, v618, v2066, &RoundImm::RoundUp);
-                    let v2069 = constructor_output_xmm(ctx, v2068);
-                    // Rule at src/isa/x64/lower.isle line 3914.
-                    return Some(v2069);
-                }
-                &Opcode::Floor => {
-                    let v2066 = &C::put_in_reg_mem(ctx, v376);
-                    let v618 = C::value_type(ctx, v376);
-                    let v2071 = constructor_x64_round(ctx, v618, v2066, &RoundImm::RoundDown);
-                    let v2072 = constructor_output_xmm(ctx, v2071);
-                    // Rule at src/isa/x64/lower.isle line 3919.
-                    return Some(v2072);
-                }
-                &Opcode::Trunc => {
-                    let v2066 = &C::put_in_reg_mem(ctx, v376);
-                    let v618 = C::value_type(ctx, v376);
-                    let v2077 = constructor_x64_round(ctx, v618, v2066, &RoundImm::RoundZero);
-                    let v2078 = constructor_output_xmm(ctx, v2077);
-                    // Rule at src/isa/x64/lower.isle line 3929.
-                    return Some(v2078);
-                }
-                &Opcode::Nearest => {
-                    let v2066 = &C::put_in_reg_mem(ctx, v376);
-                    let v618 = C::value_type(ctx, v376);
-                    let v2074 = constructor_x64_round(ctx, v618, v2066, &RoundImm::RoundNearest);
-                    let v2075 = constructor_output_xmm(ctx, v2074);
-                    // Rule at src/isa/x64/lower.isle line 3924.
-                    return Some(v2075);
-                }
-                &Opcode::IsNull => {
-                    let v618 = C::value_type(ctx, v376);
-                    if v618 == R64 {
-                        let v377 = constructor_put_in_gpr(ctx, v376);
-                        let v1150 = &constructor_x64_cmp_imm(ctx, &OperandSize::Size64, 0x0, v377);
-                        let v1151 = &constructor_x64_setcc(ctx, &CC::Z);
-                        let v1152 = constructor_with_flags(ctx, v1150, v1151);
-                        let v1153 = C::output(ctx, v1152);
-                        // Rule at src/isa/x64/lower.isle line 2347.
-                        return Some(v1153);
-                    }
-                }
-                &Opcode::IsInvalid => {
-                    let v618 = C::value_type(ctx, v376);
-                    if v618 == R64 {
-                        let v377 = constructor_put_in_gpr(ctx, v376);
-                        let v1155 =
-                            &constructor_x64_cmp_imm(ctx, &OperandSize::Size64, 0xFFFFFFFF, v377);
-                        let v1151 = &constructor_x64_setcc(ctx, &CC::Z);
-                        let v1156 = constructor_with_flags(ctx, v1155, v1151);
-                        let v1157 = C::output(ctx, v1156);
-                        // Rule at src/isa/x64/lower.isle line 2355.
-                        return Some(v1157);
-                    }
-                }
-                &Opcode::ScalarToVector => {
-                    let v2322 = &C::sinkable_load(ctx, v376);
-                    if let Some(v2323) = v2322 {
-                        let v618 = C::value_type(ctx, v376);
-                        let v2329 = C::ty_64(ctx, v618);
-                        if let Some(v2330) = v2329 {
-                            let v2326 = &C::sink_load(ctx, v2323);
-                            let v2331 = constructor_x64_movsd_load(ctx, v2326);
-                            let v2332 = constructor_output_xmm(ctx, v2331);
-                            // Rule at src/isa/x64/lower.isle line 4371.
-                            return Some(v2332);
-                        }
-                        let v2324 = C::ty_32(ctx, v618);
-                        if let Some(v2325) = v2324 {
-                            let v2326 = &C::sink_load(ctx, v2323);
-                            let v2327 = constructor_x64_movss_load(ctx, v2326);
-                            let v2328 = constructor_output_xmm(ctx, v2327);
-                            // Rule at src/isa/x64/lower.isle line 4369.
-                            return Some(v2328);
-                        }
-                    }
-                    let v618 = C::value_type(ctx, v376);
-                    let v1799 = C::ty_scalar_float(ctx, v618);
-                    if let Some(v1800) = v1799 {
-                        let v1176 = constructor_output_value(ctx, v376);
-                        // Rule at src/isa/x64/lower.isle line 4359.
-                        return Some(v1176);
-                    }
-                    let v377 = constructor_put_in_gpr(ctx, v376);
-                    let v2320 = constructor_bitcast_gpr_to_xmm(ctx, v618, v377);
-                    let v2321 = constructor_output_xmm(ctx, v2320);
-                    // Rule at src/isa/x64/lower.isle line 4364.
-                    return Some(v2321);
-                }
-                &Opcode::Bmask => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v380 = C::put_in_regs(ctx, v376);
-                        let v3 = C::value_type(ctx, v2);
-                        let v618 = C::value_type(ctx, v376);
-                        let v619 = constructor_lower_bmask(ctx, v3, v618, v380);
-                        let v620 = C::output(ctx, v619);
-                        // Rule at src/isa/x64/lower.isle line 1316.
-                        return Some(v620);
-                    }
-                }
-                &Opcode::Ireduce => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        let v4 = C::fits_in_64(ctx, v3);
-                        if let Some(v5) = v4 {
-                            let v380 = C::put_in_regs(ctx, v376);
-                            let v381 = constructor_value_regs_get_gpr(ctx, v380, 0x0);
-                            let v1177 = constructor_output_gpr(ctx, v381);
-                            // Rule at src/isa/x64/lower.isle line 2405.
-                            return Some(v1177);
-                        }
-                        let v618 = C::value_type(ctx, v376);
-                        if v3 == v618 {
-                            let v1176 = constructor_output_value(ctx, v376);
-                            // Rule at src/isa/x64/lower.isle line 2399.
-                            return Some(v1176);
-                        }
-                    }
-                }
-                &Opcode::SwidenLow => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            I16X8 => {
-                                let v436 = C::use_sse41(ctx);
-                                if v436 == true {
-                                    let v618 = C::value_type(ctx, v376);
-                                    if v618 == I8X16 {
-                                        let v521 = &C::put_in_xmm_mem(ctx, v376);
-                                        let v1952 = constructor_x64_pmovsxbw(ctx, v521);
-                                        let v1953 = constructor_output_xmm(ctx, v1952);
-                                        // Rule at src/isa/x64/lower.isle line 3634.
-                                        return Some(v1953);
-                                    }
-                                }
-                            }
-                            I32X4 => {
-                                let v436 = C::use_sse41(ctx);
-                                if v436 == true {
-                                    let v618 = C::value_type(ctx, v376);
-                                    if v618 == I16X8 {
-                                        let v521 = &C::put_in_xmm_mem(ctx, v376);
-                                        let v1954 = constructor_x64_pmovsxwd(ctx, v521);
-                                        let v1955 = constructor_output_xmm(ctx, v1954);
-                                        // Rule at src/isa/x64/lower.isle line 3637.
-                                        return Some(v1955);
-                                    }
-                                }
-                            }
-                            I64X2 => {
-                                let v436 = C::use_sse41(ctx);
-                                if v436 == true {
-                                    let v618 = C::value_type(ctx, v376);
-                                    if v618 == I32X4 {
-                                        let v521 = &C::put_in_xmm_mem(ctx, v376);
-                                        let v1956 = constructor_x64_pmovsxdq(ctx, v521);
-                                        let v1957 = constructor_output_xmm(ctx, v1956);
-                                        // Rule at src/isa/x64/lower.isle line 3640.
-                                        return Some(v1957);
-                                    }
-                                }
-                            }
-                            _ => {}
-                        }
-                        let v524 = constructor_put_in_xmm(ctx, v376);
-                        let v1958 = constructor_lower_swiden_low(ctx, v3, v524);
-                        let v1959 = constructor_output_xmm(ctx, v1958);
-                        // Rule at src/isa/x64/lower.isle line 3644.
-                        return Some(v1959);
-                    }
-                }
-                &Opcode::SwidenHigh => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            I16X8 => {
-                                let v618 = C::value_type(ctx, v376);
-                                if v618 == I8X16 {
-                                    let v436 = C::use_sse41(ctx);
-                                    if v436 == true {
-                                        let v520 = C::use_ssse3(ctx);
-                                        if v520 == true {
-                                            let v524 = constructor_put_in_xmm(ctx, v376);
-                                            let v1242 = &C::xmm_to_xmm_mem(ctx, v524);
-                                            let v1960 =
-                                                constructor_x64_palignr(ctx, v524, v1242, 0x8);
-                                            let v1961 = &C::xmm_to_xmm_mem(ctx, v1960);
-                                            let v1962 = constructor_x64_pmovsxbw(ctx, v1961);
-                                            let v1963 = constructor_output_xmm(ctx, v1962);
-                                            // Rule at src/isa/x64/lower.isle line 3667.
-                                            return Some(v1963);
-                                        }
-                                    }
-                                    let v524 = constructor_put_in_xmm(ctx, v376);
-                                    let v1242 = &C::xmm_to_xmm_mem(ctx, v524);
-                                    let v1970 = constructor_x64_punpckhbw(ctx, v524, v1242);
-                                    let v1971 = &C::xmi_imm(ctx, 0x8);
-                                    let v1972 = constructor_x64_psraw(ctx, v1970, v1971);
-                                    let v1973 = constructor_output_xmm(ctx, v1972);
-                                    // Rule at src/isa/x64/lower.isle line 3683.
-                                    return Some(v1973);
-                                }
-                            }
-                            I32X4 => {
-                                let v618 = C::value_type(ctx, v376);
-                                if v618 == I16X8 {
-                                    let v436 = C::use_sse41(ctx);
-                                    if v436 == true {
-                                        let v520 = C::use_ssse3(ctx);
-                                        if v520 == true {
-                                            let v524 = constructor_put_in_xmm(ctx, v376);
-                                            let v1242 = &C::xmm_to_xmm_mem(ctx, v524);
-                                            let v1960 =
-                                                constructor_x64_palignr(ctx, v524, v1242, 0x8);
-                                            let v1961 = &C::xmm_to_xmm_mem(ctx, v1960);
-                                            let v1964 = constructor_x64_pmovsxwd(ctx, v1961);
-                                            let v1965 = constructor_output_xmm(ctx, v1964);
-                                            // Rule at src/isa/x64/lower.isle line 3672.
-                                            return Some(v1965);
-                                        }
-                                    }
-                                    let v524 = constructor_put_in_xmm(ctx, v376);
-                                    let v1242 = &C::xmm_to_xmm_mem(ctx, v524);
-                                    let v1974 = constructor_x64_punpckhwd(ctx, v524, v1242);
-                                    let v1784 = &C::xmi_imm(ctx, 0x10);
-                                    let v1975 = constructor_x64_psrad(ctx, v1974, v1784);
-                                    let v1976 = constructor_output_xmm(ctx, v1975);
-                                    // Rule at src/isa/x64/lower.isle line 3686.
-                                    return Some(v1976);
-                                }
-                            }
-                            I64X2 => {
-                                let v618 = C::value_type(ctx, v376);
-                                if v618 == I32X4 {
-                                    let v436 = C::use_sse41(ctx);
-                                    if v436 == true {
-                                        let v521 = &C::put_in_xmm_mem(ctx, v376);
-                                        let v1966 = constructor_x64_pshufd(ctx, v521, 0xEE);
-                                        let v1967 = &C::xmm_to_xmm_mem(ctx, v1966);
-                                        let v1968 = constructor_x64_pmovsxdq(ctx, v1967);
-                                        let v1969 = constructor_output_xmm(ctx, v1968);
-                                        // Rule at src/isa/x64/lower.isle line 3677.
-                                        return Some(v1969);
-                                    }
-                                    let v521 = &C::put_in_xmm_mem(ctx, v376);
-                                    let v1978 = constructor_x64_pshufd(ctx, v521, 0xE);
-                                    let v1979 = constructor_xmm_zero(ctx, I32X4);
-                                    let v1980 = &C::xmm_to_xmm_mem(ctx, v1978);
-                                    let v1981 = constructor_x64_pcmpgtd(ctx, v1979, v1980);
-                                    let v1982 = &C::xmm_to_xmm_mem(ctx, v1981);
-                                    let v1983 = constructor_x64_punpckldq(ctx, v1978, v1982);
-                                    let v1984 = constructor_output_xmm(ctx, v1983);
-                                    // Rule at src/isa/x64/lower.isle line 3691.
-                                    return Some(v1984);
-                                }
-                            }
-                            _ => {}
-                        }
-                    }
-                }
-                &Opcode::UwidenLow => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            I16X8 => {
-                                let v436 = C::use_sse41(ctx);
-                                if v436 == true {
-                                    let v618 = C::value_type(ctx, v376);
-                                    if v618 == I8X16 {
-                                        let v521 = &C::put_in_xmm_mem(ctx, v376);
-                                        let v1985 = constructor_x64_pmovzxbw(ctx, v521);
-                                        let v1986 = constructor_output_xmm(ctx, v1985);
-                                        // Rule at src/isa/x64/lower.isle line 3699.
-                                        return Some(v1986);
-                                    }
-                                }
-                            }
-                            I32X4 => {
-                                let v436 = C::use_sse41(ctx);
-                                if v436 == true {
-                                    let v618 = C::value_type(ctx, v376);
-                                    if v618 == I16X8 {
-                                        let v521 = &C::put_in_xmm_mem(ctx, v376);
-                                        let v1987 = constructor_x64_pmovzxwd(ctx, v521);
-                                        let v1988 = constructor_output_xmm(ctx, v1987);
-                                        // Rule at src/isa/x64/lower.isle line 3702.
-                                        return Some(v1988);
-                                    }
-                                }
-                            }
-                            I64X2 => {
-                                let v436 = C::use_sse41(ctx);
-                                if v436 == true {
-                                    let v618 = C::value_type(ctx, v376);
-                                    if v618 == I32X4 {
-                                        let v521 = &C::put_in_xmm_mem(ctx, v376);
-                                        let v1989 = constructor_x64_pmovzxdq(ctx, v521);
-                                        let v1990 = constructor_output_xmm(ctx, v1989);
-                                        // Rule at src/isa/x64/lower.isle line 3705.
-                                        return Some(v1990);
-                                    }
-                                }
-                            }
-                            _ => {}
-                        }
-                        let v524 = constructor_put_in_xmm(ctx, v376);
-                        let v1991 = constructor_lower_uwiden_low(ctx, v3, v524);
-                        let v1992 = constructor_output_xmm(ctx, v1991);
-                        // Rule at src/isa/x64/lower.isle line 3709.
-                        return Some(v1992);
-                    }
-                }
-                &Opcode::UwidenHigh => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            I16X8 => {
-                                let v618 = C::value_type(ctx, v376);
-                                if v618 == I8X16 {
-                                    let v524 = constructor_put_in_xmm(ctx, v376);
-                                    let v525 = constructor_xmm_zero(ctx, I8X16);
-                                    let v1993 = &C::xmm_to_xmm_mem(ctx, v525);
-                                    let v1994 = constructor_x64_punpckhbw(ctx, v524, v1993);
-                                    let v1995 = constructor_output_xmm(ctx, v1994);
-                                    // Rule at src/isa/x64/lower.isle line 3724.
-                                    return Some(v1995);
-                                }
-                            }
-                            I32X4 => {
-                                let v618 = C::value_type(ctx, v376);
-                                if v618 == I16X8 {
-                                    let v524 = constructor_put_in_xmm(ctx, v376);
-                                    let v525 = constructor_xmm_zero(ctx, I8X16);
-                                    let v1993 = &C::xmm_to_xmm_mem(ctx, v525);
-                                    let v1996 = constructor_x64_punpckhwd(ctx, v524, v1993);
-                                    let v1997 = constructor_output_xmm(ctx, v1996);
-                                    // Rule at src/isa/x64/lower.isle line 3726.
-                                    return Some(v1997);
-                                }
-                            }
-                            I64X2 => {
-                                let v618 = C::value_type(ctx, v376);
-                                if v618 == I32X4 {
-                                    let v524 = constructor_put_in_xmm(ctx, v376);
-                                    let v1823 = constructor_xmm_zero(ctx, F32X4);
-                                    let v1824 = &C::xmm_to_xmm_mem(ctx, v1823);
-                                    let v1998 = constructor_x64_unpckhps(ctx, v524, v1824);
-                                    let v1999 = constructor_output_xmm(ctx, v1998);
-                                    // Rule at src/isa/x64/lower.isle line 3728.
-                                    return Some(v1999);
-                                }
-                            }
-                            _ => {}
-                        }
-                    }
-                }
-                &Opcode::Uextend => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            I64 => {
-                                let v1158 =
-                                    constructor_extend_to_gpr(ctx, v376, I64, &ExtendKind::Zero);
-                                let v1163 = constructor_output_gpr(ctx, v1158);
-                                // Rule at src/isa/x64/lower.isle line 2368.
-                                return Some(v1163);
-                            }
-                            I128 => {
-                                let v1158 =
-                                    constructor_extend_to_gpr(ctx, v376, I64, &ExtendKind::Zero);
-                                let v1159 = C::gpr_to_reg(ctx, v1158);
-                                let v1160 = constructor_imm(ctx, I64, 0x0);
-                                let v1161 = C::value_regs(ctx, v1159, v1160);
-                                let v1162 = C::output(ctx, v1161);
-                                // Rule at src/isa/x64/lower.isle line 2364.
-                                return Some(v1162);
-                            }
-                            _ => {}
-                        }
-                        let v1164 = C::fits_in_32(ctx, v3);
-                        if let Some(v1165) = v1164 {
-                            let v1005 =
-                                constructor_extend_to_gpr(ctx, v376, I32, &ExtendKind::Zero);
-                            let v1166 = constructor_output_gpr(ctx, v1005);
-                            // Rule at src/isa/x64/lower.isle line 2373.
-                            return Some(v1166);
-                        }
-                    }
-                }
-                &Opcode::Sextend => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            I64 => {
-                                let v1167 =
-                                    constructor_extend_to_gpr(ctx, v376, I64, &ExtendKind::Sign);
-                                let v1173 = constructor_output_gpr(ctx, v1167);
-                                // Rule at src/isa/x64/lower.isle line 2388.
-                                return Some(v1173);
-                            }
-                            I128 => {
-                                let v1167 =
-                                    constructor_extend_to_gpr(ctx, v376, I64, &ExtendKind::Sign);
-                                let v782 = Imm8Reg::Imm8 { imm: 0x3F };
-                                let v783 = &C::imm8_reg_to_imm8_gpr(ctx, &v782);
-                                let v1168 = constructor_x64_sar(ctx, I64, v1167, v783);
-                                let v1169 = C::gpr_to_reg(ctx, v1167);
-                                let v1170 = C::gpr_to_reg(ctx, v1168);
-                                let v1171 = C::value_regs(ctx, v1169, v1170);
-                                let v1172 = C::output(ctx, v1171);
-                                // Rule at src/isa/x64/lower.isle line 2382.
-                                return Some(v1172);
-                            }
-                            _ => {}
-                        }
-                        let v1164 = C::fits_in_32(ctx, v3);
-                        if let Some(v1165) = v1164 {
-                            let v1174 =
-                                constructor_extend_to_gpr(ctx, v376, I32, &ExtendKind::Sign);
-                            let v1175 = constructor_output_gpr(ctx, v1174);
-                            // Rule at src/isa/x64/lower.isle line 2393.
-                            return Some(v1175);
-                        }
-                    }
-                }
-                &Opcode::Fpromote => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        if v3 == F64 {
-                            let v521 = &C::put_in_xmm_mem(ctx, v376);
-                            let v1240 = constructor_x64_cvtss2sd(ctx, v521);
-                            let v1241 = constructor_output_xmm(ctx, v1240);
-                            // Rule at src/isa/x64/lower.isle line 2496.
-                            return Some(v1241);
-                        }
-                    }
-                }
-                &Opcode::Fdemote => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        if v3 == F32 {
-                            let v521 = &C::put_in_xmm_mem(ctx, v376);
-                            let v1245 = constructor_x64_cvtsd2ss(ctx, v521);
-                            let v1246 = constructor_output_xmm(ctx, v1245);
-                            // Rule at src/isa/x64/lower.isle line 2504.
-                            return Some(v1246);
-                        }
-                    }
-                }
-                &Opcode::Fvdemote => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        if v3 == F32X4 {
-                            let v521 = &C::put_in_xmm_mem(ctx, v376);
-                            let v1247 = constructor_x64_cvtpd2ps(ctx, v521);
-                            let v1248 = constructor_output_xmm(ctx, v1247);
-                            // Rule at src/isa/x64/lower.isle line 2508.
-                            return Some(v1248);
-                        }
-                    }
-                }
-                &Opcode::FvpromoteLow => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        if v3 == F64X2 {
-                            let v524 = constructor_put_in_xmm(ctx, v376);
-                            let v1242 = &C::xmm_to_xmm_mem(ctx, v524);
-                            let v1243 = constructor_x64_cvtps2pd(ctx, v1242);
-                            let v1244 = constructor_output_xmm(ctx, v1243);
-                            // Rule at src/isa/x64/lower.isle line 2500.
-                            return Some(v1244);
-                        }
-                    }
-                }
-                &Opcode::FcvtToUint => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v618 = C::value_type(ctx, v376);
-                        let v1799 = C::ty_scalar_float(ctx, v618);
-                        if let Some(v1800) = v1799 {
-                            let v3 = C::value_type(ctx, v2);
-                            let v1801 = constructor_cvt_float_to_uint_seq(ctx, v3, v376, false);
-                            let v1802 = constructor_output_gpr(ctx, v1801);
-                            // Rule at src/isa/x64/lower.isle line 3386.
-                            return Some(v1802);
-                        }
-                    }
-                }
-                &Opcode::FcvtToSint => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v618 = C::value_type(ctx, v376);
-                        let v1799 = C::ty_scalar_float(ctx, v618);
-                        if let Some(v1800) = v1799 {
-                            let v3 = C::value_type(ctx, v2);
-                            let v1805 = constructor_cvt_float_to_sint_seq(ctx, v3, v376, false);
-                            let v1806 = constructor_output_gpr(ctx, v1805);
-                            // Rule at src/isa/x64/lower.isle line 3392.
-                            return Some(v1806);
-                        }
-                    }
-                }
-                &Opcode::FcvtToUintSat => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        if v3 == I32X4 {
-                            let v618 = C::value_type(ctx, v376);
-                            if v618 == F32X4 {
-                                let v524 = constructor_put_in_xmm(ctx, v376);
-                                let v1823 = constructor_xmm_zero(ctx, F32X4);
-                                let v1824 = &C::xmm_to_xmm_mem(ctx, v1823);
-                                let v1825 = constructor_x64_maxps(ctx, v524, v1824);
-                                let v1826 = &C::xmm_to_xmm_mem(ctx, v1823);
-                                let v1827 = constructor_x64_pcmpeqd(ctx, v1823, v1826);
-                                let v1828 = &C::xmi_imm(ctx, 0x1);
-                                let v1829 = constructor_x64_psrld(ctx, v1827, v1828);
-                                let v1830 = &C::xmm_to_xmm_mem(ctx, v1829);
-                                let v1831 = constructor_x64_cvtdq2ps(ctx, v1830);
-                                let v1832 = &C::xmm_to_xmm_mem(ctx, v1825);
-                                let v1833 = constructor_x64_cvttps2dq(ctx, v1832);
-                                let v1834 = &C::xmm_to_xmm_mem(ctx, v1831);
-                                let v1835 = constructor_x64_subps(ctx, v1825, v1834);
-                                let v1836 = &C::xmm_to_xmm_mem(ctx, v1835);
-                                let v1837 = constructor_x64_cmpps(
-                                    ctx,
-                                    v1831,
-                                    v1836,
-                                    &FcmpImm::LessThanOrEqual,
-                                );
-                                let v1838 = &C::xmm_to_xmm_mem(ctx, v1835);
-                                let v1839 = constructor_x64_cvttps2dq(ctx, v1838);
-                                let v1840 = &C::xmm_to_xmm_mem(ctx, v1837);
-                                let v1841 = constructor_x64_pxor(ctx, v1839, v1840);
-                                let v1842 = constructor_xmm_zero(ctx, I32X4);
-                                let v1843 = constructor_lower_vec_smax(ctx, I32X4, v1841, v1842);
-                                let v1844 = &C::xmm_to_xmm_mem(ctx, v1833);
-                                let v1845 = constructor_x64_paddd(ctx, v1843, v1844);
-                                let v1846 = constructor_output_xmm(ctx, v1845);
-                                // Rule at src/isa/x64/lower.isle line 3470.
-                                return Some(v1846);
-                            }
-                        }
-                        let v618 = C::value_type(ctx, v376);
-                        let v1799 = C::ty_scalar_float(ctx, v618);
-                        if let Some(v1800) = v1799 {
-                            let v1803 = constructor_cvt_float_to_uint_seq(ctx, v3, v376, true);
-                            let v1804 = constructor_output_gpr(ctx, v1803);
-                            // Rule at src/isa/x64/lower.isle line 3389.
-                            return Some(v1804);
-                        }
-                    }
-                }
-                &Opcode::FcvtToSintSat => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        if v3 == I32X4 {
-                            let v618 = C::value_type(ctx, v376);
-                            if v618 == F32X4 {
-                                let v524 = constructor_put_in_xmm(ctx, v376);
-                                let v1242 = &C::xmm_to_xmm_mem(ctx, v524);
-                                let v1809 =
-                                    constructor_x64_cmpps(ctx, v524, v1242, &FcmpImm::Equal);
-                                let v1810 = &C::xmm_to_xmm_mem(ctx, v1809);
-                                let v1811 = constructor_x64_andps(ctx, v524, v1810);
-                                let v1812 = &C::xmm_to_xmm_mem(ctx, v1811);
-                                let v1813 = constructor_x64_pxor(ctx, v1809, v1812);
-                                let v1814 = &C::xmm_to_xmm_mem(ctx, v1811);
-                                let v1815 = constructor_x64_cvttps2dq(ctx, v1814);
-                                let v1816 = &C::xmm_to_xmm_mem(ctx, v1813);
-                                let v1817 = constructor_x64_pand(ctx, v1815, v1816);
-                                let v1818 = &C::xmi_imm(ctx, 0x1F);
-                                let v1819 = constructor_x64_psrad(ctx, v1817, v1818);
-                                let v1820 = &C::xmm_to_xmm_mem(ctx, v1815);
-                                let v1821 = constructor_x64_pxor(ctx, v1819, v1820);
-                                let v1822 = constructor_output_xmm(ctx, v1821);
-                                // Rule at src/isa/x64/lower.isle line 3399.
-                                return Some(v1822);
-                            }
-                        }
-                        let v618 = C::value_type(ctx, v376);
-                        let v1799 = C::ty_scalar_float(ctx, v618);
-                        if let Some(v1800) = v1799 {
-                            let v1807 = constructor_cvt_float_to_sint_seq(ctx, v3, v376, true);
-                            let v1808 = constructor_output_gpr(ctx, v1807);
-                            // Rule at src/isa/x64/lower.isle line 3395.
-                            return Some(v1808);
-                        }
-                    }
-                }
-                &Opcode::X86Cvtt2dq => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        if v3 == I32X4 {
-                            let v618 = C::value_type(ctx, v376);
-                            if v618 == F32X4 {
-                                let v521 = &C::put_in_xmm_mem(ctx, v376);
-                                let v1847 = constructor_x64_cvttps2dq(ctx, v521);
-                                let v1848 = constructor_output_xmm(ctx, v1847);
-                                // Rule at src/isa/x64/lower.isle line 3517.
-                                return Some(v1848);
-                            }
-                        }
-                    }
-                }
-                &Opcode::FcvtFromUint => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            F32 => {
-                                let v618 = C::value_type(ctx, v376);
-                                let v1758 = C::fits_in_32(ctx, v618);
-                                if let Some(v1759) = v1758 {
-                                    let v1760 = C::ty_int(ctx, v1759);
-                                    if let Some(v1761) = v1760 {
-                                        let v1158 = constructor_extend_to_gpr(
-                                            ctx,
-                                            v376,
-                                            I64,
-                                            &ExtendKind::Zero,
-                                        );
-                                        let v1762 = &C::gpr_to_gpr_mem(ctx, v1158);
-                                        let v1763 = constructor_x64_cvtsi2ss(ctx, I64, v1762);
-                                        let v1764 = constructor_output_xmm(ctx, v1763);
-                                        // Rule at src/isa/x64/lower.isle line 3313.
-                                        return Some(v1764);
-                                    }
-                                }
-                            }
-                            F64 => {
-                                let v618 = C::value_type(ctx, v376);
-                                let v1758 = C::fits_in_32(ctx, v618);
-                                if let Some(v1759) = v1758 {
-                                    let v1760 = C::ty_int(ctx, v1759);
-                                    if let Some(v1761) = v1760 {
-                                        let v1158 = constructor_extend_to_gpr(
-                                            ctx,
-                                            v376,
-                                            I64,
-                                            &ExtendKind::Zero,
-                                        );
-                                        let v1762 = &C::gpr_to_gpr_mem(ctx, v1158);
-                                        let v1765 = constructor_x64_cvtsi2sd(ctx, I64, v1762);
-                                        let v1766 = constructor_output_xmm(ctx, v1765);
-                                        // Rule at src/isa/x64/lower.isle line 3316.
-                                        return Some(v1766);
-                                    }
-                                }
-                            }
-                            F32X4 => {
-                                let v328 = C::use_avx512vl(ctx);
-                                if v328 == true {
-                                    let v329 = C::use_avx512f(ctx);
-                                    if v329 == true {
-                                        let v521 = &C::put_in_xmm_mem(ctx, v376);
-                                        let v1779 = constructor_x64_vcvtudq2ps(ctx, v521);
-                                        let v1780 = constructor_output_xmm(ctx, v1779);
-                                        // Rule at src/isa/x64/lower.isle line 3334.
-                                        return Some(v1780);
-                                    }
-                                }
-                                let v524 = constructor_put_in_xmm(ctx, v376);
-                                let v1782 = &C::xmi_imm(ctx, 0x10);
-                                let v1783 = constructor_x64_pslld(ctx, v524, v1782);
-                                let v1784 = &C::xmi_imm(ctx, 0x10);
-                                let v1785 = constructor_x64_psrld(ctx, v1783, v1784);
-                                let v1786 = &C::xmm_to_xmm_mem(ctx, v1785);
-                                let v1787 = constructor_x64_psubd(ctx, v524, v1786);
-                                let v1788 = &C::xmm_to_xmm_mem(ctx, v1785);
-                                let v1789 = constructor_x64_cvtdq2ps(ctx, v1788);
-                                let v1790 = &C::xmi_imm(ctx, 0x1);
-                                let v1791 = constructor_x64_psrld(ctx, v1787, v1790);
-                                let v1792 = &C::xmm_to_xmm_mem(ctx, v1791);
-                                let v1793 = constructor_x64_cvtdq2ps(ctx, v1792);
-                                let v1794 = &C::xmm_to_xmm_mem(ctx, v1793);
-                                let v1795 = constructor_x64_addps(ctx, v1793, v1794);
-                                let v1796 = &C::xmm_to_xmm_mem(ctx, v1789);
-                                let v1797 = constructor_x64_addps(ctx, v1795, v1796);
-                                let v1798 = constructor_output_xmm(ctx, v1797);
-                                // Rule at src/isa/x64/lower.isle line 3362.
-                                return Some(v1798);
-                            }
-                            F64X2 => {
-                                let v1749 = C::def_inst(ctx, v376);
-                                if let Some(v1750) = v1749 {
-                                    let v1751 = &C::inst_data(ctx, v1750);
-                                    if let &InstructionData::Unary {
-                                        opcode: ref v1752,
-                                        arg: v1753,
-                                    } = v1751
-                                    {
-                                        if let &Opcode::UwidenLow = v1752 {
-                                            let v1754 = C::value_type(ctx, v1753);
-                                            if v1754 == I32X4 {
-                                                let v1770 =
-                                                    C::emit_u128_le_const(ctx, 0x4330000043300000);
-                                                let v1771 =
-                                                    &constructor_const_to_xmm_mem(ctx, v1770);
-                                                let v1772 = constructor_put_in_xmm(ctx, v1753);
-                                                let v1773 =
-                                                    constructor_x64_unpcklps(ctx, v1772, v1771);
-                                                let v1775 = C::emit_u128_le_const(
-                                                    ctx,
-                                                    0x43300000000000004330000000000000,
-                                                );
-                                                let v1776 =
-                                                    &constructor_const_to_xmm_mem(ctx, v1775);
-                                                let v1777 =
-                                                    constructor_x64_subpd(ctx, v1773, v1776);
-                                                let v1778 = constructor_output_xmm(ctx, v1777);
-                                                // Rule at src/isa/x64/lower.isle line 3326.
-                                                return Some(v1778);
-                                            }
-                                        }
-                                    }
-                                }
-                            }
-                            _ => {}
-                        }
-                        let v618 = C::value_type(ctx, v376);
-                        if v618 == I64 {
-                            let v377 = constructor_put_in_gpr(ctx, v376);
-                            let v1767 = constructor_cvt_u64_to_float_seq(ctx, v3, v377);
-                            let v1768 = constructor_output_xmm(ctx, v1767);
-                            // Rule at src/isa/x64/lower.isle line 3319.
-                            return Some(v1768);
-                        }
-                    }
-                }
-                &Opcode::FcvtFromSint => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v3 = C::value_type(ctx, v2);
-                        match v3 {
-                            F32 => {
-                                let v618 = C::value_type(ctx, v376);
-                                match v618 {
-                                    I8 => {
-                                        let v1174 = constructor_extend_to_gpr(
-                                            ctx,
-                                            v376,
-                                            I32,
-                                            &ExtendKind::Sign,
-                                        );
-                                        let v1733 = &C::gpr_to_gpr_mem(ctx, v1174);
-                                        let v1734 = constructor_x64_cvtsi2ss(ctx, I32, v1733);
-                                        let v1735 = constructor_output_xmm(ctx, v1734);
-                                        // Rule at src/isa/x64/lower.isle line 3287.
-                                        return Some(v1735);
-                                    }
-                                    I16 => {
-                                        let v1174 = constructor_extend_to_gpr(
-                                            ctx,
-                                            v376,
-                                            I32,
-                                            &ExtendKind::Sign,
-                                        );
-                                        let v1733 = &C::gpr_to_gpr_mem(ctx, v1174);
-                                        let v1734 = constructor_x64_cvtsi2ss(ctx, I32, v1733);
-                                        let v1735 = constructor_output_xmm(ctx, v1734);
-                                        // Rule at src/isa/x64/lower.isle line 3290.
-                                        return Some(v1735);
-                                    }
-                                    _ => {}
-                                }
-                                let v1736 = C::ty_int(ctx, v618);
-                                if let Some(v1737) = v1736 {
-                                    let v1738 = C::fits_in_64(ctx, v1737);
-                                    if let Some(v1739) = v1738 {
-                                        let v1740 = &constructor_put_in_gpr_mem(ctx, v376);
-                                        let v1741 = constructor_x64_cvtsi2ss(ctx, v1739, v1740);
-                                        let v1742 = constructor_output_xmm(ctx, v1741);
-                                        // Rule at src/isa/x64/lower.isle line 3293.
-                                        return Some(v1742);
-                                    }
-                                }
-                            }
-                            F64 => {
-                                let v618 = C::value_type(ctx, v376);
-                                match v618 {
-                                    I8 => {
-                                        let v1174 = constructor_extend_to_gpr(
-                                            ctx,
-                                            v376,
-                                            I32,
-                                            &ExtendKind::Sign,
-                                        );
-                                        let v1733 = &C::gpr_to_gpr_mem(ctx, v1174);
-                                        let v1743 = constructor_x64_cvtsi2sd(ctx, I32, v1733);
-                                        let v1744 = constructor_output_xmm(ctx, v1743);
-                                        // Rule at src/isa/x64/lower.isle line 3296.
-                                        return Some(v1744);
-                                    }
-                                    I16 => {
-                                        let v1174 = constructor_extend_to_gpr(
-                                            ctx,
-                                            v376,
-                                            I32,
-                                            &ExtendKind::Sign,
-                                        );
-                                        let v1733 = &C::gpr_to_gpr_mem(ctx, v1174);
-                                        let v1743 = constructor_x64_cvtsi2sd(ctx, I32, v1733);
-                                        let v1744 = constructor_output_xmm(ctx, v1743);
-                                        // Rule at src/isa/x64/lower.isle line 3299.
-                                        return Some(v1744);
-                                    }
-                                    _ => {}
-                                }
-                                let v1736 = C::ty_int(ctx, v618);
-                                if let Some(v1737) = v1736 {
-                                    let v1738 = C::fits_in_64(ctx, v1737);
-                                    if let Some(v1739) = v1738 {
-                                        let v1740 = &constructor_put_in_gpr_mem(ctx, v376);
-                                        let v1745 = constructor_x64_cvtsi2sd(ctx, v1739, v1740);
-                                        let v1746 = constructor_output_xmm(ctx, v1745);
-                                        // Rule at src/isa/x64/lower.isle line 3302.
-                                        return Some(v1746);
-                                    }
-                                }
-                            }
-                            F64X2 => {
-                                let v1749 = C::def_inst(ctx, v376);
-                                if let Some(v1750) = v1749 {
-                                    let v1751 = &C::inst_data(ctx, v1750);
-                                    if let &InstructionData::Unary {
-                                        opcode: ref v1752,
-                                        arg: v1753,
-                                    } = v1751
-                                    {
-                                        if let &Opcode::SwidenLow = v1752 {
-                                            let v1754 = C::value_type(ctx, v1753);
-                                            if v1754 == I32X4 {
-                                                let v1755 = &C::put_in_xmm_mem(ctx, v1753);
-                                                let v1756 = constructor_x64_cvtdq2pd(ctx, v1755);
-                                                let v1757 = constructor_output_xmm(ctx, v1756);
-                                                // Rule at src/isa/x64/lower.isle line 3308.
-                                                return Some(v1757);
-                                            }
-                                        }
-                                    }
-                                }
-                            }
-                            _ => {}
-                        }
-                    }
-                    let v618 = C::value_type(ctx, v376);
-                    if v618 == I32X4 {
-                        let v521 = &C::put_in_xmm_mem(ctx, v376);
-                        let v1747 = constructor_x64_cvtdq2ps(ctx, v521);
-                        let v1748 = constructor_output_xmm(ctx, v1747);
-                        // Rule at src/isa/x64/lower.isle line 3305.
-                        return Some(v1748);
-                    }
-                }
-                &Opcode::Isplit => {
-                    let v618 = C::value_type(ctx, v376);
-                    if v618 == I128 {
-                        let v380 = C::put_in_regs(ctx, v376);
-                        let v2451 = C::value_regs_get(ctx, v380, 0x0);
-                        let v2452 = C::value_regs_get(ctx, v380, 0x1);
-                        let v2453 = C::value_reg(ctx, v2451);
-                        let v2454 = C::value_reg(ctx, v2452);
-                        let v2455 = C::output_pair(ctx, v2453, v2454);
-                        // Rule at src/isa/x64/lower.isle line 4543.
-                        return Some(v2455);
-                    }
-                }
-                _ => {}
-            }
-        }
-        &InstructionData::UnaryConst {
-            opcode: ref v2162,
-            constant_handle: v2163,
-        } => {
-            if let &Opcode::Vconst = v2162 {
-                let v1 = C::first_result(ctx, arg0);
-                if let Some(v2) = v1 {
-                    let v2164 = C::const_to_vconst(ctx, v2163);
-                    let v3 = C::value_type(ctx, v2);
-                    let v2165 = constructor_x64_xmm_load_const(ctx, v3, v2164);
-                    let v2166 = constructor_output_xmm(ctx, v2165);
-                    // Rule at src/isa/x64/lower.isle line 4113.
-                    return Some(v2166);
-                }
-            }
-        }
-        &InstructionData::UnaryGlobalValue {
-            opcode: ref v1626,
-            global_value: v1627,
-        } => {
-            match v1626 {
-                &Opcode::SymbolValue => {
-                    let v1628 = C::symbol_value_data(ctx, v1627);
-                    if let Some(v1629) = v1628 {
-                        let v1633 = constructor_load_ext_name(ctx, v1629.0, v1629.2, v1629.1);
-                        let v1634 = constructor_output_reg(ctx, v1633);
-                        // Rule at src/isa/x64/lower.isle line 3132.
-                        return Some(v1634);
-                    }
-                }
-                &Opcode::TlsValue => {
-                    let v1 = C::first_result(ctx, arg0);
-                    if let Some(v2) = v1 {
-                        let v1628 = C::symbol_value_data(ctx, v1627);
-                        if let Some(v1629) = v1628 {
-                            let v3 = C::value_type(ctx, v2);
-                            let v2456 = &C::tls_model(ctx, v3);
-                            match v2456 {
-                                &TlsModel::ElfGd => {
-                                    let v2457 = constructor_elf_tls_get_addr(ctx, v1629.0);
-                                    let v2458 = constructor_output_gpr(ctx, v2457);
-                                    // Rule at src/isa/x64/lower.isle line 4551.
-                                    return Some(v2458);
-                                }
-                                &TlsModel::Macho => {
-                                    let v2459 = constructor_macho_tls_get_addr(ctx, v1629.0);
-                                    let v2460 = constructor_output_gpr(ctx, v2459);
-                                    // Rule at src/isa/x64/lower.isle line 4554.
-                                    return Some(v2460);
-                                }
-                                &TlsModel::Coff => {
-                                    let v2461 = constructor_coff_tls_get_addr(ctx, v1629.0);
-                                    let v2462 = constructor_output_gpr(ctx, v2461);
-                                    // Rule at src/isa/x64/lower.isle line 4557.
-                                    return Some(v2462);
-                                }
-                                _ => {}
-                            }
-                        }
-                    }
-                }
-                _ => {}
-            }
-        }
-        &InstructionData::UnaryIeee32 {
-            opcode: ref v18,
-            imm: v19,
-        } => {
-            if let &Opcode::F32const = v18 {
-                let v20 = C::u32_from_ieee32(ctx, v19);
-                let v22 = C::u32_as_u64(ctx, v20);
-                let v23 = constructor_imm(ctx, F32, v22);
-                let v24 = constructor_output_reg(ctx, v23);
-                // Rule at src/isa/x64/lower.isle line 27.
-                return Some(v24);
-            }
-        }
-        &InstructionData::UnaryIeee64 {
-            opcode: ref v25,
-            imm: v26,
-        } => {
-            if let &Opcode::F64const = v25 {
-                let v27 = C::u64_from_ieee64(ctx, v26);
-                let v29 = constructor_imm(ctx, F64, v27);
-                let v30 = constructor_output_reg(ctx, v29);
-                // Rule at src/isa/x64/lower.isle line 32.
-                return Some(v30);
-            }
-        }
-        &InstructionData::UnaryImm {
-            opcode: ref v7,
-            imm: v8,
-        } => {
-            if let &Opcode::Iconst = v7 {
-                let v1 = C::first_result(ctx, arg0);
-                if let Some(v2) = v1 {
-                    let v3 = C::value_type(ctx, v2);
-                    if v3 == I128 {
-                        let v9 = C::u64_from_imm64(ctx, v8);
-                        let v13 = constructor_imm(ctx, I64, v9);
-                        let v15 = constructor_imm(ctx, I64, 0x0);
-                        let v16 = C::value_regs(ctx, v13, v15);
-                        let v17 = C::output(ctx, v16);
-                        // Rule at src/isa/x64/lower.isle line 20.
-                        return Some(v17);
-                    }
-                    let v4 = C::fits_in_64(ctx, v3);
-                    if let Some(v5) = v4 {
-                        let v9 = C::u64_from_imm64(ctx, v8);
-                        let v10 = constructor_imm(ctx, v5, v9);
-                        let v11 = constructor_output_reg(ctx, v10);
-                        // Rule at src/isa/x64/lower.isle line 15.
-                        return Some(v11);
-                    }
-                }
-            }
-        }
-        _ => {}
-    }
-    None
-}
-
-// Generated as internal constructor for term lower_branch.
-pub fn constructor_lower_branch<C: Context>(
-    ctx: &mut C,
-    arg0: Inst,
-    arg1: &MachLabelSlice,
-) -> Option<Unit> {
-    let v1 = &C::inst_data(ctx, arg0);
-    match v1 {
-        &InstructionData::BranchTable {
-            opcode: ref v55,
-            arg: v56,
-            table: v57,
-        } => {
-            if let &Opcode::BrTable = v55 {
-                let v59 = C::jump_table_targets(ctx, arg1);
-                if let Some(v60) = v59 {
-                    let v58 = C::value_type(ctx, v56);
-                    let v63 = &C::raw_operand_size_of_type(ctx, v58);
-                    let v64 = C::jump_table_size(ctx, &v60.1);
-                    let v65 = C::u32_as_u64(ctx, v64);
-                    let v66 = constructor_imm(ctx, v58, v65);
-                    let v69 = constructor_extend_to_gpr(ctx, v56, I64, &ExtendKind::Zero);
-                    let v70 = &constructor_reg_to_gpr_mem_imm(ctx, v66);
-                    let v71 = &constructor_x64_cmp(ctx, v63, v70, v69);
-                    let v73 = &C::gpr_to_gpr_mem(ctx, v69);
-                    let v74 = C::gpr_new(ctx, v66);
-                    let v75 = &constructor_cmove(ctx, v58, &CC::B, v73, v74);
-                    let v76 = constructor_with_flags_reg(ctx, v71, v75);
-                    let v77 = C::gpr_new(ctx, v76);
-                    let v78 = &constructor_jmp_table_seq(ctx, v58, v77, v60.0, &v60.1);
-                    let v79 = constructor_emit_side_effect(ctx, v78);
-                    // Rule at src/isa/x64/lower.isle line 3261.
-                    return Some(v79);
-                }
-            }
-        }
-        &InstructionData::Brif {
-            opcode: ref v9,
-            arg: v10,
-            blocks: ref v11,
-        } => {
-            if let &Opcode::Brif = v9 {
-                let v26 = C::two_targets(ctx, arg1);
-                if let Some(v27) = v26 {
-                    let v12 = C::maybe_uextend(ctx, v10);
-                    if let Some(v13) = v12 {
-                        let v14 = C::def_inst(ctx, v13);
-                        if let Some(v15) = v14 {
-                            let v16 = &C::inst_data(ctx, v15);
-                            match v16 {
-                                &InstructionData::FloatCompare {
-                                    opcode: ref v33,
-                                    args: ref v34,
-                                    cond: ref v35,
-                                } => {
-                                    if let &Opcode::Fcmp = v33 {
-                                        let v36 = C::unpack_value_array_2(ctx, v34);
-                                        let v39 = &constructor_emit_fcmp(ctx, v35, v36.0, v36.1);
-                                        let v40 =
-                                            &constructor_jmp_cond_fcmp(ctx, v39, v27.0, v27.1);
-                                        let v41 = constructor_emit_side_effect(ctx, v40);
-                                        // Rule at src/isa/x64/lower.isle line 3222.
-                                        return Some(v41);
-                                    }
-                                }
-                                &InstructionData::IntCompare {
-                                    opcode: ref v17,
-                                    args: ref v18,
-                                    cond: ref v19,
-                                } => {
-                                    if let &Opcode::Icmp = v17 {
-                                        let v20 = C::unpack_value_array_2(ctx, v18);
-                                        let v30 = &constructor_emit_cmp(ctx, v19, v20.0, v20.1);
-                                        let v31 =
-                                            &constructor_jmp_cond_icmp(ctx, v30, v27.0, v27.1);
-                                        let v32 = constructor_emit_side_effect(ctx, v31);
-                                        // Rule at src/isa/x64/lower.isle line 3219.
-                                        return Some(v32);
-                                    }
-                                }
-                                _ => {}
-                            }
-                        }
-                    }
-                    let v42 = C::value_type(ctx, v10);
-                    if v42 == I128 {
-                        let v44 = C::put_in_regs(ctx, v10);
-                        let v45 = &constructor_cmp_zero_i128(ctx, &CC::Z, v44);
-                        let v46 = &constructor_jmp_cond_icmp(ctx, v45, v27.0, v27.1);
-                        let v47 = constructor_emit_side_effect(ctx, v46);
-                        // Rule at src/isa/x64/lower.isle line 3225.
-                        return Some(v47);
-                    }
-                    let v48 = C::ty_int_bool_or_ref(ctx, v42);
-                    if let Some(v49) = v48 {
-                        let v50 = &constructor_cmp_zero_int_bool_ref(ctx, v10);
-                        let v52 = &constructor_jmp_cond(ctx, &CC::NZ, v27.0, v27.1);
-                        let v53 = &constructor_with_flags_side_effect(ctx, v50, v52);
-                        let v54 = constructor_emit_side_effect(ctx, v53);
-                        // Rule at src/isa/x64/lower.isle line 3229.
-                        return Some(v54);
-                    }
-                }
-            }
-        }
-        &InstructionData::Jump {
-            opcode: ref v2,
-            destination: v3,
-        } => {
-            if let &Opcode::Jump = v2 {
-                let v5 = C::single_target(ctx, arg1);
-                if let Some(v6) = v5 {
-                    let v7 = &constructor_jmp_known(ctx, v6);
-                    let v8 = constructor_emit_side_effect(ctx, v7);
-                    // Rule at src/isa/x64/lower.isle line 3214.
-                    return Some(v8);
-                }
-            }
-        }
-        _ => {}
-    }
-    None
-}
-
-// Generated as internal constructor for term construct_overflow_op.
-pub fn constructor_construct_overflow_op<C: Context>(
-    ctx: &mut C,
-    arg0: &CC,
-    arg1: &ProducesFlags,
-) -> InstOutput {
-    let v2 = &constructor_x64_setcc_paired(ctx, arg0);
-    let v3 = constructor_with_flags(ctx, arg1, v2);
-    let v5 = C::value_regs_get(ctx, v3, 0x0);
-    let v6 = C::value_reg(ctx, v5);
-    let v8 = C::value_regs_get(ctx, v3, 0x1);
-    let v9 = C::value_reg(ctx, v8);
-    let v10 = C::output_pair(ctx, v6, v9);
-    // Rule at src/isa/x64/lower.isle line 104.
-    return v10;
-}
-
-// Generated as internal constructor for term construct_overflow_op_alu.
-pub fn constructor_construct_overflow_op_alu<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &CC,
-    arg2: &AluRmiROpcode,
-    arg3: Gpr,
-    arg4: &GprMemImm,
-) -> InstOutput {
-    let v5 = &constructor_x64_alurmi_with_flags_paired(ctx, arg2, arg0, arg3, arg4);
-    let v6 = constructor_construct_overflow_op(ctx, arg1, v5);
-    // Rule at src/isa/x64/lower.isle line 111.
-    return v6;
-}
-
-// Generated as internal constructor for term construct_overflow_op_alu_128.
-pub fn constructor_construct_overflow_op_alu_128<C: Context>(
-    ctx: &mut C,
-    arg0: &CC,
-    arg1: &AluRmiROpcode,
-    arg2: &AluRmiROpcode,
-    arg3: Value,
-    arg4: Value,
-) -> InstOutput {
-    let v5 = C::put_in_regs(ctx, arg3);
-    let v7 = constructor_value_regs_get_gpr(ctx, v5, 0x0);
-    let v9 = constructor_value_regs_get_gpr(ctx, v5, 0x1);
-    let v10 = C::put_in_regs(ctx, arg4);
-    let v11 = constructor_value_regs_get_gpr(ctx, v10, 0x0);
-    let v12 = constructor_value_regs_get_gpr(ctx, v10, 0x1);
-    let v14 = &C::gpr_to_gpr_mem_imm(ctx, v11);
-    let v15 = &constructor_x64_alurmi_with_flags_paired(ctx, arg1, I64, v7, v14);
-    let v16 = &C::gpr_to_gpr_mem_imm(ctx, v12);
-    let v17 = &constructor_x64_alurmi_with_flags_chained(ctx, arg2, I64, v9, v16);
-    let v18 = &constructor_x64_setcc_paired(ctx, arg0);
-    let v19 = &constructor_with_flags_chained(ctx, v15, v17, v18);
-    let v20 = constructor_multi_reg_to_pair_and_single(ctx, v19);
-    // Rule at src/isa/x64/lower.isle line 119.
-    return v20;
-}
-
-// Generated as internal constructor for term sse_and.
-pub fn constructor_sse_and<C: Context>(ctx: &mut C, arg0: Type, arg1: Xmm, arg2: &XmmMem) -> Xmm {
-    match arg0 {
-        F32 => {
-            let v3 = constructor_x64_andps(ctx, arg1, arg2);
-            // Rule at src/isa/x64/lower.isle line 293.
-            return v3;
-        }
-        F64 => {
-            let v4 = constructor_x64_andpd(ctx, arg1, arg2);
-            // Rule at src/isa/x64/lower.isle line 294.
-            return v4;
-        }
-        F32X4 => {
-            let v3 = constructor_x64_andps(ctx, arg1, arg2);
-            // Rule at src/isa/x64/lower.isle line 291.
-            return v3;
-        }
-        F64X2 => {
-            let v4 = constructor_x64_andpd(ctx, arg1, arg2);
-            // Rule at src/isa/x64/lower.isle line 292.
-            return v4;
-        }
-        _ => {}
-    }
-    let v5 = C::multi_lane(ctx, arg0);
-    if let Some(v6) = v5 {
-        let v9 = constructor_x64_pand(ctx, arg1, arg2);
-        // Rule at src/isa/x64/lower.isle line 295.
-        return v9;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "sse_and", "src/isa/x64/lower.isle line 290"
-    )
-}
-
-// Generated as internal constructor for term sse_and_not.
-pub fn constructor_sse_and_not<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Xmm,
-    arg2: &XmmMem,
-) -> Xmm {
-    match arg0 {
-        F32X4 => {
-            let v3 = constructor_x64_andnps(ctx, arg1, arg2);
-            // Rule at src/isa/x64/lower.isle line 318.
-            return v3;
-        }
-        F64X2 => {
-            let v4 = constructor_x64_andnpd(ctx, arg1, arg2);
-            // Rule at src/isa/x64/lower.isle line 319.
-            return v4;
-        }
-        _ => {}
-    }
-    let v5 = C::multi_lane(ctx, arg0);
-    if let Some(v6) = v5 {
-        let v9 = constructor_x64_pandn(ctx, arg1, arg2);
-        // Rule at src/isa/x64/lower.isle line 320.
-        return v9;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "sse_and_not", "src/isa/x64/lower.isle line 317"
-    )
-}
-
-// Generated as internal constructor for term sse_or.
-pub fn constructor_sse_or<C: Context>(ctx: &mut C, arg0: Type, arg1: Xmm, arg2: &XmmMem) -> Xmm {
-    match arg0 {
-        F32 => {
-            let v3 = constructor_x64_orps(ctx, arg1, arg2);
-            // Rule at src/isa/x64/lower.isle line 392.
-            return v3;
-        }
-        F64 => {
-            let v4 = constructor_x64_orpd(ctx, arg1, arg2);
-            // Rule at src/isa/x64/lower.isle line 393.
-            return v4;
-        }
-        F32X4 => {
-            let v3 = constructor_x64_orps(ctx, arg1, arg2);
-            // Rule at src/isa/x64/lower.isle line 390.
-            return v3;
-        }
-        F64X2 => {
-            let v4 = constructor_x64_orpd(ctx, arg1, arg2);
-            // Rule at src/isa/x64/lower.isle line 391.
-            return v4;
-        }
-        _ => {}
-    }
-    let v5 = C::multi_lane(ctx, arg0);
-    if let Some(v6) = v5 {
-        let v9 = constructor_x64_por(ctx, arg1, arg2);
-        // Rule at src/isa/x64/lower.isle line 394.
-        return v9;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "sse_or", "src/isa/x64/lower.isle line 389"
-    )
-}
-
-// Generated as internal constructor for term or_i128.
-pub fn constructor_or_i128<C: Context>(ctx: &mut C, arg0: ValueRegs, arg1: ValueRegs) -> ValueRegs {
-    let v3 = constructor_value_regs_get_gpr(ctx, arg0, 0x0);
-    let v5 = constructor_value_regs_get_gpr(ctx, arg0, 0x1);
-    let v6 = constructor_value_regs_get_gpr(ctx, arg1, 0x0);
-    let v7 = constructor_value_regs_get_gpr(ctx, arg1, 0x1);
-    let v9 = &C::gpr_to_gpr_mem_imm(ctx, v6);
-    let v10 = constructor_x64_or(ctx, I64, v3, v9);
-    let v11 = &C::gpr_to_gpr_mem_imm(ctx, v7);
-    let v12 = constructor_x64_or(ctx, I64, v5, v11);
-    let v13 = constructor_value_gprs(ctx, v10, v12);
-    // Rule at src/isa/x64/lower.isle line 403.
-    return v13;
-}
-
-// Generated as internal constructor for term shl_i128.
-pub fn constructor_shl_i128<C: Context>(ctx: &mut C, arg0: ValueRegs, arg1: Gpr) -> ValueRegs {
-    let v3 = constructor_value_regs_get_gpr(ctx, arg0, 0x0);
-    let v5 = constructor_value_regs_get_gpr(ctx, arg0, 0x1);
-    let v7 = &C::gpr_to_imm8_gpr(ctx, arg1);
-    let v8 = constructor_x64_shl(ctx, I64, v3, v7);
-    let v9 = &C::gpr_to_imm8_gpr(ctx, arg1);
-    let v10 = constructor_x64_shl(ctx, I64, v5, v9);
-    let v12 = constructor_imm(ctx, I64, 0x40);
-    let v13 = C::gpr_new(ctx, v12);
-    let v14 = &C::gpr_to_gpr_mem_imm(ctx, arg1);
-    let v15 = constructor_x64_sub(ctx, I64, v13, v14);
-    let v16 = &C::gpr_to_imm8_gpr(ctx, v15);
-    let v17 = constructor_x64_shr(ctx, I64, v3, v16);
-    let v19 = constructor_imm(ctx, I64, 0x0);
-    let v20 = C::gpr_new(ctx, v19);
-    let v23 = RegMemImm::Imm { simm32: 0x7F };
-    let v24 = &C::gpr_mem_imm_new(ctx, &v23);
-    let v25 = &constructor_x64_test(ctx, &OperandSize::Size64, v24, arg1);
-    let v27 = &C::gpr_to_gpr_mem(ctx, v20);
-    let v28 = &constructor_cmove(ctx, I64, &CC::Z, v27, v17);
-    let v29 = constructor_with_flags_reg(ctx, v25, v28);
-    let v30 = C::gpr_new(ctx, v29);
-    let v31 = &C::gpr_to_gpr_mem_imm(ctx, v10);
-    let v32 = constructor_x64_or(ctx, I64, v30, v31);
-    let v34 = RegMemImm::Imm { simm32: 0x40 };
-    let v35 = &C::gpr_mem_imm_new(ctx, &v34);
-    let v36 = &constructor_x64_test(ctx, &OperandSize::Size64, v35, arg1);
-    let v37 = &C::gpr_to_gpr_mem(ctx, v8);
-    let v38 = &constructor_cmove(ctx, I64, &CC::Z, v37, v20);
-    let v39 = &C::gpr_to_gpr_mem(ctx, v32);
-    let v40 = &constructor_cmove(ctx, I64, &CC::Z, v39, v8);
-    let v41 = &constructor_consumes_flags_concat(ctx, v38, v40);
-    let v42 = constructor_with_flags(ctx, v36, v41);
-    // Rule at src/isa/x64/lower.isle line 475.
-    return v42;
-}
-
-// Generated as internal constructor for term ishl_i8x16_mask.
-pub fn constructor_ishl_i8x16_mask<C: Context>(ctx: &mut C, arg0: &RegMemImm) -> SyntheticAmode {
-    match arg0 {
-        &RegMemImm::Reg { reg: v3 } => {
-            let v4 = &C::ishl_i8x16_mask_table(ctx);
-            let v6 = constructor_x64_lea(ctx, I64, v4);
-            let v7 = C::gpr_new(ctx, v3);
-            let v9 = &C::imm8_to_imm8_gpr(ctx, 0x4);
-            let v10 = constructor_x64_shl(ctx, I64, v7, v9);
-            let v13 = C::mem_flags_trusted(ctx);
-            let v14 = Amode::ImmRegRegShift {
-                simm32: 0x0,
-                base: v6,
-                index: v10,
-                shift: 0x0,
-                flags: v13,
-            };
-            let v15 = &C::amode_to_synthetic_amode(ctx, &v14);
-            // Rule at src/isa/x64/lower.isle line 549.
-            return v15.clone();
-        }
-        &RegMemImm::Mem { addr: ref v16 } => {
-            let v18 = constructor_x64_load(ctx, I64, v16, &ExtKind::None);
-            let v19 = RegMemImm::Reg { reg: v18 };
-            let v20 = &constructor_ishl_i8x16_mask(ctx, &v19);
-            // Rule at src/isa/x64/lower.isle line 560.
-            return v20.clone();
-        }
-        &RegMemImm::Imm { simm32: v1 } => {
-            let v2 = &C::ishl_i8x16_mask_for_const(ctx, v1);
-            // Rule at src/isa/x64/lower.isle line 540.
-            return v2.clone();
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "ishl_i8x16_mask", "src/isa/x64/lower.isle line 534"
-    )
-}
-
-// Generated as internal constructor for term shr_i128.
-pub fn constructor_shr_i128<C: Context>(ctx: &mut C, arg0: ValueRegs, arg1: Gpr) -> ValueRegs {
-    let v3 = constructor_value_regs_get_gpr(ctx, arg0, 0x0);
-    let v5 = constructor_value_regs_get_gpr(ctx, arg0, 0x1);
-    let v7 = &C::gpr_to_imm8_gpr(ctx, arg1);
-    let v8 = constructor_x64_shr(ctx, I64, v3, v7);
-    let v9 = &C::gpr_to_imm8_gpr(ctx, arg1);
-    let v10 = constructor_x64_shr(ctx, I64, v5, v9);
-    let v12 = constructor_imm(ctx, I64, 0x40);
-    let v13 = C::gpr_new(ctx, v12);
-    let v14 = &C::gpr_to_gpr_mem_imm(ctx, arg1);
-    let v15 = constructor_x64_sub(ctx, I64, v13, v14);
-    let v16 = &C::gpr_to_imm8_gpr(ctx, v15);
-    let v17 = constructor_x64_shl(ctx, I64, v5, v16);
-    let v19 = constructor_imm(ctx, I64, 0x0);
-    let v20 = C::gpr_new(ctx, v19);
-    let v23 = RegMemImm::Imm { simm32: 0x7F };
-    let v24 = &C::gpr_mem_imm_new(ctx, &v23);
-    let v25 = &constructor_x64_test(ctx, &OperandSize::Size64, v24, arg1);
-    let v27 = &C::gpr_to_gpr_mem(ctx, v20);
-    let v28 = &constructor_cmove(ctx, I64, &CC::Z, v27, v17);
-    let v29 = constructor_with_flags_reg(ctx, v25, v28);
-    let v30 = C::gpr_new(ctx, v29);
-    let v31 = &C::gpr_to_gpr_mem_imm(ctx, v8);
-    let v32 = constructor_x64_or(ctx, I64, v30, v31);
-    let v34 = RegMemImm::Imm { simm32: 0x40 };
-    let v35 = &C::gpr_mem_imm_new(ctx, &v34);
-    let v36 = &constructor_x64_test(ctx, &OperandSize::Size64, v35, arg1);
-    let v37 = &C::gpr_to_gpr_mem(ctx, v32);
-    let v38 = &constructor_cmove(ctx, I64, &CC::Z, v37, v10);
-    let v39 = &C::gpr_to_gpr_mem(ctx, v10);
-    let v40 = &constructor_cmove(ctx, I64, &CC::Z, v39, v20);
-    let v41 = &constructor_consumes_flags_concat(ctx, v38, v40);
-    let v42 = constructor_with_flags(ctx, v36, v41);
-    // Rule at src/isa/x64/lower.isle line 585.
-    return v42;
-}
-
-// Generated as internal constructor for term ushr_i8x16_mask.
-pub fn constructor_ushr_i8x16_mask<C: Context>(ctx: &mut C, arg0: &RegMemImm) -> SyntheticAmode {
-    match arg0 {
-        &RegMemImm::Reg { reg: v3 } => {
-            let v4 = &C::ushr_i8x16_mask_table(ctx);
-            let v6 = constructor_x64_lea(ctx, I64, v4);
-            let v7 = C::gpr_new(ctx, v3);
-            let v9 = &C::imm8_to_imm8_gpr(ctx, 0x4);
-            let v10 = constructor_x64_shl(ctx, I64, v7, v9);
-            let v13 = C::mem_flags_trusted(ctx);
-            let v14 = Amode::ImmRegRegShift {
-                simm32: 0x0,
-                base: v6,
-                index: v10,
-                shift: 0x0,
-                flags: v13,
-            };
-            let v15 = &C::amode_to_synthetic_amode(ctx, &v14);
-            // Rule at src/isa/x64/lower.isle line 654.
-            return v15.clone();
-        }
-        &RegMemImm::Mem { addr: ref v16 } => {
-            let v18 = constructor_x64_load(ctx, I64, v16, &ExtKind::None);
-            let v19 = RegMemImm::Reg { reg: v18 };
-            let v20 = &constructor_ushr_i8x16_mask(ctx, &v19);
-            // Rule at src/isa/x64/lower.isle line 666.
-            return v20.clone();
-        }
-        &RegMemImm::Imm { simm32: v1 } => {
-            let v2 = &C::ushr_i8x16_mask_for_const(ctx, v1);
-            // Rule at src/isa/x64/lower.isle line 645.
-            return v2.clone();
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "ushr_i8x16_mask", "src/isa/x64/lower.isle line 639"
-    )
-}
-
-// Generated as internal constructor for term mask_xmm_shift.
-pub fn constructor_mask_xmm_shift<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> RegMemImm {
-    let v11 = C::def_inst(ctx, arg1);
-    if let Some(v12) = v11 {
-        let v13 = &C::inst_data(ctx, v12);
-        if let &InstructionData::UnaryImm {
-            opcode: ref v14,
-            imm: v15,
-        } = v13
-        {
-            if let &Opcode::Iconst = v14 {
-                let v16 = C::shift_amount_masked(ctx, arg0, v15);
-                let v17 = C::u8_as_u32(ctx, v16);
-                let v18 = RegMemImm::Imm { simm32: v17 };
-                // Rule at src/isa/x64/lower.isle line 683.
-                return v18;
-            }
-        }
-    }
-    let v3 = constructor_put_in_gpr(ctx, arg1);
-    let v4 = C::shift_mask(ctx, arg0);
-    let v5 = C::u8_as_u32(ctx, v4);
-    let v6 = RegMemImm::Imm { simm32: v5 };
-    let v7 = &C::gpr_mem_imm_new(ctx, &v6);
-    let v8 = constructor_x64_and(ctx, I64, v3, v7);
-    let v9 = C::gpr_to_reg(ctx, v8);
-    let v10 = &C::reg_to_reg_mem_imm(ctx, v9);
-    // Rule at src/isa/x64/lower.isle line 681.
-    return v10.clone();
-}
-
-// Generated as internal constructor for term sar_i128.
-pub fn constructor_sar_i128<C: Context>(ctx: &mut C, arg0: ValueRegs, arg1: Gpr) -> ValueRegs {
-    let v3 = constructor_value_regs_get_gpr(ctx, arg0, 0x0);
-    let v5 = constructor_value_regs_get_gpr(ctx, arg0, 0x1);
-    let v7 = &C::gpr_to_imm8_gpr(ctx, arg1);
-    let v8 = constructor_x64_shr(ctx, I64, v3, v7);
-    let v9 = &C::gpr_to_imm8_gpr(ctx, arg1);
-    let v10 = constructor_x64_sar(ctx, I64, v5, v9);
-    let v12 = constructor_imm(ctx, I64, 0x40);
-    let v13 = C::gpr_new(ctx, v12);
-    let v14 = &C::gpr_to_gpr_mem_imm(ctx, arg1);
-    let v15 = constructor_x64_sub(ctx, I64, v13, v14);
-    let v16 = &C::gpr_to_imm8_gpr(ctx, v15);
-    let v17 = constructor_x64_shl(ctx, I64, v5, v16);
-    let v20 = RegMemImm::Imm { simm32: 0x7F };
-    let v21 = &C::gpr_mem_imm_new(ctx, &v20);
-    let v22 = &constructor_x64_test(ctx, &OperandSize::Size64, v21, arg1);
-    let v25 = constructor_imm(ctx, I64, 0x0);
-    let v26 = &C::reg_to_gpr_mem(ctx, v25);
-    let v27 = &constructor_cmove(ctx, I64, &CC::Z, v26, v17);
-    let v28 = constructor_with_flags_reg(ctx, v22, v27);
-    let v29 = C::gpr_new(ctx, v28);
-    let v30 = &C::gpr_to_gpr_mem_imm(ctx, v29);
-    let v31 = constructor_x64_or(ctx, I64, v8, v30);
-    let v33 = &C::imm8_to_imm8_gpr(ctx, 0x3F);
-    let v34 = constructor_x64_sar(ctx, I64, v5, v33);
-    let v36 = RegMemImm::Imm { simm32: 0x40 };
-    let v37 = &C::gpr_mem_imm_new(ctx, &v36);
-    let v38 = &constructor_x64_test(ctx, &OperandSize::Size64, v37, arg1);
-    let v39 = &C::gpr_to_gpr_mem(ctx, v31);
-    let v40 = &constructor_cmove(ctx, I64, &CC::Z, v39, v10);
-    let v41 = &C::gpr_to_gpr_mem(ctx, v10);
-    let v42 = &constructor_cmove(ctx, I64, &CC::Z, v41, v34);
-    let v43 = &constructor_consumes_flags_concat(ctx, v40, v42);
-    let v44 = constructor_with_flags(ctx, v38, v43);
-    // Rule at src/isa/x64/lower.isle line 697.
-    return v44;
-}
-
-// Generated as internal constructor for term sshr_i8x16_bigger_shift.
-pub fn constructor_sshr_i8x16_bigger_shift<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &RegMemImm,
-) -> XmmMemImm {
-    match arg1 {
-        &RegMemImm::Reg { reg: v7 } => {
-            let v8 = C::gpr_new(ctx, v7);
-            let v9 = RegMemImm::Imm { simm32: 0x8 };
-            let v10 = &C::gpr_mem_imm_new(ctx, &v9);
-            let v11 = constructor_x64_add(ctx, arg0, v8, v10);
-            let v12 = C::gpr_to_reg(ctx, v11);
-            let v13 = RegMemImm::Reg { reg: v12 };
-            let v14 = &constructor_mov_rmi_to_xmm(ctx, &v13);
-            // Rule at src/isa/x64/lower.isle line 765.
-            return v14.clone();
-        }
-        &RegMemImm::Mem { addr: ref v15 } => {
-            let v17 = constructor_imm(ctx, arg0, 0x8);
-            let v18 = C::gpr_new(ctx, v17);
-            let v19 = &C::gpr_mem_imm_new(ctx, arg1);
-            let v20 = constructor_x64_add(ctx, arg0, v18, v19);
-            let v21 = C::gpr_to_reg(ctx, v20);
-            let v22 = RegMemImm::Reg { reg: v21 };
-            let v23 = &constructor_mov_rmi_to_xmm(ctx, &v22);
-            // Rule at src/isa/x64/lower.isle line 769.
-            return v23.clone();
-        }
-        &RegMemImm::Imm { simm32: v2 } => {
-            let v4 = C::u32_add(ctx, v2, 0x8);
-            let v5 = RegMemImm::Imm { simm32: v4 };
-            let v6 = &C::xmm_mem_imm_new(ctx, &v5);
-            // Rule at src/isa/x64/lower.isle line 763.
-            return v6.clone();
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "sshr_i8x16_bigger_shift", "src/isa/x64/lower.isle line 762"
-    )
-}
-
-// Generated as internal constructor for term lower_i64x2_sshr_imm.
-pub fn constructor_lower_i64x2_sshr_imm<C: Context>(ctx: &mut C, arg0: Xmm, arg1: u32) -> Xmm {
-    let v2 = C::u32_as_u64(ctx, arg1);
-    let v4 = C::u64_lt(ctx, v2, 0x20);
-    if v4 == true {
-        let v5 = &C::xmi_imm(ctx, arg1);
-        let v6 = constructor_x64_psrad(ctx, arg0, v5);
-        let v7 = &C::xmm_to_xmm_mem(ctx, v6);
-        let v9 = constructor_x64_pshufd(ctx, v7, 0xED);
-        let v10 = &C::xmi_imm(ctx, arg1);
-        let v11 = constructor_x64_psrlq(ctx, arg0, v10);
-        let v12 = &C::xmm_to_xmm_mem(ctx, v11);
-        let v14 = constructor_x64_pshufd(ctx, v12, 0xE8);
-        let v15 = &C::xmm_to_xmm_mem(ctx, v9);
-        let v16 = constructor_x64_punpckldq(ctx, v14, v15);
-        // Rule at src/isa/x64/lower.isle line 808.
-        return v16;
-    }
-    if arg1 == 0x20 {
-        let v17 = &C::xmm_to_xmm_mem(ctx, arg0);
-        let v18 = constructor_x64_pshufd(ctx, v17, 0xED);
-        let v20 = &C::xmi_imm(ctx, 0x1F);
-        let v21 = constructor_x64_psrad(ctx, arg0, v20);
-        let v22 = &C::xmm_to_xmm_mem(ctx, v21);
-        let v23 = constructor_x64_pshufd(ctx, v22, 0xED);
-        let v24 = &C::xmm_to_xmm_mem(ctx, v23);
-        let v25 = constructor_x64_punpckldq(ctx, v18, v24);
-        // Rule at src/isa/x64/lower.isle line 819.
-        return v25;
-    }
-    let v26 = C::u64_lt(ctx, 0x20, v2);
-    if v26 == true {
-        let v27 = &C::xmi_imm(ctx, 0x1F);
-        let v28 = constructor_x64_psrad(ctx, arg0, v27);
-        let v29 = &C::xmm_to_xmm_mem(ctx, v28);
-        let v30 = constructor_x64_pshufd(ctx, v29, 0xED);
-        let v32 = C::u32_sub(ctx, arg1, 0x20);
-        let v33 = &C::xmi_imm(ctx, v32);
-        let v34 = constructor_x64_psrad(ctx, arg0, v33);
-        let v35 = &C::xmm_to_xmm_mem(ctx, v34);
-        let v37 = constructor_x64_pshufd(ctx, v35, 0xE9);
-        let v38 = &C::xmm_to_xmm_mem(ctx, v30);
-        let v39 = constructor_x64_punpckldq(ctx, v37, v38);
-        // Rule at src/isa/x64/lower.isle line 830.
-        return v39;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "lower_i64x2_sshr_imm", "src/isa/x64/lower.isle line 803"
-    )
-}
-
-// Generated as internal constructor for term lower_i64x2_sshr_gpr.
-pub fn constructor_lower_i64x2_sshr_gpr<C: Context>(ctx: &mut C, arg0: Xmm, arg1: Gpr) -> Xmm {
-    let v2 = &C::gpr_to_gpr_mem(ctx, arg1);
-    let v3 = constructor_x64_movq_to_xmm(ctx, v2);
-    let v5 = constructor_flip_high_bit_mask(ctx, I64X2);
-    let v6 = &C::xmm_to_xmm_mem_imm(ctx, v3);
-    let v7 = constructor_x64_psrlq(ctx, v5, v6);
-    let v8 = &C::xmm_to_xmm_mem_imm(ctx, v3);
-    let v9 = constructor_x64_psrlq(ctx, arg0, v8);
-    let v10 = &C::xmm_to_xmm_mem(ctx, v9);
-    let v11 = constructor_x64_pxor(ctx, v7, v10);
-    let v12 = &C::xmm_to_xmm_mem(ctx, v7);
-    let v13 = constructor_x64_psubq(ctx, v11, v12);
-    // Rule at src/isa/x64/lower.isle line 845.
-    return v13;
-}
-
-// Generated as internal constructor for term lower_bmask.
-pub fn constructor_lower_bmask<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Type,
-    arg2: ValueRegs,
-) -> ValueRegs {
-    if arg0 == I128 {
-        let v23 = constructor_lower_bmask(ctx, I64, arg1, arg2);
-        let v24 = constructor_value_regs_get_gpr(ctx, v23, 0x0);
-        let v25 = C::gpr_to_reg(ctx, v24);
-        let v26 = C::gpr_to_reg(ctx, v24);
-        let v27 = C::value_regs(ctx, v25, v26);
-        // Rule at src/isa/x64/lower.isle line 1308.
-        return v27;
-    }
-    let v1 = C::fits_in_64(ctx, arg0);
-    if let Some(v2) = v1 {
-        if arg1 == I128 {
-            let v8 = constructor_value_regs_get_gpr(ctx, arg2, 0x0);
-            let v16 = constructor_value_regs_get_gpr(ctx, arg2, 0x1);
-            let v18 = &C::gpr_to_gpr_mem_imm(ctx, v16);
-            let v19 = constructor_x64_or(ctx, I64, v8, v18);
-            let v20 = C::gpr_to_reg(ctx, v19);
-            let v21 = C::value_reg(ctx, v20);
-            let v22 = constructor_lower_bmask(ctx, v2, I64, v21);
-            // Rule at src/isa/x64/lower.isle line 1300.
-            return v22;
-        }
-        let v4 = C::fits_in_64(ctx, arg1);
-        if let Some(v5) = v4 {
-            let v8 = constructor_value_regs_get_gpr(ctx, arg2, 0x0);
-            let v9 = &constructor_x64_neg_paired(ctx, v5, v8);
-            let v10 = &C::gpr_to_gpr_mem_imm(ctx, v8);
-            let v11 = &constructor_x64_sbb_paired(ctx, v2, v8, v10);
-            let v12 = constructor_with_flags(ctx, v9, v11);
-            let v14 = C::value_regs_get(ctx, v12, 0x1);
-            let v15 = C::value_reg(ctx, v14);
-            // Rule at src/isa/x64/lower.isle line 1289.
-            return v15;
-        }
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "lower_bmask", "src/isa/x64/lower.isle line 1277"
-    )
-}
-
-// Generated as internal constructor for term i128_not.
-pub fn constructor_i128_not<C: Context>(ctx: &mut C, arg0: Value) -> ValueRegs {
-    let v1 = C::put_in_regs(ctx, arg0);
-    let v3 = constructor_value_regs_get_gpr(ctx, v1, 0x0);
-    let v5 = constructor_value_regs_get_gpr(ctx, v1, 0x1);
-    let v7 = constructor_x64_not(ctx, I64, v3);
-    let v8 = constructor_x64_not(ctx, I64, v5);
-    let v9 = constructor_value_gprs(ctx, v7, v8);
-    // Rule at src/isa/x64/lower.isle line 1331.
-    return v9;
-}
-
-// Generated as internal constructor for term all_ones_or_all_zeros.
-pub fn constructor_all_ones_or_all_zeros<C: Context>(ctx: &mut C, arg0: Value) -> Option<bool> {
-    let v1 = C::def_inst(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v3 = &C::inst_data(ctx, v2);
-        match v3 {
-            &InstructionData::FloatCompare {
-                opcode: ref v16,
-                args: ref v17,
-                cond: ref v18,
-            } => {
-                if let &Opcode::Fcmp = v16 {
-                    let v10 = C::value_type(ctx, arg0);
-                    let v11 = C::multi_lane(ctx, v10);
-                    if let Some(v12) = v11 {
-                        // Rule at src/isa/x64/lower.isle line 1380.
-                        return Some(true);
-                    }
-                }
-            }
-            &InstructionData::IntCompare {
-                opcode: ref v4,
-                args: ref v5,
-                cond: ref v6,
-            } => {
-                if let &Opcode::Icmp = v4 {
-                    let v10 = C::value_type(ctx, arg0);
-                    let v11 = C::multi_lane(ctx, v10);
-                    if let Some(v12) = v11 {
-                        // Rule at src/isa/x64/lower.isle line 1379.
-                        return Some(true);
-                    }
-                }
-            }
-            &InstructionData::UnaryConst {
-                opcode: ref v22,
-                constant_handle: v23,
-            } => {
-                if let &Opcode::Vconst = v22 {
-                    let v24 = C::vconst_all_ones_or_all_zeros(ctx, v23);
-                    if let Some(v25) = v24 {
-                        // Rule at src/isa/x64/lower.isle line 1381.
-                        return Some(true);
-                    }
-                }
-            }
-            _ => {}
-        }
-    }
-    None
-}
-
-// Generated as internal constructor for term vec_insert_lane.
-pub fn constructor_vec_insert_lane<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Xmm,
-    arg2: &RegMem,
-    arg3: u8,
-) -> Xmm {
-    match arg0 {
-        I8X16 => {
-            let v4 = C::use_sse41(ctx);
-            if v4 == true {
-                let v5 = &C::reg_mem_to_gpr_mem(ctx, arg2);
-                let v6 = constructor_x64_pinsrb(ctx, arg1, v5, arg3);
-                // Rule at src/isa/x64/lower.isle line 1416.
-                return v6;
-            }
-            let v7 = C::insert_i8x16_lane_hole(ctx, arg3);
-            let v8 = &constructor_const_to_xmm_mem(ctx, v7);
-            let v9 = constructor_x64_pand(ctx, arg1, v8);
-            let v11 = &C::reg_mem_to_gpr_mem(ctx, arg2);
-            let v12 = constructor_x64_movzx(ctx, &ExtMode::BL, v11);
-            let v15 = C::u8_and(ctx, arg3, 0x3);
-            let v16 = C::u8_shl(ctx, v15, 0x3);
-            let v17 = Imm8Reg::Imm8 { imm: v16 };
-            let v18 = &C::imm8_reg_to_imm8_gpr(ctx, &v17);
-            let v19 = constructor_x64_shl(ctx, I32, v12, v18);
-            let v20 = &C::gpr_to_gpr_mem(ctx, v19);
-            let v21 = constructor_x64_movd_to_xmm(ctx, v20);
-            let v22 = &C::xmm_to_xmm_mem(ctx, v21);
-            let v24 = C::u8_shr(ctx, arg3, 0x2);
-            let v25 = constructor_insert_i8x16_lane_pshufd_imm(ctx, v24);
-            let v26 = constructor_x64_pshufd(ctx, v22, v25);
-            let v27 = &C::xmm_to_xmm_mem(ctx, v26);
-            let v28 = constructor_x64_por(ctx, v9, v27);
-            // Rule at src/isa/x64/lower.isle line 1444.
-            return v28;
-        }
-        I16X8 => {
-            let v5 = &C::reg_mem_to_gpr_mem(ctx, arg2);
-            let v29 = constructor_x64_pinsrw(ctx, arg1, v5, arg3);
-            // Rule at src/isa/x64/lower.isle line 1461.
-            return v29;
-        }
-        I32X4 => {
-            let v4 = C::use_sse41(ctx);
-            if v4 == true {
-                let v5 = &C::reg_mem_to_gpr_mem(ctx, arg2);
-                let v30 = constructor_x64_pinsrd(ctx, arg1, v5, arg3);
-                // Rule at src/isa/x64/lower.isle line 1465.
-                return v30;
-            }
-            match arg3 {
-                0x0 => {
-                    let v5 = &C::reg_mem_to_gpr_mem(ctx, arg2);
-                    let v31 = constructor_x64_movd_to_xmm(ctx, v5);
-                    let v32 = constructor_x64_movss_regmove(ctx, arg1, v31);
-                    // Rule at src/isa/x64/lower.isle line 1469.
-                    return v32;
-                }
-                0x1 => {
-                    let v5 = &C::reg_mem_to_gpr_mem(ctx, arg2);
-                    let v31 = constructor_x64_movd_to_xmm(ctx, v5);
-                    let v33 = &C::xmm_to_xmm_mem(ctx, arg1);
-                    let v34 = constructor_x64_punpcklqdq(ctx, v31, v33);
-                    let v35 = &C::xmm_to_xmm_mem(ctx, arg1);
-                    let v37 = constructor_x64_shufps(ctx, v34, v35, 0xE2);
-                    // Rule at src/isa/x64/lower.isle line 1474.
-                    return v37;
-                }
-                0x2 => {
-                    let v5 = &C::reg_mem_to_gpr_mem(ctx, arg2);
-                    let v31 = constructor_x64_movd_to_xmm(ctx, v5);
-                    let v33 = &C::xmm_to_xmm_mem(ctx, arg1);
-                    let v39 = constructor_x64_shufps(ctx, v31, v33, 0x30);
-                    let v40 = &C::xmm_to_xmm_mem(ctx, v39);
-                    let v42 = constructor_x64_shufps(ctx, arg1, v40, 0x84);
-                    // Rule at src/isa/x64/lower.isle line 1481.
-                    return v42;
-                }
-                0x3 => {
-                    let v5 = &C::reg_mem_to_gpr_mem(ctx, arg2);
-                    let v31 = constructor_x64_movd_to_xmm(ctx, v5);
-                    let v33 = &C::xmm_to_xmm_mem(ctx, arg1);
-                    let v44 = constructor_x64_shufps(ctx, v31, v33, 0xE4);
-                    let v45 = &C::xmm_to_xmm_mem(ctx, v44);
-                    let v47 = constructor_x64_shufps(ctx, arg1, v45, 0x24);
-                    // Rule at src/isa/x64/lower.isle line 1488.
-                    return v47;
-                }
-                _ => {}
-            }
-        }
-        I64X2 => {
-            let v4 = C::use_sse41(ctx);
-            if v4 == true {
-                let v5 = &C::reg_mem_to_gpr_mem(ctx, arg2);
-                let v48 = constructor_x64_pinsrq(ctx, arg1, v5, arg3);
-                // Rule at src/isa/x64/lower.isle line 1494.
-                return v48;
-            }
-            match arg3 {
-                0x0 => {
-                    let v5 = &C::reg_mem_to_gpr_mem(ctx, arg2);
-                    let v49 = constructor_x64_movq_to_xmm(ctx, v5);
-                    let v50 = constructor_x64_movsd_regmove(ctx, arg1, v49);
-                    // Rule at src/isa/x64/lower.isle line 1497.
-                    return v50;
-                }
-                0x1 => {
-                    let v5 = &C::reg_mem_to_gpr_mem(ctx, arg2);
-                    let v49 = constructor_x64_movq_to_xmm(ctx, v5);
-                    let v51 = &C::xmm_to_xmm_mem(ctx, v49);
-                    let v52 = constructor_x64_punpcklqdq(ctx, arg1, v51);
-                    // Rule at src/isa/x64/lower.isle line 1499.
-                    return v52;
-                }
-                _ => {}
-            }
-        }
-        F32X4 => {
-            let v4 = C::use_sse41(ctx);
-            if v4 == true {
-                let v53 = &C::reg_mem_to_xmm_mem(ctx, arg2);
-                let v54 = C::sse_insertps_lane_imm(ctx, arg3);
-                let v55 = constructor_x64_insertps(ctx, arg1, v53, v54);
-                // Rule at src/isa/x64/lower.isle line 1503.
-                return v55;
-            }
-            match arg2 {
-                &RegMem::Reg { reg: v56 } => {
-                    match arg3 {
-                        0x0 => {
-                            let v57 = C::xmm_new(ctx, v56);
-                            let v58 = constructor_x64_movss_regmove(ctx, arg1, v57);
-                            // Rule at src/isa/x64/lower.isle line 1508.
-                            return v58;
-                        }
-                        0x1 => {
-                            let v57 = C::xmm_new(ctx, v56);
-                            let v59 = &C::xmm_to_xmm_mem(ctx, arg1);
-                            let v60 = constructor_x64_movlhps(ctx, v57, v59);
-                            let v61 = &C::xmm_to_xmm_mem(ctx, arg1);
-                            let v62 = constructor_x64_shufps(ctx, v60, v61, 0xE2);
-                            // Rule at src/isa/x64/lower.isle line 1514.
-                            return v62;
-                        }
-                        0x2 => {
-                            let v57 = C::xmm_new(ctx, v56);
-                            let v59 = &C::xmm_to_xmm_mem(ctx, arg1);
-                            let v63 = constructor_x64_shufps(ctx, v57, v59, 0x30);
-                            let v64 = &C::xmm_to_xmm_mem(ctx, v63);
-                            let v65 = constructor_x64_shufps(ctx, arg1, v64, 0x84);
-                            // Rule at src/isa/x64/lower.isle line 1521.
-                            return v65;
-                        }
-                        0x3 => {
-                            let v57 = C::xmm_new(ctx, v56);
-                            let v59 = &C::xmm_to_xmm_mem(ctx, arg1);
-                            let v66 = constructor_x64_shufps(ctx, v57, v59, 0xE4);
-                            let v67 = &C::xmm_to_xmm_mem(ctx, v66);
-                            let v68 = constructor_x64_shufps(ctx, arg1, v67, 0x24);
-                            // Rule at src/isa/x64/lower.isle line 1528.
-                            return v68;
-                        }
-                        _ => {}
-                    }
-                }
-                &RegMem::Mem { addr: ref v69 } => {
-                    let v71 = constructor_x64_movss_load(ctx, v69);
-                    let v72 = C::xmm_to_reg(ctx, v71);
-                    let v73 = &constructor_xmm_to_reg_mem(ctx, v72);
-                    let v74 = &C::xmm_mem_to_reg_mem(ctx, v73);
-                    let v75 = constructor_vec_insert_lane(ctx, F32X4, arg1, v74, arg3);
-                    // Rule at src/isa/x64/lower.isle line 1533.
-                    return v75;
-                }
-                _ => {}
-            }
-        }
-        F64X2 => {
-            match arg3 {
-                0x0 => {
-                    match arg2 {
-                        &RegMem::Reg { reg: v56 } => {
-                            let v57 = C::xmm_new(ctx, v56);
-                            let v76 = constructor_x64_movsd_regmove(ctx, arg1, v57);
-                            // Rule at src/isa/x64/lower.isle line 1545.
-                            return v76;
-                        }
-                        &RegMem::Mem { addr: ref v69 } => {
-                            let v77 = constructor_x64_movsd_load(ctx, v69);
-                            let v78 = constructor_x64_movsd_regmove(ctx, arg1, v77);
-                            // Rule at src/isa/x64/lower.isle line 1547.
-                            return v78;
-                        }
-                        _ => {}
-                    }
-                }
-                0x1 => {
-                    let v53 = &C::reg_mem_to_xmm_mem(ctx, arg2);
-                    let v79 = constructor_x64_movlhps(ctx, arg1, v53);
-                    // Rule at src/isa/x64/lower.isle line 1555.
-                    return v79;
-                }
-                _ => {}
-            }
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "vec_insert_lane", "src/isa/x64/lower.isle line 1413"
-    )
-}
-
-// Generated as internal constructor for term insert_i8x16_lane_pshufd_imm.
-pub fn constructor_insert_i8x16_lane_pshufd_imm<C: Context>(ctx: &mut C, arg0: u8) -> u8 {
-    match arg0 {
-        0x0 => {
-            // Rule at src/isa/x64/lower.isle line 1455.
-            return 0x54;
-        }
-        0x1 => {
-            // Rule at src/isa/x64/lower.isle line 1456.
-            return 0x51;
-        }
-        0x2 => {
-            // Rule at src/isa/x64/lower.isle line 1457.
-            return 0x45;
-        }
-        0x3 => {
-            // Rule at src/isa/x64/lower.isle line 1458.
-            return 0x15;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "insert_i8x16_lane_pshufd_imm", "src/isa/x64/lower.isle line 1454"
-    )
-}
-
-// Generated as internal constructor for term cmp_and_choose.
-pub fn constructor_cmp_and_choose<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &CC,
-    arg2: Value,
-    arg3: Value,
-) -> ValueRegs {
-    let v1 = C::fits_in_64(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v6 = &C::raw_operand_size_of_type(ctx, v2);
-        let v7 = C::put_in_reg(ctx, arg2);
-        let v8 = C::put_in_reg(ctx, arg3);
-        let v9 = &constructor_reg_to_gpr_mem_imm(ctx, v7);
-        let v10 = C::gpr_new(ctx, v8);
-        let v11 = &constructor_x64_cmp(ctx, v6, v9, v10);
-        let v12 = &C::reg_to_gpr_mem(ctx, v8);
-        let v13 = C::gpr_new(ctx, v7);
-        let v14 = &constructor_cmove(ctx, v2, arg1, v12, v13);
-        let v15 = constructor_with_flags_reg(ctx, v11, v14);
-        let v16 = C::value_reg(ctx, v15);
-        // Rule at src/isa/x64/lower.isle line 1563.
-        return v16;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "cmp_and_choose", "src/isa/x64/lower.isle line 1562"
-    )
-}
-
-// Generated as internal constructor for term has_pmins.
-pub fn constructor_has_pmins<C: Context>(ctx: &mut C, arg0: Type) -> bool {
-    match arg0 {
-        I16X8 => {
-            // Rule at src/isa/x64/lower.isle line 1589.
-            return true;
-        }
-        I64X2 => {
-            // Rule at src/isa/x64/lower.isle line 1590.
-            return false;
-        }
-        _ => {}
-    }
-    let v3 = C::use_sse41(ctx);
-    // Rule at src/isa/x64/lower.isle line 1591.
-    return v3;
-}
-
-// Generated as internal constructor for term has_pmaxs.
-pub fn constructor_has_pmaxs<C: Context>(ctx: &mut C, arg0: Type) -> bool {
-    match arg0 {
-        I16X8 => {
-            // Rule at src/isa/x64/lower.isle line 1594.
-            return true;
-        }
-        I64X2 => {
-            // Rule at src/isa/x64/lower.isle line 1595.
-            return false;
-        }
-        _ => {}
-    }
-    let v3 = C::use_sse41(ctx);
-    // Rule at src/isa/x64/lower.isle line 1596.
-    return v3;
-}
-
-// Generated as internal constructor for term has_pmaxu.
-pub fn constructor_has_pmaxu<C: Context>(ctx: &mut C, arg0: Type) -> bool {
-    match arg0 {
-        I8X16 => {
-            // Rule at src/isa/x64/lower.isle line 1599.
-            return true;
-        }
-        I64X2 => {
-            // Rule at src/isa/x64/lower.isle line 1600.
-            return false;
-        }
-        _ => {}
-    }
-    let v3 = C::use_sse41(ctx);
-    // Rule at src/isa/x64/lower.isle line 1601.
-    return v3;
-}
-
-// Generated as internal constructor for term has_pminu.
-pub fn constructor_has_pminu<C: Context>(ctx: &mut C, arg0: Type) -> bool {
-    match arg0 {
-        I8X16 => {
-            // Rule at src/isa/x64/lower.isle line 1604.
-            return true;
-        }
-        I64X2 => {
-            // Rule at src/isa/x64/lower.isle line 1605.
-            return false;
-        }
-        _ => {}
-    }
-    let v3 = C::use_sse41(ctx);
-    // Rule at src/isa/x64/lower.isle line 1606.
-    return v3;
-}
-
-// Generated as internal constructor for term lower_vec_smax.
-pub fn constructor_lower_vec_smax<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Xmm,
-    arg2: Xmm,
-) -> Xmm {
-    let v3 = constructor_has_pmaxs(ctx, arg0);
-    if v3 == true {
-        let v4 = &C::xmm_to_xmm_mem(ctx, arg2);
-        let v5 = constructor_x64_pmaxs(ctx, arg0, arg1, v4);
-        // Rule at src/isa/x64/lower.isle line 1614.
-        return v5;
-    }
-    let v4 = &C::xmm_to_xmm_mem(ctx, arg2);
-    let v6 = constructor_x64_pcmpgt(ctx, arg0, arg1, v4);
-    let v7 = &C::xmm_to_xmm_mem(ctx, arg1);
-    let v8 = constructor_x64_pand(ctx, v6, v7);
-    let v9 = &C::xmm_to_xmm_mem(ctx, arg2);
-    let v10 = constructor_x64_pandn(ctx, v6, v9);
-    let v11 = &C::xmm_to_xmm_mem(ctx, v10);
-    let v12 = constructor_x64_por(ctx, v8, v11);
-    // Rule at src/isa/x64/lower.isle line 1618.
-    return v12;
-}
-
-// Generated as internal constructor for term flip_high_bit_mask.
-pub fn constructor_flip_high_bit_mask<C: Context>(ctx: &mut C, arg0: Type) -> Xmm {
-    match arg0 {
-        I16X8 => {
-            let v2 = C::emit_u128_le_const(ctx, 0x80008000800080008000800080008000);
-            let v3 = &constructor_const_to_xmm_mem(ctx, v2);
-            let v4 = constructor_x64_movdqu_load(ctx, v3);
-            // Rule at src/isa/x64/lower.isle line 1673.
-            return v4;
-        }
-        I32X4 => {
-            let v6 = C::emit_u128_le_const(ctx, 0x80000000800000008000000080000000);
-            let v7 = &constructor_const_to_xmm_mem(ctx, v6);
-            let v8 = constructor_x64_movdqu_load(ctx, v7);
-            // Rule at src/isa/x64/lower.isle line 1675.
-            return v8;
-        }
-        I64X2 => {
-            let v10 = C::emit_u128_le_const(ctx, 0x80000000000000008000000000000000);
-            let v11 = &constructor_const_to_xmm_mem(ctx, v10);
-            let v12 = constructor_x64_movdqu_load(ctx, v11);
-            // Rule at src/isa/x64/lower.isle line 1677.
-            return v12;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "flip_high_bit_mask", "src/isa/x64/lower.isle line 1672"
-    )
-}
-
-// Generated as internal constructor for term lower_select_fcmp.
-pub fn constructor_lower_select_fcmp<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &FcmpCondResult,
-    arg2: Value,
-    arg3: Value,
-) -> InstOutput {
-    match arg1 {
-        &FcmpCondResult::Condition {
-            producer: ref v2,
-            cc: ref v3,
-        } => {
-            let v6 = &constructor_cmove_from_values(ctx, arg0, v3, arg2, arg3);
-            let v7 = constructor_with_flags(ctx, v2, v6);
-            let v8 = C::output(ctx, v7);
-            // Rule at src/isa/x64/lower.isle line 1996.
-            return v8;
-        }
-        &FcmpCondResult::OrCondition {
-            producer: ref v9,
-            cc1: ref v10,
-            cc2: ref v11,
-        } => {
-            let v12 = &constructor_cmove_or_from_values(ctx, arg0, v10, v11, arg2, arg3);
-            let v13 = constructor_with_flags(ctx, v9, v12);
-            let v14 = C::output(ctx, v13);
-            // Rule at src/isa/x64/lower.isle line 1998.
-            return v14;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "lower_select_fcmp", "src/isa/x64/lower.isle line 1995"
-    )
-}
-
-// Generated as internal constructor for term do_clz.
-pub fn constructor_do_clz<C: Context>(ctx: &mut C, arg0: Type, arg1: Type, arg2: Gpr) -> Gpr {
-    let v5 = constructor_imm_i64(ctx, I64, -0x1);
-    let v6 = C::gpr_new(ctx, v5);
-    let v7 = constructor_bsr_or_else(ctx, arg0, arg2, v6);
-    let v8 = C::gpr_to_reg(ctx, v7);
-    let v9 = C::ty_bits_u64(ctx, arg1);
-    let v11 = C::u64_sub(ctx, v9, 0x1);
-    let v12 = constructor_imm(ctx, arg0, v11);
-    let v13 = C::gpr_new(ctx, v12);
-    let v14 = &constructor_reg_to_gpr_mem_imm(ctx, v8);
-    let v15 = constructor_x64_sub(ctx, arg0, v13, v14);
-    // Rule at src/isa/x64/lower.isle line 2057.
-    return v15;
-}
-
-// Generated as internal constructor for term do_ctz.
-pub fn constructor_do_ctz<C: Context>(ctx: &mut C, arg0: Type, arg1: Type, arg2: Gpr) -> Gpr {
-    let v4 = C::ty_bits_u64(ctx, arg1);
-    let v5 = constructor_imm(ctx, I64, v4);
-    let v6 = C::gpr_new(ctx, v5);
-    let v7 = constructor_bsf_or_else(ctx, arg0, arg2, v6);
-    // Rule at src/isa/x64/lower.isle line 2093.
-    return v7;
-}
-
-// Generated as internal constructor for term do_popcnt.
-pub fn constructor_do_popcnt<C: Context>(ctx: &mut C, arg0: Type, arg1: Gpr) -> Gpr {
-    match arg0 {
-        I32 => {
-            let v4 = Imm8Reg::Imm8 { imm: 0x1 };
-            let v5 = &C::imm8_reg_to_imm8_gpr(ctx, &v4);
-            let v47 = constructor_x64_shr(ctx, I32, arg1, v5);
-            let v49 = constructor_imm(ctx, I32, 0x77777777);
-            let v50 = C::gpr_new(ctx, v49);
-            let v51 = &C::gpr_to_gpr_mem_imm(ctx, v50);
-            let v52 = constructor_x64_and(ctx, I32, v47, v51);
-            let v53 = &C::gpr_to_gpr_mem_imm(ctx, v52);
-            let v54 = constructor_x64_sub(ctx, I32, arg1, v53);
-            let v14 = &C::imm8_reg_to_imm8_gpr(ctx, &v4);
-            let v55 = constructor_x64_shr(ctx, I32, v52, v14);
-            let v56 = &C::gpr_to_gpr_mem_imm(ctx, v50);
-            let v57 = constructor_x64_and(ctx, I32, v55, v56);
-            let v58 = &C::gpr_to_gpr_mem_imm(ctx, v57);
-            let v59 = constructor_x64_sub(ctx, I32, v54, v58);
-            let v20 = &C::imm8_reg_to_imm8_gpr(ctx, &v4);
-            let v60 = constructor_x64_shr(ctx, I32, v57, v20);
-            let v61 = &C::gpr_to_gpr_mem_imm(ctx, v50);
-            let v62 = constructor_x64_and(ctx, I32, v60, v61);
-            let v63 = &C::gpr_to_gpr_mem_imm(ctx, v62);
-            let v64 = constructor_x64_sub(ctx, I32, v59, v63);
-            let v27 = Imm8Reg::Imm8 { imm: 0x4 };
-            let v28 = &C::imm8_reg_to_imm8_gpr(ctx, &v27);
-            let v65 = constructor_x64_shr(ctx, I32, v64, v28);
-            let v66 = &C::gpr_to_gpr_mem_imm(ctx, v64);
-            let v67 = constructor_x64_add(ctx, I32, v65, v66);
-            let v69 = RegMemImm::Imm { simm32: 0xF0F0F0F };
-            let v70 = &C::gpr_mem_imm_new(ctx, &v69);
-            let v71 = constructor_x64_and(ctx, I32, v67, v70);
-            let v73 = RegMemImm::Imm { simm32: 0x1010101 };
-            let v74 = &C::gpr_mem_imm_new(ctx, &v73);
-            let v75 = constructor_x64_mul(ctx, I32, v71, v74);
-            let v77 = Imm8Reg::Imm8 { imm: 0x18 };
-            let v78 = &C::imm8_reg_to_imm8_gpr(ctx, &v77);
-            let v79 = constructor_x64_shr(ctx, I32, v75, v78);
-            // Rule at src/isa/x64/lower.isle line 2175.
-            return v79;
-        }
-        I64 => {
-            let v4 = Imm8Reg::Imm8 { imm: 0x1 };
-            let v5 = &C::imm8_reg_to_imm8_gpr(ctx, &v4);
-            let v6 = constructor_x64_shr(ctx, I64, arg1, v5);
-            let v8 = constructor_imm(ctx, I64, 0x7777777777777777);
-            let v9 = C::gpr_new(ctx, v8);
-            let v10 = &C::gpr_to_gpr_mem_imm(ctx, v9);
-            let v11 = constructor_x64_and(ctx, I64, v6, v10);
-            let v12 = &C::gpr_to_gpr_mem_imm(ctx, v11);
-            let v13 = constructor_x64_sub(ctx, I64, arg1, v12);
-            let v14 = &C::imm8_reg_to_imm8_gpr(ctx, &v4);
-            let v15 = constructor_x64_shr(ctx, I64, v11, v14);
-            let v16 = &C::gpr_to_gpr_mem_imm(ctx, v9);
-            let v17 = constructor_x64_and(ctx, I64, v15, v16);
-            let v18 = &C::gpr_to_gpr_mem_imm(ctx, v17);
-            let v19 = constructor_x64_sub(ctx, I64, v13, v18);
-            let v20 = &C::imm8_reg_to_imm8_gpr(ctx, &v4);
-            let v21 = constructor_x64_shr(ctx, I64, v17, v20);
-            let v22 = &C::gpr_to_gpr_mem_imm(ctx, v9);
-            let v23 = constructor_x64_and(ctx, I64, v21, v22);
-            let v24 = &C::gpr_to_gpr_mem_imm(ctx, v23);
-            let v25 = constructor_x64_sub(ctx, I64, v19, v24);
-            let v27 = Imm8Reg::Imm8 { imm: 0x4 };
-            let v28 = &C::imm8_reg_to_imm8_gpr(ctx, &v27);
-            let v29 = constructor_x64_shr(ctx, I64, v25, v28);
-            let v30 = &C::gpr_to_gpr_mem_imm(ctx, v25);
-            let v31 = constructor_x64_add(ctx, I64, v29, v30);
-            let v33 = constructor_imm(ctx, I64, 0xF0F0F0F0F0F0F0F);
-            let v34 = C::gpr_new(ctx, v33);
-            let v35 = &C::gpr_to_gpr_mem_imm(ctx, v34);
-            let v36 = constructor_x64_and(ctx, I64, v31, v35);
-            let v38 = constructor_imm(ctx, I64, 0x101010101010101);
-            let v39 = C::gpr_new(ctx, v38);
-            let v40 = &C::gpr_to_gpr_mem_imm(ctx, v39);
-            let v41 = constructor_x64_mul(ctx, I64, v36, v40);
-            let v43 = Imm8Reg::Imm8 { imm: 0x38 };
-            let v44 = &C::imm8_reg_to_imm8_gpr(ctx, &v43);
-            let v45 = constructor_x64_shr(ctx, I64, v41, v44);
-            // Rule at src/isa/x64/lower.isle line 2132.
-            return v45;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "do_popcnt", "src/isa/x64/lower.isle line 2131"
-    )
-}
-
-// Generated as internal constructor for term do_bitrev8.
-pub fn constructor_do_bitrev8<C: Context>(ctx: &mut C, arg0: Type, arg1: Gpr) -> Gpr {
-    let v2 = C::ty_mask(ctx, arg0);
-    let v4 = C::u64_and(ctx, v2, 0x5555555555555555);
-    let v5 = constructor_imm(ctx, arg0, v4);
-    let v6 = C::gpr_new(ctx, v5);
-    let v7 = &C::gpr_to_gpr_mem_imm(ctx, v6);
-    let v8 = constructor_x64_and(ctx, arg0, arg1, v7);
-    let v10 = Imm8Reg::Imm8 { imm: 0x1 };
-    let v11 = &C::imm8_reg_to_imm8_gpr(ctx, &v10);
-    let v12 = constructor_x64_shr(ctx, arg0, arg1, v11);
-    let v13 = &C::gpr_to_gpr_mem_imm(ctx, v6);
-    let v14 = constructor_x64_and(ctx, arg0, v12, v13);
-    let v15 = &C::imm8_reg_to_imm8_gpr(ctx, &v10);
-    let v16 = constructor_x64_shl(ctx, arg0, v8, v15);
-    let v17 = &C::gpr_to_gpr_mem_imm(ctx, v14);
-    let v18 = constructor_x64_or(ctx, arg0, v16, v17);
-    let v20 = C::u64_and(ctx, v2, 0x3333333333333333);
-    let v21 = constructor_imm(ctx, arg0, v20);
-    let v22 = C::gpr_new(ctx, v21);
-    let v23 = &C::gpr_to_gpr_mem_imm(ctx, v22);
-    let v24 = constructor_x64_and(ctx, arg0, v18, v23);
-    let v26 = Imm8Reg::Imm8 { imm: 0x2 };
-    let v27 = &C::imm8_reg_to_imm8_gpr(ctx, &v26);
-    let v28 = constructor_x64_shr(ctx, arg0, v18, v27);
-    let v29 = &C::gpr_to_gpr_mem_imm(ctx, v22);
-    let v30 = constructor_x64_and(ctx, arg0, v28, v29);
-    let v31 = &C::imm8_reg_to_imm8_gpr(ctx, &v26);
-    let v32 = constructor_x64_shl(ctx, arg0, v24, v31);
-    let v33 = &C::gpr_to_gpr_mem_imm(ctx, v30);
-    let v34 = constructor_x64_or(ctx, arg0, v32, v33);
-    let v36 = C::u64_and(ctx, v2, 0xF0F0F0F0F0F0F0F);
-    let v37 = constructor_imm(ctx, arg0, v36);
-    let v38 = C::gpr_new(ctx, v37);
-    let v39 = &C::gpr_to_gpr_mem_imm(ctx, v38);
-    let v40 = constructor_x64_and(ctx, arg0, v34, v39);
-    let v42 = Imm8Reg::Imm8 { imm: 0x4 };
-    let v43 = &C::imm8_reg_to_imm8_gpr(ctx, &v42);
-    let v44 = constructor_x64_shr(ctx, arg0, v34, v43);
-    let v45 = &C::gpr_to_gpr_mem_imm(ctx, v38);
-    let v46 = constructor_x64_and(ctx, arg0, v44, v45);
-    let v47 = &C::imm8_reg_to_imm8_gpr(ctx, &v42);
-    let v48 = constructor_x64_shl(ctx, arg0, v40, v47);
-    let v49 = &C::gpr_to_gpr_mem_imm(ctx, v46);
-    let v50 = constructor_x64_or(ctx, arg0, v48, v49);
-    // Rule at src/isa/x64/lower.isle line 2269.
-    return v50;
-}
-
-// Generated as internal constructor for term do_bitrev16.
-pub fn constructor_do_bitrev16<C: Context>(ctx: &mut C, arg0: Type, arg1: Gpr) -> Gpr {
-    let v2 = constructor_do_bitrev8(ctx, arg0, arg1);
-    let v3 = C::ty_mask(ctx, arg0);
-    let v5 = C::u64_and(ctx, v3, 0xFF00FF00FF00FF);
-    let v6 = constructor_imm(ctx, arg0, v5);
-    let v7 = C::gpr_new(ctx, v6);
-    let v8 = &C::gpr_to_gpr_mem_imm(ctx, v7);
-    let v9 = constructor_x64_and(ctx, arg0, v2, v8);
-    let v11 = Imm8Reg::Imm8 { imm: 0x8 };
-    let v12 = &C::imm8_reg_to_imm8_gpr(ctx, &v11);
-    let v13 = constructor_x64_shr(ctx, arg0, v2, v12);
-    let v14 = &C::gpr_to_gpr_mem_imm(ctx, v7);
-    let v15 = constructor_x64_and(ctx, arg0, v13, v14);
-    let v16 = &C::imm8_reg_to_imm8_gpr(ctx, &v11);
-    let v17 = constructor_x64_shl(ctx, arg0, v9, v16);
-    let v18 = &C::gpr_to_gpr_mem_imm(ctx, v15);
-    let v19 = constructor_x64_or(ctx, arg0, v17, v18);
-    // Rule at src/isa/x64/lower.isle line 2292.
-    return v19;
-}
-
-// Generated as internal constructor for term do_bitrev32.
-pub fn constructor_do_bitrev32<C: Context>(ctx: &mut C, arg0: Type, arg1: Gpr) -> Gpr {
-    let v2 = constructor_do_bitrev16(ctx, arg0, arg1);
-    let v3 = C::ty_mask(ctx, arg0);
-    let v5 = C::u64_and(ctx, v3, 0xFFFF0000FFFF);
-    let v6 = constructor_imm(ctx, arg0, v5);
-    let v7 = C::gpr_new(ctx, v6);
-    let v8 = &C::gpr_to_gpr_mem_imm(ctx, v7);
-    let v9 = constructor_x64_and(ctx, arg0, v2, v8);
-    let v11 = Imm8Reg::Imm8 { imm: 0x10 };
-    let v12 = &C::imm8_reg_to_imm8_gpr(ctx, &v11);
-    let v13 = constructor_x64_shr(ctx, arg0, v2, v12);
-    let v14 = &C::gpr_to_gpr_mem_imm(ctx, v7);
-    let v15 = constructor_x64_and(ctx, arg0, v13, v14);
-    let v16 = &C::imm8_reg_to_imm8_gpr(ctx, &v11);
-    let v17 = constructor_x64_shl(ctx, arg0, v9, v16);
-    let v18 = &C::gpr_to_gpr_mem_imm(ctx, v15);
-    let v19 = constructor_x64_or(ctx, arg0, v17, v18);
-    // Rule at src/isa/x64/lower.isle line 2304.
-    return v19;
-}
-
-// Generated as internal constructor for term do_bitrev64.
-pub fn constructor_do_bitrev64<C: Context>(ctx: &mut C, arg0: Type, arg1: Gpr) -> Gpr {
-    if arg0 == I64 {
-        let v2 = constructor_do_bitrev32(ctx, arg0, arg1);
-        let v4 = constructor_imm(ctx, arg0, 0xFFFFFFFF);
-        let v5 = C::gpr_new(ctx, v4);
-        let v6 = &C::gpr_to_gpr_mem_imm(ctx, v5);
-        let v7 = constructor_x64_and(ctx, arg0, v2, v6);
-        let v9 = Imm8Reg::Imm8 { imm: 0x20 };
-        let v10 = &C::imm8_reg_to_imm8_gpr(ctx, &v9);
-        let v11 = constructor_x64_shr(ctx, arg0, v2, v10);
-        let v12 = &C::imm8_reg_to_imm8_gpr(ctx, &v9);
-        let v13 = constructor_x64_shl(ctx, arg0, v7, v12);
-        let v14 = &C::gpr_to_gpr_mem_imm(ctx, v11);
-        let v15 = constructor_x64_or(ctx, arg0, v13, v14);
-        // Rule at src/isa/x64/lower.isle line 2316.
-        return v15;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "do_bitrev64", "src/isa/x64/lower.isle line 2315"
-    )
-}
-
-// Generated as internal constructor for term fmadd.
-pub fn constructor_fmadd<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Value,
-    arg2: Value,
-    arg3: Value,
-) -> Xmm {
-    let v24 = C::def_inst(ctx, arg2);
-    if let Some(v25) = v24 {
-        let v26 = &C::inst_data(ctx, v25);
-        if let &InstructionData::Unary {
-            opcode: ref v27,
-            arg: v28,
-        } = v26
-        {
-            if let &Opcode::Fneg = v27 {
-                let v29 = constructor_fnmadd(ctx, arg0, arg1, v28, arg3);
-                // Rule at src/isa/x64/lower.isle line 2772.
-                return v29;
-            }
-        }
-    }
-    let v18 = C::def_inst(ctx, arg1);
-    if let Some(v19) = v18 {
-        let v20 = &C::inst_data(ctx, v19);
-        if let &InstructionData::Unary {
-            opcode: ref v21,
-            arg: v22,
-        } = v20
-        {
-            if let &Opcode::Fneg = v21 {
-                let v23 = constructor_fnmadd(ctx, arg0, v22, arg2, arg3);
-                // Rule at src/isa/x64/lower.isle line 2771.
-                return v23;
-            }
-        }
-    }
-    let v14 = &C::sinkable_load(ctx, arg2);
-    if let Some(v15) = v14 {
-        let v4 = constructor_put_in_xmm(ctx, arg1);
-        let v11 = constructor_put_in_xmm(ctx, arg3);
-        let v16 = &constructor_sink_load_to_xmm_mem(ctx, v15);
-        let v17 = constructor_x64_vfmadd132(ctx, arg0, v4, v11, v16);
-        // Rule at src/isa/x64/lower.isle line 2767.
-        return v17;
-    }
-    let v8 = &C::sinkable_load(ctx, arg1);
-    if let Some(v9) = v8 {
-        let v10 = constructor_put_in_xmm(ctx, arg2);
-        let v11 = constructor_put_in_xmm(ctx, arg3);
-        let v12 = &constructor_sink_load_to_xmm_mem(ctx, v9);
-        let v13 = constructor_x64_vfmadd132(ctx, arg0, v10, v11, v12);
-        // Rule at src/isa/x64/lower.isle line 2766.
-        return v13;
-    }
-    let v4 = constructor_put_in_xmm(ctx, arg1);
-    let v5 = constructor_put_in_xmm(ctx, arg2);
-    let v6 = &C::put_in_xmm_mem(ctx, arg3);
-    let v7 = constructor_x64_vfmadd213(ctx, arg0, v4, v5, v6);
-    // Rule at src/isa/x64/lower.isle line 2761.
-    return v7;
-}
-
-// Generated as internal constructor for term fnmadd.
-pub fn constructor_fnmadd<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: Value,
-    arg2: Value,
-    arg3: Value,
-) -> Xmm {
-    let v24 = C::def_inst(ctx, arg2);
-    if let Some(v25) = v24 {
-        let v26 = &C::inst_data(ctx, v25);
-        if let &InstructionData::Unary {
-            opcode: ref v27,
-            arg: v28,
-        } = v26
-        {
-            if let &Opcode::Fneg = v27 {
-                let v29 = constructor_fmadd(ctx, arg0, arg1, v28, arg3);
-                // Rule at src/isa/x64/lower.isle line 2780.
-                return v29;
-            }
-        }
-    }
-    let v18 = C::def_inst(ctx, arg1);
-    if let Some(v19) = v18 {
-        let v20 = &C::inst_data(ctx, v19);
-        if let &InstructionData::Unary {
-            opcode: ref v21,
-            arg: v22,
-        } = v20
-        {
-            if let &Opcode::Fneg = v21 {
-                let v23 = constructor_fmadd(ctx, arg0, v22, arg2, arg3);
-                // Rule at src/isa/x64/lower.isle line 2779.
-                return v23;
-            }
-        }
-    }
-    let v14 = &C::sinkable_load(ctx, arg2);
-    if let Some(v15) = v14 {
-        let v4 = constructor_put_in_xmm(ctx, arg1);
-        let v11 = constructor_put_in_xmm(ctx, arg3);
-        let v16 = &constructor_sink_load_to_xmm_mem(ctx, v15);
-        let v17 = constructor_x64_vfnmadd132(ctx, arg0, v4, v11, v16);
-        // Rule at src/isa/x64/lower.isle line 2776.
-        return v17;
-    }
-    let v8 = &C::sinkable_load(ctx, arg1);
-    if let Some(v9) = v8 {
-        let v10 = constructor_put_in_xmm(ctx, arg2);
-        let v11 = constructor_put_in_xmm(ctx, arg3);
-        let v12 = &constructor_sink_load_to_xmm_mem(ctx, v9);
-        let v13 = constructor_x64_vfnmadd132(ctx, arg0, v10, v11, v12);
-        // Rule at src/isa/x64/lower.isle line 2775.
-        return v13;
-    }
-    let v4 = constructor_put_in_xmm(ctx, arg1);
-    let v5 = constructor_put_in_xmm(ctx, arg2);
-    let v6 = &C::put_in_xmm_mem(ctx, arg3);
-    let v7 = constructor_x64_vfnmadd213(ctx, arg0, v4, v5, v6);
-    // Rule at src/isa/x64/lower.isle line 2774.
-    return v7;
-}
-
-// Generated as internal constructor for term cmp_zero_i128.
-pub fn constructor_cmp_zero_i128<C: Context>(
-    ctx: &mut C,
-    arg0: &CC,
-    arg1: ValueRegs,
-) -> IcmpCondResult {
-    let v1 = &C::cc_nz_or_z(ctx, arg0);
-    if let Some(v2) = v1 {
-        let v5 = constructor_value_regs_get_gpr(ctx, arg1, 0x0);
-        let v7 = constructor_value_regs_get_gpr(ctx, arg1, 0x1);
-        let v10 = RegMemImm::Imm { simm32: 0x0 };
-        let v11 = &C::gpr_mem_imm_new(ctx, &v10);
-        let v12 = &constructor_x64_cmp(ctx, &OperandSize::Size64, v11, v5);
-        let v14 = &constructor_x64_setcc(ctx, &CC::Z);
-        let v15 = constructor_with_flags_reg(ctx, v12, v14);
-        let v16 = C::gpr_new(ctx, v15);
-        let v17 = &C::gpr_mem_imm_new(ctx, &v10);
-        let v18 = &constructor_x64_cmp(ctx, &OperandSize::Size64, v17, v7);
-        let v19 = &constructor_x64_setcc(ctx, &CC::Z);
-        let v20 = constructor_with_flags_reg(ctx, v18, v19);
-        let v21 = C::gpr_new(ctx, v20);
-        let v23 = &C::gpr_to_gpr_mem_imm(ctx, v16);
-        let v24 = &constructor_x64_test(ctx, &OperandSize::Size8, v23, v21);
-        let v25 = &constructor_icmp_cond_result(ctx, v24, v2);
-        // Rule at src/isa/x64/lower.isle line 3243.
-        return v25.clone();
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "cmp_zero_i128", "src/isa/x64/lower.isle line 3242"
-    )
-}
-
-// Generated as internal constructor for term cmp_zero_int_bool_ref.
-pub fn constructor_cmp_zero_int_bool_ref<C: Context>(ctx: &mut C, arg0: Value) -> ProducesFlags {
-    let v1 = C::value_type(ctx, arg0);
-    let v2 = &C::raw_operand_size_of_type(ctx, v1);
-    let v3 = constructor_put_in_gpr(ctx, arg0);
-    let v4 = &C::gpr_to_gpr_mem_imm(ctx, v3);
-    let v5 = &constructor_x64_test(ctx, v2, v4, v3);
-    // Rule at src/isa/x64/lower.isle line 3254.
-    return v5.clone();
-}
-
-// Generated as internal constructor for term lower_swiden_low.
-pub fn constructor_lower_swiden_low<C: Context>(ctx: &mut C, arg0: Type, arg1: Xmm) -> Xmm {
-    match arg0 {
-        I16X8 => {
-            let v2 = &C::xmm_to_xmm_mem(ctx, arg1);
-            let v3 = constructor_x64_punpcklbw(ctx, arg1, v2);
-            let v5 = &C::xmi_imm(ctx, 0x8);
-            let v6 = constructor_x64_psraw(ctx, v3, v5);
-            // Rule at src/isa/x64/lower.isle line 3651.
-            return v6;
-        }
-        I32X4 => {
-            let v2 = &C::xmm_to_xmm_mem(ctx, arg1);
-            let v7 = constructor_x64_punpcklwd(ctx, arg1, v2);
-            let v9 = &C::xmi_imm(ctx, 0x10);
-            let v10 = constructor_x64_psrad(ctx, v7, v9);
-            // Rule at src/isa/x64/lower.isle line 3653.
-            return v10;
-        }
-        I64X2 => {
-            let v12 = constructor_xmm_zero(ctx, I32X4);
-            let v13 = &C::xmm_to_xmm_mem(ctx, arg1);
-            let v14 = constructor_x64_pcmpgtd(ctx, v12, v13);
-            let v15 = &C::xmm_to_xmm_mem(ctx, v14);
-            let v16 = constructor_x64_punpckldq(ctx, arg1, v15);
-            // Rule at src/isa/x64/lower.isle line 3659.
-            return v16;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "lower_swiden_low", "src/isa/x64/lower.isle line 3646"
-    )
-}
-
-// Generated as internal constructor for term lower_uwiden_low.
-pub fn constructor_lower_uwiden_low<C: Context>(ctx: &mut C, arg0: Type, arg1: Xmm) -> Xmm {
-    match arg0 {
-        I16X8 => {
-            let v3 = constructor_xmm_zero(ctx, I8X16);
-            let v4 = &C::xmm_to_xmm_mem(ctx, v3);
-            let v5 = constructor_x64_punpcklbw(ctx, arg1, v4);
-            // Rule at src/isa/x64/lower.isle line 3714.
-            return v5;
-        }
-        I32X4 => {
-            let v3 = constructor_xmm_zero(ctx, I8X16);
-            let v4 = &C::xmm_to_xmm_mem(ctx, v3);
-            let v6 = constructor_x64_punpcklwd(ctx, arg1, v4);
-            // Rule at src/isa/x64/lower.isle line 3715.
-            return v6;
-        }
-        I64X2 => {
-            let v8 = constructor_xmm_zero(ctx, F32X4);
-            let v9 = &C::xmm_to_xmm_mem(ctx, v8);
-            let v10 = constructor_x64_unpcklps(ctx, arg1, v9);
-            // Rule at src/isa/x64/lower.isle line 3716.
-            return v10;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "lower_uwiden_low", "src/isa/x64/lower.isle line 3713"
-    )
-}
-
-// Generated as internal constructor for term unarrow_i32x4_lanes_to_low_u16_lanes.
-pub fn constructor_unarrow_i32x4_lanes_to_low_u16_lanes<C: Context>(ctx: &mut C, arg0: Xmm) -> Xmm {
-    let v2 = constructor_xmm_zero(ctx, I32X4);
-    let v3 = &C::xmm_to_xmm_mem(ctx, v2);
-    let v4 = constructor_x64_pcmpgtd(ctx, arg0, v3);
-    let v5 = &C::xmm_to_xmm_mem(ctx, v4);
-    let v6 = constructor_x64_pand(ctx, arg0, v5);
-    let v8 = C::emit_u128_le_const(ctx, 0xFFFF0000FFFF0000FFFF0000FFFF);
-    let v9 = &constructor_const_to_xmm_mem(ctx, v8);
-    let v10 = constructor_x64_movdqu_load(ctx, v9);
-    let v11 = &C::xmm_to_xmm_mem(ctx, v6);
-    let v12 = constructor_x64_pcmpgtd(ctx, v10, v11);
-    let v13 = &C::xmm_to_xmm_mem(ctx, v12);
-    let v14 = constructor_x64_pand(ctx, v6, v13);
-    let v15 = &C::xmm_to_xmm_mem(ctx, v10);
-    let v16 = constructor_x64_pandn(ctx, v12, v15);
-    let v17 = &C::xmm_to_xmm_mem(ctx, v16);
-    let v18 = constructor_x64_por(ctx, v14, v17);
-    let v19 = &C::xmm_to_xmm_mem(ctx, v18);
-    let v21 = constructor_x64_pshuflw(ctx, v19, 0x8);
-    let v22 = &C::xmm_to_xmm_mem(ctx, v21);
-    let v23 = constructor_x64_pshufhw(ctx, v22, 0x8);
-    let v24 = &C::xmm_to_xmm_mem(ctx, v23);
-    let v25 = constructor_x64_pshufd(ctx, v24, 0x8);
-    // Rule at src/isa/x64/lower.isle line 3796.
-    return v25;
-}
-
-// Generated as internal constructor for term x64_round.
-pub fn constructor_x64_round<C: Context>(
-    ctx: &mut C,
-    arg0: Type,
-    arg1: &RegMem,
-    arg2: &RoundImm,
-) -> Xmm {
-    match arg0 {
-        F32 => {
-            let v3 = C::use_sse41(ctx);
-            if v3 == true {
-                let v4 = &C::reg_mem_to_xmm_mem(ctx, arg1);
-                let v5 = constructor_x64_roundss(ctx, v4, arg2);
-                // Rule at src/isa/x64/lower.isle line 3864.
-                return v5;
-            }
-            if let &RegMem::Reg { reg: v9 } = arg1 {
-                let v11 = &constructor_round_libcall(ctx, F32, arg2);
-                let v12 = C::libcall_1(ctx, v11, v9);
-                let v13 = C::xmm_new(ctx, v12);
-                // Rule at src/isa/x64/lower.isle line 3877.
-                return v13;
-            }
-        }
-        F64 => {
-            let v3 = C::use_sse41(ctx);
-            if v3 == true {
-                let v4 = &C::reg_mem_to_xmm_mem(ctx, arg1);
-                let v6 = constructor_x64_roundsd(ctx, v4, arg2);
-                // Rule at src/isa/x64/lower.isle line 3867.
-                return v6;
-            }
-            if let &RegMem::Reg { reg: v9 } = arg1 {
-                let v15 = &constructor_round_libcall(ctx, F64, arg2);
-                let v16 = C::libcall_1(ctx, v15, v9);
-                let v17 = C::xmm_new(ctx, v16);
-                // Rule at src/isa/x64/lower.isle line 3878.
-                return v17;
-            }
-        }
-        F32X4 => {
-            let v3 = C::use_sse41(ctx);
-            if v3 == true {
-                let v4 = &C::reg_mem_to_xmm_mem(ctx, arg1);
-                let v7 = constructor_x64_roundps(ctx, v4, arg2);
-                // Rule at src/isa/x64/lower.isle line 3870.
-                return v7;
-            }
-            if let &RegMem::Reg { reg: v9 } = arg1 {
-                let v11 = &constructor_round_libcall(ctx, F32, arg2);
-                let v12 = C::libcall_1(ctx, v11, v9);
-                let v13 = C::xmm_new(ctx, v12);
-                let v18 = &constructor_reg_to_xmm_mem(ctx, v9);
-                let v20 = constructor_x64_pshufd(ctx, v18, 0x1);
-                let v21 = C::xmm_to_reg(ctx, v20);
-                let v22 = C::libcall_1(ctx, v11, v21);
-                let v23 = C::xmm_new(ctx, v22);
-                let v25 = C::xmm_to_reg(ctx, v23);
-                let v26 = &constructor_xmm_to_reg_mem(ctx, v25);
-                let v27 = &C::xmm_mem_to_reg_mem(ctx, v26);
-                let v28 = constructor_vec_insert_lane(ctx, F32X4, v13, v27, 0x1);
-                let v29 = &constructor_reg_to_xmm_mem(ctx, v9);
-                let v31 = constructor_x64_pshufd(ctx, v29, 0x2);
-                let v32 = C::xmm_to_reg(ctx, v31);
-                let v33 = C::libcall_1(ctx, v11, v32);
-                let v34 = C::xmm_new(ctx, v33);
-                let v35 = C::xmm_to_reg(ctx, v34);
-                let v36 = &constructor_xmm_to_reg_mem(ctx, v35);
-                let v37 = &C::xmm_mem_to_reg_mem(ctx, v36);
-                let v38 = constructor_vec_insert_lane(ctx, F32X4, v28, v37, 0x2);
-                let v39 = &constructor_reg_to_xmm_mem(ctx, v9);
-                let v41 = constructor_x64_pshufd(ctx, v39, 0x3);
-                let v42 = C::xmm_to_reg(ctx, v41);
-                let v43 = C::libcall_1(ctx, v11, v42);
-                let v44 = C::xmm_new(ctx, v43);
-                let v45 = C::xmm_to_reg(ctx, v44);
-                let v46 = &constructor_xmm_to_reg_mem(ctx, v45);
-                let v47 = &C::xmm_mem_to_reg_mem(ctx, v46);
-                let v48 = constructor_vec_insert_lane(ctx, F32X4, v38, v47, 0x3);
-                // Rule at src/isa/x64/lower.isle line 3879.
-                return v48;
-            }
-        }
-        F64X2 => {
-            let v3 = C::use_sse41(ctx);
-            if v3 == true {
-                let v4 = &C::reg_mem_to_xmm_mem(ctx, arg1);
-                let v8 = constructor_x64_roundpd(ctx, v4, arg2);
-                // Rule at src/isa/x64/lower.isle line 3873.
-                return v8;
-            }
-            if let &RegMem::Reg { reg: v9 } = arg1 {
-                let v15 = &constructor_round_libcall(ctx, F64, arg2);
-                let v16 = C::libcall_1(ctx, v15, v9);
-                let v17 = C::xmm_new(ctx, v16);
-                let v18 = &constructor_reg_to_xmm_mem(ctx, v9);
-                let v50 = constructor_x64_pshufd(ctx, v18, 0xE);
-                let v51 = C::xmm_to_reg(ctx, v50);
-                let v52 = C::libcall_1(ctx, v15, v51);
-                let v53 = C::xmm_new(ctx, v52);
-                let v55 = C::xmm_to_reg(ctx, v53);
-                let v56 = &constructor_xmm_to_reg_mem(ctx, v55);
-                let v57 = &C::xmm_mem_to_reg_mem(ctx, v56);
-                let v58 = constructor_vec_insert_lane(ctx, F64X2, v17, v57, 0x1);
-                // Rule at src/isa/x64/lower.isle line 3891.
-                return v58;
-            }
-        }
-        _ => {}
-    }
-    if let &RegMem::Mem { addr: ref v59 } = arg1 {
-        let v61 = constructor_x64_load(ctx, arg0, v59, &ExtKind::ZeroExtend);
-        let v62 = RegMem::Reg { reg: v61 };
-        let v63 = constructor_x64_round(ctx, arg0, &v62, arg2);
-        // Rule at src/isa/x64/lower.isle line 3899.
-        return v63;
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "x64_round", "src/isa/x64/lower.isle line 3863"
-    )
-}
-
-// Generated as internal constructor for term round_libcall.
-pub fn constructor_round_libcall<C: Context>(ctx: &mut C, arg0: Type, arg1: &RoundImm) -> LibCall {
-    match arg0 {
-        F32 => {
-            match arg1 {
-                &RoundImm::RoundNearest => {
-                    // Rule at src/isa/x64/lower.isle line 3907.
-                    return LibCall::NearestF32;
-                }
-                &RoundImm::RoundDown => {
-                    // Rule at src/isa/x64/lower.isle line 3905.
-                    return LibCall::FloorF32;
-                }
-                &RoundImm::RoundUp => {
-                    // Rule at src/isa/x64/lower.isle line 3903.
-                    return LibCall::CeilF32;
-                }
-                &RoundImm::RoundZero => {
-                    // Rule at src/isa/x64/lower.isle line 3909.
-                    return LibCall::TruncF32;
-                }
-                _ => {}
-            }
-        }
-        F64 => {
-            match arg1 {
-                &RoundImm::RoundNearest => {
-                    // Rule at src/isa/x64/lower.isle line 3908.
-                    return LibCall::NearestF64;
-                }
-                &RoundImm::RoundDown => {
-                    // Rule at src/isa/x64/lower.isle line 3906.
-                    return LibCall::FloorF64;
-                }
-                &RoundImm::RoundUp => {
-                    // Rule at src/isa/x64/lower.isle line 3904.
-                    return LibCall::CeilF64;
-                }
-                &RoundImm::RoundZero => {
-                    // Rule at src/isa/x64/lower.isle line 3910.
-                    return LibCall::TruncF64;
-                }
-                _ => {}
-            }
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "round_libcall", "src/isa/x64/lower.isle line 3902"
-    )
-}
-
-// Generated as internal constructor for term nonzero_sdiv_divisor.
-pub fn constructor_nonzero_sdiv_divisor<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Reg {
-    let v2 = C::def_inst(ctx, arg1);
-    if let Some(v3) = v2 {
-        let v4 = &C::inst_data(ctx, v3);
-        if let &InstructionData::UnaryImm {
-            opcode: ref v5,
-            imm: v6,
-        } = v4
-        {
-            if let &Opcode::Iconst = v5 {
-                let v7 = C::safe_divisor_from_imm64(ctx, arg0, v6);
-                if let Some(v8) = v7 {
-                    let v9 = constructor_imm(ctx, arg0, v8);
-                    // Rule at src/isa/x64/lower.isle line 3990.
-                    return v9;
-                }
-            }
-        }
-    }
-    let v10 = C::put_in_reg(ctx, arg1);
-    let v11 = &C::raw_operand_size_of_type(ctx, arg0);
-    let v12 = &constructor_reg_to_gpr_mem_imm(ctx, v10);
-    let v13 = C::gpr_new(ctx, v10);
-    let v14 = &constructor_x64_test(ctx, v11, v12, v13);
-    let v17 = &constructor_trap_if(ctx, &CC::Z, &TrapCode::IntegerDivisionByZero);
-    let v18 = &constructor_with_flags_side_effect(ctx, v14, v17);
-    let v19 = constructor_side_effect(ctx, v18);
-    // Rule at src/isa/x64/lower.isle line 3993.
-    return v10;
-}
-
-// Generated as internal constructor for term lower_pshufb.
-pub fn constructor_lower_pshufb<C: Context>(ctx: &mut C, arg0: Xmm, arg1: &RegMem) -> Xmm {
-    let v2 = C::use_ssse3(ctx);
-    if v2 == true {
-        let v3 = &C::reg_mem_to_xmm_mem(ctx, arg1);
-        let v4 = constructor_x64_pshufb(ctx, arg0, v3);
-        // Rule at src/isa/x64/lower.isle line 4288.
-        return v4;
-    }
-    match arg1 {
-        &RegMem::Reg { reg: v5 } => {
-            let v7 = C::xmm_to_reg(ctx, arg0);
-            let v8 = C::libcall_2(ctx, &LibCall::X86Pshufb, v7, v5);
-            let v9 = C::xmm_new(ctx, v8);
-            // Rule at src/isa/x64/lower.isle line 4291.
-            return v9;
-        }
-        &RegMem::Mem { addr: ref v10 } => {
-            let v11 = &constructor_synthetic_amode_to_xmm_mem(ctx, v10);
-            let v12 = constructor_x64_movdqu_load(ctx, v11);
-            let v13 = C::xmm_to_reg(ctx, v12);
-            let v14 = &constructor_xmm_to_reg_mem(ctx, v13);
-            let v15 = &C::xmm_mem_to_reg_mem(ctx, v14);
-            let v16 = constructor_lower_pshufb(ctx, arg0, v15);
-            // Rule at src/isa/x64/lower.isle line 4293.
-            return v16;
-        }
-        _ => {}
-    }
-    unreachable!(
-        "no rule matched for term {} at {}; should it be partial?",
-        "lower_pshufb", "src/isa/x64/lower.isle line 4287"
-    )
-}
diff --git a/crates/test-programs/build.rs b/crates/test-programs/build.rs
index eccf8e0d6e00..197d404273b4 100644
--- a/crates/test-programs/build.rs
+++ b/crates/test-programs/build.rs
@@ -58,11 +58,17 @@ fn build_and_generate_tests() {
     components_rs(&meta, "wasi-tests", "bin", &command_adapter, &out_dir);
 
     if BUILD_WASI_HTTP_TESTS {
-        modules_rs(&meta, "wasi-http-tests", "bin", &out_dir);
+        // modules_rs(&meta, "wasi-http-tests", "bin", &out_dir);
         // FIXME this is broken at the moment because guest bindgen is embedding the proxy world type,
         // so wit-component expects the module to contain the proxy's exports. we need a different
         // world to pass guest bindgen that is just "a command that also can do outbound http"
-        //components_rs(&meta, "wasi-http-tests", "bin", &command_adapter, &out_dir);
+        components_rs(
+            &meta,
+            "wasi-http-tests",
+            "cdylib",
+            &reactor_adapter,
+            &out_dir,
+        );
     }
 
     components_rs(&meta, "command-tests", "bin", &command_adapter, &out_dir);
diff --git a/crates/test-programs/tests/wasi-http.rs b/crates/test-programs/tests/wasi-http.rs
index 55ed54dc8a0b..096a1f8468eb 100644
--- a/crates/test-programs/tests/wasi-http.rs
+++ b/crates/test-programs/tests/wasi-http.rs
@@ -1,25 +1,33 @@
 #![cfg(all(feature = "test_programs", not(skip_wasi_http_tests)))]
-use wasmtime::{Config, Engine, Linker, Store};
-use wasmtime_wasi::{sync::WasiCtxBuilder, WasiCtx};
-use wasmtime_wasi_http::WasiHttpCtx;
+use wasmtime::{
+    component::{Component, Linker},
+    Config, Engine, Store,
+};
+use wasmtime_wasi::preview2::{
+    command::{add_to_linker, Command},
+    Table, WasiCtx, WasiCtxBuilder, WasiView,
+};
+use wasmtime_wasi_http::{WasiHttpCtx, WasiHttpView};
 
 use http_body_util::combinators::BoxBody;
 use http_body_util::BodyExt;
 use hyper::server::conn::http1;
 use hyper::{body::Bytes, service::service_fn, Request, Response};
 use std::{error::Error, net::SocketAddr};
-use tokio::net::TcpListener;
+use tokio::{net::TcpListener, runtime::Handle};
 
 lazy_static::lazy_static! {
     static ref ENGINE: Engine = {
         let mut config = Config::new();
         config.wasm_backtrace_details(wasmtime::WasmBacktraceDetails::Enable);
+        config.wasm_component_model(true);
+        config.async_support(true);
         let engine = Engine::new(&config).unwrap();
         engine
     };
 }
 // uses ENGINE, creates a fn get_module(&str) -> Module
-include!(concat!(env!("OUT_DIR"), "/wasi_http_tests_modules.rs"));
+include!(concat!(env!("OUT_DIR"), "/wasi_http_tests_components.rs"));
 
 async fn test(
     req: Request<hyper::body::Incoming>,
@@ -51,47 +59,77 @@ async fn async_run_serve() -> Result<(), Box<dyn Error + Send + Sync>> {
     }
 }
 
-fn run_server() -> Result<(), Box<dyn Error + Send + Sync>> {
-    let rt = tokio::runtime::Runtime::new()?;
-    let _ent = rt.enter();
+struct Ctx {
+    table: Table,
+    wasi: WasiCtx,
+    http: WasiHttpCtx,
+}
 
-    rt.block_on(async_run_serve())?;
-    Ok(())
+impl WasiView for Ctx {
+    fn table(&self) -> &Table {
+        &self.table
+    }
+    fn table_mut(&mut self) -> &mut Table {
+        &mut self.table
+    }
+    fn ctx(&self) -> &WasiCtx {
+        &self.wasi
+    }
+    fn ctx_mut(&mut self) -> &mut WasiCtx {
+        &mut self.wasi
+    }
 }
 
-pub fn run(name: &str) -> anyhow::Result<()> {
-    let _thread = std::thread::spawn(|| {
-        run_server().unwrap();
-    });
+impl WasiHttpView for Ctx {
+    fn http_ctx(&self) -> &WasiHttpCtx {
+        &self.http
+    }
+    fn http_ctx_mut(&mut self) -> &mut WasiHttpCtx {
+        &mut self.http
+    }
+}
 
-    let module = get_module(name);
+async fn instantiate(
+    component: Component,
+    ctx: Ctx,
+) -> Result<(Store<Ctx>, Command), anyhow::Error> {
     let mut linker = Linker::new(&ENGINE);
+    add_to_linker(&mut linker)?;
+    wasmtime_wasi_http::add_to_component_linker(&mut linker)?;
 
-    struct Ctx {
-        wasi: WasiCtx,
-        http: WasiHttpCtx,
-    }
+    let mut store = Store::new(&ENGINE, ctx);
+
+    let (command, _instance) = Command::instantiate_async(&mut store, &component, &linker).await?;
+    Ok((store, command))
+}
+
+async fn run(name: &str) -> anyhow::Result<()> {
+    let _thread = Handle::current().spawn(async move {
+        async_run_serve()
+            .await
+            .map_err(|_| anyhow::anyhow!("error while running test server"))
+            .unwrap();
+    });
 
-    wasmtime_wasi::sync::add_to_linker(&mut linker, |cx: &mut Ctx| &mut cx.wasi)?;
-    wasmtime_wasi_http::add_to_linker(&mut linker, |cx: &mut Ctx| &mut cx.http)?;
+    let mut table = Table::new();
+    let component = get_component(name);
 
     // Create our wasi context.
-    let wasi = WasiCtxBuilder::new().inherit_stdio().arg(name)?.build();
-
-    let mut store = Store::new(
-        &ENGINE,
-        Ctx {
-            wasi,
-            http: WasiHttpCtx::new(),
-        },
-    );
-
-    let instance = linker.instantiate(&mut store, &module)?;
-    let start = instance.get_typed_func::<(), ()>(&mut store, "_start")?;
-    start.call(&mut store, ())
+    let http = WasiHttpCtx::new();
+    let wasi = WasiCtxBuilder::new()
+        .inherit_stdio()
+        .push_arg(name)
+        .build(&mut table)?;
+
+    let (mut store, command) = instantiate(component, Ctx { table, wasi, http }).await?;
+    command
+        .call_run(&mut store)
+        .await
+        .map_err(|e| anyhow::anyhow!("wasm failed with {e:?}"))?
+        .map_err(|e| anyhow::anyhow!("command returned with failing exit status {e:?}"))
 }
 
-#[test_log::test]
-fn outbound_request() {
-    run("outbound_request").unwrap()
+#[test_log::test(tokio::test(flavor = "multi_thread"))]
+async fn wasi_http_tests() {
+    run("wasi_http_tests").await.unwrap()
 }
diff --git a/crates/test-programs/wasi-http-tests/Cargo.toml b/crates/test-programs/wasi-http-tests/Cargo.toml
index a5b5a7893ede..da90a0094bc9 100644
--- a/crates/test-programs/wasi-http-tests/Cargo.toml
+++ b/crates/test-programs/wasi-http-tests/Cargo.toml
@@ -5,6 +5,9 @@ readme = "README.md"
 edition = "2021"
 publish = false
 
+[lib]
+crate-type = ["cdylib"]
+
 [dependencies]
 anyhow = { workspace = true }
-wit-bindgen = { workspace = true, default-features = false, features = ["macros"] }
+wit-bindgen = { workspace = true, features = ["macros", "realloc"] }
diff --git a/crates/test-programs/wasi-http-tests/src/lib.rs b/crates/test-programs/wasi-http-tests/src/lib.rs
index 7da3c0508914..0d065d613327 100644
--- a/crates/test-programs/wasi-http-tests/src/lib.rs
+++ b/crates/test-programs/wasi-http-tests/src/lib.rs
@@ -1,3 +1,13 @@
-// The macro will generate a macro for defining exports which we won't be reusing
-#![allow(unused)]
-wit_bindgen::generate!({ path: "../../wasi-http/wasi-http/wit" });
+mod outbound_request;
+
+wit_bindgen::generate!("wasi:preview/command-extended" in "../../wasi/wit");
+
+struct Component;
+
+impl CommandExtended for Component {
+    fn run() -> Result<(), ()> {
+        outbound_request::main().map_err(|e| eprintln!("{e:?}"))
+    }
+}
+
+export_command_extended!(Component);
diff --git a/crates/test-programs/wasi-http-tests/src/bin/outbound_request.rs b/crates/test-programs/wasi-http-tests/src/outbound_request.rs
similarity index 60%
rename from crates/test-programs/wasi-http-tests/src/bin/outbound_request.rs
rename to crates/test-programs/wasi-http-tests/src/outbound_request.rs
index 7987c0dada23..72ab49de091b 100644
--- a/crates/test-programs/wasi-http-tests/src/bin/outbound_request.rs
+++ b/crates/test-programs/wasi-http-tests/src/outbound_request.rs
@@ -1,9 +1,11 @@
 use anyhow::{anyhow, Context, Result};
 use std::fmt;
-use wasi_http_tests::*;
+
+use crate::wasi::http::{outgoing_handler, types as http_types};
+use crate::wasi::io::streams;
 
 struct Response {
-    status: wasi::http::types::StatusCode,
+    status: http_types::StatusCode,
     headers: Vec<(String, Vec<u8>)>,
     body: Vec<u8>,
 }
@@ -30,18 +32,18 @@ impl Response {
 }
 
 fn request(
-    method: wasi::http::types::Method,
-    scheme: wasi::http::types::Scheme,
+    method: http_types::Method,
+    scheme: http_types::Scheme,
     authority: &str,
     path_with_query: &str,
-    body: &[u8],
+    body: Option<&[u8]>,
 ) -> Result<Response> {
-    let headers = wasi::http::types::new_fields(&[
+    let headers = crate::wasi::http::types::new_fields(&[
         ("User-agent".to_string(), "WASI-HTTP/0.0.1".to_string()),
         ("Content-type".to_string(), "application/json".to_string()),
     ]);
 
-    let request = wasi::http::types::new_outgoing_request(
+    let request = http_types::new_outgoing_request(
         &method,
         Some(&path_with_query),
         Some(&scheme),
@@ -49,19 +51,21 @@ fn request(
         headers,
     );
 
-    let request_body = wasi::http::types::outgoing_request_write(request)
+    let request_body = http_types::outgoing_request_write(request)
         .map_err(|_| anyhow!("outgoing request write failed"))?;
 
-    let mut body_cursor = 0;
-    while body_cursor < body.len() {
-        let written = wasi::io::streams::write(request_body, &body[body_cursor..])
-            .context("writing request body")?;
-        body_cursor += written as usize;
+    if let Some(body) = body {
+        let mut body_cursor = 0;
+        while body_cursor < body.len() {
+            let (written, _) = streams::write(request_body, &body[body_cursor..])
+                .context("writing request body")?;
+            body_cursor += written as usize;
+        }
     }
 
-    let future_response = wasi::http::outgoing_handler::handle(request, None);
+    let future_response = outgoing_handler::handle(request, None);
 
-    let incoming_response = wasi::http::types::future_incoming_response_get(future_response)
+    let incoming_response = http_types::future_incoming_response_get(future_response)
         .ok_or_else(|| anyhow!("incoming response is available immediately"))?
         // TODO: maybe anything that appears in the Result<_, E> position should impl
         // Error? anyway, just use its Debug here:
@@ -70,33 +74,38 @@ fn request(
     // TODO: The current implementation requires this drop after the request is sent.
     // The ownership semantics are unclear in wasi-http we should clarify exactly what is
     // supposed to happen here.
-    wasi::io::streams::drop_output_stream(request_body);
+    streams::drop_output_stream(request_body);
 
     // TODO: we could create a pollable from the future_response and poll on it here to test that
     // its available immediately
 
-    wasi::http::types::drop_outgoing_request(request);
+    http_types::drop_outgoing_request(request);
 
-    wasi::http::types::drop_future_incoming_response(future_response);
+    http_types::drop_future_incoming_response(future_response);
 
-    let status = wasi::http::types::incoming_response_status(incoming_response);
+    let status = http_types::incoming_response_status(incoming_response);
 
-    let headers_handle = wasi::http::types::incoming_response_headers(incoming_response);
-    let headers = wasi::http::types::fields_entries(headers_handle);
-    wasi::http::types::drop_fields(headers_handle);
+    let headers_handle = http_types::incoming_response_headers(incoming_response);
+    let headers = http_types::fields_entries(headers_handle);
+    http_types::drop_fields(headers_handle);
 
-    let body_stream = wasi::http::types::incoming_response_consume(incoming_response)
+    let body_stream = http_types::incoming_response_consume(incoming_response)
         .map_err(|()| anyhow!("incoming response has no body stream"))?;
 
     let mut body = Vec::new();
-    let mut eof = false;
-    while !eof {
-        let (mut body_chunk, stream_ended) = wasi::io::streams::read(body_stream, u64::MAX)?;
-        eof = stream_ended;
+    let mut eof = streams::StreamStatus::Open;
+    while eof != streams::StreamStatus::Ended {
+        let (mut body_chunk, stream_status) = streams::read(body_stream, u64::MAX)?;
+        eof = if body_chunk.len() == 0 {
+            streams::StreamStatus::Ended
+        } else {
+            stream_status
+        };
         body.append(&mut body_chunk);
     }
-    wasi::io::streams::drop_input_stream(body_stream);
-    wasi::http::types::drop_incoming_response(incoming_response);
+
+    streams::drop_input_stream(body_stream);
+    http_types::drop_incoming_response(incoming_response);
 
     Ok(Response {
         status,
@@ -105,13 +114,13 @@ fn request(
     })
 }
 
-fn main() -> Result<()> {
+pub fn main() -> Result<()> {
     let r1 = request(
-        wasi::http::types::Method::Get,
-        wasi::http::types::Scheme::Http,
+        http_types::Method::Get,
+        http_types::Scheme::Http,
         "localhost:3000",
-        "/get?some=arg?goes=here",
-        &[],
+        "/get?some=arg&goes=here",
+        None,
     )
     .context("localhost:3000 /get")?;
 
@@ -122,16 +131,16 @@ fn main() -> Result<()> {
     let uri = r1.header("x-wasmtime-test-uri").unwrap();
     assert_eq!(
         std::str::from_utf8(uri).unwrap(),
-        "http://localhost:3000/get?some=arg?goes=here"
+        "http://localhost:3000/get?some=arg&goes=here"
     );
     assert_eq!(r1.body, b"");
 
     let r2 = request(
-        wasi::http::types::Method::Post,
-        wasi::http::types::Scheme::Http,
+        http_types::Method::Post,
+        http_types::Scheme::Http,
         "localhost:3000",
         "/post",
-        b"{\"foo\": \"bar\"}",
+        Some(b"{\"foo\": \"bar\"}"),
     )
     .context("localhost:3000 /post")?;
 
@@ -142,11 +151,11 @@ fn main() -> Result<()> {
     assert_eq!(r2.body, b"{\"foo\": \"bar\"}");
 
     let r3 = request(
-        wasi::http::types::Method::Put,
-        wasi::http::types::Scheme::Http,
+        http_types::Method::Put,
+        http_types::Scheme::Http,
         "localhost:3000",
         "/put",
-        &[],
+        Some(&[]),
     )
     .context("localhost:3000 /put")?;
 
@@ -157,11 +166,11 @@ fn main() -> Result<()> {
     assert_eq!(r3.body, b"");
 
     let r4 = request(
-        wasi::http::types::Method::Other("OTHER".to_owned()),
-        wasi::http::types::Scheme::Http,
+        http_types::Method::Other("OTHER".to_owned()),
+        http_types::Scheme::Http,
         "localhost:3000",
         "/",
-        &[],
+        None,
     );
 
     let error = r4.unwrap_err();
@@ -171,11 +180,11 @@ fn main() -> Result<()> {
     );
 
     let r5 = request(
-        wasi::http::types::Method::Get,
-        wasi::http::types::Scheme::Other("WS".to_owned()),
+        http_types::Method::Get,
+        http_types::Scheme::Other("WS".to_owned()),
         "localhost:3000",
         "/",
-        &[],
+        None,
     );
 
     let error = r5.unwrap_err();
diff --git a/crates/wasi-http/Cargo.toml b/crates/wasi-http/Cargo.toml
index a99f9a32e491..ccacfb482479 100644
--- a/crates/wasi-http/Cargo.toml
+++ b/crates/wasi-http/Cargo.toml
@@ -9,13 +9,22 @@ description = "Experimental HTTP library for WebAssembly in Wasmtime"
 
 [dependencies]
 anyhow = { workspace = true }
+async-trait = { workspace = true }
 bytes = { workspace = true }
+futures = { workspace = true, default-features = false, features = [
+    "executor",
+] }
 hyper = { version = "=1.0.0-rc.3", features = ["full"] }
-tokio = { version = "1", default-features = false, features = ["net", "rt-multi-thread", "time"] }
+tokio = { version = "1", default-features = false, features = [
+    "net",
+    "rt-multi-thread",
+    "time",
+] }
 http = { version = "0.2.9" }
 http-body = "1.0.0-rc.2"
 http-body-util = "0.1.0-rc.2"
 thiserror = { workspace = true }
+wasmtime-wasi = { workspace = true }
 wasmtime = { workspace = true, features = ['component-model'] }
 
 # The `ring` crate, used to implement TLS, does not build on riscv64 or s390x
diff --git a/crates/wasi-http/src/bytestream copy.rs b/crates/wasi-http/src/bytestream copy.rs
deleted file mode 100644
index 0ec6dd0ee0e6..000000000000
--- a/crates/wasi-http/src/bytestream copy.rs	
+++ /dev/null
@@ -1,213 +0,0 @@
-use bytes::{Buf, BufMut, Bytes, BytesMut};
-use std::any::Any;
-use std::ops::{Deref, DerefMut};
-use std::vec::Vec;
-use wasmtime_wasi::preview2::{
-    pipe::{AsyncReadStream, AsyncWriteStream},
-    HostInputStream, HostOutputStream, StreamState,
-};
-
-const MAX_BUF_SIZE: usize = 65_536;
-
-pub struct ByteStream {
-    // inner: BytesMut,
-    reader: AsyncReadStream,
-    writer: AsyncWriteStream,
-}
-
-// pub trait HostInputOutputStream: HostInputStream + HostOutputStream {
-//     fn as_any(&self) -> &dyn Any;
-//     fn as_boxed_any(self) -> Box<dyn Any + Send + Sync + 'static>
-//     where
-//         Self: Sized + 'static;
-//     // fn as_input(self) -> Box<dyn HostInputStream>;
-//     // fn as_output(self) -> Box<dyn HostOutputStream>;
-// }
-
-impl ByteStream {
-    pub fn new() -> Self {
-        let (read_stream, write_stream) = tokio::io::duplex(MAX_BUF_SIZE);
-        // let (_read_half, write_half) = tokio::io::split(a);
-        // let (read_half, _write_half) = tokio::io::split(b);
-        Self {
-            reader: AsyncReadStream::new(read_stream),
-            writer: AsyncWriteStream::new(write_stream),
-        }
-        // Self {
-        //     inner: BytesMut::new(),
-        // }
-    }
-
-    pub(crate) fn reader(mut self) -> impl HostInputStream {
-        self.reader
-    }
-
-    pub(crate) fn writer(mut self) -> impl HostOutputStream {
-        self.writer
-    }
-}
-
-// impl HostInputOutputStream for ByteStream {
-//     fn as_any(&self) -> &dyn Any
-// // where
-//     //     Self: Sized + 'static,
-//     {
-//         self
-//     }
-
-//     fn as_boxed_any(self) -> Box<dyn Any + Send + Sync + 'static>
-//     where
-//         Self: Sized + 'static,
-//     {
-//         Box::new(self)
-//     }
-
-//     // fn as_input(self) -> Box<dyn HostInputStream + 'static> {
-//     //     Box::new(
-//     //         self.as_boxed_any()
-//     //             .downcast::<dyn HostInputStream + 'static>()
-//     //             .unwrap()
-//     //             .to_owned(),
-//     //     )
-//     // }
-
-//     // fn as_output(self) -> Box<dyn HostOutputStream> {
-//     //     Box::new(
-//     //         self.as_any()
-//     //             .downcast_ref::<dyn HostOutputStream>()
-//     //             .unwrap()
-//     //             .to_owned(),
-//     //     )
-//     // }
-// }
-
-#[async_trait::async_trait]
-impl HostInputStream for ByteStream {
-    fn read(&mut self, size: usize) -> Result<(Bytes, StreamState), anyhow::Error> {
-        println!("read input {}", size);
-        self.reader.read(size)
-        // let mut s = &mut self.inner; //BytesMut::from(self.inner.as_ref());
-        // let mut bytes = BytesMut::with_capacity(size);
-        // if size == 0 || s.len() == 0 {
-        //     println!("read input 1");
-        //     Ok((Bytes::new(), StreamState::Closed))
-        // } else if s.len() > size {
-        //     println!("read input 2");
-        //     s.advance(size);
-        //     bytes.copy_from_slice(&s);
-        //     Ok((bytes.into(), StreamState::Closed))
-        // } else {
-        //     println!("read input 3");
-        //     bytes[..s.len()].copy_from_slice(&s);
-        //     Ok((bytes.into(), StreamState::Open))
-        // }
-    }
-
-    fn skip(&mut self, nelem: usize) -> Result<(usize, StreamState), anyhow::Error> {
-        self.reader.skip(nelem)
-    }
-
-    async fn ready(&mut self) -> Result<(), anyhow::Error> {
-        self.reader.ready().await
-        // Ok(())
-    }
-}
-
-#[async_trait::async_trait]
-impl HostOutputStream for ByteStream {
-    fn write(&mut self, bytes: Bytes) -> Result<(usize, StreamState), anyhow::Error> {
-        println!("write input {}", bytes.len());
-        self.writer.write(bytes)
-
-        // let data = &self.inner;
-        // let size = bytes.len();
-        // let len = data.len() + size;
-        // if len > 0 {
-        //     let mut new = BytesMut::with_capacity(len);
-        //     new.put(Bytes::from(data.clone()));
-        //     new.put(bytes);
-        //     self.inner = new.freeze().into();
-        // }
-        // Ok((size, StreamState::Open))
-        // let mut buf = &mut self.inner; //BytesMut::from(self.inner.as_ref());
-        // buf.extend_from_slice(bytes.as_ref());
-        // Ok((bytes.len(), StreamState::Open))
-    }
-
-    fn splice(
-        &mut self,
-        src: &mut dyn HostInputStream,
-        nelem: usize,
-    ) -> Result<(usize, StreamState), anyhow::Error> {
-        self.writer.splice(src, nelem)
-    }
-
-    fn write_zeroes(&mut self, nelem: usize) -> Result<(usize, StreamState), anyhow::Error> {
-        self.writer.write_zeroes(nelem)
-    }
-
-    async fn ready(&mut self) -> Result<(), anyhow::Error> {
-        self.writer.ready().await
-        // Ok(())
-    }
-}
-
-// impl Into<Box<dyn HostInputStream>> for dyn HostInputOutputStream {
-//     fn into(self) -> Box<dyn HostInputStream>
-//     where
-//         Self: Sized + 'static,
-//     {
-//         (Box::new(self) as Box<dyn Any>)
-//             .downcast::<dyn HostInputStream>()
-//             .unwrap()
-//     }
-// }
-
-// impl From<Bytes> for ByteStream {
-//     fn from(buf: Bytes) -> ByteStream {
-//         ByteStream {
-//             inner: buf,
-//             is_readable: true,
-//             is_writable: true,
-//         }
-//     }
-// }
-
-// impl Into<Bytes> for ByteStream {
-//     fn into(self) -> Bytes {
-//         let mut stream = BytesMut::new();
-//         // let mut reader = &mut self.reader;
-//         // let mut eof = StreamState::Open;
-//         // while eof != StreamState::Closed {
-//         //     let (mut body_chunk, stream_status) = reader.read(u64::MAX as usize).unwrap();
-//         //     eof = stream_status;
-//         //     stream.extend_from_slice(&body_chunk[..]);
-//         // }
-//         stream.freeze()
-//         // self.inner
-//     }
-// }
-
-impl From<Vec<u8>> for ByteStream {
-    fn from(vec: Vec<u8>) -> ByteStream {
-        let mut stream: ByteStream = ByteStream::new();
-        stream.writer.write(Bytes::from(vec)).unwrap();
-        stream
-        // ByteStream {
-        //     inner: BytesMut::from(Bytes::from(vec).as_ref()),
-        // }
-    }
-}
-
-// impl Deref for ByteStream {
-//     type Target = Bytes;
-//     fn deref(&self) -> &Bytes {
-//         &self.inner
-//     }
-// }
-
-// impl DerefMut for ByteStream {
-//     fn deref_mut(&mut self) -> &mut Bytes {
-//         &mut self.inner
-//     }
-// }
diff --git a/crates/wasi-http/src/bytestream.rs b/crates/wasi-http/src/bytestream.rs
deleted file mode 100644
index ba0819695527..000000000000
--- a/crates/wasi-http/src/bytestream.rs
+++ /dev/null
@@ -1,166 +0,0 @@
-use crate::common::{Error, ErrorExt, InputStream, OutputStream};
-use bytes::{Buf, BufMut, Bytes, BytesMut};
-use std::any::Any;
-use std::ops::{Deref, DerefMut};
-use std::vec::Vec;
-
-#[derive(Clone, Debug)]
-pub struct ByteStream {
-    inner: Bytes,
-    is_readable: bool,
-    is_writable: bool,
-}
-
-impl ByteStream {
-    pub fn new() -> Self {
-        Self {
-            inner: Bytes::new(),
-            is_readable: true,
-            is_writable: true,
-        }
-    }
-
-    pub fn new_readable() -> Self {
-        Self {
-            inner: Bytes::new(),
-            is_readable: true,
-            is_writable: false,
-        }
-    }
-
-    pub fn new_writable() -> Self {
-        Self {
-            inner: Bytes::new(),
-            is_readable: false,
-            is_writable: true,
-        }
-    }
-}
-
-impl InputStream for ByteStream {
-    fn as_any(&self) -> &dyn Any {
-        self
-    }
-
-    fn read(&mut self, buf: &mut [u8]) -> Result<(u64, bool), Error> {
-        let len = buf.len();
-        let mut s = BytesMut::from(self.inner.as_ref());
-        let size = s.len();
-        if len == 0 || size == 0 {
-            Ok((0, true))
-        } else if size > len {
-            s.advance(len);
-            buf.copy_from_slice(&s);
-            Ok((len.try_into()?, false))
-        } else {
-            buf[..size].copy_from_slice(&s);
-            Ok((size.try_into()?, true))
-        }
-    }
-
-    fn readable(&self) -> Result<(), Error> {
-        if self.is_readable {
-            Ok(())
-        } else {
-            Err(self::Error::badf().context("stream is not readable"))
-        }
-    }
-
-    fn writable(&self) -> Result<(), Error> {
-        if self.is_writable {
-            Ok(())
-        } else {
-            Err(self::Error::badf().context("stream is not writable"))
-        }
-    }
-}
-
-impl OutputStream for ByteStream {
-    fn as_any(&self) -> &dyn Any {
-        self
-    }
-
-    fn read(&mut self, buf: &mut [u8]) -> Result<(u64, bool), Error> {
-        let len = buf.len();
-        let mut s = BytesMut::from(self.inner.as_ref());
-        let size = s.len();
-        if len == 0 || size == 0 {
-            Ok((0, true))
-        } else if size > len {
-            s.advance(len);
-            buf.copy_from_slice(&s);
-            Ok((len.try_into()?, false))
-        } else {
-            buf[..size].copy_from_slice(&s);
-            Ok((size.try_into()?, true))
-        }
-    }
-
-    fn write(&mut self, buf: &[u8]) -> Result<u64, Error> {
-        let data = &self.inner;
-        let buf_len = buf.len();
-        let len = data.len() + buf_len;
-        if len > 0 {
-            let mut new = BytesMut::with_capacity(len);
-            new.put(Bytes::from(data.clone()));
-            new.put(buf);
-            self.inner = new.freeze().into();
-        }
-        Ok(buf_len.try_into()?)
-    }
-
-    fn readable(&self) -> Result<(), Error> {
-        if self.is_readable {
-            Ok(())
-        } else {
-            Err(self::Error::badf().context("stream is not readable"))
-        }
-    }
-
-    fn writable(&self) -> Result<(), Error> {
-        if self.is_writable {
-            Ok(())
-        } else {
-            Err(self::Error::badf().context("stream is not writable"))
-        }
-    }
-}
-
-impl From<Bytes> for ByteStream {
-    fn from(buf: Bytes) -> ByteStream {
-        ByteStream {
-            inner: buf,
-            is_readable: true,
-            is_writable: true,
-        }
-    }
-}
-
-impl Into<Bytes> for ByteStream {
-    fn into(self) -> Bytes {
-        self.inner
-    }
-}
-
-impl From<Vec<u8>> for ByteStream {
-    fn from(vec: Vec<u8>) -> ByteStream {
-        ByteStream {
-            inner: Bytes::from(vec),
-            is_readable: true,
-            is_writable: true,
-        }
-    }
-}
-
-impl Deref for ByteStream {
-    type Target = Bytes;
-    fn deref(&self) -> &Bytes {
-        &self.inner
-    }
-}
-
-impl DerefMut for ByteStream {
-    fn deref_mut(&mut self) -> &mut Bytes {
-        &mut self.inner
-    }
-}
diff --git a/crates/wasi-http/src/common/error.rs b/crates/wasi-http/src/common/error.rs
deleted file mode 100644
index 044ed425d179..000000000000
--- a/crates/wasi-http/src/common/error.rs
+++ /dev/null
@@ -1,140 +0,0 @@
-// Based on:
-// https://github.com/bytecodealliance/preview2-prototyping/blob/083879cb955d7cc719eb7fa1b59c6096fcc97bbf/wasi-common/src/error.rs
-
-//! wasi-common uses an [`Error`] type which represents either a preview 1 [`Errno`] enum, on
-//! [`anyhow::Error`] for trapping execution.
-//!
-//! The user can construct an [`Error`] out of an [`Errno`] using the `From`/`Into` traits.
-//! They may also use [`Error::trap`] to construct an error that traps execution. The contents
-//! can be inspected with [`Error::downcast`] and [`Error::downcast_ref`]. Additional context
-//! can be provided with the [`Error::context`] method. This context is only observable with the
-//! `Display` and `Debug` impls of the error.
-
-use std::fmt;
-
-/// An error returned from the `proc_exit` host syscall.
-///
-/// Embedders can test if an error returned from wasm is this error, in which
-/// case it may signal a non-fatal trap.
-#[derive(Debug)]
-pub struct I32Exit(pub i32);
-
-impl fmt::Display for I32Exit {
-    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
-        write!(f, "Exited with i32 exit status {}", self.0)
-    }
-}
-
-impl std::error::Error for I32Exit {}
-
-#[derive(Clone, Copy, Debug, PartialEq, Eq)]
-pub enum Errno {
-    Success,
-    Badf,
-    Exist,
-    Inval,
-    Noent,
-    Overflow,
-    Perm,
-}
-
-impl std::fmt::Display for Errno {
-    fn fmt(&self, f: &mut std::fmt::Formatter<'_>) -> std::fmt::Result {
-        <Self as std::fmt::Debug>::fmt(self, f)
-    }
-}
-
-impl std::error::Error for Errno {}
-
-#[derive(Debug)]
-pub struct Error {
-    inner: anyhow::Error,
-}
-
-impl std::fmt::Display for Error {
-    fn fmt(&self, f: &mut std::fmt::Formatter<'_>) -> std::fmt::Result {
-        self.inner.fmt(f)
-    }
-}
-
-impl std::error::Error for Error {
-    fn source(&self) -> Option<&(dyn std::error::Error + 'static)> {
-        self.inner.source()
-    }
-}
-
-impl Error {
-    pub fn trap(inner: anyhow::Error) -> Error {
-        Self { inner }
-    }
-    pub fn into(self) -> anyhow::Error {
-        self.inner
-    }
-    pub fn downcast(self) -> Result<Errno, anyhow::Error> {
-        self.inner.downcast()
-    }
-    pub fn downcast_ref(&self) -> Option<&Errno> {
-        self.inner.downcast_ref()
-    }
-    pub fn context(self, s: impl Into<String>) -> Self {
-        Self {
-            inner: self.inner.context(s.into()),
-        }
-    }
-}
-
-impl From<Errno> for Error {
-    fn from(abi: Errno) -> Error {
-        Error {
-            inner: anyhow::Error::from(abi),
-        }
-    }
-}
-
-pub trait ErrorExt {
-    fn not_found() -> Self;
-    fn badf() -> Self;
-    fn exist() -> Self;
-    fn invalid_argument() -> Self;
-    fn overflow() -> Self;
-    fn perm() -> Self;
-}
-
-impl ErrorExt for Error {
-    fn not_found() -> Self {
-        Errno::Noent.into()
-    }
-    fn badf() -> Self {
-        Errno::Badf.into()
-    }
-    fn exist() -> Self {
-        Errno::Exist.into()
-    }
-    fn invalid_argument() -> Self {
-        Errno::Inval.into()
-    }
-    fn overflow() -> Self {
-        Errno::Overflow.into()
-    }
-    fn perm() -> Self {
-        Errno::Perm.into()
-    }
-}
-
-impl From<std::io::Error> for Error {
-    fn from(err: std::io::Error) -> Error {
-        match err.kind() {
-            std::io::ErrorKind::NotFound => Errno::Noent.into(),
-            std::io::ErrorKind::PermissionDenied => Errno::Perm.into(),
-            std::io::ErrorKind::AlreadyExists => Errno::Exist.into(),
-            std::io::ErrorKind::InvalidInput => Errno::Inval.into(),
-            _ => Error::trap(anyhow::anyhow!(err).context("Unknown OS error")),
-        }
-    }
-}
-
-impl From<std::num::TryFromIntError> for Error {
-    fn from(_err: std::num::TryFromIntError) -> Error {
-        Errno::Overflow.into()
-    }
-}
diff --git a/crates/wasi-http/src/common/mod.rs b/crates/wasi-http/src/common/mod.rs
deleted file mode 100644
index 79e5915c2cd7..000000000000
--- a/crates/wasi-http/src/common/mod.rs
+++ /dev/null
@@ -1,7 +0,0 @@
-pub mod error;
-pub mod stream;
-pub mod table;
-
-pub use error::{Errno, Error, ErrorExt, I32Exit};
-pub use stream::{InputStream, OutputStream};
-pub use table::Table;
diff --git a/crates/wasi-http/src/common/stream.rs b/crates/wasi-http/src/common/stream.rs
deleted file mode 100644
index 3562ce868f19..000000000000
--- a/crates/wasi-http/src/common/stream.rs
+++ /dev/null
@@ -1,188 +0,0 @@
-use super::{Error, ErrorExt};
-use bytes::Bytes;
-use std::any::Any;
-
-/// An input bytestream.
-///
-/// This is "pseudo" because the real streams will be a type in wit, and
-/// built into the wit bindings, and will support async and type parameters.
-/// This pseudo-stream abstraction is synchronous and only supports bytes.
-pub trait InputStream: Send + Sync {
-    fn as_any(&self) -> &dyn Any;
-
-    /// Read bytes. On success, returns a pair holding the number of bytes read
-    /// and a flag indicating whether the end of the stream was reached.
-    fn read(&mut self, _buf: &mut [u8]) -> Result<(u64, bool), Error> {
-        Err(Error::badf())
-    }
-
-    /// Vectored-I/O form of `read`.
-    fn read_vectored<'a>(
-        &mut self,
-        _bufs: &mut [std::io::IoSliceMut<'a>],
-    ) -> Result<(u64, bool), Error> {
-        Err(Error::badf())
-    }
-
-    /// Test whether vectored I/O reads are known to be optimized in the
-    /// underlying implementation.
-    fn is_read_vectored(&self) -> bool {
-        false
-    }
-
-    /// Read bytes from a stream and discard them.
-    fn skip(&mut self, nelem: u64) -> Result<(u64, bool), Error> {
-        let mut nread = 0;
-        let mut saw_end = false;
-
-        // TODO: Optimize by reading more than one byte at a time.
-        for _ in 0..nelem {
-            let (num, end) = self.read(&mut [0])?;
-            nread += num;
-            if end {
-                saw_end = true;
-                break;
-            }
-        }
-
-        Ok((nread, saw_end))
-    }
-
-    /// Return the number of bytes that may be read without blocking.
-    fn num_ready_bytes(&self) -> Result<u64, Error> {
-        Ok(0)
-    }
-
-    /// Test whether this stream is readable.
-    fn readable(&self) -> Result<(), Error>;
-
-    /// Test whether this stream is writeable.
-    fn writable(&self) -> Result<(), Error>;
-}
-
-/// An output bytestream.
-///
-/// This is "pseudo" because the real streams will be a type in wit, and
-/// built into the wit bindings, and will support async and type parameters.
-/// This pseudo-stream abstraction is synchronous and only supports bytes.
-pub trait OutputStream: Send + Sync {
-    fn as_any(&self) -> &dyn Any;
-
-    /// Write bytes. On success, returns the number of bytes written.
-    fn write(&mut self, _buf: &[u8]) -> Result<u64, Error> {
-        Err(Error::badf())
-    }
-
-    /// Vectored-I/O form of `write`.
-    fn write_vectored<'a>(&mut self, _bufs: &[std::io::IoSlice<'a>]) -> Result<u64, Error> {
-        Err(Error::badf())
-    }
-
-    /// Test whether vectored I/O writes are known to be optimized in the
-    /// underlying implementation.
-    fn is_write_vectored(&self) -> bool {
-        false
-    }
-
-    /// Read bytes. On success, returns a pair holding the number of bytes read
-    /// and a flag indicating whether the end of the stream was reached.
-    fn read(&mut self, _buf: &mut [u8]) -> Result<(u64, bool), Error> {
-        Err(Error::badf())
-    }
-
-    /// Transfer bytes directly from an input stream to an output stream.
-    fn splice(&mut self, src: &mut dyn InputStream, nelem: u64) -> Result<(u64, bool), Error> {
-        let mut nspliced = 0;
-        let mut saw_end = false;
-
-        // TODO: Optimize by splicing more than one byte at a time.
-        for _ in 0..nelem {
-            let mut buf = [0u8];
-            let (num, end) = src.read(&mut buf)?;
-            self.write(&buf)?;
-            nspliced += num;
-            if end {
-                saw_end = true;
-                break;
-            }
-        }
-
-        Ok((nspliced, saw_end))
-    }
-
-    /// Repeatedly write a byte to a stream.
-    fn write_zeroes(&mut self, nelem: u64) -> Result<u64, Error> {
-        let mut nwritten = 0;
-
-        // TODO: Optimize by writing more than one byte at a time.
-        for _ in 0..nelem {
-            let num = self.write(&[0])?;
-            if num == 0 {
-                break;
-            }
-            nwritten += num;
-        }
-
-        Ok(nwritten)
-    }
-
-    /// Test whether this stream is readable.
-    fn readable(&self) -> Result<(), Error>;
-
-    /// Test whether this stream is writeable.
-    fn writable(&self) -> Result<(), Error>;
-}
-
-impl TryInto<Bytes> for &mut Box<dyn OutputStream> {
-    type Error = Error;
-
-    fn try_into(self) -> Result<Bytes, Self::Error> {
-        self.readable()?;
-        let mut buffer = Vec::new();
-        let mut eof = false;
-        while !eof {
-            let buffer_len = 0x400000;
-            let mut vec_buffer = vec![0; buffer_len];
-
-            let (bytes_read, end) = self.read(&mut vec_buffer)?;
-
-            let bytes_read = bytes_read as usize;
-            vec_buffer.truncate(bytes_read);
-
-            eof = end;
-            buffer.append(&mut vec_buffer);
-        }
-        Ok(Bytes::from(buffer))
-    }
-}
-
-pub trait TableStreamExt {
-    fn get_input_stream(&self, fd: u32) -> Result<&dyn InputStream, Error>;
-    fn get_input_stream_mut(&mut self, fd: u32) -> Result<&mut Box<dyn InputStream>, Error>;
-    fn delete_input_stream(&mut self, fd: u32) -> Result<(), Error>;
-
-    fn get_output_stream(&self, fd: u32) -> Result<&dyn OutputStream, Error>;
-    fn get_output_stream_mut(&mut self, fd: u32) -> Result<&mut Box<dyn OutputStream>, Error>;
-    fn delete_output_stream(&mut self, fd: u32) -> Result<(), Error>;
-}
-impl TableStreamExt for super::Table {
-    fn get_input_stream(&self, fd: u32) -> Result<&dyn InputStream, Error> {
-        self.get::<Box<dyn InputStream>>(fd).map(|f| f.as_ref())
-    }
-    fn get_input_stream_mut(&mut self, fd: u32) -> Result<&mut Box<dyn InputStream>, Error> {
-        self.get_mut::<Box<dyn InputStream>>(fd)
-    }
-    fn delete_input_stream(&mut self, fd: u32) -> Result<(), Error> {
-        self.delete::<Box<dyn InputStream>>(fd).map(|_old| ())
-    }
-
-    fn get_output_stream(&self, fd: u32) -> Result<&dyn OutputStream, Error> {
-        self.get::<Box<dyn OutputStream>>(fd).map(|f| f.as_ref())
-    }
-    fn get_output_stream_mut(&mut self, fd: u32) -> Result<&mut Box<dyn OutputStream>, Error> {
-        self.get_mut::<Box<dyn OutputStream>>(fd)
-    }
-    fn delete_output_stream(&mut self, fd: u32) -> Result<(), Error> {
-        self.delete::<Box<dyn OutputStream>>(fd).map(|_old| ())
-    }
-}
diff --git a/crates/wasi-http/src/common/table.rs b/crates/wasi-http/src/common/table.rs
deleted file mode 100644
index 5269f3d1611c..000000000000
--- a/crates/wasi-http/src/common/table.rs
+++ /dev/null
@@ -1,114 +0,0 @@
-// Based on:
-// https://github.com/bytecodealliance/preview2-prototyping/blob/083879cb955d7cc719eb7fa1b59c6096fcc97bbf/wasi-common/src/table.rs
-
-use super::{Error, ErrorExt};
-use std::any::Any;
-use std::collections::HashMap;
-
-/// The `Table` type is designed to map u32 handles to resources. The table is now part of the
-/// public interface to a `WasiCtx` - it is reference counted so that it can be shared beyond a
-/// `WasiCtx` with other WASI proposals (e.g. `wasi-crypto` and `wasi-nn`) to manage their
-/// resources. Elements in the `Table` are `Any` typed.
-///
-/// The `Table` type is intended to model how the Interface Types concept of Resources is shaping
-/// up. Right now it is just an approximation.
-#[derive(Debug)]
-pub struct Table {
-    map: HashMap<u32, Box<dyn Any + Send + Sync>>,
-    next_key: u32,
-}
-
-impl Table {
-    /// Create an empty table. New insertions will begin at 3, above stdio.
-    pub fn new() -> Self {
-        Table {
-            map: HashMap::new(),
-            next_key: 3, // 0, 1 and 2 are reserved for stdio
-        }
-    }
-
-    /// Insert a resource at a certain index.
-    pub fn insert_at(&mut self, key: u32, a: Box<dyn Any + Send + Sync>) {
-        self.map.insert(key, a);
-    }
-
-    /// Insert a resource at the next available index.
-    pub fn push(&mut self, a: Box<dyn Any + Send + Sync>) -> Result<u32, Error> {
-        // NOTE: The performance of this new key calculation could be very bad once keys wrap
-        // around.
-        if self.map.len() == u32::MAX as usize {
-            return Err(Error::trap(anyhow::Error::msg("table has no free keys")));
-        }
-        loop {
-            let key = self.next_key;
-            self.next_key = self.next_key.wrapping_add(1);
-            if self.map.contains_key(&key) {
-                continue;
-            }
-            self.map.insert(key, a);
-            return Ok(key);
-        }
-    }
-
-    /// Check if the table has a resource at the given index.
-    pub fn contains_key(&self, key: u32) -> bool {
-        self.map.contains_key(&key)
-    }
-
-    /// Check if the resource at a given index can be downcast to a given type.
-    /// Note: this will always fail if the resource is already borrowed.
-    pub fn is<T: Any + Sized>(&self, key: u32) -> bool {
-        if let Some(r) = self.map.get(&key) {
-            r.is::<T>()
-        } else {
-            false
-        }
-    }
-
-    /// Get an immutable reference to a resource of a given type at a given index. Multiple
-    /// immutable references can be borrowed at any given time. Borrow failure
-    /// results in a trapping error.
-    pub fn get<T: Any + Sized>(&self, key: u32) -> Result<&T, Error> {
-        if let Some(r) = self.map.get(&key) {
-            r.downcast_ref::<T>()
-                .ok_or_else(|| Error::badf().context("element is a different type"))
-        } else {
-            Err(Error::badf().context("key not in table"))
-        }
-    }
-
-    /// Get a mutable reference to a resource of a given type at a given index. Only one mutable
-    /// reference can be borrowed at any given time. Borrow failure results in a trapping error.
-    pub fn get_mut<T: Any + Sized>(&mut self, key: u32) -> Result<&mut T, Error> {
-        if let Some(r) = self.map.get_mut(&key) {
-            r.downcast_mut::<T>()
-                .ok_or_else(|| Error::badf().context("element is a different type"))
-        } else {
-            Err(Error::badf().context("key not in table"))
-        }
-    }
-
-    /// Remove a resource at a given index from the table. Returns the resource
-    /// if it was present.
-    pub fn delete<T: Any + Sized>(&mut self, key: u32) -> Result<Option<T>, Error> {
-        self.map
-            .remove(&key)
-            .map(|r| {
-                r.downcast::<T>()
-                    .map(|r| *r)
-                    .map_err(|_| Error::badf().context("element is a different type"))
-            })
-            .transpose()
-    }
-
-    /// List immutable reference of resources of a given type.
-    pub fn list<T: Any + Sized>(&self) -> HashMap<u32, &T> {
-        let mut result: HashMap<u32, &T> = HashMap::new();
-        for (key, value) in self.map.iter() {
-            if let Some(r) = value.downcast_ref::<T>() {
-                result.insert(*key, r);
-            }
-        }
-        result
-    }
-}
diff --git a/crates/wasi-http/src/component_impl.rs b/crates/wasi-http/src/component_impl.rs
index 19593c18b6fe..45948d9d688c 100644
--- a/crates/wasi-http/src/component_impl.rs
+++ b/crates/wasi-http/src/component_impl.rs
@@ -1,7 +1,5 @@
-use crate::wasi::http::outgoing_handler::Host;
-use crate::wasi::http::types::{Error, Host as TypesHost, Method, RequestOptions, Scheme};
-use crate::wasi::io::streams::Host as StreamsHost;
-pub use crate::WasiHttpCtx;
+use crate::wasi::http::types::{Error, Method, RequestOptions, Scheme};
+use crate::{WasiHttpView, WasiHttpViewExt};
 use anyhow::anyhow;
 use std::str;
 use std::vec::Vec;
@@ -105,8 +103,14 @@ fn u32_array_to_u8(arr: &[u32]) -> Vec<u8> {
 
 pub fn add_component_to_linker<T>(
     linker: &mut wasmtime::Linker<T>,
-    get_cx: impl Fn(&mut T) -> &mut WasiHttpCtx + Send + Sync + Copy + 'static,
-) -> anyhow::Result<()> {
+    get_cx: impl Fn(&mut T) -> &mut T + Send + Sync + Copy + 'static,
+) -> anyhow::Result<()>
+where
+    T: WasiHttpView
+        + WasiHttpViewExt
+        + crate::wasi::http::outgoing_handler::Host
+        + crate::wasi::http::types::Host,
+{
     linker.func_wrap(
         "wasi:http/outgoing-handler",
         "handle",
@@ -308,24 +312,6 @@ pub fn add_component_to_linker<T>(
             Ok(())
         },
     )?;
-    linker.func_wrap(
-        "wasi:io/streams",
-        "drop-input-stream",
-        move |mut caller: Caller<'_, T>, id: u32| -> anyhow::Result<()> {
-            let ctx = get_cx(caller.data_mut());
-            ctx.drop_input_stream(id)?;
-            Ok(())
-        },
-    )?;
-    linker.func_wrap(
-        "wasi:io/streams",
-        "drop-output-stream",
-        move |mut caller: Caller<'_, T>, id: u32| -> anyhow::Result<()> {
-            let ctx = get_cx(caller.data_mut());
-            ctx.drop_output_stream(id)?;
-            Ok(())
-        },
-    )?;
     linker.func_wrap(
         "wasi:http/types",
         "outgoing-request-write",
@@ -392,51 +378,6 @@ pub fn add_component_to_linker<T>(
             Ok(ctx.new_fields(vec)?)
         },
     )?;
-    linker.func_wrap(
-        "wasi:io/streams",
-        "read",
-        move |mut caller: Caller<'_, T>, stream: u32, len: u64, ptr: u32| -> anyhow::Result<()> {
-            let ctx = get_cx(caller.data_mut());
-            let bytes_tuple = ctx.read(stream, len)??;
-            let bytes = bytes_tuple.0;
-            let done = match bytes_tuple.1 {
-                true => 1,
-                false => 0,
-            };
-            let body_len: u32 = bytes.len().try_into()?;
-            let out_ptr = allocate_guest_pointer(&mut caller, body_len)?;
-            let result: [u32; 4] = [0, out_ptr, body_len, done];
-            let raw = u32_array_to_u8(&result);
-
-            let memory = memory_get(&mut caller)?;
-            memory.write(caller.as_context_mut(), out_ptr as _, &bytes)?;
-            memory.write(caller.as_context_mut(), ptr as _, &raw)?;
-            Ok(())
-        },
-    )?;
-    linker.func_wrap(
-        "wasi:io/streams",
-        "write",
-        move |mut caller: Caller<'_, T>,
-              stream: u32,
-              body_ptr: u32,
-              body_len: u32,
-              ptr: u32|
-              -> anyhow::Result<()> {
-            let memory = memory_get(&mut caller)?;
-            let body = string_from_memory(&memory, caller.as_context_mut(), body_ptr, body_len)?;
-
-            let result: [u32; 3] = [0, 0, body_len];
-            let raw = u32_array_to_u8(&result);
-
-            let memory = memory_get(&mut caller)?;
-            memory.write(caller.as_context_mut(), ptr as _, &raw)?;
-
-            let ctx = get_cx(caller.data_mut());
-            ctx.write(stream, body.as_bytes().to_vec())??;
-            Ok(())
-        },
-    )?;
     linker.func_wrap(
         "wasi:http/types",
         "fields-entries",
diff --git a/crates/wasi-http/src/http_impl.rs b/crates/wasi-http/src/http_impl.rs
index e7106529a45f..7a59220c6c40 100644
--- a/crates/wasi-http/src/http_impl.rs
+++ b/crates/wasi-http/src/http_impl.rs
@@ -1,15 +1,11 @@
-use crate::bytestream::ByteStream;
-use crate::common::stream::{InputStream, OutputStream, TableStreamExt};
-use crate::r#struct::{ActiveFields, ActiveFuture, ActiveResponse, HttpResponse, TableExt};
+use crate::r#struct::{ActiveFields, ActiveFuture, ActiveResponse, HttpResponse, TableHttpExt};
 use crate::wasi::http::types::{FutureIncomingResponse, OutgoingRequest, RequestOptions, Scheme};
-pub use crate::WasiHttpCtx;
+pub use crate::{WasiHttpCtx, WasiHttpView};
 #[cfg(not(any(target_arch = "riscv64", target_arch = "s390x")))]
-use anyhow::anyhow;
-use anyhow::bail;
-use bytes::Bytes;
-use http_body_util::{BodyExt, Full};
-use hyper::Method;
-use hyper::Request;
+use anyhow::{anyhow, bail, Context};
+use bytes::{Bytes, BytesMut};
+use http_body_util::{BodyExt, Empty, Full};
+use hyper::{Method, Request};
 #[cfg(not(any(target_arch = "riscv64", target_arch = "s390x")))]
 use std::sync::Arc;
 use std::time::Duration;
@@ -17,8 +13,9 @@ use tokio::net::TcpStream;
 use tokio::time::timeout;
 #[cfg(not(any(target_arch = "riscv64", target_arch = "s390x")))]
 use tokio_rustls::rustls::{self, OwnedTrustAnchor};
+use wasmtime_wasi::preview2::{StreamState, TableError, TableStreamExt};
 
-fn convert(error: crate::common::Error) -> anyhow::Error {
+fn convert(error: TableError) -> anyhow::Error {
     // if let Some(errno) = error.downcast_ref() {
     //     anyhow::Error::new(crate::types::Error::UnexpectedError(errno.to_string()))
     // } else {
@@ -26,14 +23,17 @@ fn convert(error: crate::common::Error) -> anyhow::Error {
     // }
 }
 
-impl crate::wasi::http::outgoing_handler::Host for WasiHttpCtx {
+impl<T: WasiHttpView> crate::wasi::http::outgoing_handler::Host for T {
     fn handle(
         &mut self,
         request_id: OutgoingRequest,
         options: Option<RequestOptions>,
     ) -> wasmtime::Result<FutureIncomingResponse> {
         let future = ActiveFuture::new(request_id, options);
-        let future_id = self.push_future(Box::new(future)).map_err(convert)?;
+        let future_id = self
+            .table_mut()
+            .push_future(Box::new(future))
+            .context("[handle] pushing future")?;
         Ok(future_id)
     }
 }
@@ -50,8 +50,18 @@ fn port_for_scheme(scheme: &Option<Scheme>) -> &str {
     }
 }
 
-impl WasiHttpCtx {
-    pub(crate) async fn handle_async(
+#[async_trait::async_trait]
+pub trait WasiHttpViewExt {
+    async fn handle_async(
+        &mut self,
+        request_id: OutgoingRequest,
+        options: Option<RequestOptions>,
+    ) -> wasmtime::Result<FutureIncomingResponse>;
+}
+
+#[async_trait::async_trait]
+impl<T: WasiHttpView> WasiHttpViewExt for T {
+    async fn handle_async(
         &mut self,
         request_id: OutgoingRequest,
         options: Option<RequestOptions>,
@@ -71,8 +81,11 @@ impl WasiHttpCtx {
         let between_bytes_timeout =
             Duration::from_millis(opts.between_bytes_timeout_ms.unwrap_or(600 * 1000).into());
 
-        let table = self.table_mut();
-        let request = table.get_request(request_id).map_err(convert)?.clone();
+        let request = self
+            .table()
+            .get_request(request_id)
+            .map_err(convert)?
+            .clone();
 
         let method = match request.method() {
             crate::wasi::http::types::Method::Get => Method::GET,
@@ -165,7 +178,7 @@ impl WasiHttpCtx {
             .header(hyper::header::HOST, request.authority());
 
         if let Some(headers) = request.headers() {
-            for (key, val) in table.get_fields(headers)?.iter() {
+            for (key, val) in self.table().get_fields(headers)?.iter() {
                 for item in val {
                     call = call.header(key, item.clone());
                 }
@@ -173,10 +186,26 @@ impl WasiHttpCtx {
         }
 
         let mut response = ActiveResponse::new();
-        let body = Full::<Bytes>::new(match request.body() {
-            Some(body) => table.get_output_stream_mut(body)?.try_into()?,
-            None => Bytes::new(),
-        });
+        let body = match request.body() {
+            Some(id) => {
+                let table = self.table_mut();
+                let stream = table.get_stream(id)?;
+                let input_stream = table.get_input_stream_mut(stream.incoming())?;
+                let mut bytes = BytesMut::new();
+                let mut eof = StreamState::Open;
+                while eof != StreamState::Closed {
+                    let (chunk, state) = input_stream.read(4096)?;
+                    eof = if chunk.len() == 0 {
+                        StreamState::Closed
+                    } else {
+                        state
+                    };
+                    bytes.extend_from_slice(&chunk[..]);
+                }
+                Full::<Bytes>::new(bytes.freeze()).boxed()
+            }
+            None => Empty::<Bytes>::new().boxed(),
+        };
         let t = timeout(first_bytes_timeout, sender.send_request(call.body(body)?)).await?;
         let mut res = t?;
         response.status = res.status().try_into()?;
@@ -187,7 +216,10 @@ impl WasiHttpCtx {
             vec.push(value.as_bytes().to_vec());
             map.insert(key.as_str().to_string(), vec);
         }
-        let headers = self.push_fields(Box::new(map)).map_err(convert)?;
+        let headers = self
+            .table_mut()
+            .push_fields(Box::new(map))
+            .map_err(convert)?;
         response.set_headers(headers);
 
         let mut buf: Vec<u8> = Vec::new();
@@ -209,16 +241,27 @@ impl WasiHttpCtx {
                         }
                     };
                 }
-                let trailers = self.push_fields(Box::new(map)).map_err(convert)?;
+                let trailers = self
+                    .table_mut()
+                    .push_fields(Box::new(map))
+                    .map_err(convert)?;
                 response.set_trailers(trailers);
             }
         }
 
-        let stream = self
-            .push_input_stream(Box::new(ByteStream::from(buf)))
-            .map_err(convert)?;
-        response.set_body(stream);
-        let response_id = self.push_response(Box::new(response)).map_err(convert)?;
+        let response_id = self
+            .table_mut()
+            .push_response(Box::new(response))
+            .context("pushing response")?;
+        let (stream_id, stream) = self
+            .table_mut()
+            .push_stream(Bytes::from(buf), response_id)
+            .context("pushing stream")?;
+        let response = self.table_mut().get_response_mut(response_id)?;
+        response.set_body(stream_id);
+
+        self.http_ctx_mut().streams.insert(stream_id, stream);
+
         Ok(response_id)
     }
 }
diff --git a/crates/wasi-http/src/lib.rs b/crates/wasi-http/src/lib.rs
index 3753fce5a5c0..b4ef8c35fc51 100644
--- a/crates/wasi-http/src/lib.rs
+++ b/crates/wasi-http/src/lib.rs
@@ -1,29 +1,38 @@
 use crate::component_impl::add_component_to_linker;
-pub use crate::r#struct::WasiHttpCtx;
+pub use crate::http_impl::WasiHttpViewExt;
+pub use crate::r#struct::{WasiHttpCtx, WasiHttpView};
 
-wasmtime::component::bindgen!({ path: "wasi-http/wit", world: "proxy"});
+wasmtime::component::bindgen!({
+    path: "wasi-http/wit",
+    world: "proxy",
+    with: {
+        "wasi:io/streams": wasmtime_wasi::preview2::bindings::io::streams,
+    }
+});
 
-pub mod bytestream;
-pub mod common;
 pub mod component_impl;
 pub mod http_impl;
-pub mod streams_impl;
 pub mod r#struct;
 pub mod types_impl;
 
-pub fn add_to_component_linker<T>(
-    linker: &mut wasmtime::component::Linker<T>,
-    get_cx: impl Fn(&mut T) -> &mut WasiHttpCtx + Send + Sync + Copy + 'static,
-) -> anyhow::Result<()> {
-    crate::wasi::http::outgoing_handler::add_to_linker(linker, get_cx)?;
-    crate::wasi::http::types::add_to_linker(linker, get_cx)?;
-    crate::wasi::io::streams::add_to_linker(linker, get_cx)?;
+pub fn add_to_component_linker<T>(linker: &mut wasmtime::component::Linker<T>) -> anyhow::Result<()>
+where
+    T: WasiHttpView
+        + WasiHttpViewExt
+        + crate::wasi::http::outgoing_handler::Host
+        + crate::wasi::http::types::Host,
+{
+    crate::wasi::http::outgoing_handler::add_to_linker(linker, |t| t)?;
+    crate::wasi::http::types::add_to_linker(linker, |t| t)?;
     Ok(())
 }
 
-pub fn add_to_linker<T>(
-    linker: &mut wasmtime::Linker<T>,
-    get_cx: impl Fn(&mut T) -> &mut WasiHttpCtx + Send + Sync + Copy + 'static,
-) -> anyhow::Result<()> {
-    add_component_to_linker(linker, get_cx)
+pub fn add_to_linker<T>(linker: &mut wasmtime::Linker<T>) -> anyhow::Result<()>
+where
+    T: WasiHttpView
+        + WasiHttpViewExt
+        + crate::wasi::http::outgoing_handler::Host
+        + crate::wasi::http::types::Host,
+{
+    add_component_to_linker::<T>(linker, |t| t)
 }
diff --git a/crates/wasi-http/src/streams_impl.rs b/crates/wasi-http/src/streams_impl.rs
deleted file mode 100644
index a209d8cca716..000000000000
--- a/crates/wasi-http/src/streams_impl.rs
+++ /dev/null
@@ -1,183 +0,0 @@
-use crate::common::stream::TableStreamExt;
-use crate::wasi::io::streams::{InputStream, OutputStream, StreamError};
-use crate::wasi::poll::poll::Pollable;
-use crate::WasiHttpCtx;
-use anyhow::bail;
-use std::vec::Vec;
-
-fn convert(error: crate::common::Error) -> anyhow::Error {
-    // if let Some(errno) = error.downcast_ref() {
-    //     anyhow::Error::new(StreamError {})
-    // } else {
-    error.into()
-    // }
-}
-
-impl crate::wasi::io::streams::Host for WasiHttpCtx {
-    fn read(
-        &mut self,
-        stream: InputStream,
-        len: u64,
-    ) -> wasmtime::Result<Result<(Vec<u8>, bool), StreamError>> {
-        let s = self
-            .table_mut()
-            .get_input_stream_mut(stream)
-            .map_err(convert)?;
-        // if s.closed {
-        //     bail!("stream is dropped!");
-        // }
-
-        // Len could be any `u64` value, but we don't want to
-        // allocate too much up front, so make a wild guess
-        // of an upper bound for the buffer size.
-        let buffer_len = std::cmp::min(len, 0x400000) as _;
-        let mut buffer = vec![0; buffer_len];
-
-        let (bytes_read, end) = s.read(&mut buffer).map_err(convert)?;
-
-        buffer.truncate(bytes_read as usize);
-
-        Ok(Ok((buffer, end)))
-    }
-
-    fn skip(
-        &mut self,
-        stream: InputStream,
-        len: u64,
-    ) -> wasmtime::Result<Result<(u64, bool), StreamError>> {
-        let s = self
-            .table_mut()
-            .get_input_stream_mut(stream)
-            .map_err(convert)?;
-        // if s.closed {
-        //     bail!("stream is dropped!");
-        // }
-
-        let (bytes_skipped, end) = s.skip(len).map_err(convert)?;
-
-        Ok(Ok((bytes_skipped, end)))
-    }
-
-    fn subscribe_to_input_stream(&mut self, _this: InputStream) -> wasmtime::Result<Pollable> {
-        bail!("unimplemented: subscribe_to_input_stream");
-    }
-
-    fn drop_input_stream(&mut self, stream: InputStream) -> wasmtime::Result<()> {
-        // let st = self
-        //     .streams
-        //     .get_mut(&stream)
-        //     .ok_or_else(|| anyhow!("stream not found: {stream}"))?;
-        // st.closed = true;
-        self.table_mut()
-            .delete_input_stream(stream)
-            .map_err(convert)?;
-        Ok(())
-    }
-
-    fn write(
-        &mut self,
-        stream: OutputStream,
-        buf: Vec<u8>,
-    ) -> wasmtime::Result<Result<u64, StreamError>> {
-        let s = self
-            .table_mut()
-            .get_output_stream_mut(stream)
-            .map_err(convert)?;
-        // if s.closed {
-        //     bail!("cannot write to closed stream");
-        // }
-
-        let bytes_written = s.write(&buf).map_err(convert)?;
-
-        Ok(Ok(u64::try_from(bytes_written)?))
-    }
-
-    fn write_zeroes(
-        &mut self,
-        stream: OutputStream,
-        len: u64,
-    ) -> wasmtime::Result<Result<u64, StreamError>> {
-        let s = self
-            .table_mut()
-            .get_output_stream_mut(stream)
-            .map_err(convert)?;
-
-        let bytes_written: u64 = s.write_zeroes(len).map_err(convert)?;
-
-        Ok(Ok(bytes_written))
-    }
-
-    fn splice(
-        &mut self,
-        _this: OutputStream,
-        _src: InputStream,
-        _len: u64,
-    ) -> wasmtime::Result<Result<(u64, bool), StreamError>> {
-        bail!("unimplemented: splice");
-    }
-
-    fn forward(
-        &mut self,
-        _this: OutputStream,
-        _src: InputStream,
-    ) -> wasmtime::Result<Result<u64, StreamError>> {
-        bail!("unimplemented: forward");
-    }
-
-    fn subscribe_to_output_stream(&mut self, _this: OutputStream) -> wasmtime::Result<Pollable> {
-        bail!("unimplemented: subscribe_to_output_stream");
-    }
-
-    fn drop_output_stream(&mut self, stream: OutputStream) -> wasmtime::Result<()> {
-        // let st = self
-        //     .streams
-        //     .get_mut(&stream)
-        //     .ok_or_else(|| anyhow!("stream not found: {stream}"))?;
-        // st.closed = true;
-        self.table_mut()
-            .delete_output_stream(stream)
-            .map_err(convert)?;
-        Ok(())
-    }
-
-    fn blocking_read(
-        &mut self,
-        _: InputStream,
-        _: u64,
-    ) -> wasmtime::Result<Result<(Vec<u8>, bool), StreamError>> {
-        bail!("unimplemented")
-    }
-
-    fn blocking_skip(
-        &mut self,
-        _: InputStream,
-        _: u64,
-    ) -> wasmtime::Result<Result<(u64, bool), StreamError>> {
-        bail!("unimplemented")
-    }
-
-    fn blocking_write(
-        &mut self,
-        _: OutputStream,
-        _: Vec<u8>,
-    ) -> wasmtime::Result<Result<u64, StreamError>> {
-        bail!("unimplemented")
-    }
-
-    fn blocking_write_zeroes(
-        &mut self,
-        _: OutputStream,
-        _: u64,
-    ) -> wasmtime::Result<Result<u64, StreamError>> {
-        bail!("unimplemented")
-    }
-
-    fn blocking_splice(
-        &mut self,
-        _: OutputStream,
-        _: InputStream,
-        _: u64,
-    ) -> wasmtime::Result<Result<(u64, bool), StreamError>> {
-        bail!("unimplemented")
-    }
-}
diff --git a/crates/wasi-http/src/struct.rs b/crates/wasi-http/src/struct.rs
index 25335a1f554f..48b3429530f6 100644
--- a/crates/wasi-http/src/struct.rs
+++ b/crates/wasi-http/src/struct.rs
@@ -1,76 +1,37 @@
 //! Implements the base structure (i.e. [WasiHttpCtx]) that will provide the
 //! implementation of the wasi-http API.
 
-use crate::common::{Error, InputStream, OutputStream, Table};
-use crate::wasi::http::types::{Method, RequestOptions, Scheme};
+use crate::wasi::http::types::{
+    IncomingStream, Method, OutgoingRequest, OutgoingStream, RequestOptions, Scheme,
+};
+use bytes::Bytes;
 use std::any::Any;
 use std::collections::HashMap;
 use std::ops::{Deref, DerefMut};
+use wasmtime_wasi::preview2::{
+    pipe::{AsyncReadStream, AsyncWriteStream},
+    HostInputStream, HostOutputStream, Table, TableError, TableStreamExt, WasiView,
+};
+
+const MAX_BUF_SIZE: usize = 65_536;
 
 /// Capture the state necessary for use in the wasi-http API implementation.
 pub struct WasiHttpCtx {
-    pub table: Table,
+    pub streams: HashMap<u32, Stream>,
 }
 
 impl WasiHttpCtx {
     /// Make a new context from the default state.
     pub fn new() -> Self {
         Self {
-            table: Table::new(),
+            streams: HashMap::new(),
         }
     }
+}
 
-    pub fn table(&self) -> &Table {
-        &self.table
-    }
-
-    pub fn table_mut(&mut self) -> &mut Table {
-        &mut self.table
-    }
-
-    pub fn insert_input_stream(&mut self, id: u32, stream: Box<dyn InputStream>) {
-        self.table_mut().insert_at(id, Box::new(stream));
-    }
-
-    pub fn push_input_stream(&mut self, stream: Box<dyn InputStream>) -> Result<u32, Error> {
-        self.table_mut().push(Box::new(stream))
-    }
-
-    pub fn insert_output_stream(&mut self, id: u32, stream: Box<dyn OutputStream>) {
-        self.table_mut().insert_at(id, Box::new(stream));
-    }
-
-    pub fn push_output_stream(&mut self, stream: Box<dyn OutputStream>) -> Result<u32, Error> {
-        self.table_mut().push(Box::new(stream))
-    }
-
-    pub fn push_request(&mut self, request: Box<dyn HttpRequest>) -> Result<u32, Error> {
-        self.table_mut().push(Box::new(request))
-    }
-
-    pub fn push_response(&mut self, response: Box<dyn HttpResponse>) -> Result<u32, Error> {
-        self.table_mut().push(Box::new(response))
-    }
-
-    pub fn push_future(&mut self, future: Box<ActiveFuture>) -> Result<u32, Error> {
-        self.table_mut().push(Box::new(future))
-    }
-
-    pub fn push_fields(&mut self, fields: Box<ActiveFields>) -> Result<u32, Error> {
-        self.table_mut().push(Box::new(fields))
-    }
-
-    pub fn set_stdin(&mut self, s: Box<dyn InputStream>) {
-        self.insert_input_stream(0, s);
-    }
-
-    pub fn set_stdout(&mut self, s: Box<dyn OutputStream>) {
-        self.insert_output_stream(1, s);
-    }
-
-    pub fn set_stderr(&mut self, s: Box<dyn OutputStream>) {
-        self.insert_output_stream(2, s);
-    }
+pub trait WasiHttpView: WasiView {
+    fn http_ctx(&self) -> &WasiHttpCtx;
+    fn http_ctx_mut(&mut self) -> &mut WasiHttpCtx;
 }
 
 pub type FieldsMap = HashMap<String, Vec<Vec<u8>>>;
@@ -224,12 +185,12 @@ impl HttpResponse for ActiveResponse {
 
 #[derive(Clone)]
 pub struct ActiveFuture {
-    pub request_id: u32,
+    pub request_id: OutgoingRequest,
     pub options: Option<RequestOptions>,
 }
 
 impl ActiveFuture {
-    pub fn new(request_id: u32, options: Option<RequestOptions>) -> Self {
+    pub fn new(request_id: OutgoingRequest, options: Option<RequestOptions>) -> Self {
         Self {
             request_id,
             options,
@@ -269,74 +230,153 @@ impl DerefMut for ActiveFields {
     }
 }
 
-pub trait TableExt {
-    fn get_request(&self, id: u32) -> Result<&(dyn HttpRequest), Error>;
-    fn get_request_mut(&mut self, id: u32) -> Result<&mut Box<dyn HttpRequest>, Error>;
-    fn delete_request(&mut self, id: u32) -> Result<(), Error>;
+#[derive(Clone, Debug)]
+pub struct Stream {
+    input_id: u32,
+    output_id: u32,
+    parent_id: u32,
+}
 
-    fn get_response(&self, id: u32) -> Result<&dyn HttpResponse, Error>;
-    fn get_response_mut(&mut self, id: u32) -> Result<&mut Box<dyn HttpResponse>, Error>;
-    fn delete_response(&mut self, id: u32) -> Result<(), Error>;
+impl Stream {
+    pub fn new(input_id: u32, output_id: u32, parent_id: u32) -> Self {
+        Self {
+            input_id,
+            output_id,
+            parent_id,
+        }
+    }
 
-    fn get_future(&self, id: u32) -> Result<&ActiveFuture, Error>;
-    fn get_future_mut(&mut self, id: u32) -> Result<&mut Box<ActiveFuture>, Error>;
-    fn delete_future(&mut self, id: u32) -> Result<(), Error>;
+    pub fn incoming(&self) -> IncomingStream {
+        self.input_id
+    }
 
-    fn get_fields(&self, id: u32) -> Result<&ActiveFields, Error>;
-    fn get_fields_mut(&mut self, id: u32) -> Result<&mut Box<ActiveFields>, Error>;
-    fn delete_fields(&mut self, id: u32) -> Result<(), Error>;
+    pub fn outgoing(&self) -> OutgoingStream {
+        self.output_id
+    }
 
-    fn get_response_by_stream(&self, id: u32) -> Result<&dyn HttpResponse, Error>;
+    pub fn parent_id(&self) -> u32 {
+        self.parent_id
+    }
 }
 
-impl TableExt for crate::common::Table {
-    fn get_request(&self, id: u32) -> Result<&dyn HttpRequest, Error> {
+pub trait TableHttpExt {
+    fn push_request(&mut self, request: Box<dyn HttpRequest>) -> Result<u32, TableError>;
+    fn get_request(&self, id: u32) -> Result<&(dyn HttpRequest), TableError>;
+    fn get_request_mut(&mut self, id: u32) -> Result<&mut Box<dyn HttpRequest>, TableError>;
+    fn delete_request(&mut self, id: u32) -> Result<(), TableError>;
+
+    fn push_response(&mut self, response: Box<dyn HttpResponse>) -> Result<u32, TableError>;
+    fn get_response(&self, id: u32) -> Result<&dyn HttpResponse, TableError>;
+    fn get_response_mut(&mut self, id: u32) -> Result<&mut Box<dyn HttpResponse>, TableError>;
+    fn delete_response(&mut self, id: u32) -> Result<(), TableError>;
+
+    fn push_future(&mut self, future: Box<ActiveFuture>) -> Result<u32, TableError>;
+    fn get_future(&self, id: u32) -> Result<&ActiveFuture, TableError>;
+    fn get_future_mut(&mut self, id: u32) -> Result<&mut Box<ActiveFuture>, TableError>;
+    fn delete_future(&mut self, id: u32) -> Result<(), TableError>;
+
+    fn push_fields(&mut self, fields: Box<ActiveFields>) -> Result<u32, TableError>;
+    fn get_fields(&self, id: u32) -> Result<&ActiveFields, TableError>;
+    fn get_fields_mut(&mut self, id: u32) -> Result<&mut Box<ActiveFields>, TableError>;
+    fn delete_fields(&mut self, id: u32) -> Result<(), TableError>;
+
+    fn push_stream(&mut self, content: Bytes, parent: u32) -> Result<(u32, Stream), TableError>;
+    fn get_stream(&self, id: u32) -> Result<&Stream, TableError>;
+    fn get_stream_mut(&mut self, id: u32) -> Result<&mut Box<Stream>, TableError>;
+    fn delete_stream(&mut self, id: u32) -> Result<(), TableError>;
+}
+
+impl TableHttpExt for Table {
+    fn push_request(&mut self, request: Box<dyn HttpRequest>) -> Result<u32, TableError> {
+        self.push(Box::new(request))
+    }
+    fn get_request(&self, id: u32) -> Result<&dyn HttpRequest, TableError> {
         self.get::<Box<dyn HttpRequest>>(id).map(|f| f.as_ref())
     }
-    fn get_request_mut(&mut self, id: u32) -> Result<&mut Box<dyn HttpRequest>, Error> {
+    fn get_request_mut(&mut self, id: u32) -> Result<&mut Box<dyn HttpRequest>, TableError> {
         self.get_mut::<Box<dyn HttpRequest>>(id)
     }
-    fn delete_request(&mut self, id: u32) -> Result<(), Error> {
+    fn delete_request(&mut self, id: u32) -> Result<(), TableError> {
         self.delete::<Box<dyn HttpRequest>>(id).map(|_old| ())
     }
 
-    fn get_response(&self, id: u32) -> Result<&dyn HttpResponse, Error> {
+    fn push_response(&mut self, response: Box<dyn HttpResponse>) -> Result<u32, TableError> {
+        self.push(Box::new(response))
+    }
+    fn get_response(&self, id: u32) -> Result<&dyn HttpResponse, TableError> {
         self.get::<Box<dyn HttpResponse>>(id).map(|f| f.as_ref())
     }
-    fn get_response_mut(&mut self, id: u32) -> Result<&mut Box<dyn HttpResponse>, Error> {
+    fn get_response_mut(&mut self, id: u32) -> Result<&mut Box<dyn HttpResponse>, TableError> {
         self.get_mut::<Box<dyn HttpResponse>>(id)
     }
-    fn delete_response(&mut self, id: u32) -> Result<(), Error> {
+    fn delete_response(&mut self, id: u32) -> Result<(), TableError> {
         self.delete::<Box<dyn HttpResponse>>(id).map(|_old| ())
     }
 
-    fn get_future(&self, id: u32) -> Result<&ActiveFuture, Error> {
+    fn push_future(&mut self, future: Box<ActiveFuture>) -> Result<u32, TableError> {
+        self.push(Box::new(future))
+    }
+    fn get_future(&self, id: u32) -> Result<&ActiveFuture, TableError> {
         self.get::<Box<ActiveFuture>>(id).map(|f| f.as_ref())
     }
-    fn get_future_mut(&mut self, id: u32) -> Result<&mut Box<ActiveFuture>, Error> {
+    fn get_future_mut(&mut self, id: u32) -> Result<&mut Box<ActiveFuture>, TableError> {
         self.get_mut::<Box<ActiveFuture>>(id)
     }
-    fn delete_future(&mut self, id: u32) -> Result<(), Error> {
+    fn delete_future(&mut self, id: u32) -> Result<(), TableError> {
         self.delete::<Box<ActiveFuture>>(id).map(|_old| ())
     }
 
-    fn get_fields(&self, id: u32) -> Result<&ActiveFields, Error> {
+    fn push_fields(&mut self, fields: Box<ActiveFields>) -> Result<u32, TableError> {
+        self.push(Box::new(fields))
+    }
+    fn get_fields(&self, id: u32) -> Result<&ActiveFields, TableError> {
         self.get::<Box<ActiveFields>>(id).map(|f| f.as_ref())
     }
-    fn get_fields_mut(&mut self, id: u32) -> Result<&mut Box<ActiveFields>, Error> {
+    fn get_fields_mut(&mut self, id: u32) -> Result<&mut Box<ActiveFields>, TableError> {
         self.get_mut::<Box<ActiveFields>>(id)
     }
-    fn delete_fields(&mut self, id: u32) -> Result<(), Error> {
+    fn delete_fields(&mut self, id: u32) -> Result<(), TableError> {
         self.delete::<Box<ActiveFields>>(id).map(|_old| ())
     }
 
-    fn get_response_by_stream(&self, id: u32) -> Result<&dyn HttpResponse, Error> {
-        for value in self.list::<Box<dyn HttpResponse>>().into_values() {
-            if Some(id) == value.body() {
-                return Ok(value.as_ref());
-            }
+    fn push_stream(&mut self, content: Bytes, parent: u32) -> Result<(u32, Stream), TableError> {
+        let (a, b) = tokio::io::duplex(MAX_BUF_SIZE);
+        let (_, write_stream) = tokio::io::split(a);
+        let (read_stream, _) = tokio::io::split(b);
+        let input_stream = AsyncReadStream::new(read_stream);
+        let mut output_stream = AsyncWriteStream::new(write_stream);
+
+        let mut cursor = 0;
+        while cursor < content.len() {
+            let (written, _) = output_stream
+                .write(content.slice(cursor..content.len()))
+                .map_err(|_| TableError::NotPresent)?;
+            cursor += written;
         }
-        Err(Error::trap(anyhow::Error::msg("response not found")))
+
+        let input_stream = Box::new(input_stream);
+        let output_id = self.push_output_stream(Box::new(output_stream))?;
+        let input_id = self.push_input_stream(input_stream)?;
+        let stream = Stream::new(input_id, output_id, parent);
+        let cloned_stream = stream.clone();
+        let stream_id = self.push(Box::new(Box::new(stream)))?;
+        Ok((stream_id, cloned_stream))
+    }
+    fn get_stream(&self, id: u32) -> Result<&Stream, TableError> {
+        self.get::<Box<Stream>>(id).map(|f| f.as_ref())
+    }
+    fn get_stream_mut(&mut self, id: u32) -> Result<&mut Box<Stream>, TableError> {
+        self.get_mut::<Box<Stream>>(id)
+    }
+    fn delete_stream(&mut self, id: u32) -> Result<(), TableError> {
+        let stream = self.get_stream_mut(id)?;
+        let input_stream = stream.incoming();
+        let output_stream = stream.outgoing();
+        self.delete::<Box<Stream>>(id).map(|_old| ())?;
+        self.delete::<Box<dyn HostInputStream>>(input_stream)
+            .map(|_old| ())?;
+        self.delete::<Box<dyn HostOutputStream>>(output_stream)
+            .map(|_old| ())
     }
 }
 
diff --git a/crates/wasi-http/src/types_impl.rs b/crates/wasi-http/src/types_impl.rs
index dfacefabbff3..9107e533c710 100644
--- a/crates/wasi-http/src/types_impl.rs
+++ b/crates/wasi-http/src/types_impl.rs
@@ -1,17 +1,17 @@
-use crate::bytestream::ByteStream;
-use crate::common::stream::TableStreamExt;
-use crate::r#struct::{ActiveFields, ActiveRequest, HttpFields, HttpRequest, TableExt};
+use crate::http_impl::WasiHttpViewExt;
+use crate::r#struct::{ActiveFields, ActiveRequest, HttpRequest, TableHttpExt};
 use crate::wasi::http::types::{
     Error, Fields, FutureIncomingResponse, Headers, IncomingRequest, IncomingResponse,
     IncomingStream, Method, OutgoingRequest, OutgoingResponse, OutgoingStream, ResponseOutparam,
     Scheme, StatusCode, Trailers,
 };
 use crate::wasi::poll::poll::Pollable;
-use crate::WasiHttpCtx;
-use anyhow::{anyhow, bail};
-use tokio::runtime::{Handle, Runtime};
+use crate::WasiHttpView;
+use anyhow::{anyhow, bail, Context};
+use bytes::Bytes;
+use wasmtime_wasi::preview2::TableError;
 
-fn convert(error: crate::common::Error) -> anyhow::Error {
+fn convert(error: TableError) -> anyhow::Error {
     // if let Some(errno) = error.downcast_ref() {
     //     Error::UnexpectedError(errno.to_string())
     // } else {
@@ -19,7 +19,7 @@ fn convert(error: crate::common::Error) -> anyhow::Error {
     // }
 }
 
-impl crate::wasi::http::types::Host for WasiHttpCtx {
+impl<T: WasiHttpView + WasiHttpViewExt> crate::wasi::http::types::Host for T {
     fn drop_fields(&mut self, fields: Fields) -> wasmtime::Result<()> {
         self.table_mut().delete_fields(fields).map_err(convert)?;
         Ok(())
@@ -30,7 +30,10 @@ impl crate::wasi::http::types::Host for WasiHttpCtx {
             map.insert(key, vec![value.clone().into_bytes()]);
         }
 
-        let id = self.push_fields(Box::new(map)).map_err(convert)?;
+        let id = self
+            .table_mut()
+            .push_fields(Box::new(map))
+            .map_err(convert)?;
         Ok(id)
     }
     fn fields_get(&mut self, fields: Fields, name: String) -> wasmtime::Result<Vec<Vec<u8>>> {
@@ -93,18 +96,25 @@ impl crate::wasi::http::types::Host for WasiHttpCtx {
         Ok(result)
     }
     fn fields_clone(&mut self, fields: Fields) -> wasmtime::Result<Fields> {
-        let m = self.table().get_fields(fields).map_err(convert)?;
-        let id = self.push_fields(Box::new(m.clone())).map_err(convert)?;
+        let table = self.table_mut();
+        let m = table.get_fields(fields).map_err(convert)?;
+        let id = table.push_fields(Box::new(m.clone())).map_err(convert)?;
         Ok(id)
     }
     fn finish_incoming_stream(
         &mut self,
-        stream: IncomingStream,
+        stream_id: IncomingStream,
     ) -> wasmtime::Result<Option<Trailers>> {
-        match self.table().get_response_by_stream(stream) {
-            Ok(response) => Ok(response.trailers()),
-            Err(_) => bail!("unknown stream!"),
+        for (_, stream) in self.http_ctx().streams.iter() {
+            if stream_id == stream.incoming() {
+                let response = self
+                    .table()
+                    .get_response(stream.parent_id())
+                    .context("get trailers from response")?;
+                return Ok(response.trailers());
+            }
         }
+        bail!("unknown stream!")
     }
     fn finish_outgoing_stream(
         &mut self,
@@ -117,22 +127,16 @@ impl crate::wasi::http::types::Host for WasiHttpCtx {
         bail!("unimplemented: drop_incoming_request")
     }
     fn drop_outgoing_request(&mut self, request: OutgoingRequest) -> wasmtime::Result<()> {
-        // if let Entry::Occupied(e) = self.requests.entry(request) {
-        //     let r = e.remove();
-        //     self.streams.remove(&r.body);
-        // }
-        let r = self.table().get_request(request).map_err(convert)?;
+        let r = self.table_mut().get_request(request).map_err(convert)?;
 
-        // Cleanup dependant resources
+        // Cleanup dependent resources
         let body = r.body();
         let headers = r.headers();
         if let Some(b) = body {
-            self.table_mut()
-                .delete_output_stream(b)
-                .unwrap_or_else(|_| ());
+            self.table_mut().delete_stream(b).ok();
         }
         if let Some(h) = headers {
-            self.table_mut().delete_fields(h).unwrap_or_else(|_| ());
+            self.table_mut().delete_fields(h).ok();
         }
 
         self.table_mut().delete_request(request).map_err(convert)?;
@@ -183,7 +187,10 @@ impl crate::wasi::http::types::Host for WasiHttpCtx {
         req.method = method;
         req.headers = Some(headers);
         req.scheme = scheme;
-        let id = self.push_request(Box::new(req)).map_err(convert)?;
+        let id = self
+            .table_mut()
+            .push_request(Box::new(req))
+            .map_err(convert)?;
         Ok(id)
     }
     fn outgoing_request_write(
@@ -191,11 +198,12 @@ impl crate::wasi::http::types::Host for WasiHttpCtx {
         request: OutgoingRequest,
     ) -> wasmtime::Result<Result<OutgoingStream, ()>> {
         let req = self.table().get_request(request).map_err(convert)?;
-        let body = req.body().unwrap_or_else(|| {
-            let buf = ByteStream::new();
-            let new = self
-                .push_output_stream(Box::new(buf))
+        let stream_id = req.body().unwrap_or_else(|| {
+            let (new, stream) = self
+                .table_mut()
+                .push_stream(Bytes::new(), request)
                 .expect("valid output stream");
+            self.http_ctx_mut().streams.insert(new, stream);
             let req = self
                 .table_mut()
                 .get_request_mut(request)
@@ -203,7 +211,8 @@ impl crate::wasi::http::types::Host for WasiHttpCtx {
             req.set_body(new);
             new
         });
-        Ok(Ok(body))
+        let stream = self.table().get_stream(stream_id)?;
+        Ok(Ok(stream.outgoing()))
     }
     fn drop_response_outparam(&mut self, _response: ResponseOutparam) -> wasmtime::Result<()> {
         bail!("unimplemented: drop_response_outparam")
@@ -216,32 +225,35 @@ impl crate::wasi::http::types::Host for WasiHttpCtx {
         bail!("unimplemented: set_response_outparam")
     }
     fn drop_incoming_response(&mut self, response: IncomingResponse) -> wasmtime::Result<()> {
-        // if let Entry::Occupied(e) = self.responses.entry(response) {
-        //     let r = e.remove();
-        //     self.streams.remove(&r.body);
-        // }
         let r = self.table().get_response(response).map_err(convert)?;
 
-        // Cleanup dependant resources
+        // Cleanup dependent resources
         let body = r.body();
         let headers = r.headers();
-        if let Some(b) = body {
-            if let Some(trailers) = self.finish_incoming_stream(b)? {
+        if let Some(id) = body {
+            let stream = self.table().get_stream(id)?;
+            let incoming_id = stream.incoming();
+            if let Some(trailers) = self.finish_incoming_stream(incoming_id)? {
                 self.table_mut()
                     .delete_fields(trailers)
+                    .context("[drop_incoming_response] deleting trailers")
                     .unwrap_or_else(|_| ());
             }
             self.table_mut()
-                .delete_input_stream(b)
-                .unwrap_or_else(|_| ());
+                .delete_stream(id)
+                .context("[drop_incoming_response] deleting input stream")
+                .ok();
         }
         if let Some(h) = headers {
-            self.table_mut().delete_fields(h).unwrap_or_else(|_| ());
+            self.table_mut()
+                .delete_fields(h)
+                .context("[drop_incoming_response] deleting fields")
+                .ok();
         }
 
         self.table_mut()
             .delete_response(response)
-            .map_err(convert)?;
+            .context("[drop_incoming_response] deleting response")?;
         Ok(())
     }
     fn drop_outgoing_response(&mut self, _response: OutgoingResponse) -> wasmtime::Result<()> {
@@ -259,14 +271,23 @@ impl crate::wasi::http::types::Host for WasiHttpCtx {
         response: IncomingResponse,
     ) -> wasmtime::Result<Headers> {
         let r = self.table().get_response(response).map_err(convert)?;
-        Ok(r.headers().unwrap_or(0))
+        Ok(r.headers().unwrap_or(0 as Headers))
     }
     fn incoming_response_consume(
         &mut self,
         response: IncomingResponse,
     ) -> wasmtime::Result<Result<IncomingStream, ()>> {
-        let r = self.table().get_response(response).map_err(convert)?;
-        Ok(Ok(r.body().unwrap_or(0)))
+        let table = self.table_mut();
+        let r = table.get_response(response).map_err(convert)?;
+        Ok(Ok(r
+            .body()
+            .map(|id| {
+                table
+                    .get_stream(id)
+                    .map(|stream| stream.incoming())
+                    .expect("response body stream")
+            })
+            .unwrap_or(0 as IncomingStream)))
     }
     fn new_outgoing_response(
         &mut self,
@@ -292,18 +313,12 @@ impl crate::wasi::http::types::Host for WasiHttpCtx {
         &mut self,
         future: FutureIncomingResponse,
     ) -> wasmtime::Result<Option<Result<IncomingResponse, Error>>> {
-        let f = self.table().get_future(future).map_err(convert)?;
+        let f = self
+            .table()
+            .get_future(future)
+            .context("[future_incoming_response_get] getting future")?;
 
-        let (handle, _runtime) = match Handle::try_current() {
-            Ok(h) => (h, None),
-            Err(_) => {
-                let rt = Runtime::new().unwrap();
-                let _enter = rt.enter();
-                (rt.handle().clone(), Some(rt))
-            }
-        };
-        let response = handle
-            .block_on(self.handle_async(f.request_id, f.options))
+        let response = futures::executor::block_on(self.handle_async(f.request_id, f.options))
             .map_err(|e| Error::UnexpectedError(e.to_string()));
         Ok(Some(response))
     }

From 56c65c0885fd63c0cee1fb88c7463c897ef93ec7 Mon Sep 17 00:00:00 2001
From: Eduardo Rodrigues <eduardomourar@users.noreply.github.com>
Date: Tue, 8 Aug 2023 11:20:50 +0100
Subject: [PATCH 13/49] chore: use pollable from wasmtime-wasi

---
 crates/wasi-http/src/lib.rs        | 5 ++++-
 crates/wasi-http/src/types_impl.rs | 3 +--
 2 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/crates/wasi-http/src/lib.rs b/crates/wasi-http/src/lib.rs
index b4ef8c35fc51..991c591d7baa 100644
--- a/crates/wasi-http/src/lib.rs
+++ b/crates/wasi-http/src/lib.rs
@@ -7,6 +7,7 @@ wasmtime::component::bindgen!({
     world: "proxy",
     with: {
         "wasi:io/streams": wasmtime_wasi::preview2::bindings::io::streams,
+        "wasi:poll/poll": wasmtime_wasi::preview2::bindings::poll::poll,
     }
 });
 
@@ -32,7 +33,9 @@ where
     T: WasiHttpView
         + WasiHttpViewExt
         + crate::wasi::http::outgoing_handler::Host
-        + crate::wasi::http::types::Host,
+        + crate::wasi::http::types::Host
+        + wasmtime_wasi::preview2::bindings::io::streams::Host
+        + wasmtime_wasi::preview2::bindings::poll::poll::Host,
 {
     add_component_to_linker::<T>(linker, |t| t)
 }
diff --git a/crates/wasi-http/src/types_impl.rs b/crates/wasi-http/src/types_impl.rs
index 9107e533c710..5fb55191f842 100644
--- a/crates/wasi-http/src/types_impl.rs
+++ b/crates/wasi-http/src/types_impl.rs
@@ -5,11 +5,10 @@ use crate::wasi::http::types::{
     IncomingStream, Method, OutgoingRequest, OutgoingResponse, OutgoingStream, ResponseOutparam,
     Scheme, StatusCode, Trailers,
 };
-use crate::wasi::poll::poll::Pollable;
 use crate::WasiHttpView;
 use anyhow::{anyhow, bail, Context};
 use bytes::Bytes;
-use wasmtime_wasi::preview2::TableError;
+use wasmtime_wasi::preview2::{bindings::poll::poll::Pollable, TableError};
 
 fn convert(error: TableError) -> anyhow::Error {
     // if let Some(errno) = error.downcast_ref() {

From 83a2ec2dc063af899e33b2b6c0c0dbf43c98e8e6 Mon Sep 17 00:00:00 2001
From: Eduardo Rodrigues <eduardomourar@users.noreply.github.com>
Date: Tue, 8 Aug 2023 11:45:17 +0100
Subject: [PATCH 14/49] chore: update wasi http linker for module

---
 crates/wasi-http/src/component_impl.rs | 291 +++++++++++++++++++------
 1 file changed, 224 insertions(+), 67 deletions(-)

diff --git a/crates/wasi-http/src/component_impl.rs b/crates/wasi-http/src/component_impl.rs
index 45948d9d688c..e2b53cf452bc 100644
--- a/crates/wasi-http/src/component_impl.rs
+++ b/crates/wasi-http/src/component_impl.rs
@@ -4,6 +4,7 @@ use anyhow::anyhow;
 use std::str;
 use std::vec::Vec;
 use wasmtime::{AsContext, AsContextMut, Caller, Extern, Memory};
+use wasmtime_wasi::preview2::bindings::{io, poll};
 
 const MEMORY: &str = "memory";
 
@@ -79,7 +80,10 @@ fn read_option_string(
     }
 }
 
-fn allocate_guest_pointer<T>(caller: &mut Caller<'_, T>, size: u32) -> anyhow::Result<u32> {
+async fn allocate_guest_pointer<T: Send>(
+    caller: &mut Caller<'_, T>,
+    size: u32,
+) -> anyhow::Result<u32> {
     let realloc = caller
         .get_export("cabi_realloc")
         .ok_or_else(|| anyhow!("missing required export cabi_realloc"))?;
@@ -87,7 +91,9 @@ fn allocate_guest_pointer<T>(caller: &mut Caller<'_, T>, size: u32) -> anyhow::R
         .into_func()
         .ok_or_else(|| anyhow!("cabi_realloc must be a func"))?;
     let typed = func.typed::<(u32, u32, u32, u32), u32>(caller.as_context())?;
-    Ok(typed.call(caller.as_context_mut(), (0, 0, 4, size))?)
+    Ok(typed
+        .call_async(caller.as_context_mut(), (0, 0, 4, size))
+        .await?)
 }
 
 fn u32_array_to_u8(arr: &[u32]) -> Vec<u8> {
@@ -109,7 +115,9 @@ where
     T: WasiHttpView
         + WasiHttpViewExt
         + crate::wasi::http::outgoing_handler::Host
-        + crate::wasi::http::types::Host,
+        + crate::wasi::http::types::Host
+        + io::streams::Host
+        + poll::poll::Host,
 {
     linker.func_wrap(
         "wasi:http/outgoing-handler",
@@ -242,40 +250,42 @@ where
             Ok(())
         },
     )?;
-    linker.func_wrap(
+    linker.func_wrap2_async(
         "wasi:http/types",
         "future-incoming-response-get",
-        move |mut caller: Caller<'_, T>, future: u32, ptr: i32| -> anyhow::Result<()> {
-            let ctx = get_cx(caller.data_mut());
-            let response = ctx.future_incoming_response_get(future)?.unwrap_or(Ok(0));
+        move |mut caller: Caller<'_, T>, future: u32, ptr: i32| {
+            Box::new(async move {
+                let ctx = get_cx(caller.data_mut());
+                let response = ctx.future_incoming_response_get(future)?.unwrap_or(Ok(0));
 
-            let memory = memory_get(&mut caller)?;
+                let memory = memory_get(&mut caller)?;
 
-            // First == is_some
-            // Second == is_err
-            // Third == {ok: is_err = false, tag: is_err = true}
-            // Fourth == string ptr
-            // Fifth == string len
-            let result: [u32; 5] = match response {
-                Ok(value) => [1, 0, value, 0, 0],
-                Err(error) => {
-                    let (tag, err_string) = match error {
-                        Error::InvalidUrl(e) => (0u32, e),
-                        Error::TimeoutError(e) => (1u32, e),
-                        Error::ProtocolError(e) => (2u32, e),
-                        Error::UnexpectedError(e) => (3u32, e),
-                    };
-                    let bytes = err_string.as_bytes();
-                    let len = bytes.len().try_into().unwrap();
-                    let ptr = allocate_guest_pointer(&mut caller, len)?;
-                    memory.write(caller.as_context_mut(), ptr as _, bytes)?;
-                    [1, 1, tag, ptr, len]
-                }
-            };
-            let raw = u32_array_to_u8(&result);
+                // First == is_some
+                // Second == is_err
+                // Third == {ok: is_err = false, tag: is_err = true}
+                // Fourth == string ptr
+                // Fifth == string len
+                let result: [u32; 5] = match response {
+                    Ok(value) => [1, 0, value, 0, 0],
+                    Err(error) => {
+                        let (tag, err_string) = match error {
+                            Error::InvalidUrl(e) => (0u32, e),
+                            Error::TimeoutError(e) => (1u32, e),
+                            Error::ProtocolError(e) => (2u32, e),
+                            Error::UnexpectedError(e) => (3u32, e),
+                        };
+                        let bytes = err_string.as_bytes();
+                        let len = bytes.len().try_into().unwrap();
+                        let ptr = allocate_guest_pointer(&mut caller, len).await?;
+                        memory.write(caller.as_context_mut(), ptr as _, bytes)?;
+                        [1, 1, tag, ptr, len]
+                    }
+                };
+                let raw = u32_array_to_u8(&result);
 
-            memory.write(caller.as_context_mut(), ptr as _, &raw)?;
-            Ok(())
+                memory.write(caller.as_context_mut(), ptr as _, &raw)?;
+                Ok(())
+            })
         },
     )?;
     linker.func_wrap(
@@ -296,11 +306,155 @@ where
             Ok(())
         },
     )?;
-    linker.func_wrap(
-        "wasi:io/poll",
+    linker.func_wrap1_async(
+        "wasi:poll/poll",
         "drop-pollable",
-        move |_caller: Caller<'_, T>, _a: i32| -> anyhow::Result<()> {
-            anyhow::bail!("unimplemented")
+        move |mut caller: Caller<'_, T>, id: u32| {
+            Box::new(async move {
+                let ctx = get_cx(caller.data_mut());
+                poll::poll::Host::drop_pollable(ctx, id).await?;
+                Ok(())
+            })
+        },
+    )?;
+    linker.func_wrap3_async(
+        "wasi:poll/poll",
+        "poll-oneoff",
+        move |mut caller: Caller<'_, T>, base_ptr: u32, len: u32, out_ptr: u32| {
+            Box::new(async move {
+                let memory = memory_get(&mut caller)?;
+
+                let mut vec = Vec::new();
+                let mut i = 0;
+                while i < len {
+                    let ptr = base_ptr + i * 4;
+                    let pollable_ptr = u32_from_memory(&memory, caller.as_context_mut(), ptr)?;
+                    vec.push(pollable_ptr);
+                    i = i + 1;
+                }
+
+                let ctx = get_cx(caller.data_mut());
+                let result = poll::poll::Host::poll_oneoff(ctx, vec).await?;
+
+                let result_len = result.len();
+                let result_ptr =
+                    allocate_guest_pointer(&mut caller, (4 * result_len).try_into()?).await?;
+                let mut ptr = result_ptr;
+                for item in result.iter() {
+                    let completion: u32 = match item {
+                        true => 1,
+                        false => 0,
+                    };
+                    memory.write(caller.as_context_mut(), ptr as _, &completion.to_be_bytes())?;
+
+                    ptr = ptr + 4;
+                }
+
+                let result: [u32; 2] = [result_ptr, result_len.try_into()?];
+                let raw = u32_array_to_u8(&result);
+                memory.write(caller.as_context_mut(), out_ptr as _, &raw)?;
+                Ok(())
+            })
+        },
+    )?;
+    linker.func_wrap1_async(
+        "wasi:io/streams",
+        "drop-input-stream",
+        move |mut caller: Caller<'_, T>, id: u32| {
+            Box::new(async move {
+                let ctx = get_cx(caller.data_mut());
+                io::streams::Host::drop_input_stream(ctx, id).await?;
+                Ok(())
+            })
+        },
+    )?;
+    linker.func_wrap1_async(
+        "wasi:io/streams",
+        "drop-output-stream",
+        move |mut caller: Caller<'_, T>, id: u32| {
+            Box::new(async move {
+                let ctx = get_cx(caller.data_mut());
+                io::streams::Host::drop_output_stream(ctx, id).await?;
+                Ok(())
+            })
+        },
+    )?;
+    linker.func_wrap3_async(
+        "wasi:io/streams",
+        "read",
+        move |mut caller: Caller<'_, T>, stream: u32, len: u64, ptr: u32| {
+            Box::new(async move {
+                let ctx = get_cx(caller.data_mut());
+
+                let bytes_tuple = io::streams::Host::read(ctx, stream, len).await?;
+                let bytes = bytes_tuple.0;
+                let done = match bytes_tuple.1 {
+                    io::streams::StreamStatus::Open => 0,
+                    io::streams::StreamStatus::Ended => 1,
+                };
+                let body_len: u32 = bytes.len().try_into()?;
+                let out_ptr = allocate_guest_pointer(&mut caller, body_len).await?;
+                let result: [u32; 4] = [0, out_ptr, body_len, done];
+                let raw = u32_array_to_u8(&result);
+
+                let memory = memory_get(&mut caller)?;
+                memory.write(caller.as_context_mut(), out_ptr as _, &bytes)?;
+                memory.write(caller.as_context_mut(), ptr as _, &raw)?;
+                Ok(())
+            })
+        },
+    )?;
+    linker.func_wrap1_async(
+        "wasi:io/streams",
+        "subscribe-to-input-stream",
+        move |mut caller: Caller<'_, T>, stream: u32| {
+            Box::new(async move {
+                let ctx = get_cx(caller.data_mut());
+                let pollable = io::streams::Host::subscribe_to_input_stream(ctx, stream).await?;
+                Ok(pollable)
+            })
+        },
+    )?;
+    linker.func_wrap1_async(
+        "wasi:io/streams",
+        "subscribe-to-output-stream",
+        move |mut caller: Caller<'_, T>, stream: u32| {
+            Box::new(async move {
+                let ctx = get_cx(caller.data_mut());
+                let pollable = io::streams::Host::subscribe_to_output_stream(ctx, stream).await?;
+                Ok(pollable)
+            })
+        },
+    )?;
+    linker.func_wrap4_async(
+        "wasi:io/streams",
+        "write",
+        move |mut caller: Caller<'_, T>, stream: u32, body_ptr: u32, body_len: u32, ptr: u32| {
+            Box::new(async move {
+                let memory: Memory = memory_get(&mut caller)?;
+                let body =
+                    string_from_memory(&memory, caller.as_context_mut(), body_ptr, body_len)?;
+
+                let ctx = get_cx(caller.data_mut());
+
+                let result =
+                    match io::streams::Host::write(ctx, stream, body.as_bytes().to_vec()).await {
+                        Ok((len, _status)) => [0, 0, len as u32, 0, 0],
+                        Err(_error) => {
+                            let err_string = "Error while writing to stream";
+                            let bytes = err_string.as_bytes();
+                            let len = bytes.len().try_into().unwrap();
+                            let ptr = allocate_guest_pointer(&mut caller, len).await?;
+                            memory.write(caller.as_context_mut(), ptr as _, bytes)?;
+                            [1, 1, 0, ptr, len]
+                        }
+                    };
+                let raw = u32_array_to_u8(&result);
+
+                memory.write(caller.as_context_mut(), ptr as _, &raw)?;
+
+                Ok(())
+            })
         },
     )?;
     linker.func_wrap(
@@ -378,41 +532,44 @@ where
             Ok(ctx.new_fields(vec)?)
         },
     )?;
-    linker.func_wrap(
+    linker.func_wrap2_async(
         "wasi:http/types",
         "fields-entries",
-        move |mut caller: Caller<'_, T>, fields: u32, out_ptr: u32| -> anyhow::Result<()> {
-            let ctx = get_cx(caller.data_mut());
-            let entries = ctx.fields_entries(fields)?;
-
-            let header_len = entries.len();
-            let tuple_ptr = allocate_guest_pointer(&mut caller, (16 * header_len).try_into()?)?;
-            let mut ptr = tuple_ptr;
-            for item in entries.iter() {
-                let name = &item.0;
-                let value = &item.1;
-                let name_len: u32 = name.len().try_into()?;
-                let value_len: u32 = value.len().try_into()?;
-
-                let name_ptr = allocate_guest_pointer(&mut caller, name_len)?;
-                let value_ptr = allocate_guest_pointer(&mut caller, value_len)?;
+        move |mut caller: Caller<'_, T>, fields: u32, out_ptr: u32| {
+            Box::new(async move {
+                let ctx = get_cx(caller.data_mut());
+                let entries = ctx.fields_entries(fields)?;
+
+                let header_len = entries.len();
+                let tuple_ptr =
+                    allocate_guest_pointer(&mut caller, (16 * header_len).try_into()?).await?;
+                let mut ptr = tuple_ptr;
+                for item in entries.iter() {
+                    let name = &item.0;
+                    let value = &item.1;
+                    let name_len: u32 = name.len().try_into()?;
+                    let value_len: u32 = value.len().try_into()?;
+
+                    let name_ptr = allocate_guest_pointer(&mut caller, name_len).await?;
+                    let value_ptr = allocate_guest_pointer(&mut caller, value_len).await?;
+
+                    let memory = memory_get(&mut caller)?;
+                    memory.write(caller.as_context_mut(), name_ptr as _, &name.as_bytes())?;
+                    memory.write(caller.as_context_mut(), value_ptr as _, value)?;
+
+                    let pair: [u32; 4] = [name_ptr, name_len, value_ptr, value_len];
+                    let raw_pair = u32_array_to_u8(&pair);
+                    memory.write(caller.as_context_mut(), ptr as _, &raw_pair)?;
+
+                    ptr = ptr + 16;
+                }
 
                 let memory = memory_get(&mut caller)?;
-                memory.write(caller.as_context_mut(), name_ptr as _, &name.as_bytes())?;
-                memory.write(caller.as_context_mut(), value_ptr as _, value)?;
-
-                let pair: [u32; 4] = [name_ptr, name_len, value_ptr, value_len];
-                let raw_pair = u32_array_to_u8(&pair);
-                memory.write(caller.as_context_mut(), ptr as _, &raw_pair)?;
-
-                ptr = ptr + 16;
-            }
-
-            let memory = memory_get(&mut caller)?;
-            let result: [u32; 2] = [tuple_ptr, header_len.try_into()?];
-            let raw = u32_array_to_u8(&result);
-            memory.write(caller.as_context_mut(), out_ptr as _, &raw)?;
-            Ok(())
+                let result: [u32; 2] = [tuple_ptr, header_len.try_into()?];
+                let raw = u32_array_to_u8(&result);
+                memory.write(caller.as_context_mut(), out_ptr as _, &raw)?;
+                Ok(())
+            })
         },
     )?;
     linker.func_wrap(

From bacb6f0b9e505524b205f1115574f1d9e96faf38 Mon Sep 17 00:00:00 2001
From: Eduardo Rodrigues <eduardomourar@users.noreply.github.com>
Date: Wed, 9 Aug 2023 19:21:31 +0100
Subject: [PATCH 15/49] chore: update test programs for wasi http

---
 crates/test-programs/Cargo.toml               |  17 +-
 crates/test-programs/build.rs                 |  15 +-
 crates/test-programs/src/http_server.rs       |  45 ++++
 crates/test-programs/src/lib.rs               |   3 +
 .../{wasi-http.rs => wasi-http-components.rs} |  58 +-----
 .../test-programs/tests/wasi-http-modules.rs  | 109 ++++++++++
 .../test-programs/wasi-http-tests/Cargo.toml  |   7 +-
 .../src/bin/outbound_request.rs               | 100 +++++++++
 .../test-programs/wasi-http-tests/src/lib.rs  | 138 +++++++++++-
 .../wasi-http-tests/src/outbound_request.rs   | 197 ------------------
 10 files changed, 413 insertions(+), 276 deletions(-)
 create mode 100644 crates/test-programs/src/http_server.rs
 rename crates/test-programs/tests/{wasi-http.rs => wasi-http-components.rs} (59%)
 create mode 100644 crates/test-programs/tests/wasi-http-modules.rs
 create mode 100644 crates/test-programs/wasi-http-tests/src/bin/outbound_request.rs
 delete mode 100644 crates/test-programs/wasi-http-tests/src/outbound_request.rs

diff --git a/crates/test-programs/Cargo.toml b/crates/test-programs/Cargo.toml
index bd9de15696cd..38915a8e5c70 100644
--- a/crates/test-programs/Cargo.toml
+++ b/crates/test-programs/Cargo.toml
@@ -14,14 +14,22 @@ wit-component = { workspace = true }
 heck = { workspace = true }
 
 [dependencies]
+http = { version = "0.2.9" }
+http-body = "1.0.0-rc.2"
+http-body-util = "0.1.0-rc.2"
+hyper = { version = "1.0.0-rc.3", features = ["full"] }
 is-terminal = { workspace = true }
+tokio = { workspace = true, features = ["net", "rt-multi-thread", "macros"] }
 
 [dev-dependencies]
 anyhow = { workspace = true }
 tempfile = { workspace = true }
 test-log = { version = "0.2", default-features = false, features = ["trace"] }
 tracing = { workspace = true }
-tracing-subscriber = { version = "0.3.1", default-features = false, features = ['fmt', 'env-filter'] }
+tracing-subscriber = { version = "0.3.1", default-features = false, features = [
+    'fmt',
+    'env-filter',
+] }
 lazy_static = "1"
 wasmtime = { workspace = true, features = ['cranelift', 'component-model'] }
 
@@ -30,14 +38,9 @@ wasi-cap-std-sync = { workspace = true }
 wasmtime-wasi = { workspace = true, features = ["tokio"] }
 cap-std = { workspace = true }
 cap-rand = { workspace = true }
-tokio = { version = "1.8.0", features = ["net", "rt-multi-thread", "macros"] }
+tokio = { workspace = true, features = ["rt-multi-thread", "macros"] }
 
 wasmtime-wasi-http = { workspace = true }
-hyper = { version = "1.0.0-rc.3", features = ["full"] }
-http = { version = "0.2.9" }
-http-body = "1.0.0-rc.2"
-http-body-util = "0.1.0-rc.2"
 
 [features]
 test_programs = []
-test_programs_http = [ "wasmtime/component-model" ]
diff --git a/crates/test-programs/build.rs b/crates/test-programs/build.rs
index 197d404273b4..8d16007fc689 100644
--- a/crates/test-programs/build.rs
+++ b/crates/test-programs/build.rs
@@ -58,17 +58,8 @@ fn build_and_generate_tests() {
     components_rs(&meta, "wasi-tests", "bin", &command_adapter, &out_dir);
 
     if BUILD_WASI_HTTP_TESTS {
-        // modules_rs(&meta, "wasi-http-tests", "bin", &out_dir);
-        // FIXME this is broken at the moment because guest bindgen is embedding the proxy world type,
-        // so wit-component expects the module to contain the proxy's exports. we need a different
-        // world to pass guest bindgen that is just "a command that also can do outbound http"
-        components_rs(
-            &meta,
-            "wasi-http-tests",
-            "cdylib",
-            &reactor_adapter,
-            &out_dir,
-        );
+        modules_rs(&meta, "wasi-http-tests", "bin", &out_dir);
+        components_rs(&meta, "wasi-http-tests", "bin", &reactor_adapter, &out_dir);
     }
 
     components_rs(&meta, "command-tests", "bin", &command_adapter, &out_dir);
@@ -76,7 +67,7 @@ fn build_and_generate_tests() {
 }
 
 // Creates an `${out_dir}/${package}_modules.rs` file that exposes a `get_module(&str) -> Module`,
-// and a contains a `use self::{module} as _;` for each module that ensures that the user defines
+// and contains a `use self::{module} as _;` for each module that ensures that the user defines
 // a symbol (ideally a #[test]) corresponding to each module.
 fn modules_rs(meta: &cargo_metadata::Metadata, package: &str, kind: &str, out_dir: &PathBuf) {
     let modules = targets_in_package(meta, package, kind)
diff --git a/crates/test-programs/src/http_server.rs b/crates/test-programs/src/http_server.rs
new file mode 100644
index 000000000000..cfea6cb58083
--- /dev/null
+++ b/crates/test-programs/src/http_server.rs
@@ -0,0 +1,45 @@
+use http_body_util::combinators::BoxBody;
+use http_body_util::BodyExt;
+use hyper::server::conn::http1;
+use hyper::{body::Bytes, service::service_fn, Request, Response};
+use std::{error::Error, net::SocketAddr};
+use tokio::{net::TcpListener, runtime::Handle};
+
+async fn test(
+    req: Request<hyper::body::Incoming>,
+) -> http::Result<Response<BoxBody<Bytes, hyper::Error>>> {
+    let method = req.method().to_string();
+    Response::builder()
+        .status(http::StatusCode::OK)
+        .header("x-wasmtime-test-method", method)
+        .header("x-wasmtime-test-uri", req.uri().to_string())
+        .body(req.into_body().boxed())
+}
+
+async fn async_run_serve() -> Result<(), Box<dyn Error + Send + Sync>> {
+    let addr = SocketAddr::from(([127, 0, 0, 1], 3000));
+
+    let listener = TcpListener::bind(addr).await?;
+
+    loop {
+        let (stream, _) = listener.accept().await?;
+
+        tokio::task::spawn(async move {
+            if let Err(err) = http1::Builder::new()
+                .serve_connection(stream, service_fn(test))
+                .await
+            {
+                println!("Error serving connection: {:?}", err);
+            }
+        });
+    }
+}
+
+pub async fn run_server() {
+    let _thread = Handle::current().spawn(async move {
+        async_run_serve()
+            .await
+            .map_err(|err| format!("Error while running test server: {:?}", err))
+            .unwrap();
+    });
+}
diff --git a/crates/test-programs/src/lib.rs b/crates/test-programs/src/lib.rs
index 11eca7f2865f..cd3b710703c1 100644
--- a/crates/test-programs/src/lib.rs
+++ b/crates/test-programs/src/lib.rs
@@ -1,6 +1,9 @@
 ///! This crate exists to build crates for wasm32-wasi in build.rs, and execute
 ///! these wasm programs in harnesses defined under tests/.
 
+#[cfg(all(feature = "test_programs", not(skip_wasi_http_tests)))]
+pub mod http_server;
+
 /// The wasi-tests binaries use these environment variables to determine their
 /// expected behavior.
 /// Used by all of the tests/ which execute the wasi-tests binaries.
diff --git a/crates/test-programs/tests/wasi-http.rs b/crates/test-programs/tests/wasi-http-components.rs
similarity index 59%
rename from crates/test-programs/tests/wasi-http.rs
rename to crates/test-programs/tests/wasi-http-components.rs
index 096a1f8468eb..c781b0546f6f 100644
--- a/crates/test-programs/tests/wasi-http.rs
+++ b/crates/test-programs/tests/wasi-http-components.rs
@@ -1,4 +1,5 @@
 #![cfg(all(feature = "test_programs", not(skip_wasi_http_tests)))]
+use futures::future;
 use wasmtime::{
     component::{Component, Linker},
     Config, Engine, Store,
@@ -9,12 +10,7 @@ use wasmtime_wasi::preview2::{
 };
 use wasmtime_wasi_http::{WasiHttpCtx, WasiHttpView};
 
-use http_body_util::combinators::BoxBody;
-use http_body_util::BodyExt;
-use hyper::server::conn::http1;
-use hyper::{body::Bytes, service::service_fn, Request, Response};
-use std::{error::Error, net::SocketAddr};
-use tokio::{net::TcpListener, runtime::Handle};
+use test_programs::http_server;
 
 lazy_static::lazy_static! {
     static ref ENGINE: Engine = {
@@ -29,36 +25,6 @@ lazy_static::lazy_static! {
 // uses ENGINE, creates a fn get_module(&str) -> Module
 include!(concat!(env!("OUT_DIR"), "/wasi_http_tests_components.rs"));
 
-async fn test(
-    req: Request<hyper::body::Incoming>,
-) -> http::Result<Response<BoxBody<Bytes, hyper::Error>>> {
-    let method = req.method().to_string();
-    Response::builder()
-        .status(http::StatusCode::OK)
-        .header("x-wasmtime-test-method", method)
-        .header("x-wasmtime-test-uri", req.uri().to_string())
-        .body(req.into_body().boxed())
-}
-
-async fn async_run_serve() -> Result<(), Box<dyn Error + Send + Sync>> {
-    let addr = SocketAddr::from(([127, 0, 0, 1], 3000));
-
-    let listener = TcpListener::bind(addr).await?;
-
-    loop {
-        let (stream, _) = listener.accept().await?;
-
-        tokio::task::spawn(async move {
-            if let Err(err) = http1::Builder::new()
-                .serve_connection(stream, service_fn(test))
-                .await
-            {
-                println!("Error serving connection: {:?}", err);
-            }
-        });
-    }
-}
-
 struct Ctx {
     table: Table,
     wasi: WasiCtx,
@@ -89,7 +55,7 @@ impl WasiHttpView for Ctx {
     }
 }
 
-async fn instantiate(
+async fn instantiate_component(
     component: Component,
     ctx: Ctx,
 ) -> Result<(Store<Ctx>, Command), anyhow::Error> {
@@ -104,24 +70,17 @@ async fn instantiate(
 }
 
 async fn run(name: &str) -> anyhow::Result<()> {
-    let _thread = Handle::current().spawn(async move {
-        async_run_serve()
-            .await
-            .map_err(|_| anyhow::anyhow!("error while running test server"))
-            .unwrap();
-    });
-
     let mut table = Table::new();
     let component = get_component(name);
 
     // Create our wasi context.
-    let http = WasiHttpCtx::new();
     let wasi = WasiCtxBuilder::new()
         .inherit_stdio()
-        .push_arg(name)
+        .arg(name)
         .build(&mut table)?;
+    let http = WasiHttpCtx::new();
 
-    let (mut store, command) = instantiate(component, Ctx { table, wasi, http }).await?;
+    let (mut store, command) = instantiate_component(component, Ctx { table, wasi, http }).await?;
     command
         .call_run(&mut store)
         .await
@@ -130,6 +89,7 @@ async fn run(name: &str) -> anyhow::Result<()> {
 }
 
 #[test_log::test(tokio::test(flavor = "multi_thread"))]
-async fn wasi_http_tests() {
-    run("wasi_http_tests").await.unwrap()
+async fn outbound_request() {
+    let (_, result) = future::join(http_server::run_server(), run("outbound_request")).await;
+    result.unwrap();
 }
diff --git a/crates/test-programs/tests/wasi-http-modules.rs b/crates/test-programs/tests/wasi-http-modules.rs
new file mode 100644
index 000000000000..20756f45b7f6
--- /dev/null
+++ b/crates/test-programs/tests/wasi-http-modules.rs
@@ -0,0 +1,109 @@
+#![cfg(all(feature = "test_programs", not(skip_wasi_http_tests)))]
+use futures::future;
+use wasmtime::{Config, Engine, Func, Linker, Module, Store};
+use wasmtime_wasi::preview2::{
+    preview1::{WasiPreview1Adapter, WasiPreview1View},
+    Table, WasiCtx, WasiCtxBuilder, WasiView,
+};
+use wasmtime_wasi_http::{WasiHttpCtx, WasiHttpView};
+
+use test_programs::http_server;
+
+lazy_static::lazy_static! {
+    static ref ENGINE: Engine = {
+        let mut config = Config::new();
+        config.wasm_backtrace_details(wasmtime::WasmBacktraceDetails::Enable);
+        config.wasm_component_model(true);
+        config.async_support(true);
+
+        let engine = Engine::new(&config).unwrap();
+        engine
+    };
+}
+// uses ENGINE, creates a fn get_module(&str) -> Module
+include!(concat!(env!("OUT_DIR"), "/wasi_http_tests_modules.rs"));
+
+struct Ctx {
+    table: Table,
+    wasi: WasiCtx,
+    adapter: WasiPreview1Adapter,
+    http: WasiHttpCtx,
+}
+
+impl WasiView for Ctx {
+    fn table(&self) -> &Table {
+        &self.table
+    }
+    fn table_mut(&mut self) -> &mut Table {
+        &mut self.table
+    }
+    fn ctx(&self) -> &WasiCtx {
+        &self.wasi
+    }
+    fn ctx_mut(&mut self) -> &mut WasiCtx {
+        &mut self.wasi
+    }
+}
+impl WasiPreview1View for Ctx {
+    fn adapter(&self) -> &WasiPreview1Adapter {
+        &self.adapter
+    }
+    fn adapter_mut(&mut self) -> &mut WasiPreview1Adapter {
+        &mut self.adapter
+    }
+}
+impl WasiHttpView for Ctx {
+    fn http_ctx(&self) -> &WasiHttpCtx {
+        &self.http
+    }
+    fn http_ctx_mut(&mut self) -> &mut WasiHttpCtx {
+        &mut self.http
+    }
+}
+
+async fn instantiate_module(module: Module, ctx: Ctx) -> Result<(Store<Ctx>, Func), anyhow::Error> {
+    let mut linker = Linker::new(&ENGINE);
+    wasmtime_wasi_http::add_to_linker(&mut linker)?;
+    wasmtime_wasi::preview2::preview1::add_to_linker(&mut linker)?;
+
+    let mut store = Store::new(&ENGINE, ctx);
+
+    let instance = linker.instantiate_async(&mut store, &module).await?;
+    let command = instance.get_func(&mut store, "run").unwrap();
+    Ok((store, command))
+}
+
+async fn run(name: &str) -> anyhow::Result<()> {
+    let mut table = Table::new();
+    let module = get_module(name);
+
+    // Create our wasi context.
+    let wasi = WasiCtxBuilder::new()
+        .inherit_stdio()
+        .arg(name)
+        .build(&mut table)?;
+    let http = WasiHttpCtx::new();
+
+    let adapter = WasiPreview1Adapter::new();
+
+    let (mut store, command) = instantiate_module(
+        module,
+        Ctx {
+            table,
+            wasi,
+            http,
+            adapter,
+        },
+    )
+    .await?;
+    command
+        .call_async(&mut store, &[], &mut [wasmtime::Val::null()])
+        .await
+        .map_err(|e| anyhow::anyhow!("command returned with failing exit status {e:?}"))
+}
+
+#[test_log::test(tokio::test(flavor = "multi_thread"))]
+async fn outbound_request() {
+    let (_, result) = future::join(http_server::run_server(), run("outbound_request")).await;
+    result.unwrap();
+}
diff --git a/crates/test-programs/wasi-http-tests/Cargo.toml b/crates/test-programs/wasi-http-tests/Cargo.toml
index da90a0094bc9..14206c3bbaa4 100644
--- a/crates/test-programs/wasi-http-tests/Cargo.toml
+++ b/crates/test-programs/wasi-http-tests/Cargo.toml
@@ -5,9 +5,8 @@ readme = "README.md"
 edition = "2021"
 publish = false
 
-[lib]
-crate-type = ["cdylib"]
-
 [dependencies]
 anyhow = { workspace = true }
-wit-bindgen = { workspace = true, features = ["macros", "realloc"] }
+wit-bindgen = { workspace = true, default-features = false, features = [
+    "macros",
+] }
diff --git a/crates/test-programs/wasi-http-tests/src/bin/outbound_request.rs b/crates/test-programs/wasi-http-tests/src/bin/outbound_request.rs
new file mode 100644
index 000000000000..5e7247b8662c
--- /dev/null
+++ b/crates/test-programs/wasi-http-tests/src/bin/outbound_request.rs
@@ -0,0 +1,100 @@
+use anyhow::{Context, Result};
+use wasi_http_tests::{
+    bindings::{
+        wasi::http::types::{Method, Scheme},
+        CommandExtended,
+    },
+    request,
+};
+
+struct Component;
+
+fn main() -> Result<()> {
+    let r1 = request(
+        Method::Get,
+        Scheme::Http,
+        "localhost:3000",
+        "/get?some=arg&goes=here",
+        None,
+    )
+    .context("localhost:3000 /get")?;
+
+    println!("localhost:3000 /get: {r1:?}");
+    assert_eq!(r1.status, 200);
+    let method = r1.header("x-wasmtime-test-method").unwrap();
+    assert_eq!(std::str::from_utf8(method).unwrap(), "GET");
+    let uri = r1.header("x-wasmtime-test-uri").unwrap();
+    assert_eq!(
+        std::str::from_utf8(uri).unwrap(),
+        "http://localhost:3000/get?some=arg&goes=here"
+    );
+    assert_eq!(r1.body, b"");
+
+    let r2 = request(
+        Method::Post,
+        Scheme::Http,
+        "localhost:3000",
+        "/post",
+        Some(b"{\"foo\": \"bar\"}"),
+    )
+    .context("localhost:3000 /post")?;
+
+    println!("localhost:3000 /post: {r2:?}");
+    assert_eq!(r2.status, 200);
+    let method = r2.header("x-wasmtime-test-method").unwrap();
+    assert_eq!(std::str::from_utf8(method).unwrap(), "POST");
+    assert_eq!(r2.body, b"{\"foo\": \"bar\"}");
+
+    let r3 = request(
+        Method::Put,
+        Scheme::Http,
+        "localhost:3000",
+        "/put",
+        Some(&[]),
+    )
+    .context("localhost:3000 /put")?;
+
+    println!("localhost:3000 /put: {r3:?}");
+    assert_eq!(r3.status, 200);
+    let method = r3.header("x-wasmtime-test-method").unwrap();
+    assert_eq!(std::str::from_utf8(method).unwrap(), "PUT");
+    assert_eq!(r3.body, b"");
+
+    let r4 = request(
+        Method::Other("OTHER".to_owned()),
+        Scheme::Http,
+        "localhost:3000",
+        "/",
+        None,
+    );
+
+    let error = r4.unwrap_err();
+    assert_eq!(
+        error.to_string(),
+        "Error::UnexpectedError(\"unknown method OTHER\")"
+    );
+
+    let r5 = request(
+        Method::Get,
+        Scheme::Other("WS".to_owned()),
+        "localhost:3000",
+        "/",
+        None,
+    );
+
+    let error = r5.unwrap_err();
+    assert_eq!(
+        error.to_string(),
+        "Error::UnexpectedError(\"unsupported scheme WS\")"
+    );
+
+    Ok(())
+}
+
+impl CommandExtended for Component {
+    fn run() -> Result<(), ()> {
+        main().map_err(|e| eprintln!("{e:?}"))
+    }
+}
+
+wasi_http_tests::export_command_extended!(Component);
diff --git a/crates/test-programs/wasi-http-tests/src/lib.rs b/crates/test-programs/wasi-http-tests/src/lib.rs
index 0d065d613327..a3189b142277 100644
--- a/crates/test-programs/wasi-http-tests/src/lib.rs
+++ b/crates/test-programs/wasi-http-tests/src/lib.rs
@@ -1,13 +1,137 @@
-mod outbound_request;
+pub mod bindings {
+    wit_bindgen::generate!({
+        path: "../../wasi/wit",
+        world: "wasi:preview/command-extended",
+        macro_call_prefix: "::wasi_http_tests::bindings::",
+        macro_export,
+    });
+}
 
-wit_bindgen::generate!("wasi:preview/command-extended" in "../../wasi/wit");
+use anyhow::{anyhow, Context, Result};
+use std::fmt;
 
-struct Component;
+use bindings::wasi::http::{outgoing_handler, types as http_types};
+use bindings::wasi::io::streams;
+use bindings::wasi::poll::poll;
 
-impl CommandExtended for Component {
-    fn run() -> Result<(), ()> {
-        outbound_request::main().map_err(|e| eprintln!("{e:?}"))
+pub struct Response {
+    pub status: http_types::StatusCode,
+    pub headers: Vec<(String, Vec<u8>)>,
+    pub body: Vec<u8>,
+}
+impl fmt::Debug for Response {
+    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
+        let mut out = f.debug_struct("Response");
+        out.field("status", &self.status)
+            .field("headers", &self.headers);
+        if let Ok(body) = std::str::from_utf8(&self.body) {
+            out.field("body", &body);
+        } else {
+            out.field("body", &self.body);
+        }
+        out.finish()
     }
 }
 
-export_command_extended!(Component);
+impl Response {
+    pub fn header(&self, name: &str) -> Option<&Vec<u8>> {
+        self.headers
+            .iter()
+            .find_map(|(k, v)| if k == name { Some(v) } else { None })
+    }
+}
+
+pub fn request(
+    method: http_types::Method,
+    scheme: http_types::Scheme,
+    authority: &str,
+    path_with_query: &str,
+    body: Option<&[u8]>,
+) -> Result<Response> {
+    let headers = http_types::new_fields(&[
+        ("User-agent".to_string(), "WASI-HTTP/0.0.1".to_string()),
+        ("Content-type".to_string(), "application/json".to_string()),
+    ]);
+
+    let request = http_types::new_outgoing_request(
+        &method,
+        Some(path_with_query),
+        Some(&scheme),
+        Some(authority),
+        headers,
+    );
+
+    let request_body = http_types::outgoing_request_write(request)
+        .map_err(|_| anyhow!("outgoing request write failed"))?;
+
+    if let Some(body) = body {
+        let output_stream_pollable = streams::subscribe_to_output_stream(request_body);
+
+        let mut body_cursor = 0;
+        while body_cursor < body.len() {
+            let (written, _) = streams::write(request_body, &body[body_cursor..])
+                .context("writing request body")?;
+            body_cursor += written as usize;
+        }
+
+        // TODO: enable when working as expected
+        // let _ = poll::poll_oneoff(&[output_stream_pollable]);
+
+        poll::drop_pollable(output_stream_pollable);
+    }
+
+    let future_response = outgoing_handler::handle(request, None);
+
+    let incoming_response = http_types::future_incoming_response_get(future_response)
+        .ok_or_else(|| anyhow!("incoming response is available immediately"))?
+        // TODO: maybe anything that appears in the Result<_, E> position should impl
+        // Error? anyway, just use its Debug here:
+        .map_err(|e| anyhow!("{e:?}"))?;
+
+    // TODO: The current implementation requires this drop after the request is sent.
+    // The ownership semantics are unclear in wasi-http we should clarify exactly what is
+    // supposed to happen here.
+    streams::drop_output_stream(request_body);
+
+    // TODO: we could create a pollable from the future_response and poll on it here to test that
+    // its available immediately
+
+    http_types::drop_outgoing_request(request);
+
+    http_types::drop_future_incoming_response(future_response);
+
+    let status = http_types::incoming_response_status(incoming_response);
+
+    let headers_handle = http_types::incoming_response_headers(incoming_response);
+    let headers = http_types::fields_entries(headers_handle);
+    http_types::drop_fields(headers_handle);
+
+    let body_stream = http_types::incoming_response_consume(incoming_response)
+        .map_err(|()| anyhow!("incoming response has no body stream"))?;
+    let input_stream_pollable = streams::subscribe_to_input_stream(body_stream);
+
+    let mut body = Vec::new();
+    let mut eof = streams::StreamStatus::Open;
+    while eof != streams::StreamStatus::Ended {
+        let (mut body_chunk, stream_status) = streams::read(body_stream, u64::MAX)?;
+        eof = if body_chunk.is_empty() {
+            streams::StreamStatus::Ended
+        } else {
+            stream_status
+        };
+        body.append(&mut body_chunk);
+    }
+
+    // TODO: enable when working as expected
+    // let _ = poll::poll_oneoff(&[input_stream_pollable]);
+
+    poll::drop_pollable(input_stream_pollable);
+    streams::drop_input_stream(body_stream);
+    http_types::drop_incoming_response(incoming_response);
+
+    Ok(Response {
+        status,
+        headers,
+        body,
+    })
+}
diff --git a/crates/test-programs/wasi-http-tests/src/outbound_request.rs b/crates/test-programs/wasi-http-tests/src/outbound_request.rs
deleted file mode 100644
index 72ab49de091b..000000000000
--- a/crates/test-programs/wasi-http-tests/src/outbound_request.rs
+++ /dev/null
@@ -1,197 +0,0 @@
-use anyhow::{anyhow, Context, Result};
-use std::fmt;
-
-use crate::wasi::http::{outgoing_handler, types as http_types};
-use crate::wasi::io::streams;
-
-struct Response {
-    status: http_types::StatusCode,
-    headers: Vec<(String, Vec<u8>)>,
-    body: Vec<u8>,
-}
-impl fmt::Debug for Response {
-    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
-        let mut out = f.debug_struct("Response");
-        out.field("status", &self.status)
-            .field("headers", &self.headers);
-        if let Ok(body) = std::str::from_utf8(&self.body) {
-            out.field("body", &body);
-        } else {
-            out.field("body", &self.body);
-        }
-        out.finish()
-    }
-}
-
-impl Response {
-    fn header(&self, name: &str) -> Option<&Vec<u8>> {
-        self.headers
-            .iter()
-            .find_map(|(k, v)| if k == name { Some(v) } else { None })
-    }
-}
-
-fn request(
-    method: http_types::Method,
-    scheme: http_types::Scheme,
-    authority: &str,
-    path_with_query: &str,
-    body: Option<&[u8]>,
-) -> Result<Response> {
-    let headers = crate::wasi::http::types::new_fields(&[
-        ("User-agent".to_string(), "WASI-HTTP/0.0.1".to_string()),
-        ("Content-type".to_string(), "application/json".to_string()),
-    ]);
-
-    let request = http_types::new_outgoing_request(
-        &method,
-        Some(&path_with_query),
-        Some(&scheme),
-        Some(&authority),
-        headers,
-    );
-
-    let request_body = http_types::outgoing_request_write(request)
-        .map_err(|_| anyhow!("outgoing request write failed"))?;
-
-    if let Some(body) = body {
-        let mut body_cursor = 0;
-        while body_cursor < body.len() {
-            let (written, _) = streams::write(request_body, &body[body_cursor..])
-                .context("writing request body")?;
-            body_cursor += written as usize;
-        }
-    }
-
-    let future_response = outgoing_handler::handle(request, None);
-
-    let incoming_response = http_types::future_incoming_response_get(future_response)
-        .ok_or_else(|| anyhow!("incoming response is available immediately"))?
-        // TODO: maybe anything that appears in the Result<_, E> position should impl
-        // Error? anyway, just use its Debug here:
-        .map_err(|e| anyhow!("{e:?}"))?;
-
-    // TODO: The current implementation requires this drop after the request is sent.
-    // The ownership semantics are unclear in wasi-http we should clarify exactly what is
-    // supposed to happen here.
-    streams::drop_output_stream(request_body);
-
-    // TODO: we could create a pollable from the future_response and poll on it here to test that
-    // its available immediately
-
-    http_types::drop_outgoing_request(request);
-
-    http_types::drop_future_incoming_response(future_response);
-
-    let status = http_types::incoming_response_status(incoming_response);
-
-    let headers_handle = http_types::incoming_response_headers(incoming_response);
-    let headers = http_types::fields_entries(headers_handle);
-    http_types::drop_fields(headers_handle);
-
-    let body_stream = http_types::incoming_response_consume(incoming_response)
-        .map_err(|()| anyhow!("incoming response has no body stream"))?;
-
-    let mut body = Vec::new();
-    let mut eof = streams::StreamStatus::Open;
-    while eof != streams::StreamStatus::Ended {
-        let (mut body_chunk, stream_status) = streams::read(body_stream, u64::MAX)?;
-        eof = if body_chunk.len() == 0 {
-            streams::StreamStatus::Ended
-        } else {
-            stream_status
-        };
-        body.append(&mut body_chunk);
-    }
-
-    streams::drop_input_stream(body_stream);
-    http_types::drop_incoming_response(incoming_response);
-
-    Ok(Response {
-        status,
-        headers,
-        body,
-    })
-}
-
-pub fn main() -> Result<()> {
-    let r1 = request(
-        http_types::Method::Get,
-        http_types::Scheme::Http,
-        "localhost:3000",
-        "/get?some=arg&goes=here",
-        None,
-    )
-    .context("localhost:3000 /get")?;
-
-    println!("localhost:3000 /get: {r1:?}");
-    assert_eq!(r1.status, 200);
-    let method = r1.header("x-wasmtime-test-method").unwrap();
-    assert_eq!(std::str::from_utf8(method).unwrap(), "GET");
-    let uri = r1.header("x-wasmtime-test-uri").unwrap();
-    assert_eq!(
-        std::str::from_utf8(uri).unwrap(),
-        "http://localhost:3000/get?some=arg&goes=here"
-    );
-    assert_eq!(r1.body, b"");
-
-    let r2 = request(
-        http_types::Method::Post,
-        http_types::Scheme::Http,
-        "localhost:3000",
-        "/post",
-        Some(b"{\"foo\": \"bar\"}"),
-    )
-    .context("localhost:3000 /post")?;
-
-    println!("localhost:3000 /post: {r2:?}");
-    assert_eq!(r2.status, 200);
-    let method = r2.header("x-wasmtime-test-method").unwrap();
-    assert_eq!(std::str::from_utf8(method).unwrap(), "POST");
-    assert_eq!(r2.body, b"{\"foo\": \"bar\"}");
-
-    let r3 = request(
-        http_types::Method::Put,
-        http_types::Scheme::Http,
-        "localhost:3000",
-        "/put",
-        Some(&[]),
-    )
-    .context("localhost:3000 /put")?;
-
-    println!("localhost:3000 /put: {r3:?}");
-    assert_eq!(r3.status, 200);
-    let method = r3.header("x-wasmtime-test-method").unwrap();
-    assert_eq!(std::str::from_utf8(method).unwrap(), "PUT");
-    assert_eq!(r3.body, b"");
-
-    let r4 = request(
-        http_types::Method::Other("OTHER".to_owned()),
-        http_types::Scheme::Http,
-        "localhost:3000",
-        "/",
-        None,
-    );
-
-    let error = r4.unwrap_err();
-    assert_eq!(
-        error.to_string(),
-        "Error::UnexpectedError(\"unknown method OTHER\")"
-    );
-
-    let r5 = request(
-        http_types::Method::Get,
-        http_types::Scheme::Other("WS".to_owned()),
-        "localhost:3000",
-        "/",
-        None,
-    );
-
-    let error = r5.unwrap_err();
-    assert_eq!(
-        error.to_string(),
-        "Error::UnexpectedError(\"unsupported scheme WS\")"
-    );
-
-    Ok(())
-}

From 3bde6a6d95d10e1b29efb0e7390fe0725ac297d4 Mon Sep 17 00:00:00 2001
From: Eduardo Rodrigues <eduardomourar@users.noreply.github.com>
Date: Wed, 9 Aug 2023 19:25:41 +0100
Subject: [PATCH 16/49] fix(wasi-http): ensure proper errors are surfaced

---
 crates/wasi-http/src/http_impl.rs  |  87 ++++++++++++++++---------
 crates/wasi-http/src/lib.rs        |  90 +++++++++++++++++++++++++
 crates/wasi-http/src/types_impl.rs | 101 +++++++++++++++++------------
 3 files changed, 206 insertions(+), 72 deletions(-)

diff --git a/crates/wasi-http/src/http_impl.rs b/crates/wasi-http/src/http_impl.rs
index 7a59220c6c40..1a19068817ec 100644
--- a/crates/wasi-http/src/http_impl.rs
+++ b/crates/wasi-http/src/http_impl.rs
@@ -2,7 +2,7 @@ use crate::r#struct::{ActiveFields, ActiveFuture, ActiveResponse, HttpResponse,
 use crate::wasi::http::types::{FutureIncomingResponse, OutgoingRequest, RequestOptions, Scheme};
 pub use crate::{WasiHttpCtx, WasiHttpView};
 #[cfg(not(any(target_arch = "riscv64", target_arch = "s390x")))]
-use anyhow::{anyhow, bail, Context};
+use anyhow::Context;
 use bytes::{Bytes, BytesMut};
 use http_body_util::{BodyExt, Empty, Full};
 use hyper::{Method, Request};
@@ -13,15 +13,7 @@ use tokio::net::TcpStream;
 use tokio::time::timeout;
 #[cfg(not(any(target_arch = "riscv64", target_arch = "s390x")))]
 use tokio_rustls::rustls::{self, OwnedTrustAnchor};
-use wasmtime_wasi::preview2::{StreamState, TableError, TableStreamExt};
-
-fn convert(error: TableError) -> anyhow::Error {
-    // if let Some(errno) = error.downcast_ref() {
-    //     anyhow::Error::new(crate::types::Error::UnexpectedError(errno.to_string()))
-    // } else {
-    error.into()
-    // }
-}
+use wasmtime_wasi::preview2::{StreamState, TableStreamExt};
 
 impl<T: WasiHttpView> crate::wasi::http::outgoing_handler::Host for T {
     fn handle(
@@ -56,7 +48,7 @@ pub trait WasiHttpViewExt {
         &mut self,
         request_id: OutgoingRequest,
         options: Option<RequestOptions>,
-    ) -> wasmtime::Result<FutureIncomingResponse>;
+    ) -> wasmtime::Result<FutureIncomingResponse, crate::wasi::http::types::Error>;
 }
 
 #[async_trait::async_trait]
@@ -65,7 +57,7 @@ impl<T: WasiHttpView> WasiHttpViewExt for T {
         &mut self,
         request_id: OutgoingRequest,
         options: Option<RequestOptions>,
-    ) -> wasmtime::Result<FutureIncomingResponse> {
+    ) -> wasmtime::Result<FutureIncomingResponse, crate::wasi::http::types::Error> {
         let opts = options.unwrap_or(
             // TODO: Configurable defaults here?
             RequestOptions {
@@ -84,7 +76,7 @@ impl<T: WasiHttpView> WasiHttpViewExt for T {
         let request = self
             .table()
             .get_request(request_id)
-            .map_err(convert)?
+            .context("[handle_async] getting request")?
             .clone();
 
         let method = match request.method() {
@@ -97,13 +89,25 @@ impl<T: WasiHttpView> WasiHttpViewExt for T {
             crate::wasi::http::types::Method::Options => Method::OPTIONS,
             crate::wasi::http::types::Method::Trace => Method::TRACE,
             crate::wasi::http::types::Method::Patch => Method::PATCH,
-            crate::wasi::http::types::Method::Other(s) => bail!("unknown method {}", s),
+            crate::wasi::http::types::Method::Other(s) => {
+                return Err(crate::wasi::http::types::Error::InvalidUrl(format!(
+                    "unknown method {}",
+                    s
+                ))
+                .into());
+            }
         };
 
         let scheme = match request.scheme().as_ref().unwrap_or(&Scheme::Https) {
             Scheme::Http => "http://",
             Scheme::Https => "https://",
-            Scheme::Other(s) => bail!("unsupported scheme {}", s),
+            Scheme::Other(s) => {
+                return Err(crate::wasi::http::types::Error::InvalidUrl(format!(
+                    "unsupported scheme {}",
+                    s
+                ))
+                .into());
+            }
         };
 
         // Largely adapted from https://hyper.rs/guides/1/client/basic/
@@ -111,10 +115,10 @@ impl<T: WasiHttpView> WasiHttpViewExt for T {
             Some(_) => request.authority().to_owned(),
             None => request.authority().to_owned() + port_for_scheme(request.scheme()),
         };
+        let tcp_stream = TcpStream::connect(authority.clone()).await?;
         let mut sender = if scheme == "https://" {
             #[cfg(not(any(target_arch = "riscv64", target_arch = "s390x")))]
             {
-                let stream = TcpStream::connect(authority.clone()).await?;
                 //TODO: uncomment this code and make the tls implementation a feature decision.
                 //let connector = tokio_native_tls::native_tls::TlsConnector::builder().build()?;
                 //let connector = tokio_native_tls::TlsConnector::from(connector);
@@ -139,9 +143,11 @@ impl<T: WasiHttpView> WasiHttpViewExt for T {
                 let connector = tokio_rustls::TlsConnector::from(Arc::new(config));
                 let mut parts = authority.split(":");
                 let host = parts.next().unwrap_or(&authority);
-                let domain =
-                    rustls::ServerName::try_from(host).map_err(|_| anyhow!("invalid dnsname"))?;
-                let stream = connector.connect(domain, stream).await?;
+                let domain = rustls::ServerName::try_from(host)?;
+                let stream = connector
+                    .connect(domain, tcp_stream)
+                    .await
+                    .map_err(|e| crate::wasi::http::types::Error::ProtocolError(e.to_string()))?;
 
                 let t = timeout(
                     connect_timeout,
@@ -157,10 +163,15 @@ impl<T: WasiHttpView> WasiHttpViewExt for T {
                 s
             }
             #[cfg(any(target_arch = "riscv64", target_arch = "s390x"))]
-            bail!("unsupported architecture for SSL")
+            return Err(crate::wasi::http::types::Error::UnexpectedError(
+                "unsupported architecture for SSL",
+            ));
         } else {
-            let tcp = TcpStream::connect(authority).await?;
-            let t = timeout(connect_timeout, hyper::client::conn::http1::handshake(tcp)).await?;
+            let t = timeout(
+                connect_timeout,
+                hyper::client::conn::http1::handshake(tcp_stream),
+            )
+            .await?;
             let (s, conn) = t?;
             tokio::task::spawn(async move {
                 if let Err(err) = conn.await {
@@ -178,7 +189,12 @@ impl<T: WasiHttpView> WasiHttpViewExt for T {
             .header(hyper::header::HOST, request.authority());
 
         if let Some(headers) = request.headers() {
-            for (key, val) in self.table().get_fields(headers)?.iter() {
+            for (key, val) in self
+                .table()
+                .get_fields(headers)
+                .context("[handle_async] getting request headers")?
+                .iter()
+            {
                 for item in val {
                     call = call.header(key, item.clone());
                 }
@@ -189,13 +205,17 @@ impl<T: WasiHttpView> WasiHttpViewExt for T {
         let body = match request.body() {
             Some(id) => {
                 let table = self.table_mut();
-                let stream = table.get_stream(id)?;
-                let input_stream = table.get_input_stream_mut(stream.incoming())?;
+                let stream = table
+                    .get_stream(id)
+                    .context("[handle_async] getting stream")?;
+                let input_stream = table
+                    .get_input_stream_mut(stream.incoming())
+                    .context("[handle_async] getting mutable input stream")?;
                 let mut bytes = BytesMut::new();
                 let mut eof = StreamState::Open;
                 while eof != StreamState::Closed {
                     let (chunk, state) = input_stream.read(4096)?;
-                    eof = if chunk.len() == 0 {
+                    eof = if chunk.is_empty() {
                         StreamState::Closed
                     } else {
                         state
@@ -208,7 +228,7 @@ impl<T: WasiHttpView> WasiHttpViewExt for T {
         };
         let t = timeout(first_bytes_timeout, sender.send_request(call.body(body)?)).await?;
         let mut res = t?;
-        response.status = res.status().try_into()?;
+        response.status = res.status().as_u16();
 
         let mut map = ActiveFields::new();
         for (key, value) in res.headers().iter() {
@@ -219,7 +239,7 @@ impl<T: WasiHttpView> WasiHttpViewExt for T {
         let headers = self
             .table_mut()
             .push_fields(Box::new(map))
-            .map_err(convert)?;
+            .context("[handle_async] pushing response headers")?;
         response.set_headers(headers);
 
         let mut buf: Vec<u8> = Vec::new();
@@ -244,7 +264,7 @@ impl<T: WasiHttpView> WasiHttpViewExt for T {
                 let trailers = self
                     .table_mut()
                     .push_fields(Box::new(map))
-                    .map_err(convert)?;
+                    .context("[handle_async] pushing response trailers")?;
                 response.set_trailers(trailers);
             }
         }
@@ -252,12 +272,15 @@ impl<T: WasiHttpView> WasiHttpViewExt for T {
         let response_id = self
             .table_mut()
             .push_response(Box::new(response))
-            .context("pushing response")?;
+            .context("[handle_async] pushing response")?;
         let (stream_id, stream) = self
             .table_mut()
             .push_stream(Bytes::from(buf), response_id)
-            .context("pushing stream")?;
-        let response = self.table_mut().get_response_mut(response_id)?;
+            .context("[handle_async] pushing stream")?;
+        let response = self
+            .table_mut()
+            .get_response_mut(response_id)
+            .context("[handle_async] getting mutable response")?;
         response.set_body(stream_id);
 
         self.http_ctx_mut().streams.insert(stream_id, stream);
diff --git a/crates/wasi-http/src/lib.rs b/crates/wasi-http/src/lib.rs
index 991c591d7baa..0bfcc67d4755 100644
--- a/crates/wasi-http/src/lib.rs
+++ b/crates/wasi-http/src/lib.rs
@@ -1,6 +1,8 @@
 use crate::component_impl::add_component_to_linker;
 pub use crate::http_impl::WasiHttpViewExt;
 pub use crate::r#struct::{WasiHttpCtx, WasiHttpView};
+use core::fmt::Formatter;
+use std::fmt::{self, Display};
 
 wasmtime::component::bindgen!({
     path: "wasi-http/wit",
@@ -39,3 +41,91 @@ where
 {
     add_component_to_linker::<T>(linker, |t| t)
 }
+
+impl std::error::Error for crate::wasi::http::types::Error {}
+
+impl Display for crate::wasi::http::types::Error {
+    fn fmt(&self, f: &mut Formatter<'_>) -> fmt::Result {
+        match self {
+            crate::wasi::http::types::Error::InvalidUrl(m) => {
+                write!(f, "[InvalidUrl] {}", m)
+            }
+            crate::wasi::http::types::Error::ProtocolError(m) => {
+                write!(f, "[ProtocolError] {}", m)
+            }
+            crate::wasi::http::types::Error::TimeoutError(m) => {
+                write!(f, "[TimeoutError] {}", m)
+            }
+            crate::wasi::http::types::Error::UnexpectedError(m) => {
+                write!(f, "[UnexpectedError] {}", m)
+            }
+        }
+    }
+}
+
+impl From<wasmtime_wasi::preview2::TableError> for crate::wasi::http::types::Error {
+    fn from(err: wasmtime_wasi::preview2::TableError) -> Self {
+        Self::UnexpectedError(err.to_string())
+    }
+}
+
+impl From<anyhow::Error> for crate::wasi::http::types::Error {
+    fn from(err: anyhow::Error) -> Self {
+        Self::UnexpectedError(err.to_string())
+    }
+}
+
+impl From<std::io::Error> for crate::wasi::http::types::Error {
+    fn from(err: std::io::Error) -> Self {
+        let message = err.to_string();
+        match err.kind() {
+            std::io::ErrorKind::InvalidInput => Self::InvalidUrl(message),
+            std::io::ErrorKind::AddrNotAvailable => Self::InvalidUrl(message),
+            _ => {
+                if message.starts_with("failed to lookup address information") {
+                    Self::InvalidUrl("invalid dnsname".to_string())
+                } else {
+                    Self::ProtocolError(message)
+                }
+            }
+        }
+    }
+}
+
+impl From<http::Error> for crate::wasi::http::types::Error {
+    fn from(err: http::Error) -> Self {
+        Self::InvalidUrl(err.to_string())
+    }
+}
+
+impl From<hyper::Error> for crate::wasi::http::types::Error {
+    fn from(err: hyper::Error) -> Self {
+        let message = err.message().to_string();
+        if err.is_timeout() {
+            Self::TimeoutError(message)
+        } else if err.is_parse_status() || err.is_user() {
+            Self::InvalidUrl(message)
+        } else if err.is_body_write_aborted()
+            || err.is_canceled()
+            || err.is_closed()
+            || err.is_incomplete_message()
+        {
+            Self::ProtocolError(message)
+        } else {
+            Self::UnexpectedError(message)
+        }
+    }
+}
+
+impl From<tokio::time::error::Elapsed> for crate::wasi::http::types::Error {
+    fn from(err: tokio::time::error::Elapsed) -> Self {
+        Self::TimeoutError(err.to_string())
+    }
+}
+
+#[cfg(not(any(target_arch = "riscv64", target_arch = "s390x")))]
+impl From<rustls::client::InvalidDnsNameError> for crate::wasi::http::types::Error {
+    fn from(_err: rustls::client::InvalidDnsNameError) -> Self {
+        Self::InvalidUrl("invalid dnsname".to_string())
+    }
+}
diff --git a/crates/wasi-http/src/types_impl.rs b/crates/wasi-http/src/types_impl.rs
index 5fb55191f842..feba22e61ed5 100644
--- a/crates/wasi-http/src/types_impl.rs
+++ b/crates/wasi-http/src/types_impl.rs
@@ -8,19 +8,13 @@ use crate::wasi::http::types::{
 use crate::WasiHttpView;
 use anyhow::{anyhow, bail, Context};
 use bytes::Bytes;
-use wasmtime_wasi::preview2::{bindings::poll::poll::Pollable, TableError};
-
-fn convert(error: TableError) -> anyhow::Error {
-    // if let Some(errno) = error.downcast_ref() {
-    //     Error::UnexpectedError(errno.to_string())
-    // } else {
-    error.into()
-    // }
-}
+use wasmtime_wasi::preview2::bindings::poll::poll::Pollable;
 
 impl<T: WasiHttpView + WasiHttpViewExt> crate::wasi::http::types::Host for T {
     fn drop_fields(&mut self, fields: Fields) -> wasmtime::Result<()> {
-        self.table_mut().delete_fields(fields).map_err(convert)?;
+        self.table_mut()
+            .delete_fields(fields)
+            .context("[drop_fields] deleting fields")?;
         Ok(())
     }
     fn new_fields(&mut self, entries: Vec<(String, String)>) -> wasmtime::Result<Fields> {
@@ -32,14 +26,14 @@ impl<T: WasiHttpView + WasiHttpViewExt> crate::wasi::http::types::Host for T {
         let id = self
             .table_mut()
             .push_fields(Box::new(map))
-            .map_err(convert)?;
+            .context("[new_fields] pushing fields")?;
         Ok(id)
     }
     fn fields_get(&mut self, fields: Fields, name: String) -> wasmtime::Result<Vec<Vec<u8>>> {
         let res = self
             .table_mut()
             .get_fields(fields)
-            .map_err(convert)?
+            .context("[fields_get] getting fields")?
             .get(&name)
             .ok_or_else(|| anyhow!("key not found: {name}"))?
             .clone();
@@ -72,7 +66,10 @@ impl<T: WasiHttpView + WasiHttpViewExt> crate::wasi::http::types::Host for T {
         name: String,
         value: Vec<u8>,
     ) -> wasmtime::Result<()> {
-        let m = self.table_mut().get_fields_mut(fields).map_err(convert)?;
+        let m = self
+            .table_mut()
+            .get_fields_mut(fields)
+            .context("[fields_append] getting mutable fields")?;
         match m.get_mut(&name) {
             Some(v) => v.push(value),
             None => {
@@ -96,8 +93,12 @@ impl<T: WasiHttpView + WasiHttpViewExt> crate::wasi::http::types::Host for T {
     }
     fn fields_clone(&mut self, fields: Fields) -> wasmtime::Result<Fields> {
         let table = self.table_mut();
-        let m = table.get_fields(fields).map_err(convert)?;
-        let id = table.push_fields(Box::new(m.clone())).map_err(convert)?;
+        let m = table
+            .get_fields(fields)
+            .context("[fields_clone] getting fields")?;
+        let id = table
+            .push_fields(Box::new(m.clone()))
+            .context("[fields_clone] pushing fields")?;
         Ok(id)
     }
     fn finish_incoming_stream(
@@ -109,7 +110,7 @@ impl<T: WasiHttpView + WasiHttpViewExt> crate::wasi::http::types::Host for T {
                 let response = self
                     .table()
                     .get_response(stream.parent_id())
-                    .context("get trailers from response")?;
+                    .context("[finish_incoming_stream] get trailers from response")?;
                 return Ok(response.trailers());
             }
         }
@@ -126,7 +127,10 @@ impl<T: WasiHttpView + WasiHttpViewExt> crate::wasi::http::types::Host for T {
         bail!("unimplemented: drop_incoming_request")
     }
     fn drop_outgoing_request(&mut self, request: OutgoingRequest) -> wasmtime::Result<()> {
-        let r = self.table_mut().get_request(request).map_err(convert)?;
+        let r = self
+            .table_mut()
+            .get_request(request)
+            .context("[drop_outgoing_request] getting fields")?;
 
         // Cleanup dependent resources
         let body = r.body();
@@ -138,7 +142,9 @@ impl<T: WasiHttpView + WasiHttpViewExt> crate::wasi::http::types::Host for T {
             self.table_mut().delete_fields(h).ok();
         }
 
-        self.table_mut().delete_request(request).map_err(convert)?;
+        self.table_mut()
+            .delete_request(request)
+            .context("[drop_outgoing_request] deleting request")?;
 
         Ok(())
     }
@@ -189,28 +195,34 @@ impl<T: WasiHttpView + WasiHttpViewExt> crate::wasi::http::types::Host for T {
         let id = self
             .table_mut()
             .push_request(Box::new(req))
-            .map_err(convert)?;
+            .context("[new_outgoing_request] pushing request")?;
         Ok(id)
     }
     fn outgoing_request_write(
         &mut self,
         request: OutgoingRequest,
     ) -> wasmtime::Result<Result<OutgoingStream, ()>> {
-        let req = self.table().get_request(request).map_err(convert)?;
+        let req = self
+            .table()
+            .get_request(request)
+            .context("[outgoing_request_write] getting request")?;
         let stream_id = req.body().unwrap_or_else(|| {
             let (new, stream) = self
                 .table_mut()
                 .push_stream(Bytes::new(), request)
-                .expect("valid output stream");
+                .expect("[outgoing_request_write] valid output stream");
             self.http_ctx_mut().streams.insert(new, stream);
             let req = self
                 .table_mut()
                 .get_request_mut(request)
-                .expect("request to be found");
+                .expect("[outgoing_request_write] request to be found");
             req.set_body(new);
             new
         });
-        let stream = self.table().get_stream(stream_id)?;
+        let stream = self
+            .table()
+            .get_stream(stream_id)
+            .context("[outgoing_request_write] getting stream")?;
         Ok(Ok(stream.outgoing()))
     }
     fn drop_response_outparam(&mut self, _response: ResponseOutparam) -> wasmtime::Result<()> {
@@ -224,13 +236,19 @@ impl<T: WasiHttpView + WasiHttpViewExt> crate::wasi::http::types::Host for T {
         bail!("unimplemented: set_response_outparam")
     }
     fn drop_incoming_response(&mut self, response: IncomingResponse) -> wasmtime::Result<()> {
-        let r = self.table().get_response(response).map_err(convert)?;
+        let r = self
+            .table()
+            .get_response(response)
+            .context("[drop_incoming_response] getting response")?;
 
         // Cleanup dependent resources
         let body = r.body();
         let headers = r.headers();
         if let Some(id) = body {
-            let stream = self.table().get_stream(id)?;
+            let stream = self
+                .table()
+                .get_stream(id)
+                .context("[drop_incoming_response] getting stream")?;
             let incoming_id = stream.incoming();
             if let Some(trailers) = self.finish_incoming_stream(incoming_id)? {
                 self.table_mut()
@@ -238,16 +256,10 @@ impl<T: WasiHttpView + WasiHttpViewExt> crate::wasi::http::types::Host for T {
                     .context("[drop_incoming_response] deleting trailers")
                     .unwrap_or_else(|_| ());
             }
-            self.table_mut()
-                .delete_stream(id)
-                .context("[drop_incoming_response] deleting input stream")
-                .ok();
+            self.table_mut().delete_stream(id).ok();
         }
         if let Some(h) = headers {
-            self.table_mut()
-                .delete_fields(h)
-                .context("[drop_incoming_response] deleting fields")
-                .ok();
+            self.table_mut().delete_fields(h).ok();
         }
 
         self.table_mut()
@@ -262,14 +274,20 @@ impl<T: WasiHttpView + WasiHttpViewExt> crate::wasi::http::types::Host for T {
         &mut self,
         response: IncomingResponse,
     ) -> wasmtime::Result<StatusCode> {
-        let r = self.table().get_response(response).map_err(convert)?;
+        let r = self
+            .table()
+            .get_response(response)
+            .context("[incoming_response_status] getting response")?;
         Ok(r.status())
     }
     fn incoming_response_headers(
         &mut self,
         response: IncomingResponse,
     ) -> wasmtime::Result<Headers> {
-        let r = self.table().get_response(response).map_err(convert)?;
+        let r = self
+            .table()
+            .get_response(response)
+            .context("[incoming_response_headers] getting response")?;
         Ok(r.headers().unwrap_or(0 as Headers))
     }
     fn incoming_response_consume(
@@ -277,14 +295,16 @@ impl<T: WasiHttpView + WasiHttpViewExt> crate::wasi::http::types::Host for T {
         response: IncomingResponse,
     ) -> wasmtime::Result<Result<IncomingStream, ()>> {
         let table = self.table_mut();
-        let r = table.get_response(response).map_err(convert)?;
+        let r = table
+            .get_response(response)
+            .context("[incoming_response_consume] getting response")?;
         Ok(Ok(r
             .body()
             .map(|id| {
                 table
                     .get_stream(id)
                     .map(|stream| stream.incoming())
-                    .expect("response body stream")
+                    .expect("[incoming_response_consume] response body stream")
             })
             .unwrap_or(0 as IncomingStream)))
     }
@@ -305,7 +325,9 @@ impl<T: WasiHttpView + WasiHttpViewExt> crate::wasi::http::types::Host for T {
         &mut self,
         future: FutureIncomingResponse,
     ) -> wasmtime::Result<()> {
-        self.table_mut().delete_future(future)?;
+        self.table_mut()
+            .delete_future(future)
+            .context("[drop_future_incoming_response] deleting future")?;
         Ok(())
     }
     fn future_incoming_response_get(
@@ -317,8 +339,7 @@ impl<T: WasiHttpView + WasiHttpViewExt> crate::wasi::http::types::Host for T {
             .get_future(future)
             .context("[future_incoming_response_get] getting future")?;
 
-        let response = futures::executor::block_on(self.handle_async(f.request_id, f.options))
-            .map_err(|e| Error::UnexpectedError(e.to_string()));
+        let response = futures::executor::block_on(self.handle_async(f.request_id, f.options));
         Ok(Some(response))
     }
     fn listen_to_future_incoming_response(

From 068b1768a057a571f723e0f1185cce96c5424e68 Mon Sep 17 00:00:00 2001
From: Eduardo Rodrigues <eduardomourar@users.noreply.github.com>
Date: Thu, 10 Aug 2023 17:41:13 +0100
Subject: [PATCH 17/49] chore: split wasi http tests into individual files

---
 crates/test-programs/Cargo.toml               |   1 +
 crates/test-programs/src/http_server.rs       | 104 +++++++++++++-----
 .../tests/wasi-http-components.rs             |  45 +++++++-
 .../test-programs/tests/wasi-http-modules.rs  |  45 +++++++-
 .../src/bin/outbound_request.rs               | 100 -----------------
 .../src/bin/outbound_request_get.rs           |  38 +++++++
 .../bin/outbound_request_invalid_dnsname.rs   |  28 +++++
 .../src/bin/outbound_request_invalid_port.rs  |  31 ++++++
 .../bin/outbound_request_invalid_version.rs   |  37 +++++++
 .../src/bin/outbound_request_post.rs          |  33 ++++++
 .../src/bin/outbound_request_put.rs           |  33 ++++++
 .../bin/outbound_request_unknown_method.rs    |  31 ++++++
 .../outbound_request_unsupported_scheme.rs    |  31 ++++++
 .../test-programs/wasi-http-tests/src/lib.rs  |  15 ++-
 14 files changed, 431 insertions(+), 141 deletions(-)
 delete mode 100644 crates/test-programs/wasi-http-tests/src/bin/outbound_request.rs
 create mode 100644 crates/test-programs/wasi-http-tests/src/bin/outbound_request_get.rs
 create mode 100644 crates/test-programs/wasi-http-tests/src/bin/outbound_request_invalid_dnsname.rs
 create mode 100644 crates/test-programs/wasi-http-tests/src/bin/outbound_request_invalid_port.rs
 create mode 100644 crates/test-programs/wasi-http-tests/src/bin/outbound_request_invalid_version.rs
 create mode 100644 crates/test-programs/wasi-http-tests/src/bin/outbound_request_post.rs
 create mode 100644 crates/test-programs/wasi-http-tests/src/bin/outbound_request_put.rs
 create mode 100644 crates/test-programs/wasi-http-tests/src/bin/outbound_request_unknown_method.rs
 create mode 100644 crates/test-programs/wasi-http-tests/src/bin/outbound_request_unsupported_scheme.rs

diff --git a/crates/test-programs/Cargo.toml b/crates/test-programs/Cargo.toml
index 38915a8e5c70..b2f7ddd4fc54 100644
--- a/crates/test-programs/Cargo.toml
+++ b/crates/test-programs/Cargo.toml
@@ -14,6 +14,7 @@ wit-component = { workspace = true }
 heck = { workspace = true }
 
 [dependencies]
+anyhow = { workspace = true }
 http = { version = "0.2.9" }
 http-body = "1.0.0-rc.2"
 http-body-util = "0.1.0-rc.2"
diff --git a/crates/test-programs/src/http_server.rs b/crates/test-programs/src/http_server.rs
index cfea6cb58083..6a79f08c85be 100644
--- a/crates/test-programs/src/http_server.rs
+++ b/crates/test-programs/src/http_server.rs
@@ -1,45 +1,95 @@
 use http_body_util::combinators::BoxBody;
-use http_body_util::BodyExt;
-use hyper::server::conn::http1;
+use http_body_util::{BodyExt, Full};
 use hyper::{body::Bytes, service::service_fn, Request, Response};
-use std::{error::Error, net::SocketAddr};
-use tokio::{net::TcpListener, runtime::Handle};
+use std::net::SocketAddr;
+use std::sync::OnceLock;
 
 async fn test(
-    req: Request<hyper::body::Incoming>,
-) -> http::Result<Response<BoxBody<Bytes, hyper::Error>>> {
+    mut req: Request<hyper::body::Incoming>,
+) -> http::Result<Response<BoxBody<Bytes, std::convert::Infallible>>> {
     let method = req.method().to_string();
+    let mut buf: Vec<u8> = Vec::new();
+    while let Some(next) = req.body_mut().frame().await {
+        let frame = next.unwrap();
+        if let Some(chunk) = frame.data_ref() {
+            buf.extend_from_slice(chunk);
+        }
+    }
     Response::builder()
         .status(http::StatusCode::OK)
         .header("x-wasmtime-test-method", method)
         .header("x-wasmtime-test-uri", req.uri().to_string())
-        .body(req.into_body().boxed())
+        .body(Full::<Bytes>::from(buf).boxed())
 }
 
-async fn async_run_serve() -> Result<(), Box<dyn Error + Send + Sync>> {
-    let addr = SocketAddr::from(([127, 0, 0, 1], 3000));
-
-    let listener = TcpListener::bind(addr).await?;
+async fn serve_http1_connection(stream: std::net::TcpStream) -> Result<(), hyper::Error> {
+    let mut builder = hyper::server::conn::http1::Builder::new();
+    let http = builder.keep_alive(false).pipeline_flush(true);
+    let io = tokio::net::TcpStream::from_std(stream).unwrap();
+    http.serve_connection(io, service_fn(test)).await
+}
 
-    loop {
-        let (stream, _) = listener.accept().await?;
+#[derive(Clone)]
+/// An Executor that uses the tokio runtime.
+pub struct TokioExecutor;
 
-        tokio::task::spawn(async move {
-            if let Err(err) = http1::Builder::new()
-                .serve_connection(stream, service_fn(test))
-                .await
-            {
-                println!("Error serving connection: {:?}", err);
-            }
-        });
+impl<F> hyper::rt::Executor<F> for TokioExecutor
+where
+    F: std::future::Future + Send + 'static,
+    F::Output: Send + 'static,
+{
+    fn execute(&self, fut: F) {
+        tokio::task::spawn(fut);
     }
 }
 
-pub async fn run_server() {
-    let _thread = Handle::current().spawn(async move {
-        async_run_serve()
-            .await
-            .map_err(|err| format!("Error while running test server: {:?}", err))
-            .unwrap();
+async fn serve_http2_connection(stream: std::net::TcpStream) -> Result<(), hyper::Error> {
+    let mut builder = hyper::server::conn::http2::Builder::new(TokioExecutor);
+    let http = builder.max_concurrent_streams(20);
+    let io = tokio::net::TcpStream::from_std(stream).unwrap();
+    http.serve_connection(io, service_fn(test)).await
+}
+
+pub async fn setup_http1(
+    future: impl std::future::Future<Output = anyhow::Result<()>>,
+) -> Result<(), anyhow::Error> {
+    static CELL_HTTP1: OnceLock<std::net::TcpListener> = OnceLock::new();
+    let listener = CELL_HTTP1.get_or_init(|| {
+        let addr = SocketAddr::from(([127, 0, 0, 1], 3000));
+        std::net::TcpListener::bind(addr).unwrap()
+    });
+
+    let thread = tokio::task::spawn(async move {
+        let (stream, _) = listener.accept().unwrap();
+        let conn = serve_http1_connection(stream).await;
+        if let Err(err) = conn {
+            println!("Error serving connection: {:?}", err);
+        }
+    });
+
+    future.await?;
+    thread.await.unwrap();
+    Ok(())
+}
+
+pub async fn setup_http2(
+    future: impl std::future::Future<Output = anyhow::Result<()>>,
+) -> anyhow::Result<()> {
+    static CELL_HTTP2: OnceLock<std::net::TcpListener> = OnceLock::new();
+    let listener = CELL_HTTP2.get_or_init(|| {
+        let addr = SocketAddr::from(([127, 0, 0, 1], 3001));
+        std::net::TcpListener::bind(addr).unwrap()
     });
+    let thread = tokio::task::spawn(async move {
+        let (stream, _) = listener.accept().unwrap();
+        let conn = serve_http2_connection(stream).await;
+        if let Err(err) = conn {
+            println!("Error serving connection: {:?}", err);
+        }
+    });
+
+    future.await?;
+    thread.await.unwrap();
+
+    Ok(())
 }
diff --git a/crates/test-programs/tests/wasi-http-components.rs b/crates/test-programs/tests/wasi-http-components.rs
index c781b0546f6f..0349ccfe9521 100644
--- a/crates/test-programs/tests/wasi-http-components.rs
+++ b/crates/test-programs/tests/wasi-http-components.rs
@@ -1,5 +1,4 @@
 #![cfg(all(feature = "test_programs", not(skip_wasi_http_tests)))]
-use futures::future;
 use wasmtime::{
     component::{Component, Linker},
     Config, Engine, Store,
@@ -10,7 +9,7 @@ use wasmtime_wasi::preview2::{
 };
 use wasmtime_wasi_http::{WasiHttpCtx, WasiHttpView};
 
-use test_programs::http_server;
+use test_programs::http_server::{setup_http1, setup_http2};
 
 lazy_static::lazy_static! {
     static ref ENGINE: Engine = {
@@ -89,7 +88,43 @@ async fn run(name: &str) -> anyhow::Result<()> {
 }
 
 #[test_log::test(tokio::test(flavor = "multi_thread"))]
-async fn outbound_request() {
-    let (_, result) = future::join(http_server::run_server(), run("outbound_request")).await;
-    result.unwrap();
+async fn outbound_request_get() {
+    setup_http1(run("outbound_request_get")).await.unwrap();
+}
+
+#[test_log::test(tokio::test(flavor = "multi_thread"))]
+async fn outbound_request_post() {
+    setup_http1(run("outbound_request_post")).await.unwrap();
+}
+
+#[test_log::test(tokio::test(flavor = "multi_thread"))]
+async fn outbound_request_put() {
+    setup_http1(run("outbound_request_put")).await.unwrap();
+}
+
+#[test_log::test(tokio::test(flavor = "multi_thread"))]
+async fn outbound_request_invalid_version() {
+    setup_http2(run("outbound_request_invalid_version"))
+        .await
+        .unwrap();
+}
+
+#[test_log::test(tokio::test(flavor = "multi_thread"))]
+async fn outbound_request_unknown_method() {
+    run("outbound_request_unknown_method").await.unwrap();
+}
+
+#[test_log::test(tokio::test(flavor = "multi_thread"))]
+async fn outbound_request_unsupported_scheme() {
+    run("outbound_request_unsupported_scheme").await.unwrap();
+}
+
+#[test_log::test(tokio::test(flavor = "multi_thread"))]
+async fn outbound_request_invalid_port() {
+    run("outbound_request_invalid_port").await.unwrap();
+}
+
+#[test_log::test(tokio::test(flavor = "multi_thread"))]
+async fn outbound_request_invalid_dnsname() {
+    run("outbound_request_invalid_dnsname").await.unwrap();
 }
diff --git a/crates/test-programs/tests/wasi-http-modules.rs b/crates/test-programs/tests/wasi-http-modules.rs
index 20756f45b7f6..a4a3565c1e07 100644
--- a/crates/test-programs/tests/wasi-http-modules.rs
+++ b/crates/test-programs/tests/wasi-http-modules.rs
@@ -1,5 +1,4 @@
 #![cfg(all(feature = "test_programs", not(skip_wasi_http_tests)))]
-use futures::future;
 use wasmtime::{Config, Engine, Func, Linker, Module, Store};
 use wasmtime_wasi::preview2::{
     preview1::{WasiPreview1Adapter, WasiPreview1View},
@@ -7,7 +6,7 @@ use wasmtime_wasi::preview2::{
 };
 use wasmtime_wasi_http::{WasiHttpCtx, WasiHttpView};
 
-use test_programs::http_server;
+use test_programs::http_server::{setup_http1, setup_http2};
 
 lazy_static::lazy_static! {
     static ref ENGINE: Engine = {
@@ -103,7 +102,43 @@ async fn run(name: &str) -> anyhow::Result<()> {
 }
 
 #[test_log::test(tokio::test(flavor = "multi_thread"))]
-async fn outbound_request() {
-    let (_, result) = future::join(http_server::run_server(), run("outbound_request")).await;
-    result.unwrap();
+async fn outbound_request_get() {
+    setup_http1(run("outbound_request_get")).await.unwrap();
+}
+
+#[test_log::test(tokio::test(flavor = "multi_thread"))]
+async fn outbound_request_post() {
+    setup_http1(run("outbound_request_post")).await.unwrap();
+}
+
+#[test_log::test(tokio::test(flavor = "multi_thread"))]
+async fn outbound_request_put() {
+    setup_http1(run("outbound_request_put")).await.unwrap();
+}
+
+#[test_log::test(tokio::test(flavor = "multi_thread"))]
+async fn outbound_request_invalid_version() {
+    setup_http2(run("outbound_request_invalid_version"))
+        .await
+        .unwrap();
+}
+
+#[test_log::test(tokio::test(flavor = "multi_thread"))]
+async fn outbound_request_unknown_method() {
+    run("outbound_request_unknown_method").await.unwrap();
+}
+
+#[test_log::test(tokio::test(flavor = "multi_thread"))]
+async fn outbound_request_unsupported_scheme() {
+    run("outbound_request_unsupported_scheme").await.unwrap();
+}
+
+#[test_log::test(tokio::test(flavor = "multi_thread"))]
+async fn outbound_request_invalid_port() {
+    run("outbound_request_invalid_port").await.unwrap();
+}
+
+#[test_log::test(tokio::test(flavor = "multi_thread"))]
+async fn outbound_request_invalid_dnsname() {
+    run("outbound_request_invalid_dnsname").await.unwrap();
 }
diff --git a/crates/test-programs/wasi-http-tests/src/bin/outbound_request.rs b/crates/test-programs/wasi-http-tests/src/bin/outbound_request.rs
deleted file mode 100644
index 5e7247b8662c..000000000000
--- a/crates/test-programs/wasi-http-tests/src/bin/outbound_request.rs
+++ /dev/null
@@ -1,100 +0,0 @@
-use anyhow::{Context, Result};
-use wasi_http_tests::{
-    bindings::{
-        wasi::http::types::{Method, Scheme},
-        CommandExtended,
-    },
-    request,
-};
-
-struct Component;
-
-fn main() -> Result<()> {
-    let r1 = request(
-        Method::Get,
-        Scheme::Http,
-        "localhost:3000",
-        "/get?some=arg&goes=here",
-        None,
-    )
-    .context("localhost:3000 /get")?;
-
-    println!("localhost:3000 /get: {r1:?}");
-    assert_eq!(r1.status, 200);
-    let method = r1.header("x-wasmtime-test-method").unwrap();
-    assert_eq!(std::str::from_utf8(method).unwrap(), "GET");
-    let uri = r1.header("x-wasmtime-test-uri").unwrap();
-    assert_eq!(
-        std::str::from_utf8(uri).unwrap(),
-        "http://localhost:3000/get?some=arg&goes=here"
-    );
-    assert_eq!(r1.body, b"");
-
-    let r2 = request(
-        Method::Post,
-        Scheme::Http,
-        "localhost:3000",
-        "/post",
-        Some(b"{\"foo\": \"bar\"}"),
-    )
-    .context("localhost:3000 /post")?;
-
-    println!("localhost:3000 /post: {r2:?}");
-    assert_eq!(r2.status, 200);
-    let method = r2.header("x-wasmtime-test-method").unwrap();
-    assert_eq!(std::str::from_utf8(method).unwrap(), "POST");
-    assert_eq!(r2.body, b"{\"foo\": \"bar\"}");
-
-    let r3 = request(
-        Method::Put,
-        Scheme::Http,
-        "localhost:3000",
-        "/put",
-        Some(&[]),
-    )
-    .context("localhost:3000 /put")?;
-
-    println!("localhost:3000 /put: {r3:?}");
-    assert_eq!(r3.status, 200);
-    let method = r3.header("x-wasmtime-test-method").unwrap();
-    assert_eq!(std::str::from_utf8(method).unwrap(), "PUT");
-    assert_eq!(r3.body, b"");
-
-    let r4 = request(
-        Method::Other("OTHER".to_owned()),
-        Scheme::Http,
-        "localhost:3000",
-        "/",
-        None,
-    );
-
-    let error = r4.unwrap_err();
-    assert_eq!(
-        error.to_string(),
-        "Error::UnexpectedError(\"unknown method OTHER\")"
-    );
-
-    let r5 = request(
-        Method::Get,
-        Scheme::Other("WS".to_owned()),
-        "localhost:3000",
-        "/",
-        None,
-    );
-
-    let error = r5.unwrap_err();
-    assert_eq!(
-        error.to_string(),
-        "Error::UnexpectedError(\"unsupported scheme WS\")"
-    );
-
-    Ok(())
-}
-
-impl CommandExtended for Component {
-    fn run() -> Result<(), ()> {
-        main().map_err(|e| eprintln!("{e:?}"))
-    }
-}
-
-wasi_http_tests::export_command_extended!(Component);
diff --git a/crates/test-programs/wasi-http-tests/src/bin/outbound_request_get.rs b/crates/test-programs/wasi-http-tests/src/bin/outbound_request_get.rs
new file mode 100644
index 000000000000..7a0c50a73e0e
--- /dev/null
+++ b/crates/test-programs/wasi-http-tests/src/bin/outbound_request_get.rs
@@ -0,0 +1,38 @@
+use anyhow::{Context, Result};
+use wasi_http_tests::bindings::wasi::http::types::{Method, Scheme};
+
+struct Component;
+
+fn main() -> Result<(), ()> {
+    let res = wasi_http_tests::request(
+        Method::Get,
+        Scheme::Http,
+        "localhost:3000",
+        "/get?some=arg&goes=here",
+        None,
+        None,
+    )
+    .context("localhost:3000 /get")
+    .unwrap();
+
+    println!("localhost:3000 /get: {res:?}");
+    assert_eq!(res.status, 200);
+    let method = res.header("x-wasmtime-test-method").unwrap();
+    assert_eq!(std::str::from_utf8(method).unwrap(), "GET");
+    let uri = res.header("x-wasmtime-test-uri").unwrap();
+    assert_eq!(
+        std::str::from_utf8(uri).unwrap(),
+        "http://localhost:3000/get?some=arg&goes=here"
+    );
+    assert_eq!(res.body, b"");
+
+    Ok(())
+}
+
+impl wasi_http_tests::bindings::CommandExtended for Component {
+    fn run() -> Result<(), ()> {
+        main()
+    }
+}
+
+wasi_http_tests::export_command_extended!(Component);
diff --git a/crates/test-programs/wasi-http-tests/src/bin/outbound_request_invalid_dnsname.rs b/crates/test-programs/wasi-http-tests/src/bin/outbound_request_invalid_dnsname.rs
new file mode 100644
index 000000000000..0c946d84e344
--- /dev/null
+++ b/crates/test-programs/wasi-http-tests/src/bin/outbound_request_invalid_dnsname.rs
@@ -0,0 +1,28 @@
+use anyhow::Result;
+use wasi_http_tests::bindings::wasi::http::types::{Method, Scheme};
+
+struct Component;
+
+fn main() -> Result<(), ()> {
+    let res = wasi_http_tests::request(
+        Method::Get,
+        Scheme::Http,
+        "some.invalid.dnsname:3000",
+        "/",
+        None,
+        None,
+    );
+
+    let error = res.unwrap_err();
+    assert_eq!(error.to_string(), "Error::InvalidUrl(\"invalid dnsname\")");
+
+    Ok(())
+}
+
+impl wasi_http_tests::bindings::CommandExtended for Component {
+    fn run() -> Result<(), ()> {
+        main()
+    }
+}
+
+wasi_http_tests::export_command_extended!(Component);
diff --git a/crates/test-programs/wasi-http-tests/src/bin/outbound_request_invalid_port.rs b/crates/test-programs/wasi-http-tests/src/bin/outbound_request_invalid_port.rs
new file mode 100644
index 000000000000..1c67dfb06fdd
--- /dev/null
+++ b/crates/test-programs/wasi-http-tests/src/bin/outbound_request_invalid_port.rs
@@ -0,0 +1,31 @@
+use anyhow::Result;
+use wasi_http_tests::bindings::wasi::http::types::{Method, Scheme};
+
+struct Component;
+
+fn main() -> Result<(), ()> {
+    let res = wasi_http_tests::request(
+        Method::Get,
+        Scheme::Http,
+        "localhost:99999",
+        "/",
+        None,
+        None,
+    );
+
+    let error = res.unwrap_err();
+    assert_eq!(
+        error.to_string(),
+        "Error::InvalidUrl(\"invalid port value\")"
+    );
+
+    Ok(())
+}
+
+impl wasi_http_tests::bindings::CommandExtended for Component {
+    fn run() -> Result<(), ()> {
+        main()
+    }
+}
+
+wasi_http_tests::export_command_extended!(Component);
diff --git a/crates/test-programs/wasi-http-tests/src/bin/outbound_request_invalid_version.rs b/crates/test-programs/wasi-http-tests/src/bin/outbound_request_invalid_version.rs
new file mode 100644
index 000000000000..b6088dd645d7
--- /dev/null
+++ b/crates/test-programs/wasi-http-tests/src/bin/outbound_request_invalid_version.rs
@@ -0,0 +1,37 @@
+use anyhow::Result;
+use wasi_http_tests::bindings::wasi::http::types::{Method, Scheme};
+
+struct Component;
+
+fn main() -> Result<(), ()> {
+    let res = wasi_http_tests::request(
+        Method::Connect,
+        Scheme::Http,
+        "localhost:3001",
+        "/",
+        None,
+        Some(&[]),
+    );
+
+    let error = res.unwrap_err().to_string();
+    if error.ne("Error::ProtocolError(\"invalid HTTP version parsed\")")
+        && error.ne("Error::ProtocolError(\"operation was canceled\")")
+    {
+        panic!(
+            r#"assertion failed: `(left == right)`
+  left: `"{error}"`,
+  right: `"Error::ProtocolError(\"invalid HTTP version parsed\")"`
+        or `"Error::ProtocolError(\"operation was canceled\")"`)"#
+        )
+    }
+
+    Ok(())
+}
+
+impl wasi_http_tests::bindings::CommandExtended for Component {
+    fn run() -> Result<(), ()> {
+        main()
+    }
+}
+
+wasi_http_tests::export_command_extended!(Component);
diff --git a/crates/test-programs/wasi-http-tests/src/bin/outbound_request_post.rs b/crates/test-programs/wasi-http-tests/src/bin/outbound_request_post.rs
new file mode 100644
index 000000000000..aa71e827b993
--- /dev/null
+++ b/crates/test-programs/wasi-http-tests/src/bin/outbound_request_post.rs
@@ -0,0 +1,33 @@
+use anyhow::{Context, Result};
+use wasi_http_tests::bindings::wasi::http::types::{Method, Scheme};
+
+struct Component;
+
+fn main() -> Result<(), ()> {
+    let res = wasi_http_tests::request(
+        Method::Post,
+        Scheme::Http,
+        "localhost:3000",
+        "/post",
+        Some(b"{\"foo\": \"bar\"}"),
+        None,
+    )
+    .context("localhost:3000 /post")
+    .unwrap();
+
+    println!("localhost:3000 /post: {res:?}");
+    assert_eq!(res.status, 200);
+    let method = res.header("x-wasmtime-test-method").unwrap();
+    assert_eq!(std::str::from_utf8(method).unwrap(), "POST");
+    assert_eq!(res.body, b"{\"foo\": \"bar\"}");
+
+    Ok(())
+}
+
+impl wasi_http_tests::bindings::CommandExtended for Component {
+    fn run() -> Result<(), ()> {
+        main()
+    }
+}
+
+wasi_http_tests::export_command_extended!(Component);
diff --git a/crates/test-programs/wasi-http-tests/src/bin/outbound_request_put.rs b/crates/test-programs/wasi-http-tests/src/bin/outbound_request_put.rs
new file mode 100644
index 000000000000..c3adc79f38a0
--- /dev/null
+++ b/crates/test-programs/wasi-http-tests/src/bin/outbound_request_put.rs
@@ -0,0 +1,33 @@
+use anyhow::{Context, Result};
+use wasi_http_tests::bindings::wasi::http::types::{Method, Scheme};
+
+struct Component;
+
+fn main() -> Result<(), ()> {
+    let res = wasi_http_tests::request(
+        Method::Put,
+        Scheme::Http,
+        "localhost:3000",
+        "/put",
+        Some(&[]),
+        None,
+    )
+    .context("localhost:3000 /put")
+    .unwrap();
+
+    println!("localhost:3000 /put: {res:?}");
+    assert_eq!(res.status, 200);
+    let method = res.header("x-wasmtime-test-method").unwrap();
+    assert_eq!(std::str::from_utf8(method).unwrap(), "PUT");
+    assert_eq!(res.body, b"");
+
+    Ok(())
+}
+
+impl wasi_http_tests::bindings::CommandExtended for Component {
+    fn run() -> Result<(), ()> {
+        main()
+    }
+}
+
+wasi_http_tests::export_command_extended!(Component);
diff --git a/crates/test-programs/wasi-http-tests/src/bin/outbound_request_unknown_method.rs b/crates/test-programs/wasi-http-tests/src/bin/outbound_request_unknown_method.rs
new file mode 100644
index 000000000000..ec0a59d99dd3
--- /dev/null
+++ b/crates/test-programs/wasi-http-tests/src/bin/outbound_request_unknown_method.rs
@@ -0,0 +1,31 @@
+use anyhow::Result;
+use wasi_http_tests::bindings::wasi::http::types::{Method, Scheme};
+
+struct Component;
+
+fn main() -> Result<(), ()> {
+    let res = wasi_http_tests::request(
+        Method::Other("OTHER".to_owned()),
+        Scheme::Http,
+        "localhost:3000",
+        "/",
+        None,
+        None,
+    );
+
+    let error = res.unwrap_err();
+    assert_eq!(
+        error.to_string(),
+        "Error::InvalidUrl(\"unknown method OTHER\")"
+    );
+
+    Ok(())
+}
+
+impl wasi_http_tests::bindings::CommandExtended for Component {
+    fn run() -> Result<(), ()> {
+        main()
+    }
+}
+
+wasi_http_tests::export_command_extended!(Component);
diff --git a/crates/test-programs/wasi-http-tests/src/bin/outbound_request_unsupported_scheme.rs b/crates/test-programs/wasi-http-tests/src/bin/outbound_request_unsupported_scheme.rs
new file mode 100644
index 000000000000..869a84e7f8e9
--- /dev/null
+++ b/crates/test-programs/wasi-http-tests/src/bin/outbound_request_unsupported_scheme.rs
@@ -0,0 +1,31 @@
+use anyhow::Result;
+use wasi_http_tests::bindings::wasi::http::types::{Method, Scheme};
+
+struct Component;
+
+fn main() -> Result<(), ()> {
+    let res = wasi_http_tests::request(
+        Method::Get,
+        Scheme::Other("WS".to_owned()),
+        "localhost:3000",
+        "/",
+        None,
+        None,
+    );
+
+    let error = res.unwrap_err();
+    assert_eq!(
+        error.to_string(),
+        "Error::InvalidUrl(\"unsupported scheme WS\")"
+    );
+
+    Ok(())
+}
+
+impl wasi_http_tests::bindings::CommandExtended for Component {
+    fn run() -> Result<(), ()> {
+        main()
+    }
+}
+
+wasi_http_tests::export_command_extended!(Component);
diff --git a/crates/test-programs/wasi-http-tests/src/lib.rs b/crates/test-programs/wasi-http-tests/src/lib.rs
index a3189b142277..f3bdc7f40c80 100644
--- a/crates/test-programs/wasi-http-tests/src/lib.rs
+++ b/crates/test-programs/wasi-http-tests/src/lib.rs
@@ -47,11 +47,18 @@ pub fn request(
     authority: &str,
     path_with_query: &str,
     body: Option<&[u8]>,
+    additional_headers: Option<&[(String, String)]>,
 ) -> Result<Response> {
-    let headers = http_types::new_fields(&[
-        ("User-agent".to_string(), "WASI-HTTP/0.0.1".to_string()),
-        ("Content-type".to_string(), "application/json".to_string()),
-    ]);
+    let headers = http_types::new_fields(
+        &[
+            &[
+                ("User-agent".to_string(), "WASI-HTTP/0.0.1".to_string()),
+                ("Content-type".to_string(), "application/json".to_string()),
+            ],
+            additional_headers.unwrap_or(&[]),
+        ]
+        .concat(),
+    );
 
     let request = http_types::new_outgoing_request(
         &method,

From d7096a00d48e96d3899caee064acde513020d945 Mon Sep 17 00:00:00 2001
From: Eduardo Rodrigues <eduardomourar@users.noreply.github.com>
Date: Thu, 10 Aug 2023 17:41:56 +0100
Subject: [PATCH 18/49] chore: ensure protocol error is mapped correctly

---
 crates/wasi-http/src/lib.rs | 1 +
 1 file changed, 1 insertion(+)

diff --git a/crates/wasi-http/src/lib.rs b/crates/wasi-http/src/lib.rs
index 0bfcc67d4755..514bf24873b6 100644
--- a/crates/wasi-http/src/lib.rs
+++ b/crates/wasi-http/src/lib.rs
@@ -109,6 +109,7 @@ impl From<hyper::Error> for crate::wasi::http::types::Error {
             || err.is_canceled()
             || err.is_closed()
             || err.is_incomplete_message()
+            || err.is_parse()
         {
             Self::ProtocolError(message)
         } else {

From d3516cee8b2a5f3845eb716a192a38130b7abec3 Mon Sep 17 00:00:00 2001
From: Eduardo Rodrigues <eduardomourar@users.noreply.github.com>
Date: Fri, 11 Aug 2023 03:11:39 +0100
Subject: [PATCH 19/49] chore: disable temporarily wasi http in wasmtime cli

---
 src/commands/run.rs | 23 ++++++++++-------------
 1 file changed, 10 insertions(+), 13 deletions(-)

diff --git a/src/commands/run.rs b/src/commands/run.rs
index f9ef3ef560bd..3b3f69e8cd4a 100644
--- a/src/commands/run.rs
+++ b/src/commands/run.rs
@@ -759,19 +759,16 @@ fn populate_with_wasi(
     }
 
     if wasi_modules.wasi_http {
-        #[cfg(not(feature = "wasi-http"))]
-        {
-            bail!("Cannot enable wasi-http when the binary is not compiled with this feature.");
-        }
-        #[cfg(feature = "wasi-http")]
-        {
-            wasmtime_wasi_http::add_to_linker(linker, |host| {
-                // See documentation for wasi-crypto for why this is needed.
-                Arc::get_mut(host.wasi_http.as_mut().unwrap())
-                    .expect("wasi-http is not implemented with multi-threading support")
-            })?;
-            store.data_mut().wasi_http = Some(Arc::new(WasiHttpCtx::new()));
-        }
+        // TODO: this should be re-enabled before merging
+        // #[cfg(not(feature = "wasi-http"))]
+        // {
+        bail!("Cannot enable wasi-http when the binary is not compiled with this feature.");
+        // }
+        // #[cfg(feature = "wasi-http")]
+        // {
+        //     wasmtime_wasi_http::add_to_linker(linker)?;
+        //     store.data_mut().wasi_http = Some(Arc::new(WasiHttpCtx::new()));
+        // }
     }
 
     Ok(())

From 94ae09c92eeaef6d8132d76566844de94d838226 Mon Sep 17 00:00:00 2001
From: Eduardo Rodrigues <eduardomourar@users.noreply.github.com>
Date: Fri, 11 Aug 2023 04:54:36 +0100
Subject: [PATCH 20/49] chore: comment out wasi http in wasmtime cli

---
 src/commands/run.rs | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/src/commands/run.rs b/src/commands/run.rs
index 3b3f69e8cd4a..b738df3ce0b2 100644
--- a/src/commands/run.rs
+++ b/src/commands/run.rs
@@ -23,8 +23,8 @@ use wasmtime_wasi_nn::WasiNnCtx;
 #[cfg(feature = "wasi-threads")]
 use wasmtime_wasi_threads::WasiThreadsCtx;
 
-#[cfg(feature = "wasi-http")]
-use wasmtime_wasi_http::WasiHttpCtx;
+// #[cfg(feature = "wasi-http")]
+// use wasmtime_wasi_http::WasiHttpCtx;
 
 fn parse_env_var(s: &str) -> Result<(String, Option<String>)> {
     let mut parts = s.splitn(2, '=');
@@ -664,8 +664,8 @@ struct Host {
     wasi_nn: Option<Arc<WasiNnCtx>>,
     #[cfg(feature = "wasi-threads")]
     wasi_threads: Option<Arc<WasiThreadsCtx<Host>>>,
-    #[cfg(feature = "wasi-http")]
-    wasi_http: Option<Arc<WasiHttpCtx>>,
+    // #[cfg(feature = "wasi-http")]
+    // wasi_http: Option<Arc<WasiHttpCtx>>,
     limits: StoreLimits,
     guest_profiler: Option<Arc<GuestProfiler>>,
 }

From ff8d46919c708bb64df841e28fdea16f988085b6 Mon Sep 17 00:00:00 2001
From: Eduardo Rodrigues <eduardomourar@users.noreply.github.com>
Date: Fri, 11 Aug 2023 05:19:02 +0100
Subject: [PATCH 21/49] chore(ci): ensure wit definitions in sync

---
 .github/workflows/main.yml                    |   5 +
 crates/wasi-http/src/lib.rs                   |   3 +-
 crates/wasi-http/wasi-http                    |   1 -
 .../wit/deps/clocks/monotonic-clock.wit       |  34 +
 crates/wasi-http/wit/deps/clocks/timezone.wit |  63 ++
 .../wasi-http/wit/deps/clocks/wall-clock.wit  |  43 +
 .../wit/deps/filesystem/preopens.wit          |   6 +
 .../wasi-http/wit/deps/filesystem/types.wit   | 824 ++++++++++++++++++
 .../wasi-http/wit/deps/filesystem/world.wit   |   6 +
 .../wit/deps/http/incoming-handler.wit        |  24 +
 .../wit/deps/http/outgoing-handler.wit        |  18 +
 crates/wasi-http/wit/deps/http/types.wit      | 157 ++++
 crates/wasi-http/wit/deps/io/streams.wit      | 254 ++++++
 crates/wasi-http/wit/deps/logging/handler.wit |  34 +
 crates/wasi-http/wit/deps/poll/poll.wit       |  39 +
 .../wit/deps/preview/command-extended.wit     |  34 +
 crates/wasi-http/wit/deps/preview/command.wit |  26 +
 crates/wasi-http/wit/deps/preview/proxy.wit   |   9 +
 crates/wasi-http/wit/deps/preview/reactor.wit |  24 +
 .../wit/deps/random/insecure-seed.wit         |  24 +
 crates/wasi-http/wit/deps/random/insecure.wit |  21 +
 crates/wasi-http/wit/deps/random/random.wit   |  25 +
 .../wit/deps/sockets/instance-network.wit     |   9 +
 .../wit/deps/sockets/ip-name-lookup.wit       |  69 ++
 crates/wasi-http/wit/deps/sockets/network.wit | 187 ++++
 .../wit/deps/sockets/tcp-create-socket.wit    |  27 +
 crates/wasi-http/wit/deps/sockets/tcp.wit     | 255 ++++++
 .../wit/deps/sockets/udp-create-socket.wit    |  27 +
 crates/wasi-http/wit/deps/sockets/udp.wit     | 211 +++++
 .../wit/deps/wasi-cli-base/environment.wit    |  16 +
 .../wasi-http/wit/deps/wasi-cli-base/exit.wit |   4 +
 .../wit/deps/wasi-cli-base/stdio.wit          |  17 +
 crates/wasi-http/wit/main.wit                 |   1 +
 crates/wasi-http/wit/test.wit                 |  28 +
 34 files changed, 2522 insertions(+), 3 deletions(-)
 delete mode 160000 crates/wasi-http/wasi-http
 create mode 100644 crates/wasi-http/wit/deps/clocks/monotonic-clock.wit
 create mode 100644 crates/wasi-http/wit/deps/clocks/timezone.wit
 create mode 100644 crates/wasi-http/wit/deps/clocks/wall-clock.wit
 create mode 100644 crates/wasi-http/wit/deps/filesystem/preopens.wit
 create mode 100644 crates/wasi-http/wit/deps/filesystem/types.wit
 create mode 100644 crates/wasi-http/wit/deps/filesystem/world.wit
 create mode 100644 crates/wasi-http/wit/deps/http/incoming-handler.wit
 create mode 100644 crates/wasi-http/wit/deps/http/outgoing-handler.wit
 create mode 100644 crates/wasi-http/wit/deps/http/types.wit
 create mode 100644 crates/wasi-http/wit/deps/io/streams.wit
 create mode 100644 crates/wasi-http/wit/deps/logging/handler.wit
 create mode 100644 crates/wasi-http/wit/deps/poll/poll.wit
 create mode 100644 crates/wasi-http/wit/deps/preview/command-extended.wit
 create mode 100644 crates/wasi-http/wit/deps/preview/command.wit
 create mode 100644 crates/wasi-http/wit/deps/preview/proxy.wit
 create mode 100644 crates/wasi-http/wit/deps/preview/reactor.wit
 create mode 100644 crates/wasi-http/wit/deps/random/insecure-seed.wit
 create mode 100644 crates/wasi-http/wit/deps/random/insecure.wit
 create mode 100644 crates/wasi-http/wit/deps/random/random.wit
 create mode 100644 crates/wasi-http/wit/deps/sockets/instance-network.wit
 create mode 100644 crates/wasi-http/wit/deps/sockets/ip-name-lookup.wit
 create mode 100644 crates/wasi-http/wit/deps/sockets/network.wit
 create mode 100644 crates/wasi-http/wit/deps/sockets/tcp-create-socket.wit
 create mode 100644 crates/wasi-http/wit/deps/sockets/tcp.wit
 create mode 100644 crates/wasi-http/wit/deps/sockets/udp-create-socket.wit
 create mode 100644 crates/wasi-http/wit/deps/sockets/udp.wit
 create mode 100644 crates/wasi-http/wit/deps/wasi-cli-base/environment.wit
 create mode 100644 crates/wasi-http/wit/deps/wasi-cli-base/exit.wit
 create mode 100644 crates/wasi-http/wit/deps/wasi-cli-base/stdio.wit
 create mode 100644 crates/wasi-http/wit/main.wit
 create mode 100644 crates/wasi-http/wit/test.wit

diff --git a/.github/workflows/main.yml b/.github/workflows/main.yml
index 9d64ba405913..e2b17f8dd835 100644
--- a/.github/workflows/main.yml
+++ b/.github/workflows/main.yml
@@ -454,6 +454,11 @@ jobs:
         RUST_BACKTRACE: 1
       if: matrix.target == '' && matrix.os != 'windows-latest' && needs.determine.outputs.test-capi
 
+    # Ensure WIT definitions are in sync
+    - run: |
+        cp -TRv 'crates/wasi/wit/' 'crates/wasi-http/wit/'
+        git diff --exit-code --diff-filter=AM $GITHUB_SHA -- 'crates/wasi-http/wit/'
+
     # Build and test all features
     - run: ./ci/run-tests.sh --locked
       env:
diff --git a/crates/wasi-http/src/lib.rs b/crates/wasi-http/src/lib.rs
index 514bf24873b6..889b3e2b6f31 100644
--- a/crates/wasi-http/src/lib.rs
+++ b/crates/wasi-http/src/lib.rs
@@ -5,8 +5,7 @@ use core::fmt::Formatter;
 use std::fmt::{self, Display};
 
 wasmtime::component::bindgen!({
-    path: "wasi-http/wit",
-    world: "proxy",
+    world: "wasi:preview/proxy",
     with: {
         "wasi:io/streams": wasmtime_wasi::preview2::bindings::io::streams,
         "wasi:poll/poll": wasmtime_wasi::preview2::bindings::poll::poll,
diff --git a/crates/wasi-http/wasi-http b/crates/wasi-http/wasi-http
deleted file mode 160000
index 1c95bc21dbd1..000000000000
--- a/crates/wasi-http/wasi-http
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit 1c95bc21dbd193b046e4232d063a82c8b5ba7994
diff --git a/crates/wasi-http/wit/deps/clocks/monotonic-clock.wit b/crates/wasi-http/wit/deps/clocks/monotonic-clock.wit
new file mode 100644
index 000000000000..50eb4de111af
--- /dev/null
+++ b/crates/wasi-http/wit/deps/clocks/monotonic-clock.wit
@@ -0,0 +1,34 @@
+package wasi:clocks
+
+/// WASI Monotonic Clock is a clock API intended to let users measure elapsed
+/// time.
+///
+/// It is intended to be portable at least between Unix-family platforms and
+/// Windows.
+///
+/// A monotonic clock is a clock which has an unspecified initial value, and
+/// successive reads of the clock will produce non-decreasing values.
+///
+/// It is intended for measuring elapsed time.
+interface monotonic-clock {
+    use wasi:poll/poll.{pollable}
+
+    /// A timestamp in nanoseconds.
+    type instant = u64
+
+    /// Read the current value of the clock.
+    ///
+    /// The clock is monotonic, therefore calling this function repeatedly will
+    /// produce a sequence of non-decreasing values.
+    now: func() -> instant
+
+    /// Query the resolution of the clock.
+    resolution: func() -> instant
+
+    /// Create a `pollable` which will resolve once the specified time has been
+    /// reached.
+    subscribe: func(
+        when: instant,
+        absolute: bool
+    ) -> pollable
+}
diff --git a/crates/wasi-http/wit/deps/clocks/timezone.wit b/crates/wasi-http/wit/deps/clocks/timezone.wit
new file mode 100644
index 000000000000..2b6855668e1d
--- /dev/null
+++ b/crates/wasi-http/wit/deps/clocks/timezone.wit
@@ -0,0 +1,63 @@
+package wasi:clocks
+
+interface timezone {
+    use wall-clock.{datetime}
+
+    /// A timezone.
+    ///
+    /// In timezones that recognize daylight saving time, also known as daylight
+    /// time and summer time, the information returned from the functions varies
+    /// over time to reflect these adjustments.
+    ///
+    /// This [represents a resource](https://github.com/WebAssembly/WASI/blob/main/docs/WitInWasi.md#Resources).
+    type timezone = u32
+
+    /// Return information needed to display the given `datetime`. This includes
+    /// the UTC offset, the time zone name, and a flag indicating whether
+    /// daylight saving time is active.
+    ///
+    /// If the timezone cannot be determined for the given `datetime`, return a
+    /// `timezone-display` for `UTC` with a `utc-offset` of 0 and no daylight
+    /// saving time.
+    display: func(this: timezone, when: datetime) -> timezone-display
+
+    /// The same as `display`, but only return the UTC offset.
+    utc-offset: func(this: timezone, when: datetime) -> s32
+
+    /// Dispose of the specified input-stream, after which it may no longer
+    /// be used.
+    drop-timezone: func(this: timezone)
+
+    /// Information useful for displaying the timezone of a specific `datetime`.
+    ///
+    /// This information may vary within a single `timezone` to reflect daylight
+    /// saving time adjustments.
+    record timezone-display {
+        /// The number of seconds difference between UTC time and the local
+        /// time of the timezone.
+        ///
+        /// The returned value will always be less than 86400 which is the
+        /// number of seconds in a day (24*60*60).
+        ///
+        /// In implementations that do not expose an actual time zone, this
+        /// should return 0.
+        utc-offset: s32,
+
+        /// The abbreviated name of the timezone to display to a user. The name
+        /// `UTC` indicates Coordinated Universal Time. Otherwise, this should
+        /// reference local standards for the name of the time zone.
+        ///
+        /// In implementations that do not expose an actual time zone, this
+        /// should be the string `UTC`.
+        ///
+        /// In time zones that do not have an applicable name, a formatted
+        /// representation of the UTC offset may be returned, such as `-04:00`.
+        name: string,
+
+        /// Whether daylight saving time is active.
+        ///
+        /// In implementations that do not expose an actual time zone, this
+        /// should return false.
+        in-daylight-saving-time: bool,
+    }
+}
diff --git a/crates/wasi-http/wit/deps/clocks/wall-clock.wit b/crates/wasi-http/wit/deps/clocks/wall-clock.wit
new file mode 100644
index 000000000000..6137724f60b1
--- /dev/null
+++ b/crates/wasi-http/wit/deps/clocks/wall-clock.wit
@@ -0,0 +1,43 @@
+package wasi:clocks
+
+/// WASI Wall Clock is a clock API intended to let users query the current
+/// time. The name "wall" makes an analogy to a "clock on the wall", which
+/// is not necessarily monotonic as it may be reset.
+///
+/// It is intended to be portable at least between Unix-family platforms and
+/// Windows.
+///
+/// A wall clock is a clock which measures the date and time according to
+/// some external reference.
+///
+/// External references may be reset, so this clock is not necessarily
+/// monotonic, making it unsuitable for measuring elapsed time.
+///
+/// It is intended for reporting the current date and time for humans.
+interface wall-clock {
+    /// A time and date in seconds plus nanoseconds.
+    record datetime {
+        seconds: u64,
+        nanoseconds: u32,
+    }
+
+    /// Read the current value of the clock.
+    ///
+    /// This clock is not monotonic, therefore calling this function repeatedly
+    /// will not necessarily produce a sequence of non-decreasing values.
+    ///
+    /// The returned timestamps represent the number of seconds since
+    /// 1970-01-01T00:00:00Z, also known as [POSIX's Seconds Since the Epoch],
+    /// also known as [Unix Time].
+    ///
+    /// The nanoseconds field of the output is always less than 1000000000.
+    ///
+    /// [POSIX's Seconds Since the Epoch]: https://pubs.opengroup.org/onlinepubs/9699919799/xrat/V4_xbd_chap04.html#tag_21_04_16
+    /// [Unix Time]: https://en.wikipedia.org/wiki/Unix_time
+    now: func() -> datetime
+
+    /// Query the resolution of the clock.
+    ///
+    /// The nanoseconds field of the output is always less than 1000000000.
+    resolution: func() -> datetime
+}
diff --git a/crates/wasi-http/wit/deps/filesystem/preopens.wit b/crates/wasi-http/wit/deps/filesystem/preopens.wit
new file mode 100644
index 000000000000..f45661b8a849
--- /dev/null
+++ b/crates/wasi-http/wit/deps/filesystem/preopens.wit
@@ -0,0 +1,6 @@
+interface preopens {
+    use types.{descriptor}
+
+    /// Return the set of preopened directories, and their path.
+    get-directories: func() -> list<tuple<descriptor, string>>
+}
diff --git a/crates/wasi-http/wit/deps/filesystem/types.wit b/crates/wasi-http/wit/deps/filesystem/types.wit
new file mode 100644
index 000000000000..e72a742de6c8
--- /dev/null
+++ b/crates/wasi-http/wit/deps/filesystem/types.wit
@@ -0,0 +1,824 @@
+/// WASI filesystem is a filesystem API primarily intended to let users run WASI
+/// programs that access their files on their existing filesystems, without
+/// significant overhead.
+///
+/// It is intended to be roughly portable between Unix-family platforms and
+/// Windows, though it does not hide many of the major differences.
+///
+/// Paths are passed as interface-type `string`s, meaning they must consist of
+/// a sequence of Unicode Scalar Values (USVs). Some filesystems may contain
+/// paths which are not accessible by this API.
+///
+/// The directory separator in WASI is always the forward-slash (`/`).
+///
+/// All paths in WASI are relative paths, and are interpreted relative to a
+/// `descriptor` referring to a base directory. If a `path` argument to any WASI
+/// function starts with `/`, or if any step of resolving a `path`, including
+/// `..` and symbolic link steps, reaches a directory outside of the base
+/// directory, or reaches a symlink to an absolute or rooted path in the
+/// underlying filesystem, the function fails with `error-code::not-permitted`.
+interface types {
+    use wasi:io/streams.{input-stream, output-stream}
+    use wasi:clocks/wall-clock.{datetime}
+
+    /// File size or length of a region within a file.
+    type filesize = u64
+
+    /// The type of a filesystem object referenced by a descriptor.
+    ///
+    /// Note: This was called `filetype` in earlier versions of WASI.
+    enum descriptor-type {
+        /// The type of the descriptor or file is unknown or is different from
+        /// any of the other types specified.
+        unknown,
+        /// The descriptor refers to a block device inode.
+        block-device,
+        /// The descriptor refers to a character device inode.
+        character-device,
+        /// The descriptor refers to a directory inode.
+        directory,
+        /// The descriptor refers to a named pipe.
+        fifo,
+        /// The file refers to a symbolic link inode.
+        symbolic-link,
+        /// The descriptor refers to a regular file inode.
+        regular-file,
+        /// The descriptor refers to a socket.
+        socket,
+    }
+
+    /// Descriptor flags.
+    ///
+    /// Note: This was called `fdflags` in earlier versions of WASI.
+    flags descriptor-flags {
+        /// Read mode: Data can be read.
+        read,
+        /// Write mode: Data can be written to.
+        write,
+        /// Request that writes be performed according to synchronized I/O file
+        /// integrity completion. The data stored in the file and the file's
+        /// metadata are synchronized. This is similar to `O_SYNC` in POSIX.
+        ///
+        /// The precise semantics of this operation have not yet been defined for
+        /// WASI. At this time, it should be interpreted as a request, and not a
+        /// requirement.
+        file-integrity-sync,
+        /// Request that writes be performed according to synchronized I/O data
+        /// integrity completion. Only the data stored in the file is
+        /// synchronized. This is similar to `O_DSYNC` in POSIX.
+        ///
+        /// The precise semantics of this operation have not yet been defined for
+        /// WASI. At this time, it should be interpreted as a request, and not a
+        /// requirement.
+        data-integrity-sync,
+        /// Requests that reads be performed at the same level of integrety
+        /// requested for writes. This is similar to `O_RSYNC` in POSIX.
+        ///
+        /// The precise semantics of this operation have not yet been defined for
+        /// WASI. At this time, it should be interpreted as a request, and not a
+        /// requirement.
+        requested-write-sync,
+        /// Mutating directories mode: Directory contents may be mutated.
+        ///
+        /// When this flag is unset on a descriptor, operations using the
+        /// descriptor which would create, rename, delete, modify the data or
+        /// metadata of filesystem objects, or obtain another handle which
+        /// would permit any of those, shall fail with `error-code::read-only` if
+        /// they would otherwise succeed.
+        ///
+        /// This may only be set on directories.
+        mutate-directory,
+    }
+
+    /// File attributes.
+    ///
+    /// Note: This was called `filestat` in earlier versions of WASI.
+    record descriptor-stat {
+        /// File type.
+        %type: descriptor-type,
+        /// Number of hard links to the file.
+        link-count: link-count,
+        /// For regular files, the file size in bytes. For symbolic links, the
+        /// length in bytes of the pathname contained in the symbolic link.
+        size: filesize,
+        /// Last data access timestamp.
+        data-access-timestamp: datetime,
+        /// Last data modification timestamp.
+        data-modification-timestamp: datetime,
+        /// Last file status change timestamp.
+        status-change-timestamp: datetime,
+    }
+
+    /// Flags determining the method of how paths are resolved.
+    flags path-flags {
+        /// As long as the resolved path corresponds to a symbolic link, it is
+        /// expanded.
+        symlink-follow,
+    }
+
+    /// Open flags used by `open-at`.
+    flags open-flags {
+        /// Create file if it does not exist, similar to `O_CREAT` in POSIX.
+        create,
+        /// Fail if not a directory, similar to `O_DIRECTORY` in POSIX.
+        directory,
+        /// Fail if file already exists, similar to `O_EXCL` in POSIX.
+        exclusive,
+        /// Truncate file to size 0, similar to `O_TRUNC` in POSIX.
+        truncate,
+    }
+
+    /// Permissions mode used by `open-at`, `change-file-permissions-at`, and
+    /// similar.
+    flags modes {
+        /// True if the resource is considered readable by the containing
+        /// filesystem.
+        readable,
+        /// True if the resource is considered writable by the containing
+        /// filesystem.
+        writable,
+        /// True if the resource is considered executable by the containing
+        /// filesystem. This does not apply to directories.
+        executable,
+    }
+
+    /// Access type used by `access-at`.
+    variant access-type {
+        /// Test for readability, writeability, or executability.
+        access(modes),
+
+        /// Test whether the path exists.
+        exists,
+    }
+
+    /// Number of hard links to an inode.
+    type link-count = u64
+
+    /// When setting a timestamp, this gives the value to set it to.
+    variant new-timestamp {
+        /// Leave the timestamp set to its previous value.
+        no-change,
+        /// Set the timestamp to the current time of the system clock associated
+        /// with the filesystem.
+        now,
+        /// Set the timestamp to the given value.
+        timestamp(datetime),
+    }
+
+    /// A directory entry.
+    record directory-entry {
+        /// The type of the file referred to by this directory entry.
+        %type: descriptor-type,
+
+        /// The name of the object.
+        name: string,
+    }
+
+    /// Error codes returned by functions, similar to `errno` in POSIX.
+    /// Not all of these error codes are returned by the functions provided by this
+    /// API; some are used in higher-level library layers, and others are provided
+    /// merely for alignment with POSIX.
+    enum error-code {
+        /// Permission denied, similar to `EACCES` in POSIX.
+        access,
+        /// Resource unavailable, or operation would block, similar to `EAGAIN` and `EWOULDBLOCK` in POSIX.
+        would-block,
+        /// Connection already in progress, similar to `EALREADY` in POSIX.
+        already,
+        /// Bad descriptor, similar to `EBADF` in POSIX.
+        bad-descriptor,
+        /// Device or resource busy, similar to `EBUSY` in POSIX.
+        busy,
+        /// Resource deadlock would occur, similar to `EDEADLK` in POSIX.
+        deadlock,
+        /// Storage quota exceeded, similar to `EDQUOT` in POSIX.
+        quota,
+        /// File exists, similar to `EEXIST` in POSIX.
+        exist,
+        /// File too large, similar to `EFBIG` in POSIX.
+        file-too-large,
+        /// Illegal byte sequence, similar to `EILSEQ` in POSIX.
+        illegal-byte-sequence,
+        /// Operation in progress, similar to `EINPROGRESS` in POSIX.
+        in-progress,
+        /// Interrupted function, similar to `EINTR` in POSIX.
+        interrupted,
+        /// Invalid argument, similar to `EINVAL` in POSIX.
+        invalid,
+        /// I/O error, similar to `EIO` in POSIX.
+        io,
+        /// Is a directory, similar to `EISDIR` in POSIX.
+        is-directory,
+        /// Too many levels of symbolic links, similar to `ELOOP` in POSIX.
+        loop,
+        /// Too many links, similar to `EMLINK` in POSIX.
+        too-many-links,
+        /// Message too large, similar to `EMSGSIZE` in POSIX.
+        message-size,
+        /// Filename too long, similar to `ENAMETOOLONG` in POSIX.
+        name-too-long,
+        /// No such device, similar to `ENODEV` in POSIX.
+        no-device,
+        /// No such file or directory, similar to `ENOENT` in POSIX.
+        no-entry,
+        /// No locks available, similar to `ENOLCK` in POSIX.
+        no-lock,
+        /// Not enough space, similar to `ENOMEM` in POSIX.
+        insufficient-memory,
+        /// No space left on device, similar to `ENOSPC` in POSIX.
+        insufficient-space,
+        /// Not a directory or a symbolic link to a directory, similar to `ENOTDIR` in POSIX.
+        not-directory,
+        /// Directory not empty, similar to `ENOTEMPTY` in POSIX.
+        not-empty,
+        /// State not recoverable, similar to `ENOTRECOVERABLE` in POSIX.
+        not-recoverable,
+        /// Not supported, similar to `ENOTSUP` and `ENOSYS` in POSIX.
+        unsupported,
+        /// Inappropriate I/O control operation, similar to `ENOTTY` in POSIX.
+        no-tty,
+        /// No such device or address, similar to `ENXIO` in POSIX.
+        no-such-device,
+        /// Value too large to be stored in data type, similar to `EOVERFLOW` in POSIX.
+        overflow,
+        /// Operation not permitted, similar to `EPERM` in POSIX.
+        not-permitted,
+        /// Broken pipe, similar to `EPIPE` in POSIX.
+        pipe,
+        /// Read-only file system, similar to `EROFS` in POSIX.
+        read-only,
+        /// Invalid seek, similar to `ESPIPE` in POSIX.
+        invalid-seek,
+        /// Text file busy, similar to `ETXTBSY` in POSIX.
+        text-file-busy,
+        /// Cross-device link, similar to `EXDEV` in POSIX.
+        cross-device,
+    }
+
+    /// File or memory access pattern advisory information.
+    enum advice {
+        /// The application has no advice to give on its behavior with respect
+        /// to the specified data.
+        normal,
+        /// The application expects to access the specified data sequentially
+        /// from lower offsets to higher offsets.
+        sequential,
+        /// The application expects to access the specified data in a random
+        /// order.
+        random,
+        /// The application expects to access the specified data in the near
+        /// future.
+        will-need,
+        /// The application expects that it will not access the specified data
+        /// in the near future.
+        dont-need,
+        /// The application expects to access the specified data once and then
+        /// not reuse it thereafter.
+        no-reuse,
+    }
+
+    /// A descriptor is a reference to a filesystem object, which may be a file,
+    /// directory, named pipe, special file, or other object on which filesystem
+    /// calls may be made.
+    ///
+    /// This [represents a resource](https://github.com/WebAssembly/WASI/blob/main/docs/WitInWasi.md#Resources).
+    type descriptor = u32
+
+    /// A 128-bit hash value, split into parts because wasm doesn't have a
+    /// 128-bit integer type.
+    record metadata-hash-value {
+       /// 64 bits of a 128-bit hash value.
+       lower: u64,
+       /// Another 64 bits of a 128-bit hash value.
+       upper: u64,
+    }
+
+    /// Return a stream for reading from a file, if available.
+    ///
+    /// May fail with an error-code describing why the file cannot be read.
+    ///
+    /// Multiple read, write, and append streams may be active on the same open
+    /// file and they do not interfere with each other.
+    ///
+    /// Note: This allows using `read-stream`, which is similar to `read` in POSIX.
+    read-via-stream: func(
+        this: descriptor,
+        /// The offset within the file at which to start reading.
+        offset: filesize,
+    ) -> result<input-stream, error-code>
+
+    /// Return a stream for writing to a file, if available.
+    ///
+    /// May fail with an error-code describing why the file cannot be written.
+    ///
+    /// Note: This allows using `write-stream`, which is similar to `write` in
+    /// POSIX.
+    write-via-stream: func(
+        this: descriptor,
+        /// The offset within the file at which to start writing.
+        offset: filesize,
+    ) -> result<output-stream, error-code>
+
+    /// Return a stream for appending to a file, if available.
+    ///
+    /// May fail with an error-code describing why the file cannot be appended.
+    ///
+    /// Note: This allows using `write-stream`, which is similar to `write` with
+    /// `O_APPEND` in in POSIX.
+    append-via-stream: func(
+        this: descriptor,
+    ) -> result<output-stream, error-code>
+
+    /// Provide file advisory information on a descriptor.
+    ///
+    /// This is similar to `posix_fadvise` in POSIX.
+    advise: func(
+        this: descriptor,
+        /// The offset within the file to which the advisory applies.
+        offset: filesize,
+        /// The length of the region to which the advisory applies.
+        length: filesize,
+        /// The advice.
+        advice: advice
+    ) -> result<_, error-code>
+
+    /// Synchronize the data of a file to disk.
+    ///
+    /// This function succeeds with no effect if the file descriptor is not
+    /// opened for writing.
+    ///
+    /// Note: This is similar to `fdatasync` in POSIX.
+    sync-data: func(this: descriptor) -> result<_, error-code>
+
+    /// Get flags associated with a descriptor.
+    ///
+    /// Note: This returns similar flags to `fcntl(fd, F_GETFL)` in POSIX.
+    ///
+    /// Note: This returns the value that was the `fs_flags` value returned
+    /// from `fdstat_get` in earlier versions of WASI.
+    get-flags: func(this: descriptor) -> result<descriptor-flags, error-code>
+
+    /// Get the dynamic type of a descriptor.
+    ///
+    /// Note: This returns the same value as the `type` field of the `fd-stat`
+    /// returned by `stat`, `stat-at` and similar.
+    ///
+    /// Note: This returns similar flags to the `st_mode & S_IFMT` value provided
+    /// by `fstat` in POSIX.
+    ///
+    /// Note: This returns the value that was the `fs_filetype` value returned
+    /// from `fdstat_get` in earlier versions of WASI.
+    get-type: func(this: descriptor) -> result<descriptor-type, error-code>
+
+    /// Adjust the size of an open file. If this increases the file's size, the
+    /// extra bytes are filled with zeros.
+    ///
+    /// Note: This was called `fd_filestat_set_size` in earlier versions of WASI.
+    set-size: func(this: descriptor, size: filesize) -> result<_, error-code>
+
+    /// Adjust the timestamps of an open file or directory.
+    ///
+    /// Note: This is similar to `futimens` in POSIX.
+    ///
+    /// Note: This was called `fd_filestat_set_times` in earlier versions of WASI.
+    set-times: func(
+        this: descriptor,
+        /// The desired values of the data access timestamp.
+        data-access-timestamp: new-timestamp,
+        /// The desired values of the data modification timestamp.
+        data-modification-timestamp: new-timestamp,
+    ) -> result<_, error-code>
+
+    /// Read from a descriptor, without using and updating the descriptor's offset.
+    ///
+    /// This function returns a list of bytes containing the data that was
+    /// read, along with a bool which, when true, indicates that the end of the
+    /// file was reached. The returned list will contain up to `length` bytes; it
+    /// may return fewer than requested, if the end of the file is reached or
+    /// if the I/O operation is interrupted.
+    ///
+    /// In the future, this may change to return a `stream<u8, error-code>`.
+    ///
+    /// Note: This is similar to `pread` in POSIX.
+    read: func(
+        this: descriptor,
+        /// The maximum number of bytes to read.
+        length: filesize,
+        /// The offset within the file at which to read.
+        offset: filesize,
+    ) -> result<tuple<list<u8>, bool>, error-code>
+
+    /// Write to a descriptor, without using and updating the descriptor's offset.
+    ///
+    /// It is valid to write past the end of a file; the file is extended to the
+    /// extent of the write, with bytes between the previous end and the start of
+    /// the write set to zero.
+    ///
+    /// In the future, this may change to take a `stream<u8, error-code>`.
+    ///
+    /// Note: This is similar to `pwrite` in POSIX.
+    write: func(
+        this: descriptor,
+        /// Data to write
+        buffer: list<u8>,
+        /// The offset within the file at which to write.
+        offset: filesize,
+    ) -> result<filesize, error-code>
+
+    /// Read directory entries from a directory.
+    ///
+    /// On filesystems where directories contain entries referring to themselves
+    /// and their parents, often named `.` and `..` respectively, these entries
+    /// are omitted.
+    ///
+    /// This always returns a new stream which starts at the beginning of the
+    /// directory. Multiple streams may be active on the same directory, and they
+    /// do not interfere with each other.
+    read-directory: func(
+        this: descriptor
+    ) -> result<directory-entry-stream, error-code>
+
+    /// Synchronize the data and metadata of a file to disk.
+    ///
+    /// This function succeeds with no effect if the file descriptor is not
+    /// opened for writing.
+    ///
+    /// Note: This is similar to `fsync` in POSIX.
+    sync: func(this: descriptor) -> result<_, error-code>
+
+    /// Create a directory.
+    ///
+    /// Note: This is similar to `mkdirat` in POSIX.
+    create-directory-at: func(
+        this: descriptor,
+        /// The relative path at which to create the directory.
+        path: string,
+    ) -> result<_, error-code>
+
+    /// Return the attributes of an open file or directory.
+    ///
+    /// Note: This is similar to `fstat` in POSIX, except that it does not return
+    /// device and inode information. For testing whether two descriptors refer to
+    /// the same underlying filesystem object, use `is-same-object`. To obtain
+    /// additional data that can be used do determine whether a file has been
+    /// modified, use `metadata-hash`.
+    ///
+    /// Note: This was called `fd_filestat_get` in earlier versions of WASI.
+    stat: func(this: descriptor) -> result<descriptor-stat, error-code>
+
+    /// Return the attributes of a file or directory.
+    ///
+    /// Note: This is similar to `fstatat` in POSIX, except that it does not
+    /// return device and inode information. See the `stat` description for a
+    /// discussion of alternatives.
+    ///
+    /// Note: This was called `path_filestat_get` in earlier versions of WASI.
+    stat-at: func(
+        this: descriptor,
+        /// Flags determining the method of how the path is resolved.
+        path-flags: path-flags,
+        /// The relative path of the file or directory to inspect.
+        path: string,
+    ) -> result<descriptor-stat, error-code>
+
+    /// Adjust the timestamps of a file or directory.
+    ///
+    /// Note: This is similar to `utimensat` in POSIX.
+    ///
+    /// Note: This was called `path_filestat_set_times` in earlier versions of
+    /// WASI.
+    set-times-at: func(
+        this: descriptor,
+        /// Flags determining the method of how the path is resolved.
+        path-flags: path-flags,
+        /// The relative path of the file or directory to operate on.
+        path: string,
+        /// The desired values of the data access timestamp.
+        data-access-timestamp: new-timestamp,
+        /// The desired values of the data modification timestamp.
+        data-modification-timestamp: new-timestamp,
+    ) -> result<_, error-code>
+
+    /// Create a hard link.
+    ///
+    /// Note: This is similar to `linkat` in POSIX.
+    link-at: func(
+        this: descriptor,
+        /// Flags determining the method of how the path is resolved.
+        old-path-flags: path-flags,
+        /// The relative source path from which to link.
+        old-path: string,
+        /// The base directory for `new-path`.
+        new-descriptor: descriptor,
+        /// The relative destination path at which to create the hard link.
+        new-path: string,
+    ) -> result<_, error-code>
+
+    /// Open a file or directory.
+    ///
+    /// The returned descriptor is not guaranteed to be the lowest-numbered
+    /// descriptor not currently open/ it is randomized to prevent applications
+    /// from depending on making assumptions about indexes, since this is
+    /// error-prone in multi-threaded contexts. The returned descriptor is
+    /// guaranteed to be less than 2**31.
+    ///
+    /// If `flags` contains `descriptor-flags::mutate-directory`, and the base
+    /// descriptor doesn't have `descriptor-flags::mutate-directory` set,
+    /// `open-at` fails with `error-code::read-only`.
+    ///
+    /// If `flags` contains `write` or `mutate-directory`, or `open-flags`
+    /// contains `truncate` or `create`, and the base descriptor doesn't have
+    /// `descriptor-flags::mutate-directory` set, `open-at` fails with
+    /// `error-code::read-only`.
+    ///
+    /// Note: This is similar to `openat` in POSIX.
+    open-at: func(
+        this: descriptor,
+        /// Flags determining the method of how the path is resolved.
+        path-flags: path-flags,
+        /// The relative path of the object to open.
+        path: string,
+        /// The method by which to open the file.
+        open-flags: open-flags,
+        /// Flags to use for the resulting descriptor.
+        %flags: descriptor-flags,
+        /// Permissions to use when creating a new file.
+        modes: modes
+    ) -> result<descriptor, error-code>
+
+    /// Read the contents of a symbolic link.
+    ///
+    /// If the contents contain an absolute or rooted path in the underlying
+    /// filesystem, this function fails with `error-code::not-permitted`.
+    ///
+    /// Note: This is similar to `readlinkat` in POSIX.
+    readlink-at: func(
+        this: descriptor,
+        /// The relative path of the symbolic link from which to read.
+        path: string,
+    ) -> result<string, error-code>
+
+    /// Remove a directory.
+    ///
+    /// Return `error-code::not-empty` if the directory is not empty.
+    ///
+    /// Note: This is similar to `unlinkat(fd, path, AT_REMOVEDIR)` in POSIX.
+    remove-directory-at: func(
+        this: descriptor,
+        /// The relative path to a directory to remove.
+        path: string,
+    ) -> result<_, error-code>
+
+    /// Rename a filesystem object.
+    ///
+    /// Note: This is similar to `renameat` in POSIX.
+    rename-at: func(
+        this: descriptor,
+        /// The relative source path of the file or directory to rename.
+        old-path: string,
+        /// The base directory for `new-path`.
+        new-descriptor: descriptor,
+        /// The relative destination path to which to rename the file or directory.
+        new-path: string,
+    ) -> result<_, error-code>
+
+    /// Create a symbolic link (also known as a "symlink").
+    ///
+    /// If `old-path` starts with `/`, the function fails with
+    /// `error-code::not-permitted`.
+    ///
+    /// Note: This is similar to `symlinkat` in POSIX.
+    symlink-at: func(
+        this: descriptor,
+        /// The contents of the symbolic link.
+        old-path: string,
+        /// The relative destination path at which to create the symbolic link.
+        new-path: string,
+    ) -> result<_, error-code>
+
+    /// Check accessibility of a filesystem path.
+    ///
+    /// Check whether the given filesystem path names an object which is
+    /// readable, writable, or executable, or whether it exists.
+    ///
+    /// This does not a guarantee that subsequent accesses will succeed, as
+    /// filesystem permissions may be modified asynchronously by external
+    /// entities.
+    ///
+    /// Note: This is similar to `faccessat` with the `AT_EACCESS` flag in POSIX.
+    access-at: func(
+        this: descriptor,
+        /// Flags determining the method of how the path is resolved.
+        path-flags: path-flags,
+        /// The relative path to check.
+        path: string,
+        /// The type of check to perform.
+        %type: access-type
+    ) -> result<_, error-code>
+
+    /// Unlink a filesystem object that is not a directory.
+    ///
+    /// Return `error-code::is-directory` if the path refers to a directory.
+    /// Note: This is similar to `unlinkat(fd, path, 0)` in POSIX.
+    unlink-file-at: func(
+        this: descriptor,
+        /// The relative path to a file to unlink.
+        path: string,
+    ) -> result<_, error-code>
+
+    /// Change the permissions of a filesystem object that is not a directory.
+    ///
+    /// Note that the ultimate meanings of these permissions is
+    /// filesystem-specific.
+    ///
+    /// Note: This is similar to `fchmodat` in POSIX.
+    change-file-permissions-at: func(
+        this: descriptor,
+        /// Flags determining the method of how the path is resolved.
+        path-flags: path-flags,
+        /// The relative path to operate on.
+        path: string,
+        /// The new permissions for the filesystem object.
+        modes: modes,
+    ) -> result<_, error-code>
+
+    /// Change the permissions of a directory.
+    ///
+    /// Note that the ultimate meanings of these permissions is
+    /// filesystem-specific.
+    ///
+    /// Unlike in POSIX, the `executable` flag is not reinterpreted as a "search"
+    /// flag. `read` on a directory implies readability and searchability, and
+    /// `execute` is not valid for directories.
+    ///
+    /// Note: This is similar to `fchmodat` in POSIX.
+    change-directory-permissions-at: func(
+        this: descriptor,
+        /// Flags determining the method of how the path is resolved.
+        path-flags: path-flags,
+        /// The relative path to operate on.
+        path: string,
+        /// The new permissions for the directory.
+        modes: modes,
+    ) -> result<_, error-code>
+
+    /// Request a shared advisory lock for an open file.
+    ///
+    /// This requests a *shared* lock; more than one shared lock can be held for
+    /// a file at the same time.
+    ///
+    /// If the open file has an exclusive lock, this function downgrades the lock
+    /// to a shared lock. If it has a shared lock, this function has no effect.
+    ///
+    /// This requests an *advisory* lock, meaning that the file could be accessed
+    /// by other programs that don't hold the lock.
+    ///
+    /// It is unspecified how shared locks interact with locks acquired by
+    /// non-WASI programs.
+    ///
+    /// This function blocks until the lock can be acquired.
+    ///
+    /// Not all filesystems support locking; on filesystems which don't support
+    /// locking, this function returns `error-code::unsupported`.
+    ///
+    /// Note: This is similar to `flock(fd, LOCK_SH)` in Unix.
+    lock-shared: func(this: descriptor) -> result<_, error-code>
+
+    /// Request an exclusive advisory lock for an open file.
+    ///
+    /// This requests an *exclusive* lock; no other locks may be held for the
+    /// file while an exclusive lock is held.
+    ///
+    /// If the open file has a shared lock and there are no exclusive locks held
+    /// for the file, this function upgrades the lock to an exclusive lock. If the
+    /// open file already has an exclusive lock, this function has no effect.
+    ///
+    /// This requests an *advisory* lock, meaning that the file could be accessed
+    /// by other programs that don't hold the lock.
+    ///
+    /// It is unspecified whether this function succeeds if the file descriptor
+    /// is not opened for writing. It is unspecified how exclusive locks interact
+    /// with locks acquired by non-WASI programs.
+    ///
+    /// This function blocks until the lock can be acquired.
+    ///
+    /// Not all filesystems support locking; on filesystems which don't support
+    /// locking, this function returns `error-code::unsupported`.
+    ///
+    /// Note: This is similar to `flock(fd, LOCK_EX)` in Unix.
+    lock-exclusive: func(this: descriptor) -> result<_, error-code>
+
+    /// Request a shared advisory lock for an open file.
+    ///
+    /// This requests a *shared* lock; more than one shared lock can be held for
+    /// a file at the same time.
+    ///
+    /// If the open file has an exclusive lock, this function downgrades the lock
+    /// to a shared lock. If it has a shared lock, this function has no effect.
+    ///
+    /// This requests an *advisory* lock, meaning that the file could be accessed
+    /// by other programs that don't hold the lock.
+    ///
+    /// It is unspecified how shared locks interact with locks acquired by
+    /// non-WASI programs.
+    ///
+    /// This function returns `error-code::would-block` if the lock cannot be
+    /// acquired.
+    ///
+    /// Not all filesystems support locking; on filesystems which don't support
+    /// locking, this function returns `error-code::unsupported`.
+    ///
+    /// Note: This is similar to `flock(fd, LOCK_SH | LOCK_NB)` in Unix.
+    try-lock-shared: func(this: descriptor) -> result<_, error-code>
+
+    /// Request an exclusive advisory lock for an open file.
+    ///
+    /// This requests an *exclusive* lock; no other locks may be held for the
+    /// file while an exclusive lock is held.
+    ///
+    /// If the open file has a shared lock and there are no exclusive locks held
+    /// for the file, this function upgrades the lock to an exclusive lock. If the
+    /// open file already has an exclusive lock, this function has no effect.
+    ///
+    /// This requests an *advisory* lock, meaning that the file could be accessed
+    /// by other programs that don't hold the lock.
+    ///
+    /// It is unspecified whether this function succeeds if the file descriptor
+    /// is not opened for writing. It is unspecified how exclusive locks interact
+    /// with locks acquired by non-WASI programs.
+    ///
+    /// This function returns `error-code::would-block` if the lock cannot be
+    /// acquired.
+    ///
+    /// Not all filesystems support locking; on filesystems which don't support
+    /// locking, this function returns `error-code::unsupported`.
+    ///
+    /// Note: This is similar to `flock(fd, LOCK_EX | LOCK_NB)` in Unix.
+    try-lock-exclusive: func(this: descriptor) -> result<_, error-code>
+
+    /// Release a shared or exclusive lock on an open file.
+    ///
+    /// Note: This is similar to `flock(fd, LOCK_UN)` in Unix.
+    unlock: func(this: descriptor) -> result<_, error-code>
+
+    /// Dispose of the specified `descriptor`, after which it may no longer
+    /// be used.
+    drop-descriptor: func(this: descriptor)
+
+    /// A stream of directory entries.
+    ///
+    /// This [represents a stream of `dir-entry`](https://github.com/WebAssembly/WASI/blob/main/docs/WitInWasi.md#Streams).
+    type directory-entry-stream = u32
+
+    /// Read a single directory entry from a `directory-entry-stream`.
+    read-directory-entry: func(
+        this: directory-entry-stream
+    ) -> result<option<directory-entry>, error-code>
+
+    /// Dispose of the specified `directory-entry-stream`, after which it may no longer
+    /// be used.
+    drop-directory-entry-stream: func(this: directory-entry-stream)
+
+    /// Test whether two descriptors refer to the same filesystem object.
+    ///
+    /// In POSIX, this corresponds to testing whether the two descriptors have the
+    /// same device (`st_dev`) and inode (`st_ino` or `d_ino`) numbers.
+    /// wasi-filesystem does not expose device and inode numbers, so this function
+    /// may be used instead.
+    is-same-object: func(this: descriptor, other: descriptor) -> bool
+
+    /// Return a hash of the metadata associated with a filesystem object referred
+    /// to by a descriptor.
+    ///
+    /// This returns a hash of the last-modification timestamp and file size, and
+    /// may also include the inode number, device number, birth timestamp, and
+    /// other metadata fields that may change when the file is modified or
+    /// replaced. It may also include a secret value chosen by the
+    /// implementation and not otherwise exposed.
+    ///
+    /// Implementations are encourated to provide the following properties:
+    ///
+    ///  - If the file is not modified or replaced, the computed hash value should
+    ///    usually not change.
+    ///  - If the object is modified or replaced, the computed hash value should
+    ///    usually change.
+    ///  - The inputs to the hash should not be easily computable from the
+    ///    computed hash.
+    ///
+    /// However, none of these is required.
+    metadata-hash: func(
+        this: descriptor,
+    ) -> result<metadata-hash-value, error-code>
+
+    /// Return a hash of the metadata associated with a filesystem object referred
+    /// to by a directory descriptor and a relative path.
+    ///
+    /// This performs the same hash computation as `metadata-hash`.
+    metadata-hash-at: func(
+        this: descriptor,
+        /// Flags determining the method of how the path is resolved.
+        path-flags: path-flags,
+        /// The relative path of the file or directory to inspect.
+        path: string,
+    ) -> result<metadata-hash-value, error-code>
+}
diff --git a/crates/wasi-http/wit/deps/filesystem/world.wit b/crates/wasi-http/wit/deps/filesystem/world.wit
new file mode 100644
index 000000000000..b51f484f8383
--- /dev/null
+++ b/crates/wasi-http/wit/deps/filesystem/world.wit
@@ -0,0 +1,6 @@
+package wasi:filesystem
+
+world example-world {
+    import types
+    import preopens
+}
diff --git a/crates/wasi-http/wit/deps/http/incoming-handler.wit b/crates/wasi-http/wit/deps/http/incoming-handler.wit
new file mode 100644
index 000000000000..d0e270465593
--- /dev/null
+++ b/crates/wasi-http/wit/deps/http/incoming-handler.wit
@@ -0,0 +1,24 @@
+// The `wasi:http/incoming-handler` interface is meant to be exported by
+// components and called by the host in response to a new incoming HTTP
+// response.
+//
+//   NOTE: in Preview3, this interface will be merged with
+//   `wasi:http/outgoing-handler` into a single `wasi:http/handler` interface
+//   that takes a `request` parameter and returns a `response` result.
+//
+interface incoming-handler {
+  use types.{incoming-request, response-outparam}
+
+  // The `handle` function takes an outparam instead of returning its response
+  // so that the component may stream its response while streaming any other
+  // request or response bodies. The callee MUST write a response to the
+  // `response-out` and then finish the response before returning. The `handle`
+  // function is allowed to continue execution after finishing the response's
+  // output stream. While this post-response execution is taken off the
+  // critical path, since there is no return value, there is no way to report
+  // its success or failure.
+  handle: func(
+    request: incoming-request,
+    response-out: response-outparam
+  )
+}
diff --git a/crates/wasi-http/wit/deps/http/outgoing-handler.wit b/crates/wasi-http/wit/deps/http/outgoing-handler.wit
new file mode 100644
index 000000000000..06c8e469f95b
--- /dev/null
+++ b/crates/wasi-http/wit/deps/http/outgoing-handler.wit
@@ -0,0 +1,18 @@
+// The `wasi:http/outgoing-handler` interface is meant to be imported by
+// components and implemented by the host.
+//
+//   NOTE: in Preview3, this interface will be merged with
+//   `wasi:http/outgoing-handler` into a single `wasi:http/handler` interface
+//   that takes a `request` parameter and returns a `response` result.
+//
+interface outgoing-handler {
+  use types.{outgoing-request, request-options, future-incoming-response}
+
+  // The parameter and result types of the `handle` function allow the caller
+  // to concurrently stream the bodies of the outgoing request and the incoming
+  // response.
+  handle: func(
+    request: outgoing-request,
+    options: option<request-options>
+  ) -> future-incoming-response
+}
diff --git a/crates/wasi-http/wit/deps/http/types.wit b/crates/wasi-http/wit/deps/http/types.wit
new file mode 100644
index 000000000000..6ac2caf0bfd8
--- /dev/null
+++ b/crates/wasi-http/wit/deps/http/types.wit
@@ -0,0 +1,157 @@
+package wasi:http
+
+// The `wasi:http/types` interface is meant to be imported by components to
+// define the HTTP resource types and operations used by the component's
+// imported and exported interfaces.
+interface types {
+  use wasi:io/streams.{input-stream, output-stream}
+  use wasi:poll/poll.{pollable}
+
+  // This type corresponds to HTTP standard Methods.
+  variant method {
+    get,
+    head,
+    post,
+    put,
+    delete,
+    connect,
+    options,
+    trace,
+    patch,
+    other(string)
+  }
+
+  // This type corresponds to HTTP standard Related Schemes.
+  variant scheme {
+    HTTP,
+    HTTPS,
+    other(string)
+  }
+
+  // TODO: perhaps better align with HTTP semantics?
+  // This type enumerates the different kinds of errors that may occur when
+  // initially returning a response.
+  variant error {
+      invalid-url(string),
+      timeout-error(string),
+      protocol-error(string),
+      unexpected-error(string)
+  }
+
+  // This following block defines the `fields` resource which corresponds to
+  // HTTP standard Fields. Soon, when resource types are added, the `type
+  // fields = u32` type alias can be replaced by a proper `resource fields`
+  // definition containing all the functions using the method syntactic sugar.
+  type fields = u32
+  drop-fields: func(fields: fields)
+  new-fields: func(entries: list<tuple<string,string>>) -> fields
+  fields-get: func(fields: fields, name: string) -> list<list<u8>>
+  fields-set: func(fields: fields, name: string, value: list<list<u8>>)
+  fields-delete: func(fields: fields, name: string)
+  fields-append: func(fields: fields, name: string, value: list<u8>)
+  fields-entries: func(fields: fields) -> list<tuple<string,list<u8>>>
+  fields-clone: func(fields: fields) -> fields
+
+  type headers = fields
+  type trailers = fields
+
+  // The following block defines stream types which corresponds to the HTTP
+  // standard Contents and Trailers. With Preview3, all of these fields can be
+  // replaced by a stream<u8, option<trailers>>. In the interim, we need to
+  // build on separate resource types defined by `wasi:io/streams`. The
+  // `finish-` functions emulate the stream's result value and MUST be called
+  // exactly once after the final read/write from/to the stream before dropping
+  // the stream.
+  type incoming-stream = input-stream
+  type outgoing-stream = output-stream
+  finish-incoming-stream: func(s: incoming-stream) -> option<trailers>
+  finish-outgoing-stream: func(s: outgoing-stream, trailers: option<trailers>)
+
+  // The following block defines the `incoming-request` and `outgoing-request`
+  // resource types that correspond to HTTP standard Requests. Soon, when
+  // resource types are added, the `u32` type aliases can be replaced by
+  // proper `resource` type definitions containing all the functions as
+  // methods. Later, Preview2 will allow both types to be merged together into
+  // a single `request` type (that uses the single `stream` type mentioned
+  // above). The `consume` and `write` methods may only be called once (and
+  // return failure thereafter).
+  type incoming-request = u32
+  type outgoing-request = u32
+  drop-incoming-request: func(request: incoming-request)
+  drop-outgoing-request: func(request: outgoing-request)
+  incoming-request-method: func(request: incoming-request) -> method
+  incoming-request-path-with-query: func(request: incoming-request) -> option<string>
+  incoming-request-scheme: func(request: incoming-request) -> option<scheme>
+  incoming-request-authority: func(request: incoming-request) -> option<string>
+  incoming-request-headers: func(request: incoming-request) -> headers
+  incoming-request-consume: func(request: incoming-request) -> result<incoming-stream>
+  new-outgoing-request: func(
+    method: method,
+    path-with-query: option<string>,
+    scheme: option<scheme>,
+    authority: option<string>,
+    headers: headers
+  ) -> outgoing-request
+  outgoing-request-write: func(request: outgoing-request) -> result<outgoing-stream>
+
+  // Additional optional parameters that can be set when making a request.
+  record request-options {
+    // The following timeouts are specific to the HTTP protocol and work
+    // independently of the overall timeouts passed to `io.poll.poll-oneoff`.
+
+    // The timeout for the initial connect.
+    connect-timeout-ms: option<u32>,
+
+    // The timeout for receiving the first byte of the response body.
+    first-byte-timeout-ms: option<u32>,
+
+    // The timeout for receiving the next chunk of bytes in the response body
+    // stream.
+    between-bytes-timeout-ms: option<u32>
+  }
+
+  // The following block defines a special resource type used by the
+  // `wasi:http/incoming-handler` interface. When resource types are added, this
+  // block can be replaced by a proper `resource response-outparam { ... }`
+  // definition. Later, with Preview3, the need for an outparam goes away entirely
+  // (the `wasi:http/handler` interface used for both incoming and outgoing can
+  // simply return a `stream`).
+  type response-outparam = u32
+  drop-response-outparam: func(response: response-outparam)
+  set-response-outparam: func(param: response-outparam, response: result<outgoing-response, error>) -> result
+
+  // This type corresponds to the HTTP standard Status Code.
+  type status-code = u16
+
+  // The following block defines the `incoming-response` and `outgoing-response`
+  // resource types that correspond to HTTP standard Responses. Soon, when
+  // resource types are added, the `u32` type aliases can be replaced by proper
+  // `resource` type definitions containing all the functions as methods. Later,
+  // Preview2 will allow both types to be merged together into a single `response`
+  // type (that uses the single `stream` type mentioned above). The `consume` and
+  // `write` methods may only be called once (and return failure thereafter).
+  type incoming-response = u32
+  type outgoing-response = u32
+  drop-incoming-response: func(response: incoming-response)
+  drop-outgoing-response: func(response: outgoing-response)
+  incoming-response-status: func(response: incoming-response) -> status-code
+  incoming-response-headers: func(response: incoming-response) -> headers
+  incoming-response-consume: func(response: incoming-response) -> result<incoming-stream>
+  new-outgoing-response: func(
+    status-code: status-code,
+    headers: headers
+  ) -> outgoing-response
+  outgoing-response-write: func(response: outgoing-response) -> result<outgoing-stream>
+
+  // The following block defines a special resource type used by the
+  // `wasi:http/outgoing-handler` interface to emulate
+  // `future<result<response, error>>` in advance of Preview3. Given a
+  // `future-incoming-response`, the client can call the non-blocking `get`
+  // method to get the result if it is available. If the result is not available,
+  // the client can call `listen` to get a `pollable` that can be passed to
+  // `io.poll.poll-oneoff`.
+  type future-incoming-response = u32
+  drop-future-incoming-response: func(f: future-incoming-response)
+  future-incoming-response-get: func(f: future-incoming-response) -> option<result<incoming-response, error>>
+  listen-to-future-incoming-response: func(f: future-incoming-response) -> pollable
+}
diff --git a/crates/wasi-http/wit/deps/io/streams.wit b/crates/wasi-http/wit/deps/io/streams.wit
new file mode 100644
index 000000000000..011bde0d6aaf
--- /dev/null
+++ b/crates/wasi-http/wit/deps/io/streams.wit
@@ -0,0 +1,254 @@
+package wasi:io
+
+/// WASI I/O is an I/O abstraction API which is currently focused on providing
+/// stream types.
+///
+/// In the future, the component model is expected to add built-in stream types;
+/// when it does, they are expected to subsume this API.
+interface streams {
+    use wasi:poll/poll.{pollable}
+
+    /// An error type returned from a stream operation.
+    ///
+    /// TODO: need to figure out the actual contents of this error. Used to be
+    /// an empty record but that's no longer allowed. The `dummy` field is
+    /// only here to have this be a valid in the component model by being
+    /// non-empty.
+    record stream-error {
+      dummy: u32,
+    }
+
+    /// Streams provide a sequence of data and then end; once they end, they
+    /// no longer provide any further data.
+    ///
+    /// For example, a stream reading from a file ends when the stream reaches
+    /// the end of the file. For another example, a stream reading from a
+    /// socket ends when the socket is closed.
+    enum stream-status {
+        /// The stream is open and may produce further data.
+        open,
+        /// When reading, this indicates that the stream will not produce
+        /// further data.
+        /// When writing, this indicates that the stream will no longer be read.
+        /// Further writes are still permitted.
+        ended,
+    }
+
+    /// An input bytestream. In the future, this will be replaced by handle
+    /// types.
+    ///
+    /// This conceptually represents a `stream<u8, _>`. It's temporary
+    /// scaffolding until component-model's async features are ready.
+    ///
+    /// `input-stream`s are *non-blocking* to the extent practical on underlying
+    /// platforms. I/O operations always return promptly; if fewer bytes are
+    /// promptly available than requested, they return the number of bytes promptly
+    /// available, which could even be zero. To wait for data to be available,
+    /// use the `subscribe-to-input-stream` function to obtain a `pollable` which
+    /// can be polled for using `wasi_poll`.
+    ///
+    /// And at present, it is a `u32` instead of being an actual handle, until
+    /// the wit-bindgen implementation of handles and resources is ready.
+    ///
+    /// This [represents a resource](https://github.com/WebAssembly/WASI/blob/main/docs/WitInWasi.md#Resources).
+    type input-stream = u32
+
+    /// Perform a non-blocking read from the stream.
+    ///
+    /// This function returns a list of bytes containing the data that was
+    /// read, along with a `stream-status` which, indicates whether further
+    /// reads are expected to produce data. The returned list will contain up to
+    /// `len` bytes; it may return fewer than requested, but not more.
+    ///
+    /// Once a stream has reached the end, subsequent calls to read or
+    /// `skip` will always report end-of-stream rather than producing more
+    /// data.
+    ///
+    /// If `len` is 0, it represents a request to read 0 bytes, which should
+    /// always succeed, assuming the stream hasn't reached its end yet, and
+    /// return an empty list.
+    ///
+    /// The len here is a `u64`, but some callees may not be able to allocate
+    /// a buffer as large as that would imply.
+    /// FIXME: describe what happens if allocation fails.
+    ///
+    /// When the returned `stream-status` is `open`, the length of the returned
+    /// value may be less than `len`. When an empty list is returned, this
+    /// indicates that no more bytes were available from the stream at that
+    /// time. In that case the subscribe-to-input-stream pollable will indicate
+    /// when additional bytes are available for reading.
+    read: func(
+        this: input-stream,
+        /// The maximum number of bytes to read
+        len: u64
+    ) -> result<tuple<list<u8>, stream-status>, stream-error>
+
+    /// Read bytes from a stream, with blocking.
+    ///
+    /// This is similar to `read`, except that it blocks until at least one
+    /// byte can be read.
+    blocking-read: func(
+        this: input-stream,
+        /// The maximum number of bytes to read
+        len: u64
+    ) -> result<tuple<list<u8>, stream-status>, stream-error>
+
+    /// Skip bytes from a stream.
+    ///
+    /// This is similar to the `read` function, but avoids copying the
+    /// bytes into the instance.
+    ///
+    /// Once a stream has reached the end, subsequent calls to read or
+    /// `skip` will always report end-of-stream rather than producing more
+    /// data.
+    ///
+    /// This function returns the number of bytes skipped, along with a bool
+    /// indicating whether the end of the stream was reached. The returned
+    /// value will be at most `len`; it may be less.
+    skip: func(
+        this: input-stream,
+        /// The maximum number of bytes to skip.
+        len: u64,
+    ) -> result<tuple<u64, stream-status>, stream-error>
+
+    /// Skip bytes from a stream, with blocking.
+    ///
+    /// This is similar to `skip`, except that it blocks until at least one
+    /// byte can be consumed.
+    blocking-skip: func(
+        this: input-stream,
+        /// The maximum number of bytes to skip.
+        len: u64,
+    ) -> result<tuple<u64, stream-status>, stream-error>
+
+    /// Create a `pollable` which will resolve once either the specified stream
+    /// has bytes available to read or the other end of the stream has been
+    /// closed.
+    subscribe-to-input-stream: func(this: input-stream) -> pollable
+
+    /// Dispose of the specified `input-stream`, after which it may no longer
+    /// be used.
+    drop-input-stream: func(this: input-stream)
+
+    /// An output bytestream. In the future, this will be replaced by handle
+    /// types.
+    ///
+    /// This conceptually represents a `stream<u8, _>`. It's temporary
+    /// scaffolding until component-model's async features are ready.
+    ///
+    /// `output-stream`s are *non-blocking* to the extent practical on
+    /// underlying platforms. Except where specified otherwise, I/O operations also
+    /// always return promptly, after the number of bytes that can be written
+    /// promptly, which could even be zero. To wait for the stream to be ready to
+    /// accept data, the `subscribe-to-output-stream` function to obtain a
+    /// `pollable` which can be polled for using `wasi:poll`.
+    ///
+    /// And at present, it is a `u32` instead of being an actual handle, until
+    /// the wit-bindgen implementation of handles and resources is ready.
+    ///
+    /// This [represents a resource](https://github.com/WebAssembly/WASI/blob/main/docs/WitInWasi.md#Resources).
+    type output-stream = u32
+
+    /// Perform a non-blocking write of bytes to a stream.
+    ///
+    /// This function returns a `u64` and a `stream-status`. The `u64` indicates
+    /// the number of bytes from `buf` that were written, which may be less than
+    /// the length of `buf`. The `stream-status` indicates if further writes to
+    /// the stream are expected to be read.
+    ///
+    /// When the returned `stream-status` is `open`, the `u64` return value may
+    /// be less than the length of `buf`. This indicates that no more bytes may
+    /// be written to the stream promptly. In that case the
+    /// subscribe-to-output-stream pollable will indicate when additional bytes
+    /// may be promptly written.
+    ///
+    /// TODO: document what happens when an empty list is written
+    write: func(
+        this: output-stream,
+        /// Data to write
+        buf: list<u8>
+    ) -> result<tuple<u64, stream-status>, stream-error>
+
+    /// Write bytes to a stream, with blocking.
+    ///
+    /// This is similar to `write`, except that it blocks until at least one
+    /// byte can be written.
+    blocking-write: func(
+        this: output-stream,
+        /// Data to write
+        buf: list<u8>
+    ) -> result<tuple<u64, stream-status>, stream-error>
+
+    /// Write multiple zero bytes to a stream.
+    ///
+    /// This function returns a `u64` indicating the number of zero bytes
+    /// that were written; it may be less than `len`.
+    write-zeroes: func(
+        this: output-stream,
+        /// The number of zero bytes to write
+        len: u64
+    ) -> result<tuple<u64, stream-status>, stream-error>
+
+    /// Write multiple zero bytes to a stream, with blocking.
+    ///
+    /// This is similar to `write-zeroes`, except that it blocks until at least
+    /// one byte can be written.
+    blocking-write-zeroes: func(
+        this: output-stream,
+        /// The number of zero bytes to write
+        len: u64
+    ) -> result<tuple<u64, stream-status>, stream-error>
+
+    /// Read from one stream and write to another.
+    ///
+    /// This function returns the number of bytes transferred; it may be less
+    /// than `len`.
+    ///
+    /// Unlike other I/O functions, this function blocks until all the data
+    /// read from the input stream has been written to the output stream.
+    splice: func(
+        this: output-stream,
+        /// The stream to read from
+        src: input-stream,
+        /// The number of bytes to splice
+        len: u64,
+    ) -> result<tuple<u64, stream-status>, stream-error>
+
+    /// Read from one stream and write to another, with blocking.
+    ///
+    /// This is similar to `splice`, except that it blocks until at least
+    /// one byte can be read.
+    blocking-splice: func(
+        this: output-stream,
+        /// The stream to read from
+        src: input-stream,
+        /// The number of bytes to splice
+        len: u64,
+    ) -> result<tuple<u64, stream-status>, stream-error>
+
+    /// Forward the entire contents of an input stream to an output stream.
+    ///
+    /// This function repeatedly reads from the input stream and writes
+    /// the data to the output stream, until the end of the input stream
+    /// is reached, or an error is encountered.
+    ///
+    /// Unlike other I/O functions, this function blocks until the end
+    /// of the input stream is seen and all the data has been written to
+    /// the output stream.
+    ///
+    /// This function returns the number of bytes transferred, and the status of
+    /// the output stream.
+    forward: func(
+        this: output-stream,
+        /// The stream to read from
+        src: input-stream
+    ) -> result<tuple<u64, stream-status>, stream-error>
+
+    /// Create a `pollable` which will resolve once either the specified stream
+    /// is ready to accept bytes or the other end of the stream has been closed.
+    subscribe-to-output-stream: func(this: output-stream) -> pollable
+
+    /// Dispose of the specified `output-stream`, after which it may no longer
+    /// be used.
+    drop-output-stream: func(this: output-stream)
+}
diff --git a/crates/wasi-http/wit/deps/logging/handler.wit b/crates/wasi-http/wit/deps/logging/handler.wit
new file mode 100644
index 000000000000..e6b077be8a60
--- /dev/null
+++ b/crates/wasi-http/wit/deps/logging/handler.wit
@@ -0,0 +1,34 @@
+package wasi:logging
+
+/// WASI Logging is a logging API intended to let users emit log messages with
+/// simple priority levels and context values.
+interface handler {
+    /// A log level, describing a kind of message.
+    enum level {
+       /// Describes messages about the values of variables and the flow of
+       /// control within a program.
+       trace,
+
+       /// Describes messages likely to be of interest to someone debugging a
+       /// program.
+       debug,
+
+       /// Describes messages likely to be of interest to someone monitoring a
+       /// program.
+       info,
+
+       /// Describes messages indicating hazardous situations.
+       warn,
+
+       /// Describes messages indicating serious errors.
+       error,
+    }
+
+    /// Emit a log message.
+    ///
+    /// A log message has a `level` describing what kind of message is being
+    /// sent, a context, which is an uninterpreted string meant to help
+    /// consumers group similar messages, and a string containing the message
+    /// text.
+    log: func(level: level, context: string, message: string)
+}
diff --git a/crates/wasi-http/wit/deps/poll/poll.wit b/crates/wasi-http/wit/deps/poll/poll.wit
new file mode 100644
index 000000000000..a6334c5570fc
--- /dev/null
+++ b/crates/wasi-http/wit/deps/poll/poll.wit
@@ -0,0 +1,39 @@
+package wasi:poll
+
+/// A poll API intended to let users wait for I/O events on multiple handles
+/// at once.
+interface poll {
+    /// A "pollable" handle.
+    ///
+    /// This is conceptually represents a `stream<_, _>`, or in other words,
+    /// a stream that one can wait on, repeatedly, but which does not itself
+    /// produce any data. It's temporary scaffolding until component-model's
+    /// async features are ready.
+    ///
+    /// And at present, it is a `u32` instead of being an actual handle, until
+    /// the wit-bindgen implementation of handles and resources is ready.
+    ///
+    /// `pollable` lifetimes are not automatically managed. Users must ensure
+    /// that they do not outlive the resource they reference.
+    ///
+    /// This [represents a resource](https://github.com/WebAssembly/WASI/blob/main/docs/WitInWasi.md#Resources).
+    type pollable = u32
+
+    /// Dispose of the specified `pollable`, after which it may no longer
+    /// be used.
+    drop-pollable: func(this: pollable)
+
+    /// Poll for completion on a set of pollables.
+    ///
+    /// The "oneoff" in the name refers to the fact that this function must do a
+    /// linear scan through the entire list of subscriptions, which may be
+    /// inefficient if the number is large and the same subscriptions are used
+    /// many times. In the future, this is expected to be obsoleted by the
+    /// component model async proposal, which will include a scalable waiting
+    /// facility.
+    ///
+    /// The result list<bool> is the same length as the argument
+    /// list<pollable>, and indicates the readiness of each corresponding
+    /// element in that / list, with true indicating ready.
+    poll-oneoff: func(in: list<pollable>) -> list<bool>
+}
diff --git a/crates/wasi-http/wit/deps/preview/command-extended.wit b/crates/wasi-http/wit/deps/preview/command-extended.wit
new file mode 100644
index 000000000000..8649328712fa
--- /dev/null
+++ b/crates/wasi-http/wit/deps/preview/command-extended.wit
@@ -0,0 +1,34 @@
+package wasi:preview
+
+world command-extended {
+  import wasi:clocks/wall-clock
+  import wasi:clocks/monotonic-clock
+  import wasi:clocks/timezone
+  import wasi:filesystem/types
+  import wasi:filesystem/preopens
+  import wasi:sockets/instance-network
+  import wasi:sockets/ip-name-lookup
+  import wasi:sockets/network
+  import wasi:sockets/tcp-create-socket
+  import wasi:sockets/tcp
+  import wasi:sockets/udp-create-socket
+  import wasi:sockets/udp
+  import wasi:random/random
+  import wasi:random/insecure
+  import wasi:random/insecure-seed
+  import wasi:poll/poll
+  import wasi:io/streams
+  import wasi:cli-base/environment
+  import wasi:cli-base/exit
+  import wasi:cli-base/stdin
+  import wasi:cli-base/stdout
+  import wasi:cli-base/stderr
+
+  // We should replace all others with `include self.command`
+  // as soon as the unioning of worlds is available:
+  // https://github.com/WebAssembly/component-model/issues/169
+  import wasi:logging/handler
+  import wasi:http/outgoing-handler
+
+  export run: func() -> result
+}
diff --git a/crates/wasi-http/wit/deps/preview/command.wit b/crates/wasi-http/wit/deps/preview/command.wit
new file mode 100644
index 000000000000..dcd06d795753
--- /dev/null
+++ b/crates/wasi-http/wit/deps/preview/command.wit
@@ -0,0 +1,26 @@
+world command {
+  import wasi:clocks/wall-clock
+  import wasi:clocks/monotonic-clock
+  import wasi:clocks/timezone
+  import wasi:filesystem/types
+  import wasi:filesystem/preopens
+  import wasi:sockets/instance-network
+  import wasi:sockets/ip-name-lookup
+  import wasi:sockets/network
+  import wasi:sockets/tcp-create-socket
+  import wasi:sockets/tcp
+  import wasi:sockets/udp-create-socket
+  import wasi:sockets/udp
+  import wasi:random/random
+  import wasi:random/insecure
+  import wasi:random/insecure-seed
+  import wasi:poll/poll
+  import wasi:io/streams
+  import wasi:cli-base/environment
+  import wasi:cli-base/exit
+  import wasi:cli-base/stdin
+  import wasi:cli-base/stdout
+  import wasi:cli-base/stderr
+
+  export run: func() -> result
+}
diff --git a/crates/wasi-http/wit/deps/preview/proxy.wit b/crates/wasi-http/wit/deps/preview/proxy.wit
new file mode 100644
index 000000000000..a616daa1c243
--- /dev/null
+++ b/crates/wasi-http/wit/deps/preview/proxy.wit
@@ -0,0 +1,9 @@
+world proxy {
+  import wasi:random/random
+  import wasi:random/insecure
+  import wasi:random/insecure-seed
+  import wasi:logging/handler
+  import wasi:http/outgoing-handler
+
+  export wasi:http/incoming-handler
+}
diff --git a/crates/wasi-http/wit/deps/preview/reactor.wit b/crates/wasi-http/wit/deps/preview/reactor.wit
new file mode 100644
index 000000000000..aff49ea4d186
--- /dev/null
+++ b/crates/wasi-http/wit/deps/preview/reactor.wit
@@ -0,0 +1,24 @@
+world reactor {
+  import wasi:clocks/wall-clock
+  import wasi:clocks/monotonic-clock
+  import wasi:clocks/timezone
+  import wasi:filesystem/types
+  import wasi:filesystem/preopens
+  import wasi:sockets/instance-network
+  import wasi:sockets/ip-name-lookup
+  import wasi:sockets/network
+  import wasi:sockets/tcp-create-socket
+  import wasi:sockets/tcp
+  import wasi:sockets/udp-create-socket
+  import wasi:sockets/udp
+  import wasi:random/random
+  import wasi:poll/poll
+  import wasi:io/streams
+  import wasi:logging/handler
+  import wasi:http/outgoing-handler
+  import wasi:cli-base/environment
+  import wasi:cli-base/exit
+  import wasi:cli-base/stdin
+  import wasi:cli-base/stdout
+  import wasi:cli-base/stderr
+}
diff --git a/crates/wasi-http/wit/deps/random/insecure-seed.wit b/crates/wasi-http/wit/deps/random/insecure-seed.wit
new file mode 100644
index 000000000000..ff2ff65d0754
--- /dev/null
+++ b/crates/wasi-http/wit/deps/random/insecure-seed.wit
@@ -0,0 +1,24 @@
+/// The insecure-seed interface for seeding hash-map DoS resistance.
+///
+/// It is intended to be portable at least between Unix-family platforms and
+/// Windows.
+interface insecure-seed {
+    /// Return a 128-bit value that may contain a pseudo-random value.
+    ///
+    /// The returned value is not required to be computed from a CSPRNG, and may
+    /// even be entirely deterministic. Host implementations are encouraged to
+    /// provide pseudo-random values to any program exposed to
+    /// attacker-controlled content, to enable DoS protection built into many
+    /// languages' hash-map implementations.
+    ///
+    /// This function is intended to only be called once, by a source language
+    /// to initialize Denial Of Service (DoS) protection in its hash-map
+    /// implementation.
+    ///
+    /// # Expected future evolution
+    ///
+    /// This will likely be changed to a value import, to prevent it from being
+    /// called multiple times and potentially used for purposes other than DoS
+    /// protection.
+    insecure-seed: func() -> tuple<u64, u64>
+}
diff --git a/crates/wasi-http/wit/deps/random/insecure.wit b/crates/wasi-http/wit/deps/random/insecure.wit
new file mode 100644
index 000000000000..ff0826822d5f
--- /dev/null
+++ b/crates/wasi-http/wit/deps/random/insecure.wit
@@ -0,0 +1,21 @@
+/// The insecure interface for insecure pseudo-random numbers.
+///
+/// It is intended to be portable at least between Unix-family platforms and
+/// Windows.
+interface insecure {
+    /// Return `len` insecure pseudo-random bytes.
+    ///
+    /// This function is not cryptographically secure. Do not use it for
+    /// anything related to security.
+    ///
+    /// There are no requirements on the values of the returned bytes, however
+    /// implementations are encouraged to return evenly distributed values with
+    /// a long period.
+    get-insecure-random-bytes: func(len: u64) -> list<u8>
+
+    /// Return an insecure pseudo-random `u64` value.
+    ///
+    /// This function returns the same type of pseudo-random data as
+    /// `get-insecure-random-bytes`, represented as a `u64`.
+    get-insecure-random-u64: func() -> u64
+}
diff --git a/crates/wasi-http/wit/deps/random/random.wit b/crates/wasi-http/wit/deps/random/random.wit
new file mode 100644
index 000000000000..f2bd6358c139
--- /dev/null
+++ b/crates/wasi-http/wit/deps/random/random.wit
@@ -0,0 +1,25 @@
+package wasi:random
+
+/// WASI Random is a random data API.
+///
+/// It is intended to be portable at least between Unix-family platforms and
+/// Windows.
+interface random {
+    /// Return `len` cryptographically-secure pseudo-random bytes.
+    ///
+    /// This function must produce data from an adequately seeded
+    /// cryptographically-secure pseudo-random number generator (CSPRNG), so it
+    /// must not block, from the perspective of the calling program, and the
+    /// returned data is always unpredictable.
+    ///
+    /// This function must always return fresh pseudo-random data. Deterministic
+    /// environments must omit this function, rather than implementing it with
+    /// deterministic data.
+    get-random-bytes: func(len: u64) -> list<u8>
+
+    /// Return a cryptographically-secure pseudo-random `u64` value.
+    ///
+    /// This function returns the same type of pseudo-random data as
+    /// `get-random-bytes`, represented as a `u64`.
+    get-random-u64: func() -> u64
+}
diff --git a/crates/wasi-http/wit/deps/sockets/instance-network.wit b/crates/wasi-http/wit/deps/sockets/instance-network.wit
new file mode 100644
index 000000000000..d911a29cc8dd
--- /dev/null
+++ b/crates/wasi-http/wit/deps/sockets/instance-network.wit
@@ -0,0 +1,9 @@
+
+/// This interface provides a value-export of the default network handle..
+interface instance-network {
+	use network.{network}
+
+	/// Get a handle to the default network.
+	instance-network: func() -> network
+
+}
diff --git a/crates/wasi-http/wit/deps/sockets/ip-name-lookup.wit b/crates/wasi-http/wit/deps/sockets/ip-name-lookup.wit
new file mode 100644
index 000000000000..6c64b4617b98
--- /dev/null
+++ b/crates/wasi-http/wit/deps/sockets/ip-name-lookup.wit
@@ -0,0 +1,69 @@
+
+interface ip-name-lookup {
+	use wasi:poll/poll.{pollable}
+	use network.{network, error-code, ip-address, ip-address-family}
+
+
+	/// Resolve an internet host name to a list of IP addresses.
+	///
+	/// See the wasi-socket proposal README.md for a comparison with getaddrinfo.
+	///
+	/// # Parameters
+	/// - `name`: The name to look up. IP addresses are not allowed. Unicode domain names are automatically converted
+	///     to ASCII using IDNA encoding.
+	/// - `address-family`: If provided, limit the results to addresses of this specific address family.
+	/// - `include-unavailable`: When set to true, this function will also return addresses of which the runtime
+	///   thinks (or knows) can't be connected to at the moment. For example, this will return IPv6 addresses on
+	///   systems without an active IPv6 interface. Notes:
+	///     - Even when no public IPv6 interfaces are present or active, names like "localhost" can still resolve to an IPv6 address.
+	///     - Whatever is "available" or "unavailable" is volatile and can change everytime a network cable is unplugged.
+	///
+	/// This function never blocks. It either immediately fails or immediately returns successfully with a `resolve-address-stream`
+	/// that can be used to (asynchronously) fetch the results.
+	///
+	/// At the moment, the stream never completes successfully with 0 items. Ie. the first call
+	/// to `resolve-next-address` never returns `ok(none)`. This may change in the future.
+	///
+	/// # Typical errors
+	/// - `invalid-name`:                 `name` is a syntactically invalid domain name.
+	/// - `invalid-name`:                 `name` is an IP address.
+	/// - `address-family-not-supported`: The specified `address-family` is not supported. (EAI_FAMILY)
+	///
+	/// # References:
+	/// - <https://pubs.opengroup.org/onlinepubs/9699919799/functions/getaddrinfo.html>
+	/// - <https://man7.org/linux/man-pages/man3/getaddrinfo.3.html>
+	/// - <https://learn.microsoft.com/en-us/windows/win32/api/ws2tcpip/nf-ws2tcpip-getaddrinfo>
+	/// - <https://man.freebsd.org/cgi/man.cgi?query=getaddrinfo&sektion=3>
+	resolve-addresses: func(network: network, name: string, address-family: option<ip-address-family>, include-unavailable: bool) -> result<resolve-address-stream, error-code>
+
+
+
+    type resolve-address-stream = u32
+
+	/// Returns the next address from the resolver.
+	///
+	/// This function should be called multiple times. On each call, it will
+	/// return the next address in connection order preference. If all
+	/// addresses have been exhausted, this function returns `none`.
+	/// After which, you should release the stream with `drop-resolve-address-stream`.
+	///
+	/// This function never returns IPv4-mapped IPv6 addresses.
+	///
+	/// # Typical errors
+	/// - `name-unresolvable`:          Name does not exist or has no suitable associated IP addresses. (EAI_NONAME, EAI_NODATA, EAI_ADDRFAMILY)
+	/// - `temporary-resolver-failure`: A temporary failure in name resolution occurred. (EAI_AGAIN)
+	/// - `permanent-resolver-failure`: A permanent failure in name resolution occurred. (EAI_FAIL)
+	/// - `would-block`:                A result is not available yet. (EWOULDBLOCK, EAGAIN)
+	resolve-next-address: func(this: resolve-address-stream) -> result<option<ip-address>, error-code>
+
+	/// Dispose of the specified `resolve-address-stream`, after which it may no longer be used.
+	///
+	/// Note: this function is scheduled to be removed when Resources are natively supported in Wit.
+	drop-resolve-address-stream: func(this: resolve-address-stream)
+
+	/// Create a `pollable` which will resolve once the stream is ready for I/O.
+	///
+	/// Note: this function is here for WASI Preview2 only.
+	/// It's planned to be removed when `future` is natively supported in Preview3.
+	subscribe: func(this: resolve-address-stream) -> pollable
+}
diff --git a/crates/wasi-http/wit/deps/sockets/network.wit b/crates/wasi-http/wit/deps/sockets/network.wit
new file mode 100644
index 000000000000..c370214ce1f9
--- /dev/null
+++ b/crates/wasi-http/wit/deps/sockets/network.wit
@@ -0,0 +1,187 @@
+package wasi:sockets
+
+interface network {
+    /// An opaque resource that represents access to (a subset of) the network.
+	/// This enables context-based security for networking.
+	/// There is no need for this to map 1:1 to a physical network interface.
+	///
+	/// FYI, In the future this will be replaced by handle types.
+    type network = u32
+
+	/// Dispose of the specified `network`, after which it may no longer be used.
+	///
+	/// Note: this function is scheduled to be removed when Resources are natively supported in Wit.
+	drop-network: func(this: network)
+
+
+	/// Error codes.
+	/// 
+	/// In theory, every API can return any error code.
+	/// In practice, API's typically only return the errors documented per API
+	/// combined with a couple of errors that are always possible:
+	/// - `unknown`
+	/// - `access-denied`
+	/// - `not-supported`
+	/// - `out-of-memory`
+	/// 
+	/// See each individual API for what the POSIX equivalents are. They sometimes differ per API.
+	enum error-code {
+		// ### GENERAL ERRORS ###
+
+		/// Unknown error
+		unknown,
+
+		/// Access denied.
+		/// 
+		/// POSIX equivalent: EACCES, EPERM
+		access-denied,
+
+		/// The operation is not supported.
+		/// 
+		/// POSIX equivalent: EOPNOTSUPP
+		not-supported,
+
+		/// Not enough memory to complete the operation.
+		/// 
+		/// POSIX equivalent: ENOMEM, ENOBUFS, EAI_MEMORY
+		out-of-memory,
+
+		/// The operation timed out before it could finish completely.
+		timeout,
+
+		/// This operation is incompatible with another asynchronous operation that is already in progress.
+		concurrency-conflict,
+
+		/// Trying to finish an asynchronous operation that:
+		/// - has not been started yet, or:
+		/// - was already finished by a previous `finish-*` call.
+		/// 
+		/// Note: this is scheduled to be removed when `future`s are natively supported.
+		not-in-progress,
+
+		/// The operation has been aborted because it could not be completed immediately.
+		/// 
+		/// Note: this is scheduled to be removed when `future`s are natively supported.
+		would-block,
+
+
+		// ### IP ERRORS ###
+
+		/// The specified address-family is not supported.
+		address-family-not-supported,
+
+		/// An IPv4 address was passed to an IPv6 resource, or vice versa.
+		address-family-mismatch,
+
+		/// The socket address is not a valid remote address. E.g. the IP address is set to INADDR_ANY, or the port is set to 0.
+		invalid-remote-address,
+
+		/// The operation is only supported on IPv4 resources.
+		ipv4-only-operation,
+
+		/// The operation is only supported on IPv6 resources.
+		ipv6-only-operation,
+
+
+
+		// ### TCP & UDP SOCKET ERRORS ###
+
+		/// A new socket resource could not be created because of a system limit.
+		new-socket-limit,
+		
+		/// The socket is already attached to another network.
+		already-attached,
+
+		/// The socket is already bound.
+		already-bound,
+
+		/// The socket is already in the Connection state.
+		already-connected,
+
+		/// The socket is not bound to any local address.
+		not-bound,
+
+		/// The socket is not in the Connection state.
+		not-connected,
+
+		/// A bind operation failed because the provided address is not an address that the `network` can bind to.
+		address-not-bindable,
+
+		/// A bind operation failed because the provided address is already in use.
+		address-in-use,
+
+		/// A bind operation failed because there are no ephemeral ports available.
+		ephemeral-ports-exhausted,
+
+		/// The remote address is not reachable
+		remote-unreachable,
+		
+
+		// ### TCP SOCKET ERRORS ###
+		
+		/// The socket is already in the Listener state.
+		already-listening,
+
+		/// The socket is already in the Listener state.
+		not-listening,
+
+		/// The connection was forcefully rejected
+		connection-refused,
+
+		/// The connection was reset.
+		connection-reset,
+		
+
+		// ### UDP SOCKET ERRORS ###
+		datagram-too-large,
+
+
+		// ### NAME LOOKUP ERRORS ###
+		
+		/// The provided name is a syntactically invalid domain name.
+		invalid-name,
+
+		/// Name does not exist or has no suitable associated IP addresses.
+		name-unresolvable,
+
+		/// A temporary failure in name resolution occurred.
+		temporary-resolver-failure,
+
+		/// A permanent failure in name resolution occurred.
+		permanent-resolver-failure,
+	}
+
+	enum ip-address-family {
+		/// Similar to `AF_INET` in POSIX.
+		ipv4,
+
+		/// Similar to `AF_INET6` in POSIX.
+		ipv6,
+	}
+
+	type ipv4-address = tuple<u8, u8, u8, u8>
+	type ipv6-address = tuple<u16, u16, u16, u16, u16, u16, u16, u16>
+
+	variant ip-address {
+		ipv4(ipv4-address),
+		ipv6(ipv6-address),
+	}
+
+	record ipv4-socket-address {
+		port: u16, // sin_port
+		address: ipv4-address, // sin_addr
+	}
+
+	record ipv6-socket-address {
+		port: u16, // sin6_port
+		flow-info: u32, // sin6_flowinfo
+		address: ipv6-address, // sin6_addr
+		scope-id: u32, // sin6_scope_id
+	}
+
+	variant ip-socket-address {
+		ipv4(ipv4-socket-address),
+		ipv6(ipv6-socket-address),
+	}
+
+}
diff --git a/crates/wasi-http/wit/deps/sockets/tcp-create-socket.wit b/crates/wasi-http/wit/deps/sockets/tcp-create-socket.wit
new file mode 100644
index 000000000000..f467d2856906
--- /dev/null
+++ b/crates/wasi-http/wit/deps/sockets/tcp-create-socket.wit
@@ -0,0 +1,27 @@
+
+interface tcp-create-socket {
+	use network.{network, error-code, ip-address-family}
+	use tcp.{tcp-socket}
+
+	/// Create a new TCP socket.
+	///
+	/// Similar to `socket(AF_INET or AF_INET6, SOCK_STREAM, IPPROTO_TCP)` in POSIX.
+	///
+	/// This function does not require a network capability handle. This is considered to be safe because
+	/// at time of creation, the socket is not bound to any `network` yet. Up to the moment `bind`/`listen`/`connect`
+	/// is called, the socket is effectively an in-memory configuration object, unable to communicate with the outside world.
+	///
+	/// All sockets are non-blocking. Use the wasi-poll interface to block on asynchronous operations.
+	///
+	/// # Typical errors
+	/// - `not-supported`:                The host does not support TCP sockets. (EOPNOTSUPP)
+	/// - `address-family-not-supported`: The specified `address-family` is not supported. (EAFNOSUPPORT)
+	/// - `new-socket-limit`:             The new socket resource could not be created because of a system limit. (EMFILE, ENFILE)
+	///
+	/// # References
+	/// - <https://pubs.opengroup.org/onlinepubs/9699919799/functions/socket.html>
+	/// - <https://man7.org/linux/man-pages/man2/socket.2.html>
+	/// - <https://learn.microsoft.com/en-us/windows/win32/api/winsock2/nf-winsock2-wsasocketw>
+	/// - <https://man.freebsd.org/cgi/man.cgi?query=socket&sektion=2>
+	create-tcp-socket: func(address-family: ip-address-family) -> result<tcp-socket, error-code>
+}
diff --git a/crates/wasi-http/wit/deps/sockets/tcp.wit b/crates/wasi-http/wit/deps/sockets/tcp.wit
new file mode 100644
index 000000000000..7ed46a690491
--- /dev/null
+++ b/crates/wasi-http/wit/deps/sockets/tcp.wit
@@ -0,0 +1,255 @@
+
+interface tcp {
+	use wasi:io/streams.{input-stream, output-stream}
+	use wasi:poll/poll.{pollable}
+	use network.{network, error-code, ip-socket-address, ip-address-family}
+
+	/// A TCP socket handle.
+	type tcp-socket = u32
+
+
+	enum shutdown-type {
+		/// Similar to `SHUT_RD` in POSIX.
+		receive,
+
+		/// Similar to `SHUT_WR` in POSIX.
+		send,
+
+		/// Similar to `SHUT_RDWR` in POSIX.
+		both,
+	}
+
+
+	/// Bind the socket to a specific network on the provided IP address and port.
+	///
+	/// If the IP address is zero (`0.0.0.0` in IPv4, `::` in IPv6), it is left to the implementation to decide which
+	/// network interface(s) to bind to.
+	/// If the TCP/UDP port is zero, the socket will be bound to a random free port.
+	///
+	/// When a socket is not explicitly bound, the first invocation to a listen or connect operation will
+	/// implicitly bind the socket.
+	///
+	/// Unlike in POSIX, this function is async. This enables interactive WASI hosts to inject permission prompts.
+	///
+	/// # Typical `start` errors
+	/// - `address-family-mismatch`:   The `local-address` has the wrong address family. (EINVAL)
+	/// - `already-bound`:             The socket is already bound. (EINVAL)
+	/// - `concurrency-conflict`:      Another `bind`, `connect` or `listen` operation is already in progress. (EALREADY)
+	///
+	/// # Typical `finish` errors
+	/// - `ephemeral-ports-exhausted`: No ephemeral ports available. (EADDRINUSE, ENOBUFS on Windows)
+	/// - `address-in-use`:            Address is already in use. (EADDRINUSE)
+	/// - `address-not-bindable`:      `local-address` is not an address that the `network` can bind to. (EADDRNOTAVAIL)
+	/// - `not-in-progress`:           A `bind` operation is not in progress.
+	/// - `would-block`:               Can't finish the operation, it is still in progress. (EWOULDBLOCK, EAGAIN)
+	///
+	/// # References
+	/// - <https://pubs.opengroup.org/onlinepubs/9699919799/functions/bind.html>
+	/// - <https://man7.org/linux/man-pages/man2/bind.2.html>
+	/// - <https://learn.microsoft.com/en-us/windows/win32/api/winsock/nf-winsock-bind>
+	/// - <https://man.freebsd.org/cgi/man.cgi?query=bind&sektion=2&format=html>
+	start-bind: func(this: tcp-socket, network: network, local-address: ip-socket-address) -> result<_, error-code>
+	finish-bind: func(this: tcp-socket) -> result<_, error-code>
+
+	/// Connect to a remote endpoint.
+	///
+	/// On success:
+	/// - the socket is transitioned into the Connection state
+	/// - a pair of streams is returned that can be used to read & write to the connection
+	///
+	/// # Typical `start` errors
+	/// - `address-family-mismatch`:   The `remote-address` has the wrong address family. (EAFNOSUPPORT)
+	/// - `invalid-remote-address`:    The IP address in `remote-address` is set to INADDR_ANY (`0.0.0.0` / `::`). (EADDRNOTAVAIL on Windows)
+	/// - `invalid-remote-address`:    The port in `remote-address` is set to 0. (EADDRNOTAVAIL on Windows)
+	/// - `already-attached`:          The socket is already attached to a different network. The `network` passed to `connect` must be identical to the one passed to `bind`.
+	/// - `already-connected`:         The socket is already in the Connection state. (EISCONN)
+	/// - `already-listening`:         The socket is already in the Listener state. (EOPNOTSUPP, EINVAL on Windows)
+	/// - `concurrency-conflict`:      Another `bind`, `connect` or `listen` operation is already in progress. (EALREADY)
+	///
+	/// # Typical `finish` errors
+	/// - `timeout`:                   Connection timed out. (ETIMEDOUT)
+	/// - `connection-refused`:        The connection was forcefully rejected. (ECONNREFUSED)
+	/// - `connection-reset`:          The connection was reset. (ECONNRESET)
+	/// - `remote-unreachable`:        The remote address is not reachable. (EHOSTUNREACH, EHOSTDOWN, ENETUNREACH, ENETDOWN)
+	/// - `ephemeral-ports-exhausted`: Tried to perform an implicit bind, but there were no ephemeral ports available. (EADDRINUSE, EADDRNOTAVAIL on Linux, EAGAIN on BSD)
+	/// - `not-in-progress`:           A `connect` operation is not in progress.
+	/// - `would-block`:               Can't finish the operation, it is still in progress. (EWOULDBLOCK, EAGAIN)
+	///
+	/// # References
+	/// - <https://pubs.opengroup.org/onlinepubs/9699919799/functions/connect.html>
+	/// - <https://man7.org/linux/man-pages/man2/connect.2.html>
+	/// - <https://learn.microsoft.com/en-us/windows/win32/api/winsock2/nf-winsock2-connect>
+	/// - <https://man.freebsd.org/cgi/man.cgi?connect>
+	start-connect: func(this: tcp-socket, network: network, remote-address: ip-socket-address) -> result<_, error-code>
+	finish-connect: func(this: tcp-socket) -> result<tuple<input-stream, output-stream>, error-code>
+
+	/// Start listening for new connections.
+	///
+	/// Transitions the socket into the Listener state.
+	///
+	/// Unlike in POSIX, this function is async. This enables interactive WASI hosts to inject permission prompts.
+	///
+	/// # Typical `start` errors
+	/// - `already-attached`:          The socket is already attached to a different network. The `network` passed to `listen` must be identical to the one passed to `bind`.
+	/// - `already-connected`:         The socket is already in the Connection state. (EISCONN, EINVAL on BSD)
+	/// - `already-listening`:         The socket is already in the Listener state.
+	/// - `concurrency-conflict`:      Another `bind`, `connect` or `listen` operation is already in progress. (EINVAL on BSD)
+	///
+	/// # Typical `finish` errors
+	/// - `ephemeral-ports-exhausted`: Tried to perform an implicit bind, but there were no ephemeral ports available. (EADDRINUSE)
+	/// - `not-in-progress`:           A `listen` operation is not in progress.
+	/// - `would-block`:               Can't finish the operation, it is still in progress. (EWOULDBLOCK, EAGAIN)
+	///
+	/// # References
+	/// - <https://pubs.opengroup.org/onlinepubs/9699919799/functions/listen.html>
+	/// - <https://man7.org/linux/man-pages/man2/listen.2.html>
+	/// - <https://learn.microsoft.com/en-us/windows/win32/api/winsock2/nf-winsock2-listen>
+	/// - <https://man.freebsd.org/cgi/man.cgi?query=listen&sektion=2>
+	start-listen: func(this: tcp-socket, network: network) -> result<_, error-code>
+	finish-listen: func(this: tcp-socket) -> result<_, error-code>
+
+	/// Accept a new client socket.
+	///
+	/// The returned socket is bound and in the Connection state.
+	///
+	/// On success, this function returns the newly accepted client socket along with
+	/// a pair of streams that can be used to read & write to the connection.
+	///
+	/// # Typical errors
+	/// - `not-listening`: Socket is not in the Listener state. (EINVAL)
+	/// - `would-block`:   No pending connections at the moment. (EWOULDBLOCK, EAGAIN)
+	///
+	/// Host implementations must skip over transient errors returned by the native accept syscall.
+	///
+	/// # References
+	/// - <https://pubs.opengroup.org/onlinepubs/9699919799/functions/accept.html>
+	/// - <https://man7.org/linux/man-pages/man2/accept.2.html>
+	/// - <https://learn.microsoft.com/en-us/windows/win32/api/winsock2/nf-winsock2-accept>
+	/// - <https://man.freebsd.org/cgi/man.cgi?query=accept&sektion=2>
+	accept: func(this: tcp-socket) -> result<tuple<tcp-socket, input-stream, output-stream>, error-code>
+
+	/// Get the bound local address.
+	///
+	/// # Typical errors
+	/// - `not-bound`: The socket is not bound to any local address.
+	///
+	/// # References
+	/// - <https://pubs.opengroup.org/onlinepubs/9699919799/functions/getsockname.html>
+	/// - <https://man7.org/linux/man-pages/man2/getsockname.2.html>
+	/// - <https://learn.microsoft.com/en-us/windows/win32/api/winsock/nf-winsock-getsockname>
+	/// - <https://man.freebsd.org/cgi/man.cgi?getsockname>
+	local-address: func(this: tcp-socket) -> result<ip-socket-address, error-code>
+
+	/// Get the bound remote address.
+	///
+	/// # Typical errors
+	/// - `not-connected`: The socket is not connected to a remote address. (ENOTCONN)
+	///
+	/// # References
+	/// - <https://pubs.opengroup.org/onlinepubs/9699919799/functions/getpeername.html>
+	/// - <https://man7.org/linux/man-pages/man2/getpeername.2.html>
+	/// - <https://learn.microsoft.com/en-us/windows/win32/api/winsock/nf-winsock-getpeername>
+	/// - <https://man.freebsd.org/cgi/man.cgi?query=getpeername&sektion=2&n=1>
+	remote-address: func(this: tcp-socket) -> result<ip-socket-address, error-code>
+
+	/// Whether this is a IPv4 or IPv6 socket.
+	///
+	/// Equivalent to the SO_DOMAIN socket option.
+	address-family: func(this: tcp-socket) -> ip-address-family
+
+	/// Whether IPv4 compatibility (dual-stack) mode is disabled or not.
+	///
+	/// Equivalent to the IPV6_V6ONLY socket option.
+	///
+	/// # Typical errors
+	/// - `ipv6-only-operation`:  (get/set) `this` socket is an IPv4 socket.
+	/// - `already-bound`:        (set) The socket is already bound.
+	/// - `not-supported`:        (set) Host does not support dual-stack sockets. (Implementations are not required to.)
+	/// - `concurrency-conflict`: (set) A `bind`, `connect` or `listen` operation is already in progress. (EALREADY)
+	ipv6-only: func(this: tcp-socket) -> result<bool, error-code>
+	set-ipv6-only: func(this: tcp-socket, value: bool) -> result<_, error-code>
+
+	/// Hints the desired listen queue size. Implementations are free to ignore this.
+	///
+	/// # Typical errors
+	/// - `already-connected`:    (set) The socket is already in the Connection state.
+	/// - `concurrency-conflict`: (set) A `bind`, `connect` or `listen` operation is already in progress. (EALREADY)
+	set-listen-backlog-size: func(this: tcp-socket, value: u64) -> result<_, error-code>
+
+	/// Equivalent to the SO_KEEPALIVE socket option.
+	///
+	/// # Typical errors
+	/// - `concurrency-conflict`: (set) A `bind`, `connect` or `listen` operation is already in progress. (EALREADY)
+	keep-alive: func(this: tcp-socket) -> result<bool, error-code>
+	set-keep-alive: func(this: tcp-socket, value: bool) -> result<_, error-code>
+
+	/// Equivalent to the TCP_NODELAY socket option.
+	///
+	/// # Typical errors
+	/// - `concurrency-conflict`: (set) A `bind`, `connect` or `listen` operation is already in progress. (EALREADY)
+	no-delay: func(this: tcp-socket) -> result<bool, error-code>
+	set-no-delay: func(this: tcp-socket, value: bool) -> result<_, error-code>
+
+	/// Equivalent to the IP_TTL & IPV6_UNICAST_HOPS socket options.
+	///
+	/// # Typical errors
+	/// - `already-connected`:    (set) The socket is already in the Connection state.
+	/// - `already-listening`:    (set) The socket is already in the Listener state.
+	/// - `concurrency-conflict`: (set) A `bind`, `connect` or `listen` operation is already in progress. (EALREADY)
+	unicast-hop-limit: func(this: tcp-socket) -> result<u8, error-code>
+	set-unicast-hop-limit: func(this: tcp-socket, value: u8) -> result<_, error-code>
+
+	/// The kernel buffer space reserved for sends/receives on this socket.
+	///
+	/// Note #1: an implementation may choose to cap or round the buffer size when setting the value.
+	/// 	In other words, after setting a value, reading the same setting back may return a different value.
+	///
+	/// Note #2: there is not necessarily a direct relationship between the kernel buffer size and the bytes of
+	/// 	actual data to be sent/received by the application, because the kernel might also use the buffer space
+	/// 	for internal metadata structures.
+	///
+	/// Equivalent to the SO_RCVBUF and SO_SNDBUF socket options.
+	///
+	/// # Typical errors
+	/// - `already-connected`:    (set) The socket is already in the Connection state.
+	/// - `already-listening`:    (set) The socket is already in the Listener state.
+	/// - `concurrency-conflict`: (set) A `bind`, `connect` or `listen` operation is already in progress. (EALREADY)
+	receive-buffer-size: func(this: tcp-socket) -> result<u64, error-code>
+	set-receive-buffer-size: func(this: tcp-socket, value: u64) -> result<_, error-code>
+	send-buffer-size: func(this: tcp-socket) -> result<u64, error-code>
+	set-send-buffer-size: func(this: tcp-socket, value: u64) -> result<_, error-code>
+
+	/// Create a `pollable` which will resolve once the socket is ready for I/O.
+	///
+	/// Note: this function is here for WASI Preview2 only.
+	/// It's planned to be removed when `future` is natively supported in Preview3.
+	subscribe: func(this: tcp-socket) -> pollable
+
+	/// Initiate a graceful shutdown.
+	///
+	/// - receive: the socket is not expecting to receive any more data from the peer. All subsequent read
+	///   operations on the `input-stream` associated with this socket will return an End Of Stream indication.
+	///   Any data still in the receive queue at time of calling `shutdown` will be discarded.
+	/// - send: the socket is not expecting to send any more data to the peer. All subsequent write
+	///   operations on the `output-stream` associated with this socket will return an error.
+	/// - both: same effect as receive & send combined.
+	///
+	/// The shutdown function does not close (drop) the socket.
+	///
+	/// # Typical errors
+	/// - `not-connected`: The socket is not in the Connection state. (ENOTCONN)
+	///
+	/// # References
+	/// - <https://pubs.opengroup.org/onlinepubs/9699919799/functions/shutdown.html>
+	/// - <https://man7.org/linux/man-pages/man2/shutdown.2.html>
+	/// - <https://learn.microsoft.com/en-us/windows/win32/api/winsock/nf-winsock-shutdown>
+	/// - <https://man.freebsd.org/cgi/man.cgi?query=shutdown&sektion=2>
+	shutdown: func(this: tcp-socket, shutdown-type: shutdown-type) -> result<_, error-code>
+
+	/// Dispose of the specified `tcp-socket`, after which it may no longer be used.
+	///
+	/// Similar to the POSIX `close` function.
+	///
+	/// Note: this function is scheduled to be removed when Resources are natively supported in Wit.
+	drop-tcp-socket: func(this: tcp-socket)
+}
diff --git a/crates/wasi-http/wit/deps/sockets/udp-create-socket.wit b/crates/wasi-http/wit/deps/sockets/udp-create-socket.wit
new file mode 100644
index 000000000000..1cfbd7f0bdd8
--- /dev/null
+++ b/crates/wasi-http/wit/deps/sockets/udp-create-socket.wit
@@ -0,0 +1,27 @@
+
+interface udp-create-socket {
+	use network.{network, error-code, ip-address-family}
+	use udp.{udp-socket}
+
+	/// Create a new UDP socket.
+	///
+	/// Similar to `socket(AF_INET or AF_INET6, SOCK_DGRAM, IPPROTO_UDP)` in POSIX.
+	///
+	/// This function does not require a network capability handle. This is considered to be safe because
+	/// at time of creation, the socket is not bound to any `network` yet. Up to the moment `bind`/`connect` is called,
+	/// the socket is effectively an in-memory configuration object, unable to communicate with the outside world.
+	///
+	/// All sockets are non-blocking. Use the wasi-poll interface to block on asynchronous operations.
+	///
+	/// # Typical errors
+	/// - `not-supported`:                The host does not support UDP sockets. (EOPNOTSUPP)
+	/// - `address-family-not-supported`: The specified `address-family` is not supported. (EAFNOSUPPORT)
+	/// - `new-socket-limit`:             The new socket resource could not be created because of a system limit. (EMFILE, ENFILE)
+	///
+	/// # References:
+	/// - <https://pubs.opengroup.org/onlinepubs/9699919799/functions/socket.html>
+	/// - <https://man7.org/linux/man-pages/man2/socket.2.html>
+	/// - <https://learn.microsoft.com/en-us/windows/win32/api/winsock2/nf-winsock2-wsasocketw>
+	/// - <https://man.freebsd.org/cgi/man.cgi?query=socket&sektion=2>
+	create-udp-socket: func(address-family: ip-address-family) -> result<udp-socket, error-code>
+}
diff --git a/crates/wasi-http/wit/deps/sockets/udp.wit b/crates/wasi-http/wit/deps/sockets/udp.wit
new file mode 100644
index 000000000000..9dd4573bd17c
--- /dev/null
+++ b/crates/wasi-http/wit/deps/sockets/udp.wit
@@ -0,0 +1,211 @@
+
+interface udp {
+	use wasi:poll/poll.{pollable}
+	use network.{network, error-code, ip-socket-address, ip-address-family}
+
+
+	/// A UDP socket handle.
+	type udp-socket = u32
+
+
+	record datagram {
+		data: list<u8>, // Theoretical max size: ~64 KiB. In practice, typically less than 1500 bytes.
+		remote-address: ip-socket-address,
+
+		/// Possible future additions:
+		/// local-address: ip-socket-address, // IP_PKTINFO / IP_RECVDSTADDR / IPV6_PKTINFO
+		/// local-interface: u32, // IP_PKTINFO / IP_RECVIF
+		/// ttl: u8, // IP_RECVTTL
+		/// dscp: u6, // IP_RECVTOS
+		/// ecn: u2, // IP_RECVTOS
+	}
+
+
+
+	/// Bind the socket to a specific network on the provided IP address and port.
+	///
+	/// If the IP address is zero (`0.0.0.0` in IPv4, `::` in IPv6), it is left to the implementation to decide which
+	/// network interface(s) to bind to.
+	/// If the TCP/UDP port is zero, the socket will be bound to a random free port.
+	///
+	/// When a socket is not explicitly bound, the first invocation to connect will implicitly bind the socket.
+	///
+	/// Unlike in POSIX, this function is async. This enables interactive WASI hosts to inject permission prompts.
+	///
+	/// # Typical `start` errors
+	/// - `address-family-mismatch`:   The `local-address` has the wrong address family. (EINVAL)
+	/// - `already-bound`:             The socket is already bound. (EINVAL)
+	/// - `concurrency-conflict`:      Another `bind` or `connect` operation is already in progress. (EALREADY)
+	///
+	/// # Typical `finish` errors
+	/// - `ephemeral-ports-exhausted`: No ephemeral ports available. (EADDRINUSE, ENOBUFS on Windows)
+	/// - `address-in-use`:            Address is already in use. (EADDRINUSE)
+	/// - `address-not-bindable`:      `local-address` is not an address that the `network` can bind to. (EADDRNOTAVAIL)
+	/// - `not-in-progress`:           A `bind` operation is not in progress.
+	/// - `would-block`:               Can't finish the operation, it is still in progress. (EWOULDBLOCK, EAGAIN)
+	///
+	/// # References
+	/// - <https://pubs.opengroup.org/onlinepubs/9699919799/functions/bind.html>
+	/// - <https://man7.org/linux/man-pages/man2/bind.2.html>
+	/// - <https://learn.microsoft.com/en-us/windows/win32/api/winsock/nf-winsock-bind>
+	/// - <https://man.freebsd.org/cgi/man.cgi?query=bind&sektion=2&format=html>
+	start-bind: func(this: udp-socket, network: network, local-address: ip-socket-address) -> result<_, error-code>
+	finish-bind: func(this: udp-socket) -> result<_, error-code>
+
+	/// Set the destination address.
+	///
+	/// The local-address is updated based on the best network path to `remote-address`.
+	///
+	/// When a destination address is set:
+	/// - all receive operations will only return datagrams sent from the provided `remote-address`.
+	/// - the `send` function can only be used to send to this destination.
+	///
+	/// Note that this function does not generate any network traffic and the peer is not aware of this "connection".
+	///
+	/// Unlike in POSIX, this function is async. This enables interactive WASI hosts to inject permission prompts.
+	///
+	/// # Typical `start` errors
+	/// - `address-family-mismatch`:   The `remote-address` has the wrong address family. (EAFNOSUPPORT)
+	/// - `invalid-remote-address`:    The IP address in `remote-address` is set to INADDR_ANY (`0.0.0.0` / `::`). (EDESTADDRREQ, EADDRNOTAVAIL)
+	/// - `invalid-remote-address`:    The port in `remote-address` is set to 0. (EDESTADDRREQ, EADDRNOTAVAIL)
+	/// - `already-attached`:          The socket is already bound to a different network. The `network` passed to `connect` must be identical to the one passed to `bind`.
+	/// - `concurrency-conflict`:      Another `bind` or `connect` operation is already in progress. (EALREADY)
+	///
+	/// # Typical `finish` errors
+	/// - `ephemeral-ports-exhausted`: Tried to perform an implicit bind, but there were no ephemeral ports available. (EADDRINUSE, EADDRNOTAVAIL on Linux, EAGAIN on BSD)
+	/// - `not-in-progress`:           A `connect` operation is not in progress.
+	/// - `would-block`:               Can't finish the operation, it is still in progress. (EWOULDBLOCK, EAGAIN)
+	///
+	/// # References
+	/// - <https://pubs.opengroup.org/onlinepubs/9699919799/functions/connect.html>
+	/// - <https://man7.org/linux/man-pages/man2/connect.2.html>
+	/// - <https://learn.microsoft.com/en-us/windows/win32/api/winsock2/nf-winsock2-connect>
+	/// - <https://man.freebsd.org/cgi/man.cgi?connect>
+	start-connect: func(this: udp-socket, network: network, remote-address: ip-socket-address) -> result<_, error-code>
+	finish-connect: func(this: udp-socket) -> result<_, error-code>
+
+	/// Receive a message.
+	///
+	/// Returns:
+	/// - The sender address of the datagram
+	/// - The number of bytes read.
+	///
+	/// # Typical errors
+	/// - `not-bound`:          The socket is not bound to any local address. (EINVAL)
+	/// - `remote-unreachable`: The remote address is not reachable. (ECONNREFUSED, ECONNRESET, ENETRESET on Windows, EHOSTUNREACH, EHOSTDOWN, ENETUNREACH, ENETDOWN)
+	/// - `would-block`:        There is no pending data available to be read at the moment. (EWOULDBLOCK, EAGAIN)
+	///
+	/// # References
+	/// - <https://pubs.opengroup.org/onlinepubs/9699919799/functions/recvfrom.html>
+	/// - <https://pubs.opengroup.org/onlinepubs/9699919799/functions/recvmsg.html>
+	/// - <https://man7.org/linux/man-pages/man2/recv.2.html>
+	/// - <https://learn.microsoft.com/en-us/windows/win32/api/winsock/nf-winsock-recv>
+	/// - <https://learn.microsoft.com/en-us/windows/win32/api/winsock/nf-winsock-recvfrom>
+	/// - <https://learn.microsoft.com/en-us/previous-versions/windows/desktop/legacy/ms741687(v=vs.85)>
+	/// - <https://man.freebsd.org/cgi/man.cgi?query=recv&sektion=2>
+	receive: func(this: udp-socket) -> result<datagram, error-code>
+
+	/// Send a message to a specific destination address.
+	///
+	/// The remote address option is required. To send a message to the "connected" peer,
+	/// call `remote-address` to get their address.
+	///
+	/// # Typical errors
+	/// - `address-family-mismatch`: The `remote-address` has the wrong address family. (EAFNOSUPPORT)
+	/// - `invalid-remote-address`:  The IP address in `remote-address` is set to INADDR_ANY (`0.0.0.0` / `::`). (EDESTADDRREQ, EADDRNOTAVAIL)
+	/// - `invalid-remote-address`:  The port in `remote-address` is set to 0. (EDESTADDRREQ, EADDRNOTAVAIL)
+	/// - `already-connected`:       The socket is in "connected" mode and the `datagram.remote-address` does not match the address passed to `connect`. (EISCONN)
+	/// - `not-bound`:               The socket is not bound to any local address. Unlike POSIX, this function does not perform an implicit bind.
+	/// - `remote-unreachable`:      The remote address is not reachable. (ECONNREFUSED, ECONNRESET, ENETRESET on Windows, EHOSTUNREACH, EHOSTDOWN, ENETUNREACH, ENETDOWN)
+	/// - `datagram-too-large`:      The datagram is too large. (EMSGSIZE)
+	/// - `would-block`:             The send buffer is currently full. (EWOULDBLOCK, EAGAIN)
+	///
+	/// # References
+	/// - <https://pubs.opengroup.org/onlinepubs/9699919799/functions/sendto.html>
+	/// - <https://pubs.opengroup.org/onlinepubs/9699919799/functions/sendmsg.html>
+	/// - <https://man7.org/linux/man-pages/man2/send.2.html>
+	/// - <https://learn.microsoft.com/en-us/windows/win32/api/winsock2/nf-winsock2-send>
+	/// - <https://learn.microsoft.com/en-us/windows/win32/api/winsock2/nf-winsock2-sendto>
+	/// - <https://learn.microsoft.com/en-us/windows/win32/api/winsock2/nf-winsock2-wsasendmsg>
+	/// - <https://man.freebsd.org/cgi/man.cgi?query=send&sektion=2>
+	send: func(this: udp-socket, datagram: datagram) -> result<_, error-code>
+
+	/// Get the current bound address.
+	///
+	/// # Typical errors
+	/// - `not-bound`: The socket is not bound to any local address.
+	///
+	/// # References
+	/// - <https://pubs.opengroup.org/onlinepubs/9699919799/functions/getsockname.html>
+	/// - <https://man7.org/linux/man-pages/man2/getsockname.2.html>
+	/// - <https://learn.microsoft.com/en-us/windows/win32/api/winsock/nf-winsock-getsockname>
+	/// - <https://man.freebsd.org/cgi/man.cgi?getsockname>
+	local-address: func(this: udp-socket) -> result<ip-socket-address, error-code>
+
+	/// Get the address set with `connect`.
+	///
+	/// # Typical errors
+	/// - `not-connected`: The socket is not connected to a remote address. (ENOTCONN)
+	///
+	/// # References
+	/// - <https://pubs.opengroup.org/onlinepubs/9699919799/functions/getpeername.html>
+	/// - <https://man7.org/linux/man-pages/man2/getpeername.2.html>
+	/// - <https://learn.microsoft.com/en-us/windows/win32/api/winsock/nf-winsock-getpeername>
+	/// - <https://man.freebsd.org/cgi/man.cgi?query=getpeername&sektion=2&n=1>
+	remote-address: func(this: udp-socket) -> result<ip-socket-address, error-code>
+
+	/// Whether this is a IPv4 or IPv6 socket.
+	///
+	/// Equivalent to the SO_DOMAIN socket option.
+	address-family: func(this: udp-socket) -> ip-address-family
+
+	/// Whether IPv4 compatibility (dual-stack) mode is disabled or not.
+	///
+	/// Equivalent to the IPV6_V6ONLY socket option.
+	///
+	/// # Typical errors
+	/// - `ipv6-only-operation`:  (get/set) `this` socket is an IPv4 socket.
+	/// - `already-bound`:        (set) The socket is already bound.
+	/// - `not-supported`:        (set) Host does not support dual-stack sockets. (Implementations are not required to.)
+	/// - `concurrency-conflict`: (set) Another `bind` or `connect` operation is already in progress. (EALREADY)
+	ipv6-only: func(this: udp-socket) -> result<bool, error-code>
+	set-ipv6-only: func(this: udp-socket, value: bool) -> result<_, error-code>
+
+	/// Equivalent to the IP_TTL & IPV6_UNICAST_HOPS socket options.
+	///
+	/// # Typical errors
+	/// - `concurrency-conflict`: (set) Another `bind` or `connect` operation is already in progress. (EALREADY)
+	unicast-hop-limit: func(this: udp-socket) -> result<u8, error-code>
+	set-unicast-hop-limit: func(this: udp-socket, value: u8) -> result<_, error-code>
+
+	/// The kernel buffer space reserved for sends/receives on this socket.
+	///
+	/// Note #1: an implementation may choose to cap or round the buffer size when setting the value.
+	/// 	In other words, after setting a value, reading the same setting back may return a different value.
+	///
+	/// Note #2: there is not necessarily a direct relationship between the kernel buffer size and the bytes of
+	/// 	actual data to be sent/received by the application, because the kernel might also use the buffer space
+	/// 	for internal metadata structures.
+	///
+	/// Fails when this socket is in the Listening state.
+	///
+	/// Equivalent to the SO_RCVBUF and SO_SNDBUF socket options.
+	///
+	/// # Typical errors
+	/// - `concurrency-conflict`: (set) Another `bind` or `connect` operation is already in progress. (EALREADY)
+	receive-buffer-size: func(this: udp-socket) -> result<u64, error-code>
+	set-receive-buffer-size: func(this: udp-socket, value: u64) -> result<_, error-code>
+	send-buffer-size: func(this: udp-socket) -> result<u64, error-code>
+	set-send-buffer-size: func(this: udp-socket, value: u64) -> result<_, error-code>
+
+	/// Create a `pollable` which will resolve once the socket is ready for I/O.
+	///
+	/// Note: this function is here for WASI Preview2 only.
+	/// It's planned to be removed when `future` is natively supported in Preview3.
+	subscribe: func(this: udp-socket) -> pollable
+
+	/// Dispose of the specified `udp-socket`, after which it may no longer be used.
+	///
+	/// Note: this function is scheduled to be removed when Resources are natively supported in Wit.
+	drop-udp-socket: func(this: udp-socket)
+}
diff --git a/crates/wasi-http/wit/deps/wasi-cli-base/environment.wit b/crates/wasi-http/wit/deps/wasi-cli-base/environment.wit
new file mode 100644
index 000000000000..4c97c85d1ab5
--- /dev/null
+++ b/crates/wasi-http/wit/deps/wasi-cli-base/environment.wit
@@ -0,0 +1,16 @@
+package wasi:cli-base
+
+interface environment {
+  /// Get the POSIX-style environment variables.
+  ///
+  /// Each environment variable is provided as a pair of string variable names
+  /// and string value.
+  ///
+  /// Morally, these are a value import, but until value imports are available
+  /// in the component model, this import function should return the same
+  /// values each time it is called.
+  get-environment: func() -> list<tuple<string, string>>
+
+  /// Get the POSIX-style arguments to the program.
+  get-arguments: func() -> list<string>
+}
diff --git a/crates/wasi-http/wit/deps/wasi-cli-base/exit.wit b/crates/wasi-http/wit/deps/wasi-cli-base/exit.wit
new file mode 100644
index 000000000000..66835aa7022d
--- /dev/null
+++ b/crates/wasi-http/wit/deps/wasi-cli-base/exit.wit
@@ -0,0 +1,4 @@
+interface exit {
+  /// Exit the curerent instance and any linked instances.
+  exit: func(status: result)
+}
diff --git a/crates/wasi-http/wit/deps/wasi-cli-base/stdio.wit b/crates/wasi-http/wit/deps/wasi-cli-base/stdio.wit
new file mode 100644
index 000000000000..6c9d4a41a6f9
--- /dev/null
+++ b/crates/wasi-http/wit/deps/wasi-cli-base/stdio.wit
@@ -0,0 +1,17 @@
+interface stdin {
+  use wasi:io/streams.{input-stream}
+
+  get-stdin: func() -> input-stream
+}
+
+interface stdout {
+  use wasi:io/streams.{output-stream}
+
+  get-stdout: func() -> output-stream
+}
+
+interface stderr {
+  use wasi:io/streams.{output-stream}
+
+  get-stderr: func() -> output-stream
+}
diff --git a/crates/wasi-http/wit/main.wit b/crates/wasi-http/wit/main.wit
new file mode 100644
index 000000000000..264dfee8264d
--- /dev/null
+++ b/crates/wasi-http/wit/main.wit
@@ -0,0 +1 @@
+package unused:main
diff --git a/crates/wasi-http/wit/test.wit b/crates/wasi-http/wit/test.wit
new file mode 100644
index 000000000000..09498f62cf8f
--- /dev/null
+++ b/crates/wasi-http/wit/test.wit
@@ -0,0 +1,28 @@
+// only used as part of `test-programs`
+world test-reactor {
+
+  import wasi:cli-base/environment
+  import wasi:io/streams
+  import wasi:filesystem/types
+  import wasi:filesystem/preopens
+  import wasi:cli-base/exit
+
+  export add-strings: func(s: list<string>) -> u32
+  export get-strings: func() -> list<string>
+
+  use wasi:io/streams.{output-stream}
+
+  export write-strings-to: func(o: output-stream) -> result
+
+  use wasi:filesystem/types.{descriptor-stat}
+  export pass-an-imported-record: func(d: descriptor-stat) -> string
+}
+
+world test-command {
+  import wasi:poll/poll
+  import wasi:io/streams
+  import wasi:cli-base/environment
+  import wasi:cli-base/stdin
+  import wasi:cli-base/stdout
+  import wasi:cli-base/stderr
+}

From 6790c0562d327dd25d395a05c1c1ac22d0ab2c58 Mon Sep 17 00:00:00 2001
From: Eduardo Rodrigues <eduardomourar@users.noreply.github.com>
Date: Wed, 16 Aug 2023 02:54:59 +0100
Subject: [PATCH 22/49] feat(wasi-http): generate async host binding

---
 crates/wasi-http/src/component_impl.rs | 425 +++++++++++++------------
 crates/wasi-http/src/http_impl.rs      |   3 +-
 crates/wasi-http/src/lib.rs            |   3 +-
 crates/wasi-http/src/struct.rs         |  32 +-
 crates/wasi-http/src/types_impl.rs     | 128 +++++---
 5 files changed, 353 insertions(+), 238 deletions(-)

diff --git a/crates/wasi-http/src/component_impl.rs b/crates/wasi-http/src/component_impl.rs
index e2b53cf452bc..b7ba4fca7328 100644
--- a/crates/wasi-http/src/component_impl.rs
+++ b/crates/wasi-http/src/component_impl.rs
@@ -119,7 +119,7 @@ where
         + io::streams::Host
         + poll::poll::Host,
 {
-    linker.func_wrap(
+    linker.func_wrap8_async(
         "wasi:http/outgoing-handler",
         "handle",
         move |mut caller: Caller<'_, T>,
@@ -130,34 +130,35 @@ where
               has_first_byte_timeout: i32,
               first_byte_timeout_ms: u32,
               has_between_bytes_timeout: i32,
-              between_bytes_timeout_ms: u32|
-              -> anyhow::Result<u32> {
-            let options = if has_options == 1 {
-                Some(RequestOptions {
-                    connect_timeout_ms: if has_timeout == 1 {
-                        Some(timeout_ms)
-                    } else {
-                        None
-                    },
-                    first_byte_timeout_ms: if has_first_byte_timeout == 1 {
-                        Some(first_byte_timeout_ms)
-                    } else {
-                        None
-                    },
-                    between_bytes_timeout_ms: if has_between_bytes_timeout == 1 {
-                        Some(between_bytes_timeout_ms)
-                    } else {
-                        None
-                    },
-                })
-            } else {
-                None
-            };
+              between_bytes_timeout_ms: u32| {
+            Box::new(async move {
+                let options = if has_options == 1 {
+                    Some(RequestOptions {
+                        connect_timeout_ms: if has_timeout == 1 {
+                            Some(timeout_ms)
+                        } else {
+                            None
+                        },
+                        first_byte_timeout_ms: if has_first_byte_timeout == 1 {
+                            Some(first_byte_timeout_ms)
+                        } else {
+                            None
+                        },
+                        between_bytes_timeout_ms: if has_between_bytes_timeout == 1 {
+                            Some(between_bytes_timeout_ms)
+                        } else {
+                            None
+                        },
+                    })
+                } else {
+                    None
+                };
 
-            Ok(get_cx(caller.data_mut()).handle(request, options)?)
+                get_cx(caller.data_mut()).handle(request, options).await
+            })
         },
     )?;
-    linker.func_wrap(
+    linker.func_wrap14_async(
         "wasi:http/types",
         "new-outgoing-request",
         move |mut caller: Caller<'_, T>,
@@ -174,80 +175,86 @@ where
               authority_is_some: i32,
               authority_ptr: u32,
               authority_len: u32,
-              headers: u32|
-              -> anyhow::Result<u32> {
-            let memory = memory_get(&mut caller)?;
-            let path = read_option_string(
-                &memory,
-                caller.as_context_mut(),
-                path_is_some,
-                path_ptr,
-                path_len,
-            )?;
-            let authority = read_option_string(
-                &memory,
-                caller.as_context_mut(),
-                authority_is_some,
-                authority_ptr,
-                authority_len,
-            )?;
-
-            let mut s = Scheme::Https;
-            if scheme_is_some == 1 {
-                s = match scheme {
-                    0 => Scheme::Http,
-                    1 => Scheme::Https,
+              headers: u32| {
+            Box::new(async move {
+                let memory = memory_get(&mut caller)?;
+                let path = read_option_string(
+                    &memory,
+                    caller.as_context_mut(),
+                    path_is_some,
+                    path_ptr,
+                    path_len,
+                )?;
+                let authority = read_option_string(
+                    &memory,
+                    caller.as_context_mut(),
+                    authority_is_some,
+                    authority_ptr,
+                    authority_len,
+                )?;
+
+                let mut s = Scheme::Https;
+                if scheme_is_some == 1 {
+                    s = match scheme {
+                        0 => Scheme::Http,
+                        1 => Scheme::Https,
+                        _ => {
+                            let value = string_from_memory(
+                                &memory,
+                                caller.as_context_mut(),
+                                scheme_ptr.try_into()?,
+                                scheme_len.try_into()?,
+                            )?;
+                            Scheme::Other(value)
+                        }
+                    };
+                }
+                let m = match method {
+                    0 => Method::Get,
+                    1 => Method::Head,
+                    2 => Method::Post,
+                    3 => Method::Put,
+                    4 => Method::Delete,
+                    5 => Method::Connect,
+                    6 => Method::Options,
+                    7 => Method::Trace,
+                    8 => Method::Patch,
                     _ => {
                         let value = string_from_memory(
                             &memory,
                             caller.as_context_mut(),
-                            scheme_ptr.try_into()?,
-                            scheme_len.try_into()?,
+                            method_ptr.try_into()?,
+                            method_len.try_into()?,
                         )?;
-                        Scheme::Other(value)
+                        Method::Other(value)
                     }
                 };
-            }
-            let m = match method {
-                0 => Method::Get,
-                1 => Method::Head,
-                2 => Method::Post,
-                3 => Method::Put,
-                4 => Method::Delete,
-                5 => Method::Connect,
-                6 => Method::Options,
-                7 => Method::Trace,
-                8 => Method::Patch,
-                _ => {
-                    let value = string_from_memory(
-                        &memory,
-                        caller.as_context_mut(),
-                        method_ptr.try_into()?,
-                        method_len.try_into()?,
-                    )?;
-                    Method::Other(value)
-                }
-            };
 
-            let ctx = get_cx(caller.data_mut());
-            Ok(ctx.new_outgoing_request(m, path, Some(s), authority, headers)?)
+                let ctx = get_cx(caller.data_mut());
+                ctx.new_outgoing_request(m, path, Some(s), authority, headers)
+                    .await
+            })
         },
     )?;
-    linker.func_wrap(
+    linker.func_wrap1_async(
         "wasi:http/types",
         "incoming-response-status",
-        move |mut caller: Caller<'_, T>, id: u32| -> anyhow::Result<u32> {
-            let ctx = get_cx(caller.data_mut());
-            Ok(ctx.incoming_response_status(id)?.into())
+        move |mut caller: Caller<'_, T>, id: u32| {
+            Box::new(async move {
+                let ctx = get_cx(caller.data_mut());
+                let result: u32 = ctx.incoming_response_status(id).await?.into();
+                Ok(result)
+            })
         },
     )?;
-    linker.func_wrap(
+    linker.func_wrap1_async(
         "wasi:http/types",
         "drop-future-incoming-response",
-        move |mut caller: Caller<'_, T>, future: u32| -> anyhow::Result<()> {
-            let ctx = get_cx(caller.data_mut());
-            ctx.drop_future_incoming_response(future)?;
-            Ok(())
+        move |mut caller: Caller<'_, T>, future: u32| {
+            Box::new(async move {
+                let ctx = get_cx(caller.data_mut());
+                ctx.drop_future_incoming_response(future).await
+            })
         },
     )?;
     linker.func_wrap2_async(
@@ -256,7 +263,7 @@ where
         move |mut caller: Caller<'_, T>, future: u32, ptr: i32| {
             Box::new(async move {
                 let ctx = get_cx(caller.data_mut());
-                let response = ctx.future_incoming_response_get(future)?.unwrap_or(Ok(0));
+                let response = ctx.future_incoming_response_get(future).await?;
 
                 let memory = memory_get(&mut caller)?;
 
@@ -266,20 +273,23 @@ where
                 // Fourth == string ptr
                 // Fifth == string len
                 let result: [u32; 5] = match response {
-                    Ok(value) => [1, 0, value, 0, 0],
-                    Err(error) => {
-                        let (tag, err_string) = match error {
-                            Error::InvalidUrl(e) => (0u32, e),
-                            Error::TimeoutError(e) => (1u32, e),
-                            Error::ProtocolError(e) => (2u32, e),
-                            Error::UnexpectedError(e) => (3u32, e),
-                        };
-                        let bytes = err_string.as_bytes();
-                        let len = bytes.len().try_into().unwrap();
-                        let ptr = allocate_guest_pointer(&mut caller, len).await?;
-                        memory.write(caller.as_context_mut(), ptr as _, bytes)?;
-                        [1, 1, tag, ptr, len]
-                    }
+                    Some(inner) => match inner {
+                        Ok(value) => [1, 0, value, 0, 0],
+                        Err(error) => {
+                            let (tag, err_string) = match error {
+                                Error::InvalidUrl(e) => (0u32, e),
+                                Error::TimeoutError(e) => (1u32, e),
+                                Error::ProtocolError(e) => (2u32, e),
+                                Error::UnexpectedError(e) => (3u32, e),
+                            };
+                            let bytes = err_string.as_bytes();
+                            let len = bytes.len().try_into().unwrap();
+                            let ptr = allocate_guest_pointer(&mut caller, len).await?;
+                            memory.write(caller.as_context_mut(), ptr as _, bytes)?;
+                            [1, 1, tag, ptr, len]
+                        }
+                    },
+                    None => [0, 0, 0, 0, 0],
                 };
                 let raw = u32_array_to_u8(&result);
 
@@ -288,22 +298,38 @@ where
             })
         },
     )?;
-    linker.func_wrap(
+    linker.func_wrap1_async(
+        "wasi:http/types",
+        "listen-to-future-incoming-response",
+        move |mut caller: Caller<'_, T>, future: u32| {
+            Box::new(async move {
+                let ctx = get_cx(caller.data_mut());
+                ctx.listen_to_future_incoming_response(future).await
+            })
+        },
+    )?;
+    linker.func_wrap2_async(
         "wasi:http/types",
         "incoming-response-consume",
-        move |mut caller: Caller<'_, T>, response: u32, ptr: i32| -> anyhow::Result<()> {
-            let ctx = get_cx(caller.data_mut());
-            let stream = ctx.incoming_response_consume(response)?.unwrap_or(0);
+        move |mut caller: Caller<'_, T>, response: u32, ptr: i32| {
+            Box::new(async move {
+                let ctx = get_cx(caller.data_mut());
+                let stream = ctx.incoming_response_consume(response).await?.unwrap_or(0);
 
-            let memory = memory_get(&mut caller).unwrap();
+                let memory = memory_get(&mut caller).unwrap();
 
-            // First == is_some
-            // Second == stream_id
-            let result: [u32; 2] = [0, stream];
-            let raw = u32_array_to_u8(&result);
+                // First == is_some
+                // Second == stream_id
+                // let result: [u32; 2] = match result {
+                //     Ok(value) => [0, value],
+                //     Err(_) => [1, 0],
+                // };
+                let result: [u32; 2] = [0, stream];
+                let raw = u32_array_to_u8(&result);
 
-            memory.write(caller.as_context_mut(), ptr as _, &raw)?;
-            Ok(())
+                memory.write(caller.as_context_mut(), ptr as _, &raw)?;
+                Ok(())
+            })
         },
     )?;
     linker.func_wrap1_async(
@@ -312,8 +338,7 @@ where
         move |mut caller: Caller<'_, T>, id: u32| {
             Box::new(async move {
                 let ctx = get_cx(caller.data_mut());
-                poll::poll::Host::drop_pollable(ctx, id).await?;
-                Ok(())
+                poll::poll::Host::drop_pollable(ctx, id).await
             })
         },
     )?;
@@ -363,8 +388,7 @@ where
         move |mut caller: Caller<'_, T>, id: u32| {
             Box::new(async move {
                 let ctx = get_cx(caller.data_mut());
-                io::streams::Host::drop_input_stream(ctx, id).await?;
-                Ok(())
+                io::streams::Host::drop_input_stream(ctx, id).await
             })
         },
     )?;
@@ -374,8 +398,7 @@ where
         move |mut caller: Caller<'_, T>, id: u32| {
             Box::new(async move {
                 let ctx = get_cx(caller.data_mut());
-                io::streams::Host::drop_output_stream(ctx, id).await?;
-                Ok(())
+                io::streams::Host::drop_output_stream(ctx, id).await
             })
         },
     )?;
@@ -386,14 +409,18 @@ where
             Box::new(async move {
                 let ctx = get_cx(caller.data_mut());
 
-                let bytes_tuple = io::streams::Host::read(ctx, stream, len).await?;
-                let bytes = bytes_tuple.0;
-                let done = match bytes_tuple.1 {
+                let (bytes, status) = io::streams::Host::read(ctx, stream, len).await?;
+                let done = match status {
                     io::streams::StreamStatus::Open => 0,
                     io::streams::StreamStatus::Ended => 1,
                 };
                 let body_len: u32 = bytes.len().try_into()?;
                 let out_ptr = allocate_guest_pointer(&mut caller, body_len).await?;
+
+                // First == is_err
+                // Second == {ok: is_err = false, tag: is_err = true}
+                // Third == bytes length
+                // Fourth == enum status
                 let result: [u32; 4] = [0, out_ptr, body_len, done];
                 let raw = u32_array_to_u8(&result);
 
@@ -410,8 +437,7 @@ where
         move |mut caller: Caller<'_, T>, stream: u32| {
             Box::new(async move {
                 let ctx = get_cx(caller.data_mut());
-                let pollable = io::streams::Host::subscribe_to_input_stream(ctx, stream).await?;
-                Ok(pollable)
+                io::streams::Host::subscribe_to_input_stream(ctx, stream).await
             })
         },
     )?;
@@ -421,8 +447,7 @@ where
         move |mut caller: Caller<'_, T>, stream: u32| {
             Box::new(async move {
                 let ctx = get_cx(caller.data_mut());
-                let pollable = io::streams::Host::subscribe_to_output_stream(ctx, stream).await?;
-                Ok(pollable)
+                io::streams::Host::subscribe_to_output_stream(ctx, stream).await
             })
         },
     )?;
@@ -437,18 +462,18 @@ where
 
                 let ctx = get_cx(caller.data_mut());
 
-                let result =
-                    match io::streams::Host::write(ctx, stream, body.as_bytes().to_vec()).await {
-                        Ok((len, _status)) => [0, 0, len as u32, 0, 0],
-                        Err(_error) => {
-                            let err_string = "Error while writing to stream";
-                            let bytes = err_string.as_bytes();
-                            let len = bytes.len().try_into().unwrap();
-                            let ptr = allocate_guest_pointer(&mut caller, len).await?;
-                            memory.write(caller.as_context_mut(), ptr as _, bytes)?;
-                            [1, 1, 0, ptr, len]
-                        }
-                    };
+                let (len, status) = io::streams::Host::write(ctx, stream, body.into()).await?;
+                let written: u32 = len.try_into()?;
+                let done: u32 = match status {
+                    io::streams::StreamStatus::Open => 0,
+                    io::streams::StreamStatus::Ended => 1,
+                };
+
+                // First == is_err
+                // Second == {ok: is_err = false, tag: is_err = true}
+                // Third == amount of bytes written
+                // Fifth == enum status
+                let result: [u32; 5] = [0, 0, written, 0, done];
                 let raw = u32_array_to_u8(&result);
 
                 memory.write(caller.as_context_mut(), ptr as _, &raw)?;
@@ -457,79 +482,87 @@ where
             })
         },
     )?;
-    linker.func_wrap(
+    linker.func_wrap1_async(
         "wasi:http/types",
         "drop-fields",
-        move |mut caller: Caller<'_, T>, ptr: u32| -> anyhow::Result<()> {
-            let ctx = get_cx(caller.data_mut());
-            ctx.drop_fields(ptr)?;
-            Ok(())
+        move |mut caller: Caller<'_, T>, ptr: u32| {
+            Box::new(async move {
+                let ctx = get_cx(caller.data_mut());
+                ctx.drop_fields(ptr).await
+            })
         },
     )?;
-    linker.func_wrap(
+    linker.func_wrap2_async(
         "wasi:http/types",
         "outgoing-request-write",
-        move |mut caller: Caller<'_, T>, request: u32, ptr: u32| -> anyhow::Result<()> {
-            let ctx = get_cx(caller.data_mut());
-            let stream = ctx
-                .outgoing_request_write(request)?
-                .map_err(|_| anyhow!("no outgoing stream present"))?;
-
-            let memory = memory_get(&mut caller)?;
-            // First == is_some
-            // Second == stream_id
-            let result: [u32; 2] = [0, stream];
-            let raw = u32_array_to_u8(&result);
-
-            memory.write(caller.as_context_mut(), ptr as _, &raw)?;
-            Ok(())
+        move |mut caller: Caller<'_, T>, request: u32, ptr: u32| {
+            Box::new(async move {
+                let ctx = get_cx(caller.data_mut());
+                let stream = ctx
+                    .outgoing_request_write(request)
+                    .await?
+                    .map_err(|_| anyhow!("no outgoing stream present"))?;
+
+                let memory = memory_get(&mut caller)?;
+                // First == is_some
+                // Second == stream_id
+                let result: [u32; 2] = [0, stream];
+                let raw = u32_array_to_u8(&result);
+
+                memory.write(caller.as_context_mut(), ptr as _, &raw)?;
+                Ok(())
+            })
         },
     )?;
-    linker.func_wrap(
+    linker.func_wrap1_async(
         "wasi:http/types",
         "drop-outgoing-request",
-        move |mut caller: Caller<'_, T>, id: u32| -> anyhow::Result<()> {
-            let ctx = get_cx(caller.data_mut());
-            ctx.drop_outgoing_request(id)?;
-            Ok(())
+        move |mut caller: Caller<'_, T>, id: u32| {
+            Box::new(async move {
+                let ctx = get_cx(caller.data_mut());
+                ctx.drop_outgoing_request(id).await
+            })
         },
     )?;
-    linker.func_wrap(
+    linker.func_wrap1_async(
         "wasi:http/types",
         "drop-incoming-response",
-        move |mut caller: Caller<'_, T>, id: u32| -> anyhow::Result<()> {
-            let ctx = get_cx(caller.data_mut());
-            ctx.drop_incoming_response(id)?;
-            Ok(())
+        move |mut caller: Caller<'_, T>, id: u32| {
+            Box::new(async move {
+                let ctx = get_cx(caller.data_mut());
+                ctx.drop_incoming_response(id).await
+            })
         },
     )?;
-    linker.func_wrap(
+    linker.func_wrap2_async(
         "wasi:http/types",
         "new-fields",
-        move |mut caller: Caller<'_, T>, base_ptr: u32, len: u32| -> anyhow::Result<u32> {
-            let memory = memory_get(&mut caller)?;
-
-            let mut vec = Vec::new();
-            let mut i = 0;
-            // TODO: read this more efficiently as a single block.
-            while i < len {
-                let ptr = base_ptr + i * 16;
-                let name_ptr = u32_from_memory(&memory, caller.as_context_mut(), ptr)?;
-                let name_len = u32_from_memory(&memory, caller.as_context_mut(), ptr + 4)?;
-                let value_ptr = u32_from_memory(&memory, caller.as_context_mut(), ptr + 8)?;
-                let value_len = u32_from_memory(&memory, caller.as_context_mut(), ptr + 12)?;
-
-                let name =
-                    string_from_memory(&memory, caller.as_context_mut(), name_ptr, name_len)?;
-                let value =
-                    string_from_memory(&memory, caller.as_context_mut(), value_ptr, value_len)?;
-
-                vec.push((name, value));
-                i = i + 1;
-            }
-
-            let ctx = get_cx(caller.data_mut());
-            Ok(ctx.new_fields(vec)?)
+        move |mut caller: Caller<'_, T>, base_ptr: u32, len: u32| {
+            Box::new(async move {
+                let memory = memory_get(&mut caller)?;
+
+                let mut vec = Vec::new();
+                let mut i = 0;
+                // TODO: read this more efficiently as a single block.
+                while i < len {
+                    let ptr = base_ptr + i * 16;
+                    let name_ptr = u32_from_memory(&memory, caller.as_context_mut(), ptr)?;
+                    let name_len = u32_from_memory(&memory, caller.as_context_mut(), ptr + 4)?;
+                    let value_ptr = u32_from_memory(&memory, caller.as_context_mut(), ptr + 8)?;
+                    let value_len = u32_from_memory(&memory, caller.as_context_mut(), ptr + 12)?;
+
+                    let name =
+                        string_from_memory(&memory, caller.as_context_mut(), name_ptr, name_len)?;
+                    let value =
+                        string_from_memory(&memory, caller.as_context_mut(), value_ptr, value_len)?;
+
+                    vec.push((name, value));
+                    i = i + 1;
+                }
+
+                let ctx = get_cx(caller.data_mut());
+                ctx.new_fields(vec).await
+            })
         },
     )?;
     linker.func_wrap2_async(
@@ -538,7 +571,7 @@ where
         move |mut caller: Caller<'_, T>, fields: u32, out_ptr: u32| {
             Box::new(async move {
                 let ctx = get_cx(caller.data_mut());
-                let entries = ctx.fields_entries(fields)?;
+                let entries = ctx.fields_entries(fields).await?;
 
                 let header_len = entries.len();
                 let tuple_ptr =
@@ -572,12 +605,14 @@ where
             })
         },
     )?;
-    linker.func_wrap(
+    linker.func_wrap1_async(
         "wasi:http/types",
         "incoming-response-headers",
-        move |mut caller: Caller<'_, T>, handle: u32| -> anyhow::Result<u32> {
-            let ctx = get_cx(caller.data_mut());
-            Ok(ctx.incoming_response_headers(handle)?)
+        move |mut caller: Caller<'_, T>, handle: u32| {
+            Box::new(async move {
+                let ctx = get_cx(caller.data_mut());
+                ctx.incoming_response_headers(handle).await
+            })
         },
     )?;
     Ok(())
diff --git a/crates/wasi-http/src/http_impl.rs b/crates/wasi-http/src/http_impl.rs
index 1a19068817ec..d16370af9e19 100644
--- a/crates/wasi-http/src/http_impl.rs
+++ b/crates/wasi-http/src/http_impl.rs
@@ -15,8 +15,9 @@ use tokio::time::timeout;
 use tokio_rustls::rustls::{self, OwnedTrustAnchor};
 use wasmtime_wasi::preview2::{StreamState, TableStreamExt};
 
+#[async_trait::async_trait]
 impl<T: WasiHttpView> crate::wasi::http::outgoing_handler::Host for T {
-    fn handle(
+    async fn handle(
         &mut self,
         request_id: OutgoingRequest,
         options: Option<RequestOptions>,
diff --git a/crates/wasi-http/src/lib.rs b/crates/wasi-http/src/lib.rs
index 889b3e2b6f31..b95cc5d74213 100644
--- a/crates/wasi-http/src/lib.rs
+++ b/crates/wasi-http/src/lib.rs
@@ -9,7 +9,8 @@ wasmtime::component::bindgen!({
     with: {
         "wasi:io/streams": wasmtime_wasi::preview2::bindings::io::streams,
         "wasi:poll/poll": wasmtime_wasi::preview2::bindings::poll::poll,
-    }
+    },
+    async: true,
 });
 
 pub mod component_impl;
diff --git a/crates/wasi-http/src/struct.rs b/crates/wasi-http/src/struct.rs
index 48b3429530f6..35503b7a6a97 100644
--- a/crates/wasi-http/src/struct.rs
+++ b/crates/wasi-http/src/struct.rs
@@ -185,8 +185,10 @@ impl HttpResponse for ActiveResponse {
 
 #[derive(Clone)]
 pub struct ActiveFuture {
-    pub request_id: OutgoingRequest,
-    pub options: Option<RequestOptions>,
+    request_id: OutgoingRequest,
+    options: Option<RequestOptions>,
+    response_id: Option<u32>,
+    pollable_id: Option<u32>,
 }
 
 impl ActiveFuture {
@@ -194,8 +196,34 @@ impl ActiveFuture {
         Self {
             request_id,
             options,
+            response_id: None,
+            pollable_id: None,
         }
     }
+
+    pub fn request_id(&self) -> u32 {
+        self.request_id
+    }
+
+    pub fn options(&self) -> Option<RequestOptions> {
+        self.options
+    }
+
+    pub fn response_id(&self) -> Option<u32> {
+        self.response_id
+    }
+
+    pub fn set_response_id(&mut self, response_id: u32) {
+        self.response_id = Some(response_id);
+    }
+
+    pub fn pollable_id(&self) -> Option<u32> {
+        self.pollable_id
+    }
+
+    pub fn set_pollable_id(&mut self, pollable_id: u32) {
+        self.pollable_id = Some(pollable_id);
+    }
 }
 
 #[derive(Clone, Debug)]
diff --git a/crates/wasi-http/src/types_impl.rs b/crates/wasi-http/src/types_impl.rs
index feba22e61ed5..027d1d4e9f86 100644
--- a/crates/wasi-http/src/types_impl.rs
+++ b/crates/wasi-http/src/types_impl.rs
@@ -8,16 +8,17 @@ use crate::wasi::http::types::{
 use crate::WasiHttpView;
 use anyhow::{anyhow, bail, Context};
 use bytes::Bytes;
-use wasmtime_wasi::preview2::bindings::poll::poll::Pollable;
+use wasmtime_wasi::preview2::{bindings::poll::poll::Pollable, HostPollable, TablePollableExt};
 
+#[async_trait::async_trait]
 impl<T: WasiHttpView + WasiHttpViewExt> crate::wasi::http::types::Host for T {
-    fn drop_fields(&mut self, fields: Fields) -> wasmtime::Result<()> {
+    async fn drop_fields(&mut self, fields: Fields) -> wasmtime::Result<()> {
         self.table_mut()
             .delete_fields(fields)
             .context("[drop_fields] deleting fields")?;
         Ok(())
     }
-    fn new_fields(&mut self, entries: Vec<(String, String)>) -> wasmtime::Result<Fields> {
+    async fn new_fields(&mut self, entries: Vec<(String, String)>) -> wasmtime::Result<Fields> {
         let mut map = ActiveFields::new();
         for (key, value) in entries {
             map.insert(key, vec![value.clone().into_bytes()]);
@@ -29,7 +30,7 @@ impl<T: WasiHttpView + WasiHttpViewExt> crate::wasi::http::types::Host for T {
             .context("[new_fields] pushing fields")?;
         Ok(id)
     }
-    fn fields_get(&mut self, fields: Fields, name: String) -> wasmtime::Result<Vec<Vec<u8>>> {
+    async fn fields_get(&mut self, fields: Fields, name: String) -> wasmtime::Result<Vec<Vec<u8>>> {
         let res = self
             .table_mut()
             .get_fields(fields)
@@ -39,7 +40,7 @@ impl<T: WasiHttpView + WasiHttpViewExt> crate::wasi::http::types::Host for T {
             .clone();
         Ok(res)
     }
-    fn fields_set(
+    async fn fields_set(
         &mut self,
         fields: Fields,
         name: String,
@@ -53,14 +54,14 @@ impl<T: WasiHttpView + WasiHttpViewExt> crate::wasi::http::types::Host for T {
             Err(_) => bail!("fields not found"),
         }
     }
-    fn fields_delete(&mut self, fields: Fields, name: String) -> wasmtime::Result<()> {
+    async fn fields_delete(&mut self, fields: Fields, name: String) -> wasmtime::Result<()> {
         match self.table_mut().get_fields_mut(fields) {
             Ok(m) => m.remove(&name),
             Err(_) => None,
         };
         Ok(())
     }
-    fn fields_append(
+    async fn fields_append(
         &mut self,
         fields: Fields,
         name: String,
@@ -80,7 +81,7 @@ impl<T: WasiHttpView + WasiHttpViewExt> crate::wasi::http::types::Host for T {
         };
         Ok(())
     }
-    fn fields_entries(&mut self, fields: Fields) -> wasmtime::Result<Vec<(String, Vec<u8>)>> {
+    async fn fields_entries(&mut self, fields: Fields) -> wasmtime::Result<Vec<(String, Vec<u8>)>> {
         let field_map = match self.table().get_fields(fields) {
             Ok(m) => m.iter(),
             Err(_) => bail!("fields not found."),
@@ -91,7 +92,7 @@ impl<T: WasiHttpView + WasiHttpViewExt> crate::wasi::http::types::Host for T {
         }
         Ok(result)
     }
-    fn fields_clone(&mut self, fields: Fields) -> wasmtime::Result<Fields> {
+    async fn fields_clone(&mut self, fields: Fields) -> wasmtime::Result<Fields> {
         let table = self.table_mut();
         let m = table
             .get_fields(fields)
@@ -101,7 +102,7 @@ impl<T: WasiHttpView + WasiHttpViewExt> crate::wasi::http::types::Host for T {
             .context("[fields_clone] pushing fields")?;
         Ok(id)
     }
-    fn finish_incoming_stream(
+    async fn finish_incoming_stream(
         &mut self,
         stream_id: IncomingStream,
     ) -> wasmtime::Result<Option<Trailers>> {
@@ -116,17 +117,17 @@ impl<T: WasiHttpView + WasiHttpViewExt> crate::wasi::http::types::Host for T {
         }
         bail!("unknown stream!")
     }
-    fn finish_outgoing_stream(
+    async fn finish_outgoing_stream(
         &mut self,
         _s: OutgoingStream,
         _trailers: Option<Trailers>,
     ) -> wasmtime::Result<()> {
         bail!("unimplemented: finish_outgoing_stream")
     }
-    fn drop_incoming_request(&mut self, _request: IncomingRequest) -> wasmtime::Result<()> {
+    async fn drop_incoming_request(&mut self, _request: IncomingRequest) -> wasmtime::Result<()> {
         bail!("unimplemented: drop_incoming_request")
     }
-    fn drop_outgoing_request(&mut self, request: OutgoingRequest) -> wasmtime::Result<()> {
+    async fn drop_outgoing_request(&mut self, request: OutgoingRequest) -> wasmtime::Result<()> {
         let r = self
             .table_mut()
             .get_request(request)
@@ -148,37 +149,43 @@ impl<T: WasiHttpView + WasiHttpViewExt> crate::wasi::http::types::Host for T {
 
         Ok(())
     }
-    fn incoming_request_method(&mut self, _request: IncomingRequest) -> wasmtime::Result<Method> {
+    async fn incoming_request_method(
+        &mut self,
+        _request: IncomingRequest,
+    ) -> wasmtime::Result<Method> {
         bail!("unimplemented: incoming_request_method")
     }
-    fn incoming_request_path_with_query(
+    async fn incoming_request_path_with_query(
         &mut self,
         _request: IncomingRequest,
     ) -> wasmtime::Result<Option<String>> {
         bail!("unimplemented: incoming_request_path")
     }
-    fn incoming_request_scheme(
+    async fn incoming_request_scheme(
         &mut self,
         _request: IncomingRequest,
     ) -> wasmtime::Result<Option<Scheme>> {
         bail!("unimplemented: incoming_request_scheme")
     }
-    fn incoming_request_authority(
+    async fn incoming_request_authority(
         &mut self,
         _request: IncomingRequest,
     ) -> wasmtime::Result<Option<String>> {
         bail!("unimplemented: incoming_request_authority")
     }
-    fn incoming_request_headers(&mut self, _request: IncomingRequest) -> wasmtime::Result<Headers> {
+    async fn incoming_request_headers(
+        &mut self,
+        _request: IncomingRequest,
+    ) -> wasmtime::Result<Headers> {
         bail!("unimplemented: incoming_request_headers")
     }
-    fn incoming_request_consume(
+    async fn incoming_request_consume(
         &mut self,
         _request: IncomingRequest,
     ) -> wasmtime::Result<Result<IncomingStream, ()>> {
         bail!("unimplemented: incoming_request_consume")
     }
-    fn new_outgoing_request(
+    async fn new_outgoing_request(
         &mut self,
         method: Method,
         path_with_query: Option<String>,
@@ -198,7 +205,7 @@ impl<T: WasiHttpView + WasiHttpViewExt> crate::wasi::http::types::Host for T {
             .context("[new_outgoing_request] pushing request")?;
         Ok(id)
     }
-    fn outgoing_request_write(
+    async fn outgoing_request_write(
         &mut self,
         request: OutgoingRequest,
     ) -> wasmtime::Result<Result<OutgoingStream, ()>> {
@@ -225,17 +232,20 @@ impl<T: WasiHttpView + WasiHttpViewExt> crate::wasi::http::types::Host for T {
             .context("[outgoing_request_write] getting stream")?;
         Ok(Ok(stream.outgoing()))
     }
-    fn drop_response_outparam(&mut self, _response: ResponseOutparam) -> wasmtime::Result<()> {
+    async fn drop_response_outparam(
+        &mut self,
+        _response: ResponseOutparam,
+    ) -> wasmtime::Result<()> {
         bail!("unimplemented: drop_response_outparam")
     }
-    fn set_response_outparam(
+    async fn set_response_outparam(
         &mut self,
         _outparam: ResponseOutparam,
         _response: Result<OutgoingResponse, Error>,
     ) -> wasmtime::Result<Result<(), ()>> {
         bail!("unimplemented: set_response_outparam")
     }
-    fn drop_incoming_response(&mut self, response: IncomingResponse) -> wasmtime::Result<()> {
+    async fn drop_incoming_response(&mut self, response: IncomingResponse) -> wasmtime::Result<()> {
         let r = self
             .table()
             .get_response(response)
@@ -250,7 +260,7 @@ impl<T: WasiHttpView + WasiHttpViewExt> crate::wasi::http::types::Host for T {
                 .get_stream(id)
                 .context("[drop_incoming_response] getting stream")?;
             let incoming_id = stream.incoming();
-            if let Some(trailers) = self.finish_incoming_stream(incoming_id)? {
+            if let Some(trailers) = self.finish_incoming_stream(incoming_id).await? {
                 self.table_mut()
                     .delete_fields(trailers)
                     .context("[drop_incoming_response] deleting trailers")
@@ -267,10 +277,13 @@ impl<T: WasiHttpView + WasiHttpViewExt> crate::wasi::http::types::Host for T {
             .context("[drop_incoming_response] deleting response")?;
         Ok(())
     }
-    fn drop_outgoing_response(&mut self, _response: OutgoingResponse) -> wasmtime::Result<()> {
+    async fn drop_outgoing_response(
+        &mut self,
+        _response: OutgoingResponse,
+    ) -> wasmtime::Result<()> {
         bail!("unimplemented: drop_outgoing_response")
     }
-    fn incoming_response_status(
+    async fn incoming_response_status(
         &mut self,
         response: IncomingResponse,
     ) -> wasmtime::Result<StatusCode> {
@@ -280,7 +293,7 @@ impl<T: WasiHttpView + WasiHttpViewExt> crate::wasi::http::types::Host for T {
             .context("[incoming_response_status] getting response")?;
         Ok(r.status())
     }
-    fn incoming_response_headers(
+    async fn incoming_response_headers(
         &mut self,
         response: IncomingResponse,
     ) -> wasmtime::Result<Headers> {
@@ -290,7 +303,7 @@ impl<T: WasiHttpView + WasiHttpViewExt> crate::wasi::http::types::Host for T {
             .context("[incoming_response_headers] getting response")?;
         Ok(r.headers().unwrap_or(0 as Headers))
     }
-    fn incoming_response_consume(
+    async fn incoming_response_consume(
         &mut self,
         response: IncomingResponse,
     ) -> wasmtime::Result<Result<IncomingStream, ()>> {
@@ -308,20 +321,20 @@ impl<T: WasiHttpView + WasiHttpViewExt> crate::wasi::http::types::Host for T {
             })
             .unwrap_or(0 as IncomingStream)))
     }
-    fn new_outgoing_response(
+    async fn new_outgoing_response(
         &mut self,
         _status_code: StatusCode,
         _headers: Headers,
     ) -> wasmtime::Result<OutgoingResponse> {
         bail!("unimplemented: new_outgoing_response")
     }
-    fn outgoing_response_write(
+    async fn outgoing_response_write(
         &mut self,
         _response: OutgoingResponse,
     ) -> wasmtime::Result<Result<OutgoingStream, ()>> {
         bail!("unimplemented: outgoing_response_write")
     }
-    fn drop_future_incoming_response(
+    async fn drop_future_incoming_response(
         &mut self,
         future: FutureIncomingResponse,
     ) -> wasmtime::Result<()> {
@@ -330,7 +343,7 @@ impl<T: WasiHttpView + WasiHttpViewExt> crate::wasi::http::types::Host for T {
             .context("[drop_future_incoming_response] deleting future")?;
         Ok(())
     }
-    fn future_incoming_response_get(
+    async fn future_incoming_response_get(
         &mut self,
         future: FutureIncomingResponse,
     ) -> wasmtime::Result<Option<Result<IncomingResponse, Error>>> {
@@ -338,14 +351,51 @@ impl<T: WasiHttpView + WasiHttpViewExt> crate::wasi::http::types::Host for T {
             .table()
             .get_future(future)
             .context("[future_incoming_response_get] getting future")?;
-
-        let response = futures::executor::block_on(self.handle_async(f.request_id, f.options));
-        Ok(Some(response))
+        Ok(match f.pollable_id() {
+            Some(_) => {
+                let result = match f.response_id() {
+                    Some(id) => Ok(id),
+                    None => {
+                        let response = self.handle_async(f.request_id(), f.options()).await;
+                        match response {
+                            Ok(id) => {
+                                let future_mut = self.table_mut().get_future_mut(future)?;
+                                future_mut.set_response_id(id);
+                            }
+                            _ => {}
+                        }
+                        response
+                    }
+                };
+                Some(result)
+            }
+            None => None,
+        })
     }
-    fn listen_to_future_incoming_response(
+    async fn listen_to_future_incoming_response(
         &mut self,
-        _f: FutureIncomingResponse,
+        future: FutureIncomingResponse,
     ) -> wasmtime::Result<Pollable> {
-        bail!("unimplemented: listen_to_future_incoming_response")
+        let f = self
+            .table()
+            .get_future(future)
+            .context("[listen_to_future_incoming_response] getting future")?;
+        Ok(match f.pollable_id() {
+            Some(pollable_id) => pollable_id,
+            None => {
+                let pollable =
+                    HostPollable::Closure(Box::new(|| Box::pin(futures::future::ready(Ok(())))));
+                let pollable_id = self
+                    .table_mut()
+                    .push_host_pollable(pollable)
+                    .context("[listen_to_future_incoming_response] pushing host pollable")?;
+                let f = self
+                    .table_mut()
+                    .get_future_mut(future)
+                    .context("[listen_to_future_incoming_response] getting future")?;
+                f.set_pollable_id(pollable_id);
+                pollable_id
+            }
+        })
     }
 }

From 211ff2ef8a1329a8febaed6a0d5d71486f612fe7 Mon Sep 17 00:00:00 2001
From: Eduardo Rodrigues <eduardomourar@users.noreply.github.com>
Date: Wed, 16 Aug 2023 02:55:38 +0100
Subject: [PATCH 23/49] chore: make wasi http tests async

---
 Cargo.lock                                    |  1 +
 crates/test-programs/src/http_server.rs       | 47 ++++++-------
 .../test-programs/wasi-http-tests/Cargo.toml  |  1 +
 .../src/bin/outbound_request_get.rs           |  7 +-
 .../bin/outbound_request_invalid_dnsname.rs   |  9 ++-
 .../src/bin/outbound_request_invalid_port.rs  |  9 ++-
 .../bin/outbound_request_invalid_version.rs   | 15 +++--
 .../src/bin/outbound_request_post.rs          |  7 +-
 .../src/bin/outbound_request_put.rs           |  7 +-
 .../bin/outbound_request_unknown_method.rs    |  9 ++-
 .../outbound_request_unsupported_scheme.rs    |  9 ++-
 .../test-programs/wasi-http-tests/src/lib.rs  | 66 +++++++++++++------
 12 files changed, 121 insertions(+), 66 deletions(-)

diff --git a/Cargo.lock b/Cargo.lock
index 6c447d0554a3..43b9d9702071 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -3043,6 +3043,7 @@ name = "wasi-http-tests"
 version = "0.0.0"
 dependencies = [
  "anyhow",
+ "tokio",
  "wit-bindgen",
 ]
 
diff --git a/crates/test-programs/src/http_server.rs b/crates/test-programs/src/http_server.rs
index 6a79f08c85be..6d3e6231f5b7 100644
--- a/crates/test-programs/src/http_server.rs
+++ b/crates/test-programs/src/http_server.rs
@@ -1,20 +1,17 @@
-use http_body_util::combinators::BoxBody;
-use http_body_util::{BodyExt, Full};
+use http_body_util::{combinators::BoxBody, BodyExt, Full};
 use hyper::{body::Bytes, service::service_fn, Request, Response};
-use std::net::SocketAddr;
-use std::sync::OnceLock;
+use std::{
+    net::{SocketAddr, TcpListener, TcpStream},
+    sync::OnceLock,
+};
 
 async fn test(
     mut req: Request<hyper::body::Incoming>,
 ) -> http::Result<Response<BoxBody<Bytes, std::convert::Infallible>>> {
     let method = req.method().to_string();
-    let mut buf: Vec<u8> = Vec::new();
-    while let Some(next) = req.body_mut().frame().await {
-        let frame = next.unwrap();
-        if let Some(chunk) = frame.data_ref() {
-            buf.extend_from_slice(chunk);
-        }
-    }
+    let body = req.body_mut().collect().await.unwrap();
+    let buf = body.to_bytes();
+
     Response::builder()
         .status(http::StatusCode::OK)
         .header("x-wasmtime-test-method", method)
@@ -22,9 +19,10 @@ async fn test(
         .body(Full::<Bytes>::from(buf).boxed())
 }
 
-async fn serve_http1_connection(stream: std::net::TcpStream) -> Result<(), hyper::Error> {
+async fn serve_http1_connection(stream: TcpStream) -> Result<(), hyper::Error> {
     let mut builder = hyper::server::conn::http1::Builder::new();
     let http = builder.keep_alive(false).pipeline_flush(true);
+    stream.set_nonblocking(true).unwrap();
     let io = tokio::net::TcpStream::from_std(stream).unwrap();
     http.serve_connection(io, service_fn(test)).await
 }
@@ -43,7 +41,7 @@ where
     }
 }
 
-async fn serve_http2_connection(stream: std::net::TcpStream) -> Result<(), hyper::Error> {
+async fn serve_http2_connection(stream: TcpStream) -> Result<(), hyper::Error> {
     let mut builder = hyper::server::conn::http2::Builder::new(TokioExecutor);
     let http = builder.max_concurrent_streams(20);
     let io = tokio::net::TcpStream::from_std(stream).unwrap();
@@ -53,43 +51,46 @@ async fn serve_http2_connection(stream: std::net::TcpStream) -> Result<(), hyper
 pub async fn setup_http1(
     future: impl std::future::Future<Output = anyhow::Result<()>>,
 ) -> Result<(), anyhow::Error> {
-    static CELL_HTTP1: OnceLock<std::net::TcpListener> = OnceLock::new();
+    static CELL_HTTP1: OnceLock<TcpListener> = OnceLock::new();
     let listener = CELL_HTTP1.get_or_init(|| {
         let addr = SocketAddr::from(([127, 0, 0, 1], 3000));
-        std::net::TcpListener::bind(addr).unwrap()
+        TcpListener::bind(addr).unwrap()
     });
 
     let thread = tokio::task::spawn(async move {
         let (stream, _) = listener.accept().unwrap();
         let conn = serve_http1_connection(stream).await;
         if let Err(err) = conn {
-            println!("Error serving connection: {:?}", err);
+            eprintln!("Error serving connection: {:?}", err);
         }
     });
 
-    future.await?;
-    thread.await.unwrap();
+    let (future_result, thread_result) = tokio::join!(future, thread);
+    future_result?;
+    thread_result.unwrap();
+
     Ok(())
 }
 
 pub async fn setup_http2(
     future: impl std::future::Future<Output = anyhow::Result<()>>,
 ) -> anyhow::Result<()> {
-    static CELL_HTTP2: OnceLock<std::net::TcpListener> = OnceLock::new();
+    static CELL_HTTP2: OnceLock<TcpListener> = OnceLock::new();
     let listener = CELL_HTTP2.get_or_init(|| {
         let addr = SocketAddr::from(([127, 0, 0, 1], 3001));
-        std::net::TcpListener::bind(addr).unwrap()
+        TcpListener::bind(addr).unwrap()
     });
     let thread = tokio::task::spawn(async move {
         let (stream, _) = listener.accept().unwrap();
         let conn = serve_http2_connection(stream).await;
         if let Err(err) = conn {
-            println!("Error serving connection: {:?}", err);
+            eprintln!("Error serving connection: {:?}", err);
         }
     });
 
-    future.await?;
-    thread.await.unwrap();
+    let (future_result, thread_result) = tokio::join!(future, thread);
+    future_result?;
+    thread_result.unwrap();
 
     Ok(())
 }
diff --git a/crates/test-programs/wasi-http-tests/Cargo.toml b/crates/test-programs/wasi-http-tests/Cargo.toml
index 14206c3bbaa4..a648458bedd2 100644
--- a/crates/test-programs/wasi-http-tests/Cargo.toml
+++ b/crates/test-programs/wasi-http-tests/Cargo.toml
@@ -7,6 +7,7 @@ publish = false
 
 [dependencies]
 anyhow = { workspace = true }
+tokio = { workspace = true, features = ["macros", "rt"] }
 wit-bindgen = { workspace = true, default-features = false, features = [
     "macros",
 ] }
diff --git a/crates/test-programs/wasi-http-tests/src/bin/outbound_request_get.rs b/crates/test-programs/wasi-http-tests/src/bin/outbound_request_get.rs
index 7a0c50a73e0e..600de5033ec6 100644
--- a/crates/test-programs/wasi-http-tests/src/bin/outbound_request_get.rs
+++ b/crates/test-programs/wasi-http-tests/src/bin/outbound_request_get.rs
@@ -3,7 +3,9 @@ use wasi_http_tests::bindings::wasi::http::types::{Method, Scheme};
 
 struct Component;
 
-fn main() -> Result<(), ()> {
+fn main() {}
+
+async fn run() -> Result<(), ()> {
     let res = wasi_http_tests::request(
         Method::Get,
         Scheme::Http,
@@ -12,6 +14,7 @@ fn main() -> Result<(), ()> {
         None,
         None,
     )
+    .await
     .context("localhost:3000 /get")
     .unwrap();
 
@@ -31,7 +34,7 @@ fn main() -> Result<(), ()> {
 
 impl wasi_http_tests::bindings::CommandExtended for Component {
     fn run() -> Result<(), ()> {
-        main()
+        wasi_http_tests::in_tokio(async { run().await })
     }
 }
 
diff --git a/crates/test-programs/wasi-http-tests/src/bin/outbound_request_invalid_dnsname.rs b/crates/test-programs/wasi-http-tests/src/bin/outbound_request_invalid_dnsname.rs
index 0c946d84e344..c1d167a6c31b 100644
--- a/crates/test-programs/wasi-http-tests/src/bin/outbound_request_invalid_dnsname.rs
+++ b/crates/test-programs/wasi-http-tests/src/bin/outbound_request_invalid_dnsname.rs
@@ -3,7 +3,9 @@ use wasi_http_tests::bindings::wasi::http::types::{Method, Scheme};
 
 struct Component;
 
-fn main() -> Result<(), ()> {
+fn main() {}
+
+async fn run() -> Result<(), ()> {
     let res = wasi_http_tests::request(
         Method::Get,
         Scheme::Http,
@@ -11,7 +13,8 @@ fn main() -> Result<(), ()> {
         "/",
         None,
         None,
-    );
+    )
+    .await;
 
     let error = res.unwrap_err();
     assert_eq!(error.to_string(), "Error::InvalidUrl(\"invalid dnsname\")");
@@ -21,7 +24,7 @@ fn main() -> Result<(), ()> {
 
 impl wasi_http_tests::bindings::CommandExtended for Component {
     fn run() -> Result<(), ()> {
-        main()
+        wasi_http_tests::in_tokio(async { run().await })
     }
 }
 
diff --git a/crates/test-programs/wasi-http-tests/src/bin/outbound_request_invalid_port.rs b/crates/test-programs/wasi-http-tests/src/bin/outbound_request_invalid_port.rs
index 1c67dfb06fdd..03ca85fedb6a 100644
--- a/crates/test-programs/wasi-http-tests/src/bin/outbound_request_invalid_port.rs
+++ b/crates/test-programs/wasi-http-tests/src/bin/outbound_request_invalid_port.rs
@@ -3,7 +3,9 @@ use wasi_http_tests::bindings::wasi::http::types::{Method, Scheme};
 
 struct Component;
 
-fn main() -> Result<(), ()> {
+fn main() {}
+
+async fn run() -> Result<(), ()> {
     let res = wasi_http_tests::request(
         Method::Get,
         Scheme::Http,
@@ -11,7 +13,8 @@ fn main() -> Result<(), ()> {
         "/",
         None,
         None,
-    );
+    )
+    .await;
 
     let error = res.unwrap_err();
     assert_eq!(
@@ -24,7 +27,7 @@ fn main() -> Result<(), ()> {
 
 impl wasi_http_tests::bindings::CommandExtended for Component {
     fn run() -> Result<(), ()> {
-        main()
+        wasi_http_tests::in_tokio(async { run().await })
     }
 }
 
diff --git a/crates/test-programs/wasi-http-tests/src/bin/outbound_request_invalid_version.rs b/crates/test-programs/wasi-http-tests/src/bin/outbound_request_invalid_version.rs
index b6088dd645d7..b5a5f840165c 100644
--- a/crates/test-programs/wasi-http-tests/src/bin/outbound_request_invalid_version.rs
+++ b/crates/test-programs/wasi-http-tests/src/bin/outbound_request_invalid_version.rs
@@ -3,7 +3,9 @@ use wasi_http_tests::bindings::wasi::http::types::{Method, Scheme};
 
 struct Component;
 
-fn main() -> Result<(), ()> {
+fn main() {}
+
+async fn run() -> Result<(), ()> {
     let res = wasi_http_tests::request(
         Method::Connect,
         Scheme::Http,
@@ -11,7 +13,8 @@ fn main() -> Result<(), ()> {
         "/",
         None,
         Some(&[]),
-    );
+    )
+    .await;
 
     let error = res.unwrap_err().to_string();
     if error.ne("Error::ProtocolError(\"invalid HTTP version parsed\")")
@@ -19,9 +22,9 @@ fn main() -> Result<(), ()> {
     {
         panic!(
             r#"assertion failed: `(left == right)`
-  left: `"{error}"`,
-  right: `"Error::ProtocolError(\"invalid HTTP version parsed\")"`
-        or `"Error::ProtocolError(\"operation was canceled\")"`)"#
+      left: `"{error}"`,
+      right: `"Error::ProtocolError(\"invalid HTTP version parsed\")"`
+            or `"Error::ProtocolError(\"operation was canceled\")"`)"#
         )
     }
 
@@ -30,7 +33,7 @@ fn main() -> Result<(), ()> {
 
 impl wasi_http_tests::bindings::CommandExtended for Component {
     fn run() -> Result<(), ()> {
-        main()
+        wasi_http_tests::in_tokio(async { run().await })
     }
 }
 
diff --git a/crates/test-programs/wasi-http-tests/src/bin/outbound_request_post.rs b/crates/test-programs/wasi-http-tests/src/bin/outbound_request_post.rs
index aa71e827b993..00c6b019dcb2 100644
--- a/crates/test-programs/wasi-http-tests/src/bin/outbound_request_post.rs
+++ b/crates/test-programs/wasi-http-tests/src/bin/outbound_request_post.rs
@@ -3,7 +3,9 @@ use wasi_http_tests::bindings::wasi::http::types::{Method, Scheme};
 
 struct Component;
 
-fn main() -> Result<(), ()> {
+fn main() {}
+
+async fn run() -> Result<(), ()> {
     let res = wasi_http_tests::request(
         Method::Post,
         Scheme::Http,
@@ -12,6 +14,7 @@ fn main() -> Result<(), ()> {
         Some(b"{\"foo\": \"bar\"}"),
         None,
     )
+    .await
     .context("localhost:3000 /post")
     .unwrap();
 
@@ -26,7 +29,7 @@ fn main() -> Result<(), ()> {
 
 impl wasi_http_tests::bindings::CommandExtended for Component {
     fn run() -> Result<(), ()> {
-        main()
+        wasi_http_tests::in_tokio(async { run().await })
     }
 }
 
diff --git a/crates/test-programs/wasi-http-tests/src/bin/outbound_request_put.rs b/crates/test-programs/wasi-http-tests/src/bin/outbound_request_put.rs
index c3adc79f38a0..9409411b0a86 100644
--- a/crates/test-programs/wasi-http-tests/src/bin/outbound_request_put.rs
+++ b/crates/test-programs/wasi-http-tests/src/bin/outbound_request_put.rs
@@ -3,7 +3,9 @@ use wasi_http_tests::bindings::wasi::http::types::{Method, Scheme};
 
 struct Component;
 
-fn main() -> Result<(), ()> {
+fn main() {}
+
+async fn run() -> Result<(), ()> {
     let res = wasi_http_tests::request(
         Method::Put,
         Scheme::Http,
@@ -12,6 +14,7 @@ fn main() -> Result<(), ()> {
         Some(&[]),
         None,
     )
+    .await
     .context("localhost:3000 /put")
     .unwrap();
 
@@ -26,7 +29,7 @@ fn main() -> Result<(), ()> {
 
 impl wasi_http_tests::bindings::CommandExtended for Component {
     fn run() -> Result<(), ()> {
-        main()
+        wasi_http_tests::in_tokio(async { run().await })
     }
 }
 
diff --git a/crates/test-programs/wasi-http-tests/src/bin/outbound_request_unknown_method.rs b/crates/test-programs/wasi-http-tests/src/bin/outbound_request_unknown_method.rs
index ec0a59d99dd3..e76da3c2e839 100644
--- a/crates/test-programs/wasi-http-tests/src/bin/outbound_request_unknown_method.rs
+++ b/crates/test-programs/wasi-http-tests/src/bin/outbound_request_unknown_method.rs
@@ -3,7 +3,9 @@ use wasi_http_tests::bindings::wasi::http::types::{Method, Scheme};
 
 struct Component;
 
-fn main() -> Result<(), ()> {
+fn main() {}
+
+async fn run() -> Result<(), ()> {
     let res = wasi_http_tests::request(
         Method::Other("OTHER".to_owned()),
         Scheme::Http,
@@ -11,7 +13,8 @@ fn main() -> Result<(), ()> {
         "/",
         None,
         None,
-    );
+    )
+    .await;
 
     let error = res.unwrap_err();
     assert_eq!(
@@ -24,7 +27,7 @@ fn main() -> Result<(), ()> {
 
 impl wasi_http_tests::bindings::CommandExtended for Component {
     fn run() -> Result<(), ()> {
-        main()
+        wasi_http_tests::in_tokio(async { run().await })
     }
 }
 
diff --git a/crates/test-programs/wasi-http-tests/src/bin/outbound_request_unsupported_scheme.rs b/crates/test-programs/wasi-http-tests/src/bin/outbound_request_unsupported_scheme.rs
index 869a84e7f8e9..7cc6dc39a34d 100644
--- a/crates/test-programs/wasi-http-tests/src/bin/outbound_request_unsupported_scheme.rs
+++ b/crates/test-programs/wasi-http-tests/src/bin/outbound_request_unsupported_scheme.rs
@@ -3,7 +3,9 @@ use wasi_http_tests::bindings::wasi::http::types::{Method, Scheme};
 
 struct Component;
 
-fn main() -> Result<(), ()> {
+fn main() {}
+
+async fn run() -> Result<(), ()> {
     let res = wasi_http_tests::request(
         Method::Get,
         Scheme::Other("WS".to_owned()),
@@ -11,7 +13,8 @@ fn main() -> Result<(), ()> {
         "/",
         None,
         None,
-    );
+    )
+    .await;
 
     let error = res.unwrap_err();
     assert_eq!(
@@ -24,7 +27,7 @@ fn main() -> Result<(), ()> {
 
 impl wasi_http_tests::bindings::CommandExtended for Component {
     fn run() -> Result<(), ()> {
-        main()
+        wasi_http_tests::in_tokio(async { run().await })
     }
 }
 
diff --git a/crates/test-programs/wasi-http-tests/src/lib.rs b/crates/test-programs/wasi-http-tests/src/lib.rs
index f3bdc7f40c80..0fbf3778305d 100644
--- a/crates/test-programs/wasi-http-tests/src/lib.rs
+++ b/crates/test-programs/wasi-http-tests/src/lib.rs
@@ -1,6 +1,6 @@
 pub mod bindings {
     wit_bindgen::generate!({
-        path: "../../wasi/wit",
+        path: "../../wasi-http/wit",
         world: "wasi:preview/command-extended",
         macro_call_prefix: "::wasi_http_tests::bindings::",
         macro_export,
@@ -9,6 +9,7 @@ pub mod bindings {
 
 use anyhow::{anyhow, Context, Result};
 use std::fmt;
+use std::sync::OnceLock;
 
 use bindings::wasi::http::{outgoing_handler, types as http_types};
 use bindings::wasi::io::streams;
@@ -41,7 +42,7 @@ impl Response {
     }
 }
 
-pub fn request(
+pub async fn request(
     method: http_types::Method,
     scheme: http_types::Scheme,
     authority: &str,
@@ -73,12 +74,17 @@ pub fn request(
 
     if let Some(body) = body {
         let output_stream_pollable = streams::subscribe_to_output_stream(request_body);
-
-        let mut body_cursor = 0;
-        while body_cursor < body.len() {
-            let (written, _) = streams::write(request_body, &body[body_cursor..])
-                .context("writing request body")?;
-            body_cursor += written as usize;
+        let len = body.len();
+        if len == 0 {
+            let (_written, _status) =
+                streams::write(request_body, &[]).context("writing empty request body")?;
+        } else {
+            let mut body_cursor = 0;
+            while body_cursor < body.len() {
+                let (written, _status) = streams::write(request_body, &body[body_cursor..])
+                    .context("writing request body")?;
+                body_cursor += written as usize;
+            }
         }
 
         // TODO: enable when working as expected
@@ -89,20 +95,24 @@ pub fn request(
 
     let future_response = outgoing_handler::handle(request, None);
 
-    let incoming_response = http_types::future_incoming_response_get(future_response)
-        .ok_or_else(|| anyhow!("incoming response is available immediately"))?
-        // TODO: maybe anything that appears in the Result<_, E> position should impl
-        // Error? anyway, just use its Debug here:
-        .map_err(|e| anyhow!("{e:?}"))?;
+    let incoming_response = match http_types::future_incoming_response_get(future_response) {
+        Some(result) => result,
+        None => {
+            let pollable = http_types::listen_to_future_incoming_response(future_response);
+            let _ = poll::poll_oneoff(&[pollable]);
+            http_types::future_incoming_response_get(future_response)
+                .expect("incoming response available")
+        }
+    }
+    // TODO: maybe anything that appears in the Result<_, E> position should impl
+    // Error? anyway, just use its Debug here:
+    .map_err(|e| anyhow!("{e:?}"))?;
 
     // TODO: The current implementation requires this drop after the request is sent.
     // The ownership semantics are unclear in wasi-http we should clarify exactly what is
     // supposed to happen here.
     streams::drop_output_stream(request_body);
 
-    // TODO: we could create a pollable from the future_response and poll on it here to test that
-    // its available immediately
-
     http_types::drop_outgoing_request(request);
 
     http_types::drop_future_incoming_response(future_response);
@@ -129,9 +139,6 @@ pub fn request(
         body.append(&mut body_chunk);
     }
 
-    // TODO: enable when working as expected
-    // let _ = poll::poll_oneoff(&[input_stream_pollable]);
-
     poll::drop_pollable(input_stream_pollable);
     streams::drop_input_stream(body_stream);
     http_types::drop_incoming_response(incoming_response);
@@ -142,3 +149,24 @@ pub fn request(
         body,
     })
 }
+
+static RUNTIME: OnceLock<tokio::runtime::Runtime> = OnceLock::new();
+
+pub fn in_tokio<F: std::future::Future>(f: F) -> F::Output {
+    match tokio::runtime::Handle::try_current() {
+        Ok(h) => {
+            let _enter = h.enter();
+            h.block_on(f)
+        }
+        Err(_) => {
+            let runtime = RUNTIME.get_or_init(|| {
+                tokio::runtime::Builder::new_current_thread()
+                    .enable_all()
+                    .build()
+                    .unwrap()
+            });
+            let _enter = runtime.enter();
+            runtime.block_on(f)
+        }
+    }
+}

From ca22473bac7aaf917f0cc4edbf0bdcf4963d1644 Mon Sep 17 00:00:00 2001
From: Eduardo de Moura Rodrigues
 <16357187+eduardomourar@users.noreply.github.com>
Date: Wed, 16 Aug 2023 03:08:41 +0100
Subject: [PATCH 24/49] chore: update ci workflow based on suggestion

Co-authored-by: Pat Hickey <pat@moreproductive.org>
---
 .github/workflows/main.yml | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/.github/workflows/main.yml b/.github/workflows/main.yml
index e2b17f8dd835..ea66483c86a3 100644
--- a/.github/workflows/main.yml
+++ b/.github/workflows/main.yml
@@ -454,7 +454,8 @@ jobs:
         RUST_BACKTRACE: 1
       if: matrix.target == '' && matrix.os != 'windows-latest' && needs.determine.outputs.test-capi
 
-    # Ensure WIT definitions are in sync
+    # Ensure wit definitions are in sync: both wasmtime-wasi and wasmtime-wasi-http need their own
+    # copy of the wit definitions so publishing works, but we need to ensure they are identical copies.
     - run: |
         cp -TRv 'crates/wasi/wit/' 'crates/wasi-http/wit/'
         git diff --exit-code --diff-filter=AM $GITHUB_SHA -- 'crates/wasi-http/wit/'

From 484f79f49ded55179a9cbe17dc72c6cf42ca87cf Mon Sep 17 00:00:00 2001
From: Eduardo Rodrigues <eduardomourar@users.noreply.github.com>
Date: Wed, 16 Aug 2023 03:51:44 +0100
Subject: [PATCH 25/49] feat(wasmtime-wasi): update logging world to latest

---
 crates/wasi/wit/deps/logging/{handler.wit => logging.wit} | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)
 rename crates/wasi/wit/deps/logging/{handler.wit => logging.wit} (91%)

diff --git a/crates/wasi/wit/deps/logging/handler.wit b/crates/wasi/wit/deps/logging/logging.wit
similarity index 91%
rename from crates/wasi/wit/deps/logging/handler.wit
rename to crates/wasi/wit/deps/logging/logging.wit
index e6b077be8a60..b0cc4514dc8f 100644
--- a/crates/wasi/wit/deps/logging/handler.wit
+++ b/crates/wasi/wit/deps/logging/logging.wit
@@ -2,7 +2,7 @@ package wasi:logging
 
 /// WASI Logging is a logging API intended to let users emit log messages with
 /// simple priority levels and context values.
-interface handler {
+interface logging {
     /// A log level, describing a kind of message.
     enum level {
        /// Describes messages about the values of variables and the flow of
@@ -22,6 +22,9 @@ interface handler {
 
        /// Describes messages indicating serious errors.
        error,
+
+       /// Describes messages indicating fatal errors.
+       critical,
     }
 
     /// Emit a log message.

From 98298b680939726054271652d2201acb7807e029 Mon Sep 17 00:00:00 2001
From: Eduardo Rodrigues <eduardomourar@users.noreply.github.com>
Date: Wed, 16 Aug 2023 03:52:21 +0100
Subject: [PATCH 26/49] feat(wasmtime): update proxy world to latest

---
 crates/wasi/wit/deps/http/proxy.wit | 34 +++++++++++++++++++++++++++++
 crates/wasi/wit/deps/http/types.wit |  2 --
 2 files changed, 34 insertions(+), 2 deletions(-)
 create mode 100644 crates/wasi/wit/deps/http/proxy.wit

diff --git a/crates/wasi/wit/deps/http/proxy.wit b/crates/wasi/wit/deps/http/proxy.wit
new file mode 100644
index 000000000000..162ab32b2348
--- /dev/null
+++ b/crates/wasi/wit/deps/http/proxy.wit
@@ -0,0 +1,34 @@
+package wasi:http
+
+// The `wasi:http/proxy` world captures a widely-implementable intersection of
+// hosts that includes HTTP forward and reverse proxies. Components targeting
+// this world may concurrently stream in and out any number of incoming and
+// outgoing HTTP requests.
+world proxy {
+  // HTTP proxies have access to time and randomness.
+  import wasi:clocks/wall-clock
+  import wasi:clocks/monotonic-clock
+  import wasi:clocks/timezone
+  import wasi:random/random
+
+  // Proxies have standard output and error streams which are expected to
+  // terminate in a developer-facing console provided by the host.
+  import wasi:cli/stdout
+  import wasi:cli/stderr
+
+  // TODO: this is a temporary workaround until component tooling is able to
+  // gracefully handle the absence of stdin. Hosts must return an eof stream
+  // for this import, which is what wasi-libc + tooling will do automatically
+  // when this import is properly removed.
+  import wasi:cli/stdin
+
+  // This is the default handler to use when user code simply wants to make an
+  // HTTP request (e.g., via `fetch()`).
+  import outgoing-handler
+
+  // The host delivers incoming HTTP requests to a component by calling the
+  // `handle` function of this exported interface. A host may arbitrarily reuse
+  // or not reuse component instance when delivering incoming HTTP requests and
+  // thus a component must be able to handle 0..N calls to `handle`.
+  export incoming-handler
+}
diff --git a/crates/wasi/wit/deps/http/types.wit b/crates/wasi/wit/deps/http/types.wit
index 6ac2caf0bfd8..7b7b015529c0 100644
--- a/crates/wasi/wit/deps/http/types.wit
+++ b/crates/wasi/wit/deps/http/types.wit
@@ -1,5 +1,3 @@
-package wasi:http
-
 // The `wasi:http/types` interface is meant to be imported by components to
 // define the HTTP resource types and operations used by the component's
 // imported and exported interfaces.

From 61d00d1943d9b7daa0c6d4ab4d97c797a8dcdb68 Mon Sep 17 00:00:00 2001
From: Eduardo Rodrigues <eduardomourar@users.noreply.github.com>
Date: Wed, 16 Aug 2023 03:52:57 +0100
Subject: [PATCH 27/49] feat(wasmtime-wasi): add back command extended world

---
 crates/wasi/wit/command-extended.wit | 39 ++++++++++++++++++++++++++++
 1 file changed, 39 insertions(+)
 create mode 100644 crates/wasi/wit/command-extended.wit

diff --git a/crates/wasi/wit/command-extended.wit b/crates/wasi/wit/command-extended.wit
new file mode 100644
index 000000000000..518fabdcac96
--- /dev/null
+++ b/crates/wasi/wit/command-extended.wit
@@ -0,0 +1,39 @@
+// All of the same imports and exports available in the wasi:cli/command world
+// with addition of HTTP proxy related imports:
+world command-extended {
+  import wasi:clocks/wall-clock
+  import wasi:clocks/monotonic-clock
+  import wasi:clocks/timezone
+  import wasi:filesystem/types
+  import wasi:filesystem/preopens
+  import wasi:sockets/instance-network
+  import wasi:sockets/ip-name-lookup
+  import wasi:sockets/network
+  import wasi:sockets/tcp-create-socket
+  import wasi:sockets/tcp
+  import wasi:sockets/udp-create-socket
+  import wasi:sockets/udp
+  import wasi:random/random
+  import wasi:random/insecure
+  import wasi:random/insecure-seed
+  import wasi:poll/poll
+  import wasi:io/streams
+  import wasi:cli/environment
+  import wasi:cli/exit
+  import wasi:cli/stdin
+  import wasi:cli/stdout
+  import wasi:cli/stderr
+  import wasi:cli/terminal-input
+  import wasi:cli/terminal-output
+  import wasi:cli/terminal-stdin
+  import wasi:cli/terminal-stdout
+  import wasi:cli/terminal-stderr
+
+  export wasi:cli/run
+
+  // We should replace all others with `include self.command`
+  // as soon as the unioning of worlds is available:
+  // https://github.com/WebAssembly/component-model/issues/169
+  import wasi:logging/logging
+  import wasi:http/outgoing-handler
+}

From ceed4ecc32e9038c7d6423bba1e1dce52eb556a0 Mon Sep 17 00:00:00 2001
From: Eduardo Rodrigues <eduardomourar@users.noreply.github.com>
Date: Wed, 16 Aug 2023 03:53:44 +0100
Subject: [PATCH 28/49] fix(wasi-http): sync wit definitions

---
 crates/wasi-http/src/lib.rs                   |  2 +-
 .../{deps/preview => }/command-extended.wit   | 25 ++++----
 .../wit/deps/{preview => cli}/command.wit     | 19 ++++--
 .../{wasi-cli-base => cli}/environment.wit    |  6 +-
 crates/wasi-http/wit/deps/cli/exit.wit        |  4 ++
 crates/wasi-http/wit/deps/cli/run.wit         |  4 ++
 .../wit/deps/{wasi-cli-base => cli}/stdio.wit |  0
 crates/wasi-http/wit/deps/cli/terminal.wit    | 59 +++++++++++++++++++
 crates/wasi-http/wit/deps/http/proxy.wit      | 34 +++++++++++
 crates/wasi-http/wit/deps/http/types.wit      |  2 -
 .../deps/logging/{handler.wit => logging.wit} |  5 +-
 crates/wasi-http/wit/deps/preview/proxy.wit   |  9 ---
 crates/wasi-http/wit/deps/preview/reactor.wit | 24 --------
 .../wasi-http/wit/deps/wasi-cli-base/exit.wit |  4 --
 crates/wasi-http/wit/main.wit                 | 34 ++++++++++-
 crates/wasi-http/wit/test.wit                 | 12 ++--
 16 files changed, 177 insertions(+), 66 deletions(-)
 rename crates/wasi-http/wit/{deps/preview => }/command-extended.wit (62%)
 rename crates/wasi-http/wit/deps/{preview => cli}/command.wit (70%)
 rename crates/wasi-http/wit/deps/{wasi-cli-base => cli}/environment.wit (75%)
 create mode 100644 crates/wasi-http/wit/deps/cli/exit.wit
 create mode 100644 crates/wasi-http/wit/deps/cli/run.wit
 rename crates/wasi-http/wit/deps/{wasi-cli-base => cli}/stdio.wit (100%)
 create mode 100644 crates/wasi-http/wit/deps/cli/terminal.wit
 create mode 100644 crates/wasi-http/wit/deps/http/proxy.wit
 rename crates/wasi-http/wit/deps/logging/{handler.wit => logging.wit} (91%)
 delete mode 100644 crates/wasi-http/wit/deps/preview/proxy.wit
 delete mode 100644 crates/wasi-http/wit/deps/preview/reactor.wit
 delete mode 100644 crates/wasi-http/wit/deps/wasi-cli-base/exit.wit

diff --git a/crates/wasi-http/src/lib.rs b/crates/wasi-http/src/lib.rs
index b95cc5d74213..95983787bd46 100644
--- a/crates/wasi-http/src/lib.rs
+++ b/crates/wasi-http/src/lib.rs
@@ -5,7 +5,7 @@ use core::fmt::Formatter;
 use std::fmt::{self, Display};
 
 wasmtime::component::bindgen!({
-    world: "wasi:preview/proxy",
+    world: "wasi:http/proxy",
     with: {
         "wasi:io/streams": wasmtime_wasi::preview2::bindings::io::streams,
         "wasi:poll/poll": wasmtime_wasi::preview2::bindings::poll::poll,
diff --git a/crates/wasi-http/wit/deps/preview/command-extended.wit b/crates/wasi-http/wit/command-extended.wit
similarity index 62%
rename from crates/wasi-http/wit/deps/preview/command-extended.wit
rename to crates/wasi-http/wit/command-extended.wit
index 8649328712fa..518fabdcac96 100644
--- a/crates/wasi-http/wit/deps/preview/command-extended.wit
+++ b/crates/wasi-http/wit/command-extended.wit
@@ -1,5 +1,5 @@
-package wasi:preview
-
+// All of the same imports and exports available in the wasi:cli/command world
+// with addition of HTTP proxy related imports:
 world command-extended {
   import wasi:clocks/wall-clock
   import wasi:clocks/monotonic-clock
@@ -18,17 +18,22 @@ world command-extended {
   import wasi:random/insecure-seed
   import wasi:poll/poll
   import wasi:io/streams
-  import wasi:cli-base/environment
-  import wasi:cli-base/exit
-  import wasi:cli-base/stdin
-  import wasi:cli-base/stdout
-  import wasi:cli-base/stderr
+  import wasi:cli/environment
+  import wasi:cli/exit
+  import wasi:cli/stdin
+  import wasi:cli/stdout
+  import wasi:cli/stderr
+  import wasi:cli/terminal-input
+  import wasi:cli/terminal-output
+  import wasi:cli/terminal-stdin
+  import wasi:cli/terminal-stdout
+  import wasi:cli/terminal-stderr
+
+  export wasi:cli/run
 
   // We should replace all others with `include self.command`
   // as soon as the unioning of worlds is available:
   // https://github.com/WebAssembly/component-model/issues/169
-  import wasi:logging/handler
+  import wasi:logging/logging
   import wasi:http/outgoing-handler
-
-  export run: func() -> result
 }
diff --git a/crates/wasi-http/wit/deps/preview/command.wit b/crates/wasi-http/wit/deps/cli/command.wit
similarity index 70%
rename from crates/wasi-http/wit/deps/preview/command.wit
rename to crates/wasi-http/wit/deps/cli/command.wit
index dcd06d795753..3cd17bea3f98 100644
--- a/crates/wasi-http/wit/deps/preview/command.wit
+++ b/crates/wasi-http/wit/deps/cli/command.wit
@@ -1,3 +1,5 @@
+package wasi:cli
+
 world command {
   import wasi:clocks/wall-clock
   import wasi:clocks/monotonic-clock
@@ -16,11 +18,16 @@ world command {
   import wasi:random/insecure-seed
   import wasi:poll/poll
   import wasi:io/streams
-  import wasi:cli-base/environment
-  import wasi:cli-base/exit
-  import wasi:cli-base/stdin
-  import wasi:cli-base/stdout
-  import wasi:cli-base/stderr
 
-  export run: func() -> result
+  import environment
+  import exit
+  import stdin
+  import stdout
+  import stderr
+  import terminal-input
+  import terminal-output
+  import terminal-stdin
+  import terminal-stdout
+  import terminal-stderr
+  export run
 }
diff --git a/crates/wasi-http/wit/deps/wasi-cli-base/environment.wit b/crates/wasi-http/wit/deps/cli/environment.wit
similarity index 75%
rename from crates/wasi-http/wit/deps/wasi-cli-base/environment.wit
rename to crates/wasi-http/wit/deps/cli/environment.wit
index 4c97c85d1ab5..36790fe714d2 100644
--- a/crates/wasi-http/wit/deps/wasi-cli-base/environment.wit
+++ b/crates/wasi-http/wit/deps/cli/environment.wit
@@ -1,5 +1,3 @@
-package wasi:cli-base
-
 interface environment {
   /// Get the POSIX-style environment variables.
   ///
@@ -13,4 +11,8 @@ interface environment {
 
   /// Get the POSIX-style arguments to the program.
   get-arguments: func() -> list<string>
+
+  /// Return a path that programs should use as their initial current working
+  /// directory, interpreting `.` as shorthand for this.
+  initial-cwd: func() -> option<string>
 }
diff --git a/crates/wasi-http/wit/deps/cli/exit.wit b/crates/wasi-http/wit/deps/cli/exit.wit
new file mode 100644
index 000000000000..4831d50789af
--- /dev/null
+++ b/crates/wasi-http/wit/deps/cli/exit.wit
@@ -0,0 +1,4 @@
+interface exit {
+  /// Exit the current instance and any linked instances.
+  exit: func(status: result)
+}
diff --git a/crates/wasi-http/wit/deps/cli/run.wit b/crates/wasi-http/wit/deps/cli/run.wit
new file mode 100644
index 000000000000..45a1ca533f0e
--- /dev/null
+++ b/crates/wasi-http/wit/deps/cli/run.wit
@@ -0,0 +1,4 @@
+interface run {
+  /// Run the program.
+  run: func() -> result
+}
diff --git a/crates/wasi-http/wit/deps/wasi-cli-base/stdio.wit b/crates/wasi-http/wit/deps/cli/stdio.wit
similarity index 100%
rename from crates/wasi-http/wit/deps/wasi-cli-base/stdio.wit
rename to crates/wasi-http/wit/deps/cli/stdio.wit
diff --git a/crates/wasi-http/wit/deps/cli/terminal.wit b/crates/wasi-http/wit/deps/cli/terminal.wit
new file mode 100644
index 000000000000..f32e74437484
--- /dev/null
+++ b/crates/wasi-http/wit/deps/cli/terminal.wit
@@ -0,0 +1,59 @@
+interface terminal-input {
+    /// The input side of a terminal.
+    ///
+    /// This [represents a resource](https://github.com/WebAssembly/WASI/blob/main/docs/WitInWasi.md#Resources).
+    type terminal-input = u32
+
+    // In the future, this may include functions for disabling echoing,
+    // disabling input buffering so that keyboard events are sent through
+    // immediately, querying supported features, and so on.
+
+    /// Dispose of the specified terminal-input after which it may no longer
+    /// be used.
+    drop-terminal-input: func(this: terminal-input)
+}
+
+interface terminal-output {
+    /// The output side of a terminal.
+    ///
+    /// This [represents a resource](https://github.com/WebAssembly/WASI/blob/main/docs/WitInWasi.md#Resources).
+    type terminal-output = u32
+
+    // In the future, this may include functions for querying the terminal
+    // size, being notified of terminal size changes, querying supported
+    // features, and so on.
+
+    /// Dispose of the specified terminal-output, after which it may no longer
+    /// be used.
+    drop-terminal-output: func(this: terminal-output)
+}
+
+/// An interface providing an optional `terminal-input` for stdin as a
+/// link-time authority.
+interface terminal-stdin {
+    use terminal-input.{terminal-input}
+
+    /// If stdin is connected to a terminal, return a `terminal-input` handle
+    /// allowing further interaction with it.
+    get-terminal-stdin: func() -> option<terminal-input>
+}
+
+/// An interface providing an optional `terminal-output` for stdout as a
+/// link-time authority.
+interface terminal-stdout {
+    use terminal-output.{terminal-output}
+
+    /// If stdout is connected to a terminal, return a `terminal-output` handle
+    /// allowing further interaction with it.
+    get-terminal-stdout: func() -> option<terminal-output>
+}
+
+/// An interface providing an optional `terminal-output` for stderr as a
+/// link-time authority.
+interface terminal-stderr {
+    use terminal-output.{terminal-output}
+
+    /// If stderr is connected to a terminal, return a `terminal-output` handle
+    /// allowing further interaction with it.
+    get-terminal-stderr: func() -> option<terminal-output>
+}
diff --git a/crates/wasi-http/wit/deps/http/proxy.wit b/crates/wasi-http/wit/deps/http/proxy.wit
new file mode 100644
index 000000000000..162ab32b2348
--- /dev/null
+++ b/crates/wasi-http/wit/deps/http/proxy.wit
@@ -0,0 +1,34 @@
+package wasi:http
+
+// The `wasi:http/proxy` world captures a widely-implementable intersection of
+// hosts that includes HTTP forward and reverse proxies. Components targeting
+// this world may concurrently stream in and out any number of incoming and
+// outgoing HTTP requests.
+world proxy {
+  // HTTP proxies have access to time and randomness.
+  import wasi:clocks/wall-clock
+  import wasi:clocks/monotonic-clock
+  import wasi:clocks/timezone
+  import wasi:random/random
+
+  // Proxies have standard output and error streams which are expected to
+  // terminate in a developer-facing console provided by the host.
+  import wasi:cli/stdout
+  import wasi:cli/stderr
+
+  // TODO: this is a temporary workaround until component tooling is able to
+  // gracefully handle the absence of stdin. Hosts must return an eof stream
+  // for this import, which is what wasi-libc + tooling will do automatically
+  // when this import is properly removed.
+  import wasi:cli/stdin
+
+  // This is the default handler to use when user code simply wants to make an
+  // HTTP request (e.g., via `fetch()`).
+  import outgoing-handler
+
+  // The host delivers incoming HTTP requests to a component by calling the
+  // `handle` function of this exported interface. A host may arbitrarily reuse
+  // or not reuse component instance when delivering incoming HTTP requests and
+  // thus a component must be able to handle 0..N calls to `handle`.
+  export incoming-handler
+}
diff --git a/crates/wasi-http/wit/deps/http/types.wit b/crates/wasi-http/wit/deps/http/types.wit
index 6ac2caf0bfd8..7b7b015529c0 100644
--- a/crates/wasi-http/wit/deps/http/types.wit
+++ b/crates/wasi-http/wit/deps/http/types.wit
@@ -1,5 +1,3 @@
-package wasi:http
-
 // The `wasi:http/types` interface is meant to be imported by components to
 // define the HTTP resource types and operations used by the component's
 // imported and exported interfaces.
diff --git a/crates/wasi-http/wit/deps/logging/handler.wit b/crates/wasi-http/wit/deps/logging/logging.wit
similarity index 91%
rename from crates/wasi-http/wit/deps/logging/handler.wit
rename to crates/wasi-http/wit/deps/logging/logging.wit
index e6b077be8a60..b0cc4514dc8f 100644
--- a/crates/wasi-http/wit/deps/logging/handler.wit
+++ b/crates/wasi-http/wit/deps/logging/logging.wit
@@ -2,7 +2,7 @@ package wasi:logging
 
 /// WASI Logging is a logging API intended to let users emit log messages with
 /// simple priority levels and context values.
-interface handler {
+interface logging {
     /// A log level, describing a kind of message.
     enum level {
        /// Describes messages about the values of variables and the flow of
@@ -22,6 +22,9 @@ interface handler {
 
        /// Describes messages indicating serious errors.
        error,
+
+       /// Describes messages indicating fatal errors.
+       critical,
     }
 
     /// Emit a log message.
diff --git a/crates/wasi-http/wit/deps/preview/proxy.wit b/crates/wasi-http/wit/deps/preview/proxy.wit
deleted file mode 100644
index a616daa1c243..000000000000
--- a/crates/wasi-http/wit/deps/preview/proxy.wit
+++ /dev/null
@@ -1,9 +0,0 @@
-world proxy {
-  import wasi:random/random
-  import wasi:random/insecure
-  import wasi:random/insecure-seed
-  import wasi:logging/handler
-  import wasi:http/outgoing-handler
-
-  export wasi:http/incoming-handler
-}
diff --git a/crates/wasi-http/wit/deps/preview/reactor.wit b/crates/wasi-http/wit/deps/preview/reactor.wit
deleted file mode 100644
index aff49ea4d186..000000000000
--- a/crates/wasi-http/wit/deps/preview/reactor.wit
+++ /dev/null
@@ -1,24 +0,0 @@
-world reactor {
-  import wasi:clocks/wall-clock
-  import wasi:clocks/monotonic-clock
-  import wasi:clocks/timezone
-  import wasi:filesystem/types
-  import wasi:filesystem/preopens
-  import wasi:sockets/instance-network
-  import wasi:sockets/ip-name-lookup
-  import wasi:sockets/network
-  import wasi:sockets/tcp-create-socket
-  import wasi:sockets/tcp
-  import wasi:sockets/udp-create-socket
-  import wasi:sockets/udp
-  import wasi:random/random
-  import wasi:poll/poll
-  import wasi:io/streams
-  import wasi:logging/handler
-  import wasi:http/outgoing-handler
-  import wasi:cli-base/environment
-  import wasi:cli-base/exit
-  import wasi:cli-base/stdin
-  import wasi:cli-base/stdout
-  import wasi:cli-base/stderr
-}
diff --git a/crates/wasi-http/wit/deps/wasi-cli-base/exit.wit b/crates/wasi-http/wit/deps/wasi-cli-base/exit.wit
deleted file mode 100644
index 66835aa7022d..000000000000
--- a/crates/wasi-http/wit/deps/wasi-cli-base/exit.wit
+++ /dev/null
@@ -1,4 +0,0 @@
-interface exit {
-  /// Exit the curerent instance and any linked instances.
-  exit: func(status: result)
-}
diff --git a/crates/wasi-http/wit/main.wit b/crates/wasi-http/wit/main.wit
index 264dfee8264d..753770ad22ab 100644
--- a/crates/wasi-http/wit/main.wit
+++ b/crates/wasi-http/wit/main.wit
@@ -1 +1,33 @@
-package unused:main
+package wasmtime:wasi
+
+// All of the same imports available in the wasi:cli/command world, but no
+// export required:
+world preview1-adapter-reactor {
+  import wasi:clocks/wall-clock
+  import wasi:clocks/monotonic-clock
+  import wasi:clocks/timezone
+  import wasi:filesystem/types
+  import wasi:filesystem/preopens
+  import wasi:sockets/instance-network
+  import wasi:sockets/ip-name-lookup
+  import wasi:sockets/network
+  import wasi:sockets/tcp-create-socket
+  import wasi:sockets/tcp
+  import wasi:sockets/udp-create-socket
+  import wasi:sockets/udp
+  import wasi:random/random
+  import wasi:random/insecure
+  import wasi:random/insecure-seed
+  import wasi:poll/poll
+  import wasi:io/streams
+  import wasi:cli/environment
+  import wasi:cli/exit
+  import wasi:cli/stdin
+  import wasi:cli/stdout
+  import wasi:cli/stderr
+  import wasi:cli/terminal-input
+  import wasi:cli/terminal-output
+  import wasi:cli/terminal-stdin
+  import wasi:cli/terminal-stdout
+  import wasi:cli/terminal-stderr
+}
diff --git a/crates/wasi-http/wit/test.wit b/crates/wasi-http/wit/test.wit
index 09498f62cf8f..447304cba3d8 100644
--- a/crates/wasi-http/wit/test.wit
+++ b/crates/wasi-http/wit/test.wit
@@ -1,11 +1,11 @@
 // only used as part of `test-programs`
 world test-reactor {
 
-  import wasi:cli-base/environment
+  import wasi:cli/environment
   import wasi:io/streams
   import wasi:filesystem/types
   import wasi:filesystem/preopens
-  import wasi:cli-base/exit
+  import wasi:cli/exit
 
   export add-strings: func(s: list<string>) -> u32
   export get-strings: func() -> list<string>
@@ -21,8 +21,8 @@ world test-reactor {
 world test-command {
   import wasi:poll/poll
   import wasi:io/streams
-  import wasi:cli-base/environment
-  import wasi:cli-base/stdin
-  import wasi:cli-base/stdout
-  import wasi:cli-base/stderr
+  import wasi:cli/environment
+  import wasi:cli/stdin
+  import wasi:cli/stdout
+  import wasi:cli/stderr
 }

From 20646727d0f8c08b70eae66ab34bbf454603b1af Mon Sep 17 00:00:00 2001
From: Eduardo Rodrigues <eduardomourar@users.noreply.github.com>
Date: Wed, 16 Aug 2023 03:54:34 +0100
Subject: [PATCH 29/49] chore: update tests with latest wit definitions

---
 crates/test-programs/tests/wasi-http-components.rs              | 1 +
 crates/test-programs/tests/wasi-http-modules.rs                 | 2 +-
 .../wasi-http-tests/src/bin/outbound_request_get.rs             | 2 +-
 .../wasi-http-tests/src/bin/outbound_request_invalid_dnsname.rs | 2 +-
 .../wasi-http-tests/src/bin/outbound_request_invalid_port.rs    | 2 +-
 .../wasi-http-tests/src/bin/outbound_request_invalid_version.rs | 2 +-
 .../wasi-http-tests/src/bin/outbound_request_post.rs            | 2 +-
 .../wasi-http-tests/src/bin/outbound_request_put.rs             | 2 +-
 .../wasi-http-tests/src/bin/outbound_request_unknown_method.rs  | 2 +-
 .../src/bin/outbound_request_unsupported_scheme.rs              | 2 +-
 crates/test-programs/wasi-http-tests/src/lib.rs                 | 2 +-
 11 files changed, 11 insertions(+), 10 deletions(-)

diff --git a/crates/test-programs/tests/wasi-http-components.rs b/crates/test-programs/tests/wasi-http-components.rs
index 0349ccfe9521..49ffc72f8fea 100644
--- a/crates/test-programs/tests/wasi-http-components.rs
+++ b/crates/test-programs/tests/wasi-http-components.rs
@@ -81,6 +81,7 @@ async fn run(name: &str) -> anyhow::Result<()> {
 
     let (mut store, command) = instantiate_component(component, Ctx { table, wasi, http }).await?;
     command
+        .wasi_cli_run()
         .call_run(&mut store)
         .await
         .map_err(|e| anyhow::anyhow!("wasm failed with {e:?}"))?
diff --git a/crates/test-programs/tests/wasi-http-modules.rs b/crates/test-programs/tests/wasi-http-modules.rs
index a4a3565c1e07..6643665a5c06 100644
--- a/crates/test-programs/tests/wasi-http-modules.rs
+++ b/crates/test-programs/tests/wasi-http-modules.rs
@@ -68,7 +68,7 @@ async fn instantiate_module(module: Module, ctx: Ctx) -> Result<(Store<Ctx>, Fun
     let mut store = Store::new(&ENGINE, ctx);
 
     let instance = linker.instantiate_async(&mut store, &module).await?;
-    let command = instance.get_func(&mut store, "run").unwrap();
+    let command = instance.get_func(&mut store, "wasi:cli/run#run").unwrap();
     Ok((store, command))
 }
 
diff --git a/crates/test-programs/wasi-http-tests/src/bin/outbound_request_get.rs b/crates/test-programs/wasi-http-tests/src/bin/outbound_request_get.rs
index 600de5033ec6..617d3db5a4cb 100644
--- a/crates/test-programs/wasi-http-tests/src/bin/outbound_request_get.rs
+++ b/crates/test-programs/wasi-http-tests/src/bin/outbound_request_get.rs
@@ -32,7 +32,7 @@ async fn run() -> Result<(), ()> {
     Ok(())
 }
 
-impl wasi_http_tests::bindings::CommandExtended for Component {
+impl wasi_http_tests::bindings::exports::wasi::cli::run::Run for Component {
     fn run() -> Result<(), ()> {
         wasi_http_tests::in_tokio(async { run().await })
     }
diff --git a/crates/test-programs/wasi-http-tests/src/bin/outbound_request_invalid_dnsname.rs b/crates/test-programs/wasi-http-tests/src/bin/outbound_request_invalid_dnsname.rs
index c1d167a6c31b..1565defe8a88 100644
--- a/crates/test-programs/wasi-http-tests/src/bin/outbound_request_invalid_dnsname.rs
+++ b/crates/test-programs/wasi-http-tests/src/bin/outbound_request_invalid_dnsname.rs
@@ -22,7 +22,7 @@ async fn run() -> Result<(), ()> {
     Ok(())
 }
 
-impl wasi_http_tests::bindings::CommandExtended for Component {
+impl wasi_http_tests::bindings::exports::wasi::cli::run::Run for Component {
     fn run() -> Result<(), ()> {
         wasi_http_tests::in_tokio(async { run().await })
     }
diff --git a/crates/test-programs/wasi-http-tests/src/bin/outbound_request_invalid_port.rs b/crates/test-programs/wasi-http-tests/src/bin/outbound_request_invalid_port.rs
index 03ca85fedb6a..87132b93e086 100644
--- a/crates/test-programs/wasi-http-tests/src/bin/outbound_request_invalid_port.rs
+++ b/crates/test-programs/wasi-http-tests/src/bin/outbound_request_invalid_port.rs
@@ -25,7 +25,7 @@ async fn run() -> Result<(), ()> {
     Ok(())
 }
 
-impl wasi_http_tests::bindings::CommandExtended for Component {
+impl wasi_http_tests::bindings::exports::wasi::cli::run::Run for Component {
     fn run() -> Result<(), ()> {
         wasi_http_tests::in_tokio(async { run().await })
     }
diff --git a/crates/test-programs/wasi-http-tests/src/bin/outbound_request_invalid_version.rs b/crates/test-programs/wasi-http-tests/src/bin/outbound_request_invalid_version.rs
index b5a5f840165c..2b75a5f0b779 100644
--- a/crates/test-programs/wasi-http-tests/src/bin/outbound_request_invalid_version.rs
+++ b/crates/test-programs/wasi-http-tests/src/bin/outbound_request_invalid_version.rs
@@ -31,7 +31,7 @@ async fn run() -> Result<(), ()> {
     Ok(())
 }
 
-impl wasi_http_tests::bindings::CommandExtended for Component {
+impl wasi_http_tests::bindings::exports::wasi::cli::run::Run for Component {
     fn run() -> Result<(), ()> {
         wasi_http_tests::in_tokio(async { run().await })
     }
diff --git a/crates/test-programs/wasi-http-tests/src/bin/outbound_request_post.rs b/crates/test-programs/wasi-http-tests/src/bin/outbound_request_post.rs
index 00c6b019dcb2..25b67207aac4 100644
--- a/crates/test-programs/wasi-http-tests/src/bin/outbound_request_post.rs
+++ b/crates/test-programs/wasi-http-tests/src/bin/outbound_request_post.rs
@@ -27,7 +27,7 @@ async fn run() -> Result<(), ()> {
     Ok(())
 }
 
-impl wasi_http_tests::bindings::CommandExtended for Component {
+impl wasi_http_tests::bindings::exports::wasi::cli::run::Run for Component {
     fn run() -> Result<(), ()> {
         wasi_http_tests::in_tokio(async { run().await })
     }
diff --git a/crates/test-programs/wasi-http-tests/src/bin/outbound_request_put.rs b/crates/test-programs/wasi-http-tests/src/bin/outbound_request_put.rs
index 9409411b0a86..6a3446e78797 100644
--- a/crates/test-programs/wasi-http-tests/src/bin/outbound_request_put.rs
+++ b/crates/test-programs/wasi-http-tests/src/bin/outbound_request_put.rs
@@ -27,7 +27,7 @@ async fn run() -> Result<(), ()> {
     Ok(())
 }
 
-impl wasi_http_tests::bindings::CommandExtended for Component {
+impl wasi_http_tests::bindings::exports::wasi::cli::run::Run for Component {
     fn run() -> Result<(), ()> {
         wasi_http_tests::in_tokio(async { run().await })
     }
diff --git a/crates/test-programs/wasi-http-tests/src/bin/outbound_request_unknown_method.rs b/crates/test-programs/wasi-http-tests/src/bin/outbound_request_unknown_method.rs
index e76da3c2e839..7971b8814d4d 100644
--- a/crates/test-programs/wasi-http-tests/src/bin/outbound_request_unknown_method.rs
+++ b/crates/test-programs/wasi-http-tests/src/bin/outbound_request_unknown_method.rs
@@ -25,7 +25,7 @@ async fn run() -> Result<(), ()> {
     Ok(())
 }
 
-impl wasi_http_tests::bindings::CommandExtended for Component {
+impl wasi_http_tests::bindings::exports::wasi::cli::run::Run for Component {
     fn run() -> Result<(), ()> {
         wasi_http_tests::in_tokio(async { run().await })
     }
diff --git a/crates/test-programs/wasi-http-tests/src/bin/outbound_request_unsupported_scheme.rs b/crates/test-programs/wasi-http-tests/src/bin/outbound_request_unsupported_scheme.rs
index 7cc6dc39a34d..5a7b4faa27a9 100644
--- a/crates/test-programs/wasi-http-tests/src/bin/outbound_request_unsupported_scheme.rs
+++ b/crates/test-programs/wasi-http-tests/src/bin/outbound_request_unsupported_scheme.rs
@@ -25,7 +25,7 @@ async fn run() -> Result<(), ()> {
     Ok(())
 }
 
-impl wasi_http_tests::bindings::CommandExtended for Component {
+impl wasi_http_tests::bindings::exports::wasi::cli::run::Run for Component {
     fn run() -> Result<(), ()> {
         wasi_http_tests::in_tokio(async { run().await })
     }
diff --git a/crates/test-programs/wasi-http-tests/src/lib.rs b/crates/test-programs/wasi-http-tests/src/lib.rs
index 0fbf3778305d..783670c9ded1 100644
--- a/crates/test-programs/wasi-http-tests/src/lib.rs
+++ b/crates/test-programs/wasi-http-tests/src/lib.rs
@@ -1,7 +1,7 @@
 pub mod bindings {
     wit_bindgen::generate!({
         path: "../../wasi-http/wit",
-        world: "wasi:preview/command-extended",
+        world: "wasmtime:wasi/command-extended",
         macro_call_prefix: "::wasi_http_tests::bindings::",
         macro_export,
     });

From 7c9602cec3f925edf2d41bb0ee59e485a5d5220c Mon Sep 17 00:00:00 2001
From: Pat Hickey <pat@moreproductive.org>
Date: Wed, 16 Aug 2023 18:20:47 -0700
Subject: [PATCH 30/49] Update src/commands/run.rs

---
 src/commands/run.rs | 1 -
 1 file changed, 1 deletion(-)

diff --git a/src/commands/run.rs b/src/commands/run.rs
index b738df3ce0b2..fec08e67026c 100644
--- a/src/commands/run.rs
+++ b/src/commands/run.rs
@@ -759,7 +759,6 @@ fn populate_with_wasi(
     }
 
     if wasi_modules.wasi_http {
-        // TODO: this should be re-enabled before merging
         // #[cfg(not(feature = "wasi-http"))]
         // {
         bail!("Cannot enable wasi-http when the binary is not compiled with this feature.");

From 6855f9a9dad6786ecf8454037c51e6fbf345179e Mon Sep 17 00:00:00 2001
From: Pat Hickey <pat@moreproductive.org>
Date: Wed, 16 Aug 2023 18:20:59 -0700
Subject: [PATCH 31/49] Update src/commands/run.rs

---
 src/commands/run.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/commands/run.rs b/src/commands/run.rs
index fec08e67026c..0d3e9b37169c 100644
--- a/src/commands/run.rs
+++ b/src/commands/run.rs
@@ -759,7 +759,7 @@ fn populate_with_wasi(
     }
 
     if wasi_modules.wasi_http {
-        // #[cfg(not(feature = "wasi-http"))]
+        #[cfg(not(feature = "wasi-http"))]
         // {
         bail!("Cannot enable wasi-http when the binary is not compiled with this feature.");
         // }

From 31e83997a3a6686fe6ca095b4594e32965128531 Mon Sep 17 00:00:00 2001
From: Pat Hickey <pat@moreproductive.org>
Date: Wed, 16 Aug 2023 18:21:06 -0700
Subject: [PATCH 32/49] Update src/commands/run.rs

---
 src/commands/run.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/commands/run.rs b/src/commands/run.rs
index 0d3e9b37169c..68b80a80d4d0 100644
--- a/src/commands/run.rs
+++ b/src/commands/run.rs
@@ -760,7 +760,7 @@ fn populate_with_wasi(
 
     if wasi_modules.wasi_http {
         #[cfg(not(feature = "wasi-http"))]
-        // {
+        {
         bail!("Cannot enable wasi-http when the binary is not compiled with this feature.");
         // }
         // #[cfg(feature = "wasi-http")]

From 2e00f8a6eb3b8694bab8b6a95186ecfc3b56b257 Mon Sep 17 00:00:00 2001
From: Pat Hickey <pat@moreproductive.org>
Date: Wed, 16 Aug 2023 18:21:20 -0700
Subject: [PATCH 33/49] Update src/commands/run.rs

---
 src/commands/run.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/commands/run.rs b/src/commands/run.rs
index 68b80a80d4d0..2656226a4190 100644
--- a/src/commands/run.rs
+++ b/src/commands/run.rs
@@ -762,7 +762,7 @@ fn populate_with_wasi(
         #[cfg(not(feature = "wasi-http"))]
         {
         bail!("Cannot enable wasi-http when the binary is not compiled with this feature.");
-        // }
+        }
         // #[cfg(feature = "wasi-http")]
         // {
         //     wasmtime_wasi_http::add_to_linker(linker)?;

From 62b83f96a19a8360dc357091bdaf27691f0c7d1b Mon Sep 17 00:00:00 2001
From: Pat Hickey <pat@moreproductive.org>
Date: Wed, 16 Aug 2023 18:21:30 -0700
Subject: [PATCH 34/49] Update src/commands/run.rs

---
 src/commands/run.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/commands/run.rs b/src/commands/run.rs
index 2656226a4190..8efc02ab9e7f 100644
--- a/src/commands/run.rs
+++ b/src/commands/run.rs
@@ -763,7 +763,7 @@ fn populate_with_wasi(
         {
         bail!("Cannot enable wasi-http when the binary is not compiled with this feature.");
         }
-        // #[cfg(feature = "wasi-http")]
+        #[cfg(feature = "wasi-http")]
         // {
         //     wasmtime_wasi_http::add_to_linker(linker)?;
         //     store.data_mut().wasi_http = Some(Arc::new(WasiHttpCtx::new()));

From ad6462a09ec6db35eb821c5078c8b7d11f65692b Mon Sep 17 00:00:00 2001
From: Pat Hickey <pat@moreproductive.org>
Date: Wed, 16 Aug 2023 18:21:39 -0700
Subject: [PATCH 35/49] Update src/commands/run.rs

---
 src/commands/run.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/commands/run.rs b/src/commands/run.rs
index 8efc02ab9e7f..0166f53da2c3 100644
--- a/src/commands/run.rs
+++ b/src/commands/run.rs
@@ -764,7 +764,7 @@ fn populate_with_wasi(
         bail!("Cannot enable wasi-http when the binary is not compiled with this feature.");
         }
         #[cfg(feature = "wasi-http")]
-        // {
+        {
         //     wasmtime_wasi_http::add_to_linker(linker)?;
         //     store.data_mut().wasi_http = Some(Arc::new(WasiHttpCtx::new()));
         // }

From 9f68bc3baddb05adf5d1836c5de068ce5a3a33af Mon Sep 17 00:00:00 2001
From: Pat Hickey <pat@moreproductive.org>
Date: Wed, 16 Aug 2023 18:21:48 -0700
Subject: [PATCH 36/49] Update src/commands/run.rs

---
 src/commands/run.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/commands/run.rs b/src/commands/run.rs
index 0166f53da2c3..25ff25472fa0 100644
--- a/src/commands/run.rs
+++ b/src/commands/run.rs
@@ -765,7 +765,7 @@ fn populate_with_wasi(
         }
         #[cfg(feature = "wasi-http")]
         {
-        //     wasmtime_wasi_http::add_to_linker(linker)?;
+        bail!("wasi-http support will be swapped over to component CLI support soon");
         //     store.data_mut().wasi_http = Some(Arc::new(WasiHttpCtx::new()));
         // }
     }

From fde1568de65d49b69f2da7a5184fc88111e848e4 Mon Sep 17 00:00:00 2001
From: Pat Hickey <pat@moreproductive.org>
Date: Wed, 16 Aug 2023 18:21:59 -0700
Subject: [PATCH 37/49] Update src/commands/run.rs

---
 src/commands/run.rs | 1 -
 1 file changed, 1 deletion(-)

diff --git a/src/commands/run.rs b/src/commands/run.rs
index 25ff25472fa0..5f25089c2aeb 100644
--- a/src/commands/run.rs
+++ b/src/commands/run.rs
@@ -766,7 +766,6 @@ fn populate_with_wasi(
         #[cfg(feature = "wasi-http")]
         {
         bail!("wasi-http support will be swapped over to component CLI support soon");
-        //     store.data_mut().wasi_http = Some(Arc::new(WasiHttpCtx::new()));
         // }
     }
 

From dd9a0dec428dfc216fba2b0259fc52a234e422ce Mon Sep 17 00:00:00 2001
From: Pat Hickey <pat@moreproductive.org>
Date: Wed, 16 Aug 2023 18:22:08 -0700
Subject: [PATCH 38/49] Update src/commands/run.rs

---
 src/commands/run.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/commands/run.rs b/src/commands/run.rs
index 5f25089c2aeb..1025494b7c0b 100644
--- a/src/commands/run.rs
+++ b/src/commands/run.rs
@@ -766,7 +766,7 @@ fn populate_with_wasi(
         #[cfg(feature = "wasi-http")]
         {
         bail!("wasi-http support will be swapped over to component CLI support soon");
-        // }
+        }
     }
 
     Ok(())

From 4e9120c54228c4c37a9af003abbda8c5596cfc23 Mon Sep 17 00:00:00 2001
From: Eduardo Rodrigues <eduardomourar@users.noreply.github.com>
Date: Thu, 17 Aug 2023 12:18:04 +0200
Subject: [PATCH 39/49] chore: fix formatting

---
 src/commands/run.rs | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/commands/run.rs b/src/commands/run.rs
index 1025494b7c0b..b767f475a8d0 100644
--- a/src/commands/run.rs
+++ b/src/commands/run.rs
@@ -761,11 +761,11 @@ fn populate_with_wasi(
     if wasi_modules.wasi_http {
         #[cfg(not(feature = "wasi-http"))]
         {
-        bail!("Cannot enable wasi-http when the binary is not compiled with this feature.");
+            bail!("Cannot enable wasi-http when the binary is not compiled with this feature.");
         }
         #[cfg(feature = "wasi-http")]
         {
-        bail!("wasi-http support will be swapped over to component CLI support soon");
+            bail!("wasi-http support will be swapped over to component CLI support soon");
         }
     }
 

From e715bdbcb9c62af873ff4b50c9fa66cf7da95809 Mon Sep 17 00:00:00 2001
From: Trevor Elliott <telliott@fastly.com>
Date: Thu, 17 Aug 2023 09:49:57 -0700
Subject: [PATCH 40/49] Ignore flaky test

---
 crates/test-programs/tests/wasi-http-modules.rs | 1 +
 1 file changed, 1 insertion(+)

diff --git a/crates/test-programs/tests/wasi-http-modules.rs b/crates/test-programs/tests/wasi-http-modules.rs
index 6643665a5c06..fe6bf971b03c 100644
--- a/crates/test-programs/tests/wasi-http-modules.rs
+++ b/crates/test-programs/tests/wasi-http-modules.rs
@@ -107,6 +107,7 @@ async fn outbound_request_get() {
 }
 
 #[test_log::test(tokio::test(flavor = "multi_thread"))]
+#[ignore = "test is currently flaky in ci and needs to be debugged"]
 async fn outbound_request_post() {
     setup_http1(run("outbound_request_post")).await.unwrap();
 }

From ca265efb874bd4dc49b9034d840e5013c34fd722 Mon Sep 17 00:00:00 2001
From: Eduardo Rodrigues <eduardomourar@users.noreply.github.com>
Date: Thu, 17 Aug 2023 20:51:11 +0200
Subject: [PATCH 41/49] chore: fix compilation error for riscv64 arch

---
 crates/wasi-http/src/http_impl.rs | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/crates/wasi-http/src/http_impl.rs b/crates/wasi-http/src/http_impl.rs
index d16370af9e19..c0f2b7af4479 100644
--- a/crates/wasi-http/src/http_impl.rs
+++ b/crates/wasi-http/src/http_impl.rs
@@ -1,7 +1,6 @@
 use crate::r#struct::{ActiveFields, ActiveFuture, ActiveResponse, HttpResponse, TableHttpExt};
 use crate::wasi::http::types::{FutureIncomingResponse, OutgoingRequest, RequestOptions, Scheme};
 pub use crate::{WasiHttpCtx, WasiHttpView};
-#[cfg(not(any(target_arch = "riscv64", target_arch = "s390x")))]
 use anyhow::Context;
 use bytes::{Bytes, BytesMut};
 use http_body_util::{BodyExt, Empty, Full};
@@ -165,7 +164,7 @@ impl<T: WasiHttpView> WasiHttpViewExt for T {
             }
             #[cfg(any(target_arch = "riscv64", target_arch = "s390x"))]
             return Err(crate::wasi::http::types::Error::UnexpectedError(
-                "unsupported architecture for SSL",
+                "unsupported architecture for SSL".to_string(),
             ));
         } else {
             let t = timeout(

From b8712190fbc930cb7189c27a87186898a7780efa Mon Sep 17 00:00:00 2001
From: Trevor Elliott <telliott@fastly.com>
Date: Thu, 17 Aug 2023 13:50:57 -0700
Subject: [PATCH 42/49] Avoid `cp -T` on macos

Adding prtest:full to ensure that we've seen a successful build before
queuing.
---
 .github/workflows/main.yml | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/.github/workflows/main.yml b/.github/workflows/main.yml
index ea66483c86a3..7e6b793ea779 100644
--- a/.github/workflows/main.yml
+++ b/.github/workflows/main.yml
@@ -457,7 +457,8 @@ jobs:
     # Ensure wit definitions are in sync: both wasmtime-wasi and wasmtime-wasi-http need their own
     # copy of the wit definitions so publishing works, but we need to ensure they are identical copies.
     - run: |
-        cp -TRv 'crates/wasi/wit/' 'crates/wasi-http/wit/'
+        rm -rf 'crates/wasi-http/wit'
+        cp -rv 'crates/wasi/wit/' 'crates/wasi-http/wit/'
         git diff --exit-code --diff-filter=AM $GITHUB_SHA -- 'crates/wasi-http/wit/'
 
     # Build and test all features

From fe29de46dd908a435e5f90249d8d0b93fe48b91d Mon Sep 17 00:00:00 2001
From: Trevor Elliott <telliott@fastly.com>
Date: Thu, 17 Aug 2023 14:42:21 -0700
Subject: [PATCH 43/49] Don't build the wasi-http test programs for the native
 target

---
 ci/run-tests.sh | 1 +
 1 file changed, 1 insertion(+)

diff --git a/ci/run-tests.sh b/ci/run-tests.sh
index 4fac7b1cfb09..f8c52d241d2e 100755
--- a/ci/run-tests.sh
+++ b/ci/run-tests.sh
@@ -7,6 +7,7 @@ cargo test \
     --workspace \
     --exclude 'wasmtime-wasi-*' \
     --exclude wasi-tests \
+    --exclude wasi-http-tests \
     --exclude command-tests \
     --exclude reactor-tests \
     $@

From 1b6ea8f6d937173e5e286b796e210323c6a736e1 Mon Sep 17 00:00:00 2001
From: Trevor Elliott <telliott@fastly.com>
Date: Thu, 17 Aug 2023 15:21:18 -0700
Subject: [PATCH 44/49] Debug the wit consistency check

---
 .github/workflows/main.yml | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/.github/workflows/main.yml b/.github/workflows/main.yml
index 7e6b793ea779..ec018e6d90f0 100644
--- a/.github/workflows/main.yml
+++ b/.github/workflows/main.yml
@@ -456,10 +456,11 @@ jobs:
 
     # Ensure wit definitions are in sync: both wasmtime-wasi and wasmtime-wasi-http need their own
     # copy of the wit definitions so publishing works, but we need to ensure they are identical copies.
-    - run: |
+    - name: Check wasi and wasi-http wit directories
+      run: |
         rm -rf 'crates/wasi-http/wit'
         cp -rv 'crates/wasi/wit/' 'crates/wasi-http/wit/'
-        git diff --exit-code --diff-filter=AM $GITHUB_SHA -- 'crates/wasi-http/wit/'
+        git diff --exit-code --diff-filter=ADM -- 'crates/wasi-http/wit/'
 
     # Build and test all features
     - run: ./ci/run-tests.sh --locked

From 33400f693348d1683d0c7644de369256f7a3ddcc Mon Sep 17 00:00:00 2001
From: Trevor Elliott <telliott@fastly.com>
Date: Thu, 17 Aug 2023 15:45:45 -0700
Subject: [PATCH 45/49] Update streams.wit in wasi-http

---
 .../test-programs/wasi-http-tests/src/lib.rs  |   9 +-
 crates/wasi-http/src/component_impl.rs        |   9 +-
 crates/wasi-http/wit/deps/io/streams.wit      | 127 +++++++++---------
 3 files changed, 76 insertions(+), 69 deletions(-)

diff --git a/crates/test-programs/wasi-http-tests/src/lib.rs b/crates/test-programs/wasi-http-tests/src/lib.rs
index 783670c9ded1..6de349b42dc1 100644
--- a/crates/test-programs/wasi-http-tests/src/lib.rs
+++ b/crates/test-programs/wasi-http-tests/src/lib.rs
@@ -76,12 +76,14 @@ pub async fn request(
         let output_stream_pollable = streams::subscribe_to_output_stream(request_body);
         let len = body.len();
         if len == 0 {
-            let (_written, _status) =
-                streams::write(request_body, &[]).context("writing empty request body")?;
+            let (_written, _status) = streams::write(request_body, &[])
+                .map_err(|_| anyhow!("request_body stream write failed"))
+                .context("writing empty request body")?;
         } else {
             let mut body_cursor = 0;
             while body_cursor < body.len() {
                 let (written, _status) = streams::write(request_body, &body[body_cursor..])
+                    .map_err(|_| anyhow!("request_body stream write failed"))
                     .context("writing request body")?;
                 body_cursor += written as usize;
             }
@@ -130,7 +132,8 @@ pub async fn request(
     let mut body = Vec::new();
     let mut eof = streams::StreamStatus::Open;
     while eof != streams::StreamStatus::Ended {
-        let (mut body_chunk, stream_status) = streams::read(body_stream, u64::MAX)?;
+        let (mut body_chunk, stream_status) =
+            streams::read(body_stream, u64::MAX).map_err(|_| anyhow!("body_stream read failed"))?;
         eof = if body_chunk.is_empty() {
             streams::StreamStatus::Ended
         } else {
diff --git a/crates/wasi-http/src/component_impl.rs b/crates/wasi-http/src/component_impl.rs
index b7ba4fca7328..b660d1f2a301 100644
--- a/crates/wasi-http/src/component_impl.rs
+++ b/crates/wasi-http/src/component_impl.rs
@@ -409,7 +409,10 @@ where
             Box::new(async move {
                 let ctx = get_cx(caller.data_mut());
 
-                let (bytes, status) = io::streams::Host::read(ctx, stream, len).await?;
+                let (bytes, status) = io::streams::Host::read(ctx, stream, len)
+                    .await?
+                    .map_err(|_| anyhow!("read failed"))?;
+
                 let done = match status {
                     io::streams::StreamStatus::Open => 0,
                     io::streams::StreamStatus::Ended => 1,
@@ -462,7 +465,9 @@ where
 
                 let ctx = get_cx(caller.data_mut());
 
-                let (len, status) = io::streams::Host::write(ctx, stream, body.into()).await?;
+                let (len, status) = io::streams::Host::write(ctx, stream, body.into())
+                    .await?
+                    .map_err(|_| anyhow!("write failed"))?;
                 let written: u32 = len.try_into()?;
                 let done: u32 = match status {
                     io::streams::StreamStatus::Open => 0,
diff --git a/crates/wasi-http/wit/deps/io/streams.wit b/crates/wasi-http/wit/deps/io/streams.wit
index 011bde0d6aaf..98df181c1ea4 100644
--- a/crates/wasi-http/wit/deps/io/streams.wit
+++ b/crates/wasi-http/wit/deps/io/streams.wit
@@ -8,16 +8,6 @@ package wasi:io
 interface streams {
     use wasi:poll/poll.{pollable}
 
-    /// An error type returned from a stream operation.
-    ///
-    /// TODO: need to figure out the actual contents of this error. Used to be
-    /// an empty record but that's no longer allowed. The `dummy` field is
-    /// only here to have this be a valid in the component model by being
-    /// non-empty.
-    record stream-error {
-      dummy: u32,
-    }
-
     /// Streams provide a sequence of data and then end; once they end, they
     /// no longer provide any further data.
     ///
@@ -37,15 +27,12 @@ interface streams {
     /// An input bytestream. In the future, this will be replaced by handle
     /// types.
     ///
-    /// This conceptually represents a `stream<u8, _>`. It's temporary
-    /// scaffolding until component-model's async features are ready.
-    ///
     /// `input-stream`s are *non-blocking* to the extent practical on underlying
     /// platforms. I/O operations always return promptly; if fewer bytes are
     /// promptly available than requested, they return the number of bytes promptly
     /// available, which could even be zero. To wait for data to be available,
     /// use the `subscribe-to-input-stream` function to obtain a `pollable` which
-    /// can be polled for using `wasi_poll`.
+    /// can be polled for using `wasi:poll/poll.poll_oneoff`.
     ///
     /// And at present, it is a `u32` instead of being an actual handle, until
     /// the wit-bindgen implementation of handles and resources is ready.
@@ -58,40 +45,36 @@ interface streams {
     /// This function returns a list of bytes containing the data that was
     /// read, along with a `stream-status` which, indicates whether further
     /// reads are expected to produce data. The returned list will contain up to
-    /// `len` bytes; it may return fewer than requested, but not more.
-    ///
-    /// Once a stream has reached the end, subsequent calls to read or
-    /// `skip` will always report end-of-stream rather than producing more
+    /// `len` bytes; it may return fewer than requested, but not more. An
+    /// empty list and `stream-status:open` indicates no more data is
+    /// available at this time, and that the pollable given by
+    /// `subscribe-to-input-stream` will be ready when more data is available.
+    /// 
+    /// Once a stream has reached the end, subsequent calls to `read` or
+    /// `skip` will always report `stream-status:ended` rather than producing more
     /// data.
     ///
-    /// If `len` is 0, it represents a request to read 0 bytes, which should
-    /// always succeed, assuming the stream hasn't reached its end yet, and
-    /// return an empty list.
-    ///
-    /// The len here is a `u64`, but some callees may not be able to allocate
-    /// a buffer as large as that would imply.
-    /// FIXME: describe what happens if allocation fails.
+    /// When the caller gives a `len` of 0, it represents a request to read 0
+    /// bytes. This read should  always succeed and return an empty list and
+    /// the current `stream-status`.
     ///
-    /// When the returned `stream-status` is `open`, the length of the returned
-    /// value may be less than `len`. When an empty list is returned, this
-    /// indicates that no more bytes were available from the stream at that
-    /// time. In that case the subscribe-to-input-stream pollable will indicate
-    /// when additional bytes are available for reading.
+    /// The `len` parameter is a `u64`, which could represent a list of u8 which
+    /// is not possible to allocate in wasm32, or not desirable to allocate as
+    /// as a return value by the callee. The callee may return a list of bytes
+    /// less than `len` in size while more bytes are available for reading.
     read: func(
         this: input-stream,
         /// The maximum number of bytes to read
         len: u64
-    ) -> result<tuple<list<u8>, stream-status>, stream-error>
+    ) -> result<tuple<list<u8>, stream-status>>
 
-    /// Read bytes from a stream, with blocking.
-    ///
-    /// This is similar to `read`, except that it blocks until at least one
-    /// byte can be read.
+    /// Read bytes from a stream, after blocking until at least one byte can
+    /// be read. Except for blocking, identical to `read`.
     blocking-read: func(
         this: input-stream,
         /// The maximum number of bytes to read
         len: u64
-    ) -> result<tuple<list<u8>, stream-status>, stream-error>
+    ) -> result<tuple<list<u8>, stream-status>>
 
     /// Skip bytes from a stream.
     ///
@@ -102,40 +85,42 @@ interface streams {
     /// `skip` will always report end-of-stream rather than producing more
     /// data.
     ///
-    /// This function returns the number of bytes skipped, along with a bool
-    /// indicating whether the end of the stream was reached. The returned
-    /// value will be at most `len`; it may be less.
+    /// This function returns the number of bytes skipped, along with a
+    /// `stream-status` indicating whether the end of the stream was
+    /// reached. The returned value will be at most `len`; it may be less.
     skip: func(
         this: input-stream,
         /// The maximum number of bytes to skip.
         len: u64,
-    ) -> result<tuple<u64, stream-status>, stream-error>
+    ) -> result<tuple<u64, stream-status>>
 
-    /// Skip bytes from a stream, with blocking.
-    ///
-    /// This is similar to `skip`, except that it blocks until at least one
-    /// byte can be consumed.
+    /// Skip bytes from a stream, after blocking until at least one byte
+    /// can be skipped. Except for blocking behavior, identical to `skip`.
     blocking-skip: func(
         this: input-stream,
         /// The maximum number of bytes to skip.
         len: u64,
-    ) -> result<tuple<u64, stream-status>, stream-error>
+    ) -> result<tuple<u64, stream-status>>
 
     /// Create a `pollable` which will resolve once either the specified stream
     /// has bytes available to read or the other end of the stream has been
     /// closed.
+    /// The created `pollable` is a child resource of the `input-stream`.
+    /// Implementations may trap if the `input-stream` is dropped before
+    /// all derived `pollable`s created with this function are dropped.
     subscribe-to-input-stream: func(this: input-stream) -> pollable
 
     /// Dispose of the specified `input-stream`, after which it may no longer
     /// be used.
+    /// Implementations may trap if this `input-stream` is dropped while child
+    /// `pollable` resources are still alive.
+    /// After this `input-stream` is dropped, implementations may report any
+    /// corresponding `output-stream` has `stream-state.closed`.
     drop-input-stream: func(this: input-stream)
 
     /// An output bytestream. In the future, this will be replaced by handle
     /// types.
     ///
-    /// This conceptually represents a `stream<u8, _>`. It's temporary
-    /// scaffolding until component-model's async features are ready.
-    ///
     /// `output-stream`s are *non-blocking* to the extent practical on
     /// underlying platforms. Except where specified otherwise, I/O operations also
     /// always return promptly, after the number of bytes that can be written
@@ -159,17 +144,18 @@ interface streams {
     /// When the returned `stream-status` is `open`, the `u64` return value may
     /// be less than the length of `buf`. This indicates that no more bytes may
     /// be written to the stream promptly. In that case the
-    /// subscribe-to-output-stream pollable will indicate when additional bytes
+    /// `subscribe-to-output-stream` pollable will indicate when additional bytes
     /// may be promptly written.
     ///
-    /// TODO: document what happens when an empty list is written
+    /// Writing an empty list must return a non-error result with `0` for the
+    /// `u64` return value, and the current `stream-status`.
     write: func(
         this: output-stream,
         /// Data to write
         buf: list<u8>
-    ) -> result<tuple<u64, stream-status>, stream-error>
+    ) -> result<tuple<u64, stream-status>>
 
-    /// Write bytes to a stream, with blocking.
+    /// Blocking write of bytes to a stream.
     ///
     /// This is similar to `write`, except that it blocks until at least one
     /// byte can be written.
@@ -177,27 +163,29 @@ interface streams {
         this: output-stream,
         /// Data to write
         buf: list<u8>
-    ) -> result<tuple<u64, stream-status>, stream-error>
+    ) -> result<tuple<u64, stream-status>>
 
-    /// Write multiple zero bytes to a stream.
+    /// Write multiple zero-bytes to a stream.
     ///
-    /// This function returns a `u64` indicating the number of zero bytes
-    /// that were written; it may be less than `len`.
+    /// This function returns a `u64` indicating the number of zero-bytes
+    /// that were written; it may be less than `len`. Equivelant to a call to
+    /// `write` with a list of zeroes of the given length.
     write-zeroes: func(
         this: output-stream,
-        /// The number of zero bytes to write
+        /// The number of zero-bytes to write
         len: u64
-    ) -> result<tuple<u64, stream-status>, stream-error>
+    ) -> result<tuple<u64, stream-status>>
 
     /// Write multiple zero bytes to a stream, with blocking.
     ///
     /// This is similar to `write-zeroes`, except that it blocks until at least
-    /// one byte can be written.
+    /// one byte can be written. Equivelant to a call to `blocking-write` with
+    /// a list of zeroes of the given length.
     blocking-write-zeroes: func(
         this: output-stream,
         /// The number of zero bytes to write
         len: u64
-    ) -> result<tuple<u64, stream-status>, stream-error>
+    ) -> result<tuple<u64, stream-status>>
 
     /// Read from one stream and write to another.
     ///
@@ -212,7 +200,7 @@ interface streams {
         src: input-stream,
         /// The number of bytes to splice
         len: u64,
-    ) -> result<tuple<u64, stream-status>, stream-error>
+    ) -> result<tuple<u64, stream-status>>
 
     /// Read from one stream and write to another, with blocking.
     ///
@@ -224,7 +212,7 @@ interface streams {
         src: input-stream,
         /// The number of bytes to splice
         len: u64,
-    ) -> result<tuple<u64, stream-status>, stream-error>
+    ) -> result<tuple<u64, stream-status>>
 
     /// Forward the entire contents of an input stream to an output stream.
     ///
@@ -242,13 +230,24 @@ interface streams {
         this: output-stream,
         /// The stream to read from
         src: input-stream
-    ) -> result<tuple<u64, stream-status>, stream-error>
+    ) -> result<tuple<u64, stream-status>>
 
     /// Create a `pollable` which will resolve once either the specified stream
-    /// is ready to accept bytes or the other end of the stream has been closed.
+    /// is ready to accept bytes or the `stream-state` has become closed.
+    ///
+    /// Once the stream-state is closed, this pollable is always ready
+    /// immediately.
+    ///
+    /// The created `pollable` is a child resource of the `output-stream`.
+    /// Implementations may trap if the `output-stream` is dropped before
+    /// all derived `pollable`s created with this function are dropped.
     subscribe-to-output-stream: func(this: output-stream) -> pollable
 
     /// Dispose of the specified `output-stream`, after which it may no longer
     /// be used.
+    /// Implementations may trap if this `output-stream` is dropped while
+    /// child `pollable` resources are still alive.
+    /// After this `output-stream` is dropped, implementations may report any
+    /// corresponding `input-stream` has `stream-state.closed`.
     drop-output-stream: func(this: output-stream)
 }

From d65d0af86e7e033cd6bd4bc51022a44ecf8670f6 Mon Sep 17 00:00:00 2001
From: Trevor Elliott <telliott@fastly.com>
Date: Thu, 17 Aug 2023 16:41:06 -0700
Subject: [PATCH 46/49] Mark the component outbound_request_post test flaky

---
 crates/test-programs/tests/wasi-http-components.rs | 1 +
 1 file changed, 1 insertion(+)

diff --git a/crates/test-programs/tests/wasi-http-components.rs b/crates/test-programs/tests/wasi-http-components.rs
index 49ffc72f8fea..df41595af9dd 100644
--- a/crates/test-programs/tests/wasi-http-components.rs
+++ b/crates/test-programs/tests/wasi-http-components.rs
@@ -94,6 +94,7 @@ async fn outbound_request_get() {
 }
 
 #[test_log::test(tokio::test(flavor = "multi_thread"))]
+#[ignore = "test is currently flaky in ci and needs to be debugged"]
 async fn outbound_request_post() {
     setup_http1(run("outbound_request_post")).await.unwrap();
 }

From 9687e287c5695e5afed64ea7e38be8656c98b8b8 Mon Sep 17 00:00:00 2001
From: Trevor Elliott <telliott@fastly.com>
Date: Thu, 17 Aug 2023 17:15:18 -0700
Subject: [PATCH 47/49] Disable flaky wasi-http-tests on windows only

---
 crates/test-programs/tests/wasi-http-components.rs | 4 ++++
 crates/test-programs/tests/wasi-http-modules.rs    | 4 ++++
 2 files changed, 8 insertions(+)

diff --git a/crates/test-programs/tests/wasi-http-components.rs b/crates/test-programs/tests/wasi-http-components.rs
index df41595af9dd..dfddc7c36d49 100644
--- a/crates/test-programs/tests/wasi-http-components.rs
+++ b/crates/test-programs/tests/wasi-http-components.rs
@@ -127,6 +127,10 @@ async fn outbound_request_invalid_port() {
 }
 
 #[test_log::test(tokio::test(flavor = "multi_thread"))]
+#[cfg_attr(
+    windows,
+    ignore = "test is currently flaky in ci and needs to be debugged"
+)]
 async fn outbound_request_invalid_dnsname() {
     run("outbound_request_invalid_dnsname").await.unwrap();
 }
diff --git a/crates/test-programs/tests/wasi-http-modules.rs b/crates/test-programs/tests/wasi-http-modules.rs
index fe6bf971b03c..aa73b0dc8df5 100644
--- a/crates/test-programs/tests/wasi-http-modules.rs
+++ b/crates/test-programs/tests/wasi-http-modules.rs
@@ -140,6 +140,10 @@ async fn outbound_request_invalid_port() {
 }
 
 #[test_log::test(tokio::test(flavor = "multi_thread"))]
+#[cfg_attr(
+    windows,
+    ignore = "test is currently flaky in ci and needs to be debugged"
+)]
 async fn outbound_request_invalid_dnsname() {
     run("outbound_request_invalid_dnsname").await.unwrap();
 }

From 2a3e90f616e5101156567b400af71ee3b9533bd5 Mon Sep 17 00:00:00 2001
From: Trevor Elliott <telliott@fastly.com>
Date: Thu, 17 Aug 2023 17:32:13 -0700
Subject: [PATCH 48/49] Use diff instead of rm/cp/git diff

---
 .github/workflows/main.yml | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/.github/workflows/main.yml b/.github/workflows/main.yml
index 83619c16656c..0ae06d1cea16 100644
--- a/.github/workflows/main.yml
+++ b/.github/workflows/main.yml
@@ -457,11 +457,9 @@ jobs:
 
     # Ensure wit definitions are in sync: both wasmtime-wasi and wasmtime-wasi-http need their own
     # copy of the wit definitions so publishing works, but we need to ensure they are identical copies.
-    - name: Check wasi and wasi-http wit directories
+    - name: Check that the wasi and wasi-http wit directories agree
       run: |
-        rm -rf 'crates/wasi-http/wit'
-        cp -rv 'crates/wasi/wit/' 'crates/wasi-http/wit/'
-        git diff --exit-code --diff-filter=ADM -- 'crates/wasi-http/wit/'
+        diff -ru crates/wasi/wit crates/wasi-http/wit
 
     # Build and test all features
     - run: ./ci/run-tests.sh --locked

From 9be4da13386e8805978e2ab1becfa1c2f33beaef Mon Sep 17 00:00:00 2001
From: Trevor Elliott <telliott@fastly.com>
Date: Thu, 17 Aug 2023 18:16:45 -0700
Subject: [PATCH 49/49] Disable more tests on windows

---
 crates/test-programs/tests/wasi-http-components.rs | 4 ++++
 crates/test-programs/tests/wasi-http-modules.rs    | 4 ++++
 2 files changed, 8 insertions(+)

diff --git a/crates/test-programs/tests/wasi-http-components.rs b/crates/test-programs/tests/wasi-http-components.rs
index dfddc7c36d49..4e0257cde263 100644
--- a/crates/test-programs/tests/wasi-http-components.rs
+++ b/crates/test-programs/tests/wasi-http-components.rs
@@ -105,6 +105,10 @@ async fn outbound_request_put() {
 }
 
 #[test_log::test(tokio::test(flavor = "multi_thread"))]
+#[cfg_attr(
+    windows,
+    ignore = "test is currently flaky in ci and needs to be debugged"
+)]
 async fn outbound_request_invalid_version() {
     setup_http2(run("outbound_request_invalid_version"))
         .await
diff --git a/crates/test-programs/tests/wasi-http-modules.rs b/crates/test-programs/tests/wasi-http-modules.rs
index aa73b0dc8df5..98e40662effa 100644
--- a/crates/test-programs/tests/wasi-http-modules.rs
+++ b/crates/test-programs/tests/wasi-http-modules.rs
@@ -118,6 +118,10 @@ async fn outbound_request_put() {
 }
 
 #[test_log::test(tokio::test(flavor = "multi_thread"))]
+#[cfg_attr(
+    windows,
+    ignore = "test is currently flaky in ci and needs to be debugged"
+)]
 async fn outbound_request_invalid_version() {
     setup_http2(run("outbound_request_invalid_version"))
         .await