Name     ediftest;
PartNo   00 ;
Date     05/08/2023 ;
Revision 00 ;
Designer Engineer ;
Company  Owner ;
Assembly None ;
Location  ;
Device   f1502isptqfp44;

PROPERTY ATMEL { jtag=on };
PROPERTY ATMEL { TMS_pullup=on };
PROPERTY ATMEL { TDI_pullup=on };
PROPERTY ATMEL { Verilog_sim=on };
PROPERTY ATMEL { out_edif=on };
PROPERTY ATMEL { Preassign=keep };


/* *************** INPUT PINS *********************/
PIN  10 = !HELLO_IN;


/* *************** OUTPUT PINS ********************/
PIN  11 = !HELLO_OUT;


HELLO_OUT=HELLO_IN;