From b2e004fb615a3c931d910a338b9faa99c1c975d7 Mon Sep 17 00:00:00 2001 From: Jack Koenig Date: Sun, 22 Mar 2020 18:11:25 -0700 Subject: [PATCH 1/2] Remove compile-internal from build.sbt This has the effect of causing the coreMacros and chiselFrontend projects to be published separately --- build.sbt | 26 ++++---------------------- 1 file changed, 4 insertions(+), 22 deletions(-) diff --git a/build.sbt b/build.sbt index be265361b88..d943ecfcd7b 100644 --- a/build.sbt +++ b/build.sbt @@ -123,14 +123,10 @@ lazy val chiselSettings = Seq ( ) lazy val coreMacros = (project in file("coreMacros")). - settings(commonSettings: _*). - // Prevent separate JARs from being generated for coreMacros. - settings(skip in publish := true) + settings(commonSettings: _*) lazy val chiselFrontend = (project in file("chiselFrontend")). settings(commonSettings: _*). - // Prevent separate JARs from being generated for chiselFrontend. - settings(skip in publish := true). settings( scalacOptions := scalacOptions.value ++ Seq( "-deprecation", @@ -159,14 +155,8 @@ lazy val chisel = (project in file(".")). settings(commonSettings: _*). settings(chiselSettings: _*). settings(publishSettings: _*). - dependsOn(coreMacros % "compile-internal;test-internal"). - dependsOn(chiselFrontend % "compile-internal;test-internal"). - // We used to have to disable aggregation in general in order to suppress - // creation of subproject JARs (coreMacros and chiselFrontend) during publishing. - // This had the unfortunate side-effect of suppressing coverage tests and scaladoc generation in subprojects. - // The "skip in publish := true" setting in subproject settings seems to be - // sufficient to suppress subproject JAR creation, so we can restore - // general aggregation, and thus get coverage tests and scaladoc for subprojects. + dependsOn(coreMacros). + dependsOn(chiselFrontend). aggregate(coreMacros, chiselFrontend). settings( scalacOptions in Test ++= Seq("-language:reflectiveCalls"), @@ -189,13 +179,5 @@ lazy val chisel = (project in file(".")). } s"https://github.com/freechipsproject/chisel3/tree/$branch/€{FILE_PATH}.scala" } - ), - // Include macro classes, resources, and sources main JAR since we don't create subproject JARs. - mappings in (Compile, packageBin) ++= (mappings in (coreMacros, Compile, packageBin)).value, - mappings in (Compile, packageSrc) ++= (mappings in (coreMacros, Compile, packageSrc)).value, - mappings in (Compile, packageBin) ++= (mappings in (chiselFrontend, Compile, packageBin)).value, - mappings in (Compile, packageSrc) ++= (mappings in (chiselFrontend, Compile, packageSrc)).value, - // Export the packaged JAR so projects that depend directly on Chisel project (rather than the - // published artifact) also see the stuff in coreMacros and chiselFrontend. - exportJars := true + ) ) From fbf5e6f1a0e8bf535d465b748ad554575fe62156 Mon Sep 17 00:00:00 2001 From: Jack Koenig Date: Sun, 22 Mar 2020 18:13:58 -0700 Subject: [PATCH 2/2] Rename subprojects to more canonical names * Rename coreMacros to macros * Rename chiselFrontend to core Also make each subproject publish with "chisel3-" as a prefix --- build.sbt | 14 ++++++++------ .../src/main/scala/chisel3/Aggregate.scala | 0 .../src/main/scala/chisel3/Annotation.scala | 0 .../src/main/scala/chisel3/Assert.scala | 0 .../src/main/scala/chisel3/Attach.scala | 0 .../src/main/scala/chisel3/Bits.scala | 0 .../src/main/scala/chisel3/BlackBox.scala | 0 .../src/main/scala/chisel3/BoolFactory.scala | 0 .../src/main/scala/chisel3/Clock.scala | 0 .../src/main/scala/chisel3/CompileOptions.scala | 0 .../src/main/scala/chisel3/Data.scala | 0 .../src/main/scala/chisel3/Element.scala | 0 .../src/main/scala/chisel3/Mem.scala | 0 .../src/main/scala/chisel3/Module.scala | 0 .../src/main/scala/chisel3/ModuleAspect.scala | 0 .../src/main/scala/chisel3/MultiClock.scala | 0 .../src/main/scala/chisel3/Mux.scala | 0 .../src/main/scala/chisel3/Num.scala | 0 .../src/main/scala/chisel3/Printable.scala | 0 .../src/main/scala/chisel3/Printf.scala | 0 .../src/main/scala/chisel3/RawModule.scala | 0 .../src/main/scala/chisel3/Reg.scala | 0 .../src/main/scala/chisel3/SIntFactory.scala | 0 .../src/main/scala/chisel3/SeqUtils.scala | 0 .../src/main/scala/chisel3/StrongEnum.scala | 0 .../src/main/scala/chisel3/UIntFactory.scala | 0 .../src/main/scala/chisel3/When.scala | 0 .../src/main/scala/chisel3/aop/Aspect.scala | 0 .../src/main/scala/chisel3/core/package.scala | 0 .../src/main/scala/chisel3/dontTouch.scala | 0 .../main/scala/chisel3/experimental/Analog.scala | 0 .../main/scala/chisel3/experimental/package.scala | 0 .../main/scala/chisel3/internal/BiConnect.scala | 0 .../src/main/scala/chisel3/internal/Binding.scala | 0 .../src/main/scala/chisel3/internal/Builder.scala | 0 .../src/main/scala/chisel3/internal/Error.scala | 0 .../main/scala/chisel3/internal/MonoConnect.scala | 0 .../src/main/scala/chisel3/internal/Namer.scala | 0 .../main/scala/chisel3/internal/SourceInfo.scala | 0 .../scala/chisel3/internal/firrtl/Converter.scala | 0 .../main/scala/chisel3/internal/firrtl/IR.scala | 0 .../src/main/scala/chisel3/package.scala | 0 .../src/main/scala/chisel3/SourceInfoDoc.scala | 0 .../scala/chisel3/internal/RangeTransform.scala | 0 .../internal/RuntimeDeprecationTransform.scala | 0 .../internal/naming/NamingAnnotations.scala | 0 .../internal/sourceinfo/SourceInfoTransform.scala | 0 47 files changed, 8 insertions(+), 6 deletions(-) rename {chiselFrontend => core}/src/main/scala/chisel3/Aggregate.scala (100%) rename {chiselFrontend => core}/src/main/scala/chisel3/Annotation.scala (100%) rename {chiselFrontend => core}/src/main/scala/chisel3/Assert.scala (100%) rename {chiselFrontend => core}/src/main/scala/chisel3/Attach.scala (100%) rename {chiselFrontend => core}/src/main/scala/chisel3/Bits.scala (100%) rename {chiselFrontend => core}/src/main/scala/chisel3/BlackBox.scala (100%) rename {chiselFrontend => core}/src/main/scala/chisel3/BoolFactory.scala (100%) rename {chiselFrontend => core}/src/main/scala/chisel3/Clock.scala (100%) rename {chiselFrontend => core}/src/main/scala/chisel3/CompileOptions.scala (100%) rename {chiselFrontend => core}/src/main/scala/chisel3/Data.scala (100%) rename {chiselFrontend => core}/src/main/scala/chisel3/Element.scala (100%) rename {chiselFrontend => core}/src/main/scala/chisel3/Mem.scala (100%) rename {chiselFrontend => core}/src/main/scala/chisel3/Module.scala (100%) rename {chiselFrontend => core}/src/main/scala/chisel3/ModuleAspect.scala (100%) rename {chiselFrontend => core}/src/main/scala/chisel3/MultiClock.scala (100%) rename {chiselFrontend => core}/src/main/scala/chisel3/Mux.scala (100%) rename {chiselFrontend => core}/src/main/scala/chisel3/Num.scala (100%) rename {chiselFrontend => core}/src/main/scala/chisel3/Printable.scala (100%) rename {chiselFrontend => core}/src/main/scala/chisel3/Printf.scala (100%) rename {chiselFrontend => core}/src/main/scala/chisel3/RawModule.scala (100%) rename {chiselFrontend => core}/src/main/scala/chisel3/Reg.scala (100%) rename {chiselFrontend => core}/src/main/scala/chisel3/SIntFactory.scala (100%) rename {chiselFrontend => core}/src/main/scala/chisel3/SeqUtils.scala (100%) rename {chiselFrontend => core}/src/main/scala/chisel3/StrongEnum.scala (100%) rename {chiselFrontend => core}/src/main/scala/chisel3/UIntFactory.scala (100%) rename {chiselFrontend => core}/src/main/scala/chisel3/When.scala (100%) rename {chiselFrontend => core}/src/main/scala/chisel3/aop/Aspect.scala (100%) rename {chiselFrontend => core}/src/main/scala/chisel3/core/package.scala (100%) rename {chiselFrontend => core}/src/main/scala/chisel3/dontTouch.scala (100%) rename {chiselFrontend => core}/src/main/scala/chisel3/experimental/Analog.scala (100%) rename {chiselFrontend => core}/src/main/scala/chisel3/experimental/package.scala (100%) rename {chiselFrontend => core}/src/main/scala/chisel3/internal/BiConnect.scala (100%) rename {chiselFrontend => core}/src/main/scala/chisel3/internal/Binding.scala (100%) rename {chiselFrontend => core}/src/main/scala/chisel3/internal/Builder.scala (100%) rename {chiselFrontend => core}/src/main/scala/chisel3/internal/Error.scala (100%) rename {chiselFrontend => core}/src/main/scala/chisel3/internal/MonoConnect.scala (100%) rename {chiselFrontend => core}/src/main/scala/chisel3/internal/Namer.scala (100%) rename {chiselFrontend => core}/src/main/scala/chisel3/internal/SourceInfo.scala (100%) rename {chiselFrontend => core}/src/main/scala/chisel3/internal/firrtl/Converter.scala (100%) rename {chiselFrontend => core}/src/main/scala/chisel3/internal/firrtl/IR.scala (100%) rename {chiselFrontend => core}/src/main/scala/chisel3/package.scala (100%) rename {coreMacros => macros}/src/main/scala/chisel3/SourceInfoDoc.scala (100%) rename {coreMacros => macros}/src/main/scala/chisel3/internal/RangeTransform.scala (100%) rename {coreMacros => macros}/src/main/scala/chisel3/internal/RuntimeDeprecationTransform.scala (100%) rename {coreMacros => macros}/src/main/scala/chisel3/internal/naming/NamingAnnotations.scala (100%) rename {coreMacros => macros}/src/main/scala/chisel3/internal/sourceinfo/SourceInfoTransform.scala (100%) diff --git a/build.sbt b/build.sbt index d943ecfcd7b..64520fa1ce4 100644 --- a/build.sbt +++ b/build.sbt @@ -122,12 +122,14 @@ lazy val chiselSettings = Seq ( } ) -lazy val coreMacros = (project in file("coreMacros")). +lazy val macros = (project in file("macros")). + settings(name := "chisel3-macros"). settings(commonSettings: _*) -lazy val chiselFrontend = (project in file("chiselFrontend")). +lazy val core = (project in file("core")). settings(commonSettings: _*). settings( + name := "chisel3-core", scalacOptions := scalacOptions.value ++ Seq( "-deprecation", "-explaintypes", @@ -139,7 +141,7 @@ lazy val chiselFrontend = (project in file("chiselFrontend")). // "-Xlint:missing-interpolator" ) ). - dependsOn(coreMacros) + dependsOn(macros) // This will always be the root project, even if we are a sub-project. lazy val root = RootProject(file(".")) @@ -155,9 +157,9 @@ lazy val chisel = (project in file(".")). settings(commonSettings: _*). settings(chiselSettings: _*). settings(publishSettings: _*). - dependsOn(coreMacros). - dependsOn(chiselFrontend). - aggregate(coreMacros, chiselFrontend). + dependsOn(macros). + dependsOn(core). + aggregate(macros, core). settings( scalacOptions in Test ++= Seq("-language:reflectiveCalls"), scalacOptions in Compile in doc ++= Seq( diff --git a/chiselFrontend/src/main/scala/chisel3/Aggregate.scala b/core/src/main/scala/chisel3/Aggregate.scala similarity index 100% rename from chiselFrontend/src/main/scala/chisel3/Aggregate.scala rename to core/src/main/scala/chisel3/Aggregate.scala diff --git a/chiselFrontend/src/main/scala/chisel3/Annotation.scala b/core/src/main/scala/chisel3/Annotation.scala similarity index 100% rename from chiselFrontend/src/main/scala/chisel3/Annotation.scala rename to core/src/main/scala/chisel3/Annotation.scala diff --git a/chiselFrontend/src/main/scala/chisel3/Assert.scala b/core/src/main/scala/chisel3/Assert.scala similarity index 100% rename from chiselFrontend/src/main/scala/chisel3/Assert.scala rename to core/src/main/scala/chisel3/Assert.scala diff --git a/chiselFrontend/src/main/scala/chisel3/Attach.scala b/core/src/main/scala/chisel3/Attach.scala similarity index 100% rename from chiselFrontend/src/main/scala/chisel3/Attach.scala rename to core/src/main/scala/chisel3/Attach.scala diff --git a/chiselFrontend/src/main/scala/chisel3/Bits.scala b/core/src/main/scala/chisel3/Bits.scala similarity index 100% rename from chiselFrontend/src/main/scala/chisel3/Bits.scala rename to core/src/main/scala/chisel3/Bits.scala diff --git a/chiselFrontend/src/main/scala/chisel3/BlackBox.scala b/core/src/main/scala/chisel3/BlackBox.scala similarity index 100% rename from chiselFrontend/src/main/scala/chisel3/BlackBox.scala rename to core/src/main/scala/chisel3/BlackBox.scala diff --git a/chiselFrontend/src/main/scala/chisel3/BoolFactory.scala b/core/src/main/scala/chisel3/BoolFactory.scala similarity index 100% rename from chiselFrontend/src/main/scala/chisel3/BoolFactory.scala rename to core/src/main/scala/chisel3/BoolFactory.scala diff --git a/chiselFrontend/src/main/scala/chisel3/Clock.scala b/core/src/main/scala/chisel3/Clock.scala similarity index 100% rename from chiselFrontend/src/main/scala/chisel3/Clock.scala rename to core/src/main/scala/chisel3/Clock.scala diff --git a/chiselFrontend/src/main/scala/chisel3/CompileOptions.scala b/core/src/main/scala/chisel3/CompileOptions.scala similarity index 100% rename from chiselFrontend/src/main/scala/chisel3/CompileOptions.scala rename to core/src/main/scala/chisel3/CompileOptions.scala diff --git a/chiselFrontend/src/main/scala/chisel3/Data.scala b/core/src/main/scala/chisel3/Data.scala similarity index 100% rename from chiselFrontend/src/main/scala/chisel3/Data.scala rename to core/src/main/scala/chisel3/Data.scala diff --git a/chiselFrontend/src/main/scala/chisel3/Element.scala b/core/src/main/scala/chisel3/Element.scala similarity index 100% rename from chiselFrontend/src/main/scala/chisel3/Element.scala rename to core/src/main/scala/chisel3/Element.scala diff --git a/chiselFrontend/src/main/scala/chisel3/Mem.scala b/core/src/main/scala/chisel3/Mem.scala similarity index 100% rename from chiselFrontend/src/main/scala/chisel3/Mem.scala rename to core/src/main/scala/chisel3/Mem.scala diff --git a/chiselFrontend/src/main/scala/chisel3/Module.scala b/core/src/main/scala/chisel3/Module.scala similarity index 100% rename from chiselFrontend/src/main/scala/chisel3/Module.scala rename to core/src/main/scala/chisel3/Module.scala diff --git a/chiselFrontend/src/main/scala/chisel3/ModuleAspect.scala b/core/src/main/scala/chisel3/ModuleAspect.scala similarity index 100% rename from chiselFrontend/src/main/scala/chisel3/ModuleAspect.scala rename to core/src/main/scala/chisel3/ModuleAspect.scala diff --git a/chiselFrontend/src/main/scala/chisel3/MultiClock.scala b/core/src/main/scala/chisel3/MultiClock.scala similarity index 100% rename from chiselFrontend/src/main/scala/chisel3/MultiClock.scala rename to core/src/main/scala/chisel3/MultiClock.scala diff --git a/chiselFrontend/src/main/scala/chisel3/Mux.scala b/core/src/main/scala/chisel3/Mux.scala similarity index 100% rename from chiselFrontend/src/main/scala/chisel3/Mux.scala rename to core/src/main/scala/chisel3/Mux.scala diff --git a/chiselFrontend/src/main/scala/chisel3/Num.scala b/core/src/main/scala/chisel3/Num.scala similarity index 100% rename from chiselFrontend/src/main/scala/chisel3/Num.scala rename to core/src/main/scala/chisel3/Num.scala diff --git a/chiselFrontend/src/main/scala/chisel3/Printable.scala b/core/src/main/scala/chisel3/Printable.scala similarity index 100% rename from chiselFrontend/src/main/scala/chisel3/Printable.scala rename to core/src/main/scala/chisel3/Printable.scala diff --git a/chiselFrontend/src/main/scala/chisel3/Printf.scala b/core/src/main/scala/chisel3/Printf.scala similarity index 100% rename from chiselFrontend/src/main/scala/chisel3/Printf.scala rename to core/src/main/scala/chisel3/Printf.scala diff --git a/chiselFrontend/src/main/scala/chisel3/RawModule.scala b/core/src/main/scala/chisel3/RawModule.scala similarity index 100% rename from chiselFrontend/src/main/scala/chisel3/RawModule.scala rename to core/src/main/scala/chisel3/RawModule.scala diff --git a/chiselFrontend/src/main/scala/chisel3/Reg.scala b/core/src/main/scala/chisel3/Reg.scala similarity index 100% rename from chiselFrontend/src/main/scala/chisel3/Reg.scala rename to core/src/main/scala/chisel3/Reg.scala diff --git a/chiselFrontend/src/main/scala/chisel3/SIntFactory.scala b/core/src/main/scala/chisel3/SIntFactory.scala similarity index 100% rename from chiselFrontend/src/main/scala/chisel3/SIntFactory.scala rename to core/src/main/scala/chisel3/SIntFactory.scala diff --git a/chiselFrontend/src/main/scala/chisel3/SeqUtils.scala b/core/src/main/scala/chisel3/SeqUtils.scala similarity index 100% rename from chiselFrontend/src/main/scala/chisel3/SeqUtils.scala rename to core/src/main/scala/chisel3/SeqUtils.scala diff --git a/chiselFrontend/src/main/scala/chisel3/StrongEnum.scala b/core/src/main/scala/chisel3/StrongEnum.scala similarity index 100% rename from chiselFrontend/src/main/scala/chisel3/StrongEnum.scala rename to core/src/main/scala/chisel3/StrongEnum.scala diff --git a/chiselFrontend/src/main/scala/chisel3/UIntFactory.scala b/core/src/main/scala/chisel3/UIntFactory.scala similarity index 100% rename from chiselFrontend/src/main/scala/chisel3/UIntFactory.scala rename to core/src/main/scala/chisel3/UIntFactory.scala diff --git a/chiselFrontend/src/main/scala/chisel3/When.scala b/core/src/main/scala/chisel3/When.scala similarity index 100% rename from chiselFrontend/src/main/scala/chisel3/When.scala rename to core/src/main/scala/chisel3/When.scala diff --git a/chiselFrontend/src/main/scala/chisel3/aop/Aspect.scala b/core/src/main/scala/chisel3/aop/Aspect.scala similarity index 100% rename from chiselFrontend/src/main/scala/chisel3/aop/Aspect.scala rename to core/src/main/scala/chisel3/aop/Aspect.scala diff --git a/chiselFrontend/src/main/scala/chisel3/core/package.scala b/core/src/main/scala/chisel3/core/package.scala similarity index 100% rename from chiselFrontend/src/main/scala/chisel3/core/package.scala rename to core/src/main/scala/chisel3/core/package.scala diff --git a/chiselFrontend/src/main/scala/chisel3/dontTouch.scala b/core/src/main/scala/chisel3/dontTouch.scala similarity index 100% rename from chiselFrontend/src/main/scala/chisel3/dontTouch.scala rename to core/src/main/scala/chisel3/dontTouch.scala diff --git a/chiselFrontend/src/main/scala/chisel3/experimental/Analog.scala b/core/src/main/scala/chisel3/experimental/Analog.scala similarity index 100% rename from chiselFrontend/src/main/scala/chisel3/experimental/Analog.scala rename to core/src/main/scala/chisel3/experimental/Analog.scala diff --git a/chiselFrontend/src/main/scala/chisel3/experimental/package.scala b/core/src/main/scala/chisel3/experimental/package.scala similarity index 100% rename from chiselFrontend/src/main/scala/chisel3/experimental/package.scala rename to core/src/main/scala/chisel3/experimental/package.scala diff --git a/chiselFrontend/src/main/scala/chisel3/internal/BiConnect.scala b/core/src/main/scala/chisel3/internal/BiConnect.scala similarity index 100% rename from chiselFrontend/src/main/scala/chisel3/internal/BiConnect.scala rename to core/src/main/scala/chisel3/internal/BiConnect.scala diff --git a/chiselFrontend/src/main/scala/chisel3/internal/Binding.scala b/core/src/main/scala/chisel3/internal/Binding.scala similarity index 100% rename from chiselFrontend/src/main/scala/chisel3/internal/Binding.scala rename to core/src/main/scala/chisel3/internal/Binding.scala diff --git a/chiselFrontend/src/main/scala/chisel3/internal/Builder.scala b/core/src/main/scala/chisel3/internal/Builder.scala similarity index 100% rename from chiselFrontend/src/main/scala/chisel3/internal/Builder.scala rename to core/src/main/scala/chisel3/internal/Builder.scala diff --git a/chiselFrontend/src/main/scala/chisel3/internal/Error.scala b/core/src/main/scala/chisel3/internal/Error.scala similarity index 100% rename from chiselFrontend/src/main/scala/chisel3/internal/Error.scala rename to core/src/main/scala/chisel3/internal/Error.scala diff --git a/chiselFrontend/src/main/scala/chisel3/internal/MonoConnect.scala b/core/src/main/scala/chisel3/internal/MonoConnect.scala similarity index 100% rename from chiselFrontend/src/main/scala/chisel3/internal/MonoConnect.scala rename to core/src/main/scala/chisel3/internal/MonoConnect.scala diff --git a/chiselFrontend/src/main/scala/chisel3/internal/Namer.scala b/core/src/main/scala/chisel3/internal/Namer.scala similarity index 100% rename from chiselFrontend/src/main/scala/chisel3/internal/Namer.scala rename to core/src/main/scala/chisel3/internal/Namer.scala diff --git a/chiselFrontend/src/main/scala/chisel3/internal/SourceInfo.scala b/core/src/main/scala/chisel3/internal/SourceInfo.scala similarity index 100% rename from chiselFrontend/src/main/scala/chisel3/internal/SourceInfo.scala rename to core/src/main/scala/chisel3/internal/SourceInfo.scala diff --git a/chiselFrontend/src/main/scala/chisel3/internal/firrtl/Converter.scala b/core/src/main/scala/chisel3/internal/firrtl/Converter.scala similarity index 100% rename from chiselFrontend/src/main/scala/chisel3/internal/firrtl/Converter.scala rename to core/src/main/scala/chisel3/internal/firrtl/Converter.scala diff --git a/chiselFrontend/src/main/scala/chisel3/internal/firrtl/IR.scala b/core/src/main/scala/chisel3/internal/firrtl/IR.scala similarity index 100% rename from chiselFrontend/src/main/scala/chisel3/internal/firrtl/IR.scala rename to core/src/main/scala/chisel3/internal/firrtl/IR.scala diff --git a/chiselFrontend/src/main/scala/chisel3/package.scala b/core/src/main/scala/chisel3/package.scala similarity index 100% rename from chiselFrontend/src/main/scala/chisel3/package.scala rename to core/src/main/scala/chisel3/package.scala diff --git a/coreMacros/src/main/scala/chisel3/SourceInfoDoc.scala b/macros/src/main/scala/chisel3/SourceInfoDoc.scala similarity index 100% rename from coreMacros/src/main/scala/chisel3/SourceInfoDoc.scala rename to macros/src/main/scala/chisel3/SourceInfoDoc.scala diff --git a/coreMacros/src/main/scala/chisel3/internal/RangeTransform.scala b/macros/src/main/scala/chisel3/internal/RangeTransform.scala similarity index 100% rename from coreMacros/src/main/scala/chisel3/internal/RangeTransform.scala rename to macros/src/main/scala/chisel3/internal/RangeTransform.scala diff --git a/coreMacros/src/main/scala/chisel3/internal/RuntimeDeprecationTransform.scala b/macros/src/main/scala/chisel3/internal/RuntimeDeprecationTransform.scala similarity index 100% rename from coreMacros/src/main/scala/chisel3/internal/RuntimeDeprecationTransform.scala rename to macros/src/main/scala/chisel3/internal/RuntimeDeprecationTransform.scala diff --git a/coreMacros/src/main/scala/chisel3/internal/naming/NamingAnnotations.scala b/macros/src/main/scala/chisel3/internal/naming/NamingAnnotations.scala similarity index 100% rename from coreMacros/src/main/scala/chisel3/internal/naming/NamingAnnotations.scala rename to macros/src/main/scala/chisel3/internal/naming/NamingAnnotations.scala diff --git a/coreMacros/src/main/scala/chisel3/internal/sourceinfo/SourceInfoTransform.scala b/macros/src/main/scala/chisel3/internal/sourceinfo/SourceInfoTransform.scala similarity index 100% rename from coreMacros/src/main/scala/chisel3/internal/sourceinfo/SourceInfoTransform.scala rename to macros/src/main/scala/chisel3/internal/sourceinfo/SourceInfoTransform.scala