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Add --targetDir option and verilog generation to Makefile and chiselTests. #16

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@ucbjrl ucbjrl commented Oct 7, 2015

Add the Chisel2 --targetDir option to control where output is created.
Add Stack.scala to chiselTests (sole purpose is to generate .fir output file).
Add main.scala to chiselTests to elaborate tests and generate .fir files.
Update Makefile to use current tooling to generate Verilog output (firrtl).

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ucbjrl commented Nov 5, 2015

Rendered obsolete by #54.

@ucbjrl ucbjrl closed this Nov 5, 2015
@ucbjrl ucbjrl deleted the examples branch November 5, 2015 17:38
seldridge pushed a commit that referenced this pull request Aug 4, 2022
* Add scalafmt files from chisel3
* Enable scalafmt in SBT
* Scalafmt all the files
* Add scalafmt check to CI
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