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compile warning: DCache CreditedCrossing #2758

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merged 1 commit into from
Dec 7, 2020
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@ingallsj ingallsj commented Dec 6, 2020

Related issue: introduced by #2555

Type of change: paying off technical debt

Impact: no functional change

Development Phase: implementation

Release Notes
fix compile warnings:

[warn] /rocket-chip/src/main/scala/rocket/DCache.scala:141:31: match may not be exhaustive.
[warn] It would fail on the following input: CreditedCrossing(_, _)
[warn]     val a_queue_depth = outer.crossing match {
[warn]                               ^
[warn] /rocket-chip/src/main/scala/rocket/DCache.scala:1064:32: match may not be exhaustive.
[warn] It would fail on the following input: CreditedCrossing(_, _)
[warn]     val beatsBeforeEnd = outer.crossing match {
[warn]                                ^

@ingallsj ingallsj requested a review from terpstra December 6, 2020 01:00
@ingallsj ingallsj merged commit 16ba330 into master Dec 7, 2020
@ingallsj ingallsj deleted the Warn-CreditedCrossing branch December 7, 2020 20:35
SingularityKChen added a commit to SingularityKChen/rocket-chip that referenced this pull request Dec 26, 2022
+ Remove parenthesized forms of asUInt(), asSInt(), orR(), andR(), zext();
+ Replace getPorts with DataMirror.modulePorts;
+ Replace MultiIOModule with Module;
+ Remove stop with non-zero return code;
SingularityKChen added a commit to SingularityKChen/rocket-chip that referenced this pull request Jan 5, 2023
+ Remove parenthesized forms of asUInt(), asSInt(), orR(), andR(), zext();
+ Replace getPorts with DataMirror.modulePorts;
+ Replace MultiIOModule with Module;
+ Remove stop with non-zero return code;
SingularityKChen added a commit to SingularityKChen/rocket-chip that referenced this pull request Jan 5, 2023
+ Replace MultiIOModule with Module;
SingularityKChen added a commit to SingularityKChen/rocket-chip that referenced this pull request Jan 5, 2023
+ Remove parenthesized forms of asUInt(), asSInt(), orR(), andR(), zext();
SingularityKChen added a commit to SingularityKChen/rocket-chip that referenced this pull request Jan 5, 2023
+ Replace getPorts with DataMirror.modulePorts;
+ remove EnhancedChisel3Assign;
+ using .waiveAll and .squeezeAll;
SingularityKChen added a commit to SingularityKChen/rocket-chip that referenced this pull request Jan 7, 2023
+ Replace MultiIOModule with Module;
SingularityKChen added a commit to SingularityKChen/rocket-chip that referenced this pull request Jan 7, 2023
+ remove EnhancedChisel3Assign;
+ using .waiveAll and .squeezeAll;
SingularityKChen added a commit to SingularityKChen/rocket-chip that referenced this pull request Jan 7, 2023
+ remove EnhancedChisel3Assign;
+ using .waiveAll and .squeezeAll;
ZenithalHourlyRate pushed a commit that referenced this pull request Feb 10, 2023
+ remove EnhancedChisel3Assign;
+ using .waiveAll and .squeezeAll;
sequencer added a commit that referenced this pull request Feb 15, 2023
SingularityKChen added a commit to SingularityKChen/rocket-chip that referenced this pull request Feb 17, 2023
+ remove EnhancedChisel3Assign;
+ using .waiveAll and .squeezeAll;
SingularityKChen added a commit to SingularityKChen/rocket-chip that referenced this pull request Feb 17, 2023
+ remove EnhancedChisel3Assign;
+ using .waiveAll and .squeezeAll;
SingularityKChen added a commit to SingularityKChen/rocket-chip that referenced this pull request Feb 17, 2023
+ remove EnhancedChisel3Assign;
+ using .waiveAll and .squeezeAll;
SingularityKChen added a commit to SingularityKChen/rocket-chip that referenced this pull request Feb 17, 2023
+ remove EnhancedChisel3Assign;
+ using .waiveAll and .squeezeAll;
SingularityKChen added a commit to SingularityKChen/rocket-chip that referenced this pull request Feb 27, 2023
+ remove EnhancedChisel3Assign;
+ using .waiveAll and .squeezeAll;
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2 participants