From a44dc5202679f819ea2a9a8fe85b6bb123d02caa Mon Sep 17 00:00:00 2001 From: Jerry Zhao Date: Tue, 26 Sep 2023 10:32:37 -0700 Subject: [PATCH] Remove SCIE interface (cherry picked from commit d4775722a73567986637735ef79c1dbf650b6a28) --- src/main/scala/rocket/IDecode.scala | 699 ++++++++++++------------- src/main/scala/rocket/RocketCore.scala | 51 +- src/main/scala/scie/SCIE.scala | 206 -------- src/main/scala/tile/Core.scala | 2 - 4 files changed, 351 insertions(+), 607 deletions(-) delete mode 100644 src/main/scala/scie/SCIE.scala diff --git a/src/main/scala/rocket/IDecode.scala b/src/main/scala/rocket/IDecode.scala index d75be986481..50db5dda926 100644 --- a/src/main/scala/rocket/IDecode.scala +++ b/src/main/scala/rocket/IDecode.scala @@ -7,7 +7,6 @@ import chisel3._ import chisel3.util._ import org.chipsalliance.cde.config.Parameters import freechips.rocketchip.util._ -import freechips.rocketchip.scie.SCIE import Instructions._ import CustomInstructions._ @@ -26,7 +25,6 @@ class IntCtrlSigs(aluFn: ALUFN = ALUFN())(implicit val p: Parameters) extends Bu val jalr = Bool() val rxs2 = Bool() val rxs1 = Bool() - val scie = Bool() val zbk = Bool() val zkn = Bool() val zks = Bool() @@ -51,19 +49,19 @@ class IntCtrlSigs(aluFn: ALUFN = ALUFN())(implicit val p: Parameters) extends Bu val dp = Bool() def default: List[BitPat] = - // jal renf1 fence.i - // val | jalr | renf2 | - // | fp_val| | renx2 | | renf3 | - // | | rocc| | | renx1 s_alu1 mem_val | | | wfd | - // | | | br| | | | scie s_alu2 | imm dw alu | mem_cmd | | | | mul | - // | | | | | | | | | zbk | | | | | | | | | | | | div | fence - // | | | | | | | | | | zkn | | | | | | | | | | | | | wxd | | amo - // | | | | | | | | | | | zks | | | | | | | | | | | | | | | | | dp - List(N,X,X,X,X,X,X,X,X,X,X,X, A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, X,X,X,X,X,X,X,CSR.X,X,X,X,X) + // jal renf1 fence.i + // val | jalr | renf2 | + // | fp_val| | renx2 | | renf3 | + // | | rocc| | | renx1 s_alu1 mem_val | | | wfd | + // | | | br| | | | s_alu2 | imm dw alu | mem_cmd | | | | mul | + // | | | | | | | | zbk | | | | | | | | | | | | div | fence + // | | | | | | | | | zkn | | | | | | | | | | | | | wxd | | amo + // | | | | | | | | | | zks | | | | | | | | | | | | | | | | | dp + List(N,X,X,X,X,X,X,X,X,X,X, A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, X,X,X,X,X,X,X,CSR.X,X,X,X,X) def decode(inst: UInt, table: Iterable[(BitPat, List[BitPat])]) = { val decoder = DecodeLogic(inst, default, table) - val sigs = Seq(legal, fp, rocc, branch, jal, jalr, rxs2, rxs1, scie, zbk, zkn, zks, sel_alu2, + val sigs = Seq(legal, fp, rocc, branch, jal, jalr, rxs2, rxs1, zbk, zkn, zks, sel_alu2, sel_alu1, sel_imm, alu_dw, alu_fn, mem, mem_cmd, rfs1, rfs2, rfs3, wfd, mul, div, wxd, csr, fence_i, fence, amo, dp) sigs zip decoder map {case(s,d) => s := d} @@ -74,62 +72,62 @@ class IntCtrlSigs(aluFn: ALUFN = ALUFN())(implicit val p: Parameters) extends Bu class IDecode(aluFn: ALUFN = ALUFN())(implicit val p: Parameters) extends DecodeConstants { val table: Array[(BitPat, List[BitPat])] = Array( - BNE-> List(Y,N,N,Y,N,N,Y,Y,N,N,N,N,A2_RS2, A1_RS1, IMM_SB,DW_XPR,aluFn.FN_SNE, N,M_X, N,N,N,N,N,N,N,CSR.N,N,N,N,N), - BEQ-> List(Y,N,N,Y,N,N,Y,Y,N,N,N,N,A2_RS2, A1_RS1, IMM_SB,DW_XPR,aluFn.FN_SEQ, N,M_X, N,N,N,N,N,N,N,CSR.N,N,N,N,N), - BLT-> List(Y,N,N,Y,N,N,Y,Y,N,N,N,N,A2_RS2, A1_RS1, IMM_SB,DW_XPR,aluFn.FN_SLT, N,M_X, N,N,N,N,N,N,N,CSR.N,N,N,N,N), - BLTU-> List(Y,N,N,Y,N,N,Y,Y,N,N,N,N,A2_RS2, A1_RS1, IMM_SB,DW_XPR,aluFn.FN_SLTU, N,M_X, N,N,N,N,N,N,N,CSR.N,N,N,N,N), - BGE-> List(Y,N,N,Y,N,N,Y,Y,N,N,N,N,A2_RS2, A1_RS1, IMM_SB,DW_XPR,aluFn.FN_SGE, N,M_X, N,N,N,N,N,N,N,CSR.N,N,N,N,N), - BGEU-> List(Y,N,N,Y,N,N,Y,Y,N,N,N,N,A2_RS2, A1_RS1, IMM_SB,DW_XPR,aluFn.FN_SGEU, N,M_X, N,N,N,N,N,N,N,CSR.N,N,N,N,N), - - JAL-> List(Y,N,N,N,Y,N,N,N,N,N,N,N,A2_SIZE,A1_PC, IMM_UJ,DW_XPR,aluFn.FN_ADD, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - JALR-> List(Y,N,N,N,N,Y,N,Y,N,N,N,N,A2_IMM, A1_RS1, IMM_I, DW_XPR,aluFn.FN_ADD, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - AUIPC-> List(Y,N,N,N,N,N,N,N,N,N,N,N,A2_IMM, A1_PC, IMM_U, DW_XPR,aluFn.FN_ADD, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - - LB-> List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_IMM, A1_RS1, IMM_I, DW_XPR,aluFn.FN_ADD, Y,M_XRD, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - LH-> List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_IMM, A1_RS1, IMM_I, DW_XPR,aluFn.FN_ADD, Y,M_XRD, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - LW-> List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_IMM, A1_RS1, IMM_I, DW_XPR,aluFn.FN_ADD, Y,M_XRD, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - LBU-> List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_IMM, A1_RS1, IMM_I, DW_XPR,aluFn.FN_ADD, Y,M_XRD, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - LHU-> List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_IMM, A1_RS1, IMM_I, DW_XPR,aluFn.FN_ADD, Y,M_XRD, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - SB-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_IMM, A1_RS1, IMM_S, DW_XPR,aluFn.FN_ADD, Y,M_XWR, N,N,N,N,N,N,N,CSR.N,N,N,N,N), - SH-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_IMM, A1_RS1, IMM_S, DW_XPR,aluFn.FN_ADD, Y,M_XWR, N,N,N,N,N,N,N,CSR.N,N,N,N,N), - SW-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_IMM, A1_RS1, IMM_S, DW_XPR,aluFn.FN_ADD, Y,M_XWR, N,N,N,N,N,N,N,CSR.N,N,N,N,N), - - LUI-> List(Y,N,N,N,N,N,N,N,N,N,N,N,A2_IMM, A1_ZERO,IMM_U, DW_XPR,aluFn.FN_ADD, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - ADDI-> List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_IMM, A1_RS1, IMM_I, DW_XPR,aluFn.FN_ADD, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - SLTI -> List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_IMM, A1_RS1, IMM_I, DW_XPR,aluFn.FN_SLT, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - SLTIU-> List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_IMM, A1_RS1, IMM_I, DW_XPR,aluFn.FN_SLTU, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - ANDI-> List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_IMM, A1_RS1, IMM_I, DW_XPR,aluFn.FN_AND, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - ORI-> List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_IMM, A1_RS1, IMM_I, DW_XPR,aluFn.FN_OR, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - XORI-> List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_IMM, A1_RS1, IMM_I, DW_XPR,aluFn.FN_XOR, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - ADD-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_RS2, A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - SUB-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_RS2, A1_RS1, IMM_X, DW_XPR,aluFn.FN_SUB, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - SLT-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_RS2, A1_RS1, IMM_X, DW_XPR,aluFn.FN_SLT, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - SLTU-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_RS2, A1_RS1, IMM_X, DW_XPR,aluFn.FN_SLTU, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - AND-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_RS2, A1_RS1, IMM_X, DW_XPR,aluFn.FN_AND, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - OR-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_RS2, A1_RS1, IMM_X, DW_XPR,aluFn.FN_OR, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - XOR-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_RS2, A1_RS1, IMM_X, DW_XPR,aluFn.FN_XOR, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - SLL-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_RS2, A1_RS1, IMM_X, DW_XPR,aluFn.FN_SL, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - SRL-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_RS2, A1_RS1, IMM_X, DW_XPR,aluFn.FN_SR, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - SRA-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_RS2, A1_RS1, IMM_X, DW_XPR,aluFn.FN_SRA, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - - FENCE-> List(Y,N,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, N,N,N,N,N,N,N,CSR.N,N,Y,N,N), - - ECALL-> List(Y,N,N,N,N,N,N,X,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, N,N,N,N,N,N,N,CSR.I,N,N,N,N), - EBREAK-> List(Y,N,N,N,N,N,N,X,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, N,N,N,N,N,N,N,CSR.I,N,N,N,N), - MRET-> List(Y,N,N,N,N,N,N,X,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, N,N,N,N,N,N,N,CSR.I,N,N,N,N), - WFI-> List(Y,N,N,N,N,N,N,X,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, N,N,N,N,N,N,N,CSR.I,N,N,N,N), - CSRRW-> List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, N,M_X, N,N,N,N,N,N,Y,CSR.W,N,N,N,N), - CSRRS-> List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, N,M_X, N,N,N,N,N,N,Y,CSR.S,N,N,N,N), - CSRRC-> List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, N,M_X, N,N,N,N,N,N,Y,CSR.C,N,N,N,N), - CSRRWI-> List(Y,N,N,N,N,N,N,N,N,N,N,N,A2_IMM, A1_ZERO,IMM_Z, DW_XPR,aluFn.FN_ADD, N,M_X, N,N,N,N,N,N,Y,CSR.W,N,N,N,N), - CSRRSI-> List(Y,N,N,N,N,N,N,N,N,N,N,N,A2_IMM, A1_ZERO,IMM_Z, DW_XPR,aluFn.FN_ADD, N,M_X, N,N,N,N,N,N,Y,CSR.S,N,N,N,N), - CSRRCI-> List(Y,N,N,N,N,N,N,N,N,N,N,N,A2_IMM, A1_ZERO,IMM_Z, DW_XPR,aluFn.FN_ADD, N,M_X, N,N,N,N,N,N,Y,CSR.C,N,N,N,N)) + BNE-> List(Y,N,N,Y,N,N,Y,Y,N,N,N,A2_RS2, A1_RS1, IMM_SB,DW_XPR,aluFn.FN_SNE, N,M_X, N,N,N,N,N,N,N,CSR.N,N,N,N,N), + BEQ-> List(Y,N,N,Y,N,N,Y,Y,N,N,N,A2_RS2, A1_RS1, IMM_SB,DW_XPR,aluFn.FN_SEQ, N,M_X, N,N,N,N,N,N,N,CSR.N,N,N,N,N), + BLT-> List(Y,N,N,Y,N,N,Y,Y,N,N,N,A2_RS2, A1_RS1, IMM_SB,DW_XPR,aluFn.FN_SLT, N,M_X, N,N,N,N,N,N,N,CSR.N,N,N,N,N), + BLTU-> List(Y,N,N,Y,N,N,Y,Y,N,N,N,A2_RS2, A1_RS1, IMM_SB,DW_XPR,aluFn.FN_SLTU, N,M_X, N,N,N,N,N,N,N,CSR.N,N,N,N,N), + BGE-> List(Y,N,N,Y,N,N,Y,Y,N,N,N,A2_RS2, A1_RS1, IMM_SB,DW_XPR,aluFn.FN_SGE, N,M_X, N,N,N,N,N,N,N,CSR.N,N,N,N,N), + BGEU-> List(Y,N,N,Y,N,N,Y,Y,N,N,N,A2_RS2, A1_RS1, IMM_SB,DW_XPR,aluFn.FN_SGEU, N,M_X, N,N,N,N,N,N,N,CSR.N,N,N,N,N), + + JAL-> List(Y,N,N,N,Y,N,N,N,N,N,N,A2_SIZE,A1_PC, IMM_UJ,DW_XPR,aluFn.FN_ADD, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + JALR-> List(Y,N,N,N,N,Y,N,Y,N,N,N,A2_IMM, A1_RS1, IMM_I, DW_XPR,aluFn.FN_ADD, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + AUIPC-> List(Y,N,N,N,N,N,N,N,N,N,N,A2_IMM, A1_PC, IMM_U, DW_XPR,aluFn.FN_ADD, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + + LB-> List(Y,N,N,N,N,N,N,Y,N,N,N,A2_IMM, A1_RS1, IMM_I, DW_XPR,aluFn.FN_ADD, Y,M_XRD, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + LH-> List(Y,N,N,N,N,N,N,Y,N,N,N,A2_IMM, A1_RS1, IMM_I, DW_XPR,aluFn.FN_ADD, Y,M_XRD, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + LW-> List(Y,N,N,N,N,N,N,Y,N,N,N,A2_IMM, A1_RS1, IMM_I, DW_XPR,aluFn.FN_ADD, Y,M_XRD, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + LBU-> List(Y,N,N,N,N,N,N,Y,N,N,N,A2_IMM, A1_RS1, IMM_I, DW_XPR,aluFn.FN_ADD, Y,M_XRD, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + LHU-> List(Y,N,N,N,N,N,N,Y,N,N,N,A2_IMM, A1_RS1, IMM_I, DW_XPR,aluFn.FN_ADD, Y,M_XRD, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + SB-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_IMM, A1_RS1, IMM_S, DW_XPR,aluFn.FN_ADD, Y,M_XWR, N,N,N,N,N,N,N,CSR.N,N,N,N,N), + SH-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_IMM, A1_RS1, IMM_S, DW_XPR,aluFn.FN_ADD, Y,M_XWR, N,N,N,N,N,N,N,CSR.N,N,N,N,N), + SW-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_IMM, A1_RS1, IMM_S, DW_XPR,aluFn.FN_ADD, Y,M_XWR, N,N,N,N,N,N,N,CSR.N,N,N,N,N), + + LUI-> List(Y,N,N,N,N,N,N,N,N,N,N,A2_IMM, A1_ZERO,IMM_U, DW_XPR,aluFn.FN_ADD, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + ADDI-> List(Y,N,N,N,N,N,N,Y,N,N,N,A2_IMM, A1_RS1, IMM_I, DW_XPR,aluFn.FN_ADD, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + SLTI -> List(Y,N,N,N,N,N,N,Y,N,N,N,A2_IMM, A1_RS1, IMM_I, DW_XPR,aluFn.FN_SLT, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + SLTIU-> List(Y,N,N,N,N,N,N,Y,N,N,N,A2_IMM, A1_RS1, IMM_I, DW_XPR,aluFn.FN_SLTU, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + ANDI-> List(Y,N,N,N,N,N,N,Y,N,N,N,A2_IMM, A1_RS1, IMM_I, DW_XPR,aluFn.FN_AND, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + ORI-> List(Y,N,N,N,N,N,N,Y,N,N,N,A2_IMM, A1_RS1, IMM_I, DW_XPR,aluFn.FN_OR, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + XORI-> List(Y,N,N,N,N,N,N,Y,N,N,N,A2_IMM, A1_RS1, IMM_I, DW_XPR,aluFn.FN_XOR, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + ADD-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_RS2, A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + SUB-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_RS2, A1_RS1, IMM_X, DW_XPR,aluFn.FN_SUB, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + SLT-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_RS2, A1_RS1, IMM_X, DW_XPR,aluFn.FN_SLT, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + SLTU-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_RS2, A1_RS1, IMM_X, DW_XPR,aluFn.FN_SLTU, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + AND-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_RS2, A1_RS1, IMM_X, DW_XPR,aluFn.FN_AND, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + OR-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_RS2, A1_RS1, IMM_X, DW_XPR,aluFn.FN_OR, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + XOR-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_RS2, A1_RS1, IMM_X, DW_XPR,aluFn.FN_XOR, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + SLL-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_RS2, A1_RS1, IMM_X, DW_XPR,aluFn.FN_SL, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + SRL-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_RS2, A1_RS1, IMM_X, DW_XPR,aluFn.FN_SR, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + SRA-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_RS2, A1_RS1, IMM_X, DW_XPR,aluFn.FN_SRA, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + + FENCE-> List(Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, N,N,N,N,N,N,N,CSR.N,N,Y,N,N), + + ECALL-> List(Y,N,N,N,N,N,N,X,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, N,N,N,N,N,N,N,CSR.I,N,N,N,N), + EBREAK-> List(Y,N,N,N,N,N,N,X,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, N,N,N,N,N,N,N,CSR.I,N,N,N,N), + MRET-> List(Y,N,N,N,N,N,N,X,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, N,N,N,N,N,N,N,CSR.I,N,N,N,N), + WFI-> List(Y,N,N,N,N,N,N,X,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, N,N,N,N,N,N,N,CSR.I,N,N,N,N), + CSRRW-> List(Y,N,N,N,N,N,N,Y,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, N,M_X, N,N,N,N,N,N,Y,CSR.W,N,N,N,N), + CSRRS-> List(Y,N,N,N,N,N,N,Y,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, N,M_X, N,N,N,N,N,N,Y,CSR.S,N,N,N,N), + CSRRC-> List(Y,N,N,N,N,N,N,Y,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, N,M_X, N,N,N,N,N,N,Y,CSR.C,N,N,N,N), + CSRRWI-> List(Y,N,N,N,N,N,N,N,N,N,N,A2_IMM, A1_ZERO,IMM_Z, DW_XPR,aluFn.FN_ADD, N,M_X, N,N,N,N,N,N,Y,CSR.W,N,N,N,N), + CSRRSI-> List(Y,N,N,N,N,N,N,N,N,N,N,A2_IMM, A1_ZERO,IMM_Z, DW_XPR,aluFn.FN_ADD, N,M_X, N,N,N,N,N,N,Y,CSR.S,N,N,N,N), + CSRRCI-> List(Y,N,N,N,N,N,N,N,N,N,N,A2_IMM, A1_ZERO,IMM_Z, DW_XPR,aluFn.FN_ADD, N,M_X, N,N,N,N,N,N,Y,CSR.C,N,N,N,N)) } class CeaseDecode(aluFn: ALUFN = ALUFN())(implicit val p: Parameters) extends DecodeConstants { val table: Array[(BitPat, List[BitPat])] = Array( - CEASE-> List(Y,N,N,N,N,N,N,X,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, N,N,N,N,N,N,N,CSR.I,N,N,N,N)) + CEASE-> List(Y,N,N,N,N,N,N,X,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, N,N,N,N,N,N,N,CSR.I,N,N,N,N)) } @@ -138,14 +136,14 @@ class FenceIDecode(flushDCache: Boolean, aluFn: ALUFN = ALUFN())(implicit val p: private val (v, cmd) = if (flushDCache) (Y, BitPat(M_FLUSH_ALL)) else (N, M_X) val table: Array[(BitPat, List[BitPat])] = Array( - FENCE_I-> List(Y,N,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, v,cmd, N,N,N,N,N,N,N,CSR.N,Y,Y,N,N)) + FENCE_I-> List(Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, v,cmd, N,N,N,N,N,N,N,CSR.N,Y,Y,N,N)) } class ConditionalZeroDecode(aluFn: ALUFN = ALUFN())(implicit val p: Parameters) extends DecodeConstants { val table: Array[(BitPat, List[BitPat])] = Array( - CZERO_EQZ-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_RS2, A1_RS1, IMM_X, DW_XPR,aluFn.FN_CZEQZ, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - CZERO_NEZ-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_RS2, A1_RS1, IMM_X, DW_XPR,aluFn.FN_CZNEZ, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) + CZERO_EQZ-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_RS2, A1_RS1, IMM_X, DW_XPR,aluFn.FN_CZEQZ, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + CZERO_NEZ-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_RS2, A1_RS1, IMM_X, DW_XPR,aluFn.FN_CZNEZ, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) } class CFlushDecode(supportsFlushLine: Boolean, aluFn: ALUFN = ALUFN())(implicit val p: Parameters) extends DecodeConstants @@ -154,94 +152,94 @@ class CFlushDecode(supportsFlushLine: Boolean, aluFn: ALUFN = ALUFN())(implicit val table: Array[(BitPat, List[BitPat])] = Array( zapRs1(CFLUSH_D_L1)-> - List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, Y,M_FLUSH_ALL,N,N,N,N,N,N,N,CSR.I,N,N,N,N), + List(Y,N,N,N,N,N,N,Y,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, Y,M_FLUSH_ALL,N,N,N,N,N,N,N,CSR.I,N,N,N,N), zapRs1(CDISCARD_D_L1)-> - List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, Y,M_FLUSH_ALL,N,N,N,N,N,N,N,CSR.I,N,N,N,N)) + List(Y,N,N,N,N,N,N,Y,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, Y,M_FLUSH_ALL,N,N,N,N,N,N,N,CSR.I,N,N,N,N)) } class SVMDecode(aluFn: ALUFN = ALUFN())(implicit val p: Parameters) extends DecodeConstants { val table: Array[(BitPat, List[BitPat])] = Array( - SFENCE_VMA->List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, Y,M_SFENCE, N,N,N,N,N,N,N,CSR.I,N,N,N,N)) + SFENCE_VMA->List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, Y,M_SFENCE, N,N,N,N,N,N,N,CSR.I,N,N,N,N)) } class SDecode(aluFn: ALUFN = ALUFN())(implicit val p: Parameters) extends DecodeConstants { val table: Array[(BitPat, List[BitPat])] = Array( - SRET-> List(Y,N,N,N,N,N,N,X,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, N,N,N,N,N,N,N,CSR.I,N,N,N,N)) + SRET-> List(Y,N,N,N,N,N,N,X,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, N,N,N,N,N,N,N,CSR.I,N,N,N,N)) } class HypervisorDecode(aluFn: ALUFN = ALUFN())(implicit val p: Parameters) extends DecodeConstants { val table: Array[(BitPat, List[BitPat])] = Array( - HFENCE_VVMA->List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR, aluFn.FN_ADD, Y,M_HFENCEV, N,N,N,N,N,N,N,CSR.I,N,N,N,N), - HFENCE_GVMA->List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR, aluFn.FN_ADD, Y,M_HFENCEG, N,N,N,N,N,N,N,CSR.I,N,N,N,N), + HFENCE_VVMA->List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR, aluFn.FN_ADD, Y,M_HFENCEV, N,N,N,N,N,N,N,CSR.I,N,N,N,N), + HFENCE_GVMA->List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR, aluFn.FN_ADD, Y,M_HFENCEG, N,N,N,N,N,N,N,CSR.I,N,N,N,N), - HLV_B -> List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_ZERO, A1_RS1, IMM_X, DW_XPR, aluFn.FN_ADD, Y,M_XRD, N,N,N,N,N,N,Y,CSR.I,N,N,N,N), - HLV_BU-> List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_ZERO, A1_RS1, IMM_X, DW_XPR, aluFn.FN_ADD, Y,M_XRD, N,N,N,N,N,N,Y,CSR.I,N,N,N,N), - HLV_H -> List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_ZERO, A1_RS1, IMM_X, DW_XPR, aluFn.FN_ADD, Y,M_XRD, N,N,N,N,N,N,Y,CSR.I,N,N,N,N), - HLV_HU-> List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_ZERO, A1_RS1, IMM_X, DW_XPR, aluFn.FN_ADD, Y,M_XRD, N,N,N,N,N,N,Y,CSR.I,N,N,N,N), - HLVX_HU-> List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_ZERO, A1_RS1, IMM_X, DW_XPR, aluFn.FN_ADD, Y,M_HLVX, N,N,N,N,N,N,Y,CSR.I,N,N,N,N), - HLV_W-> List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_ZERO, A1_RS1, IMM_X, DW_XPR, aluFn.FN_ADD, Y,M_XRD, N,N,N,N,N,N,Y,CSR.I,N,N,N,N), - HLVX_WU-> List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_ZERO, A1_RS1, IMM_X, DW_XPR, aluFn.FN_ADD, Y,M_HLVX, N,N,N,N,N,N,Y,CSR.I,N,N,N,N), + HLV_B -> List(Y,N,N,N,N,N,N,Y,N,N,N,A2_ZERO, A1_RS1, IMM_X, DW_XPR, aluFn.FN_ADD, Y,M_XRD, N,N,N,N,N,N,Y,CSR.I,N,N,N,N), + HLV_BU-> List(Y,N,N,N,N,N,N,Y,N,N,N,A2_ZERO, A1_RS1, IMM_X, DW_XPR, aluFn.FN_ADD, Y,M_XRD, N,N,N,N,N,N,Y,CSR.I,N,N,N,N), + HLV_H -> List(Y,N,N,N,N,N,N,Y,N,N,N,A2_ZERO, A1_RS1, IMM_X, DW_XPR, aluFn.FN_ADD, Y,M_XRD, N,N,N,N,N,N,Y,CSR.I,N,N,N,N), + HLV_HU-> List(Y,N,N,N,N,N,N,Y,N,N,N,A2_ZERO, A1_RS1, IMM_X, DW_XPR, aluFn.FN_ADD, Y,M_XRD, N,N,N,N,N,N,Y,CSR.I,N,N,N,N), + HLVX_HU-> List(Y,N,N,N,N,N,N,Y,N,N,N,A2_ZERO, A1_RS1, IMM_X, DW_XPR, aluFn.FN_ADD, Y,M_HLVX, N,N,N,N,N,N,Y,CSR.I,N,N,N,N), + HLV_W-> List(Y,N,N,N,N,N,N,Y,N,N,N,A2_ZERO, A1_RS1, IMM_X, DW_XPR, aluFn.FN_ADD, Y,M_XRD, N,N,N,N,N,N,Y,CSR.I,N,N,N,N), + HLVX_WU-> List(Y,N,N,N,N,N,N,Y,N,N,N,A2_ZERO, A1_RS1, IMM_X, DW_XPR, aluFn.FN_ADD, Y,M_HLVX, N,N,N,N,N,N,Y,CSR.I,N,N,N,N), - HSV_B-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_ZERO, A1_RS1, IMM_I, DW_XPR, aluFn.FN_ADD, Y,M_XWR, N,N,N,N,N,N,N,CSR.I,N,N,N,N), - HSV_H-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_ZERO, A1_RS1, IMM_I, DW_XPR, aluFn.FN_ADD, Y,M_XWR, N,N,N,N,N,N,N,CSR.I,N,N,N,N), - HSV_W-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_ZERO, A1_RS1, IMM_I, DW_XPR, aluFn.FN_ADD, Y,M_XWR, N,N,N,N,N,N,N,CSR.I,N,N,N,N)) + HSV_B-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_ZERO, A1_RS1, IMM_I, DW_XPR, aluFn.FN_ADD, Y,M_XWR, N,N,N,N,N,N,N,CSR.I,N,N,N,N), + HSV_H-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_ZERO, A1_RS1, IMM_I, DW_XPR, aluFn.FN_ADD, Y,M_XWR, N,N,N,N,N,N,N,CSR.I,N,N,N,N), + HSV_W-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_ZERO, A1_RS1, IMM_I, DW_XPR, aluFn.FN_ADD, Y,M_XWR, N,N,N,N,N,N,N,CSR.I,N,N,N,N)) } class DebugDecode(aluFn: ALUFN = ALUFN())(implicit val p: Parameters) extends DecodeConstants { val table: Array[(BitPat, List[BitPat])] = Array( - DRET-> List(Y,N,N,N,N,N,N,X,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, N,N,N,N,N,N,N,CSR.I,N,N,N,N)) + DRET-> List(Y,N,N,N,N,N,N,X,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, N,N,N,N,N,N,N,CSR.I,N,N,N,N)) } class NMIDecode(aluFn: ALUFN = ALUFN())(implicit val p: Parameters) extends DecodeConstants { val table: Array[(BitPat, List[BitPat])] = Array( - MNRET-> List(Y,N,N,N,N,N,N,X,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, N,N,N,N,N,N,N,CSR.I,N,N,N,N)) + MNRET-> List(Y,N,N,N,N,N,N,X,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, N,N,N,N,N,N,N,CSR.I,N,N,N,N)) } class I32Decode(aluFn: ALUFN = ALUFN())(implicit val p: Parameters) extends DecodeConstants { val table: Array[(BitPat, List[BitPat])] = Array( Instructions32.SLLI-> - List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_IMM, A1_RS1, IMM_I, DW_XPR,aluFn.FN_SL, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + List(Y,N,N,N,N,N,N,Y,N,N,N,A2_IMM, A1_RS1, IMM_I, DW_XPR,aluFn.FN_SL, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), Instructions32.SRLI-> - List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_IMM, A1_RS1, IMM_I, DW_XPR,aluFn.FN_SR, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + List(Y,N,N,N,N,N,N,Y,N,N,N,A2_IMM, A1_RS1, IMM_I, DW_XPR,aluFn.FN_SR, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), Instructions32.SRAI-> - List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_IMM, A1_RS1, IMM_I, DW_XPR,aluFn.FN_SRA, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) + List(Y,N,N,N,N,N,N,Y,N,N,N,A2_IMM, A1_RS1, IMM_I, DW_XPR,aluFn.FN_SRA, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) } class I64Decode(aluFn: ALUFN = ALUFN())(implicit val p: Parameters) extends DecodeConstants { val table: Array[(BitPat, List[BitPat])] = Array( - LD-> List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_IMM, A1_RS1, IMM_I, DW_XPR,aluFn.FN_ADD, Y,M_XRD, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - LWU-> List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_IMM, A1_RS1, IMM_I, DW_XPR,aluFn.FN_ADD, Y,M_XRD, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - SD-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_IMM, A1_RS1, IMM_S, DW_XPR,aluFn.FN_ADD, Y,M_XWR, N,N,N,N,N,N,N,CSR.N,N,N,N,N), + LD-> List(Y,N,N,N,N,N,N,Y,N,N,N,A2_IMM, A1_RS1, IMM_I, DW_XPR,aluFn.FN_ADD, Y,M_XRD, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + LWU-> List(Y,N,N,N,N,N,N,Y,N,N,N,A2_IMM, A1_RS1, IMM_I, DW_XPR,aluFn.FN_ADD, Y,M_XRD, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + SD-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_IMM, A1_RS1, IMM_S, DW_XPR,aluFn.FN_ADD, Y,M_XWR, N,N,N,N,N,N,N,CSR.N,N,N,N,N), - SLLI-> List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_IMM, A1_RS1, IMM_I, DW_XPR,aluFn.FN_SL, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - SRLI-> List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_IMM, A1_RS1, IMM_I, DW_XPR,aluFn.FN_SR, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - SRAI-> List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_IMM, A1_RS1, IMM_I, DW_XPR,aluFn.FN_SRA, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + SLLI-> List(Y,N,N,N,N,N,N,Y,N,N,N,A2_IMM, A1_RS1, IMM_I, DW_XPR,aluFn.FN_SL, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + SRLI-> List(Y,N,N,N,N,N,N,Y,N,N,N,A2_IMM, A1_RS1, IMM_I, DW_XPR,aluFn.FN_SR, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + SRAI-> List(Y,N,N,N,N,N,N,Y,N,N,N,A2_IMM, A1_RS1, IMM_I, DW_XPR,aluFn.FN_SRA, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - ADDIW-> List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_IMM, A1_RS1, IMM_I, DW_32,aluFn.FN_ADD, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - SLLIW-> List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_IMM, A1_RS1, IMM_I, DW_32,aluFn.FN_SL, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - SRLIW-> List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_IMM, A1_RS1, IMM_I, DW_32,aluFn.FN_SR, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - SRAIW-> List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_IMM, A1_RS1, IMM_I, DW_32,aluFn.FN_SRA, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - ADDW-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_RS2, A1_RS1, IMM_X, DW_32,aluFn.FN_ADD, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - SUBW-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_RS2, A1_RS1, IMM_X, DW_32,aluFn.FN_SUB, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - SLLW-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_RS2, A1_RS1, IMM_X, DW_32,aluFn.FN_SL, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - SRLW-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_RS2, A1_RS1, IMM_X, DW_32,aluFn.FN_SR, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - SRAW-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_RS2, A1_RS1, IMM_X, DW_32,aluFn.FN_SRA, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) + ADDIW-> List(Y,N,N,N,N,N,N,Y,N,N,N,A2_IMM, A1_RS1, IMM_I, DW_32,aluFn.FN_ADD, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + SLLIW-> List(Y,N,N,N,N,N,N,Y,N,N,N,A2_IMM, A1_RS1, IMM_I, DW_32,aluFn.FN_SL, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + SRLIW-> List(Y,N,N,N,N,N,N,Y,N,N,N,A2_IMM, A1_RS1, IMM_I, DW_32,aluFn.FN_SR, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + SRAIW-> List(Y,N,N,N,N,N,N,Y,N,N,N,A2_IMM, A1_RS1, IMM_I, DW_32,aluFn.FN_SRA, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + ADDW-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_RS2, A1_RS1, IMM_X, DW_32,aluFn.FN_ADD, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + SUBW-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_RS2, A1_RS1, IMM_X, DW_32,aluFn.FN_SUB, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + SLLW-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_RS2, A1_RS1, IMM_X, DW_32,aluFn.FN_SL, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + SRLW-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_RS2, A1_RS1, IMM_X, DW_32,aluFn.FN_SR, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + SRAW-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_RS2, A1_RS1, IMM_X, DW_32,aluFn.FN_SRA, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) } class Hypervisor64Decode(aluFn: ALUFN = ALUFN())(implicit val p: Parameters) extends DecodeConstants { val table: Array[(BitPat, List[BitPat])] = Array( - HLV_D-> List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_ZERO, A1_RS1, IMM_X, DW_XPR, aluFn.FN_ADD, Y,M_XRD, N,N,N,N,N,N,Y,CSR.I,N,N,N,N), - HSV_D-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_ZERO, A1_RS1, IMM_I, DW_XPR, aluFn.FN_ADD, Y,M_XWR, N,N,N,N,N,N,N,CSR.I,N,N,N,N), - HLV_WU-> List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_ZERO, A1_RS1, IMM_X, DW_XPR, aluFn.FN_ADD, Y,M_XRD, N,N,N,N,N,N,Y,CSR.I,N,N,N,N)) + HLV_D-> List(Y,N,N,N,N,N,N,Y,N,N,N,A2_ZERO, A1_RS1, IMM_X, DW_XPR, aluFn.FN_ADD, Y,M_XRD, N,N,N,N,N,N,Y,CSR.I,N,N,N,N), + HSV_D-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_ZERO, A1_RS1, IMM_I, DW_XPR, aluFn.FN_ADD, Y,M_XWR, N,N,N,N,N,N,N,CSR.I,N,N,N,N), + HLV_WU-> List(Y,N,N,N,N,N,N,Y,N,N,N,A2_ZERO, A1_RS1, IMM_X, DW_XPR, aluFn.FN_ADD, Y,M_XRD, N,N,N,N,N,N,Y,CSR.I,N,N,N,N)) } class MDecode(pipelinedMul: Boolean, aluFn: ALUFN = ALUFN())(implicit val p: Parameters) extends DecodeConstants @@ -249,15 +247,15 @@ class MDecode(pipelinedMul: Boolean, aluFn: ALUFN = ALUFN())(implicit val p: Par val M = if (pipelinedMul) Y else N val D = if (pipelinedMul) N else Y val table: Array[(BitPat, List[BitPat])] = Array( - MUL-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_RS2, A1_RS1, IMM_X, DW_XPR,aluFn.FN_MUL, N,M_X, N,N,N,N,M,D,Y,CSR.N,N,N,N,N), - MULH-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_RS2, A1_RS1, IMM_X, DW_XPR,aluFn.FN_MULH, N,M_X, N,N,N,N,M,D,Y,CSR.N,N,N,N,N), - MULHU-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_RS2, A1_RS1, IMM_X, DW_XPR,aluFn.FN_MULHU, N,M_X, N,N,N,N,M,D,Y,CSR.N,N,N,N,N), - MULHSU-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_RS2, A1_RS1, IMM_X, DW_XPR,aluFn.FN_MULHSU,N,M_X, N,N,N,N,M,D,Y,CSR.N,N,N,N,N), + MUL-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_RS2, A1_RS1, IMM_X, DW_XPR,aluFn.FN_MUL, N,M_X, N,N,N,N,M,D,Y,CSR.N,N,N,N,N), + MULH-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_RS2, A1_RS1, IMM_X, DW_XPR,aluFn.FN_MULH, N,M_X, N,N,N,N,M,D,Y,CSR.N,N,N,N,N), + MULHU-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_RS2, A1_RS1, IMM_X, DW_XPR,aluFn.FN_MULHU, N,M_X, N,N,N,N,M,D,Y,CSR.N,N,N,N,N), + MULHSU-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_RS2, A1_RS1, IMM_X, DW_XPR,aluFn.FN_MULHSU,N,M_X, N,N,N,N,M,D,Y,CSR.N,N,N,N,N), - DIV-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_RS2, A1_RS1, IMM_X, DW_XPR,aluFn.FN_DIV, N,M_X, N,N,N,N,N,Y,Y,CSR.N,N,N,N,N), - DIVU-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_RS2, A1_RS1, IMM_X, DW_XPR,aluFn.FN_DIVU, N,M_X, N,N,N,N,N,Y,Y,CSR.N,N,N,N,N), - REM-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_RS2, A1_RS1, IMM_X, DW_XPR,aluFn.FN_REM, N,M_X, N,N,N,N,N,Y,Y,CSR.N,N,N,N,N), - REMU-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_RS2, A1_RS1, IMM_X, DW_XPR,aluFn.FN_REMU, N,M_X, N,N,N,N,N,Y,Y,CSR.N,N,N,N,N)) + DIV-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_RS2, A1_RS1, IMM_X, DW_XPR,aluFn.FN_DIV, N,M_X, N,N,N,N,N,Y,Y,CSR.N,N,N,N,N), + DIVU-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_RS2, A1_RS1, IMM_X, DW_XPR,aluFn.FN_DIVU, N,M_X, N,N,N,N,N,Y,Y,CSR.N,N,N,N,N), + REM-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_RS2, A1_RS1, IMM_X, DW_XPR,aluFn.FN_REM, N,M_X, N,N,N,N,N,Y,Y,CSR.N,N,N,N,N), + REMU-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_RS2, A1_RS1, IMM_X, DW_XPR,aluFn.FN_REMU, N,M_X, N,N,N,N,N,Y,Y,CSR.N,N,N,N,N)) } class M64Decode(pipelinedMul: Boolean, aluFn: ALUFN = ALUFN())(implicit val p: Parameters) extends DecodeConstants @@ -265,184 +263,177 @@ class M64Decode(pipelinedMul: Boolean, aluFn: ALUFN = ALUFN())(implicit val p: P val M = if (pipelinedMul) Y else N val D = if (pipelinedMul) N else Y val table: Array[(BitPat, List[BitPat])] = Array( - MULW-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_RS2, A1_RS1, IMM_X, DW_32, aluFn.FN_MUL, N,M_X, N,N,N,N,M,D,Y,CSR.N,N,N,N,N), + MULW-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_RS2, A1_RS1, IMM_X, DW_32, aluFn.FN_MUL, N,M_X, N,N,N,N,M,D,Y,CSR.N,N,N,N,N), - DIVW-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_RS2, A1_RS1, IMM_X, DW_32, aluFn.FN_DIV, N,M_X, N,N,N,N,N,Y,Y,CSR.N,N,N,N,N), - DIVUW-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_RS2, A1_RS1, IMM_X, DW_32, aluFn.FN_DIVU, N,M_X, N,N,N,N,N,Y,Y,CSR.N,N,N,N,N), - REMW-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_RS2, A1_RS1, IMM_X, DW_32, aluFn.FN_REM, N,M_X, N,N,N,N,N,Y,Y,CSR.N,N,N,N,N), - REMUW-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_RS2, A1_RS1, IMM_X, DW_32, aluFn.FN_REMU, N,M_X, N,N,N,N,N,Y,Y,CSR.N,N,N,N,N)) + DIVW-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_RS2, A1_RS1, IMM_X, DW_32, aluFn.FN_DIV, N,M_X, N,N,N,N,N,Y,Y,CSR.N,N,N,N,N), + DIVUW-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_RS2, A1_RS1, IMM_X, DW_32, aluFn.FN_DIVU, N,M_X, N,N,N,N,N,Y,Y,CSR.N,N,N,N,N), + REMW-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_RS2, A1_RS1, IMM_X, DW_32, aluFn.FN_REM, N,M_X, N,N,N,N,N,Y,Y,CSR.N,N,N,N,N), + REMUW-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_RS2, A1_RS1, IMM_X, DW_32, aluFn.FN_REMU, N,M_X, N,N,N,N,N,Y,Y,CSR.N,N,N,N,N)) } class ADecode(aluFn: ALUFN = ALUFN())(implicit val p: Parameters) extends DecodeConstants { val table: Array[(BitPat, List[BitPat])] = Array( - AMOADD_W-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, Y,M_XA_ADD, N,N,N,N,N,N,Y,CSR.N,N,N,Y,N), - AMOXOR_W-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, Y,M_XA_XOR, N,N,N,N,N,N,Y,CSR.N,N,N,Y,N), - AMOSWAP_W-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, Y,M_XA_SWAP, N,N,N,N,N,N,Y,CSR.N,N,N,Y,N), - AMOAND_W-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, Y,M_XA_AND, N,N,N,N,N,N,Y,CSR.N,N,N,Y,N), - AMOOR_W-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, Y,M_XA_OR, N,N,N,N,N,N,Y,CSR.N,N,N,Y,N), - AMOMIN_W-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, Y,M_XA_MIN, N,N,N,N,N,N,Y,CSR.N,N,N,Y,N), - AMOMINU_W-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, Y,M_XA_MINU, N,N,N,N,N,N,Y,CSR.N,N,N,Y,N), - AMOMAX_W-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, Y,M_XA_MAX, N,N,N,N,N,N,Y,CSR.N,N,N,Y,N), - AMOMAXU_W-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, Y,M_XA_MAXU, N,N,N,N,N,N,Y,CSR.N,N,N,Y,N), + AMOADD_W-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, Y,M_XA_ADD, N,N,N,N,N,N,Y,CSR.N,N,N,Y,N), + AMOXOR_W-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, Y,M_XA_XOR, N,N,N,N,N,N,Y,CSR.N,N,N,Y,N), + AMOSWAP_W-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, Y,M_XA_SWAP, N,N,N,N,N,N,Y,CSR.N,N,N,Y,N), + AMOAND_W-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, Y,M_XA_AND, N,N,N,N,N,N,Y,CSR.N,N,N,Y,N), + AMOOR_W-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, Y,M_XA_OR, N,N,N,N,N,N,Y,CSR.N,N,N,Y,N), + AMOMIN_W-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, Y,M_XA_MIN, N,N,N,N,N,N,Y,CSR.N,N,N,Y,N), + AMOMINU_W-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, Y,M_XA_MINU, N,N,N,N,N,N,Y,CSR.N,N,N,Y,N), + AMOMAX_W-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, Y,M_XA_MAX, N,N,N,N,N,N,Y,CSR.N,N,N,Y,N), + AMOMAXU_W-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, Y,M_XA_MAXU, N,N,N,N,N,N,Y,CSR.N,N,N,Y,N), - LR_W-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, Y,M_XLR, N,N,N,N,N,N,Y,CSR.N,N,N,Y,N), - SC_W-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, Y,M_XSC, N,N,N,N,N,N,Y,CSR.N,N,N,Y,N)) + LR_W-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, Y,M_XLR, N,N,N,N,N,N,Y,CSR.N,N,N,Y,N), + SC_W-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, Y,M_XSC, N,N,N,N,N,N,Y,CSR.N,N,N,Y,N)) } class A64Decode(aluFn: ALUFN = ALUFN())(implicit val p: Parameters) extends DecodeConstants { val table: Array[(BitPat, List[BitPat])] = Array( - AMOADD_D-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, Y,M_XA_ADD, N,N,N,N,N,N,Y,CSR.N,N,N,Y,N), - AMOSWAP_D-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, Y,M_XA_SWAP, N,N,N,N,N,N,Y,CSR.N,N,N,Y,N), - AMOXOR_D-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, Y,M_XA_XOR, N,N,N,N,N,N,Y,CSR.N,N,N,Y,N), - AMOAND_D-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, Y,M_XA_AND, N,N,N,N,N,N,Y,CSR.N,N,N,Y,N), - AMOOR_D-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, Y,M_XA_OR, N,N,N,N,N,N,Y,CSR.N,N,N,Y,N), - AMOMIN_D-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, Y,M_XA_MIN, N,N,N,N,N,N,Y,CSR.N,N,N,Y,N), - AMOMINU_D-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, Y,M_XA_MINU, N,N,N,N,N,N,Y,CSR.N,N,N,Y,N), - AMOMAX_D-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, Y,M_XA_MAX, N,N,N,N,N,N,Y,CSR.N,N,N,Y,N), - AMOMAXU_D-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, Y,M_XA_MAXU, N,N,N,N,N,N,Y,CSR.N,N,N,Y,N), + AMOADD_D-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, Y,M_XA_ADD, N,N,N,N,N,N,Y,CSR.N,N,N,Y,N), + AMOSWAP_D-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, Y,M_XA_SWAP, N,N,N,N,N,N,Y,CSR.N,N,N,Y,N), + AMOXOR_D-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, Y,M_XA_XOR, N,N,N,N,N,N,Y,CSR.N,N,N,Y,N), + AMOAND_D-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, Y,M_XA_AND, N,N,N,N,N,N,Y,CSR.N,N,N,Y,N), + AMOOR_D-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, Y,M_XA_OR, N,N,N,N,N,N,Y,CSR.N,N,N,Y,N), + AMOMIN_D-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, Y,M_XA_MIN, N,N,N,N,N,N,Y,CSR.N,N,N,Y,N), + AMOMINU_D-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, Y,M_XA_MINU, N,N,N,N,N,N,Y,CSR.N,N,N,Y,N), + AMOMAX_D-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, Y,M_XA_MAX, N,N,N,N,N,N,Y,CSR.N,N,N,Y,N), + AMOMAXU_D-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, Y,M_XA_MAXU, N,N,N,N,N,N,Y,CSR.N,N,N,Y,N), - LR_D-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, Y,M_XLR, N,N,N,N,N,N,Y,CSR.N,N,N,Y,N), - SC_D-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, Y,M_XSC, N,N,N,N,N,N,Y,CSR.N,N,N,Y,N)) + LR_D-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, Y,M_XLR, N,N,N,N,N,N,Y,CSR.N,N,N,Y,N), + SC_D-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, Y,M_XSC, N,N,N,N,N,N,Y,CSR.N,N,N,Y,N)) } class HDecode(aluFn: ALUFN = ALUFN())(implicit val p: Parameters) extends DecodeConstants { val table: Array[(BitPat, List[BitPat])] = Array( - FCVT_S_H-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,N,N,Y,N,N,N,CSR.N,N,N,N,N), - FCVT_H_S-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,N,N,Y,N,N,N,CSR.N,N,N,N,N), - FSGNJ_H-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,Y,N,N,N,CSR.N,N,N,N,N), - FSGNJX_H-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,Y,N,N,N,CSR.N,N,N,N,N), - FSGNJN_H-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,Y,N,N,N,CSR.N,N,N,N,N), - FMIN_H-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,Y,N,N,N,CSR.N,N,N,N,N), - FMAX_H-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,Y,N,N,N,CSR.N,N,N,N,N), - FADD_H-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,Y,N,N,N,CSR.N,N,N,N,N), - FSUB_H-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,Y,N,N,N,CSR.N,N,N,N,N), - FMUL_H-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,Y,N,N,N,CSR.N,N,N,N,N), - FMADD_H-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,Y,Y,N,N,N,CSR.N,N,N,N,N), - FMSUB_H-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,Y,Y,N,N,N,CSR.N,N,N,N,N), - FNMADD_H-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,Y,Y,N,N,N,CSR.N,N,N,N,N), - FNMSUB_H-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,Y,Y,N,N,N,CSR.N,N,N,N,N), - FCLASS_H-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,N,N,N,N,N,Y,CSR.N,N,N,N,N), - FMV_X_H-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,N,N,N,N,N,Y,CSR.N,N,N,N,N), - FCVT_W_H-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,N,N,N,N,N,Y,CSR.N,N,N,N,N), - FCVT_WU_H-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,N,N,N,N,N,Y,CSR.N,N,N,N,N), - FEQ_H-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,N,N,N,Y,CSR.N,N,N,N,N), - FLT_H-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,N,N,N,Y,CSR.N,N,N,N,N), - FLE_H-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,N,N,N,Y,CSR.N,N,N,N,N), - FMV_H_X-> List(Y,Y,N,N,N,N,N,Y,N,N,N,N,A2_X, A1_RS1, IMM_X, DW_X, aluFn.FN_X, N,M_X, N,N,N,Y,N,N,N,CSR.N,N,N,N,N), - FCVT_H_W-> List(Y,Y,N,N,N,N,N,Y,N,N,N,N,A2_X, A1_RS1, IMM_X, DW_X, aluFn.FN_X, N,M_X, N,N,N,Y,N,N,N,CSR.N,N,N,N,N), - FCVT_H_WU-> List(Y,Y,N,N,N,N,N,Y,N,N,N,N,A2_X, A1_RS1, IMM_X, DW_X, aluFn.FN_X, N,M_X, N,N,N,Y,N,N,N,CSR.N,N,N,N,N), - FLH-> List(Y,Y,N,N,N,N,N,Y,N,N,N,N,A2_IMM, A1_RS1, IMM_I, DW_XPR,aluFn.FN_ADD, Y,M_XRD, N,N,N,Y,N,N,N,CSR.N,N,N,N,N), - FSH-> List(Y,Y,N,N,N,N,N,Y,N,N,N,N,A2_IMM, A1_RS1, IMM_S, DW_XPR,aluFn.FN_ADD, Y,M_XWR, N,Y,N,N,N,N,N,CSR.N,N,N,N,N), - FDIV_H-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,Y,N,N,N,CSR.N,N,N,N,N), - FSQRT_H-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,Y,N,N,N,CSR.N,N,N,N,N)) + FCVT_S_H-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,N,N,Y,N,N,N,CSR.N,N,N,N,N), + FCVT_H_S-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,N,N,Y,N,N,N,CSR.N,N,N,N,N), + FSGNJ_H-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,Y,N,N,N,CSR.N,N,N,N,N), + FSGNJX_H-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,Y,N,N,N,CSR.N,N,N,N,N), + FSGNJN_H-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,Y,N,N,N,CSR.N,N,N,N,N), + FMIN_H-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,Y,N,N,N,CSR.N,N,N,N,N), + FMAX_H-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,Y,N,N,N,CSR.N,N,N,N,N), + FADD_H-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,Y,N,N,N,CSR.N,N,N,N,N), + FSUB_H-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,Y,N,N,N,CSR.N,N,N,N,N), + FMUL_H-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,Y,N,N,N,CSR.N,N,N,N,N), + FMADD_H-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,Y,Y,N,N,N,CSR.N,N,N,N,N), + FMSUB_H-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,Y,Y,N,N,N,CSR.N,N,N,N,N), + FNMADD_H-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,Y,Y,N,N,N,CSR.N,N,N,N,N), + FNMSUB_H-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,Y,Y,N,N,N,CSR.N,N,N,N,N), + FCLASS_H-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,N,N,N,N,N,Y,CSR.N,N,N,N,N), + FMV_X_H-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,N,N,N,N,N,Y,CSR.N,N,N,N,N), + FCVT_W_H-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,N,N,N,N,N,Y,CSR.N,N,N,N,N), + FCVT_WU_H-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,N,N,N,N,N,Y,CSR.N,N,N,N,N), + FEQ_H-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,N,N,N,Y,CSR.N,N,N,N,N), + FLT_H-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,N,N,N,Y,CSR.N,N,N,N,N), + FLE_H-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,N,N,N,Y,CSR.N,N,N,N,N), + FMV_H_X-> List(Y,Y,N,N,N,N,N,Y,N,N,N,A2_X, A1_RS1, IMM_X, DW_X, aluFn.FN_X, N,M_X, N,N,N,Y,N,N,N,CSR.N,N,N,N,N), + FCVT_H_W-> List(Y,Y,N,N,N,N,N,Y,N,N,N,A2_X, A1_RS1, IMM_X, DW_X, aluFn.FN_X, N,M_X, N,N,N,Y,N,N,N,CSR.N,N,N,N,N), + FCVT_H_WU-> List(Y,Y,N,N,N,N,N,Y,N,N,N,A2_X, A1_RS1, IMM_X, DW_X, aluFn.FN_X, N,M_X, N,N,N,Y,N,N,N,CSR.N,N,N,N,N), + FLH-> List(Y,Y,N,N,N,N,N,Y,N,N,N,A2_IMM, A1_RS1, IMM_I, DW_XPR,aluFn.FN_ADD, Y,M_XRD, N,N,N,Y,N,N,N,CSR.N,N,N,N,N), + FSH-> List(Y,Y,N,N,N,N,N,Y,N,N,N,A2_IMM, A1_RS1, IMM_S, DW_XPR,aluFn.FN_ADD, Y,M_XWR, N,Y,N,N,N,N,N,CSR.N,N,N,N,N), + FDIV_H-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,Y,N,N,N,CSR.N,N,N,N,N), + FSQRT_H-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,Y,N,N,N,CSR.N,N,N,N,N)) } class FDecode(aluFn: ALUFN = ALUFN())(implicit val p: Parameters) extends DecodeConstants { val table: Array[(BitPat, List[BitPat])] = Array( - FSGNJ_S-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,Y,N,N,N,CSR.N,N,N,N,N), - FSGNJX_S-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,Y,N,N,N,CSR.N,N,N,N,N), - FSGNJN_S-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,Y,N,N,N,CSR.N,N,N,N,N), - FMIN_S-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,Y,N,N,N,CSR.N,N,N,N,N), - FMAX_S-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,Y,N,N,N,CSR.N,N,N,N,N), - FADD_S-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,Y,N,N,N,CSR.N,N,N,N,N), - FSUB_S-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,Y,N,N,N,CSR.N,N,N,N,N), - FMUL_S-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,Y,N,N,N,CSR.N,N,N,N,N), - FMADD_S-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,Y,Y,N,N,N,CSR.N,N,N,N,N), - FMSUB_S-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,Y,Y,N,N,N,CSR.N,N,N,N,N), - FNMADD_S-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,Y,Y,N,N,N,CSR.N,N,N,N,N), - FNMSUB_S-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,Y,Y,N,N,N,CSR.N,N,N,N,N), - FCLASS_S-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,N,N,N,N,N,Y,CSR.N,N,N,N,N), - FMV_X_W-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,N,N,N,N,N,Y,CSR.N,N,N,N,N), - FCVT_W_S-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,N,N,N,N,N,Y,CSR.N,N,N,N,N), - FCVT_WU_S-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,N,N,N,N,N,Y,CSR.N,N,N,N,N), - FEQ_S-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,N,N,N,Y,CSR.N,N,N,N,N), - FLT_S-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,N,N,N,Y,CSR.N,N,N,N,N), - FLE_S-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,N,N,N,Y,CSR.N,N,N,N,N), - FMV_W_X-> List(Y,Y,N,N,N,N,N,Y,N,N,N,N,A2_X, A1_RS1, IMM_X, DW_X, aluFn.FN_X, N,M_X, N,N,N,Y,N,N,N,CSR.N,N,N,N,N), - FCVT_S_W-> List(Y,Y,N,N,N,N,N,Y,N,N,N,N,A2_X, A1_RS1, IMM_X, DW_X, aluFn.FN_X, N,M_X, N,N,N,Y,N,N,N,CSR.N,N,N,N,N), - FCVT_S_WU-> List(Y,Y,N,N,N,N,N,Y,N,N,N,N,A2_X, A1_RS1, IMM_X, DW_X, aluFn.FN_X, N,M_X, N,N,N,Y,N,N,N,CSR.N,N,N,N,N), - FLW-> List(Y,Y,N,N,N,N,N,Y,N,N,N,N,A2_IMM, A1_RS1, IMM_I, DW_XPR,aluFn.FN_ADD, Y,M_XRD, N,N,N,Y,N,N,N,CSR.N,N,N,N,N), - FSW-> List(Y,Y,N,N,N,N,N,Y,N,N,N,N,A2_IMM, A1_RS1, IMM_S, DW_XPR,aluFn.FN_ADD, Y,M_XWR, N,Y,N,N,N,N,N,CSR.N,N,N,N,N), - FDIV_S-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,Y,N,N,N,CSR.N,N,N,N,N), - FSQRT_S-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,Y,N,N,N,CSR.N,N,N,N,N)) + FSGNJ_S-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,Y,N,N,N,CSR.N,N,N,N,N), + FSGNJX_S-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,Y,N,N,N,CSR.N,N,N,N,N), + FSGNJN_S-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,Y,N,N,N,CSR.N,N,N,N,N), + FMIN_S-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,Y,N,N,N,CSR.N,N,N,N,N), + FMAX_S-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,Y,N,N,N,CSR.N,N,N,N,N), + FADD_S-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,Y,N,N,N,CSR.N,N,N,N,N), + FSUB_S-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,Y,N,N,N,CSR.N,N,N,N,N), + FMUL_S-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,Y,N,N,N,CSR.N,N,N,N,N), + FMADD_S-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,Y,Y,N,N,N,CSR.N,N,N,N,N), + FMSUB_S-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,Y,Y,N,N,N,CSR.N,N,N,N,N), + FNMADD_S-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,Y,Y,N,N,N,CSR.N,N,N,N,N), + FNMSUB_S-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,Y,Y,N,N,N,CSR.N,N,N,N,N), + FCLASS_S-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,N,N,N,N,N,Y,CSR.N,N,N,N,N), + FMV_X_W-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,N,N,N,N,N,Y,CSR.N,N,N,N,N), + FCVT_W_S-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,N,N,N,N,N,Y,CSR.N,N,N,N,N), + FCVT_WU_S-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,N,N,N,N,N,Y,CSR.N,N,N,N,N), + FEQ_S-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,N,N,N,Y,CSR.N,N,N,N,N), + FLT_S-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,N,N,N,Y,CSR.N,N,N,N,N), + FLE_S-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,N,N,N,Y,CSR.N,N,N,N,N), + FMV_W_X-> List(Y,Y,N,N,N,N,N,Y,N,N,N,A2_X, A1_RS1, IMM_X, DW_X, aluFn.FN_X, N,M_X, N,N,N,Y,N,N,N,CSR.N,N,N,N,N), + FCVT_S_W-> List(Y,Y,N,N,N,N,N,Y,N,N,N,A2_X, A1_RS1, IMM_X, DW_X, aluFn.FN_X, N,M_X, N,N,N,Y,N,N,N,CSR.N,N,N,N,N), + FCVT_S_WU-> List(Y,Y,N,N,N,N,N,Y,N,N,N,A2_X, A1_RS1, IMM_X, DW_X, aluFn.FN_X, N,M_X, N,N,N,Y,N,N,N,CSR.N,N,N,N,N), + FLW-> List(Y,Y,N,N,N,N,N,Y,N,N,N,A2_IMM, A1_RS1, IMM_I, DW_XPR,aluFn.FN_ADD, Y,M_XRD, N,N,N,Y,N,N,N,CSR.N,N,N,N,N), + FSW-> List(Y,Y,N,N,N,N,N,Y,N,N,N,A2_IMM, A1_RS1, IMM_S, DW_XPR,aluFn.FN_ADD, Y,M_XWR, N,Y,N,N,N,N,N,CSR.N,N,N,N,N), + FDIV_S-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,Y,N,N,N,CSR.N,N,N,N,N), + FSQRT_S-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,Y,N,N,N,CSR.N,N,N,N,N)) } class DDecode(aluFn: ALUFN = ALUFN())(implicit val p: Parameters) extends DecodeConstants { val table: Array[(BitPat, List[BitPat])] = Array( - FCVT_S_D-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,N,N,Y,N,N,N,CSR.N,N,N,N,Y), - FCVT_D_S-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,N,N,Y,N,N,N,CSR.N,N,N,N,Y), - FSGNJ_D-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,Y,N,N,N,CSR.N,N,N,N,Y), - FSGNJX_D-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,Y,N,N,N,CSR.N,N,N,N,Y), - FSGNJN_D-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,Y,N,N,N,CSR.N,N,N,N,Y), - FMIN_D-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,Y,N,N,N,CSR.N,N,N,N,Y), - FMAX_D-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,Y,N,N,N,CSR.N,N,N,N,Y), - FADD_D-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,Y,N,N,N,CSR.N,N,N,N,Y), - FSUB_D-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,Y,N,N,N,CSR.N,N,N,N,Y), - FMUL_D-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,Y,N,N,N,CSR.N,N,N,N,Y), - FMADD_D-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,Y,Y,N,N,N,CSR.N,N,N,N,Y), - FMSUB_D-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,Y,Y,N,N,N,CSR.N,N,N,N,Y), - FNMADD_D-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,Y,Y,N,N,N,CSR.N,N,N,N,Y), - FNMSUB_D-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,Y,Y,N,N,N,CSR.N,N,N,N,Y), - FCLASS_D-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,N,N,N,N,N,Y,CSR.N,N,N,N,Y), - FCVT_W_D-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,N,N,N,N,N,Y,CSR.N,N,N,N,Y), - FCVT_WU_D-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,N,N,N,N,N,Y,CSR.N,N,N,N,Y), - FEQ_D-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,N,N,N,Y,CSR.N,N,N,N,Y), - FLT_D-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,N,N,N,Y,CSR.N,N,N,N,Y), - FLE_D-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,N,N,N,Y,CSR.N,N,N,N,Y), - FCVT_D_W-> List(Y,Y,N,N,N,N,N,Y,N,N,N,N,A2_X, A1_RS1, IMM_X, DW_X, aluFn.FN_X, N,M_X, N,N,N,Y,N,N,N,CSR.N,N,N,N,Y), - FCVT_D_WU-> List(Y,Y,N,N,N,N,N,Y,N,N,N,N,A2_X, A1_RS1, IMM_X, DW_X, aluFn.FN_X, N,M_X, N,N,N,Y,N,N,N,CSR.N,N,N,N,Y), - FLD-> List(Y,Y,N,N,N,N,N,Y,N,N,N,N,A2_IMM, A1_RS1, IMM_I, DW_XPR,aluFn.FN_ADD, Y,M_XRD, N,N,N,Y,N,N,N,CSR.N,N,N,N,Y), - FSD-> List(Y,Y,N,N,N,N,N,Y,N,N,N,N,A2_IMM, A1_RS1, IMM_S, DW_XPR,aluFn.FN_ADD, Y,M_XWR, N,Y,N,N,N,N,N,CSR.N,N,N,N,Y), - FDIV_D-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,Y,N,N,N,CSR.N,N,N,N,Y), - FSQRT_D-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,Y,N,N,N,CSR.N,N,N,N,Y)) + FCVT_S_D-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,N,N,Y,N,N,N,CSR.N,N,N,N,Y), + FCVT_D_S-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,N,N,Y,N,N,N,CSR.N,N,N,N,Y), + FSGNJ_D-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,Y,N,N,N,CSR.N,N,N,N,Y), + FSGNJX_D-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,Y,N,N,N,CSR.N,N,N,N,Y), + FSGNJN_D-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,Y,N,N,N,CSR.N,N,N,N,Y), + FMIN_D-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,Y,N,N,N,CSR.N,N,N,N,Y), + FMAX_D-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,Y,N,N,N,CSR.N,N,N,N,Y), + FADD_D-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,Y,N,N,N,CSR.N,N,N,N,Y), + FSUB_D-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,Y,N,N,N,CSR.N,N,N,N,Y), + FMUL_D-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,Y,N,N,N,CSR.N,N,N,N,Y), + FMADD_D-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,Y,Y,N,N,N,CSR.N,N,N,N,Y), + FMSUB_D-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,Y,Y,N,N,N,CSR.N,N,N,N,Y), + FNMADD_D-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,Y,Y,N,N,N,CSR.N,N,N,N,Y), + FNMSUB_D-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,Y,Y,N,N,N,CSR.N,N,N,N,Y), + FCLASS_D-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,N,N,N,N,N,Y,CSR.N,N,N,N,Y), + FCVT_W_D-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,N,N,N,N,N,Y,CSR.N,N,N,N,Y), + FCVT_WU_D-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,N,N,N,N,N,Y,CSR.N,N,N,N,Y), + FEQ_D-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,N,N,N,Y,CSR.N,N,N,N,Y), + FLT_D-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,N,N,N,Y,CSR.N,N,N,N,Y), + FLE_D-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,N,N,N,Y,CSR.N,N,N,N,Y), + FCVT_D_W-> List(Y,Y,N,N,N,N,N,Y,N,N,N,A2_X, A1_RS1, IMM_X, DW_X, aluFn.FN_X, N,M_X, N,N,N,Y,N,N,N,CSR.N,N,N,N,Y), + FCVT_D_WU-> List(Y,Y,N,N,N,N,N,Y,N,N,N,A2_X, A1_RS1, IMM_X, DW_X, aluFn.FN_X, N,M_X, N,N,N,Y,N,N,N,CSR.N,N,N,N,Y), + FLD-> List(Y,Y,N,N,N,N,N,Y,N,N,N,A2_IMM, A1_RS1, IMM_I, DW_XPR,aluFn.FN_ADD, Y,M_XRD, N,N,N,Y,N,N,N,CSR.N,N,N,N,Y), + FSD-> List(Y,Y,N,N,N,N,N,Y,N,N,N,A2_IMM, A1_RS1, IMM_S, DW_XPR,aluFn.FN_ADD, Y,M_XWR, N,Y,N,N,N,N,N,CSR.N,N,N,N,Y), + FDIV_D-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,Y,N,N,N,CSR.N,N,N,N,Y), + FSQRT_D-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,Y,N,Y,N,N,N,CSR.N,N,N,N,Y)) } class HDDecode(aluFn: ALUFN = ALUFN())(implicit val p: Parameters) extends DecodeConstants { val table: Array[(BitPat, List[BitPat])] = Array( - FCVT_D_H-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,N,N,Y,N,N,N,CSR.N,N,N,N,Y), - FCVT_H_D-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,N,N,Y,N,N,N,CSR.N,N,N,N,Y)) + FCVT_D_H-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,N,N,Y,N,N,N,CSR.N,N,N,N,Y), + FCVT_H_D-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,N,N,Y,N,N,N,CSR.N,N,N,N,Y)) } class H64Decode(aluFn: ALUFN = ALUFN())(implicit val p: Parameters) extends DecodeConstants { val table: Array[(BitPat, List[BitPat])] = Array( - FCVT_L_H-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,N,N,N,N,N,Y,CSR.N,N,N,N,N), - FCVT_LU_H-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,N,N,N,N,N,Y,CSR.N,N,N,N,N), - FCVT_H_L-> List(Y,Y,N,N,N,N,N,Y,N,N,N,N,A2_X, A1_RS1, IMM_X, DW_X, aluFn.FN_X, N,M_X, N,N,N,Y,N,N,N,CSR.N,N,N,N,N), - FCVT_H_LU-> List(Y,Y,N,N,N,N,N,Y,N,N,N,N,A2_X, A1_RS1, IMM_X, DW_X, aluFn.FN_X, N,M_X, N,N,N,Y,N,N,N,CSR.N,N,N,N,N)) + FCVT_L_H-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,N,N,N,N,N,Y,CSR.N,N,N,N,N), + FCVT_LU_H-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,N,N,N,N,N,Y,CSR.N,N,N,N,N), + FCVT_H_L-> List(Y,Y,N,N,N,N,N,Y,N,N,N,A2_X, A1_RS1, IMM_X, DW_X, aluFn.FN_X, N,M_X, N,N,N,Y,N,N,N,CSR.N,N,N,N,N), + FCVT_H_LU-> List(Y,Y,N,N,N,N,N,Y,N,N,N,A2_X, A1_RS1, IMM_X, DW_X, aluFn.FN_X, N,M_X, N,N,N,Y,N,N,N,CSR.N,N,N,N,N)) } class F64Decode(aluFn: ALUFN = ALUFN())(implicit val p: Parameters) extends DecodeConstants { val table: Array[(BitPat, List[BitPat])] = Array( - FCVT_L_S-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,N,N,N,N,N,Y,CSR.N,N,N,N,N), - FCVT_LU_S-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,N,N,N,N,N,Y,CSR.N,N,N,N,N), - FCVT_S_L-> List(Y,Y,N,N,N,N,N,Y,N,N,N,N,A2_X, A1_RS1, IMM_X, DW_X, aluFn.FN_X, N,M_X, N,N,N,Y,N,N,N,CSR.N,N,N,N,N), - FCVT_S_LU-> List(Y,Y,N,N,N,N,N,Y,N,N,N,N,A2_X, A1_RS1, IMM_X, DW_X, aluFn.FN_X, N,M_X, N,N,N,Y,N,N,N,CSR.N,N,N,N,N)) + FCVT_L_S-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,N,N,N,N,N,Y,CSR.N,N,N,N,N), + FCVT_LU_S-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,N,N,N,N,N,Y,CSR.N,N,N,N,N), + FCVT_S_L-> List(Y,Y,N,N,N,N,N,Y,N,N,N,A2_X, A1_RS1, IMM_X, DW_X, aluFn.FN_X, N,M_X, N,N,N,Y,N,N,N,CSR.N,N,N,N,N), + FCVT_S_LU-> List(Y,Y,N,N,N,N,N,Y,N,N,N,A2_X, A1_RS1, IMM_X, DW_X, aluFn.FN_X, N,M_X, N,N,N,Y,N,N,N,CSR.N,N,N,N,N)) } class D64Decode(aluFn: ALUFN = ALUFN())(implicit val p: Parameters) extends DecodeConstants { val table: Array[(BitPat, List[BitPat])] = Array( - FMV_X_D-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,N,N,N,N,N,Y,CSR.N,N,N,N,Y), - FCVT_L_D-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,N,N,N,N,N,Y,CSR.N,N,N,N,Y), - FCVT_LU_D-> List(Y,Y,N,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,N,N,N,N,N,Y,CSR.N,N,N,N,Y), - FMV_D_X-> List(Y,Y,N,N,N,N,N,Y,N,N,N,N,A2_X, A1_RS1, IMM_X, DW_X, aluFn.FN_X, N,M_X, N,N,N,Y,N,N,N,CSR.N,N,N,N,Y), - FCVT_D_L-> List(Y,Y,N,N,N,N,N,Y,N,N,N,N,A2_X, A1_RS1, IMM_X, DW_X, aluFn.FN_X, N,M_X, N,N,N,Y,N,N,N,CSR.N,N,N,N,Y), - FCVT_D_LU-> List(Y,Y,N,N,N,N,N,Y,N,N,N,N,A2_X, A1_RS1, IMM_X, DW_X, aluFn.FN_X, N,M_X, N,N,N,Y,N,N,N,CSR.N,N,N,N,Y)) -} - -class SCIEDecode(aluFn: ALUFN = ALUFN())(implicit val p: Parameters) extends DecodeConstants -{ - val table: Array[(BitPat, List[BitPat])] = Array( - SCIE.opcode-> - List(Y,N,N,N,N,N,Y,Y,Y,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_X, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) + FMV_X_D-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,N,N,N,N,N,Y,CSR.N,N,N,N,Y), + FCVT_L_D-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,N,N,N,N,N,Y,CSR.N,N,N,N,Y), + FCVT_LU_D-> List(Y,Y,N,N,N,N,N,N,N,N,N,A2_X, A1_X, IMM_X, DW_X, aluFn.FN_X, N,M_X, Y,N,N,N,N,N,Y,CSR.N,N,N,N,Y), + FMV_D_X-> List(Y,Y,N,N,N,N,N,Y,N,N,N,A2_X, A1_RS1, IMM_X, DW_X, aluFn.FN_X, N,M_X, N,N,N,Y,N,N,N,CSR.N,N,N,N,Y), + FCVT_D_L-> List(Y,Y,N,N,N,N,N,Y,N,N,N,A2_X, A1_RS1, IMM_X, DW_X, aluFn.FN_X, N,M_X, N,N,N,Y,N,N,N,CSR.N,N,N,N,Y), + FCVT_D_LU-> List(Y,Y,N,N,N,N,N,Y,N,N,N,A2_X, A1_RS1, IMM_X, DW_X, aluFn.FN_X, N,M_X, N,N,N,Y,N,N,N,CSR.N,N,N,N,Y)) } trait UsesABLUFN { @@ -452,113 +443,113 @@ trait UsesABLUFN { class ZBADecode(implicit val p: Parameters) extends DecodeConstants with UsesABLUFN { val table: Array[(BitPat, List[BitPat])] = Array( - SH1ADD -> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_RS2,A1_RS1, IMM_X, DW_XPR, aluFn.FN_SH1ADD,N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - SH2ADD -> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_RS2,A1_RS1, IMM_X, DW_XPR, aluFn.FN_SH2ADD,N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - SH3ADD -> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_RS2,A1_RS1, IMM_X, DW_XPR, aluFn.FN_SH3ADD,N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) + SH1ADD -> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_RS2,A1_RS1, IMM_X, DW_XPR, aluFn.FN_SH1ADD,N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + SH2ADD -> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_RS2,A1_RS1, IMM_X, DW_XPR, aluFn.FN_SH2ADD,N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + SH3ADD -> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_RS2,A1_RS1, IMM_X, DW_XPR, aluFn.FN_SH3ADD,N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) } class ZBA64Decode(implicit val p: Parameters) extends DecodeConstants with UsesABLUFN { val table: Array[(BitPat, List[BitPat])] = Array( - ADD_UW -> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_RS2,A1_RS1, IMM_X, DW_64,aluFn.FN_ADDUW ,N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - SLLI_UW -> List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_IMM,A1_RS1, IMM_I, DW_64,aluFn.FN_SLLIUW ,N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - SH1ADD_UW-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_RS2,A1_RS1, IMM_X, DW_64,aluFn.FN_SH1ADDUW,N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - SH2ADD_UW-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_RS2,A1_RS1, IMM_X, DW_64,aluFn.FN_SH2ADDUW,N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - SH3ADD_UW-> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_RS2,A1_RS1, IMM_X, DW_64,aluFn.FN_SH3ADDUW,N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) + ADD_UW -> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_RS2,A1_RS1, IMM_X, DW_64,aluFn.FN_ADDUW ,N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + SLLI_UW -> List(Y,N,N,N,N,N,N,Y,N,N,N,A2_IMM,A1_RS1, IMM_I, DW_64,aluFn.FN_SLLIUW ,N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + SH1ADD_UW-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_RS2,A1_RS1, IMM_X, DW_64,aluFn.FN_SH1ADDUW,N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + SH2ADD_UW-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_RS2,A1_RS1, IMM_X, DW_64,aluFn.FN_SH2ADDUW,N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + SH3ADD_UW-> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_RS2,A1_RS1, IMM_X, DW_64,aluFn.FN_SH3ADDUW,N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) } // In both Zbb and Zbkb class ZBBNDecode(implicit val p: Parameters) extends DecodeConstants with UsesABLUFN { val table: Array[(BitPat, List[BitPat])] = Array( - ANDN -> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_RS2,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ANDN, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - ORN -> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_RS2,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ORN , N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - XNOR -> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_RS2,A1_RS1, IMM_X, DW_XPR,aluFn.FN_XNOR, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) + ANDN -> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_RS2,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ANDN, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + ORN -> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_RS2,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ORN , N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + XNOR -> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_RS2,A1_RS1, IMM_X, DW_XPR,aluFn.FN_XNOR, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) } // In both Zbb and Zbkb class ZBBRDecode(implicit val p: Parameters) extends DecodeConstants with UsesABLUFN { val table: Array[(BitPat, List[BitPat])] = Array( - ROR -> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_RS2,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ROR, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - ROL -> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_RS2,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ROL, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) + ROR -> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_RS2,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ROR, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + ROL -> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_RS2,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ROL, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) } class ZBBR32Decode(implicit val p: Parameters) extends DecodeConstants with UsesABLUFN { val table: Array[(BitPat, List[BitPat])] = Array( Instructions32.RORI -> - List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_IMM,A1_RS1, IMM_I, DW_XPR,aluFn.FN_ROR, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) + List(Y,N,N,N,N,N,N,Y,N,N,N,A2_IMM,A1_RS1, IMM_I, DW_XPR,aluFn.FN_ROR, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) } class ZBBR64Decode(implicit val p: Parameters) extends DecodeConstants with UsesABLUFN { val table: Array[(BitPat, List[BitPat])] = Array( - RORI -> List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_IMM,A1_RS1, IMM_I, DW_XPR,aluFn.FN_ROR, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - RORW -> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_RS2,A1_RS1, IMM_X, DW_32, aluFn.FN_ROR, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - ROLW -> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_RS2,A1_RS1, IMM_X, DW_32, aluFn.FN_ROL, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - RORIW -> List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_IMM,A1_RS1, IMM_I, DW_32, aluFn.FN_ROR, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) + RORI -> List(Y,N,N,N,N,N,N,Y,N,N,N,A2_IMM,A1_RS1, IMM_I, DW_XPR,aluFn.FN_ROR, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + RORW -> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_RS2,A1_RS1, IMM_X, DW_32, aluFn.FN_ROR, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + ROLW -> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_RS2,A1_RS1, IMM_X, DW_32, aluFn.FN_ROL, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + RORIW -> List(Y,N,N,N,N,N,N,Y,N,N,N,A2_IMM,A1_RS1, IMM_I, DW_32, aluFn.FN_ROR, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) } // Only in Zbb class ZBBCDecode(implicit val p: Parameters) extends DecodeConstants with UsesABLUFN { val table: Array[(BitPat, List[BitPat])] = Array( - CLZ -> List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_X,A1_RS1, IMM_X, DW_XPR,aluFn.FN_CLZ , N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - CTZ -> List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_X,A1_RS1, IMM_X, DW_XPR,aluFn.FN_CTZ , N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - CPOP -> List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_X,A1_RS1, IMM_X, DW_XPR,aluFn.FN_CPOP, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) + CLZ -> List(Y,N,N,N,N,N,N,Y,N,N,N,A2_X,A1_RS1, IMM_X, DW_XPR,aluFn.FN_CLZ , N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + CTZ -> List(Y,N,N,N,N,N,N,Y,N,N,N,A2_X,A1_RS1, IMM_X, DW_XPR,aluFn.FN_CTZ , N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + CPOP -> List(Y,N,N,N,N,N,N,Y,N,N,N,A2_X,A1_RS1, IMM_X, DW_XPR,aluFn.FN_CPOP, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) } class ZBBC64Decode(implicit val p: Parameters) extends DecodeConstants with UsesABLUFN { val table: Array[(BitPat, List[BitPat])] = Array( - CLZW -> List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_X,A1_RS1, IMM_X, DW_32,aluFn.FN_CLZ , N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - CTZW -> List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_X,A1_RS1, IMM_X, DW_32,aluFn.FN_CTZ , N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - CPOPW -> List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_X,A1_RS1, IMM_X, DW_32,aluFn.FN_CPOP, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) + CLZW -> List(Y,N,N,N,N,N,N,Y,N,N,N,A2_X,A1_RS1, IMM_X, DW_32,aluFn.FN_CLZ , N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + CTZW -> List(Y,N,N,N,N,N,N,Y,N,N,N,A2_X,A1_RS1, IMM_X, DW_32,aluFn.FN_CTZ , N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + CPOPW -> List(Y,N,N,N,N,N,N,Y,N,N,N,A2_X,A1_RS1, IMM_X, DW_32,aluFn.FN_CPOP, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) } // Only in Zbb class ZBBMDecode(implicit val p: Parameters) extends DecodeConstants with UsesABLUFN { val table: Array[(BitPat, List[BitPat])] = Array( - MAX -> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_RS2,A1_RS1, IMM_X, DW_XPR,aluFn.FN_MAX , N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - MAXU -> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_RS2,A1_RS1, IMM_X, DW_XPR,aluFn.FN_MAXU, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - MIN -> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_RS2,A1_RS1, IMM_X, DW_XPR,aluFn.FN_MIN , N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - MINU -> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_RS2,A1_RS1, IMM_X, DW_XPR,aluFn.FN_MINU, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) + MAX -> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_RS2,A1_RS1, IMM_X, DW_XPR,aluFn.FN_MAX , N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + MAXU -> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_RS2,A1_RS1, IMM_X, DW_XPR,aluFn.FN_MAXU, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + MIN -> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_RS2,A1_RS1, IMM_X, DW_XPR,aluFn.FN_MIN , N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + MINU -> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_RS2,A1_RS1, IMM_X, DW_XPR,aluFn.FN_MINU, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) } // Only in Zbb class ZBBSEDecode(implicit val p: Parameters) extends DecodeConstants with UsesABLUFN { val table: Array[(BitPat, List[BitPat])] = Array( - SEXT_H -> List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_X,A1_RS1, IMM_X, DW_XPR,aluFn.FN_SEXTH, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - SEXT_B -> List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_X,A1_RS1, IMM_X, DW_XPR,aluFn.FN_SEXTB, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) + SEXT_H -> List(Y,N,N,N,N,N,N,Y,N,N,N,A2_X,A1_RS1, IMM_X, DW_XPR,aluFn.FN_SEXTH, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + SEXT_B -> List(Y,N,N,N,N,N,N,Y,N,N,N,A2_X,A1_RS1, IMM_X, DW_XPR,aluFn.FN_SEXTB, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) } class ZBBZE64Decode(implicit val p: Parameters) extends DecodeConstants with UsesABLUFN { val table: Array[(BitPat, List[BitPat])] = Array( - ZEXT_H -> List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_X,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ZEXTH, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) + ZEXT_H -> List(Y,N,N,N,N,N,N,Y,N,N,N,A2_X,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ZEXTH, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) } class ZBBZE32Decode(implicit val p: Parameters) extends DecodeConstants with UsesABLUFN { val table: Array[(BitPat, List[BitPat])] = Array( Instructions32.ZEXT_H -> - List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_X,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ZEXTH, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) + List(Y,N,N,N,N,N,N,Y,N,N,N,A2_X,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ZEXTH, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) } class ZBBORCBDecode(implicit val p: Parameters) extends DecodeConstants with UsesABLUFN { val table: Array[(BitPat, List[BitPat])] = Array( - ORC_B -> List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_X,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ORCB, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) + ORC_B -> List(Y,N,N,N,N,N,N,Y,N,N,N,A2_X,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ORCB, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) } // In both Zbb and Zbkb class ZBBREV864Decode(implicit val p: Parameters) extends DecodeConstants with UsesABLUFN { val table: Array[(BitPat, List[BitPat])] = Array( - REV8 -> List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_X,A1_RS1, IMM_X, DW_XPR,aluFn.FN_REV8, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) + REV8 -> List(Y,N,N,N,N,N,N,Y,N,N,N,A2_X,A1_RS1, IMM_X, DW_XPR,aluFn.FN_REV8, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) } // In both Zbb and Zbkb @@ -566,184 +557,184 @@ class ZBBREV832Decode(implicit val p: Parameters) extends DecodeConstants with U { val table: Array[(BitPat, List[BitPat])] = Array( Instructions32.REV8-> - List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_X,A1_RS1, IMM_X, DW_XPR,aluFn.FN_REV8, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) + List(Y,N,N,N,N,N,N,Y,N,N,N,A2_X,A1_RS1, IMM_X, DW_XPR,aluFn.FN_REV8, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) } // Only in Zbkb class ZBKBDecode(implicit val p: Parameters) extends DecodeConstants with UsesABLUFN { val table: Array[(BitPat, List[BitPat])] = Array( - PACK -> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_RS2,A1_RS1, IMM_X, DW_XPR,aluFn.FN_PACK, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - PACKH -> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_RS2,A1_RS1, IMM_X, DW_XPR,aluFn.FN_PACKH, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - BREV8 -> List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_X ,A1_RS1, IMM_X, DW_XPR,aluFn.FN_BREV8, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) + PACK -> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_RS2,A1_RS1, IMM_X, DW_XPR,aluFn.FN_PACK, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + PACKH -> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_RS2,A1_RS1, IMM_X, DW_XPR,aluFn.FN_PACKH, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + BREV8 -> List(Y,N,N,N,N,N,N,Y,N,N,N,A2_X ,A1_RS1, IMM_X, DW_XPR,aluFn.FN_BREV8, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) } class ZBKB64Decode(implicit val p: Parameters) extends DecodeConstants with UsesABLUFN { val table: Array[(BitPat, List[BitPat])] = Array( - PACKW -> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_RS2,A1_RS1, IMM_X, DW_32, aluFn.FN_PACK, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) + PACKW -> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_RS2,A1_RS1, IMM_X, DW_32, aluFn.FN_PACK, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) } class ZBKB32Decode(implicit val p: Parameters) extends DecodeConstants with UsesABLUFN { val table: Array[(BitPat, List[BitPat])] = Array( Instructions32.ZIP -> - List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_X ,A1_RS1, IMM_X, DW_X, aluFn.FN_ZIP, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + List(Y,N,N,N,N,N,N,Y,N,N,N,A2_X ,A1_RS1, IMM_X, DW_X, aluFn.FN_ZIP, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), Instructions32.UNZIP -> - List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_X ,A1_RS1, IMM_X, DW_X, aluFn.FN_UNZIP, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) + List(Y,N,N,N,N,N,N,Y,N,N,N,A2_X ,A1_RS1, IMM_X, DW_X, aluFn.FN_UNZIP, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) } // also in Zbkc but Zbkc does not have CLMULR class ZBCDecode(implicit val p: Parameters) extends DecodeConstants with UsesABLUFN { val table: Array[(BitPat, List[BitPat])] = Array( - CLMUL -> List(Y,N,N,N,N,N,Y,Y,N,Y,N,N,A2_RS2,A1_RS1, IMM_X, DW_XPR,aluFn.FN_CLMUL, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - CLMULH -> List(Y,N,N,N,N,N,Y,Y,N,Y,N,N,A2_RS2,A1_RS1, IMM_X, DW_XPR,aluFn.FN_CLMULH, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) + CLMUL -> List(Y,N,N,N,N,N,Y,Y,Y,N,N,A2_RS2,A1_RS1, IMM_X, DW_XPR,aluFn.FN_CLMUL, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + CLMULH -> List(Y,N,N,N,N,N,Y,Y,Y,N,N,A2_RS2,A1_RS1, IMM_X, DW_XPR,aluFn.FN_CLMULH, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) } class ZBCRDecode(implicit val p: Parameters) extends DecodeConstants with UsesABLUFN { val table: Array[(BitPat, List[BitPat])] = Array( - CLMULR -> List(Y,N,N,N,N,N,Y,Y,N,Y,N,N,A2_RS2,A1_RS1, IMM_X, DW_XPR,aluFn.FN_CLMULR, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) + CLMULR -> List(Y,N,N,N,N,N,Y,Y,Y,N,N,A2_RS2,A1_RS1, IMM_X, DW_XPR,aluFn.FN_CLMULR, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) } class ZBKXDecode(implicit val p: Parameters) extends DecodeConstants with UsesABLUFN { val table: Array[(BitPat, List[BitPat])] = Array( - XPERM8 -> List(Y,N,N,N,N,N,Y,Y,N,Y,N,N,A2_RS2,A1_RS1, IMM_X, DW_XPR,aluFn.FN_XPERM8, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - XPERM4 -> List(Y,N,N,N,N,N,Y,Y,N,Y,N,N,A2_RS2,A1_RS1, IMM_X, DW_XPR,aluFn.FN_XPERM4, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) + XPERM8 -> List(Y,N,N,N,N,N,Y,Y,Y,N,N,A2_RS2,A1_RS1, IMM_X, DW_XPR,aluFn.FN_XPERM8, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + XPERM4 -> List(Y,N,N,N,N,N,Y,Y,Y,N,N,A2_RS2,A1_RS1, IMM_X, DW_XPR,aluFn.FN_XPERM4, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) } class ZBSDecode(implicit val p: Parameters) extends DecodeConstants with UsesABLUFN { val table: Array[(BitPat, List[BitPat])] = Array( - BCLR -> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_RS2,A1_RS1, IMM_X, DW_XPR,aluFn.FN_BCLR, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - BEXT -> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_RS2,A1_RS1, IMM_X, DW_XPR,aluFn.FN_BEXT, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - BINV -> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_RS2,A1_RS1, IMM_X, DW_XPR,aluFn.FN_BINV, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - BSET -> List(Y,N,N,N,N,N,Y,Y,N,N,N,N,A2_RS2,A1_RS1, IMM_X, DW_XPR,aluFn.FN_BSET, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) + BCLR -> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_RS2,A1_RS1, IMM_X, DW_XPR,aluFn.FN_BCLR, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + BEXT -> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_RS2,A1_RS1, IMM_X, DW_XPR,aluFn.FN_BEXT, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + BINV -> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_RS2,A1_RS1, IMM_X, DW_XPR,aluFn.FN_BINV, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + BSET -> List(Y,N,N,N,N,N,Y,Y,N,N,N,A2_RS2,A1_RS1, IMM_X, DW_XPR,aluFn.FN_BSET, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) } class ZBS32Decode(implicit val p: Parameters) extends DecodeConstants with UsesABLUFN { val table: Array[(BitPat, List[BitPat])] = Array( Instructions32.BCLRI -> - List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_IMM,A1_RS1, IMM_I, DW_XPR,aluFn.FN_BCLR, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + List(Y,N,N,N,N,N,N,Y,N,N,N,A2_IMM,A1_RS1, IMM_I, DW_XPR,aluFn.FN_BCLR, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), Instructions32.BEXTI -> - List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_IMM,A1_RS1, IMM_I, DW_XPR,aluFn.FN_BEXT, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + List(Y,N,N,N,N,N,N,Y,N,N,N,A2_IMM,A1_RS1, IMM_I, DW_XPR,aluFn.FN_BEXT, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), Instructions32.BINVI -> - List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_IMM,A1_RS1, IMM_I, DW_XPR,aluFn.FN_BINV, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + List(Y,N,N,N,N,N,N,Y,N,N,N,A2_IMM,A1_RS1, IMM_I, DW_XPR,aluFn.FN_BINV, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), Instructions32.BSETI -> - List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_IMM,A1_RS1, IMM_I, DW_XPR,aluFn.FN_BSET, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) + List(Y,N,N,N,N,N,N,Y,N,N,N,A2_IMM,A1_RS1, IMM_I, DW_XPR,aluFn.FN_BSET, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) } class ZBS64Decode(implicit val p: Parameters) extends DecodeConstants with UsesABLUFN { val table: Array[(BitPat, List[BitPat])] = Array( - BCLRI -> List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_IMM,A1_RS1, IMM_I, DW_XPR,aluFn.FN_BCLR, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - BEXTI -> List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_IMM,A1_RS1, IMM_I, DW_XPR,aluFn.FN_BEXT, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - BINVI -> List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_IMM,A1_RS1, IMM_I, DW_XPR,aluFn.FN_BINV, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - BSETI -> List(Y,N,N,N,N,N,N,Y,N,N,N,N,A2_IMM,A1_RS1, IMM_I, DW_XPR,aluFn.FN_BSET, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) + BCLRI -> List(Y,N,N,N,N,N,N,Y,N,N,N,A2_IMM,A1_RS1, IMM_I, DW_XPR,aluFn.FN_BCLR, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + BEXTI -> List(Y,N,N,N,N,N,N,Y,N,N,N,A2_IMM,A1_RS1, IMM_I, DW_XPR,aluFn.FN_BEXT, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + BINVI -> List(Y,N,N,N,N,N,N,Y,N,N,N,A2_IMM,A1_RS1, IMM_I, DW_XPR,aluFn.FN_BINV, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + BSETI -> List(Y,N,N,N,N,N,N,Y,N,N,N,A2_IMM,A1_RS1, IMM_I, DW_XPR,aluFn.FN_BSET, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) } class ZKND32Decode(implicit val p: Parameters) extends DecodeConstants with UsesABLUFN { val table: Array[(BitPat, List[BitPat])] = Array( Instructions32.AES32DSI -> - List(Y,N,N,N,N,N,Y,Y,N,N,Y,N,A2_RS2,A1_RS1, IMM_X, DW_XPR,aluFn.FN_AES_DS, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + List(Y,N,N,N,N,N,Y,Y,N,Y,N,A2_RS2,A1_RS1, IMM_X, DW_XPR,aluFn.FN_AES_DS, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), Instructions32.AES32DSMI-> - List(Y,N,N,N,N,N,Y,Y,N,N,Y,N,A2_RS2,A1_RS1, IMM_X, DW_XPR,aluFn.FN_AES_DSM,N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) + List(Y,N,N,N,N,N,Y,Y,N,Y,N,A2_RS2,A1_RS1, IMM_X, DW_XPR,aluFn.FN_AES_DSM,N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) } class ZKND64Decode(implicit val p: Parameters) extends DecodeConstants with UsesABLUFN { val table: Array[(BitPat, List[BitPat])] = Array( - AES64DS -> List(Y,N,N,N,N,N,Y,Y,N,N,Y,N,A2_RS2,A1_RS1, IMM_X, DW_XPR,aluFn.FN_AES_DS, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - AES64DSM -> List(Y,N,N,N,N,N,Y,Y,N,N,Y,N,A2_RS2,A1_RS1, IMM_X, DW_XPR,aluFn.FN_AES_DSM,N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - AES64IM -> List(Y,N,N,N,N,N,Y,Y,N,N,Y,N,A2_RS2,A1_RS1, IMM_X, DW_XPR,aluFn.FN_AES_IM, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - AES64KS1I ->List(Y,N,N,N,N,N,N,Y,N,N,Y,N,A2_IMM,A1_RS1, IMM_I, DW_XPR,aluFn.FN_AES_KS1,N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - AES64KS2 -> List(Y,N,N,N,N,N,Y,Y,N,N,Y,N,A2_RS2,A1_RS1, IMM_X, DW_XPR,aluFn.FN_AES_KS2,N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) + AES64DS -> List(Y,N,N,N,N,N,Y,Y,N,Y,N,A2_RS2,A1_RS1, IMM_X, DW_XPR,aluFn.FN_AES_DS, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + AES64DSM -> List(Y,N,N,N,N,N,Y,Y,N,Y,N,A2_RS2,A1_RS1, IMM_X, DW_XPR,aluFn.FN_AES_DSM,N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + AES64IM -> List(Y,N,N,N,N,N,Y,Y,N,Y,N,A2_RS2,A1_RS1, IMM_X, DW_XPR,aluFn.FN_AES_IM, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + AES64KS1I ->List(Y,N,N,N,N,N,N,Y,N,Y,N,A2_IMM,A1_RS1, IMM_I, DW_XPR,aluFn.FN_AES_KS1,N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + AES64KS2 -> List(Y,N,N,N,N,N,Y,Y,N,Y,N,A2_RS2,A1_RS1, IMM_X, DW_XPR,aluFn.FN_AES_KS2,N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) } class ZKNE32Decode(implicit val p: Parameters) extends DecodeConstants with UsesABLUFN { val table: Array[(BitPat, List[BitPat])] = Array( Instructions32.AES32ESI -> - List(Y,N,N,N,N,N,Y,Y,N,N,Y,N,A2_RS2,A1_RS1, IMM_X, DW_XPR,aluFn.FN_AES_ES, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + List(Y,N,N,N,N,N,Y,Y,N,Y,N,A2_RS2,A1_RS1, IMM_X, DW_XPR,aluFn.FN_AES_ES, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), Instructions32.AES32ESMI -> - List(Y,N,N,N,N,N,Y,Y,N,N,Y,N,A2_RS2,A1_RS1, IMM_X, DW_XPR,aluFn.FN_AES_ESM,N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) + List(Y,N,N,N,N,N,Y,Y,N,Y,N,A2_RS2,A1_RS1, IMM_X, DW_XPR,aluFn.FN_AES_ESM,N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) } class ZKNE64Decode(implicit val p: Parameters) extends DecodeConstants with UsesABLUFN { val table: Array[(BitPat, List[BitPat])] = Array( - AES64ES -> List(Y,N,N,N,N,N,Y,Y,N,N,Y,N,A2_RS2,A1_RS1, IMM_X, DW_XPR,aluFn.FN_AES_ES, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - AES64ESM -> List(Y,N,N,N,N,N,Y,Y,N,N,Y,N,A2_RS2,A1_RS1, IMM_X, DW_XPR,aluFn.FN_AES_ESM,N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) + AES64ES -> List(Y,N,N,N,N,N,Y,Y,N,Y,N,A2_RS2,A1_RS1, IMM_X, DW_XPR,aluFn.FN_AES_ES, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + AES64ESM -> List(Y,N,N,N,N,N,Y,Y,N,Y,N,A2_RS2,A1_RS1, IMM_X, DW_XPR,aluFn.FN_AES_ESM,N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) } class ZKNHDecode(implicit val p: Parameters) extends DecodeConstants with UsesABLUFN { val table: Array[(BitPat, List[BitPat])] = Array( - SHA256SIG0->List(Y,N,N,N,N,N,N,Y,N,N,Y,N,A2_X ,A1_RS1, IMM_X, DW_X, aluFn.FN_SHA256_SIG0,N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - SHA256SIG1->List(Y,N,N,N,N,N,N,Y,N,N,Y,N,A2_X ,A1_RS1, IMM_X, DW_X, aluFn.FN_SHA256_SIG1,N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - SHA256SUM0->List(Y,N,N,N,N,N,N,Y,N,N,Y,N,A2_X ,A1_RS1, IMM_X, DW_X, aluFn.FN_SHA256_SUM0,N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - SHA256SUM1->List(Y,N,N,N,N,N,N,Y,N,N,Y,N,A2_X ,A1_RS1, IMM_X, DW_X, aluFn.FN_SHA256_SUM1,N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) + SHA256SIG0->List(Y,N,N,N,N,N,N,Y,N,Y,N,A2_X ,A1_RS1, IMM_X, DW_X, aluFn.FN_SHA256_SIG0,N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + SHA256SIG1->List(Y,N,N,N,N,N,N,Y,N,Y,N,A2_X ,A1_RS1, IMM_X, DW_X, aluFn.FN_SHA256_SIG1,N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + SHA256SUM0->List(Y,N,N,N,N,N,N,Y,N,Y,N,A2_X ,A1_RS1, IMM_X, DW_X, aluFn.FN_SHA256_SUM0,N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + SHA256SUM1->List(Y,N,N,N,N,N,N,Y,N,Y,N,A2_X ,A1_RS1, IMM_X, DW_X, aluFn.FN_SHA256_SUM1,N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) } class ZKNH32Decode(implicit val p: Parameters) extends DecodeConstants with UsesABLUFN { val table: Array[(BitPat, List[BitPat])] = Array( Instructions32.SHA512SIG0L -> - List(Y,N,N,N,N,N,Y,Y,N,N,Y,N,A2_RS2,A1_RS1, IMM_X, DW_X, aluFn.FN_SHA512_SIG0,N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + List(Y,N,N,N,N,N,Y,Y,N,Y,N,A2_RS2,A1_RS1, IMM_X, DW_X, aluFn.FN_SHA512_SIG0,N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), Instructions32.SHA512SIG1L -> - List(Y,N,N,N,N,N,Y,Y,N,N,Y,N,A2_RS2,A1_RS1, IMM_X, DW_X, aluFn.FN_SHA512_SIG1,N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + List(Y,N,N,N,N,N,Y,Y,N,Y,N,A2_RS2,A1_RS1, IMM_X, DW_X, aluFn.FN_SHA512_SIG1,N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), Instructions32.SHA512SIG0H -> - List(Y,N,N,N,N,N,Y,Y,N,N,Y,N,A2_RS2,A1_RS1, IMM_X, DW_X, aluFn.FN_SHA512_SIG0,N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + List(Y,N,N,N,N,N,Y,Y,N,Y,N,A2_RS2,A1_RS1, IMM_X, DW_X, aluFn.FN_SHA512_SIG0,N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), Instructions32.SHA512SIG1H -> - List(Y,N,N,N,N,N,Y,Y,N,N,Y,N,A2_RS2,A1_RS1, IMM_X, DW_X, aluFn.FN_SHA512_SIG1,N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + List(Y,N,N,N,N,N,Y,Y,N,Y,N,A2_RS2,A1_RS1, IMM_X, DW_X, aluFn.FN_SHA512_SIG1,N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), Instructions32.SHA512SUM0R -> - List(Y,N,N,N,N,N,Y,Y,N,N,Y,N,A2_RS2,A1_RS1, IMM_X, DW_X, aluFn.FN_SHA512_SUM0,N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + List(Y,N,N,N,N,N,Y,Y,N,Y,N,A2_RS2,A1_RS1, IMM_X, DW_X, aluFn.FN_SHA512_SUM0,N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), Instructions32.SHA512SUM1R -> - List(Y,N,N,N,N,N,Y,Y,N,N,Y,N,A2_RS2,A1_RS1, IMM_X, DW_X, aluFn.FN_SHA512_SUM1,N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) + List(Y,N,N,N,N,N,Y,Y,N,Y,N,A2_RS2,A1_RS1, IMM_X, DW_X, aluFn.FN_SHA512_SUM1,N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) } class ZKNH64Decode(implicit val p: Parameters) extends DecodeConstants with UsesABLUFN { val table: Array[(BitPat, List[BitPat])] = Array( - SHA512SIG0->List(Y,N,N,N,N,N,N,Y,N,N,Y,N,A2_X ,A1_RS1, IMM_X, DW_X, aluFn.FN_SHA512_SIG0,N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - SHA512SIG1->List(Y,N,N,N,N,N,N,Y,N,N,Y,N,A2_X ,A1_RS1, IMM_X, DW_X, aluFn.FN_SHA512_SIG1,N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - SHA512SUM0->List(Y,N,N,N,N,N,N,Y,N,N,Y,N,A2_X ,A1_RS1, IMM_X, DW_X, aluFn.FN_SHA512_SUM0,N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - SHA512SUM1->List(Y,N,N,N,N,N,N,Y,N,N,Y,N,A2_X ,A1_RS1, IMM_X, DW_X, aluFn.FN_SHA512_SUM1,N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) + SHA512SIG0->List(Y,N,N,N,N,N,N,Y,N,Y,N,A2_X ,A1_RS1, IMM_X, DW_X, aluFn.FN_SHA512_SIG0,N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + SHA512SIG1->List(Y,N,N,N,N,N,N,Y,N,Y,N,A2_X ,A1_RS1, IMM_X, DW_X, aluFn.FN_SHA512_SIG1,N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + SHA512SUM0->List(Y,N,N,N,N,N,N,Y,N,Y,N,A2_X ,A1_RS1, IMM_X, DW_X, aluFn.FN_SHA512_SUM0,N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + SHA512SUM1->List(Y,N,N,N,N,N,N,Y,N,Y,N,A2_X ,A1_RS1, IMM_X, DW_X, aluFn.FN_SHA512_SUM1,N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) } class ZKSDecode(implicit val p: Parameters) extends DecodeConstants with UsesABLUFN { val table: Array[(BitPat, List[BitPat])] = Array( - SM4ED -> List(Y,N,N,N,N,N,Y,Y,N,N,N,Y,A2_RS2,A1_RS1, IMM_X, DW_X, aluFn.FN_SM4ED, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - SM4KS -> List(Y,N,N,N,N,N,Y,Y,N,N,N,Y,A2_RS2,A1_RS1, IMM_X, DW_X, aluFn.FN_SM4KS, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - SM3P0 -> List(Y,N,N,N,N,N,N,Y,N,N,N,Y,A2_X ,A1_RS1, IMM_X, DW_X, aluFn.FN_SM3P0, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - SM3P1 -> List(Y,N,N,N,N,N,N,Y,N,N,N,Y,A2_X ,A1_RS1, IMM_X, DW_X, aluFn.FN_SM3P1, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) + SM4ED -> List(Y,N,N,N,N,N,Y,Y,N,N,Y,A2_RS2,A1_RS1, IMM_X, DW_X, aluFn.FN_SM4ED, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + SM4KS -> List(Y,N,N,N,N,N,Y,Y,N,N,Y,A2_RS2,A1_RS1, IMM_X, DW_X, aluFn.FN_SM4KS, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + SM3P0 -> List(Y,N,N,N,N,N,N,Y,N,N,Y,A2_X ,A1_RS1, IMM_X, DW_X, aluFn.FN_SM3P0, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + SM3P1 -> List(Y,N,N,N,N,N,N,Y,N,N,Y,A2_X ,A1_RS1, IMM_X, DW_X, aluFn.FN_SM3P1, N,M_X, N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) } class RoCCDecode(aluFn: ALUFN = ALUFN())(implicit val p: Parameters) extends DecodeConstants { val table: Array[(BitPat, List[BitPat])] = Array( - CUSTOM0-> List(Y,N,Y,N,N,N,N,N,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, N,M_X,N,N,N,N,N,N,N,CSR.N,N,N,N,N), - CUSTOM0_RS1-> List(Y,N,Y,N,N,N,N,Y,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, N,M_X,N,N,N,N,N,N,N,CSR.N,N,N,N,N), - CUSTOM0_RS1_RS2-> List(Y,N,Y,N,N,N,Y,Y,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, N,M_X,N,N,N,N,N,N,N,CSR.N,N,N,N,N), - CUSTOM0_RD-> List(Y,N,Y,N,N,N,N,N,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, N,M_X,N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - CUSTOM0_RD_RS1-> List(Y,N,Y,N,N,N,N,Y,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, N,M_X,N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - CUSTOM0_RD_RS1_RS2->List(Y,N,Y,N,N,N,Y,Y,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, N,M_X,N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - CUSTOM1-> List(Y,N,Y,N,N,N,N,N,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, N,M_X,N,N,N,N,N,N,N,CSR.N,N,N,N,N), - CUSTOM1_RS1-> List(Y,N,Y,N,N,N,N,Y,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, N,M_X,N,N,N,N,N,N,N,CSR.N,N,N,N,N), - CUSTOM1_RS1_RS2-> List(Y,N,Y,N,N,N,Y,Y,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, N,M_X,N,N,N,N,N,N,N,CSR.N,N,N,N,N), - CUSTOM1_RD-> List(Y,N,Y,N,N,N,N,N,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, N,M_X,N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - CUSTOM1_RD_RS1-> List(Y,N,Y,N,N,N,N,Y,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, N,M_X,N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - CUSTOM1_RD_RS1_RS2->List(Y,N,Y,N,N,N,Y,Y,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, N,M_X,N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - CUSTOM2-> List(Y,N,Y,N,N,N,N,N,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, N,M_X,N,N,N,N,N,N,N,CSR.N,N,N,N,N), - CUSTOM2_RS1-> List(Y,N,Y,N,N,N,N,Y,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, N,M_X,N,N,N,N,N,N,N,CSR.N,N,N,N,N), - CUSTOM2_RS1_RS2-> List(Y,N,Y,N,N,N,Y,Y,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, N,M_X,N,N,N,N,N,N,N,CSR.N,N,N,N,N), - CUSTOM2_RD-> List(Y,N,Y,N,N,N,N,N,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, N,M_X,N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - CUSTOM2_RD_RS1-> List(Y,N,Y,N,N,N,N,Y,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, N,M_X,N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - CUSTOM2_RD_RS1_RS2->List(Y,N,Y,N,N,N,Y,Y,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, N,M_X,N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - CUSTOM3-> List(Y,N,Y,N,N,N,N,N,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, N,M_X,N,N,N,N,N,N,N,CSR.N,N,N,N,N), - CUSTOM3_RS1-> List(Y,N,Y,N,N,N,N,Y,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, N,M_X,N,N,N,N,N,N,N,CSR.N,N,N,N,N), - CUSTOM3_RS1_RS2-> List(Y,N,Y,N,N,N,Y,Y,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, N,M_X,N,N,N,N,N,N,N,CSR.N,N,N,N,N), - CUSTOM3_RD-> List(Y,N,Y,N,N,N,N,N,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, N,M_X,N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - CUSTOM3_RD_RS1-> List(Y,N,Y,N,N,N,N,Y,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, N,M_X,N,N,N,N,N,N,Y,CSR.N,N,N,N,N), - CUSTOM3_RD_RS1_RS2->List(Y,N,Y,N,N,N,Y,Y,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, N,M_X,N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) + CUSTOM0-> List(Y,N,Y,N,N,N,N,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, N,M_X,N,N,N,N,N,N,N,CSR.N,N,N,N,N), + CUSTOM0_RS1-> List(Y,N,Y,N,N,N,N,Y,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, N,M_X,N,N,N,N,N,N,N,CSR.N,N,N,N,N), + CUSTOM0_RS1_RS2-> List(Y,N,Y,N,N,N,Y,Y,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, N,M_X,N,N,N,N,N,N,N,CSR.N,N,N,N,N), + CUSTOM0_RD-> List(Y,N,Y,N,N,N,N,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, N,M_X,N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + CUSTOM0_RD_RS1-> List(Y,N,Y,N,N,N,N,Y,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, N,M_X,N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + CUSTOM0_RD_RS1_RS2->List(Y,N,Y,N,N,N,Y,Y,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, N,M_X,N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + CUSTOM1-> List(Y,N,Y,N,N,N,N,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, N,M_X,N,N,N,N,N,N,N,CSR.N,N,N,N,N), + CUSTOM1_RS1-> List(Y,N,Y,N,N,N,N,Y,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, N,M_X,N,N,N,N,N,N,N,CSR.N,N,N,N,N), + CUSTOM1_RS1_RS2-> List(Y,N,Y,N,N,N,Y,Y,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, N,M_X,N,N,N,N,N,N,N,CSR.N,N,N,N,N), + CUSTOM1_RD-> List(Y,N,Y,N,N,N,N,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, N,M_X,N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + CUSTOM1_RD_RS1-> List(Y,N,Y,N,N,N,N,Y,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, N,M_X,N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + CUSTOM1_RD_RS1_RS2->List(Y,N,Y,N,N,N,Y,Y,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, N,M_X,N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + CUSTOM2-> List(Y,N,Y,N,N,N,N,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, N,M_X,N,N,N,N,N,N,N,CSR.N,N,N,N,N), + CUSTOM2_RS1-> List(Y,N,Y,N,N,N,N,Y,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, N,M_X,N,N,N,N,N,N,N,CSR.N,N,N,N,N), + CUSTOM2_RS1_RS2-> List(Y,N,Y,N,N,N,Y,Y,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, N,M_X,N,N,N,N,N,N,N,CSR.N,N,N,N,N), + CUSTOM2_RD-> List(Y,N,Y,N,N,N,N,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, N,M_X,N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + CUSTOM2_RD_RS1-> List(Y,N,Y,N,N,N,N,Y,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, N,M_X,N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + CUSTOM2_RD_RS1_RS2->List(Y,N,Y,N,N,N,Y,Y,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, N,M_X,N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + CUSTOM3-> List(Y,N,Y,N,N,N,N,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, N,M_X,N,N,N,N,N,N,N,CSR.N,N,N,N,N), + CUSTOM3_RS1-> List(Y,N,Y,N,N,N,N,Y,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, N,M_X,N,N,N,N,N,N,N,CSR.N,N,N,N,N), + CUSTOM3_RS1_RS2-> List(Y,N,Y,N,N,N,Y,Y,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, N,M_X,N,N,N,N,N,N,N,CSR.N,N,N,N,N), + CUSTOM3_RD-> List(Y,N,Y,N,N,N,N,N,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, N,M_X,N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + CUSTOM3_RD_RS1-> List(Y,N,Y,N,N,N,N,Y,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, N,M_X,N,N,N,N,N,N,Y,CSR.N,N,N,N,N), + CUSTOM3_RD_RS1_RS2->List(Y,N,Y,N,N,N,Y,Y,N,N,N,A2_ZERO,A1_RS1, IMM_X, DW_XPR,aluFn.FN_ADD, N,M_X,N,N,N,N,N,N,Y,CSR.N,N,N,N,N)) } diff --git a/src/main/scala/rocket/RocketCore.scala b/src/main/scala/rocket/RocketCore.scala index d32e0d5b22a..34f16d273c3 100644 --- a/src/main/scala/rocket/RocketCore.scala +++ b/src/main/scala/rocket/RocketCore.scala @@ -10,7 +10,6 @@ import org.chipsalliance.cde.config.Parameters import freechips.rocketchip.tile._ import freechips.rocketchip.util._ import freechips.rocketchip.util.property -import freechips.rocketchip.scie._ import scala.collection.mutable.ArrayBuffer case class RocketCoreParams( @@ -24,7 +23,6 @@ case class RocketCoreParams( useAtomicsOnlyForIO: Boolean = false, useCompressed: Boolean = true, useRVE: Boolean = false, - useSCIE: Boolean = false, useBitManip: Boolean = false, useBitManipCrypto: Boolean = false, useCryptoNIST: Boolean = false, @@ -185,14 +183,12 @@ class Rocket(tile: RocketTile)(implicit p: Parameters) extends CoreModule()(p) val pipelinedMul = usingMulDiv && mulDivParams.mulUnroll == xLen val decode_table = { - require(!usingRoCC || !rocketParams.useSCIE) (if (usingMulDiv) new MDecode(pipelinedMul, aluFn) +: (xLen > 32).option(new M64Decode(pipelinedMul, aluFn)).toSeq else Nil) ++: (if (usingAtomics) new ADecode(aluFn) +: (xLen > 32).option(new A64Decode(aluFn)).toSeq else Nil) ++: (if (fLen >= 32) new FDecode(aluFn) +: (xLen > 32).option(new F64Decode(aluFn)).toSeq else Nil) ++: (if (fLen >= 64) new DDecode(aluFn) +: (xLen > 32).option(new D64Decode(aluFn)).toSeq else Nil) ++: (if (minFLen == 16) new HDecode(aluFn) +: (xLen > 32).option(new H64Decode(aluFn)).toSeq ++: (fLen >= 64).option(new HDDecode(aluFn)).toSeq else Nil) ++: (usingRoCC.option(new RoCCDecode(aluFn))) ++: - (rocketParams.useSCIE.option(new SCIEDecode(aluFn))) ++: (if (usingBitManip) new ZBADecode +: (xLen == 64).option(new ZBA64Decode).toSeq ++: new ZBBMDecode +: new ZBBORCBDecode +: new ZBCRDecode +: new ZBSDecode +: (xLen == 32).option(new ZBS32Decode).toSeq ++: (xLen == 64).option(new ZBS64Decode).toSeq ++: new ZBBSEDecode +: new ZBBCDecode +: (xLen == 64).option(new ZBBC64Decode).toSeq else Nil) ++: (if (usingBitManip && !usingBitManipCrypto) (xLen == 32).option(new ZBBZE32Decode).toSeq ++: (xLen == 64).option(new ZBBZE64Decode).toSeq else Nil) ++: (if (usingBitManip || usingBitManipCrypto) new ZBBNDecode +: new ZBCDecode +: new ZBBRDecode +: (xLen == 32).option(new ZBBR32Decode).toSeq ++: (xLen == 64).option(new ZBBR64Decode).toSeq ++: (xLen == 32).option(new ZBBREV832Decode).toSeq ++: (xLen == 64).option(new ZBBREV864Decode).toSeq else Nil) ++: @@ -233,8 +229,6 @@ class Rocket(tile: RocketTile)(implicit p: Parameters) extends CoreModule()(p) val ex_reg_hls = Reg(Bool()) val ex_reg_inst = Reg(Bits()) val ex_reg_raw_inst = Reg(UInt()) - val ex_scie_unpipelined = Reg(Bool()) - val ex_scie_pipelined = Reg(Bool()) val ex_reg_wphit = Reg(Vec(nBreakpoints, Bool())) val mem_reg_xcpt_interrupt = Reg(Bool()) @@ -254,8 +248,6 @@ class Rocket(tile: RocketTile)(implicit p: Parameters) extends CoreModule()(p) val mem_reg_mem_size = Reg(UInt()) val mem_reg_hls_or_dv = Reg(Bool()) val mem_reg_raw_inst = Reg(UInt()) - val mem_scie_unpipelined = Reg(Bool()) - val mem_scie_pipelined = Reg(Bool()) val mem_reg_wdata = Reg(Bits()) val mem_reg_rs2 = Reg(Bits()) val mem_br_taken = Reg(Bool()) @@ -320,12 +312,6 @@ class Rocket(tile: RocketTile)(implicit p: Parameters) extends CoreModule()(p) val id_csr = Mux(id_system_insn && id_ctrl.mem, CSR.N, Mux(id_csr_ren, CSR.R, id_ctrl.csr)) val id_csr_flush = id_system_insn || (id_csr_en && !id_csr_ren && csr.io.decode(0).write_flush) - val id_scie_decoder = if (!rocketParams.useSCIE) WireDefault(0.U.asTypeOf(new SCIEDecoderInterface)) else { - val d = Module(new SCIEDecoder) - assert(!io.imem.resp.valid || PopCount(d.io.unpipelined :: d.io.pipelined :: d.io.multicycle :: Nil) <= 1.U) - d.io.insn := id_raw_inst(0) - d.io - } val id_illegal_rnum = if (usingCryptoNIST) (id_ctrl.zkn && aluFn.isKs1(id_ctrl.alu_fn) && id_inst(0)(23,20) > 0xA.U(4.W)) else false.B val id_illegal_insn = !id_ctrl.legal || (id_ctrl.mul || id_ctrl.div) && !csr.io.status.isa('m'-'a') || @@ -333,11 +319,10 @@ class Rocket(tile: RocketTile)(implicit p: Parameters) extends CoreModule()(p) id_ctrl.fp && (csr.io.decode(0).fp_illegal || io.fpu.illegal_rm) || id_ctrl.dp && !csr.io.status.isa('d'-'a') || ibuf.io.inst(0).bits.rvc && !csr.io.status.isa('c'-'a') || - id_raddr2_illegal && !id_ctrl.scie && id_ctrl.rxs2 || - id_raddr1_illegal && !id_ctrl.scie && id_ctrl.rxs1 || - id_waddr_illegal && !id_ctrl.scie && id_ctrl.wxd || + id_raddr2_illegal && id_ctrl.rxs2 || + id_raddr1_illegal && id_ctrl.rxs1 || + id_waddr_illegal && id_ctrl.wxd || id_ctrl.rocc && csr.io.decode(0).rocc_illegal || - id_ctrl.scie && !(id_scie_decoder.unpipelined || id_scie_decoder.pipelined) || id_csr_en && (csr.io.decode(0).read_illegal || !id_csr_ren && csr.io.decode(0).write_illegal) || !ibuf.io.inst(0).bits.rvc && (id_system_insn && csr.io.decode(0).system_illegal) || id_illegal_rnum @@ -432,24 +417,6 @@ class Rocket(tile: RocketTile)(implicit p: Parameters) extends CoreModule()(p) alu.io.in2 := ex_op2.asUInt alu.io.in1 := ex_op1.asUInt - val ex_scie_unpipelined_wdata = if (!rocketParams.useSCIE) 0.U else { - val u = Module(new SCIEUnpipelined(xLen)) - u.io.insn := ex_reg_inst - u.io.rs1 := ex_rs(0) - u.io.rs2 := ex_rs(1) - u.io.rd - } - - val mem_scie_pipelined_wdata = if (!rocketParams.useSCIE) 0.U else { - val u = Module(new SCIEPipelined(xLen)) - u.io.clock := Module.clock - u.io.valid := ex_reg_valid && ex_scie_pipelined - u.io.insn := ex_reg_inst - u.io.rs1 := ex_rs(0) - u.io.rs2 := ex_rs(1) - u.io.rd - } - val ex_zbk_wdata = if (!usingBitManipCrypto && !usingBitManip) 0.U else { val zbk = Module(new BitManipCrypto(xLen)) zbk.io.fn := ex_ctrl.alu_fn @@ -502,8 +469,6 @@ class Rocket(tile: RocketTile)(implicit p: Parameters) extends CoreModule()(p) ex_ctrl := id_ctrl ex_reg_rvc := ibuf.io.inst(0).bits.rvc ex_ctrl.csr := id_csr - ex_scie_unpipelined := id_ctrl.scie && id_scie_decoder.unpipelined - ex_scie_pipelined := id_ctrl.scie && id_scie_decoder.pipelined when (id_ctrl.fence && id_fence_succ === 0.U) { id_reg_pause := true.B } when (id_fence_next) { id_reg_fence := true.B } when (id_xcpt) { // pass PC down ALU writeback pipeline for badaddr @@ -610,8 +575,6 @@ class Rocket(tile: RocketTile)(implicit p: Parameters) extends CoreModule()(p) mem_reg_sfence := false.B }.elsewhen (ex_pc_valid) { mem_ctrl := ex_ctrl - mem_scie_unpipelined := ex_scie_unpipelined - mem_scie_pipelined := ex_scie_pipelined mem_reg_rvc := ex_reg_rvc mem_reg_load := ex_ctrl.mem && isRead(ex_ctrl.mem_cmd) mem_reg_store := ex_ctrl.mem && isWrite(ex_ctrl.mem_cmd) @@ -629,11 +592,10 @@ class Rocket(tile: RocketTile)(implicit p: Parameters) extends CoreModule()(p) mem_reg_pc := ex_reg_pc // IDecode ensured they are 1H mem_reg_wdata := Mux1H(Seq( - ex_scie_unpipelined -> ex_scie_unpipelined_wdata, ex_ctrl.zbk -> ex_zbk_wdata, ex_ctrl.zkn -> ex_zkn_wdata, ex_ctrl.zks -> ex_zks_wdata, - (!ex_scie_unpipelined && !ex_ctrl.zbk && !ex_ctrl.zkn && !ex_ctrl.zks) + (!ex_ctrl.zbk && !ex_ctrl.zkn && !ex_ctrl.zks) -> alu.io.out, )) mem_br_taken := alu.io.cmp_out @@ -682,8 +644,7 @@ class Rocket(tile: RocketTile)(implicit p: Parameters) extends CoreModule()(p) when (mem_pc_valid) { wb_ctrl := mem_ctrl wb_reg_sfence := mem_reg_sfence - wb_reg_wdata := Mux(mem_scie_pipelined, mem_scie_pipelined_wdata, - Mux(!mem_reg_xcpt && mem_ctrl.fp && mem_ctrl.wxd, io.fpu.toint_data, mem_int_wdata)) + wb_reg_wdata := Mux(!mem_reg_xcpt && mem_ctrl.fp && mem_ctrl.wxd, io.fpu.toint_data, mem_int_wdata) when (mem_ctrl.rocc || mem_reg_sfence) { wb_reg_rs2 := mem_reg_rs2 } @@ -869,7 +830,7 @@ class Rocket(tile: RocketTile)(implicit p: Parameters) extends CoreModule()(p) sboard.set(wb_set_sboard && wb_wen, wb_waddr) // stall for RAW/WAW hazards on CSRs, loads, AMOs, and mul/div in execute stage. - val ex_cannot_bypass = ex_ctrl.csr =/= CSR.N || ex_ctrl.jalr || ex_ctrl.mem || ex_ctrl.mul || ex_ctrl.div || ex_ctrl.fp || ex_ctrl.rocc || ex_scie_pipelined + val ex_cannot_bypass = ex_ctrl.csr =/= CSR.N || ex_ctrl.jalr || ex_ctrl.mem || ex_ctrl.mul || ex_ctrl.div || ex_ctrl.fp || ex_ctrl.rocc val data_hazard_ex = ex_ctrl.wxd && checkHazards(hazard_targets, _ === ex_waddr) val fp_data_hazard_ex = id_ctrl.fp && ex_ctrl.wfd && checkHazards(fp_hazard_targets, _ === ex_waddr) val id_ex_hazard = ex_reg_valid && (data_hazard_ex && ex_cannot_bypass || fp_data_hazard_ex) diff --git a/src/main/scala/scie/SCIE.scala b/src/main/scala/scie/SCIE.scala deleted file mode 100644 index a9e46f51a7e..00000000000 --- a/src/main/scala/scie/SCIE.scala +++ /dev/null @@ -1,206 +0,0 @@ -// See LICENSE.SiFive for license details. - -package freechips.rocketchip.scie - -import chisel3._ -import chisel3.util.{BitPat, HasBlackBoxInline} -import chisel3.experimental.fromIntToIntParam - -object SCIE { - val opcode = BitPat("b?????????????????????????0?01011") - val iLen = 32 -} - -class SCIEDecoderInterface extends Bundle { - val insn = Input(UInt(SCIE.iLen.W)) - val unpipelined = Output(Bool()) - val pipelined = Output(Bool()) - val multicycle = Output(Bool()) -} - -class SCIEDecoder extends BlackBox with HasBlackBoxInline { - val io = IO(new SCIEDecoderInterface) - - setInline("SCIEDecoder.v", - s""" - |module SCIEDecoder ( - | input [${SCIE.iLen-1}:0] insn, - | output unpipelined, - | output pipelined, - | output multicycle); - | - | /* This module decodes a SCIE instruction and indicates which functional unit - | to send the instruction to (unpipelined, pipelined, or multicycle). The - | outputs are don't-cares unless insn lies within the custom-0 or custom-1 - | major opcodes. If it is within custom-0 or custom-1, then at most one of - | the outputs may be high. If none are high, an illegal-instruction trap - | occurs. If multiple are high, the behavior is undefined. - | - | This example implementation permits Funct3 = 0 or 1 within both custom-0 - | and custom-1 as Unpipelined instructions. - | - | It also permits Funct3 = 2 or 3 within custom-0 as Pipelined instructions. - | */ - | - | wire [2:0] funct3 = insn[14:12]; - | - | assign unpipelined = funct3 <= 3'h1; - | assign pipelined = funct3 == 3'h2 || funct3 == 3'h3; - | assign multicycle = 1'b0; - | - |endmodule - """.stripMargin) -} - -class SCIEUnpipelinedInterface(xLen: Int) extends Bundle { - val insn = Input(UInt(SCIE.iLen.W)) - val rs1 = Input(UInt(xLen.W)) - val rs2 = Input(UInt(xLen.W)) - val rd = Output(UInt(xLen.W)) -} - -class SCIEUnpipelined(xLen: Int) extends BlackBox(Map("XLEN" -> xLen)) with HasBlackBoxInline { - val io = IO(new SCIEUnpipelinedInterface(xLen)) - - setInline("SCIEUnpipelined.v", - s""" - |module SCIEUnpipelined #(parameter XLEN = 32) ( - | input [${SCIE.iLen-1}:0] insn, - | input [XLEN-1:0] rs1, - | input [XLEN-1:0] rs2, - | output [XLEN-1:0] rd); - | - | /* This example SCIE implementation provides the following instructions: - | - | Major opcode custom-0: - | Funct3 = 0: MIN (rd = rs1 < rs2 ? rs1 : rs2) - | Funct3 = 1: MAX (rd = rs1 > rs2 ? rs1 : rs2) - | - | Major opcode custom-1: - | Funct3 = 0: MINI (rd = rs1 < imm[11:0] ? rs1 : imm[11:0]) - | Funct3 = 1: MAXI (rd = rs1 > imm[11:0] ? rs1 : imm[11:0]) - | */ - | - | /* Decode the instruction. */ - | wire use_immediate = insn[5]; - | wire pick_smaller = !insn[12]; - | - | /* Mux the operands. */ - | wire [XLEN-1:0] immediate = {{(XLEN-12){insn[31]}}, insn[31:20]}; - | wire [XLEN-1:0] rhs = use_immediate ? immediate : rs2; - | wire [XLEN-1:0] lhs = rs1; - | - | /* Perform the computation. */ - | wire lhs_smaller = $$signed(lhs) < $$signed(rhs); - | wire [XLEN-1:0] result = lhs_smaller == pick_smaller ? lhs : rhs; - | - | /* Drive the output. */ - | assign rd = result; - | - |endmodule - """.stripMargin) -} - -class SCIEPipelinedInterface(xLen: Int) extends Bundle { - val clock = Input(Clock()) - val valid = Input(Bool()) - val insn = Input(UInt(SCIE.iLen.W)) - val rs1 = Input(UInt(xLen.W)) - val rs2 = Input(UInt(xLen.W)) - val rd = Output(UInt(xLen.W)) -} - -class SCIEPipelined(xLen: Int) extends BlackBox(Map("XLEN" -> xLen)) with HasBlackBoxInline { - val io = IO(new SCIEPipelinedInterface(xLen)) - - setInline("SCIEPipelined.v", - s""" - |module SCIEPipelined #(parameter XLEN = 32) ( - | input clock, - | input valid, - | input [${SCIE.iLen-1}:0] insn, - | input [XLEN-1:0] rs1, - | input [XLEN-1:0] rs2, - | output [XLEN-1:0] rd); - | - | /* This example SCIE implementation provides the following instructions: - | - | Major opcode custom-0: - | Funct3 = 2: AD.U8, compute absolute differences of packed uint8 - | rd[7:0] = abs(rs1[7:0] - rs2[7:0]) - | rd[15:8] = abs(rs1[15:8] - rs2[15:8]) - | ... - | rd[XLEN-1:XLEN-8] = abs(rs1[XLEN-1:XLEN-8] - rs2[XLEN-1:XLEN-8]) - | - | Funct3 = 3: SAD.U8, compute sum of absolute differences of packed uint8 - | tmp[7:0] = abs(rs1[7:0] - rs2[7:0]) - | tmp[15:8] = abs(rs1[15:8] - rs2[15:8]) - | ... - | tmp[XLEN-1:XLEN-8] = abs(rs1[XLEN-1:XLEN-8] - rs2[XLEN-1:XLEN-8]) - | - | rd = tmp[7:0] + tmp[15:8] + ... + tmp[XLEN-1:XLEN-8] - | */ - | - | integer i; - | reg [XLEN-1:0] absolute_differences; - | reg funct3_0; - | reg [XLEN-1:0] result; - | - |`ifndef RANDOM - |`define RANDOM $$random - |`endif - | - | always @(posedge clock) - | begin - | /* Gating using the valid signal is optional, but saves power. */ - | if (valid) - | begin - | /* Register Funct3[0] opcode bit for result muxing in next stage. */ - | funct3_0 <= insn[12]; - | - | /* Compute each absolute difference and register each result. */ - | for (i = 0; i < XLEN/8; i = i + 1) - | begin - | absolute_differences[8*i +: 8] <= rs1[8*i +: 8] < rs2[8*i +: 8] ? - | rs2[8*i +: 8] - rs1[8*i +: 8] : - | rs1[8*i +: 8] - rs2[8*i +: 8]; - | end - | end - | end - | - | /* In the second pipeline stage, compute the final result. */ - | always @(*) - | begin - | if (!funct3_0) - | begin - | /* If Funct3[0] = 0, the output is the packed absolute differences. */ - | result = absolute_differences; - | end - | else - | begin - | /* If Funct3[0] = 1, the output is their sum. */ - | result = {XLEN{1'b0}}; - | for (i = 0; i < XLEN/8; i = i + 1) - | begin - | result = result + {{(XLEN-8){1'b0}}, absolute_differences[8*i +: 8]}; - | end - | end - | end - | - | /* Drive the output. */ - | assign rd = result; - | - | /* Suppress Xs at simulation start */ - | `ifdef RANDOMIZE_REG_INIT - | initial begin - | `ifndef VERILATOR - | #`RANDOMIZE_DELAY begin end - | `endif - | absolute_differences = {(XLEN / 32){`RANDOM}}; - | funct3_0 = absolute_differences[0]; - | end - | `endif - | - |endmodule - """.stripMargin) -} diff --git a/src/main/scala/tile/Core.scala b/src/main/scala/tile/Core.scala index ba4382a7ede..bb4d7abf6ae 100644 --- a/src/main/scala/tile/Core.scala +++ b/src/main/scala/tile/Core.scala @@ -25,7 +25,6 @@ trait CoreParams { val useBitManip: Boolean val useBitManipCrypto: Boolean val useVector: Boolean = false - val useSCIE: Boolean val useCryptoNIST: Boolean val useCryptoSM: Boolean val useRVE: Boolean @@ -89,7 +88,6 @@ trait HasCoreParameters extends HasTileParameters { val usingBitManip = coreParams.useBitManip val usingBitManipCrypto = coreParams.hasBitManipCrypto val usingVector = coreParams.useVector - val usingSCIE = coreParams.useSCIE val usingCryptoNIST = coreParams.useCryptoNIST val usingCryptoSM = coreParams.useCryptoSM val usingNMI = coreParams.useNMI