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Fix Clash.Clocks lock signal (copy #2417) #2420

Merged
merged 1 commit into from
Feb 10, 2023
Merged

Fix Clash.Clocks lock signal (copy #2417) #2420

merged 1 commit into from
Feb 10, 2023

Commits on Feb 10, 2023

  1. Fix Clash.Clocks lock signal (#2417) 

    The lock signal is now `False` for the time that the input reset signal
is asserted, and `True` when the input reset signal is not asserted.

Before this commit, the lock signal output was defined in terms of the
reset input as follows:

```
rstIn :: Reset domIn
lockOut :: Signal pllOut Bool
lockOut = unsafeCoerce rstIn
```

This is incorrect in three ways:

* You can't coerce a `Reset` into a `Signal`, it segfaults.
* The timebase is wrong: one input sample becomes one output sample even
  when the output clock has a different period than the input clock.
* There is no handling of `ResetPolarity`; the simulation model is that
  lock is deasserted when reset is asserted.

(cherry picked from commit c60353e)
    @DigitalBrains1
    DigitalBrains1 committed Feb 10, 2023
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