Updating front-end code to accommodate Intel HLS and add library for … #206
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added 5 commits
September 29, 2024 17:03
…compiling HLS code to bitstream for Intel FPGA
…files that are used for compilation
chhzh123
reviewed
Sep 30, 2024
allo/backend/hls.py
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| }, "Invalid mode" | ||
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| if project is not None: | ||
| filename = f"{project}" |
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filename is different from project. For example, users can specify the project as a nested folder test/out.prj.
allo/backend/hls.py
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| if mode == "fpga_emulator": | ||
| result = subprocess.run( | ||
| [ | ||
| f" icpx -fintelfpga -DFPGA_EMULATOR .//{filename} -o {filename}.exe" |
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Use linux instruction. Also, how do you handle the non-emulator situations?
allo/backend/hls.py
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| elif mode == "source_file_only": | ||
| print( | ||
| f"Generated Intel HLS source file kernel.cpp has been created successfully in your current directory under '{filename}' folder." | ||
| ) | ||
| print( | ||
| "mode has been set to source_file_only, the output will only be the souce intel HLS code" | ||
| ) |
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I don't think we need this mode. Users can always access the source code from the built folder
allo/backend/hls.py
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| if platform.lower() != "ihls": | ||
| with open(f"{project}/host.cpp", "w", encoding="utf-8") as outfile: | ||
| outfile.write(self.host_code) | ||
| else: | ||
| print("Platform is intel HLS; skipping generation of host.cpp.") | ||
|
|
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The host code is also set as empty. No need to skip the generation. Otherwise, you'd better change the name of kernel.cpp as this one has already contained both host and device code.
allo/customize.py
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| if target == "ihls": | ||
| platform = "ihls" | ||
| elif target == "vitis_hls": | ||
| platform = "vitis_hls" | ||
| else: | ||
| platform = "vivado_hls" |
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"vivado_hls" if target == "vhls" else target
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…compiling HLS code to bitstream for Intel FPGA
Description
Updated front-end code to accommodate Intel HLS and add library for compiling HLS code to bitstream for Intel FPGA
Problems
The Intel HLS option was not available for the user
Proposed Solutions
updated the code to allow users to choose a mode to output Intel HLS code in the command line, output source HLS as a file, or compile the HLS code to an Intel FPGA emulator .exe file. added library under harness/intel_oneapi to support DPC++ compilation for FPGA.