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Daniel Jacobowitz
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* Makefile.in (mips-tdep.o): Update.
* mips-tdep.c (struct register_alias, mips_o32_aliases) (mips_n32_n64_aliases, mips_register_aliases): New. (mips_register_name): Call tdesc_register_name. (mips_tdesc_register_reggroup_p): New. (mips_pseudo_register_type, value_of_mips_user_reg): New. (mips_gdbarch_init): Add target-described register support. Register aliases for register names. * target-descriptions.c (tdesc_register_name): Make global. (tdesc_register_in_reggroup_p): New function, broken out from tdesc_register_reggroup_p. (tdesc_register_reggroup_p): Use it. * target-descriptions.h (tdesc_register_name) (tdesc_register_in_reggroup_p): New prototypes. * NEWS: Correct formatting. Mention MIPS register support. * features/mips-cp0.xml, features/mips-fpu.xml, features/mips64-cp0.xml, gdb/features/mips64-fpu.xml, mips-cpu.xml, features/mips64-cpu.xml: New files. * gdb.xml/tdesc-regs.exp: Add MIPS support. Allow multiple required features to be included. * gdb.texinfo (MIPS Features): New subsection.
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gdb/ChangeLog

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2007-06-13 Daniel Jacobowitz <dan@codesourcery.com>
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* Makefile.in (mips-tdep.o): Update.
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* mips-tdep.c (struct register_alias, mips_o32_aliases)
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(mips_n32_n64_aliases, mips_register_aliases): New.
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(mips_register_name): Call tdesc_register_name.
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(mips_tdesc_register_reggroup_p): New.
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(mips_pseudo_register_type, value_of_mips_user_reg): New.
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(mips_gdbarch_init): Add target-described register support.
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Register aliases for register names.
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* target-descriptions.c (tdesc_register_name): Make global.
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(tdesc_register_in_reggroup_p): New function, broken out from
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tdesc_register_reggroup_p.
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(tdesc_register_reggroup_p): Use it.
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* target-descriptions.h (tdesc_register_name)
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(tdesc_register_in_reggroup_p): New prototypes.
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* NEWS: Correct formatting. Mention MIPS register support.
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* features/mips-cp0.xml, features/mips-fpu.xml,
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features/mips64-cp0.xml, gdb/features/mips64-fpu.xml, mips-cpu.xml,
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features/mips64-cpu.xml: New files.
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2007-06-13 Markus Deuling <deuling@de.ibm.com>
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* gdbarch.sh (TARGET_ADDR_BIT): Replace by gdbarch_addr_bit.

gdb/Makefile.in

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@@ -2361,7 +2361,7 @@ mips-tdep.o: mips-tdep.c $(defs_h) $(gdb_string_h) $(gdb_assert_h) \
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$(elf_bfd_h) $(symcat_h) $(sim_regno_h) $(dis_asm_h) \
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$(frame_unwind_h) $(frame_base_h) $(trad_frame_h) $(infcall_h) \
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$(floatformat_h) $(remote_h) $(target_descriptions_h) \
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$(dwarf2_frame_h)
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$(dwarf2_frame_h) $(user_regs_h)
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memory-map.o: memory-map.c $(defs_h) $(memory_map_h) $(xml_support_h) \
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$(gdb_assert_h) $(exceptions_h) $(gdb_string_h)
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mn10300-linux-tdep.o: mn10300-linux-tdep.c $(defs_h) $(gdbcore_h) \

gdb/NEWS

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@@ -20,11 +20,11 @@ target's overall architecture. GDB can read a description from
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a local file or over the remote serial protocol.
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* Arrays of explicitly SIGNED or UNSIGNED CHARs are now printed as arrays
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of numbers.
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of numbers.
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* Target descriptions can now describe target-specific registers,
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for architectures which have implemented the support (currently
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only ARM).
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only ARM and MIPS).
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* GDB and the GDB remote stub, gdbserver, now support the XScale
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iWMMXt coprocessor.

gdb/doc/ChangeLog

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2007-06-13 Daniel Jacobowitz <dan@codesourcery.com>
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* gdb.texinfo (MIPS Features): New subsection.
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2007-06-12 Ulrich Weigand <uweigand@de.ibm.com>
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Markus Deuling <deuling@de.ibm.com>
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gdb/doc/gdb.texinfo

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@@ -25767,6 +25767,23 @@ it should contain at least registers @samp{wR0} through @samp{wR15} and
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@samp{wCGR0} through @samp{wCGR3}. The @samp{wCID}, @samp{wCon},
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@samp{wCSSF}, and @samp{wCASF} registers are optional.
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@subsection MIPS Features
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@cindex target descriptions, MIPS features
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The @samp{org.gnu.gdb.mips.cpu} feature is required for MIPS targets.
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It should contain registers @samp{r0} through @samp{r31}, @samp{lo},
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@samp{hi}, and @samp{pc}. They may be 32-bit or 64-bit depending
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on the target.
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The @samp{org.gnu.gdb.mips.cp0} feature is also required. It should
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contain at least the @samp{status}, @samp{badvaddr}, and @samp{cause}
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registers. They may be 32-bit or 64-bit depending on the target.
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The @samp{org.gnu.gdb.mips.fpu} feature is currently required, though
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it may be optional in a future version of @value{GDBN}. It should
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contain registers @samp{f0} through @samp{f31}, @samp{fcsr}, and
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@samp{fir}. They may be 32-bit or 64-bit depending on the target.
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@include gpl.texi
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@raisesections

gdb/features/mips-cp0.xml

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<?xml version="1.0"?>
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<!-- Copyright (C) 2007 Free Software Foundation, Inc.
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Copying and distribution of this file, with or without modification,
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are permitted in any medium without royalty provided the copyright
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notice and this notice are preserved. -->
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<!DOCTYPE feature SYSTEM "gdb-target.dtd">
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<feature name="org.gnu.gdb.mips.cp0">
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<reg name="status" bitsize="32" regnum="32"/>
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<reg name="badvaddr" bitsize="32" regnum="35"/>
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<reg name="cause" bitsize="32" regnum="36"/>
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</feature>

gdb/features/mips-cpu.xml

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<?xml version="1.0"?>
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<!-- Copyright (C) 2007 Free Software Foundation, Inc.
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Copying and distribution of this file, with or without modification,
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are permitted in any medium without royalty provided the copyright
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notice and this notice are preserved. -->
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<!DOCTYPE feature SYSTEM "gdb-target.dtd">
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<feature name="org.gnu.gdb.mips.cpu">
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<reg name="r0" bitsize="32"/>
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<reg name="r1" bitsize="32"/>
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<reg name="r2" bitsize="32"/>
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<reg name="r3" bitsize="32"/>
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<reg name="r4" bitsize="32"/>
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<reg name="r5" bitsize="32"/>
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<reg name="r6" bitsize="32"/>
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<reg name="r7" bitsize="32"/>
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<reg name="r8" bitsize="32"/>
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<reg name="r9" bitsize="32"/>
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<reg name="r10" bitsize="32"/>
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<reg name="r11" bitsize="32"/>
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<reg name="r12" bitsize="32"/>
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<reg name="r13" bitsize="32"/>
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<reg name="r14" bitsize="32"/>
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<reg name="r15" bitsize="32"/>
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<reg name="r16" bitsize="32"/>
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<reg name="r17" bitsize="32"/>
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<reg name="r18" bitsize="32"/>
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<reg name="r19" bitsize="32"/>
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<reg name="r20" bitsize="32"/>
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<reg name="r21" bitsize="32"/>
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<reg name="r22" bitsize="32"/>
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<reg name="r23" bitsize="32"/>
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<reg name="r24" bitsize="32"/>
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<reg name="r25" bitsize="32"/>
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<reg name="r26" bitsize="32"/>
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<reg name="r27" bitsize="32"/>
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<reg name="r28" bitsize="32"/>
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<reg name="r29" bitsize="32"/>
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<reg name="r30" bitsize="32"/>
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<reg name="r31" bitsize="32"/>
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<reg name="lo" bitsize="32" regnum="33"/>
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<reg name="hi" bitsize="32" regnum="34"/>
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<reg name="pc" bitsize="32" regnum="37"/>
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</feature>

gdb/features/mips-fpu.xml

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<?xml version="1.0"?>
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<!-- Copyright (C) 2007 Free Software Foundation, Inc.
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Copying and distribution of this file, with or without modification,
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are permitted in any medium without royalty provided the copyright
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notice and this notice are preserved. -->
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<!DOCTYPE feature SYSTEM "gdb-target.dtd">
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<feature name="org.gnu.gdb.mips.fpu">
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<reg name="f0" bitsize="32" type="ieee_single"/>
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<reg name="f1" bitsize="32" type="ieee_single"/>
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<reg name="f2" bitsize="32" type="ieee_single"/>
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<reg name="f3" bitsize="32" type="ieee_single"/>
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<reg name="f4" bitsize="32" type="ieee_single"/>
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<reg name="f5" bitsize="32" type="ieee_single"/>
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<reg name="f6" bitsize="32" type="ieee_single"/>
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<reg name="f7" bitsize="32" type="ieee_single"/>
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<reg name="f8" bitsize="32" type="ieee_single"/>
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<reg name="f9" bitsize="32" type="ieee_single"/>
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<reg name="f10" bitsize="32" type="ieee_single"/>
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<reg name="f11" bitsize="32" type="ieee_single"/>
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<reg name="f12" bitsize="32" type="ieee_single"/>
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<reg name="f13" bitsize="32" type="ieee_single"/>
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<reg name="f14" bitsize="32" type="ieee_single"/>
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<reg name="f15" bitsize="32" type="ieee_single"/>
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<reg name="f16" bitsize="32" type="ieee_single"/>
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<reg name="f17" bitsize="32" type="ieee_single"/>
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<reg name="f18" bitsize="32" type="ieee_single"/>
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<reg name="f19" bitsize="32" type="ieee_single"/>
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<reg name="f20" bitsize="32" type="ieee_single"/>
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<reg name="f21" bitsize="32" type="ieee_single"/>
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<reg name="f22" bitsize="32" type="ieee_single"/>
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<reg name="f23" bitsize="32" type="ieee_single"/>
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<reg name="f24" bitsize="32" type="ieee_single"/>
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<reg name="f25" bitsize="32" type="ieee_single"/>
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<reg name="f26" bitsize="32" type="ieee_single"/>
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<reg name="f27" bitsize="32" type="ieee_single"/>
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<reg name="f28" bitsize="32" type="ieee_single"/>
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<reg name="f29" bitsize="32" type="ieee_single"/>
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<reg name="f30" bitsize="32" type="ieee_single"/>
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<reg name="f31" bitsize="32" type="ieee_single"/>
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<reg name="fcsr" bitsize="32" group="float"/>
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<reg name="fir" bitsize="32" group="float"/>
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</feature>

gdb/features/mips64-cp0.xml

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<?xml version="1.0"?>
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<!-- Copyright (C) 2007 Free Software Foundation, Inc.
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Copying and distribution of this file, with or without modification,
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are permitted in any medium without royalty provided the copyright
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notice and this notice are preserved. -->
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<!DOCTYPE feature SYSTEM "gdb-target.dtd">
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<feature name="org.gnu.gdb.mips.cp0">
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<reg name="status" bitsize="64" regnum="32"/>
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<reg name="badvaddr" bitsize="64" regnum="35"/>
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<reg name="cause" bitsize="64" regnum="36"/>
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</feature>

gdb/features/mips64-cpu.xml

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<?xml version="1.0"?>
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<!-- Copyright (C) 2007 Free Software Foundation, Inc.
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Copying and distribution of this file, with or without modification,
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are permitted in any medium without royalty provided the copyright
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notice and this notice are preserved. -->
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<!DOCTYPE feature SYSTEM "gdb-target.dtd">
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<feature name="org.gnu.gdb.mips.cpu">
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<reg name="r0" bitsize="64"/>
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<reg name="r1" bitsize="64"/>
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<reg name="r2" bitsize="64"/>
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<reg name="r3" bitsize="64"/>
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<reg name="r4" bitsize="64"/>
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<reg name="r5" bitsize="64"/>
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<reg name="r6" bitsize="64"/>
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<reg name="r7" bitsize="64"/>
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<reg name="r8" bitsize="64"/>
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<reg name="r9" bitsize="64"/>
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<reg name="r10" bitsize="64"/>
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<reg name="r11" bitsize="64"/>
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<reg name="r12" bitsize="64"/>
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<reg name="r13" bitsize="64"/>
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<reg name="r14" bitsize="64"/>
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<reg name="r15" bitsize="64"/>
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<reg name="r16" bitsize="64"/>
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<reg name="r17" bitsize="64"/>
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<reg name="r18" bitsize="64"/>
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<reg name="r19" bitsize="64"/>
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<reg name="r20" bitsize="64"/>
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<reg name="r21" bitsize="64"/>
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<reg name="r22" bitsize="64"/>
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<reg name="r23" bitsize="64"/>
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<reg name="r24" bitsize="64"/>
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<reg name="r25" bitsize="64"/>
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<reg name="r26" bitsize="64"/>
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<reg name="r27" bitsize="64"/>
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<reg name="r28" bitsize="64"/>
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<reg name="r29" bitsize="64"/>
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<reg name="r30" bitsize="64"/>
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<reg name="r31" bitsize="64"/>
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<reg name="lo" bitsize="64" regnum="33"/>
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<reg name="hi" bitsize="64" regnum="34"/>
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<reg name="pc" bitsize="64" regnum="37"/>
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</feature>

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