From 477330bc9e6c304d263168d7350a5d28aab39ff2 Mon Sep 17 00:00:00 2001 From: Pavel Pisa Date: Sun, 26 Nov 2023 15:33:52 +0100 Subject: [PATCH] Machine and GUI: optimize to use qCountLeadingZeroBits It is available from It 5.6. Signed-off-by: Pavel Pisa --- src/gui/windows/cache/cacheview.cpp | 34 ----------------------------- src/machine/csr/controlstate.cpp | 13 +++++------ 2 files changed, 6 insertions(+), 41 deletions(-) diff --git a/src/gui/windows/cache/cacheview.cpp b/src/gui/windows/cache/cacheview.cpp index e4cf4808..fb20b3cf 100644 --- a/src/gui/windows/cache/cacheview.cpp +++ b/src/gui/windows/cache/cacheview.cpp @@ -4,9 +4,7 @@ #include -#if QT_VERSION >= QT_VERSION_CHECK(6, 6, 0) #include -#endif ////////////////////// #define ROW_HEIGHT 14 @@ -23,39 +21,7 @@ using namespace std; static inline unsigned int bitsToRepresent(quint32 range_max_val) { -#if QT_VERSION >= QT_VERSION_CHECK(6, 6, 0) return 32 - qCountLeadingZeroBits(range_max_val); -#else - const static qint8 bit_table[256] = { - /* x0 x1 x2 x3 x4 x5 x6 x7 x8 x9 xA xB xC xD xE xF */ - /* 0x */ 0, 1, 2, 2, 3, 3, 3, 3, 4, 4, 4, 4, 4, 4, 4, 4, - /* 1x */ 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, - /* 2x */ 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, - /* 3x */ 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, - /* 4x */ 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, - /* 5x */ 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, - /* 6x */ 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, - /* 7x */ 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, - /* 8x */ 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, - /* 9x */ 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, - /* Ax */ 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, - /* Bx */ 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, - /* Cx */ 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, - /* Dx */ 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, - /* Ex */ 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, - /* Fx */ 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, - }; - unsigned int res = 0; - unsigned int step; - step = ~(quint32)((qint32)((range_max_val >> 16) - 1) >> 31) & 16; - res += step; - range_max_val >>=step; - step = ~(quint32)((qint32)((range_max_val >> 8) - 1) >> 31) & 8; - res += step; - range_max_val >>=step; - res += bit_table[range_max_val]; - return res; -#endif } CacheAddressBlock::CacheAddressBlock(const machine::Cache *cache, unsigned width) { diff --git a/src/machine/csr/controlstate.cpp b/src/machine/csr/controlstate.cpp index 3ee3f0e5..e4b71809 100644 --- a/src/machine/csr/controlstate.cpp +++ b/src/machine/csr/controlstate.cpp @@ -5,6 +5,8 @@ #include "machinedefs.h" #include "simulator_exception.h" +#include + LOG_CATEGORY("machine.csr.control_state"); namespace machine { namespace CSR { @@ -99,14 +101,11 @@ namespace machine { namespace CSR { RegisterValue mip = register_data[Id::MIP]; int irq_to_signal = 0; - uint64_t irqs = mie.as_u64() & mip.as_u64() & 0xffffffff; + quint64 irqs = mie.as_u64() & mip.as_u64() & 0xffffffff; - // use ffs or __builtin_ffsl where available - for (int i = 0; i < 32; i++) { - if (irqs & (1UL << i)) { - irq_to_signal = i; - break; - } + if (irqs != 0) { + // Find the first (leas significant) set bit + irq_to_signal = 63 - qCountLeadingZeroBits(irqs & (~irqs + 1)); } value = (uint64_t)(irq_to_signal |