diff --git a/test/ddc-main/20-CoreSalt/32-ToLLVM/Test.stdout.check b/test/ddc-main/20-CoreSalt/32-ToLLVM/Test.stdout.check
index fb3f408de..b38d27baa 100644
--- a/test/ddc-main/20-CoreSalt/32-ToLLVM/Test.stdout.check
+++ b/test/ddc-main/20-CoreSalt/32-ToLLVM/Test.stdout.check
@@ -90,8 +90,8 @@ l20.entry:
 
 
 
-!16 = metadata !{metadata !"ptr_r", metadata !15, i32 0}
-!15 = metadata !{metadata !"ptr_ROOT_14", null, i32 1}
+!16 = !{!"ptr_r",  !15, i32 0}
+!15 = !{!"ptr_ROOT_14", null, i32 1}
 
 
 
diff --git a/test/ddc-main/20-CoreSalt/33-ToLLVM-MD/Test.stdout.check b/test/ddc-main/20-CoreSalt/33-ToLLVM-MD/Test.stdout.check
index 1c5568a0a..9de92a991 100644
--- a/test/ddc-main/20-CoreSalt/33-ToLLVM-MD/Test.stdout.check
+++ b/test/ddc-main/20-CoreSalt/33-ToLLVM-MD/Test.stdout.check
@@ -21,11 +21,11 @@ l9.entry:
         %_v10.xval1.addr1 = ptrtoint i64* %_v1.x to i64
         %_v10.xval1.addr2 = add i64 %_v10.xval1.addr1, 0
         %_v10.xval1.ptr = inttoptr i64 %_v10.xval1.addr2 to i64*
-        %_v10.xval1  = load i64* %_v10.xval1.ptr,    !tbaa !7
+        %_v10.xval1  = load i64, i64* %_v10.xval1.ptr,    !tbaa !7
         %_v11.yval1.addr1 = ptrtoint i64* %_v2.y to i64
         %_v11.yval1.addr2 = add i64 %_v11.yval1.addr1, 0
         %_v11.yval1.ptr = inttoptr i64 %_v11.yval1.addr2 to i64*
-        %_v11.yval1  = load i64* %_v11.yval1.ptr,    !tbaa !6
+        %_v11.yval1  = load i64, i64* %_v11.yval1.ptr,    !tbaa !6
         %_v12.a      = add i64 %_v10.xval1, %_v11.yval1
         %_v13.addr1  = ptrtoint i64* %_v3.z to i64
         %_v14.addr2  = add i64 %_v13.addr1, 0
@@ -34,11 +34,11 @@ l9.entry:
         %_v16.xval2.addr1 = ptrtoint i64* %_v1.x to i64
         %_v16.xval2.addr2 = add i64 %_v16.xval2.addr1, 0
         %_v16.xval2.ptr = inttoptr i64 %_v16.xval2.addr2 to i64*
-        %_v16.xval2  = load i64* %_v16.xval2.ptr,    !tbaa !7
+        %_v16.xval2  = load i64, i64* %_v16.xval2.ptr,    !tbaa !7
         %_v17.yval2.addr1 = ptrtoint i64* %_v2.y to i64
         %_v17.yval2.addr2 = add i64 %_v17.yval2.addr1, 0
         %_v17.yval2.ptr = inttoptr i64 %_v17.yval2.addr2 to i64*
-        %_v17.yval2  = load i64* %_v17.yval2.ptr,    !tbaa !6
+        %_v17.yval2  = load i64, i64* %_v17.yval2.ptr,    !tbaa !6
         %_v18.b      = add i64 %_v16.xval2, %_v17.yval2
         %_v19        = mul i64 %_v12.a, %_v18.b
         ret i64 %_v19
@@ -46,10 +46,10 @@ l9.entry:
 
 
 
-!8 = metadata !{metadata !"x_plus_y_square_rz", metadata !5, i32 0}
-!7 = metadata !{metadata !"x_plus_y_square_rx", metadata !6, i32 0}
-!6 = metadata !{metadata !"x_plus_y_square_ry", metadata !5, i32 0}
-!5 = metadata !{metadata !"x_plus_y_square_ROOT_4", null, i32 1}
+!8 = !{!"x_plus_y_square_rz",  !5, i32 0}
+!7 = !{!"x_plus_y_square_rx",  !6, i32 0}
+!6 = !{!"x_plus_y_square_ry",  !5, i32 0}
+!5 = !{!"x_plus_y_square_ROOT_4", null, i32 1}
 
 
 -- Observable optimisations: GVN - constprop behaviour
@@ -72,13 +72,13 @@ l11.entry:
         %_v12.a.addr1 = ptrtoint i64* %_v7.x to i64
         %_v12.a.addr2 = add i64 %_v12.a.addr1, 0
         %_v12.a.ptr  = inttoptr i64 %_v12.a.addr2 to i64*
-        %_v12.a      = load i64* %_v12.a.ptr,    !tbaa !10
+        %_v12.a      = load i64, i64* %_v12.a.ptr,    !tbaa !10
         %_v13.b      = add i64 %_v12.a, 1
         %_v15._d14   = call fastcc i64 @nothing (i64* %_v7.x) 
         %_v16.c.addr1 = ptrtoint i64* %_v7.x to i64
         %_v16.c.addr2 = add i64 %_v16.c.addr1, 0
         %_v16.c.ptr  = inttoptr i64 %_v16.c.addr2 to i64*
-        %_v16.c      = load i64* %_v16.c.ptr,    !tbaa !10
+        %_v16.c      = load i64, i64* %_v16.c.ptr,    !tbaa !10
         %_v17.d      = mul i64 %_v16.c, 2
         %_v18        = add i64 %_v13.b, %_v17.d
         ret i64 %_v18
@@ -86,10 +86,10 @@ l11.entry:
 
 
 
-!4 = metadata !{metadata !"nothing_rx", metadata !3, i32 0}
-!3 = metadata !{metadata !"nothing_ROOT_2", null, i32 1}
-!10 = metadata !{metadata !"three_x_plus_one_rx", metadata !9, i32 1}
-!9 = metadata !{metadata !"three_x_plus_one_ROOT_8", null, i32 1}
+!4 = !{!"nothing_rx",  !3, i32 0}
+!3 = !{!"nothing_ROOT_2", null, i32 1}
+!10 = !{!"three_x_plus_one_rx",  !9, i32 1}
+!9 = !{!"three_x_plus_one_ROOT_8", null, i32 1}
 
 
 -- Observarble optimisations: LICM
@@ -110,7 +110,7 @@ l13.default:
         %_v14.yval.addr1 = ptrtoint i64* %_v3.y to i64
         %_v14.yval.addr2 = add i64 %_v14.yval.addr1, 0
         %_v14.yval.ptr = inttoptr i64 %_v14.yval.addr2 to i64*
-        %_v14.yval   = load i64* %_v14.yval.ptr,    !tbaa !9
+        %_v14.yval   = load i64, i64* %_v14.yval.ptr,    !tbaa !9
         %_v15.yplustwo = add i64 %_v14.yval, 2
         %_v16.addr1  = ptrtoint i64* %_v2.x to i64
         %_v17.addr2  = add i64 %_v16.addr1, 0
@@ -127,10 +127,10 @@ l13.default:
 
 
 
-!9 = metadata !{metadata !"go_ry", metadata !6, i32 0}
-!8 = metadata !{metadata !"go_rx", metadata !6, i32 0}
-!7 = metadata !{metadata !"go_ra", metadata !6, i32 0}
-!6 = metadata !{metadata !"go_ROOT_5", null, i32 1}
+!9 = !{!"go_ry",  !6, i32 0}
+!8 = !{!"go_rx",  !6, i32 0}
+!7 = !{!"go_ra",  !6, i32 0}
+!6 = !{!"go_ROOT_5", null, i32 1}